include/configs/xupv2p.h

   1 /*
   2  * (C) Copyright 2007 Czech Technical University.
   3  *
   4  * Michal SIMEK <monstr@monstr.eu>
   5  *
   6  * See file CREDITS for list of people who contributed to this
   7  * project.
   8  *
   9  * This program is free software; you can redistribute it and/or
  10  * modify it under the terms of the GNU General Public License as
  11  * published by the Free Software Foundation; either version 2 of
  12  * the License, or (at your option) any later version.
  13  *
  14  * This program is distributed in the hope that it will be useful,
  15  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  17  * GNU General Public License for more details.
  18  *
  19  * You should have received a copy of the GNU General Public License
  20  * along with this program; if not, write to the Free Software
  21  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  22  * MA 02111-1307 USA
  23  */
  24
  25 #ifndef __CONFIG_H
  26 #define __CONFIG_H
  27
  28 #include "../board/xilinx/xupv2p/xparameters.h"
  29
  30 #define CONFIG_MICROBLAZE       1       /* MicroBlaze CPU */
  31 #define CONFIG_XUPV2P           1
  32
  33 /* uart */
  34 #ifdef XILINX_UARTLITE_BASEADDR
  35 #define XILINX_UARTLITE
  36 #define CONFIG_SERIAL_BASE      XILINX_UARTLITE_BASEADDR
  37 #define CONFIG_BAUDRATE         XILINX_UARTLITE_BAUDRATE
  38 #define CFG_BAUDRATE_TABLE      { CONFIG_BAUDRATE }
  39 #else
  40 #ifdef XILINX_UART16550_BASEADDR
  41 #define CFG_NS16550
  42 #define CFG_NS16550_SERIAL
  43 #define CFG_NS16550_REG_SIZE    4
  44 #define CONFIG_CONS_INDEX       1
  45 #define CFG_NS16550_COM1        XILINX_UART16550_BASEADDR
  46 #define CFG_NS16550_CLK         XILINX_UART16550_CLOCK_HZ
  47
  48 #define CONFIG_BAUDRATE         115200
  49 #define CFG_BAUDRATE_TABLE      { 9600, 115200 }
  50 #endif
  51 #endif
  52
  53 /* ethernet */
  54 #ifdef XILINX_EMAC_BASEADDR
  55 #define XILINX_EMAC     1
  56 #else
  57 #ifdef XILINX_EMACLITE_BASEADDR
  58 #define XILINX_EMACLITE 1
  59 #endif
  60 #endif
  61 #undef ET_DEBUG
  62
  63 /*
  64  * setting reset address
  65  *
  66  * TEXT_BASE is set to place, where the U-BOOT run in RAM, but
  67  * if you want to store U-BOOT in flash, set CFG_RESET_ADDRESS
  68  * to FLASH memory and after loading bitstream jump to FLASH.
  69  * U-BOOT auto-relocate to TEXT_BASE. After RESET command Microblaze
  70  * jump to CFG_RESET_ADDRESS where is the original U-BOOT code.
  71  */
  72 /* #define      CFG_RESET_ADDRESS       0x36000000 */
  73
  74 /* gpio */
  75 #ifdef XILINX_GPIO_BASEADDR
  76 #define CFG_GPIO_0              1
  77 #define CFG_GPIO_0_ADDR         XILINX_GPIO_BASEADDR
  78 #endif
  79
  80 /* interrupt controller */
  81 #define CFG_INTC_0              1
  82 #define CFG_INTC_0_ADDR         XILINX_INTC_BASEADDR
  83 #define CFG_INTC_0_NUM          XILINX_INTC_NUM_INTR_INPUTS
  84
  85 /* timer */
  86 #define CFG_TIMER_0             1
  87 #define CFG_TIMER_0_ADDR        XILINX_TIMER_BASEADDR
  88 #define CFG_TIMER_0_IRQ         XILINX_TIMER_IRQ
  89 #define FREQUENCE               XILINX_CLOCK_FREQ
  90 #define CFG_TIMER_0_PRELOAD     ( FREQUENCE/1000 )
  91
  92 /*
  93  * memory layout - Example
  94  * TEXT_BASE = 0x3600_0000;
  95  * CFG_SRAM_BASE = 0x3000_0000;
  96  * CFG_SRAM_SIZE = 0x1000_0000;
  97  *
  98  * CFG_GBL_DATA_OFFSET = 0x3000_0000 + 0x1000_0000 - 0x1000 = 0x3FFF_F000
  99  * CFG_MONITOR_BASE = 0x3FFF_F000 - 0x40000 = 0x3FFB_F000
 100  * CFG_MALLOC_BASE = 0x3FFB_F000 - 0x40000 = 0x3FF7_F000
 101  *
 102  * 0x3000_0000  CFG_SDRAM_BASE
 103  *                                      FREE
 104  * 0x3600_0000  TEXT_BASE
 105  *              U-BOOT code
 106  * 0x3602_0000
 107  *                                      FREE
 108  *
 109  *                                      STACK
 110  * 0x3FF7_F000  CFG_MALLOC_BASE
 111  *                                      MALLOC_AREA     256kB   Alloc
 112  * 0x3FFB_F000  CFG_MONITOR_BASE
 113  *                                      MONITOR_CODE    256kB   Env
 114  * 0x3FFF_F000  CFG_GBL_DATA_OFFSET
 115  *                                      GLOBAL_DATA     4kB     bd, gd
 116  * 0x4000_0000  CFG_SDRAM_BASE + CFG_SDRAM_SIZE
 117  */
 118
 119 /* ddr sdram - main memory */
 120 #define CFG_SDRAM_BASE          XILINX_RAM_START
 121 #define CFG_SDRAM_SIZE          XILINX_RAM_SIZE
 122 #define CFG_MEMTEST_START       CFG_SDRAM_BASE
 123 #define CFG_MEMTEST_END         (CFG_SDRAM_BASE + 0x1000)
 124
 125 /* global pointer */
 126 #define CFG_GBL_DATA_SIZE       0x1000  /* size of global data */
 127 #define CFG_GBL_DATA_OFFSET     (CFG_SDRAM_BASE + CFG_SDRAM_SIZE - CFG_GBL_DATA_SIZE) /* start of global data */
 128
 129 /* monitor code */
 130 #define SIZE                    0x40000
 131 #define CFG_MONITOR_LEN         SIZE
 132 #define CFG_MONITOR_BASE        (CFG_GBL_DATA_OFFSET - CFG_MONITOR_LEN)
 133 #define CFG_MONITOR_END         (CFG_MONITOR_BASE + CFG_MONITOR_LEN)
 134 #define CFG_MALLOC_LEN          SIZE
 135 #define CFG_MALLOC_BASE         (CFG_MONITOR_BASE - CFG_MALLOC_LEN)
 136
 137 /* stack */
 138 #define CFG_INIT_SP_OFFSET      CFG_MALLOC_BASE
 139
 140 #define CFG_NO_FLASH            1
 141 #define CFG_ENV_IS_NOWHERE      1
 142 #define CFG_ENV_SIZE            0x1000
 143 #define CFG_ENV_ADDR            (CFG_MONITOR_BASE - CFG_ENV_SIZE)
 144 #ifndef XILINX_SYSACE_BASEADDR
 145 #define CONFIG_COMMANDS (CONFIG__CMD_DFL |\
 146                         CFG_CMD_MEMORY |\
 147                         CFG_CMD_IRQ |\
 148                         CFG_CMD_BDI |\
 149                         CFG_CMD_NET |\
 150                         CFG_CMD_IMI |\
 151                         CFG_CMD_ECHO |\
 152                         CFG_CMD_CACHE |\
 153                         CFG_CMD_RUN |\
 154                         CFG_CMD_AUTOSCRIPT |\
 155                         CFG_CMD_ASKENV |\
 156                         CFG_CMD_LOADS |\
 157                         CFG_CMD_LOADB |\
 158                         CFG_CMD_MISC |\
 159                         CFG_CMD_MFSL |\
 160                         CFG_CMD_PING \
 161                         )
 162 #else
 163 #define CONFIG_COMMANDS (CONFIG__CMD_DFL |\
 164                         CFG_CMD_MEMORY |\
 165                         CFG_CMD_IRQ |\
 166                         CFG_CMD_BDI |\
 167                         CFG_CMD_NET |\
 168                         CFG_CMD_IMI |\
 169                         CFG_CMD_ECHO |\
 170                         CFG_CMD_CACHE |\
 171                         CFG_CMD_RUN |\
 172                         CFG_CMD_AUTOSCRIPT |\
 173                         CFG_CMD_ASKENV |\
 174                         CFG_CMD_LOADS |\
 175                         CFG_CMD_LOADB |\
 176                         CFG_CMD_MISC |\
 177                         CFG_CMD_FAT |\
 178                         CFG_CMD_EXT2 |\
 179                         CFG_CMD_MFSL |\
 180                         CFG_CMD_PING \
 181                         )
 182 #endif
 183
 184 /* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
 185 #include <cmd_confdefs.h>
 186
 187 /* Miscellaneous configurable options */
 188 #define CFG_PROMPT      "U-Boot-mONStR> "
 189 #define CFG_CBSIZE      512     /* size of console buffer */
 190 #define CFG_PBSIZE      (CFG_CBSIZE + sizeof(CFG_PROMPT) + 16) /* print buffer size */
 191 #define CFG_MAXARGS     15      /* max number of command args */
 192 #define CFG_LONGHELP
 193 #define CFG_LOAD_ADDR   0x12000000 /* default load address */
 194
 195 #define CONFIG_BOOTDELAY        30
 196 #define CONFIG_BOOTARGS         "root=romfs"
 197 #define CONFIG_HOSTNAME         "xupv2p"
 198 #define CONFIG_BOOTCOMMAND      "base 0;tftp 11000000 image.img;bootm"
 199 #define CONFIG_IPADDR           192.168.0.3
 200 #define CONFIG_SERVERIP         192.168.0.5
 201 #define CONFIG_GATEWAYIP        192.168.0.1
 202 #define CONFIG_ETHADDR          00:E0:0C:00:00:FD
 203
 204 /* architecture dependent code */
 205 #define CFG_USR_EXCEP   /* user exception */
 206 #define CFG_HZ  1000
 207
 208 #define CONFIG_PREBOOT  "echo U-BOOT by mONStR;"        \
 209         "base 0;" \
 210         "echo"
 211
 212 /* system ace */
 213 #ifdef XILINX_SYSACE_BASEADDR
 214 #define CONFIG_SYSTEMACE
 215 /* #define DEBUG_SYSTEMACE */
 216 #define SYSTEMACE_CONFIG_FPGA
 217 #define CFG_SYSTEMACE_BASE      XILINX_SYSACE_BASEADDR
 218 #define CFG_SYSTEMACE_WIDTH     XILINX_SYSACE_MEM_WIDTH
 219 #define CONFIG_DOS_PARTITION
 220 #endif
 221
 222 #endif  /* __CONFIG_H */