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1 /*
2 * (C) Copyright 2005-2006
3 * Stefan Roese, DENX Software Engineering, sr@denx.de.
4 *
5 * See file CREDITS for list of people who contributed to this
6 * project.
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21 * MA 02111-1307 USA
22 */
23
24 /************************************************************************
25 * yosemite.h - configuration for YOSEMITE board
26 ***********************************************************************/
27 #ifndef __CONFIG_H
28 #define __CONFIG_H
29
30 /*-----------------------------------------------------------------------
31 * High Level Configuration Options
32 *----------------------------------------------------------------------*/
33 #define CONFIG_YOSEMITE 1 /* Board is Yosemite */
34 #define CONFIG_440EP 1 /* Specific PPC440EP support */
35 #define CONFIG_4xx 1 /* ... PPC4xx family */
36 #define CONFIG_SYS_CLK_FREQ 66666666 /* external freq to pll */
37
38 #define CONFIG_BOARD_EARLY_INIT_F 1 /* Call board_early_init_f */
39 #define CONFIG_MISC_INIT_R 1 /* call misc_init_r() */
40
41 /*-----------------------------------------------------------------------
42 * Base addresses -- Note these are effective addresses where the
43 * actual resources get mapped (not physical addresses)
44 *----------------------------------------------------------------------*/
45 #define CFG_MONITOR_LEN (512 * 1024) /* Reserve 512 kB for Monitor */
46 #define CFG_MALLOC_LEN (256 * 1024) /* Reserve 256 kB for malloc() */
47 #define CFG_MONITOR_BASE (-CFG_MONITOR_LEN)
48 #define CFG_SDRAM_BASE 0x00000000 /* _must_ be 0 */
49 #define CFG_FLASH_BASE 0xfc000000 /* start of FLASH */
50 #define CFG_PCI_MEMBASE 0xa0000000 /* mapped pci memory*/
51 #define CFG_PCI_MEMBASE1 CFG_PCI_MEMBASE + 0x10000000
52 #define CFG_PCI_MEMBASE2 CFG_PCI_MEMBASE1 + 0x10000000
53 #define CFG_PCI_MEMBASE3 CFG_PCI_MEMBASE2 + 0x10000000
54
55 /*Don't change either of these*/
56 #define CFG_PERIPHERAL_BASE 0xef600000 /* internal peripherals*/
57 #define CFG_PCI_BASE 0xe0000000 /* internal PCI regs*/
58 /*Don't change either of these*/
59
60 #define CFG_USB_DEVICE 0x50000000
61 #define CFG_NVRAM_BASE_ADDR 0x80000000
62 #define CFG_BCSR_BASE (CFG_NVRAM_BASE_ADDR | 0x2000)
63 #define CFG_BOOT_BASE_ADDR 0xf0000000
64
65 /*-----------------------------------------------------------------------
66 * Initial RAM & stack pointer (placed in SDRAM)
67 *----------------------------------------------------------------------*/
68 #define CFG_INIT_RAM_DCACHE 1 /* d-cache as init ram */
69 #define CFG_INIT_RAM_ADDR 0x70000000 /* DCache */
70 #define CFG_INIT_RAM_END (8 << 10)
71 #define CFG_GBL_DATA_SIZE 256 /* num bytes initial data*/
72 #define CFG_GBL_DATA_OFFSET (CFG_INIT_RAM_END - CFG_GBL_DATA_SIZE)
73 #define CFG_INIT_SP_OFFSET CFG_GBL_DATA_OFFSET
74
75 /*-----------------------------------------------------------------------
76 * Serial Port
77 *----------------------------------------------------------------------*/
78 #define CFG_EXT_SERIAL_CLOCK 11059200 /* use external 11.059MHz clk */
79 #define CONFIG_BAUDRATE 115200
80 #define CONFIG_SERIAL_MULTI 1
81 /*define this if you want console on UART1*/
82 #undef CONFIG_UART1_CONSOLE
83
84 #define CFG_BAUDRATE_TABLE \
85 {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200}
86
87 /*-----------------------------------------------------------------------
88 * Environment
89 *----------------------------------------------------------------------*/
90 /*
91 * Define here the location of the environment variables (FLASH or EEPROM).
92 * Note: DENX encourages to use redundant environment in FLASH.
93 */
94 #if 1
95 #define CFG_ENV_IS_IN_FLASH 1 /* use FLASH for environment vars */
96 #else
97 #define CFG_ENV_IS_IN_EEPROM 1 /* use EEPROM for environment vars */
98 #endif
99
100 /*-----------------------------------------------------------------------
101 * FLASH related
102 *----------------------------------------------------------------------*/
103 #define CFG_FLASH_CFI /* The flash is CFI compatible */
104 #define CFG_FLASH_CFI_DRIVER /* Use common CFI driver */
105 #define CFG_FLASH_CFI_AMD_RESET 1 /* AMD RESET for STM 29W320DB! */
106
107 #define CFG_MAX_FLASH_BANKS 1 /* max number of memory banks */
108 #define CFG_MAX_FLASH_SECT 512 /* max number of sectors on one chip */
109
110 #define CFG_FLASH_ERASE_TOUT 120000 /* Timeout for Flash Erase (in ms) */
111 #define CFG_FLASH_WRITE_TOUT 500 /* Timeout for Flash Write (in ms) */
112
113 #define CFG_FLASH_USE_BUFFER_WRITE 1 /* use buffered writes (20x faster) */
114
115 #define CFG_FLASH_EMPTY_INFO /* print 'E' for empty sector on flinfo */
116
117 #ifdef CFG_ENV_IS_IN_FLASH
118 #define CFG_ENV_SECT_SIZE 0x20000 /* size of one complete sector */
119 #define CFG_ENV_ADDR (CFG_MONITOR_BASE-CFG_ENV_SECT_SIZE)
120 #define CFG_ENV_SIZE 0x2000 /* Total Size of Environment Sector */
121
122 /* Address and size of Redundant Environment Sector */
123 #define CFG_ENV_ADDR_REDUND (CFG_ENV_ADDR-CFG_ENV_SECT_SIZE)
124 #define CFG_ENV_SIZE_REDUND (CFG_ENV_SIZE)
125 #endif /* CFG_ENV_IS_IN_FLASH */
126
127 /*-----------------------------------------------------------------------
128 * DDR SDRAM
129 *----------------------------------------------------------------------*/
130 #undef CONFIG_SPD_EEPROM /* Don't use SPD EEPROM for setup */
131 #define CFG_KBYTES_SDRAM (128 * 1024) /* 128MB */
132 #define CFG_SDRAM_BANKS (2)
133
134
135 /*-----------------------------------------------------------------------
136 * I2C
137 *----------------------------------------------------------------------*/
138 #define CONFIG_HARD_I2C 1 /* I2C with hardware support */
139 #undef CONFIG_SOFT_I2C /* I2C bit-banged */
140 #define CFG_I2C_SPEED 400000 /* I2C speed and slave address */
141 #define CFG_I2C_SLAVE 0x7F
142
143 #define CFG_I2C_MULTI_EEPROMS
144 #define CFG_I2C_EEPROM_ADDR (0xa8>>1)
145 #define CFG_I2C_EEPROM_ADDR_LEN 1
146 #define CFG_EEPROM_PAGE_WRITE_ENABLE
147 #define CFG_EEPROM_PAGE_WRITE_BITS 3
148 #define CFG_EEPROM_PAGE_WRITE_DELAY_MS 10
149
150 #ifdef CFG_ENV_IS_IN_EEPROM
151 #define CFG_ENV_SIZE 0x200 /* Size of Environment vars */
152 #define CFG_ENV_OFFSET 0x0
153 #endif /* CFG_ENV_IS_IN_EEPROM */
154
155 #define CONFIG_PREBOOT "echo;" \
156 "echo Type \"run flash_nfs\" to mount root filesystem over NFS;" \
157 "echo"
158
159 #undef CONFIG_BOOTARGS
160
161 #define CONFIG_EXTRA_ENV_SETTINGS \
162 "netdev=eth0\0" \
163 "hostname=yosemite\0" \
164 "nfsargs=setenv bootargs root=/dev/nfs rw " \
165 "nfsroot=${serverip}:${rootpath}\0" \
166 "ramargs=setenv bootargs root=/dev/ram rw\0" \
167 "addip=setenv bootargs ${bootargs} " \
168 "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \
169 ":${hostname}:${netdev}:off panic=1\0" \
170 "addtty=setenv bootargs ${bootargs} console=ttyS0,${baudrate}\0"\
171 "flash_nfs=run nfsargs addip addtty;" \
172 "bootm ${kernel_addr}\0" \
173 "flash_self=run ramargs addip addtty;" \
174 "bootm ${kernel_addr} ${ramdisk_addr}\0" \
175 "net_nfs=tftp 200000 ${bootfile};run nfsargs addip addtty;" \
176 "bootm\0" \
177 "rootpath=/opt/eldk/ppc_4xx\0" \
178 "bootfile=/tftpboot/yosemite/uImage\0" \
179 "kernel_addr=fc000000\0" \
180 "ramdisk_addr=fc180000\0" \
181 "load=tftp 100000 /tftpboot/yosemite/u-boot.bin\0" \
182 "update=protect off fff80000 ffffffff;era fff80000 ffffffff;" \
183 "cp.b 100000 fff80000 80000;" \
184 "setenv filesize;saveenv\0" \
185 "upd=run load;run update\0" \
186 ""
187 #define CONFIG_BOOTCOMMAND "run flash_self"
188
189 #if 0
190 #define CONFIG_BOOTDELAY -1 /* autoboot disabled */
191 #else
192 #define CONFIG_BOOTDELAY 5 /* autoboot after 5 seconds */
193 #endif
194
195 #define CONFIG_BAUDRATE 115200
196
197 #define CONFIG_LOADS_ECHO 1 /* echo on for serial download */
198 #define CFG_LOADS_BAUD_CHANGE 1 /* allow baudrate change */
199
200 #define CONFIG_MII 1 /* MII PHY management */
201 #define CONFIG_NET_MULTI 1 /* required for netconsole */
202 #define CONFIG_PHY1_ADDR 3
203 #define CONFIG_HAS_ETH1 1 /* add support for "eth1addr" */
204 #define CONFIG_PHY_ADDR 1 /* PHY address, See schematics */
205
206 #define CFG_RX_ETH_BUFFER 32 /* Number of ethernet rx buffers & descriptors */
207
208 #define CONFIG_NETCONSOLE /* include NetConsole support */
209
210 /* Partitions */
211 #define CONFIG_MAC_PARTITION
212 #define CONFIG_DOS_PARTITION
213 #define CONFIG_ISO_PARTITION
214
215 #ifdef CONFIG_440EP
216 /* USB */
217 #define CONFIG_USB_OHCI
218 #define CONFIG_USB_STORAGE
219
220 /*Comment this out to enable USB 1.1 device*/
221 #define USB_2_0_DEVICE
222 #endif /*CONFIG_440EP*/
223
224 #ifdef DEBUG
225 #define CONFIG_PANIC_HANG
226 #else
227 #define CONFIG_HW_WATCHDOG /* watchdog */
228 #endif
229
230 #define CONFIG_COMMANDS (CONFIG_CMD_DFL | \
231 CFG_CMD_ASKENV | \
232 CFG_CMD_DHCP | \
233 CFG_CMD_DIAG | \
234 CFG_CMD_ELF | \
235 CFG_CMD_EEPROM | \
236 CFG_CMD_I2C | \
237 CFG_CMD_IRQ | \
238 CFG_CMD_MII | \
239 CFG_CMD_NET | \
240 CFG_CMD_NFS | \
241 CFG_CMD_PCI | \
242 CFG_CMD_PING | \
243 CFG_CMD_REGINFO | \
244 CFG_CMD_SDRAM | \
245 CFG_CMD_FAT | \
246 CFG_CMD_EXT2 | \
247 CFG_CMD_USB )
248
249 #define CONFIG_SUPPORT_VFAT
250
251 /* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
252 #include <cmd_confdefs.h>
253
254 /*
255 * Miscellaneous configurable options
256 */
257 #define CFG_LONGHELP /* undef to save memory */
258 #define CFG_PROMPT "=> " /* Monitor Command Prompt */
259 #if (CONFIG_COMMANDS & CFG_CMD_KGDB)
260 #define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
261 #else
262 #define CFG_CBSIZE 256 /* Console I/O Buffer Size */
263 #endif
264 #define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */
265 #define CFG_MAXARGS 16 /* max number of command args */
266 #define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */
267
268 #define CFG_MEMTEST_START 0x0400000 /* memtest works on */
269 #define CFG_MEMTEST_END 0x0C00000 /* 4 ... 12 MB in DRAM */
270
271 #define CFG_LOAD_ADDR 0x100000 /* default load address */
272 #define CFG_EXTBDINFO 1 /* To use extended board_into (bd_t) */
273 #define CONFIG_LYNXKDI 1 /* support kdi files */
274
275 #define CFG_HZ 1000 /* decrementer freq: 1 ms ticks */
276
277 #define CONFIG_CMDLINE_EDITING 1 /* add command line history */
278 #define CONFIG_LOOPW 1 /* enable loopw command */
279 #define CONFIG_MX_CYCLIC 1 /* enable mdc/mwc commands */
280 #define CONFIG_ZERO_BOOTDELAY_CHECK /* check for keypress on bootdelay==0 */
281 #define CONFIG_VERSION_VARIABLE 1 /* include version env variable */
282
283 /*-----------------------------------------------------------------------
284 * PCI stuff
285 *-----------------------------------------------------------------------
286 */
287 /* General PCI */
288 #define CONFIG_PCI /* include pci support */
289 #undef CONFIG_PCI_PNP /* do (not) pci plug-and-play */
290 #define CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */
291 #define CFG_PCI_TARGBASE 0x80000000 /* PCIaddr mapped to CFG_PCI_MEMBASE*/
292
293 /* Board-specific PCI */
294 #define CFG_PCI_PRE_INIT /* enable board pci_pre_init() */
295 #define CFG_PCI_TARGET_INIT
296 #define CFG_PCI_MASTER_INIT
297
298 #define CFG_PCI_SUBSYS_VENDORID 0x10e8 /* AMCC */
299 #define CFG_PCI_SUBSYS_ID 0xcafe /* Whatever */
300
301 /*
302 * For booting Linux, the board info and command line data
303 * have to be in the first 8 MB of memory, since this is
304 * the maximum mapped by the Linux kernel during initialization.
305 */
306 #define CFG_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
307
308 /*-----------------------------------------------------------------------
309 * Cache Configuration
310 */
311 #define CFG_DCACHE_SIZE (32<<10) /* For AMCC 440 CPUs */
312 #define CFG_CACHELINE_SIZE 32 /* ... */
313 #if (CONFIG_COMMANDS & CFG_CMD_KGDB)
314 #define CFG_CACHELINE_SHIFT 5 /* log base 2 of the above value */
315 #endif
316
317 /*
318 * Internal Definitions
319 *
320 * Boot Flags
321 */
322 #define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
323 #define BOOTFLAG_WARM 0x02 /* Software reboot */
324
325 #if (CONFIG_COMMANDS & CFG_CMD_KGDB)
326 #define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */
327 #define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */
328 #endif
329
330 #endif /* __CONFIG_H */