include/elf/xtensa.h

   1 /* Xtensa ELF support for BFD.
   2    Copyright 2003, 2004, 2007 Free Software Foundation, Inc.
   3    Contributed by Bob Wilson (bwilson@tensilica.com) at Tensilica.
   4
   5    This file is part of BFD, the Binary File Descriptor library.
   6
   7    This program is free software; you can redistribute it and/or modify
   8    it under the terms of the GNU General Public License as published by
   9    the Free Software Foundation; either version 2 of the License, or
  10    (at your option) any later version.
  11
  12    This program is distributed in the hope that it will be useful,
  13    but WITHOUT ANY WARRANTY; without even the implied warranty of
  14    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  15    GNU General Public License for more details.
  16
  17    You should have received a copy of the GNU General Public License
  18    along with this program; if not, write to the Free Software
  19    Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301,
  20    USA.  */
  21
  22 /* This file holds definitions specific to the Xtensa ELF ABI.  */
  23
  24 #ifndef _ELF_XTENSA_H
  25 #define _ELF_XTENSA_H
  26
  27 #include "elf/reloc-macros.h"
  28
  29 /* Relocations.  */
  30 START_RELOC_NUMBERS (elf_xtensa_reloc_type)
  31      RELOC_NUMBER (R_XTENSA_NONE, 0)
  32      RELOC_NUMBER (R_XTENSA_32, 1)
  33      RELOC_NUMBER (R_XTENSA_RTLD, 2)
  34      RELOC_NUMBER (R_XTENSA_GLOB_DAT, 3)
  35      RELOC_NUMBER (R_XTENSA_JMP_SLOT, 4)
  36      RELOC_NUMBER (R_XTENSA_RELATIVE, 5)
  37      RELOC_NUMBER (R_XTENSA_PLT, 6)
  38      RELOC_NUMBER (R_XTENSA_OP0, 8)
  39      RELOC_NUMBER (R_XTENSA_OP1, 9)
  40      RELOC_NUMBER (R_XTENSA_OP2, 10)
  41      RELOC_NUMBER (R_XTENSA_ASM_EXPAND, 11)
  42      RELOC_NUMBER (R_XTENSA_ASM_SIMPLIFY, 12)
  43      RELOC_NUMBER (R_XTENSA_32_PCREL, 14)
  44      RELOC_NUMBER (R_XTENSA_GNU_VTINHERIT, 15)
  45      RELOC_NUMBER (R_XTENSA_GNU_VTENTRY, 16)
  46      RELOC_NUMBER (R_XTENSA_DIFF8, 17)
  47      RELOC_NUMBER (R_XTENSA_DIFF16, 18)
  48      RELOC_NUMBER (R_XTENSA_DIFF32, 19)
  49      RELOC_NUMBER (R_XTENSA_SLOT0_OP, 20)
  50      RELOC_NUMBER (R_XTENSA_SLOT1_OP, 21)
  51      RELOC_NUMBER (R_XTENSA_SLOT2_OP, 22)
  52      RELOC_NUMBER (R_XTENSA_SLOT3_OP, 23)
  53      RELOC_NUMBER (R_XTENSA_SLOT4_OP, 24)
  54      RELOC_NUMBER (R_XTENSA_SLOT5_OP, 25)
  55      RELOC_NUMBER (R_XTENSA_SLOT6_OP, 26)
  56      RELOC_NUMBER (R_XTENSA_SLOT7_OP, 27)
  57      RELOC_NUMBER (R_XTENSA_SLOT8_OP, 28)
  58      RELOC_NUMBER (R_XTENSA_SLOT9_OP, 29)
  59      RELOC_NUMBER (R_XTENSA_SLOT10_OP, 30)
  60      RELOC_NUMBER (R_XTENSA_SLOT11_OP, 31)
  61      RELOC_NUMBER (R_XTENSA_SLOT12_OP, 32)
  62      RELOC_NUMBER (R_XTENSA_SLOT13_OP, 33)
  63      RELOC_NUMBER (R_XTENSA_SLOT14_OP, 34)
  64      RELOC_NUMBER (R_XTENSA_SLOT0_ALT, 35)
  65      RELOC_NUMBER (R_XTENSA_SLOT1_ALT, 36)
  66      RELOC_NUMBER (R_XTENSA_SLOT2_ALT, 37)
  67      RELOC_NUMBER (R_XTENSA_SLOT3_ALT, 38)
  68      RELOC_NUMBER (R_XTENSA_SLOT4_ALT, 39)
  69      RELOC_NUMBER (R_XTENSA_SLOT5_ALT, 40)
  70      RELOC_NUMBER (R_XTENSA_SLOT6_ALT, 41)
  71      RELOC_NUMBER (R_XTENSA_SLOT7_ALT, 42)
  72      RELOC_NUMBER (R_XTENSA_SLOT8_ALT, 43)
  73      RELOC_NUMBER (R_XTENSA_SLOT9_ALT, 44)
  74      RELOC_NUMBER (R_XTENSA_SLOT10_ALT, 45)
  75      RELOC_NUMBER (R_XTENSA_SLOT11_ALT, 46)
  76      RELOC_NUMBER (R_XTENSA_SLOT12_ALT, 47)
  77      RELOC_NUMBER (R_XTENSA_SLOT13_ALT, 48)
  78      RELOC_NUMBER (R_XTENSA_SLOT14_ALT, 49)
  79 END_RELOC_NUMBERS (R_XTENSA_max)
  80
  81 /* Processor-specific flags for the ELF header e_flags field.  */
  82
  83 /* Four-bit Xtensa machine type field.  */
  84 #define EF_XTENSA_MACH                  0x0000000f
  85
  86 /* Various CPU types.  */
  87 #define E_XTENSA_MACH                   0x00000000
  88
  89 /* Leave bits 0xf0 alone in case we ever have more than 16 cpu types.
  90    Highly unlikely, but what the heck.  */
  91
  92 #define EF_XTENSA_XT_INSN               0x00000100
  93 #define EF_XTENSA_XT_LIT                0x00000200
  94
  95
  96 /* Processor-specific dynamic array tags.  */
  97
  98 /* Offset of the table that records the GOT location(s).  */
  99 #define DT_XTENSA_GOT_LOC_OFF           0x70000000
 100
 101 /* Number of entries in the GOT location table.  */
 102 #define DT_XTENSA_GOT_LOC_SZ            0x70000001
 103
 104
 105 /* Definitions for instruction and literal property tables.  The
 106    tables for ".gnu.linkonce.*" sections are placed in the following
 107    sections:
 108
 109    instruction tables:  .gnu.linkonce.x.*
 110    literal tables:      .gnu.linkonce.p.*
 111 */
 112
 113 #define XTENSA_INSN_SEC_NAME ".xt.insn"
 114 #define XTENSA_LIT_SEC_NAME  ".xt.lit"
 115 #define XTENSA_PROP_SEC_NAME ".xt.prop"
 116
 117 typedef struct property_table_entry_t
 118 {
 119   bfd_vma address;
 120   bfd_vma size;
 121   flagword flags;
 122 } property_table_entry;
 123
 124 /* Flags in the property tables to specify whether blocks of memory are
 125    literals, instructions, data, or unreachable.  For instructions,
 126    blocks that begin loop targets and branch targets are designated.
 127    Blocks that do not allow density instructions, instruction reordering
 128    or transformation are also specified.  Finally, for branch targets,
 129    branch target alignment priority is included.  Alignment of the next
 130    block is specified in the current block and the size of the current
 131    block does not include any fill required to align to the next
 132    block.  */
 133
 134 #define XTENSA_PROP_LITERAL             0x00000001
 135 #define XTENSA_PROP_INSN                0x00000002
 136 #define XTENSA_PROP_DATA                0x00000004
 137 #define XTENSA_PROP_UNREACHABLE         0x00000008
 138 /* Instruction-only properties at beginning of code. */
 139 #define XTENSA_PROP_INSN_LOOP_TARGET    0x00000010
 140 #define XTENSA_PROP_INSN_BRANCH_TARGET  0x00000020
 141 /* Instruction-only properties about code. */
 142 #define XTENSA_PROP_INSN_NO_DENSITY     0x00000040
 143 #define XTENSA_PROP_INSN_NO_REORDER     0x00000080
 144 /* Historically, NO_TRANSFORM was a property of instructions,
 145    but it should apply to literals under certain circumstances.  */
 146 #define XTENSA_PROP_NO_TRANSFORM        0x00000100
 147
 148 /*  Branch target alignment information.  This transmits information
 149     to the linker optimization about the priority of aligning a
 150     particular block for branch target alignment: None, low priority,
 151     high priority, or required.  These only need to be checked in
 152     instruction blocks marked as XTENSA_PROP_INSN_BRANCH_TARGET.
 153     Common usage is:
 154
 155     switch (GET_XTENSA_PROP_BT_ALIGN(flags))
 156     case XTENSA_PROP_BT_ALIGN_NONE:
 157     case XTENSA_PROP_BT_ALIGN_LOW:
 158     case XTENSA_PROP_BT_ALIGN_HIGH:
 159     case XTENSA_PROP_BT_ALIGN_REQUIRE:
 160 */
 161 #define XTENSA_PROP_BT_ALIGN_MASK       0x00000600
 162
 163 /* No branch target alignment.  */
 164 #define XTENSA_PROP_BT_ALIGN_NONE       0x0
 165 /* Low priority branch target alignment.  */
 166 #define XTENSA_PROP_BT_ALIGN_LOW        0x1
 167 /* High priority branch target alignment. */
 168 #define XTENSA_PROP_BT_ALIGN_HIGH       0x2
 169 /* Required branch target alignment.  */
 170 #define XTENSA_PROP_BT_ALIGN_REQUIRE    0x3
 171
 172 #define GET_XTENSA_PROP_BT_ALIGN(flag) \
 173   (((unsigned)((flag) & (XTENSA_PROP_BT_ALIGN_MASK))) >> 9)
 174 #define SET_XTENSA_PROP_BT_ALIGN(flag, align) \
 175   (((flag) & (~XTENSA_PROP_BT_ALIGN_MASK)) | \
 176     (((align) << 9) & XTENSA_PROP_BT_ALIGN_MASK))
 177
 178 /* Alignment is specified in the block BEFORE the one that needs
 179    alignment.  Up to 5 bits.  Use GET_XTENSA_PROP_ALIGNMENT(flags) to
 180    get the required alignment specified as a power of 2.  Use
 181    SET_XTENSA_PROP_ALIGNMENT(flags, pow2) to set the required
 182    alignment.  Be careful of side effects since the SET will evaluate
 183    flags twice.  Also, note that the SIZE of a block in the property
 184    table does not include the alignment size, so the alignment fill
 185    must be calculated to determine if two blocks are contiguous.
 186    TEXT_ALIGN is not currently implemented but is a placeholder for a
 187    possible future implementation.  */
 188
 189 #define XTENSA_PROP_ALIGN               0x00000800
 190
 191 #define XTENSA_PROP_ALIGNMENT_MASK      0x0001f000
 192
 193 #define GET_XTENSA_PROP_ALIGNMENT(flag) \
 194   (((unsigned)((flag) & (XTENSA_PROP_ALIGNMENT_MASK))) >> 12)
 195 #define SET_XTENSA_PROP_ALIGNMENT(flag, align) \
 196   (((flag) & (~XTENSA_PROP_ALIGNMENT_MASK)) | \
 197     (((align) << 12) & XTENSA_PROP_ALIGNMENT_MASK))
 198
 199 #define XTENSA_PROP_INSN_ABSLIT        0x00020000
 200
 201 #endif /* _ELF_XTENSA_H */