]> git.ipfire.org Git - thirdparty/qemu.git/blob - include/hw/ppc/spapr_vio.h
Move QOM typedefs and add missing includes
[thirdparty/qemu.git] / include / hw / ppc / spapr_vio.h
1 #ifndef HW_SPAPR_VIO_H
2 #define HW_SPAPR_VIO_H
3
4 /*
5 * QEMU sPAPR VIO bus definitions
6 *
7 * Copyright (c) 2010 David Gibson, IBM Corporation <david@gibson.dropbear.id.au>
8 * Based on the s390 virtio bus definitions:
9 * Copyright (c) 2009 Alexander Graf <agraf@suse.de>
10 *
11 * This library is free software; you can redistribute it and/or
12 * modify it under the terms of the GNU Lesser General Public
13 * License as published by the Free Software Foundation; either
14 * version 2 of the License, or (at your option) any later version.
15 *
16 * This library is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
19 * Lesser General Public License for more details.
20 *
21 * You should have received a copy of the GNU Lesser General Public
22 * License along with this library; if not, see <http://www.gnu.org/licenses/>.
23 */
24
25 #include "hw/ppc/spapr.h"
26 #include "sysemu/dma.h"
27 #include "hw/irq.h"
28 #include "qom/object.h"
29
30 #define TYPE_VIO_SPAPR_DEVICE "vio-spapr-device"
31 typedef struct SpaprVioDevice SpaprVioDevice;
32 typedef struct SpaprVioDeviceClass SpaprVioDeviceClass;
33 #define VIO_SPAPR_DEVICE(obj) \
34 OBJECT_CHECK(SpaprVioDevice, (obj), TYPE_VIO_SPAPR_DEVICE)
35 #define VIO_SPAPR_DEVICE_CLASS(klass) \
36 OBJECT_CLASS_CHECK(SpaprVioDeviceClass, (klass), TYPE_VIO_SPAPR_DEVICE)
37 #define VIO_SPAPR_DEVICE_GET_CLASS(obj) \
38 OBJECT_GET_CLASS(SpaprVioDeviceClass, (obj), TYPE_VIO_SPAPR_DEVICE)
39
40 #define TYPE_SPAPR_VIO_BUS "spapr-vio-bus"
41 typedef struct SpaprVioBus SpaprVioBus;
42 #define SPAPR_VIO_BUS(obj) OBJECT_CHECK(SpaprVioBus, (obj), TYPE_SPAPR_VIO_BUS)
43
44 #define TYPE_SPAPR_VIO_BRIDGE "spapr-vio-bridge"
45
46 typedef struct SpaprVioCrq {
47 uint64_t qladdr;
48 uint32_t qsize;
49 uint32_t qnext;
50 int(*SendFunc)(struct SpaprVioDevice *vdev, uint8_t *crq);
51 } SpaprVioCrq;
52
53
54 struct SpaprVioDeviceClass {
55 DeviceClass parent_class;
56
57 const char *dt_name, *dt_type, *dt_compatible;
58 target_ulong signal_mask;
59 uint32_t rtce_window_size;
60 void (*realize)(SpaprVioDevice *dev, Error **errp);
61 void (*reset)(SpaprVioDevice *dev);
62 int (*devnode)(SpaprVioDevice *dev, void *fdt, int node_off);
63 const char *(*get_dt_compatible)(SpaprVioDevice *dev);
64 };
65
66 struct SpaprVioDevice {
67 DeviceState qdev;
68 uint32_t reg;
69 uint32_t irq;
70 uint64_t signal_state;
71 SpaprVioCrq crq;
72 AddressSpace as;
73 MemoryRegion mrroot;
74 MemoryRegion mrbypass;
75 SpaprTceTable *tcet;
76 };
77
78 #define DEFINE_SPAPR_PROPERTIES(type, field) \
79 DEFINE_PROP_UINT32("reg", type, field.reg, -1)
80
81 struct SpaprVioBus {
82 BusState bus;
83 uint32_t next_reg;
84 };
85
86 SpaprVioBus *spapr_vio_bus_init(void);
87 SpaprVioDevice *spapr_vio_find_by_reg(SpaprVioBus *bus, uint32_t reg);
88 void spapr_dt_vdevice(SpaprVioBus *bus, void *fdt);
89 gchar *spapr_vio_stdout_path(SpaprVioBus *bus);
90
91 static inline void spapr_vio_irq_pulse(SpaprVioDevice *dev)
92 {
93 SpaprMachineState *spapr = SPAPR_MACHINE(qdev_get_machine());
94
95 qemu_irq_pulse(spapr_qirq(spapr, dev->irq));
96 }
97
98 static inline bool spapr_vio_dma_valid(SpaprVioDevice *dev, uint64_t taddr,
99 uint32_t size, DMADirection dir)
100 {
101 return dma_memory_valid(&dev->as, taddr, size, dir);
102 }
103
104 static inline int spapr_vio_dma_read(SpaprVioDevice *dev, uint64_t taddr,
105 void *buf, uint32_t size)
106 {
107 return (dma_memory_read(&dev->as, taddr, buf, size) != 0) ?
108 H_DEST_PARM : H_SUCCESS;
109 }
110
111 static inline int spapr_vio_dma_write(SpaprVioDevice *dev, uint64_t taddr,
112 const void *buf, uint32_t size)
113 {
114 return (dma_memory_write(&dev->as, taddr, buf, size) != 0) ?
115 H_DEST_PARM : H_SUCCESS;
116 }
117
118 static inline int spapr_vio_dma_set(SpaprVioDevice *dev, uint64_t taddr,
119 uint8_t c, uint32_t size)
120 {
121 return (dma_memory_set(&dev->as, taddr, c, size) != 0) ?
122 H_DEST_PARM : H_SUCCESS;
123 }
124
125 #define vio_stb(_dev, _addr, _val) (stb_dma(&(_dev)->as, (_addr), (_val)))
126 #define vio_sth(_dev, _addr, _val) (stw_be_dma(&(_dev)->as, (_addr), (_val)))
127 #define vio_stl(_dev, _addr, _val) (stl_be_dma(&(_dev)->as, (_addr), (_val)))
128 #define vio_stq(_dev, _addr, _val) (stq_be_dma(&(_dev)->as, (_addr), (_val)))
129 #define vio_ldq(_dev, _addr) (ldq_be_dma(&(_dev)->as, (_addr)))
130
131 int spapr_vio_send_crq(SpaprVioDevice *dev, uint8_t *crq);
132
133 SpaprVioDevice *vty_lookup(SpaprMachineState *spapr, target_ulong reg);
134 void vty_putchars(SpaprVioDevice *sdev, uint8_t *buf, int len);
135 void spapr_vty_create(SpaprVioBus *bus, Chardev *chardev);
136 void spapr_vlan_create(SpaprVioBus *bus, NICInfo *nd);
137 void spapr_vscsi_create(SpaprVioBus *bus);
138
139 SpaprVioDevice *spapr_vty_get_default(SpaprVioBus *bus);
140
141 extern const VMStateDescription vmstate_spapr_vio;
142
143 #define VMSTATE_SPAPR_VIO(_f, _s) \
144 VMSTATE_STRUCT(_f, _s, 0, vmstate_spapr_vio, SpaprVioDevice)
145
146 void spapr_vio_set_bypass(SpaprVioDevice *dev, bool bypass);
147
148 #endif /* HW_SPAPR_VIO_H */