include/lcd.h

   1 /*
   2  * MPC823 and PXA LCD Controller
   3  *
   4  * Modeled after video interface by Paolo Scaffardi
   5  *
   6  *
   7  * (C) Copyright 2001
   8  * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
   9  *
  10  * See file CREDITS for list of people who contributed to this
  11  * project.
  12  *
  13  * This program is free software; you can redistribute it and/or
  14  * modify it under the terms of the GNU General Public License as
  15  * published by the Free Software Foundation; either version 2 of
  16  * the License, or (at your option) any later version.
  17  *
  18  * This program is distributed in the hope that it will be useful,
  19  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  20  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  21  * GNU General Public License for more details.
  22  *
  23  * You should have received a copy of the GNU General Public License
  24  * along with this program; if not, write to the Free Software
  25  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  26  * MA 02111-1307 USA
  27  */
  28
  29 #ifndef _LCD_H_
  30 #define _LCD_H_
  31
  32 extern char lcd_is_enabled;
  33
  34 extern int lcd_line_length;
  35
  36 extern struct vidinfo panel_info;
  37
  38 void lcd_ctrl_init(void *lcdbase);
  39 void lcd_enable(void);
  40 int board_splash_screen_prepare(void);
  41
  42 /* setcolreg used in 8bpp/16bpp; initcolregs used in monochrome */
  43 void lcd_setcolreg(ushort regno, ushort red, ushort green, ushort blue);
  44 void lcd_initcolregs(void);
  45
  46 int lcd_getfgcolor(void);
  47
  48 /* gunzip_bmp used if CONFIG_VIDEO_BMP_GZIP */
  49 struct bmp_image *gunzip_bmp(unsigned long addr, unsigned long *lenp,
  50                              void **alloc_addr);
  51 int bmp_display(ulong addr, int x, int y);
  52
  53 /**
  54  * Set whether we need to flush the dcache when changing the LCD image. This
  55  * defaults to off.
  56  *
  57  * @param flush         non-zero to flush cache after update, 0 to skip
  58  */
  59 void lcd_set_flush_dcache(int flush);
  60
  61 #if defined CONFIG_MPC823
  62 /*
  63  * LCD controller stucture for MPC823 CPU
  64  */
  65 typedef struct vidinfo {
  66         ushort  vl_col;         /* Number of columns (i.e. 640) */
  67         ushort  vl_row;         /* Number of rows (i.e. 480) */
  68         ushort  vl_width;       /* Width of display area in millimeters */
  69         ushort  vl_height;      /* Height of display area in millimeters */
  70
  71         /* LCD configuration register */
  72         u_char  vl_clkp;        /* Clock polarity */
  73         u_char  vl_oep;         /* Output Enable polarity */
  74         u_char  vl_hsp;         /* Horizontal Sync polarity */
  75         u_char  vl_vsp;         /* Vertical Sync polarity */
  76         u_char  vl_dp;          /* Data polarity */
  77         u_char  vl_bpix;        /* Bits per pixel, 0 = 1, 1 = 2, 2 = 4, 3 = 8 */
  78         u_char  vl_lbw;         /* LCD Bus width, 0 = 4, 1 = 8 */
  79         u_char  vl_splt;        /* Split display, 0 = single-scan, 1 = dual-scan */
  80         u_char  vl_clor;        /* Color, 0 = mono, 1 = color */
  81         u_char  vl_tft;         /* 0 = passive, 1 = TFT */
  82
  83         /* Horizontal control register. Timing from data sheet */
  84         ushort  vl_wbl;         /* Wait between lines */
  85
  86         /* Vertical control register */
  87         u_char  vl_vpw;         /* Vertical sync pulse width */
  88         u_char  vl_lcdac;       /* LCD AC timing */
  89         u_char  vl_wbf;         /* Wait between frames */
  90 } vidinfo_t;
  91
  92 #elif defined(CONFIG_CPU_PXA25X) || defined(CONFIG_CPU_PXA27X) || \
  93         defined CONFIG_CPU_MONAHANS
  94 /*
  95  * PXA LCD DMA descriptor
  96  */
  97 struct pxafb_dma_descriptor {
  98         u_long  fdadr;          /* Frame descriptor address register */
  99         u_long  fsadr;          /* Frame source address register */
 100         u_long  fidr;           /* Frame ID register */
 101         u_long  ldcmd;          /* Command register */
 102 };
 103
 104 /*
 105  * PXA LCD info
 106  */
 107 struct pxafb_info {
 108
 109         /* Misc registers */
 110         u_long  reg_lccr3;
 111         u_long  reg_lccr2;
 112         u_long  reg_lccr1;
 113         u_long  reg_lccr0;
 114         u_long  fdadr0;
 115         u_long  fdadr1;
 116
 117         /* DMA descriptors */
 118         struct  pxafb_dma_descriptor *  dmadesc_fblow;
 119         struct  pxafb_dma_descriptor *  dmadesc_fbhigh;
 120         struct  pxafb_dma_descriptor *  dmadesc_palette;
 121
 122         u_long  screen;         /* physical address of frame buffer */
 123         u_long  palette;        /* physical address of palette memory */
 124         u_int   palette_size;
 125 };
 126
 127 /*
 128  * LCD controller stucture for PXA CPU
 129  */
 130 typedef struct vidinfo {
 131         ushort  vl_col;         /* Number of columns (i.e. 640) */
 132         ushort  vl_row;         /* Number of rows (i.e. 480) */
 133         ushort  vl_width;       /* Width of display area in millimeters */
 134         ushort  vl_height;      /* Height of display area in millimeters */
 135
 136         /* LCD configuration register */
 137         u_char  vl_clkp;        /* Clock polarity */
 138         u_char  vl_oep;         /* Output Enable polarity */
 139         u_char  vl_hsp;         /* Horizontal Sync polarity */
 140         u_char  vl_vsp;         /* Vertical Sync polarity */
 141         u_char  vl_dp;          /* Data polarity */
 142         u_char  vl_bpix;        /* Bits per pixel, 0 = 1, 1 = 2, 2 = 4, 3 = 8, 4 = 16 */
 143         u_char  vl_lbw;         /* LCD Bus width, 0 = 4, 1 = 8 */
 144         u_char  vl_splt;        /* Split display, 0 = single-scan, 1 = dual-scan */
 145         u_char  vl_clor;        /* Color, 0 = mono, 1 = color */
 146         u_char  vl_tft;         /* 0 = passive, 1 = TFT */
 147
 148         /* Horizontal control register. Timing from data sheet */
 149         ushort  vl_hpw;         /* Horz sync pulse width */
 150         u_char  vl_blw;         /* Wait before of line */
 151         u_char  vl_elw;         /* Wait end of line */
 152
 153         /* Vertical control register. */
 154         u_char  vl_vpw;         /* Vertical sync pulse width */
 155         u_char  vl_bfw;         /* Wait before of frame */
 156         u_char  vl_efw;         /* Wait end of frame */
 157
 158         /* PXA LCD controller params */
 159         struct  pxafb_info pxa;
 160 } vidinfo_t;
 161
 162 #elif defined(CONFIG_ATMEL_LCD) || defined(CONFIG_ATMEL_HLCD)
 163
 164 typedef struct vidinfo {
 165         ushort vl_col;          /* Number of columns (i.e. 640) */
 166         ushort vl_row;          /* Number of rows (i.e. 480) */
 167         u_long vl_clk;  /* pixel clock in ps    */
 168
 169         /* LCD configuration register */
 170         u_long vl_sync;         /* Horizontal / vertical sync */
 171         u_long vl_bpix;         /* Bits per pixel, 0 = 1, 1 = 2, 2 = 4, 3 = 8, 4 = 16 */
 172         u_long vl_tft;          /* 0 = passive, 1 = TFT */
 173         u_long vl_cont_pol_low; /* contrast polarity is low */
 174         u_long vl_clk_pol;      /* clock polarity */
 175
 176         /* Horizontal control register. */
 177         u_long vl_hsync_len;    /* Length of horizontal sync */
 178         u_long vl_left_margin;  /* Time from sync to picture */
 179         u_long vl_right_margin; /* Time from picture to sync */
 180
 181         /* Vertical control register. */
 182         u_long vl_vsync_len;    /* Length of vertical sync */
 183         u_long vl_upper_margin; /* Time from sync to picture */
 184         u_long vl_lower_margin; /* Time from picture to sync */
 185
 186         u_long  mmio;           /* Memory mapped registers */
 187 } vidinfo_t;
 188
 189 #elif defined(CONFIG_EXYNOS_FB)
 190
 191 enum {
 192         FIMD_RGB_INTERFACE = 1,
 193         FIMD_CPU_INTERFACE = 2,
 194 };
 195
 196 enum exynos_fb_rgb_mode_t {
 197         MODE_RGB_P = 0,
 198         MODE_BGR_P = 1,
 199         MODE_RGB_S = 2,
 200         MODE_BGR_S = 3,
 201 };
 202
 203 typedef struct vidinfo {
 204         ushort vl_col;          /* Number of columns (i.e. 640) */
 205         ushort vl_row;          /* Number of rows (i.e. 480) */
 206         ushort vl_width;        /* Width of display area in millimeters */
 207         ushort vl_height;       /* Height of display area in millimeters */
 208
 209         /* LCD configuration register */
 210         u_char vl_freq;         /* Frequency */
 211         u_char vl_clkp;         /* Clock polarity */
 212         u_char vl_oep;          /* Output Enable polarity */
 213         u_char vl_hsp;          /* Horizontal Sync polarity */
 214         u_char vl_vsp;          /* Vertical Sync polarity */
 215         u_char vl_dp;           /* Data polarity */
 216         u_char vl_bpix;         /* Bits per pixel */
 217
 218         /* Horizontal control register. Timing from data sheet */
 219         u_char vl_hspw;         /* Horz sync pulse width */
 220         u_char vl_hfpd;         /* Wait before of line */
 221         u_char vl_hbpd;         /* Wait end of line */
 222
 223         /* Vertical control register. */
 224         u_char  vl_vspw;        /* Vertical sync pulse width */
 225         u_char  vl_vfpd;        /* Wait before of frame */
 226         u_char  vl_vbpd;        /* Wait end of frame */
 227         u_char  vl_cmd_allow_len; /* Wait end of frame */
 228
 229         unsigned int win_id;
 230         unsigned int init_delay;
 231         unsigned int power_on_delay;
 232         unsigned int reset_delay;
 233         unsigned int interface_mode;
 234         unsigned int mipi_enabled;
 235         unsigned int dp_enabled;
 236         unsigned int cs_setup;
 237         unsigned int wr_setup;
 238         unsigned int wr_act;
 239         unsigned int wr_hold;
 240         unsigned int logo_on;
 241         unsigned int logo_width;
 242         unsigned int logo_height;
 243         unsigned long logo_addr;
 244         unsigned int rgb_mode;
 245         unsigned int resolution;
 246
 247         /* parent clock name(MPLL, EPLL or VPLL) */
 248         unsigned int pclk_name;
 249         /* ratio value for source clock from parent clock. */
 250         unsigned int sclk_div;
 251
 252         unsigned int dual_lcd_enabled;
 253 } vidinfo_t;
 254
 255 void init_panel_info(vidinfo_t *vid);
 256
 257 #else
 258
 259 typedef struct vidinfo {
 260         ushort  vl_col;         /* Number of columns (i.e. 160) */
 261         ushort  vl_row;         /* Number of rows (i.e. 100) */
 262
 263         u_char  vl_bpix;        /* Bits per pixel, 0 = 1 */
 264
 265         ushort  *cmap;          /* Pointer to the colormap */
 266
 267         void    *priv;          /* Pointer to driver-specific data */
 268 } vidinfo_t;
 269
 270 #endif /* CONFIG_MPC823, CONFIG_CPU_PXA25X, CONFIG_MCC200, CONFIG_ATMEL_LCD */
 271
 272 extern vidinfo_t panel_info;
 273
 274 /* Video functions */
 275
 276 #if defined(CONFIG_RBC823)
 277 void    lcd_disable(void);
 278 #endif
 279
 280 void    lcd_putc(const char c);
 281 void    lcd_puts(const char *s);
 282 void    lcd_printf(const char *fmt, ...);
 283 void    lcd_clear(void);
 284 int     lcd_display_bitmap(ulong bmp_image, int x, int y);
 285
 286 /**
 287  * Get the width of the LCD in pixels
 288  *
 289  * @return width of LCD in pixels
 290  */
 291 int lcd_get_pixel_width(void);
 292
 293 /**
 294  * Get the height of the LCD in pixels
 295  *
 296  * @return height of LCD in pixels
 297  */
 298 int lcd_get_pixel_height(void);
 299
 300 /**
 301  * Get the number of text lines/rows on the LCD
 302  *
 303  * @return number of rows
 304  */
 305 int lcd_get_screen_rows(void);
 306
 307 /**
 308  * Get the number of text columns on the LCD
 309  *
 310  * @return number of columns
 311  */
 312 int lcd_get_screen_columns(void);
 313
 314 /**
 315  * Set the position of the text cursor
 316  *
 317  * @param col   Column to place cursor (0 = left side)
 318  * @param row   Row to place cursor (0 = top line)
 319  */
 320 void lcd_position_cursor(unsigned col, unsigned row);
 321
 322 /* Allow boards to customize the information displayed */
 323 void lcd_show_board_info(void);
 324
 325 /* Return the size of the LCD frame buffer, and the line length */
 326 int lcd_get_size(int *line_length);
 327
 328 int lcd_dt_simplefb_add_node(void *blob);
 329 int lcd_dt_simplefb_enable_existing_node(void *blob);
 330
 331 /************************************************************************/
 332 /* ** BITMAP DISPLAY SUPPORT                                            */
 333 /************************************************************************/
 334 #if defined(CONFIG_CMD_BMP) || defined(CONFIG_SPLASH_SCREEN)
 335 # include <bmp_layout.h>
 336 # include <asm/byteorder.h>
 337 #endif
 338
 339 /*
 340  *  Information about displays we are using. This is for configuring
 341  *  the LCD controller and memory allocation. Someone has to know what
 342  *  is connected, as we can't autodetect anything.
 343  */
 344 #define CONFIG_SYS_HIGH 0       /* Pins are active high                 */
 345 #define CONFIG_SYS_LOW  1       /* Pins are active low                  */
 346
 347 #define LCD_MONOCHROME  0
 348 #define LCD_COLOR2      1
 349 #define LCD_COLOR4      2
 350 #define LCD_COLOR8      3
 351 #define LCD_COLOR16     4
 352
 353 /*----------------------------------------------------------------------*/
 354 #if defined(CONFIG_LCD_INFO_BELOW_LOGO)
 355 # define LCD_INFO_X             0
 356 # define LCD_INFO_Y             (BMP_LOGO_HEIGHT + VIDEO_FONT_HEIGHT)
 357 #elif defined(CONFIG_LCD_LOGO)
 358 # define LCD_INFO_X             (BMP_LOGO_WIDTH + 4 * VIDEO_FONT_WIDTH)
 359 # define LCD_INFO_Y             VIDEO_FONT_HEIGHT
 360 #else
 361 # define LCD_INFO_X             VIDEO_FONT_WIDTH
 362 # define LCD_INFO_Y             VIDEO_FONT_HEIGHT
 363 #endif
 364
 365 /* Default to 8bpp if bit depth not specified */
 366 #ifndef LCD_BPP
 367 # define LCD_BPP                        LCD_COLOR8
 368 #endif
 369 #ifndef LCD_DF
 370 # define LCD_DF                 1
 371 #endif
 372
 373 /* Calculate nr. of bits per pixel  and nr. of colors */
 374 #define NBITS(bit_code)         (1 << (bit_code))
 375 #define NCOLORS(bit_code)       (1 << NBITS(bit_code))
 376
 377 /************************************************************************/
 378 /* ** CONSOLE CONSTANTS                                                 */
 379 /************************************************************************/
 380 #if LCD_BPP == LCD_MONOCHROME
 381
 382 /*
 383  * Simple black/white definitions
 384  */
 385 # define CONSOLE_COLOR_BLACK    0
 386 # define CONSOLE_COLOR_WHITE    1       /* Must remain last / highest   */
 387
 388 #elif LCD_BPP == LCD_COLOR8
 389
 390 /*
 391  * 8bpp color definitions
 392  */
 393 # define CONSOLE_COLOR_BLACK    0
 394 # define CONSOLE_COLOR_RED      1
 395 # define CONSOLE_COLOR_GREEN    2
 396 # define CONSOLE_COLOR_YELLOW   3
 397 # define CONSOLE_COLOR_BLUE     4
 398 # define CONSOLE_COLOR_MAGENTA  5
 399 # define CONSOLE_COLOR_CYAN     6
 400 # define CONSOLE_COLOR_GREY     14
 401 # define CONSOLE_COLOR_WHITE    15      /* Must remain last / highest   */
 402
 403 #else
 404
 405 /*
 406  * 16bpp color definitions
 407  */
 408 # define CONSOLE_COLOR_BLACK    0x0000
 409 # define CONSOLE_COLOR_WHITE    0xffff  /* Must remain last / highest   */
 410
 411 #endif /* color definitions */
 412
 413 /************************************************************************/
 414 #ifndef PAGE_SIZE
 415 # define PAGE_SIZE      4096
 416 #endif
 417
 418 /************************************************************************/
 419
 420 #endif  /* _LCD_H_ */