include/opcode/bfin.h

   1 /* bfin.h -- Header file for ADI Blackfin opcode table
   2    Copyright 2005, 2010, 2011 Free Software Foundation, Inc.
   3
   4    This file is part of GDB, GAS, and the GNU binutils.
   5
   6    GDB, GAS, and the GNU binutils are free software; you can redistribute
   7    them and/or modify them under the terms of the GNU General Public
   8    License as published by the Free Software Foundation; either version 3,
   9    or (at your option) any later version.
  10
  11    GDB, GAS, and the GNU binutils are distributed in the hope that they
  12    will be useful, but WITHOUT ANY WARRANTY; without even the implied
  13    warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See
  14    the GNU General Public License for more details.
  15
  16    You should have received a copy of the GNU General Public License
  17    along with this file; see the file COPYING3.  If not, write to the Free
  18    Software Foundation, 51 Franklin Street - Fifth Floor, Boston,
  19    MA 02110-1301, USA.  */
  20
  21 #ifndef OPCODE_BFIN_H
  22 #define OPCODE_BFIN_H
  23
  24 /* Common to all DSP32 instructions.  */
  25 #define BIT_MULTI_INS 0x0800
  26
  27 /* This just sets the multi instruction bit of a DSP32 instruction.  */
  28 #define SET_MULTI_INSTRUCTION_BIT(x) x->value |=  BIT_MULTI_INS;
  29
  30
  31 /* DSP instructions (32 bit) */
  32
  33 /*   dsp32mac
  34 +----+----+---+---|---+----+----+---|---+---+---+---|---+---+---+---+
  35 | 1  | 1  | 0 | 0 |.M.| 0  | 0  |.mmod..........|.MM|.P.|.w1|.op1...|
  36 |.h01|.h11|.w0|.op0...|.h00|.h10|.dst.......|.src0......|.src1......|
  37 +----+----+---+---|---+----+----+---|---+---+---+---|---+---+---+---+
  38 */
  39
  40 typedef struct
  41 {
  42   unsigned long opcode;
  43   int bits_src1;
  44   int mask_src1;
  45   int bits_src0;
  46   int mask_src0;
  47   int bits_dst;
  48   int mask_dst;
  49   int bits_h10;
  50   int mask_h10;
  51   int bits_h00;
  52   int mask_h00;
  53   int bits_op0;
  54   int mask_op0;
  55   int bits_w0;
  56   int mask_w0;
  57   int bits_h11;
  58   int mask_h11;
  59   int bits_h01;
  60   int mask_h01;
  61   int bits_op1;
  62   int mask_op1;
  63   int bits_w1;
  64   int mask_w1;
  65   int bits_P;
  66   int mask_P;
  67   int bits_MM;
  68   int mask_MM;
  69   int bits_mmod;
  70   int mask_mmod;
  71   int bits_code2;
  72   int mask_code2;
  73   int bits_M;
  74   int mask_M;
  75   int bits_code;
  76   int mask_code;
  77 } DSP32Mac;
  78
  79 #define DSP32Mac_opcode                 0xc0000000
  80 #define DSP32Mac_src1_bits              0
  81 #define DSP32Mac_src1_mask              0x7
  82 #define DSP32Mac_src0_bits              3
  83 #define DSP32Mac_src0_mask              0x7
  84 #define DSP32Mac_dst_bits               6
  85 #define DSP32Mac_dst_mask               0x7
  86 #define DSP32Mac_h10_bits               9
  87 #define DSP32Mac_h10_mask               0x1
  88 #define DSP32Mac_h00_bits               10
  89 #define DSP32Mac_h00_mask               0x1
  90 #define DSP32Mac_op0_bits               11
  91 #define DSP32Mac_op0_mask               0x3
  92 #define DSP32Mac_w0_bits                13
  93 #define DSP32Mac_w0_mask                0x1
  94 #define DSP32Mac_h11_bits               14
  95 #define DSP32Mac_h11_mask               0x1
  96 #define DSP32Mac_h01_bits               15
  97 #define DSP32Mac_h01_mask               0x1
  98 #define DSP32Mac_op1_bits               16
  99 #define DSP32Mac_op1_mask               0x3
 100 #define DSP32Mac_w1_bits                18
 101 #define DSP32Mac_w1_mask                0x1
 102 #define DSP32Mac_p_bits                 19
 103 #define DSP32Mac_p_mask                 0x1
 104 #define DSP32Mac_MM_bits                20
 105 #define DSP32Mac_MM_mask                0x1
 106 #define DSP32Mac_mmod_bits              21
 107 #define DSP32Mac_mmod_mask              0xf
 108 #define DSP32Mac_code2_bits             25
 109 #define DSP32Mac_code2_mask             0x3
 110 #define DSP32Mac_M_bits                 27
 111 #define DSP32Mac_M_mask                 0x1
 112 #define DSP32Mac_code_bits              28
 113 #define DSP32Mac_code_mask              0xf
 114
 115 #define init_DSP32Mac                           \
 116 {                                               \
 117   DSP32Mac_opcode,                              \
 118   DSP32Mac_src1_bits,   DSP32Mac_src1_mask,     \
 119   DSP32Mac_src0_bits,   DSP32Mac_src0_mask,     \
 120   DSP32Mac_dst_bits,    DSP32Mac_dst_mask,      \
 121   DSP32Mac_h10_bits,    DSP32Mac_h10_mask,      \
 122   DSP32Mac_h00_bits,    DSP32Mac_h00_mask,      \
 123   DSP32Mac_op0_bits,    DSP32Mac_op0_mask,      \
 124   DSP32Mac_w0_bits,     DSP32Mac_w0_mask,       \
 125   DSP32Mac_h11_bits,    DSP32Mac_h11_mask,      \
 126   DSP32Mac_h01_bits,    DSP32Mac_h01_mask,      \
 127   DSP32Mac_op1_bits,    DSP32Mac_op1_mask,      \
 128   DSP32Mac_w1_bits,     DSP32Mac_w1_mask,       \
 129   DSP32Mac_p_bits,      DSP32Mac_p_mask,        \
 130   DSP32Mac_MM_bits,     DSP32Mac_MM_mask,       \
 131   DSP32Mac_mmod_bits,   DSP32Mac_mmod_mask,     \
 132   DSP32Mac_code2_bits,  DSP32Mac_code2_mask,    \
 133   DSP32Mac_M_bits,      DSP32Mac_M_mask,        \
 134   DSP32Mac_code_bits,   DSP32Mac_code_mask      \
 135 };
 136
 137 /*  dsp32mult
 138 +----+----+---+---|---+----+----+---|---+---+---+---|---+---+---+---+
 139 | 1  | 1  | 0 | 0 |.M.| 0  | 1  |.mmod..........|.MM|.P.|.w1|.op1...|
 140 |.h01|.h11|.w0|.op0...|.h00|.h10|.dst.......|.src0......|.src1......|
 141 +----+----+---+---|---+----+----+---|---+---+---+---|---+---+---+---+
 142 */
 143
 144 typedef DSP32Mac DSP32Mult;
 145 #define DSP32Mult_opcode        0xc2000000
 146
 147 #define init_DSP32Mult                          \
 148 {                                               \
 149   DSP32Mult_opcode,                             \
 150   DSP32Mac_src1_bits,   DSP32Mac_src1_mask,     \
 151   DSP32Mac_src0_bits,   DSP32Mac_src0_mask,     \
 152   DSP32Mac_dst_bits,    DSP32Mac_dst_mask,      \
 153   DSP32Mac_h10_bits,    DSP32Mac_h10_mask,      \
 154   DSP32Mac_h00_bits,    DSP32Mac_h00_mask,      \
 155   DSP32Mac_op0_bits,    DSP32Mac_op0_mask,      \
 156   DSP32Mac_w0_bits,     DSP32Mac_w0_mask,       \
 157   DSP32Mac_h11_bits,    DSP32Mac_h11_mask,      \
 158   DSP32Mac_h01_bits,    DSP32Mac_h01_mask,      \
 159   DSP32Mac_op1_bits,    DSP32Mac_op1_mask,      \
 160   DSP32Mac_w1_bits,     DSP32Mac_w1_mask,       \
 161   DSP32Mac_p_bits,      DSP32Mac_p_mask,        \
 162   DSP32Mac_MM_bits,     DSP32Mac_MM_mask,       \
 163   DSP32Mac_mmod_bits,   DSP32Mac_mmod_mask,     \
 164   DSP32Mac_code2_bits,  DSP32Mac_code2_mask,    \
 165   DSP32Mac_M_bits,      DSP32Mac_M_mask,        \
 166   DSP32Mac_code_bits,   DSP32Mac_code_mask      \
 167 };
 168
 169 /*  dsp32alu
 170 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
 171 | 1 | 1 | 0 | 0 |.M.| 1 | 0 | - | - | - |.HL|.aopcde............|
 172 |.aop...|.s.|.x.|.dst0......|.dst1......|.src0......|.src1......|
 173 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
 174 */
 175
 176 typedef struct
 177 {
 178   unsigned long opcode;
 179   int bits_src1;
 180   int mask_src1;
 181   int bits_src0;
 182   int mask_src0;
 183   int bits_dst1;
 184   int mask_dst1;
 185   int bits_dst0;
 186   int mask_dst0;
 187   int bits_x;
 188   int mask_x;
 189   int bits_s;
 190   int mask_s;
 191   int bits_aop;
 192   int mask_aop;
 193   int bits_aopcde;
 194   int mask_aopcde;
 195   int bits_HL;
 196   int mask_HL;
 197   int bits_dontcare;
 198   int mask_dontcare;
 199   int bits_code2;
 200   int mask_code2;
 201   int bits_M;
 202   int mask_M;
 203   int bits_code;
 204   int mask_code;
 205 } DSP32Alu;
 206
 207 #define DSP32Alu_opcode         0xc4000000
 208 #define DSP32Alu_src1_bits      0
 209 #define DSP32Alu_src1_mask      0x7
 210 #define DSP32Alu_src0_bits      3
 211 #define DSP32Alu_src0_mask      0x7
 212 #define DSP32Alu_dst1_bits      6
 213 #define DSP32Alu_dst1_mask      0x7
 214 #define DSP32Alu_dst0_bits      9
 215 #define DSP32Alu_dst0_mask      0x7
 216 #define DSP32Alu_x_bits         12
 217 #define DSP32Alu_x_mask         0x1
 218 #define DSP32Alu_s_bits         13
 219 #define DSP32Alu_s_mask         0x1
 220 #define DSP32Alu_aop_bits       14
 221 #define DSP32Alu_aop_mask       0x3
 222 #define DSP32Alu_aopcde_bits    16
 223 #define DSP32Alu_aopcde_mask    0x1f
 224 #define DSP32Alu_HL_bits        21
 225 #define DSP32Alu_HL_mask        0x1
 226 #define DSP32Alu_dontcare_bits  22
 227 #define DSP32Alu_dontcare_mask  0x7
 228 #define DSP32Alu_code2_bits     25
 229 #define DSP32Alu_code2_mask     0x3
 230 #define DSP32Alu_M_bits         27
 231 #define DSP32Alu_M_mask         0x1
 232 #define DSP32Alu_code_bits      28
 233 #define DSP32Alu_code_mask      0xf
 234
 235 #define init_DSP32Alu                                   \
 236 {                                                       \
 237   DSP32Alu_opcode,                                      \
 238   DSP32Alu_src1_bits,           DSP32Alu_src1_mask,     \
 239   DSP32Alu_src0_bits,           DSP32Alu_src0_mask,     \
 240   DSP32Alu_dst1_bits,           DSP32Alu_dst1_mask,     \
 241   DSP32Alu_dst0_bits,           DSP32Alu_dst0_mask,     \
 242   DSP32Alu_x_bits,              DSP32Alu_x_mask,        \
 243   DSP32Alu_s_bits,              DSP32Alu_s_mask,        \
 244   DSP32Alu_aop_bits,            DSP32Alu_aop_mask,      \
 245   DSP32Alu_aopcde_bits,         DSP32Alu_aopcde_mask,   \
 246   DSP32Alu_HL_bits,             DSP32Alu_HL_mask,       \
 247   DSP32Alu_dontcare_bits,       DSP32Alu_dontcare_mask, \
 248   DSP32Alu_code2_bits,          DSP32Alu_code2_mask,    \
 249   DSP32Alu_M_bits,              DSP32Alu_M_mask,        \
 250   DSP32Alu_code_bits,           DSP32Alu_code_mask      \
 251 };
 252
 253 /*  dsp32shift
 254 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
 255 | 1 | 1 | 0 | 0 |.M.| 1 | 1 | 0 | 0 | - | - |.sopcde............|
 256 |.sop...|.HLs...|.dst0......| - | - | - |.src0......|.src1......|
 257 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
 258 */
 259
 260 typedef struct
 261 {
 262   unsigned long opcode;
 263   int bits_src1;
 264   int mask_src1;
 265   int bits_src0;
 266   int mask_src0;
 267   int bits_dst1;
 268   int mask_dst1;
 269   int bits_dst0;
 270   int mask_dst0;
 271   int bits_HLs;
 272   int mask_HLs;
 273   int bits_sop;
 274   int mask_sop;
 275   int bits_sopcde;
 276   int mask_sopcde;
 277   int bits_dontcare;
 278   int mask_dontcare;
 279   int bits_code2;
 280   int mask_code2;
 281   int bits_M;
 282   int mask_M;
 283   int bits_code;
 284   int mask_code;
 285 } DSP32Shift;
 286
 287 #define DSP32Shift_opcode               0xc6000000
 288 #define DSP32Shift_src1_bits            0
 289 #define DSP32Shift_src1_mask            0x7
 290 #define DSP32Shift_src0_bits            3
 291 #define DSP32Shift_src0_mask            0x7
 292 #define DSP32Shift_dst1_bits            6
 293 #define DSP32Shift_dst1_mask            0x7
 294 #define DSP32Shift_dst0_bits            9
 295 #define DSP32Shift_dst0_mask            0x7
 296 #define DSP32Shift_HLs_bits             12
 297 #define DSP32Shift_HLs_mask             0x3
 298 #define DSP32Shift_sop_bits             14
 299 #define DSP32Shift_sop_mask             0x3
 300 #define DSP32Shift_sopcde_bits          16
 301 #define DSP32Shift_sopcde_mask          0x1f
 302 #define DSP32Shift_dontcare_bits        21
 303 #define DSP32Shift_dontcare_mask        0x3
 304 #define DSP32Shift_code2_bits           23
 305 #define DSP32Shift_code2_mask           0xf
 306 #define DSP32Shift_M_bits               27
 307 #define DSP32Shift_M_mask               0x1
 308 #define DSP32Shift_code_bits            28
 309 #define DSP32Shift_code_mask            0xf
 310
 311 #define init_DSP32Shift                                         \
 312 {                                                               \
 313   DSP32Shift_opcode,                                            \
 314   DSP32Shift_src1_bits,         DSP32Shift_src1_mask,           \
 315   DSP32Shift_src0_bits,         DSP32Shift_src0_mask,           \
 316   DSP32Shift_dst1_bits,         DSP32Shift_dst1_mask,           \
 317   DSP32Shift_dst0_bits,         DSP32Shift_dst0_mask,           \
 318   DSP32Shift_HLs_bits,          DSP32Shift_HLs_mask,            \
 319   DSP32Shift_sop_bits,          DSP32Shift_sop_mask,            \
 320   DSP32Shift_sopcde_bits,       DSP32Shift_sopcde_mask,         \
 321   DSP32Shift_dontcare_bits,     DSP32Shift_dontcare_mask,       \
 322   DSP32Shift_code2_bits,        DSP32Shift_code2_mask,          \
 323   DSP32Shift_M_bits,            DSP32Shift_M_mask,              \
 324   DSP32Shift_code_bits,         DSP32Shift_code_mask            \
 325 };
 326
 327 /*  dsp32shiftimm
 328 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
 329 | 1 | 1 | 0 | 0 |.M.| 1 | 1 | 0 | 1 | - | - |.sopcde............|
 330 |.sop...|.HLs...|.dst0......|.immag.................|.src1......|
 331 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
 332 */
 333
 334 typedef struct
 335 {
 336   unsigned long opcode;
 337   int bits_src1;
 338   int mask_src1;
 339   int bits_immag;
 340   int mask_immag;
 341   int bits_dst0;
 342   int mask_dst0;
 343   int bits_HLs;
 344   int mask_HLs;
 345   int bits_sop;
 346   int mask_sop;
 347   int bits_sopcde;
 348   int mask_sopcde;
 349   int bits_dontcare;
 350   int mask_dontcare;
 351   int bits_code2;
 352   int mask_code2;
 353   int bits_M;
 354   int mask_M;
 355   int bits_code;
 356   int mask_code;
 357 } DSP32ShiftImm;
 358
 359 #define DSP32ShiftImm_opcode            0xc6800000
 360 #define DSP32ShiftImm_src1_bits         0
 361 #define DSP32ShiftImm_src1_mask         0x7
 362 #define DSP32ShiftImm_immag_bits        3
 363 #define DSP32ShiftImm_immag_mask        0x3f
 364 #define DSP32ShiftImm_dst0_bits         9
 365 #define DSP32ShiftImm_dst0_mask         0x7
 366 #define DSP32ShiftImm_HLs_bits          12
 367 #define DSP32ShiftImm_HLs_mask          0x3
 368 #define DSP32ShiftImm_sop_bits          14
 369 #define DSP32ShiftImm_sop_mask          0x3
 370 #define DSP32ShiftImm_sopcde_bits       16
 371 #define DSP32ShiftImm_sopcde_mask       0x1f
 372 #define DSP32ShiftImm_dontcare_bits     21
 373 #define DSP32ShiftImm_dontcare_mask     0x3
 374 #define DSP32ShiftImm_code2_bits        23
 375 #define DSP32ShiftImm_code2_mask        0xf
 376 #define DSP32ShiftImm_M_bits            27
 377 #define DSP32ShiftImm_M_mask            0x1
 378 #define DSP32ShiftImm_code_bits         28
 379 #define DSP32ShiftImm_code_mask         0xf
 380
 381 #define init_DSP32ShiftImm                                      \
 382 {                                                               \
 383   DSP32ShiftImm_opcode,                                         \
 384   DSP32ShiftImm_src1_bits,      DSP32ShiftImm_src1_mask,        \
 385   DSP32ShiftImm_immag_bits,     DSP32ShiftImm_immag_mask,       \
 386   DSP32ShiftImm_dst0_bits,      DSP32ShiftImm_dst0_mask,        \
 387   DSP32ShiftImm_HLs_bits,       DSP32ShiftImm_HLs_mask,         \
 388   DSP32ShiftImm_sop_bits,       DSP32ShiftImm_sop_mask,         \
 389   DSP32ShiftImm_sopcde_bits,    DSP32ShiftImm_sopcde_mask,      \
 390   DSP32ShiftImm_dontcare_bits,  DSP32ShiftImm_dontcare_mask,    \
 391   DSP32ShiftImm_code2_bits,     DSP32ShiftImm_code2_mask,       \
 392   DSP32ShiftImm_M_bits,         DSP32ShiftImm_M_mask,           \
 393   DSP32ShiftImm_code_bits,      DSP32ShiftImm_code_mask         \
 394 };
 395
 396 /* LOAD / STORE  */
 397
 398 /*  LDSTidxI
 399 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
 400 | 1 | 1 | 1 | 0 | 0 | 1 |.W.|.Z.|.sz....|.ptr.......|.reg.......|
 401 |.offset........................................................|
 402 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
 403 */
 404
 405 typedef struct
 406 {
 407   unsigned long opcode;
 408   int bits_offset;
 409   int mask_offset;
 410   int bits_reg;
 411   int mask_reg;
 412   int bits_ptr;
 413   int mask_ptr;
 414   int bits_sz;
 415   int mask_sz;
 416   int bits_Z;
 417   int mask_Z;
 418   int bits_W;
 419   int mask_W;
 420   int bits_code;
 421   int mask_code;
 422 } LDSTidxI;
 423
 424 #define LDSTidxI_opcode         0xe4000000
 425 #define LDSTidxI_offset_bits    0
 426 #define LDSTidxI_offset_mask    0xffff
 427 #define LDSTidxI_reg_bits       16
 428 #define LDSTidxI_reg_mask       0x7
 429 #define LDSTidxI_ptr_bits       19
 430 #define LDSTidxI_ptr_mask       0x7
 431 #define LDSTidxI_sz_bits        22
 432 #define LDSTidxI_sz_mask        0x3
 433 #define LDSTidxI_Z_bits         24
 434 #define LDSTidxI_Z_mask         0x1
 435 #define LDSTidxI_W_bits         25
 436 #define LDSTidxI_W_mask         0x1
 437 #define LDSTidxI_code_bits      26
 438 #define LDSTidxI_code_mask      0x3f
 439
 440 #define init_LDSTidxI                           \
 441 {                                               \
 442   LDSTidxI_opcode,                              \
 443   LDSTidxI_offset_bits, LDSTidxI_offset_mask,   \
 444   LDSTidxI_reg_bits, LDSTidxI_reg_mask,         \
 445   LDSTidxI_ptr_bits, LDSTidxI_ptr_mask,         \
 446   LDSTidxI_sz_bits, LDSTidxI_sz_mask,           \
 447   LDSTidxI_Z_bits, LDSTidxI_Z_mask,             \
 448   LDSTidxI_W_bits, LDSTidxI_W_mask,             \
 449   LDSTidxI_code_bits, LDSTidxI_code_mask        \
 450 };
 451
 452
 453 /*  LDST
 454 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
 455 | 1 | 0 | 0 | 1 |.sz....|.W.|.aop...|.Z.|.ptr.......|.reg.......|
 456 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
 457 */
 458
 459 typedef struct
 460 {
 461   unsigned short opcode;
 462   int bits_reg;
 463   int mask_reg;
 464   int bits_ptr;
 465   int mask_ptr;
 466   int bits_Z;
 467   int mask_Z;
 468   int bits_aop;
 469   int mask_aop;
 470   int bits_W;
 471   int mask_W;
 472   int bits_sz;
 473   int mask_sz;
 474   int bits_code;
 475   int mask_code;
 476 } LDST;
 477
 478 #define LDST_opcode             0x9000
 479 #define LDST_reg_bits           0
 480 #define LDST_reg_mask           0x7
 481 #define LDST_ptr_bits           3
 482 #define LDST_ptr_mask           0x7
 483 #define LDST_Z_bits             6
 484 #define LDST_Z_mask             0x1
 485 #define LDST_aop_bits           7
 486 #define LDST_aop_mask           0x3
 487 #define LDST_W_bits             9
 488 #define LDST_W_mask             0x1
 489 #define LDST_sz_bits            10
 490 #define LDST_sz_mask            0x3
 491 #define LDST_code_bits          12
 492 #define LDST_code_mask          0xf
 493
 494 #define init_LDST                       \
 495 {                                       \
 496   LDST_opcode,                          \
 497   LDST_reg_bits,        LDST_reg_mask,  \
 498   LDST_ptr_bits,        LDST_ptr_mask,  \
 499   LDST_Z_bits,          LDST_Z_mask,    \
 500   LDST_aop_bits,        LDST_aop_mask,  \
 501   LDST_W_bits,          LDST_W_mask,    \
 502   LDST_sz_bits,         LDST_sz_mask,   \
 503   LDST_code_bits,       LDST_code_mask  \
 504 };
 505
 506 /*  LDSTii
 507 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
 508 | 1 | 0 | 1 |.W.|.op....|.offset........|.ptr.......|.reg.......|
 509 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
 510 */
 511
 512 typedef struct
 513 {
 514   unsigned short opcode;
 515   int bits_reg;
 516   int mask_reg;
 517   int bits_ptr;
 518   int mask_ptr;
 519   int bits_offset;
 520   int mask_offset;
 521   int bits_op;
 522   int mask_op;
 523   int bits_W;
 524   int mask_W;
 525   int bits_code;
 526   int mask_code;
 527 } LDSTii;
 528
 529 #define LDSTii_opcode           0xa000
 530 #define LDSTii_reg_bit          0
 531 #define LDSTii_reg_mask         0x7
 532 #define LDSTii_ptr_bit          3
 533 #define LDSTii_ptr_mask         0x7
 534 #define LDSTii_offset_bit       6
 535 #define LDSTii_offset_mask      0xf
 536 #define LDSTii_op_bit           10
 537 #define LDSTii_op_mask          0x3
 538 #define LDSTii_W_bit            12
 539 #define LDSTii_W_mask           0x1
 540 #define LDSTii_code_bit         13
 541 #define LDSTii_code_mask        0x7
 542
 543 #define init_LDSTii                             \
 544 {                                               \
 545   LDSTii_opcode,                                \
 546   LDSTii_reg_bit,       LDSTii_reg_mask,        \
 547   LDSTii_ptr_bit,       LDSTii_ptr_mask,        \
 548   LDSTii_offset_bit,    LDSTii_offset_mask,     \
 549   LDSTii_op_bit,        LDSTii_op_mask,         \
 550   LDSTii_W_bit,         LDSTii_W_mask,          \
 551   LDSTii_code_bit,      LDSTii_code_mask        \
 552 };
 553
 554
 555 /*  LDSTiiFP
 556 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
 557 | 1 | 0 | 1 | 1 | 1 | 0 |.W.|.offset............|.reg...........|
 558 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
 559 */
 560
 561 typedef struct
 562 {
 563   unsigned short opcode;
 564   int bits_reg;
 565   int mask_reg;
 566   int bits_offset;
 567   int mask_offset;
 568   int bits_W;
 569   int mask_W;
 570   int bits_code;
 571   int mask_code;
 572 } LDSTiiFP;
 573
 574 #define LDSTiiFP_opcode         0xb800
 575 #define LDSTiiFP_reg_bits       0
 576 #define LDSTiiFP_reg_mask       0xf
 577 #define LDSTiiFP_offset_bits    4
 578 #define LDSTiiFP_offset_mask    0x1f
 579 #define LDSTiiFP_W_bits         9
 580 #define LDSTiiFP_W_mask         0x1
 581 #define LDSTiiFP_code_bits      10
 582 #define LDSTiiFP_code_mask      0x3f
 583
 584 #define init_LDSTiiFP                           \
 585 {                                               \
 586   LDSTiiFP_opcode,                              \
 587   LDSTiiFP_reg_bits,    LDSTiiFP_reg_mask,      \
 588   LDSTiiFP_offset_bits, LDSTiiFP_offset_mask,   \
 589   LDSTiiFP_W_bits,      LDSTiiFP_W_mask,        \
 590   LDSTiiFP_code_bits,   LDSTiiFP_code_mask      \
 591 };
 592
 593 /*  dspLDST
 594 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
 595 | 1 | 0 | 0 | 1 | 1 | 1 |.W.|.aop...|.m.....|.i.....|.reg.......|
 596 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
 597 */
 598
 599 typedef struct
 600 {
 601   unsigned short opcode;
 602   int bits_reg;
 603   int mask_reg;
 604   int bits_i;
 605   int mask_i;
 606   int bits_m;
 607   int mask_m;
 608   int bits_aop;
 609   int mask_aop;
 610   int bits_W;
 611   int mask_W;
 612   int bits_code;
 613   int mask_code;
 614 } DspLDST;
 615
 616 #define DspLDST_opcode          0x9c00
 617 #define DspLDST_reg_bits        0
 618 #define DspLDST_reg_mask        0x7
 619 #define DspLDST_i_bits          3
 620 #define DspLDST_i_mask          0x3
 621 #define DspLDST_m_bits          5
 622 #define DspLDST_m_mask          0x3
 623 #define DspLDST_aop_bits        7
 624 #define DspLDST_aop_mask        0x3
 625 #define DspLDST_W_bits          9
 626 #define DspLDST_W_mask          0x1
 627 #define DspLDST_code_bits       10
 628 #define DspLDST_code_mask       0x3f
 629
 630 #define init_DspLDST                            \
 631 {                                               \
 632   DspLDST_opcode,                               \
 633   DspLDST_reg_bits,     DspLDST_reg_mask,       \
 634   DspLDST_i_bits,       DspLDST_i_mask,         \
 635   DspLDST_m_bits,       DspLDST_m_mask,         \
 636   DspLDST_aop_bits,     DspLDST_aop_mask,       \
 637   DspLDST_W_bits,       DspLDST_W_mask,         \
 638   DspLDST_code_bits,    DspLDST_code_mask       \
 639 };
 640
 641
 642 /*  LDSTpmod
 643 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
 644 | 1 | 0 | 0 | 0 |.W.|.aop...|.reg.......|.idx.......|.ptr.......|
 645 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
 646 */
 647
 648 typedef struct
 649 {
 650   unsigned short opcode;
 651   int bits_ptr;
 652   int mask_ptr;
 653   int bits_idx;
 654   int mask_idx;
 655   int bits_reg;
 656   int mask_reg;
 657   int bits_aop;
 658   int mask_aop;
 659   int bits_W;
 660   int mask_W;
 661   int bits_code;
 662   int mask_code;
 663 } LDSTpmod;
 664
 665 #define LDSTpmod_opcode         0x8000
 666 #define LDSTpmod_ptr_bits       0
 667 #define LDSTpmod_ptr_mask       0x7
 668 #define LDSTpmod_idx_bits       3
 669 #define LDSTpmod_idx_mask       0x7
 670 #define LDSTpmod_reg_bits       6
 671 #define LDSTpmod_reg_mask       0x7
 672 #define LDSTpmod_aop_bits       9
 673 #define LDSTpmod_aop_mask       0x3
 674 #define LDSTpmod_W_bits         11
 675 #define LDSTpmod_W_mask         0x1
 676 #define LDSTpmod_code_bits      12
 677 #define LDSTpmod_code_mask      0xf
 678
 679 #define init_LDSTpmod                           \
 680 {                                               \
 681   LDSTpmod_opcode,                              \
 682   LDSTpmod_ptr_bits,    LDSTpmod_ptr_mask,      \
 683   LDSTpmod_idx_bits,    LDSTpmod_idx_mask,      \
 684   LDSTpmod_reg_bits,    LDSTpmod_reg_mask,      \
 685   LDSTpmod_aop_bits,    LDSTpmod_aop_mask,      \
 686   LDSTpmod_W_bits,      LDSTpmod_W_mask,        \
 687   LDSTpmod_code_bits,   LDSTpmod_code_mask      \
 688 };
 689
 690
 691 /*  LOGI2op
 692 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
 693 | 0 | 1 | 0 | 0 | 1 |.opc.......|.src...............|.dst.......|
 694 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
 695 */
 696
 697 typedef struct
 698 {
 699   unsigned short opcode;
 700   int bits_dst;
 701   int mask_dst;
 702   int bits_src;
 703   int mask_src;
 704   int bits_opc;
 705   int mask_opc;
 706   int bits_code;
 707   int mask_code;
 708 } LOGI2op;
 709
 710 #define LOGI2op_opcode          0x4800
 711 #define LOGI2op_dst_bits        0
 712 #define LOGI2op_dst_mask        0x7
 713 #define LOGI2op_src_bits        3
 714 #define LOGI2op_src_mask        0x1f
 715 #define LOGI2op_opc_bits        8
 716 #define LOGI2op_opc_mask        0x7
 717 #define LOGI2op_code_bits       11
 718 #define LOGI2op_code_mask       0x1f
 719
 720 #define init_LOGI2op                            \
 721 {                                               \
 722   LOGI2op_opcode,                               \
 723   LOGI2op_dst_bits,     LOGI2op_dst_mask,       \
 724   LOGI2op_src_bits,     LOGI2op_src_mask,       \
 725   LOGI2op_opc_bits,     LOGI2op_opc_mask,       \
 726   LOGI2op_code_bits,    LOGI2op_code_mask       \
 727 };
 728
 729
 730 /*  ALU2op
 731 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
 732 | 0 | 1 | 0 | 0 | 0 | 0 |.opc...........|.src.......|.dst.......|
 733 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
 734 */
 735
 736 typedef struct
 737 {
 738   unsigned short opcode;
 739   int bits_dst;
 740   int mask_dst;
 741   int bits_src;
 742   int mask_src;
 743   int bits_opc;
 744   int mask_opc;
 745   int bits_code;
 746   int mask_code;
 747 } ALU2op;
 748
 749 #define ALU2op_opcode           0x4000
 750 #define ALU2op_dst_bits         0
 751 #define ALU2op_dst_mask         0x7
 752 #define ALU2op_src_bits         3
 753 #define ALU2op_src_mask         0x7
 754 #define ALU2op_opc_bits         6
 755 #define ALU2op_opc_mask         0xf
 756 #define ALU2op_code_bits        10
 757 #define ALU2op_code_mask        0x3f
 758
 759 #define init_ALU2op                             \
 760 {                                               \
 761   ALU2op_opcode,                                \
 762   ALU2op_dst_bits,      ALU2op_dst_mask,        \
 763   ALU2op_src_bits,      ALU2op_src_mask,        \
 764   ALU2op_opc_bits,      ALU2op_opc_mask,        \
 765   ALU2op_code_bits,     ALU2op_code_mask        \
 766 };
 767
 768
 769 /*  BRCC
 770 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
 771 | 0 | 0 | 0 | 1 |.T.|.B.|.offset................................|
 772 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
 773 */
 774
 775 typedef struct
 776 {
 777   unsigned short opcode;
 778   int bits_offset;
 779   int mask_offset;
 780   int bits_B;
 781   int mask_B;
 782   int bits_T;
 783   int mask_T;
 784   int bits_code;
 785   int mask_code;
 786 } BRCC;
 787
 788 #define BRCC_opcode             0x1000
 789 #define BRCC_offset_bits        0
 790 #define BRCC_offset_mask        0x3ff
 791 #define BRCC_B_bits             10
 792 #define BRCC_B_mask             0x1
 793 #define BRCC_T_bits             11
 794 #define BRCC_T_mask             0x1
 795 #define BRCC_code_bits          12
 796 #define BRCC_code_mask          0xf
 797
 798 #define init_BRCC                               \
 799 {                                               \
 800   BRCC_opcode,                                  \
 801   BRCC_offset_bits,     BRCC_offset_mask,       \
 802   BRCC_B_bits,          BRCC_B_mask,            \
 803   BRCC_T_bits,          BRCC_T_mask,            \
 804   BRCC_code_bits,       BRCC_code_mask          \
 805 };
 806
 807
 808 /*  UJUMP
 809 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
 810 | 0 | 0 | 1 | 0 |.offset........................................|
 811 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
 812 */
 813
 814 typedef struct
 815 {
 816   unsigned short opcode;
 817   int bits_offset;
 818   int mask_offset;
 819   int bits_code;
 820   int mask_code;
 821 } UJump;
 822
 823 #define UJump_opcode            0x2000
 824 #define UJump_offset_bits       0
 825 #define UJump_offset_mask       0xfff
 826 #define UJump_code_bits         12
 827 #define UJump_code_mask         0xf
 828
 829 #define init_UJump                              \
 830 {                                               \
 831   UJump_opcode,                                 \
 832   UJump_offset_bits,    UJump_offset_mask,      \
 833   UJump_code_bits,      UJump_code_mask         \
 834 };
 835
 836
 837 /*  ProgCtrl
 838 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
 839 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |.prgfunc.......|.poprnd........|
 840 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
 841 */
 842
 843 typedef struct
 844 {
 845   unsigned short opcode;
 846   int bits_poprnd;
 847   int mask_poprnd;
 848   int bits_prgfunc;
 849   int mask_prgfunc;
 850   int bits_code;
 851   int mask_code;
 852 } ProgCtrl;
 853
 854 #define ProgCtrl_opcode         0x0000
 855 #define ProgCtrl_poprnd_bits    0
 856 #define ProgCtrl_poprnd_mask    0xf
 857 #define ProgCtrl_prgfunc_bits   4
 858 #define ProgCtrl_prgfunc_mask   0xf
 859 #define ProgCtrl_code_bits      8
 860 #define ProgCtrl_code_mask      0xff
 861
 862 #define init_ProgCtrl                                   \
 863 {                                                       \
 864   ProgCtrl_opcode,                                      \
 865   ProgCtrl_poprnd_bits,         ProgCtrl_poprnd_mask,   \
 866   ProgCtrl_prgfunc_bits,        ProgCtrl_prgfunc_mask,  \
 867   ProgCtrl_code_bits,           ProgCtrl_code_mask      \
 868 };
 869
 870 /*  CALLa
 871 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
 872 | 1 | 1 | 1 | 0 | 0 | 0 | 1 |.S.|.msw...........................|
 873 |.lsw...........................................................|
 874 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
 875 */
 876
 877
 878 typedef struct
 879 {
 880   unsigned long opcode;
 881   int bits_addr;
 882   int mask_addr;
 883   int bits_S;
 884   int mask_S;
 885   int bits_code;
 886   int mask_code;
 887 } CALLa;
 888
 889 #define CALLa_opcode    0xe2000000
 890 #define CALLa_addr_bits 0
 891 #define CALLa_addr_mask 0xffffff
 892 #define CALLa_S_bits    24
 893 #define CALLa_S_mask    0x1
 894 #define CALLa_code_bits 25
 895 #define CALLa_code_mask 0x7f
 896
 897 #define init_CALLa                              \
 898 {                                               \
 899   CALLa_opcode,                                 \
 900   CALLa_addr_bits,      CALLa_addr_mask,        \
 901   CALLa_S_bits,         CALLa_S_mask,           \
 902   CALLa_code_bits,      CALLa_code_mask         \
 903 };
 904
 905
 906 /*  pseudoDEBUG
 907 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
 908 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 0 |.fn....|.grp.......|.reg.......|
 909 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
 910 */
 911
 912 typedef struct
 913 {
 914   unsigned short opcode;
 915   int bits_reg;
 916   int mask_reg;
 917   int bits_grp;
 918   int mask_grp;
 919   int bits_fn;
 920   int mask_fn;
 921   int bits_code;
 922   int mask_code;
 923 } PseudoDbg;
 924
 925 #define PseudoDbg_opcode        0xf800
 926 #define PseudoDbg_reg_bits      0
 927 #define PseudoDbg_reg_mask      0x7
 928 #define PseudoDbg_grp_bits      3
 929 #define PseudoDbg_grp_mask      0x7
 930 #define PseudoDbg_fn_bits       6
 931 #define PseudoDbg_fn_mask       0x3
 932 #define PseudoDbg_code_bits     8
 933 #define PseudoDbg_code_mask     0xff
 934
 935 #define init_PseudoDbg                          \
 936 {                                               \
 937   PseudoDbg_opcode,                             \
 938   PseudoDbg_reg_bits,   PseudoDbg_reg_mask,     \
 939   PseudoDbg_grp_bits,   PseudoDbg_grp_mask,     \
 940   PseudoDbg_fn_bits,    PseudoDbg_fn_mask,      \
 941   PseudoDbg_code_bits,  PseudoDbg_code_mask     \
 942 };
 943
 944 /*  PseudoDbg_assert
 945 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
 946 | 1 | 1 | 1 | 1 | 0 | - | - | - | dbgop |.grp.......|.regtest...|
 947 |.expected......................................................|
 948 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
 949 */
 950
 951 typedef struct
 952 {
 953   unsigned long opcode;
 954   int bits_expected;
 955   int mask_expected;
 956   int bits_regtest;
 957   int mask_regtest;
 958   int bits_grp;
 959   int mask_grp;
 960   int bits_dbgop;
 961   int mask_dbgop;
 962   int bits_dontcare;
 963   int mask_dontcare;
 964   int bits_code;
 965   int mask_code;
 966 } PseudoDbg_Assert;
 967
 968 #define PseudoDbg_Assert_opcode         0xf0000000
 969 #define PseudoDbg_Assert_expected_bits  0
 970 #define PseudoDbg_Assert_expected_mask  0xffff
 971 #define PseudoDbg_Assert_regtest_bits   16
 972 #define PseudoDbg_Assert_regtest_mask   0x7
 973 #define PseudoDbg_Assert_grp_bits       19
 974 #define PseudoDbg_Assert_grp_mask       0x7
 975 #define PseudoDbg_Assert_dbgop_bits     22
 976 #define PseudoDbg_Assert_dbgop_mask     0x3
 977 #define PseudoDbg_Assert_dontcare_bits  24
 978 #define PseudoDbg_Assert_dontcare_mask  0x7
 979 #define PseudoDbg_Assert_code_bits      27
 980 #define PseudoDbg_Assert_code_mask      0x1f
 981
 982 #define init_PseudoDbg_Assert                                           \
 983 {                                                                       \
 984   PseudoDbg_Assert_opcode,                                              \
 985   PseudoDbg_Assert_expected_bits,       PseudoDbg_Assert_expected_mask, \
 986   PseudoDbg_Assert_regtest_bits,        PseudoDbg_Assert_regtest_mask,  \
 987   PseudoDbg_Assert_grp_bits,            PseudoDbg_Assert_grp_mask,      \
 988   PseudoDbg_Assert_dbgop_bits,          PseudoDbg_Assert_dbgop_mask,    \
 989   PseudoDbg_Assert_dontcare_bits,       PseudoDbg_Assert_dontcare_mask, \
 990   PseudoDbg_Assert_code_bits,           PseudoDbg_Assert_code_mask      \
 991 };
 992
 993 /*  pseudoChr
 994 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
 995 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 1 |.ch............................|
 996 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
 997 */
 998
 999 typedef struct
1000 {
1001   unsigned short opcode;
1002   int bits_ch;
1003   int mask_ch;
1004   int bits_code;
1005   int mask_code;
1006 } PseudoChr;
1007
1008 #define PseudoChr_opcode        0xf900
1009 #define PseudoChr_ch_bits       0
1010 #define PseudoChr_ch_mask       0xff
1011 #define PseudoChr_code_bits     8
1012 #define PseudoChr_code_mask     0xff
1013
1014 #define init_PseudoChr                          \
1015 {                                               \
1016   PseudoChr_opcode,                             \
1017   PseudoChr_ch_bits,    PseudoChr_ch_mask,      \
1018   PseudoChr_code_bits,  PseudoChr_code_mask     \
1019 };
1020
1021 /*  CaCTRL
1022 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
1023 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1 |.a.|.op....|.reg.......|
1024 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
1025 */
1026
1027 typedef struct
1028 {
1029   unsigned short opcode;
1030   int bits_reg;
1031   int mask_reg;
1032   int bits_op;
1033   int mask_op;
1034   int bits_a;
1035   int mask_a;
1036   int bits_code;
1037   int mask_code;
1038 } CaCTRL;
1039
1040 #define CaCTRL_opcode           0x0240
1041 #define CaCTRL_reg_bits         0
1042 #define CaCTRL_reg_mask         0x7
1043 #define CaCTRL_op_bits          3
1044 #define CaCTRL_op_mask          0x3
1045 #define CaCTRL_a_bits           5
1046 #define CaCTRL_a_mask           0x1
1047 #define CaCTRL_code_bits        6
1048 #define CaCTRL_code_mask        0x3fff
1049
1050 #define init_CaCTRL                             \
1051 {                                               \
1052   CaCTRL_opcode,                                \
1053   CaCTRL_reg_bits,      CaCTRL_reg_mask,        \
1054   CaCTRL_op_bits,       CaCTRL_op_mask,         \
1055   CaCTRL_a_bits,        CaCTRL_a_mask,          \
1056   CaCTRL_code_bits,     CaCTRL_code_mask        \
1057 };
1058
1059 /*  PushPopMultiple
1060 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
1061 | 0 | 0 | 0 | 0 | 0 | 1 | 0 |.d.|.p.|.W.|.dr........|.pr........|
1062 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
1063 */
1064
1065 typedef struct
1066 {
1067   unsigned short opcode;
1068   int bits_pr;
1069   int mask_pr;
1070   int bits_dr;
1071   int mask_dr;
1072   int bits_W;
1073   int mask_W;
1074   int bits_p;
1075   int mask_p;
1076   int bits_d;
1077   int mask_d;
1078   int bits_code;
1079   int mask_code;
1080 } PushPopMultiple;
1081
1082 #define PushPopMultiple_opcode          0x0400
1083 #define PushPopMultiple_pr_bits         0
1084 #define PushPopMultiple_pr_mask         0x7
1085 #define PushPopMultiple_dr_bits         3
1086 #define PushPopMultiple_dr_mask         0x7
1087 #define PushPopMultiple_W_bits          6
1088 #define PushPopMultiple_W_mask          0x1
1089 #define PushPopMultiple_p_bits          7
1090 #define PushPopMultiple_p_mask          0x1
1091 #define PushPopMultiple_d_bits          8
1092 #define PushPopMultiple_d_mask          0x1
1093 #define PushPopMultiple_code_bits       8
1094 #define PushPopMultiple_code_mask       0x1
1095
1096 #define init_PushPopMultiple                                    \
1097 {                                                               \
1098   PushPopMultiple_opcode,                                       \
1099   PushPopMultiple_pr_bits,      PushPopMultiple_pr_mask,        \
1100   PushPopMultiple_dr_bits,      PushPopMultiple_dr_mask,        \
1101   PushPopMultiple_W_bits,       PushPopMultiple_W_mask,         \
1102   PushPopMultiple_p_bits,       PushPopMultiple_p_mask,         \
1103   PushPopMultiple_d_bits,       PushPopMultiple_d_mask,         \
1104   PushPopMultiple_code_bits,    PushPopMultiple_code_mask       \
1105 };
1106
1107 /*  PushPopReg
1108 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
1109 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 |.W.|.grp.......|.reg.......|
1110 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
1111 */
1112
1113 typedef struct
1114 {
1115   unsigned short opcode;
1116   int bits_reg;
1117   int mask_reg;
1118   int bits_grp;
1119   int mask_grp;
1120   int bits_W;
1121   int mask_W;
1122   int bits_code;
1123   int mask_code;
1124 } PushPopReg;
1125
1126 #define PushPopReg_opcode       0x0100
1127 #define PushPopReg_reg_bits     0
1128 #define PushPopReg_reg_mask     0x7
1129 #define PushPopReg_grp_bits     3
1130 #define PushPopReg_grp_mask     0x7
1131 #define PushPopReg_W_bits       6
1132 #define PushPopReg_W_mask       0x1
1133 #define PushPopReg_code_bits    7
1134 #define PushPopReg_code_mask    0x1ff
1135
1136 #define init_PushPopReg                         \
1137 {                                               \
1138   PushPopReg_opcode,                            \
1139   PushPopReg_reg_bits,  PushPopReg_reg_mask,    \
1140   PushPopReg_grp_bits,  PushPopReg_grp_mask,    \
1141   PushPopReg_W_bits,    PushPopReg_W_mask,      \
1142   PushPopReg_code_bits, PushPopReg_code_mask,   \
1143 };
1144
1145 /*  linkage
1146 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
1147 | 1 | 1 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |.R.|
1148 |.framesize.....................................................|
1149 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
1150 */
1151
1152 typedef struct
1153 {
1154   unsigned long opcode;
1155   int bits_framesize;
1156   int mask_framesize;
1157   int bits_R;
1158   int mask_R;
1159   int bits_code;
1160   int mask_code;
1161 } Linkage;
1162
1163 #define Linkage_opcode          0xe8000000
1164 #define Linkage_framesize_bits  0
1165 #define Linkage_framesize_mask  0xffff
1166 #define Linkage_R_bits          16
1167 #define Linkage_R_mask          0x1
1168 #define Linkage_code_bits       17
1169 #define Linkage_code_mask       0x7fff
1170
1171 #define init_Linkage                                    \
1172 {                                                       \
1173   Linkage_opcode,                                       \
1174   Linkage_framesize_bits,       Linkage_framesize_mask, \
1175   Linkage_R_bits,               Linkage_R_mask,         \
1176   Linkage_code_bits,            Linkage_code_mask       \
1177 };
1178
1179 /*  LoopSetup
1180 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
1181 | 1 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 1 |.rop...|.c.|.soffset.......|
1182 |.reg...........| - | - |.eoffset...............................|
1183 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
1184 */
1185
1186 typedef struct
1187 {
1188   unsigned long opcode;
1189   int bits_eoffset;
1190   int mask_eoffset;
1191   int bits_dontcare;
1192   int mask_dontcare;
1193   int bits_reg;
1194   int mask_reg;
1195   int bits_soffset;
1196   int mask_soffset;
1197   int bits_c;
1198   int mask_c;
1199   int bits_rop;
1200   int mask_rop;
1201   int bits_code;
1202   int mask_code;
1203 } LoopSetup;
1204
1205 #define LoopSetup_opcode                0xe0800000
1206 #define LoopSetup_eoffset_bits          0
1207 #define LoopSetup_eoffset_mask          0x3ff
1208 #define LoopSetup_dontcare_bits         10
1209 #define LoopSetup_dontcare_mask         0x3
1210 #define LoopSetup_reg_bits              12
1211 #define LoopSetup_reg_mask              0xf
1212 #define LoopSetup_soffset_bits          16
1213 #define LoopSetup_soffset_mask          0xf
1214 #define LoopSetup_c_bits                20
1215 #define LoopSetup_c_mask                0x1
1216 #define LoopSetup_rop_bits              21
1217 #define LoopSetup_rop_mask              0x3
1218 #define LoopSetup_code_bits             23
1219 #define LoopSetup_code_mask             0x1ff
1220
1221 #define init_LoopSetup                                          \
1222 {                                                               \
1223   LoopSetup_opcode,                                             \
1224   LoopSetup_eoffset_bits,       LoopSetup_eoffset_mask,         \
1225   LoopSetup_dontcare_bits,      LoopSetup_dontcare_mask,        \
1226   LoopSetup_reg_bits,           LoopSetup_reg_mask,             \
1227   LoopSetup_soffset_bits,       LoopSetup_soffset_mask,         \
1228   LoopSetup_c_bits,             LoopSetup_c_mask,               \
1229   LoopSetup_rop_bits,           LoopSetup_rop_mask,             \
1230   LoopSetup_code_bits,          LoopSetup_code_mask             \
1231 };
1232
1233 /*  LDIMMhalf
1234 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
1235 | 1 | 1 | 1 | 0 | 0 | 0 | 0 | 1 |.Z.|.H.|.S.|.grp...|.reg.......|
1236 |.hword.........................................................|
1237 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
1238 */
1239
1240 typedef struct
1241 {
1242   unsigned long opcode;
1243   int bits_hword;
1244   int mask_hword;
1245   int bits_reg;
1246   int mask_reg;
1247   int bits_grp;
1248   int mask_grp;
1249   int bits_S;
1250   int mask_S;
1251   int bits_H;
1252   int mask_H;
1253   int bits_Z;
1254   int mask_Z;
1255   int bits_code;
1256   int mask_code;
1257 } LDIMMhalf;
1258
1259 #define LDIMMhalf_opcode        0xe1000000
1260 #define LDIMMhalf_hword_bits    0
1261 #define LDIMMhalf_hword_mask    0xffff
1262 #define LDIMMhalf_reg_bits      16
1263 #define LDIMMhalf_reg_mask      0x7
1264 #define LDIMMhalf_grp_bits      19
1265 #define LDIMMhalf_grp_mask      0x3
1266 #define LDIMMhalf_S_bits        21
1267 #define LDIMMhalf_S_mask        0x1
1268 #define LDIMMhalf_H_bits        22
1269 #define LDIMMhalf_H_mask        0x1
1270 #define LDIMMhalf_Z_bits        23
1271 #define LDIMMhalf_Z_mask        0x1
1272 #define LDIMMhalf_code_bits     24
1273 #define LDIMMhalf_code_mask     0xff
1274
1275 #define init_LDIMMhalf                          \
1276 {                                               \
1277   LDIMMhalf_opcode,                             \
1278   LDIMMhalf_hword_bits, LDIMMhalf_hword_mask,   \
1279   LDIMMhalf_reg_bits,   LDIMMhalf_reg_mask,     \
1280   LDIMMhalf_grp_bits,   LDIMMhalf_grp_mask,     \
1281   LDIMMhalf_S_bits,     LDIMMhalf_S_mask,       \
1282   LDIMMhalf_H_bits,     LDIMMhalf_H_mask,       \
1283   LDIMMhalf_Z_bits,     LDIMMhalf_Z_mask,       \
1284   LDIMMhalf_code_bits,  LDIMMhalf_code_mask     \
1285 };
1286
1287
1288 /*  CC2dreg
1289 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
1290 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 |.op....|.reg.......|
1291 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
1292 */
1293
1294 typedef struct
1295 {
1296   unsigned short opcode;
1297   int bits_reg;
1298   int mask_reg;
1299   int bits_op;
1300   int mask_op;
1301   int bits_code;
1302   int mask_code;
1303 } CC2dreg;
1304
1305 #define CC2dreg_opcode          0x0200
1306 #define CC2dreg_reg_bits        0
1307 #define CC2dreg_reg_mask        0x7
1308 #define CC2dreg_op_bits         3
1309 #define CC2dreg_op_mask         0x3
1310 #define CC2dreg_code_bits       5
1311 #define CC2dreg_code_mask       0x7fff
1312
1313 #define init_CC2dreg                            \
1314 {                                               \
1315   CC2dreg_opcode,                               \
1316   CC2dreg_reg_bits,     CC2dreg_reg_mask,       \
1317   CC2dreg_op_bits,      CC2dreg_op_mask,        \
1318   CC2dreg_code_bits,    CC2dreg_code_mask       \
1319 };
1320
1321
1322 /*  PTR2op
1323 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
1324 | 0 | 1 | 0 | 0 | 0 | 1 | 0 |.opc.......|.src.......|.dst.......|
1325 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
1326 */
1327
1328 typedef struct
1329 {
1330   unsigned short opcode;
1331   int bits_dst;
1332   int mask_dst;
1333   int bits_src;
1334   int mask_src;
1335   int bits_opc;
1336   int mask_opc;
1337   int bits_code;
1338   int mask_code;
1339 } PTR2op;
1340
1341 #define PTR2op_opcode           0x4400
1342 #define PTR2op_dst_bits         0
1343 #define PTR2op_dst_mask         0x7
1344 #define PTR2op_src_bits         3
1345 #define PTR2op_src_mask         0x7
1346 #define PTR2op_opc_bits         6
1347 #define PTR2op_opc_mask         0x7
1348 #define PTR2op_code_bits        9
1349 #define PTR2op_code_mask        0x7f
1350
1351 #define init_PTR2op                             \
1352 {                                               \
1353   PTR2op_opcode,                                \
1354   PTR2op_dst_bits,      PTR2op_dst_mask,        \
1355   PTR2op_src_bits,      PTR2op_src_mask,        \
1356   PTR2op_opc_bits,      PTR2op_opc_mask,        \
1357   PTR2op_code_bits,     PTR2op_code_mask        \
1358 };
1359
1360
1361 /*  COMP3op
1362 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
1363 | 0 | 1 | 0 | 1 |.opc.......|.dst.......|.src1......|.src0......|
1364 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
1365 */
1366
1367 typedef struct
1368 {
1369   unsigned short opcode;
1370   int bits_src0;
1371   int mask_src0;
1372   int bits_src1;
1373   int mask_src1;
1374   int bits_dst;
1375   int mask_dst;
1376   int bits_opc;
1377   int mask_opc;
1378   int bits_code;
1379   int mask_code;
1380 } COMP3op;
1381
1382 #define COMP3op_opcode          0x5000
1383 #define COMP3op_src0_bits       0
1384 #define COMP3op_src0_mask       0x7
1385 #define COMP3op_src1_bits       3
1386 #define COMP3op_src1_mask       0x7
1387 #define COMP3op_dst_bits        6
1388 #define COMP3op_dst_mask        0x7
1389 #define COMP3op_opc_bits        9
1390 #define COMP3op_opc_mask        0x7
1391 #define COMP3op_code_bits       12
1392 #define COMP3op_code_mask       0xf
1393
1394 #define init_COMP3op                            \
1395 {                                               \
1396   COMP3op_opcode,                               \
1397   COMP3op_src0_bits,    COMP3op_src0_mask,      \
1398   COMP3op_src1_bits,    COMP3op_src1_mask,      \
1399   COMP3op_dst_bits,     COMP3op_dst_mask,       \
1400   COMP3op_opc_bits,     COMP3op_opc_mask,       \
1401   COMP3op_code_bits,    COMP3op_code_mask       \
1402 };
1403
1404 /*  ccMV
1405 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
1406 | 0 | 0 | 0 | 0 | 0 | 1 | 1 |.T.|.d.|.s.|.dst.......|.src.......|
1407 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
1408 */
1409
1410 typedef struct
1411 {
1412   unsigned short opcode;
1413   int bits_src;
1414   int mask_src;
1415   int bits_dst;
1416   int mask_dst;
1417   int bits_s;
1418   int mask_s;
1419   int bits_d;
1420   int mask_d;
1421   int bits_T;
1422   int mask_T;
1423   int bits_code;
1424   int mask_code;
1425 } CCmv;
1426
1427 #define CCmv_opcode     0x0600
1428 #define CCmv_src_bits   0
1429 #define CCmv_src_mask   0x7
1430 #define CCmv_dst_bits   3
1431 #define CCmv_dst_mask   0x7
1432 #define CCmv_s_bits     6
1433 #define CCmv_s_mask     0x1
1434 #define CCmv_d_bits     7
1435 #define CCmv_d_mask     0x1
1436 #define CCmv_T_bits     8
1437 #define CCmv_T_mask     0x1
1438 #define CCmv_code_bits  9
1439 #define CCmv_code_mask  0x7f
1440
1441 #define init_CCmv                       \
1442 {                                       \
1443   CCmv_opcode,                          \
1444   CCmv_src_bits,        CCmv_src_mask,  \
1445   CCmv_dst_bits,        CCmv_dst_mask,  \
1446   CCmv_s_bits,          CCmv_s_mask,    \
1447   CCmv_d_bits,          CCmv_d_mask,    \
1448   CCmv_T_bits,          CCmv_T_mask,    \
1449   CCmv_code_bits,       CCmv_code_mask  \
1450 };
1451
1452
1453 /*  CCflag
1454 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
1455 | 0 | 0 | 0 | 0 | 1 |.I.|.opc.......|.G.|.y.........|.x.........|
1456 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
1457 */
1458
1459 typedef struct
1460 {
1461   unsigned short opcode;
1462   int bits_x;
1463   int mask_x;
1464   int bits_y;
1465   int mask_y;
1466   int bits_G;
1467   int mask_G;
1468   int bits_opc;
1469   int mask_opc;
1470   int bits_I;
1471   int mask_I;
1472   int bits_code;
1473   int mask_code;
1474 } CCflag;
1475
1476 #define CCflag_opcode           0x0800
1477 #define CCflag_x_bits           0
1478 #define CCflag_x_mask           0x7
1479 #define CCflag_y_bits           3
1480 #define CCflag_y_mask           0x7
1481 #define CCflag_G_bits           6
1482 #define CCflag_G_mask           0x1
1483 #define CCflag_opc_bits         7
1484 #define CCflag_opc_mask         0x7
1485 #define CCflag_I_bits           10
1486 #define CCflag_I_mask           0x1
1487 #define CCflag_code_bits        11
1488 #define CCflag_code_mask        0x1f
1489
1490 #define init_CCflag                             \
1491 {                                               \
1492   CCflag_opcode,                                \
1493   CCflag_x_bits,        CCflag_x_mask,          \
1494   CCflag_y_bits,        CCflag_y_mask,          \
1495   CCflag_G_bits,        CCflag_G_mask,          \
1496   CCflag_opc_bits,      CCflag_opc_mask,        \
1497   CCflag_I_bits,        CCflag_I_mask,          \
1498   CCflag_code_bits,     CCflag_code_mask,       \
1499 };
1500
1501
1502 /*  CC2stat
1503 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
1504 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 |.D.|.op....|.cbit..............|
1505 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
1506 */
1507
1508 typedef struct
1509 {
1510   unsigned short opcode;
1511   int bits_cbit;
1512   int mask_cbit;
1513   int bits_op;
1514   int mask_op;
1515   int bits_D;
1516   int mask_D;
1517   int bits_code;
1518   int mask_code;
1519 } CC2stat;
1520
1521 #define CC2stat_opcode          0x0300
1522 #define CC2stat_cbit_bits       0
1523 #define CC2stat_cbit_mask       0x1f
1524 #define CC2stat_op_bits         5
1525 #define CC2stat_op_mask         0x3
1526 #define CC2stat_D_bits          7
1527 #define CC2stat_D_mask          0x1
1528 #define CC2stat_code_bits       8
1529 #define CC2stat_code_mask       0xff
1530
1531 #define init_CC2stat                            \
1532 {                                               \
1533   CC2stat_opcode,                               \
1534   CC2stat_cbit_bits,    CC2stat_cbit_mask,      \
1535   CC2stat_op_bits,      CC2stat_op_mask,        \
1536   CC2stat_D_bits,       CC2stat_D_mask,         \
1537   CC2stat_code_bits,    CC2stat_code_mask       \
1538 };
1539
1540
1541 /*  REGMV
1542 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
1543 | 0 | 0 | 1 | 1 |.gd........|.gs........|.dst.......|.src.......|
1544 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
1545 */
1546
1547 typedef struct
1548 {
1549   unsigned short opcode;
1550   int bits_src;
1551   int mask_src;
1552   int bits_dst;
1553   int mask_dst;
1554   int bits_gs;
1555   int mask_gs;
1556   int bits_gd;
1557   int mask_gd;
1558   int bits_code;
1559   int mask_code;
1560 } RegMv;
1561
1562 #define RegMv_opcode            0x3000
1563 #define RegMv_src_bits          0
1564 #define RegMv_src_mask          0x7
1565 #define RegMv_dst_bits          3
1566 #define RegMv_dst_mask          0x7
1567 #define RegMv_gs_bits           6
1568 #define RegMv_gs_mask           0x7
1569 #define RegMv_gd_bits           9
1570 #define RegMv_gd_mask           0x7
1571 #define RegMv_code_bits         12
1572 #define RegMv_code_mask         0xf
1573
1574 #define init_RegMv                      \
1575 {                                       \
1576   RegMv_opcode,                         \
1577   RegMv_src_bits,       RegMv_src_mask, \
1578   RegMv_dst_bits,       RegMv_dst_mask, \
1579   RegMv_gs_bits,        RegMv_gs_mask,  \
1580   RegMv_gd_bits,        RegMv_gd_mask,  \
1581   RegMv_code_bits,      RegMv_code_mask \
1582 };
1583
1584
1585 /*  COMPI2opD
1586 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
1587 | 0 | 1 | 1 | 0 | 0 |.op|.isrc......................|.dst.......|
1588 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
1589 */
1590
1591 typedef struct
1592 {
1593   unsigned short opcode;
1594   int bits_dst;
1595   int mask_dst;
1596   int bits_src;
1597   int mask_src;
1598   int bits_op;
1599   int mask_op;
1600   int bits_code;
1601   int mask_code;
1602 } COMPI2opD;
1603
1604 #define COMPI2opD_opcode        0x6000
1605 #define COMPI2opD_dst_bits      0
1606 #define COMPI2opD_dst_mask      0x7
1607 #define COMPI2opD_src_bits      3
1608 #define COMPI2opD_src_mask      0x7f
1609 #define COMPI2opD_op_bits       10
1610 #define COMPI2opD_op_mask       0x1
1611 #define COMPI2opD_code_bits     11
1612 #define COMPI2opD_code_mask     0x1f
1613
1614 #define init_COMPI2opD                          \
1615 {                                               \
1616   COMPI2opD_opcode,                             \
1617   COMPI2opD_dst_bits,   COMPI2opD_dst_mask,     \
1618   COMPI2opD_src_bits,   COMPI2opD_src_mask,     \
1619   COMPI2opD_op_bits,    COMPI2opD_op_mask,      \
1620   COMPI2opD_code_bits,  COMPI2opD_code_mask     \
1621 };
1622
1623 /*  COMPI2opP
1624 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
1625 | 0 | 1 | 1 | 0 | 1 |.op|.src.......................|.dst.......|
1626 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
1627 */
1628
1629 typedef COMPI2opD COMPI2opP;
1630
1631 #define COMPI2opP_opcode        0x6800
1632 #define COMPI2opP_dst_bits      0
1633 #define COMPI2opP_dst_mask      0x7
1634 #define COMPI2opP_src_bits      3
1635 #define COMPI2opP_src_mask      0x7f
1636 #define COMPI2opP_op_bits       10
1637 #define COMPI2opP_op_mask       0x1
1638 #define COMPI2opP_code_bits     11
1639 #define COMPI2opP_code_mask     0x1f
1640
1641 #define init_COMPI2opP                          \
1642 {                                               \
1643   COMPI2opP_opcode,                             \
1644   COMPI2opP_dst_bits,   COMPI2opP_dst_mask,     \
1645   COMPI2opP_src_bits,   COMPI2opP_src_mask,     \
1646   COMPI2opP_op_bits,    COMPI2opP_op_mask,      \
1647   COMPI2opP_code_bits,  COMPI2opP_code_mask     \
1648 };
1649
1650
1651 /*  dagMODim
1652 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
1653 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 0 |.br| 1 | 1 |.op|.m.....|.i.....|
1654 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
1655 */
1656
1657 typedef struct
1658 {
1659   unsigned short opcode;
1660   int bits_i;
1661   int mask_i;
1662   int bits_m;
1663   int mask_m;
1664   int bits_op;
1665   int mask_op;
1666   int bits_code2;
1667   int mask_code2;
1668   int bits_br;
1669   int mask_br;
1670   int bits_code;
1671   int mask_code;
1672 } DagMODim;
1673
1674 #define DagMODim_opcode         0x9e60
1675 #define DagMODim_i_bits         0
1676 #define DagMODim_i_mask         0x3
1677 #define DagMODim_m_bits         2
1678 #define DagMODim_m_mask         0x3
1679 #define DagMODim_op_bits        4
1680 #define DagMODim_op_mask        0x1
1681 #define DagMODim_code2_bits     5
1682 #define DagMODim_code2_mask     0x3
1683 #define DagMODim_br_bits        7
1684 #define DagMODim_br_mask        0x1
1685 #define DagMODim_code_bits      8
1686 #define DagMODim_code_mask      0xff
1687
1688 #define init_DagMODim                           \
1689 {                                               \
1690   DagMODim_opcode,                              \
1691   DagMODim_i_bits,      DagMODim_i_mask,        \
1692   DagMODim_m_bits,      DagMODim_m_mask,        \
1693   DagMODim_op_bits,     DagMODim_op_mask,       \
1694   DagMODim_code2_bits,  DagMODim_code2_mask,    \
1695   DagMODim_br_bits,     DagMODim_br_mask,       \
1696   DagMODim_code_bits,   DagMODim_code_mask      \
1697 };
1698
1699 /*  dagMODik
1700 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
1701 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 0 |.op....|.i.....|
1702 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
1703 */
1704
1705 typedef struct
1706 {
1707   unsigned short opcode;
1708   int bits_i;
1709   int mask_i;
1710   int bits_op;
1711   int mask_op;
1712   int bits_code;
1713   int mask_code;
1714 } DagMODik;
1715
1716 #define DagMODik_opcode         0x9f60
1717 #define DagMODik_i_bits         0
1718 #define DagMODik_i_mask         0x3
1719 #define DagMODik_op_bits        2
1720 #define DagMODik_op_mask        0x3
1721 #define DagMODik_code_bits      3
1722 #define DagMODik_code_mask      0xfff
1723
1724 #define init_DagMODik                           \
1725 {                                               \
1726   DagMODik_opcode,                              \
1727   DagMODik_i_bits,      DagMODik_i_mask,        \
1728   DagMODik_op_bits,     DagMODik_op_mask,       \
1729   DagMODik_code_bits,   DagMODik_code_mask      \
1730 };
1731
1732 #endif