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Move all global state data into opcode table struct, and treat
[thirdparty/binutils-gdb.git] / include / opcode / cgen.h
1 /* Header file for targets using CGEN: Cpu tools GENerator.
2
3 Copyright (C) 1996, 1997, 1998 Free Software Foundation, Inc.
4
5 This file is part of GDB, the GNU debugger, and the GNU Binutils.
6
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2 of the License, or
10 (at your option) any later version.
11
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License along
18 with this program; if not, write to the Free Software Foundation, Inc.,
19 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
20
21 #ifndef CGEN_H
22 #define CGEN_H
23
24 /* Version information. */
25 #define CGEN_VERSION_MAJOR 0
26 #define CGEN_VERSION_MINOR 6
27 #define CGEN_VERSION_FIXLEVEL 0
28
29 /* Prepend the arch name, defined in <arch>-opc.h, and _cgen_ to symbol S.
30 The lack of spaces in the arg list is important for non-stdc systems.
31 This file is included by <arch>-opc.h.
32 It can be included independently of <arch>-opc.h, in which case the arch
33 dependent portions will be declared as "unknown_cgen_foo". */
34
35 #ifndef CGEN_SYM
36 #define CGEN_SYM(s) CONCAT3 (unknown,_cgen_,s)
37 #endif
38
39 /* This file contains the static (unchanging) pieces and as much other stuff
40 as we can reasonably put here. It's generally cleaner to put stuff here
41 rather than having it machine generated if possible. */
42
43 /* The assembler syntax is made up of expressions (duh...).
44 At the lowest level the values are mnemonics, register names, numbers, etc.
45 Above that are subexpressions, if any (an example might be the
46 "effective address" in m68k cpus). At the second highest level are the
47 insns themselves. Above that are pseudo-insns, synthetic insns, and macros,
48 if any.
49 */
50 \f
51 /* Lots of cpu's have a fixed insn size, or one which rarely changes,
52 and it's generally easier to handle these by treating the insn as an
53 integer type, rather than an array of characters. So we allow targets
54 to control this. */
55
56 #ifdef CGEN_INT_INSN
57 typedef unsigned int cgen_insn_t;
58 #else
59 typedef char * cgen_insn_t;
60 #endif
61
62 #ifdef __GNUC__
63 #define CGEN_INLINE inline
64 #else
65 #define CGEN_INLINE
66 #endif
67
68 enum cgen_endian
69 {
70 CGEN_ENDIAN_UNKNOWN,
71 CGEN_ENDIAN_LITTLE,
72 CGEN_ENDIAN_BIG
73 };
74
75 /* Forward decl. */
76 typedef struct cgen_insn CGEN_INSN;
77
78 /* Opaque pointer version for use by external world. */
79 typedef struct cgen_opcode_table * CGEN_OPCODE_DESC;
80 \f
81 /* Attributes.
82 Attributes are used to describe various random things.
83 ??? Will need to be revisited when expression support is added. */
84
85 /* Struct to record attribute information. */
86 typedef struct
87 {
88 unsigned char num_nonbools;
89 unsigned int bool;
90 unsigned int nonbool[1];
91 } CGEN_ATTR;
92
93 /* Define a structure member for attributes with N non-boolean entries.
94 The attributes are sorted so that the non-boolean ones come first.
95 num_nonbools: count of nonboolean attributes
96 bool: values of boolean attributes
97 nonbool: values of non-boolean attributes
98 There is a maximum of 32 attributes total. */
99 #define CGEN_ATTR_TYPE(n) \
100 struct { unsigned char num_nonbools; \
101 unsigned int bool; \
102 unsigned int nonbool[(n) ? (n) : 1]; }
103
104 /* Given an attribute number, return its mask. */
105 #define CGEN_ATTR_MASK(attr) (1 << (attr))
106
107 /* Return the value of boolean attribute ATTR in ATTRS. */
108 #define CGEN_BOOL_ATTR(attrs, attr) \
109 ((CGEN_ATTR_MASK (attr) & (attrs)) != 0)
110
111 /* Return value of attribute ATTR in ATTR_TABLE for OBJ.
112 OBJ is a pointer to the entity that has the attributes.
113 It's not used at present but is reserved for future purposes. */
114 #define CGEN_ATTR_VALUE(obj, attr_table, attr) \
115 ((unsigned int) (attr) < (attr_table)->num_nonbools \
116 ? ((attr_table)->nonbool[attr]) \
117 : (((attr_table)->bool & (1 << (attr))) != 0))
118
119 /* Attribute name/value tables.
120 These are used to assist parsing of descriptions at runtime. */
121
122 typedef struct
123 {
124 const char * name;
125 int value;
126 } CGEN_ATTR_ENTRY;
127
128 /* For each domain (ifld,operand,insn), list of attributes. */
129
130 typedef struct
131 {
132 const char * name;
133 /* NULL for boolean attributes. */
134 const CGEN_ATTR_ENTRY * vals;
135 } CGEN_ATTR_TABLE;
136 \f
137 /* Parse result (also extraction result).
138
139 The result of parsing an insn is stored here.
140 To generate the actual insn, this is passed to the insert handler.
141 When printing an insn, the result of extraction is stored here.
142 To print the insn, this is passed to the print handler.
143
144 It is machine generated so we don't define it here,
145 but we do need a forward decl for the handler fns.
146
147 There is one member for each possible field in the insn.
148 The type depends on the field.
149 Also recorded here is the computed length of the insn for architectures
150 where it varies.
151 */
152
153 typedef struct cgen_fields CGEN_FIELDS;
154
155 /* Total length of the insn, as recorded in the `fields' struct. */
156 /* ??? The field insert handler has lots of opportunities for optimization
157 if it ever gets inlined. On architectures where insns all have the same
158 size, may wish to detect that and make this macro a constant - to allow
159 further optimizations. */
160 #define CGEN_FIELDS_BITSIZE(fields) ((fields)->length)
161 \f
162 /* Associated with each insn or expression is a set of "handlers" for
163 performing operations like parsing, printing, etc. These require a bfd_vma
164 value to be passed around but we don't want all applications to need bfd.h.
165 So this stuff is only provided if bfd.h has been included. */
166
167 #ifdef BFD_VERSION
168
169 /* Parse handler.
170 OD is an opcode table descriptor.
171 INSN is a pointer to a struct describing the insn being parsed.
172 STRP is a pointer to a pointer to the text being parsed.
173 FIELDS is a pointer to a cgen_fields struct in which the results are placed.
174 If the expression is successfully parsed, *STRP is updated.
175 If not it is left alone.
176 The result is NULL if success or an error message. */
177 typedef const char * (cgen_parse_fn)
178 PARAMS ((CGEN_OPCODE_DESC /*od*/, const CGEN_INSN * /*insn*/,
179 const char ** /*strp*/, CGEN_FIELDS * /*fields*/));
180
181 /* Insert handler.
182 OD is an opcode table descriptor.
183 INSN is a pointer to a struct describing the insn being parsed.
184 FIELDS is a pointer to a cgen_fields struct from which the values
185 are fetched.
186 INSNP is a pointer to a buffer in which to place the insn.
187 PC is the pc value of the insn.
188 The result is an error message or NULL if success. */
189 typedef const char * (cgen_insert_fn)
190 PARAMS ((CGEN_OPCODE_DESC, const CGEN_INSN * /*insn*/,
191 CGEN_FIELDS * /*fields*/, cgen_insn_t * /*insnp*/,
192 bfd_vma /*pc*/));
193
194 /* Extract handler.
195 OD is an opcode table descriptor.
196 INSN is a pointer to a struct describing the insn being parsed.
197 The second argument is a pointer to a struct controlling extraction
198 (only used for variable length insns).
199 BUF_CTRL is a pointer to a struct for controlling reading of further
200 bytes for the insn.
201 BASE_INSN is the first CGEN_BASE_INSN_SIZE bytes.
202 FIELDS is a pointer to a cgen_fields struct in which the results are placed.
203 PC is the pc value of the insn.
204 The result is the length of the insn in bits or zero if not recognized. */
205 typedef int (cgen_extract_fn)
206 PARAMS ((CGEN_OPCODE_DESC, const CGEN_INSN * /*insn*/,
207 PTR /*buf_ctrl*/, unsigned long /*base_insn*/,
208 CGEN_FIELDS * /*fields*/, bfd_vma /*pc*/));
209
210 /* Print handler.
211 OD is an opcode table descriptor.
212 INFO is a pointer to the disassembly info.
213 Eg: disassemble_info. It's defined as `PTR' so this file can be included
214 without dis-asm.h.
215 INSN is a pointer to a struct describing the insn being printed.
216 FIELDS is a pointer to a cgen_fields struct.
217 PC is the pc value of the insn.
218 LEN is the length of the insn, in bits. */
219 typedef void (cgen_print_fn)
220 PARAMS ((CGEN_OPCODE_DESC /*od*/, PTR /*info*/,
221 const CGEN_INSN * /*insn*/,
222 CGEN_FIELDS * /*fields*/, bfd_vma /*pc*/, int /*len*/));
223
224 /* The `parse' and `insert' fields are indices into these tables.
225 The elements are pointer to specialized handler functions.
226 Element 0 is special, it means use the default handler. */
227 extern cgen_parse_fn * const CGEN_SYM (parse_handlers) [];
228 #define CGEN_PARSE_FN(x) (CGEN_SYM (parse_handlers)[(x)->base.parse])
229 extern cgen_insert_fn * const CGEN_SYM (insert_handlers) [];
230 #define CGEN_INSERT_FN(x) (CGEN_SYM (insert_handlers)[(x)->base.insert])
231
232 /* Likewise for the `extract' and `print' fields. */
233 extern cgen_extract_fn * const CGEN_SYM (extract_handlers) [];
234 #define CGEN_EXTRACT_FN(x) (CGEN_SYM (extract_handlers)[(x)->base.extract])
235 extern cgen_print_fn * const CGEN_SYM (print_handlers) [];
236 #define CGEN_PRINT_FN(x) (CGEN_SYM (print_handlers)[(x)->base.print])
237
238 /* Default insn parser, printer. */
239 extern cgen_parse_fn CGEN_SYM (parse_insn);
240 extern cgen_insert_fn CGEN_SYM (insert_insn);
241 extern cgen_extract_fn CGEN_SYM (extract_insn);
242 extern cgen_print_fn CGEN_SYM (print_insn);
243
244 #endif /* BFD_VERSION */
245 \f
246 /* Base class of parser/printer.
247 (Don't read too much into the use of the phrase "base class".
248 It's a name I'm using to organize my thoughts.)
249
250 Instructions and expressions all share this data in common.
251 It's a collection of the common elements needed to parse, insert, extract,
252 and print each of them.
253 This is an underutilized facility, and exists as a potential escape hatch
254 for handling more complicated assembler syntaxes. */
255
256 struct cgen_base
257 {
258 /* Indices into the handler tables.
259 We could use pointers here instead, but in the case of the insn table,
260 90% of them would be identical and that's a lot of redundant data.
261 0 means use the default (what the default is is up to the code).
262 Using indices also keeps assembler code out of the disassembler and
263 vice versa. */
264 unsigned char parse, insert, extract, print;
265 };
266 \f
267 /* Assembler interface.
268
269 The interface to the assembler is intended to be clean in the sense that
270 libopcodes.a is a standalone entity and could be used with any assembler.
271 Not that one would necessarily want to do that but rather that it helps
272 keep a clean interface. The interface will obviously be slanted towards
273 GAS, but at least it's a start.
274 ??? Note that one possible use of the assembler besides GAS is GDB.
275
276 Parsing is controlled by the assembler which calls
277 CGEN_SYM (assemble_insn). If it can parse and build the entire insn
278 it doesn't call back to the assembler. If it needs/wants to call back
279 to the assembler, cgen_parse_operand_fn is called which can either
280
281 - return a number to be inserted in the insn
282 - return a "register" value to be inserted
283 (the register might not be a register per pe)
284 - queue the argument and return a marker saying the expression has been
285 queued (eg: a fix-up)
286 - return an error message indicating the expression wasn't recognizable
287
288 The result is an error message or NULL for success.
289 The parsed value is stored in the bfd_vma *. */
290
291 /* Values for indicating what the caller wants. */
292 enum cgen_parse_operand_type
293 {
294 CGEN_PARSE_OPERAND_INIT,
295 CGEN_PARSE_OPERAND_INTEGER,
296 CGEN_PARSE_OPERAND_ADDRESS
297 };
298
299 /* Values for indicating what was parsed. */
300 enum cgen_parse_operand_result
301 {
302 CGEN_PARSE_OPERAND_RESULT_NUMBER,
303 CGEN_PARSE_OPERAND_RESULT_REGISTER,
304 CGEN_PARSE_OPERAND_RESULT_QUEUED,
305 CGEN_PARSE_OPERAND_RESULT_ERROR
306 };
307
308 #ifdef BFD_VERSION /* Don't require bfd.h unnecessarily. */
309 typedef const char * (cgen_parse_operand_fn)
310 PARAMS ((CGEN_OPCODE_DESC,
311 enum cgen_parse_operand_type, const char **, int, int,
312 enum cgen_parse_operand_result *, bfd_vma *));
313 #else
314 typedef const char * (cgen_parse_operand_fn) ();
315 #endif
316
317 /* Set the cgen_parse_operand_fn callback. */
318 extern void cgen_set_parse_operand_fn
319 PARAMS ((CGEN_OPCODE_DESC, cgen_parse_operand_fn));
320
321 /* Called before trying to match a table entry with the insn. */
322 extern void cgen_init_parse_operand PARAMS ((CGEN_OPCODE_DESC));
323 \f
324 /* Operand values (keywords, integers, symbols, etc.) */
325
326 /* Types of assembler elements. */
327
328 enum cgen_asm_type
329 {
330 CGEN_ASM_KEYWORD, CGEN_ASM_MAX
331 };
332
333 /* List of hardware elements. */
334
335 typedef struct cgen_hw_entry
336 {
337 /* The type of this entry, one of `enum hw_type'.
338 This is an int and not the enum as the latter may not be declared yet. */
339 int type;
340 const struct cgen_hw_entry * next;
341 char * name;
342 enum cgen_asm_type asm_type;
343 PTR asm_data;
344 } CGEN_HW_ENTRY;
345
346 extern const CGEN_HW_ENTRY * cgen_hw_lookup_by_name
347 PARAMS ((CGEN_OPCODE_DESC, const char *));
348 extern const CGEN_HW_ENTRY * cgen_hw_lookup_by_num
349 PARAMS ((CGEN_OPCODE_DESC, int));
350
351 /* This struct is used to describe things like register names, etc. */
352
353 typedef struct cgen_keyword_entry
354 {
355 /* Name (as in register name). */
356 char * name;
357
358 /* Value (as in register number).
359 The value cannot be -1 as that is used to indicate "not found".
360 IDEA: Have "FUNCTION" attribute? [function is called to fetch value]. */
361 int value;
362
363 /* Attributes.
364 This should, but technically needn't, appear last. It is a variable sized
365 array in that one architecture may have 1 nonbool attribute and another
366 may have more. Having this last means the non-architecture specific code
367 needn't care. */
368 /* ??? Moving this last should be done by treating keywords like insn lists
369 and moving the `next' fields into a CGEN_KEYWORD_LIST struct. */
370 /* FIXME: Not used yet. */
371 #ifndef CGEN_KEYWORD_NBOOL_ATTRS
372 #define CGEN_KEYWORD_NBOOL_ATTRS 1
373 #endif
374 const CGEN_ATTR_TYPE (CGEN_KEYWORD_NBOOL_ATTRS) attrs;
375
376 /* Next name hash table entry. */
377 struct cgen_keyword_entry *next_name;
378 /* Next value hash table entry. */
379 struct cgen_keyword_entry *next_value;
380 } CGEN_KEYWORD_ENTRY;
381
382 /* Top level struct for describing a set of related keywords
383 (e.g. register names).
384
385 This struct supports runtime entry of new values, and hashed lookups. */
386
387 typedef struct cgen_keyword
388 {
389 /* Pointer to initial [compiled in] values. */
390 CGEN_KEYWORD_ENTRY * init_entries;
391
392 /* Number of entries in `init_entries'. */
393 unsigned int num_init_entries;
394
395 /* Hash table used for name lookup. */
396 CGEN_KEYWORD_ENTRY ** name_hash_table;
397
398 /* Hash table used for value lookup. */
399 CGEN_KEYWORD_ENTRY ** value_hash_table;
400
401 /* Number of entries in the hash_tables. */
402 unsigned int hash_table_size;
403
404 /* Pointer to null keyword "" entry if present. */
405 const CGEN_KEYWORD_ENTRY * null_entry;
406 } CGEN_KEYWORD;
407
408 /* Structure used for searching. */
409
410 typedef struct
411 {
412 /* Table being searched. */
413 const CGEN_KEYWORD * table;
414
415 /* Specification of what is being searched for. */
416 const char * spec;
417
418 /* Current index in hash table. */
419 unsigned int current_hash;
420
421 /* Current element in current hash chain. */
422 CGEN_KEYWORD_ENTRY * current_entry;
423 } CGEN_KEYWORD_SEARCH;
424
425 /* Lookup a keyword from its name. */
426 const CGEN_KEYWORD_ENTRY * cgen_keyword_lookup_name
427 PARAMS ((CGEN_KEYWORD *, const char *));
428 /* Lookup a keyword from its value. */
429 const CGEN_KEYWORD_ENTRY * cgen_keyword_lookup_value
430 PARAMS ((CGEN_KEYWORD *, int));
431 /* Add a keyword. */
432 void cgen_keyword_add PARAMS ((CGEN_KEYWORD *, CGEN_KEYWORD_ENTRY *));
433 /* Keyword searching.
434 This can be used to retrieve every keyword, or a subset. */
435 CGEN_KEYWORD_SEARCH cgen_keyword_search_init
436 PARAMS ((CGEN_KEYWORD *, const char *));
437 const CGEN_KEYWORD_ENTRY *cgen_keyword_search_next
438 PARAMS ((CGEN_KEYWORD_SEARCH *));
439
440 /* Operand value support routines. */
441
442 extern const char * cgen_parse_keyword
443 PARAMS ((CGEN_OPCODE_DESC, const char **, CGEN_KEYWORD *, long *));
444 #ifdef BFD_VERSION /* Don't require bfd.h unnecessarily. */
445 extern const char * cgen_parse_signed_integer
446 PARAMS ((CGEN_OPCODE_DESC, const char **, int, long *));
447 extern const char * cgen_parse_unsigned_integer
448 PARAMS ((CGEN_OPCODE_DESC, const char **, int, unsigned long *));
449 extern const char * cgen_parse_address
450 PARAMS ((CGEN_OPCODE_DESC, const char **, int, int,
451 enum cgen_parse_operand_result *, bfd_vma *));
452 extern const char * cgen_validate_signed_integer
453 PARAMS ((long, long, long));
454 extern const char * cgen_validate_unsigned_integer
455 PARAMS ((unsigned long, unsigned long, unsigned long));
456 #endif
457 \f
458 /* Operand modes. */
459
460 /* ??? This duplicates the values in arch.h. Revisit.
461 These however need the CGEN_ prefix [as does everything in this file]. */
462 /* ??? Targets may need to add their own modes so we may wish to move this
463 to <arch>-opc.h, or add a hook. */
464
465 enum cgen_mode {
466 CGEN_MODE_VOID, /* FIXME: rename simulator's VM to VOID */
467 CGEN_MODE_BI, CGEN_MODE_QI, CGEN_MODE_HI, CGEN_MODE_SI, CGEN_MODE_DI,
468 CGEN_MODE_UBI, CGEN_MODE_UQI, CGEN_MODE_UHI, CGEN_MODE_USI, CGEN_MODE_UDI,
469 CGEN_MODE_SF, CGEN_MODE_DF, CGEN_MODE_XF, CGEN_MODE_TF,
470 CGEN_MODE_MAX
471 };
472
473 /* FIXME: Until simulator is updated. */
474 #define CGEN_MODE_VM CGEN_MODE_VOID
475 \f
476 /* This struct defines each entry in the operand table. */
477
478 typedef struct cgen_operand
479 {
480 /* Name as it appears in the syntax string. */
481 char * name;
482
483 /* The hardware element associated with this operand. */
484 const CGEN_HW_ENTRY *hw;
485
486 /* FIXME: We don't yet record ifield definitions, which we should.
487 When we do it might make sense to delete start/length (since they will
488 be duplicated in the ifield's definition) and replace them with a
489 pointer to the ifield entry. Note that as more complicated situations
490 need to be handled, going more and more with an OOP paradigm will help
491 keep the complication under control. Of course, this was the goal from
492 the start, but getting there in one step was too much too soon. */
493
494 /* Bit position (msb of first byte = bit 0).
495 This is just a hint, and may be unused in more complex operands.
496 May be unused for a modifier. */
497 unsigned char start;
498
499 /* The number of bits in the operand.
500 This is just a hint, and may be unused in more complex operands.
501 May be unused for a modifier. */
502 unsigned char length;
503
504 #if 0 /* ??? Interesting idea but relocs tend to get too complicated,
505 and ABI dependent, for simple table lookups to work. */
506 /* Ideally this would be the internal (external?) reloc type. */
507 int reloc_type;
508 #endif
509
510 /* Attributes.
511 This should, but technically needn't, appear last. It is a variable sized
512 array in that one architecture may have 1 nonbool attribute and another
513 may have more. Having this last means the non-architecture specific code
514 needn't care, now or tomorrow. */
515 #ifndef CGEN_OPERAND_NBOOL_ATTRS
516 #define CGEN_OPERAND_NBOOL_ATTRS 1
517 #endif
518 const CGEN_ATTR_TYPE (CGEN_OPERAND_NBOOL_ATTRS) attrs;
519 #define CGEN_OPERAND_ATTRS(operand) (&(operand)->attrs)
520 } CGEN_OPERAND;
521
522 /* Return value of attribute ATTR in OPERAND. */
523 #define CGEN_OPERAND_ATTR(operand, attr) \
524 CGEN_ATTR_VALUE (operand, CGEN_OPERAND_ATTRS (operand), attr)
525
526 /* The operand table is currently a very static entity. */
527 extern const CGEN_OPERAND CGEN_SYM (operand_table)[];
528
529 enum cgen_operand_type;
530
531 #define CGEN_OPERAND_INDEX(operand) ((int) ((operand) - CGEN_SYM (operand_table)))
532 /* FIXME: Rename, cpu-opc.h defines this as the typedef of the enum. */
533 #define CGEN_OPERAND_TYPE(operand) ((enum cgen_operand_type) CGEN_OPERAND_INDEX (operand))
534 #define CGEN_OPERAND_ENTRY(n) (& CGEN_SYM (operand_table) [n])
535 \f
536 /* Instruction operand instances.
537
538 For each instruction, a list of the hardware elements that are read and
539 written are recorded. */
540
541 /* The type of the instance. */
542 enum cgen_operand_instance_type {
543 /* End of table marker. */
544 CGEN_OPERAND_INSTANCE_END = 0,
545 CGEN_OPERAND_INSTANCE_INPUT, CGEN_OPERAND_INSTANCE_OUTPUT
546 };
547
548 typedef struct
549 {
550 /* The type of this operand. */
551 enum cgen_operand_instance_type type;
552 #define CGEN_OPERAND_INSTANCE_TYPE(opinst) ((opinst)->type)
553
554 /* The hardware element referenced. */
555 const CGEN_HW_ENTRY *hw;
556 #define CGEN_OPERAND_INSTANCE_HW(opinst) ((opinst)->hw)
557
558 /* The mode in which the operand is being used. */
559 enum cgen_mode mode;
560 #define CGEN_OPERAND_INSTANCE_MODE(opinst) ((opinst)->mode)
561
562 /* The operand table entry or NULL if there is none (i.e. an explicit
563 hardware reference). */
564 const CGEN_OPERAND *operand;
565 #define CGEN_OPERAND_INSTANCE_OPERAND(opinst) ((opinst)->operand)
566
567 /* If `operand' is NULL, the index (e.g. into array of registers). */
568 int index;
569 #define CGEN_OPERAND_INSTANCE_INDEX(opinst) ((opinst)->index)
570 } CGEN_OPERAND_INSTANCE;
571 \f
572 /* Syntax string.
573
574 Each insn format and subexpression has one of these.
575
576 The syntax "string" consists of characters (n > 0 && n < 128), and operand
577 values (n >= 128), and is terminated by 0. Operand values are 128 + index
578 into the operand table. The operand table doesn't exist in C, per se, as
579 the data is recorded in the parse/insert/extract/print switch statements. */
580
581 #ifndef CGEN_MAX_SYNTAX_BYTES
582 #define CGEN_MAX_SYNTAX_BYTES 16
583 #endif
584
585 typedef struct
586 {
587 unsigned char syntax[CGEN_MAX_SYNTAX_BYTES];
588 } CGEN_SYNTAX;
589
590 #define CGEN_SYNTAX_STRING(syn) (syn->syntax)
591 #define CGEN_SYNTAX_CHAR_P(c) ((c) < 128)
592 #define CGEN_SYNTAX_CHAR(c) (c)
593 #define CGEN_SYNTAX_FIELD(c) ((c) - 128)
594 #define CGEN_SYNTAX_MAKE_FIELD(c) ((c) + 128)
595
596 /* ??? I can't currently think of any case where the mnemonic doesn't come
597 first [and if one ever doesn't building the hash tables will be tricky].
598 However, we treat mnemonics as just another operand of the instruction.
599 A value of 1 means "this is where the mnemonic appears". 1 isn't
600 special other than it's a non-printable ASCII char. */
601 #define CGEN_SYNTAX_MNEMONIC 1
602 #define CGEN_SYNTAX_MNEMONIC_P(ch) ((ch) == CGEN_SYNTAX_MNEMONIC)
603 \f
604 /* Instruction formats.
605
606 Instructions are grouped by format. Associated with an instruction is its
607 format. Each opcode table entry contains a format table entry.
608 ??? There is usually very few formats compared with the number of insns,
609 so one can reduce the size of the opcode table by recording the format table
610 as a separate entity. Given that we currently don't, format table entries
611 are also distinguished by their operands. This increases the size of the
612 table, but reduces the number of tables. It's all minutiae anyway so it
613 doesn't really matter [at this point in time].
614
615 ??? Support for variable length ISA's is wip. */
616
617 typedef struct
618 {
619 /* Length that MASK and VALUE have been calculated to
620 [VALUE is recorded elsewhere].
621 Normally it is CGEN_BASE_INSN_BITSIZE. On [V]LIW architectures where
622 the base insn size may be larger than the size of an insn, this field is
623 less than CGEN_BASE_INSN_BITSIZE. */
624 unsigned char mask_length;
625
626 /* Total length of instruction, in bits. */
627 unsigned char length;
628
629 /* Mask to apply to the first MASK_LENGTH bits.
630 Each insn's value is stored with the insn.
631 The first step in recognizing an insn for disassembly is
632 (opcode & mask) == value. */
633 unsigned int mask;
634 } CGEN_FORMAT;
635 \f
636 /* This struct defines each entry in the instruction table. */
637
638 struct cgen_insn
639 {
640 /* This field is an array of functions that operand on this entry. */
641 struct cgen_base base;
642 #define CGEN_INSN_BASE(insn) (&(insn)->base)
643
644 /* Each real instruction is enumerated.
645 The simulator use to use this value but currently no longer does.
646 This may go away in time. */
647 int num;
648 #define CGEN_INSN_NUM(insn) ((insn)->num)
649
650 /* Name of entry (that distinguishes it from all other entries).
651 This is used, for example, in simulator profiling results. */
652 /* ??? If mnemonics have operands, try to print full mnemonic. */
653 const char * name;
654 #define CGEN_INSN_NAME(insn) ((insn)->name)
655
656 /* Mnemonic. This is used when parsing and printing the insn.
657 In the case of insns that have operands on the mnemonics, this is
658 only the constant part. E.g. for conditional execution of an `add' insn,
659 where the full mnemonic is addeq, addne, etc., this is only "add". */
660 const char * mnemonic;
661 #define CGEN_INSN_MNEMONIC(insn) ((insn)->mnemonic)
662
663 /* Syntax string. */
664 const CGEN_SYNTAX syntax;
665 #define CGEN_INSN_SYNTAX(insn) (& (insn)->syntax)
666
667 /* Format entry. */
668 const CGEN_FORMAT format;
669 #define CGEN_INSN_MASK_BITSIZE(insn) ((insn)->format.mask_length)
670 #define CGEN_INSN_BITSIZE(insn) ((insn)->format.length)
671
672 /* Instruction opcode value. */
673 unsigned int value;
674 #define CGEN_INSN_VALUE(insn) ((insn)->value)
675 #define CGEN_INSN_MASK(insn) ((insn)->format.mask)
676
677 /* Semantics, as CDL. */
678 /* ??? Note that the operand instance table could be computed at runtime
679 if we parse this and cache the results. */
680 const char *cdx;
681 #define CGEN_INSN_CDX(insn) ((insn)->cdx)
682
683 /* Opaque pointer to "subclass" specific data.
684 In the case of real insns this points to a NULL entry terminated
685 table of operands used, or NULL if none.
686 In the case of macro insns this points to data to control the expansion.
687 ??? I'd rather not get carried away and lay things out with pedantic
688 purity right now. Sure, other fields might better be tucked away in
689 `data'. Not now. */
690 PTR data;
691 #define CGEN_INSN_DATA(insn) ((insn)->data)
692 #define CGEN_INSN_OPERANDS(insn) ((CGEN_OPERAND_INSTANCE *) (insn)->data)
693
694 /* Attributes.
695 This must appear last. It is a variable sized array in that one
696 architecture may have 1 nonbool attribute and another may have more.
697 Having this last means the non-architecture specific code needn't
698 care. */
699 #ifndef CGEN_INSN_NBOOL_ATTRS
700 #define CGEN_INSN_NBOOL_ATTRS 1
701 #endif
702 const CGEN_ATTR_TYPE (CGEN_INSN_NBOOL_ATTRS) attrs;
703 #define CGEN_INSN_ATTRS(insn) (&(insn)->attrs)
704 /* Return value of attribute ATTR in INSN. */
705 #define CGEN_INSN_ATTR(insn, attr) \
706 CGEN_ATTR_VALUE (insn, CGEN_INSN_ATTRS (insn), attr)
707 };
708
709 /* Instruction lists.
710 This is used for adding new entries and for creating the hash lists. */
711
712 typedef struct cgen_insn_list
713 {
714 struct cgen_insn_list * next;
715 const CGEN_INSN * insn;
716 } CGEN_INSN_LIST;
717
718 /* The table of instructions. */
719
720 typedef struct
721 {
722 /* Pointer to initial [compiled in] entries. */
723 const CGEN_INSN * init_entries;
724
725 /* Size of an entry (since the attribute member is variable sized). */
726 unsigned int entry_size;
727
728 /* Number of entries in `init_entries', including trailing NULL entry. */
729 unsigned int num_init_entries;
730
731 /* Values added at runtime. */
732 CGEN_INSN_LIST * new_entries;
733 } CGEN_INSN_TABLE;
734
735 /* ??? This is currently used by the simulator. */
736 extern const CGEN_INSN CGEN_SYM (insn_table_entries)[];
737
738 /* Return number of instructions. This includes any added at runtime. */
739
740 extern int cgen_insn_count PARAMS ((CGEN_OPCODE_DESC));
741 extern int cgen_macro_insn_count PARAMS ((CGEN_OPCODE_DESC));
742 \f
743 /* Macro instructions.
744 Macro insns aren't real insns, they map to one or more real insns.
745 E.g. An architecture's "nop" insn may actually be an "mv r0,r0" or
746 some such.
747
748 Macro insns can expand to nothing (e.g. a nop that is optimized away).
749 This is useful in multi-insn macros that build a constant in a register.
750 Of course this isn't the default behaviour and must be explicitly enabled.
751
752 Assembly of macro-insns is relatively straightforward. Disassembly isn't.
753 However, disassembly of at least some kinds of macro insns is important
754 in order that the disassembled code preserve the readability of the original
755 insn. What is attempted here is to disassemble all "simple" macro-insns,
756 where "simple" is currently defined to mean "expands to one real insn".
757
758 Simple macro-insns are handled specially. They are emitted as ALIAS's
759 of real insns. This simplifies their handling since there's usually more
760 of them than any other kind of macro-insn, and proper disassembly of them
761 falls out for free. */
762
763 /* For each macro-insn there may be multiple expansion possibilities,
764 depending on the arguments. This structure is accessed via the `data'
765 member of CGEN_INSN. */
766
767 typedef struct cgen_minsn_expansion {
768 /* Function to do the expansion.
769 If the expansion fails (e.g. "no match") NULL is returned.
770 Space for the expansion is obtained with malloc.
771 It is up to the caller to free it. */
772 const char * (* fn) PARAMS ((const struct cgen_minsn_expansion *,
773 const char *, const char **, int *, CGEN_OPERAND **));
774 #define CGEN_MIEXPN_FN(ex) ((ex)->fn)
775
776 /* Instruction(s) the macro expands to.
777 The format of STR is defined by FN.
778 It is typically the assembly code of the real insn, but it could also be
779 the original Scheme expression or a tokenized form of it (with FN being
780 an appropriate interpreter). */
781 const char * str;
782 #define CGEN_MIEXPN_STR(ex) ((ex)->str)
783 } CGEN_MINSN_EXPANSION;
784
785 /* Normal expander.
786 When supported, this function will convert the input string to another
787 string and the parser will be invoked recursively. The output string
788 may contain further macro invocations. */
789
790 extern const char * cgen_expand_macro_insn
791 PARAMS ((CGEN_OPCODE_DESC, const struct cgen_minsn_expansion *,
792 const char *, const char **, int *, CGEN_OPERAND **));
793 \f
794 /* The assembler insn table is hashed based on some function of the mnemonic
795 (the actually hashing done is up to the target, but we provide a few
796 examples like the first letter or a function of the entire mnemonic). */
797
798 #ifndef CGEN_ASM_HASH_P
799 #define CGEN_ASM_HASH_P(insn) 1
800 #endif
801
802 /* INSN is the CGEN_INSN entry when building the hash table and NULL
803 when looking up the insn during assembly. */
804 #ifndef CGEN_ASM_HASH
805 #define CGEN_ASM_HASH_SIZE 127
806 #ifdef CGEN_MNEMONIC_OPERANDS
807 #define CGEN_ASM_HASH(mnem) (*(unsigned char *) (mnem) % CGEN_ASM_HASH_SIZE)
808 #else
809 #define CGEN_ASM_HASH(mnem) (*(unsigned char *) (mnem) % CGEN_ASM_HASH_SIZE) /*FIXME*/
810 #endif
811 #endif
812
813 extern CGEN_INSN_LIST * cgen_asm_lookup_insn
814 PARAMS ((CGEN_OPCODE_DESC, const char *));
815 #define CGEN_ASM_LOOKUP_INSN(od, string) cgen_asm_lookup_insn ((od), (string))
816 #define CGEN_ASM_NEXT_INSN(insn) ((insn)->next)
817
818 /* The disassembler insn table is hashed based on some function of machine
819 instruction (the actually hashing done is up to the target). */
820
821 #ifndef CGEN_DIS_HASH_P
822 #define CGEN_DIS_HASH_P(insn) 1
823 #endif
824
825 /* It doesn't make much sense to provide a default here,
826 but while this is under development we do.
827 INSN is the CGEN_INSN entry when building the hash table and NULL
828 when looking up the insn during assembly.
829 BUFFER is a pointer to the bytes of the insn.
830 VALUE is the first CGEN_BASE_INSN_SIZE bytes as an int in host order. */
831 #ifndef CGEN_DIS_HASH
832 #define CGEN_DIS_HASH_SIZE 256
833 #define CGEN_DIS_HASH(buffer, value) (*(unsigned char *) (buffer))
834 #endif
835
836 extern CGEN_INSN_LIST * cgen_dis_lookup_insn
837 PARAMS ((CGEN_OPCODE_DESC, const char *, unsigned long));
838 #define CGEN_DIS_LOOKUP_INSN(od, buf, value) cgen_dis_lookup_insn ((od), (buf), (value))
839 #define CGEN_DIS_NEXT_INSN(insn) ((insn)->next)
840 \f
841 /* The opcode table.
842 A copy of this is created when the opcode table is "opened".
843 All global state information is recorded here. */
844 /* ??? This is all low level implementation stuff here that might be better
845 put in an internal file (much like the distinction between bfd.h and
846 libbfd.h). That is an extra complication that is left for later. */
847
848 typedef struct cgen_opcode_table
849 {
850 const CGEN_HW_ENTRY * hw_list;
851 #define CGEN_OPCODE_HW_LIST(od) ((od)->hw_list)
852
853 const CGEN_OPERAND * operand_table;
854 #define CGEN_OPCODE_OPERAND_TABLE(od) ((od)->operand_table)
855
856 CGEN_INSN_TABLE insn_table;
857 #define CGEN_OPCODE_INSN_TABLE(od) (& (od)->insn_table)
858
859 /* Macro instructions are defined separately and are combined with real
860 insns during hash table computation. */
861 CGEN_INSN_TABLE macro_insn_table;
862 #define CGEN_OPCODE_MACRO_INSN_TABLE(od) (& (od)->macro_insn_table)
863
864 /* Return non-zero if insn should be added to hash table. */
865 int (* asm_hash_p) PARAMS ((const CGEN_INSN *));
866 #define CGEN_OPCODE_ASM_HASH_P(od) ((od)->asm_hash_p)
867
868 /* Assembler hash function. */
869 unsigned int (* asm_hash) PARAMS ((const char *));
870 #define CGEN_OPCODE_ASM_HASH(od) ((od)->asm_hash)
871
872 /* Number of entries in assembler hash table. */
873 unsigned int asm_hash_size;
874 #define CGEN_OPCODE_ASM_HASH_SIZE(od) ((od)->asm_hash_size)
875
876 /* Return non-zero if insn should be added to hash table. */
877 int (* dis_hash_p) PARAMS ((const CGEN_INSN *));
878 #define CGEN_OPCODE_DIS_HASH_P(od) ((od)->dis_hash_p)
879
880 /* Disassembler hash function. */
881 unsigned int (* dis_hash) PARAMS ((const char *, unsigned long));
882 #define CGEN_OPCODE_DIS_HASH(od) ((od)->dis_hash)
883
884 /* Number of entries in disassembler hash table. */
885 unsigned int dis_hash_size;
886 #define CGEN_OPCODE_DIS_HASH_SIZE(od) ((od)->dis_hash_size)
887
888 /* Operand parser callback. */
889 cgen_parse_operand_fn * parse_operand_fn;
890 #define CGEN_OPCODE_PARSE_OPERAND_FN(od) ((od)->parse_operand_fn)
891
892 /* Current machine (a la BFD machine number). */
893 int mach;
894 #define CGEN_OPCODE_MACH(od) ((od)->mach)
895
896 /* Current endian. */
897 enum cgen_endian endian;
898 #define CGEN_OPCODE_ENDIAN(od) ((od)->endian)
899
900 /* Assembler instruction hash table. */
901 CGEN_INSN_LIST **asm_hash_table;
902 #define CGEN_OPCODE_ASM_HASH_TABLE(od) ((od)->asm_hash_table)
903 CGEN_INSN_LIST *asm_hash_table_entries;
904 #define CGEN_OPCODE_ASM_HASH_TABLE_ENTRIES(od) ((od)->asm_hash_table_entries)
905
906 /* Disassembler instruction hash table. */
907 CGEN_INSN_LIST ** dis_hash_table;
908 #define CGEN_OPCODE_DIS_HASH_TABLE(od) ((od)->dis_hash_table)
909 CGEN_INSN_LIST * dis_hash_table_entries;
910 #define CGEN_OPCODE_DIS_HASH_TABLE_ENTRIES(od) ((od)->dis_hash_table_entries)
911
912 } CGEN_OPCODE_TABLE;
913 \f
914 /* Prototypes of major functions. */
915
916 /* Open an opcode table for use. */
917 extern CGEN_OPCODE_DESC CGEN_SYM (opcode_open)
918 PARAMS ((int, enum cgen_endian));
919 /* Close it. */
920 extern void CGEN_SYM (opcode_close) PARAMS ((CGEN_OPCODE_DESC));
921
922 /* `init_tables' must be called before `xxx_supported'. */
923 extern void CGEN_SYM (init_tables) PARAMS ((int));
924
925 /* Initialize an opcode table for assembler or disassembler use.
926 These must be called immediately after opcode_open. */
927 extern void CGEN_SYM (init_asm) PARAMS ((CGEN_OPCODE_DESC));
928 extern void CGEN_SYM (init_dis) PARAMS ((CGEN_OPCODE_DESC));
929
930 /* Change the mach and/or endianness. */
931 extern void cgen_set_cpu PARAMS ((CGEN_OPCODE_DESC, int, enum cgen_endian));
932
933 /* FIXME: This prototype is wrong ifndef CGEN_INT_INSN.
934 Furthermore, ifdef CGEN_INT_INSN, the insn is created in
935 target byte order (in which case why use int's at all).
936 Perhaps replace cgen_insn_t * with char *? */
937 extern const CGEN_INSN * CGEN_SYM (assemble_insn)
938 PARAMS ((CGEN_OPCODE_DESC, const char *, CGEN_FIELDS *, cgen_insn_t *, char **));
939 #if 0 /* old */
940 extern int CGEN_SYM (insn_supported) PARAMS ((const CGEN_INSN *));
941 extern int CGEN_SYM (opval_supported) PARAMS ((const struct cgen_opval *));
942 #endif
943
944 extern const CGEN_KEYWORD CGEN_SYM (operand_mach);
945 extern int CGEN_SYM (get_mach) PARAMS ((const char *));
946
947 extern const CGEN_INSN * CGEN_SYM (lookup_insn)
948 PARAMS ((CGEN_OPCODE_DESC, const CGEN_INSN *,
949 cgen_insn_t, int, CGEN_FIELDS *, int));
950 extern void CGEN_SYM (get_insn_operands)
951 PARAMS ((CGEN_OPCODE_DESC, const CGEN_INSN *, const CGEN_FIELDS *, int *));
952 extern const CGEN_INSN * CGEN_SYM (lookup_get_insn_operands)
953 PARAMS ((CGEN_OPCODE_DESC, const CGEN_INSN *, cgen_insn_t, int, int *));
954
955 /* Get/set fields in the CGEN_FIELDS struct. */
956 int CGEN_SYM (get_int_operand)
957 PARAMS ((int, const CGEN_FIELDS *));
958 void CGEN_SYM (set_int_operand)
959 PARAMS ((int, CGEN_FIELDS *, int));
960 #ifdef BFD_VERSION /* Don't require bfd.h unnecessarily. */
961 bfd_vma CGEN_SYM (get_vma_operand)
962 PARAMS ((int, const CGEN_FIELDS *));
963 void CGEN_SYM (set_vma_operand)
964 PARAMS ((int, CGEN_FIELDS *, bfd_vma));
965 #endif
966
967 extern const char * CGEN_SYM (parse_operand)
968 PARAMS ((CGEN_OPCODE_DESC, int, const char **, CGEN_FIELDS *));
969
970 #ifdef BFD_VERSION /* Don't require bfd.h unnecessarily. */
971 extern const char * CGEN_SYM (insert_operand)
972 PARAMS ((CGEN_OPCODE_DESC, int, CGEN_FIELDS *, char *, bfd_vma));
973 #endif
974
975 /* Read in a cpu description file. */
976 extern const char * cgen_read_cpu_file
977 PARAMS ((CGEN_OPCODE_DESC, const char * /*filename*/));
978
979 #endif /* CGEN_H */