libgcc/config/riscv/value-unwind.h

   1 /* Store register values as _Unwind_Word type in DWARF2 EH unwind context.
   2    Copyright (C) 2023-2024 Free Software Foundation, Inc.
   3
   4    This file is part of GCC.
   5
   6    GCC is free software; you can redistribute it and/or modify it
   7    under the terms of the GNU General Public License as published
   8    by the Free Software Foundation; either version 3, or (at your
   9    option) any later version.
  10
  11    GCC is distributed in the hope that it will be useful, but WITHOUT
  12    ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
  13    or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
  14    License for more details.
  15
  16    Under Section 7 of GPL version 3, you are granted additional
  17    permissions described in the GCC Runtime Library Exception, version
  18    3.1, as published by the Free Software Foundation.
  19
  20    You should have received a copy of the GNU General Public License and
  21    a copy of the GCC Runtime Library Exception along with this program;
  22    see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
  23    <http://www.gnu.org/licenses/>.  */
  24
  25 /* Return the value of the VLENB register.  This should only be
  26    called if we know this is an vector extension enabled RISC-V host.  */
  27 static inline long
  28 riscv_vlenb (void)
  29 {
  30   register long vlenb asm ("a0");
  31   /* 0xc2202573 == csrr a0, 0xc22 */
  32   asm (".insn 0xc2202573" : "=r"(vlenb));
  33   return vlenb;
  34 }
  35
  36 /* Lazily provide a value for VLENB, so that we don't try to execute RVV
  37    instructions unless we know they're needed.  */
  38 #define DWARF_LAZY_REGISTER_VALUE(REGNO, VALUE) \
  39   ((REGNO) == RISCV_DWARF_VLENB && ((*VALUE) = riscv_vlenb (), 1))