opcodes/ChangeLog

   1 2020-08-24  Cooper Qu  <cooper.qu@linux.alibaba.com>
   2
   3         * csky-dis.c (csky_find_inst_info): Skip CK860's instructions
   4         in other CPUs to speed up disassembling.
   5         * csky-opc.h (csky_v2_opcodes): Add CK860's instructions,
   6         Change plsli.u16 to plsli.16, change sync's operand format.
   7
   8 2020-08-21  Cooper Qu  <cooper.qu@linux.alibaba.com>
   9
  10         * csky-opc.h (csky_v2_opcodes): Add instruction bnezad.
  11
  12 2020-08-21  Nick Clifton  <nickc@redhat.com>
  13
  14         * aarch64-dis.c (get_sym_code_type): Return FALSE for non-ELF
  15         symbols.
  16
  17 2020-08-21  Cooper Qu  <cooper.qu@linux.alibaba.com>
  18
  19         * csky-opc.h (csky_v2_opcodes): Add two operands form for bloop.
  20
  21 2020-08-19  Alan Modra  <amodra@gmail.com>
  22
  23         * ppc-opc.c (powerpc_opcodes): Replace OBF with BF for vcmpsq,
  24         vcmpuq and xvtlsbb.
  25
  26 2020-08-18  Peter Bergner  <bergner@linux.ibm.com>
  27
  28         * ppc-opc.c (powerpc_opcodes) <xvcvbf16sp>: Rename from this...
  29         <xvcvbf16spn>: ...to this.
  30
  31 2020-08-12  Alex Coplan  <alex.coplan@arm.com>
  32
  33         * aarch64-opc.c (aarch64_sys_regs): Add MPAM registers.
  34
  35 2020-08-12  Nick Clifton  <nickc@redhat.com>
  36
  37         * po/sr.po: Updated Serbian translation.
  38
  39 2020-08-11  Alan Modra  <amodra@gmail.com>
  40
  41         * ppc-opc.c (powerpc_opcodes): Move cctpl, cctpm and cctph.
  42
  43 2020-08-10  Przemyslaw Wirkus  <przemyslaw.wirkus@arm.com>
  44
  45         * aarch64-opc.c (aarch64_print_operand):
  46         (aarch64_sys_reg_deprecated_p): Functions paramaters changed.
  47         (aarch64_sys_reg_supported_p): Function removed.
  48         (aarch64_sys_ins_reg_supported_p): Functions paramaters changed.
  49         (aarch64_sys_ins_reg_supported_p): Merged aarch64_sys_reg_supported_p
  50         into this function.
  51
  52 2020-08-10  Alan Modra  <amodra@gmail.com>
  53
  54         * ppc-opc.c (powerpc_opcodes): Add many mtspr and mfspr extended
  55         instructions.
  56
  57 2020-08-10  Alan Modra  <amodra@gmail.com>
  58
  59         * ppc-opc.c (powerpc_opcodes): Add exser, msgsndu, msgclru.
  60         Enable icbt for power5, miso for power8.
  61
  62 2020-08-10  Alan Modra  <amodra@gmail.com>
  63
  64         * ppc-opc.c (powerpc_opcodes): Prioritise mtfprd and mtvrd over
  65         mtvsrd, and similarly for mfvsrd.
  66
  67 2020-08-04  Christian Groessler  <chris@groessler.org>
  68             Tadashi G. Takaoka <tadashi.g.takaoka@gmail.com>
  69
  70         * z8kgen.c (opt): Fix "sout imm16,rs" and "soutb imm16,rbs"
  71         opcodes (special "out" to absolute address).
  72         * z8k-opc.h: Regenerate.
  73
  74 2020-07-30  H.J. Lu  <hongjiu.lu@intel.com>
  75
  76         PR gas/26305
  77         * i386-opc.h (Prefix_Disp8): New.
  78         (Prefix_Disp16): Likewise.
  79         (Prefix_Disp32): Likewise.
  80         (Prefix_Load): Likewise.
  81         (Prefix_Store): Likewise.
  82         (Prefix_VEX): Likewise.
  83         (Prefix_VEX3): Likewise.
  84         (Prefix_EVEX): Likewise.
  85         (Prefix_REX): Likewise.
  86         (Prefix_NoOptimize): Likewise.
  87         * i386-opc.tbl: Use Prefix_XXX on pseudo prefixes.  Add {disp16}.
  88         * i386-tbl.h: Regenerated.
  89
  90 2020-07-29  Andreas Arnez  <arnez@linux.ibm.com>
  91
  92         * s390-mkopc.c (insertExpandedMnemonic): Handle unreachable
  93         default case with abort() instead of printing an error message and
  94         continuing, to avoid a maybe-uninitialized warning.
  95
  96 2020-07-24  Nick Clifton  <nickc@redhat.com>
  97
  98         * po/de.po: Updated German translation.
  99
 100 2020-07-21  Jan Beulich  <jbeulich@suse.com>
 101
 102         * i386-dis.c (OP_E_memory): Revert previous change.
 103
 104 2020-07-15  H.J. Lu  <hongjiu.lu@intel.com>
 105
 106         PR gas/26237
 107         * i386-dis.c (OP_E_memory): Don't display eiz with no scale
 108         without base nor index registers.
 109
 110 2020-07-15  Jan Beulich  <jbeulich@suse.com>
 111
 112         * i386-dis.c (putop): Move 'V' and 'W' handling.
 113
 114 2020-07-15  Jan Beulich  <jbeulich@suse.com>
 115
 116         * i386-dis.c (dis386): Adjust 'V' description. Use P-based
 117         construct for push/pop of register.
 118         (putop): Honor cond when handling 'P'. Drop handling of plain
 119         'V'.
 120
 121 2020-07-15  Jan Beulich  <jbeulich@suse.com>
 122
 123         * i386-dis.c (dis386): Adjust 'P', 'T', 'U', and '@'
 124         description. Drop '&' description. Use P for push of immediate,
 125         pushf/popf, enter, and leave. Use %LP for lret/retf.
 126         (dis386_twobyte): Use P for push/pop of fs/gs.
 127         (reg_table): Use P for push/pop. Use @ for near call/jmp.
 128         (x86_64_table): Use P for far call/jmp.
 129         (putop): Drop handling of 'U' and '&'. Move and adjust handling
 130         of '@'. Adjust handling of 'P' and 'T'. Drop case_P and case_Q
 131         labels.
 132         (OP_J): Drop marking of REX_W as used for v_mode (ISA-dependent)
 133         and dqw_mode (unconditional).
 134
 135 2020-07-14  H.J. Lu  <hongjiu.lu@intel.com>
 136
 137         PR gas/26237
 138         * i386-dis.c (OP_E_memory): Without base nor index registers,
 139         32-bit displacement to 64 bits.
 140
 141 2020-07-14  Claudiu Zissulescu  <claziss@gmail.com>
 142
 143         * arc-dis.c (print_insn_arc): Detect and emit a warning when a
 144         faulty double register pair is detected.
 145
 146 2020-07-14  Jan Beulich  <jbeulich@suse.com>
 147
 148         * i386-dis.c (OP_D): Print dr<N> instead of db<N> in Intel mode.
 149
 150 2020-07-14  Jan Beulich  <jbeulich@suse.com>
 151
 152         * i386-dis.c (OP_R, Rm): Delete.
 153         (MOD_0F24, MOD_0F26): Rename to ...
 154         (X86_64_0F24, X86_64_0F26): ... respectively.
 155         (dis386): Update 'L' and 'Z' comments.
 156         (dis386_twobyte): Replace Rm by Em. Change opcode 0F24 and 0F26
 157         table references.
 158         (mod_table): Move opcode 0F24 and 0F26 entries ...
 159         (x86_64_table): ... here.
 160         (putop): Drop handling of 'L'. Set modrm.mod to 3 for 'Z'. Move
 161         'Z' case block.
 162
 163 2020-07-14  Jan Beulich  <jbeulich@suse.com>
 164
 165         * i386-dis.c (Rd, Rdq, MaskR): Delete.
 166         (MOD_EVEX_0F3828_P_1, MOD_EVEX_0F382A_P_1_W_1,
 167         MOD_EVEX_0F3838_P_1, MOD_EVEX_0F383A_P_1_W_0,
 168         MOD_EVEX_0F387A_W_0, MOD_EVEX_0F387B_W_0,
 169         MOD_EVEX_0F387C): New enumerators.
 170         (reg_table): Use Edq for rdssp.
 171         (prefix_table): Use Edq for incssp.
 172         (mod_table): Use Rm for move to/from %tr. Use MaskE for kand*,
 173         kandn*, knot*, kor*, kxnor*, kxor*, kadd*, kunpck*, kortest*,
 174         ktest*, and kshift*. Use Edq / MaskE for kmov*.
 175         * i386-dis-evex.h: Reference mod_table[] for opcode 0F387C.
 176         * i386-dis-evex-mod.h: New entries for opcodes 0F3828, 0F382A,
 177         0F3838, 0F383A, 0F387A, 0F387B, and 0F387C.
 178         * i386-dis-evex-prefix.h: Reference mod_table[] for opcodes
 179         0F3828_P_1 and 0F3838_P_1.
 180         * i386-dis-evex-w.h: Reference mod_table[] for opcodes
 181         0F382A_P_1, 0F383A_P_1, 0F387A, and 0F387B.
 182
 183 2020-07-14  Jan Beulich  <jbeulich@suse.com>
 184
 185         * i386-dis.c (PREFIX_0F01_REG_7_MOD_3_RM_3,
 186         PREFIX_0FAE_REG_5_MOD_0, PREFIX_0FC3_MOD_0, PREFIX_0F38C8,
 187         PREFIX_0F38C9, PREFIX_0F38CA, PREFIX_0F38CB, PREFIX_0F38CC,
 188         PREFIX_0F38CD, PREFIX_0F38F9, PREFIX_0F3ACC, PREFIX_VEX_0F77,
 189         PREFIX_VEX_0F38F2, PREFIX_VEX_0F38F3_REG_1,
 190         PREFIX_VEX_0F38F3_REG_2, PREFIX_VEX_0F38F3_REG_3): Delete.
 191         (MOD_0F38F9_PREFIX_0, VEX_LEN_0F77_P_0, VEX_LEN_0F38F2_P_0,
 192         VEX_LEN_0F38F3_R_1_P_0, VEX_LEN_0F38F3_R_2_P_0,
 193         VEX_LEN_0F38F3_R_3_P_0): Rename to ...
 194         (MOD_0F38F9, VEX_LEN_0F77, VEX_LEN_0F38F2, VEX_LEN_0F38F3_R_1,
 195         VEX_LEN_0F38F3_R_2, VEX_LEN_0F38F3_R_3): ... these respectively.
 196         (reg_table, prefix_table, three_byte_table, vex_table,
 197         vex_len_table, mod_table, rm_table): Replace / remove respective
 198         entries.
 199         (intel_operand_size, OP_E_register, OP_G): Avoid undue setting
 200         of PREFIX_DATA in used_prefixes.
 201
 202 2020-07-14  Jan Beulich  <jbeulich@suse.com>
 203
 204         * i386-dis.c (MOD_VEX_0F3A30_L_0_W_0, MOD_VEX_0F3A30_L_0_W_1,
 205         MOD_VEX_0F3A31_L_0_W_0, MOD_VEX_0F3A31_L_0_W_1,
 206         MOD_VEX_0F3A32_L_0_W_0, MOD_VEX_0F3A32_L_0_W_1,
 207         MOD_VEX_0F3A33_L_0_W_0, MOD_VEX_0F3A33_L_0_W_1): Replace by ...
 208         (MOD_VEX_0F3A30_L_0, MOD_VEX_0F3A31_L_0,
 209         MOD_VEX_0F3A32_L_0, MOD_VEX_0F3A33_L_0): ... these.
 210         (VEX_W_0F3A30_L_0, VEX_W_0F3A31_L_0, VEX_W_0F3A32_L_0,
 211         VEX_W_0F3A33_L_0): Delete.
 212         (dis386): Adjust "BW" description.
 213         (vex_len_table): Refer to mod_table[] for opcodes 0F3A30,
 214         0F3A31, 0F3A32, and 0F3A33.
 215         (vex_w_table): Delete opcode 0F3A30, 0F3A31, 0F3A32, and 0F3A33
 216         entries.
 217         (mod_table): Replace opcode 0F3A30, 0F3A31, 0F3A32, and 0F3A33
 218         entries.
 219
 220 2020-07-14  Jan Beulich  <jbeulich@suse.com>
 221
 222         * i386-dis.c (PREFIX_0F6C, PREFIX_0F6D, PREFIX_0F73_REG_3,
 223         PREFIX_0F73_REG_7, PREFIX_0F3810, PREFIX_0F3814, PREFIX_0F3815,
 224         PREFIX_0F3817, PREFIX_0F3820, PREFIX_0F3821, PREFIX_0F3822,
 225         PREFIX_0F3823, PREFIX_0F3824, PREFIX_0F3825, PREFIX_0F3828,
 226         PREFIX_0F3829, PREFIX_0F382A, PREFIX_0F382B, PREFIX_0F3830,
 227         PREFIX_0F3831, PREFIX_0F3832, PREFIX_0F3833, PREFIX_0F3834,
 228         PREFIX_0F3835, PREFIX_0F3837, PREFIX_0F3838, PREFIX_0F3839,
 229         PREFIX_0F383A, PREFIX_0F383B, PREFIX_0F383C, PREFIX_0F383D,
 230         PREFIX_0F383E, PREFIX_0F383F, PREFIX_0F3840, PREFIX_0F3841,
 231         PREFIX_0F3880, PREFIX_0F3881, PREFIX_0F3882, PREFIX_0F38CF,
 232         PREFIX_0F38DB, PREFIX_0F38DC, PREFIX_0F38DD, PREFIX_0F38DE,
 233         PREFIX_0F38DF, PREFIX_0F38F5, PREFIX_0F3A08, PREFIX_0F3A09,
 234         PREFIX_0F3A0A, PREFIX_0F3A0B, PREFIX_0F3A0C, PREFIX_0F3A0D,
 235         PREFIX_0F3A0E, PREFIX_0F3A14, PREFIX_0F3A15, PREFIX_0F3A16,
 236         PREFIX_0F3A17, PREFIX_0F3A20, PREFIX_0F3A21, PREFIX_0F3A22,
 237         PREFIX_0F3A40, PREFIX_0F3A41, PREFIX_0F3A42, PREFIX_0F3A44,
 238         PREFIX_0F3A60, PREFIX_0F3A61, PREFIX_0F3A62, PREFIX_0F3A63,
 239         PREFIX_0F3ACE, PREFIX_0F3ACF, PREFIX_0F3ADF, PREFIX_VEX_0F60,
 240         PREFIX_VEX_0F61, PREFIX_VEX_0F62, PREFIX_VEX_0F63,
 241         PREFIX_VEX_0F64, PREFIX_VEX_0F65, PREFIX_VEX_0F66,
 242         PREFIX_VEX_0F67, PREFIX_VEX_0F68, PREFIX_VEX_0F69,
 243         PREFIX_VEX_0F6A, PREFIX_VEX_0F6B, PREFIX_VEX_0F6C,
 244         PREFIX_VEX_0F6D, PREFIX_VEX_0F6E, PREFIX_VEX_0F71_REG_2,
 245         PREFIX_VEX_0F71_REG_4, PREFIX_VEX_0F71_REG_6,
 246         PREFIX_VEX_0F72_REG_2, PREFIX_VEX_0F72_REG_4,
 247         PREFIX_VEX_0F72_REG_6, PREFIX_VEX_0F73_REG_2,
 248         PREFIX_VEX_0F73_REG_3, PREFIX_VEX_0F73_REG_6,
 249         PREFIX_VEX_0F73_REG_7, PREFIX_VEX_0F74,
 250         PREFIX_VEX_0F75, PREFIX_VEX_0F76, PREFIX_VEX_0FC4,
 251         PREFIX_VEX_0FC5, PREFIX_VEX_0FD1, PREFIX_VEX_0FD2,
 252         PREFIX_VEX_0FD3, PREFIX_VEX_0FD4, PREFIX_VEX_0FD5,
 253         PREFIX_VEX_0FD6, PREFIX_VEX_0FD7, PREFIX_VEX_0FD8,
 254         PREFIX_VEX_0FD9, PREFIX_VEX_0FDA, PREFIX_VEX_0FDB,
 255         PREFIX_VEX_0FDC, PREFIX_VEX_0FDD, PREFIX_VEX_0FDE,
 256         PREFIX_VEX_0FDF, PREFIX_VEX_0FE0, PREFIX_VEX_0FE1,
 257         PREFIX_VEX_0FE2, PREFIX_VEX_0FE3, PREFIX_VEX_0FE4,
 258         PREFIX_VEX_0FE5, PREFIX_VEX_0FE7, PREFIX_VEX_0FE8,
 259         PREFIX_VEX_0FE9, PREFIX_VEX_0FEA, PREFIX_VEX_0FEB,
 260         PREFIX_VEX_0FEC, PREFIX_VEX_0FED, PREFIX_VEX_0FEE,
 261         PREFIX_VEX_0FEF, PREFIX_VEX_0FF1, PREFIX_VEX_0FF2,
 262         PREFIX_VEX_0FF3, PREFIX_VEX_0FF4, PREFIX_VEX_0FF5,
 263         PREFIX_VEX_0FF6, PREFIX_VEX_0FF7, PREFIX_VEX_0FF8,
 264         PREFIX_VEX_0FF9, PREFIX_VEX_0FFA, PREFIX_VEX_0FFB,
 265         PREFIX_VEX_0FFC, PREFIX_VEX_0FFD, PREFIX_VEX_0FFE,
 266         PREFIX_VEX_0F3800, PREFIX_VEX_0F3801, PREFIX_VEX_0F3802,
 267         PREFIX_VEX_0F3803, PREFIX_VEX_0F3804, PREFIX_VEX_0F3805,
 268         PREFIX_VEX_0F3806, PREFIX_VEX_0F3807, PREFIX_VEX_0F3808,
 269         PREFIX_VEX_0F3809, PREFIX_VEX_0F380A, PREFIX_VEX_0F380B,
 270         PREFIX_VEX_0F380C, PREFIX_VEX_0F380D, PREFIX_VEX_0F380E,
 271         PREFIX_VEX_0F380F, PREFIX_VEX_0F3813, PREFIX_VEX_0F3816,
 272         PREFIX_VEX_0F3817, PREFIX_VEX_0F3818, PREFIX_VEX_0F3819,
 273         PREFIX_VEX_0F381A, PREFIX_VEX_0F381C, PREFIX_VEX_0F381D,
 274         PREFIX_VEX_0F381E, PREFIX_VEX_0F3820, PREFIX_VEX_0F3821,
 275         PREFIX_VEX_0F3822, PREFIX_VEX_0F3823, PREFIX_VEX_0F3824,
 276         PREFIX_VEX_0F3825, PREFIX_VEX_0F3828, PREFIX_VEX_0F3829,
 277         PREFIX_VEX_0F382A, PREFIX_VEX_0F382B, PREFIX_VEX_0F382C,
 278         PREFIX_VEX_0F382D, PREFIX_VEX_0F382E, PREFIX_VEX_0F382F,
 279         PREFIX_VEX_0F3830, PREFIX_VEX_0F3831, PREFIX_VEX_0F3832,
 280         PREFIX_VEX_0F3833, PREFIX_VEX_0F3834, PREFIX_VEX_0F3835,
 281         PREFIX_VEX_0F3836, PREFIX_VEX_0F3837, PREFIX_VEX_0F3838,
 282         PREFIX_VEX_0F3839, PREFIX_VEX_0F383A, PREFIX_VEX_0F383B,
 283         PREFIX_VEX_0F383C, PREFIX_VEX_0F383D, PREFIX_VEX_0F383E,
 284         PREFIX_VEX_0F383F, PREFIX_VEX_0F3840, PREFIX_VEX_0F3841,
 285         PREFIX_VEX_0F3845, PREFIX_VEX_0F3846, PREFIX_VEX_0F3847,
 286         PREFIX_VEX_0F3858, PREFIX_VEX_0F3859, PREFIX_VEX_0F385A,
 287         PREFIX_VEX_0F3878, PREFIX_VEX_0F3879, PREFIX_VEX_0F388C,
 288         PREFIX_VEX_0F388E, PREFIX_VEX_0F3890, PREFIX_VEX_0F3891,
 289         PREFIX_VEX_0F3892, PREFIX_VEX_0F3893, PREFIX_VEX_0F3896,
 290         PREFIX_VEX_0F3897, PREFIX_VEX_0F3898, PREFIX_VEX_0F3899,
 291         PREFIX_VEX_0F389A, PREFIX_VEX_0F389B, PREFIX_VEX_0F389C,
 292         PREFIX_VEX_0F389D, PREFIX_VEX_0F389E, PREFIX_VEX_0F389F,
 293         PREFIX_VEX_0F38A6, PREFIX_VEX_0F38A7, PREFIX_VEX_0F38A8,
 294         PREFIX_VEX_0F38A9, PREFIX_VEX_0F38AA, PREFIX_VEX_0F38AB,
 295         PREFIX_VEX_0F38AC, PREFIX_VEX_0F38AD, PREFIX_VEX_0F38AE,
 296         PREFIX_VEX_0F38AF, PREFIX_VEX_0F38B6, PREFIX_VEX_0F38B7,
 297         PREFIX_VEX_0F38B8, PREFIX_VEX_0F38B9, PREFIX_VEX_0F38BA,
 298         PREFIX_VEX_0F38BB, PREFIX_VEX_0F38BC, PREFIX_VEX_0F38BD,
 299         PREFIX_VEX_0F38BE, PREFIX_VEX_0F38BF, PREFIX_VEX_0F38CF,
 300         PREFIX_VEX_0F38DB, PREFIX_VEX_0F38DC, PREFIX_VEX_0F38DD,
 301         PREFIX_VEX_0F38DE, PREFIX_VEX_0F38DF, PREFIX_VEX_0F3A00,
 302         PREFIX_VEX_0F3A01, PREFIX_VEX_0F3A02, PREFIX_VEX_0F3A04,
 303         PREFIX_VEX_0F3A05, PREFIX_VEX_0F3A06, PREFIX_VEX_0F3A08,
 304         PREFIX_VEX_0F3A09, PREFIX_VEX_0F3A0A, PREFIX_VEX_0F3A0B,
 305         PREFIX_VEX_0F3A0C, PREFIX_VEX_0F3A0D, PREFIX_VEX_0F3A0E,
 306         PREFIX_VEX_0F3A0F, PREFIX_VEX_0F3A14, PREFIX_VEX_0F3A15,
 307         PREFIX_VEX_0F3A16, PREFIX_VEX_0F3A17, PREFIX_VEX_0F3A18,
 308         PREFIX_VEX_0F3A19, PREFIX_VEX_0F3A1D, PREFIX_VEX_0F3A20,
 309         PREFIX_VEX_0F3A21, PREFIX_VEX_0F3A22, PREFIX_VEX_0F3A30,
 310         PREFIX_VEX_0F3A31, PREFIX_VEX_0F3A32, PREFIX_VEX_0F3A33,
 311         PREFIX_VEX_0F3A38, PREFIX_VEX_0F3A39, PREFIX_VEX_0F3A40,
 312         PREFIX_VEX_0F3A41, PREFIX_VEX_0F3A42, PREFIX_VEX_0F3A44,
 313         PREFIX_VEX_0F3A46, PREFIX_VEX_0F3A48, PREFIX_VEX_0F3A49,
 314         PREFIX_VEX_0F3A4A, PREFIX_VEX_0F3A4B, PREFIX_VEX_0F3A4C,
 315         PREFIX_VEX_0F3A5C, PREFIX_VEX_0F3A5D, PREFIX_VEX_0F3A5E,
 316         PREFIX_VEX_0F3A5F, PREFIX_VEX_0F3A60, PREFIX_VEX_0F3A61,
 317         PREFIX_VEX_0F3A62, PREFIX_VEX_0F3A63, PREFIX_VEX_0F3A68,
 318         PREFIX_VEX_0F3A69, PREFIX_VEX_0F3A6A, PREFIX_VEX_0F3A6B,
 319         PREFIX_VEX_0F3A6C, PREFIX_VEX_0F3A6D, PREFIX_VEX_0F3A6E,
 320         PREFIX_VEX_0F3A6F, PREFIX_VEX_0F3A78, PREFIX_VEX_0F3A79,
 321         PREFIX_VEX_0F3A7A, PREFIX_VEX_0F3A7B, PREFIX_VEX_0F3A7C,
 322         PREFIX_VEX_0F3A7D, PREFIX_VEX_0F3A7E, PREFIX_VEX_0F3A7F,
 323         PREFIX_VEX_0F3ACE, PREFIX_VEX_0F3ACF, PREFIX_VEX_0F3ADF,
 324         PREFIX_EVEX_0F64, PREFIX_EVEX_0F65, PREFIX_EVEX_0F66,
 325         PREFIX_EVEX_0F6E, PREFIX_EVEX_0F71_REG_2,
 326         PREFIX_EVEX_0F71_REG_4, PREFIX_EVEX_0F71_REG_6,
 327         PREFIX_EVEX_0F72_REG_0, PREFIX_EVEX_0F72_REG_1,
 328         PREFIX_EVEX_0F72_REG_2, PREFIX_EVEX_0F72_REG_4,
 329         PREFIX_EVEX_0F72_REG_6, PREFIX_EVEX_0F73_REG_2,
 330         PREFIX_EVEX_0F73_REG_3, PREFIX_EVEX_0F73_REG_6,
 331         PREFIX_EVEX_0F73_REG_7, PREFIX_EVEX_0F74, PREFIX_EVEX_0F75,
 332         PREFIX_EVEX_0F76, PREFIX_EVEX_0FC4, PREFIX_EVEX_0FC5,
 333         PREFIX_EVEX_0FD6, PREFIX_EVEX_0FDB, PREFIX_EVEX_0FDF,
 334         PREFIX_EVEX_0FE2, PREFIX_EVEX_0FE7, PREFIX_EVEX_0FEB,
 335         PREFIX_EVEX_0FEF, PREFIX_EVEX_0F380D, PREFIX_EVEX_0F3816,
 336         PREFIX_EVEX_0F3819, PREFIX_EVEX_0F381A, PREFIX_EVEX_0F381B,
 337         PREFIX_EVEX_0F381E, PREFIX_EVEX_0F381F, PREFIX_EVEX_0F382C,
 338         PREFIX_EVEX_0F382D, PREFIX_EVEX_0F3836, PREFIX_EVEX_0F3837,
 339         PREFIX_EVEX_0F383B, PREFIX_EVEX_0F383D, PREFIX_EVEX_0F383F,
 340         PREFIX_EVEX_0F3840, PREFIX_EVEX_0F3842, PREFIX_EVEX_0F3843,
 341         PREFIX_EVEX_0F3844, PREFIX_EVEX_0F3845, PREFIX_EVEX_0F3846,
 342         PREFIX_EVEX_0F3847, PREFIX_EVEX_0F384C, PREFIX_EVEX_0F384D,
 343         PREFIX_EVEX_0F384E, PREFIX_EVEX_0F384F, PREFIX_EVEX_0F3850,
 344         PREFIX_EVEX_0F3851, PREFIX_EVEX_0F3854, PREFIX_EVEX_0F3855,
 345         PREFIX_EVEX_0F3859, PREFIX_EVEX_0F385A, PREFIX_EVEX_0F385B,
 346         PREFIX_EVEX_0F3862, PREFIX_EVEX_0F3863, PREFIX_EVEX_0F3864,
 347         PREFIX_EVEX_0F3865, PREFIX_EVEX_0F3866, PREFIX_EVEX_0F3870,
 348         PREFIX_EVEX_0F3871, PREFIX_EVEX_0F3873, PREFIX_EVEX_0F3875,
 349         PREFIX_EVEX_0F3876, PREFIX_EVEX_0F3877, PREFIX_EVEX_0F387A,
 350         PREFIX_EVEX_0F387B, PREFIX_EVEX_0F387C, PREFIX_EVEX_0F387D,
 351         PREFIX_EVEX_0F387E, PREFIX_EVEX_0F387F, PREFIX_EVEX_0F3883,
 352         PREFIX_EVEX_0F3888, PREFIX_EVEX_0F3889, PREFIX_EVEX_0F388A,
 353         PREFIX_EVEX_0F388B, PREFIX_EVEX_0F388D, PREFIX_EVEX_0F388F,
 354         PREFIX_EVEX_0F3890, PREFIX_EVEX_0F3891, PREFIX_EVEX_0F3892,
 355         PREFIX_EVEX_0F3893, PREFIX_EVEX_0F38A0, PREFIX_EVEX_0F38A1,
 356         PREFIX_EVEX_0F38A2, PREFIX_EVEX_0F38A3, PREFIX_EVEX_0F38B4,
 357         PREFIX_EVEX_0F38B5, PREFIX_EVEX_0F38C4,
 358         PREFIX_EVEX_0F38C6_REG_1, PREFIX_EVEX_0F38C6_REG_2,
 359         PREFIX_EVEX_0F38C6_REG_5, PREFIX_EVEX_0F38C6_REG_6,
 360         PREFIX_EVEX_0F38C7_REG_1, PREFIX_EVEX_0F38C7_REG_2,
 361         PREFIX_EVEX_0F38C7_REG_5, PREFIX_EVEX_0F38C7_REG_6,
 362         PREFIX_EVEX_0F38C8, PREFIX_EVEX_0F38CA, PREFIX_EVEX_0F38CB,
 363         PREFIX_EVEX_0F38CC, PREFIX_EVEX_0F38CD, PREFIX_EVEX_0F3A00,
 364         PREFIX_EVEX_0F3A01, PREFIX_EVEX_0F3A03, PREFIX_EVEX_0F3A05,
 365         PREFIX_EVEX_0F3A08, PREFIX_EVEX_0F3A09, PREFIX_EVEX_0F3A0A,
 366         PREFIX_EVEX_0F3A0B, PREFIX_EVEX_0F3A14, PREFIX_EVEX_0F3A15,
 367         PREFIX_EVEX_0F3A16, PREFIX_EVEX_0F3A17, PREFIX_EVEX_0F3A18,
 368         PREFIX_EVEX_0F3A19, PREFIX_EVEX_0F3A1A, PREFIX_EVEX_0F3A1B,
 369         PREFIX_EVEX_0F3A1E, PREFIX_EVEX_0F3A1F, PREFIX_EVEX_0F3A20,
 370         PREFIX_EVEX_0F3A21, PREFIX_EVEX_0F3A22, PREFIX_EVEX_0F3A23,
 371         PREFIX_EVEX_0F3A25, PREFIX_EVEX_0F3A26, PREFIX_EVEX_0F3A27,
 372         PREFIX_EVEX_0F3A38, PREFIX_EVEX_0F3A39, PREFIX_EVEX_0F3A3A,
 373         PREFIX_EVEX_0F3A3B, PREFIX_EVEX_0F3A3E, PREFIX_EVEX_0F3A3F,
 374         PREFIX_EVEX_0F3A42, PREFIX_EVEX_0F3A43, PREFIX_EVEX_0F3A50,
 375         PREFIX_EVEX_0F3A51, PREFIX_EVEX_0F3A54, PREFIX_EVEX_0F3A55,
 376         PREFIX_EVEX_0F3A56, PREFIX_EVEX_0F3A57, PREFIX_EVEX_0F3A66,
 377         PREFIX_EVEX_0F3A67, PREFIX_EVEX_0F3A70, PREFIX_EVEX_0F3A71,
 378         PREFIX_EVEX_0F3A72, PREFIX_EVEX_0F3A73): Delete.
 379         (MOD_0F382A_PREFIX_2, MOD_0F38F5_PREFIX_2,
 380         MOD_VEX_0FD7_PREFIX_2, MOD_VEX_0FE7_PREFIX_2,
 381         MOD_VEX_0F381A_PREFIX_2, MOD_VEX_0F382A_PREFIX_2,
 382         MOD_VEX_0F382C_PREFIX_2, MOD_VEX_0F382D_PREFIX_2,
 383         MOD_VEX_0F382E_PREFIX_2, MOD_VEX_0F382F_PREFIX_2,
 384         MOD_VEX_0F385A_PREFIX_2, MOD_VEX_0F388C_PREFIX_2,
 385         MOD_VEX_0F388E_PREFIX_2, MOD_VEX_W_0_0F3A30_P_2_LEN_0,
 386         MOD_VEX_W_1_0F3A30_P_2_LEN_0, MOD_VEX_W_0_0F3A31_P_2_LEN_0,
 387         MOD_VEX_W_1_0F3A31_P_2_LEN_0, MOD_VEX_W_0_0F3A32_P_2_LEN_0,
 388         MOD_VEX_W_1_0F3A32_P_2_LEN_0, MOD_VEX_W_0_0F3A33_P_2_LEN_0,
 389         MOD_VEX_W_1_0F3A33_P_2_LEN_0, MOD_EVEX_0F381A_P_2_W_0,
 390         MOD_EVEX_0F381A_P_2_W_1, MOD_EVEX_0F381B_P_2_W_0,
 391         MOD_EVEX_0F381B_P_2_W_1, MOD_EVEX_0F385A_P_2_W_0,
 392         MOD_EVEX_0F385A_P_2_W_1, MOD_EVEX_0F385B_P_2_W_0,
 393         MOD_EVEX_0F385B_P_2_W_1, VEX_LEN_0F6E_P_2,
 394         VEX_LEN_0FC4_P_2, VEX_LEN_0FC5_P_2, VEX_LEN_0FD6_P_2,
 395         VEX_LEN_0FF7_P_2, VEX_LEN_0F3816_P_2, VEX_LEN_0F3819_P_2,
 396         VEX_LEN_0F381A_P_2_M_0, VEX_LEN_0F3836_P_2,
 397         VEX_LEN_0F3841_P_2, VEX_LEN_0F385A_P_2_M_0,
 398         VEX_LEN_0F38DB_P_2, VEX_LEN_0F3A00_P_2, VEX_LEN_0F3A01_P_2,
 399         VEX_LEN_0F3A06_P_2, VEX_LEN_0F3A14_P_2, VEX_LEN_0F3A15_P_2,
 400         VEX_LEN_0F3A16_P_2, VEX_LEN_0F3A17_P_2, VEX_LEN_0F3A18_P_2,
 401         VEX_LEN_0F3A19_P_2, VEX_LEN_0F3A20_P_2, VEX_LEN_0F3A21_P_2,
 402         VEX_LEN_0F3A22_P_2, VEX_LEN_0F3A30_P_2, VEX_LEN_0F3A31_P_2,
 403         VEX_LEN_0F3A32_P_2, VEX_LEN_0F3A33_P_2, VEX_LEN_0F3A38_P_2,
 404         VEX_LEN_0F3A39_P_2, VEX_LEN_0F3A41_P_2, VEX_LEN_0F3A46_P_2,
 405         VEX_LEN_0F3A60_P_2, VEX_LEN_0F3A61_P_2, VEX_LEN_0F3A62_P_2,
 406         VEX_LEN_0F3A63_P_2, VEX_LEN_0F3ADF_P_2, EVEX_LEN_0F6E_P_2,
 407         EVEX_LEN_0FC4_P_2, EVEX_LEN_0FC5_P_2, EVEX_LEN_0FD6_P_2,
 408         EVEX_LEN_0F3816_P_2, EVEX_LEN_0F3819_P_2_W_0,
 409         EVEX_LEN_0F3819_P_2_W_1, EVEX_LEN_0F381A_P_2_W_0_M_0,
 410         EVEX_LEN_0F381A_P_2_W_1_M_0, EVEX_LEN_0F381B_P_2_W_0_M_0,
 411         EVEX_LEN_0F381B_P_2_W_1_M_0, EVEX_LEN_0F3836_P_2,
 412         EVEX_LEN_0F385A_P_2_W_0_M_0, EVEX_LEN_0F385A_P_2_W_1_M_0,
 413         EVEX_LEN_0F385B_P_2_W_0_M_0, EVEX_LEN_0F385B_P_2_W_1_M_0,
 414         EVEX_LEN_0F38C6_REG_1_PREFIX_2, EVEX_LEN_0F38C6_REG_2_PREFIX_2,
 415         EVEX_LEN_0F38C6_REG_5_PREFIX_2, EVEX_LEN_0F38C6_REG_6_PREFIX_2,
 416         EVEX_LEN_0F38C7_R_1_P_2_W_0, EVEX_LEN_0F38C7_R_1_P_2_W_1,
 417         EVEX_LEN_0F38C7_R_2_P_2_W_0, EVEX_LEN_0F38C7_R_2_P_2_W_1,
 418         EVEX_LEN_0F38C7_R_5_P_2_W_0, EVEX_LEN_0F38C7_R_5_P_2_W_1,
 419         EVEX_LEN_0F38C7_R_6_P_2_W_0, EVEX_LEN_0F38C7_R_6_P_2_W_1,
 420         EVEX_LEN_0F3A00_P_2_W_1, EVEX_LEN_0F3A01_P_2_W_1,
 421         EVEX_LEN_0F3A14_P_2, EVEX_LEN_0F3A15_P_2, EVEX_LEN_0F3A16_P_2,
 422         EVEX_LEN_0F3A17_P_2, EVEX_LEN_0F3A18_P_2_W_0,
 423         EVEX_LEN_0F3A18_P_2_W_1, EVEX_LEN_0F3A19_P_2_W_0,
 424         EVEX_LEN_0F3A19_P_2_W_1, EVEX_LEN_0F3A1A_P_2_W_0,
 425         EVEX_LEN_0F3A1A_P_2_W_1, EVEX_LEN_0F3A1B_P_2_W_0,
 426         EVEX_LEN_0F3A1B_P_2_W_1, EVEX_LEN_0F3A20_P_2,
 427         EVEX_LEN_0F3A21_P_2_W_0, EVEX_LEN_0F3A22_P_2,
 428         EVEX_LEN_0F3A23_P_2_W_0, EVEX_LEN_0F3A23_P_2_W_1,
 429         EVEX_LEN_0F3A38_P_2_W_0, EVEX_LEN_0F3A38_P_2_W_1,
 430         EVEX_LEN_0F3A39_P_2_W_0, EVEX_LEN_0F3A39_P_2_W_1,
 431         EVEX_LEN_0F3A3A_P_2_W_0, EVEX_LEN_0F3A3A_P_2_W_1,
 432         EVEX_LEN_0F3A3B_P_2_W_0, EVEX_LEN_0F3A3B_P_2_W_1,
 433         EVEX_LEN_0F3A43_P_2_W_0, EVEX_LEN_0F3A43_P_2_W_1
 434         VEX_W_0F380C_P_2, VEX_W_0F380D_P_2, VEX_W_0F380E_P_2,
 435         VEX_W_0F380F_P_2, VEX_W_0F3813_P_2, VEX_W_0F3816_P_2,
 436         VEX_W_0F3818_P_2, VEX_W_0F3819_P_2,
 437         VEX_W_0F381A_P_2_M_0_L_0, VEX_W_0F382C_P_2_M_0,
 438         VEX_W_0F382D_P_2_M_0, VEX_W_0F382E_P_2_M_0,
 439         VEX_W_0F382F_P_2_M_0, VEX_W_0F3836_P_2,
 440         VEX_W_0F3846_P_2, VEX_W_0F3858_P_2, VEX_W_0F3859_P_2,
 441         VEX_W_0F385A_P_2_M_0_L_0, VEX_W_0F3878_P_2,
 442         VEX_W_0F3879_P_2, VEX_W_0F38CF_P_2, VEX_W_0F3A00_P_2,
 443         VEX_W_0F3A01_P_2, VEX_W_0F3A02_P_2, VEX_W_0F3A04_P_2,
 444         VEX_W_0F3A05_P_2, VEX_W_0F3A06_P_2_L_0,
 445         VEX_W_0F3A18_P_2_L_0, VEX_W_0F3A19_P_2_L_0,
 446         VEX_W_0F3A1D_P_2, VEX_W_0F3A30_P_2_LEN_0,
 447         VEX_W_0F3A31_P_2_LEN_0, VEX_W_0F3A32_P_2_LEN_0,
 448         VEX_W_0F3A33_P_2_LEN_0, VEX_W_0F3A38_P_2_L_0,
 449         VEX_W_0F3A39_P_2_L_0, VEX_W_0F3A46_P_2_L_0,
 450         VEX_W_0F3A4A_P_2, VEX_W_0F3A4B_P_2, VEX_W_0F3A4C_P_2,
 451         VEX_W_0F3ACE_P_2, VEX_W_0F3ACF_P_2, EVEX_W_0F66_P_2,
 452         EVEX_W_0F72_R_2_P_2, EVEX_W_0F72_R_6_P_2,
 453         EVEX_W_0F73_R_2_P_2, EVEX_W_0F73_R_6_P_2,
 454         EVEX_W_0F76_P_2, EVEX_W_0FD6_P_2, EVEX_W_0FE7_P_2,
 455         EVEX_W_0F380D_P_2, EVEX_W_0F3819_P_2,
 456         EVEX_W_0F381A_P_2, EVEX_W_0F381B_P_2,
 457         EVEX_W_0F381E_P_2, EVEX_W_0F381F_P_2,
 458         EVEX_W_0F3837_P_2, EVEX_W_0F3859_P_2,
 459         EVEX_W_0F385A_P_2, EVEX_W_0F385B_P_2,
 460         EVEX_W_0F3870_P_2, EVEX_W_0F387A_P_2,
 461         EVEX_W_0F387B_P_2, EVEX_W_0F3883_P_2,
 462         EVEX_W_0F3891_P_2, EVEX_W_0F3893_P_2,
 463         EVEX_W_0F38A1_P_2, EVEX_W_0F38A3_P_2,
 464         EVEX_W_0F38C7_R_1_P_2, EVEX_W_0F38C7_R_2_P_2,
 465         EVEX_W_0F38C7_R_5_P_2, EVEX_W_0F38C7_R_6_P_2,
 466         EVEX_W_0F3A00_P_2, EVEX_W_0F3A01_P_2,
 467         EVEX_W_0F3A05_P_2, EVEX_W_0F3A08_P_2,
 468         EVEX_W_0F3A09_P_2, EVEX_W_0F3A0A_P_2,
 469         EVEX_W_0F3A0B_P_2, EVEX_W_0F3A18_P_2,
 470         EVEX_W_0F3A19_P_2, EVEX_W_0F3A1A_P_2,
 471         EVEX_W_0F3A1B_P_2, EVEX_W_0F3A21_P_2,
 472         EVEX_W_0F3A23_P_2, EVEX_W_0F3A38_P_2,
 473         EVEX_W_0F3A39_P_2, EVEX_W_0F3A3A_P_2,
 474         EVEX_W_0F3A3B_P_2, EVEX_W_0F3A42_P_2,
 475         EVEX_W_0F3A43_P_2, EVEX_W_0F3A70_P_2,
 476         EVEX_W_0F3A72_P_2): Rename to ...
 477         (MOD_0F382A, MOD_0F38F5, MOD_VEX_0FD7, MOD_VEX_0FE7,
 478         MOD_VEX_0F381A, MOD_VEX_0F382A, MOD_VEX_0F382C, MOD_VEX_0F382D,
 479         MOD_VEX_0F382E, MOD_VEX_0F382F, MOD_VEX_0F385A, MOD_VEX_0F388C,
 480         MOD_VEX_0F388E, MOD_VEX_0F3A30_L_0_W_0,
 481         MOD_VEX_0F3A30_L_0_W_1, MOD_VEX_0F3A31_L_0_W_0,
 482         MOD_VEX_0F3A31_L_0_W_1, MOD_VEX_0F3A32_L_0_W_0,
 483         MOD_VEX_0F3A32_L_0_W_1, MOD_VEX_0F3A33_L_0_W_0,
 484         MOD_VEX_0F3A33_L_0_W_1, MOD_EVEX_0F381A_W_0,
 485         MOD_EVEX_0F381A_W_1, MOD_EVEX_0F381B_W_0, MOD_EVEX_0F381B_W_1,
 486         MOD_EVEX_0F385A_W_0, MOD_EVEX_0F385A_W_1, MOD_EVEX_0F385B_W_0,
 487         MOD_EVEX_0F385B_W_1, VEX_LEN_0F6E, VEX_LEN_0FC4, VEX_LEN_0FC5,
 488         VEX_LEN_0FD6, VEX_LEN_0FF7, VEX_LEN_0F3816, VEX_LEN_0F3819,
 489         VEX_LEN_0F381A_M_0, VEX_LEN_0F3836, VEX_LEN_0F3841,
 490         VEX_LEN_0F385A_M_0, VEX_LEN_0F38DB, VEX_LEN_0F3A00,
 491         VEX_LEN_0F3A01, VEX_LEN_0F3A06, VEX_LEN_0F3A14, VEX_LEN_0F3A15,
 492         VEX_LEN_0F3A16, VEX_LEN_0F3A17, VEX_LEN_0F3A18, VEX_LEN_0F3A19,
 493         VEX_LEN_0F3A20, VEX_LEN_0F3A21, VEX_LEN_0F3A22, VEX_LEN_0F3A30,
 494         VEX_LEN_0F3A31, VEX_LEN_0F3A32, VEX_LEN_0F3A33, VEX_LEN_0F3A38,
 495         VEX_LEN_0F3A39, VEX_LEN_0F3A41, VEX_LEN_0F3A46, VEX_LEN_0F3A60,
 496         VEX_LEN_0F3A61, VEX_LEN_0F3A62, VEX_LEN_0F3A63, VEX_LEN_0F3ADF,
 497         EVEX_LEN_0F6E, EVEX_LEN_0FC4, EVEX_LEN_0FC5, EVEX_LEN_0FD6,
 498         EVEX_LEN_0F3816, EVEX_LEN_0F3819_W_0, EVEX_LEN_0F3819_W_1,
 499         EVEX_LEN_0F381A_W_0_M_0, EVEX_LEN_0F381A_W_1_M_0,
 500         EVEX_LEN_0F381B_W_0_M_0, EVEX_LEN_0F381B_W_1_M_0,
 501         EVEX_LEN_0F3836, EVEX_LEN_0F385A_W_0_M_0,
 502         EVEX_LEN_0F385A_W_1_M_0, EVEX_LEN_0F385B_W_0_M_0,
 503         EVEX_LEN_0F385B_W_1_M_0, EVEX_LEN_0F38C6_R_1_M_0,
 504         EVEX_LEN_0F38C6_R_2_M_0, EVEX_LEN_0F38C6_R_5_M_0,
 505         EVEX_LEN_0F38C6_R_6_M_0, EVEX_LEN_0F38C7_R_1_M_0_W_0,
 506         EVEX_LEN_0F38C7_R_1_M_0_W_1, EVEX_LEN_0F38C7_R_2_M_0_W_0,
 507         EVEX_LEN_0F38C7_R_2_M_0_W_1, EVEX_LEN_0F38C7_R_5_M_0_W_0,
 508         EVEX_LEN_0F38C7_R_5_M_0_W_1, EVEX_LEN_0F38C7_R_6_M_0_W_0,
 509         EVEX_LEN_0F38C7_R_6_M_0_W_1, EVEX_LEN_0F3A00_W_1,
 510         EVEX_LEN_0F3A01_W_1, EVEX_LEN_0F3A14, EVEX_LEN_0F3A15,
 511         EVEX_LEN_0F3A16, EVEX_LEN_0F3A17, EVEX_LEN_0F3A18_W_0,
 512         EVEX_LEN_0F3A18_W_1, EVEX_LEN_0F3A19_W_0,
 513         EVEX_LEN_0F3A19_W_1, EVEX_LEN_0F3A1A_W_0,
 514         EVEX_LEN_0F3A1A_W_1, EVEX_LEN_0F3A1B_W_0,
 515         EVEX_LEN_0F3A1B_W_1, EVEX_LEN_0F3A20, EVEX_LEN_0F3A21_W_0,
 516         EVEX_LEN_0F3A22, EVEX_LEN_0F3A23_W_0, EVEX_LEN_0F3A23_W_1,
 517         EVEX_LEN_0F3A38_W_0, EVEX_LEN_0F3A38_W_1,
 518         EVEX_LEN_0F3A39_W_0, EVEX_LEN_0F3A39_W_1,
 519         EVEX_LEN_0F3A3A_W_0, EVEX_LEN_0F3A3A_W_1,
 520         EVEX_LEN_0F3A3B_W_0, EVEX_LEN_0F3A3B_W_1,
 521         EVEX_LEN_0F3A43_W_0, EVEX_LEN_0F3A43_W_1
 522         VEX_W_0F380C, VEX_W_0F380D, VEX_W_0F380E, VEX_W_0F380F,
 523         VEX_W_0F3813, VEX_W_0F3816_L_1, VEX_W_0F3818,
 524         VEX_W_0F3819_L_1, VEX_W_0F381A_M_0_L_1, VEX_W_0F382C_M_0,
 525         VEX_W_0F382D_M_0, VEX_W_0F382E_M_0, VEX_W_0F382F_M_0,
 526         VEX_W_0F3836, VEX_W_0F3846, VEX_W_0F3858, VEX_W_0F3859,
 527         VEX_W_0F385A_M_0_L_0, VEX_W_0F3878, VEX_W_0F3879,
 528         VEX_W_0F38CF, VEX_W_0F3A00_L_1, VEX_W_0F3A01_L_1,
 529         VEX_W_0F3A02, VEX_W_0F3A04, VEX_W_0F3A05, VEX_W_0F3A06_L_1,
 530         VEX_W_0F3A18_L_1, VEX_W_0F3A19_L_1, VEX_W_0F3A1D,
 531         VEX_W_0F3A30_L_0, VEX_W_0F3A31_L_0, VEX_W_0F3A32_L_0,
 532         VEX_W_0F3A33_L_0, VEX_W_0F3A38_L_1, VEX_W_0F3A39_L_1,
 533         VEX_W_0F3A46_L_1, VEX_W_0F3A4A, VEX_W_0F3A4B, VEX_W_0F3A4C,
 534         VEX_W_0F3ACE, VEX_W_0F3ACF, EVEX_W_0F66, EVEX_W_0F72_R_2,
 535         EVEX_W_0F72_R_6, EVEX_W_0F73_R_2, EVEX_W_0F73_R_6,
 536         EVEX_W_0F76, EVEX_W_0FD6_L_0, EVEX_W_0FE7, EVEX_W_0F380D,
 537         EVEX_W_0F3819, EVEX_W_0F381A, EVEX_W_0F381B, EVEX_W_0F381E,
 538         EVEX_W_0F381F, EVEX_W_0F3837, EVEX_W_0F3859, EVEX_W_0F385A,
 539         EVEX_W_0F385B, EVEX_W_0F3870, EVEX_W_0F387A, EVEX_W_0F387B,
 540         EVEX_W_0F3883, EVEX_W_0F3891, EVEX_W_0F3893, EVEX_W_0F38A1,
 541         EVEX_W_0F38A3, EVEX_W_0F38C7_R_1_M_0,
 542         EVEX_W_0F38C7_R_2_M_0, EVEX_W_0F38C7_R_5_M_0,
 543         EVEX_W_0F38C7_R_6_M_0, EVEX_W_0F3A00, EVEX_W_0F3A01,
 544         EVEX_W_0F3A05, EVEX_W_0F3A08, EVEX_W_0F3A09, EVEX_W_0F3A0A,
 545         EVEX_W_0F3A0B, EVEX_W_0F3A18, EVEX_W_0F3A19, EVEX_W_0F3A1A,
 546         EVEX_W_0F3A1B, EVEX_W_0F3A21, EVEX_W_0F3A23, EVEX_W_0F3A38,
 547         EVEX_W_0F3A39, EVEX_W_0F3A3A, EVEX_W_0F3A3B, EVEX_W_0F3A42,
 548         EVEX_W_0F3A43, EVEX_W_0F3A70, EVEX_W_0F3A72): ... these
 549         respectively.
 550         (dis386_twobyte, three_byte_table, vex_table, vex_len_table,
 551         vex_w_table, mod_table): Replace / remove respective entries.
 552         (print_insn): Move up dp->prefix_requirement handling. Handle
 553         PREFIX_DATA.
 554         * i386-dis-evex.h, i386-dis-evex-len.h, i386-dis-evex-mod.h,
 555         i386-dis-evex-prefix.h, i386-dis-evex-reg.h, i386-dis-evex-w.h:
 556         Replace / remove respective entries.
 557
 558 2020-07-14  Jan Beulich  <jbeulich@suse.com>
 559
 560         * i386-dis.c (PREFIX_EVEX_0F2C, PREFIX_EVEX_0F2D,
 561         PREFIX_EVEX_0F2E, PREFIX_EVEX_0F2F): Delete.
 562         (prefix_table): Add EXxEVexS operand to vcvttss2si, vcvttsd2si,
 563         vcvtss2si, vcvtsd2si, vucomiss, and vucomisd table entries.
 564         Retain X macro and PREFIX_OPCODE use from tjhe EVEX table for
 565         the latter two.
 566         * i386-dis-evex.h (evex_table): Reference VEX table for opcodes
 567         0F2C, 0F2D, 0F2E, and 0F2F.
 568         * i386-dis-evex-prefix.h: Delete opcode 0F2C, 0F2D, 0F2E, and
 569         0F2F table entries.
 570
 571 2020-07-14  Jan Beulich  <jbeulich@suse.com>
 572
 573         * i386-dis.c (OP_VexR, VexScalarR): New.
 574         (OP_EX_Vex, OP_XMM_Vex, EXdVexScalarS, EXqVexScalarS,
 575         XMVexScalar, d_scalar_swap_mode, q_scalar_swap_mode,
 576         need_vex_reg): Delete.
 577         (prefix_table): Replace VexScalar by VexScalarR and
 578         XMVexScalar by XMScalar for vmovss and vmovsd. Replace
 579         EXdVexScalarS by EXdS and EXqVexScalarS by EXqS.
 580         (vex_len_table): Replace EXqVexScalarS by EXqS.
 581         (get_valid_dis386): Don't set need_vex_reg.
 582         (print_insn): Don't initialize need_vex_reg.
 583         (intel_operand_size, OP_E_memory): Drop d_scalar_swap_mode and
 584         q_scalar_swap_mode cases.
 585         (OP_EX): Don't check for d_scalar_swap_mode and
 586         q_scalar_swap_mode.
 587         (OP_VEX): Done check need_vex_reg.
 588         * i386-dis-evex-w.h: Replace VexScalar by VexScalarR and
 589         XMVexScalar by XMScalar for vmovss and vmovsd. Replace
 590         EXdVexScalarS by EXdS and EXqVexScalarS by EXqS.
 591
 592 2020-07-14  Jan Beulich  <jbeulich@suse.com>
 593
 594         * i386-dis.c (Vex128, Vex256, vex128_mode, vex256_mode): Delete.
 595         (VEX_W_0F381A_P_2_M_0, VEX_W_0F385A_P_2_M_0, VEX_W_0F3A06_P_2,
 596         VEX_W_0F3A18_P_2, VEX_W_0F3A19_P_2, VEX_W_0F3A38_P_2,
 597         VEX_W_0F3A39_P_2, VEX_W_0F3A46_P_2): Rename to ...
 598         (VEX_W_0F381A_P_2_M_0_L_0, VEX_W_0F385A_P_2_M_0_L_0,
 599         VEX_W_0F3A06_P_2_L_0, VEX_W_0F3A18_P_2_L_0,
 600         VEX_W_0F3A19_P_2_L_0, VEX_W_0F3A38_P_2_L_0,
 601         VEX_W_0F3A39_P_2_L_0, VEX_W_0F3A46_P_2_L_0): ... respectively.
 602         (vex_table): Replace Vex128 by Vex.
 603         (vex_len_table): Likewise. Adjust referenced enum names.
 604         (vex_w_table): Replace Vex128 and Vex256 by Vex. Adjust
 605         referenced enum names.
 606         (OP_VEX): Drop vex128_mode and vex256_mode cases.
 607         * i386-dis-evex-len.h (evex_len_table): Replace Vex128 by Vex.
 608
 609 2020-07-14  Jan Beulich  <jbeulich@suse.com>
 610
 611         * i386-dis.c (dis386): "LW" description now applies to "DQ".
 612         (putop): Handle "DQ". Don't handle "LW" anymore.
 613         (prefix_table, mod_table): Replace %LW by %DQ.
 614         * i386-dis-evex-len.h, i386-dis-evex-prefix.h: Likewise.
 615
 616 2020-07-14  Jan Beulich  <jbeulich@suse.com>
 617
 618         * i386-dis.c (OP_E_memory): Move xmm_mw_mode, xmm_mb_mode,
 619         dqd_mode, xmm_md_mode, d_mode, d_swap_mode, and
 620         d_scalar_swap_mode case handling. Move shift adjsutment into
 621         the case its applicable to.
 622
 623 2020-07-14  Jan Beulich  <jbeulich@suse.com>
 624
 625         * i386-dis.c (EVEX_W_0F3862_P_2, EVEX_W_0F3863_P_2): Delete.
 626         (EXbScalar, EXwScalar): Fold to ...
 627         (EXbwUnit): ... this.
 628         (b_scalar_mode, w_scalar_mode): Fold to ...
 629         (bw_unit_mode): ... this.
 630         (intel_operand_size, OP_E_memory): Replace b_scalar_mode /
 631         w_scalar_mode handling by bw_unit_mode one.
 632         * i386-dis-evex-w.h: Move entries for opcodes 0F3862 and 0F3863
 633         ...
 634         * i386-dis-evex-prefix.h: ... here.
 635
 636 2020-07-14  Jan Beulich  <jbeulich@suse.com>
 637
 638         * i386-dis.c (PCMPESTR_Fixup): Delete.
 639         (dis386): Adjust "LQ" description.
 640         (prefix_table): Make %LQ apply to AT&T case only for cvtsi2ss,
 641         cvtsi2sd, ptwrite, vcvtsi2ss, and vcvtsi2sd. Replace use of
 642         PCMPESTR_Fixup by !%LQ and EXx for pcmpestrm, pcmpestri,
 643         vpcmpestrm, and vpcmpestri.
 644         (putop): Honor "cond" when handling LQ.
 645         * i386-dis-evex-prefix.h: Make %LQ apply to AT&T case only for
 646         vcvtsi2ss and vcvtusi2ss.
 647         * i386-dis-evex-w.h: Make %LQ apply to AT&T case only for
 648         vcvtsi2sd and vcvtusi2sd.
 649
 650 2020-07-14  Jan Beulich  <jbeulich@suse.com>
 651
 652         * i386-dis.c (VCMP_Fixup, VCMP): Delete.
 653         (simd_cmp_op): Add const.
 654         (vex_cmp_op): Move up and drop initial 8 entries. Add const.
 655         (CMP_Fixup): Handle VEX case.
 656         (prefix_table): Replace VCMP by CMP.
 657         * i386-dis-evex-prefix.h, i386-dis-evex-w.h: Likewise.
 658
 659 2020-07-14  Jan Beulich  <jbeulich@suse.com>
 660
 661         * i386-dis.c (MOVBE_Fixup): Delete.
 662         (Mv): Define.
 663         (prefix_table): Use Mv for movbe entries.
 664
 665 2020-07-14  Jan Beulich  <jbeulich@suse.com>
 666
 667         * i386-dis.c (CRC32_Fixup): Delete.
 668         (prefix_table): Use Eb/Ev for crc32 entries.
 669
 670 2020-07-14  Jan Beulich  <jbeulich@suse.com>
 671
 672         * i386-dis.c (OP_E_register, OP_G, OP_REG, CRC32_Fixup):
 673         Conditionalize invocations of "USED_REX (0)".
 674
 675 2020-07-14  Jan Beulich  <jbeulich@suse.com>
 676
 677         * i386-dis.c (eBX, eCX, eDX, eSP, eBP, eSI, eDI, DL, BL, AH,
 678         CH, DH, BH, AX, DX): Delete.
 679         (OP_IMREG): Drop handling of eBX_reg, eCX_reg, eDX_reg, eSP_reg,
 680         eBP_reg, eSI_reg, eDI_reg, dl_reg, bl_reg, ah_reg, ch_reg,
 681         dh_reg, bh_reg, ax_reg, and dx_reg. Simplify what's left.
 682
 683 2020-07-10  Lili Cui  <lili.cui@intel.com>
 684
 685         * i386-dis.c (TMM): New.
 686         (EXtmm): Likewise.
 687         (VexTmm): Likewise.
 688         (MVexSIBMEM): Likewise.
 689         (tmm_mode): Likewise.
 690         (vex_sibmem_mode): Likewise.
 691         (REG_VEX_0F3849_X86_64_P_0_W_0_M_1): Likewise.
 692         (MOD_VEX_0F3849_X86_64_P_0_W_0): Likewise.
 693         (MOD_VEX_0F3849_X86_64_P_2_W_0): Likewise.
 694         (MOD_VEX_0F3849_X86_64_P_3_W_0): Likewise.
 695         (MOD_VEX_0F384B_X86_64_P_1_W_0): Likewise.
 696         (MOD_VEX_0F384B_X86_64_P_2_W_0): Likewise.
 697         (MOD_VEX_0F384B_X86_64_P_3_W_0): Likewise.
 698         (MOD_VEX_0F385C_X86_64_P_1_W_0): Likewise.
 699         (MOD_VEX_0F385E_X86_64_P_0_W_0): Likewise.
 700         (MOD_VEX_0F385E_X86_64_P_1_W_0): Likewise.
 701         (MOD_VEX_0F385E_X86_64_P_2_W_0): Likewise.
 702         (MOD_VEX_0F385E_X86_64_P_3_W_0): Likewise.
 703         (RM_VEX_0F3849_X86_64_P_0_W_0_M_1_R_0): Likewise.
 704         (PREFIX_VEX_0F3849_X86_64): Likewise.
 705         (PREFIX_VEX_0F384B_X86_64): Likewise.
 706         (PREFIX_VEX_0F385C_X86_64): Likewise.
 707         (PREFIX_VEX_0F385E_X86_64): Likewise.
 708         (X86_64_VEX_0F3849): Likewise.
 709         (X86_64_VEX_0F384B): Likewise.
 710         (X86_64_VEX_0F385C): Likewise.
 711         (X86_64_VEX_0F385E): Likewise.
 712         (VEX_LEN_0F3849_X86_64_P_0_W_0_M_0): Likewise.
 713         (VEX_LEN_0F3849_X86_64_P_0_W_0_M_1_REG_0_RM_0): Likewise.
 714         (VEX_LEN_0F3849_X86_64_P_2_W_0_M_0): Likewise.
 715         (VEX_LEN_0F3849_X86_64_P_3_W_0_M_0): Likewise.
 716         (VEX_LEN_0F384B_X86_64_P_1_W_0_M_0): Likewise.
 717         (VEX_LEN_0F384B_X86_64_P_2_W_0_M_0): Likewise.
 718         (VEX_LEN_0F384B_X86_64_P_3_W_0_M_0): Likewise.
 719         (VEX_LEN_0F385C_X86_64_P_1_W_0_M_0): Likewise.
 720         (VEX_LEN_0F385E_X86_64_P_0_W_0_M_0): Likewise.
 721         (VEX_LEN_0F385E_X86_64_P_1_W_0_M_0): Likewise.
 722         (VEX_LEN_0F385E_X86_64_P_2_W_0_M_0): Likewise.
 723         (VEX_LEN_0F385E_X86_64_P_3_W_0_M_0): Likewise.
 724         (VEX_W_0F3849_X86_64_P_0): Likewise.
 725         (VEX_W_0F3849_X86_64_P_2): Likewise.
 726         (VEX_W_0F3849_X86_64_P_3): Likewise.
 727         (VEX_W_0F384B_X86_64_P_1): Likewise.
 728         (VEX_W_0F384B_X86_64_P_2): Likewise.
 729         (VEX_W_0F384B_X86_64_P_3): Likewise.
 730         (VEX_W_0F385C_X86_64_P_1): Likewise.
 731         (VEX_W_0F385E_X86_64_P_0): Likewise.
 732         (VEX_W_0F385E_X86_64_P_1): Likewise.
 733         (VEX_W_0F385E_X86_64_P_2): Likewise.
 734         (VEX_W_0F385E_X86_64_P_3): Likewise.
 735         (names_tmm): Likewise.
 736         (att_names_tmm): Likewise.
 737         (intel_operand_size): Handle void_mode.
 738         (OP_XMM): Handle tmm_mode.
 739         (OP_EX): Likewise.
 740         (OP_VEX): Likewise.
 741         * i386-gen.c (cpu_flag_init): Add entries for CpuAMX_INT8,
 742         CpuAMX_BF16 and CpuAMX_TILE.
 743         (operand_type_shorthands): Add RegTMM.
 744         (operand_type_init): Likewise.
 745         (operand_types): Add Tmmword.
 746         (cpu_flag_init): Add CPU_AMX_INT8, CpuAMX_BF16 and CpuAMX_TILE.
 747         (cpu_flags): Add CpuAMX_INT8, CpuAMX_BF16 and CpuAMX_TILE.
 748         * i386-opc.h (CpuAMX_INT8): New.
 749         (CpuAMX_BF16): Likewise.
 750         (CpuAMX_TILE): Likewise.
 751         (SIBMEM): Likewise.
 752         (Tmmword): Likewise.
 753         (i386_cpu_flags): Add cpuamx_int8, cpuamx_bf16 and cpuamx_tile.
 754         (i386_opcode_modifier): Extend width of fields vexvvvv and sib.
 755         (i386_operand_type): Add tmmword.
 756         * i386-opc.tbl: Add AMX instructions.
 757         * i386-reg.tbl: Add AMX registers.
 758         * i386-init.h: Regenerated.
 759         * i386-tbl.h: Likewise.
 760
 761 2020-07-08  Jan Beulich  <jbeulich@suse.com>
 762
 763         * i386-dis.c (OP_LWPCB_E, OP_LWP_E): Delete.
 764         (REG_XOP_LWPCB, REG_XOP_LWP, REG_XOP_TBM_01, REG_XOP_TBM_02):
 765         Rename to ...
 766         (REG_0FXOP_09_12_M_1_L_0, REG_0FXOP_0A_12_L_0,
 767         REG_0FXOP_09_01_L_0, REG_0FXOP_09_02_L_0): ... these
 768         respectively.
 769         (MOD_VEX_0FXOP_09_12, VEX_LEN_0FXOP_08_85, VEX_LEN_0FXOP_08_86,
 770         VEX_LEN_0FXOP_08_87, VEX_LEN_0FXOP_08_8E, VEX_LEN_0FXOP_08_8F,
 771         VEX_LEN_0FXOP_08_95, VEX_LEN_0FXOP_08_96, VEX_LEN_0FXOP_08_97,
 772         VEX_LEN_0FXOP_08_9E, VEX_LEN_0FXOP_08_9F, VEX_LEN_0FXOP_08_A3,
 773         VEX_LEN_0FXOP_08_A6, VEX_LEN_0FXOP_08_B6, VEX_LEN_0FXOP_08_C0,
 774         VEX_LEN_0FXOP_08_C1, VEX_LEN_0FXOP_08_C2, VEX_LEN_0FXOP_08_C3,
 775         VEX_LEN_0FXOP_09_01, VEX_LEN_0FXOP_09_02, VEX_LEN_0FXOP_09_12_M_1,
 776         VEX_LEN_0FXOP_09_90, VEX_LEN_0FXOP_09_91, VEX_LEN_0FXOP_09_92,
 777         VEX_LEN_0FXOP_09_93, VEX_LEN_0FXOP_09_94, VEX_LEN_0FXOP_09_95,
 778         VEX_LEN_0FXOP_09_96, VEX_LEN_0FXOP_09_97, VEX_LEN_0FXOP_09_98,
 779         VEX_LEN_0FXOP_09_99, VEX_LEN_0FXOP_09_9A, VEX_LEN_0FXOP_09_9B,
 780         VEX_LEN_0FXOP_09_C1, VEX_LEN_0FXOP_09_C2, VEX_LEN_0FXOP_09_C3,
 781         VEX_LEN_0FXOP_09_C6, VEX_LEN_0FXOP_09_C7, VEX_LEN_0FXOP_09_CB,
 782         VEX_LEN_0FXOP_09_D1, VEX_LEN_0FXOP_09_D2, VEX_LEN_0FXOP_09_D3,
 783         VEX_LEN_0FXOP_09_D6, VEX_LEN_0FXOP_09_D7, VEX_LEN_0FXOP_09_DB,
 784         VEX_LEN_0FXOP_09_E1, VEX_LEN_0FXOP_09_E2, VEX_LEN_0FXOP_09_E3,
 785         VEX_LEN_0FXOP_0A_12, VEX_W_0FXOP_08_85_L_0,
 786         VEX_W_0FXOP_08_86_L_0, VEX_W_0FXOP_08_87_L_0,
 787         VEX_W_0FXOP_08_8E_L_0, VEX_W_0FXOP_08_8F_L_0,
 788         VEX_W_0FXOP_08_95_L_0, VEX_W_0FXOP_08_96_L_0,
 789         VEX_W_0FXOP_08_97_L_0, VEX_W_0FXOP_08_9E_L_0,
 790         VEX_W_0FXOP_08_9F_L_0, VEX_W_0FXOP_08_A6_L_0,
 791         VEX_W_0FXOP_08_B6_L_0, VEX_W_0FXOP_08_C0_L_0,
 792         VEX_W_0FXOP_08_C1_L_0, VEX_W_0FXOP_08_C2_L_0,
 793         VEX_W_0FXOP_08_C3_L_0, VEX_W_0FXOP_08_CC_L_0,
 794         VEX_W_0FXOP_08_CD_L_0, VEX_W_0FXOP_08_CE_L_0,
 795         VEX_W_0FXOP_08_CF_L_0, VEX_W_0FXOP_08_EC_L_0,
 796         VEX_W_0FXOP_08_ED_L_0, VEX_W_0FXOP_08_EE_L_0,
 797         VEX_W_0FXOP_08_EF_L_0, VEX_W_0FXOP_09_C1_L_0,
 798         VEX_W_0FXOP_09_C2_L_0, VEX_W_0FXOP_09_C3_L_0,
 799         VEX_W_0FXOP_09_C6_L_0, VEX_W_0FXOP_09_C7_L_0,
 800         VEX_W_0FXOP_09_CB_L_0, VEX_W_0FXOP_09_D1_L_0,
 801         VEX_W_0FXOP_09_D2_L_0, VEX_W_0FXOP_09_D3_L_0,
 802         VEX_W_0FXOP_09_D6_L_0, VEX_W_0FXOP_09_D7_L_0,
 803         VEX_W_0FXOP_09_DB_L_0, VEX_W_0FXOP_09_E1_L_0,
 804         VEX_W_0FXOP_09_E2_L_0, VEX_W_0FXOP_09_E3_L_0): New enumerators.
 805         (reg_table): Re-order XOP entries. Adjust their operands.
 806         (xop_table): Replace 08_85, 08_86, 08_87, 08_8E, 08_8F, 08_95,
 807         08_96, 08_97, 08_9E, 08_9F, 08_A3, 08_A6, 08_B6, 08_C0, 08_C1,
 808         08_C2, 08_C3, 09_01, 09_02, 09_12, 09_90, 09_91, 09_92, 09_93,
 809         09_94, 09_95, 09_96, 09_97, 09_98, 09_99, 09_9A, 09_9B, 09_C1,
 810         09_C2, 09_C3, 09_C6, 09_C7, 09_CB, 09_D1, 09_D2, 09_D3, 09_D6,
 811         09_D7, 09_DB, 09_E1, 09_E2, 09_E3, and VEX_LEN_0FXOP_0A_12
 812         entries by references ...
 813         (vex_len_table): ... to resepctive new entries here. For several
 814         new and existing entries reference ...
 815         (vex_w_table): ... new entries here.
 816         (mod_table): New MOD_VEX_0FXOP_09_12 entry.
 817
 818 2020-07-08  Jan Beulich  <jbeulich@suse.com>
 819
 820         * i386-dis.c (XMVexScalarI4): Define.
 821         (VEX_LEN_0F3A6A_P_2, VEX_LEN_0F3A6B_P_2, VEX_LEN_0F3A6E_P_2,
 822         VEX_LEN_0F3A6F_P_2, VEX_LEN_0F3A7A_P_2, VEX_LEN_0F3A7B_P_2,
 823         VEX_LEN_0F3A7E_P_2, VEX_LEN_0F3A7F_P_2): Delete.
 824         (vex_len_table): Move scalar FMA4 entries ...
 825         (prefix_table): ... here.
 826         (OP_REG_VexI4): Handle scalar_mode.
 827         * i386-opc.tbl: Use VexLIG for scalar FMA4 insns.
 828         * i386-tbl.h: Re-generate.
 829
 830 2020-07-08  Jan Beulich  <jbeulich@suse.com>
 831
 832         * i386-dis.c (OP_Vex_2src_1, OP_Vex_2src_2, Vex_2src_1,
 833         Vex_2src_2): Delete.
 834         (OP_VexW, VexW): New.
 835         (xop_table): Use EXx for rotates by immediate. Use EXx and VexW
 836         for shifts and rotates by register.
 837
 838 2020-07-08  Jan Beulich  <jbeulich@suse.com>
 839
 840         * i386-dis.c (OP_EX_VexImmW, OP_XMM_VexW, EXVexImmW, XMVexW,
 841         VEX_W_0F3A48_P_2, VEX_W_0F3A49_P_2, vex_w_done, get_vex_imm8,
 842         OP_EX_VexReg): Delete.
 843         (OP_VexI4, VexI4): New.
 844         (vex_w_table): Move vpermil2ps and vpermil2pd entries ...
 845         (prefix_table): ... here.
 846         (print_insn): Drop setting of vex_w_done.
 847
 848 2020-07-08  Jan Beulich  <jbeulich@suse.com>
 849
 850         * i386-dis.c (OP_EX_VexW, EXVexW, EXdVexW, EXqVexW): Delete.
 851         (prefix_table, vex_len_table): Replace operands for FMA4 insns.
 852         (xop_table): Replace operands of 4-operand insns.
 853         (OP_REG_VexI4): Move VEX.W based operand swaping here.
 854
 855 2020-07-07  Claudiu Zissulescu  <claziss@synopsys.com>
 856
 857         * arc-opc.c (insert_rbd): New function.
 858         (RBD): Define.
 859         (RBDdup): Likewise.
 860         * arc-tbl.h (vadd2, vadd4h, vmac2h, vmpy2h, vsub4h): Update
 861         instructions.
 862
 863 2020-07-07  Jan Beulich  <jbeulich@suse.com>
 864
 865         * i386-dis.c (EVEX_W_0F3826_P_1, EVEX_W_0F3826_P_2,
 866         EVEX_W_0F3828_P_1, EVEX_W_0F3829_P_1, EVEX_W_0F3854_P_2,
 867         EVEX_W_0F3866_P_2, EVEX_W_0F3875_P_2, EVEX_W_0F387D_P_2,
 868         EVEX_W_0F388D_P_2, EVEX_W_0F3A3E_P_2, EVEX_W_0F3A3F_P_2):
 869         Delete.
 870         (putop): Handle "BW".
 871         * i386-dis-evex-w.h: Move entries for opcodes 0F3826, 0F3826,
 872         0F3828, 0F3829, 0F3854, 0F3866, 0F3875, 0F387D, 0F388D, 0F3A3E,
 873         and 0F3A3F ...
 874         * i386-dis-evex-prefix.h: ... here.
 875
 876 2020-07-06  Jan Beulich  <jbeulich@suse.com>
 877
 878         * i386-dis.c (VEX_LEN_0FXOP_09_80, VEX_LEN_0FXOP_09_81): Delete.
 879         (VEX_LEN_0FXOP_09_82_W_0, VEX_LEN_0FXOP_09_83_W_0,
 880         VEX_W_0FXOP_09_80, VEX_W_0FXOP_09_81, VEX_W_0FXOP_09_82,
 881         VEX_W_0FXOP_09_83): New enumerators.
 882         (xop_table): Reference the above.
 883         (vex_len_table): Replace vfrczp* entries by vfrczs* ones.
 884         (vex_w_table): New VEX_W_0FXOP_09_80, VEX_W_0FXOP_09_81,
 885         VEX_W_0FXOP_09_82, and VEX_W_0FXOP_09_83 entries.
 886         (get_valid_dis386): Return bad_opcode for XOP.PP != 0.
 887
 888 2020-07-06  Jan Beulich  <jbeulich@suse.com>
 889
 890         * i386-dis.c (EVEX_W_0F3838_P_1,
 891         EVEX_W_0F3839_P_1, EVEX_W_0F3840_P_2, EVEX_W_0F3855_P_2,
 892         EVEX_W_0F3868_P_3, EVEX_W_0F3871_P_2, EVEX_W_0F3873_P_2,
 893         EVEX_W_0F3A50_P_2, EVEX_W_0F3A51_P_2, EVEX_W_0F3A56_P_2,
 894         EVEX_W_0F3A57_P_2, EVEX_W_0F3A66_P_2, EVEX_W_0F3A67_P_2,
 895         EVEX_W_0F3A71_P_2, EVEX_W_0F3A73_P_2): Delete.
 896         (putop): Centralize management of last[]. Delete SAVE_LAST.
 897         * i386-dis-evex-w.h: Move entries for opcodes 0F3838, 0F3839,
 898         0F3840, 0F3855, 0F3868, 0F3871, 0F3873, 0F3A50, 0F3A51, 0F3A56,
 899         0F3A57, 0F3A66, 0F3A67, 0F3A71, and 0F3A73 ...
 900         * i386-dis-evex-prefix.h: here.
 901
 902 2020-07-06  Jan Beulich  <jbeulich@suse.com>
 903
 904         * i386-dis.c (MOD_EVEX_0F381A_P_2_W_0, MOD_EVEX_0F381A_P_2_W_1,
 905         MOD_EVEX_0F381B_P_2_W_0, MOD_EVEX_0F381B_P_2_W_1,
 906         MOD_EVEX_0F385A_P_2_W_0, MOD_EVEX_0F385A_P_2_W_1,
 907         MOD_EVEX_0F385B_P_2_W_0, MOD_EVEX_0F385B_P_2_W_1): New
 908         enumerators.
 909         (EVEX_LEN_0F381A_P_2_W_0, EVEX_LEN_0F381A_P_2_W_1,
 910         EVEX_LEN_0F381B_P_2_W_0, EVEX_LEN_0F381B_P_2_W_1,
 911         EVEX_LEN_0F385A_P_2_W_0, EVEX_LEN_0F385A_P_2_W_1,
 912         EVEX_LEN_0F385B_P_2_W_0, EVEX_LEN_0F385B_P_2_W_1): Rename to ...
 913         (EVEX_LEN_0F381A_P_2_W_0_M_0, EVEX_LEN_0F381A_P_2_W_1_M_0,
 914         EVEX_LEN_0F381B_P_2_W_0_M_0, EVEX_LEN_0F381B_P_2_W_1_M_0,
 915         EVEX_LEN_0F385A_P_2_W_0_M_0, EVEX_LEN_0F385A_P_2_W_1_M_0,
 916         EVEX_LEN_0F385B_P_2_W_0_M_0, EVEX_LEN_0F385B_P_2_W_1_M_0): ...
 917         these, respectively.
 918         * i386-dis-evex-len.h: Adjust comments.
 919         * i386-dis-evex-mod.h: New MOD_EVEX_0F381A_P_2_W_0,
 920         MOD_EVEX_0F381A_P_2_W_1, MOD_EVEX_0F381B_P_2_W_0,
 921         MOD_EVEX_0F381B_P_2_W_1, MOD_EVEX_0F385A_P_2_W_0,
 922         MOD_EVEX_0F385A_P_2_W_1, MOD_EVEX_0F385B_P_2_W_0, and
 923         MOD_EVEX_0F385B_P_2_W_1 table entries.
 924         * i386-dis-evex-w.h: Reference mod_table[] for
 925         EVEX_W_0F381A_P_2, EVEX_W_0F381B_P_2, EVEX_W_0F385A_P_2, and
 926         EVEX_W_0F385B_P_2.
 927
 928 2020-07-06  Jan Beulich  <jbeulich@suse.com>
 929
 930         * i386-dis-evex-len.h (vbroadcastf32x8, vbroadcasti32x8,
 931         vinsertf32x8, vinsertf64x4, vextractf32x8, vextractf64x4): Use
 932         EXymm.
 933         (vinserti32x8, vinserti64x4, vextracti32x8, vextracti64x4):
 934         Likewise. Mark 256-bit entries invalid.
 935
 936 2020-07-06  Jan Beulich  <jbeulich@suse.com>
 937
 938         * i386-dis.c (PREFIX_EVEX_0F62, PREFIX_EVEX_0F6A,
 939         PREFIX_EVEX_0F6B, PREFIX_EVEX_0F6C, PREFIX_EVEX_0F6D,
 940         PREFIX_EVEX_0FD2, PREFIX_EVEX_0FD3, PREFIX_EVEX_0FD4,
 941         PREFIX_EVEX_0FF2, PREFIX_EVEX_0FF3, PREFIX_EVEX_0FF4,
 942         PREFIX_EVEX_0FFA, PREFIX_EVEX_0FFB, PREFIX_EVEX_0FFE,
 943         PREFIX_EVEX_0F382B): Delete.
 944         (EVEX_W_0F62_P_2, EVEX_W_0F6A_P_2, EVEX_W_0F6B_P_2,
 945         EVEX_W_0F6C_P_2, EVEX_W_0F6D_P_2, EVEX_W_0FD2_P_2,
 946         EVEX_W_0FD3_P_2, EVEX_W_0FD4_P_2, EVEX_W_0FF2_P_2,
 947         EVEX_W_0FF3_P_2, EVEX_W_0FF4_P_2, EVEX_W_0FFA_P_2,
 948         EVEX_W_0FFB_P_2, EVEX_W_0FFE_P_2, EVEX_W_0F382B_P_2): Rename
 949         to ...
 950         (EVEX_W_0F62, EVEX_W_0F6A, EVEX_W_0F6B, EVEX_W_0F6C,
 951         EVEX_W_0F6D, EVEX_W_0FD2, EVEX_W_0FD3, EVEX_W_0FD4,
 952         EVEX_W_0FF2, EVEX_W_0FF3, EVEX_W_0FF4, EVEX_W_0FFA,
 953         EVEX_W_0FFB, EVEX_W_0FFE, EVEX_W_0F382B): ... these
 954         respectively.
 955         * i386-dis-evex.h (evex_table): Reference VEX_W table entries
 956         for opcodes 0F62, 0F6A, 0F6B, 0F6C, 0F6D, 0FD2, 0FD3, 0FD4,
 957         0FF2, 0FF3, 0FF4, 0FFA, 0FFB, 0FFE, 0F382B.
 958         * i386-dis-evex-prefix.h (PREFIX_EVEX_0F62, PREFIX_EVEX_0F6A,
 959         PREFIX_EVEX_0F6B, PREFIX_EVEX_0F6C, PREFIX_EVEX_0F6D,
 960         PREFIX_EVEX_0FD2, PREFIX_EVEX_0FD3, PREFIX_EVEX_0FD4,
 961         PREFIX_EVEX_0FF2, PREFIX_EVEX_0FF3, PREFIX_EVEX_0FF4,
 962         PREFIX_EVEX_0FFA, PREFIX_EVEX_0FFB, PREFIX_EVEX_0FFE,
 963         PREFIX_EVEX_0F382B): Remove table entries.
 964         * i386-dis-evex-w.h: Reference VEX table entries for opcodes
 965         0F62, 0F6A, 0F6B, 0F6C, 0F6D, 0FD2, 0FD3, 0FD4, 0FF2, 0FF3,
 966         0FF4, 0FFA, 0FFB, 0FFE, 0F382B.
 967
 968 2020-07-06  Jan Beulich  <jbeulich@suse.com>
 969
 970         * i386-dis.c (EVEX_LEN_0F3816_P_2, EVEX_LEN_0F3836_P_2,
 971         EVEX_LEN_0F3A00_P_2_W_1, EVEX_LEN_0F3A01_P_2_W_1): New
 972         enumerators.
 973         * i386-dis-evex-len.h (evex_len_table): New EVEX_LEN_0F3816_P_2,
 974         EVEX_LEN_0F3836_P_2, EVEX_LEN_0F3A00_P_2_W_1, and
 975         EVEX_LEN_0F3A01_P_2_W_1 table entries.
 976         * i386-dis-evex-prefix.h, i386-dis-evex-w.h: Reference the above
 977         entries.
 978
 979 2020-07-06  Jan Beulich  <jbeulich@suse.com>
 980
 981         * i386-dis.c (EVEX_LEN_0FC4_P_2, EVEX_LEN_0FC5_P_2,
 982         EVEX_LEN_0F3A14_P_2, EVEX_LEN_0F3A15_P_2, EVEX_LEN_0F3A16_P_2,
 983         EVEX_LEN_0F3A17_P_2, EVEX_LEN_0F3A20_P_2,
 984         EVEX_LEN_0F3A21_P_2_W_0, EVEX_LEN_0F3A22_P_2): New enumerators.
 985         * i386-dis-evex-len.h (evex_len_table): New EVEX_LEN_0FC4_P_2,
 986         EVEX_LEN_0FC5_P_2, EVEX_LEN_0F3A14_P_2, EVEX_LEN_0F3A15_P_2,
 987         EVEX_LEN_0F3A16_P_2, EVEX_LEN_0F3A17_P_2, EVEX_LEN_0F3A20_P_2,
 988         EVEX_LEN_0F3A21_P_2_W_0, and EVEX_LEN_0F3A22_P_2 table entries.
 989         * i386-dis-evex-prefix.h, i386-dis-evex-w.h: Reference the above
 990         entries.
 991
 992 2020-07-06  Jan Beulich  <jbeulich@suse.com>
 993
 994         * i386-dis.c (PREFIX_EVEX_0F3A1D, EVEX_W_0F3A1D_P_2): Delete.
 995         (VEX_W_0F3813_P_2, VEX_W_0F3A1D_P_2): New enumerators.
 996         (prefix_table): Reference VEX_W_0F3813_P_2 and VEX_W_0F3A1D_P_2
 997         respectively.
 998         (vex_w_table): New VEX_W_0F3813_P_2 and VEX_W_0F3A1D_P_2 table
 999         entries.
1000         * i386-dis-evex.h (evex_table): Reference VEX table entry for
1001         opcode 0F3A1D.
1002         * i386-dis-evex-prefix.h (PREFIX_EVEX_0F3A1D): Delete table
1003         entry.
1004         * i386-dis-evex-w.h (EVEX_W_0F3A1D_P_2): Likewise.
1005
1006 2020-07-06  Jan Beulich  <jbeulich@suse.com>
1007
1008         * i386-dis.c (PREFIX_EVEX_0F60, PREFIX_EVEX_0F61,
1009         PREFIX_EVEX_0F63, PREFIX_EVEX_0F67, PREFIX_EVEX_0F68,
1010         PREFIX_EVEX_0F69, PREFIX_EVEX_0FD1, PREFIX_EVEX_0FD5,
1011         PREFIX_EVEX_0FD8, PREFIX_EVEX_0FD9, PREFIX_EVEX_0FDA,
1012         PREFIX_EVEX_0FDC, PREFIX_EVEX_0FDD, PREFIX_EVEX_0FDE,
1013         PREFIX_EVEX_0FE0, PREFIX_EVEX_0FE1, PREFIX_EVEX_0FE3,
1014         PREFIX_EVEX_0FE4, PREFIX_EVEX_0FE5, PREFIX_EVEX_0FE8,
1015         PREFIX_EVEX_0FE9, PREFIX_EVEX_0FEA, PREFIX_EVEX_0FEC,
1016         PREFIX_EVEX_0FED, PREFIX_EVEX_0FEE, PREFIX_EVEX_0FF1,
1017         PREFIX_EVEX_0FF5, PREFIX_EVEX_0FF6, PREFIX_EVEX_0FF8,
1018         PREFIX_EVEX_0FF9, PREFIX_EVEX_0FFC, PREFIX_EVEX_0FFD,
1019         PREFIX_EVEX_0F3800, PREFIX_EVEX_0F3804, PREFIX_EVEX_0F380B,
1020         PREFIX_EVEX_0F380C, PREFIX_EVEX_0F3818, PREFIX_EVEX_0F381C,
1021         PREFIX_EVEX_0F381D, PREFIX_EVEX_0F383C, PREFIX_EVEX_0F383E,
1022         PREFIX_EVEX_0F3858, PREFIX_EVEX_0F3878, PREFIX_EVEX_0F3879,
1023         PREFIX_EVEX_0F3896, PREFIX_EVEX_0F3897, PREFIX_EVEX_0F3898,
1024         PREFIX_EVEX_0F3899, PREFIX_EVEX_0F389C, PREFIX_EVEX_0F389D,
1025         PREFIX_EVEX_0F389E, PREFIX_EVEX_0F389F, PREFIX_EVEX_0F38A6,
1026         PREFIX_EVEX_0F38A7, PREFIX_EVEX_0F38A8, PREFIX_EVEX_0F38A9,
1027         PREFIX_EVEX_0F38AC, PREFIX_EVEX_0F38AD, PREFIX_EVEX_0F38AE,
1028         PREFIX_EVEX_0F38AF, PREFIX_EVEX_0F38B6, PREFIX_EVEX_0F38B7,
1029         PREFIX_EVEX_0F38B8, PREFIX_EVEX_0F38B9, PREFIX_EVEX_0F38BA,
1030         PREFIX_EVEX_0F38BB, PREFIX_EVEX_0F38BC, PREFIX_EVEX_0F38BD,
1031         PREFIX_EVEX_0F38BE, PREFIX_EVEX_0F38BF, PREFIX_EVEX_0F38CF,
1032         PREFIX_EVEX_0F38DC, PREFIX_EVEX_0F38DD, PREFIX_EVEX_0F38DE,
1033         PREFIX_EVEX_0F38DF, PREFIX_EVEX_0F3A04, PREFIX_EVEX_0F3A0F,
1034         PREFIX_EVEX_0F3A44, PREFIX_EVEX_0F3ACE, PREFIX_EVEX_0F3ACF,
1035         EVEX_W_0F380C_P_2, EVEX_W_0F3818_P_2, EVEX_W_0F3858_P_2,
1036         EVEX_W_0F3878_P_2, EVEX_W_0F3879_P_2, EVEX_W_0F3A04_P_2,
1037         EVEX_W_0F3ACE_P_2, EVEX_W_0F3ACF_P_2): Delete.
1038         (prefix_table): Add EXxEVexR to FMA table entries.
1039         (OP_Rounding): Move abort() invocation.
1040         * i386-dis-evex.h (evex_table): Reference VEX table for opcodes
1041         0F60, 0F61, 0F63, 0F67, 0F68, 0F69, 0FD1, 0FD5, 0FD8, 0FD9,
1042         0FDA, 0FDC, 0FDD, 0FDE, 0FE0, 0FE1, 0FE3, 0FE4, 0FE5, 0FE8,
1043         0FE9, 0FEA, 0FEC, 0FED, 0FEE, 0FF1, 0FF5, 0FF6, 0FF8, 0FF9,
1044         0FFC, 0FFD, 0F3800, 0F3804, 0F380B, 0F380C, 0F3818, 0F381C,
1045         0F381D, 0F383C, 0F383E, 0F3858, 0F3878, 0F3879, 0F3896, 0F3897,
1046         0F3898, 0F3899, 0F389C, 0F389D, 0F389E, 0F389F, 0F38A6, 0F38A7,
1047         0F38A8, 0F38A9, 0F38AC, 0F38AD, 0F38AE, 0F38AF, 0F38B6, 0F38B7,
1048         0F38B8, 0F38B9, 0F38BA, 0F38BB, 0F38BC, 0F38BD, 0F38BE, 0F38BF,
1049         0F38CF, 0F38DC, 0F38DD, 0F38DE, 0F38DF, 0F3A04, 0F3A0F, 0F3A44,
1050         0F3ACE, 0F3ACF.
1051         * i386-dis-evex-prefix.h (PREFIX_EVEX_0F60, PREFIX_EVEX_0F61,
1052         PREFIX_EVEX_0F63, PREFIX_EVEX_0F67, PREFIX_EVEX_0F68,
1053         PREFIX_EVEX_0F69, PREFIX_EVEX_0FD1, PREFIX_EVEX_0FD5,
1054         PREFIX_EVEX_0FD8, PREFIX_EVEX_0FD9, PREFIX_EVEX_0FDA,
1055         PREFIX_EVEX_0FDC, PREFIX_EVEX_0FDD, PREFIX_EVEX_0FDE,
1056         PREFIX_EVEX_0FE0, PREFIX_EVEX_0FE1, PREFIX_EVEX_0FE3,
1057         PREFIX_EVEX_0FE4, PREFIX_EVEX_0FE5, PREFIX_EVEX_0FE8,
1058         PREFIX_EVEX_0FE9, PREFIX_EVEX_0FEA, PREFIX_EVEX_0FEC,
1059         PREFIX_EVEX_0FED, PREFIX_EVEX_0FEE, PREFIX_EVEX_0FF1,
1060         PREFIX_EVEX_0FF5, PREFIX_EVEX_0FF6, PREFIX_EVEX_0FF8,
1061         PREFIX_EVEX_0FF9, PREFIX_EVEX_0FFC, PREFIX_EVEX_0FFD,
1062         PREFIX_EVEX_0F3800, PREFIX_EVEX_0F3804, PREFIX_EVEX_0F380B,
1063         PREFIX_EVEX_0F380C, PREFIX_EVEX_0F3818, PREFIX_EVEX_0F381C,
1064         PREFIX_EVEX_0F381D, PREFIX_EVEX_0F383C, PREFIX_EVEX_0F383E,
1065         PREFIX_EVEX_0F3858, PREFIX_EVEX_0F3878, PREFIX_EVEX_0F3879,
1066         PREFIX_EVEX_0F3896, PREFIX_EVEX_0F3897, PREFIX_EVEX_0F3898,
1067         PREFIX_EVEX_0F3899, PREFIX_EVEX_0F389C, PREFIX_EVEX_0F389D,
1068         PREFIX_EVEX_0F389E, PREFIX_EVEX_0F389F, PREFIX_EVEX_0F38A6,
1069         PREFIX_EVEX_0F38A7, PREFIX_EVEX_0F38A8, PREFIX_EVEX_0F38A9,
1070         PREFIX_EVEX_0F38AC, PREFIX_EVEX_0F38AD, PREFIX_EVEX_0F38AE,
1071         PREFIX_EVEX_0F38AF, PREFIX_EVEX_0F38B6, PREFIX_EVEX_0F38B7,
1072         PREFIX_EVEX_0F38B8, PREFIX_EVEX_0F38B9, PREFIX_EVEX_0F38BA,
1073         PREFIX_EVEX_0F38BB, PREFIX_EVEX_0F38BC, PREFIX_EVEX_0F38BD,
1074         PREFIX_EVEX_0F38BE, PREFIX_EVEX_0F38BF, PREFIX_EVEX_0F38CF,
1075         PREFIX_EVEX_0F38DC, PREFIX_EVEX_0F38DD, PREFIX_EVEX_0F38DE,
1076         PREFIX_EVEX_0F38DF, PREFIX_EVEX_0F3A04, PREFIX_EVEX_0F3A0F,
1077         PREFIX_EVEX_0F3A44, PREFIX_EVEX_0F3ACE, PREFIX_EVEX_0F3ACF):
1078         Delete table entries.
1079         * i386-dis-evex-w.h (EVEX_W_0F380C_P_2, EVEX_W_0F3818_P_2,
1080         EVEX_W_0F3858_P_2, EVEX_W_0F3878_P_2, EVEX_W_0F3879_P_2,
1081         EVEX_W_0F3A04_P_2, EVEX_W_0F3ACE_P_2, EVEX_W_0F3ACF_P_2):
1082         Likewise.
1083
1084 2020-07-06  Jan Beulich  <jbeulich@suse.com>
1085
1086         * i386-dis.c (EXqScalarS): Delete.
1087         (vex_len_table): Replace EXqScalarS by EXqVexScalarS.
1088         * i386-dis-evex-w.h (vmovq): Use EXqVexScalarS.
1089
1090 2020-07-06  Jan Beulich  <jbeulich@suse.com>
1091
1092         * i386-dis.c (safe-ctype.h): Include.
1093         (EXdScalar, EXqScalar): Delete.
1094         (d_scalar_mode, q_scalar_mode): Delete.
1095         (prefix_table, vex_len_table): Use EXxmm_md in place of
1096         EXdScalar and EXxmm_mq in place of EXqScalar.
1097         (intel_operand_size, OP_E_memory, OP_EX): Remove uses of
1098         d_scalar_mode and q_scalar_mode.
1099         * i386-dis-evex-w.h (vmovss): Use EXxmm_md.
1100         (vmovsd): Use EXxmm_mq.
1101
1102 2020-07-06  Yuri Chornoivan  <yurchor@ukr.net>
1103
1104         PR 26204
1105         * arc-dis.c: Fix spelling mistake.
1106         * po/opcodes.pot: Regenerate.
1107
1108 2020-07-06  Nick Clifton  <nickc@redhat.com>
1109
1110         * po/pt_BR.po: Updated Brazilian Portugugese translation.
1111         * po/uk.po: Updated Ukranian translation.
1112
1113 2020-07-04  Nick Clifton  <nickc@redhat.com>
1114
1115         * configure: Regenerate.
1116         * po/opcodes.pot: Regenerate.
1117
1118 2020-07-04  Nick Clifton  <nickc@redhat.com>
1119
1120         Binutils 2.35 branch created.
1121
1122 2020-07-02  H.J. Lu  <hongjiu.lu@intel.com>
1123
1124         * i386-gen.c (opcode_modifiers): Add VexSwapSources.
1125         * i386-opc.h (VexSwapSources): New.
1126         (i386_opcode_modifier): Add vexswapsources.
1127         * i386-opc.tbl: Add VexSwapSources to BMI2 and BMI instructions
1128         with two source operands swapped.
1129         * i386-tbl.h: Regenerated.
1130
1131 2020-06-30  Nelson Chu  <nelson.chu@sifive.com>
1132
1133         * riscv-dis.c (print_insn_args, case 'E'): Updated.  Let the
1134         unprivileged CSR can also be initialized.
1135
1136 2020-06-29  Alan Modra  <amodra@gmail.com>
1137
1138         * arm-dis.c: Use C style comments.
1139         * cr16-opc.c: Likewise.
1140         * ft32-dis.c: Likewise.
1141         * moxie-opc.c: Likewise.
1142         * tic54x-dis.c: Likewise.
1143         * s12z-opc.c: Remove useless comment.
1144         * xgate-dis.c: Likewise.
1145
1146 2020-06-26  H.J. Lu  <hongjiu.lu@intel.com>
1147
1148         * i386-opc.tbl: Add a blank line.
1149
1150 2020-06-26  H.J. Lu  <hongjiu.lu@intel.com>
1151
1152         * i386-gen.c (opcode_modifiers): Replace VecSIB with SIB.
1153         (VecSIB128): Renamed to ...
1154         (VECSIB128): This.
1155         (VecSIB256): Renamed to ...
1156         (VECSIB256): This.
1157         (VecSIB512): Renamed to ...
1158         (VECSIB512): This.
1159         (VecSIB): Renamed to ...
1160         (SIB): This.
1161         (i386_opcode_modifier): Replace vecsib with sib.
1162         * i386-opc.tbl (VecSIB128): New.
1163         (VecSIB256): Likewise.
1164         (VecSIB512): Likewise.
1165         Replace VecSIB=1, VecSIB=2 and VecSIB=3 with VecSIB128, VecSIB256
1166         and VecSIB512, respectively.
1167
1168 2020-06-26  Jan Beulich  <jbeulich@suse.com>
1169
1170         * i386-dis.c: Adjust description of I macro.
1171         (x86_64_table): Drop use of I.
1172         (float_mem): Replace use of I.
1173         (putop): Remove handling of I. Adjust setting/clearing of "alt".
1174
1175 2020-06-26  Jan Beulich  <jbeulich@suse.com>
1176
1177         * i386-dis.c: (print_insn): Avoid straight assignment to
1178         priv.orig_sizeflag when processing -M sub-options.
1179
1180 2020-06-25  Jan Beulich  <jbeulich@suse.com>
1181
1182         * i386-dis.c: Adjust description of J macro.
1183         (dis386, x86_64_table, mod_table): Replace J.
1184         (putop): Remove handling of J.
1185
1186 2020-06-25  Jan Beulich  <jbeulich@suse.com>
1187
1188         * i386-dis.c: (float_mem): Reduce alternatives for fstpt and fldpt.
1189
1190 2020-06-25  Jan Beulich  <jbeulich@suse.com>
1191
1192         * i386-dis.c: Adjust description of "LQ" macro.
1193         (dis386_twobyte): Use LQ for sysret.
1194         (putop): Adjust handling of LQ.
1195
1196 2020-06-22  Nelson Chu  <nelson.chu@sifive.com>
1197
1198         * riscv-opc.c: Move the structures and functions to bfd/elfxx-riscv.c.
1199         * riscv-dis.c: Include elfxx-riscv.h.
1200
1201 2020-06-18  H.J. Lu  <hongjiu.lu@intel.com>
1202
1203         * i386-dis.c (prefix_table): Revert the last vmgexit change.
1204
1205 2020-06-17  Lili Cui  <lili.cui@intel.com>
1206
1207         * i386-dis.c (prefix_table): Delete the incorrect vmgexit.
1208
1209 2020-06-14  H.J. Lu  <hongjiu.lu@intel.com>
1210
1211         PR gas/26115
1212         * i386-dis.c (prefix_table): Replace xsuspldtrk with xsusldtrk.
1213         * i386-opc.tbl: Likewise.
1214         * i386-tbl.h: Regenerated.
1215
1216 2020-06-12  Nelson Chu  <nelson.chu@sifive.com>
1217
1218         * riscv-opc.c (priv_specs): Remove v1.9 and PRIV_SPEC_CLASS_1P9.
1219
1220 2020-06-11  Alex Coplan  <alex.coplan@arm.com>
1221
1222         * aarch64-opc.c (SYSREG): New macro for describing system registers.
1223         (SR_CORE): Likewise.
1224         (SR_FEAT): Likewise.
1225         (SR_RNG): Likewise.
1226         (SR_V8_1): Likewise.
1227         (SR_V8_2): Likewise.
1228         (SR_V8_3): Likewise.
1229         (SR_V8_4): Likewise.
1230         (SR_PAN): Likewise.
1231         (SR_RAS): Likewise.
1232         (SR_SSBS): Likewise.
1233         (SR_SVE): Likewise.
1234         (SR_ID_PFR2): Likewise.
1235         (SR_PROFILE): Likewise.
1236         (SR_MEMTAG): Likewise.
1237         (SR_SCXTNUM): Likewise.
1238         (aarch64_sys_regs): Refactor to store feature information in the table.
1239         (aarch64_sys_reg_supported_p): Collapse logic for system registers
1240         that now describe their own features.
1241         (aarch64_pstatefield_supported_p): Likewise.
1242
1243 2020-06-09  H.J. Lu  <hongjiu.lu@intel.com>
1244
1245         * i386-dis.c (prefix_table): Fix a typo in comments.
1246
1247 2020-06-09  Jan Beulich  <jbeulich@suse.com>
1248
1249         * i386-dis.c (rex_ignored): Delete.
1250         (ckprefix): Drop rex_ignored initialization.
1251         (get_valid_dis386): Drop setting of rex_ignored.
1252         (print_insn): Drop checking of rex_ignored. Don't record data
1253         size prefix as used with VEX-and-alike encodings.
1254
1255 2020-06-09  Jan Beulich  <jbeulich@suse.com>
1256
1257         * i386-dis.c (MOD_0F12_PREFIX_2, MOD_0F16_PREFIX_2,
1258         MOD_VEX_0F12_PREFIX_2, MOD_VEX_0F16_PREFIX_2): New enumerators.
1259         (VEX_LEN_0F12_P_2, VEX_LEN_0F16_P_2): Delete.
1260         (VEX_LEN_0F12_P_2_M_0, VEX_LEN_0F16_P_2_M_0): Define.
1261         (prefix_table): Decode MOD for cases 2 of opcodes 0F12, 0F16,
1262         VEX_0F12, and VEX_0F16.
1263         (vex_len_table): Use X for vmovlp* and vmovh*s. Drop
1264         VEX_LEN_0F12_P_2 and VEX_LEN_0F16_P_2 entries.
1265         (mod_table): Use X for movlpX and movhpX. Drop PREFIX_OPCODE
1266         from movlps and movhlps. New MOD_0F12_PREFIX_2,
1267         MOD_0F16_PREFIX_2, MOD_VEX_0F12_PREFIX_2, and
1268         MOD_VEX_0F16_PREFIX_2 entries.
1269
1270 2020-06-09  Jan Beulich  <jbeulich@suse.com>
1271
1272         * i386-dis.c (MOD_EVEX_0F12_PREFIX_2, MOD_EVEX_0F13,
1273         MOD_EVEX_0F16_PREFIX_2, MOD_EVEX_0F17, MOD_EVEX_0F2B): New enumerators.
1274         (PREFIX_EVEX_0F13, PREFIX_EVEX_0F14, PREFIX_EVEX_0F15,
1275         PREFIX_EVEX_0F17, PREFIX_EVEX_0F28, PREFIX_EVEX_0F29,
1276         PREFIX_EVEX_0F2B, PREFIX_EVEX_0F54, PREFIX_EVEX_0F55,
1277         PREFIX_EVEX_0F56, PREFIX_EVEX_0F57, PREFIX_EVEX_0FC6,
1278         EVEX_W_0F10_P_0, EVEX_W_0F10_P_2, EVEX_W_0F11_P_0,
1279         EVEX_W_0F11_P_2, EVEX_W_0F12_P_0_M_0, EVEX_W_0F12_P_2,
1280         EVEX_W_0F13_P_0, EVEX_W_0F13_P_2, EVEX_W_0F14_P_0,
1281         EVEX_W_0F14_P_2, EVEX_W_0F15_P_0, EVEX_W_0F15_P_2,
1282         EVEX_W_0F16_P_0_M_0, EVEX_W_0F16_P_2, EVEX_W_0F17_P_0,
1283         EVEX_W_0F17_P_2, EVEX_W_0F28_P_0, EVEX_W_0F28_P_2,
1284         EVEX_W_0F29_P_0, EVEX_W_0F29_P_2, EVEX_W_0F2B_P_0,
1285         EVEX_W_0F2B_P_2, EVEX_W_0F2E_P_0, EVEX_W_0F2E_P_2,
1286         EVEX_W_0F2F_P_0, EVEX_W_0F2F_P_2, EVEX_W_0F51_P_0,
1287         EVEX_W_0F51_P_2, EVEX_W_0F54_P_0, EVEX_W_0F54_P_2,
1288         EVEX_W_0F55_P_0, EVEX_W_0F55_P_2, EVEX_W_0F56_P_0,
1289         EVEX_W_0F56_P_2, EVEX_W_0F57_P_0, EVEX_W_0F57_P_2,
1290         EVEX_W_0F58_P_0, EVEX_W_0F58_P_2, EVEX_W_0F59_P_0,
1291         EVEX_W_0F59_P_2, EVEX_W_0F5C_P_0, EVEX_W_0F5C_P_2,
1292         EVEX_W_0F5D_P_0, EVEX_W_0F5D_P_2, EVEX_W_0F5E_P_0,
1293         EVEX_W_0F5E_P_2, EVEX_W_0F5F_P_0, EVEX_W_0F5F_P_2,
1294         EVEX_W_0FC2_P_0, EVEX_W_0FC2_P_2, EVEX_W_0FC6_P_0,
1295         EVEX_W_0FC6_P_2): Delete.
1296         (print_insn): Add EVEX.W vs embedded prefix consistency check
1297         to prefix validation.
1298         * i386-dis-evex.h (evex_table): Don't further descend for
1299         vunpcklpX, vunpckhpX, vmovapX, vandpX, vandnpX, vorpX, vxorpX,
1300         and vshufpX. Continue with MOD decoding for opcodes 0F13, 0F17,
1301         and 0F2B.
1302         * i386-dis-evex-mod.h: Add/adjust vmovlpX/vmovhpX entries.
1303         * i386-dis-evex-prefix.h: Don't further descend for vmovupX,
1304         vucomisX, vcomisX, vsqrtpX, vaddpX, vmulpX, vsubpX, vminpX,
1305         vdivpX, vmaxpX, and vcmppX. Continue with MOD decoding for cases
1306         2 of PREFIX_EVEX_0F12, PREFIX_EVEX_0F16, and PREFIX_EVEX_0F29.
1307         Drop PREFIX_EVEX_0F13, PREFIX_EVEX_0F14, PREFIX_EVEX_0F15,
1308         PREFIX_EVEX_0F17, PREFIX_EVEX_0F28, PREFIX_EVEX_0F2B,
1309         PREFIX_EVEX_0F54, PREFIX_EVEX_0F55, PREFIX_EVEX_0F56,
1310         PREFIX_EVEX_0F57, and PREFIX_EVEX_0FC6 entries.
1311         * i386-dis-evex-w.h: Drop EVEX_W_0F10_P_0, EVEX_W_0F10_P_2,
1312         EVEX_W_0F11_P_0, EVEX_W_0F11_P_2, EVEX_W_0F12_P_0_M_0,
1313         EVEX_W_0F12_P_2, EVEX_W_0F12_P_3, EVEX_W_0F13_P_0,
1314         EVEX_W_0F13_P_2, EVEX_W_0F14_P_0, EVEX_W_0F14_P_2,
1315         EVEX_W_0F15_P_0, EVEX_W_0F15_P_2, EVEX_W_0F16_P_0_M_0,
1316         EVEX_W_0F16_P_2, EVEX_W_0F17_P_0, EVEX_W_0F17_P_2,
1317         EVEX_W_0F28_P_0, EVEX_W_0F28_P_2, EVEX_W_0F29_P_0,
1318         EVEX_W_0F29_P_2, EVEX_W_0F2B_P_0, EVEX_W_0F2B_P_2,
1319         EVEX_W_0F2E_P_0, EVEX_W_0F2E_P_2, EVEX_W_0F2F_P_0,
1320         EVEX_W_0F2F_P_2, EVEX_W_0F51_P_0, EVEX_W_0F51_P_2,
1321         EVEX_W_0F54_P_0, EVEX_W_0F54_P_2, EVEX_W_0F55_P_0,
1322         EVEX_W_0F55_P_2, EVEX_W_0F56_P_0, EVEX_W_0F56_P_2,
1323         EVEX_W_0F57_P_0, EVEX_W_0F57_P_2, EVEX_W_0F58_P_0,
1324         EVEX_W_0F58_P_2, EVEX_W_0F59_P_0, EVEX_W_0F59_P_2,
1325         EVEX_W_0F5C_P_0, EVEX_W_0F5C_P_2, EVEX_W_0F5D_P_0,
1326         EVEX_W_0F5D_P_2, EVEX_W_0F5E_P_0, EVEX_W_0F5E_P_2,
1327         EVEX_W_0F5F_P_0, EVEX_W_0F5F_P_2, EVEX_W_0FC2_P_0,
1328         EVEX_W_0FC2_P_2, EVEX_W_0FC6_P_0, and EVEX_W_0FC6_P_2 entries.
1329
1330 2020-06-09  Jan Beulich  <jbeulich@suse.com>
1331
1332         * i386-dis.c (vex_table): Use PREFIX_OPCODE for vunpcklpX,
1333         vunpckhpX, vmovapX, vandpX, vandnpX, vorpX, vxorpX and vshufpX.
1334         (vex_len_table) : Likewise for vmovlpX, vmovhpX, vmovntpX, and
1335         vmovmskpX.
1336         (print_insn): Drop pointless check against bad_opcode. Split
1337         prefix validation into legacy and VEX-and-alike parts.
1338         (putop): Re-work 'X' macro handling.
1339
1340 2020-06-09  Jan Beulich  <jbeulich@suse.com>
1341
1342         * i386-dis.c (MOD_0F51): Rename to ...
1343         (MOD_0F50): ... this.
1344
1345 2020-06-08  Alex Coplan  <alex.coplan@arm.com>
1346
1347         * arm-dis.c (arm_opcodes): Add dfb.
1348         (thumb32_opcodes): Add dfb.
1349
1350 2020-06-08  Jan Beulich  <jbeulich@suse.com>
1351
1352         * i386-opc.h (reg_entry): Const-qualify reg_name field.
1353
1354 2020-06-06  Alan Modra  <amodra@gmail.com>
1355
1356         * ppc-dis.c (ppc_opts): Accept -mpwr10/-Mpwr10.
1357
1358 2020-06-05  Alan Modra  <amodra@gmail.com>
1359
1360         * cgen-dis.c (hash_insn_array): Increase size of buf.  Assert
1361         size is large enough.
1362
1363 2020-06-04  Jose E. Marchesi  <jose.marchesi@oracle.com>
1364
1365         * disassemble.c (disassemble_init_for_target): Set endian_code for
1366         bpf targets.
1367         * bpf-desc.c: Regenerate.
1368         * bpf-opc.c: Likewise.
1369         * bpf-dis.c: Likewise.
1370
1371 2020-06-03  Jose E. Marchesi  <jose.marchesi@oracle.com>
1372
1373         * cgen-opc.c (cgen_get_insn_value): Get an `endian' argument.
1374         (cgen_put_insn_value): Likewise.
1375         (cgen_lookup_insn): Pass endianness to cgen_{get,put}_insn_value.
1376         * cgen-dis.in (print_insn): Likewise.
1377         * cgen-ibld.in (insert_1): Likewise.
1378         (insert_1): Likewise.
1379         (insert_insn_normal): Likewise.
1380         (extract_1): Likewise.
1381         * bpf-dis.c: Regenerate.
1382         * bpf-ibld.c: Likewise.
1383         * bpf-ibld.c: Likewise.
1384         * cgen-dis.in: Likewise.
1385         * cgen-ibld.in: Likewise.
1386         * cgen-opc.c: Likewise.
1387         * epiphany-dis.c: Likewise.
1388         * epiphany-ibld.c: Likewise.
1389         * fr30-dis.c: Likewise.
1390         * fr30-ibld.c: Likewise.
1391         * frv-dis.c: Likewise.
1392         * frv-ibld.c: Likewise.
1393         * ip2k-dis.c: Likewise.
1394         * ip2k-ibld.c: Likewise.
1395         * iq2000-dis.c: Likewise.
1396         * iq2000-ibld.c: Likewise.
1397         * lm32-dis.c: Likewise.
1398         * lm32-ibld.c: Likewise.
1399         * m32c-dis.c: Likewise.
1400         * m32c-ibld.c: Likewise.
1401         * m32r-dis.c: Likewise.
1402         * m32r-ibld.c: Likewise.
1403         * mep-dis.c: Likewise.
1404         * mep-ibld.c: Likewise.
1405         * mt-dis.c: Likewise.
1406         * mt-ibld.c: Likewise.
1407         * or1k-dis.c: Likewise.
1408         * or1k-ibld.c: Likewise.
1409         * xc16x-dis.c: Likewise.
1410         * xc16x-ibld.c: Likewise.
1411         * xstormy16-dis.c: Likewise.
1412         * xstormy16-ibld.c: Likewise.
1413
1414 2020-06-04  Jose E. Marchesi  <jemarch@gnu.org>
1415
1416         * cgen-dis.in (cpu_desc_list): New field `insn_endian'.
1417         (print_insn_): Handle instruction endian.
1418         * bpf-dis.c: Regenerate.
1419         * bpf-desc.c: Regenerate.
1420         * epiphany-dis.c: Likewise.
1421         * epiphany-desc.c: Likewise.
1422         * fr30-dis.c: Likewise.
1423         * fr30-desc.c: Likewise.
1424         * frv-dis.c: Likewise.
1425         * frv-desc.c: Likewise.
1426         * ip2k-dis.c: Likewise.
1427         * ip2k-desc.c: Likewise.
1428         * iq2000-dis.c: Likewise.
1429         * iq2000-desc.c: Likewise.
1430         * lm32-dis.c: Likewise.
1431         * lm32-desc.c: Likewise.
1432         * m32c-dis.c: Likewise.
1433         * m32c-desc.c: Likewise.
1434         * m32r-dis.c: Likewise.
1435         * m32r-desc.c: Likewise.
1436         * mep-dis.c: Likewise.
1437         * mep-desc.c: Likewise.
1438         * mt-dis.c: Likewise.
1439         * mt-desc.c: Likewise.
1440         * or1k-dis.c: Likewise.
1441         * or1k-desc.c: Likewise.
1442         * xc16x-dis.c: Likewise.
1443         * xc16x-desc.c: Likewise.
1444         * xstormy16-dis.c: Likewise.
1445         * xstormy16-desc.c: Likewise.
1446
1447 2020-06-03  Nick Clifton  <nickc@redhat.com>
1448
1449         * po/sr.po: Updated Serbian translation.
1450
1451 2020-06-03  Nelson Chu  <nelson.chu@sifive.com>
1452
1453         * riscv-opc.c (riscv_get_isa_spec_class): Change bfd_boolean to int.
1454         (riscv_get_priv_spec_class): Likewise.
1455
1456 2020-06-01  Alan Modra  <amodra@gmail.com>
1457
1458         * bpf-desc.c: Regenerate.
1459
1460 2020-05-28  Jose E. Marchesi  <jose.marchesi@oracle.com>
1461             David Faust <david.faust@oracle.com>
1462
1463         * bpf-desc.c: Regenerate.
1464         * bpf-opc.h: Likewise.
1465         * bpf-opc.c: Likewise.
1466         * bpf-dis.c: Likewise.
1467
1468 2020-05-28  Alan Modra  <amodra@gmail.com>
1469
1470         * nios2-dis.c (nios2_print_insn_arg): Avoid shift left of negative
1471         values.
1472
1473 2020-05-28  Alan Modra  <amodra@gmail.com>
1474
1475         * ns32k-dis.c (print_insn_arg): Handle d value of 'f' for
1476         immediates.
1477         (print_insn_ns32k): Revert last change.
1478
1479 2020-05-28  Nick Clifton  <nickc@redhat.com>
1480
1481         * ns32k-dis.c (print_insn_ns32k): Change the arg_bufs array to
1482         static.
1483
1484 2020-05-26  Sandra Loosemore  <sandra@codesourcery.com>
1485
1486         Fix extraction of signed constants in nios2 disassembler (again).
1487
1488         * nios2-dis.c (nios2_print_insn_arg): Add explicit casts to
1489         extractions of signed fields.
1490
1491 2020-05-26  Stefan Schulze Frielinghaus  <stefansf@linux.ibm.com>
1492
1493         * s390-opc.txt: Relocate vector load/store instructions with
1494         additional alignment parameter and change architecture level
1495         constraint from z14 to z13.
1496
1497 2020-05-21  Alan Modra  <amodra@gmail.com>
1498
1499         * arc-ext.c: Replace "if (x) free (x)" with "free (x)" throughout.
1500         * sparc-dis.c: Likewise.
1501         * tic4x-dis.c: Likewise.
1502         * xtensa-dis.c: Likewise.
1503         * bpf-desc.c: Regenerate.
1504         * epiphany-desc.c: Regenerate.
1505         * fr30-desc.c: Regenerate.
1506         * frv-desc.c: Regenerate.
1507         * ip2k-desc.c: Regenerate.
1508         * iq2000-desc.c: Regenerate.
1509         * lm32-desc.c: Regenerate.
1510         * m32c-desc.c: Regenerate.
1511         * m32r-desc.c: Regenerate.
1512         * mep-asm.c: Regenerate.
1513         * mep-desc.c: Regenerate.
1514         * mt-desc.c: Regenerate.
1515         * or1k-desc.c: Regenerate.
1516         * xc16x-desc.c: Regenerate.
1517         * xstormy16-desc.c: Regenerate.
1518
1519 2020-05-20  Nelson Chu  <nelson.chu@sifive.com>
1520
1521         * riscv-opc.c (riscv_ext_version_table): The table used to store
1522         all information about the supported spec and the corresponding ISA
1523         versions.  Currently, only Zicsr is supported to verify the
1524         correctness of Z sub extension settings.  Others will be supported
1525         in the future patches.
1526         (struct isa_spec_t, isa_specs): List for all supported ISA spec
1527         classes and the corresponding strings.
1528         (riscv_get_isa_spec_class): New function.  Get the corresponding ISA
1529         spec class by giving a ISA spec string.
1530         * riscv-opc.c (struct priv_spec_t): New structure.
1531         (struct priv_spec_t priv_specs): List for all supported privilege spec
1532         classes and the corresponding strings.
1533         (riscv_get_priv_spec_class): New function.  Get the corresponding
1534         privilege spec class by giving a spec string.
1535         (riscv_get_priv_spec_name): New function.  Get the corresponding
1536         privilege spec string by giving a CSR version class.
1537         * riscv-dis.c: Updated since DECLARE_CSR is changed.
1538         * riscv-dis.c: Add new disassembler option -Mpriv-spec to dump the CSR
1539         according to the chosen version.  Build a hash table riscv_csr_hash to
1540         store the valid CSR for the chosen pirv verison.  Dump the direct
1541         CSR address rather than it's name if it is invalid.
1542         (parse_riscv_dis_option_without_args): New function.  Parse the options
1543         without arguments.
1544         (parse_riscv_dis_option): Call parse_riscv_dis_option_without_args to
1545         parse the options without arguments first, and then handle the options
1546         with arguments.  Add the new option -Mpriv-spec, which has argument.
1547         * riscv-dis.c (print_riscv_disassembler_options): Add description
1548         about the new OBJDUMP option.
1549
1550 2020-05-19  Peter Bergner  <bergner@linux.ibm.com>
1551
1552         * ppc-opc.c (insert_ls, extract_ls): Handle 3-bit L fields and new
1553         WC values on POWER10 sync, dcbf  and wait instructions.
1554         (insert_pl, extract_pl): New functions.
1555         (L2OPT, LS, WC): Use insert_ls and extract_ls.
1556         (LS3): New , 3-bit L for sync.
1557         (LS3, L3OPT): New, 3-bit L for sync and dcbf.
1558         (SC2, PL): New, 2-bit SC and PL for sync and wait.
1559         (XWCPL_MASK, XL3RT_MASK, XSYNCLS_MASK): New instruction masks.
1560         (XOPL3, XWCPL, XSYNCLS): New opcode macros.
1561         (powerpc_opcodes) <dcbflp, dcbfps, dcbstps pause_short, phwsync,
1562         plwsync, stcisync, stncisync, stsync, waitrsv>: New extended mnemonics.
1563         <wait>: Enable PL operand on POWER10.
1564         <dcbf>: Enable L3OPT operand on POWER10.
1565         <sync>: Enable SC2 operand on POWER10.
1566
1567 2020-05-19  Stafford Horne  <shorne@gmail.com>
1568
1569         PR 25184
1570         * or1k-asm.c: Regenerate.
1571         * or1k-desc.c: Regenerate.
1572         * or1k-desc.h: Regenerate.
1573         * or1k-dis.c: Regenerate.
1574         * or1k-ibld.c: Regenerate.
1575         * or1k-opc.c: Regenerate.
1576         * or1k-opc.h: Regenerate.
1577         * or1k-opinst.c: Regenerate.
1578
1579 2020-05-11  Alan Modra  <amodra@gmail.com>
1580
1581         * ppc-opc (powerpc_opcodes): Add xscmpeqqp, xscmpgeqp, xscmpgtqp,
1582         xsmaxcqp, xsmincqp.
1583
1584 2020-05-11  Alan Modra  <amodra@gmail.com>
1585
1586         * ppc-opc.c (powerpc_opcodes): Add lxvrbx, lxvrhx, lxvrwx, lxvrdx,
1587         stxvrbx, stxvrhx, stxvrwx, stxvrdx.
1588
1589 2020-05-11  Alan Modra  <amodra@gmail.com>
1590
1591         * ppc-opc.c (powerpc_opcodes): Add xvtlsbb.
1592
1593 2020-05-11  Alan Modra  <amodra@gmail.com>
1594
1595         * ppc-opc.c (powerpc_opcodes): Add vstribl, vstribr, vstrihl, vstrihr,
1596         vclrlb, vclrrb, vstribl., vstribr., vstrihl., vstrihr..
1597
1598 2020-05-11  Peter Bergner  <bergner@linux.ibm.com>
1599
1600         * ppc-opc.c (powerpc_opcodes) <setbc, setbcr, setnbc, setnbcr>: New
1601         mnemonics.
1602
1603 2020-05-11  Alan Modra  <amodra@gmail.com>
1604
1605         * ppc-opc.c (UIM8, P_U8XX4_MASK): Define.
1606         (powerpc_opcodes): Add vgnb, vcfuged, vpextd, vpdepd, vclzdm,
1607         vctzdm, cntlzdm, pdepd, pextd, cfuged, cnttzdm.
1608         (prefix_opcodes): Add xxeval.
1609
1610 2020-05-11  Alan Modra  <amodra@gmail.com>
1611
1612         * ppc-opc.c (powerpc_opcodes): Add xxgenpcvbm, xxgenpcvhm,
1613         xxgenpcvwm, xxgenpcvdm.
1614
1615 2020-05-11  Alan Modra  <amodra@gmail.com>
1616
1617         * ppc-opc.c (MP, VXVAM_MASK): Define.
1618         (VXVAPS_MASK): Use VXVA_MASK.
1619         (powerpc_opcodes): Add mtvsrbmi, vexpandbm, vexpandhm, vexpandwm,
1620         vexpanddm, vexpandqm, vextractbm, vextracthm, vextractwm,
1621         vextractdm, vextractqm, mtvsrbm, mtvsrhm, mtvsrwm, mtvsrdm, mtvsrqm,
1622         vcntmbb, vcntmbh, vcntmbw, vcntmbd.
1623
1624 2020-05-11  Alan Modra  <amodra@gmail.com>
1625             Peter Bergner  <bergner@linux.ibm.com>
1626
1627         * ppc-opc.c (insert_xa6a, extract_xa6a, insert_xb6a, extract_xb6a):
1628         New functions.
1629         (powerpc_operands): Define ACC, PMSK8, PMSK4, PMSK2, XMSK, YMSK,
1630         YMSK2, XA6a, XA6ap, XB6a entries.
1631         (PMMIRR, P_X_MASK, P_XX1_MASK, P_GER_MASK): Define
1632         (P_GER2_MASK, P_GER4_MASK, P_GER8_MASK, P_GER64_MASK): Define.
1633         (PPCVSX4): Define.
1634         (powerpc_opcodes): Add xxmfacc, xxmtacc, xxsetaccz,
1635         xvi8ger4pp, xvi8ger4, xvf16ger2pp, xvf16ger2, xvf32gerpp, xvf32ger,
1636         xvi4ger8pp, xvi4ger8, xvi16ger2spp, xvi16ger2s, xvbf16ger2pp,
1637         xvbf16ger2, xvf64gerpp, xvf64ger, xvi16ger2, xvf16ger2np,
1638         xvf32gernp, xvi8ger4spp, xvi16ger2pp, xvbf16ger2np, xvf64gernp,
1639         xvf16ger2pn, xvf32gerpn, xvbf16ger2pn, xvf64gerpn, xvf16ger2nn,
1640         xvf32gernn, xvbf16ger2nn, xvf64gernn, xvcvbf16sp, xvcvspbf16.
1641         (prefix_opcodes): Add pmxvi8ger4pp, pmxvi8ger4, pmxvf16ger2pp,
1642         pmxvf16ger2, pmxvf32gerpp, pmxvf32ger, pmxvi4ger8pp, pmxvi4ger8,
1643         pmxvi16ger2spp, pmxvi16ger2s, pmxvbf16ger2pp, pmxvbf16ger2,
1644         pmxvf64gerpp, pmxvf64ger, pmxvi16ger2, pmxvf16ger2np, pmxvf32gernp,
1645         pmxvi8ger4spp, pmxvi16ger2pp, pmxvbf16ger2np, pmxvf64gernp,
1646         pmxvf16ger2pn, pmxvf32gerpn, pmxvbf16ger2pn, pmxvf64gerpn,
1647         pmxvf16ger2nn, pmxvf32gernn, pmxvbf16ger2nn, pmxvf64gernn.
1648
1649 2020-05-11  Alan Modra  <amodra@gmail.com>
1650
1651         * ppc-opc.c (insert_imm32, extract_imm32): New functions.
1652         (insert_xts, extract_xts): New functions.
1653         (IMM32, UIM3, IX, UIM5, SH3, XTS, P8RR): Define.
1654         (P_XX4_MASK, P_UXX4_MASK, VSOP, P_VS_MASK, P_VSI_MASK): Define.
1655         (VXRC_MASK, VXSH_MASK): Define.
1656         (powerpc_opcodes): Add vinsbvlx, vsldbi, vextdubvlx, vextdubvrx,
1657         vextduhvlx, vextduhvrx, vextduwvlx, vextduwvrx, vextddvlx,
1658         vextddvrx, vinshvlx, vinswvlx, vinsw, vinsbvrx, vinshvrx,
1659         vinswvrx, vinsd, vinsblx, vsrdbi, vinshlx, vinswlx, vinsdlx,
1660         vinsbrx, vinshrx, vinswrx, vinsdrx, lxvkq.
1661         (prefix_opcodes): Add xxsplti32dx, xxspltidp, xxspltiw, xxblendvb,
1662         xxblendvh, xxblendvw, xxblendvd, xxpermx.
1663
1664 2020-05-11  Alan Modra  <amodra@gmail.com>
1665
1666         * ppc-opc.c (powerpc_opcodes): Add vrlq, vdivuq, vmsumcud, vrlqmi,
1667         vmuloud, vcmpuq, vslq, vdivsq, vcmpsq, vrlqnm, vcmpequq, vmulosd,
1668         vsrq, vdiveuq, vcmpgtuq, vmuleud, vsraq, vdivesq, vcmpgtsq, vmulesd,
1669         vcmpequq., vextsd2q, vmoduq, vcmpgtuq., vmodsq, vcmpgtsq., xscvqpuqz,
1670         xscvuqqp, xscvqpsqz, xscvsqqp, dcffixqq, dctfixqq.
1671
1672 2020-05-11  Alan Modra  <amodra@gmail.com>
1673
1674         * ppc-opc.c (insert_xtp, extract_xtp): New functions.
1675         (XTP, DQXP, DQXP_MASK): Define.
1676         (powerpc_opcodes): Add lxvp, stxvp, lxvpx, stxvpx.
1677         (prefix_opcodes): Add plxvp and pstxvp.
1678
1679 2020-05-11  Alan Modra  <amodra@gmail.com>
1680
1681         * ppc-opc.c (powerpc_opcodes): Add vdivuw, vdivud, vdivsw, vmulld,
1682         vdivsd, vmulhuw, vdiveuw, vmulhud, vdiveud, vmulhsw, vdivesw,
1683         vmulhsd, vdivesd, vmoduw, vmodud, vmodsw, vmodsd.
1684
1685 2020-05-11  Peter Bergner  <bergner@linux.ibm.com>
1686
1687         * ppc-opc.c (powerpc_opcodes) <brd, brh, brw>: New mnemonics.
1688
1689 2020-05-11  Peter Bergner  <bergner@linux.ibm.com>
1690
1691         * ppc-opc.c (insert_l1opt, extract_l1opt): New functions.
1692         (L1OPT): Define.
1693         (powerpc_opcodes) <paste.>: Add L operand for cpu POWER10.
1694
1695 2020-05-11  Peter Bergner  <bergner@linux.ibm.com>
1696
1697         * ppc-opc.c (powerpc_opcodes) <slbiag>: Add variant with L operand.
1698
1699 2020-05-11  Alan Modra  <amodra@gmail.com>
1700
1701         * ppc-dis.c (powerpc_init_dialect): Default to "power10".
1702
1703 2020-05-11  Alan Modra  <amodra@gmail.com>
1704
1705         * ppc-dis.c (ppc_opts): Add "power10" entry.
1706         (print_insn_powerpc): Update for PPC_OPCODE_POWER10 renaming.
1707         * ppc-opc.c (POWER10): Rename from POWERXX.  Update all uses.
1708
1709 2020-05-11  Nick Clifton  <nickc@redhat.com>
1710
1711         * po/fr.po: Updated French translation.
1712
1713 2020-04-30  Alex Coplan  <alex.coplan@arm.com>
1714
1715         * aarch64-opc.h (enum aarch64_field_kind): Add FLD_imm16_2.
1716         * aarch64-opc.c (fields): Add entry for FLD_imm16_2.
1717         (operand_general_constraint_met_p): validate
1718         AARCH64_OPND_UNDEFINED.
1719         * aarch64-tbl.h (aarch64_opcode_table): Add udf instruction, entry
1720         for FLD_imm16_2.
1721         * aarch64-asm-2.c: Regenerated.
1722         * aarch64-dis-2.c: Regenerated.
1723         * aarch64-opc-2.c: Regenerated.
1724
1725 2020-04-29  Nick Clifton  <nickc@redhat.com>
1726
1727         PR 22699
1728         * sh-opc.h: Also use unsigned 8-bit immediate values for the LDRC
1729         and SETRC insns.
1730
1731 2020-04-29  Nick Clifton  <nickc@redhat.com>
1732
1733         * po/sv.po: Updated Swedish translation.
1734
1735 2020-04-29  Nick Clifton  <nickc@redhat.com>
1736
1737         PR 22699
1738         * sh-opc.h (IMM0_8): Replace with IMM0_8S and IMM0_8U.  Use
1739         IMM0_8S for arithmetic insns and IMM0_8U for logical insns.
1740         * sh-dis.c (print_insn_sh): Change IMM0_8 case to IMM0_8S and add
1741         IMM0_8U case.
1742
1743 2020-04-21  Andreas Schwab  <schwab@linux-m68k.org>
1744
1745         PR 25848
1746         * m68k-opc.c (m68k_opcodes): Allow pc-rel for second operand of
1747         cmpi only on m68020up and cpu32.
1748
1749 2020-04-20  Sudakshina Das  <sudi.das@arm.com>
1750
1751         * aarch64-asm.c (aarch64_ins_none): New.
1752         * aarch64-asm.h (ins_none): New declaration.
1753         * aarch64-dis.c (aarch64_ext_none): New.
1754         * aarch64-dis.h (ext_none): New declaration.
1755         * aarch64-opc.c (aarch64_print_operand): Update case for
1756         AARCH64_OPND_BARRIER_PSB.
1757         * aarch64-tbl.h (aarch64_opcode_table): Add tsb.
1758         (AARCH64_OPERANDS): Update inserter/extracter for
1759         AARCH64_OPND_BARRIER_PSB to use new dummy functions.
1760         * aarch64-asm-2.c: Regenerated.
1761         * aarch64-dis-2.c: Regenerated.
1762         * aarch64-opc-2.c: Regenerated.
1763
1764 2020-04-20  Sudakshina Das  <sudi.das@arm.com>
1765
1766         * aarch64-tbl.h (aarch64_feature_bti, BTI, BTI_INSN): Remove.
1767         (aarch64_feature_ras, RAS): Likewise.
1768         (aarch64_feature_stat_profile, STAT_PROFILE): Likewise.
1769         (aarch64_opcode_table): Update bti, xpaclri, pacia1716, pacib1716,
1770         autia1716, autib1716, esb, psb, dgh, paciaz, paciasp, pacibz, pacibsp,
1771         autiaz, autiasp, autibz, autibsp to be CORE_INSN.
1772         * aarch64-asm-2.c: Regenerated.
1773         * aarch64-dis-2.c: Regenerated.
1774         * aarch64-opc-2.c: Regenerated.
1775
1776 2020-04-17  Fredrik Strupe  <fredrik@strupe.net>
1777
1778         * arm-dis.c (neon_opcodes): Fix VDUP instruction masks.
1779         (print_insn_neon): Support disassembly of conditional
1780         instructions.
1781
1782 2020-02-16  David Faust  <david.faust@oracle.com>
1783
1784         * bpf-desc.c: Regenerate.
1785         * bpf-desc.h: Likewise.
1786         * bpf-opc.c: Regenerate.
1787         * bpf-opc.h: Likewise.
1788
1789 2020-04-07  Lili Cui  <lili.cui@intel.com>
1790
1791         * i386-dis.c (enum): Add PREFIX_0F01_REG_5_MOD_3_RM_1,
1792         (prefix_table): New instructions (see prefixes above).
1793         (rm_table): Likewise
1794         * i386-gen.c (cpu_flag_init): Add CPU_TSXLDTRK_FLAGS,
1795         CPU_ANY_TSXLDTRK_FLAGS.
1796         (cpu_flags): Add CpuTSXLDTRK.
1797         * i386-opc.h (enum): Add CpuTSXLDTRK.
1798         (i386_cpu_flags): Add cputsxldtrk.
1799         * i386-opc.tbl: Add XSUSPLDTRK insns.
1800         * i386-init.h: Regenerate.
1801         * i386-tbl.h: Likewise.
1802
1803 2020-04-02  Lili Cui  <lili.cui@intel.com>
1804
1805         * i386-dis.c (prefix_table): New instructions serialize.
1806         * i386-gen.c (cpu_flag_init): Add CPU_SERIALIZE_FLAGS,
1807         CPU_ANY_SERIALIZE_FLAGS.
1808         (cpu_flags): Add CpuSERIALIZE.
1809         * i386-opc.h (enum): Add CpuSERIALIZE.
1810         (i386_cpu_flags): Add cpuserialize.
1811         * i386-opc.tbl: Add SERIALIZE insns.
1812         * i386-init.h: Regenerate.
1813         * i386-tbl.h: Likewise.
1814
1815 2020-03-26  Alan Modra  <amodra@gmail.com>
1816
1817         * disassemble.h (opcodes_assert): Declare.
1818         (OPCODES_ASSERT): Define.
1819         * disassemble.c: Don't include assert.h.  Include opintl.h.
1820         (opcodes_assert): New function.
1821         * h8300-dis.c (bfd_h8_disassemble_init): Use OPCODES_ASSERT.
1822         (bfd_h8_disassemble): Reduce size of data array.  Correctly
1823         calculate maxlen.  Omit insn decoding when insn length exceeds
1824         maxlen.  Exit from nibble loop when looking for E, before
1825         accessing next data byte.  Move processing of E outside loop.
1826         Replace tests of maxlen in loop with assertions.
1827
1828 2020-03-26  Alan Modra  <amodra@gmail.com>
1829
1830         * arc-dis.c (find_format): Init needs_limm.  Simplify use of limm.
1831
1832 2020-03-25  Alan Modra  <amodra@gmail.com>
1833
1834         * z80-dis.c (suffix): Init mybuf.
1835
1836 2020-03-22  Alan Modra  <amodra@gmail.com>
1837
1838         * h8300-dis.c (bfd_h8_disassemble): Limit data[] access to that
1839         successflly read from section.
1840
1841 2020-03-22  Alan Modra  <amodra@gmail.com>
1842
1843         * arc-dis.c (find_format): Use ISO C string concatenation rather
1844         than line continuation within a string.  Don't access needs_limm
1845         before testing opcode != NULL.
1846
1847 2020-03-22  Alan Modra  <amodra@gmail.com>
1848
1849         * ns32k-dis.c (print_insn_arg): Update comment.
1850         (print_insn_ns32k): Reduce size of index_offset array, and
1851         initialize, passing -1 to print_insn_arg for args that are not
1852         an index.  Don't exit arg loop early.  Abort on bad arg number.
1853
1854 2020-03-22  Alan Modra  <amodra@gmail.com>
1855
1856         * s12z-dis.c (abstract_read_memory): Don't print error on EOI.
1857         * s12z-opc.c: Formatting.
1858         (operands_f): Return an int.
1859         (opr_n_bytes_p1): Return -1 on reaching buffer memory limit.
1860         (opr_n_bytes2, bfextins_n_bytes, mul_n_bytes, bm_n_bytes),
1861         (shift_n_bytes, mov_imm_opr_n_bytes, loop_prim_n_bytes),
1862         (exg_sex_discrim): Likewise.
1863         (create_immediate_operand, create_bitfield_operand),
1864         (create_register_operand_with_size, create_register_all_operand),
1865         (create_register_all16_operand, create_simple_memory_operand),
1866         (create_memory_operand, create_memory_auto_operand): Don't
1867         segfault on malloc failure.
1868         (z_ext24_decode): Return an int status, negative on fail, zero
1869         on success.
1870         (x_imm1, imm1_decode, trap_decode, z_opr_decode, z_opr_decode2),
1871         (imm1234, reg_s_imm, reg_s_opr, z_imm1234_8base, z_imm1234_0base),
1872         (z_tfr, z_reg, reg_xy, lea_reg_xys_opr, lea_reg_xys, rel_15_7),
1873         (decode_rel_15_7, cmp_xy, sub_d6_x_y, sub_d6_y_x),
1874         (ld_18bit_decode, mul_decode, bm_decode, bm_rel_decode),
1875         (mov_imm_opr, ld_18bit_decode, exg_sex_decode),
1876         (loop_primitive_decode, shift_decode, psh_pul_decode),
1877         (bit_field_decode): Similarly.
1878         (z_decode_signed_value, decode_signed_value): Similarly.  Add arg
1879         to return value, update callers.
1880         (x_opr_decode_with_size): Check all reads, returning NULL on fail.
1881         Don't segfault on NULL operand.
1882         (decode_operation): Return OP_INVALID on first fail.
1883         (decode_s12z): Check all reads, returning -1 on fail.
1884
1885 2020-03-20  Alan Modra  <amodra@gmail.com>
1886
1887         * metag-dis.c (print_insn_metag): Don't ignore status from
1888         read_memory_func.
1889
1890 2020-03-20  Alan Modra  <amodra@gmail.com>
1891
1892         * nds32-dis.c (print_insn_nds32): Remove unnecessary casts.
1893         Initialize parts of buffer not written when handling a possible
1894         2-byte insn at end of section.  Don't attempt decoding of such
1895         an insn by the 4-byte machinery.
1896
1897 2020-03-20  Alan Modra  <amodra@gmail.com>
1898
1899         * ppc-dis.c (print_insn_powerpc): Only clear needed bytes of
1900         partially filled buffer.  Prevent lookup of 4-byte insns when
1901         only VLE 2-byte insns are possible due to section size.  Print
1902         ".word" rather than ".long" for 2-byte leftovers.
1903
1904 2020-03-17  Sergey Belyashov  <sergey.belyashov@gmail.com>
1905
1906         PR 25641
1907         * z80-dis.c: Fix disassembling ED+A4/AC/B4/BC opcodes.
1908
1909 2020-03-13  Jan Beulich  <jbeulich@suse.com>
1910
1911         * i386-dis.c (X86_64_0D): Rename to ...
1912         (X86_64_0E): ... this.
1913
1914 2020-03-09  H.J. Lu  <hongjiu.lu@intel.com>
1915
1916         * Makefile.am ($(srcdir)/i386-init.h): Also pass -P to $(CPP).
1917         * Makefile.in: Regenerated.
1918
1919 2020-03-09  Jan Beulich  <jbeulich@suse.com>
1920
1921         * i386-opc.tbl (avx_irel): New. Use is for AVX512 vpcmp*
1922         3-operand pseudos.
1923         * i386-tbl.h: Re-generate.
1924
1925 2020-03-09  Jan Beulich  <jbeulich@suse.com>
1926
1927         * i386-opc.tbl (xop_elem, xop_irel, xop_sign): New. Use them for XOP vpcom*,
1928         vprot*, vpsha*, and vpshl*.
1929         * i386-tbl.h: Re-generate.
1930
1931 2020-03-09  Jan Beulich  <jbeulich@suse.com>
1932
1933         * i386-opc.tbl (avx_frel): New. Use it for AVX/AVX512 vcmpps,
1934         vcmpss, vcmppd, and vcmpsd 3-operand pseudo-ops.
1935         * i386-tbl.h: Re-generate.
1936
1937 2020-03-09  Jan Beulich  <jbeulich@suse.com>
1938
1939         * i386-gen.c (set_bitfield): Ignore zero-length field names.
1940         * i386-opc.tbl (sse_frel): New. Use it for SSE/SSE2 cmpps,
1941         cmpss, cmppd, and cmpsd 2-operand pseudo-ops.
1942         * i386-tbl.h: Re-generate.
1943
1944 2020-03-09  Jan Beulich  <jbeulich@suse.com>
1945
1946         * i386-gen.c (struct template_arg, struct template_instance,
1947         struct template_param, struct template, templates,
1948         parse_template, expand_templates): New.
1949         (process_i386_opcodes): Various local variables moved to
1950         expand_templates. Call parse_template and expand_templates.
1951         * i386-opc.tbl (cc): New. Use it for Jcc, SETcc, and CMOVcc.
1952         * i386-tbl.h: Re-generate.
1953
1954 2020-03-06  Jan Beulich  <jbeulich@suse.com>
1955
1956         * i386-opc.tbl (vcvtdq2pd, vcvtps2pd, vcvtudq2pd, vcvtps2ph,
1957         vcvtps2qq, vcvtps2uqq, vcvttps2qq, vcvttps2uqq): Fold separate
1958         register and memory source templates. Replace VexW= by VexW*
1959         where applicable.
1960         * i386-tbl.h: Re-generate.
1961
1962 2020-03-06  Jan Beulich  <jbeulich@suse.com>
1963
1964         * i386-opc.tbl: Drop IgnoreSize from various SIMD insns. Replace
1965         VexW= by VexW* and VexVVVV=1 by just VexVVVV where applicable.
1966         * i386-tbl.h: Re-generate.
1967
1968 2020-03-06  Jan Beulich  <jbeulich@suse.com>
1969
1970         * i386-opc.tbl (fildll, fistpll, fisttpll): Add ATTSyntax.
1971         * i386-tbl.h: Re-generate.
1972
1973 2020-03-06  Jan Beulich  <jbeulich@suse.com>
1974
1975         * i386-opc.tbl (movq): Drop NoRex64 from XMM/XMM SSE2AVX variants.
1976         (movmskps, pextrw, pinsrw, pmovmskb, movmskpd, extractps,
1977         pextrb, pinsrb, roundsd): Drop NoRex64 and where applicable use
1978         VexW0 on SSE2AVX variants.
1979         (vmovq): Drop NoRex64 from XMM/XMM variants.
1980         (vextractps, vmovmskpd, vmovmskps, vpextrb, vpextrw, vpinsrb,
1981         vpinsrw, vpmovmskb, vroundsd, vpmovmskb): Drop NoRex64 and where
1982         applicable use VexW0.
1983         * i386-tbl.h: Re-generate.
1984
1985 2020-03-06  Jan Beulich  <jbeulich@suse.com>
1986
1987         * i386-gen.c (opcode_modifiers): Remove Rex64 field.
1988         * i386-opc.h (Rex64): Delete.
1989         (struct i386_opcode_modifier): Remove rex64 field.
1990         * i386-opc.tbl (crc32): Drop Rex64.
1991         Replace Rex64 with Size64 everywhere else.
1992         * i386-tbl.h: Re-generate.
1993
1994 2020-03-06  Jan Beulich  <jbeulich@suse.com>
1995
1996         * i386-dis.c (OP_E_memory): Exclude recording of used address
1997         prefix for "bnd" modes only in 64-bit mode. Don't decode 16-bit
1998         addressed memory operands for MPX insns.
1999
2000 2020-03-06  Jan Beulich  <jbeulich@suse.com>
2001
2002         * i386-opc.tbl (movmskps, mwait, vmread, vmwrite, invept,
2003         invvpid, invpcid, rdfsbase, rdgsbase, wrfsbase, wrgsbase, adcx,
2004         adox, mwaitx, rdpid, movdiri): Add IgnoreSize.
2005         (ptwrite): Split into non-64-bit and 64-bit forms.
2006         * i386-tbl.h: Re-generate.
2007
2008 2020-03-06  Jan Beulich  <jbeulich@suse.com>
2009
2010         * i386-opc.tbl (tpause, umwait): Add IgnoreSize. Add 3-operand
2011         template.
2012         * i386-tbl.h: Re-generate.
2013
2014 2020-03-04  Jan Beulich  <jbeulich@suse.com>
2015
2016         * i386-dis.c (PREFIX_0F01_REG_3_RM_1): New.
2017         (prefix_table): Move vmmcall here. Add vmgexit.
2018         (rm_table): Replace vmmcall entry by prefix_table[] escape.
2019         * i386-gen.c (cpu_flag_init): Add CPU_SEV_ES_FLAGS entry.
2020         (cpu_flags): Add CpuSEV_ES entry.
2021         * i386-opc.h (CpuSEV_ES): New.
2022         (union i386_cpu_flags): Add cpusev_es field.
2023         * i386-opc.tbl (vmgexit): New.
2024         * i386-init.h, i386-tbl.h: Re-generate.
2025
2026 2020-03-03  H.J. Lu  <hongjiu.lu@intel.com>
2027
2028         * i386-gen.c (opcode_modifiers): Replace IgnoreSize/DefaultSize
2029         with MnemonicSize.
2030         * i386-opc.h (IGNORESIZE): New.
2031         (DEFAULTSIZE): Likewise.
2032         (IgnoreSize): Removed.
2033         (DefaultSize): Likewise.
2034         (MnemonicSize): New.
2035         (i386_opcode_modifier): Replace ignoresize/defaultsize with
2036         mnemonicsize.
2037         * i386-opc.tbl (IgnoreSize): New.
2038         (DefaultSize): Likewise.
2039         * i386-tbl.h: Regenerated.
2040
2041 2020-03-03  Sergey Belyashov  <sergey.belyashov@gmail.com>
2042
2043         PR 25627
2044         * z80-dis.c: Fix disassembly of LD IY,(HL) and D (HL),IX
2045         instructions.
2046
2047 2020-03-03  H.J. Lu  <hongjiu.lu@intel.com>
2048
2049         PR gas/25622
2050         * i386-opc.tbl: Add IgnoreSize to cvtsi2sd, cvtsi2ss, vcvtsi2sd,
2051         vcvtsi2ss, vcvtusi2sd and vcvtusi2ss for AT&T syntax.
2052         * i386-tbl.h: Regenerated.
2053
2054 2020-02-26  Alan Modra  <amodra@gmail.com>
2055
2056         * aarch64-asm.c: Indent labels correctly.
2057         * aarch64-dis.c: Likewise.
2058         * aarch64-gen.c: Likewise.
2059         * aarch64-opc.c: Likewise.
2060         * alpha-dis.c: Likewise.
2061         * i386-dis.c: Likewise.
2062         * nds32-asm.c: Likewise.
2063         * nfp-dis.c: Likewise.
2064         * visium-dis.c: Likewise.
2065
2066 2020-02-25  Claudiu Zissulescu <claziss@gmail.com>
2067
2068         * arc-regs.h (int_vector_base): Make it available for all ARC
2069         CPUs.
2070
2071 2020-02-20  Nelson Chu  <nelson.chu@sifive.com>
2072
2073         * riscv-dis.c (print_insn_args): Updated since the DECLARE_CSR is
2074         changed.
2075
2076 2020-02-19  Nelson Chu  <nelson.chu@sifive.com>
2077
2078         * riscv-opc.c (riscv_opcodes): Convert add/addi to the compressed
2079         c.mv/c.li if rs1 is zero.
2080
2081 2020-02-17  H.J. Lu  <hongjiu.lu@intel.com>
2082
2083         * i386-gen.c (cpu_flag_init): Replace CpuABM with
2084         CpuLZCNT|CpuPOPCNT.  Add CpuPOPCNT to CPU_SSE4_2_FLAGS.  Add
2085         CPU_POPCNT_FLAGS.
2086         (cpu_flags): Remove CpuABM.  Add CpuPOPCNT.
2087         * i386-opc.h (CpuABM): Removed.
2088         (CpuPOPCNT): New.
2089         (i386_cpu_flags): Remove cpuabm.  Add cpupopcnt.
2090         * i386-opc.tbl: Replace CpuABM|CpuSSE4_2 with CpuPOPCNT on
2091         popcnt.  Remove CpuABM from lzcnt.
2092         * i386-init.h: Regenerated.
2093         * i386-tbl.h: Likewise.
2094
2095 2020-02-17  Jan Beulich  <jbeulich@suse.com>
2096
2097         * i386-opc.tbl (vcvtsi2sd, vcvtsi2ss, vcvtusi2sd, vcvtusi2ss):
2098         Fold CpuNo64 and Cpu64 templates. Use VexLIG/EVexLIG and VexW0/
2099         VexW1 instead of open-coding them.
2100         * i386-tbl.h: Re-generate.
2101
2102 2020-02-17  Jan Beulich  <jbeulich@suse.com>
2103
2104         * i386-opc.tbl (AddrPrefixOpReg): Define.
2105         (monitor, invlpga, vmload, vmrun, vmsave, clzero, monitorx,
2106         umonitor, movdir64b, enqcmd, enqcmds): Fold Cpu64 and CpuNo64
2107         templates. Drop NoRex64.
2108         * i386-tbl.h: Re-generate.
2109
2110 2020-02-17  Jan Beulich  <jbeulich@suse.com>
2111
2112         PR gas/6518
2113         * i386-opc.tbl (vcvtpd2dq, vcvtpd2ps, vcvttpd2dq, vcvtpd2udq,
2114         vcvttpd2udq, vcvtqq2ps, vcvtuqq2ps): Split XMM/YMM source forms
2115         into Intel syntax instance (with Unpsecified) and AT&T one
2116         (without).
2117         (vcvtneps2bf16): Likewise, along with folding the two so far
2118         separate ones.
2119         * i386-tbl.h: Re-generate.
2120
2121 2020-02-16  H.J. Lu  <hongjiu.lu@intel.com>
2122
2123         * i386-gen.c (cpu_flag_init): Remove CPU_ANY_SSE3_FLAGS from
2124         CPU_ANY_SSE4A_FLAGS.
2125
2126 2020-02-17  Alan Modra  <amodra@gmail.com>
2127
2128         * i386-gen.c (cpu_flag_init): Correct last change.
2129
2130 2020-02-16  H.J. Lu  <hongjiu.lu@intel.com>
2131
2132         * i386-gen.c (cpu_flag_init): Add CPU_ANY_SSE4A_FLAGS.  Remove
2133         CPU_ANY_SSE4_FLAGS.
2134
2135 2020-02-14  H.J. Lu  <hongjiu.lu@intel.com>
2136
2137         * i386-opc.tbl (movsx): Remove Intel syntax comments.
2138         (movzx): Likewise.
2139
2140 2020-02-14  Jan Beulich  <jbeulich@suse.com>
2141
2142         PR gas/25438
2143         * i386-opc.tbl (movsx): Fold patterns. Also allow Reg32 as
2144         destination for Cpu64-only variant.
2145         (movzx): Fold patterns.
2146         * i386-tbl.h: Re-generate.
2147
2148 2020-02-13  Jan Beulich  <jbeulich@suse.com>
2149
2150         * i386-gen.c (cpu_flag_init): Move CpuSSE4a from
2151         CPU_ANY_SSE_FLAGS entry to CPU_ANY_SSE3_FLAGS one. Add
2152         CPU_ANY_SSE4_FLAGS entry.
2153         * i386-init.h: Re-generate.
2154
2155 2020-02-12  Jan Beulich  <jbeulich@suse.com>
2156
2157         * i386-opc.tbl (vfpclasspd, vfpclassps): Add Intel sytax form
2158         with Unspecified, making the present one AT&T syntax only.
2159         * i386-tbl.h: Re-generate.
2160
2161 2020-02-12  Jan Beulich  <jbeulich@suse.com>
2162
2163         * i386-opc.tbl (jmp): Fold CpuNo64 and Amd64 direct variants.
2164         * i386-tbl.h: Re-generate.
2165
2166 2020-02-12  Jan Beulich  <jbeulich@suse.com>
2167
2168         PR gas/24546
2169         * i386-dis.c (putop): Handle REX.W in '^' case for Intel64 mode.
2170         * i386-opc.tbl (lfs, lgs, lss, lcall, ljmp): Split into
2171         Amd64 and Intel64 templates.
2172         (call, jmp): Likewise for far indirect variants. Dro
2173         Unspecified.
2174         * i386-tbl.h: Re-generate.
2175
2176 2020-02-11  Jan Beulich  <jbeulich@suse.com>
2177
2178         * i386-gen.c (opcode_modifiers): Remove ShortForm entry.
2179         * i386-opc.h (ShortForm): Delete.
2180         (struct i386_opcode_modifier): Remove shortform field.
2181         * i386-opc.tbl (mov, movabs, push, pop, xchg, inc, dec, fld,
2182         fst, fstp, fxch, fcom, fcomp, fucom, fucomp, fadd, faddp, fsub,
2183         fsubp, fsubr, fsubrp, fmul, fmulp, fdiv, fdivp, fdivr, fdivrp,
2184         ffreep, bswap, fcmov*, fcomi, fcomip, fucomi, fucomip, movq):
2185         Drop ShortForm.
2186         * i386-tbl.h: Re-generate.
2187
2188 2020-02-11  Jan Beulich  <jbeulich@suse.com>
2189
2190         * i386-opc.tbl (fcomi, fucomi, fcomip, fcompi, fucomip,
2191         fucompi): Drop ShortForm from operand-less templates.
2192         * i386-tbl.h: Re-generate.
2193
2194 2020-02-11  Alan Modra  <amodra@gmail.com>
2195
2196         * cgen-ibld.in (extract_normal): Set *valuep on all return paths.
2197         * bpf-ibld.c, * epiphany-ibld.c, * fr30-ibld.c, * frv-ibld.c,
2198         * ip2k-ibld.c, * iq2000-ibld.c, * lm32-ibld.c, * m32c-ibld.c,
2199         * m32r-ibld.c, * mep-ibld.c, * mt-ibld.c, * or1k-ibld.c,
2200         * xc16x-ibld.c, * xstormy16-ibld.c: Regenerate.
2201
2202 2020-02-10  Matthew Malcomson  <matthew.malcomson@arm.com>
2203
2204         * arm-dis.c (print_insn_cde): Define 'V' parse character.
2205         (cde_opcodes): Add VCX* instructions.
2206
2207 2020-02-10  Stam Markianos-Wright  <stam.markianos-wright@arm.com>
2208             Matthew Malcomson  <matthew.malcomson@arm.com>
2209
2210         * arm-dis.c (struct cdeopcode32): New.
2211         (CDE_OPCODE): New macro.
2212         (cde_opcodes): New disassembly table.
2213         (regnames): New option to table.
2214         (cde_coprocs): New global variable.
2215         (print_insn_cde): New
2216         (print_insn_thumb32): Use print_insn_cde.
2217         (parse_arm_disassembler_options): Parse coprocN args.
2218
2219 2020-02-10  H.J. Lu  <hongjiu.lu@intel.com>
2220
2221         PR gas/25516
2222         * i386-gen.c (opcode_modifiers): Replace AMD64 and Intel64
2223         with ISA64.
2224         * i386-opc.h (AMD64): Removed.
2225         (Intel64): Likewose.
2226         (AMD64): New.
2227         (INTEL64): Likewise.
2228         (INTEL64ONLY): Likewise.
2229         (i386_opcode_modifier): Replace amd64 and intel64 with isa64.
2230         * i386-opc.tbl (Amd64): New.
2231         (Intel64): Likewise.
2232         (Intel64Only): Likewise.
2233         Replace AMD64 with Amd64.  Update sysenter/sysenter with
2234         Cpu64 and Intel64Only.  Remove AMD64 from sysenter/sysenter.
2235         * i386-tbl.h: Regenerated.
2236
2237 2020-02-07  Sergey Belyashov  <sergey.belyashov@gmail.com>
2238
2239         PR 25469
2240         * z80-dis.c: Add support for GBZ80 opcodes.
2241
2242 2020-02-04  Alan Modra  <amodra@gmail.com>
2243
2244         * d30v-dis.c (print_insn): Make "val" and "opnum" unsigned.
2245
2246 2020-02-03  Alan Modra  <amodra@gmail.com>
2247
2248         * m32c-ibld.c: Regenerate.
2249
2250 2020-02-01  Alan Modra  <amodra@gmail.com>
2251
2252         * frv-ibld.c: Regenerate.
2253
2254 2020-01-31  Jan Beulich  <jbeulich@suse.com>
2255
2256         * i386-dis.c (EXxmm_mdq, xmm_mdq_mode): Delete.
2257         (intel_operand_size, OP_EX): Drop xmm_mdq_mode case label.
2258         (OP_E_memory): Replace xmm_mdq_mode case label by
2259         vex_scalar_w_dq_mode one.
2260         * i386-dis-evex-prefix.h: Replace EXxmm_mdq by EXVexWdqScalar.
2261
2262 2020-01-31  Jan Beulich  <jbeulich@suse.com>
2263
2264         * i386-dis.c (EXVexWdq, vex_w_dq_mode): Delete.
2265         (vex_vsib_d_w_dq_mode, vex_vsib_q_w_dq_mode,
2266         vex_scalar_w_dq_mode): Don't refer to vex_w_dq_mode in comments.
2267         (intel_operand_size): Drop vex_w_dq_mode case label.
2268
2269 2020-01-31  Richard Sandiford  <richard.sandiford@arm.com>
2270
2271         * aarch64-tbl.h (aarch64_opcode): Set C_MAX_ELEM for SVE bfcvt.
2272         Remove C_SCAN_MOVPRFX for SVE bfcvtnt.
2273
2274 2020-01-30  Alan Modra  <amodra@gmail.com>
2275
2276         * m32c-ibld.c: Regenerate.
2277
2278 2020-01-30  Jose E. Marchesi  <jose.marchesi@oracle.com>
2279
2280         * bpf-opc.c: Regenerate.
2281
2282 2020-01-30  Jan Beulich  <jbeulich@suse.com>
2283
2284         * i386-dis.c (X86_64_C2, X86_64_C3): New enumerators.
2285         (dis386): Use them to replace C2/C3 table entries.
2286         (x86_64_table): Add X86_64_C2 and X86_64_C3 entries.
2287         * i386-opc.tbl (ret): Split Cpu64 entries into AMD64 and Intel64
2288         ones. Use Size64 instead of DefaultSize on Intel64 ones.
2289         * i386-tbl.h: Re-generate.
2290
2291 2020-01-30  Jan Beulich  <jbeulich@suse.com>
2292
2293         * i386-opc.tbl (call): Drop DefaultSize from Intel64 JumpDword
2294         forms.
2295         (fldenv, fnstenv, fstenv, fnsave, fsave, frstor): Drop
2296         DefaultSize.
2297         * i386-tbl.h: Re-generate.
2298
2299 2020-01-30  Alan Modra  <amodra@gmail.com>
2300
2301         * tic4x-dis.c (tic4x_dp): Make unsigned.
2302
2303 2020-01-27  H.J. Lu  <hongjiu.lu@intel.com>
2304             Jan Beulich  <jbeulich@suse.com>
2305
2306         PR binutils/25445
2307         * i386-dis.c (MOVSXD_Fixup): New function.
2308         (movsxd_mode): New enum.
2309         (x86_64_table): Use MOVSXD_Fixup and movsxd_mode on movsxd.
2310         (intel_operand_size): Handle movsxd_mode.
2311         (OP_E_register): Likewise.
2312         (OP_G): Likewise.
2313         * i386-opc.tbl: Remove Rex64 and allow 32-bit destination
2314         register on movsxd.  Add movsxd with 16-bit destination register
2315         for AMD64 and Intel64 ISAs.
2316         * i386-tbl.h: Regenerated.
2317
2318 2020-01-27  Tamar Christina  <tamar.christina@arm.com>
2319
2320         PR 25403
2321         * aarch64-tbl.h (struct aarch64_opcode): Re-order cfinv.
2322         * aarch64-asm-2.c: Regenerate
2323         * aarch64-dis-2.c: Likewise.
2324         * aarch64-opc-2.c: Likewise.
2325
2326 2020-01-21  Jan Beulich  <jbeulich@suse.com>
2327
2328         * i386-opc.tbl (sysret): Drop DefaultSize.
2329         * i386-tbl.h: Re-generate.
2330
2331 2020-01-21  Jan Beulich  <jbeulich@suse.com>
2332
2333         * i386-opc.tbl (vcvtneps2bf16x): Add Broadcast, Xmmword, and
2334         Dword.
2335         (vcvtneps2bf16y): Add Broadcast, Ymmword, and Dword.
2336         * i386-tbl.h: Re-generate.
2337
2338 2020-01-20  Nick Clifton  <nickc@redhat.com>
2339
2340         * po/de.po: Updated German translation.
2341         * po/pt_BR.po: Updated Brazilian Portuguese translation.
2342         * po/uk.po: Updated Ukranian translation.
2343
2344 2020-01-20  Alan Modra  <amodra@gmail.com>
2345
2346         * hppa-dis.c (fput_const): Remove useless cast.
2347
2348 2020-01-20  Alan Modra  <amodra@gmail.com>
2349
2350         * arm-dis.c (print_insn_arm): Wrap 'T' value.
2351
2352 2020-01-18  Nick Clifton  <nickc@redhat.com>
2353
2354         * configure: Regenerate.
2355         * po/opcodes.pot: Regenerate.
2356
2357 2020-01-18  Nick Clifton  <nickc@redhat.com>
2358
2359         Binutils 2.34 branch created.
2360
2361 2020-01-17  Christian Biesinger  <cbiesinger@google.com>
2362
2363         * opintl.h: Fix spelling error (seperate).
2364
2365 2020-01-17  H.J. Lu  <hongjiu.lu@intel.com>
2366
2367         * i386-opc.tbl: Add {vex} pseudo prefix.
2368         * i386-tbl.h: Regenerated.
2369
2370 2020-01-16  Andre Vieira  <andre.simoesdiasvieira@arm.com>
2371
2372         PR 25376
2373         * opcodes/arm-dis.c (coprocessor_opcodes): Use CORE_HIGH for MVE bits.
2374         (neon_opcodes): Likewise.
2375         (select_arm_features): Make sure we enable MVE bits when selecting
2376         armv8.1-m.main.  Make sure we do not enable MVE bits when not selecting
2377         any architecture.
2378
2379 2020-01-16  Jan Beulich  <jbeulich@suse.com>
2380
2381         * i386-opc.tbl: Drop stale comment from XOP section.
2382
2383 2020-01-16  Jan Beulich  <jbeulich@suse.com>
2384
2385         * i386-opc.tbl (movq): Add VexWIG to SSE2AVX XMM->XMM forms.
2386         (extractps): Add VexWIG to SSE2AVX forms.
2387         * i386-tbl.h: Re-generate.
2388
2389 2020-01-16  Jan Beulich  <jbeulich@suse.com>
2390
2391         * i386-opc.tbl (pextrq, pinsrq): Drop IgnoreSize and Qword. Drop
2392         Size64 from and use VexW1 on SSE2AVX forms.
2393         (vpextrq, vpinsrq): Drop IgnoreSize and Qword. Drop Size64 from
2394         VEX-encoded forms. Add Cpu64 to EVEX-encoded forms. Use VexW1.
2395         * i386-tbl.h: Re-generate.
2396
2397 2020-01-15  Alan Modra  <amodra@gmail.com>
2398
2399         * tic4x-dis.c (tic4x_version): Make unsigned long.
2400         (optab, optab_special, registernames): New file scope vars.
2401         (tic4x_print_register): Set up registernames rather than
2402         malloc'd registertable.
2403         (tic4x_disassemble): Delete optable and optable_special.  Use
2404         optab and optab_special instead.  Throw away old optab,
2405         optab_special and registernames when info->mach changes.
2406
2407 2020-01-14  Sergey Belyashov  <sergey.belyashov@gmail.com>
2408
2409         PR 25377
2410         * z80-dis.c (suffix): Use .db instruction to generate double
2411         prefix.
2412
2413 2020-01-14  Alan Modra  <amodra@gmail.com>
2414
2415         * z8k-dis.c (unpack_instr): Formatting.  Cast unsigned short
2416         values to unsigned before shifting.
2417
2418 2020-01-13  Thomas Troeger  <tstroege@gmx.de>
2419
2420         * arm-dis.c (print_insn_arm): Fill in insn info fields for control
2421         flow instructions.
2422         (print_insn_thumb16, print_insn_thumb32): Likewise.
2423         (print_insn): Initialize the insn info.
2424         * i386-dis.c (print_insn): Initialize the insn info fields, and
2425         detect jumps.
2426
2427 2012-01-13  Claudiu Zissulescu <claziss@gmail.com>
2428
2429         * arc-opc.c (C_NE): Make it required.
2430
2431 2012-01-13  Claudiu Zissulescu <claziss@gmail.com>
2432
2433         * opcode/arc-dis.c (regnames): Correct ACCL/ACCH naming, fix typo
2434         reserved register name.
2435
2436 2020-01-13  Alan Modra  <amodra@gmail.com>
2437
2438         * ns32k-dis.c (Is_gen): Use strchr, add 'f'.
2439         (print_insn_ns32k): Adjust ioffset for 'f' index_offset.
2440
2441 2020-01-13  Alan Modra  <amodra@gmail.com>
2442
2443         * wasm32-dis.c (print_insn_wasm32): Localise variables.  Store
2444         result of wasm_read_leb128 in a uint64_t and check that bits
2445         are not lost when copying to other locals.  Use uint32_t for
2446         most locals.  Use PRId64 when printing int64_t.
2447
2448 2020-01-13  Alan Modra  <amodra@gmail.com>
2449
2450         * score-dis.c: Formatting.
2451         * score7-dis.c: Formatting.
2452
2453 2020-01-13  Alan Modra  <amodra@gmail.com>
2454
2455         * score-dis.c (print_insn_score48): Use unsigned variables for
2456         unsigned values.  Don't left shift negative values.
2457         (print_insn_score32): Likewise.
2458         * score7-dis.c (print_insn_score32, print_insn_score16): Likewise.
2459
2460 2020-01-13  Alan Modra  <amodra@gmail.com>
2461
2462         * tic4x-dis.c (tic4x_print_register): Remove dead code.
2463
2464 2020-01-13  Alan Modra  <amodra@gmail.com>
2465
2466         * fr30-ibld.c: Regenerate.
2467
2468 2020-01-13  Alan Modra  <amodra@gmail.com>
2469
2470         * xgate-dis.c (print_insn): Don't left shift signed value.
2471         (ripBits): Formatting, use 1u.
2472
2473 2020-01-10  Alan Modra  <amodra@gmail.com>
2474
2475         * tilepro-opc.c (parse_insn_tilepro): Make opval unsigned.
2476         * tilegx-opc.c (parse_insn_tilegx): Likewise.  Delete raw_opval.
2477
2478 2020-01-10  Alan Modra  <amodra@gmail.com>
2479
2480         * m10300-dis.c (disassemble): Move extraction of DREG, AREG, RREG,
2481         and XRREG value earlier to avoid a shift with negative exponent.
2482         * m10200-dis.c (disassemble): Similarly.
2483
2484 2020-01-09  Nick Clifton  <nickc@redhat.com>
2485
2486         PR 25224
2487         * z80-dis.c (ld_ii_ii): Use correct cast.
2488
2489 2020-01-03  Sergey Belyashov  <sergey.belyashov@gmail.com>
2490
2491         PR 25224
2492         * z80-dis.c (ld_ii_ii): Use character constant when checking
2493         opcode byte value.
2494
2495 2020-01-09  Jan Beulich  <jbeulich@suse.com>
2496
2497         * i386-dis.c (SEP_Fixup): New.
2498         (SEP): Define.
2499         (dis386_twobyte): Use it for sysenter/sysexit.
2500         (enum x86_64_isa): Change amd64 enumerator to value 1.
2501         (OP_J): Compare isa64 against intel64 instead of amd64.
2502         * i386-opc.tbl (sysenter, sysexit): Split into AMD64 and Intel64
2503         forms.
2504         * i386-tbl.h: Re-generate.
2505
2506 2020-01-08  Alan Modra  <amodra@gmail.com>
2507
2508         * z8k-dis.c: Include libiberty.h
2509         (instr_data_s): Make max_fetched unsigned.
2510         (z8k_lookup_instr): Make nibl_index and tabl_index unsigned.
2511         Don't exceed byte_info bounds.
2512         (output_instr): Make num_bytes unsigned.
2513         (unpack_instr): Likewise for nibl_count and loop.
2514         * z8kgen.c (gas <opcode_entry_type>): Make noperands, length and
2515         idx unsigned.
2516         * z8k-opc.h: Regenerate.
2517
2518 2020-01-07  Shahab Vahedi  <shahab@synopsys.com>
2519
2520         * arc-tbl.h (llock): Use 'LLOCK' as class.
2521         (llockd): Likewise.
2522         (scond): Use 'SCOND' as class.
2523         (scondd): Likewise.
2524         (llockd): Set data_size_mode to 'C_ZZ_D' which is 64-bit.
2525         (scondd): Likewise.
2526
2527 2020-01-06  Alan Modra  <amodra@gmail.com>
2528
2529         * m32c-ibld.c: Regenerate.
2530
2531 2020-01-06  Alan Modra  <amodra@gmail.com>
2532
2533         PR 25344
2534         * z80-dis.c (suffix): Don't use a local struct buffer copy.
2535         Peek at next byte to prevent recursion on repeated prefix bytes.
2536         Ensure uninitialised "mybuf" is not accessed.
2537         (print_insn_z80): Don't zero n_fetch and n_used here,..
2538         (print_insn_z80_buf): ..do it here instead.
2539
2540 2020-01-04  Alan Modra  <amodra@gmail.com>
2541
2542         * m32r-ibld.c: Regenerate.
2543
2544 2020-01-04  Alan Modra  <amodra@gmail.com>
2545
2546         * cr16-dis.c (cr16_match_opcode): Avoid shift left of signed value.
2547
2548 2020-01-04  Alan Modra  <amodra@gmail.com>
2549
2550         * crx-dis.c (match_opcode): Avoid shift left of signed value.
2551
2552 2020-01-04  Alan Modra  <amodra@gmail.com>
2553
2554         * d30v-dis.c (print_insn): Avoid signed overflow in left shift.
2555
2556 2020-01-03  Jan Beulich  <jbeulich@suse.com>
2557
2558         * aarch64-tbl.h (aarch64_opcode_table): Use
2559         SVE_ADDR_RX_LSL{1,2,3} for LD1RO{H,W,D}.
2560
2561 2020-01-03  Jan Beulich  <jbeulich@suse.com>
2562
2563         * aarch64-tbl.h (aarch64_opcode_table): Correct SIMD
2564         forms of SUDOT and USDOT.
2565
2566 2020-01-03  Jan Beulich  <jbeulich@suse.com>
2567
2568         * aarch64-tbl.h (aarch64_opcode_table): Drop 'i' from
2569         uzip{1,2}.
2570         * opcodes/aarch64-dis-2.c: Re-generate.
2571
2572 2020-01-03  Jan Beulich  <jbeulich@suse.com>
2573
2574         * aarch64-tbl.h (aarch64_opcode_table): Correct 64-bit
2575         FMMLA encoding.
2576         * opcodes/aarch64-dis-2.c: Re-generate.
2577
2578 2020-01-02  Sergey Belyashov  <sergey.belyashov@gmail.com>
2579
2580         * z80-dis.c: Add support for eZ80 and Z80 instructions.
2581
2582 2020-01-01  Alan Modra  <amodra@gmail.com>
2583
2584         Update year range in copyright notice of all files.
2585
2586 For older changes see ChangeLog-2019
2587 \f
2588 Copyright (C) 2020 Free Software Foundation, Inc.
2589
2590 Copying and distribution of this file, with or without modification,
2591 are permitted in any medium without royalty provided the copyright
2592 notice and this notice are preserved.
2593
2594 Local Variables:
2595 mode: change-log
2596 left-margin: 8
2597 fill-column: 74
2598 version-control: never
2599 End: