opcodes/ChangeLog

   1 2018-06-20  Sebastian Huber  <sebastian.huber@embedded-brains.de>
   2
   3         PR gas/23305
   4         * riscv-opc.c (riscv_opcodes): Use new format specifier 'B' for
   5         la and lla.
   6
   7 2018-06-19  Simon Marchi  <simon.marchi@ericsson.com>
   8
   9         * Makefile.am (AUTOMAKE_OPTIONS): Remove 1.11.
  10         * configure.ac: Remove AC_PREREQ.
  11         * Makefile.in: Re-generate.
  12         * aclocal.m4: Re-generate.
  13         * configure: Re-generate.
  14
  15 2018-06-14  Faraz Shahbazker  <Faraz.Shahbazker@mips.com>
  16
  17         * mips-dis.c (mips_arch_choices): Add GINV to mips32r6 and
  18         mips64r6 descriptors.
  19         (parse_mips_ase_option): Handle -Mginv option.
  20         (print_mips_disassembler_options): Document -Mginv.
  21         * mips-opc.c (decode_mips_operand) <+\>: New operand format.
  22         (GINV): New macro.
  23         (mips_opcodes): Define ginvi and ginvt.
  24
  25 2018-06-13  Scott Egerton  <scott.egerton@imgtec.com>
  26             Faraz Shahbazker  <Faraz.Shahbazker@mips.com>
  27
  28         * mips-dis.c (mips_arch_choices): Add CRC and CRC64 ASEs.
  29         * mips-opc.c (CRC, CRC64): New macros.
  30         (mips_builtin_opcodes): Define crc32b, crc32h, crc32w,
  31         crc32cb, crc32ch and crc32cw for CRC.  Define crc32d and
  32         crc32cd for CRC64.
  33
  34 2018-06-08  Egeyar Bagcioglu  <egeyar.bagcioglu@oracle.com>
  35
  36         PR 20319
  37         * aarch64-tbl.h: Introduce QL_INT2FP_FMOV and QL_FP2INT_FMOV.
  38         (aarch64_opcode_table) : Use QL_INT2FP_FMOV and QL_FP2INT_FMOV.
  39
  40 2018-06-06  Alan Modra  <amodra@gmail.com>
  41
  42         * xtensa-dis.c (print_insn_xtensa): Init fmt and valid_insn after
  43         setjmp.  Move init for some other vars later too.
  44
  45 2018-06-04  Max Filippov  <jcmvbkbc@gmail.com>
  46
  47         * xtensa-dis.c (bfd.h, elf/xtensa.h): New includes.
  48         (dis_private): Add new fields for property section tracking.
  49         (xtensa_coalesce_insn_tables, xtensa_find_table_entry)
  50         (xtensa_instruction_fits): New functions.
  51         (fetch_data): Bump minimal fetch size to 4.
  52         (print_insn_xtensa): Make struct dis_private static.
  53         Load and prepare property table on section change.
  54         Don't disassemble literals. Don't disassemble instructions that
  55         cross property table boundaries.
  56
  57 2018-06-01  H.J. Lu  <hongjiu.lu@intel.com>
  58
  59         * configure: Regenerated.
  60
  61 2018-06-01  Jan Beulich  <jbeulich@suse.com>
  62
  63         * i386-opc.tbl (mov, movq): Fold to/from SReg* forms.
  64         * i386-tbl.h: Re-generate.
  65
  66 2018-06-01  Jan Beulich  <jbeulich@suse.com>
  67
  68         * i386-opc.tbl (sldt, str): Add NoRex64.
  69         * i386-tbl.h: Re-generate.
  70
  71 2018-06-01  Jan Beulich  <jbeulich@suse.com>
  72
  73         * i386-opc.tbl (invpcid): Add Oword.
  74         * i386-tbl.h: Re-generate.
  75
  76 2018-06-01  Alan Modra  <amodra@gmail.com>
  77
  78         * sysdep.h (_bfd_error_handler): Don't declare.
  79         * msp430-decode.opc: Include bfd.h.  Don't include ansidecl.h here.
  80         * rl78-decode.opc: Likewise.
  81         * msp430-decode.c: Regenerate.
  82         * rl78-decode.c: Regenerate.
  83
  84 2018-05-30  Amit Pawar <Amit.Pawar@amd.com>
  85
  86         * i386-gen.c (cpu_flag_init): Add CPU_ZNVER2_FLAGS.
  87         * i386-init.h : Regenerated.
  88
  89 2018-05-25  Alan Modra  <amodra@gmail.com>
  90
  91         * Makefile.in: Regenerate.
  92         * po/POTFILES.in: Regenerate.
  93
  94 2018-05-21  Peter Bergner  <bergner@vnet.ibm.com.com>
  95
  96         * ppc-opc.c (insert_bat, extract_bat, insert_bba, extract_bba,
  97         insert_rbs, extract_rbs, insert_xb6s, extract_xb6s): Delete functions.
  98         (insert_bab, extract_bab, insert_btab, extract_btab,
  99         insert_rsb, extract_rsb, insert_xab6, extract_xab6): New functions.
 100         (BAT, BBA VBA RBS XB6S): Delete macros.
 101         (BTAB, BAB, VAB, RAB, RSB, XAB6): New macros.
 102         (BB, BD, RBX, XC6): Update for new macros.
 103         (powerpc_opcodes) <evmr, evnot, vmr, vnot, crnot, crclr, crset,
 104         crmove, not, not., mr, mr., xxspltd, xxswapd, xvmovsp, xvmovdp,
 105         e_crnot, e_crclr, e_crset, e_crmove>: Likewise.
 106         * ppc-dis.c (print_insn_powerpc): Delete handling of fake operands.
 107
 108 2018-05-18  John Darrington  <john@darrington.wattle.id.au>
 109
 110         * Makefile.am: Add support for s12z architecture.
 111         * configure.ac: Likewise.
 112         * disassemble.c: Likewise.
 113         * disassemble.h: Likewise.
 114         * Makefile.in: Regenerate.
 115         * configure: Regenerate.
 116         * s12z-dis.c: New file.
 117         * s12z.h: New file.
 118
 119 2018-05-18  Alan Modra  <amodra@gmail.com>
 120
 121         * nfp-dis.c: Don't #include libbfd.h.
 122         (init_nfp3200_priv): Use bfd_get_section_contents.
 123         (nit_nfp6000_mecsr_sec): Likewise.
 124
 125 2018-05-17  Nick Clifton  <nickc@redhat.com>
 126
 127         * po/zh_CN.po: Updated simplified Chinese translation.
 128
 129 2018-05-16  Tamar Christina  <tamar.christina@arm.com>
 130
 131         PR binutils/23109
 132         * aarch64-tbl.h (aarch64_opcode_table): Correct sdot and udot.
 133         * aarch64-dis-2.c: Regenerate.
 134
 135 2018-05-15  Tamar Christina  <tamar.christina@arm.com>
 136
 137         PR binutils/21446
 138         * aarch64-asm.c (opintl.h): Include.
 139         (aarch64_ins_sysreg): Enforce read/write constraints.
 140         * aarch64-dis.c (aarch64_ext_sysreg): Likewise.
 141         * aarch64-opc.h (F_DEPRECATED, F_ARCHEXT, F_HASXT): Moved here.
 142         (F_REG_READ, F_REG_WRITE): New.
 143         * aarch64-opc.c (aarch64_print_operand): Generate notes for
 144         AARCH64_OPND_SYSREG.
 145         (F_DEPRECATED, F_ARCHEXT, F_HASXT): Move to aarch64-opc.h.
 146         (aarch64_sys_regs): Add constraints to currentel, midr_el1, ctr_el0,
 147         mpidr_el1, revidr_el1, aidr_el1, dczid_el0, id_dfr0_el1, id_pfr0_el1,
 148         id_pfr1_el1, id_afr0_el1, id_mmfr0_el1, id_mmfr1_el1, id_mmfr2_el1,
 149         id_mmfr3_el1, id_mmfr4_el1, id_isar0_el1, id_isar1_el1, id_isar2_el1,
 150         id_isar3_el1, id_isar4_el1, id_isar5_el1, mvfr0_el1, mvfr1_el1,
 151         mvfr2_el1, ccsidr_el1, id_aa64pfr0_el1, id_aa64pfr1_el1,
 152         id_aa64dfr0_el1, id_aa64dfr1_el1, id_aa64isar0_el1, id_aa64isar1_el1,
 153         id_aa64mmfr0_el1, id_aa64mmfr1_el1, id_aa64mmfr2_el1, id_aa64afr0_el1,
 154         id_aa64afr0_el1, id_aa64afr1_el1, id_aa64zfr0_el1, clidr_el1,
 155         csselr_el1, vsesr_el2, erridr_el1, erxfr_el1, rvbar_el1, rvbar_el2,
 156         rvbar_el3, isr_el1, tpidrro_el0, cntfrq_el0, cntpct_el0, cntvct_el0,
 157         mdccsr_el0, dbgdtrrx_el0, dbgdtrtx_el0, osdtrrx_el1, osdtrtx_el1,
 158         mdrar_el1, oslar_el1, oslsr_el1, dbgauthstatus_el1, pmbidr_el1,
 159         pmsidr_el1, pmswinc_el0, pmceid0_el0, pmceid1_el0.
 160         * aarch64-tbl.h (aarch64_opcode_table): Add constraints to
 161         msr (F_SYS_WRITE), mrs (F_SYS_READ).
 162
 163 2018-05-15  Tamar Christina  <tamar.christina@arm.com>
 164
 165         PR binutils/21446
 166         * aarch64-dis.c (no_notes: New.
 167         (parse_aarch64_dis_option): Support notes.
 168         (aarch64_decode_insn, print_operands): Likewise.
 169         (print_aarch64_disassembler_options): Document notes.
 170         * aarch64-opc.c (aarch64_print_operand): Support notes.
 171
 172 2018-05-15  Tamar Christina  <tamar.christina@arm.com>
 173
 174         PR binutils/21446
 175         * aarch64-asm.h (aarch64_insert_operand, aarch64_##x): Return boolean
 176         and take error struct.
 177         * aarch64-asm.c (aarch64_ext_regno, aarch64_ins_reglane,
 178         aarch64_ins_reglist, aarch64_ins_ldst_reglist,
 179         aarch64_ins_ldst_reglist_r, aarch64_ins_ldst_elemlist,
 180         aarch64_ins_advsimd_imm_shift, aarch64_ins_imm, aarch64_ins_imm_half,
 181         aarch64_ins_advsimd_imm_modified, aarch64_ins_fpimm,
 182         aarch64_ins_imm_rotate1, aarch64_ins_imm_rotate2, aarch64_ins_fbits,
 183         aarch64_ins_aimm, aarch64_ins_limm_1, aarch64_ins_limm,
 184         aarch64_ins_inv_limm, aarch64_ins_ft, aarch64_ins_addr_simple,
 185         aarch64_ins_addr_regoff, aarch64_ins_addr_offset, aarch64_ins_addr_simm,
 186         aarch64_ins_addr_simm10, aarch64_ins_addr_uimm12,
 187         aarch64_ins_simd_addr_post, aarch64_ins_cond, aarch64_ins_sysreg,
 188         aarch64_ins_pstatefield, aarch64_ins_sysins_op, aarch64_ins_barrier,
 189         aarch64_ins_prfop, aarch64_ins_hint, aarch64_ins_reg_extended,
 190         aarch64_ins_reg_shifted, aarch64_ins_sve_addr_ri_s4xvl,
 191         aarch64_ins_sve_addr_ri_s6xvl, aarch64_ins_sve_addr_ri_s9xvl,
 192         aarch64_ins_sve_addr_ri_s4, aarch64_ins_sve_addr_ri_u6,
 193         aarch64_ins_sve_addr_rr_lsl, aarch64_ins_sve_addr_rz_xtw,
 194         aarch64_ins_sve_addr_zi_u5, aarch64_ext_sve_addr_zz,
 195         aarch64_ins_sve_addr_zz_lsl, aarch64_ins_sve_addr_zz_sxtw,
 196         aarch64_ins_sve_addr_zz_uxtw, aarch64_ins_sve_aimm,
 197         aarch64_ins_sve_asimm, aarch64_ins_sve_index, aarch64_ins_sve_limm_mov,
 198         aarch64_ins_sve_quad_index, aarch64_ins_sve_reglist,
 199         aarch64_ins_sve_scale, aarch64_ins_sve_shlimm, aarch64_ins_sve_shrimm,
 200         aarch64_ins_sve_float_half_one, aarch64_ins_sve_float_half_two,
 201         aarch64_ins_sve_float_zero_one, aarch64_opcode_encode): Likewise.
 202         * aarch64-dis.h (aarch64_extract_operand, aarch64_##x): Likewise.
 203         * aarch64-dis.c (aarch64_ext_regno, aarch64_ext_reglane,
 204         aarch64_ext_reglist, aarch64_ext_ldst_reglist,
 205         aarch64_ext_ldst_reglist_r, aarch64_ext_ldst_elemlist,
 206         aarch64_ext_advsimd_imm_shift, aarch64_ext_imm, aarch64_ext_imm_half,
 207         aarch64_ext_advsimd_imm_modified, aarch64_ext_fpimm,
 208         aarch64_ext_imm_rotate1, aarch64_ext_imm_rotate2, aarch64_ext_fbits,
 209         aarch64_ext_aimm, aarch64_ext_limm_1, aarch64_ext_limm, decode_limm,
 210         aarch64_ext_inv_limm, aarch64_ext_ft, aarch64_ext_addr_simple,
 211         aarch64_ext_addr_regoff, aarch64_ext_addr_offset, aarch64_ext_addr_simm,
 212         aarch64_ext_addr_simm10, aarch64_ext_addr_uimm12,
 213         aarch64_ext_simd_addr_post, aarch64_ext_cond, aarch64_ext_sysreg,
 214         aarch64_ext_pstatefield, aarch64_ext_sysins_op, aarch64_ext_barrier,
 215         aarch64_ext_prfop, aarch64_ext_hint, aarch64_ext_reg_extended,
 216         aarch64_ext_reg_shifted, aarch64_ext_sve_addr_ri_s4xvl,
 217         aarch64_ext_sve_addr_ri_s6xvl, aarch64_ext_sve_addr_ri_s9xvl,
 218         aarch64_ext_sve_addr_ri_s4, aarch64_ext_sve_addr_ri_u6,
 219         aarch64_ext_sve_addr_rr_lsl, aarch64_ext_sve_addr_rz_xtw,
 220         aarch64_ext_sve_addr_zi_u5, aarch64_ext_sve_addr_zz,
 221         aarch64_ext_sve_addr_zz_lsl, aarch64_ext_sve_addr_zz_sxtw,
 222         aarch64_ext_sve_addr_zz_uxtw, aarch64_ext_sve_aimm,
 223         aarch64_ext_sve_asimm, aarch64_ext_sve_index, aarch64_ext_sve_limm_mov,
 224         aarch64_ext_sve_quad_index, aarch64_ext_sve_reglist,
 225         aarch64_ext_sve_scale, aarch64_ext_sve_shlimm, aarch64_ext_sve_shrimm,
 226         aarch64_ext_sve_float_half_one, aarch64_ext_sve_float_half_two,
 227         aarch64_ext_sve_float_zero_one, aarch64_opcode_decode): Likewise.
 228         (determine_disassembling_preference, aarch64_decode_insn,
 229         print_insn_aarch64_word, print_insn_data): Take errors struct.
 230         (print_insn_aarch64): Use errors.
 231         * aarch64-asm-2.c: Regenerate.
 232         * aarch64-dis-2.c: Regenerate.
 233         * aarch64-gen.c (print_operand_inserter): Use errors and change type to
 234         boolean in aarch64_insert_operan.
 235         (print_operand_extractor): Likewise.
 236         * aarch64-opc.c (aarch64_print_operand): Use sysreg struct.
 237
 238 2018-05-15  Francois H. Theron  <francois.theron@netronome.com>
 239
 240         * nfp-dis.c: Use uint64_t for instruction variables, not bfd_vma.
 241
 242 2018-05-09  H.J. Lu  <hongjiu.lu@intel.com>
 243
 244         * i386-opc.tbl: Remove Disp<N> from movidir{i,64b}.
 245
 246 2018-05-09  Sebastian Rasmussen  <sebras@gmail.com>
 247
 248         * cr16-opc.c (cr16_instruction): Comment typo fix.
 249         * hppa-dis.c (print_insn_hppa): Likewise.
 250
 251 2018-05-08  Jim Wilson  <jimw@sifive.com>
 252
 253         * riscv-opc.c (match_c_slli, match_slli_as_c_slli): New.
 254         (match_c_slli64, match_srxi_as_c_srxi): New.
 255         (riscv_opcodes) <slli, sll>: Use match_slli_as_c_slli.
 256         <srli, srl, srai, sra>: Use match_srxi_as_c_srxi.
 257         <c.slli, c.srli, c.srai>: Use match_s_slli.
 258         <c.slli64, c.srli64, c.srai64>: New.
 259
 260 2018-05-08  Alan Modra  <amodra@gmail.com>
 261
 262         * ppc-dis.c (PPC_OPCD_SEGS): Define using PPC_OP.
 263         (VLE_OPCD_SEGS, SPE2_OPCD_SEGS): Similarly, using macros used to
 264         partition opcode space for index lookup.
 265
 266 2018-05-07  Peter Bergner  <bergner@vnet.ibm.com.com>
 267
 268         * ppc-dis.c (print_insn_powerpc) <insn_is_short>: Replace this...
 269         <insn_length>: ...with this.  Update usage.
 270         Remove duplicate call to *info->memory_error_func.
 271
 272 2018-05-07  Igor Tsimbalist  <igor.v.tsimbalist@intel.com>
 273             H.J. Lu  <hongjiu.lu@intel.com>
 274
 275         * i386-dis.c (Gva): New.
 276         (enum): Add PREFIX_0F38F8, PREFIX_0F38F9,
 277         MOD_0F38F8_PREFIX_2, MOD_0F38F9_PREFIX_0.
 278         (prefix_table): New instructions (see prefix above).
 279         (mod_table): New instructions (see prefix above).
 280         (OP_G): Handle va_mode.
 281         * i386-gen.c (cpu_flag_init): Add CPU_MOVDIRI_FLAGS,
 282         CPU_MOVDIR64B_FLAGS.
 283         (cpu_flags): Add CpuMOVDIRI and CpuMOVDIR64B.
 284         * i386-opc.h (enum): Add CpuMOVDIRI, CpuMOVDIR64B.
 285         (i386_cpu_flags): Add cpumovdiri and cpumovdir64b.
 286         * i386-opc.tbl: Add movidir{i,64b}.
 287         * i386-init.h: Regenerated.
 288         * i386-tbl.h: Likewise.
 289
 290 2018-05-07  H.J. Lu  <hongjiu.lu@intel.com>
 291
 292         * i386-gen.c (opcode_modifiers): Replace AddrPrefixOp0 with
 293         AddrPrefixOpReg.
 294         * i386-opc.h (AddrPrefixOp0): Renamed to ...
 295         (AddrPrefixOpReg): This.
 296         (i386_opcode_modifier): Rename addrprefixop0 to addrprefixopreg.
 297         * i386-opc.tbl: Replace AddrPrefixOp0 with AddrPrefixOpReg.
 298
 299 2018-05-07  Peter Bergner  <bergner@vnet.ibm.com.com>
 300
 301         * ppc-opc.c (powerpc_num_opcodes): Change type to unsigned.
 302         (vle_num_opcodes): Likewise.
 303         (spe2_num_opcodes): Likewise.
 304         * ppc-dis.c (disassemble_init_powerpc) <powerpc_opcd_indices>: Rewrite
 305         initialization loop.
 306         (disassemble_init_powerpc) <vle_opcd_indices>: Likewise.
 307         (disassemble_init_powerpc) <spe2_opcd_indices>: Likewise.  Initialize
 308         only once.
 309
 310 2018-05-01  Tamar Christina  <tamar.christina@arm.com>
 311
 312         * aarch64-dis.c (aarch64_opcode_decode): Moved memory clear code.
 313
 314 2018-04-30  Francois H. Theron <francois.theron@netronome.com>
 315
 316         Makefile.am: Added nfp-dis.c.
 317         configure.ac: Added bfd_nfp_arch.
 318         disassemble.h: Added print_insn_nfp prototype.
 319         disassemble.c: Added ARCH_nfp and call to print_insn_nfp
 320         nfp-dis.c: New, for NFP support.
 321         po/POTFILES.in: Added nfp-dis.c to the list.
 322         Makefile.in: Regenerate.
 323         configure: Regenerate.
 324
 325 2018-04-26  Jan Beulich  <jbeulich@suse.com>
 326
 327         * i386-opc.tbl: Fold various non-memory operand AVX512VL
 328         templates into their base ones.
 329         * i386-tlb.h: Re-generate.
 330
 331 2018-04-26  Jan Beulich  <jbeulich@suse.com>
 332
 333         * i386-gen.c (cpu_flag_init): Use CPU_XOP_FLAGS for
 334         CPU_BDVER1_FLAGS. Use CPU_AVX2_FLAGS for CPU_ZNVER1_FLAGS. Use
 335         CPU_AVX_FLAGS for CPU_BTVER1_FLAGS. Add CPU_XSAVE_FLAGS to
 336         CPU_LWP_FLAGS, CPU_AVX_FLAGS, CPU_MPX_FLAGS, and CPU_OSPKE_FLAGS.
 337         * i386-init.h: Re-generate.
 338
 339 2018-04-26  Jan Beulich  <jbeulich@suse.com>
 340
 341         * i386-gen.c (cpu_flag_init): Drop all uses of CpuRegMMX,
 342         CpuRegXMM, CpuRegYMM, CpuRegZMM, and CpuRegMask. Use
 343         CPU_AVX2_FLAGS for CPU_AVX512F_FLAGS and drop bogus comment.
 344         Don't use CPU_AVX2_FLAGS for CPU_AVX512VL_FLAGS and drop bogus
 345         comment.
 346         (cpu_flags): Drop CpuRegMMX, CpuRegXMM, CpuRegYMM, CpuRegZMM,
 347         and CpuRegMask.
 348         * i386-opc.h: CpuRegMMX, CpuRegXMM, CpuRegYMM, CpuRegZMM,
 349         CpuRegMask: Delete.
 350         (union i386_cpu_flags): Remove cpuregmmx, cpuregxmm, cpuregymm,
 351         cpuregzmm, and cpuregmask.
 352         * i386-init.h: Re-generate.
 353         * i386-tbl.h: Re-generate.
 354
 355 2018-04-26  Jan Beulich  <jbeulich@suse.com>
 356
 357         * i386-gen.c (cpu_flag_init): CPU_I586_FLAGS inherits Cpu387 only.
 358         CPU_287_FLAGS is Cpu287 only. CPU_387_FLAGS is Cpu387 only.
 359         * i386-init.h: Re-generate.
 360
 361 2018-04-26  Jan Beulich  <jbeulich@suse.com>
 362
 363         * i386-gen.c (VexImmExt): Delete.
 364         * i386-opc.h (VexImmExt, veximmext): Delete.
 365         * i386-opc.tbl: Drop all VexImmExt uses.
 366         * i386-tlb.h: Re-generate.
 367
 368 2018-04-25  Jan Beulich  <jbeulich@suse.com>
 369
 370         * i386-opc.tbl (vpslld, vpsrad, vpsrld): Drop AVX512VL
 371         register-only forms.
 372         * i386-tlb.h: Re-generate.
 373
 374 2018-04-25  Tamar Christina  <tamar.christina@arm.com>
 375
 376         * aarch64-tbl.h (sqrdmlah, sqrdmlsh): Fix masks.
 377
 378 2018-04-17  Igor Tsimbalist  <igor.v.tsimbalist@intel.com>
 379
 380         * i386-dis.c: Add REG_0F1C_MOD_0, MOD_0F1C_PREFIX_0,
 381         PREFIX_0F1C.
 382         * i386-gen.c (cpu_flag_init): Add CPU_CLDEMOTE_FLAGS,
 383         (cpu_flags): Add CpuCLDEMOTE.
 384         * i386-init.h: Regenerate.
 385         * i386-opc.h (enum): Add CpuCLDEMOTE,
 386         (i386_cpu_flags): Add cpucldemote.
 387         * i386-opc.tbl: Add cldemote.
 388         * i386-tbl.h: Regenerate.
 389
 390 2018-04-16  Alan Modra  <amodra@gmail.com>
 391
 392         * Makefile.am: Remove sh5 and sh64 support.
 393         * configure.ac: Likewise.
 394         * disassemble.c: Likewise.
 395         * disassemble.h: Likewise.
 396         * sh-dis.c: Likewise.
 397         * sh64-dis.c: Delete.
 398         * sh64-opc.c: Delete.
 399         * sh64-opc.h: Delete.
 400         * Makefile.in: Regenerate.
 401         * configure: Regenerate.
 402         * po/POTFILES.in: Regenerate.
 403
 404 2018-04-16  Alan Modra  <amodra@gmail.com>
 405
 406         * Makefile.am: Remove w65 support.
 407         * configure.ac: Likewise.
 408         * disassemble.c: Likewise.
 409         * disassemble.h: Likewise.
 410         * w65-dis.c: Delete.
 411         * w65-opc.h: Delete.
 412         * Makefile.in: Regenerate.
 413         * configure: Regenerate.
 414         * po/POTFILES.in: Regenerate.
 415
 416 2018-04-16  Alan Modra  <amodra@gmail.com>
 417
 418         * configure.ac: Remove we32k support.
 419         * configure: Regenerate.
 420
 421 2018-04-16  Alan Modra  <amodra@gmail.com>
 422
 423         * Makefile.am: Remove m88k support.
 424         * configure.ac: Likewise.
 425         * disassemble.c: Likewise.
 426         * disassemble.h: Likewise.
 427         * m88k-dis.c: Delete.
 428         * Makefile.in: Regenerate.
 429         * configure: Regenerate.
 430         * po/POTFILES.in: Regenerate.
 431
 432 2018-04-16  Alan Modra  <amodra@gmail.com>
 433
 434         * Makefile.am: Remove i370 support.
 435         * configure.ac: Likewise.
 436         * disassemble.c: Likewise.
 437         * disassemble.h: Likewise.
 438         * i370-dis.c: Delete.
 439         * i370-opc.c: Delete.
 440         * Makefile.in: Regenerate.
 441         * configure: Regenerate.
 442         * po/POTFILES.in: Regenerate.
 443
 444 2018-04-16  Alan Modra  <amodra@gmail.com>
 445
 446         * Makefile.am: Remove h8500 support.
 447         * configure.ac: Likewise.
 448         * disassemble.c: Likewise.
 449         * disassemble.h: Likewise.
 450         * h8500-dis.c: Delete.
 451         * h8500-opc.h: Delete.
 452         * Makefile.in: Regenerate.
 453         * configure: Regenerate.
 454         * po/POTFILES.in: Regenerate.
 455
 456 2018-04-16  Alan Modra  <amodra@gmail.com>
 457
 458         * configure.ac: Remove tahoe support.
 459         * configure: Regenerate.
 460
 461 2018-04-15  H.J. Lu  <hongjiu.lu@intel.com>
 462
 463         * i386-dis.c (prefix_table): Replace Em with Edq on tpause and
 464         umwait.
 465         * i386-opc.tbl: Allow 32-bit registers for tpause and umwait in
 466         64-bit mode.
 467         * i386-tbl.h: Regenerated.
 468
 469 2018-04-11  Igor Tsimbalist  <igor.v.tsimbalist@intel.com>
 470
 471         * i386-dis.c (enum): Add PREFIX_MOD_0_0FAE_REG_6,
 472         PREFIX_MOD_1_0FAE_REG_6.
 473         (va_mode): New.
 474         (OP_E_register): Use va_mode.
 475         * i386-dis-evex.h (prefix_table):
 476         New instructions (see prefixes above).
 477         * i386-gen.c (cpu_flag_init): Add WAITPKG.
 478         (cpu_flags): Likewise.
 479         * i386-opc.h (enum): Likewise.
 480         (i386_cpu_flags): Likewise.
 481         * i386-opc.tbl: Add umonitor, umwait, tpause.
 482         * i386-init.h: Regenerate.
 483         * i386-tbl.h: Likewise.
 484
 485 2018-04-11  Alan Modra  <amodra@gmail.com>
 486
 487         * opcodes/i860-dis.c: Delete.
 488         * opcodes/i960-dis.c: Delete.
 489         * Makefile.am: Remove i860 and i960 support.
 490         * configure.ac: Likewise.
 491         * disassemble.c: Likewise.
 492         * disassemble.h: Likewise.
 493         * Makefile.in: Regenerate.
 494         * configure: Regenerate.
 495         * po/POTFILES.in: Regenerate.
 496
 497 2018-04-04  H.J. Lu  <hongjiu.lu@intel.com>
 498
 499         PR binutils/23025
 500         * i386-dis.c (get_valid_dis386): Don't set vex.prefix nor vex.w
 501         to 0.
 502         (print_insn): Clear vex instead of vex.evex.
 503
 504 2018-04-04  Nick Clifton  <nickc@redhat.com>
 505
 506         * po/es.po: Updated Spanish translation.
 507
 508 2018-03-28  Jan Beulich  <jbeulich@suse.com>
 509
 510         * i386-gen.c (opcode_modifiers): Delete VecESize.
 511         * i386-opc.h (VecESize): Delete.
 512         (struct i386_opcode_modifier): Delete vecesize.
 513         * i386-opc.tbl: Drop VecESize.
 514         * i386-tlb.h: Re-generate.
 515
 516 2018-03-28  Jan Beulich  <jbeulich@suse.com>
 517
 518         * i386-opc.h (NO_BROADCAST, BROADCAST_1TO16, BROADCAST_1TO8,
 519         BROADCAST_1TO4, BROADCAST_1TO2): Delete.
 520         (struct i386_opcode_modifier): Shrink broadcast field to 1 bit.
 521         * i386-opc.tbl: Replace Broadcast=<N> by Broadcast.
 522         * i386-tlb.h: Re-generate.
 523
 524 2018-03-28  Jan Beulich  <jbeulich@suse.com>
 525
 526         * i386-opc.tbl (vcvt*d2si, vcvt*d2usi, vcvt*s2si, vcvt*s2usi):
 527         Fold AVX512 forms
 528         * i386-tlb.h: Re-generate.
 529
 530 2018-03-28  Jan Beulich  <jbeulich@suse.com>
 531
 532         * i386-dis.c (prefix_table): Drop Y for cvt*2si.
 533         (vex_len_table): Drop Y for vcvt*2si.
 534         (putop): Replace plain 'Y' handling by abort().
 535
 536 2018-03-28  Nick Clifton  <nickc@redhat.com>
 537
 538         PR 22988
 539         * aarch64-tbl.h (aarch64_opcode_table): Add entries for LDFF1xx
 540         instructions with only a base address register.
 541         * aarch64-opc.c (operand_general_constraint_met_p): Add code to
 542         handle AARHC64_OPND_SVE_ADDR_R.
 543         (aarch64_print_operand): Likewise.
 544         * aarch64-asm-2.c: Regenerate.
 545         * aarch64_dis-2.c: Regenerate.
 546         * aarch64-opc-2.c: Regenerate.
 547
 548 2018-03-22  Jan Beulich  <jbeulich@suse.com>
 549
 550         * i386-opc.tbl: Drop VecESize from register only insn forms and
 551         memory forms not allowing broadcast.
 552         * i386-tlb.h: Re-generate.
 553
 554 2018-03-22  Jan Beulich  <jbeulich@suse.com>
 555
 556         * i386-opc.tbl (vfrczs*, vphadd*, vphsub*, vpmacs*, vpmadcs*,
 557         vprot*, vpsha*, vpshl*, bextr, blc*, bls*, t1mskc, tzmsk, sha1*,
 558         sha256*): Drop Disp<N>.
 559
 560 2018-03-22  Jan Beulich  <jbeulich@suse.com>
 561
 562         * i386-dis.c (EbndS, bnd_swap_mode): New.
 563         (prefix_table): Use EbndS.
 564         (OP_E_register, OP_E_memory): Also handle bnd_swap_mode.
 565         * i386-opc.tbl (bndmov): Move misplaced Load.
 566         * i386-tlb.h: Re-generate.
 567
 568 2018-03-22  Jan Beulich  <jbeulich@suse.com>
 569
 570         * i386-opc.tbl (vcvtdq2pd, vcvtps2pd, vcvtudq2pd): Use separate
 571         templates allowing memory operands and folded ones for register
 572         only flavors.
 573         * i386-tlb.h: Re-generate.
 574
 575 2018-03-22  Jan Beulich  <jbeulich@suse.com>
 576
 577         * i386-opc.tbl (vfrczp*, vpcmov, vpermil2p*): Fold 128- and
 578         256-bit templates. Drop redundant leftover Disp<N>.
 579         * i386-tlb.h: Re-generate.
 580
 581 2018-03-14  Kito Cheng  <kito.cheng@gmail.com>
 582
 583         * riscv-opc.c (riscv_insn_types): New.
 584
 585 2018-03-13  Nick Clifton  <nickc@redhat.com>
 586
 587         * po/pt_BR.po: Updated Brazilian Portuguese translation.
 588
 589 2018-03-08  H.J. Lu  <hongjiu.lu@intel.com>
 590
 591         * i386-opc.tbl: Add Optimize to clr.
 592         * i386-tbl.h: Regenerated.
 593
 594 2018-03-08  H.J. Lu  <hongjiu.lu@intel.com>
 595
 596         * i386-gen.c (opcode_modifiers): Remove OldGcc.
 597         * i386-opc.h (OldGcc): Removed.
 598         (i386_opcode_modifier): Remove oldgcc.
 599         * i386-opc.tbl: Remove fsubp, fsubrp, fdivp and fdivrp
 600         instructions for old (<= 2.8.1) versions of gcc.
 601         * i386-tbl.h: Regenerated.
 602
 603 2018-03-08  Jan Beulich  <jbeulich@suse.com>
 604
 605         * i386-opc.h (EVEXDYN): New.
 606         * i386-opc.tbl: Fold various AVX512VL templates.
 607         * i386-tlb.h: Re-generate.
 608
 609 2018-03-08  Jan Beulich  <jbeulich@suse.com>
 610
 611         * i386-opc.tbl (vexpandpd, vexpandps, vmovapd, vmovaps,
 612         vmovdqa32, vmovdqa64, vmovdqu32, vmovdqu64, vmovupd, vmovups,
 613         vpexpandd, vpexpandq): Fold AFX512VF templates.
 614         * i386-tlb.h: Re-generate.
 615
 616 2018-03-08  Jan Beulich  <jbeulich@suse.com>
 617
 618         * i386-opc.tbl (vgf2p8affineinvqb, vgf2p8affineqb, vgf2p8mulb):
 619         Fold 128- and 256-bit VEX-encoded templates.
 620         * i386-tlb.h: Re-generate.
 621
 622 2018-03-08  Jan Beulich  <jbeulich@suse.com>
 623
 624         * i386-opc.tbl (vexpandpd, vexpandps, vmovapd, vmovaps,
 625         vmovdqa32, vmovdqa64, vmovdqu32, vmovdqu64, vmovupd, vmovups,
 626         vpexpandd, vpexpandq): Fold AVX512F templates.
 627         * i386-tlb.h: Re-generate.
 628
 629 2018-03-08  Jan Beulich  <jbeulich@suse.com>
 630
 631         * i386-opc.tbl (llwpcb, slwpcb, lwpval, lwpins): Fold 32- and
 632         64-bit templates. Drop Disp<N>.
 633         * i386-tlb.h: Re-generate.
 634
 635 2018-03-08  Jan Beulich  <jbeulich@suse.com>
 636
 637         * i386-opc.tbl (vfmadd*, vfmsub*, vfnmadd*, vfnmsub*): Fold 128-
 638         and 256-bit templates.
 639         * i386-tlb.h: Re-generate.
 640
 641 2018-03-08  Jan Beulich  <jbeulich@suse.com>
 642
 643         * i386-opc.tbl (cmpxchg8b): Add NoRex64.
 644         * i386-tlb.h: Re-generate.
 645
 646 2018-03-08  Jan Beulich  <jbeulich@suse.com>
 647
 648         * i386-opc.tbl (cmpxchg16b, fisttp, fisttpll, bndmov, mwaitx):
 649         Drop NoAVX.
 650         * i386-tlb.h: Re-generate.
 651
 652 2018-03-08  Jan Beulich  <jbeulich@suse.com>
 653
 654         * i386-opc.tbl (ldmxcsr, stmxcsr): Add NoAVX.
 655         * i386-tlb.h: Re-generate.
 656
 657 2018-03-08  Jan Beulich  <jbeulich@suse.com>
 658
 659         * i386-gen.c (opcode_modifiers): Delete FloatD.
 660         * i386-opc.h (FloatD): Delete.
 661         (struct i386_opcode_modifier): Delete floatd.
 662         * i386-opc.tbl (fadd, fsub, fsubr, fmul, fdiv, fdivr): Replace
 663         FloatD by D.
 664         * i386-tlb.h: Re-generate.
 665
 666 2018-03-08  Jan Beulich  <jbeulich@suse.com>
 667
 668         * i386-dis.c (float_reg): Adjust DC and DE fsub*/fdiv* patterns.
 669
 670 2018-03-08  Jan Beulich  <jbeulich@suse.com>
 671
 672         * i386-opc.tbl (vmovd): Disallow Qword memory operands.
 673         * i386-tlb.h: Re-generate.
 674
 675 2018-03-08  Jan Beulich  <jbeulich@suse.com>
 676
 677         * i386-opc.tbl (vcvtpd2ps): Fold AVX 128- and 256-bit memory
 678         forms.
 679         * i386-tlb.h: Re-generate.
 680
 681 2018-03-07  Alan Modra  <amodra@gmail.com>
 682
 683         * disassemble.c (disassembler): Use bfd_arch_powerpc entry for
 684         bfd_arch_rs6000.
 685         * disassemble.h (print_insn_rs6000): Delete.
 686         * ppc-dis.c (powerpc_init_dialect): Handle rs6000.
 687         (disassemble_init_powerpc): Call powerpc_init_dialect for rs6000.
 688         (print_insn_rs6000): Delete.
 689
 690 2018-03-03  Alan Modra  <amodra@gmail.com>
 691
 692         * sysdep.h (opcodes_error_handler): Define.
 693         (_bfd_error_handler): Declare.
 694         * Makefile.am: Remove stray #.
 695         * opc2c.c (main): Remove bogus -l arg handling.  Print "DO NOT
 696         EDIT" comment.
 697         * aarch64-dis.c, * arc-dis.c, * arm-dis.c, * avr-dis.c,
 698         * d30v-dis.c, * h8300-dis.c, * mmix-dis.c, * ppc-dis.c,
 699         * riscv-dis.c, * s390-dis.c, * sparc-dis.c, * v850-dis.c: Use
 700         opcodes_error_handler to print errors.  Standardize error messages.
 701         * msp430-decode.opc, * nios2-dis.c, * rl78-decode.opc: Likewise,
 702         and include opintl.h.
 703         * nds32-asm.c: Likewise, and include sysdep.h and opintl.h.
 704         * i386-gen.c: Standardize error messages.
 705         * msp430-decode.c, * rl78-decode.c, rx-decode.c: Regenerate.
 706         * Makefile.in: Regenerate.
 707         * epiphany-asm.c, * epiphany-desc.c, * epiphany-dis.c,
 708         * epiphany-ibld.c, * fr30-asm.c, * fr30-desc.c, * fr30-dis.c,
 709         * fr30-ibld.c, * frv-asm.c, * frv-desc.c, * frv-dis.c, * frv-ibld.c,
 710         * frv-opc.c, * ip2k-asm.c, * ip2k-desc.c, * ip2k-dis.c, * ip2k-ibld.c,
 711         * iq2000-asm.c, * iq2000-desc.c, * iq2000-dis.c, * iq2000-ibld.c,
 712         * lm32-asm.c, * lm32-desc.c, * lm32-dis.c, * lm32-ibld.c,
 713         * m32c-asm.c, * m32c-desc.c, * m32c-dis.c, * m32c-ibld.c,
 714         * m32r-asm.c, * m32r-desc.c, * m32r-dis.c, * m32r-ibld.c,
 715         * mep-asm.c, * mep-desc.c, * mep-dis.c, * mep-ibld.c, * mt-asm.c,
 716         * mt-desc.c, * mt-dis.c, * mt-ibld.c, * or1k-asm.c, * or1k-desc.c,
 717         * or1k-dis.c, * or1k-ibld.c, * xc16x-asm.c, * xc16x-desc.c,
 718         * xc16x-dis.c, * xc16x-ibld.c, * xstormy16-asm.c, * xstormy16-desc.c,
 719         * xstormy16-dis.c, * xstormy16-ibld.c: Regenerate.
 720
 721 2018-03-01  H.J. Lu  <hongjiu.lu@intel.com>
 722
 723         * * i386-opc.tbl: Add "Optimize" to AVX256 and AVX512
 724         vpsub[bwdq] instructions.
 725         * i386-tbl.h: Regenerated.
 726
 727 2018-03-01  Alan Modra  <amodra@gmail.com>
 728
 729         * configure.ac (ALL_LINGUAS): Sort.
 730         * configure: Regenerate.
 731
 732 2018-02-27  Thomas Preud'homme  <thomas.preudhomme@arm.com>
 733
 734         * arm-dis.c (print_insn_coprocessor): Replace uses of ARM_FEATURE_COPY
 735         macro by assignements.
 736
 737 2018-02-27  H.J. Lu  <hongjiu.lu@intel.com>
 738
 739         PR gas/22871
 740         * i386-gen.c (opcode_modifiers): Add Optimize.
 741         * i386-opc.h (Optimize): New enum.
 742         (i386_opcode_modifier): Add optimize.
 743         * i386-opc.tbl: Add "Optimize" to "mov $imm, reg",
 744         "sub reg, reg/mem", "test $imm, acc", "test $imm, reg/mem",
 745         "and $imm, acc", "and $imm, reg/mem", "xor reg, reg/mem",
 746         "movq $imm, reg" and AVX256 and AVX512 versions of vandnps,
 747         vandnpd, vpandn, vpandnd, vpandnq, vxorps, vxorpd, vpxor,
 748         vpxord and vpxorq.
 749         * i386-tbl.h: Regenerated.
 750
 751 2018-02-26  Alan Modra  <amodra@gmail.com>
 752
 753         * crx-dis.c (getregliststring): Allocate a large enough buffer
 754         to silence false positive gcc8 warning.
 755
 756 2018-02-22  Shea Levy <shea@shealevy.com>
 757
 758         * disassemble.c (ARCH_riscv): Define if ARCH_all.
 759
 760 2018-02-22  H.J. Lu  <hongjiu.lu@intel.com>
 761
 762         * i386-opc.tbl: Add {rex},
 763         * i386-tbl.h: Regenerated.
 764
 765 2018-02-20  Maciej W. Rozycki  <macro@mips.com>
 766
 767         * mips16-opc.c (decode_mips16_operand) <'M'>: Remove case.
 768         (mips16_opcodes): Replace `M' with `m' for "restore".
 769
 770 2018-02-19  Thomas Preud'homme  <thomas.preudhomme@arm.com>
 771
 772         * arm-dis.c (thumb_opcodes): Fix BXNS mask.
 773
 774 2018-02-13  Maciej W. Rozycki  <macro@mips.com>
 775
 776         * wasm32-dis.c (print_insn_wasm32): Rename `index' local
 777         variable to `function_index'.
 778
 779 2018-02-13  Nick Clifton  <nickc@redhat.com>
 780
 781         PR 22823
 782         * metag-dis.c (print_fmmov): Double buffer size to avoid warning
 783         about truncation of printing.
 784
 785 2018-02-12  Henry Wong <henry@stuffedcow.net>
 786
 787         * mips-opc.c (mips_builtin_opcodes): Correct "sigrie" encoding.
 788
 789 2018-02-05  Nick Clifton  <nickc@redhat.com>
 790
 791         * po/pt_BR.po: Updated Brazilian Portuguese translation.
 792
 793 2018-01-23  Igor Tsimbalist  <igor.v.tsimbalist@intel.com>
 794
 795         * i386-dis.c (enum): Add pconfig.
 796         * i386-gen.c (cpu_flag_init): Add CPU_PCONFIG_FLAGS.
 797         (cpu_flags): Add CpuPCONFIG.
 798         * i386-opc.h (enum): Add CpuPCONFIG.
 799         (i386_cpu_flags): Add cpupconfig.
 800         * i386-opc.tbl: Add PCONFIG instruction.
 801         * i386-init.h: Regenerate.
 802         * i386-tbl.h: Likewise.
 803
 804 2018-01-23  Igor Tsimbalist  <igor.v.tsimbalist@intel.com>
 805
 806         * i386-dis.c (enum): Add PREFIX_0F09.
 807         * i386-gen.c (cpu_flag_init): Add CPU_WBNOINVD_FLAGS.
 808         (cpu_flags): Add CpuWBNOINVD.
 809         * i386-opc.h (enum): Add CpuWBNOINVD.
 810         (i386_cpu_flags): Add cpuwbnoinvd.
 811         * i386-opc.tbl: Add WBNOINVD instruction.
 812         * i386-init.h: Regenerate.
 813         * i386-tbl.h: Likewise.
 814
 815 2018-01-17  Jim Wilson  <jimw@sifive.com>
 816
 817         * riscv-opc.c (riscv_opcodes) <addi>: Use z instead of 0.
 818
 819 2018-01-17  Igor Tsimbalist  <igor.v.tsimbalist@intel.com>
 820
 821         * i386-gen.c (cpu_flag_init): Delete CPU_CET_FLAGS, CpuCET.
 822         Add CPU_IBT_FLAGS, CPU_SHSTK_FLAGS, CPY_ANY_IBT_FLAGS,
 823         CPU_ANY_SHSTK_FLAGS, CpuIBT, CpuSHSTK.
 824         (cpu_flags): Add CpuIBT, CpuSHSTK.
 825         * i386-opc.h (enum): Add CpuIBT, CpuSHSTK.
 826         (i386_cpu_flags): Add cpuibt, cpushstk.
 827         * i386-opc.tbl: Change CpuCET to CpuSHSTK and CpuIBT.
 828         * i386-init.h: Regenerate.
 829         * i386-tbl.h: Likewise.
 830
 831 2018-01-16  Nick Clifton  <nickc@redhat.com>
 832
 833         * po/pt_BR.po: Updated Brazilian Portugese translation.
 834         * po/de.po: Updated German translation.
 835
 836 2018-01-15  Jim Wilson  <jimw@sifive.com>
 837
 838         * riscv-opc.c (match_c_nop): New.
 839         (riscv_opcodes) <addi>: Handle an addi that compresses to c.nop.
 840
 841 2018-01-15  Nick Clifton  <nickc@redhat.com>
 842
 843         * po/uk.po: Updated Ukranian translation.
 844
 845 2018-01-13  Nick Clifton  <nickc@redhat.com>
 846
 847         * po/opcodes.pot: Regenerated.
 848
 849 2018-01-13  Nick Clifton  <nickc@redhat.com>
 850
 851         * configure: Regenerate.
 852
 853 2018-01-13  Nick Clifton  <nickc@redhat.com>
 854
 855         2.30 branch created.
 856
 857 2018-01-11  Igor Tsimbalist  <igor.v.tsimbalist@intel.com>
 858
 859         * i386-opc.tbl: Remove VL variants for 4FMAPS and 4VNNIW insns.
 860         * i386-tbl.h: Regenerate.
 861
 862 2018-01-10  Jan Beulich  <jbeulich@suse.com>
 863
 864         * i386-opc.tbl (v4fmaddss, v4fnmaddss): Adjust Disp8MemShift.
 865         * i386-tbl.h: Re-generate.
 866
 867 2018-01-10  Jan Beulich  <jbeulich@suse.com>
 868
 869         * i386-opc.tbl (vpcmpeqb, vpcmpleb, vpcmpltb, vpcmpneqb,
 870         vpcmpnleb, vpcmpnltb, vpcmpequb, vpcmpleub, vpcmpltub,
 871         vpcmpnequb, vpcmpnleub, vpcmpnltub, vpcmpeqw, vpcmplew,
 872         vpcmpltw, vpcmpneqw, vpcmpnlew, vpcmpnltw, vpcmpequw, vpcmpleuw,
 873         vpcmpltuw, vpcmpnequw, vpcmpnleuw, vpcmpnltuw): Adjust
 874         Disp8MemShift of AVX512VL forms.
 875         * i386-tbl.h: Re-generate.
 876
 877 2018-01-09  Jim Wilson  <jimw@sifive.com>
 878
 879         * riscv-dis.c (maybe_print_address): If base_reg is zero,
 880         then the hi_addr value is zero.
 881
 882 2018-01-09  James Greenhalgh  <james.greenhalgh@arm.com>
 883
 884         * arm-dis.c (arm_opcodes): Add csdb.
 885         (thumb32_opcodes): Add csdb.
 886
 887 2018-01-09  James Greenhalgh  <james.greenhalgh@arm.com>
 888
 889         * aarch64-tbl.h (aarch64_opcode_table): Add "csdb".
 890         * aarch64-asm-2.c: Regenerate.
 891         * aarch64-dis-2.c: Regenerate.
 892         * aarch64-opc-2.c: Regenerate.
 893
 894 2018-01-08  H.J. Lu  <hongjiu.lu@intel.com>
 895
 896         PR gas/22681
 897         * i386-opc.tbl: Properly encode vmovd with Qword memeory operand.
 898         Remove AVX512 vmovd with 64-bit operands.
 899         * i386-tbl.h: Regenerated.
 900
 901 2018-01-05  Jim Wilson  <jimw@sifive.com>
 902
 903         * riscv-dis.c (print_insn_args) <'s'>: Call maybe_print_address for a
 904         jalr.
 905
 906 2018-01-03  Alan Modra  <amodra@gmail.com>
 907
 908         Update year range in copyright notice of all files.
 909
 910 2018-01-02  Jan Beulich  <jbeulich@suse.com>
 911
 912         * i386-gen.c (operand_type_init): Restore OPERAND_TYPE_REGYMM
 913         and OPERAND_TYPE_REGZMM entries.
 914
 915 For older changes see ChangeLog-2017
 916 \f
 917 Copyright (C) 2018 Free Software Foundation, Inc.
 918
 919 Copying and distribution of this file, with or without modification,
 920 are permitted in any medium without royalty provided the copyright
 921 notice and this notice are preserved.
 922
 923 Local Variables:
 924 mode: change-log
 925 left-margin: 8
 926 fill-column: 74
 927 version-control: never
 928 End: