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Fix error messages in the NFP sources when building for 32-bit targets.
[thirdparty/binutils-gdb.git] / opcodes / ChangeLog
1 2018-05-15 Francois H. Theron <francois.theron@netronome.com>
2
3 * nfp-dis.c: Use uint64_t for instruction variables, not bfd_vma.
4
5 2018-05-09 H.J. Lu <hongjiu.lu@intel.com>
6
7 * i386-opc.tbl: Remove Disp<N> from movidir{i,64b}.
8
9 2018-05-09 Sebastian Rasmussen <sebras@gmail.com>
10
11 * cr16-opc.c (cr16_instruction): Comment typo fix.
12 * hppa-dis.c (print_insn_hppa): Likewise.
13
14 2018-05-08 Jim Wilson <jimw@sifive.com>
15
16 * riscv-opc.c (match_c_slli, match_slli_as_c_slli): New.
17 (match_c_slli64, match_srxi_as_c_srxi): New.
18 (riscv_opcodes) <slli, sll>: Use match_slli_as_c_slli.
19 <srli, srl, srai, sra>: Use match_srxi_as_c_srxi.
20 <c.slli, c.srli, c.srai>: Use match_s_slli.
21 <c.slli64, c.srli64, c.srai64>: New.
22
23 2018-05-08 Alan Modra <amodra@gmail.com>
24
25 * ppc-dis.c (PPC_OPCD_SEGS): Define using PPC_OP.
26 (VLE_OPCD_SEGS, SPE2_OPCD_SEGS): Similarly, using macros used to
27 partition opcode space for index lookup.
28
29 2018-05-07 Peter Bergner <bergner@vnet.ibm.com.com>
30
31 * ppc-dis.c (print_insn_powerpc) <insn_is_short>: Replace this...
32 <insn_length>: ...with this. Update usage.
33 Remove duplicate call to *info->memory_error_func.
34
35 2018-05-07 Igor Tsimbalist <igor.v.tsimbalist@intel.com>
36 H.J. Lu <hongjiu.lu@intel.com>
37
38 * i386-dis.c (Gva): New.
39 (enum): Add PREFIX_0F38F8, PREFIX_0F38F9,
40 MOD_0F38F8_PREFIX_2, MOD_0F38F9_PREFIX_0.
41 (prefix_table): New instructions (see prefix above).
42 (mod_table): New instructions (see prefix above).
43 (OP_G): Handle va_mode.
44 * i386-gen.c (cpu_flag_init): Add CPU_MOVDIRI_FLAGS,
45 CPU_MOVDIR64B_FLAGS.
46 (cpu_flags): Add CpuMOVDIRI and CpuMOVDIR64B.
47 * i386-opc.h (enum): Add CpuMOVDIRI, CpuMOVDIR64B.
48 (i386_cpu_flags): Add cpumovdiri and cpumovdir64b.
49 * i386-opc.tbl: Add movidir{i,64b}.
50 * i386-init.h: Regenerated.
51 * i386-tbl.h: Likewise.
52
53 2018-05-07 H.J. Lu <hongjiu.lu@intel.com>
54
55 * i386-gen.c (opcode_modifiers): Replace AddrPrefixOp0 with
56 AddrPrefixOpReg.
57 * i386-opc.h (AddrPrefixOp0): Renamed to ...
58 (AddrPrefixOpReg): This.
59 (i386_opcode_modifier): Rename addrprefixop0 to addrprefixopreg.
60 * i386-opc.tbl: Replace AddrPrefixOp0 with AddrPrefixOpReg.
61
62 2018-05-07 Peter Bergner <bergner@vnet.ibm.com.com>
63
64 * ppc-opc.c (powerpc_num_opcodes): Change type to unsigned.
65 (vle_num_opcodes): Likewise.
66 (spe2_num_opcodes): Likewise.
67 * ppc-dis.c (disassemble_init_powerpc) <powerpc_opcd_indices>: Rewrite
68 initialization loop.
69 (disassemble_init_powerpc) <vle_opcd_indices>: Likewise.
70 (disassemble_init_powerpc) <spe2_opcd_indices>: Likewise. Initialize
71 only once.
72
73 2018-05-01 Tamar Christina <tamar.christina@arm.com>
74
75 * aarch64-dis.c (aarch64_opcode_decode): Moved memory clear code.
76
77 2018-04-30 Francois H. Theron <francois.theron@netronome.com>
78
79 Makefile.am: Added nfp-dis.c.
80 configure.ac: Added bfd_nfp_arch.
81 disassemble.h: Added print_insn_nfp prototype.
82 disassemble.c: Added ARCH_nfp and call to print_insn_nfp
83 nfp-dis.c: New, for NFP support.
84 po/POTFILES.in: Added nfp-dis.c to the list.
85 Makefile.in: Regenerate.
86 configure: Regenerate.
87
88 2018-04-26 Jan Beulich <jbeulich@suse.com>
89
90 * i386-opc.tbl: Fold various non-memory operand AVX512VL
91 templates into their base ones.
92 * i386-tlb.h: Re-generate.
93
94 2018-04-26 Jan Beulich <jbeulich@suse.com>
95
96 * i386-gen.c (cpu_flag_init): Use CPU_XOP_FLAGS for
97 CPU_BDVER1_FLAGS. Use CPU_AVX2_FLAGS for CPU_ZNVER1_FLAGS. Use
98 CPU_AVX_FLAGS for CPU_BTVER1_FLAGS. Add CPU_XSAVE_FLAGS to
99 CPU_LWP_FLAGS, CPU_AVX_FLAGS, CPU_MPX_FLAGS, and CPU_OSPKE_FLAGS.
100 * i386-init.h: Re-generate.
101
102 2018-04-26 Jan Beulich <jbeulich@suse.com>
103
104 * i386-gen.c (cpu_flag_init): Drop all uses of CpuRegMMX,
105 CpuRegXMM, CpuRegYMM, CpuRegZMM, and CpuRegMask. Use
106 CPU_AVX2_FLAGS for CPU_AVX512F_FLAGS and drop bogus comment.
107 Don't use CPU_AVX2_FLAGS for CPU_AVX512VL_FLAGS and drop bogus
108 comment.
109 (cpu_flags): Drop CpuRegMMX, CpuRegXMM, CpuRegYMM, CpuRegZMM,
110 and CpuRegMask.
111 * i386-opc.h: CpuRegMMX, CpuRegXMM, CpuRegYMM, CpuRegZMM,
112 CpuRegMask: Delete.
113 (union i386_cpu_flags): Remove cpuregmmx, cpuregxmm, cpuregymm,
114 cpuregzmm, and cpuregmask.
115 * i386-init.h: Re-generate.
116 * i386-tbl.h: Re-generate.
117
118 2018-04-26 Jan Beulich <jbeulich@suse.com>
119
120 * i386-gen.c (cpu_flag_init): CPU_I586_FLAGS inherits Cpu387 only.
121 CPU_287_FLAGS is Cpu287 only. CPU_387_FLAGS is Cpu387 only.
122 * i386-init.h: Re-generate.
123
124 2018-04-26 Jan Beulich <jbeulich@suse.com>
125
126 * i386-gen.c (VexImmExt): Delete.
127 * i386-opc.h (VexImmExt, veximmext): Delete.
128 * i386-opc.tbl: Drop all VexImmExt uses.
129 * i386-tlb.h: Re-generate.
130
131 2018-04-25 Jan Beulich <jbeulich@suse.com>
132
133 * i386-opc.tbl (vpslld, vpsrad, vpsrld): Drop AVX512VL
134 register-only forms.
135 * i386-tlb.h: Re-generate.
136
137 2018-04-25 Tamar Christina <tamar.christina@arm.com>
138
139 * aarch64-tbl.h (sqrdmlah, sqrdmlsh): Fix masks.
140
141 2018-04-17 Igor Tsimbalist <igor.v.tsimbalist@intel.com>
142
143 * i386-dis.c: Add REG_0F1C_MOD_0, MOD_0F1C_PREFIX_0,
144 PREFIX_0F1C.
145 * i386-gen.c (cpu_flag_init): Add CPU_CLDEMOTE_FLAGS,
146 (cpu_flags): Add CpuCLDEMOTE.
147 * i386-init.h: Regenerate.
148 * i386-opc.h (enum): Add CpuCLDEMOTE,
149 (i386_cpu_flags): Add cpucldemote.
150 * i386-opc.tbl: Add cldemote.
151 * i386-tbl.h: Regenerate.
152
153 2018-04-16 Alan Modra <amodra@gmail.com>
154
155 * Makefile.am: Remove sh5 and sh64 support.
156 * configure.ac: Likewise.
157 * disassemble.c: Likewise.
158 * disassemble.h: Likewise.
159 * sh-dis.c: Likewise.
160 * sh64-dis.c: Delete.
161 * sh64-opc.c: Delete.
162 * sh64-opc.h: Delete.
163 * Makefile.in: Regenerate.
164 * configure: Regenerate.
165 * po/POTFILES.in: Regenerate.
166
167 2018-04-16 Alan Modra <amodra@gmail.com>
168
169 * Makefile.am: Remove w65 support.
170 * configure.ac: Likewise.
171 * disassemble.c: Likewise.
172 * disassemble.h: Likewise.
173 * w65-dis.c: Delete.
174 * w65-opc.h: Delete.
175 * Makefile.in: Regenerate.
176 * configure: Regenerate.
177 * po/POTFILES.in: Regenerate.
178
179 2018-04-16 Alan Modra <amodra@gmail.com>
180
181 * configure.ac: Remove we32k support.
182 * configure: Regenerate.
183
184 2018-04-16 Alan Modra <amodra@gmail.com>
185
186 * Makefile.am: Remove m88k support.
187 * configure.ac: Likewise.
188 * disassemble.c: Likewise.
189 * disassemble.h: Likewise.
190 * m88k-dis.c: Delete.
191 * Makefile.in: Regenerate.
192 * configure: Regenerate.
193 * po/POTFILES.in: Regenerate.
194
195 2018-04-16 Alan Modra <amodra@gmail.com>
196
197 * Makefile.am: Remove i370 support.
198 * configure.ac: Likewise.
199 * disassemble.c: Likewise.
200 * disassemble.h: Likewise.
201 * i370-dis.c: Delete.
202 * i370-opc.c: Delete.
203 * Makefile.in: Regenerate.
204 * configure: Regenerate.
205 * po/POTFILES.in: Regenerate.
206
207 2018-04-16 Alan Modra <amodra@gmail.com>
208
209 * Makefile.am: Remove h8500 support.
210 * configure.ac: Likewise.
211 * disassemble.c: Likewise.
212 * disassemble.h: Likewise.
213 * h8500-dis.c: Delete.
214 * h8500-opc.h: Delete.
215 * Makefile.in: Regenerate.
216 * configure: Regenerate.
217 * po/POTFILES.in: Regenerate.
218
219 2018-04-16 Alan Modra <amodra@gmail.com>
220
221 * configure.ac: Remove tahoe support.
222 * configure: Regenerate.
223
224 2018-04-15 H.J. Lu <hongjiu.lu@intel.com>
225
226 * i386-dis.c (prefix_table): Replace Em with Edq on tpause and
227 umwait.
228 * i386-opc.tbl: Allow 32-bit registers for tpause and umwait in
229 64-bit mode.
230 * i386-tbl.h: Regenerated.
231
232 2018-04-11 Igor Tsimbalist <igor.v.tsimbalist@intel.com>
233
234 * i386-dis.c (enum): Add PREFIX_MOD_0_0FAE_REG_6,
235 PREFIX_MOD_1_0FAE_REG_6.
236 (va_mode): New.
237 (OP_E_register): Use va_mode.
238 * i386-dis-evex.h (prefix_table):
239 New instructions (see prefixes above).
240 * i386-gen.c (cpu_flag_init): Add WAITPKG.
241 (cpu_flags): Likewise.
242 * i386-opc.h (enum): Likewise.
243 (i386_cpu_flags): Likewise.
244 * i386-opc.tbl: Add umonitor, umwait, tpause.
245 * i386-init.h: Regenerate.
246 * i386-tbl.h: Likewise.
247
248 2018-04-11 Alan Modra <amodra@gmail.com>
249
250 * opcodes/i860-dis.c: Delete.
251 * opcodes/i960-dis.c: Delete.
252 * Makefile.am: Remove i860 and i960 support.
253 * configure.ac: Likewise.
254 * disassemble.c: Likewise.
255 * disassemble.h: Likewise.
256 * Makefile.in: Regenerate.
257 * configure: Regenerate.
258 * po/POTFILES.in: Regenerate.
259
260 2018-04-04 H.J. Lu <hongjiu.lu@intel.com>
261
262 PR binutils/23025
263 * i386-dis.c (get_valid_dis386): Don't set vex.prefix nor vex.w
264 to 0.
265 (print_insn): Clear vex instead of vex.evex.
266
267 2018-04-04 Nick Clifton <nickc@redhat.com>
268
269 * po/es.po: Updated Spanish translation.
270
271 2018-03-28 Jan Beulich <jbeulich@suse.com>
272
273 * i386-gen.c (opcode_modifiers): Delete VecESize.
274 * i386-opc.h (VecESize): Delete.
275 (struct i386_opcode_modifier): Delete vecesize.
276 * i386-opc.tbl: Drop VecESize.
277 * i386-tlb.h: Re-generate.
278
279 2018-03-28 Jan Beulich <jbeulich@suse.com>
280
281 * i386-opc.h (NO_BROADCAST, BROADCAST_1TO16, BROADCAST_1TO8,
282 BROADCAST_1TO4, BROADCAST_1TO2): Delete.
283 (struct i386_opcode_modifier): Shrink broadcast field to 1 bit.
284 * i386-opc.tbl: Replace Broadcast=<N> by Broadcast.
285 * i386-tlb.h: Re-generate.
286
287 2018-03-28 Jan Beulich <jbeulich@suse.com>
288
289 * i386-opc.tbl (vcvt*d2si, vcvt*d2usi, vcvt*s2si, vcvt*s2usi):
290 Fold AVX512 forms
291 * i386-tlb.h: Re-generate.
292
293 2018-03-28 Jan Beulich <jbeulich@suse.com>
294
295 * i386-dis.c (prefix_table): Drop Y for cvt*2si.
296 (vex_len_table): Drop Y for vcvt*2si.
297 (putop): Replace plain 'Y' handling by abort().
298
299 2018-03-28 Nick Clifton <nickc@redhat.com>
300
301 PR 22988
302 * aarch64-tbl.h (aarch64_opcode_table): Add entries for LDFF1xx
303 instructions with only a base address register.
304 * aarch64-opc.c (operand_general_constraint_met_p): Add code to
305 handle AARHC64_OPND_SVE_ADDR_R.
306 (aarch64_print_operand): Likewise.
307 * aarch64-asm-2.c: Regenerate.
308 * aarch64_dis-2.c: Regenerate.
309 * aarch64-opc-2.c: Regenerate.
310
311 2018-03-22 Jan Beulich <jbeulich@suse.com>
312
313 * i386-opc.tbl: Drop VecESize from register only insn forms and
314 memory forms not allowing broadcast.
315 * i386-tlb.h: Re-generate.
316
317 2018-03-22 Jan Beulich <jbeulich@suse.com>
318
319 * i386-opc.tbl (vfrczs*, vphadd*, vphsub*, vpmacs*, vpmadcs*,
320 vprot*, vpsha*, vpshl*, bextr, blc*, bls*, t1mskc, tzmsk, sha1*,
321 sha256*): Drop Disp<N>.
322
323 2018-03-22 Jan Beulich <jbeulich@suse.com>
324
325 * i386-dis.c (EbndS, bnd_swap_mode): New.
326 (prefix_table): Use EbndS.
327 (OP_E_register, OP_E_memory): Also handle bnd_swap_mode.
328 * i386-opc.tbl (bndmov): Move misplaced Load.
329 * i386-tlb.h: Re-generate.
330
331 2018-03-22 Jan Beulich <jbeulich@suse.com>
332
333 * i386-opc.tbl (vcvtdq2pd, vcvtps2pd, vcvtudq2pd): Use separate
334 templates allowing memory operands and folded ones for register
335 only flavors.
336 * i386-tlb.h: Re-generate.
337
338 2018-03-22 Jan Beulich <jbeulich@suse.com>
339
340 * i386-opc.tbl (vfrczp*, vpcmov, vpermil2p*): Fold 128- and
341 256-bit templates. Drop redundant leftover Disp<N>.
342 * i386-tlb.h: Re-generate.
343
344 2018-03-14 Kito Cheng <kito.cheng@gmail.com>
345
346 * riscv-opc.c (riscv_insn_types): New.
347
348 2018-03-13 Nick Clifton <nickc@redhat.com>
349
350 * po/pt_BR.po: Updated Brazilian Portuguese translation.
351
352 2018-03-08 H.J. Lu <hongjiu.lu@intel.com>
353
354 * i386-opc.tbl: Add Optimize to clr.
355 * i386-tbl.h: Regenerated.
356
357 2018-03-08 H.J. Lu <hongjiu.lu@intel.com>
358
359 * i386-gen.c (opcode_modifiers): Remove OldGcc.
360 * i386-opc.h (OldGcc): Removed.
361 (i386_opcode_modifier): Remove oldgcc.
362 * i386-opc.tbl: Remove fsubp, fsubrp, fdivp and fdivrp
363 instructions for old (<= 2.8.1) versions of gcc.
364 * i386-tbl.h: Regenerated.
365
366 2018-03-08 Jan Beulich <jbeulich@suse.com>
367
368 * i386-opc.h (EVEXDYN): New.
369 * i386-opc.tbl: Fold various AVX512VL templates.
370 * i386-tlb.h: Re-generate.
371
372 2018-03-08 Jan Beulich <jbeulich@suse.com>
373
374 * i386-opc.tbl (vexpandpd, vexpandps, vmovapd, vmovaps,
375 vmovdqa32, vmovdqa64, vmovdqu32, vmovdqu64, vmovupd, vmovups,
376 vpexpandd, vpexpandq): Fold AFX512VF templates.
377 * i386-tlb.h: Re-generate.
378
379 2018-03-08 Jan Beulich <jbeulich@suse.com>
380
381 * i386-opc.tbl (vgf2p8affineinvqb, vgf2p8affineqb, vgf2p8mulb):
382 Fold 128- and 256-bit VEX-encoded templates.
383 * i386-tlb.h: Re-generate.
384
385 2018-03-08 Jan Beulich <jbeulich@suse.com>
386
387 * i386-opc.tbl (vexpandpd, vexpandps, vmovapd, vmovaps,
388 vmovdqa32, vmovdqa64, vmovdqu32, vmovdqu64, vmovupd, vmovups,
389 vpexpandd, vpexpandq): Fold AVX512F templates.
390 * i386-tlb.h: Re-generate.
391
392 2018-03-08 Jan Beulich <jbeulich@suse.com>
393
394 * i386-opc.tbl (llwpcb, slwpcb, lwpval, lwpins): Fold 32- and
395 64-bit templates. Drop Disp<N>.
396 * i386-tlb.h: Re-generate.
397
398 2018-03-08 Jan Beulich <jbeulich@suse.com>
399
400 * i386-opc.tbl (vfmadd*, vfmsub*, vfnmadd*, vfnmsub*): Fold 128-
401 and 256-bit templates.
402 * i386-tlb.h: Re-generate.
403
404 2018-03-08 Jan Beulich <jbeulich@suse.com>
405
406 * i386-opc.tbl (cmpxchg8b): Add NoRex64.
407 * i386-tlb.h: Re-generate.
408
409 2018-03-08 Jan Beulich <jbeulich@suse.com>
410
411 * i386-opc.tbl (cmpxchg16b, fisttp, fisttpll, bndmov, mwaitx):
412 Drop NoAVX.
413 * i386-tlb.h: Re-generate.
414
415 2018-03-08 Jan Beulich <jbeulich@suse.com>
416
417 * i386-opc.tbl (ldmxcsr, stmxcsr): Add NoAVX.
418 * i386-tlb.h: Re-generate.
419
420 2018-03-08 Jan Beulich <jbeulich@suse.com>
421
422 * i386-gen.c (opcode_modifiers): Delete FloatD.
423 * i386-opc.h (FloatD): Delete.
424 (struct i386_opcode_modifier): Delete floatd.
425 * i386-opc.tbl (fadd, fsub, fsubr, fmul, fdiv, fdivr): Replace
426 FloatD by D.
427 * i386-tlb.h: Re-generate.
428
429 2018-03-08 Jan Beulich <jbeulich@suse.com>
430
431 * i386-dis.c (float_reg): Adjust DC and DE fsub*/fdiv* patterns.
432
433 2018-03-08 Jan Beulich <jbeulich@suse.com>
434
435 * i386-opc.tbl (vmovd): Disallow Qword memory operands.
436 * i386-tlb.h: Re-generate.
437
438 2018-03-08 Jan Beulich <jbeulich@suse.com>
439
440 * i386-opc.tbl (vcvtpd2ps): Fold AVX 128- and 256-bit memory
441 forms.
442 * i386-tlb.h: Re-generate.
443
444 2018-03-07 Alan Modra <amodra@gmail.com>
445
446 * disassemble.c (disassembler): Use bfd_arch_powerpc entry for
447 bfd_arch_rs6000.
448 * disassemble.h (print_insn_rs6000): Delete.
449 * ppc-dis.c (powerpc_init_dialect): Handle rs6000.
450 (disassemble_init_powerpc): Call powerpc_init_dialect for rs6000.
451 (print_insn_rs6000): Delete.
452
453 2018-03-03 Alan Modra <amodra@gmail.com>
454
455 * sysdep.h (opcodes_error_handler): Define.
456 (_bfd_error_handler): Declare.
457 * Makefile.am: Remove stray #.
458 * opc2c.c (main): Remove bogus -l arg handling. Print "DO NOT
459 EDIT" comment.
460 * aarch64-dis.c, * arc-dis.c, * arm-dis.c, * avr-dis.c,
461 * d30v-dis.c, * h8300-dis.c, * mmix-dis.c, * ppc-dis.c,
462 * riscv-dis.c, * s390-dis.c, * sparc-dis.c, * v850-dis.c: Use
463 opcodes_error_handler to print errors. Standardize error messages.
464 * msp430-decode.opc, * nios2-dis.c, * rl78-decode.opc: Likewise,
465 and include opintl.h.
466 * nds32-asm.c: Likewise, and include sysdep.h and opintl.h.
467 * i386-gen.c: Standardize error messages.
468 * msp430-decode.c, * rl78-decode.c, rx-decode.c: Regenerate.
469 * Makefile.in: Regenerate.
470 * epiphany-asm.c, * epiphany-desc.c, * epiphany-dis.c,
471 * epiphany-ibld.c, * fr30-asm.c, * fr30-desc.c, * fr30-dis.c,
472 * fr30-ibld.c, * frv-asm.c, * frv-desc.c, * frv-dis.c, * frv-ibld.c,
473 * frv-opc.c, * ip2k-asm.c, * ip2k-desc.c, * ip2k-dis.c, * ip2k-ibld.c,
474 * iq2000-asm.c, * iq2000-desc.c, * iq2000-dis.c, * iq2000-ibld.c,
475 * lm32-asm.c, * lm32-desc.c, * lm32-dis.c, * lm32-ibld.c,
476 * m32c-asm.c, * m32c-desc.c, * m32c-dis.c, * m32c-ibld.c,
477 * m32r-asm.c, * m32r-desc.c, * m32r-dis.c, * m32r-ibld.c,
478 * mep-asm.c, * mep-desc.c, * mep-dis.c, * mep-ibld.c, * mt-asm.c,
479 * mt-desc.c, * mt-dis.c, * mt-ibld.c, * or1k-asm.c, * or1k-desc.c,
480 * or1k-dis.c, * or1k-ibld.c, * xc16x-asm.c, * xc16x-desc.c,
481 * xc16x-dis.c, * xc16x-ibld.c, * xstormy16-asm.c, * xstormy16-desc.c,
482 * xstormy16-dis.c, * xstormy16-ibld.c: Regenerate.
483
484 2018-03-01 H.J. Lu <hongjiu.lu@intel.com>
485
486 * * i386-opc.tbl: Add "Optimize" to AVX256 and AVX512
487 vpsub[bwdq] instructions.
488 * i386-tbl.h: Regenerated.
489
490 2018-03-01 Alan Modra <amodra@gmail.com>
491
492 * configure.ac (ALL_LINGUAS): Sort.
493 * configure: Regenerate.
494
495 2018-02-27 Thomas Preud'homme <thomas.preudhomme@arm.com>
496
497 * arm-dis.c (print_insn_coprocessor): Replace uses of ARM_FEATURE_COPY
498 macro by assignements.
499
500 2018-02-27 H.J. Lu <hongjiu.lu@intel.com>
501
502 PR gas/22871
503 * i386-gen.c (opcode_modifiers): Add Optimize.
504 * i386-opc.h (Optimize): New enum.
505 (i386_opcode_modifier): Add optimize.
506 * i386-opc.tbl: Add "Optimize" to "mov $imm, reg",
507 "sub reg, reg/mem", "test $imm, acc", "test $imm, reg/mem",
508 "and $imm, acc", "and $imm, reg/mem", "xor reg, reg/mem",
509 "movq $imm, reg" and AVX256 and AVX512 versions of vandnps,
510 vandnpd, vpandn, vpandnd, vpandnq, vxorps, vxorpd, vpxor,
511 vpxord and vpxorq.
512 * i386-tbl.h: Regenerated.
513
514 2018-02-26 Alan Modra <amodra@gmail.com>
515
516 * crx-dis.c (getregliststring): Allocate a large enough buffer
517 to silence false positive gcc8 warning.
518
519 2018-02-22 Shea Levy <shea@shealevy.com>
520
521 * disassemble.c (ARCH_riscv): Define if ARCH_all.
522
523 2018-02-22 H.J. Lu <hongjiu.lu@intel.com>
524
525 * i386-opc.tbl: Add {rex},
526 * i386-tbl.h: Regenerated.
527
528 2018-02-20 Maciej W. Rozycki <macro@mips.com>
529
530 * mips16-opc.c (decode_mips16_operand) <'M'>: Remove case.
531 (mips16_opcodes): Replace `M' with `m' for "restore".
532
533 2018-02-19 Thomas Preud'homme <thomas.preudhomme@arm.com>
534
535 * arm-dis.c (thumb_opcodes): Fix BXNS mask.
536
537 2018-02-13 Maciej W. Rozycki <macro@mips.com>
538
539 * wasm32-dis.c (print_insn_wasm32): Rename `index' local
540 variable to `function_index'.
541
542 2018-02-13 Nick Clifton <nickc@redhat.com>
543
544 PR 22823
545 * metag-dis.c (print_fmmov): Double buffer size to avoid warning
546 about truncation of printing.
547
548 2018-02-12 Henry Wong <henry@stuffedcow.net>
549
550 * mips-opc.c (mips_builtin_opcodes): Correct "sigrie" encoding.
551
552 2018-02-05 Nick Clifton <nickc@redhat.com>
553
554 * po/pt_BR.po: Updated Brazilian Portuguese translation.
555
556 2018-01-23 Igor Tsimbalist <igor.v.tsimbalist@intel.com>
557
558 * i386-dis.c (enum): Add pconfig.
559 * i386-gen.c (cpu_flag_init): Add CPU_PCONFIG_FLAGS.
560 (cpu_flags): Add CpuPCONFIG.
561 * i386-opc.h (enum): Add CpuPCONFIG.
562 (i386_cpu_flags): Add cpupconfig.
563 * i386-opc.tbl: Add PCONFIG instruction.
564 * i386-init.h: Regenerate.
565 * i386-tbl.h: Likewise.
566
567 2018-01-23 Igor Tsimbalist <igor.v.tsimbalist@intel.com>
568
569 * i386-dis.c (enum): Add PREFIX_0F09.
570 * i386-gen.c (cpu_flag_init): Add CPU_WBNOINVD_FLAGS.
571 (cpu_flags): Add CpuWBNOINVD.
572 * i386-opc.h (enum): Add CpuWBNOINVD.
573 (i386_cpu_flags): Add cpuwbnoinvd.
574 * i386-opc.tbl: Add WBNOINVD instruction.
575 * i386-init.h: Regenerate.
576 * i386-tbl.h: Likewise.
577
578 2018-01-17 Jim Wilson <jimw@sifive.com>
579
580 * riscv-opc.c (riscv_opcodes) <addi>: Use z instead of 0.
581
582 2018-01-17 Igor Tsimbalist <igor.v.tsimbalist@intel.com>
583
584 * i386-gen.c (cpu_flag_init): Delete CPU_CET_FLAGS, CpuCET.
585 Add CPU_IBT_FLAGS, CPU_SHSTK_FLAGS, CPY_ANY_IBT_FLAGS,
586 CPU_ANY_SHSTK_FLAGS, CpuIBT, CpuSHSTK.
587 (cpu_flags): Add CpuIBT, CpuSHSTK.
588 * i386-opc.h (enum): Add CpuIBT, CpuSHSTK.
589 (i386_cpu_flags): Add cpuibt, cpushstk.
590 * i386-opc.tbl: Change CpuCET to CpuSHSTK and CpuIBT.
591 * i386-init.h: Regenerate.
592 * i386-tbl.h: Likewise.
593
594 2018-01-16 Nick Clifton <nickc@redhat.com>
595
596 * po/pt_BR.po: Updated Brazilian Portugese translation.
597 * po/de.po: Updated German translation.
598
599 2018-01-15 Jim Wilson <jimw@sifive.com>
600
601 * riscv-opc.c (match_c_nop): New.
602 (riscv_opcodes) <addi>: Handle an addi that compresses to c.nop.
603
604 2018-01-15 Nick Clifton <nickc@redhat.com>
605
606 * po/uk.po: Updated Ukranian translation.
607
608 2018-01-13 Nick Clifton <nickc@redhat.com>
609
610 * po/opcodes.pot: Regenerated.
611
612 2018-01-13 Nick Clifton <nickc@redhat.com>
613
614 * configure: Regenerate.
615
616 2018-01-13 Nick Clifton <nickc@redhat.com>
617
618 2.30 branch created.
619
620 2018-01-11 Igor Tsimbalist <igor.v.tsimbalist@intel.com>
621
622 * i386-opc.tbl: Remove VL variants for 4FMAPS and 4VNNIW insns.
623 * i386-tbl.h: Regenerate.
624
625 2018-01-10 Jan Beulich <jbeulich@suse.com>
626
627 * i386-opc.tbl (v4fmaddss, v4fnmaddss): Adjust Disp8MemShift.
628 * i386-tbl.h: Re-generate.
629
630 2018-01-10 Jan Beulich <jbeulich@suse.com>
631
632 * i386-opc.tbl (vpcmpeqb, vpcmpleb, vpcmpltb, vpcmpneqb,
633 vpcmpnleb, vpcmpnltb, vpcmpequb, vpcmpleub, vpcmpltub,
634 vpcmpnequb, vpcmpnleub, vpcmpnltub, vpcmpeqw, vpcmplew,
635 vpcmpltw, vpcmpneqw, vpcmpnlew, vpcmpnltw, vpcmpequw, vpcmpleuw,
636 vpcmpltuw, vpcmpnequw, vpcmpnleuw, vpcmpnltuw): Adjust
637 Disp8MemShift of AVX512VL forms.
638 * i386-tbl.h: Re-generate.
639
640 2018-01-09 Jim Wilson <jimw@sifive.com>
641
642 * riscv-dis.c (maybe_print_address): If base_reg is zero,
643 then the hi_addr value is zero.
644
645 2018-01-09 James Greenhalgh <james.greenhalgh@arm.com>
646
647 * arm-dis.c (arm_opcodes): Add csdb.
648 (thumb32_opcodes): Add csdb.
649
650 2018-01-09 James Greenhalgh <james.greenhalgh@arm.com>
651
652 * aarch64-tbl.h (aarch64_opcode_table): Add "csdb".
653 * aarch64-asm-2.c: Regenerate.
654 * aarch64-dis-2.c: Regenerate.
655 * aarch64-opc-2.c: Regenerate.
656
657 2018-01-08 H.J. Lu <hongjiu.lu@intel.com>
658
659 PR gas/22681
660 * i386-opc.tbl: Properly encode vmovd with Qword memeory operand.
661 Remove AVX512 vmovd with 64-bit operands.
662 * i386-tbl.h: Regenerated.
663
664 2018-01-05 Jim Wilson <jimw@sifive.com>
665
666 * riscv-dis.c (print_insn_args) <'s'>: Call maybe_print_address for a
667 jalr.
668
669 2018-01-03 Alan Modra <amodra@gmail.com>
670
671 Update year range in copyright notice of all files.
672
673 2018-01-02 Jan Beulich <jbeulich@suse.com>
674
675 * i386-gen.c (operand_type_init): Restore OPERAND_TYPE_REGYMM
676 and OPERAND_TYPE_REGZMM entries.
677
678 For older changes see ChangeLog-2017
679 \f
680 Copyright (C) 2018 Free Software Foundation, Inc.
681
682 Copying and distribution of this file, with or without modification,
683 are permitted in any medium without royalty provided the copyright
684 notice and this notice are preserved.
685
686 Local Variables:
687 mode: change-log
688 left-margin: 8
689 fill-column: 74
690 version-control: never
691 End: