1 2020-09-02 Alan Modra <amodra@gmail.com>
3 * crx-dis.c: Whitespace.
4 (print_arg): Use unsigned type for longdisp and mask variables,
5 and for left shift constant.
7 2020-09-02 Alan Modra <amodra@gmail.com>
9 * cgen-ibld.in (insert_normal, extract_normal): Use 1UL in left shift.
10 * bpf-ibld.c: Regenerate.
11 * epiphany-ibld.c: Regenerate.
12 * fr30-ibld.c: Regenerate.
13 * frv-ibld.c: Regenerate.
14 * ip2k-ibld.c: Regenerate.
15 * iq2000-ibld.c: Regenerate.
16 * lm32-ibld.c: Regenerate.
17 * m32c-ibld.c: Regenerate.
18 * m32r-ibld.c: Regenerate.
19 * mep-ibld.c: Regenerate.
20 * mt-ibld.c: Regenerate.
21 * or1k-ibld.c: Regenerate.
22 * xc16x-ibld.c: Regenerate.
23 * xstormy16-ibld.c: Regenerate.
25 2020-09-02 Alan Modra <amodra@gmail.com>
27 * bfin-dis.c (MASKBITS): Use SIGNBIT.
29 2020-09-02 Cooper Qu <cooper.qu@linux.alibaba.com>
31 * csky-opc.h (csky_v2_opcodes): Move divul and divsl
32 to CSKYV2_ISA_3E3R3 instruction set.
34 2020-09-02 Cooper Qu <cooper.qu@linux.alibaba.com>
36 * csky-opc.h (csky_v2_opcodes): Fix Encode of mulsws.
38 2020-09-01 Alan Modra <amodra@gmail.com>
40 * mep-ibld.c: Regenerate.
42 2020-08-31 Cooper Qu <cooper.qu@linux.alibaba.com>
44 * csky-dis.c (csky_output_operand): Assign dis_info.value for
47 2020-08-30 Alan Modra <amodra@gmail.com>
49 * cr16-dis.c: Formatting.
50 (parameter): Delete struct typedef. Use dwordU instead
52 (make_argument <arg_idxr>): Simplify detection of cbitb, sbitb
54 (make_argument <arg_cr>): Extract 20-bit field not 16-bit.
56 2020-08-29 Alan Modra <amodra@gmail.com>
59 * csky-opc.h (MAX_OPRND_NUM): Define to 5.
60 (union csky_operand): Use MAX_OPRND_NUM to size oprnds array.
62 2020-08-28 Alan Modra <amodra@gmail.com>
66 * cgen-ibld.in (insert_1): Use 1UL in forming mask.
67 (extract_normal): Likewise.
68 (insert_normal): Likewise, and move past zero length test.
69 (put_insn_int_value): Handle mask for zero length, use 1UL.
70 * bpf-ibld.c, * epiphany-ibld.c, * fr30-ibld.c, * frv-ibld.c,
71 * ip2k-ibld.c, * iq2000-ibld.c, * lm32-ibld.c, * m32c-ibld.c,
72 * m32r-ibld.c, * mep-ibld.c, * mt-ibld.c, * or1k-ibld.c,
73 * xc16x-ibld.c, * xstormy16-ibld.c: Regenerate.
75 2020-08-28 Cooper Qu <cooper.qu@linux.alibaba.com>
77 * csky-dis.c (CSKY_DEFAULT_ISA): Define.
78 (csky_dis_info): Add member isa.
79 (csky_find_inst_info): Skip instructions that do not belong to
81 (csky_get_disassembler): Get infomation from attribute section.
82 (print_insn_csky): Set defualt ISA flag.
83 * csky.h (CSKY_ISA_VDSP_2): Rename from CSKY_ISA_VDSP_V2.
84 * csky-opc.h (struct csky_opcode): Change isa_flag16 and
85 isa_flag32'type to unsigned 64 bits.
87 2020-08-26 Jose E. Marchesi <jemarch@gnu.org>
89 * disassemble.c (enum epbf_isa_attr): Add ISA_XBPFBE, ISA_EBPFMAX.
91 2020-08-26 David Faust <david.faust@oracle.com>
93 * bpf-desc.c: Regenerate.
94 * bpf-desc.h: Likewise.
95 * bpf-opc.c: Likewise.
96 * bpf-opc.h: Likewise.
97 * disassemble.c (disassemble_init_for_target): Set bits for xBPF
100 2020-08-25 Alan Modra <amodra@gmail.com>
103 * vax-dis.c (parse_disassembler_options): Always add at least one
104 to entry_addr_total_slots.
106 2020-08-24 Cooper Qu <cooper.qu@linux.alibaba.com>
108 * csky-dis.c (csky_find_inst_info): Skip CK860's instructions
109 in other CPUs to speed up disassembling.
110 * csky-opc.h (csky_v2_opcodes): Add CK860's instructions,
111 Change plsli.u16 to plsli.16, change sync's operand format.
113 2020-08-21 Cooper Qu <cooper.qu@linux.alibaba.com>
115 * csky-opc.h (csky_v2_opcodes): Add instruction bnezad.
117 2020-08-21 Nick Clifton <nickc@redhat.com>
119 * aarch64-dis.c (get_sym_code_type): Return FALSE for non-ELF
122 2020-08-21 Cooper Qu <cooper.qu@linux.alibaba.com>
124 * csky-opc.h (csky_v2_opcodes): Add two operands form for bloop.
126 2020-08-19 Alan Modra <amodra@gmail.com>
128 * ppc-opc.c (powerpc_opcodes): Replace OBF with BF for vcmpsq,
131 2020-08-18 Peter Bergner <bergner@linux.ibm.com>
133 * ppc-opc.c (powerpc_opcodes) <xvcvbf16sp>: Rename from this...
134 <xvcvbf16spn>: ...to this.
136 2020-08-12 Alex Coplan <alex.coplan@arm.com>
138 * aarch64-opc.c (aarch64_sys_regs): Add MPAM registers.
140 2020-08-12 Nick Clifton <nickc@redhat.com>
142 * po/sr.po: Updated Serbian translation.
144 2020-08-11 Alan Modra <amodra@gmail.com>
146 * ppc-opc.c (powerpc_opcodes): Move cctpl, cctpm and cctph.
148 2020-08-10 Przemyslaw Wirkus <przemyslaw.wirkus@arm.com>
150 * aarch64-opc.c (aarch64_print_operand):
151 (aarch64_sys_reg_deprecated_p): Functions paramaters changed.
152 (aarch64_sys_reg_supported_p): Function removed.
153 (aarch64_sys_ins_reg_supported_p): Functions paramaters changed.
154 (aarch64_sys_ins_reg_supported_p): Merged aarch64_sys_reg_supported_p
157 2020-08-10 Alan Modra <amodra@gmail.com>
159 * ppc-opc.c (powerpc_opcodes): Add many mtspr and mfspr extended
162 2020-08-10 Alan Modra <amodra@gmail.com>
164 * ppc-opc.c (powerpc_opcodes): Add exser, msgsndu, msgclru.
165 Enable icbt for power5, miso for power8.
167 2020-08-10 Alan Modra <amodra@gmail.com>
169 * ppc-opc.c (powerpc_opcodes): Prioritise mtfprd and mtvrd over
170 mtvsrd, and similarly for mfvsrd.
172 2020-08-04 Christian Groessler <chris@groessler.org>
173 Tadashi G. Takaoka <tadashi.g.takaoka@gmail.com>
175 * z8kgen.c (opt): Fix "sout imm16,rs" and "soutb imm16,rbs"
176 opcodes (special "out" to absolute address).
177 * z8k-opc.h: Regenerate.
179 2020-07-30 H.J. Lu <hongjiu.lu@intel.com>
182 * i386-opc.h (Prefix_Disp8): New.
183 (Prefix_Disp16): Likewise.
184 (Prefix_Disp32): Likewise.
185 (Prefix_Load): Likewise.
186 (Prefix_Store): Likewise.
187 (Prefix_VEX): Likewise.
188 (Prefix_VEX3): Likewise.
189 (Prefix_EVEX): Likewise.
190 (Prefix_REX): Likewise.
191 (Prefix_NoOptimize): Likewise.
192 * i386-opc.tbl: Use Prefix_XXX on pseudo prefixes. Add {disp16}.
193 * i386-tbl.h: Regenerated.
195 2020-07-29 Andreas Arnez <arnez@linux.ibm.com>
197 * s390-mkopc.c (insertExpandedMnemonic): Handle unreachable
198 default case with abort() instead of printing an error message and
199 continuing, to avoid a maybe-uninitialized warning.
201 2020-07-24 Nick Clifton <nickc@redhat.com>
203 * po/de.po: Updated German translation.
205 2020-07-21 Jan Beulich <jbeulich@suse.com>
207 * i386-dis.c (OP_E_memory): Revert previous change.
209 2020-07-15 H.J. Lu <hongjiu.lu@intel.com>
212 * i386-dis.c (OP_E_memory): Don't display eiz with no scale
213 without base nor index registers.
215 2020-07-15 Jan Beulich <jbeulich@suse.com>
217 * i386-dis.c (putop): Move 'V' and 'W' handling.
219 2020-07-15 Jan Beulich <jbeulich@suse.com>
221 * i386-dis.c (dis386): Adjust 'V' description. Use P-based
222 construct for push/pop of register.
223 (putop): Honor cond when handling 'P'. Drop handling of plain
226 2020-07-15 Jan Beulich <jbeulich@suse.com>
228 * i386-dis.c (dis386): Adjust 'P', 'T', 'U', and '@'
229 description. Drop '&' description. Use P for push of immediate,
230 pushf/popf, enter, and leave. Use %LP for lret/retf.
231 (dis386_twobyte): Use P for push/pop of fs/gs.
232 (reg_table): Use P for push/pop. Use @ for near call/jmp.
233 (x86_64_table): Use P for far call/jmp.
234 (putop): Drop handling of 'U' and '&'. Move and adjust handling
235 of '@'. Adjust handling of 'P' and 'T'. Drop case_P and case_Q
237 (OP_J): Drop marking of REX_W as used for v_mode (ISA-dependent)
238 and dqw_mode (unconditional).
240 2020-07-14 H.J. Lu <hongjiu.lu@intel.com>
243 * i386-dis.c (OP_E_memory): Without base nor index registers,
244 32-bit displacement to 64 bits.
246 2020-07-14 Claudiu Zissulescu <claziss@gmail.com>
248 * arc-dis.c (print_insn_arc): Detect and emit a warning when a
249 faulty double register pair is detected.
251 2020-07-14 Jan Beulich <jbeulich@suse.com>
253 * i386-dis.c (OP_D): Print dr<N> instead of db<N> in Intel mode.
255 2020-07-14 Jan Beulich <jbeulich@suse.com>
257 * i386-dis.c (OP_R, Rm): Delete.
258 (MOD_0F24, MOD_0F26): Rename to ...
259 (X86_64_0F24, X86_64_0F26): ... respectively.
260 (dis386): Update 'L' and 'Z' comments.
261 (dis386_twobyte): Replace Rm by Em. Change opcode 0F24 and 0F26
263 (mod_table): Move opcode 0F24 and 0F26 entries ...
264 (x86_64_table): ... here.
265 (putop): Drop handling of 'L'. Set modrm.mod to 3 for 'Z'. Move
268 2020-07-14 Jan Beulich <jbeulich@suse.com>
270 * i386-dis.c (Rd, Rdq, MaskR): Delete.
271 (MOD_EVEX_0F3828_P_1, MOD_EVEX_0F382A_P_1_W_1,
272 MOD_EVEX_0F3838_P_1, MOD_EVEX_0F383A_P_1_W_0,
273 MOD_EVEX_0F387A_W_0, MOD_EVEX_0F387B_W_0,
274 MOD_EVEX_0F387C): New enumerators.
275 (reg_table): Use Edq for rdssp.
276 (prefix_table): Use Edq for incssp.
277 (mod_table): Use Rm for move to/from %tr. Use MaskE for kand*,
278 kandn*, knot*, kor*, kxnor*, kxor*, kadd*, kunpck*, kortest*,
279 ktest*, and kshift*. Use Edq / MaskE for kmov*.
280 * i386-dis-evex.h: Reference mod_table[] for opcode 0F387C.
281 * i386-dis-evex-mod.h: New entries for opcodes 0F3828, 0F382A,
282 0F3838, 0F383A, 0F387A, 0F387B, and 0F387C.
283 * i386-dis-evex-prefix.h: Reference mod_table[] for opcodes
284 0F3828_P_1 and 0F3838_P_1.
285 * i386-dis-evex-w.h: Reference mod_table[] for opcodes
286 0F382A_P_1, 0F383A_P_1, 0F387A, and 0F387B.
288 2020-07-14 Jan Beulich <jbeulich@suse.com>
290 * i386-dis.c (PREFIX_0F01_REG_7_MOD_3_RM_3,
291 PREFIX_0FAE_REG_5_MOD_0, PREFIX_0FC3_MOD_0, PREFIX_0F38C8,
292 PREFIX_0F38C9, PREFIX_0F38CA, PREFIX_0F38CB, PREFIX_0F38CC,
293 PREFIX_0F38CD, PREFIX_0F38F9, PREFIX_0F3ACC, PREFIX_VEX_0F77,
294 PREFIX_VEX_0F38F2, PREFIX_VEX_0F38F3_REG_1,
295 PREFIX_VEX_0F38F3_REG_2, PREFIX_VEX_0F38F3_REG_3): Delete.
296 (MOD_0F38F9_PREFIX_0, VEX_LEN_0F77_P_0, VEX_LEN_0F38F2_P_0,
297 VEX_LEN_0F38F3_R_1_P_0, VEX_LEN_0F38F3_R_2_P_0,
298 VEX_LEN_0F38F3_R_3_P_0): Rename to ...
299 (MOD_0F38F9, VEX_LEN_0F77, VEX_LEN_0F38F2, VEX_LEN_0F38F3_R_1,
300 VEX_LEN_0F38F3_R_2, VEX_LEN_0F38F3_R_3): ... these respectively.
301 (reg_table, prefix_table, three_byte_table, vex_table,
302 vex_len_table, mod_table, rm_table): Replace / remove respective
304 (intel_operand_size, OP_E_register, OP_G): Avoid undue setting
305 of PREFIX_DATA in used_prefixes.
307 2020-07-14 Jan Beulich <jbeulich@suse.com>
309 * i386-dis.c (MOD_VEX_0F3A30_L_0_W_0, MOD_VEX_0F3A30_L_0_W_1,
310 MOD_VEX_0F3A31_L_0_W_0, MOD_VEX_0F3A31_L_0_W_1,
311 MOD_VEX_0F3A32_L_0_W_0, MOD_VEX_0F3A32_L_0_W_1,
312 MOD_VEX_0F3A33_L_0_W_0, MOD_VEX_0F3A33_L_0_W_1): Replace by ...
313 (MOD_VEX_0F3A30_L_0, MOD_VEX_0F3A31_L_0,
314 MOD_VEX_0F3A32_L_0, MOD_VEX_0F3A33_L_0): ... these.
315 (VEX_W_0F3A30_L_0, VEX_W_0F3A31_L_0, VEX_W_0F3A32_L_0,
316 VEX_W_0F3A33_L_0): Delete.
317 (dis386): Adjust "BW" description.
318 (vex_len_table): Refer to mod_table[] for opcodes 0F3A30,
319 0F3A31, 0F3A32, and 0F3A33.
320 (vex_w_table): Delete opcode 0F3A30, 0F3A31, 0F3A32, and 0F3A33
322 (mod_table): Replace opcode 0F3A30, 0F3A31, 0F3A32, and 0F3A33
325 2020-07-14 Jan Beulich <jbeulich@suse.com>
327 * i386-dis.c (PREFIX_0F6C, PREFIX_0F6D, PREFIX_0F73_REG_3,
328 PREFIX_0F73_REG_7, PREFIX_0F3810, PREFIX_0F3814, PREFIX_0F3815,
329 PREFIX_0F3817, PREFIX_0F3820, PREFIX_0F3821, PREFIX_0F3822,
330 PREFIX_0F3823, PREFIX_0F3824, PREFIX_0F3825, PREFIX_0F3828,
331 PREFIX_0F3829, PREFIX_0F382A, PREFIX_0F382B, PREFIX_0F3830,
332 PREFIX_0F3831, PREFIX_0F3832, PREFIX_0F3833, PREFIX_0F3834,
333 PREFIX_0F3835, PREFIX_0F3837, PREFIX_0F3838, PREFIX_0F3839,
334 PREFIX_0F383A, PREFIX_0F383B, PREFIX_0F383C, PREFIX_0F383D,
335 PREFIX_0F383E, PREFIX_0F383F, PREFIX_0F3840, PREFIX_0F3841,
336 PREFIX_0F3880, PREFIX_0F3881, PREFIX_0F3882, PREFIX_0F38CF,
337 PREFIX_0F38DB, PREFIX_0F38DC, PREFIX_0F38DD, PREFIX_0F38DE,
338 PREFIX_0F38DF, PREFIX_0F38F5, PREFIX_0F3A08, PREFIX_0F3A09,
339 PREFIX_0F3A0A, PREFIX_0F3A0B, PREFIX_0F3A0C, PREFIX_0F3A0D,
340 PREFIX_0F3A0E, PREFIX_0F3A14, PREFIX_0F3A15, PREFIX_0F3A16,
341 PREFIX_0F3A17, PREFIX_0F3A20, PREFIX_0F3A21, PREFIX_0F3A22,
342 PREFIX_0F3A40, PREFIX_0F3A41, PREFIX_0F3A42, PREFIX_0F3A44,
343 PREFIX_0F3A60, PREFIX_0F3A61, PREFIX_0F3A62, PREFIX_0F3A63,
344 PREFIX_0F3ACE, PREFIX_0F3ACF, PREFIX_0F3ADF, PREFIX_VEX_0F60,
345 PREFIX_VEX_0F61, PREFIX_VEX_0F62, PREFIX_VEX_0F63,
346 PREFIX_VEX_0F64, PREFIX_VEX_0F65, PREFIX_VEX_0F66,
347 PREFIX_VEX_0F67, PREFIX_VEX_0F68, PREFIX_VEX_0F69,
348 PREFIX_VEX_0F6A, PREFIX_VEX_0F6B, PREFIX_VEX_0F6C,
349 PREFIX_VEX_0F6D, PREFIX_VEX_0F6E, PREFIX_VEX_0F71_REG_2,
350 PREFIX_VEX_0F71_REG_4, PREFIX_VEX_0F71_REG_6,
351 PREFIX_VEX_0F72_REG_2, PREFIX_VEX_0F72_REG_4,
352 PREFIX_VEX_0F72_REG_6, PREFIX_VEX_0F73_REG_2,
353 PREFIX_VEX_0F73_REG_3, PREFIX_VEX_0F73_REG_6,
354 PREFIX_VEX_0F73_REG_7, PREFIX_VEX_0F74,
355 PREFIX_VEX_0F75, PREFIX_VEX_0F76, PREFIX_VEX_0FC4,
356 PREFIX_VEX_0FC5, PREFIX_VEX_0FD1, PREFIX_VEX_0FD2,
357 PREFIX_VEX_0FD3, PREFIX_VEX_0FD4, PREFIX_VEX_0FD5,
358 PREFIX_VEX_0FD6, PREFIX_VEX_0FD7, PREFIX_VEX_0FD8,
359 PREFIX_VEX_0FD9, PREFIX_VEX_0FDA, PREFIX_VEX_0FDB,
360 PREFIX_VEX_0FDC, PREFIX_VEX_0FDD, PREFIX_VEX_0FDE,
361 PREFIX_VEX_0FDF, PREFIX_VEX_0FE0, PREFIX_VEX_0FE1,
362 PREFIX_VEX_0FE2, PREFIX_VEX_0FE3, PREFIX_VEX_0FE4,
363 PREFIX_VEX_0FE5, PREFIX_VEX_0FE7, PREFIX_VEX_0FE8,
364 PREFIX_VEX_0FE9, PREFIX_VEX_0FEA, PREFIX_VEX_0FEB,
365 PREFIX_VEX_0FEC, PREFIX_VEX_0FED, PREFIX_VEX_0FEE,
366 PREFIX_VEX_0FEF, PREFIX_VEX_0FF1, PREFIX_VEX_0FF2,
367 PREFIX_VEX_0FF3, PREFIX_VEX_0FF4, PREFIX_VEX_0FF5,
368 PREFIX_VEX_0FF6, PREFIX_VEX_0FF7, PREFIX_VEX_0FF8,
369 PREFIX_VEX_0FF9, PREFIX_VEX_0FFA, PREFIX_VEX_0FFB,
370 PREFIX_VEX_0FFC, PREFIX_VEX_0FFD, PREFIX_VEX_0FFE,
371 PREFIX_VEX_0F3800, PREFIX_VEX_0F3801, PREFIX_VEX_0F3802,
372 PREFIX_VEX_0F3803, PREFIX_VEX_0F3804, PREFIX_VEX_0F3805,
373 PREFIX_VEX_0F3806, PREFIX_VEX_0F3807, PREFIX_VEX_0F3808,
374 PREFIX_VEX_0F3809, PREFIX_VEX_0F380A, PREFIX_VEX_0F380B,
375 PREFIX_VEX_0F380C, PREFIX_VEX_0F380D, PREFIX_VEX_0F380E,
376 PREFIX_VEX_0F380F, PREFIX_VEX_0F3813, PREFIX_VEX_0F3816,
377 PREFIX_VEX_0F3817, PREFIX_VEX_0F3818, PREFIX_VEX_0F3819,
378 PREFIX_VEX_0F381A, PREFIX_VEX_0F381C, PREFIX_VEX_0F381D,
379 PREFIX_VEX_0F381E, PREFIX_VEX_0F3820, PREFIX_VEX_0F3821,
380 PREFIX_VEX_0F3822, PREFIX_VEX_0F3823, PREFIX_VEX_0F3824,
381 PREFIX_VEX_0F3825, PREFIX_VEX_0F3828, PREFIX_VEX_0F3829,
382 PREFIX_VEX_0F382A, PREFIX_VEX_0F382B, PREFIX_VEX_0F382C,
383 PREFIX_VEX_0F382D, PREFIX_VEX_0F382E, PREFIX_VEX_0F382F,
384 PREFIX_VEX_0F3830, PREFIX_VEX_0F3831, PREFIX_VEX_0F3832,
385 PREFIX_VEX_0F3833, PREFIX_VEX_0F3834, PREFIX_VEX_0F3835,
386 PREFIX_VEX_0F3836, PREFIX_VEX_0F3837, PREFIX_VEX_0F3838,
387 PREFIX_VEX_0F3839, PREFIX_VEX_0F383A, PREFIX_VEX_0F383B,
388 PREFIX_VEX_0F383C, PREFIX_VEX_0F383D, PREFIX_VEX_0F383E,
389 PREFIX_VEX_0F383F, PREFIX_VEX_0F3840, PREFIX_VEX_0F3841,
390 PREFIX_VEX_0F3845, PREFIX_VEX_0F3846, PREFIX_VEX_0F3847,
391 PREFIX_VEX_0F3858, PREFIX_VEX_0F3859, PREFIX_VEX_0F385A,
392 PREFIX_VEX_0F3878, PREFIX_VEX_0F3879, PREFIX_VEX_0F388C,
393 PREFIX_VEX_0F388E, PREFIX_VEX_0F3890, PREFIX_VEX_0F3891,
394 PREFIX_VEX_0F3892, PREFIX_VEX_0F3893, PREFIX_VEX_0F3896,
395 PREFIX_VEX_0F3897, PREFIX_VEX_0F3898, PREFIX_VEX_0F3899,
396 PREFIX_VEX_0F389A, PREFIX_VEX_0F389B, PREFIX_VEX_0F389C,
397 PREFIX_VEX_0F389D, PREFIX_VEX_0F389E, PREFIX_VEX_0F389F,
398 PREFIX_VEX_0F38A6, PREFIX_VEX_0F38A7, PREFIX_VEX_0F38A8,
399 PREFIX_VEX_0F38A9, PREFIX_VEX_0F38AA, PREFIX_VEX_0F38AB,
400 PREFIX_VEX_0F38AC, PREFIX_VEX_0F38AD, PREFIX_VEX_0F38AE,
401 PREFIX_VEX_0F38AF, PREFIX_VEX_0F38B6, PREFIX_VEX_0F38B7,
402 PREFIX_VEX_0F38B8, PREFIX_VEX_0F38B9, PREFIX_VEX_0F38BA,
403 PREFIX_VEX_0F38BB, PREFIX_VEX_0F38BC, PREFIX_VEX_0F38BD,
404 PREFIX_VEX_0F38BE, PREFIX_VEX_0F38BF, PREFIX_VEX_0F38CF,
405 PREFIX_VEX_0F38DB, PREFIX_VEX_0F38DC, PREFIX_VEX_0F38DD,
406 PREFIX_VEX_0F38DE, PREFIX_VEX_0F38DF, PREFIX_VEX_0F3A00,
407 PREFIX_VEX_0F3A01, PREFIX_VEX_0F3A02, PREFIX_VEX_0F3A04,
408 PREFIX_VEX_0F3A05, PREFIX_VEX_0F3A06, PREFIX_VEX_0F3A08,
409 PREFIX_VEX_0F3A09, PREFIX_VEX_0F3A0A, PREFIX_VEX_0F3A0B,
410 PREFIX_VEX_0F3A0C, PREFIX_VEX_0F3A0D, PREFIX_VEX_0F3A0E,
411 PREFIX_VEX_0F3A0F, PREFIX_VEX_0F3A14, PREFIX_VEX_0F3A15,
412 PREFIX_VEX_0F3A16, PREFIX_VEX_0F3A17, PREFIX_VEX_0F3A18,
413 PREFIX_VEX_0F3A19, PREFIX_VEX_0F3A1D, PREFIX_VEX_0F3A20,
414 PREFIX_VEX_0F3A21, PREFIX_VEX_0F3A22, PREFIX_VEX_0F3A30,
415 PREFIX_VEX_0F3A31, PREFIX_VEX_0F3A32, PREFIX_VEX_0F3A33,
416 PREFIX_VEX_0F3A38, PREFIX_VEX_0F3A39, PREFIX_VEX_0F3A40,
417 PREFIX_VEX_0F3A41, PREFIX_VEX_0F3A42, PREFIX_VEX_0F3A44,
418 PREFIX_VEX_0F3A46, PREFIX_VEX_0F3A48, PREFIX_VEX_0F3A49,
419 PREFIX_VEX_0F3A4A, PREFIX_VEX_0F3A4B, PREFIX_VEX_0F3A4C,
420 PREFIX_VEX_0F3A5C, PREFIX_VEX_0F3A5D, PREFIX_VEX_0F3A5E,
421 PREFIX_VEX_0F3A5F, PREFIX_VEX_0F3A60, PREFIX_VEX_0F3A61,
422 PREFIX_VEX_0F3A62, PREFIX_VEX_0F3A63, PREFIX_VEX_0F3A68,
423 PREFIX_VEX_0F3A69, PREFIX_VEX_0F3A6A, PREFIX_VEX_0F3A6B,
424 PREFIX_VEX_0F3A6C, PREFIX_VEX_0F3A6D, PREFIX_VEX_0F3A6E,
425 PREFIX_VEX_0F3A6F, PREFIX_VEX_0F3A78, PREFIX_VEX_0F3A79,
426 PREFIX_VEX_0F3A7A, PREFIX_VEX_0F3A7B, PREFIX_VEX_0F3A7C,
427 PREFIX_VEX_0F3A7D, PREFIX_VEX_0F3A7E, PREFIX_VEX_0F3A7F,
428 PREFIX_VEX_0F3ACE, PREFIX_VEX_0F3ACF, PREFIX_VEX_0F3ADF,
429 PREFIX_EVEX_0F64, PREFIX_EVEX_0F65, PREFIX_EVEX_0F66,
430 PREFIX_EVEX_0F6E, PREFIX_EVEX_0F71_REG_2,
431 PREFIX_EVEX_0F71_REG_4, PREFIX_EVEX_0F71_REG_6,
432 PREFIX_EVEX_0F72_REG_0, PREFIX_EVEX_0F72_REG_1,
433 PREFIX_EVEX_0F72_REG_2, PREFIX_EVEX_0F72_REG_4,
434 PREFIX_EVEX_0F72_REG_6, PREFIX_EVEX_0F73_REG_2,
435 PREFIX_EVEX_0F73_REG_3, PREFIX_EVEX_0F73_REG_6,
436 PREFIX_EVEX_0F73_REG_7, PREFIX_EVEX_0F74, PREFIX_EVEX_0F75,
437 PREFIX_EVEX_0F76, PREFIX_EVEX_0FC4, PREFIX_EVEX_0FC5,
438 PREFIX_EVEX_0FD6, PREFIX_EVEX_0FDB, PREFIX_EVEX_0FDF,
439 PREFIX_EVEX_0FE2, PREFIX_EVEX_0FE7, PREFIX_EVEX_0FEB,
440 PREFIX_EVEX_0FEF, PREFIX_EVEX_0F380D, PREFIX_EVEX_0F3816,
441 PREFIX_EVEX_0F3819, PREFIX_EVEX_0F381A, PREFIX_EVEX_0F381B,
442 PREFIX_EVEX_0F381E, PREFIX_EVEX_0F381F, PREFIX_EVEX_0F382C,
443 PREFIX_EVEX_0F382D, PREFIX_EVEX_0F3836, PREFIX_EVEX_0F3837,
444 PREFIX_EVEX_0F383B, PREFIX_EVEX_0F383D, PREFIX_EVEX_0F383F,
445 PREFIX_EVEX_0F3840, PREFIX_EVEX_0F3842, PREFIX_EVEX_0F3843,
446 PREFIX_EVEX_0F3844, PREFIX_EVEX_0F3845, PREFIX_EVEX_0F3846,
447 PREFIX_EVEX_0F3847, PREFIX_EVEX_0F384C, PREFIX_EVEX_0F384D,
448 PREFIX_EVEX_0F384E, PREFIX_EVEX_0F384F, PREFIX_EVEX_0F3850,
449 PREFIX_EVEX_0F3851, PREFIX_EVEX_0F3854, PREFIX_EVEX_0F3855,
450 PREFIX_EVEX_0F3859, PREFIX_EVEX_0F385A, PREFIX_EVEX_0F385B,
451 PREFIX_EVEX_0F3862, PREFIX_EVEX_0F3863, PREFIX_EVEX_0F3864,
452 PREFIX_EVEX_0F3865, PREFIX_EVEX_0F3866, PREFIX_EVEX_0F3870,
453 PREFIX_EVEX_0F3871, PREFIX_EVEX_0F3873, PREFIX_EVEX_0F3875,
454 PREFIX_EVEX_0F3876, PREFIX_EVEX_0F3877, PREFIX_EVEX_0F387A,
455 PREFIX_EVEX_0F387B, PREFIX_EVEX_0F387C, PREFIX_EVEX_0F387D,
456 PREFIX_EVEX_0F387E, PREFIX_EVEX_0F387F, PREFIX_EVEX_0F3883,
457 PREFIX_EVEX_0F3888, PREFIX_EVEX_0F3889, PREFIX_EVEX_0F388A,
458 PREFIX_EVEX_0F388B, PREFIX_EVEX_0F388D, PREFIX_EVEX_0F388F,
459 PREFIX_EVEX_0F3890, PREFIX_EVEX_0F3891, PREFIX_EVEX_0F3892,
460 PREFIX_EVEX_0F3893, PREFIX_EVEX_0F38A0, PREFIX_EVEX_0F38A1,
461 PREFIX_EVEX_0F38A2, PREFIX_EVEX_0F38A3, PREFIX_EVEX_0F38B4,
462 PREFIX_EVEX_0F38B5, PREFIX_EVEX_0F38C4,
463 PREFIX_EVEX_0F38C6_REG_1, PREFIX_EVEX_0F38C6_REG_2,
464 PREFIX_EVEX_0F38C6_REG_5, PREFIX_EVEX_0F38C6_REG_6,
465 PREFIX_EVEX_0F38C7_REG_1, PREFIX_EVEX_0F38C7_REG_2,
466 PREFIX_EVEX_0F38C7_REG_5, PREFIX_EVEX_0F38C7_REG_6,
467 PREFIX_EVEX_0F38C8, PREFIX_EVEX_0F38CA, PREFIX_EVEX_0F38CB,
468 PREFIX_EVEX_0F38CC, PREFIX_EVEX_0F38CD, PREFIX_EVEX_0F3A00,
469 PREFIX_EVEX_0F3A01, PREFIX_EVEX_0F3A03, PREFIX_EVEX_0F3A05,
470 PREFIX_EVEX_0F3A08, PREFIX_EVEX_0F3A09, PREFIX_EVEX_0F3A0A,
471 PREFIX_EVEX_0F3A0B, PREFIX_EVEX_0F3A14, PREFIX_EVEX_0F3A15,
472 PREFIX_EVEX_0F3A16, PREFIX_EVEX_0F3A17, PREFIX_EVEX_0F3A18,
473 PREFIX_EVEX_0F3A19, PREFIX_EVEX_0F3A1A, PREFIX_EVEX_0F3A1B,
474 PREFIX_EVEX_0F3A1E, PREFIX_EVEX_0F3A1F, PREFIX_EVEX_0F3A20,
475 PREFIX_EVEX_0F3A21, PREFIX_EVEX_0F3A22, PREFIX_EVEX_0F3A23,
476 PREFIX_EVEX_0F3A25, PREFIX_EVEX_0F3A26, PREFIX_EVEX_0F3A27,
477 PREFIX_EVEX_0F3A38, PREFIX_EVEX_0F3A39, PREFIX_EVEX_0F3A3A,
478 PREFIX_EVEX_0F3A3B, PREFIX_EVEX_0F3A3E, PREFIX_EVEX_0F3A3F,
479 PREFIX_EVEX_0F3A42, PREFIX_EVEX_0F3A43, PREFIX_EVEX_0F3A50,
480 PREFIX_EVEX_0F3A51, PREFIX_EVEX_0F3A54, PREFIX_EVEX_0F3A55,
481 PREFIX_EVEX_0F3A56, PREFIX_EVEX_0F3A57, PREFIX_EVEX_0F3A66,
482 PREFIX_EVEX_0F3A67, PREFIX_EVEX_0F3A70, PREFIX_EVEX_0F3A71,
483 PREFIX_EVEX_0F3A72, PREFIX_EVEX_0F3A73): Delete.
484 (MOD_0F382A_PREFIX_2, MOD_0F38F5_PREFIX_2,
485 MOD_VEX_0FD7_PREFIX_2, MOD_VEX_0FE7_PREFIX_2,
486 MOD_VEX_0F381A_PREFIX_2, MOD_VEX_0F382A_PREFIX_2,
487 MOD_VEX_0F382C_PREFIX_2, MOD_VEX_0F382D_PREFIX_2,
488 MOD_VEX_0F382E_PREFIX_2, MOD_VEX_0F382F_PREFIX_2,
489 MOD_VEX_0F385A_PREFIX_2, MOD_VEX_0F388C_PREFIX_2,
490 MOD_VEX_0F388E_PREFIX_2, MOD_VEX_W_0_0F3A30_P_2_LEN_0,
491 MOD_VEX_W_1_0F3A30_P_2_LEN_0, MOD_VEX_W_0_0F3A31_P_2_LEN_0,
492 MOD_VEX_W_1_0F3A31_P_2_LEN_0, MOD_VEX_W_0_0F3A32_P_2_LEN_0,
493 MOD_VEX_W_1_0F3A32_P_2_LEN_0, MOD_VEX_W_0_0F3A33_P_2_LEN_0,
494 MOD_VEX_W_1_0F3A33_P_2_LEN_0, MOD_EVEX_0F381A_P_2_W_0,
495 MOD_EVEX_0F381A_P_2_W_1, MOD_EVEX_0F381B_P_2_W_0,
496 MOD_EVEX_0F381B_P_2_W_1, MOD_EVEX_0F385A_P_2_W_0,
497 MOD_EVEX_0F385A_P_2_W_1, MOD_EVEX_0F385B_P_2_W_0,
498 MOD_EVEX_0F385B_P_2_W_1, VEX_LEN_0F6E_P_2,
499 VEX_LEN_0FC4_P_2, VEX_LEN_0FC5_P_2, VEX_LEN_0FD6_P_2,
500 VEX_LEN_0FF7_P_2, VEX_LEN_0F3816_P_2, VEX_LEN_0F3819_P_2,
501 VEX_LEN_0F381A_P_2_M_0, VEX_LEN_0F3836_P_2,
502 VEX_LEN_0F3841_P_2, VEX_LEN_0F385A_P_2_M_0,
503 VEX_LEN_0F38DB_P_2, VEX_LEN_0F3A00_P_2, VEX_LEN_0F3A01_P_2,
504 VEX_LEN_0F3A06_P_2, VEX_LEN_0F3A14_P_2, VEX_LEN_0F3A15_P_2,
505 VEX_LEN_0F3A16_P_2, VEX_LEN_0F3A17_P_2, VEX_LEN_0F3A18_P_2,
506 VEX_LEN_0F3A19_P_2, VEX_LEN_0F3A20_P_2, VEX_LEN_0F3A21_P_2,
507 VEX_LEN_0F3A22_P_2, VEX_LEN_0F3A30_P_2, VEX_LEN_0F3A31_P_2,
508 VEX_LEN_0F3A32_P_2, VEX_LEN_0F3A33_P_2, VEX_LEN_0F3A38_P_2,
509 VEX_LEN_0F3A39_P_2, VEX_LEN_0F3A41_P_2, VEX_LEN_0F3A46_P_2,
510 VEX_LEN_0F3A60_P_2, VEX_LEN_0F3A61_P_2, VEX_LEN_0F3A62_P_2,
511 VEX_LEN_0F3A63_P_2, VEX_LEN_0F3ADF_P_2, EVEX_LEN_0F6E_P_2,
512 EVEX_LEN_0FC4_P_2, EVEX_LEN_0FC5_P_2, EVEX_LEN_0FD6_P_2,
513 EVEX_LEN_0F3816_P_2, EVEX_LEN_0F3819_P_2_W_0,
514 EVEX_LEN_0F3819_P_2_W_1, EVEX_LEN_0F381A_P_2_W_0_M_0,
515 EVEX_LEN_0F381A_P_2_W_1_M_0, EVEX_LEN_0F381B_P_2_W_0_M_0,
516 EVEX_LEN_0F381B_P_2_W_1_M_0, EVEX_LEN_0F3836_P_2,
517 EVEX_LEN_0F385A_P_2_W_0_M_0, EVEX_LEN_0F385A_P_2_W_1_M_0,
518 EVEX_LEN_0F385B_P_2_W_0_M_0, EVEX_LEN_0F385B_P_2_W_1_M_0,
519 EVEX_LEN_0F38C6_REG_1_PREFIX_2, EVEX_LEN_0F38C6_REG_2_PREFIX_2,
520 EVEX_LEN_0F38C6_REG_5_PREFIX_2, EVEX_LEN_0F38C6_REG_6_PREFIX_2,
521 EVEX_LEN_0F38C7_R_1_P_2_W_0, EVEX_LEN_0F38C7_R_1_P_2_W_1,
522 EVEX_LEN_0F38C7_R_2_P_2_W_0, EVEX_LEN_0F38C7_R_2_P_2_W_1,
523 EVEX_LEN_0F38C7_R_5_P_2_W_0, EVEX_LEN_0F38C7_R_5_P_2_W_1,
524 EVEX_LEN_0F38C7_R_6_P_2_W_0, EVEX_LEN_0F38C7_R_6_P_2_W_1,
525 EVEX_LEN_0F3A00_P_2_W_1, EVEX_LEN_0F3A01_P_2_W_1,
526 EVEX_LEN_0F3A14_P_2, EVEX_LEN_0F3A15_P_2, EVEX_LEN_0F3A16_P_2,
527 EVEX_LEN_0F3A17_P_2, EVEX_LEN_0F3A18_P_2_W_0,
528 EVEX_LEN_0F3A18_P_2_W_1, EVEX_LEN_0F3A19_P_2_W_0,
529 EVEX_LEN_0F3A19_P_2_W_1, EVEX_LEN_0F3A1A_P_2_W_0,
530 EVEX_LEN_0F3A1A_P_2_W_1, EVEX_LEN_0F3A1B_P_2_W_0,
531 EVEX_LEN_0F3A1B_P_2_W_1, EVEX_LEN_0F3A20_P_2,
532 EVEX_LEN_0F3A21_P_2_W_0, EVEX_LEN_0F3A22_P_2,
533 EVEX_LEN_0F3A23_P_2_W_0, EVEX_LEN_0F3A23_P_2_W_1,
534 EVEX_LEN_0F3A38_P_2_W_0, EVEX_LEN_0F3A38_P_2_W_1,
535 EVEX_LEN_0F3A39_P_2_W_0, EVEX_LEN_0F3A39_P_2_W_1,
536 EVEX_LEN_0F3A3A_P_2_W_0, EVEX_LEN_0F3A3A_P_2_W_1,
537 EVEX_LEN_0F3A3B_P_2_W_0, EVEX_LEN_0F3A3B_P_2_W_1,
538 EVEX_LEN_0F3A43_P_2_W_0, EVEX_LEN_0F3A43_P_2_W_1
539 VEX_W_0F380C_P_2, VEX_W_0F380D_P_2, VEX_W_0F380E_P_2,
540 VEX_W_0F380F_P_2, VEX_W_0F3813_P_2, VEX_W_0F3816_P_2,
541 VEX_W_0F3818_P_2, VEX_W_0F3819_P_2,
542 VEX_W_0F381A_P_2_M_0_L_0, VEX_W_0F382C_P_2_M_0,
543 VEX_W_0F382D_P_2_M_0, VEX_W_0F382E_P_2_M_0,
544 VEX_W_0F382F_P_2_M_0, VEX_W_0F3836_P_2,
545 VEX_W_0F3846_P_2, VEX_W_0F3858_P_2, VEX_W_0F3859_P_2,
546 VEX_W_0F385A_P_2_M_0_L_0, VEX_W_0F3878_P_2,
547 VEX_W_0F3879_P_2, VEX_W_0F38CF_P_2, VEX_W_0F3A00_P_2,
548 VEX_W_0F3A01_P_2, VEX_W_0F3A02_P_2, VEX_W_0F3A04_P_2,
549 VEX_W_0F3A05_P_2, VEX_W_0F3A06_P_2_L_0,
550 VEX_W_0F3A18_P_2_L_0, VEX_W_0F3A19_P_2_L_0,
551 VEX_W_0F3A1D_P_2, VEX_W_0F3A30_P_2_LEN_0,
552 VEX_W_0F3A31_P_2_LEN_0, VEX_W_0F3A32_P_2_LEN_0,
553 VEX_W_0F3A33_P_2_LEN_0, VEX_W_0F3A38_P_2_L_0,
554 VEX_W_0F3A39_P_2_L_0, VEX_W_0F3A46_P_2_L_0,
555 VEX_W_0F3A4A_P_2, VEX_W_0F3A4B_P_2, VEX_W_0F3A4C_P_2,
556 VEX_W_0F3ACE_P_2, VEX_W_0F3ACF_P_2, EVEX_W_0F66_P_2,
557 EVEX_W_0F72_R_2_P_2, EVEX_W_0F72_R_6_P_2,
558 EVEX_W_0F73_R_2_P_2, EVEX_W_0F73_R_6_P_2,
559 EVEX_W_0F76_P_2, EVEX_W_0FD6_P_2, EVEX_W_0FE7_P_2,
560 EVEX_W_0F380D_P_2, EVEX_W_0F3819_P_2,
561 EVEX_W_0F381A_P_2, EVEX_W_0F381B_P_2,
562 EVEX_W_0F381E_P_2, EVEX_W_0F381F_P_2,
563 EVEX_W_0F3837_P_2, EVEX_W_0F3859_P_2,
564 EVEX_W_0F385A_P_2, EVEX_W_0F385B_P_2,
565 EVEX_W_0F3870_P_2, EVEX_W_0F387A_P_2,
566 EVEX_W_0F387B_P_2, EVEX_W_0F3883_P_2,
567 EVEX_W_0F3891_P_2, EVEX_W_0F3893_P_2,
568 EVEX_W_0F38A1_P_2, EVEX_W_0F38A3_P_2,
569 EVEX_W_0F38C7_R_1_P_2, EVEX_W_0F38C7_R_2_P_2,
570 EVEX_W_0F38C7_R_5_P_2, EVEX_W_0F38C7_R_6_P_2,
571 EVEX_W_0F3A00_P_2, EVEX_W_0F3A01_P_2,
572 EVEX_W_0F3A05_P_2, EVEX_W_0F3A08_P_2,
573 EVEX_W_0F3A09_P_2, EVEX_W_0F3A0A_P_2,
574 EVEX_W_0F3A0B_P_2, EVEX_W_0F3A18_P_2,
575 EVEX_W_0F3A19_P_2, EVEX_W_0F3A1A_P_2,
576 EVEX_W_0F3A1B_P_2, EVEX_W_0F3A21_P_2,
577 EVEX_W_0F3A23_P_2, EVEX_W_0F3A38_P_2,
578 EVEX_W_0F3A39_P_2, EVEX_W_0F3A3A_P_2,
579 EVEX_W_0F3A3B_P_2, EVEX_W_0F3A42_P_2,
580 EVEX_W_0F3A43_P_2, EVEX_W_0F3A70_P_2,
581 EVEX_W_0F3A72_P_2): Rename to ...
582 (MOD_0F382A, MOD_0F38F5, MOD_VEX_0FD7, MOD_VEX_0FE7,
583 MOD_VEX_0F381A, MOD_VEX_0F382A, MOD_VEX_0F382C, MOD_VEX_0F382D,
584 MOD_VEX_0F382E, MOD_VEX_0F382F, MOD_VEX_0F385A, MOD_VEX_0F388C,
585 MOD_VEX_0F388E, MOD_VEX_0F3A30_L_0_W_0,
586 MOD_VEX_0F3A30_L_0_W_1, MOD_VEX_0F3A31_L_0_W_0,
587 MOD_VEX_0F3A31_L_0_W_1, MOD_VEX_0F3A32_L_0_W_0,
588 MOD_VEX_0F3A32_L_0_W_1, MOD_VEX_0F3A33_L_0_W_0,
589 MOD_VEX_0F3A33_L_0_W_1, MOD_EVEX_0F381A_W_0,
590 MOD_EVEX_0F381A_W_1, MOD_EVEX_0F381B_W_0, MOD_EVEX_0F381B_W_1,
591 MOD_EVEX_0F385A_W_0, MOD_EVEX_0F385A_W_1, MOD_EVEX_0F385B_W_0,
592 MOD_EVEX_0F385B_W_1, VEX_LEN_0F6E, VEX_LEN_0FC4, VEX_LEN_0FC5,
593 VEX_LEN_0FD6, VEX_LEN_0FF7, VEX_LEN_0F3816, VEX_LEN_0F3819,
594 VEX_LEN_0F381A_M_0, VEX_LEN_0F3836, VEX_LEN_0F3841,
595 VEX_LEN_0F385A_M_0, VEX_LEN_0F38DB, VEX_LEN_0F3A00,
596 VEX_LEN_0F3A01, VEX_LEN_0F3A06, VEX_LEN_0F3A14, VEX_LEN_0F3A15,
597 VEX_LEN_0F3A16, VEX_LEN_0F3A17, VEX_LEN_0F3A18, VEX_LEN_0F3A19,
598 VEX_LEN_0F3A20, VEX_LEN_0F3A21, VEX_LEN_0F3A22, VEX_LEN_0F3A30,
599 VEX_LEN_0F3A31, VEX_LEN_0F3A32, VEX_LEN_0F3A33, VEX_LEN_0F3A38,
600 VEX_LEN_0F3A39, VEX_LEN_0F3A41, VEX_LEN_0F3A46, VEX_LEN_0F3A60,
601 VEX_LEN_0F3A61, VEX_LEN_0F3A62, VEX_LEN_0F3A63, VEX_LEN_0F3ADF,
602 EVEX_LEN_0F6E, EVEX_LEN_0FC4, EVEX_LEN_0FC5, EVEX_LEN_0FD6,
603 EVEX_LEN_0F3816, EVEX_LEN_0F3819_W_0, EVEX_LEN_0F3819_W_1,
604 EVEX_LEN_0F381A_W_0_M_0, EVEX_LEN_0F381A_W_1_M_0,
605 EVEX_LEN_0F381B_W_0_M_0, EVEX_LEN_0F381B_W_1_M_0,
606 EVEX_LEN_0F3836, EVEX_LEN_0F385A_W_0_M_0,
607 EVEX_LEN_0F385A_W_1_M_0, EVEX_LEN_0F385B_W_0_M_0,
608 EVEX_LEN_0F385B_W_1_M_0, EVEX_LEN_0F38C6_R_1_M_0,
609 EVEX_LEN_0F38C6_R_2_M_0, EVEX_LEN_0F38C6_R_5_M_0,
610 EVEX_LEN_0F38C6_R_6_M_0, EVEX_LEN_0F38C7_R_1_M_0_W_0,
611 EVEX_LEN_0F38C7_R_1_M_0_W_1, EVEX_LEN_0F38C7_R_2_M_0_W_0,
612 EVEX_LEN_0F38C7_R_2_M_0_W_1, EVEX_LEN_0F38C7_R_5_M_0_W_0,
613 EVEX_LEN_0F38C7_R_5_M_0_W_1, EVEX_LEN_0F38C7_R_6_M_0_W_0,
614 EVEX_LEN_0F38C7_R_6_M_0_W_1, EVEX_LEN_0F3A00_W_1,
615 EVEX_LEN_0F3A01_W_1, EVEX_LEN_0F3A14, EVEX_LEN_0F3A15,
616 EVEX_LEN_0F3A16, EVEX_LEN_0F3A17, EVEX_LEN_0F3A18_W_0,
617 EVEX_LEN_0F3A18_W_1, EVEX_LEN_0F3A19_W_0,
618 EVEX_LEN_0F3A19_W_1, EVEX_LEN_0F3A1A_W_0,
619 EVEX_LEN_0F3A1A_W_1, EVEX_LEN_0F3A1B_W_0,
620 EVEX_LEN_0F3A1B_W_1, EVEX_LEN_0F3A20, EVEX_LEN_0F3A21_W_0,
621 EVEX_LEN_0F3A22, EVEX_LEN_0F3A23_W_0, EVEX_LEN_0F3A23_W_1,
622 EVEX_LEN_0F3A38_W_0, EVEX_LEN_0F3A38_W_1,
623 EVEX_LEN_0F3A39_W_0, EVEX_LEN_0F3A39_W_1,
624 EVEX_LEN_0F3A3A_W_0, EVEX_LEN_0F3A3A_W_1,
625 EVEX_LEN_0F3A3B_W_0, EVEX_LEN_0F3A3B_W_1,
626 EVEX_LEN_0F3A43_W_0, EVEX_LEN_0F3A43_W_1
627 VEX_W_0F380C, VEX_W_0F380D, VEX_W_0F380E, VEX_W_0F380F,
628 VEX_W_0F3813, VEX_W_0F3816_L_1, VEX_W_0F3818,
629 VEX_W_0F3819_L_1, VEX_W_0F381A_M_0_L_1, VEX_W_0F382C_M_0,
630 VEX_W_0F382D_M_0, VEX_W_0F382E_M_0, VEX_W_0F382F_M_0,
631 VEX_W_0F3836, VEX_W_0F3846, VEX_W_0F3858, VEX_W_0F3859,
632 VEX_W_0F385A_M_0_L_0, VEX_W_0F3878, VEX_W_0F3879,
633 VEX_W_0F38CF, VEX_W_0F3A00_L_1, VEX_W_0F3A01_L_1,
634 VEX_W_0F3A02, VEX_W_0F3A04, VEX_W_0F3A05, VEX_W_0F3A06_L_1,
635 VEX_W_0F3A18_L_1, VEX_W_0F3A19_L_1, VEX_W_0F3A1D,
636 VEX_W_0F3A30_L_0, VEX_W_0F3A31_L_0, VEX_W_0F3A32_L_0,
637 VEX_W_0F3A33_L_0, VEX_W_0F3A38_L_1, VEX_W_0F3A39_L_1,
638 VEX_W_0F3A46_L_1, VEX_W_0F3A4A, VEX_W_0F3A4B, VEX_W_0F3A4C,
639 VEX_W_0F3ACE, VEX_W_0F3ACF, EVEX_W_0F66, EVEX_W_0F72_R_2,
640 EVEX_W_0F72_R_6, EVEX_W_0F73_R_2, EVEX_W_0F73_R_6,
641 EVEX_W_0F76, EVEX_W_0FD6_L_0, EVEX_W_0FE7, EVEX_W_0F380D,
642 EVEX_W_0F3819, EVEX_W_0F381A, EVEX_W_0F381B, EVEX_W_0F381E,
643 EVEX_W_0F381F, EVEX_W_0F3837, EVEX_W_0F3859, EVEX_W_0F385A,
644 EVEX_W_0F385B, EVEX_W_0F3870, EVEX_W_0F387A, EVEX_W_0F387B,
645 EVEX_W_0F3883, EVEX_W_0F3891, EVEX_W_0F3893, EVEX_W_0F38A1,
646 EVEX_W_0F38A3, EVEX_W_0F38C7_R_1_M_0,
647 EVEX_W_0F38C7_R_2_M_0, EVEX_W_0F38C7_R_5_M_0,
648 EVEX_W_0F38C7_R_6_M_0, EVEX_W_0F3A00, EVEX_W_0F3A01,
649 EVEX_W_0F3A05, EVEX_W_0F3A08, EVEX_W_0F3A09, EVEX_W_0F3A0A,
650 EVEX_W_0F3A0B, EVEX_W_0F3A18, EVEX_W_0F3A19, EVEX_W_0F3A1A,
651 EVEX_W_0F3A1B, EVEX_W_0F3A21, EVEX_W_0F3A23, EVEX_W_0F3A38,
652 EVEX_W_0F3A39, EVEX_W_0F3A3A, EVEX_W_0F3A3B, EVEX_W_0F3A42,
653 EVEX_W_0F3A43, EVEX_W_0F3A70, EVEX_W_0F3A72): ... these
655 (dis386_twobyte, three_byte_table, vex_table, vex_len_table,
656 vex_w_table, mod_table): Replace / remove respective entries.
657 (print_insn): Move up dp->prefix_requirement handling. Handle
659 * i386-dis-evex.h, i386-dis-evex-len.h, i386-dis-evex-mod.h,
660 i386-dis-evex-prefix.h, i386-dis-evex-reg.h, i386-dis-evex-w.h:
661 Replace / remove respective entries.
663 2020-07-14 Jan Beulich <jbeulich@suse.com>
665 * i386-dis.c (PREFIX_EVEX_0F2C, PREFIX_EVEX_0F2D,
666 PREFIX_EVEX_0F2E, PREFIX_EVEX_0F2F): Delete.
667 (prefix_table): Add EXxEVexS operand to vcvttss2si, vcvttsd2si,
668 vcvtss2si, vcvtsd2si, vucomiss, and vucomisd table entries.
669 Retain X macro and PREFIX_OPCODE use from tjhe EVEX table for
671 * i386-dis-evex.h (evex_table): Reference VEX table for opcodes
672 0F2C, 0F2D, 0F2E, and 0F2F.
673 * i386-dis-evex-prefix.h: Delete opcode 0F2C, 0F2D, 0F2E, and
676 2020-07-14 Jan Beulich <jbeulich@suse.com>
678 * i386-dis.c (OP_VexR, VexScalarR): New.
679 (OP_EX_Vex, OP_XMM_Vex, EXdVexScalarS, EXqVexScalarS,
680 XMVexScalar, d_scalar_swap_mode, q_scalar_swap_mode,
681 need_vex_reg): Delete.
682 (prefix_table): Replace VexScalar by VexScalarR and
683 XMVexScalar by XMScalar for vmovss and vmovsd. Replace
684 EXdVexScalarS by EXdS and EXqVexScalarS by EXqS.
685 (vex_len_table): Replace EXqVexScalarS by EXqS.
686 (get_valid_dis386): Don't set need_vex_reg.
687 (print_insn): Don't initialize need_vex_reg.
688 (intel_operand_size, OP_E_memory): Drop d_scalar_swap_mode and
689 q_scalar_swap_mode cases.
690 (OP_EX): Don't check for d_scalar_swap_mode and
692 (OP_VEX): Done check need_vex_reg.
693 * i386-dis-evex-w.h: Replace VexScalar by VexScalarR and
694 XMVexScalar by XMScalar for vmovss and vmovsd. Replace
695 EXdVexScalarS by EXdS and EXqVexScalarS by EXqS.
697 2020-07-14 Jan Beulich <jbeulich@suse.com>
699 * i386-dis.c (Vex128, Vex256, vex128_mode, vex256_mode): Delete.
700 (VEX_W_0F381A_P_2_M_0, VEX_W_0F385A_P_2_M_0, VEX_W_0F3A06_P_2,
701 VEX_W_0F3A18_P_2, VEX_W_0F3A19_P_2, VEX_W_0F3A38_P_2,
702 VEX_W_0F3A39_P_2, VEX_W_0F3A46_P_2): Rename to ...
703 (VEX_W_0F381A_P_2_M_0_L_0, VEX_W_0F385A_P_2_M_0_L_0,
704 VEX_W_0F3A06_P_2_L_0, VEX_W_0F3A18_P_2_L_0,
705 VEX_W_0F3A19_P_2_L_0, VEX_W_0F3A38_P_2_L_0,
706 VEX_W_0F3A39_P_2_L_0, VEX_W_0F3A46_P_2_L_0): ... respectively.
707 (vex_table): Replace Vex128 by Vex.
708 (vex_len_table): Likewise. Adjust referenced enum names.
709 (vex_w_table): Replace Vex128 and Vex256 by Vex. Adjust
710 referenced enum names.
711 (OP_VEX): Drop vex128_mode and vex256_mode cases.
712 * i386-dis-evex-len.h (evex_len_table): Replace Vex128 by Vex.
714 2020-07-14 Jan Beulich <jbeulich@suse.com>
716 * i386-dis.c (dis386): "LW" description now applies to "DQ".
717 (putop): Handle "DQ". Don't handle "LW" anymore.
718 (prefix_table, mod_table): Replace %LW by %DQ.
719 * i386-dis-evex-len.h, i386-dis-evex-prefix.h: Likewise.
721 2020-07-14 Jan Beulich <jbeulich@suse.com>
723 * i386-dis.c (OP_E_memory): Move xmm_mw_mode, xmm_mb_mode,
724 dqd_mode, xmm_md_mode, d_mode, d_swap_mode, and
725 d_scalar_swap_mode case handling. Move shift adjsutment into
726 the case its applicable to.
728 2020-07-14 Jan Beulich <jbeulich@suse.com>
730 * i386-dis.c (EVEX_W_0F3862_P_2, EVEX_W_0F3863_P_2): Delete.
731 (EXbScalar, EXwScalar): Fold to ...
732 (EXbwUnit): ... this.
733 (b_scalar_mode, w_scalar_mode): Fold to ...
734 (bw_unit_mode): ... this.
735 (intel_operand_size, OP_E_memory): Replace b_scalar_mode /
736 w_scalar_mode handling by bw_unit_mode one.
737 * i386-dis-evex-w.h: Move entries for opcodes 0F3862 and 0F3863
739 * i386-dis-evex-prefix.h: ... here.
741 2020-07-14 Jan Beulich <jbeulich@suse.com>
743 * i386-dis.c (PCMPESTR_Fixup): Delete.
744 (dis386): Adjust "LQ" description.
745 (prefix_table): Make %LQ apply to AT&T case only for cvtsi2ss,
746 cvtsi2sd, ptwrite, vcvtsi2ss, and vcvtsi2sd. Replace use of
747 PCMPESTR_Fixup by !%LQ and EXx for pcmpestrm, pcmpestri,
748 vpcmpestrm, and vpcmpestri.
749 (putop): Honor "cond" when handling LQ.
750 * i386-dis-evex-prefix.h: Make %LQ apply to AT&T case only for
751 vcvtsi2ss and vcvtusi2ss.
752 * i386-dis-evex-w.h: Make %LQ apply to AT&T case only for
753 vcvtsi2sd and vcvtusi2sd.
755 2020-07-14 Jan Beulich <jbeulich@suse.com>
757 * i386-dis.c (VCMP_Fixup, VCMP): Delete.
758 (simd_cmp_op): Add const.
759 (vex_cmp_op): Move up and drop initial 8 entries. Add const.
760 (CMP_Fixup): Handle VEX case.
761 (prefix_table): Replace VCMP by CMP.
762 * i386-dis-evex-prefix.h, i386-dis-evex-w.h: Likewise.
764 2020-07-14 Jan Beulich <jbeulich@suse.com>
766 * i386-dis.c (MOVBE_Fixup): Delete.
768 (prefix_table): Use Mv for movbe entries.
770 2020-07-14 Jan Beulich <jbeulich@suse.com>
772 * i386-dis.c (CRC32_Fixup): Delete.
773 (prefix_table): Use Eb/Ev for crc32 entries.
775 2020-07-14 Jan Beulich <jbeulich@suse.com>
777 * i386-dis.c (OP_E_register, OP_G, OP_REG, CRC32_Fixup):
778 Conditionalize invocations of "USED_REX (0)".
780 2020-07-14 Jan Beulich <jbeulich@suse.com>
782 * i386-dis.c (eBX, eCX, eDX, eSP, eBP, eSI, eDI, DL, BL, AH,
783 CH, DH, BH, AX, DX): Delete.
784 (OP_IMREG): Drop handling of eBX_reg, eCX_reg, eDX_reg, eSP_reg,
785 eBP_reg, eSI_reg, eDI_reg, dl_reg, bl_reg, ah_reg, ch_reg,
786 dh_reg, bh_reg, ax_reg, and dx_reg. Simplify what's left.
788 2020-07-10 Lili Cui <lili.cui@intel.com>
790 * i386-dis.c (TMM): New.
793 (MVexSIBMEM): Likewise.
794 (tmm_mode): Likewise.
795 (vex_sibmem_mode): Likewise.
796 (REG_VEX_0F3849_X86_64_P_0_W_0_M_1): Likewise.
797 (MOD_VEX_0F3849_X86_64_P_0_W_0): Likewise.
798 (MOD_VEX_0F3849_X86_64_P_2_W_0): Likewise.
799 (MOD_VEX_0F3849_X86_64_P_3_W_0): Likewise.
800 (MOD_VEX_0F384B_X86_64_P_1_W_0): Likewise.
801 (MOD_VEX_0F384B_X86_64_P_2_W_0): Likewise.
802 (MOD_VEX_0F384B_X86_64_P_3_W_0): Likewise.
803 (MOD_VEX_0F385C_X86_64_P_1_W_0): Likewise.
804 (MOD_VEX_0F385E_X86_64_P_0_W_0): Likewise.
805 (MOD_VEX_0F385E_X86_64_P_1_W_0): Likewise.
806 (MOD_VEX_0F385E_X86_64_P_2_W_0): Likewise.
807 (MOD_VEX_0F385E_X86_64_P_3_W_0): Likewise.
808 (RM_VEX_0F3849_X86_64_P_0_W_0_M_1_R_0): Likewise.
809 (PREFIX_VEX_0F3849_X86_64): Likewise.
810 (PREFIX_VEX_0F384B_X86_64): Likewise.
811 (PREFIX_VEX_0F385C_X86_64): Likewise.
812 (PREFIX_VEX_0F385E_X86_64): Likewise.
813 (X86_64_VEX_0F3849): Likewise.
814 (X86_64_VEX_0F384B): Likewise.
815 (X86_64_VEX_0F385C): Likewise.
816 (X86_64_VEX_0F385E): Likewise.
817 (VEX_LEN_0F3849_X86_64_P_0_W_0_M_0): Likewise.
818 (VEX_LEN_0F3849_X86_64_P_0_W_0_M_1_REG_0_RM_0): Likewise.
819 (VEX_LEN_0F3849_X86_64_P_2_W_0_M_0): Likewise.
820 (VEX_LEN_0F3849_X86_64_P_3_W_0_M_0): Likewise.
821 (VEX_LEN_0F384B_X86_64_P_1_W_0_M_0): Likewise.
822 (VEX_LEN_0F384B_X86_64_P_2_W_0_M_0): Likewise.
823 (VEX_LEN_0F384B_X86_64_P_3_W_0_M_0): Likewise.
824 (VEX_LEN_0F385C_X86_64_P_1_W_0_M_0): Likewise.
825 (VEX_LEN_0F385E_X86_64_P_0_W_0_M_0): Likewise.
826 (VEX_LEN_0F385E_X86_64_P_1_W_0_M_0): Likewise.
827 (VEX_LEN_0F385E_X86_64_P_2_W_0_M_0): Likewise.
828 (VEX_LEN_0F385E_X86_64_P_3_W_0_M_0): Likewise.
829 (VEX_W_0F3849_X86_64_P_0): Likewise.
830 (VEX_W_0F3849_X86_64_P_2): Likewise.
831 (VEX_W_0F3849_X86_64_P_3): Likewise.
832 (VEX_W_0F384B_X86_64_P_1): Likewise.
833 (VEX_W_0F384B_X86_64_P_2): Likewise.
834 (VEX_W_0F384B_X86_64_P_3): Likewise.
835 (VEX_W_0F385C_X86_64_P_1): Likewise.
836 (VEX_W_0F385E_X86_64_P_0): Likewise.
837 (VEX_W_0F385E_X86_64_P_1): Likewise.
838 (VEX_W_0F385E_X86_64_P_2): Likewise.
839 (VEX_W_0F385E_X86_64_P_3): Likewise.
840 (names_tmm): Likewise.
841 (att_names_tmm): Likewise.
842 (intel_operand_size): Handle void_mode.
843 (OP_XMM): Handle tmm_mode.
846 * i386-gen.c (cpu_flag_init): Add entries for CpuAMX_INT8,
847 CpuAMX_BF16 and CpuAMX_TILE.
848 (operand_type_shorthands): Add RegTMM.
849 (operand_type_init): Likewise.
850 (operand_types): Add Tmmword.
851 (cpu_flag_init): Add CPU_AMX_INT8, CpuAMX_BF16 and CpuAMX_TILE.
852 (cpu_flags): Add CpuAMX_INT8, CpuAMX_BF16 and CpuAMX_TILE.
853 * i386-opc.h (CpuAMX_INT8): New.
854 (CpuAMX_BF16): Likewise.
855 (CpuAMX_TILE): Likewise.
858 (i386_cpu_flags): Add cpuamx_int8, cpuamx_bf16 and cpuamx_tile.
859 (i386_opcode_modifier): Extend width of fields vexvvvv and sib.
860 (i386_operand_type): Add tmmword.
861 * i386-opc.tbl: Add AMX instructions.
862 * i386-reg.tbl: Add AMX registers.
863 * i386-init.h: Regenerated.
864 * i386-tbl.h: Likewise.
866 2020-07-08 Jan Beulich <jbeulich@suse.com>
868 * i386-dis.c (OP_LWPCB_E, OP_LWP_E): Delete.
869 (REG_XOP_LWPCB, REG_XOP_LWP, REG_XOP_TBM_01, REG_XOP_TBM_02):
871 (REG_0FXOP_09_12_M_1_L_0, REG_0FXOP_0A_12_L_0,
872 REG_0FXOP_09_01_L_0, REG_0FXOP_09_02_L_0): ... these
874 (MOD_VEX_0FXOP_09_12, VEX_LEN_0FXOP_08_85, VEX_LEN_0FXOP_08_86,
875 VEX_LEN_0FXOP_08_87, VEX_LEN_0FXOP_08_8E, VEX_LEN_0FXOP_08_8F,
876 VEX_LEN_0FXOP_08_95, VEX_LEN_0FXOP_08_96, VEX_LEN_0FXOP_08_97,
877 VEX_LEN_0FXOP_08_9E, VEX_LEN_0FXOP_08_9F, VEX_LEN_0FXOP_08_A3,
878 VEX_LEN_0FXOP_08_A6, VEX_LEN_0FXOP_08_B6, VEX_LEN_0FXOP_08_C0,
879 VEX_LEN_0FXOP_08_C1, VEX_LEN_0FXOP_08_C2, VEX_LEN_0FXOP_08_C3,
880 VEX_LEN_0FXOP_09_01, VEX_LEN_0FXOP_09_02, VEX_LEN_0FXOP_09_12_M_1,
881 VEX_LEN_0FXOP_09_90, VEX_LEN_0FXOP_09_91, VEX_LEN_0FXOP_09_92,
882 VEX_LEN_0FXOP_09_93, VEX_LEN_0FXOP_09_94, VEX_LEN_0FXOP_09_95,
883 VEX_LEN_0FXOP_09_96, VEX_LEN_0FXOP_09_97, VEX_LEN_0FXOP_09_98,
884 VEX_LEN_0FXOP_09_99, VEX_LEN_0FXOP_09_9A, VEX_LEN_0FXOP_09_9B,
885 VEX_LEN_0FXOP_09_C1, VEX_LEN_0FXOP_09_C2, VEX_LEN_0FXOP_09_C3,
886 VEX_LEN_0FXOP_09_C6, VEX_LEN_0FXOP_09_C7, VEX_LEN_0FXOP_09_CB,
887 VEX_LEN_0FXOP_09_D1, VEX_LEN_0FXOP_09_D2, VEX_LEN_0FXOP_09_D3,
888 VEX_LEN_0FXOP_09_D6, VEX_LEN_0FXOP_09_D7, VEX_LEN_0FXOP_09_DB,
889 VEX_LEN_0FXOP_09_E1, VEX_LEN_0FXOP_09_E2, VEX_LEN_0FXOP_09_E3,
890 VEX_LEN_0FXOP_0A_12, VEX_W_0FXOP_08_85_L_0,
891 VEX_W_0FXOP_08_86_L_0, VEX_W_0FXOP_08_87_L_0,
892 VEX_W_0FXOP_08_8E_L_0, VEX_W_0FXOP_08_8F_L_0,
893 VEX_W_0FXOP_08_95_L_0, VEX_W_0FXOP_08_96_L_0,
894 VEX_W_0FXOP_08_97_L_0, VEX_W_0FXOP_08_9E_L_0,
895 VEX_W_0FXOP_08_9F_L_0, VEX_W_0FXOP_08_A6_L_0,
896 VEX_W_0FXOP_08_B6_L_0, VEX_W_0FXOP_08_C0_L_0,
897 VEX_W_0FXOP_08_C1_L_0, VEX_W_0FXOP_08_C2_L_0,
898 VEX_W_0FXOP_08_C3_L_0, VEX_W_0FXOP_08_CC_L_0,
899 VEX_W_0FXOP_08_CD_L_0, VEX_W_0FXOP_08_CE_L_0,
900 VEX_W_0FXOP_08_CF_L_0, VEX_W_0FXOP_08_EC_L_0,
901 VEX_W_0FXOP_08_ED_L_0, VEX_W_0FXOP_08_EE_L_0,
902 VEX_W_0FXOP_08_EF_L_0, VEX_W_0FXOP_09_C1_L_0,
903 VEX_W_0FXOP_09_C2_L_0, VEX_W_0FXOP_09_C3_L_0,
904 VEX_W_0FXOP_09_C6_L_0, VEX_W_0FXOP_09_C7_L_0,
905 VEX_W_0FXOP_09_CB_L_0, VEX_W_0FXOP_09_D1_L_0,
906 VEX_W_0FXOP_09_D2_L_0, VEX_W_0FXOP_09_D3_L_0,
907 VEX_W_0FXOP_09_D6_L_0, VEX_W_0FXOP_09_D7_L_0,
908 VEX_W_0FXOP_09_DB_L_0, VEX_W_0FXOP_09_E1_L_0,
909 VEX_W_0FXOP_09_E2_L_0, VEX_W_0FXOP_09_E3_L_0): New enumerators.
910 (reg_table): Re-order XOP entries. Adjust their operands.
911 (xop_table): Replace 08_85, 08_86, 08_87, 08_8E, 08_8F, 08_95,
912 08_96, 08_97, 08_9E, 08_9F, 08_A3, 08_A6, 08_B6, 08_C0, 08_C1,
913 08_C2, 08_C3, 09_01, 09_02, 09_12, 09_90, 09_91, 09_92, 09_93,
914 09_94, 09_95, 09_96, 09_97, 09_98, 09_99, 09_9A, 09_9B, 09_C1,
915 09_C2, 09_C3, 09_C6, 09_C7, 09_CB, 09_D1, 09_D2, 09_D3, 09_D6,
916 09_D7, 09_DB, 09_E1, 09_E2, 09_E3, and VEX_LEN_0FXOP_0A_12
917 entries by references ...
918 (vex_len_table): ... to resepctive new entries here. For several
919 new and existing entries reference ...
920 (vex_w_table): ... new entries here.
921 (mod_table): New MOD_VEX_0FXOP_09_12 entry.
923 2020-07-08 Jan Beulich <jbeulich@suse.com>
925 * i386-dis.c (XMVexScalarI4): Define.
926 (VEX_LEN_0F3A6A_P_2, VEX_LEN_0F3A6B_P_2, VEX_LEN_0F3A6E_P_2,
927 VEX_LEN_0F3A6F_P_2, VEX_LEN_0F3A7A_P_2, VEX_LEN_0F3A7B_P_2,
928 VEX_LEN_0F3A7E_P_2, VEX_LEN_0F3A7F_P_2): Delete.
929 (vex_len_table): Move scalar FMA4 entries ...
930 (prefix_table): ... here.
931 (OP_REG_VexI4): Handle scalar_mode.
932 * i386-opc.tbl: Use VexLIG for scalar FMA4 insns.
933 * i386-tbl.h: Re-generate.
935 2020-07-08 Jan Beulich <jbeulich@suse.com>
937 * i386-dis.c (OP_Vex_2src_1, OP_Vex_2src_2, Vex_2src_1,
939 (OP_VexW, VexW): New.
940 (xop_table): Use EXx for rotates by immediate. Use EXx and VexW
941 for shifts and rotates by register.
943 2020-07-08 Jan Beulich <jbeulich@suse.com>
945 * i386-dis.c (OP_EX_VexImmW, OP_XMM_VexW, EXVexImmW, XMVexW,
946 VEX_W_0F3A48_P_2, VEX_W_0F3A49_P_2, vex_w_done, get_vex_imm8,
947 OP_EX_VexReg): Delete.
948 (OP_VexI4, VexI4): New.
949 (vex_w_table): Move vpermil2ps and vpermil2pd entries ...
950 (prefix_table): ... here.
951 (print_insn): Drop setting of vex_w_done.
953 2020-07-08 Jan Beulich <jbeulich@suse.com>
955 * i386-dis.c (OP_EX_VexW, EXVexW, EXdVexW, EXqVexW): Delete.
956 (prefix_table, vex_len_table): Replace operands for FMA4 insns.
957 (xop_table): Replace operands of 4-operand insns.
958 (OP_REG_VexI4): Move VEX.W based operand swaping here.
960 2020-07-07 Claudiu Zissulescu <claziss@synopsys.com>
962 * arc-opc.c (insert_rbd): New function.
965 * arc-tbl.h (vadd2, vadd4h, vmac2h, vmpy2h, vsub4h): Update
968 2020-07-07 Jan Beulich <jbeulich@suse.com>
970 * i386-dis.c (EVEX_W_0F3826_P_1, EVEX_W_0F3826_P_2,
971 EVEX_W_0F3828_P_1, EVEX_W_0F3829_P_1, EVEX_W_0F3854_P_2,
972 EVEX_W_0F3866_P_2, EVEX_W_0F3875_P_2, EVEX_W_0F387D_P_2,
973 EVEX_W_0F388D_P_2, EVEX_W_0F3A3E_P_2, EVEX_W_0F3A3F_P_2):
975 (putop): Handle "BW".
976 * i386-dis-evex-w.h: Move entries for opcodes 0F3826, 0F3826,
977 0F3828, 0F3829, 0F3854, 0F3866, 0F3875, 0F387D, 0F388D, 0F3A3E,
979 * i386-dis-evex-prefix.h: ... here.
981 2020-07-06 Jan Beulich <jbeulich@suse.com>
983 * i386-dis.c (VEX_LEN_0FXOP_09_80, VEX_LEN_0FXOP_09_81): Delete.
984 (VEX_LEN_0FXOP_09_82_W_0, VEX_LEN_0FXOP_09_83_W_0,
985 VEX_W_0FXOP_09_80, VEX_W_0FXOP_09_81, VEX_W_0FXOP_09_82,
986 VEX_W_0FXOP_09_83): New enumerators.
987 (xop_table): Reference the above.
988 (vex_len_table): Replace vfrczp* entries by vfrczs* ones.
989 (vex_w_table): New VEX_W_0FXOP_09_80, VEX_W_0FXOP_09_81,
990 VEX_W_0FXOP_09_82, and VEX_W_0FXOP_09_83 entries.
991 (get_valid_dis386): Return bad_opcode for XOP.PP != 0.
993 2020-07-06 Jan Beulich <jbeulich@suse.com>
995 * i386-dis.c (EVEX_W_0F3838_P_1,
996 EVEX_W_0F3839_P_1, EVEX_W_0F3840_P_2, EVEX_W_0F3855_P_2,
997 EVEX_W_0F3868_P_3, EVEX_W_0F3871_P_2, EVEX_W_0F3873_P_2,
998 EVEX_W_0F3A50_P_2, EVEX_W_0F3A51_P_2, EVEX_W_0F3A56_P_2,
999 EVEX_W_0F3A57_P_2, EVEX_W_0F3A66_P_2, EVEX_W_0F3A67_P_2,
1000 EVEX_W_0F3A71_P_2, EVEX_W_0F3A73_P_2): Delete.
1001 (putop): Centralize management of last[]. Delete SAVE_LAST.
1002 * i386-dis-evex-w.h: Move entries for opcodes 0F3838, 0F3839,
1003 0F3840, 0F3855, 0F3868, 0F3871, 0F3873, 0F3A50, 0F3A51, 0F3A56,
1004 0F3A57, 0F3A66, 0F3A67, 0F3A71, and 0F3A73 ...
1005 * i386-dis-evex-prefix.h: here.
1007 2020-07-06 Jan Beulich <jbeulich@suse.com>
1009 * i386-dis.c (MOD_EVEX_0F381A_P_2_W_0, MOD_EVEX_0F381A_P_2_W_1,
1010 MOD_EVEX_0F381B_P_2_W_0, MOD_EVEX_0F381B_P_2_W_1,
1011 MOD_EVEX_0F385A_P_2_W_0, MOD_EVEX_0F385A_P_2_W_1,
1012 MOD_EVEX_0F385B_P_2_W_0, MOD_EVEX_0F385B_P_2_W_1): New
1014 (EVEX_LEN_0F381A_P_2_W_0, EVEX_LEN_0F381A_P_2_W_1,
1015 EVEX_LEN_0F381B_P_2_W_0, EVEX_LEN_0F381B_P_2_W_1,
1016 EVEX_LEN_0F385A_P_2_W_0, EVEX_LEN_0F385A_P_2_W_1,
1017 EVEX_LEN_0F385B_P_2_W_0, EVEX_LEN_0F385B_P_2_W_1): Rename to ...
1018 (EVEX_LEN_0F381A_P_2_W_0_M_0, EVEX_LEN_0F381A_P_2_W_1_M_0,
1019 EVEX_LEN_0F381B_P_2_W_0_M_0, EVEX_LEN_0F381B_P_2_W_1_M_0,
1020 EVEX_LEN_0F385A_P_2_W_0_M_0, EVEX_LEN_0F385A_P_2_W_1_M_0,
1021 EVEX_LEN_0F385B_P_2_W_0_M_0, EVEX_LEN_0F385B_P_2_W_1_M_0): ...
1022 these, respectively.
1023 * i386-dis-evex-len.h: Adjust comments.
1024 * i386-dis-evex-mod.h: New MOD_EVEX_0F381A_P_2_W_0,
1025 MOD_EVEX_0F381A_P_2_W_1, MOD_EVEX_0F381B_P_2_W_0,
1026 MOD_EVEX_0F381B_P_2_W_1, MOD_EVEX_0F385A_P_2_W_0,
1027 MOD_EVEX_0F385A_P_2_W_1, MOD_EVEX_0F385B_P_2_W_0, and
1028 MOD_EVEX_0F385B_P_2_W_1 table entries.
1029 * i386-dis-evex-w.h: Reference mod_table[] for
1030 EVEX_W_0F381A_P_2, EVEX_W_0F381B_P_2, EVEX_W_0F385A_P_2, and
1033 2020-07-06 Jan Beulich <jbeulich@suse.com>
1035 * i386-dis-evex-len.h (vbroadcastf32x8, vbroadcasti32x8,
1036 vinsertf32x8, vinsertf64x4, vextractf32x8, vextractf64x4): Use
1038 (vinserti32x8, vinserti64x4, vextracti32x8, vextracti64x4):
1039 Likewise. Mark 256-bit entries invalid.
1041 2020-07-06 Jan Beulich <jbeulich@suse.com>
1043 * i386-dis.c (PREFIX_EVEX_0F62, PREFIX_EVEX_0F6A,
1044 PREFIX_EVEX_0F6B, PREFIX_EVEX_0F6C, PREFIX_EVEX_0F6D,
1045 PREFIX_EVEX_0FD2, PREFIX_EVEX_0FD3, PREFIX_EVEX_0FD4,
1046 PREFIX_EVEX_0FF2, PREFIX_EVEX_0FF3, PREFIX_EVEX_0FF4,
1047 PREFIX_EVEX_0FFA, PREFIX_EVEX_0FFB, PREFIX_EVEX_0FFE,
1048 PREFIX_EVEX_0F382B): Delete.
1049 (EVEX_W_0F62_P_2, EVEX_W_0F6A_P_2, EVEX_W_0F6B_P_2,
1050 EVEX_W_0F6C_P_2, EVEX_W_0F6D_P_2, EVEX_W_0FD2_P_2,
1051 EVEX_W_0FD3_P_2, EVEX_W_0FD4_P_2, EVEX_W_0FF2_P_2,
1052 EVEX_W_0FF3_P_2, EVEX_W_0FF4_P_2, EVEX_W_0FFA_P_2,
1053 EVEX_W_0FFB_P_2, EVEX_W_0FFE_P_2, EVEX_W_0F382B_P_2): Rename
1055 (EVEX_W_0F62, EVEX_W_0F6A, EVEX_W_0F6B, EVEX_W_0F6C,
1056 EVEX_W_0F6D, EVEX_W_0FD2, EVEX_W_0FD3, EVEX_W_0FD4,
1057 EVEX_W_0FF2, EVEX_W_0FF3, EVEX_W_0FF4, EVEX_W_0FFA,
1058 EVEX_W_0FFB, EVEX_W_0FFE, EVEX_W_0F382B): ... these
1060 * i386-dis-evex.h (evex_table): Reference VEX_W table entries
1061 for opcodes 0F62, 0F6A, 0F6B, 0F6C, 0F6D, 0FD2, 0FD3, 0FD4,
1062 0FF2, 0FF3, 0FF4, 0FFA, 0FFB, 0FFE, 0F382B.
1063 * i386-dis-evex-prefix.h (PREFIX_EVEX_0F62, PREFIX_EVEX_0F6A,
1064 PREFIX_EVEX_0F6B, PREFIX_EVEX_0F6C, PREFIX_EVEX_0F6D,
1065 PREFIX_EVEX_0FD2, PREFIX_EVEX_0FD3, PREFIX_EVEX_0FD4,
1066 PREFIX_EVEX_0FF2, PREFIX_EVEX_0FF3, PREFIX_EVEX_0FF4,
1067 PREFIX_EVEX_0FFA, PREFIX_EVEX_0FFB, PREFIX_EVEX_0FFE,
1068 PREFIX_EVEX_0F382B): Remove table entries.
1069 * i386-dis-evex-w.h: Reference VEX table entries for opcodes
1070 0F62, 0F6A, 0F6B, 0F6C, 0F6D, 0FD2, 0FD3, 0FD4, 0FF2, 0FF3,
1071 0FF4, 0FFA, 0FFB, 0FFE, 0F382B.
1073 2020-07-06 Jan Beulich <jbeulich@suse.com>
1075 * i386-dis.c (EVEX_LEN_0F3816_P_2, EVEX_LEN_0F3836_P_2,
1076 EVEX_LEN_0F3A00_P_2_W_1, EVEX_LEN_0F3A01_P_2_W_1): New
1078 * i386-dis-evex-len.h (evex_len_table): New EVEX_LEN_0F3816_P_2,
1079 EVEX_LEN_0F3836_P_2, EVEX_LEN_0F3A00_P_2_W_1, and
1080 EVEX_LEN_0F3A01_P_2_W_1 table entries.
1081 * i386-dis-evex-prefix.h, i386-dis-evex-w.h: Reference the above
1084 2020-07-06 Jan Beulich <jbeulich@suse.com>
1086 * i386-dis.c (EVEX_LEN_0FC4_P_2, EVEX_LEN_0FC5_P_2,
1087 EVEX_LEN_0F3A14_P_2, EVEX_LEN_0F3A15_P_2, EVEX_LEN_0F3A16_P_2,
1088 EVEX_LEN_0F3A17_P_2, EVEX_LEN_0F3A20_P_2,
1089 EVEX_LEN_0F3A21_P_2_W_0, EVEX_LEN_0F3A22_P_2): New enumerators.
1090 * i386-dis-evex-len.h (evex_len_table): New EVEX_LEN_0FC4_P_2,
1091 EVEX_LEN_0FC5_P_2, EVEX_LEN_0F3A14_P_2, EVEX_LEN_0F3A15_P_2,
1092 EVEX_LEN_0F3A16_P_2, EVEX_LEN_0F3A17_P_2, EVEX_LEN_0F3A20_P_2,
1093 EVEX_LEN_0F3A21_P_2_W_0, and EVEX_LEN_0F3A22_P_2 table entries.
1094 * i386-dis-evex-prefix.h, i386-dis-evex-w.h: Reference the above
1097 2020-07-06 Jan Beulich <jbeulich@suse.com>
1099 * i386-dis.c (PREFIX_EVEX_0F3A1D, EVEX_W_0F3A1D_P_2): Delete.
1100 (VEX_W_0F3813_P_2, VEX_W_0F3A1D_P_2): New enumerators.
1101 (prefix_table): Reference VEX_W_0F3813_P_2 and VEX_W_0F3A1D_P_2
1103 (vex_w_table): New VEX_W_0F3813_P_2 and VEX_W_0F3A1D_P_2 table
1105 * i386-dis-evex.h (evex_table): Reference VEX table entry for
1107 * i386-dis-evex-prefix.h (PREFIX_EVEX_0F3A1D): Delete table
1109 * i386-dis-evex-w.h (EVEX_W_0F3A1D_P_2): Likewise.
1111 2020-07-06 Jan Beulich <jbeulich@suse.com>
1113 * i386-dis.c (PREFIX_EVEX_0F60, PREFIX_EVEX_0F61,
1114 PREFIX_EVEX_0F63, PREFIX_EVEX_0F67, PREFIX_EVEX_0F68,
1115 PREFIX_EVEX_0F69, PREFIX_EVEX_0FD1, PREFIX_EVEX_0FD5,
1116 PREFIX_EVEX_0FD8, PREFIX_EVEX_0FD9, PREFIX_EVEX_0FDA,
1117 PREFIX_EVEX_0FDC, PREFIX_EVEX_0FDD, PREFIX_EVEX_0FDE,
1118 PREFIX_EVEX_0FE0, PREFIX_EVEX_0FE1, PREFIX_EVEX_0FE3,
1119 PREFIX_EVEX_0FE4, PREFIX_EVEX_0FE5, PREFIX_EVEX_0FE8,
1120 PREFIX_EVEX_0FE9, PREFIX_EVEX_0FEA, PREFIX_EVEX_0FEC,
1121 PREFIX_EVEX_0FED, PREFIX_EVEX_0FEE, PREFIX_EVEX_0FF1,
1122 PREFIX_EVEX_0FF5, PREFIX_EVEX_0FF6, PREFIX_EVEX_0FF8,
1123 PREFIX_EVEX_0FF9, PREFIX_EVEX_0FFC, PREFIX_EVEX_0FFD,
1124 PREFIX_EVEX_0F3800, PREFIX_EVEX_0F3804, PREFIX_EVEX_0F380B,
1125 PREFIX_EVEX_0F380C, PREFIX_EVEX_0F3818, PREFIX_EVEX_0F381C,
1126 PREFIX_EVEX_0F381D, PREFIX_EVEX_0F383C, PREFIX_EVEX_0F383E,
1127 PREFIX_EVEX_0F3858, PREFIX_EVEX_0F3878, PREFIX_EVEX_0F3879,
1128 PREFIX_EVEX_0F3896, PREFIX_EVEX_0F3897, PREFIX_EVEX_0F3898,
1129 PREFIX_EVEX_0F3899, PREFIX_EVEX_0F389C, PREFIX_EVEX_0F389D,
1130 PREFIX_EVEX_0F389E, PREFIX_EVEX_0F389F, PREFIX_EVEX_0F38A6,
1131 PREFIX_EVEX_0F38A7, PREFIX_EVEX_0F38A8, PREFIX_EVEX_0F38A9,
1132 PREFIX_EVEX_0F38AC, PREFIX_EVEX_0F38AD, PREFIX_EVEX_0F38AE,
1133 PREFIX_EVEX_0F38AF, PREFIX_EVEX_0F38B6, PREFIX_EVEX_0F38B7,
1134 PREFIX_EVEX_0F38B8, PREFIX_EVEX_0F38B9, PREFIX_EVEX_0F38BA,
1135 PREFIX_EVEX_0F38BB, PREFIX_EVEX_0F38BC, PREFIX_EVEX_0F38BD,
1136 PREFIX_EVEX_0F38BE, PREFIX_EVEX_0F38BF, PREFIX_EVEX_0F38CF,
1137 PREFIX_EVEX_0F38DC, PREFIX_EVEX_0F38DD, PREFIX_EVEX_0F38DE,
1138 PREFIX_EVEX_0F38DF, PREFIX_EVEX_0F3A04, PREFIX_EVEX_0F3A0F,
1139 PREFIX_EVEX_0F3A44, PREFIX_EVEX_0F3ACE, PREFIX_EVEX_0F3ACF,
1140 EVEX_W_0F380C_P_2, EVEX_W_0F3818_P_2, EVEX_W_0F3858_P_2,
1141 EVEX_W_0F3878_P_2, EVEX_W_0F3879_P_2, EVEX_W_0F3A04_P_2,
1142 EVEX_W_0F3ACE_P_2, EVEX_W_0F3ACF_P_2): Delete.
1143 (prefix_table): Add EXxEVexR to FMA table entries.
1144 (OP_Rounding): Move abort() invocation.
1145 * i386-dis-evex.h (evex_table): Reference VEX table for opcodes
1146 0F60, 0F61, 0F63, 0F67, 0F68, 0F69, 0FD1, 0FD5, 0FD8, 0FD9,
1147 0FDA, 0FDC, 0FDD, 0FDE, 0FE0, 0FE1, 0FE3, 0FE4, 0FE5, 0FE8,
1148 0FE9, 0FEA, 0FEC, 0FED, 0FEE, 0FF1, 0FF5, 0FF6, 0FF8, 0FF9,
1149 0FFC, 0FFD, 0F3800, 0F3804, 0F380B, 0F380C, 0F3818, 0F381C,
1150 0F381D, 0F383C, 0F383E, 0F3858, 0F3878, 0F3879, 0F3896, 0F3897,
1151 0F3898, 0F3899, 0F389C, 0F389D, 0F389E, 0F389F, 0F38A6, 0F38A7,
1152 0F38A8, 0F38A9, 0F38AC, 0F38AD, 0F38AE, 0F38AF, 0F38B6, 0F38B7,
1153 0F38B8, 0F38B9, 0F38BA, 0F38BB, 0F38BC, 0F38BD, 0F38BE, 0F38BF,
1154 0F38CF, 0F38DC, 0F38DD, 0F38DE, 0F38DF, 0F3A04, 0F3A0F, 0F3A44,
1156 * i386-dis-evex-prefix.h (PREFIX_EVEX_0F60, PREFIX_EVEX_0F61,
1157 PREFIX_EVEX_0F63, PREFIX_EVEX_0F67, PREFIX_EVEX_0F68,
1158 PREFIX_EVEX_0F69, PREFIX_EVEX_0FD1, PREFIX_EVEX_0FD5,
1159 PREFIX_EVEX_0FD8, PREFIX_EVEX_0FD9, PREFIX_EVEX_0FDA,
1160 PREFIX_EVEX_0FDC, PREFIX_EVEX_0FDD, PREFIX_EVEX_0FDE,
1161 PREFIX_EVEX_0FE0, PREFIX_EVEX_0FE1, PREFIX_EVEX_0FE3,
1162 PREFIX_EVEX_0FE4, PREFIX_EVEX_0FE5, PREFIX_EVEX_0FE8,
1163 PREFIX_EVEX_0FE9, PREFIX_EVEX_0FEA, PREFIX_EVEX_0FEC,
1164 PREFIX_EVEX_0FED, PREFIX_EVEX_0FEE, PREFIX_EVEX_0FF1,
1165 PREFIX_EVEX_0FF5, PREFIX_EVEX_0FF6, PREFIX_EVEX_0FF8,
1166 PREFIX_EVEX_0FF9, PREFIX_EVEX_0FFC, PREFIX_EVEX_0FFD,
1167 PREFIX_EVEX_0F3800, PREFIX_EVEX_0F3804, PREFIX_EVEX_0F380B,
1168 PREFIX_EVEX_0F380C, PREFIX_EVEX_0F3818, PREFIX_EVEX_0F381C,
1169 PREFIX_EVEX_0F381D, PREFIX_EVEX_0F383C, PREFIX_EVEX_0F383E,
1170 PREFIX_EVEX_0F3858, PREFIX_EVEX_0F3878, PREFIX_EVEX_0F3879,
1171 PREFIX_EVEX_0F3896, PREFIX_EVEX_0F3897, PREFIX_EVEX_0F3898,
1172 PREFIX_EVEX_0F3899, PREFIX_EVEX_0F389C, PREFIX_EVEX_0F389D,
1173 PREFIX_EVEX_0F389E, PREFIX_EVEX_0F389F, PREFIX_EVEX_0F38A6,
1174 PREFIX_EVEX_0F38A7, PREFIX_EVEX_0F38A8, PREFIX_EVEX_0F38A9,
1175 PREFIX_EVEX_0F38AC, PREFIX_EVEX_0F38AD, PREFIX_EVEX_0F38AE,
1176 PREFIX_EVEX_0F38AF, PREFIX_EVEX_0F38B6, PREFIX_EVEX_0F38B7,
1177 PREFIX_EVEX_0F38B8, PREFIX_EVEX_0F38B9, PREFIX_EVEX_0F38BA,
1178 PREFIX_EVEX_0F38BB, PREFIX_EVEX_0F38BC, PREFIX_EVEX_0F38BD,
1179 PREFIX_EVEX_0F38BE, PREFIX_EVEX_0F38BF, PREFIX_EVEX_0F38CF,
1180 PREFIX_EVEX_0F38DC, PREFIX_EVEX_0F38DD, PREFIX_EVEX_0F38DE,
1181 PREFIX_EVEX_0F38DF, PREFIX_EVEX_0F3A04, PREFIX_EVEX_0F3A0F,
1182 PREFIX_EVEX_0F3A44, PREFIX_EVEX_0F3ACE, PREFIX_EVEX_0F3ACF):
1183 Delete table entries.
1184 * i386-dis-evex-w.h (EVEX_W_0F380C_P_2, EVEX_W_0F3818_P_2,
1185 EVEX_W_0F3858_P_2, EVEX_W_0F3878_P_2, EVEX_W_0F3879_P_2,
1186 EVEX_W_0F3A04_P_2, EVEX_W_0F3ACE_P_2, EVEX_W_0F3ACF_P_2):
1189 2020-07-06 Jan Beulich <jbeulich@suse.com>
1191 * i386-dis.c (EXqScalarS): Delete.
1192 (vex_len_table): Replace EXqScalarS by EXqVexScalarS.
1193 * i386-dis-evex-w.h (vmovq): Use EXqVexScalarS.
1195 2020-07-06 Jan Beulich <jbeulich@suse.com>
1197 * i386-dis.c (safe-ctype.h): Include.
1198 (EXdScalar, EXqScalar): Delete.
1199 (d_scalar_mode, q_scalar_mode): Delete.
1200 (prefix_table, vex_len_table): Use EXxmm_md in place of
1201 EXdScalar and EXxmm_mq in place of EXqScalar.
1202 (intel_operand_size, OP_E_memory, OP_EX): Remove uses of
1203 d_scalar_mode and q_scalar_mode.
1204 * i386-dis-evex-w.h (vmovss): Use EXxmm_md.
1205 (vmovsd): Use EXxmm_mq.
1207 2020-07-06 Yuri Chornoivan <yurchor@ukr.net>
1210 * arc-dis.c: Fix spelling mistake.
1211 * po/opcodes.pot: Regenerate.
1213 2020-07-06 Nick Clifton <nickc@redhat.com>
1215 * po/pt_BR.po: Updated Brazilian Portugugese translation.
1216 * po/uk.po: Updated Ukranian translation.
1218 2020-07-04 Nick Clifton <nickc@redhat.com>
1220 * configure: Regenerate.
1221 * po/opcodes.pot: Regenerate.
1223 2020-07-04 Nick Clifton <nickc@redhat.com>
1225 Binutils 2.35 branch created.
1227 2020-07-02 H.J. Lu <hongjiu.lu@intel.com>
1229 * i386-gen.c (opcode_modifiers): Add VexSwapSources.
1230 * i386-opc.h (VexSwapSources): New.
1231 (i386_opcode_modifier): Add vexswapsources.
1232 * i386-opc.tbl: Add VexSwapSources to BMI2 and BMI instructions
1233 with two source operands swapped.
1234 * i386-tbl.h: Regenerated.
1236 2020-06-30 Nelson Chu <nelson.chu@sifive.com>
1238 * riscv-dis.c (print_insn_args, case 'E'): Updated. Let the
1239 unprivileged CSR can also be initialized.
1241 2020-06-29 Alan Modra <amodra@gmail.com>
1243 * arm-dis.c: Use C style comments.
1244 * cr16-opc.c: Likewise.
1245 * ft32-dis.c: Likewise.
1246 * moxie-opc.c: Likewise.
1247 * tic54x-dis.c: Likewise.
1248 * s12z-opc.c: Remove useless comment.
1249 * xgate-dis.c: Likewise.
1251 2020-06-26 H.J. Lu <hongjiu.lu@intel.com>
1253 * i386-opc.tbl: Add a blank line.
1255 2020-06-26 H.J. Lu <hongjiu.lu@intel.com>
1257 * i386-gen.c (opcode_modifiers): Replace VecSIB with SIB.
1258 (VecSIB128): Renamed to ...
1260 (VecSIB256): Renamed to ...
1262 (VecSIB512): Renamed to ...
1264 (VecSIB): Renamed to ...
1266 (i386_opcode_modifier): Replace vecsib with sib.
1267 * i386-opc.tbl (VecSIB128): New.
1268 (VecSIB256): Likewise.
1269 (VecSIB512): Likewise.
1270 Replace VecSIB=1, VecSIB=2 and VecSIB=3 with VecSIB128, VecSIB256
1271 and VecSIB512, respectively.
1273 2020-06-26 Jan Beulich <jbeulich@suse.com>
1275 * i386-dis.c: Adjust description of I macro.
1276 (x86_64_table): Drop use of I.
1277 (float_mem): Replace use of I.
1278 (putop): Remove handling of I. Adjust setting/clearing of "alt".
1280 2020-06-26 Jan Beulich <jbeulich@suse.com>
1282 * i386-dis.c: (print_insn): Avoid straight assignment to
1283 priv.orig_sizeflag when processing -M sub-options.
1285 2020-06-25 Jan Beulich <jbeulich@suse.com>
1287 * i386-dis.c: Adjust description of J macro.
1288 (dis386, x86_64_table, mod_table): Replace J.
1289 (putop): Remove handling of J.
1291 2020-06-25 Jan Beulich <jbeulich@suse.com>
1293 * i386-dis.c: (float_mem): Reduce alternatives for fstpt and fldpt.
1295 2020-06-25 Jan Beulich <jbeulich@suse.com>
1297 * i386-dis.c: Adjust description of "LQ" macro.
1298 (dis386_twobyte): Use LQ for sysret.
1299 (putop): Adjust handling of LQ.
1301 2020-06-22 Nelson Chu <nelson.chu@sifive.com>
1303 * riscv-opc.c: Move the structures and functions to bfd/elfxx-riscv.c.
1304 * riscv-dis.c: Include elfxx-riscv.h.
1306 2020-06-18 H.J. Lu <hongjiu.lu@intel.com>
1308 * i386-dis.c (prefix_table): Revert the last vmgexit change.
1310 2020-06-17 Lili Cui <lili.cui@intel.com>
1312 * i386-dis.c (prefix_table): Delete the incorrect vmgexit.
1314 2020-06-14 H.J. Lu <hongjiu.lu@intel.com>
1317 * i386-dis.c (prefix_table): Replace xsuspldtrk with xsusldtrk.
1318 * i386-opc.tbl: Likewise.
1319 * i386-tbl.h: Regenerated.
1321 2020-06-12 Nelson Chu <nelson.chu@sifive.com>
1323 * riscv-opc.c (priv_specs): Remove v1.9 and PRIV_SPEC_CLASS_1P9.
1325 2020-06-11 Alex Coplan <alex.coplan@arm.com>
1327 * aarch64-opc.c (SYSREG): New macro for describing system registers.
1328 (SR_CORE): Likewise.
1329 (SR_FEAT): Likewise.
1331 (SR_V8_1): Likewise.
1332 (SR_V8_2): Likewise.
1333 (SR_V8_3): Likewise.
1334 (SR_V8_4): Likewise.
1337 (SR_SSBS): Likewise.
1339 (SR_ID_PFR2): Likewise.
1340 (SR_PROFILE): Likewise.
1341 (SR_MEMTAG): Likewise.
1342 (SR_SCXTNUM): Likewise.
1343 (aarch64_sys_regs): Refactor to store feature information in the table.
1344 (aarch64_sys_reg_supported_p): Collapse logic for system registers
1345 that now describe their own features.
1346 (aarch64_pstatefield_supported_p): Likewise.
1348 2020-06-09 H.J. Lu <hongjiu.lu@intel.com>
1350 * i386-dis.c (prefix_table): Fix a typo in comments.
1352 2020-06-09 Jan Beulich <jbeulich@suse.com>
1354 * i386-dis.c (rex_ignored): Delete.
1355 (ckprefix): Drop rex_ignored initialization.
1356 (get_valid_dis386): Drop setting of rex_ignored.
1357 (print_insn): Drop checking of rex_ignored. Don't record data
1358 size prefix as used with VEX-and-alike encodings.
1360 2020-06-09 Jan Beulich <jbeulich@suse.com>
1362 * i386-dis.c (MOD_0F12_PREFIX_2, MOD_0F16_PREFIX_2,
1363 MOD_VEX_0F12_PREFIX_2, MOD_VEX_0F16_PREFIX_2): New enumerators.
1364 (VEX_LEN_0F12_P_2, VEX_LEN_0F16_P_2): Delete.
1365 (VEX_LEN_0F12_P_2_M_0, VEX_LEN_0F16_P_2_M_0): Define.
1366 (prefix_table): Decode MOD for cases 2 of opcodes 0F12, 0F16,
1367 VEX_0F12, and VEX_0F16.
1368 (vex_len_table): Use X for vmovlp* and vmovh*s. Drop
1369 VEX_LEN_0F12_P_2 and VEX_LEN_0F16_P_2 entries.
1370 (mod_table): Use X for movlpX and movhpX. Drop PREFIX_OPCODE
1371 from movlps and movhlps. New MOD_0F12_PREFIX_2,
1372 MOD_0F16_PREFIX_2, MOD_VEX_0F12_PREFIX_2, and
1373 MOD_VEX_0F16_PREFIX_2 entries.
1375 2020-06-09 Jan Beulich <jbeulich@suse.com>
1377 * i386-dis.c (MOD_EVEX_0F12_PREFIX_2, MOD_EVEX_0F13,
1378 MOD_EVEX_0F16_PREFIX_2, MOD_EVEX_0F17, MOD_EVEX_0F2B): New enumerators.
1379 (PREFIX_EVEX_0F13, PREFIX_EVEX_0F14, PREFIX_EVEX_0F15,
1380 PREFIX_EVEX_0F17, PREFIX_EVEX_0F28, PREFIX_EVEX_0F29,
1381 PREFIX_EVEX_0F2B, PREFIX_EVEX_0F54, PREFIX_EVEX_0F55,
1382 PREFIX_EVEX_0F56, PREFIX_EVEX_0F57, PREFIX_EVEX_0FC6,
1383 EVEX_W_0F10_P_0, EVEX_W_0F10_P_2, EVEX_W_0F11_P_0,
1384 EVEX_W_0F11_P_2, EVEX_W_0F12_P_0_M_0, EVEX_W_0F12_P_2,
1385 EVEX_W_0F13_P_0, EVEX_W_0F13_P_2, EVEX_W_0F14_P_0,
1386 EVEX_W_0F14_P_2, EVEX_W_0F15_P_0, EVEX_W_0F15_P_2,
1387 EVEX_W_0F16_P_0_M_0, EVEX_W_0F16_P_2, EVEX_W_0F17_P_0,
1388 EVEX_W_0F17_P_2, EVEX_W_0F28_P_0, EVEX_W_0F28_P_2,
1389 EVEX_W_0F29_P_0, EVEX_W_0F29_P_2, EVEX_W_0F2B_P_0,
1390 EVEX_W_0F2B_P_2, EVEX_W_0F2E_P_0, EVEX_W_0F2E_P_2,
1391 EVEX_W_0F2F_P_0, EVEX_W_0F2F_P_2, EVEX_W_0F51_P_0,
1392 EVEX_W_0F51_P_2, EVEX_W_0F54_P_0, EVEX_W_0F54_P_2,
1393 EVEX_W_0F55_P_0, EVEX_W_0F55_P_2, EVEX_W_0F56_P_0,
1394 EVEX_W_0F56_P_2, EVEX_W_0F57_P_0, EVEX_W_0F57_P_2,
1395 EVEX_W_0F58_P_0, EVEX_W_0F58_P_2, EVEX_W_0F59_P_0,
1396 EVEX_W_0F59_P_2, EVEX_W_0F5C_P_0, EVEX_W_0F5C_P_2,
1397 EVEX_W_0F5D_P_0, EVEX_W_0F5D_P_2, EVEX_W_0F5E_P_0,
1398 EVEX_W_0F5E_P_2, EVEX_W_0F5F_P_0, EVEX_W_0F5F_P_2,
1399 EVEX_W_0FC2_P_0, EVEX_W_0FC2_P_2, EVEX_W_0FC6_P_0,
1400 EVEX_W_0FC6_P_2): Delete.
1401 (print_insn): Add EVEX.W vs embedded prefix consistency check
1402 to prefix validation.
1403 * i386-dis-evex.h (evex_table): Don't further descend for
1404 vunpcklpX, vunpckhpX, vmovapX, vandpX, vandnpX, vorpX, vxorpX,
1405 and vshufpX. Continue with MOD decoding for opcodes 0F13, 0F17,
1407 * i386-dis-evex-mod.h: Add/adjust vmovlpX/vmovhpX entries.
1408 * i386-dis-evex-prefix.h: Don't further descend for vmovupX,
1409 vucomisX, vcomisX, vsqrtpX, vaddpX, vmulpX, vsubpX, vminpX,
1410 vdivpX, vmaxpX, and vcmppX. Continue with MOD decoding for cases
1411 2 of PREFIX_EVEX_0F12, PREFIX_EVEX_0F16, and PREFIX_EVEX_0F29.
1412 Drop PREFIX_EVEX_0F13, PREFIX_EVEX_0F14, PREFIX_EVEX_0F15,
1413 PREFIX_EVEX_0F17, PREFIX_EVEX_0F28, PREFIX_EVEX_0F2B,
1414 PREFIX_EVEX_0F54, PREFIX_EVEX_0F55, PREFIX_EVEX_0F56,
1415 PREFIX_EVEX_0F57, and PREFIX_EVEX_0FC6 entries.
1416 * i386-dis-evex-w.h: Drop EVEX_W_0F10_P_0, EVEX_W_0F10_P_2,
1417 EVEX_W_0F11_P_0, EVEX_W_0F11_P_2, EVEX_W_0F12_P_0_M_0,
1418 EVEX_W_0F12_P_2, EVEX_W_0F12_P_3, EVEX_W_0F13_P_0,
1419 EVEX_W_0F13_P_2, EVEX_W_0F14_P_0, EVEX_W_0F14_P_2,
1420 EVEX_W_0F15_P_0, EVEX_W_0F15_P_2, EVEX_W_0F16_P_0_M_0,
1421 EVEX_W_0F16_P_2, EVEX_W_0F17_P_0, EVEX_W_0F17_P_2,
1422 EVEX_W_0F28_P_0, EVEX_W_0F28_P_2, EVEX_W_0F29_P_0,
1423 EVEX_W_0F29_P_2, EVEX_W_0F2B_P_0, EVEX_W_0F2B_P_2,
1424 EVEX_W_0F2E_P_0, EVEX_W_0F2E_P_2, EVEX_W_0F2F_P_0,
1425 EVEX_W_0F2F_P_2, EVEX_W_0F51_P_0, EVEX_W_0F51_P_2,
1426 EVEX_W_0F54_P_0, EVEX_W_0F54_P_2, EVEX_W_0F55_P_0,
1427 EVEX_W_0F55_P_2, EVEX_W_0F56_P_0, EVEX_W_0F56_P_2,
1428 EVEX_W_0F57_P_0, EVEX_W_0F57_P_2, EVEX_W_0F58_P_0,
1429 EVEX_W_0F58_P_2, EVEX_W_0F59_P_0, EVEX_W_0F59_P_2,
1430 EVEX_W_0F5C_P_0, EVEX_W_0F5C_P_2, EVEX_W_0F5D_P_0,
1431 EVEX_W_0F5D_P_2, EVEX_W_0F5E_P_0, EVEX_W_0F5E_P_2,
1432 EVEX_W_0F5F_P_0, EVEX_W_0F5F_P_2, EVEX_W_0FC2_P_0,
1433 EVEX_W_0FC2_P_2, EVEX_W_0FC6_P_0, and EVEX_W_0FC6_P_2 entries.
1435 2020-06-09 Jan Beulich <jbeulich@suse.com>
1437 * i386-dis.c (vex_table): Use PREFIX_OPCODE for vunpcklpX,
1438 vunpckhpX, vmovapX, vandpX, vandnpX, vorpX, vxorpX and vshufpX.
1439 (vex_len_table) : Likewise for vmovlpX, vmovhpX, vmovntpX, and
1441 (print_insn): Drop pointless check against bad_opcode. Split
1442 prefix validation into legacy and VEX-and-alike parts.
1443 (putop): Re-work 'X' macro handling.
1445 2020-06-09 Jan Beulich <jbeulich@suse.com>
1447 * i386-dis.c (MOD_0F51): Rename to ...
1448 (MOD_0F50): ... this.
1450 2020-06-08 Alex Coplan <alex.coplan@arm.com>
1452 * arm-dis.c (arm_opcodes): Add dfb.
1453 (thumb32_opcodes): Add dfb.
1455 2020-06-08 Jan Beulich <jbeulich@suse.com>
1457 * i386-opc.h (reg_entry): Const-qualify reg_name field.
1459 2020-06-06 Alan Modra <amodra@gmail.com>
1461 * ppc-dis.c (ppc_opts): Accept -mpwr10/-Mpwr10.
1463 2020-06-05 Alan Modra <amodra@gmail.com>
1465 * cgen-dis.c (hash_insn_array): Increase size of buf. Assert
1466 size is large enough.
1468 2020-06-04 Jose E. Marchesi <jose.marchesi@oracle.com>
1470 * disassemble.c (disassemble_init_for_target): Set endian_code for
1472 * bpf-desc.c: Regenerate.
1473 * bpf-opc.c: Likewise.
1474 * bpf-dis.c: Likewise.
1476 2020-06-03 Jose E. Marchesi <jose.marchesi@oracle.com>
1478 * cgen-opc.c (cgen_get_insn_value): Get an `endian' argument.
1479 (cgen_put_insn_value): Likewise.
1480 (cgen_lookup_insn): Pass endianness to cgen_{get,put}_insn_value.
1481 * cgen-dis.in (print_insn): Likewise.
1482 * cgen-ibld.in (insert_1): Likewise.
1483 (insert_1): Likewise.
1484 (insert_insn_normal): Likewise.
1485 (extract_1): Likewise.
1486 * bpf-dis.c: Regenerate.
1487 * bpf-ibld.c: Likewise.
1488 * bpf-ibld.c: Likewise.
1489 * cgen-dis.in: Likewise.
1490 * cgen-ibld.in: Likewise.
1491 * cgen-opc.c: Likewise.
1492 * epiphany-dis.c: Likewise.
1493 * epiphany-ibld.c: Likewise.
1494 * fr30-dis.c: Likewise.
1495 * fr30-ibld.c: Likewise.
1496 * frv-dis.c: Likewise.
1497 * frv-ibld.c: Likewise.
1498 * ip2k-dis.c: Likewise.
1499 * ip2k-ibld.c: Likewise.
1500 * iq2000-dis.c: Likewise.
1501 * iq2000-ibld.c: Likewise.
1502 * lm32-dis.c: Likewise.
1503 * lm32-ibld.c: Likewise.
1504 * m32c-dis.c: Likewise.
1505 * m32c-ibld.c: Likewise.
1506 * m32r-dis.c: Likewise.
1507 * m32r-ibld.c: Likewise.
1508 * mep-dis.c: Likewise.
1509 * mep-ibld.c: Likewise.
1510 * mt-dis.c: Likewise.
1511 * mt-ibld.c: Likewise.
1512 * or1k-dis.c: Likewise.
1513 * or1k-ibld.c: Likewise.
1514 * xc16x-dis.c: Likewise.
1515 * xc16x-ibld.c: Likewise.
1516 * xstormy16-dis.c: Likewise.
1517 * xstormy16-ibld.c: Likewise.
1519 2020-06-04 Jose E. Marchesi <jemarch@gnu.org>
1521 * cgen-dis.in (cpu_desc_list): New field `insn_endian'.
1522 (print_insn_): Handle instruction endian.
1523 * bpf-dis.c: Regenerate.
1524 * bpf-desc.c: Regenerate.
1525 * epiphany-dis.c: Likewise.
1526 * epiphany-desc.c: Likewise.
1527 * fr30-dis.c: Likewise.
1528 * fr30-desc.c: Likewise.
1529 * frv-dis.c: Likewise.
1530 * frv-desc.c: Likewise.
1531 * ip2k-dis.c: Likewise.
1532 * ip2k-desc.c: Likewise.
1533 * iq2000-dis.c: Likewise.
1534 * iq2000-desc.c: Likewise.
1535 * lm32-dis.c: Likewise.
1536 * lm32-desc.c: Likewise.
1537 * m32c-dis.c: Likewise.
1538 * m32c-desc.c: Likewise.
1539 * m32r-dis.c: Likewise.
1540 * m32r-desc.c: Likewise.
1541 * mep-dis.c: Likewise.
1542 * mep-desc.c: Likewise.
1543 * mt-dis.c: Likewise.
1544 * mt-desc.c: Likewise.
1545 * or1k-dis.c: Likewise.
1546 * or1k-desc.c: Likewise.
1547 * xc16x-dis.c: Likewise.
1548 * xc16x-desc.c: Likewise.
1549 * xstormy16-dis.c: Likewise.
1550 * xstormy16-desc.c: Likewise.
1552 2020-06-03 Nick Clifton <nickc@redhat.com>
1554 * po/sr.po: Updated Serbian translation.
1556 2020-06-03 Nelson Chu <nelson.chu@sifive.com>
1558 * riscv-opc.c (riscv_get_isa_spec_class): Change bfd_boolean to int.
1559 (riscv_get_priv_spec_class): Likewise.
1561 2020-06-01 Alan Modra <amodra@gmail.com>
1563 * bpf-desc.c: Regenerate.
1565 2020-05-28 Jose E. Marchesi <jose.marchesi@oracle.com>
1566 David Faust <david.faust@oracle.com>
1568 * bpf-desc.c: Regenerate.
1569 * bpf-opc.h: Likewise.
1570 * bpf-opc.c: Likewise.
1571 * bpf-dis.c: Likewise.
1573 2020-05-28 Alan Modra <amodra@gmail.com>
1575 * nios2-dis.c (nios2_print_insn_arg): Avoid shift left of negative
1578 2020-05-28 Alan Modra <amodra@gmail.com>
1580 * ns32k-dis.c (print_insn_arg): Handle d value of 'f' for
1582 (print_insn_ns32k): Revert last change.
1584 2020-05-28 Nick Clifton <nickc@redhat.com>
1586 * ns32k-dis.c (print_insn_ns32k): Change the arg_bufs array to
1589 2020-05-26 Sandra Loosemore <sandra@codesourcery.com>
1591 Fix extraction of signed constants in nios2 disassembler (again).
1593 * nios2-dis.c (nios2_print_insn_arg): Add explicit casts to
1594 extractions of signed fields.
1596 2020-05-26 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
1598 * s390-opc.txt: Relocate vector load/store instructions with
1599 additional alignment parameter and change architecture level
1600 constraint from z14 to z13.
1602 2020-05-21 Alan Modra <amodra@gmail.com>
1604 * arc-ext.c: Replace "if (x) free (x)" with "free (x)" throughout.
1605 * sparc-dis.c: Likewise.
1606 * tic4x-dis.c: Likewise.
1607 * xtensa-dis.c: Likewise.
1608 * bpf-desc.c: Regenerate.
1609 * epiphany-desc.c: Regenerate.
1610 * fr30-desc.c: Regenerate.
1611 * frv-desc.c: Regenerate.
1612 * ip2k-desc.c: Regenerate.
1613 * iq2000-desc.c: Regenerate.
1614 * lm32-desc.c: Regenerate.
1615 * m32c-desc.c: Regenerate.
1616 * m32r-desc.c: Regenerate.
1617 * mep-asm.c: Regenerate.
1618 * mep-desc.c: Regenerate.
1619 * mt-desc.c: Regenerate.
1620 * or1k-desc.c: Regenerate.
1621 * xc16x-desc.c: Regenerate.
1622 * xstormy16-desc.c: Regenerate.
1624 2020-05-20 Nelson Chu <nelson.chu@sifive.com>
1626 * riscv-opc.c (riscv_ext_version_table): The table used to store
1627 all information about the supported spec and the corresponding ISA
1628 versions. Currently, only Zicsr is supported to verify the
1629 correctness of Z sub extension settings. Others will be supported
1630 in the future patches.
1631 (struct isa_spec_t, isa_specs): List for all supported ISA spec
1632 classes and the corresponding strings.
1633 (riscv_get_isa_spec_class): New function. Get the corresponding ISA
1634 spec class by giving a ISA spec string.
1635 * riscv-opc.c (struct priv_spec_t): New structure.
1636 (struct priv_spec_t priv_specs): List for all supported privilege spec
1637 classes and the corresponding strings.
1638 (riscv_get_priv_spec_class): New function. Get the corresponding
1639 privilege spec class by giving a spec string.
1640 (riscv_get_priv_spec_name): New function. Get the corresponding
1641 privilege spec string by giving a CSR version class.
1642 * riscv-dis.c: Updated since DECLARE_CSR is changed.
1643 * riscv-dis.c: Add new disassembler option -Mpriv-spec to dump the CSR
1644 according to the chosen version. Build a hash table riscv_csr_hash to
1645 store the valid CSR for the chosen pirv verison. Dump the direct
1646 CSR address rather than it's name if it is invalid.
1647 (parse_riscv_dis_option_without_args): New function. Parse the options
1649 (parse_riscv_dis_option): Call parse_riscv_dis_option_without_args to
1650 parse the options without arguments first, and then handle the options
1651 with arguments. Add the new option -Mpriv-spec, which has argument.
1652 * riscv-dis.c (print_riscv_disassembler_options): Add description
1653 about the new OBJDUMP option.
1655 2020-05-19 Peter Bergner <bergner@linux.ibm.com>
1657 * ppc-opc.c (insert_ls, extract_ls): Handle 3-bit L fields and new
1658 WC values on POWER10 sync, dcbf and wait instructions.
1659 (insert_pl, extract_pl): New functions.
1660 (L2OPT, LS, WC): Use insert_ls and extract_ls.
1661 (LS3): New , 3-bit L for sync.
1662 (LS3, L3OPT): New, 3-bit L for sync and dcbf.
1663 (SC2, PL): New, 2-bit SC and PL for sync and wait.
1664 (XWCPL_MASK, XL3RT_MASK, XSYNCLS_MASK): New instruction masks.
1665 (XOPL3, XWCPL, XSYNCLS): New opcode macros.
1666 (powerpc_opcodes) <dcbflp, dcbfps, dcbstps pause_short, phwsync,
1667 plwsync, stcisync, stncisync, stsync, waitrsv>: New extended mnemonics.
1668 <wait>: Enable PL operand on POWER10.
1669 <dcbf>: Enable L3OPT operand on POWER10.
1670 <sync>: Enable SC2 operand on POWER10.
1672 2020-05-19 Stafford Horne <shorne@gmail.com>
1675 * or1k-asm.c: Regenerate.
1676 * or1k-desc.c: Regenerate.
1677 * or1k-desc.h: Regenerate.
1678 * or1k-dis.c: Regenerate.
1679 * or1k-ibld.c: Regenerate.
1680 * or1k-opc.c: Regenerate.
1681 * or1k-opc.h: Regenerate.
1682 * or1k-opinst.c: Regenerate.
1684 2020-05-11 Alan Modra <amodra@gmail.com>
1686 * ppc-opc (powerpc_opcodes): Add xscmpeqqp, xscmpgeqp, xscmpgtqp,
1689 2020-05-11 Alan Modra <amodra@gmail.com>
1691 * ppc-opc.c (powerpc_opcodes): Add lxvrbx, lxvrhx, lxvrwx, lxvrdx,
1692 stxvrbx, stxvrhx, stxvrwx, stxvrdx.
1694 2020-05-11 Alan Modra <amodra@gmail.com>
1696 * ppc-opc.c (powerpc_opcodes): Add xvtlsbb.
1698 2020-05-11 Alan Modra <amodra@gmail.com>
1700 * ppc-opc.c (powerpc_opcodes): Add vstribl, vstribr, vstrihl, vstrihr,
1701 vclrlb, vclrrb, vstribl., vstribr., vstrihl., vstrihr..
1703 2020-05-11 Peter Bergner <bergner@linux.ibm.com>
1705 * ppc-opc.c (powerpc_opcodes) <setbc, setbcr, setnbc, setnbcr>: New
1708 2020-05-11 Alan Modra <amodra@gmail.com>
1710 * ppc-opc.c (UIM8, P_U8XX4_MASK): Define.
1711 (powerpc_opcodes): Add vgnb, vcfuged, vpextd, vpdepd, vclzdm,
1712 vctzdm, cntlzdm, pdepd, pextd, cfuged, cnttzdm.
1713 (prefix_opcodes): Add xxeval.
1715 2020-05-11 Alan Modra <amodra@gmail.com>
1717 * ppc-opc.c (powerpc_opcodes): Add xxgenpcvbm, xxgenpcvhm,
1718 xxgenpcvwm, xxgenpcvdm.
1720 2020-05-11 Alan Modra <amodra@gmail.com>
1722 * ppc-opc.c (MP, VXVAM_MASK): Define.
1723 (VXVAPS_MASK): Use VXVA_MASK.
1724 (powerpc_opcodes): Add mtvsrbmi, vexpandbm, vexpandhm, vexpandwm,
1725 vexpanddm, vexpandqm, vextractbm, vextracthm, vextractwm,
1726 vextractdm, vextractqm, mtvsrbm, mtvsrhm, mtvsrwm, mtvsrdm, mtvsrqm,
1727 vcntmbb, vcntmbh, vcntmbw, vcntmbd.
1729 2020-05-11 Alan Modra <amodra@gmail.com>
1730 Peter Bergner <bergner@linux.ibm.com>
1732 * ppc-opc.c (insert_xa6a, extract_xa6a, insert_xb6a, extract_xb6a):
1734 (powerpc_operands): Define ACC, PMSK8, PMSK4, PMSK2, XMSK, YMSK,
1735 YMSK2, XA6a, XA6ap, XB6a entries.
1736 (PMMIRR, P_X_MASK, P_XX1_MASK, P_GER_MASK): Define
1737 (P_GER2_MASK, P_GER4_MASK, P_GER8_MASK, P_GER64_MASK): Define.
1739 (powerpc_opcodes): Add xxmfacc, xxmtacc, xxsetaccz,
1740 xvi8ger4pp, xvi8ger4, xvf16ger2pp, xvf16ger2, xvf32gerpp, xvf32ger,
1741 xvi4ger8pp, xvi4ger8, xvi16ger2spp, xvi16ger2s, xvbf16ger2pp,
1742 xvbf16ger2, xvf64gerpp, xvf64ger, xvi16ger2, xvf16ger2np,
1743 xvf32gernp, xvi8ger4spp, xvi16ger2pp, xvbf16ger2np, xvf64gernp,
1744 xvf16ger2pn, xvf32gerpn, xvbf16ger2pn, xvf64gerpn, xvf16ger2nn,
1745 xvf32gernn, xvbf16ger2nn, xvf64gernn, xvcvbf16sp, xvcvspbf16.
1746 (prefix_opcodes): Add pmxvi8ger4pp, pmxvi8ger4, pmxvf16ger2pp,
1747 pmxvf16ger2, pmxvf32gerpp, pmxvf32ger, pmxvi4ger8pp, pmxvi4ger8,
1748 pmxvi16ger2spp, pmxvi16ger2s, pmxvbf16ger2pp, pmxvbf16ger2,
1749 pmxvf64gerpp, pmxvf64ger, pmxvi16ger2, pmxvf16ger2np, pmxvf32gernp,
1750 pmxvi8ger4spp, pmxvi16ger2pp, pmxvbf16ger2np, pmxvf64gernp,
1751 pmxvf16ger2pn, pmxvf32gerpn, pmxvbf16ger2pn, pmxvf64gerpn,
1752 pmxvf16ger2nn, pmxvf32gernn, pmxvbf16ger2nn, pmxvf64gernn.
1754 2020-05-11 Alan Modra <amodra@gmail.com>
1756 * ppc-opc.c (insert_imm32, extract_imm32): New functions.
1757 (insert_xts, extract_xts): New functions.
1758 (IMM32, UIM3, IX, UIM5, SH3, XTS, P8RR): Define.
1759 (P_XX4_MASK, P_UXX4_MASK, VSOP, P_VS_MASK, P_VSI_MASK): Define.
1760 (VXRC_MASK, VXSH_MASK): Define.
1761 (powerpc_opcodes): Add vinsbvlx, vsldbi, vextdubvlx, vextdubvrx,
1762 vextduhvlx, vextduhvrx, vextduwvlx, vextduwvrx, vextddvlx,
1763 vextddvrx, vinshvlx, vinswvlx, vinsw, vinsbvrx, vinshvrx,
1764 vinswvrx, vinsd, vinsblx, vsrdbi, vinshlx, vinswlx, vinsdlx,
1765 vinsbrx, vinshrx, vinswrx, vinsdrx, lxvkq.
1766 (prefix_opcodes): Add xxsplti32dx, xxspltidp, xxspltiw, xxblendvb,
1767 xxblendvh, xxblendvw, xxblendvd, xxpermx.
1769 2020-05-11 Alan Modra <amodra@gmail.com>
1771 * ppc-opc.c (powerpc_opcodes): Add vrlq, vdivuq, vmsumcud, vrlqmi,
1772 vmuloud, vcmpuq, vslq, vdivsq, vcmpsq, vrlqnm, vcmpequq, vmulosd,
1773 vsrq, vdiveuq, vcmpgtuq, vmuleud, vsraq, vdivesq, vcmpgtsq, vmulesd,
1774 vcmpequq., vextsd2q, vmoduq, vcmpgtuq., vmodsq, vcmpgtsq., xscvqpuqz,
1775 xscvuqqp, xscvqpsqz, xscvsqqp, dcffixqq, dctfixqq.
1777 2020-05-11 Alan Modra <amodra@gmail.com>
1779 * ppc-opc.c (insert_xtp, extract_xtp): New functions.
1780 (XTP, DQXP, DQXP_MASK): Define.
1781 (powerpc_opcodes): Add lxvp, stxvp, lxvpx, stxvpx.
1782 (prefix_opcodes): Add plxvp and pstxvp.
1784 2020-05-11 Alan Modra <amodra@gmail.com>
1786 * ppc-opc.c (powerpc_opcodes): Add vdivuw, vdivud, vdivsw, vmulld,
1787 vdivsd, vmulhuw, vdiveuw, vmulhud, vdiveud, vmulhsw, vdivesw,
1788 vmulhsd, vdivesd, vmoduw, vmodud, vmodsw, vmodsd.
1790 2020-05-11 Peter Bergner <bergner@linux.ibm.com>
1792 * ppc-opc.c (powerpc_opcodes) <brd, brh, brw>: New mnemonics.
1794 2020-05-11 Peter Bergner <bergner@linux.ibm.com>
1796 * ppc-opc.c (insert_l1opt, extract_l1opt): New functions.
1798 (powerpc_opcodes) <paste.>: Add L operand for cpu POWER10.
1800 2020-05-11 Peter Bergner <bergner@linux.ibm.com>
1802 * ppc-opc.c (powerpc_opcodes) <slbiag>: Add variant with L operand.
1804 2020-05-11 Alan Modra <amodra@gmail.com>
1806 * ppc-dis.c (powerpc_init_dialect): Default to "power10".
1808 2020-05-11 Alan Modra <amodra@gmail.com>
1810 * ppc-dis.c (ppc_opts): Add "power10" entry.
1811 (print_insn_powerpc): Update for PPC_OPCODE_POWER10 renaming.
1812 * ppc-opc.c (POWER10): Rename from POWERXX. Update all uses.
1814 2020-05-11 Nick Clifton <nickc@redhat.com>
1816 * po/fr.po: Updated French translation.
1818 2020-04-30 Alex Coplan <alex.coplan@arm.com>
1820 * aarch64-opc.h (enum aarch64_field_kind): Add FLD_imm16_2.
1821 * aarch64-opc.c (fields): Add entry for FLD_imm16_2.
1822 (operand_general_constraint_met_p): validate
1823 AARCH64_OPND_UNDEFINED.
1824 * aarch64-tbl.h (aarch64_opcode_table): Add udf instruction, entry
1826 * aarch64-asm-2.c: Regenerated.
1827 * aarch64-dis-2.c: Regenerated.
1828 * aarch64-opc-2.c: Regenerated.
1830 2020-04-29 Nick Clifton <nickc@redhat.com>
1833 * sh-opc.h: Also use unsigned 8-bit immediate values for the LDRC
1836 2020-04-29 Nick Clifton <nickc@redhat.com>
1838 * po/sv.po: Updated Swedish translation.
1840 2020-04-29 Nick Clifton <nickc@redhat.com>
1843 * sh-opc.h (IMM0_8): Replace with IMM0_8S and IMM0_8U. Use
1844 IMM0_8S for arithmetic insns and IMM0_8U for logical insns.
1845 * sh-dis.c (print_insn_sh): Change IMM0_8 case to IMM0_8S and add
1848 2020-04-21 Andreas Schwab <schwab@linux-m68k.org>
1851 * m68k-opc.c (m68k_opcodes): Allow pc-rel for second operand of
1852 cmpi only on m68020up and cpu32.
1854 2020-04-20 Sudakshina Das <sudi.das@arm.com>
1856 * aarch64-asm.c (aarch64_ins_none): New.
1857 * aarch64-asm.h (ins_none): New declaration.
1858 * aarch64-dis.c (aarch64_ext_none): New.
1859 * aarch64-dis.h (ext_none): New declaration.
1860 * aarch64-opc.c (aarch64_print_operand): Update case for
1861 AARCH64_OPND_BARRIER_PSB.
1862 * aarch64-tbl.h (aarch64_opcode_table): Add tsb.
1863 (AARCH64_OPERANDS): Update inserter/extracter for
1864 AARCH64_OPND_BARRIER_PSB to use new dummy functions.
1865 * aarch64-asm-2.c: Regenerated.
1866 * aarch64-dis-2.c: Regenerated.
1867 * aarch64-opc-2.c: Regenerated.
1869 2020-04-20 Sudakshina Das <sudi.das@arm.com>
1871 * aarch64-tbl.h (aarch64_feature_bti, BTI, BTI_INSN): Remove.
1872 (aarch64_feature_ras, RAS): Likewise.
1873 (aarch64_feature_stat_profile, STAT_PROFILE): Likewise.
1874 (aarch64_opcode_table): Update bti, xpaclri, pacia1716, pacib1716,
1875 autia1716, autib1716, esb, psb, dgh, paciaz, paciasp, pacibz, pacibsp,
1876 autiaz, autiasp, autibz, autibsp to be CORE_INSN.
1877 * aarch64-asm-2.c: Regenerated.
1878 * aarch64-dis-2.c: Regenerated.
1879 * aarch64-opc-2.c: Regenerated.
1881 2020-04-17 Fredrik Strupe <fredrik@strupe.net>
1883 * arm-dis.c (neon_opcodes): Fix VDUP instruction masks.
1884 (print_insn_neon): Support disassembly of conditional
1887 2020-02-16 David Faust <david.faust@oracle.com>
1889 * bpf-desc.c: Regenerate.
1890 * bpf-desc.h: Likewise.
1891 * bpf-opc.c: Regenerate.
1892 * bpf-opc.h: Likewise.
1894 2020-04-07 Lili Cui <lili.cui@intel.com>
1896 * i386-dis.c (enum): Add PREFIX_0F01_REG_5_MOD_3_RM_1,
1897 (prefix_table): New instructions (see prefixes above).
1898 (rm_table): Likewise
1899 * i386-gen.c (cpu_flag_init): Add CPU_TSXLDTRK_FLAGS,
1900 CPU_ANY_TSXLDTRK_FLAGS.
1901 (cpu_flags): Add CpuTSXLDTRK.
1902 * i386-opc.h (enum): Add CpuTSXLDTRK.
1903 (i386_cpu_flags): Add cputsxldtrk.
1904 * i386-opc.tbl: Add XSUSPLDTRK insns.
1905 * i386-init.h: Regenerate.
1906 * i386-tbl.h: Likewise.
1908 2020-04-02 Lili Cui <lili.cui@intel.com>
1910 * i386-dis.c (prefix_table): New instructions serialize.
1911 * i386-gen.c (cpu_flag_init): Add CPU_SERIALIZE_FLAGS,
1912 CPU_ANY_SERIALIZE_FLAGS.
1913 (cpu_flags): Add CpuSERIALIZE.
1914 * i386-opc.h (enum): Add CpuSERIALIZE.
1915 (i386_cpu_flags): Add cpuserialize.
1916 * i386-opc.tbl: Add SERIALIZE insns.
1917 * i386-init.h: Regenerate.
1918 * i386-tbl.h: Likewise.
1920 2020-03-26 Alan Modra <amodra@gmail.com>
1922 * disassemble.h (opcodes_assert): Declare.
1923 (OPCODES_ASSERT): Define.
1924 * disassemble.c: Don't include assert.h. Include opintl.h.
1925 (opcodes_assert): New function.
1926 * h8300-dis.c (bfd_h8_disassemble_init): Use OPCODES_ASSERT.
1927 (bfd_h8_disassemble): Reduce size of data array. Correctly
1928 calculate maxlen. Omit insn decoding when insn length exceeds
1929 maxlen. Exit from nibble loop when looking for E, before
1930 accessing next data byte. Move processing of E outside loop.
1931 Replace tests of maxlen in loop with assertions.
1933 2020-03-26 Alan Modra <amodra@gmail.com>
1935 * arc-dis.c (find_format): Init needs_limm. Simplify use of limm.
1937 2020-03-25 Alan Modra <amodra@gmail.com>
1939 * z80-dis.c (suffix): Init mybuf.
1941 2020-03-22 Alan Modra <amodra@gmail.com>
1943 * h8300-dis.c (bfd_h8_disassemble): Limit data[] access to that
1944 successflly read from section.
1946 2020-03-22 Alan Modra <amodra@gmail.com>
1948 * arc-dis.c (find_format): Use ISO C string concatenation rather
1949 than line continuation within a string. Don't access needs_limm
1950 before testing opcode != NULL.
1952 2020-03-22 Alan Modra <amodra@gmail.com>
1954 * ns32k-dis.c (print_insn_arg): Update comment.
1955 (print_insn_ns32k): Reduce size of index_offset array, and
1956 initialize, passing -1 to print_insn_arg for args that are not
1957 an index. Don't exit arg loop early. Abort on bad arg number.
1959 2020-03-22 Alan Modra <amodra@gmail.com>
1961 * s12z-dis.c (abstract_read_memory): Don't print error on EOI.
1962 * s12z-opc.c: Formatting.
1963 (operands_f): Return an int.
1964 (opr_n_bytes_p1): Return -1 on reaching buffer memory limit.
1965 (opr_n_bytes2, bfextins_n_bytes, mul_n_bytes, bm_n_bytes),
1966 (shift_n_bytes, mov_imm_opr_n_bytes, loop_prim_n_bytes),
1967 (exg_sex_discrim): Likewise.
1968 (create_immediate_operand, create_bitfield_operand),
1969 (create_register_operand_with_size, create_register_all_operand),
1970 (create_register_all16_operand, create_simple_memory_operand),
1971 (create_memory_operand, create_memory_auto_operand): Don't
1972 segfault on malloc failure.
1973 (z_ext24_decode): Return an int status, negative on fail, zero
1975 (x_imm1, imm1_decode, trap_decode, z_opr_decode, z_opr_decode2),
1976 (imm1234, reg_s_imm, reg_s_opr, z_imm1234_8base, z_imm1234_0base),
1977 (z_tfr, z_reg, reg_xy, lea_reg_xys_opr, lea_reg_xys, rel_15_7),
1978 (decode_rel_15_7, cmp_xy, sub_d6_x_y, sub_d6_y_x),
1979 (ld_18bit_decode, mul_decode, bm_decode, bm_rel_decode),
1980 (mov_imm_opr, ld_18bit_decode, exg_sex_decode),
1981 (loop_primitive_decode, shift_decode, psh_pul_decode),
1982 (bit_field_decode): Similarly.
1983 (z_decode_signed_value, decode_signed_value): Similarly. Add arg
1984 to return value, update callers.
1985 (x_opr_decode_with_size): Check all reads, returning NULL on fail.
1986 Don't segfault on NULL operand.
1987 (decode_operation): Return OP_INVALID on first fail.
1988 (decode_s12z): Check all reads, returning -1 on fail.
1990 2020-03-20 Alan Modra <amodra@gmail.com>
1992 * metag-dis.c (print_insn_metag): Don't ignore status from
1995 2020-03-20 Alan Modra <amodra@gmail.com>
1997 * nds32-dis.c (print_insn_nds32): Remove unnecessary casts.
1998 Initialize parts of buffer not written when handling a possible
1999 2-byte insn at end of section. Don't attempt decoding of such
2000 an insn by the 4-byte machinery.
2002 2020-03-20 Alan Modra <amodra@gmail.com>
2004 * ppc-dis.c (print_insn_powerpc): Only clear needed bytes of
2005 partially filled buffer. Prevent lookup of 4-byte insns when
2006 only VLE 2-byte insns are possible due to section size. Print
2007 ".word" rather than ".long" for 2-byte leftovers.
2009 2020-03-17 Sergey Belyashov <sergey.belyashov@gmail.com>
2012 * z80-dis.c: Fix disassembling ED+A4/AC/B4/BC opcodes.
2014 2020-03-13 Jan Beulich <jbeulich@suse.com>
2016 * i386-dis.c (X86_64_0D): Rename to ...
2017 (X86_64_0E): ... this.
2019 2020-03-09 H.J. Lu <hongjiu.lu@intel.com>
2021 * Makefile.am ($(srcdir)/i386-init.h): Also pass -P to $(CPP).
2022 * Makefile.in: Regenerated.
2024 2020-03-09 Jan Beulich <jbeulich@suse.com>
2026 * i386-opc.tbl (avx_irel): New. Use is for AVX512 vpcmp*
2028 * i386-tbl.h: Re-generate.
2030 2020-03-09 Jan Beulich <jbeulich@suse.com>
2032 * i386-opc.tbl (xop_elem, xop_irel, xop_sign): New. Use them for XOP vpcom*,
2033 vprot*, vpsha*, and vpshl*.
2034 * i386-tbl.h: Re-generate.
2036 2020-03-09 Jan Beulich <jbeulich@suse.com>
2038 * i386-opc.tbl (avx_frel): New. Use it for AVX/AVX512 vcmpps,
2039 vcmpss, vcmppd, and vcmpsd 3-operand pseudo-ops.
2040 * i386-tbl.h: Re-generate.
2042 2020-03-09 Jan Beulich <jbeulich@suse.com>
2044 * i386-gen.c (set_bitfield): Ignore zero-length field names.
2045 * i386-opc.tbl (sse_frel): New. Use it for SSE/SSE2 cmpps,
2046 cmpss, cmppd, and cmpsd 2-operand pseudo-ops.
2047 * i386-tbl.h: Re-generate.
2049 2020-03-09 Jan Beulich <jbeulich@suse.com>
2051 * i386-gen.c (struct template_arg, struct template_instance,
2052 struct template_param, struct template, templates,
2053 parse_template, expand_templates): New.
2054 (process_i386_opcodes): Various local variables moved to
2055 expand_templates. Call parse_template and expand_templates.
2056 * i386-opc.tbl (cc): New. Use it for Jcc, SETcc, and CMOVcc.
2057 * i386-tbl.h: Re-generate.
2059 2020-03-06 Jan Beulich <jbeulich@suse.com>
2061 * i386-opc.tbl (vcvtdq2pd, vcvtps2pd, vcvtudq2pd, vcvtps2ph,
2062 vcvtps2qq, vcvtps2uqq, vcvttps2qq, vcvttps2uqq): Fold separate
2063 register and memory source templates. Replace VexW= by VexW*
2065 * i386-tbl.h: Re-generate.
2067 2020-03-06 Jan Beulich <jbeulich@suse.com>
2069 * i386-opc.tbl: Drop IgnoreSize from various SIMD insns. Replace
2070 VexW= by VexW* and VexVVVV=1 by just VexVVVV where applicable.
2071 * i386-tbl.h: Re-generate.
2073 2020-03-06 Jan Beulich <jbeulich@suse.com>
2075 * i386-opc.tbl (fildll, fistpll, fisttpll): Add ATTSyntax.
2076 * i386-tbl.h: Re-generate.
2078 2020-03-06 Jan Beulich <jbeulich@suse.com>
2080 * i386-opc.tbl (movq): Drop NoRex64 from XMM/XMM SSE2AVX variants.
2081 (movmskps, pextrw, pinsrw, pmovmskb, movmskpd, extractps,
2082 pextrb, pinsrb, roundsd): Drop NoRex64 and where applicable use
2083 VexW0 on SSE2AVX variants.
2084 (vmovq): Drop NoRex64 from XMM/XMM variants.
2085 (vextractps, vmovmskpd, vmovmskps, vpextrb, vpextrw, vpinsrb,
2086 vpinsrw, vpmovmskb, vroundsd, vpmovmskb): Drop NoRex64 and where
2087 applicable use VexW0.
2088 * i386-tbl.h: Re-generate.
2090 2020-03-06 Jan Beulich <jbeulich@suse.com>
2092 * i386-gen.c (opcode_modifiers): Remove Rex64 field.
2093 * i386-opc.h (Rex64): Delete.
2094 (struct i386_opcode_modifier): Remove rex64 field.
2095 * i386-opc.tbl (crc32): Drop Rex64.
2096 Replace Rex64 with Size64 everywhere else.
2097 * i386-tbl.h: Re-generate.
2099 2020-03-06 Jan Beulich <jbeulich@suse.com>
2101 * i386-dis.c (OP_E_memory): Exclude recording of used address
2102 prefix for "bnd" modes only in 64-bit mode. Don't decode 16-bit
2103 addressed memory operands for MPX insns.
2105 2020-03-06 Jan Beulich <jbeulich@suse.com>
2107 * i386-opc.tbl (movmskps, mwait, vmread, vmwrite, invept,
2108 invvpid, invpcid, rdfsbase, rdgsbase, wrfsbase, wrgsbase, adcx,
2109 adox, mwaitx, rdpid, movdiri): Add IgnoreSize.
2110 (ptwrite): Split into non-64-bit and 64-bit forms.
2111 * i386-tbl.h: Re-generate.
2113 2020-03-06 Jan Beulich <jbeulich@suse.com>
2115 * i386-opc.tbl (tpause, umwait): Add IgnoreSize. Add 3-operand
2117 * i386-tbl.h: Re-generate.
2119 2020-03-04 Jan Beulich <jbeulich@suse.com>
2121 * i386-dis.c (PREFIX_0F01_REG_3_RM_1): New.
2122 (prefix_table): Move vmmcall here. Add vmgexit.
2123 (rm_table): Replace vmmcall entry by prefix_table[] escape.
2124 * i386-gen.c (cpu_flag_init): Add CPU_SEV_ES_FLAGS entry.
2125 (cpu_flags): Add CpuSEV_ES entry.
2126 * i386-opc.h (CpuSEV_ES): New.
2127 (union i386_cpu_flags): Add cpusev_es field.
2128 * i386-opc.tbl (vmgexit): New.
2129 * i386-init.h, i386-tbl.h: Re-generate.
2131 2020-03-03 H.J. Lu <hongjiu.lu@intel.com>
2133 * i386-gen.c (opcode_modifiers): Replace IgnoreSize/DefaultSize
2135 * i386-opc.h (IGNORESIZE): New.
2136 (DEFAULTSIZE): Likewise.
2137 (IgnoreSize): Removed.
2138 (DefaultSize): Likewise.
2139 (MnemonicSize): New.
2140 (i386_opcode_modifier): Replace ignoresize/defaultsize with
2142 * i386-opc.tbl (IgnoreSize): New.
2143 (DefaultSize): Likewise.
2144 * i386-tbl.h: Regenerated.
2146 2020-03-03 Sergey Belyashov <sergey.belyashov@gmail.com>
2149 * z80-dis.c: Fix disassembly of LD IY,(HL) and D (HL),IX
2152 2020-03-03 H.J. Lu <hongjiu.lu@intel.com>
2155 * i386-opc.tbl: Add IgnoreSize to cvtsi2sd, cvtsi2ss, vcvtsi2sd,
2156 vcvtsi2ss, vcvtusi2sd and vcvtusi2ss for AT&T syntax.
2157 * i386-tbl.h: Regenerated.
2159 2020-02-26 Alan Modra <amodra@gmail.com>
2161 * aarch64-asm.c: Indent labels correctly.
2162 * aarch64-dis.c: Likewise.
2163 * aarch64-gen.c: Likewise.
2164 * aarch64-opc.c: Likewise.
2165 * alpha-dis.c: Likewise.
2166 * i386-dis.c: Likewise.
2167 * nds32-asm.c: Likewise.
2168 * nfp-dis.c: Likewise.
2169 * visium-dis.c: Likewise.
2171 2020-02-25 Claudiu Zissulescu <claziss@gmail.com>
2173 * arc-regs.h (int_vector_base): Make it available for all ARC
2176 2020-02-20 Nelson Chu <nelson.chu@sifive.com>
2178 * riscv-dis.c (print_insn_args): Updated since the DECLARE_CSR is
2181 2020-02-19 Nelson Chu <nelson.chu@sifive.com>
2183 * riscv-opc.c (riscv_opcodes): Convert add/addi to the compressed
2184 c.mv/c.li if rs1 is zero.
2186 2020-02-17 H.J. Lu <hongjiu.lu@intel.com>
2188 * i386-gen.c (cpu_flag_init): Replace CpuABM with
2189 CpuLZCNT|CpuPOPCNT. Add CpuPOPCNT to CPU_SSE4_2_FLAGS. Add
2191 (cpu_flags): Remove CpuABM. Add CpuPOPCNT.
2192 * i386-opc.h (CpuABM): Removed.
2194 (i386_cpu_flags): Remove cpuabm. Add cpupopcnt.
2195 * i386-opc.tbl: Replace CpuABM|CpuSSE4_2 with CpuPOPCNT on
2196 popcnt. Remove CpuABM from lzcnt.
2197 * i386-init.h: Regenerated.
2198 * i386-tbl.h: Likewise.
2200 2020-02-17 Jan Beulich <jbeulich@suse.com>
2202 * i386-opc.tbl (vcvtsi2sd, vcvtsi2ss, vcvtusi2sd, vcvtusi2ss):
2203 Fold CpuNo64 and Cpu64 templates. Use VexLIG/EVexLIG and VexW0/
2204 VexW1 instead of open-coding them.
2205 * i386-tbl.h: Re-generate.
2207 2020-02-17 Jan Beulich <jbeulich@suse.com>
2209 * i386-opc.tbl (AddrPrefixOpReg): Define.
2210 (monitor, invlpga, vmload, vmrun, vmsave, clzero, monitorx,
2211 umonitor, movdir64b, enqcmd, enqcmds): Fold Cpu64 and CpuNo64
2212 templates. Drop NoRex64.
2213 * i386-tbl.h: Re-generate.
2215 2020-02-17 Jan Beulich <jbeulich@suse.com>
2218 * i386-opc.tbl (vcvtpd2dq, vcvtpd2ps, vcvttpd2dq, vcvtpd2udq,
2219 vcvttpd2udq, vcvtqq2ps, vcvtuqq2ps): Split XMM/YMM source forms
2220 into Intel syntax instance (with Unpsecified) and AT&T one
2222 (vcvtneps2bf16): Likewise, along with folding the two so far
2224 * i386-tbl.h: Re-generate.
2226 2020-02-16 H.J. Lu <hongjiu.lu@intel.com>
2228 * i386-gen.c (cpu_flag_init): Remove CPU_ANY_SSE3_FLAGS from
2229 CPU_ANY_SSE4A_FLAGS.
2231 2020-02-17 Alan Modra <amodra@gmail.com>
2233 * i386-gen.c (cpu_flag_init): Correct last change.
2235 2020-02-16 H.J. Lu <hongjiu.lu@intel.com>
2237 * i386-gen.c (cpu_flag_init): Add CPU_ANY_SSE4A_FLAGS. Remove
2240 2020-02-14 H.J. Lu <hongjiu.lu@intel.com>
2242 * i386-opc.tbl (movsx): Remove Intel syntax comments.
2245 2020-02-14 Jan Beulich <jbeulich@suse.com>
2248 * i386-opc.tbl (movsx): Fold patterns. Also allow Reg32 as
2249 destination for Cpu64-only variant.
2250 (movzx): Fold patterns.
2251 * i386-tbl.h: Re-generate.
2253 2020-02-13 Jan Beulich <jbeulich@suse.com>
2255 * i386-gen.c (cpu_flag_init): Move CpuSSE4a from
2256 CPU_ANY_SSE_FLAGS entry to CPU_ANY_SSE3_FLAGS one. Add
2257 CPU_ANY_SSE4_FLAGS entry.
2258 * i386-init.h: Re-generate.
2260 2020-02-12 Jan Beulich <jbeulich@suse.com>
2262 * i386-opc.tbl (vfpclasspd, vfpclassps): Add Intel sytax form
2263 with Unspecified, making the present one AT&T syntax only.
2264 * i386-tbl.h: Re-generate.
2266 2020-02-12 Jan Beulich <jbeulich@suse.com>
2268 * i386-opc.tbl (jmp): Fold CpuNo64 and Amd64 direct variants.
2269 * i386-tbl.h: Re-generate.
2271 2020-02-12 Jan Beulich <jbeulich@suse.com>
2274 * i386-dis.c (putop): Handle REX.W in '^' case for Intel64 mode.
2275 * i386-opc.tbl (lfs, lgs, lss, lcall, ljmp): Split into
2276 Amd64 and Intel64 templates.
2277 (call, jmp): Likewise for far indirect variants. Dro
2279 * i386-tbl.h: Re-generate.
2281 2020-02-11 Jan Beulich <jbeulich@suse.com>
2283 * i386-gen.c (opcode_modifiers): Remove ShortForm entry.
2284 * i386-opc.h (ShortForm): Delete.
2285 (struct i386_opcode_modifier): Remove shortform field.
2286 * i386-opc.tbl (mov, movabs, push, pop, xchg, inc, dec, fld,
2287 fst, fstp, fxch, fcom, fcomp, fucom, fucomp, fadd, faddp, fsub,
2288 fsubp, fsubr, fsubrp, fmul, fmulp, fdiv, fdivp, fdivr, fdivrp,
2289 ffreep, bswap, fcmov*, fcomi, fcomip, fucomi, fucomip, movq):
2291 * i386-tbl.h: Re-generate.
2293 2020-02-11 Jan Beulich <jbeulich@suse.com>
2295 * i386-opc.tbl (fcomi, fucomi, fcomip, fcompi, fucomip,
2296 fucompi): Drop ShortForm from operand-less templates.
2297 * i386-tbl.h: Re-generate.
2299 2020-02-11 Alan Modra <amodra@gmail.com>
2301 * cgen-ibld.in (extract_normal): Set *valuep on all return paths.
2302 * bpf-ibld.c, * epiphany-ibld.c, * fr30-ibld.c, * frv-ibld.c,
2303 * ip2k-ibld.c, * iq2000-ibld.c, * lm32-ibld.c, * m32c-ibld.c,
2304 * m32r-ibld.c, * mep-ibld.c, * mt-ibld.c, * or1k-ibld.c,
2305 * xc16x-ibld.c, * xstormy16-ibld.c: Regenerate.
2307 2020-02-10 Matthew Malcomson <matthew.malcomson@arm.com>
2309 * arm-dis.c (print_insn_cde): Define 'V' parse character.
2310 (cde_opcodes): Add VCX* instructions.
2312 2020-02-10 Stam Markianos-Wright <stam.markianos-wright@arm.com>
2313 Matthew Malcomson <matthew.malcomson@arm.com>
2315 * arm-dis.c (struct cdeopcode32): New.
2316 (CDE_OPCODE): New macro.
2317 (cde_opcodes): New disassembly table.
2318 (regnames): New option to table.
2319 (cde_coprocs): New global variable.
2320 (print_insn_cde): New
2321 (print_insn_thumb32): Use print_insn_cde.
2322 (parse_arm_disassembler_options): Parse coprocN args.
2324 2020-02-10 H.J. Lu <hongjiu.lu@intel.com>
2327 * i386-gen.c (opcode_modifiers): Replace AMD64 and Intel64
2329 * i386-opc.h (AMD64): Removed.
2330 (Intel64): Likewose.
2332 (INTEL64): Likewise.
2333 (INTEL64ONLY): Likewise.
2334 (i386_opcode_modifier): Replace amd64 and intel64 with isa64.
2335 * i386-opc.tbl (Amd64): New.
2336 (Intel64): Likewise.
2337 (Intel64Only): Likewise.
2338 Replace AMD64 with Amd64. Update sysenter/sysenter with
2339 Cpu64 and Intel64Only. Remove AMD64 from sysenter/sysenter.
2340 * i386-tbl.h: Regenerated.
2342 2020-02-07 Sergey Belyashov <sergey.belyashov@gmail.com>
2345 * z80-dis.c: Add support for GBZ80 opcodes.
2347 2020-02-04 Alan Modra <amodra@gmail.com>
2349 * d30v-dis.c (print_insn): Make "val" and "opnum" unsigned.
2351 2020-02-03 Alan Modra <amodra@gmail.com>
2353 * m32c-ibld.c: Regenerate.
2355 2020-02-01 Alan Modra <amodra@gmail.com>
2357 * frv-ibld.c: Regenerate.
2359 2020-01-31 Jan Beulich <jbeulich@suse.com>
2361 * i386-dis.c (EXxmm_mdq, xmm_mdq_mode): Delete.
2362 (intel_operand_size, OP_EX): Drop xmm_mdq_mode case label.
2363 (OP_E_memory): Replace xmm_mdq_mode case label by
2364 vex_scalar_w_dq_mode one.
2365 * i386-dis-evex-prefix.h: Replace EXxmm_mdq by EXVexWdqScalar.
2367 2020-01-31 Jan Beulich <jbeulich@suse.com>
2369 * i386-dis.c (EXVexWdq, vex_w_dq_mode): Delete.
2370 (vex_vsib_d_w_dq_mode, vex_vsib_q_w_dq_mode,
2371 vex_scalar_w_dq_mode): Don't refer to vex_w_dq_mode in comments.
2372 (intel_operand_size): Drop vex_w_dq_mode case label.
2374 2020-01-31 Richard Sandiford <richard.sandiford@arm.com>
2376 * aarch64-tbl.h (aarch64_opcode): Set C_MAX_ELEM for SVE bfcvt.
2377 Remove C_SCAN_MOVPRFX for SVE bfcvtnt.
2379 2020-01-30 Alan Modra <amodra@gmail.com>
2381 * m32c-ibld.c: Regenerate.
2383 2020-01-30 Jose E. Marchesi <jose.marchesi@oracle.com>
2385 * bpf-opc.c: Regenerate.
2387 2020-01-30 Jan Beulich <jbeulich@suse.com>
2389 * i386-dis.c (X86_64_C2, X86_64_C3): New enumerators.
2390 (dis386): Use them to replace C2/C3 table entries.
2391 (x86_64_table): Add X86_64_C2 and X86_64_C3 entries.
2392 * i386-opc.tbl (ret): Split Cpu64 entries into AMD64 and Intel64
2393 ones. Use Size64 instead of DefaultSize on Intel64 ones.
2394 * i386-tbl.h: Re-generate.
2396 2020-01-30 Jan Beulich <jbeulich@suse.com>
2398 * i386-opc.tbl (call): Drop DefaultSize from Intel64 JumpDword
2400 (fldenv, fnstenv, fstenv, fnsave, fsave, frstor): Drop
2402 * i386-tbl.h: Re-generate.
2404 2020-01-30 Alan Modra <amodra@gmail.com>
2406 * tic4x-dis.c (tic4x_dp): Make unsigned.
2408 2020-01-27 H.J. Lu <hongjiu.lu@intel.com>
2409 Jan Beulich <jbeulich@suse.com>
2412 * i386-dis.c (MOVSXD_Fixup): New function.
2413 (movsxd_mode): New enum.
2414 (x86_64_table): Use MOVSXD_Fixup and movsxd_mode on movsxd.
2415 (intel_operand_size): Handle movsxd_mode.
2416 (OP_E_register): Likewise.
2418 * i386-opc.tbl: Remove Rex64 and allow 32-bit destination
2419 register on movsxd. Add movsxd with 16-bit destination register
2420 for AMD64 and Intel64 ISAs.
2421 * i386-tbl.h: Regenerated.
2423 2020-01-27 Tamar Christina <tamar.christina@arm.com>
2426 * aarch64-tbl.h (struct aarch64_opcode): Re-order cfinv.
2427 * aarch64-asm-2.c: Regenerate
2428 * aarch64-dis-2.c: Likewise.
2429 * aarch64-opc-2.c: Likewise.
2431 2020-01-21 Jan Beulich <jbeulich@suse.com>
2433 * i386-opc.tbl (sysret): Drop DefaultSize.
2434 * i386-tbl.h: Re-generate.
2436 2020-01-21 Jan Beulich <jbeulich@suse.com>
2438 * i386-opc.tbl (vcvtneps2bf16x): Add Broadcast, Xmmword, and
2440 (vcvtneps2bf16y): Add Broadcast, Ymmword, and Dword.
2441 * i386-tbl.h: Re-generate.
2443 2020-01-20 Nick Clifton <nickc@redhat.com>
2445 * po/de.po: Updated German translation.
2446 * po/pt_BR.po: Updated Brazilian Portuguese translation.
2447 * po/uk.po: Updated Ukranian translation.
2449 2020-01-20 Alan Modra <amodra@gmail.com>
2451 * hppa-dis.c (fput_const): Remove useless cast.
2453 2020-01-20 Alan Modra <amodra@gmail.com>
2455 * arm-dis.c (print_insn_arm): Wrap 'T' value.
2457 2020-01-18 Nick Clifton <nickc@redhat.com>
2459 * configure: Regenerate.
2460 * po/opcodes.pot: Regenerate.
2462 2020-01-18 Nick Clifton <nickc@redhat.com>
2464 Binutils 2.34 branch created.
2466 2020-01-17 Christian Biesinger <cbiesinger@google.com>
2468 * opintl.h: Fix spelling error (seperate).
2470 2020-01-17 H.J. Lu <hongjiu.lu@intel.com>
2472 * i386-opc.tbl: Add {vex} pseudo prefix.
2473 * i386-tbl.h: Regenerated.
2475 2020-01-16 Andre Vieira <andre.simoesdiasvieira@arm.com>
2478 * opcodes/arm-dis.c (coprocessor_opcodes): Use CORE_HIGH for MVE bits.
2479 (neon_opcodes): Likewise.
2480 (select_arm_features): Make sure we enable MVE bits when selecting
2481 armv8.1-m.main. Make sure we do not enable MVE bits when not selecting
2484 2020-01-16 Jan Beulich <jbeulich@suse.com>
2486 * i386-opc.tbl: Drop stale comment from XOP section.
2488 2020-01-16 Jan Beulich <jbeulich@suse.com>
2490 * i386-opc.tbl (movq): Add VexWIG to SSE2AVX XMM->XMM forms.
2491 (extractps): Add VexWIG to SSE2AVX forms.
2492 * i386-tbl.h: Re-generate.
2494 2020-01-16 Jan Beulich <jbeulich@suse.com>
2496 * i386-opc.tbl (pextrq, pinsrq): Drop IgnoreSize and Qword. Drop
2497 Size64 from and use VexW1 on SSE2AVX forms.
2498 (vpextrq, vpinsrq): Drop IgnoreSize and Qword. Drop Size64 from
2499 VEX-encoded forms. Add Cpu64 to EVEX-encoded forms. Use VexW1.
2500 * i386-tbl.h: Re-generate.
2502 2020-01-15 Alan Modra <amodra@gmail.com>
2504 * tic4x-dis.c (tic4x_version): Make unsigned long.
2505 (optab, optab_special, registernames): New file scope vars.
2506 (tic4x_print_register): Set up registernames rather than
2507 malloc'd registertable.
2508 (tic4x_disassemble): Delete optable and optable_special. Use
2509 optab and optab_special instead. Throw away old optab,
2510 optab_special and registernames when info->mach changes.
2512 2020-01-14 Sergey Belyashov <sergey.belyashov@gmail.com>
2515 * z80-dis.c (suffix): Use .db instruction to generate double
2518 2020-01-14 Alan Modra <amodra@gmail.com>
2520 * z8k-dis.c (unpack_instr): Formatting. Cast unsigned short
2521 values to unsigned before shifting.
2523 2020-01-13 Thomas Troeger <tstroege@gmx.de>
2525 * arm-dis.c (print_insn_arm): Fill in insn info fields for control
2527 (print_insn_thumb16, print_insn_thumb32): Likewise.
2528 (print_insn): Initialize the insn info.
2529 * i386-dis.c (print_insn): Initialize the insn info fields, and
2532 2012-01-13 Claudiu Zissulescu <claziss@gmail.com>
2534 * arc-opc.c (C_NE): Make it required.
2536 2012-01-13 Claudiu Zissulescu <claziss@gmail.com>
2538 * opcode/arc-dis.c (regnames): Correct ACCL/ACCH naming, fix typo
2539 reserved register name.
2541 2020-01-13 Alan Modra <amodra@gmail.com>
2543 * ns32k-dis.c (Is_gen): Use strchr, add 'f'.
2544 (print_insn_ns32k): Adjust ioffset for 'f' index_offset.
2546 2020-01-13 Alan Modra <amodra@gmail.com>
2548 * wasm32-dis.c (print_insn_wasm32): Localise variables. Store
2549 result of wasm_read_leb128 in a uint64_t and check that bits
2550 are not lost when copying to other locals. Use uint32_t for
2551 most locals. Use PRId64 when printing int64_t.
2553 2020-01-13 Alan Modra <amodra@gmail.com>
2555 * score-dis.c: Formatting.
2556 * score7-dis.c: Formatting.
2558 2020-01-13 Alan Modra <amodra@gmail.com>
2560 * score-dis.c (print_insn_score48): Use unsigned variables for
2561 unsigned values. Don't left shift negative values.
2562 (print_insn_score32): Likewise.
2563 * score7-dis.c (print_insn_score32, print_insn_score16): Likewise.
2565 2020-01-13 Alan Modra <amodra@gmail.com>
2567 * tic4x-dis.c (tic4x_print_register): Remove dead code.
2569 2020-01-13 Alan Modra <amodra@gmail.com>
2571 * fr30-ibld.c: Regenerate.
2573 2020-01-13 Alan Modra <amodra@gmail.com>
2575 * xgate-dis.c (print_insn): Don't left shift signed value.
2576 (ripBits): Formatting, use 1u.
2578 2020-01-10 Alan Modra <amodra@gmail.com>
2580 * tilepro-opc.c (parse_insn_tilepro): Make opval unsigned.
2581 * tilegx-opc.c (parse_insn_tilegx): Likewise. Delete raw_opval.
2583 2020-01-10 Alan Modra <amodra@gmail.com>
2585 * m10300-dis.c (disassemble): Move extraction of DREG, AREG, RREG,
2586 and XRREG value earlier to avoid a shift with negative exponent.
2587 * m10200-dis.c (disassemble): Similarly.
2589 2020-01-09 Nick Clifton <nickc@redhat.com>
2592 * z80-dis.c (ld_ii_ii): Use correct cast.
2594 2020-01-03 Sergey Belyashov <sergey.belyashov@gmail.com>
2597 * z80-dis.c (ld_ii_ii): Use character constant when checking
2600 2020-01-09 Jan Beulich <jbeulich@suse.com>
2602 * i386-dis.c (SEP_Fixup): New.
2604 (dis386_twobyte): Use it for sysenter/sysexit.
2605 (enum x86_64_isa): Change amd64 enumerator to value 1.
2606 (OP_J): Compare isa64 against intel64 instead of amd64.
2607 * i386-opc.tbl (sysenter, sysexit): Split into AMD64 and Intel64
2609 * i386-tbl.h: Re-generate.
2611 2020-01-08 Alan Modra <amodra@gmail.com>
2613 * z8k-dis.c: Include libiberty.h
2614 (instr_data_s): Make max_fetched unsigned.
2615 (z8k_lookup_instr): Make nibl_index and tabl_index unsigned.
2616 Don't exceed byte_info bounds.
2617 (output_instr): Make num_bytes unsigned.
2618 (unpack_instr): Likewise for nibl_count and loop.
2619 * z8kgen.c (gas <opcode_entry_type>): Make noperands, length and
2621 * z8k-opc.h: Regenerate.
2623 2020-01-07 Shahab Vahedi <shahab@synopsys.com>
2625 * arc-tbl.h (llock): Use 'LLOCK' as class.
2627 (scond): Use 'SCOND' as class.
2629 (llockd): Set data_size_mode to 'C_ZZ_D' which is 64-bit.
2632 2020-01-06 Alan Modra <amodra@gmail.com>
2634 * m32c-ibld.c: Regenerate.
2636 2020-01-06 Alan Modra <amodra@gmail.com>
2639 * z80-dis.c (suffix): Don't use a local struct buffer copy.
2640 Peek at next byte to prevent recursion on repeated prefix bytes.
2641 Ensure uninitialised "mybuf" is not accessed.
2642 (print_insn_z80): Don't zero n_fetch and n_used here,..
2643 (print_insn_z80_buf): ..do it here instead.
2645 2020-01-04 Alan Modra <amodra@gmail.com>
2647 * m32r-ibld.c: Regenerate.
2649 2020-01-04 Alan Modra <amodra@gmail.com>
2651 * cr16-dis.c (cr16_match_opcode): Avoid shift left of signed value.
2653 2020-01-04 Alan Modra <amodra@gmail.com>
2655 * crx-dis.c (match_opcode): Avoid shift left of signed value.
2657 2020-01-04 Alan Modra <amodra@gmail.com>
2659 * d30v-dis.c (print_insn): Avoid signed overflow in left shift.
2661 2020-01-03 Jan Beulich <jbeulich@suse.com>
2663 * aarch64-tbl.h (aarch64_opcode_table): Use
2664 SVE_ADDR_RX_LSL{1,2,3} for LD1RO{H,W,D}.
2666 2020-01-03 Jan Beulich <jbeulich@suse.com>
2668 * aarch64-tbl.h (aarch64_opcode_table): Correct SIMD
2669 forms of SUDOT and USDOT.
2671 2020-01-03 Jan Beulich <jbeulich@suse.com>
2673 * aarch64-tbl.h (aarch64_opcode_table): Drop 'i' from
2675 * opcodes/aarch64-dis-2.c: Re-generate.
2677 2020-01-03 Jan Beulich <jbeulich@suse.com>
2679 * aarch64-tbl.h (aarch64_opcode_table): Correct 64-bit
2681 * opcodes/aarch64-dis-2.c: Re-generate.
2683 2020-01-02 Sergey Belyashov <sergey.belyashov@gmail.com>
2685 * z80-dis.c: Add support for eZ80 and Z80 instructions.
2687 2020-01-01 Alan Modra <amodra@gmail.com>
2689 Update year range in copyright notice of all files.
2691 For older changes see ChangeLog-2019
2693 Copyright (C) 2020 Free Software Foundation, Inc.
2695 Copying and distribution of this file, with or without modification,
2696 are permitted in any medium without royalty provided the copyright
2697 notice and this notice are preserved.
2703 version-control: never
projects / thirdparty / binutils-gdb.git / blob