]> git.ipfire.org Git - thirdparty/binutils-gdb.git/blob - opcodes/ChangeLog
Fix PicoJava opcodes
[thirdparty/binutils-gdb.git] / opcodes / ChangeLog
1 2005-12-22 Laurent Menten <laurent.menten@teledisnet.be>
2
3 * pj-opc.c (jsr, ret, getstatic, putstatic, getfield, putfield,
4 invokevirtual, invokespecial, invokestatic, invokeinterface,
5 goto_w, jsr_w, ldc_quick, ldc_w_quick, ldc2_w_quick,
6 getfield_quick, putfield_quick, getfield2_quick, putfield2_quick,
7 getstatic_quick, putstatic_quick, getstatic2_quick,
8 putstatic2_quick, invokevirtual_quick, invokenonvirtual_quick,
9 invokesuper_quick, invokestatic_quick, invokeinterface_quick,
10 aastore_quick, new_quick, anewarray_quick, multianewarray_quick,
11 checkcast_quick, instanceof_quick, invokevirtiual_quick_w,
12 getfield_quick_w, putfield_quick_w, nonnull_quick,
13 agetfield_quick, aputfield_quick, agetstatic_quick,
14 aputstatic_quick, aldc_quick, aldc_w_quick, exit_sync_method): Fix
15 opcodes.
16
17 2005-12-16 Nathan Sidwell <nathan@codesourcery.com>
18
19 Second part of ms1 to mt renaming.
20 * Makefile.am (HFILES, CFILES, ALL_MACHINES): Adjust.
21 (stamp-mt): Adjust rule.
22 (mt-asm.lo, mt-desc.lo, mt-dis.lo, mt-ibld.lo, mt-opc.lo): Rename &
23 adjust.
24 * Makefile.in: Rebuilt.
25 * configure: Rebuilt.
26 * configure.in (bfd_mt_arch): Rename & adjust.
27 * disassemble.c (ARCH_mt): Renamed.
28 (disassembler): Adjust.
29 * mt-asm.c: Renamed, rebuilt.
30 * mt-desc.c: Renamed, rebuilt.
31 * mt-desc.h: Renamed, rebuilt.
32 * mt-dis.c: Renamed, rebuilt.
33 * mt-ibld.c: Renamed, rebuilt.
34 * mt-opc.c: Renamed, rebuilt.
35 * mt-opc.h: Renamed, rebuilt.
36
37 2005-12-13 DJ Delorie <dj@redhat.com>
38
39 * m32c-desc.c: Regenerate.
40 * m32c-opc.c: Regenerate.
41 * m32c-opc.h: Regenerate.
42
43 2005-12-12 Nathan Sidwell <nathan@codesourcery.com>
44
45 * Makefile.am (CLEANFILES, CGEN_CPUS, MT_DEPS): Replace ms1 with mt.
46 * Makefile.in: Rebuilt.
47 * configure.in: Replace ms1 files with mt files.
48 * configure: Rebuilt.
49
50 2005-12-08 Jan Beulich <jbeulich@novell.com>
51
52 * i386-dis.c (MAXLEN): Reduce to architectural limit.
53 (fetch_data): Check for sufficient buffer size.
54
55 2005-12-08 Jan Beulich <jbeulich@novell.com>
56
57 * i386-dis.c (OP_ST): Remove prefix in Intel mode.
58
59 2005-12-08 Daniel Jacobowitz <dan@codesourcery.com>
60
61 * i386-dis.c (dofloat): Handle %rip-relative floating point addressing.
62
63 2005-12-07 Hans-Peter Nilsson <hp@axis.com>
64
65 * cris-opc.c (cris_opcodes) <"move" "s,P">: Define using
66 MOVE_M_TO_PREG_OPCODE and MOVE_M_TO_PREG_ZBITS instead of constants.
67
68 2005-12-06 H.J. Lu <hongjiu.lu@intel.com>
69
70 PR gas/1874
71 * i386-dis.c (address_mode): New enum type.
72 (address_mode): New variable.
73 (mode_64bit): Removed.
74 (ckprefix): Updated to check address_mode instead of mode_64bit.
75 (prefix_name): Likewise.
76 (print_insn): Likewise.
77 (putop): Likewise.
78 (print_operand_value): Likewise.
79 (intel_operand_size): Likewise.
80 (OP_E): Likewise.
81 (OP_G): Likewise.
82 (set_op): Likewise.
83 (OP_REG): Likewise.
84 (OP_I): Likewise.
85 (OP_I64): Likewise.
86 (OP_OFF): Likewise.
87 (OP_OFF64): Likewise.
88 (ptr_reg): Likewise.
89 (OP_C): Likewise.
90 (SVME_Fixup): Likewise.
91 (print_insn): Set address_mode.
92 (PNI_Fixup): Add 64bit and address size override support for
93 monitor and mwait.
94
95 2005-12-06 Hans-Peter Nilsson <hp@axis.com>
96
97 * cris-dis.c (bytes_to_skip): Handle new parameter prefix_matchedp.
98 (print_with_operands): Check for prefix when [PC+] is seen.
99
100 2005-12-02 Dave Brolley <brolley@redhat.com>
101
102 * configure.in (cgen_files): Add cgen-bitset.lo.
103 (ta): Add cgen-bitset.lo when arch==bfd_cris_arch.
104 * Makefile.am (CFILES): Add cgen-bitset.c.
105 (ALL_MACHINES): Add cgen-bitset.lo.
106 (cgen-bitset.lo): New target.
107 * cgen-opc.c (cgen_bitset_create, cgen_bitset_init, cgen_bitset_clear)
108 (cgen_bitset_add, cgen_bitset_set, cgen_bitset_contains)
109 (cgen_bitset_compare, cgen_bitset_intersect_p, cgen_bitset_copy)
110 (cgen_bitset_union): Moved from here ...
111 * cgen-bitset.c: ... to here. New file.
112 * Makefile.in: Regenerated.
113 * configure: Regenerated.
114
115 2005-11-22 James E Wilson <wilson@specifix.com>
116
117 * ia64-gen.c (_opcode_int64_low, _opcode_int64_high,
118 opcode_fprintf_vma): New.
119 (print_main_table): New opcode_fprintf_vma instead of fprintf_vma.
120
121 2005-11-16 Alan Modra <amodra@bigpond.net.au>
122
123 * ppc-opc.c (powerpc_opcodes): Add frin,friz,frip,frim. Correct
124 frsqrtes.
125
126 2005-11-14 David Ung <davidu@mips.com>
127
128 * mips16-opc.c: Add MIPS16e save/restore opcodes.
129 * mips-dis.c (print_mips16_insn_arg): Handle printing of 'm'/'M'
130 codes for save/restore.
131
132 2005-11-10 Andreas Schwab <schwab@suse.de>
133
134 * m68k-dis.c (print_insn_m68k): Only match FPU insns with
135 coprocessor ID 1.
136
137 2005-11-08 H.J. Lu <hongjiu.lu@intel.com>
138
139 * m32c-desc.c: Regenerated.
140
141 2005-11-08 Nathan Sidwell <nathan@codesourcery.com>
142
143 Add ms2.
144 * ms1-asm.c, ms1-desc.c, ms1-desc.h, ms1-dis.c, ms1-ibld.c,
145 ms1-opc.c, ms1-opc.h: Regenerated.
146
147 2005-11-07 Steve Ellcey <sje@cup.hp.com>
148
149 * configure: Regenerate after modifying bfd/warning.m4.
150
151 2005-11-07 Alan Modra <amodra@bigpond.net.au>
152
153 * i386-dis.c (ckprefix): Handle rex on fwait. Don't print
154 ignored rex prefixes here.
155 (print_insn): Instead, handle them similarly to fwait followed
156 by non-fp insns.
157
158 2005-11-02 H.J. Lu <hongjiu.lu@intel.com>
159
160 * iq2000-desc.c: Regenerated.
161 * iq2000-desc.h: Likewise.
162 * iq2000-dis.c: Likewise.
163 * iq2000-opc.c: Likewise.
164
165 2005-11-02 Paul Brook <paul@codesourcery.com>
166
167 * arm-dis.c (print_insn_thumb32): Word align blx target address.
168
169 2005-10-31 Alan Modra <amodra@bigpond.net.au>
170
171 * arm-dis.c (print_insn): Warning fix.
172
173 2005-10-30 H.J. Lu <hongjiu.lu@intel.com>
174
175 * Makefile.am: Run "make dep-am".
176 * Makefile.in: Regenerated.
177
178 * dep-in.sed: Replace " ./" with " ".
179
180 2005-10-28 Dave Brolley <brolley@redhat.com>
181
182 * All CGEN-generated sources: Regenerate.
183
184 Contribute the following changes:
185 2005-09-19 Dave Brolley <brolley@redhat.com>
186
187 * disassemble.c (disassemble_init_for_target): Add 'break' to case for
188 bfd_arch_tic4x. Use cgen_bitset_create and cgen_bitset_set for
189 bfd_arch_m32c case.
190
191 2005-02-16 Dave Brolley <brolley@redhat.com>
192
193 * cgen-dis.in: Rename CGEN_ISA_MASK to CGEN_BITSET. Rename
194 cgen_isa_mask_* to cgen_bitset_*.
195 * cgen-opc.c: Likewise.
196
197 2003-11-28 Richard Sandiford <rsandifo@redhat.com>
198
199 * cgen-dis.in (print_insn_@arch@): Fix comparison with cached isas.
200 * *-dis.c: Regenerate.
201
202 2003-06-05 DJ Delorie <dj@redhat.com>
203
204 * cgen-dis.in (print_insn_@arch@): Copy prev_isas, don't assign
205 it, as it may point to a reused buffer. Set prev_isas when we
206 change cpus.
207
208 2002-12-13 Dave Brolley <brolley@redhat.com>
209
210 * cgen-opc.c (cgen_isa_mask_create): New support function for
211 CGEN_ISA_MASK.
212 (cgen_isa_mask_init): Ditto.
213 (cgen_isa_mask_clear): Ditto.
214 (cgen_isa_mask_add): Ditto.
215 (cgen_isa_mask_set): Ditto.
216 (cgen_isa_supported): Ditto.
217 (cgen_isa_mask_compare): Ditto.
218 (cgen_isa_mask_intersection): Ditto.
219 (cgen_isa_mask_copy): Ditto.
220 (cgen_isa_mask_combine): Ditto.
221 * cgen-dis.in (libiberty.h): #include it.
222 (isas): Renamed from 'isa' and now (CGEN_ISA_MASK *).
223 (print_insn_@arch@): Use CGEN_ISA_MASK and support functions.
224 * Makefile.am (CGENDEPS): Add utils-cgen.scm and attrs.scm.
225 * Makefile.in: Regenerated.
226
227 2005-10-27 DJ Delorie <dj@redhat.com>
228
229 * m32c-asm.c: Regenerate.
230 * m32c-desc.c: Regenerate.
231 * m32c-desc.h: Regenerate.
232 * m32c-dis.c: Regenerate.
233 * m32c-ibld.c: Regenerate.
234 * m32c-opc.c: Regenerate.
235 * m32c-opc.h: Regenerate.
236
237 2005-10-26 DJ Delorie <dj@redhat.com>
238
239 * m32c-asm.c: Regenerate.
240 * m32c-desc.c: Regenerate.
241 * m32c-desc.h: Regenerate.
242 * m32c-dis.c: Regenerate.
243 * m32c-ibld.c: Regenerate.
244 * m32c-opc.c: Regenerate.
245 * m32c-opc.h: Regenerate.
246
247 2005-10-26 Paul Brook <paul@codesourcery.com>
248
249 * arm-dis.c (arm_opcodes): Correct "sel" entry.
250
251 2005-10-26 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
252
253 * m32r-asm.c: Regenerate.
254
255 2005-10-25 DJ Delorie <dj@redhat.com>
256
257 * m32c-asm.c: Regenerate.
258 * m32c-desc.c: Regenerate.
259 * m32c-desc.h: Regenerate.
260 * m32c-dis.c: Regenerate.
261 * m32c-ibld.c: Regenerate.
262 * m32c-opc.c: Regenerate.
263 * m32c-opc.h: Regenerate.
264
265 2005-10-25 Arnold Metselaar <arnold.metselaar@planet.nl>
266
267 * configure.in: Add target architecture bfd_arch_z80.
268 * configure: Regenerated.
269 * disassemble.c (disassembler)<ARCH_z80>: Add case
270 bfd_arch_z80.
271 * z80-dis.c: New file.
272
273 2005-10-25 Alan Modra <amodra@bigpond.net.au>
274
275 * po/POTFILES.in: Regenerate.
276 * po/opcodes.pot: Regenerate.
277
278 2005-10-24 Jan Beulich <jbeulich@novell.com>
279
280 * ia64-asmtab.c: Regenerate.
281
282 2005-10-21 DJ Delorie <dj@redhat.com>
283
284 * m32c-asm.c: Regenerate.
285 * m32c-desc.c: Regenerate.
286 * m32c-desc.h: Regenerate.
287 * m32c-dis.c: Regenerate.
288 * m32c-ibld.c: Regenerate.
289 * m32c-opc.c: Regenerate.
290 * m32c-opc.h: Regenerate.
291
292 2005-10-21 Nick Clifton <nickc@redhat.com>
293
294 * bfin-dis.c: Tidy up code, removing redundant constructs.
295
296 2005-10-19 Martin Schwidefsky <schwidefsky@de.ibm.com>
297
298 * s390-opc.txt: Add unnormalized hfp multiply and multiply-and-add
299 instructions.
300
301 2005-10-18 Nick Clifton <nickc@redhat.com>
302
303 * m32r-asm.c: Regenerate after updating m32r.opc.
304
305 2005-10-18 Jie Zhang <jie.zhang@analog.com>
306
307 * bfin-dis.c (print_insn_bfin): Do proper endian transform when
308 reading instruction from memory.
309
310 2005-10-18 Nick Clifton <nickc@redhat.com>
311
312 * m32r-asm.c: Regenerate after updating m32r.opc.
313
314 2005-10-14 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
315
316 * m32r-asm.c: Regenerate after updating m32r.opc.
317
318 2005-10-08 James Lemke <jim@wasabisystems.com>
319
320 * arm-dis.c (coprocessor_opcodes): Fix mask for various Maverick CDP
321 operations.
322
323 2005-10-06 Daniel Jacobowitz <dan@codesourcery.com>
324
325 * ppc-dis.c (struct dis_private): Remove.
326 (powerpc_dialect): Avoid aliasing warnings.
327 (print_insn_big_powerpc, print_insn_little_powerpc): Likewise.
328
329 2005-09-30 Nick Clifton <nickc@redhat.com>
330
331 * po/ga.po: New Irish translation.
332 * configure.in (ALL_LINGUAS): Add "ga".
333 * configure: Regenerate.
334
335 2005-09-30 H.J. Lu <hongjiu.lu@intel.com>
336
337 * Makefile.am: Run "make dep-am".
338 * Makefile.in: Regenerated.
339 * aclocal.m4: Likewise.
340 * configure: Likewise.
341
342 2005-09-30 Catherine Moore <clm@cm00re.com>
343
344 * Makefile.am: Bfin support.
345 * Makefile.in: Regenerated.
346 * aclocal.m4: Regenerated.
347 * bfin-dis.c: New file.
348 * configure.in: Bfin support.
349 * configure: Regenerated.
350 * disassemble.c (ARCH_bfin): Define.
351 (disassembler): Add case for bfd_arch_bfin.
352
353 2005-09-28 Jan Beulich <jbeulich@novell.com>
354
355 * i386-dis.c (stack_v_mode): Renamed from branch_v_mode.
356 (indirEv): Use it.
357 (stackEv): New.
358 (Ob64, Ov64): Rename to Ob, Ov. Delete unused original definitions.
359 (dis386): Document and use new 'V' meta character. Use it for
360 single-byte push/pop opcode forms. Use stackEv for mod-r/m push/pop
361 opcode forms. Correct typo in 'pop ss'. Replace Ob64/Ov64 by Ob/Ov.
362 (putop): 'q' suffix for 'T' and 'U' meta depends on DFLAG. Mark
363 data prefix as used whenever DFLAG was examined. Handle 'V'.
364 (intel_operand_size): Use stack_v_mode.
365 (OP_E): Use stack_v_mode, but handle only the special case of
366 64-bit mode without operand size override here; fall through to
367 v_mode case otherwise.
368 (OP_REG): Special case rAX_reg ... rDI_reg only when 64-bit mode
369 and no operand size override is present.
370 (OP_J): Use get32s for obtaining the displacement also when rex64
371 is present.
372
373 2005-09-08 Paul Brook <paul@codesourcery.com>
374
375 * arm-dis.c (arm_opcodes, thumb32_opcodes): Rename smi to smc.
376
377 2005-09-06 Chao-ying Fu <fu@mips.com>
378
379 * mips-opc.c (MT32): New define.
380 (mips_builtin_opcodes): Move "bc0f", "bc0fl", "bc0t", "bc0tl" to the
381 bottom to avoid opcode collision with "mftr" and "mttr".
382 Add MT instructions.
383 * mips-dis.c (mips_arch_choices): Enable INSN_MT for mips32r2.
384 (print_insn_args): Add supports for +t, +T, !, $, *, &, g operand
385 formats.
386
387 2005-09-02 Paul Brook <paul@codesourcery.com>
388
389 * arm-dis.c (coprocessor_opcodes): Add null terminator.
390
391 2005-09-02 Paul Brook <paul@codesourcery.com>
392
393 * arm-dis.c (coprocessor_opcodes): New.
394 (arm_opcodes, thumb32_opcodes): Remove coprocessor insns.
395 (print_insn_coprocessor): New function.
396 (print_insn_arm): Use print_insn_coprocessor. Remove coprocessor
397 format characters.
398 (print_insn_thumb32): Use print_insn_coprocessor.
399
400 2005-08-30 Paul Brook <paul@codesourcery.com>
401
402 * arm-dis.c (thumb_opcodes): Disassemble sub(3) as subs.
403
404 2005-08-26 Jan Beulich <jbeulich@novell.com>
405
406 * i386-dis.c (intel_operand_size): New, broken out from OP_E for
407 re-use.
408 (OP_E): Call intel_operand_size, move call site out of mode
409 dependent code.
410 (OP_OFF): Call intel_operand_size if suffix_always. Remove
411 ATTRIBUTE_UNUSED from parameters.
412 (OP_OFF64): Likewise.
413 (OP_ESreg): Call intel_operand_size.
414 (OP_DSreg): Likewise.
415 (OP_DIR): Use colon rather than semicolon as separator of far
416 jump/call operands.
417
418 2005-08-25 Chao-ying Fu <fu@mips.com>
419
420 * mips-opc.c (WR_a, RD_a, MOD_a, DSP_VOLA, D32): New define.
421 (mips_builtin_opcodes): Add DSP instructions.
422 * mips-dis.c (mips_arch_choices): Enable INSN_DSP for mips32, mips32r2,
423 mips64, mips64r2.
424 (print_insn_args): Add supports for 3, 4, 5, 6, 7, 8, 9, 0, :, ', @
425 operand formats.
426
427 2005-08-23 David Ung <davidu@mips.com>
428
429 * mips16-opc.c (mips16_opcodes): Add the MIPS16e jalrc/jrc
430 instructions to the table.
431
432 2005-08-18 Alan Modra <amodra@bigpond.net.au>
433
434 * a29k-dis.c: Delete.
435 * Makefile.am: Remove a29k support.
436 * configure.in: Likewise.
437 * disassemble.c: Likewise.
438 * Makefile.in: Regenerate.
439 * configure: Regenerate.
440 * po/POTFILES.in: Regenerate.
441
442 2005-08-15 Daniel Jacobowitz <dan@codesourcery.com>
443
444 * ppc-dis.c (powerpc_dialect): Handle e300.
445 (print_ppc_disassembler_options): Likewise.
446 * ppc-opc.c (PPCE300): Define.
447 (powerpc_opcodes): Mark icbt as available for the e300.
448
449 2005-08-13 John David Anglin <dave.anglin@nrc-cnrc.gc.ca>
450
451 * hppa-dis.c (print_insn_hppa): Don't print '%' before register names.
452 Use "rp" instead of "%r2" in "b,l" insns.
453
454 2005-08-12 Martin Schwidefsky <schwidefsky@de.ibm.com>
455
456 * s390-dis.c (print_insn_s390): Print unsigned operands with %u.
457 * s390-mkopc.c (s390_opcode_cpu_val): Add support for cpu type z9-109.
458 (main): Likewise.
459 * s390-opc.c (I32_16, U32_16, M_16): Add defines 32 bit immediates
460 and 4 bit optional masks.
461 (INSTR_RIL_RI, INSTR_RIL_RU, INSTR_RRF_M0RR, INSTR_RSE_CCRD,
462 INSTR_RSY_CCRD, INSTR_SSF_RRDRD): Add new instruction formats.
463 (MASK_RIL_RI, MASK_RIL_RU, MASK_RRF_M0RR, MASK_RSE_CCRD,
464 MASK_RSY_CCRD, MASK_SSF_RRDRD): Likewise.
465 (s390_opformats): Likewise.
466 * s390-opc.txt: Add new instructions for cpu type z9-109.
467
468 2005-08-05 John David Anglin <dave.anglin@nrc-crnc.gc.ca>
469
470 * hppa-dis.c (print_insn_hppa): Prefix 21-bit values with "L%".
471
472 2005-07-29 Paul Brook <paul@codesourcery.com>
473
474 * arm-dis.c: Fix disassebly of thumb2 writeback addressing modes.
475
476 2005-07-29 Paul Brook <paul@codesourcery.com>
477
478 * arm-dis.c (thumb32_opc): Fix addressing mode for tbh.
479 (print_insn_thumb32): Fix decoding of thumb2 'I' operands.
480
481 2005-07-25 DJ Delorie <dj@redhat.com>
482
483 * m32c-asm.c Regenerate.
484 * m32c-dis.c Regenerate.
485
486 2005-07-20 DJ Delorie <dj@redhat.com>
487
488 * disassemble.c (disassemble_init_for_target): M32C ISAs are
489 enums, so convert them to bit masks, which attributes are.
490
491 2005-07-18 Nick Clifton <nickc@redhat.com>
492
493 * configure.in: Restore alpha ordering to list of arches.
494 * configure: Regenerate.
495 * disassemble.c: Restore alpha ordering to list of arches.
496
497 2005-07-18 Nick Clifton <nickc@redhat.com>
498
499 * m32c-asm.c: Regenerate.
500 * m32c-desc.c: Regenerate.
501 * m32c-desc.h: Regenerate.
502 * m32c-dis.c: Regenerate.
503 * m32c-ibld.h: Regenerate.
504 * m32c-opc.c: Regenerate.
505 * m32c-opc.h: Regenerate.
506
507 2005-07-18 H.J. Lu <hongjiu.lu@intel.com>
508
509 * i386-dis.c (PNI_Fixup): Update comment.
510 (VMX_Fixup): Properly handle the suffix check.
511
512 2005-07-16 John David Anglin <dave.anglin@nrc-cnrc.gc.ca>
513
514 * hppa-dis.c (print_insn_hppa): Add space after 'w' in wide-mode
515 mfctl disassembly.
516
517 2005-07-16 Alan Modra <amodra@bigpond.net.au>
518
519 * Makefile.am: Run "make dep-am".
520 (stamp-m32c): Fix cpu dependencies.
521 * Makefile.in: Regenerate.
522 * ip2k-dis.c: Regenerate.
523
524 2007-07-15 H.J. Lu <hongjiu.lu@intel.com>
525
526 * i386-dis.c (OP_VMX): New. Handle Intel VMX Instructions.
527 (VMX_Fixup): New. Fix up Intel VMX Instructions.
528 (Em): New.
529 (Gm): New.
530 (VM): New.
531 (dis386_twobyte): Updated entries 0x78 and 0x79.
532 (twobyte_has_modrm): Likewise.
533 (grps): Use OP_VMX in the "sgdtIQ" entry. Updated GRP9.
534 (OP_G): Handle m_mode.
535
536 2005-07-14 Jim Blandy <jimb@redhat.com>
537
538 Add support for the Renesas M32C and M16C.
539 * m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c, m32c-opc.c: New.
540 * m32c-desc.h, m32c-opc.h: New.
541 * Makefile.am (HFILES): List m32c-desc.h and m32c-opc.h.
542 (CFILES): List m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c,
543 m32c-opc.c.
544 (ALL_MACHINES): List m32c-asm.lo, m32c-desc.lo, m32c-dis.lo,
545 m32c-ibld.lo, m32c-opc.lo.
546 (CLEANFILES): List stamp-m32c.
547 (M32C_DEPS): List stamp-m32c, if CGEN_MAINT.
548 (CGEN_CPUS): Add m32c.
549 (m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c, m32c-opc.c)
550 (m32c-desc.h, m32c-opc.h): Depend on M32C_DEPS.
551 (m32c_opc_h): New variable.
552 (stamp-m32c, m32c-asm.lo, m32c-desc.lo, m32c-dis.lo, m32c-ibld.lo)
553 (m32c-opc.lo): New rules.
554 * Makefile.in: Regenerated.
555 * configure.in: Add case for bfd_m32c_arch.
556 * configure: Regenerated.
557 * disassemble.c (ARCH_m32c): New.
558 [ARCH_m32c]: #include "m32c-desc.h".
559 (disassembler) [ARCH_m32c]: Add case for bfd_arch_m32c.
560 (disassemble_init_for_target) [ARCH_m32c]: Same.
561
562 * cgen-ops.h, cgen-types.h: New files.
563 * Makefile.am (HFILES): List them.
564 * Makefile.in: Regenerated.
565
566 2005-07-07 Kaveh R. Ghazi <ghazi@caip.rutgers.edu>
567
568 * arc-dis.c, arm-dis.c, cris-dis.c, crx-dis.c, d10v-dis.c,
569 d30v-dis.c, fr30-dis.c, h8300-dis.c, h8500-dis.c, i860-dis.c,
570 ia64-dis.c, ip2k-dis.c, m10200-dis.c, m10300-dis.c,
571 m88k-dis.c, mcore-dis.c, mips-dis.c, ms1-dis.c, or32-dis.c,
572 ppc-dis.c, sh64-dis.c, sparc-dis.c, tic4x-dis.c, tic80-dis.c,
573 v850-dis.c: Fix format bugs.
574 * ia64-gen.c (fail, warn): Add format attribute.
575 * or32-opc.c (debug): Likewise.
576
577 2005-07-07 Khem Raj <kraj@mvista.com>
578
579 * arm-dis.c (opcode32 arm_opcodes): Fix ARM VFP fadds instruction
580 disassembly pattern.
581
582 2005-07-06 Alan Modra <amodra@bigpond.net.au>
583
584 * Makefile.am (stamp-m32r): Fix path to cpu files.
585 (stamp-m32r, stamp-iq2000): Likewise.
586 * Makefile.in: Regenerate.
587 * m32r-asm.c: Regenerate.
588 * po/POTFILES.in: Remove arm-opc.h. Add ms1-asm.c, ms1-desc.c,
589 ms1-desc.h, ms1-dis.c, ms1-ibld.c, ms1-opc.c, ms1-opc.h.
590
591 2005-07-05 Nick Clifton <nickc@redhat.com>
592
593 * iq2000-asm.c: Regenerate.
594 * ms1-asm.c: Regenerate.
595
596 2005-07-05 Jan Beulich <jbeulich@novell.com>
597
598 * i386-dis.c (SVME_Fixup): New.
599 (grps): Use it for the lidt entry.
600 (PNI_Fixup): Call OP_M rather than OP_E.
601 (INVLPG_Fixup): Likewise.
602
603 2005-07-04 H.J. Lu <hongjiu.lu@intel.com>
604
605 * tic30-dis.c (cnvt_tmsfloat_ieee): Use HUGE_VALF if defined.
606
607 2005-07-01 Nick Clifton <nickc@redhat.com>
608
609 * a29k-dis.c: Update to ISO C90 style function declarations and
610 fix formatting.
611 * alpha-opc.c: Likewise.
612 * arc-dis.c: Likewise.
613 * arc-opc.c: Likewise.
614 * avr-dis.c: Likewise.
615 * cgen-asm.in: Likewise.
616 * cgen-dis.in: Likewise.
617 * cgen-ibld.in: Likewise.
618 * cgen-opc.c: Likewise.
619 * cris-dis.c: Likewise.
620 * d10v-dis.c: Likewise.
621 * d30v-dis.c: Likewise.
622 * d30v-opc.c: Likewise.
623 * dis-buf.c: Likewise.
624 * dlx-dis.c: Likewise.
625 * h8300-dis.c: Likewise.
626 * h8500-dis.c: Likewise.
627 * hppa-dis.c: Likewise.
628 * i370-dis.c: Likewise.
629 * i370-opc.c: Likewise.
630 * m10200-dis.c: Likewise.
631 * m10300-dis.c: Likewise.
632 * m68k-dis.c: Likewise.
633 * m88k-dis.c: Likewise.
634 * mips-dis.c: Likewise.
635 * mmix-dis.c: Likewise.
636 * msp430-dis.c: Likewise.
637 * ns32k-dis.c: Likewise.
638 * or32-dis.c: Likewise.
639 * or32-opc.c: Likewise.
640 * pdp11-dis.c: Likewise.
641 * pj-dis.c: Likewise.
642 * s390-dis.c: Likewise.
643 * sh-dis.c: Likewise.
644 * sh64-dis.c: Likewise.
645 * sparc-dis.c: Likewise.
646 * sparc-opc.c: Likewise.
647 * sysdep.h: Likewise.
648 * tic30-dis.c: Likewise.
649 * tic4x-dis.c: Likewise.
650 * tic80-dis.c: Likewise.
651 * v850-dis.c: Likewise.
652 * v850-opc.c: Likewise.
653 * vax-dis.c: Likewise.
654 * w65-dis.c: Likewise.
655 * z8kgen.c: Likewise.
656
657 * fr30-*: Regenerate.
658 * frv-*: Regenerate.
659 * ip2k-*: Regenerate.
660 * iq2000-*: Regenerate.
661 * m32r-*: Regenerate.
662 * ms1-*: Regenerate.
663 * openrisc-*: Regenerate.
664 * xstormy16-*: Regenerate.
665
666 2005-06-23 Ben Elliston <bje@gnu.org>
667
668 * m68k-dis.c: Use ISC C90.
669 * m68k-opc.c: Formatting fixes.
670
671 2005-06-16 David Ung <davidu@mips.com>
672
673 * mips16-opc.c (mips16_opcodes): Add the following MIPS16e
674 instructions to the table; seb/seh/sew/zeb/zeh/zew.
675
676 2005-06-15 Dave Brolley <brolley@redhat.com>
677
678 Contribute Morpho ms1 on behalf of Red Hat
679 * ms1-asm.c, ms1-desc.c, ms1-dis.c, ms1-ibld.c, ms1-opc.c,
680 ms1-opc.h: New files, Morpho ms1 target.
681
682 2004-05-14 Stan Cox <scox@redhat.com>
683
684 * disassemble.c (ARCH_ms1): Define.
685 (disassembler): Handle bfd_arch_ms1
686
687 2004-05-13 Michael Snyder <msnyder@redhat.com>
688
689 * Makefile.am, Makefile.in: Add ms1 target.
690 * configure.in: Ditto.
691
692 2005-06-08 Zack Weinberg <zack@codesourcery.com>
693
694 * arm-opc.h: Delete; fold contents into ...
695 * arm-dis.c: ... here. Move includes of internal COFF headers
696 next to includes of internal ELF headers.
697 (streq, WORD_ADDRESS, BDISP, BDISP23): Delete, unused.
698 (struct arm_opcode): Rename struct opcode32. Make 'assembler' const.
699 (struct thumb_opcode): Rename struct opcode16. Make 'assembler' const.
700 (arm_conditional, arm_fp_const, arm_shift, arm_regname, regnames)
701 (iwmmxt_wwnames, iwmmxt_wwssnames):
702 Make const.
703 (regnames): Remove iWMMXt coprocessor register sets.
704 (iwmmxt_regnames, iwmmxt_cregnames): New statics.
705 (get_arm_regnames): Adjust fourth argument to match above changes.
706 (set_iwmmxt_regnames): Delete.
707 (print_insn_arm): Constify 'c'. Use ISO syntax for function
708 pointer calls. Expand sole use of BDISP. Use iwmmxt_regnames
709 and iwmmxt_cregnames, not set_iwmmxt_regnames.
710 (print_insn_thumb16, print_insn_thumb32): Constify 'c'. Use
711 ISO syntax for function pointer calls.
712
713 2005-06-07 Zack Weinberg <zack@codesourcery.com>
714
715 * arm-dis.c: Split up the comments describing the format codes, so
716 that the ARM and 16-bit Thumb opcode tables each have comments
717 preceding them that describe all the codes, and only the codes,
718 valid in those tables. (32-bit Thumb table is already like this.)
719 Reorder the lists in all three comments to match the order in
720 which the codes are implemented.
721 Remove all forward declarations of static functions. Convert all
722 function definitions to ISO C format.
723 (print_insn_arm, print_insn_thumb16, print_insn_thumb32):
724 Return nothing.
725 (print_insn_thumb16): Remove unused case 'I'.
726 (print_insn): Update for changed calling convention of subroutines.
727
728 2005-05-25 Jan Beulich <jbeulich@novell.com>
729
730 * i386-dis.c (OP_E): In Intel mode, display 32-bit displacements in
731 hex (but retain it being displayed as signed). Remove redundant
732 checks. Add handling of displacements for 16-bit addressing in Intel
733 mode.
734
735 2005-05-25 Jan Beulich <jbeulich@novell.com>
736
737 * i386-dis.c (prefix_name): Remove pointless mode_64bit check.
738 (OP_E): Remove redundant REX_EXTZ handling. Remove pointless
739 masking of 'rm' in 16-bit memory address handling.
740
741 2005-05-19 Anton Blanchard <anton@samba.org>
742
743 * ppc-dis.c (powerpc_dialect): Handle "-Mpower5".
744 (print_ppc_disassembler_options): Document it.
745 * ppc-opc.c (SVC_LEV): Define.
746 (LEV): Allow optional operand.
747 (POWER5): Define.
748 (powerpc_opcodes): Extend "sc". Adjust "svc" and "svcl". Add
749 "hrfid", "popcntb", "fsqrtes", "fsqrtes.", "fre" and "fre.".
750
751 2005-05-19 Kelley Cook <kcook@gcc.gnu.org>
752
753 * Makefile.in: Regenerate.
754
755 2005-05-17 Zack Weinberg <zack@codesourcery.com>
756
757 * arm-dis.c (thumb_opcodes): Add disassembly for V6T2 16-bit
758 instructions. Adjust disassembly of some opcodes to match
759 unified syntax.
760 (thumb32_opcodes): New table.
761 (print_insn_thumb): Rename print_insn_thumb16; don't handle
762 two-halfword branches here.
763 (print_insn_thumb32): New function.
764 (print_insn): Choose among print_insn_arm, print_insn_thumb16,
765 and print_insn_thumb32. Be consistent about order of
766 halfwords when printing 32-bit instructions.
767
768 2005-05-07 H.J. Lu <hongjiu.lu@intel.com>
769
770 PR 843
771 * i386-dis.c (branch_v_mode): New.
772 (indirEv): Use branch_v_mode instead of v_mode.
773 (OP_E): Handle branch_v_mode.
774
775 2005-05-07 H.J. Lu <hongjiu.lu@intel.com>
776
777 * d10v-dis.c (dis_2_short): Support 64bit host.
778
779 2005-05-07 Nick Clifton <nickc@redhat.com>
780
781 * po/nl.po: Updated translation.
782
783 2005-05-07 Nick Clifton <nickc@redhat.com>
784
785 * Update the address and phone number of the FSF organization in
786 the GPL notices in the following files:
787 a29k-dis.c, aclocal.m4, alpha-dis.c, alpha-opc.c, arc-dis.c,
788 arc-dis.h, arc-ext.c, arc-ext.h, arc-opc.c, arm-dis.c, arm-opc.h,
789 avr-dis.c, cgen-asm.c, cgen-asm.in, cgen-dis.c, cgen-dis.in,
790 cgen-ibld.in, cgen-opc.c, cgen.sh, cris-dis.c, cris-opc.c,
791 crx-dis.c, crx-opc.c, d10v-dis.c, d10v-opc.c, d30v-dis.c,
792 d30v-opc.c, dis-buf.c, dis-init.c, disassemble.c, dlx-dis.c,
793 fr30-asm.c, fr30-desc.c, fr30-desc.h, fr30-dis.c, fr30-ibld.c,
794 fr30-opc.c, fr30-opc.h, frv-asm.c, frv-desc.c, frv-desc.h,
795 frv-dis.c, frv-ibld.c, frv-opc.c, frv-opc.h, h8300-dis.c,
796 h8500-dis.c, h8500-opc.h, hppa-dis.c, i370-dis.c, i370-opc.c,
797 i386-dis.c, i860-dis.c, i960-dis.c, ia64-asmtab.h, ia64-dis.c,
798 ia64-gen.c, ia64-opc-a.c, ia64-opc-b.c, ia64-opc-d.c,
799 ia64-opc-f.c, ia64-opc-i.c, ia64-opc-m.c, ia64-opc-x.c,
800 ia64-opc.c, ia64-opc.h, ip2k-asm.c, ip2k-desc.c, ip2k-desc.h,
801 ip2k-dis.c, ip2k-ibld.c, ip2k-opc.c, ip2k-opc.h, iq2000-asm.c,
802 iq2000-desc.c, iq2000-desc.h, iq2000-dis.c, iq2000-ibld.c,
803 iq2000-opc.c, iq2000-opc.h, m10200-dis.c, m10200-opc.c,
804 m10300-dis.c, m10300-opc.c, m32r-asm.c, m32r-desc.c, m32r-desc.h,
805 m32r-dis.c, m32r-ibld.c, m32r-opc.c, m32r-opc.h, m32r-opinst.c,
806 m68hc11-dis.c, m68hc11-opc.c, m68k-dis.c, m68k-opc.c, m88k-dis.c,
807 maxq-dis.c, mcore-dis.c, mcore-opc.h, mips-dis.c, mips-opc.c,
808 mips16-opc.c, mmix-dis.c, mmix-opc.c, msp430-dis.c, ns32k-dis.c,
809 openrisc-asm.c, openrisc-desc.c, openrisc-desc.h, openrisc-dis.c,
810 openrisc-ibld.c, openrisc-opc.c, openrisc-opc.h, opintl.h,
811 or32-dis.c, or32-opc.c, pdp11-dis.c, pdp11-opc.c, pj-dis.c,
812 pj-opc.c, ppc-dis.c, ppc-opc.c, s390-dis.c, s390-mkopc.c,
813 s390-opc.c, sh-dis.c, sh-opc.h, sh64-dis.c, sh64-opc.c,
814 sh64-opc.h, sparc-dis.c, sparc-opc.c, sysdep.h, tic30-dis.c,
815 tic4x-dis.c, tic54x-dis.c, tic54x-opc.c, tic80-dis.c, tic80-opc.c,
816 v850-dis.c, v850-opc.c, vax-dis.c, w65-dis.c, w65-opc.h,
817 xstormy16-asm.c, xstormy16-desc.c, xstormy16-desc.h,
818 xstormy16-dis.c, xstormy16-ibld.c, xstormy16-opc.c,
819 xstormy16-opc.h, xtensa-dis.c, z8k-dis.c, z8kgen.c
820
821 2005-05-05 James E Wilson <wilson@specifixinc.com>
822
823 * ia64-opc.c: Include sysdep.h before libiberty.h.
824
825 2005-05-05 Nick Clifton <nickc@redhat.com>
826
827 * configure.in (ALL_LINGUAS): Add vi.
828 * configure: Regenerate.
829 * po/vi.po: New.
830
831 2005-04-26 Jerome Guitton <guitton@gnat.com>
832
833 * configure.in: Fix the check for basename declaration.
834 * configure: Regenerate.
835
836 2005-04-19 Alan Modra <amodra@bigpond.net.au>
837
838 * ppc-opc.c (RTO): Define.
839 (powerpc_opcodes <tlbsx, tlbsx., tlbre>): Combine PPC403 and BOOKE
840 entries to suit PPC440.
841
842 2005-04-18 Mark Kettenis <kettenis@gnu.org>
843
844 * i386-dis.c: Insert hyphens into selected VIA PadLock extensions.
845 Add xcrypt-ctr.
846
847 2005-04-14 Nick Clifton <nickc@redhat.com>
848
849 * po/fi.po: New translation: Finnish.
850 * configure.in (ALL_LINGUAS): Add fi.
851 * configure: Regenerate.
852
853 2005-04-14 Alan Modra <amodra@bigpond.net.au>
854
855 * Makefile.am (NO_WERROR): Define.
856 * configure.in: Invoke AM_BINUTILS_WARNINGS.
857 * Makefile.in: Regenerate.
858 * aclocal.m4: Regenerate.
859 * configure: Regenerate.
860
861 2005-04-04 Nick Clifton <nickc@redhat.com>
862
863 * fr30-asm.c: Regenerate.
864 * frv-asm.c: Regenerate.
865 * iq2000-asm.c: Regenerate.
866 * m32r-asm.c: Regenerate.
867 * openrisc-asm.c: Regenerate.
868
869 2005-04-01 Jan Beulich <jbeulich@novell.com>
870
871 * i386-dis.c (PNI_Fixup): Neither mwait nor monitor have any
872 visible operands in Intel mode. The first operand of monitor is
873 %rax in 64-bit mode.
874
875 2005-04-01 Jan Beulich <jbeulich@novell.com>
876
877 * i386-dis.c (INVLPG_Fixup): Decode rdtscp; change code to allow for
878 easier future additions.
879
880 2005-03-31 Jerome Guitton <guitton@gnat.com>
881
882 * configure.in: Check for basename.
883 * configure: Regenerate.
884 * config.in: Ditto.
885
886 2005-03-29 H.J. Lu <hongjiu.lu@intel.com>
887
888 * i386-dis.c (SEG_Fixup): New.
889 (Sv): New.
890 (dis386): Use "Sv" for 0x8c and 0x8e.
891
892 2005-03-21 Jan-Benedict Glaw <jbglaw@lug-owl.de>
893 Nick Clifton <nickc@redhat.com>
894
895 * vax-dis.c: (entry_addr): New varible: An array of user supplied
896 function entry mask addresses.
897 (entry_addr_occupied_slots): New variable: The number of occupied
898 elements in entry_addr.
899 (entry_addr_total_slots): New variable: The total number of
900 elements in entry_addr.
901 (parse_disassembler_options): New function. Fills in the entry_addr
902 array.
903 (free_entry_array): New function. Release the memory used by the
904 entry addr array. Suppressed because there is no way to call it.
905 (is_function_entry): Check if a given address is a function's
906 start address by looking at supplied entry mask addresses and
907 symbol information, if available.
908 (print_insn_vax): Use parse_disassembler_options and is_function_entry.
909
910 2005-03-23 H.J. Lu <hongjiu.lu@intel.com>
911
912 * cris-dis.c (print_with_operands): Use ~31L for long instead
913 of ~31.
914
915 2005-03-20 H.J. Lu <hongjiu.lu@intel.com>
916
917 * mmix-opc.c (O): Revert the last change.
918 (Z): Likewise.
919
920 2005-03-19 H.J. Lu <hongjiu.lu@intel.com>
921
922 * mmix-opc.c (O): Use 24UL instead of 24 for unsigned long.
923 (Z): Likewise.
924
925 2005-03-19 Hans-Peter Nilsson <hp@bitrange.com>
926
927 * mmix-opc.c (O, Z): Force expression as unsigned long.
928
929 2005-03-18 Nick Clifton <nickc@redhat.com>
930
931 * ip2k-asm.c: Regenerate.
932 * op/opcodes.pot: Regenerate.
933
934 2005-03-16 Nick Clifton <nickc@redhat.com>
935 Ben Elliston <bje@au.ibm.com>
936
937 * configure.in (werror): New switch: Add -Werror to the
938 compiler command line. Enabled by default. Disable via
939 --disable-werror.
940 * configure: Regenerate.
941
942 2005-03-16 Alan Modra <amodra@bigpond.net.au>
943
944 * ppc-dis.c (powerpc_dialect): Don't set PPC_OPCODE_ALTIVEC when
945 BOOKE.
946
947 2005-03-15 Alan Modra <amodra@bigpond.net.au>
948
949 * po/es.po: Commit new Spanish translation.
950
951 * po/fr.po: Commit new French translation.
952
953 2005-03-14 Jan-Benedict Glaw <jbglaw@lug-owl.de>
954
955 * vax-dis.c: Fix spelling error
956 (print_insn_vax): Use ".word 0x0012 # Entry mask: r1 r2 >" instead
957 of just "Entry mask: < r1 ... >"
958
959 2005-03-12 Zack Weinberg <zack@codesourcery.com>
960
961 * arm-dis.c (arm_opcodes): Document %E and %V.
962 Add entries for v6T2 ARM instructions:
963 bfc bfi mls strht ldrht ldrsht ldrsbt movw movt rbit ubfx sbfx.
964 (print_insn_arm): Add support for %E and %V.
965 (thumb_opcodes): Add ARMv6K instructions nop, sev, wfe, wfi, yield.
966
967 2005-03-10 Jeff Baker <jbaker@qnx.com>
968 Alan Modra <amodra@bigpond.net.au>
969
970 * ppc-opc.c (insert_sprg, extract_sprg): New Functions.
971 (powerpc_operands <SPRG>): Call the above. Bit field is 5 bits.
972 (SPRG_MASK): Delete.
973 (XSPRG_MASK): Mask off extra bits now part of sprg field.
974 (powerpc_opcodes): Asjust mfsprg and mtsprg to suit new mask. Move
975 mfsprg4..7 after msprg and consolidate.
976
977 2005-03-09 Jan-Benedict Glaw <jbglaw@lug-owl.de>
978
979 * vax-dis.c (entry_mask_bit): New array.
980 (print_insn_vax): Decode function entry mask.
981
982 2005-03-07 Aldy Hernandez <aldyh@redhat.com>
983
984 * ppc-opc.c (powerpc_opcodes): Fix encoding of efscfd.
985
986 2005-03-05 Alan Modra <amodra@bigpond.net.au>
987
988 * po/opcodes.pot: Regenerate.
989
990 2005-03-03 Ramana Radhakrishnan <ramana.radhakrishnan@codito.com>
991
992 * arc-dis.c (a4_decoding_class): New enum.
993 (dsmOneArcInst): Use the enum values for the decoding class.
994 Remove redundant case in the switch for decodingClass value 11.
995
996 2005-03-02 Jan Beulich <jbeulich@novell.com>
997
998 * i386-dis.c (print_insn): Suppress lock prefix printing for cr8...15
999 accesses.
1000 (OP_C): Consider lock prefix in non-64-bit modes.
1001
1002 2005-02-24 Alan Modra <amodra@bigpond.net.au>
1003
1004 * cris-dis.c (format_hex): Remove ineffective warning fix.
1005 * crx-dis.c (make_instruction): Warning fix.
1006 * frv-asm.c: Regenerate.
1007
1008 2005-02-23 Nick Clifton <nickc@redhat.com>
1009
1010 * cgen-dis.in: Use bfd_byte for buffers that are passed to
1011 read_memory.
1012
1013 * ia64-opc.c (locate_opcode_ent): Initialise opval array.
1014
1015 * crx-dis.c (make_instruction): Move argument structure into inner
1016 scope and ensure that all of its fields are initialised before
1017 they are used.
1018
1019 * fr30-asm.c: Regenerate.
1020 * fr30-dis.c: Regenerate.
1021 * frv-asm.c: Regenerate.
1022 * frv-dis.c: Regenerate.
1023 * ip2k-asm.c: Regenerate.
1024 * ip2k-dis.c: Regenerate.
1025 * iq2000-asm.c: Regenerate.
1026 * iq2000-dis.c: Regenerate.
1027 * m32r-asm.c: Regenerate.
1028 * m32r-dis.c: Regenerate.
1029 * openrisc-asm.c: Regenerate.
1030 * openrisc-dis.c: Regenerate.
1031 * xstormy16-asm.c: Regenerate.
1032 * xstormy16-dis.c: Regenerate.
1033
1034 2005-02-22 Alan Modra <amodra@bigpond.net.au>
1035
1036 * arc-ext.c: Warning fixes.
1037 * arc-ext.h: Likewise.
1038 * cgen-opc.c: Likewise.
1039 * ia64-gen.c: Likewise.
1040 * maxq-dis.c: Likewise.
1041 * ns32k-dis.c: Likewise.
1042 * w65-dis.c: Likewise.
1043 * ia64-asmtab.c: Regenerate.
1044
1045 2005-02-22 Alan Modra <amodra@bigpond.net.au>
1046
1047 * fr30-desc.c: Regenerate.
1048 * fr30-desc.h: Regenerate.
1049 * fr30-opc.c: Regenerate.
1050 * fr30-opc.h: Regenerate.
1051 * frv-desc.c: Regenerate.
1052 * frv-desc.h: Regenerate.
1053 * frv-opc.c: Regenerate.
1054 * frv-opc.h: Regenerate.
1055 * ip2k-desc.c: Regenerate.
1056 * ip2k-desc.h: Regenerate.
1057 * ip2k-opc.c: Regenerate.
1058 * ip2k-opc.h: Regenerate.
1059 * iq2000-desc.c: Regenerate.
1060 * iq2000-desc.h: Regenerate.
1061 * iq2000-opc.c: Regenerate.
1062 * iq2000-opc.h: Regenerate.
1063 * m32r-desc.c: Regenerate.
1064 * m32r-desc.h: Regenerate.
1065 * m32r-opc.c: Regenerate.
1066 * m32r-opc.h: Regenerate.
1067 * m32r-opinst.c: Regenerate.
1068 * openrisc-desc.c: Regenerate.
1069 * openrisc-desc.h: Regenerate.
1070 * openrisc-opc.c: Regenerate.
1071 * openrisc-opc.h: Regenerate.
1072 * xstormy16-desc.c: Regenerate.
1073 * xstormy16-desc.h: Regenerate.
1074 * xstormy16-opc.c: Regenerate.
1075 * xstormy16-opc.h: Regenerate.
1076
1077 2005-02-21 Alan Modra <amodra@bigpond.net.au>
1078
1079 * Makefile.am: Run "make dep-am"
1080 * Makefile.in: Regenerate.
1081
1082 2005-02-15 Nick Clifton <nickc@redhat.com>
1083
1084 * cgen-dis.in (print_address): Add an ATTRIBUTE_UNUSED to prevent
1085 compile time warnings.
1086 (print_keyword): Likewise.
1087 (default_print_insn): Likewise.
1088
1089 * fr30-desc.c: Regenerated.
1090 * fr30-desc.h: Regenerated.
1091 * fr30-dis.c: Regenerated.
1092 * fr30-opc.c: Regenerated.
1093 * fr30-opc.h: Regenerated.
1094 * frv-desc.c: Regenerated.
1095 * frv-dis.c: Regenerated.
1096 * frv-opc.c: Regenerated.
1097 * ip2k-asm.c: Regenerated.
1098 * ip2k-desc.c: Regenerated.
1099 * ip2k-desc.h: Regenerated.
1100 * ip2k-dis.c: Regenerated.
1101 * ip2k-opc.c: Regenerated.
1102 * ip2k-opc.h: Regenerated.
1103 * iq2000-desc.c: Regenerated.
1104 * iq2000-dis.c: Regenerated.
1105 * iq2000-opc.c: Regenerated.
1106 * m32r-asm.c: Regenerated.
1107 * m32r-desc.c: Regenerated.
1108 * m32r-desc.h: Regenerated.
1109 * m32r-dis.c: Regenerated.
1110 * m32r-opc.c: Regenerated.
1111 * m32r-opc.h: Regenerated.
1112 * m32r-opinst.c: Regenerated.
1113 * openrisc-desc.c: Regenerated.
1114 * openrisc-desc.h: Regenerated.
1115 * openrisc-dis.c: Regenerated.
1116 * openrisc-opc.c: Regenerated.
1117 * openrisc-opc.h: Regenerated.
1118 * xstormy16-desc.c: Regenerated.
1119 * xstormy16-desc.h: Regenerated.
1120 * xstormy16-dis.c: Regenerated.
1121 * xstormy16-opc.c: Regenerated.
1122 * xstormy16-opc.h: Regenerated.
1123
1124 2005-02-14 H.J. Lu <hongjiu.lu@intel.com>
1125
1126 * dis-buf.c (perror_memory): Use sprintf_vma to print out
1127 address.
1128
1129 2005-02-11 Nick Clifton <nickc@redhat.com>
1130
1131 * iq2000-asm.c: Regenerate.
1132
1133 * frv-dis.c: Regenerate.
1134
1135 2005-02-07 Jim Blandy <jimb@redhat.com>
1136
1137 * Makefile.am (CGEN): Load guile.scm before calling the main
1138 application script.
1139 * Makefile.in: Regenerated.
1140 * cgen.sh: Be prepared for the 'cgen' argument to contain spaces.
1141 Simply pass the cgen-opc.scm path to ${cgen} as its first
1142 argument; ${cgen} itself now contains the '-s', or whatever is
1143 appropriate for the Scheme being used.
1144
1145 2005-01-31 Andrew Cagney <cagney@gnu.org>
1146
1147 * configure: Regenerate to track ../gettext.m4.
1148
1149 2005-01-31 Jan Beulich <jbeulich@novell.com>
1150
1151 * ia64-gen.c (NELEMS): Define.
1152 (shrink): Generate alias with missing second predicate register when
1153 opcode has two outputs and these are both predicates.
1154 * ia64-opc-i.c (FULL17): Define.
1155 (ia64_opcodes_i): Add mov-to-pr alias without second input. Use FULL17
1156 here to generate output template.
1157 (TBITCM, TNATCM): Undefine after use.
1158 * ia64-opc-m.c (ia64_opcodes_i): Add alloc alias without ar.pfs as
1159 first input. Add ld16 aliases without ar.csd as second output. Add
1160 st16 aliases without ar.csd as second input. Add cmpxchg aliases
1161 without ar.ccv as third input. Add cmp8xchg16 aliases without ar.csd/
1162 ar.ccv as third/fourth inputs. Consolidate through...
1163 (CMPXCHG_acq, CMPXCHG_rel, CMPXCHG_1, CMPXCHG_2, CMPXCHG_4, CMPXCHG_8,
1164 CMPXCHGn, CMP8XCHG16, CMPXCHG_ALL): Define.
1165 * ia64-asmtab.c: Regenerate.
1166
1167 2005-01-27 Andrew Cagney <cagney@gnu.org>
1168
1169 * configure: Regenerate to track ../gettext.m4 change.
1170
1171 2005-01-25 Alexandre Oliva <aoliva@redhat.com>
1172
1173 2004-11-10 Alexandre Oliva <aoliva@redhat.com>
1174 * frv-asm.c: Rebuilt.
1175 * frv-desc.c: Rebuilt.
1176 * frv-desc.h: Rebuilt.
1177 * frv-dis.c: Rebuilt.
1178 * frv-ibld.c: Rebuilt.
1179 * frv-opc.c: Rebuilt.
1180 * frv-opc.h: Rebuilt.
1181
1182 2005-01-24 Andrew Cagney <cagney@gnu.org>
1183
1184 * configure: Regenerate, ../gettext.m4 was updated.
1185
1186 2005-01-21 Fred Fish <fnf@specifixinc.com>
1187
1188 * mips-opc.c: Change INSN_ALIAS to INSN2_ALIAS.
1189 Change INSN_WRITE_MDMX_ACC to INSN2_WRITE_MDMX_ACC.
1190 Change INSN_READ_MDMX_ACC to INSN2_READ_MDMX_ACC.
1191 * mips-dis.c: Ditto.
1192
1193 2005-01-20 Alan Modra <amodra@bigpond.net.au>
1194
1195 * ppc-opc.c (powerpc_opcodes): Add optional 'l' arg to tlbiel.
1196
1197 2005-01-19 Fred Fish <fnf@specifixinc.com>
1198
1199 * mips-dis.c (no_aliases): New disassembly option flag.
1200 (set_default_mips_dis_options): Init no_aliases to zero.
1201 (parse_mips_dis_option): Handle no-aliases option.
1202 (print_insn_mips): Ignore table entries that are aliases
1203 if no_aliases is set.
1204 (print_insn_mips16): Ditto.
1205 * mips-opc.c (mips_builtin_opcodes): Add initializer column for
1206 new pinfo2 member and add INSN_ALIAS initializers as needed. Also
1207 move WR_MACC and RD_MACC initializers from pinfo to pinfo2.
1208 * mips16-opc.c (mips16_opcodes): Ditto.
1209
1210 2005-01-17 Andrew Stubbs <andrew.stubbs@st.com>
1211
1212 * sh-opc.h (arch_sh2a_or_sh3e,arch_sh2a_or_sh4): Correct definition.
1213 (inheritance diagram): Add missing edge.
1214 (arch_sh1_up): Rename arch_sh_up to match external name to make life
1215 easier for the testsuite.
1216 (arch_sh4_nofp_up): Likewise, rename arch_sh4_nofpu_up.
1217 (arch_sh4a_nofp_up): Likewise, rename arch_sh4a_nofpu_up.
1218 (arch_sh2a_nofpu_or_sh4_nommu_nofpu_up): Add missing
1219 arch_sh2a_or_sh4_up child.
1220 (sh_table): Do renaming as above.
1221 Correct comment for ldc.l for gas testsuite to read.
1222 Remove rogue mul.l from sh1 (duplicate of the one for sh2).
1223 Correct comments for movy.w and movy.l for gas testsuite to read.
1224 Correct comments for fmov.d and fmov.s for gas testsuite to read.
1225
1226 2005-01-12 H.J. Lu <hongjiu.lu@intel.com>
1227
1228 * i386-dis.c (OP_E): Don't ignore scale in SIB for 64 bit mode.
1229
1230 2005-01-12 H.J. Lu <hongjiu.lu@intel.com>
1231
1232 * i386-dis.c (OP_E): Ignore scale when index == 0x4 in SIB.
1233
1234 2005-01-10 Andreas Schwab <schwab@suse.de>
1235
1236 * disassemble.c (disassemble_init_for_target) <case
1237 bfd_arch_ia64>: Set skip_zeroes to 16.
1238 <case bfd_arch_tic4x>: Set skip_zeroes to 32.
1239
1240 2004-12-23 Tomer Levi <Tomer.Levi@nsc.com>
1241
1242 * crx-opc.c: Mark 'bcop' instruction as RELAXABLE.
1243
1244 2004-12-14 Svein E. Seldal <Svein.Seldal@solidas.com>
1245
1246 * avr-dis.c: Prettyprint. Added printing of symbol names in all
1247 memory references. Convert avr_operand() to C90 formatting.
1248
1249 2004-12-05 Tomer Levi <Tomer.Levi@nsc.com>
1250
1251 * crx-dis.c (print_arg): Use 'info->print_address_func' for address printing.
1252
1253 2004-11-29 Tomer Levi <Tomer.Levi@nsc.com>
1254
1255 * crx-opc.c (crx_optab): Mark all rbase_disps* operands as signed.
1256 (no_op_insn): Initialize array with instructions that have no
1257 operands.
1258 * crx-dis.c (make_instruction): Get rid of COP_BRANCH_INS operand swapping.
1259
1260 2004-11-29 Richard Earnshaw <rearnsha@arm.com>
1261
1262 * arm-dis.c: Correct top-level comment.
1263
1264 2004-11-27 Richard Earnshaw <rearnsha@arm.com>
1265
1266 * arm-opc.h (arm_opcode, thumb_opcode): Add extra field for the
1267 architecuture defining the insn.
1268 (arm_opcodes, thumb_opcodes): Delete. Move to ...
1269 * arm-dis.c (arm_opcodes, thumb_opcodes): Here. Add architecutre
1270 field.
1271 Also include opcode/arm.h.
1272 * Makefile.am (arm-dis.lo): Update dependency list.
1273 * Makefile.in: Regenerate.
1274
1275 2004-11-22 Ravi Ramaseshan <ravi.ramaseshan@codito.com>
1276
1277 * opcode/arc-opc.c (insert_base): Modify ls_operand[LS_OFFSET] to
1278 reflect the change to the short immediate syntax.
1279
1280 2004-11-19 Alan Modra <amodra@bigpond.net.au>
1281
1282 * or32-opc.c (debug): Warning fix.
1283 * po/POTFILES.in: Regenerate.
1284
1285 * maxq-dis.c: Formatting.
1286 (print_insn): Warning fix.
1287
1288 2004-11-17 Daniel Jacobowitz <dan@codesourcery.com>
1289
1290 * arm-dis.c (WORD_ADDRESS): Define.
1291 (print_insn): Use it. Correct big-endian end-of-section handling.
1292
1293 2004-11-08 Inderpreet Singh <inderpreetb@nioda.hcltech.com>
1294 Vineet Sharma <vineets@noida.hcltech.com>
1295
1296 * maxq-dis.c: New file.
1297 * disassemble.c (ARCH_maxq): Define.
1298 (disassembler): Add 'print_insn_maxq_little' for handling maxq
1299 instructions..
1300 * configure.in: Add case for bfd_maxq_arch.
1301 * configure: Regenerate.
1302 * Makefile.am: Add support for maxq-dis.c
1303 * Makefile.in: Regenerate.
1304 * aclocal.m4: Regenerate.
1305
1306 2004-11-05 Tomer Levi <Tomer.Levi@nsc.com>
1307
1308 * crx-opc.c (crx_optab): Rename 'arg_icr' to 'arg_idxr' for Index register
1309 mode.
1310 * crx-dis.c: Likewise.
1311
1312 2004-11-04 Hans-Peter Nilsson <hp@axis.com>
1313
1314 Generally, handle CRISv32.
1315 * cris-dis.c (TRACE_CASE): Define as (disdata->trace_case).
1316 (struct cris_disasm_data): New type.
1317 (format_reg, format_hex, cris_constraint, print_flags)
1318 (get_opcode_entry): Add struct cris_disasm_data * parameter. All
1319 callers changed.
1320 (format_sup_reg, print_insn_crisv32_with_register_prefix)
1321 (print_insn_crisv32_without_register_prefix)
1322 (print_insn_crisv10_v32_with_register_prefix)
1323 (print_insn_crisv10_v32_without_register_prefix)
1324 (cris_parse_disassembler_options): New functions.
1325 (bytes_to_skip, cris_spec_reg): Add enum cris_disass_family
1326 parameter. All callers changed.
1327 (get_opcode_entry): Call malloc, not xmalloc. Return NULL on
1328 failure.
1329 (cris_constraint) <case 'Y', 'U'>: New cases.
1330 (bytes_to_skip): Handle 'Y' and 'N' as 's'. Skip size is 4 bytes
1331 for constraint 'n'.
1332 (print_with_operands) <case 'Y'>: New case.
1333 (print_with_operands) <case 'T', 'A', '[', ']', 'd', 'n', 'u'>
1334 <case 'N', 'Y', 'Q'>: New cases.
1335 (print_insn_cris_generic): Emit "bcc ." for zero and CRISv32.
1336 (print_insn_cris_with_register_prefix)
1337 (print_insn_cris_without_register_prefix): Call
1338 cris_parse_disassembler_options.
1339 * cris-opc.c (cris_spec_regs): Mention that this table isn't used
1340 for CRISv32 and the size of immediate operands. New v32-only
1341 entries for bz, pid, srs, wz, exs, eda, dz, ebp, erp, nrp, ccs and
1342 spc. Add v32-only 4-byte entries for p2, p3, p5 and p6. Change
1343 ccr, ibr, irp to be v0..v10. Change bar, dccr to be v8..v10.
1344 Change brp to be v3..v10.
1345 (cris_support_regs): New vector.
1346 (cris_opcodes): Update head comment. New format characters '[',
1347 ']', space, 'A', 'd', 'N', 'n', 'Q', 'T', 'u', 'U', 'Y'.
1348 Add new opcodes for v32 and adjust existing opcodes to accommodate
1349 differences to earlier variants.
1350 (cris_cond15s): New vector.
1351
1352 2004-11-04 Jan Beulich <jbeulich@novell.com>
1353
1354 * i386-dis.c (Eq, Edqw, indirEp, Gdq, I1): Define.
1355 (indirEb): Remove.
1356 (Mp): Use f_mode rather than none at all.
1357 (t_mode, dq_mode, dqw_mode, f_mode, const_1_mode): Define. t_mode
1358 replaces what previously was x_mode; x_mode now means 128-bit SSE
1359 operands.
1360 (dis386): Make far jumps and calls have an 'l' prefix only in AT&T
1361 mode. movmskpX's, pextrw's, and pmovmskb's first operands are Gdq.
1362 pinsrw's second operand is Edqw.
1363 (grps): 1-bit shifts' and rotates' second operands are I1. cmpxchg8b's
1364 operand is Eq. movntq's and movntdq's first operands are EM. s[gi]dt,
1365 fldenv, frstor, fsave, fstenv all should also have suffixes in Intel
1366 mode when an operand size override is present or always suffixing.
1367 More instructions will need to be added to this group.
1368 (putop): Handle new macro chars 'C' (short/long suffix selector),
1369 'I' (Intel mode override for following macro char), and 'J' (for
1370 adding the 'l' prefix to far branches in AT&T mode). When an
1371 alternative was specified in the template, honor macro character when
1372 specified for Intel mode.
1373 (OP_E): Handle new *_mode values. Correct pointer specifications for
1374 memory operands. Consolidate output of index register.
1375 (OP_G): Handle new *_mode values.
1376 (OP_I): Handle const_1_mode.
1377 (OP_ESreg, OP_DSreg): Generate pointer specifications. Indicate
1378 respective opcode prefix bits have been consumed.
1379 (OP_EM, OP_EX): Provide some default handling for generating pointer
1380 specifications.
1381
1382 2004-10-28 Tomer Levi <Tomer.Levi@nsc.com>
1383
1384 * crx-opc.c (REV_COP_INST): New macro, reverse operand order of
1385 COP_INST macro.
1386
1387 2004-10-27 Tomer Levi <Tomer.Levi@nsc.com>
1388
1389 * crx-dis.c (enum REG_ARG_TYPE): New, replacing COP_ARG_TYPE.
1390 (getregliststring): Support HI/LO and user registers.
1391 * crx-opc.c (crx_instruction): Update data structure according to the
1392 rearrangement done in CRX opcode header file.
1393 (crx_regtab): Likewise.
1394 (crx_optab): Likewise.
1395 (crx_instruction): Reorder load/stor instructions, remove unsupported
1396 formats.
1397 support new Co-Processor instruction 'cpi'.
1398
1399 2004-10-27 Nick Clifton <nickc@redhat.com>
1400
1401 * opcodes/iq2000-asm.c: Regenerate.
1402 * opcodes/iq2000-desc.c: Regenerate.
1403 * opcodes/iq2000-desc.h: Regenerate.
1404 * opcodes/iq2000-dis.c: Regenerate.
1405 * opcodes/iq2000-ibld.c: Regenerate.
1406 * opcodes/iq2000-opc.c: Regenerate.
1407 * opcodes/iq2000-opc.h: Regenerate.
1408
1409 2004-10-21 Tomer Levi <Tomer.Levi@nsc.com>
1410
1411 * crx-opc.c (crx_instruction): Replace i3, i4, i5 with us3,
1412 us4, us5 (respectively).
1413 Remove unsupported 'popa' instruction.
1414 Reverse operands order in store co-processor instructions.
1415
1416 2004-10-15 Alan Modra <amodra@bigpond.net.au>
1417
1418 * Makefile.am: Run "make dep-am"
1419 * Makefile.in: Regenerate.
1420
1421 2004-10-12 Bob Wilson <bob.wilson@acm.org>
1422
1423 * xtensa-dis.c: Use ISO C90 formatting.
1424
1425 2004-10-09 Alan Modra <amodra@bigpond.net.au>
1426
1427 * ppc-opc.c: Revert 2004-09-09 change.
1428
1429 2004-10-07 Bob Wilson <bob.wilson@acm.org>
1430
1431 * xtensa-dis.c (state_names): Delete.
1432 (fetch_data): Use xtensa_isa_maxlength.
1433 (print_xtensa_operand): Replace operand parameter with opcode/operand
1434 pair. Remove print_sr_name parameter. Use new xtensa-isa.h functions.
1435 (print_insn_xtensa): Use new xtensa-isa.h functions. Handle multislot
1436 instruction bundles. Use xmalloc instead of malloc.
1437
1438 2004-10-07 David Gibson <david@gibson.dropbear.id.au>
1439
1440 * ppc-opc.c: Replace literal "0"s with NULLs in pointer
1441 initializers.
1442
1443 2004-10-07 Tomer Levi <Tomer.Levi@nsc.com>
1444
1445 * crx-opc.c (crx_instruction): Support Co-processor insns.
1446 * crx-dis.c (COP_ARG_TYPE): New enum for CO-Processor arguments.
1447 (getregliststring): Change function to use the above enum.
1448 (print_arg): Handle CO-Processor insns.
1449 (crx_cinvs): Add 'b' option to invalidate the branch-target
1450 cache.
1451
1452 2004-10-06 Aldy Hernandez <aldyh@redhat.com>
1453
1454 * ppc-opc.c (powerpc_opcodes): Add efscfd, efdabs, efdnabs,
1455 efdneg, efdadd, efdsub, efdmul, efddiv, efdcmpgt, efdcmplt,
1456 efdcmpeq, efdtstgt, efdtstlt, efdtsteq, efdcfsi, efdcfsid,
1457 efdcfui, efdcfuid, efdcfsf, efdcfuf, efdctsi, efdctsidz, efdctsiz,
1458 efdctui, efdctuidz, efdctuiz, efdctsf, efdctuf, efdctuf, efdcfs.
1459
1460 2004-10-01 Bill Farmer <Bill@the-farmers.freeserve.co.uk>
1461
1462 * pdp11-dis.c (print_insn_pdp11): Subtract the SOB's displacement
1463 rather than add it.
1464
1465 2004-09-30 Paul Brook <paul@codesourcery.com>
1466
1467 * arm-dis.c (print_insn_arm): Handle 'e' for SMI instruction.
1468 * arm-opc.h: Document %e. Add ARMv6ZK instructions.
1469
1470 2004-09-17 H.J. Lu <hongjiu.lu@intel.com>
1471
1472 * Makefile.am (AUTOMAKE_OPTIONS): Require 1.9.
1473 (CONFIG_STATUS_DEPENDENCIES): New.
1474 (Makefile): Removed.
1475 (config.status): Likewise.
1476 * Makefile.in: Regenerated.
1477
1478 2004-09-17 Alan Modra <amodra@bigpond.net.au>
1479
1480 * Makefile.am: Run "make dep-am".
1481 * Makefile.in: Regenerate.
1482 * aclocal.m4: Regenerate.
1483 * configure: Regenerate.
1484 * po/POTFILES.in: Regenerate.
1485 * po/opcodes.pot: Regenerate.
1486
1487 2004-09-11 Andreas Schwab <schwab@suse.de>
1488
1489 * configure: Rebuild.
1490
1491 2004-09-09 Segher Boessenkool <segher@kernel.crashing.org>
1492
1493 * ppc-opc.c (L): Make this field not optional.
1494
1495 2004-09-03 Tomer Levi <Tomer.Levi@nsc.com>
1496
1497 * opc-crx.c: Rename 'popma' to 'popa', remove 'pushma'.
1498 Fix parameter to 'm[t|f]csr' insns.
1499
1500 2004-08-30 Nathanael Nerode <neroden@gcc.gnu.org>
1501
1502 * configure.in: Autoupdate to autoconf 2.59.
1503 * aclocal.m4: Rebuild with aclocal 1.4p6.
1504 * configure: Rebuild with autoconf 2.59.
1505 * Makefile.in: Rebuild with automake 1.4p6 (picking up
1506 bfd changes for autoconf 2.59 on the way).
1507 * config.in: Rebuild with autoheader 2.59.
1508
1509 2004-08-27 Richard Sandiford <rsandifo@redhat.com>
1510
1511 * frv-desc.[ch], frv-opc.[ch]: Regenerated.
1512
1513 2004-07-30 Michal Ludvig <mludvig@suse.cz>
1514
1515 * i386-dis.c (GRPPADLCK): Renamed to GRPPADLCK1
1516 (GRPPADLCK2): New define.
1517 (twobyte_has_modrm): True for 0xA6.
1518 (grps): GRPPADLCK2 for opcode 0xA6.
1519
1520 2004-07-29 Alexandre Oliva <aoliva@redhat.com>
1521
1522 Introduce SH2a support.
1523 * sh-opc.h (arch_sh2a_base): Renumber.
1524 (arch_sh2a_nofpu_base): Remove.
1525 (arch_sh_base_mask): Adjust.
1526 (arch_opann_mask): New.
1527 (arch_sh2a, arch_sh2a_nofpu): Adjust.
1528 (arch_sh2a_up, arch_sh2a_nofpu_up): Likewise.
1529 (sh_table): Adjust whitespace.
1530 2004-02-24 Corinna Vinschen <vinschen@redhat.com>
1531 * sh-opc.h (arch_sh2a_nofpu_up): New. Use instead of arch_sh2a_up in
1532 instruction list throughout.
1533 (arch_sh2a_up): Redefine to include fpu instruction set. Use instead
1534 of arch_sh2a in instruction list throughout.
1535 (arch_sh2e_up): Accomodate above changes.
1536 (arch_sh2_up): Ditto.
1537 2004-02-20 Corinna Vinschen <vinschen@redhat.com>
1538 * sh-opc.h: Add arch_sh2a_nofpu to arch_sh2_up.
1539 2004-02-18 Corinna Vinschen <vinschen@redhat.com>
1540 * sh-dis.c (print_insn_sh): Add bfd_mach_sh2a_nofpu handling.
1541 * sh-opc.h (arch_sh2a_nofpu): New.
1542 (arch_sh2a_up): New, defines sh2a and sh2a_nofpu.
1543 (sh_table): Change all arch_sh2a to arch_sh2a_up unless FPU
1544 instruction.
1545 2004-01-20 DJ Delorie <dj@redhat.com>
1546 * sh-dis.c (print_insn_sh): SH2A does not have 'X' fp regs.
1547 2003-12-29 DJ Delorie <dj@redhat.com>
1548 * sh-opc.c (sh_nibble_type, sh_arg_type, arch_2a, arch_2e_up,
1549 sh_opcode_info, sh_table): Add sh2a support.
1550 (arch_op32): New, to tag 32-bit opcodes.
1551 * sh-dis.c (print_insn_sh): Support sh2a opcodes.
1552 2003-12-02 Michael Snyder <msnyder@redhat.com>
1553 * sh-opc.h (arch_sh2a): Add.
1554 * sh-dis.c (arch_sh2a): Handle.
1555 * sh-opc.h (arch_sh2_up): Fix up to include arch_sh2a.
1556
1557 2004-07-27 Tomer Levi <Tomer.Levi@nsc.com>
1558
1559 * crx-opc.c: Add popx,pushx insns. Indent code, fix comments.
1560
1561 2004-07-22 Nick Clifton <nickc@redhat.com>
1562
1563 PR/280
1564 * h8300-dis.c (bfd_h8_disassemble): Do not dump raw bytes for the
1565 insns - this is done by objdump itself.
1566 * h8500-dis.c (print_insn_h8500): Likewise.
1567
1568 2004-07-21 Jan Beulich <jbeulich@novell.com>
1569
1570 * i386-dis.c (OP_E): Show rip-relative addressing in 64-bit mode
1571 regardless of address size prefix in effect.
1572 (ptr_reg): Size or address registers does not depend on rex64, but
1573 on the presence of an address size override.
1574 (OP_MMX): Use rex.x only for xmm registers.
1575 (OP_EM): Use rex.z only for xmm registers.
1576
1577 2004-07-20 Maciej W. Rozycki <macro@linux-mips.org>
1578
1579 * mips-opc.c (mips_builtin_opcodes): Move coprocessor 2
1580 move/branch operations to the bottom so that VR5400 multimedia
1581 instructions take precedence in disassembly.
1582
1583 2004-07-20 Maciej W. Rozycki <macro@linux-mips.org>
1584
1585 * mips-opc.c (mips_builtin_opcodes): Remove the MIPS32
1586 ISA-specific "break" encoding.
1587
1588 2004-07-13 Elvis Chiang <elvisfb@gmail.com>
1589
1590 * arm-opc.h: Fix typo in comment.
1591
1592 2004-07-11 Andreas Schwab <schwab@suse.de>
1593
1594 * m68k-dis.c (m68k_valid_ea): Fix typos in last change.
1595
1596 2004-07-09 Andreas Schwab <schwab@suse.de>
1597
1598 * m68k-dis.c (m68k_valid_ea): Check validity of all codes.
1599
1600 2004-07-07 Tomer Levi <Tomer.Levi@nsc.com>
1601
1602 * Makefile.am (CFILES): Add crx-dis.c, crx-opc.c.
1603 (ALL_MACHINES): Add crx-dis.lo, crx-opc.lo.
1604 (crx-dis.lo): New target.
1605 (crx-opc.lo): Likewise.
1606 * Makefile.in: Regenerate.
1607 * configure.in: Handle bfd_crx_arch.
1608 * configure: Regenerate.
1609 * crx-dis.c: New file.
1610 * crx-opc.c: New file.
1611 * disassemble.c (ARCH_crx): Define.
1612 (disassembler): Handle ARCH_crx.
1613
1614 2004-06-29 James E Wilson <wilson@specifixinc.com>
1615
1616 * ia64-opc-a.c (ia64_opcodes_a): Delete mov immediate pseudo for adds.
1617 * ia64-asmtab.c: Regnerate.
1618
1619 2004-06-28 Alan Modra <amodra@bigpond.net.au>
1620
1621 * ppc-opc.c (insert_fxm): Handle mfocrf and mtocrf.
1622 (extract_fxm): Don't test dialect.
1623 (XFXFXM_MASK): Include the power4 bit.
1624 (XFXM): Add p4 param.
1625 (powerpc_opcodes): Add mfocrf and mtocrf. Adjust mtcr.
1626
1627 2004-06-27 Alexandre Oliva <aoliva@redhat.com>
1628
1629 2003-07-21 Richard Sandiford <rsandifo@redhat.com>
1630 * disassemble.c (disassembler): Handle bfd_mach_h8300sxn.
1631
1632 2004-06-26 Alan Modra <amodra@bigpond.net.au>
1633
1634 * ppc-opc.c (BH, XLBH_MASK): Define.
1635 (powerpc_opcodes): Allow BH field on bclr, bclrl, bcctr, bcctrl.
1636
1637 2004-06-24 Alan Modra <amodra@bigpond.net.au>
1638
1639 * i386-dis.c (x_mode): Comment.
1640 (two_source_ops): File scope.
1641 (float_mem): Correct fisttpll and fistpll.
1642 (float_mem_mode): New table.
1643 (dofloat): Use it.
1644 (OP_E): Correct intel mode PTR output.
1645 (ptr_reg): Use open_char and close_char.
1646 (PNI_Fixup): Handle possible suffix on sidt. Use op1out etc. for
1647 operands. Set two_source_ops.
1648
1649 2004-06-15 Alan Modra <amodra@bigpond.net.au>
1650
1651 * arc-ext.c (build_ARC_extmap): Use bfd_get_section_size
1652 instead of _raw_size.
1653
1654 2004-06-08 Jakub Jelinek <jakub@redhat.com>
1655
1656 * ia64-gen.c (in_iclass): Handle more postinc st
1657 and ld variants.
1658 * ia64-asmtab.c: Rebuilt.
1659
1660 2004-06-01 Martin Schwidefsky <schwidefsky@de.ibm.com>
1661
1662 * s390-opc.txt: Correct architecture mask for some opcodes.
1663 lrv, lrvh, strv, ml, dl, alc, slb rll and mvclu are available
1664 in the esa mode as well.
1665
1666 2004-05-28 Andrew Stubbs <andrew.stubbs@superh.com>
1667
1668 * sh-dis.c (target_arch): Make unsigned.
1669 (print_insn_sh): Replace (most of) switch with a call to
1670 sh_get_arch_from_bfd_mach(). Also use new architecture flags system.
1671 * sh-opc.h: Redefine architecture flags values.
1672 Add sh3-nommu architecture.
1673 Reorganise <arch>_up macros so they make more visual sense.
1674 (SH_MERGE_ARCH_SET): Define new macro.
1675 (SH_VALID_BASE_ARCH_SET): Likewise.
1676 (SH_VALID_MMU_ARCH_SET): Likewise.
1677 (SH_VALID_CO_ARCH_SET): Likewise.
1678 (SH_VALID_ARCH_SET): Likewise.
1679 (SH_MERGE_ARCH_SET_VALID): Likewise.
1680 (SH_ARCH_SET_HAS_FPU): Likewise.
1681 (SH_ARCH_SET_HAS_DSP): Likewise.
1682 (SH_ARCH_UNKNOWN_ARCH): Likewise.
1683 (sh_get_arch_from_bfd_mach): Add prototype.
1684 (sh_get_arch_up_from_bfd_mach): Likewise.
1685 (sh_get_bfd_mach_from_arch_set): Likewise.
1686 (sh_merge_bfd_arc): Likewise.
1687
1688 2004-05-24 Peter Barada <peter@the-baradas.com>
1689
1690 * m68k-dis.c(print_insn_m68k): Strip body of diassembly out
1691 into new match_insn_m68k function. Loop over canidate
1692 matches and select first that completely matches.
1693 * m68k-dis.c(print_insn_arg): Fix 'g' case to only extract 1 bit.
1694 * m68k-dis.c(print_insn_arg): Call new function m68k_valid_ea
1695 to verify addressing for MAC/EMAC.
1696 * m68k-dis.c(print_insn_arg): Use reg_half_names for MAC/EMAC
1697 reigster halves since 'fpu' and 'spl' look misleading.
1698 * m68k-dis.c(fetch_arg): Fix 'G', 'H', 'I', 'f', 'M', 'N' cases.
1699 * m68k-opc.c: Rearragne mac/emac cases to use longest for
1700 first, tighten up match masks.
1701 * m68k-opc.c: Add 'size' field to struct m68k_opcode. Produce
1702 'size' from special case code in print_insn_m68k to
1703 determine decode size of insns.
1704
1705 2004-05-19 Alan Modra <amodra@bigpond.net.au>
1706
1707 * ppc-opc.c (insert_fxm): Enable two operand mfcr when -many as
1708 well as when -mpower4.
1709
1710 2004-05-13 Nick Clifton <nickc@redhat.com>
1711
1712 * po/fr.po: Updated French translation.
1713
1714 2004-05-05 Peter Barada <peter@the-baradas.com>
1715
1716 * m68k-dis.c(print_insn_m68k): Add new chips, use core
1717 variants in arch_mask. Only set m68881/68851 for 68k chips.
1718 * m68k-op.c: Switch from ColdFire chips to core variants.
1719
1720 2004-05-05 Alan Modra <amodra@bigpond.net.au>
1721
1722 PR 147.
1723 * ppc-opc.c (PPCVEC): Remove PPC_OPCODE_PPC.
1724
1725 2004-04-29 Ben Elliston <bje@au.ibm.com>
1726
1727 * ppc-opc.c (XCMPL): Renmame to XOPL. Update users.
1728 (powerpc_opcodes): Add "dbczl" instruction for PPC970.
1729
1730 2004-04-22 Kaz Kojima <kkojima@rr.iij4u.or.jp>
1731
1732 * sh-dis.c (print_insn_sh): Print the value in constant pool
1733 as a symbol if it looks like a symbol.
1734
1735 2004-04-22 Peter Barada <peter@the-baradas.com>
1736
1737 * m68k-dis.c(print_insn_m68k): Set mfcmac/mcfemac on
1738 appropriate ColdFire architectures.
1739 (print_insn_m68k): Handle EMAC, MAC/EMAC scalefactor, and MAC/EMAC
1740 mask addressing.
1741 Add EMAC instructions, fix MAC instructions. Remove
1742 macmw/macml/msacmw/msacml instructions since mask addressing now
1743 supported.
1744
1745 2004-04-20 Jakub Jelinek <jakub@redhat.com>
1746
1747 * sparc-opc.c (fmoviccx, fmovfccx, fmovccx): Define.
1748 (fmovicc, fmovfcc, fmovcc): Remove fpsize argument, change opcode to
1749 suffix. Use fmov*x macros, create all 3 fpsize variants in one
1750 macro. Adjust all users.
1751
1752 2004-04-15 Anil Paranjpe <anilp1@kpitcummins.com>
1753
1754 * h8300-dis.c (bfd_h8_disassemble) : Treat "adds" & "subs"
1755 separately.
1756
1757 2004-03-30 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
1758
1759 * m32r-asm.c: Regenerate.
1760
1761 2004-03-29 Stan Shebs <shebs@apple.com>
1762
1763 * mpw-config.in, mpw-make.sed: Remove MPW support files, no longer
1764 used.
1765
1766 2004-03-19 Alan Modra <amodra@bigpond.net.au>
1767
1768 * aclocal.m4: Regenerate.
1769 * config.in: Regenerate.
1770 * configure: Regenerate.
1771 * po/POTFILES.in: Regenerate.
1772 * po/opcodes.pot: Regenerate.
1773
1774 2004-03-16 Alan Modra <amodra@bigpond.net.au>
1775
1776 * ppc-dis.c (print_insn_powerpc): Don't print tabs. Handle
1777 PPC_OPERANDS_GPR_0.
1778 * ppc-opc.c (RA0): Define.
1779 (RAQ, RAL, RAM, RAS, RSQ, RTQ, RSO): Use PPC_OPERAND_GPR_0.
1780 (RAOPT): Rename from RAO. Update all uses.
1781 (powerpc_opcodes): Use RA0 as appropriate.
1782
1783 2004-03-15 Aldy Hernandez <aldyh@redhat.com>
1784
1785 * ppc-opc.c (powerpc_opcodes): Add BOOKE versions of mfsprg.
1786
1787 2004-03-15 Alan Modra <amodra@bigpond.net.au>
1788
1789 * sparc-dis.c (print_insn_sparc): Update getword prototype.
1790
1791 2004-03-12 Michal Ludvig <mludvig@suse.cz>
1792
1793 * i386-dis.c (GRPPLOCK): Delete.
1794 (grps): Delete GRPPLOCK entry.
1795
1796 2004-03-12 Alan Modra <amodra@bigpond.net.au>
1797
1798 * i386-dis.c (OP_M, OP_0f0e, OP_0fae, NOP_Fixup): New functions.
1799 (M, Mp): Use OP_M.
1800 (None, PADLOCK_SPECIAL, PADLOCK_0): Delete.
1801 (GRPPADLCK): Define.
1802 (dis386): Use NOP_Fixup on "nop".
1803 (dis386_twobyte): Use GRPPADLCK on opcode 0xa7.
1804 (twobyte_has_modrm): Set for 0xa7.
1805 (padlock_table): Delete. Move to..
1806 (grps): ..here, using OP_0f07. Use OP_Ofae on lfence, mfence
1807 and clflush.
1808 (print_insn): Revert PADLOCK_SPECIAL code.
1809 (OP_E): Delete sfence, lfence, mfence checks.
1810
1811 2004-03-12 Jakub Jelinek <jakub@redhat.com>
1812
1813 * i386-dis.c (grps): Use INVLPG_Fixup instead of OP_E for invlpg.
1814 (INVLPG_Fixup): New function.
1815 (PNI_Fixup): Remove ATTRIBUTE_UNUSED from sizeflag.
1816
1817 2004-03-12 Michal Ludvig <mludvig@suse.cz>
1818
1819 * i386-dis.c (PADLOCK_SPECIAL, PADLOCK_0): New defines.
1820 (dis386_twobyte): Opcode 0xa7 is PADLOCK_0.
1821 (padlock_table): New struct with PadLock instructions.
1822 (print_insn): Handle PADLOCK_SPECIAL.
1823
1824 2004-03-12 Alan Modra <amodra@bigpond.net.au>
1825
1826 * i386-dis.c (grps): Use clflush by default for 0x0fae/7.
1827 (OP_E): Twiddle clflush to sfence here.
1828
1829 2004-03-08 Nick Clifton <nickc@redhat.com>
1830
1831 * po/de.po: Updated German translation.
1832
1833 2003-03-03 Andrew Stubbs <andrew.stubbs@superh.com>
1834
1835 * sh-dis.c (print_insn_sh): Don't disassemble fp instructions in
1836 nofpu mode. Add BFD type bfd_mach_sh4_nommu_nofpu.
1837 * sh-opc.h: Add sh4_nommu_nofpu architecture and adjust instructions
1838 accordingly.
1839
1840 2004-03-01 Richard Sandiford <rsandifo@redhat.com>
1841
1842 * frv-asm.c: Regenerate.
1843 * frv-desc.c: Regenerate.
1844 * frv-desc.h: Regenerate.
1845 * frv-dis.c: Regenerate.
1846 * frv-ibld.c: Regenerate.
1847 * frv-opc.c: Regenerate.
1848 * frv-opc.h: Regenerate.
1849
1850 2004-03-01 Richard Sandiford <rsandifo@redhat.com>
1851
1852 * frv-desc.c, frv-opc.c: Regenerate.
1853
1854 2004-03-01 Richard Sandiford <rsandifo@redhat.com>
1855
1856 * frv-desc.c, frv-opc.c, frv-opc.h: Regenerate.
1857
1858 2004-02-26 Andrew Stubbs <andrew.stubbs@superh.com>
1859
1860 * sh-opc.h: Move fsca and fsrra instructions from sh4a to sh4.
1861 Also correct mistake in the comment.
1862
1863 2004-02-26 Andrew Stubbs <andrew.stubbs@superh.com>
1864
1865 * sh-dis.c (print_insn_sh): Add REG_N_D nibble type to
1866 ensure that double registers have even numbers.
1867 Add REG_N_B01 for nn01 (binary 01) nibble to ensure
1868 that reserved instruction 0xfffd does not decode the same
1869 as 0xfdfd (ftrv).
1870 * sh-opc.h: Add REG_N_D nibble type and use it whereever
1871 REG_N refers to a double register.
1872 Add REG_N_B01 nibble type and use it instead of REG_NM
1873 in ftrv.
1874 Adjust the bit patterns in a few comments.
1875
1876 2004-02-25 Aldy Hernandez <aldyh@redhat.com>
1877
1878 * ppc-opc.c (powerpc_opcodes): Change mask for dcbt and dcbtst.
1879
1880 2004-02-20 Aldy Hernandez <aldyh@redhat.com>
1881
1882 * ppc-opc.c (powerpc_opcodes): Move mfmcsrr0 before mfdc_dat.
1883
1884 2004-02-20 Aldy Hernandez <aldyh@redhat.com>
1885
1886 * ppc-opc.c (powerpc_opcodes): Add m*ivor35.
1887
1888 2004-02-20 Aldy Hernandez <aldyh@redhat.com>
1889
1890 * ppc-opc.c (powerpc_opcodes): Add mfivor32, mfivor33, mfivor34,
1891 mtivor32, mtivor33, mtivor34.
1892
1893 2004-02-19 Aldy Hernandez <aldyh@redhat.com>
1894
1895 * ppc-opc.c (powerpc_opcodes): Add mfmcar.
1896
1897 2004-02-10 Petko Manolov <petkan@nucleusys.com>
1898
1899 * arm-opc.h Maverick accumulator register opcode fixes.
1900
1901 2004-02-13 Ben Elliston <bje@wasabisystems.com>
1902
1903 * m32r-dis.c: Regenerate.
1904
1905 2004-01-27 Michael Snyder <msnyder@redhat.com>
1906
1907 * sh-opc.h (sh_table): "fsrra", not "fssra".
1908
1909 2004-01-23 Andrew Over <andrew.over@cs.anu.edu.au>
1910
1911 * sparc-opc.c (fdtox, fstox, fqtox, fxtod, fxtos, fxtoq): Tighten
1912 contraints.
1913
1914 2004-01-19 Andrew Over <andrew.over@cs.anu.edu.au>
1915
1916 * sparc-opc.c (sparc_opcodes) <f[dsq]tox, fxto[dsq]>: Fix args.
1917
1918 2004-01-19 Alan Modra <amodra@bigpond.net.au>
1919
1920 * i386-dis.c (OP_E): Print scale factor on intel mode sib when not
1921 1. Don't print scale factor on AT&T mode when index missing.
1922
1923 2004-01-16 Alexandre Oliva <aoliva@redhat.com>
1924
1925 * m10300-opc.c (mov): 8- and 24-bit immediates are zero-extended
1926 when loaded into XR registers.
1927
1928 2004-01-14 Richard Sandiford <rsandifo@redhat.com>
1929
1930 * frv-desc.h: Regenerate.
1931 * frv-desc.c: Regenerate.
1932 * frv-opc.c: Regenerate.
1933
1934 2004-01-13 Michael Snyder <msnyder@redhat.com>
1935
1936 * sh-dis.c (print_insn_sh): Allocate 4 bytes for insn.
1937
1938 2004-01-09 Paul Brook <paul@codesourcery.com>
1939
1940 * arm-opc.h (arm_opcodes): Move generic mcrr after known
1941 specific opcodes.
1942
1943 2004-01-07 Daniel Jacobowitz <drow@mvista.com>
1944
1945 * Makefile.am (libopcodes_la_DEPENDENCIES)
1946 (libopcodes_la_LIBADD): Revert 2003-05-17 change. Add explanatory
1947 comment about the problem.
1948 * Makefile.in: Regenerate.
1949
1950 2004-01-06 Alexandre Oliva <aoliva@redhat.com>
1951
1952 2003-12-19 Alexandre Oliva <aoliva@redhat.com>
1953 * frv-asm.c (parse_ulo16, parse_uhi16, parse_d12): Fix some
1954 cut&paste errors in shifting/truncating numerical operands.
1955 2003-08-04 Alexandre Oliva <aoliva@redhat.com>
1956 * frv-asm.c (parse_ulo16): Parse gotofflo and gotofffuncdesclo.
1957 (parse_uslo16): Likewise.
1958 (parse_uhi16): Parse gotoffhi and gotofffuncdeschi.
1959 (parse_d12): Parse gotoff12 and gotofffuncdesc12.
1960 (parse_s12): Likewise.
1961 2003-08-04 Alexandre Oliva <aoliva@redhat.com>
1962 * frv-asm.c (parse_ulo16): Parse gotlo and gotfuncdesclo.
1963 (parse_uslo16): Likewise.
1964 (parse_uhi16): Parse gothi and gotfuncdeschi.
1965 (parse_d12): Parse got12 and gotfuncdesc12.
1966 (parse_s12): Likewise.
1967
1968 2004-01-02 Albert Bartoszko <albar@nt.kegel.com.pl>
1969
1970 * msp430-dis.c (msp430_doubleoperand): Check for an 'add'
1971 instruction which looks similar to an 'rla' instruction.
1972
1973 For older changes see ChangeLog-0203
1974 \f
1975 Local Variables:
1976 mode: change-log
1977 left-margin: 8
1978 fill-column: 74
1979 version-control: never
1980 End: