1 2020-09-24 Lili Cui <lili.cui@intel.com>
3 * i386-dis.c (enum): Add PREFIX_0F01_REG_1_RM_5,
4 PREFIX_0F01_REG_1_RM_6, PREFIX_0F01_REG_1_RM_7,
5 X86_64_0F01_REG_1_RM_5_P_2, X86_64_0F01_REG_1_RM_6_P_2,
6 X86_64_0F01_REG_1_RM_7_P_2.
7 (prefix_table): Likewise.
8 (x86_64_table): Likewise.
10 * i386-gen.c (cpu_flag_init): Add CPU_TDX_FLAGS
11 and CPU_ANY_TDX_FLAGS.
12 (cpu_flags): Add CpuTDX.
13 * i386-opc.h (enum): Add CpuTDX.
14 (i386_cpu_flags): Add cputdx.
15 * i386-opc.tbl: Add TDX insns.
16 * i386-init.h: Regenerate.
17 * i386-tbl.h: Likewise.
19 2020-09-17 Cooper Qu <<cooper.qu@linux.alibaba.com>>
22 * csky-dis.c (using_abi): New.
23 (parse_csky_dis_options): New function.
24 (get_gr_name): New function.
25 (get_cr_name): New function.
26 (csky_output_operand): Use get_gr_name and get_cr_name to
27 disassemble and add handle of OPRND_TYPE_IMM5b_LS.
28 (print_insn_csky): Parse disassembler options.
29 * opcodes/csky-opc.h (OPRND_TYPE_IMM5b_LS): New enum.
30 (GENARAL_REG_BANK): Define.
31 (REG_SUPPORT_ALL): Define.
32 (REG_SUPPORT_ALL): New.
34 (REG_SUPPORT_A): Define.
35 (REG_SUPPORT_B): Define.
36 (REG_SUPPORT_C): Define.
37 (REG_SUPPORT_D): Define.
38 (REG_SUPPORT_E): Define.
39 (csky_abiv1_general_regs): New.
40 (csky_abiv1_control_regs): New.
41 (csky_abiv2_general_regs): New.
42 (csky_abiv2_control_regs): New.
43 (get_register_name): New function.
44 (get_register_number): New function.
45 (csky_get_general_reg_name): New function.
46 (csky_get_general_regno): New function.
47 (csky_get_control_reg_name): New function.
48 (csky_get_control_regno): New function.
49 (csky_v2_opcodes): Prefer two oprerans format for bclri and
50 bseti, strengthen the operands legality check of addc, zext
53 2020-09-23 Lili Cui <lili.cui@intel.com>
55 * i386-dis.c (enum): Add REG_0F38D8_PREFIX_1,
56 MOD_0F38FA_PREFIX_1, MOD_0F38FB_PREFIX_1,
57 MOD_0F38DC_PREFIX_1, MOD_0F38DD_PREFIX_1,
58 MOD_0F38DE_PREFIX_1, MOD_0F38DF_PREFIX_1,
59 PREFIX_0F38D8, PREFIX_0F38FA, PREFIX_0F38FB.
60 (reg_table): New instructions (see prefixes above).
61 (prefix_table): Likewise.
62 (three_byte_table): Likewise.
64 * i386-gen.c (cpu_flag_init): Add CPU_KL_FLAGS, CPU_WIDE_KL_FLAGS,
65 CPU_ANY_KL_FLAGS and CPU_ANY_WIDE_KL_FLAGS.
66 (cpu_flags): Likewise.
67 (operand_type_init): Likewise.
68 * i386-opc.h (enum): Add CpuKL and CpuWide_KL.
69 (i386_cpu_flags): Add cpukl and cpuwide_kl.
70 * i386-opc.tbl: Add KL and WIDE_KL insns.
71 * i386-init.h: Regenerate.
72 * i386-tbl.h: Likewise.
74 2020-09-21 Alan Modra <amodra@gmail.com>
76 * rx-dis.c (flag_names): Add missing comma.
77 (register_names, flag_names, double_register_names),
78 (double_register_high_names, double_register_low_names),
79 (double_control_register_names, double_condition_names): Remove
82 2020-09-18 David Faust <david.faust@oracle.com>
84 * bpf-desc.c: Regenerate.
85 * bpf-desc.h: Likewise.
86 * bpf-opc.c: Likewise.
87 * bpf-opc.h: Likewise.
89 2020-09-16 Andrew Burgess <andrew.burgess@embecosm.com>
91 * csky-dis.c (csky_get_disassembler): Don't return NULL when there
94 2020-09-16 Alan Modra <amodra@gmail.com>
96 * ppc-dis.c (ppc_symbol_is_valid): Adjust elf_symbol_from invocation.
98 2020-09-10 Nick Clifton <nickc@redhat.com>
100 * ppc-dis.c (ppc_symbol_is_valid): New function. Returns false
101 for hidden, local, no-type symbols.
102 (disassemble_init_powerpc): Point the symbol_is_valid field in the
103 info structure at the new function.
105 2020-09-10 Cooper Qu <cooper.qu@linux.alibaba.com>
107 * csky-opc.h (csky_v2_opcodes): Add L2Cache instructions.
108 * testsuite/gas/csky/cskyv2_ck860.d : Adjust to icache.iva
111 2020-09-10 Nick Clifton <nickc@redhat.com>
113 * csky-dis.c (csky_output_operand): Coerce the immediate values to
114 long before printing.
116 2020-09-10 Alan Modra <amodra@gmail.com>
118 * csky-dis.c (csky_output_operand): Don't sprintf str to itself.
120 2020-09-07 Cooper Qu <cooper.qu@linux.alibaba.com>
122 * csky-opc.h (csky_v2_opcodes): Change mvtc and mulsw's
125 2020-09-07 Cooper Qu <cooper.qu@linux.alibaba.com>
127 * csky-dis.c (csky_output_operand): Add handlers for
128 OPRND_TYPE_HFLOAT_FMOVI, OPRND_TYPE_SFLOAT_FMOVI and
129 OPRND_TYPE_DFLOAT_FMOVI. Refine OPRND_TYPE_FREGLIST_DASH
130 to support FPUV3 instructions.
131 * csky-opc.h (enum operand_type): New enum OPRND_TYPE_IMM9b,
132 OPRND_TYPE_HFLOAT_FMOVI, OPRND_TYPE_SFLOAT_FMOVI and
133 OPRND_TYPE_DFLOAT_FMOVI.
134 (OPRND_MASK_4_5, OPRND_MASK_6, OPRND_MASK_6_7, OPRND_MASK_6_8,
135 OPRND_MASK_7, OPRND_MASK_7_8, OPRND_MASK_17_24,
136 OPRND_MASK_20, OPRND_MASK_20_21, OPRND_MASK_20_22,
137 OPRND_MASK_20_23, OPRND_MASK_20_24, OPRND_MASK_20_25,
138 OPRND_MASK_0_3or5_8, OPRND_MASK_0_3or6_7, OPRND_MASK_0_3or25,
139 OPRND_MASK_0_4or21_24, OPRND_MASK_5or20_21,
140 OPRND_MASK_5or20_22, OPRND_MASK_5or20_23, OPRND_MASK_5or20_24,
141 OPRND_MASK_5or20_25, OPRND_MASK_8_9or21_25,
142 OPRND_MASK_8_9or16_25, OPRND_MASK_4_6or20, OPRND_MASK_5_7or20,
143 OPRND_MASK_4_5or20or25, OPRND_MASK_4_6or20or25,
144 OPRND_MASK_4_7or20or25, OPRND_MASK_6_9or17_24,
145 OPRND_MASK_6_7or20, OPRND_MASK_6or20, OPRND_MASK_7or20,
146 OPRND_MASK_5or8_9or16_25, OPRND_MASK_5or8_9or20_25): Define.
147 (csky_v2_opcodes): Add FPUV3 instructions.
149 2020-09-08 Alex Coplan <alex.coplan@arm.com>
151 * aarch64-dis.c (print_operands): Pass CPU features to
152 aarch64_print_operand().
153 * aarch64-opc.c (aarch64_print_operand): Use CPU features to determine
154 preferred disassembly of system registers.
155 (SR_RNG): Refactor to use new SR_FEAT2 macro.
161 (SR_EXPAND_ELx): New.
162 (SR_EXPAND_EL12): New.
163 (aarch64_sys_regs): Specify which registers are only on
164 A-profile, add R-profile system registers.
168 (aarch64_sys_ins_reg_supported_p): Reject EL3 registers for
171 2020-09-08 Alex Coplan <alex.coplan@arm.com>
173 * aarch64-tbl.h (aarch64_feature_v8_r): New.
176 (aarch64_opcode_table): Add dfb.
177 * aarch64-opc-2.c: Regenerate.
178 * aarch64-asm-2.c: Regenerate.
179 * aarch64-dis-2.c: Regenerate.
181 2020-09-08 Alex Coplan <alex.coplan@arm.com>
183 * aarch64-dis.c (arch_variant): New.
184 (determine_disassembling_preference): Disassemble according to
186 (select_aarch64_variant): New.
187 (print_insn_aarch64): Set feature set.
189 2020-09-02 Alan Modra <amodra@gmail.com>
191 * v850-opc.c (insert_i5div1, insert_i5div2, insert_i5div3),
192 (insert_d5_4, insert_d8_6, insert_d8_7, insert_v8, insert_d9),
193 (insert_u16_loop, insert_d16_15, insert_d16_16, insert_d17_16),
194 (insert_d22, insert_d23, insert_d23_align1, insert_i9, insert_u9),
195 (insert_spe, insert_r4, insert_POS, insert_WIDTH, insert_SELID),
196 (insert_VECTOR8, insert_VECTOR5, insert_CACHEOP, insert_PREFOP),
197 (nsert_IMM10U, insert_SRSEL1, insert_SRSEL2): Use unsigned long
198 for value parameter and update code to suit.
199 (extract_d9, extract_d16_15, extract_d16_16, extract_d17_16),
200 (extract_d22, extract_d23, extract_i9): Use unsigned long variables.
202 2020-09-02 Alan Modra <amodra@gmail.com>
204 * i386-dis.c (OP_E_memory): Don't cast to signed type when
206 (get32, get32s): Use unsigned types in shift expressions.
208 2020-09-02 Alan Modra <amodra@gmail.com>
210 * csky-dis.c (print_insn_csky): Use unsigned type for "given".
212 2020-09-02 Alan Modra <amodra@gmail.com>
214 * crx-dis.c: Whitespace.
215 (print_arg): Use unsigned type for longdisp and mask variables,
216 and for left shift constant.
218 2020-09-02 Alan Modra <amodra@gmail.com>
220 * cgen-ibld.in (insert_normal, extract_normal): Use 1UL in left shift.
221 * bpf-ibld.c: Regenerate.
222 * epiphany-ibld.c: Regenerate.
223 * fr30-ibld.c: Regenerate.
224 * frv-ibld.c: Regenerate.
225 * ip2k-ibld.c: Regenerate.
226 * iq2000-ibld.c: Regenerate.
227 * lm32-ibld.c: Regenerate.
228 * m32c-ibld.c: Regenerate.
229 * m32r-ibld.c: Regenerate.
230 * mep-ibld.c: Regenerate.
231 * mt-ibld.c: Regenerate.
232 * or1k-ibld.c: Regenerate.
233 * xc16x-ibld.c: Regenerate.
234 * xstormy16-ibld.c: Regenerate.
236 2020-09-02 Alan Modra <amodra@gmail.com>
238 * bfin-dis.c (MASKBITS): Use SIGNBIT.
240 2020-09-02 Cooper Qu <cooper.qu@linux.alibaba.com>
242 * csky-opc.h (csky_v2_opcodes): Move divul and divsl
243 to CSKYV2_ISA_3E3R3 instruction set.
245 2020-09-02 Cooper Qu <cooper.qu@linux.alibaba.com>
247 * csky-opc.h (csky_v2_opcodes): Fix Encode of mulsws.
249 2020-09-01 Alan Modra <amodra@gmail.com>
251 * mep-ibld.c: Regenerate.
253 2020-08-31 Cooper Qu <cooper.qu@linux.alibaba.com>
255 * csky-dis.c (csky_output_operand): Assign dis_info.value for
258 2020-08-30 Alan Modra <amodra@gmail.com>
260 * cr16-dis.c: Formatting.
261 (parameter): Delete struct typedef. Use dwordU instead
263 (make_argument <arg_idxr>): Simplify detection of cbitb, sbitb
265 (make_argument <arg_cr>): Extract 20-bit field not 16-bit.
267 2020-08-29 Alan Modra <amodra@gmail.com>
270 * csky-opc.h (MAX_OPRND_NUM): Define to 5.
271 (union csky_operand): Use MAX_OPRND_NUM to size oprnds array.
273 2020-08-28 Alan Modra <amodra@gmail.com>
277 * cgen-ibld.in (insert_1): Use 1UL in forming mask.
278 (extract_normal): Likewise.
279 (insert_normal): Likewise, and move past zero length test.
280 (put_insn_int_value): Handle mask for zero length, use 1UL.
281 * bpf-ibld.c, * epiphany-ibld.c, * fr30-ibld.c, * frv-ibld.c,
282 * ip2k-ibld.c, * iq2000-ibld.c, * lm32-ibld.c, * m32c-ibld.c,
283 * m32r-ibld.c, * mep-ibld.c, * mt-ibld.c, * or1k-ibld.c,
284 * xc16x-ibld.c, * xstormy16-ibld.c: Regenerate.
286 2020-08-28 Cooper Qu <cooper.qu@linux.alibaba.com>
288 * csky-dis.c (CSKY_DEFAULT_ISA): Define.
289 (csky_dis_info): Add member isa.
290 (csky_find_inst_info): Skip instructions that do not belong to
292 (csky_get_disassembler): Get infomation from attribute section.
293 (print_insn_csky): Set defualt ISA flag.
294 * csky.h (CSKY_ISA_VDSP_2): Rename from CSKY_ISA_VDSP_V2.
295 * csky-opc.h (struct csky_opcode): Change isa_flag16 and
296 isa_flag32'type to unsigned 64 bits.
298 2020-08-26 Jose E. Marchesi <jemarch@gnu.org>
300 * disassemble.c (enum epbf_isa_attr): Add ISA_XBPFBE, ISA_EBPFMAX.
302 2020-08-26 David Faust <david.faust@oracle.com>
304 * bpf-desc.c: Regenerate.
305 * bpf-desc.h: Likewise.
306 * bpf-opc.c: Likewise.
307 * bpf-opc.h: Likewise.
308 * disassemble.c (disassemble_init_for_target): Set bits for xBPF
309 ISA when appropriate.
311 2020-08-25 Alan Modra <amodra@gmail.com>
314 * vax-dis.c (parse_disassembler_options): Always add at least one
315 to entry_addr_total_slots.
317 2020-08-24 Cooper Qu <cooper.qu@linux.alibaba.com>
319 * csky-dis.c (csky_find_inst_info): Skip CK860's instructions
320 in other CPUs to speed up disassembling.
321 * csky-opc.h (csky_v2_opcodes): Add CK860's instructions,
322 Change plsli.u16 to plsli.16, change sync's operand format.
324 2020-08-21 Cooper Qu <cooper.qu@linux.alibaba.com>
326 * csky-opc.h (csky_v2_opcodes): Add instruction bnezad.
328 2020-08-21 Nick Clifton <nickc@redhat.com>
330 * aarch64-dis.c (get_sym_code_type): Return FALSE for non-ELF
333 2020-08-21 Cooper Qu <cooper.qu@linux.alibaba.com>
335 * csky-opc.h (csky_v2_opcodes): Add two operands form for bloop.
337 2020-08-19 Alan Modra <amodra@gmail.com>
339 * ppc-opc.c (powerpc_opcodes): Replace OBF with BF for vcmpsq,
342 2020-08-18 Peter Bergner <bergner@linux.ibm.com>
344 * ppc-opc.c (powerpc_opcodes) <xvcvbf16sp>: Rename from this...
345 <xvcvbf16spn>: ...to this.
347 2020-08-12 Alex Coplan <alex.coplan@arm.com>
349 * aarch64-opc.c (aarch64_sys_regs): Add MPAM registers.
351 2020-08-12 Nick Clifton <nickc@redhat.com>
353 * po/sr.po: Updated Serbian translation.
355 2020-08-11 Alan Modra <amodra@gmail.com>
357 * ppc-opc.c (powerpc_opcodes): Move cctpl, cctpm and cctph.
359 2020-08-10 Przemyslaw Wirkus <przemyslaw.wirkus@arm.com>
361 * aarch64-opc.c (aarch64_print_operand):
362 (aarch64_sys_reg_deprecated_p): Functions paramaters changed.
363 (aarch64_sys_reg_supported_p): Function removed.
364 (aarch64_sys_ins_reg_supported_p): Functions paramaters changed.
365 (aarch64_sys_ins_reg_supported_p): Merged aarch64_sys_reg_supported_p
368 2020-08-10 Alan Modra <amodra@gmail.com>
370 * ppc-opc.c (powerpc_opcodes): Add many mtspr and mfspr extended
373 2020-08-10 Alan Modra <amodra@gmail.com>
375 * ppc-opc.c (powerpc_opcodes): Add exser, msgsndu, msgclru.
376 Enable icbt for power5, miso for power8.
378 2020-08-10 Alan Modra <amodra@gmail.com>
380 * ppc-opc.c (powerpc_opcodes): Prioritise mtfprd and mtvrd over
381 mtvsrd, and similarly for mfvsrd.
383 2020-08-04 Christian Groessler <chris@groessler.org>
384 Tadashi G. Takaoka <tadashi.g.takaoka@gmail.com>
386 * z8kgen.c (opt): Fix "sout imm16,rs" and "soutb imm16,rbs"
387 opcodes (special "out" to absolute address).
388 * z8k-opc.h: Regenerate.
390 2020-07-30 H.J. Lu <hongjiu.lu@intel.com>
393 * i386-opc.h (Prefix_Disp8): New.
394 (Prefix_Disp16): Likewise.
395 (Prefix_Disp32): Likewise.
396 (Prefix_Load): Likewise.
397 (Prefix_Store): Likewise.
398 (Prefix_VEX): Likewise.
399 (Prefix_VEX3): Likewise.
400 (Prefix_EVEX): Likewise.
401 (Prefix_REX): Likewise.
402 (Prefix_NoOptimize): Likewise.
403 * i386-opc.tbl: Use Prefix_XXX on pseudo prefixes. Add {disp16}.
404 * i386-tbl.h: Regenerated.
406 2020-07-29 Andreas Arnez <arnez@linux.ibm.com>
408 * s390-mkopc.c (insertExpandedMnemonic): Handle unreachable
409 default case with abort() instead of printing an error message and
410 continuing, to avoid a maybe-uninitialized warning.
412 2020-07-24 Nick Clifton <nickc@redhat.com>
414 * po/de.po: Updated German translation.
416 2020-07-21 Jan Beulich <jbeulich@suse.com>
418 * i386-dis.c (OP_E_memory): Revert previous change.
420 2020-07-15 H.J. Lu <hongjiu.lu@intel.com>
423 * i386-dis.c (OP_E_memory): Don't display eiz with no scale
424 without base nor index registers.
426 2020-07-15 Jan Beulich <jbeulich@suse.com>
428 * i386-dis.c (putop): Move 'V' and 'W' handling.
430 2020-07-15 Jan Beulich <jbeulich@suse.com>
432 * i386-dis.c (dis386): Adjust 'V' description. Use P-based
433 construct for push/pop of register.
434 (putop): Honor cond when handling 'P'. Drop handling of plain
437 2020-07-15 Jan Beulich <jbeulich@suse.com>
439 * i386-dis.c (dis386): Adjust 'P', 'T', 'U', and '@'
440 description. Drop '&' description. Use P for push of immediate,
441 pushf/popf, enter, and leave. Use %LP for lret/retf.
442 (dis386_twobyte): Use P for push/pop of fs/gs.
443 (reg_table): Use P for push/pop. Use @ for near call/jmp.
444 (x86_64_table): Use P for far call/jmp.
445 (putop): Drop handling of 'U' and '&'. Move and adjust handling
446 of '@'. Adjust handling of 'P' and 'T'. Drop case_P and case_Q
448 (OP_J): Drop marking of REX_W as used for v_mode (ISA-dependent)
449 and dqw_mode (unconditional).
451 2020-07-14 H.J. Lu <hongjiu.lu@intel.com>
454 * i386-dis.c (OP_E_memory): Without base nor index registers,
455 32-bit displacement to 64 bits.
457 2020-07-14 Claudiu Zissulescu <claziss@gmail.com>
459 * arc-dis.c (print_insn_arc): Detect and emit a warning when a
460 faulty double register pair is detected.
462 2020-07-14 Jan Beulich <jbeulich@suse.com>
464 * i386-dis.c (OP_D): Print dr<N> instead of db<N> in Intel mode.
466 2020-07-14 Jan Beulich <jbeulich@suse.com>
468 * i386-dis.c (OP_R, Rm): Delete.
469 (MOD_0F24, MOD_0F26): Rename to ...
470 (X86_64_0F24, X86_64_0F26): ... respectively.
471 (dis386): Update 'L' and 'Z' comments.
472 (dis386_twobyte): Replace Rm by Em. Change opcode 0F24 and 0F26
474 (mod_table): Move opcode 0F24 and 0F26 entries ...
475 (x86_64_table): ... here.
476 (putop): Drop handling of 'L'. Set modrm.mod to 3 for 'Z'. Move
479 2020-07-14 Jan Beulich <jbeulich@suse.com>
481 * i386-dis.c (Rd, Rdq, MaskR): Delete.
482 (MOD_EVEX_0F3828_P_1, MOD_EVEX_0F382A_P_1_W_1,
483 MOD_EVEX_0F3838_P_1, MOD_EVEX_0F383A_P_1_W_0,
484 MOD_EVEX_0F387A_W_0, MOD_EVEX_0F387B_W_0,
485 MOD_EVEX_0F387C): New enumerators.
486 (reg_table): Use Edq for rdssp.
487 (prefix_table): Use Edq for incssp.
488 (mod_table): Use Rm for move to/from %tr. Use MaskE for kand*,
489 kandn*, knot*, kor*, kxnor*, kxor*, kadd*, kunpck*, kortest*,
490 ktest*, and kshift*. Use Edq / MaskE for kmov*.
491 * i386-dis-evex.h: Reference mod_table[] for opcode 0F387C.
492 * i386-dis-evex-mod.h: New entries for opcodes 0F3828, 0F382A,
493 0F3838, 0F383A, 0F387A, 0F387B, and 0F387C.
494 * i386-dis-evex-prefix.h: Reference mod_table[] for opcodes
495 0F3828_P_1 and 0F3838_P_1.
496 * i386-dis-evex-w.h: Reference mod_table[] for opcodes
497 0F382A_P_1, 0F383A_P_1, 0F387A, and 0F387B.
499 2020-07-14 Jan Beulich <jbeulich@suse.com>
501 * i386-dis.c (PREFIX_0F01_REG_7_MOD_3_RM_3,
502 PREFIX_0FAE_REG_5_MOD_0, PREFIX_0FC3_MOD_0, PREFIX_0F38C8,
503 PREFIX_0F38C9, PREFIX_0F38CA, PREFIX_0F38CB, PREFIX_0F38CC,
504 PREFIX_0F38CD, PREFIX_0F38F9, PREFIX_0F3ACC, PREFIX_VEX_0F77,
505 PREFIX_VEX_0F38F2, PREFIX_VEX_0F38F3_REG_1,
506 PREFIX_VEX_0F38F3_REG_2, PREFIX_VEX_0F38F3_REG_3): Delete.
507 (MOD_0F38F9_PREFIX_0, VEX_LEN_0F77_P_0, VEX_LEN_0F38F2_P_0,
508 VEX_LEN_0F38F3_R_1_P_0, VEX_LEN_0F38F3_R_2_P_0,
509 VEX_LEN_0F38F3_R_3_P_0): Rename to ...
510 (MOD_0F38F9, VEX_LEN_0F77, VEX_LEN_0F38F2, VEX_LEN_0F38F3_R_1,
511 VEX_LEN_0F38F3_R_2, VEX_LEN_0F38F3_R_3): ... these respectively.
512 (reg_table, prefix_table, three_byte_table, vex_table,
513 vex_len_table, mod_table, rm_table): Replace / remove respective
515 (intel_operand_size, OP_E_register, OP_G): Avoid undue setting
516 of PREFIX_DATA in used_prefixes.
518 2020-07-14 Jan Beulich <jbeulich@suse.com>
520 * i386-dis.c (MOD_VEX_0F3A30_L_0_W_0, MOD_VEX_0F3A30_L_0_W_1,
521 MOD_VEX_0F3A31_L_0_W_0, MOD_VEX_0F3A31_L_0_W_1,
522 MOD_VEX_0F3A32_L_0_W_0, MOD_VEX_0F3A32_L_0_W_1,
523 MOD_VEX_0F3A33_L_0_W_0, MOD_VEX_0F3A33_L_0_W_1): Replace by ...
524 (MOD_VEX_0F3A30_L_0, MOD_VEX_0F3A31_L_0,
525 MOD_VEX_0F3A32_L_0, MOD_VEX_0F3A33_L_0): ... these.
526 (VEX_W_0F3A30_L_0, VEX_W_0F3A31_L_0, VEX_W_0F3A32_L_0,
527 VEX_W_0F3A33_L_0): Delete.
528 (dis386): Adjust "BW" description.
529 (vex_len_table): Refer to mod_table[] for opcodes 0F3A30,
530 0F3A31, 0F3A32, and 0F3A33.
531 (vex_w_table): Delete opcode 0F3A30, 0F3A31, 0F3A32, and 0F3A33
533 (mod_table): Replace opcode 0F3A30, 0F3A31, 0F3A32, and 0F3A33
536 2020-07-14 Jan Beulich <jbeulich@suse.com>
538 * i386-dis.c (PREFIX_0F6C, PREFIX_0F6D, PREFIX_0F73_REG_3,
539 PREFIX_0F73_REG_7, PREFIX_0F3810, PREFIX_0F3814, PREFIX_0F3815,
540 PREFIX_0F3817, PREFIX_0F3820, PREFIX_0F3821, PREFIX_0F3822,
541 PREFIX_0F3823, PREFIX_0F3824, PREFIX_0F3825, PREFIX_0F3828,
542 PREFIX_0F3829, PREFIX_0F382A, PREFIX_0F382B, PREFIX_0F3830,
543 PREFIX_0F3831, PREFIX_0F3832, PREFIX_0F3833, PREFIX_0F3834,
544 PREFIX_0F3835, PREFIX_0F3837, PREFIX_0F3838, PREFIX_0F3839,
545 PREFIX_0F383A, PREFIX_0F383B, PREFIX_0F383C, PREFIX_0F383D,
546 PREFIX_0F383E, PREFIX_0F383F, PREFIX_0F3840, PREFIX_0F3841,
547 PREFIX_0F3880, PREFIX_0F3881, PREFIX_0F3882, PREFIX_0F38CF,
548 PREFIX_0F38DB, PREFIX_0F38DC, PREFIX_0F38DD, PREFIX_0F38DE,
549 PREFIX_0F38DF, PREFIX_0F38F5, PREFIX_0F3A08, PREFIX_0F3A09,
550 PREFIX_0F3A0A, PREFIX_0F3A0B, PREFIX_0F3A0C, PREFIX_0F3A0D,
551 PREFIX_0F3A0E, PREFIX_0F3A14, PREFIX_0F3A15, PREFIX_0F3A16,
552 PREFIX_0F3A17, PREFIX_0F3A20, PREFIX_0F3A21, PREFIX_0F3A22,
553 PREFIX_0F3A40, PREFIX_0F3A41, PREFIX_0F3A42, PREFIX_0F3A44,
554 PREFIX_0F3A60, PREFIX_0F3A61, PREFIX_0F3A62, PREFIX_0F3A63,
555 PREFIX_0F3ACE, PREFIX_0F3ACF, PREFIX_0F3ADF, PREFIX_VEX_0F60,
556 PREFIX_VEX_0F61, PREFIX_VEX_0F62, PREFIX_VEX_0F63,
557 PREFIX_VEX_0F64, PREFIX_VEX_0F65, PREFIX_VEX_0F66,
558 PREFIX_VEX_0F67, PREFIX_VEX_0F68, PREFIX_VEX_0F69,
559 PREFIX_VEX_0F6A, PREFIX_VEX_0F6B, PREFIX_VEX_0F6C,
560 PREFIX_VEX_0F6D, PREFIX_VEX_0F6E, PREFIX_VEX_0F71_REG_2,
561 PREFIX_VEX_0F71_REG_4, PREFIX_VEX_0F71_REG_6,
562 PREFIX_VEX_0F72_REG_2, PREFIX_VEX_0F72_REG_4,
563 PREFIX_VEX_0F72_REG_6, PREFIX_VEX_0F73_REG_2,
564 PREFIX_VEX_0F73_REG_3, PREFIX_VEX_0F73_REG_6,
565 PREFIX_VEX_0F73_REG_7, PREFIX_VEX_0F74,
566 PREFIX_VEX_0F75, PREFIX_VEX_0F76, PREFIX_VEX_0FC4,
567 PREFIX_VEX_0FC5, PREFIX_VEX_0FD1, PREFIX_VEX_0FD2,
568 PREFIX_VEX_0FD3, PREFIX_VEX_0FD4, PREFIX_VEX_0FD5,
569 PREFIX_VEX_0FD6, PREFIX_VEX_0FD7, PREFIX_VEX_0FD8,
570 PREFIX_VEX_0FD9, PREFIX_VEX_0FDA, PREFIX_VEX_0FDB,
571 PREFIX_VEX_0FDC, PREFIX_VEX_0FDD, PREFIX_VEX_0FDE,
572 PREFIX_VEX_0FDF, PREFIX_VEX_0FE0, PREFIX_VEX_0FE1,
573 PREFIX_VEX_0FE2, PREFIX_VEX_0FE3, PREFIX_VEX_0FE4,
574 PREFIX_VEX_0FE5, PREFIX_VEX_0FE7, PREFIX_VEX_0FE8,
575 PREFIX_VEX_0FE9, PREFIX_VEX_0FEA, PREFIX_VEX_0FEB,
576 PREFIX_VEX_0FEC, PREFIX_VEX_0FED, PREFIX_VEX_0FEE,
577 PREFIX_VEX_0FEF, PREFIX_VEX_0FF1, PREFIX_VEX_0FF2,
578 PREFIX_VEX_0FF3, PREFIX_VEX_0FF4, PREFIX_VEX_0FF5,
579 PREFIX_VEX_0FF6, PREFIX_VEX_0FF7, PREFIX_VEX_0FF8,
580 PREFIX_VEX_0FF9, PREFIX_VEX_0FFA, PREFIX_VEX_0FFB,
581 PREFIX_VEX_0FFC, PREFIX_VEX_0FFD, PREFIX_VEX_0FFE,
582 PREFIX_VEX_0F3800, PREFIX_VEX_0F3801, PREFIX_VEX_0F3802,
583 PREFIX_VEX_0F3803, PREFIX_VEX_0F3804, PREFIX_VEX_0F3805,
584 PREFIX_VEX_0F3806, PREFIX_VEX_0F3807, PREFIX_VEX_0F3808,
585 PREFIX_VEX_0F3809, PREFIX_VEX_0F380A, PREFIX_VEX_0F380B,
586 PREFIX_VEX_0F380C, PREFIX_VEX_0F380D, PREFIX_VEX_0F380E,
587 PREFIX_VEX_0F380F, PREFIX_VEX_0F3813, PREFIX_VEX_0F3816,
588 PREFIX_VEX_0F3817, PREFIX_VEX_0F3818, PREFIX_VEX_0F3819,
589 PREFIX_VEX_0F381A, PREFIX_VEX_0F381C, PREFIX_VEX_0F381D,
590 PREFIX_VEX_0F381E, PREFIX_VEX_0F3820, PREFIX_VEX_0F3821,
591 PREFIX_VEX_0F3822, PREFIX_VEX_0F3823, PREFIX_VEX_0F3824,
592 PREFIX_VEX_0F3825, PREFIX_VEX_0F3828, PREFIX_VEX_0F3829,
593 PREFIX_VEX_0F382A, PREFIX_VEX_0F382B, PREFIX_VEX_0F382C,
594 PREFIX_VEX_0F382D, PREFIX_VEX_0F382E, PREFIX_VEX_0F382F,
595 PREFIX_VEX_0F3830, PREFIX_VEX_0F3831, PREFIX_VEX_0F3832,
596 PREFIX_VEX_0F3833, PREFIX_VEX_0F3834, PREFIX_VEX_0F3835,
597 PREFIX_VEX_0F3836, PREFIX_VEX_0F3837, PREFIX_VEX_0F3838,
598 PREFIX_VEX_0F3839, PREFIX_VEX_0F383A, PREFIX_VEX_0F383B,
599 PREFIX_VEX_0F383C, PREFIX_VEX_0F383D, PREFIX_VEX_0F383E,
600 PREFIX_VEX_0F383F, PREFIX_VEX_0F3840, PREFIX_VEX_0F3841,
601 PREFIX_VEX_0F3845, PREFIX_VEX_0F3846, PREFIX_VEX_0F3847,
602 PREFIX_VEX_0F3858, PREFIX_VEX_0F3859, PREFIX_VEX_0F385A,
603 PREFIX_VEX_0F3878, PREFIX_VEX_0F3879, PREFIX_VEX_0F388C,
604 PREFIX_VEX_0F388E, PREFIX_VEX_0F3890, PREFIX_VEX_0F3891,
605 PREFIX_VEX_0F3892, PREFIX_VEX_0F3893, PREFIX_VEX_0F3896,
606 PREFIX_VEX_0F3897, PREFIX_VEX_0F3898, PREFIX_VEX_0F3899,
607 PREFIX_VEX_0F389A, PREFIX_VEX_0F389B, PREFIX_VEX_0F389C,
608 PREFIX_VEX_0F389D, PREFIX_VEX_0F389E, PREFIX_VEX_0F389F,
609 PREFIX_VEX_0F38A6, PREFIX_VEX_0F38A7, PREFIX_VEX_0F38A8,
610 PREFIX_VEX_0F38A9, PREFIX_VEX_0F38AA, PREFIX_VEX_0F38AB,
611 PREFIX_VEX_0F38AC, PREFIX_VEX_0F38AD, PREFIX_VEX_0F38AE,
612 PREFIX_VEX_0F38AF, PREFIX_VEX_0F38B6, PREFIX_VEX_0F38B7,
613 PREFIX_VEX_0F38B8, PREFIX_VEX_0F38B9, PREFIX_VEX_0F38BA,
614 PREFIX_VEX_0F38BB, PREFIX_VEX_0F38BC, PREFIX_VEX_0F38BD,
615 PREFIX_VEX_0F38BE, PREFIX_VEX_0F38BF, PREFIX_VEX_0F38CF,
616 PREFIX_VEX_0F38DB, PREFIX_VEX_0F38DC, PREFIX_VEX_0F38DD,
617 PREFIX_VEX_0F38DE, PREFIX_VEX_0F38DF, PREFIX_VEX_0F3A00,
618 PREFIX_VEX_0F3A01, PREFIX_VEX_0F3A02, PREFIX_VEX_0F3A04,
619 PREFIX_VEX_0F3A05, PREFIX_VEX_0F3A06, PREFIX_VEX_0F3A08,
620 PREFIX_VEX_0F3A09, PREFIX_VEX_0F3A0A, PREFIX_VEX_0F3A0B,
621 PREFIX_VEX_0F3A0C, PREFIX_VEX_0F3A0D, PREFIX_VEX_0F3A0E,
622 PREFIX_VEX_0F3A0F, PREFIX_VEX_0F3A14, PREFIX_VEX_0F3A15,
623 PREFIX_VEX_0F3A16, PREFIX_VEX_0F3A17, PREFIX_VEX_0F3A18,
624 PREFIX_VEX_0F3A19, PREFIX_VEX_0F3A1D, PREFIX_VEX_0F3A20,
625 PREFIX_VEX_0F3A21, PREFIX_VEX_0F3A22, PREFIX_VEX_0F3A30,
626 PREFIX_VEX_0F3A31, PREFIX_VEX_0F3A32, PREFIX_VEX_0F3A33,
627 PREFIX_VEX_0F3A38, PREFIX_VEX_0F3A39, PREFIX_VEX_0F3A40,
628 PREFIX_VEX_0F3A41, PREFIX_VEX_0F3A42, PREFIX_VEX_0F3A44,
629 PREFIX_VEX_0F3A46, PREFIX_VEX_0F3A48, PREFIX_VEX_0F3A49,
630 PREFIX_VEX_0F3A4A, PREFIX_VEX_0F3A4B, PREFIX_VEX_0F3A4C,
631 PREFIX_VEX_0F3A5C, PREFIX_VEX_0F3A5D, PREFIX_VEX_0F3A5E,
632 PREFIX_VEX_0F3A5F, PREFIX_VEX_0F3A60, PREFIX_VEX_0F3A61,
633 PREFIX_VEX_0F3A62, PREFIX_VEX_0F3A63, PREFIX_VEX_0F3A68,
634 PREFIX_VEX_0F3A69, PREFIX_VEX_0F3A6A, PREFIX_VEX_0F3A6B,
635 PREFIX_VEX_0F3A6C, PREFIX_VEX_0F3A6D, PREFIX_VEX_0F3A6E,
636 PREFIX_VEX_0F3A6F, PREFIX_VEX_0F3A78, PREFIX_VEX_0F3A79,
637 PREFIX_VEX_0F3A7A, PREFIX_VEX_0F3A7B, PREFIX_VEX_0F3A7C,
638 PREFIX_VEX_0F3A7D, PREFIX_VEX_0F3A7E, PREFIX_VEX_0F3A7F,
639 PREFIX_VEX_0F3ACE, PREFIX_VEX_0F3ACF, PREFIX_VEX_0F3ADF,
640 PREFIX_EVEX_0F64, PREFIX_EVEX_0F65, PREFIX_EVEX_0F66,
641 PREFIX_EVEX_0F6E, PREFIX_EVEX_0F71_REG_2,
642 PREFIX_EVEX_0F71_REG_4, PREFIX_EVEX_0F71_REG_6,
643 PREFIX_EVEX_0F72_REG_0, PREFIX_EVEX_0F72_REG_1,
644 PREFIX_EVEX_0F72_REG_2, PREFIX_EVEX_0F72_REG_4,
645 PREFIX_EVEX_0F72_REG_6, PREFIX_EVEX_0F73_REG_2,
646 PREFIX_EVEX_0F73_REG_3, PREFIX_EVEX_0F73_REG_6,
647 PREFIX_EVEX_0F73_REG_7, PREFIX_EVEX_0F74, PREFIX_EVEX_0F75,
648 PREFIX_EVEX_0F76, PREFIX_EVEX_0FC4, PREFIX_EVEX_0FC5,
649 PREFIX_EVEX_0FD6, PREFIX_EVEX_0FDB, PREFIX_EVEX_0FDF,
650 PREFIX_EVEX_0FE2, PREFIX_EVEX_0FE7, PREFIX_EVEX_0FEB,
651 PREFIX_EVEX_0FEF, PREFIX_EVEX_0F380D, PREFIX_EVEX_0F3816,
652 PREFIX_EVEX_0F3819, PREFIX_EVEX_0F381A, PREFIX_EVEX_0F381B,
653 PREFIX_EVEX_0F381E, PREFIX_EVEX_0F381F, PREFIX_EVEX_0F382C,
654 PREFIX_EVEX_0F382D, PREFIX_EVEX_0F3836, PREFIX_EVEX_0F3837,
655 PREFIX_EVEX_0F383B, PREFIX_EVEX_0F383D, PREFIX_EVEX_0F383F,
656 PREFIX_EVEX_0F3840, PREFIX_EVEX_0F3842, PREFIX_EVEX_0F3843,
657 PREFIX_EVEX_0F3844, PREFIX_EVEX_0F3845, PREFIX_EVEX_0F3846,
658 PREFIX_EVEX_0F3847, PREFIX_EVEX_0F384C, PREFIX_EVEX_0F384D,
659 PREFIX_EVEX_0F384E, PREFIX_EVEX_0F384F, PREFIX_EVEX_0F3850,
660 PREFIX_EVEX_0F3851, PREFIX_EVEX_0F3854, PREFIX_EVEX_0F3855,
661 PREFIX_EVEX_0F3859, PREFIX_EVEX_0F385A, PREFIX_EVEX_0F385B,
662 PREFIX_EVEX_0F3862, PREFIX_EVEX_0F3863, PREFIX_EVEX_0F3864,
663 PREFIX_EVEX_0F3865, PREFIX_EVEX_0F3866, PREFIX_EVEX_0F3870,
664 PREFIX_EVEX_0F3871, PREFIX_EVEX_0F3873, PREFIX_EVEX_0F3875,
665 PREFIX_EVEX_0F3876, PREFIX_EVEX_0F3877, PREFIX_EVEX_0F387A,
666 PREFIX_EVEX_0F387B, PREFIX_EVEX_0F387C, PREFIX_EVEX_0F387D,
667 PREFIX_EVEX_0F387E, PREFIX_EVEX_0F387F, PREFIX_EVEX_0F3883,
668 PREFIX_EVEX_0F3888, PREFIX_EVEX_0F3889, PREFIX_EVEX_0F388A,
669 PREFIX_EVEX_0F388B, PREFIX_EVEX_0F388D, PREFIX_EVEX_0F388F,
670 PREFIX_EVEX_0F3890, PREFIX_EVEX_0F3891, PREFIX_EVEX_0F3892,
671 PREFIX_EVEX_0F3893, PREFIX_EVEX_0F38A0, PREFIX_EVEX_0F38A1,
672 PREFIX_EVEX_0F38A2, PREFIX_EVEX_0F38A3, PREFIX_EVEX_0F38B4,
673 PREFIX_EVEX_0F38B5, PREFIX_EVEX_0F38C4,
674 PREFIX_EVEX_0F38C6_REG_1, PREFIX_EVEX_0F38C6_REG_2,
675 PREFIX_EVEX_0F38C6_REG_5, PREFIX_EVEX_0F38C6_REG_6,
676 PREFIX_EVEX_0F38C7_REG_1, PREFIX_EVEX_0F38C7_REG_2,
677 PREFIX_EVEX_0F38C7_REG_5, PREFIX_EVEX_0F38C7_REG_6,
678 PREFIX_EVEX_0F38C8, PREFIX_EVEX_0F38CA, PREFIX_EVEX_0F38CB,
679 PREFIX_EVEX_0F38CC, PREFIX_EVEX_0F38CD, PREFIX_EVEX_0F3A00,
680 PREFIX_EVEX_0F3A01, PREFIX_EVEX_0F3A03, PREFIX_EVEX_0F3A05,
681 PREFIX_EVEX_0F3A08, PREFIX_EVEX_0F3A09, PREFIX_EVEX_0F3A0A,
682 PREFIX_EVEX_0F3A0B, PREFIX_EVEX_0F3A14, PREFIX_EVEX_0F3A15,
683 PREFIX_EVEX_0F3A16, PREFIX_EVEX_0F3A17, PREFIX_EVEX_0F3A18,
684 PREFIX_EVEX_0F3A19, PREFIX_EVEX_0F3A1A, PREFIX_EVEX_0F3A1B,
685 PREFIX_EVEX_0F3A1E, PREFIX_EVEX_0F3A1F, PREFIX_EVEX_0F3A20,
686 PREFIX_EVEX_0F3A21, PREFIX_EVEX_0F3A22, PREFIX_EVEX_0F3A23,
687 PREFIX_EVEX_0F3A25, PREFIX_EVEX_0F3A26, PREFIX_EVEX_0F3A27,
688 PREFIX_EVEX_0F3A38, PREFIX_EVEX_0F3A39, PREFIX_EVEX_0F3A3A,
689 PREFIX_EVEX_0F3A3B, PREFIX_EVEX_0F3A3E, PREFIX_EVEX_0F3A3F,
690 PREFIX_EVEX_0F3A42, PREFIX_EVEX_0F3A43, PREFIX_EVEX_0F3A50,
691 PREFIX_EVEX_0F3A51, PREFIX_EVEX_0F3A54, PREFIX_EVEX_0F3A55,
692 PREFIX_EVEX_0F3A56, PREFIX_EVEX_0F3A57, PREFIX_EVEX_0F3A66,
693 PREFIX_EVEX_0F3A67, PREFIX_EVEX_0F3A70, PREFIX_EVEX_0F3A71,
694 PREFIX_EVEX_0F3A72, PREFIX_EVEX_0F3A73): Delete.
695 (MOD_0F382A_PREFIX_2, MOD_0F38F5_PREFIX_2,
696 MOD_VEX_0FD7_PREFIX_2, MOD_VEX_0FE7_PREFIX_2,
697 MOD_VEX_0F381A_PREFIX_2, MOD_VEX_0F382A_PREFIX_2,
698 MOD_VEX_0F382C_PREFIX_2, MOD_VEX_0F382D_PREFIX_2,
699 MOD_VEX_0F382E_PREFIX_2, MOD_VEX_0F382F_PREFIX_2,
700 MOD_VEX_0F385A_PREFIX_2, MOD_VEX_0F388C_PREFIX_2,
701 MOD_VEX_0F388E_PREFIX_2, MOD_VEX_W_0_0F3A30_P_2_LEN_0,
702 MOD_VEX_W_1_0F3A30_P_2_LEN_0, MOD_VEX_W_0_0F3A31_P_2_LEN_0,
703 MOD_VEX_W_1_0F3A31_P_2_LEN_0, MOD_VEX_W_0_0F3A32_P_2_LEN_0,
704 MOD_VEX_W_1_0F3A32_P_2_LEN_0, MOD_VEX_W_0_0F3A33_P_2_LEN_0,
705 MOD_VEX_W_1_0F3A33_P_2_LEN_0, MOD_EVEX_0F381A_P_2_W_0,
706 MOD_EVEX_0F381A_P_2_W_1, MOD_EVEX_0F381B_P_2_W_0,
707 MOD_EVEX_0F381B_P_2_W_1, MOD_EVEX_0F385A_P_2_W_0,
708 MOD_EVEX_0F385A_P_2_W_1, MOD_EVEX_0F385B_P_2_W_0,
709 MOD_EVEX_0F385B_P_2_W_1, VEX_LEN_0F6E_P_2,
710 VEX_LEN_0FC4_P_2, VEX_LEN_0FC5_P_2, VEX_LEN_0FD6_P_2,
711 VEX_LEN_0FF7_P_2, VEX_LEN_0F3816_P_2, VEX_LEN_0F3819_P_2,
712 VEX_LEN_0F381A_P_2_M_0, VEX_LEN_0F3836_P_2,
713 VEX_LEN_0F3841_P_2, VEX_LEN_0F385A_P_2_M_0,
714 VEX_LEN_0F38DB_P_2, VEX_LEN_0F3A00_P_2, VEX_LEN_0F3A01_P_2,
715 VEX_LEN_0F3A06_P_2, VEX_LEN_0F3A14_P_2, VEX_LEN_0F3A15_P_2,
716 VEX_LEN_0F3A16_P_2, VEX_LEN_0F3A17_P_2, VEX_LEN_0F3A18_P_2,
717 VEX_LEN_0F3A19_P_2, VEX_LEN_0F3A20_P_2, VEX_LEN_0F3A21_P_2,
718 VEX_LEN_0F3A22_P_2, VEX_LEN_0F3A30_P_2, VEX_LEN_0F3A31_P_2,
719 VEX_LEN_0F3A32_P_2, VEX_LEN_0F3A33_P_2, VEX_LEN_0F3A38_P_2,
720 VEX_LEN_0F3A39_P_2, VEX_LEN_0F3A41_P_2, VEX_LEN_0F3A46_P_2,
721 VEX_LEN_0F3A60_P_2, VEX_LEN_0F3A61_P_2, VEX_LEN_0F3A62_P_2,
722 VEX_LEN_0F3A63_P_2, VEX_LEN_0F3ADF_P_2, EVEX_LEN_0F6E_P_2,
723 EVEX_LEN_0FC4_P_2, EVEX_LEN_0FC5_P_2, EVEX_LEN_0FD6_P_2,
724 EVEX_LEN_0F3816_P_2, EVEX_LEN_0F3819_P_2_W_0,
725 EVEX_LEN_0F3819_P_2_W_1, EVEX_LEN_0F381A_P_2_W_0_M_0,
726 EVEX_LEN_0F381A_P_2_W_1_M_0, EVEX_LEN_0F381B_P_2_W_0_M_0,
727 EVEX_LEN_0F381B_P_2_W_1_M_0, EVEX_LEN_0F3836_P_2,
728 EVEX_LEN_0F385A_P_2_W_0_M_0, EVEX_LEN_0F385A_P_2_W_1_M_0,
729 EVEX_LEN_0F385B_P_2_W_0_M_0, EVEX_LEN_0F385B_P_2_W_1_M_0,
730 EVEX_LEN_0F38C6_REG_1_PREFIX_2, EVEX_LEN_0F38C6_REG_2_PREFIX_2,
731 EVEX_LEN_0F38C6_REG_5_PREFIX_2, EVEX_LEN_0F38C6_REG_6_PREFIX_2,
732 EVEX_LEN_0F38C7_R_1_P_2_W_0, EVEX_LEN_0F38C7_R_1_P_2_W_1,
733 EVEX_LEN_0F38C7_R_2_P_2_W_0, EVEX_LEN_0F38C7_R_2_P_2_W_1,
734 EVEX_LEN_0F38C7_R_5_P_2_W_0, EVEX_LEN_0F38C7_R_5_P_2_W_1,
735 EVEX_LEN_0F38C7_R_6_P_2_W_0, EVEX_LEN_0F38C7_R_6_P_2_W_1,
736 EVEX_LEN_0F3A00_P_2_W_1, EVEX_LEN_0F3A01_P_2_W_1,
737 EVEX_LEN_0F3A14_P_2, EVEX_LEN_0F3A15_P_2, EVEX_LEN_0F3A16_P_2,
738 EVEX_LEN_0F3A17_P_2, EVEX_LEN_0F3A18_P_2_W_0,
739 EVEX_LEN_0F3A18_P_2_W_1, EVEX_LEN_0F3A19_P_2_W_0,
740 EVEX_LEN_0F3A19_P_2_W_1, EVEX_LEN_0F3A1A_P_2_W_0,
741 EVEX_LEN_0F3A1A_P_2_W_1, EVEX_LEN_0F3A1B_P_2_W_0,
742 EVEX_LEN_0F3A1B_P_2_W_1, EVEX_LEN_0F3A20_P_2,
743 EVEX_LEN_0F3A21_P_2_W_0, EVEX_LEN_0F3A22_P_2,
744 EVEX_LEN_0F3A23_P_2_W_0, EVEX_LEN_0F3A23_P_2_W_1,
745 EVEX_LEN_0F3A38_P_2_W_0, EVEX_LEN_0F3A38_P_2_W_1,
746 EVEX_LEN_0F3A39_P_2_W_0, EVEX_LEN_0F3A39_P_2_W_1,
747 EVEX_LEN_0F3A3A_P_2_W_0, EVEX_LEN_0F3A3A_P_2_W_1,
748 EVEX_LEN_0F3A3B_P_2_W_0, EVEX_LEN_0F3A3B_P_2_W_1,
749 EVEX_LEN_0F3A43_P_2_W_0, EVEX_LEN_0F3A43_P_2_W_1
750 VEX_W_0F380C_P_2, VEX_W_0F380D_P_2, VEX_W_0F380E_P_2,
751 VEX_W_0F380F_P_2, VEX_W_0F3813_P_2, VEX_W_0F3816_P_2,
752 VEX_W_0F3818_P_2, VEX_W_0F3819_P_2,
753 VEX_W_0F381A_P_2_M_0_L_0, VEX_W_0F382C_P_2_M_0,
754 VEX_W_0F382D_P_2_M_0, VEX_W_0F382E_P_2_M_0,
755 VEX_W_0F382F_P_2_M_0, VEX_W_0F3836_P_2,
756 VEX_W_0F3846_P_2, VEX_W_0F3858_P_2, VEX_W_0F3859_P_2,
757 VEX_W_0F385A_P_2_M_0_L_0, VEX_W_0F3878_P_2,
758 VEX_W_0F3879_P_2, VEX_W_0F38CF_P_2, VEX_W_0F3A00_P_2,
759 VEX_W_0F3A01_P_2, VEX_W_0F3A02_P_2, VEX_W_0F3A04_P_2,
760 VEX_W_0F3A05_P_2, VEX_W_0F3A06_P_2_L_0,
761 VEX_W_0F3A18_P_2_L_0, VEX_W_0F3A19_P_2_L_0,
762 VEX_W_0F3A1D_P_2, VEX_W_0F3A30_P_2_LEN_0,
763 VEX_W_0F3A31_P_2_LEN_0, VEX_W_0F3A32_P_2_LEN_0,
764 VEX_W_0F3A33_P_2_LEN_0, VEX_W_0F3A38_P_2_L_0,
765 VEX_W_0F3A39_P_2_L_0, VEX_W_0F3A46_P_2_L_0,
766 VEX_W_0F3A4A_P_2, VEX_W_0F3A4B_P_2, VEX_W_0F3A4C_P_2,
767 VEX_W_0F3ACE_P_2, VEX_W_0F3ACF_P_2, EVEX_W_0F66_P_2,
768 EVEX_W_0F72_R_2_P_2, EVEX_W_0F72_R_6_P_2,
769 EVEX_W_0F73_R_2_P_2, EVEX_W_0F73_R_6_P_2,
770 EVEX_W_0F76_P_2, EVEX_W_0FD6_P_2, EVEX_W_0FE7_P_2,
771 EVEX_W_0F380D_P_2, EVEX_W_0F3819_P_2,
772 EVEX_W_0F381A_P_2, EVEX_W_0F381B_P_2,
773 EVEX_W_0F381E_P_2, EVEX_W_0F381F_P_2,
774 EVEX_W_0F3837_P_2, EVEX_W_0F3859_P_2,
775 EVEX_W_0F385A_P_2, EVEX_W_0F385B_P_2,
776 EVEX_W_0F3870_P_2, EVEX_W_0F387A_P_2,
777 EVEX_W_0F387B_P_2, EVEX_W_0F3883_P_2,
778 EVEX_W_0F3891_P_2, EVEX_W_0F3893_P_2,
779 EVEX_W_0F38A1_P_2, EVEX_W_0F38A3_P_2,
780 EVEX_W_0F38C7_R_1_P_2, EVEX_W_0F38C7_R_2_P_2,
781 EVEX_W_0F38C7_R_5_P_2, EVEX_W_0F38C7_R_6_P_2,
782 EVEX_W_0F3A00_P_2, EVEX_W_0F3A01_P_2,
783 EVEX_W_0F3A05_P_2, EVEX_W_0F3A08_P_2,
784 EVEX_W_0F3A09_P_2, EVEX_W_0F3A0A_P_2,
785 EVEX_W_0F3A0B_P_2, EVEX_W_0F3A18_P_2,
786 EVEX_W_0F3A19_P_2, EVEX_W_0F3A1A_P_2,
787 EVEX_W_0F3A1B_P_2, EVEX_W_0F3A21_P_2,
788 EVEX_W_0F3A23_P_2, EVEX_W_0F3A38_P_2,
789 EVEX_W_0F3A39_P_2, EVEX_W_0F3A3A_P_2,
790 EVEX_W_0F3A3B_P_2, EVEX_W_0F3A42_P_2,
791 EVEX_W_0F3A43_P_2, EVEX_W_0F3A70_P_2,
792 EVEX_W_0F3A72_P_2): Rename to ...
793 (MOD_0F382A, MOD_0F38F5, MOD_VEX_0FD7, MOD_VEX_0FE7,
794 MOD_VEX_0F381A, MOD_VEX_0F382A, MOD_VEX_0F382C, MOD_VEX_0F382D,
795 MOD_VEX_0F382E, MOD_VEX_0F382F, MOD_VEX_0F385A, MOD_VEX_0F388C,
796 MOD_VEX_0F388E, MOD_VEX_0F3A30_L_0_W_0,
797 MOD_VEX_0F3A30_L_0_W_1, MOD_VEX_0F3A31_L_0_W_0,
798 MOD_VEX_0F3A31_L_0_W_1, MOD_VEX_0F3A32_L_0_W_0,
799 MOD_VEX_0F3A32_L_0_W_1, MOD_VEX_0F3A33_L_0_W_0,
800 MOD_VEX_0F3A33_L_0_W_1, MOD_EVEX_0F381A_W_0,
801 MOD_EVEX_0F381A_W_1, MOD_EVEX_0F381B_W_0, MOD_EVEX_0F381B_W_1,
802 MOD_EVEX_0F385A_W_0, MOD_EVEX_0F385A_W_1, MOD_EVEX_0F385B_W_0,
803 MOD_EVEX_0F385B_W_1, VEX_LEN_0F6E, VEX_LEN_0FC4, VEX_LEN_0FC5,
804 VEX_LEN_0FD6, VEX_LEN_0FF7, VEX_LEN_0F3816, VEX_LEN_0F3819,
805 VEX_LEN_0F381A_M_0, VEX_LEN_0F3836, VEX_LEN_0F3841,
806 VEX_LEN_0F385A_M_0, VEX_LEN_0F38DB, VEX_LEN_0F3A00,
807 VEX_LEN_0F3A01, VEX_LEN_0F3A06, VEX_LEN_0F3A14, VEX_LEN_0F3A15,
808 VEX_LEN_0F3A16, VEX_LEN_0F3A17, VEX_LEN_0F3A18, VEX_LEN_0F3A19,
809 VEX_LEN_0F3A20, VEX_LEN_0F3A21, VEX_LEN_0F3A22, VEX_LEN_0F3A30,
810 VEX_LEN_0F3A31, VEX_LEN_0F3A32, VEX_LEN_0F3A33, VEX_LEN_0F3A38,
811 VEX_LEN_0F3A39, VEX_LEN_0F3A41, VEX_LEN_0F3A46, VEX_LEN_0F3A60,
812 VEX_LEN_0F3A61, VEX_LEN_0F3A62, VEX_LEN_0F3A63, VEX_LEN_0F3ADF,
813 EVEX_LEN_0F6E, EVEX_LEN_0FC4, EVEX_LEN_0FC5, EVEX_LEN_0FD6,
814 EVEX_LEN_0F3816, EVEX_LEN_0F3819_W_0, EVEX_LEN_0F3819_W_1,
815 EVEX_LEN_0F381A_W_0_M_0, EVEX_LEN_0F381A_W_1_M_0,
816 EVEX_LEN_0F381B_W_0_M_0, EVEX_LEN_0F381B_W_1_M_0,
817 EVEX_LEN_0F3836, EVEX_LEN_0F385A_W_0_M_0,
818 EVEX_LEN_0F385A_W_1_M_0, EVEX_LEN_0F385B_W_0_M_0,
819 EVEX_LEN_0F385B_W_1_M_0, EVEX_LEN_0F38C6_R_1_M_0,
820 EVEX_LEN_0F38C6_R_2_M_0, EVEX_LEN_0F38C6_R_5_M_0,
821 EVEX_LEN_0F38C6_R_6_M_0, EVEX_LEN_0F38C7_R_1_M_0_W_0,
822 EVEX_LEN_0F38C7_R_1_M_0_W_1, EVEX_LEN_0F38C7_R_2_M_0_W_0,
823 EVEX_LEN_0F38C7_R_2_M_0_W_1, EVEX_LEN_0F38C7_R_5_M_0_W_0,
824 EVEX_LEN_0F38C7_R_5_M_0_W_1, EVEX_LEN_0F38C7_R_6_M_0_W_0,
825 EVEX_LEN_0F38C7_R_6_M_0_W_1, EVEX_LEN_0F3A00_W_1,
826 EVEX_LEN_0F3A01_W_1, EVEX_LEN_0F3A14, EVEX_LEN_0F3A15,
827 EVEX_LEN_0F3A16, EVEX_LEN_0F3A17, EVEX_LEN_0F3A18_W_0,
828 EVEX_LEN_0F3A18_W_1, EVEX_LEN_0F3A19_W_0,
829 EVEX_LEN_0F3A19_W_1, EVEX_LEN_0F3A1A_W_0,
830 EVEX_LEN_0F3A1A_W_1, EVEX_LEN_0F3A1B_W_0,
831 EVEX_LEN_0F3A1B_W_1, EVEX_LEN_0F3A20, EVEX_LEN_0F3A21_W_0,
832 EVEX_LEN_0F3A22, EVEX_LEN_0F3A23_W_0, EVEX_LEN_0F3A23_W_1,
833 EVEX_LEN_0F3A38_W_0, EVEX_LEN_0F3A38_W_1,
834 EVEX_LEN_0F3A39_W_0, EVEX_LEN_0F3A39_W_1,
835 EVEX_LEN_0F3A3A_W_0, EVEX_LEN_0F3A3A_W_1,
836 EVEX_LEN_0F3A3B_W_0, EVEX_LEN_0F3A3B_W_1,
837 EVEX_LEN_0F3A43_W_0, EVEX_LEN_0F3A43_W_1
838 VEX_W_0F380C, VEX_W_0F380D, VEX_W_0F380E, VEX_W_0F380F,
839 VEX_W_0F3813, VEX_W_0F3816_L_1, VEX_W_0F3818,
840 VEX_W_0F3819_L_1, VEX_W_0F381A_M_0_L_1, VEX_W_0F382C_M_0,
841 VEX_W_0F382D_M_0, VEX_W_0F382E_M_0, VEX_W_0F382F_M_0,
842 VEX_W_0F3836, VEX_W_0F3846, VEX_W_0F3858, VEX_W_0F3859,
843 VEX_W_0F385A_M_0_L_0, VEX_W_0F3878, VEX_W_0F3879,
844 VEX_W_0F38CF, VEX_W_0F3A00_L_1, VEX_W_0F3A01_L_1,
845 VEX_W_0F3A02, VEX_W_0F3A04, VEX_W_0F3A05, VEX_W_0F3A06_L_1,
846 VEX_W_0F3A18_L_1, VEX_W_0F3A19_L_1, VEX_W_0F3A1D,
847 VEX_W_0F3A30_L_0, VEX_W_0F3A31_L_0, VEX_W_0F3A32_L_0,
848 VEX_W_0F3A33_L_0, VEX_W_0F3A38_L_1, VEX_W_0F3A39_L_1,
849 VEX_W_0F3A46_L_1, VEX_W_0F3A4A, VEX_W_0F3A4B, VEX_W_0F3A4C,
850 VEX_W_0F3ACE, VEX_W_0F3ACF, EVEX_W_0F66, EVEX_W_0F72_R_2,
851 EVEX_W_0F72_R_6, EVEX_W_0F73_R_2, EVEX_W_0F73_R_6,
852 EVEX_W_0F76, EVEX_W_0FD6_L_0, EVEX_W_0FE7, EVEX_W_0F380D,
853 EVEX_W_0F3819, EVEX_W_0F381A, EVEX_W_0F381B, EVEX_W_0F381E,
854 EVEX_W_0F381F, EVEX_W_0F3837, EVEX_W_0F3859, EVEX_W_0F385A,
855 EVEX_W_0F385B, EVEX_W_0F3870, EVEX_W_0F387A, EVEX_W_0F387B,
856 EVEX_W_0F3883, EVEX_W_0F3891, EVEX_W_0F3893, EVEX_W_0F38A1,
857 EVEX_W_0F38A3, EVEX_W_0F38C7_R_1_M_0,
858 EVEX_W_0F38C7_R_2_M_0, EVEX_W_0F38C7_R_5_M_0,
859 EVEX_W_0F38C7_R_6_M_0, EVEX_W_0F3A00, EVEX_W_0F3A01,
860 EVEX_W_0F3A05, EVEX_W_0F3A08, EVEX_W_0F3A09, EVEX_W_0F3A0A,
861 EVEX_W_0F3A0B, EVEX_W_0F3A18, EVEX_W_0F3A19, EVEX_W_0F3A1A,
862 EVEX_W_0F3A1B, EVEX_W_0F3A21, EVEX_W_0F3A23, EVEX_W_0F3A38,
863 EVEX_W_0F3A39, EVEX_W_0F3A3A, EVEX_W_0F3A3B, EVEX_W_0F3A42,
864 EVEX_W_0F3A43, EVEX_W_0F3A70, EVEX_W_0F3A72): ... these
866 (dis386_twobyte, three_byte_table, vex_table, vex_len_table,
867 vex_w_table, mod_table): Replace / remove respective entries.
868 (print_insn): Move up dp->prefix_requirement handling. Handle
870 * i386-dis-evex.h, i386-dis-evex-len.h, i386-dis-evex-mod.h,
871 i386-dis-evex-prefix.h, i386-dis-evex-reg.h, i386-dis-evex-w.h:
872 Replace / remove respective entries.
874 2020-07-14 Jan Beulich <jbeulich@suse.com>
876 * i386-dis.c (PREFIX_EVEX_0F2C, PREFIX_EVEX_0F2D,
877 PREFIX_EVEX_0F2E, PREFIX_EVEX_0F2F): Delete.
878 (prefix_table): Add EXxEVexS operand to vcvttss2si, vcvttsd2si,
879 vcvtss2si, vcvtsd2si, vucomiss, and vucomisd table entries.
880 Retain X macro and PREFIX_OPCODE use from tjhe EVEX table for
882 * i386-dis-evex.h (evex_table): Reference VEX table for opcodes
883 0F2C, 0F2D, 0F2E, and 0F2F.
884 * i386-dis-evex-prefix.h: Delete opcode 0F2C, 0F2D, 0F2E, and
887 2020-07-14 Jan Beulich <jbeulich@suse.com>
889 * i386-dis.c (OP_VexR, VexScalarR): New.
890 (OP_EX_Vex, OP_XMM_Vex, EXdVexScalarS, EXqVexScalarS,
891 XMVexScalar, d_scalar_swap_mode, q_scalar_swap_mode,
892 need_vex_reg): Delete.
893 (prefix_table): Replace VexScalar by VexScalarR and
894 XMVexScalar by XMScalar for vmovss and vmovsd. Replace
895 EXdVexScalarS by EXdS and EXqVexScalarS by EXqS.
896 (vex_len_table): Replace EXqVexScalarS by EXqS.
897 (get_valid_dis386): Don't set need_vex_reg.
898 (print_insn): Don't initialize need_vex_reg.
899 (intel_operand_size, OP_E_memory): Drop d_scalar_swap_mode and
900 q_scalar_swap_mode cases.
901 (OP_EX): Don't check for d_scalar_swap_mode and
903 (OP_VEX): Done check need_vex_reg.
904 * i386-dis-evex-w.h: Replace VexScalar by VexScalarR and
905 XMVexScalar by XMScalar for vmovss and vmovsd. Replace
906 EXdVexScalarS by EXdS and EXqVexScalarS by EXqS.
908 2020-07-14 Jan Beulich <jbeulich@suse.com>
910 * i386-dis.c (Vex128, Vex256, vex128_mode, vex256_mode): Delete.
911 (VEX_W_0F381A_P_2_M_0, VEX_W_0F385A_P_2_M_0, VEX_W_0F3A06_P_2,
912 VEX_W_0F3A18_P_2, VEX_W_0F3A19_P_2, VEX_W_0F3A38_P_2,
913 VEX_W_0F3A39_P_2, VEX_W_0F3A46_P_2): Rename to ...
914 (VEX_W_0F381A_P_2_M_0_L_0, VEX_W_0F385A_P_2_M_0_L_0,
915 VEX_W_0F3A06_P_2_L_0, VEX_W_0F3A18_P_2_L_0,
916 VEX_W_0F3A19_P_2_L_0, VEX_W_0F3A38_P_2_L_0,
917 VEX_W_0F3A39_P_2_L_0, VEX_W_0F3A46_P_2_L_0): ... respectively.
918 (vex_table): Replace Vex128 by Vex.
919 (vex_len_table): Likewise. Adjust referenced enum names.
920 (vex_w_table): Replace Vex128 and Vex256 by Vex. Adjust
921 referenced enum names.
922 (OP_VEX): Drop vex128_mode and vex256_mode cases.
923 * i386-dis-evex-len.h (evex_len_table): Replace Vex128 by Vex.
925 2020-07-14 Jan Beulich <jbeulich@suse.com>
927 * i386-dis.c (dis386): "LW" description now applies to "DQ".
928 (putop): Handle "DQ". Don't handle "LW" anymore.
929 (prefix_table, mod_table): Replace %LW by %DQ.
930 * i386-dis-evex-len.h, i386-dis-evex-prefix.h: Likewise.
932 2020-07-14 Jan Beulich <jbeulich@suse.com>
934 * i386-dis.c (OP_E_memory): Move xmm_mw_mode, xmm_mb_mode,
935 dqd_mode, xmm_md_mode, d_mode, d_swap_mode, and
936 d_scalar_swap_mode case handling. Move shift adjsutment into
937 the case its applicable to.
939 2020-07-14 Jan Beulich <jbeulich@suse.com>
941 * i386-dis.c (EVEX_W_0F3862_P_2, EVEX_W_0F3863_P_2): Delete.
942 (EXbScalar, EXwScalar): Fold to ...
943 (EXbwUnit): ... this.
944 (b_scalar_mode, w_scalar_mode): Fold to ...
945 (bw_unit_mode): ... this.
946 (intel_operand_size, OP_E_memory): Replace b_scalar_mode /
947 w_scalar_mode handling by bw_unit_mode one.
948 * i386-dis-evex-w.h: Move entries for opcodes 0F3862 and 0F3863
950 * i386-dis-evex-prefix.h: ... here.
952 2020-07-14 Jan Beulich <jbeulich@suse.com>
954 * i386-dis.c (PCMPESTR_Fixup): Delete.
955 (dis386): Adjust "LQ" description.
956 (prefix_table): Make %LQ apply to AT&T case only for cvtsi2ss,
957 cvtsi2sd, ptwrite, vcvtsi2ss, and vcvtsi2sd. Replace use of
958 PCMPESTR_Fixup by !%LQ and EXx for pcmpestrm, pcmpestri,
959 vpcmpestrm, and vpcmpestri.
960 (putop): Honor "cond" when handling LQ.
961 * i386-dis-evex-prefix.h: Make %LQ apply to AT&T case only for
962 vcvtsi2ss and vcvtusi2ss.
963 * i386-dis-evex-w.h: Make %LQ apply to AT&T case only for
964 vcvtsi2sd and vcvtusi2sd.
966 2020-07-14 Jan Beulich <jbeulich@suse.com>
968 * i386-dis.c (VCMP_Fixup, VCMP): Delete.
969 (simd_cmp_op): Add const.
970 (vex_cmp_op): Move up and drop initial 8 entries. Add const.
971 (CMP_Fixup): Handle VEX case.
972 (prefix_table): Replace VCMP by CMP.
973 * i386-dis-evex-prefix.h, i386-dis-evex-w.h: Likewise.
975 2020-07-14 Jan Beulich <jbeulich@suse.com>
977 * i386-dis.c (MOVBE_Fixup): Delete.
979 (prefix_table): Use Mv for movbe entries.
981 2020-07-14 Jan Beulich <jbeulich@suse.com>
983 * i386-dis.c (CRC32_Fixup): Delete.
984 (prefix_table): Use Eb/Ev for crc32 entries.
986 2020-07-14 Jan Beulich <jbeulich@suse.com>
988 * i386-dis.c (OP_E_register, OP_G, OP_REG, CRC32_Fixup):
989 Conditionalize invocations of "USED_REX (0)".
991 2020-07-14 Jan Beulich <jbeulich@suse.com>
993 * i386-dis.c (eBX, eCX, eDX, eSP, eBP, eSI, eDI, DL, BL, AH,
994 CH, DH, BH, AX, DX): Delete.
995 (OP_IMREG): Drop handling of eBX_reg, eCX_reg, eDX_reg, eSP_reg,
996 eBP_reg, eSI_reg, eDI_reg, dl_reg, bl_reg, ah_reg, ch_reg,
997 dh_reg, bh_reg, ax_reg, and dx_reg. Simplify what's left.
999 2020-07-10 Lili Cui <lili.cui@intel.com>
1001 * i386-dis.c (TMM): New.
1004 (MVexSIBMEM): Likewise.
1005 (tmm_mode): Likewise.
1006 (vex_sibmem_mode): Likewise.
1007 (REG_VEX_0F3849_X86_64_P_0_W_0_M_1): Likewise.
1008 (MOD_VEX_0F3849_X86_64_P_0_W_0): Likewise.
1009 (MOD_VEX_0F3849_X86_64_P_2_W_0): Likewise.
1010 (MOD_VEX_0F3849_X86_64_P_3_W_0): Likewise.
1011 (MOD_VEX_0F384B_X86_64_P_1_W_0): Likewise.
1012 (MOD_VEX_0F384B_X86_64_P_2_W_0): Likewise.
1013 (MOD_VEX_0F384B_X86_64_P_3_W_0): Likewise.
1014 (MOD_VEX_0F385C_X86_64_P_1_W_0): Likewise.
1015 (MOD_VEX_0F385E_X86_64_P_0_W_0): Likewise.
1016 (MOD_VEX_0F385E_X86_64_P_1_W_0): Likewise.
1017 (MOD_VEX_0F385E_X86_64_P_2_W_0): Likewise.
1018 (MOD_VEX_0F385E_X86_64_P_3_W_0): Likewise.
1019 (RM_VEX_0F3849_X86_64_P_0_W_0_M_1_R_0): Likewise.
1020 (PREFIX_VEX_0F3849_X86_64): Likewise.
1021 (PREFIX_VEX_0F384B_X86_64): Likewise.
1022 (PREFIX_VEX_0F385C_X86_64): Likewise.
1023 (PREFIX_VEX_0F385E_X86_64): Likewise.
1024 (X86_64_VEX_0F3849): Likewise.
1025 (X86_64_VEX_0F384B): Likewise.
1026 (X86_64_VEX_0F385C): Likewise.
1027 (X86_64_VEX_0F385E): Likewise.
1028 (VEX_LEN_0F3849_X86_64_P_0_W_0_M_0): Likewise.
1029 (VEX_LEN_0F3849_X86_64_P_0_W_0_M_1_REG_0_RM_0): Likewise.
1030 (VEX_LEN_0F3849_X86_64_P_2_W_0_M_0): Likewise.
1031 (VEX_LEN_0F3849_X86_64_P_3_W_0_M_0): Likewise.
1032 (VEX_LEN_0F384B_X86_64_P_1_W_0_M_0): Likewise.
1033 (VEX_LEN_0F384B_X86_64_P_2_W_0_M_0): Likewise.
1034 (VEX_LEN_0F384B_X86_64_P_3_W_0_M_0): Likewise.
1035 (VEX_LEN_0F385C_X86_64_P_1_W_0_M_0): Likewise.
1036 (VEX_LEN_0F385E_X86_64_P_0_W_0_M_0): Likewise.
1037 (VEX_LEN_0F385E_X86_64_P_1_W_0_M_0): Likewise.
1038 (VEX_LEN_0F385E_X86_64_P_2_W_0_M_0): Likewise.
1039 (VEX_LEN_0F385E_X86_64_P_3_W_0_M_0): Likewise.
1040 (VEX_W_0F3849_X86_64_P_0): Likewise.
1041 (VEX_W_0F3849_X86_64_P_2): Likewise.
1042 (VEX_W_0F3849_X86_64_P_3): Likewise.
1043 (VEX_W_0F384B_X86_64_P_1): Likewise.
1044 (VEX_W_0F384B_X86_64_P_2): Likewise.
1045 (VEX_W_0F384B_X86_64_P_3): Likewise.
1046 (VEX_W_0F385C_X86_64_P_1): Likewise.
1047 (VEX_W_0F385E_X86_64_P_0): Likewise.
1048 (VEX_W_0F385E_X86_64_P_1): Likewise.
1049 (VEX_W_0F385E_X86_64_P_2): Likewise.
1050 (VEX_W_0F385E_X86_64_P_3): Likewise.
1051 (names_tmm): Likewise.
1052 (att_names_tmm): Likewise.
1053 (intel_operand_size): Handle void_mode.
1054 (OP_XMM): Handle tmm_mode.
1057 * i386-gen.c (cpu_flag_init): Add entries for CpuAMX_INT8,
1058 CpuAMX_BF16 and CpuAMX_TILE.
1059 (operand_type_shorthands): Add RegTMM.
1060 (operand_type_init): Likewise.
1061 (operand_types): Add Tmmword.
1062 (cpu_flag_init): Add CPU_AMX_INT8, CpuAMX_BF16 and CpuAMX_TILE.
1063 (cpu_flags): Add CpuAMX_INT8, CpuAMX_BF16 and CpuAMX_TILE.
1064 * i386-opc.h (CpuAMX_INT8): New.
1065 (CpuAMX_BF16): Likewise.
1066 (CpuAMX_TILE): Likewise.
1068 (Tmmword): Likewise.
1069 (i386_cpu_flags): Add cpuamx_int8, cpuamx_bf16 and cpuamx_tile.
1070 (i386_opcode_modifier): Extend width of fields vexvvvv and sib.
1071 (i386_operand_type): Add tmmword.
1072 * i386-opc.tbl: Add AMX instructions.
1073 * i386-reg.tbl: Add AMX registers.
1074 * i386-init.h: Regenerated.
1075 * i386-tbl.h: Likewise.
1077 2020-07-08 Jan Beulich <jbeulich@suse.com>
1079 * i386-dis.c (OP_LWPCB_E, OP_LWP_E): Delete.
1080 (REG_XOP_LWPCB, REG_XOP_LWP, REG_XOP_TBM_01, REG_XOP_TBM_02):
1082 (REG_0FXOP_09_12_M_1_L_0, REG_0FXOP_0A_12_L_0,
1083 REG_0FXOP_09_01_L_0, REG_0FXOP_09_02_L_0): ... these
1085 (MOD_VEX_0FXOP_09_12, VEX_LEN_0FXOP_08_85, VEX_LEN_0FXOP_08_86,
1086 VEX_LEN_0FXOP_08_87, VEX_LEN_0FXOP_08_8E, VEX_LEN_0FXOP_08_8F,
1087 VEX_LEN_0FXOP_08_95, VEX_LEN_0FXOP_08_96, VEX_LEN_0FXOP_08_97,
1088 VEX_LEN_0FXOP_08_9E, VEX_LEN_0FXOP_08_9F, VEX_LEN_0FXOP_08_A3,
1089 VEX_LEN_0FXOP_08_A6, VEX_LEN_0FXOP_08_B6, VEX_LEN_0FXOP_08_C0,
1090 VEX_LEN_0FXOP_08_C1, VEX_LEN_0FXOP_08_C2, VEX_LEN_0FXOP_08_C3,
1091 VEX_LEN_0FXOP_09_01, VEX_LEN_0FXOP_09_02, VEX_LEN_0FXOP_09_12_M_1,
1092 VEX_LEN_0FXOP_09_90, VEX_LEN_0FXOP_09_91, VEX_LEN_0FXOP_09_92,
1093 VEX_LEN_0FXOP_09_93, VEX_LEN_0FXOP_09_94, VEX_LEN_0FXOP_09_95,
1094 VEX_LEN_0FXOP_09_96, VEX_LEN_0FXOP_09_97, VEX_LEN_0FXOP_09_98,
1095 VEX_LEN_0FXOP_09_99, VEX_LEN_0FXOP_09_9A, VEX_LEN_0FXOP_09_9B,
1096 VEX_LEN_0FXOP_09_C1, VEX_LEN_0FXOP_09_C2, VEX_LEN_0FXOP_09_C3,
1097 VEX_LEN_0FXOP_09_C6, VEX_LEN_0FXOP_09_C7, VEX_LEN_0FXOP_09_CB,
1098 VEX_LEN_0FXOP_09_D1, VEX_LEN_0FXOP_09_D2, VEX_LEN_0FXOP_09_D3,
1099 VEX_LEN_0FXOP_09_D6, VEX_LEN_0FXOP_09_D7, VEX_LEN_0FXOP_09_DB,
1100 VEX_LEN_0FXOP_09_E1, VEX_LEN_0FXOP_09_E2, VEX_LEN_0FXOP_09_E3,
1101 VEX_LEN_0FXOP_0A_12, VEX_W_0FXOP_08_85_L_0,
1102 VEX_W_0FXOP_08_86_L_0, VEX_W_0FXOP_08_87_L_0,
1103 VEX_W_0FXOP_08_8E_L_0, VEX_W_0FXOP_08_8F_L_0,
1104 VEX_W_0FXOP_08_95_L_0, VEX_W_0FXOP_08_96_L_0,
1105 VEX_W_0FXOP_08_97_L_0, VEX_W_0FXOP_08_9E_L_0,
1106 VEX_W_0FXOP_08_9F_L_0, VEX_W_0FXOP_08_A6_L_0,
1107 VEX_W_0FXOP_08_B6_L_0, VEX_W_0FXOP_08_C0_L_0,
1108 VEX_W_0FXOP_08_C1_L_0, VEX_W_0FXOP_08_C2_L_0,
1109 VEX_W_0FXOP_08_C3_L_0, VEX_W_0FXOP_08_CC_L_0,
1110 VEX_W_0FXOP_08_CD_L_0, VEX_W_0FXOP_08_CE_L_0,
1111 VEX_W_0FXOP_08_CF_L_0, VEX_W_0FXOP_08_EC_L_0,
1112 VEX_W_0FXOP_08_ED_L_0, VEX_W_0FXOP_08_EE_L_0,
1113 VEX_W_0FXOP_08_EF_L_0, VEX_W_0FXOP_09_C1_L_0,
1114 VEX_W_0FXOP_09_C2_L_0, VEX_W_0FXOP_09_C3_L_0,
1115 VEX_W_0FXOP_09_C6_L_0, VEX_W_0FXOP_09_C7_L_0,
1116 VEX_W_0FXOP_09_CB_L_0, VEX_W_0FXOP_09_D1_L_0,
1117 VEX_W_0FXOP_09_D2_L_0, VEX_W_0FXOP_09_D3_L_0,
1118 VEX_W_0FXOP_09_D6_L_0, VEX_W_0FXOP_09_D7_L_0,
1119 VEX_W_0FXOP_09_DB_L_0, VEX_W_0FXOP_09_E1_L_0,
1120 VEX_W_0FXOP_09_E2_L_0, VEX_W_0FXOP_09_E3_L_0): New enumerators.
1121 (reg_table): Re-order XOP entries. Adjust their operands.
1122 (xop_table): Replace 08_85, 08_86, 08_87, 08_8E, 08_8F, 08_95,
1123 08_96, 08_97, 08_9E, 08_9F, 08_A3, 08_A6, 08_B6, 08_C0, 08_C1,
1124 08_C2, 08_C3, 09_01, 09_02, 09_12, 09_90, 09_91, 09_92, 09_93,
1125 09_94, 09_95, 09_96, 09_97, 09_98, 09_99, 09_9A, 09_9B, 09_C1,
1126 09_C2, 09_C3, 09_C6, 09_C7, 09_CB, 09_D1, 09_D2, 09_D3, 09_D6,
1127 09_D7, 09_DB, 09_E1, 09_E2, 09_E3, and VEX_LEN_0FXOP_0A_12
1128 entries by references ...
1129 (vex_len_table): ... to resepctive new entries here. For several
1130 new and existing entries reference ...
1131 (vex_w_table): ... new entries here.
1132 (mod_table): New MOD_VEX_0FXOP_09_12 entry.
1134 2020-07-08 Jan Beulich <jbeulich@suse.com>
1136 * i386-dis.c (XMVexScalarI4): Define.
1137 (VEX_LEN_0F3A6A_P_2, VEX_LEN_0F3A6B_P_2, VEX_LEN_0F3A6E_P_2,
1138 VEX_LEN_0F3A6F_P_2, VEX_LEN_0F3A7A_P_2, VEX_LEN_0F3A7B_P_2,
1139 VEX_LEN_0F3A7E_P_2, VEX_LEN_0F3A7F_P_2): Delete.
1140 (vex_len_table): Move scalar FMA4 entries ...
1141 (prefix_table): ... here.
1142 (OP_REG_VexI4): Handle scalar_mode.
1143 * i386-opc.tbl: Use VexLIG for scalar FMA4 insns.
1144 * i386-tbl.h: Re-generate.
1146 2020-07-08 Jan Beulich <jbeulich@suse.com>
1148 * i386-dis.c (OP_Vex_2src_1, OP_Vex_2src_2, Vex_2src_1,
1149 Vex_2src_2): Delete.
1150 (OP_VexW, VexW): New.
1151 (xop_table): Use EXx for rotates by immediate. Use EXx and VexW
1152 for shifts and rotates by register.
1154 2020-07-08 Jan Beulich <jbeulich@suse.com>
1156 * i386-dis.c (OP_EX_VexImmW, OP_XMM_VexW, EXVexImmW, XMVexW,
1157 VEX_W_0F3A48_P_2, VEX_W_0F3A49_P_2, vex_w_done, get_vex_imm8,
1158 OP_EX_VexReg): Delete.
1159 (OP_VexI4, VexI4): New.
1160 (vex_w_table): Move vpermil2ps and vpermil2pd entries ...
1161 (prefix_table): ... here.
1162 (print_insn): Drop setting of vex_w_done.
1164 2020-07-08 Jan Beulich <jbeulich@suse.com>
1166 * i386-dis.c (OP_EX_VexW, EXVexW, EXdVexW, EXqVexW): Delete.
1167 (prefix_table, vex_len_table): Replace operands for FMA4 insns.
1168 (xop_table): Replace operands of 4-operand insns.
1169 (OP_REG_VexI4): Move VEX.W based operand swaping here.
1171 2020-07-07 Claudiu Zissulescu <claziss@synopsys.com>
1173 * arc-opc.c (insert_rbd): New function.
1176 * arc-tbl.h (vadd2, vadd4h, vmac2h, vmpy2h, vsub4h): Update
1179 2020-07-07 Jan Beulich <jbeulich@suse.com>
1181 * i386-dis.c (EVEX_W_0F3826_P_1, EVEX_W_0F3826_P_2,
1182 EVEX_W_0F3828_P_1, EVEX_W_0F3829_P_1, EVEX_W_0F3854_P_2,
1183 EVEX_W_0F3866_P_2, EVEX_W_0F3875_P_2, EVEX_W_0F387D_P_2,
1184 EVEX_W_0F388D_P_2, EVEX_W_0F3A3E_P_2, EVEX_W_0F3A3F_P_2):
1186 (putop): Handle "BW".
1187 * i386-dis-evex-w.h: Move entries for opcodes 0F3826, 0F3826,
1188 0F3828, 0F3829, 0F3854, 0F3866, 0F3875, 0F387D, 0F388D, 0F3A3E,
1190 * i386-dis-evex-prefix.h: ... here.
1192 2020-07-06 Jan Beulich <jbeulich@suse.com>
1194 * i386-dis.c (VEX_LEN_0FXOP_09_80, VEX_LEN_0FXOP_09_81): Delete.
1195 (VEX_LEN_0FXOP_09_82_W_0, VEX_LEN_0FXOP_09_83_W_0,
1196 VEX_W_0FXOP_09_80, VEX_W_0FXOP_09_81, VEX_W_0FXOP_09_82,
1197 VEX_W_0FXOP_09_83): New enumerators.
1198 (xop_table): Reference the above.
1199 (vex_len_table): Replace vfrczp* entries by vfrczs* ones.
1200 (vex_w_table): New VEX_W_0FXOP_09_80, VEX_W_0FXOP_09_81,
1201 VEX_W_0FXOP_09_82, and VEX_W_0FXOP_09_83 entries.
1202 (get_valid_dis386): Return bad_opcode for XOP.PP != 0.
1204 2020-07-06 Jan Beulich <jbeulich@suse.com>
1206 * i386-dis.c (EVEX_W_0F3838_P_1,
1207 EVEX_W_0F3839_P_1, EVEX_W_0F3840_P_2, EVEX_W_0F3855_P_2,
1208 EVEX_W_0F3868_P_3, EVEX_W_0F3871_P_2, EVEX_W_0F3873_P_2,
1209 EVEX_W_0F3A50_P_2, EVEX_W_0F3A51_P_2, EVEX_W_0F3A56_P_2,
1210 EVEX_W_0F3A57_P_2, EVEX_W_0F3A66_P_2, EVEX_W_0F3A67_P_2,
1211 EVEX_W_0F3A71_P_2, EVEX_W_0F3A73_P_2): Delete.
1212 (putop): Centralize management of last[]. Delete SAVE_LAST.
1213 * i386-dis-evex-w.h: Move entries for opcodes 0F3838, 0F3839,
1214 0F3840, 0F3855, 0F3868, 0F3871, 0F3873, 0F3A50, 0F3A51, 0F3A56,
1215 0F3A57, 0F3A66, 0F3A67, 0F3A71, and 0F3A73 ...
1216 * i386-dis-evex-prefix.h: here.
1218 2020-07-06 Jan Beulich <jbeulich@suse.com>
1220 * i386-dis.c (MOD_EVEX_0F381A_P_2_W_0, MOD_EVEX_0F381A_P_2_W_1,
1221 MOD_EVEX_0F381B_P_2_W_0, MOD_EVEX_0F381B_P_2_W_1,
1222 MOD_EVEX_0F385A_P_2_W_0, MOD_EVEX_0F385A_P_2_W_1,
1223 MOD_EVEX_0F385B_P_2_W_0, MOD_EVEX_0F385B_P_2_W_1): New
1225 (EVEX_LEN_0F381A_P_2_W_0, EVEX_LEN_0F381A_P_2_W_1,
1226 EVEX_LEN_0F381B_P_2_W_0, EVEX_LEN_0F381B_P_2_W_1,
1227 EVEX_LEN_0F385A_P_2_W_0, EVEX_LEN_0F385A_P_2_W_1,
1228 EVEX_LEN_0F385B_P_2_W_0, EVEX_LEN_0F385B_P_2_W_1): Rename to ...
1229 (EVEX_LEN_0F381A_P_2_W_0_M_0, EVEX_LEN_0F381A_P_2_W_1_M_0,
1230 EVEX_LEN_0F381B_P_2_W_0_M_0, EVEX_LEN_0F381B_P_2_W_1_M_0,
1231 EVEX_LEN_0F385A_P_2_W_0_M_0, EVEX_LEN_0F385A_P_2_W_1_M_0,
1232 EVEX_LEN_0F385B_P_2_W_0_M_0, EVEX_LEN_0F385B_P_2_W_1_M_0): ...
1233 these, respectively.
1234 * i386-dis-evex-len.h: Adjust comments.
1235 * i386-dis-evex-mod.h: New MOD_EVEX_0F381A_P_2_W_0,
1236 MOD_EVEX_0F381A_P_2_W_1, MOD_EVEX_0F381B_P_2_W_0,
1237 MOD_EVEX_0F381B_P_2_W_1, MOD_EVEX_0F385A_P_2_W_0,
1238 MOD_EVEX_0F385A_P_2_W_1, MOD_EVEX_0F385B_P_2_W_0, and
1239 MOD_EVEX_0F385B_P_2_W_1 table entries.
1240 * i386-dis-evex-w.h: Reference mod_table[] for
1241 EVEX_W_0F381A_P_2, EVEX_W_0F381B_P_2, EVEX_W_0F385A_P_2, and
1244 2020-07-06 Jan Beulich <jbeulich@suse.com>
1246 * i386-dis-evex-len.h (vbroadcastf32x8, vbroadcasti32x8,
1247 vinsertf32x8, vinsertf64x4, vextractf32x8, vextractf64x4): Use
1249 (vinserti32x8, vinserti64x4, vextracti32x8, vextracti64x4):
1250 Likewise. Mark 256-bit entries invalid.
1252 2020-07-06 Jan Beulich <jbeulich@suse.com>
1254 * i386-dis.c (PREFIX_EVEX_0F62, PREFIX_EVEX_0F6A,
1255 PREFIX_EVEX_0F6B, PREFIX_EVEX_0F6C, PREFIX_EVEX_0F6D,
1256 PREFIX_EVEX_0FD2, PREFIX_EVEX_0FD3, PREFIX_EVEX_0FD4,
1257 PREFIX_EVEX_0FF2, PREFIX_EVEX_0FF3, PREFIX_EVEX_0FF4,
1258 PREFIX_EVEX_0FFA, PREFIX_EVEX_0FFB, PREFIX_EVEX_0FFE,
1259 PREFIX_EVEX_0F382B): Delete.
1260 (EVEX_W_0F62_P_2, EVEX_W_0F6A_P_2, EVEX_W_0F6B_P_2,
1261 EVEX_W_0F6C_P_2, EVEX_W_0F6D_P_2, EVEX_W_0FD2_P_2,
1262 EVEX_W_0FD3_P_2, EVEX_W_0FD4_P_2, EVEX_W_0FF2_P_2,
1263 EVEX_W_0FF3_P_2, EVEX_W_0FF4_P_2, EVEX_W_0FFA_P_2,
1264 EVEX_W_0FFB_P_2, EVEX_W_0FFE_P_2, EVEX_W_0F382B_P_2): Rename
1266 (EVEX_W_0F62, EVEX_W_0F6A, EVEX_W_0F6B, EVEX_W_0F6C,
1267 EVEX_W_0F6D, EVEX_W_0FD2, EVEX_W_0FD3, EVEX_W_0FD4,
1268 EVEX_W_0FF2, EVEX_W_0FF3, EVEX_W_0FF4, EVEX_W_0FFA,
1269 EVEX_W_0FFB, EVEX_W_0FFE, EVEX_W_0F382B): ... these
1271 * i386-dis-evex.h (evex_table): Reference VEX_W table entries
1272 for opcodes 0F62, 0F6A, 0F6B, 0F6C, 0F6D, 0FD2, 0FD3, 0FD4,
1273 0FF2, 0FF3, 0FF4, 0FFA, 0FFB, 0FFE, 0F382B.
1274 * i386-dis-evex-prefix.h (PREFIX_EVEX_0F62, PREFIX_EVEX_0F6A,
1275 PREFIX_EVEX_0F6B, PREFIX_EVEX_0F6C, PREFIX_EVEX_0F6D,
1276 PREFIX_EVEX_0FD2, PREFIX_EVEX_0FD3, PREFIX_EVEX_0FD4,
1277 PREFIX_EVEX_0FF2, PREFIX_EVEX_0FF3, PREFIX_EVEX_0FF4,
1278 PREFIX_EVEX_0FFA, PREFIX_EVEX_0FFB, PREFIX_EVEX_0FFE,
1279 PREFIX_EVEX_0F382B): Remove table entries.
1280 * i386-dis-evex-w.h: Reference VEX table entries for opcodes
1281 0F62, 0F6A, 0F6B, 0F6C, 0F6D, 0FD2, 0FD3, 0FD4, 0FF2, 0FF3,
1282 0FF4, 0FFA, 0FFB, 0FFE, 0F382B.
1284 2020-07-06 Jan Beulich <jbeulich@suse.com>
1286 * i386-dis.c (EVEX_LEN_0F3816_P_2, EVEX_LEN_0F3836_P_2,
1287 EVEX_LEN_0F3A00_P_2_W_1, EVEX_LEN_0F3A01_P_2_W_1): New
1289 * i386-dis-evex-len.h (evex_len_table): New EVEX_LEN_0F3816_P_2,
1290 EVEX_LEN_0F3836_P_2, EVEX_LEN_0F3A00_P_2_W_1, and
1291 EVEX_LEN_0F3A01_P_2_W_1 table entries.
1292 * i386-dis-evex-prefix.h, i386-dis-evex-w.h: Reference the above
1295 2020-07-06 Jan Beulich <jbeulich@suse.com>
1297 * i386-dis.c (EVEX_LEN_0FC4_P_2, EVEX_LEN_0FC5_P_2,
1298 EVEX_LEN_0F3A14_P_2, EVEX_LEN_0F3A15_P_2, EVEX_LEN_0F3A16_P_2,
1299 EVEX_LEN_0F3A17_P_2, EVEX_LEN_0F3A20_P_2,
1300 EVEX_LEN_0F3A21_P_2_W_0, EVEX_LEN_0F3A22_P_2): New enumerators.
1301 * i386-dis-evex-len.h (evex_len_table): New EVEX_LEN_0FC4_P_2,
1302 EVEX_LEN_0FC5_P_2, EVEX_LEN_0F3A14_P_2, EVEX_LEN_0F3A15_P_2,
1303 EVEX_LEN_0F3A16_P_2, EVEX_LEN_0F3A17_P_2, EVEX_LEN_0F3A20_P_2,
1304 EVEX_LEN_0F3A21_P_2_W_0, and EVEX_LEN_0F3A22_P_2 table entries.
1305 * i386-dis-evex-prefix.h, i386-dis-evex-w.h: Reference the above
1308 2020-07-06 Jan Beulich <jbeulich@suse.com>
1310 * i386-dis.c (PREFIX_EVEX_0F3A1D, EVEX_W_0F3A1D_P_2): Delete.
1311 (VEX_W_0F3813_P_2, VEX_W_0F3A1D_P_2): New enumerators.
1312 (prefix_table): Reference VEX_W_0F3813_P_2 and VEX_W_0F3A1D_P_2
1314 (vex_w_table): New VEX_W_0F3813_P_2 and VEX_W_0F3A1D_P_2 table
1316 * i386-dis-evex.h (evex_table): Reference VEX table entry for
1318 * i386-dis-evex-prefix.h (PREFIX_EVEX_0F3A1D): Delete table
1320 * i386-dis-evex-w.h (EVEX_W_0F3A1D_P_2): Likewise.
1322 2020-07-06 Jan Beulich <jbeulich@suse.com>
1324 * i386-dis.c (PREFIX_EVEX_0F60, PREFIX_EVEX_0F61,
1325 PREFIX_EVEX_0F63, PREFIX_EVEX_0F67, PREFIX_EVEX_0F68,
1326 PREFIX_EVEX_0F69, PREFIX_EVEX_0FD1, PREFIX_EVEX_0FD5,
1327 PREFIX_EVEX_0FD8, PREFIX_EVEX_0FD9, PREFIX_EVEX_0FDA,
1328 PREFIX_EVEX_0FDC, PREFIX_EVEX_0FDD, PREFIX_EVEX_0FDE,
1329 PREFIX_EVEX_0FE0, PREFIX_EVEX_0FE1, PREFIX_EVEX_0FE3,
1330 PREFIX_EVEX_0FE4, PREFIX_EVEX_0FE5, PREFIX_EVEX_0FE8,
1331 PREFIX_EVEX_0FE9, PREFIX_EVEX_0FEA, PREFIX_EVEX_0FEC,
1332 PREFIX_EVEX_0FED, PREFIX_EVEX_0FEE, PREFIX_EVEX_0FF1,
1333 PREFIX_EVEX_0FF5, PREFIX_EVEX_0FF6, PREFIX_EVEX_0FF8,
1334 PREFIX_EVEX_0FF9, PREFIX_EVEX_0FFC, PREFIX_EVEX_0FFD,
1335 PREFIX_EVEX_0F3800, PREFIX_EVEX_0F3804, PREFIX_EVEX_0F380B,
1336 PREFIX_EVEX_0F380C, PREFIX_EVEX_0F3818, PREFIX_EVEX_0F381C,
1337 PREFIX_EVEX_0F381D, PREFIX_EVEX_0F383C, PREFIX_EVEX_0F383E,
1338 PREFIX_EVEX_0F3858, PREFIX_EVEX_0F3878, PREFIX_EVEX_0F3879,
1339 PREFIX_EVEX_0F3896, PREFIX_EVEX_0F3897, PREFIX_EVEX_0F3898,
1340 PREFIX_EVEX_0F3899, PREFIX_EVEX_0F389C, PREFIX_EVEX_0F389D,
1341 PREFIX_EVEX_0F389E, PREFIX_EVEX_0F389F, PREFIX_EVEX_0F38A6,
1342 PREFIX_EVEX_0F38A7, PREFIX_EVEX_0F38A8, PREFIX_EVEX_0F38A9,
1343 PREFIX_EVEX_0F38AC, PREFIX_EVEX_0F38AD, PREFIX_EVEX_0F38AE,
1344 PREFIX_EVEX_0F38AF, PREFIX_EVEX_0F38B6, PREFIX_EVEX_0F38B7,
1345 PREFIX_EVEX_0F38B8, PREFIX_EVEX_0F38B9, PREFIX_EVEX_0F38BA,
1346 PREFIX_EVEX_0F38BB, PREFIX_EVEX_0F38BC, PREFIX_EVEX_0F38BD,
1347 PREFIX_EVEX_0F38BE, PREFIX_EVEX_0F38BF, PREFIX_EVEX_0F38CF,
1348 PREFIX_EVEX_0F38DC, PREFIX_EVEX_0F38DD, PREFIX_EVEX_0F38DE,
1349 PREFIX_EVEX_0F38DF, PREFIX_EVEX_0F3A04, PREFIX_EVEX_0F3A0F,
1350 PREFIX_EVEX_0F3A44, PREFIX_EVEX_0F3ACE, PREFIX_EVEX_0F3ACF,
1351 EVEX_W_0F380C_P_2, EVEX_W_0F3818_P_2, EVEX_W_0F3858_P_2,
1352 EVEX_W_0F3878_P_2, EVEX_W_0F3879_P_2, EVEX_W_0F3A04_P_2,
1353 EVEX_W_0F3ACE_P_2, EVEX_W_0F3ACF_P_2): Delete.
1354 (prefix_table): Add EXxEVexR to FMA table entries.
1355 (OP_Rounding): Move abort() invocation.
1356 * i386-dis-evex.h (evex_table): Reference VEX table for opcodes
1357 0F60, 0F61, 0F63, 0F67, 0F68, 0F69, 0FD1, 0FD5, 0FD8, 0FD9,
1358 0FDA, 0FDC, 0FDD, 0FDE, 0FE0, 0FE1, 0FE3, 0FE4, 0FE5, 0FE8,
1359 0FE9, 0FEA, 0FEC, 0FED, 0FEE, 0FF1, 0FF5, 0FF6, 0FF8, 0FF9,
1360 0FFC, 0FFD, 0F3800, 0F3804, 0F380B, 0F380C, 0F3818, 0F381C,
1361 0F381D, 0F383C, 0F383E, 0F3858, 0F3878, 0F3879, 0F3896, 0F3897,
1362 0F3898, 0F3899, 0F389C, 0F389D, 0F389E, 0F389F, 0F38A6, 0F38A7,
1363 0F38A8, 0F38A9, 0F38AC, 0F38AD, 0F38AE, 0F38AF, 0F38B6, 0F38B7,
1364 0F38B8, 0F38B9, 0F38BA, 0F38BB, 0F38BC, 0F38BD, 0F38BE, 0F38BF,
1365 0F38CF, 0F38DC, 0F38DD, 0F38DE, 0F38DF, 0F3A04, 0F3A0F, 0F3A44,
1367 * i386-dis-evex-prefix.h (PREFIX_EVEX_0F60, PREFIX_EVEX_0F61,
1368 PREFIX_EVEX_0F63, PREFIX_EVEX_0F67, PREFIX_EVEX_0F68,
1369 PREFIX_EVEX_0F69, PREFIX_EVEX_0FD1, PREFIX_EVEX_0FD5,
1370 PREFIX_EVEX_0FD8, PREFIX_EVEX_0FD9, PREFIX_EVEX_0FDA,
1371 PREFIX_EVEX_0FDC, PREFIX_EVEX_0FDD, PREFIX_EVEX_0FDE,
1372 PREFIX_EVEX_0FE0, PREFIX_EVEX_0FE1, PREFIX_EVEX_0FE3,
1373 PREFIX_EVEX_0FE4, PREFIX_EVEX_0FE5, PREFIX_EVEX_0FE8,
1374 PREFIX_EVEX_0FE9, PREFIX_EVEX_0FEA, PREFIX_EVEX_0FEC,
1375 PREFIX_EVEX_0FED, PREFIX_EVEX_0FEE, PREFIX_EVEX_0FF1,
1376 PREFIX_EVEX_0FF5, PREFIX_EVEX_0FF6, PREFIX_EVEX_0FF8,
1377 PREFIX_EVEX_0FF9, PREFIX_EVEX_0FFC, PREFIX_EVEX_0FFD,
1378 PREFIX_EVEX_0F3800, PREFIX_EVEX_0F3804, PREFIX_EVEX_0F380B,
1379 PREFIX_EVEX_0F380C, PREFIX_EVEX_0F3818, PREFIX_EVEX_0F381C,
1380 PREFIX_EVEX_0F381D, PREFIX_EVEX_0F383C, PREFIX_EVEX_0F383E,
1381 PREFIX_EVEX_0F3858, PREFIX_EVEX_0F3878, PREFIX_EVEX_0F3879,
1382 PREFIX_EVEX_0F3896, PREFIX_EVEX_0F3897, PREFIX_EVEX_0F3898,
1383 PREFIX_EVEX_0F3899, PREFIX_EVEX_0F389C, PREFIX_EVEX_0F389D,
1384 PREFIX_EVEX_0F389E, PREFIX_EVEX_0F389F, PREFIX_EVEX_0F38A6,
1385 PREFIX_EVEX_0F38A7, PREFIX_EVEX_0F38A8, PREFIX_EVEX_0F38A9,
1386 PREFIX_EVEX_0F38AC, PREFIX_EVEX_0F38AD, PREFIX_EVEX_0F38AE,
1387 PREFIX_EVEX_0F38AF, PREFIX_EVEX_0F38B6, PREFIX_EVEX_0F38B7,
1388 PREFIX_EVEX_0F38B8, PREFIX_EVEX_0F38B9, PREFIX_EVEX_0F38BA,
1389 PREFIX_EVEX_0F38BB, PREFIX_EVEX_0F38BC, PREFIX_EVEX_0F38BD,
1390 PREFIX_EVEX_0F38BE, PREFIX_EVEX_0F38BF, PREFIX_EVEX_0F38CF,
1391 PREFIX_EVEX_0F38DC, PREFIX_EVEX_0F38DD, PREFIX_EVEX_0F38DE,
1392 PREFIX_EVEX_0F38DF, PREFIX_EVEX_0F3A04, PREFIX_EVEX_0F3A0F,
1393 PREFIX_EVEX_0F3A44, PREFIX_EVEX_0F3ACE, PREFIX_EVEX_0F3ACF):
1394 Delete table entries.
1395 * i386-dis-evex-w.h (EVEX_W_0F380C_P_2, EVEX_W_0F3818_P_2,
1396 EVEX_W_0F3858_P_2, EVEX_W_0F3878_P_2, EVEX_W_0F3879_P_2,
1397 EVEX_W_0F3A04_P_2, EVEX_W_0F3ACE_P_2, EVEX_W_0F3ACF_P_2):
1400 2020-07-06 Jan Beulich <jbeulich@suse.com>
1402 * i386-dis.c (EXqScalarS): Delete.
1403 (vex_len_table): Replace EXqScalarS by EXqVexScalarS.
1404 * i386-dis-evex-w.h (vmovq): Use EXqVexScalarS.
1406 2020-07-06 Jan Beulich <jbeulich@suse.com>
1408 * i386-dis.c (safe-ctype.h): Include.
1409 (EXdScalar, EXqScalar): Delete.
1410 (d_scalar_mode, q_scalar_mode): Delete.
1411 (prefix_table, vex_len_table): Use EXxmm_md in place of
1412 EXdScalar and EXxmm_mq in place of EXqScalar.
1413 (intel_operand_size, OP_E_memory, OP_EX): Remove uses of
1414 d_scalar_mode and q_scalar_mode.
1415 * i386-dis-evex-w.h (vmovss): Use EXxmm_md.
1416 (vmovsd): Use EXxmm_mq.
1418 2020-07-06 Yuri Chornoivan <yurchor@ukr.net>
1421 * arc-dis.c: Fix spelling mistake.
1422 * po/opcodes.pot: Regenerate.
1424 2020-07-06 Nick Clifton <nickc@redhat.com>
1426 * po/pt_BR.po: Updated Brazilian Portugugese translation.
1427 * po/uk.po: Updated Ukranian translation.
1429 2020-07-04 Nick Clifton <nickc@redhat.com>
1431 * configure: Regenerate.
1432 * po/opcodes.pot: Regenerate.
1434 2020-07-04 Nick Clifton <nickc@redhat.com>
1436 Binutils 2.35 branch created.
1438 2020-07-02 H.J. Lu <hongjiu.lu@intel.com>
1440 * i386-gen.c (opcode_modifiers): Add VexSwapSources.
1441 * i386-opc.h (VexSwapSources): New.
1442 (i386_opcode_modifier): Add vexswapsources.
1443 * i386-opc.tbl: Add VexSwapSources to BMI2 and BMI instructions
1444 with two source operands swapped.
1445 * i386-tbl.h: Regenerated.
1447 2020-06-30 Nelson Chu <nelson.chu@sifive.com>
1449 * riscv-dis.c (print_insn_args, case 'E'): Updated. Let the
1450 unprivileged CSR can also be initialized.
1452 2020-06-29 Alan Modra <amodra@gmail.com>
1454 * arm-dis.c: Use C style comments.
1455 * cr16-opc.c: Likewise.
1456 * ft32-dis.c: Likewise.
1457 * moxie-opc.c: Likewise.
1458 * tic54x-dis.c: Likewise.
1459 * s12z-opc.c: Remove useless comment.
1460 * xgate-dis.c: Likewise.
1462 2020-06-26 H.J. Lu <hongjiu.lu@intel.com>
1464 * i386-opc.tbl: Add a blank line.
1466 2020-06-26 H.J. Lu <hongjiu.lu@intel.com>
1468 * i386-gen.c (opcode_modifiers): Replace VecSIB with SIB.
1469 (VecSIB128): Renamed to ...
1471 (VecSIB256): Renamed to ...
1473 (VecSIB512): Renamed to ...
1475 (VecSIB): Renamed to ...
1477 (i386_opcode_modifier): Replace vecsib with sib.
1478 * i386-opc.tbl (VecSIB128): New.
1479 (VecSIB256): Likewise.
1480 (VecSIB512): Likewise.
1481 Replace VecSIB=1, VecSIB=2 and VecSIB=3 with VecSIB128, VecSIB256
1482 and VecSIB512, respectively.
1484 2020-06-26 Jan Beulich <jbeulich@suse.com>
1486 * i386-dis.c: Adjust description of I macro.
1487 (x86_64_table): Drop use of I.
1488 (float_mem): Replace use of I.
1489 (putop): Remove handling of I. Adjust setting/clearing of "alt".
1491 2020-06-26 Jan Beulich <jbeulich@suse.com>
1493 * i386-dis.c: (print_insn): Avoid straight assignment to
1494 priv.orig_sizeflag when processing -M sub-options.
1496 2020-06-25 Jan Beulich <jbeulich@suse.com>
1498 * i386-dis.c: Adjust description of J macro.
1499 (dis386, x86_64_table, mod_table): Replace J.
1500 (putop): Remove handling of J.
1502 2020-06-25 Jan Beulich <jbeulich@suse.com>
1504 * i386-dis.c: (float_mem): Reduce alternatives for fstpt and fldpt.
1506 2020-06-25 Jan Beulich <jbeulich@suse.com>
1508 * i386-dis.c: Adjust description of "LQ" macro.
1509 (dis386_twobyte): Use LQ for sysret.
1510 (putop): Adjust handling of LQ.
1512 2020-06-22 Nelson Chu <nelson.chu@sifive.com>
1514 * riscv-opc.c: Move the structures and functions to bfd/elfxx-riscv.c.
1515 * riscv-dis.c: Include elfxx-riscv.h.
1517 2020-06-18 H.J. Lu <hongjiu.lu@intel.com>
1519 * i386-dis.c (prefix_table): Revert the last vmgexit change.
1521 2020-06-17 Lili Cui <lili.cui@intel.com>
1523 * i386-dis.c (prefix_table): Delete the incorrect vmgexit.
1525 2020-06-14 H.J. Lu <hongjiu.lu@intel.com>
1528 * i386-dis.c (prefix_table): Replace xsuspldtrk with xsusldtrk.
1529 * i386-opc.tbl: Likewise.
1530 * i386-tbl.h: Regenerated.
1532 2020-06-12 Nelson Chu <nelson.chu@sifive.com>
1534 * riscv-opc.c (priv_specs): Remove v1.9 and PRIV_SPEC_CLASS_1P9.
1536 2020-06-11 Alex Coplan <alex.coplan@arm.com>
1538 * aarch64-opc.c (SYSREG): New macro for describing system registers.
1539 (SR_CORE): Likewise.
1540 (SR_FEAT): Likewise.
1542 (SR_V8_1): Likewise.
1543 (SR_V8_2): Likewise.
1544 (SR_V8_3): Likewise.
1545 (SR_V8_4): Likewise.
1548 (SR_SSBS): Likewise.
1550 (SR_ID_PFR2): Likewise.
1551 (SR_PROFILE): Likewise.
1552 (SR_MEMTAG): Likewise.
1553 (SR_SCXTNUM): Likewise.
1554 (aarch64_sys_regs): Refactor to store feature information in the table.
1555 (aarch64_sys_reg_supported_p): Collapse logic for system registers
1556 that now describe their own features.
1557 (aarch64_pstatefield_supported_p): Likewise.
1559 2020-06-09 H.J. Lu <hongjiu.lu@intel.com>
1561 * i386-dis.c (prefix_table): Fix a typo in comments.
1563 2020-06-09 Jan Beulich <jbeulich@suse.com>
1565 * i386-dis.c (rex_ignored): Delete.
1566 (ckprefix): Drop rex_ignored initialization.
1567 (get_valid_dis386): Drop setting of rex_ignored.
1568 (print_insn): Drop checking of rex_ignored. Don't record data
1569 size prefix as used with VEX-and-alike encodings.
1571 2020-06-09 Jan Beulich <jbeulich@suse.com>
1573 * i386-dis.c (MOD_0F12_PREFIX_2, MOD_0F16_PREFIX_2,
1574 MOD_VEX_0F12_PREFIX_2, MOD_VEX_0F16_PREFIX_2): New enumerators.
1575 (VEX_LEN_0F12_P_2, VEX_LEN_0F16_P_2): Delete.
1576 (VEX_LEN_0F12_P_2_M_0, VEX_LEN_0F16_P_2_M_0): Define.
1577 (prefix_table): Decode MOD for cases 2 of opcodes 0F12, 0F16,
1578 VEX_0F12, and VEX_0F16.
1579 (vex_len_table): Use X for vmovlp* and vmovh*s. Drop
1580 VEX_LEN_0F12_P_2 and VEX_LEN_0F16_P_2 entries.
1581 (mod_table): Use X for movlpX and movhpX. Drop PREFIX_OPCODE
1582 from movlps and movhlps. New MOD_0F12_PREFIX_2,
1583 MOD_0F16_PREFIX_2, MOD_VEX_0F12_PREFIX_2, and
1584 MOD_VEX_0F16_PREFIX_2 entries.
1586 2020-06-09 Jan Beulich <jbeulich@suse.com>
1588 * i386-dis.c (MOD_EVEX_0F12_PREFIX_2, MOD_EVEX_0F13,
1589 MOD_EVEX_0F16_PREFIX_2, MOD_EVEX_0F17, MOD_EVEX_0F2B): New enumerators.
1590 (PREFIX_EVEX_0F13, PREFIX_EVEX_0F14, PREFIX_EVEX_0F15,
1591 PREFIX_EVEX_0F17, PREFIX_EVEX_0F28, PREFIX_EVEX_0F29,
1592 PREFIX_EVEX_0F2B, PREFIX_EVEX_0F54, PREFIX_EVEX_0F55,
1593 PREFIX_EVEX_0F56, PREFIX_EVEX_0F57, PREFIX_EVEX_0FC6,
1594 EVEX_W_0F10_P_0, EVEX_W_0F10_P_2, EVEX_W_0F11_P_0,
1595 EVEX_W_0F11_P_2, EVEX_W_0F12_P_0_M_0, EVEX_W_0F12_P_2,
1596 EVEX_W_0F13_P_0, EVEX_W_0F13_P_2, EVEX_W_0F14_P_0,
1597 EVEX_W_0F14_P_2, EVEX_W_0F15_P_0, EVEX_W_0F15_P_2,
1598 EVEX_W_0F16_P_0_M_0, EVEX_W_0F16_P_2, EVEX_W_0F17_P_0,
1599 EVEX_W_0F17_P_2, EVEX_W_0F28_P_0, EVEX_W_0F28_P_2,
1600 EVEX_W_0F29_P_0, EVEX_W_0F29_P_2, EVEX_W_0F2B_P_0,
1601 EVEX_W_0F2B_P_2, EVEX_W_0F2E_P_0, EVEX_W_0F2E_P_2,
1602 EVEX_W_0F2F_P_0, EVEX_W_0F2F_P_2, EVEX_W_0F51_P_0,
1603 EVEX_W_0F51_P_2, EVEX_W_0F54_P_0, EVEX_W_0F54_P_2,
1604 EVEX_W_0F55_P_0, EVEX_W_0F55_P_2, EVEX_W_0F56_P_0,
1605 EVEX_W_0F56_P_2, EVEX_W_0F57_P_0, EVEX_W_0F57_P_2,
1606 EVEX_W_0F58_P_0, EVEX_W_0F58_P_2, EVEX_W_0F59_P_0,
1607 EVEX_W_0F59_P_2, EVEX_W_0F5C_P_0, EVEX_W_0F5C_P_2,
1608 EVEX_W_0F5D_P_0, EVEX_W_0F5D_P_2, EVEX_W_0F5E_P_0,
1609 EVEX_W_0F5E_P_2, EVEX_W_0F5F_P_0, EVEX_W_0F5F_P_2,
1610 EVEX_W_0FC2_P_0, EVEX_W_0FC2_P_2, EVEX_W_0FC6_P_0,
1611 EVEX_W_0FC6_P_2): Delete.
1612 (print_insn): Add EVEX.W vs embedded prefix consistency check
1613 to prefix validation.
1614 * i386-dis-evex.h (evex_table): Don't further descend for
1615 vunpcklpX, vunpckhpX, vmovapX, vandpX, vandnpX, vorpX, vxorpX,
1616 and vshufpX. Continue with MOD decoding for opcodes 0F13, 0F17,
1618 * i386-dis-evex-mod.h: Add/adjust vmovlpX/vmovhpX entries.
1619 * i386-dis-evex-prefix.h: Don't further descend for vmovupX,
1620 vucomisX, vcomisX, vsqrtpX, vaddpX, vmulpX, vsubpX, vminpX,
1621 vdivpX, vmaxpX, and vcmppX. Continue with MOD decoding for cases
1622 2 of PREFIX_EVEX_0F12, PREFIX_EVEX_0F16, and PREFIX_EVEX_0F29.
1623 Drop PREFIX_EVEX_0F13, PREFIX_EVEX_0F14, PREFIX_EVEX_0F15,
1624 PREFIX_EVEX_0F17, PREFIX_EVEX_0F28, PREFIX_EVEX_0F2B,
1625 PREFIX_EVEX_0F54, PREFIX_EVEX_0F55, PREFIX_EVEX_0F56,
1626 PREFIX_EVEX_0F57, and PREFIX_EVEX_0FC6 entries.
1627 * i386-dis-evex-w.h: Drop EVEX_W_0F10_P_0, EVEX_W_0F10_P_2,
1628 EVEX_W_0F11_P_0, EVEX_W_0F11_P_2, EVEX_W_0F12_P_0_M_0,
1629 EVEX_W_0F12_P_2, EVEX_W_0F12_P_3, EVEX_W_0F13_P_0,
1630 EVEX_W_0F13_P_2, EVEX_W_0F14_P_0, EVEX_W_0F14_P_2,
1631 EVEX_W_0F15_P_0, EVEX_W_0F15_P_2, EVEX_W_0F16_P_0_M_0,
1632 EVEX_W_0F16_P_2, EVEX_W_0F17_P_0, EVEX_W_0F17_P_2,
1633 EVEX_W_0F28_P_0, EVEX_W_0F28_P_2, EVEX_W_0F29_P_0,
1634 EVEX_W_0F29_P_2, EVEX_W_0F2B_P_0, EVEX_W_0F2B_P_2,
1635 EVEX_W_0F2E_P_0, EVEX_W_0F2E_P_2, EVEX_W_0F2F_P_0,
1636 EVEX_W_0F2F_P_2, EVEX_W_0F51_P_0, EVEX_W_0F51_P_2,
1637 EVEX_W_0F54_P_0, EVEX_W_0F54_P_2, EVEX_W_0F55_P_0,
1638 EVEX_W_0F55_P_2, EVEX_W_0F56_P_0, EVEX_W_0F56_P_2,
1639 EVEX_W_0F57_P_0, EVEX_W_0F57_P_2, EVEX_W_0F58_P_0,
1640 EVEX_W_0F58_P_2, EVEX_W_0F59_P_0, EVEX_W_0F59_P_2,
1641 EVEX_W_0F5C_P_0, EVEX_W_0F5C_P_2, EVEX_W_0F5D_P_0,
1642 EVEX_W_0F5D_P_2, EVEX_W_0F5E_P_0, EVEX_W_0F5E_P_2,
1643 EVEX_W_0F5F_P_0, EVEX_W_0F5F_P_2, EVEX_W_0FC2_P_0,
1644 EVEX_W_0FC2_P_2, EVEX_W_0FC6_P_0, and EVEX_W_0FC6_P_2 entries.
1646 2020-06-09 Jan Beulich <jbeulich@suse.com>
1648 * i386-dis.c (vex_table): Use PREFIX_OPCODE for vunpcklpX,
1649 vunpckhpX, vmovapX, vandpX, vandnpX, vorpX, vxorpX and vshufpX.
1650 (vex_len_table) : Likewise for vmovlpX, vmovhpX, vmovntpX, and
1652 (print_insn): Drop pointless check against bad_opcode. Split
1653 prefix validation into legacy and VEX-and-alike parts.
1654 (putop): Re-work 'X' macro handling.
1656 2020-06-09 Jan Beulich <jbeulich@suse.com>
1658 * i386-dis.c (MOD_0F51): Rename to ...
1659 (MOD_0F50): ... this.
1661 2020-06-08 Alex Coplan <alex.coplan@arm.com>
1663 * arm-dis.c (arm_opcodes): Add dfb.
1664 (thumb32_opcodes): Add dfb.
1666 2020-06-08 Jan Beulich <jbeulich@suse.com>
1668 * i386-opc.h (reg_entry): Const-qualify reg_name field.
1670 2020-06-06 Alan Modra <amodra@gmail.com>
1672 * ppc-dis.c (ppc_opts): Accept -mpwr10/-Mpwr10.
1674 2020-06-05 Alan Modra <amodra@gmail.com>
1676 * cgen-dis.c (hash_insn_array): Increase size of buf. Assert
1677 size is large enough.
1679 2020-06-04 Jose E. Marchesi <jose.marchesi@oracle.com>
1681 * disassemble.c (disassemble_init_for_target): Set endian_code for
1683 * bpf-desc.c: Regenerate.
1684 * bpf-opc.c: Likewise.
1685 * bpf-dis.c: Likewise.
1687 2020-06-03 Jose E. Marchesi <jose.marchesi@oracle.com>
1689 * cgen-opc.c (cgen_get_insn_value): Get an `endian' argument.
1690 (cgen_put_insn_value): Likewise.
1691 (cgen_lookup_insn): Pass endianness to cgen_{get,put}_insn_value.
1692 * cgen-dis.in (print_insn): Likewise.
1693 * cgen-ibld.in (insert_1): Likewise.
1694 (insert_1): Likewise.
1695 (insert_insn_normal): Likewise.
1696 (extract_1): Likewise.
1697 * bpf-dis.c: Regenerate.
1698 * bpf-ibld.c: Likewise.
1699 * bpf-ibld.c: Likewise.
1700 * cgen-dis.in: Likewise.
1701 * cgen-ibld.in: Likewise.
1702 * cgen-opc.c: Likewise.
1703 * epiphany-dis.c: Likewise.
1704 * epiphany-ibld.c: Likewise.
1705 * fr30-dis.c: Likewise.
1706 * fr30-ibld.c: Likewise.
1707 * frv-dis.c: Likewise.
1708 * frv-ibld.c: Likewise.
1709 * ip2k-dis.c: Likewise.
1710 * ip2k-ibld.c: Likewise.
1711 * iq2000-dis.c: Likewise.
1712 * iq2000-ibld.c: Likewise.
1713 * lm32-dis.c: Likewise.
1714 * lm32-ibld.c: Likewise.
1715 * m32c-dis.c: Likewise.
1716 * m32c-ibld.c: Likewise.
1717 * m32r-dis.c: Likewise.
1718 * m32r-ibld.c: Likewise.
1719 * mep-dis.c: Likewise.
1720 * mep-ibld.c: Likewise.
1721 * mt-dis.c: Likewise.
1722 * mt-ibld.c: Likewise.
1723 * or1k-dis.c: Likewise.
1724 * or1k-ibld.c: Likewise.
1725 * xc16x-dis.c: Likewise.
1726 * xc16x-ibld.c: Likewise.
1727 * xstormy16-dis.c: Likewise.
1728 * xstormy16-ibld.c: Likewise.
1730 2020-06-04 Jose E. Marchesi <jemarch@gnu.org>
1732 * cgen-dis.in (cpu_desc_list): New field `insn_endian'.
1733 (print_insn_): Handle instruction endian.
1734 * bpf-dis.c: Regenerate.
1735 * bpf-desc.c: Regenerate.
1736 * epiphany-dis.c: Likewise.
1737 * epiphany-desc.c: Likewise.
1738 * fr30-dis.c: Likewise.
1739 * fr30-desc.c: Likewise.
1740 * frv-dis.c: Likewise.
1741 * frv-desc.c: Likewise.
1742 * ip2k-dis.c: Likewise.
1743 * ip2k-desc.c: Likewise.
1744 * iq2000-dis.c: Likewise.
1745 * iq2000-desc.c: Likewise.
1746 * lm32-dis.c: Likewise.
1747 * lm32-desc.c: Likewise.
1748 * m32c-dis.c: Likewise.
1749 * m32c-desc.c: Likewise.
1750 * m32r-dis.c: Likewise.
1751 * m32r-desc.c: Likewise.
1752 * mep-dis.c: Likewise.
1753 * mep-desc.c: Likewise.
1754 * mt-dis.c: Likewise.
1755 * mt-desc.c: Likewise.
1756 * or1k-dis.c: Likewise.
1757 * or1k-desc.c: Likewise.
1758 * xc16x-dis.c: Likewise.
1759 * xc16x-desc.c: Likewise.
1760 * xstormy16-dis.c: Likewise.
1761 * xstormy16-desc.c: Likewise.
1763 2020-06-03 Nick Clifton <nickc@redhat.com>
1765 * po/sr.po: Updated Serbian translation.
1767 2020-06-03 Nelson Chu <nelson.chu@sifive.com>
1769 * riscv-opc.c (riscv_get_isa_spec_class): Change bfd_boolean to int.
1770 (riscv_get_priv_spec_class): Likewise.
1772 2020-06-01 Alan Modra <amodra@gmail.com>
1774 * bpf-desc.c: Regenerate.
1776 2020-05-28 Jose E. Marchesi <jose.marchesi@oracle.com>
1777 David Faust <david.faust@oracle.com>
1779 * bpf-desc.c: Regenerate.
1780 * bpf-opc.h: Likewise.
1781 * bpf-opc.c: Likewise.
1782 * bpf-dis.c: Likewise.
1784 2020-05-28 Alan Modra <amodra@gmail.com>
1786 * nios2-dis.c (nios2_print_insn_arg): Avoid shift left of negative
1789 2020-05-28 Alan Modra <amodra@gmail.com>
1791 * ns32k-dis.c (print_insn_arg): Handle d value of 'f' for
1793 (print_insn_ns32k): Revert last change.
1795 2020-05-28 Nick Clifton <nickc@redhat.com>
1797 * ns32k-dis.c (print_insn_ns32k): Change the arg_bufs array to
1800 2020-05-26 Sandra Loosemore <sandra@codesourcery.com>
1802 Fix extraction of signed constants in nios2 disassembler (again).
1804 * nios2-dis.c (nios2_print_insn_arg): Add explicit casts to
1805 extractions of signed fields.
1807 2020-05-26 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
1809 * s390-opc.txt: Relocate vector load/store instructions with
1810 additional alignment parameter and change architecture level
1811 constraint from z14 to z13.
1813 2020-05-21 Alan Modra <amodra@gmail.com>
1815 * arc-ext.c: Replace "if (x) free (x)" with "free (x)" throughout.
1816 * sparc-dis.c: Likewise.
1817 * tic4x-dis.c: Likewise.
1818 * xtensa-dis.c: Likewise.
1819 * bpf-desc.c: Regenerate.
1820 * epiphany-desc.c: Regenerate.
1821 * fr30-desc.c: Regenerate.
1822 * frv-desc.c: Regenerate.
1823 * ip2k-desc.c: Regenerate.
1824 * iq2000-desc.c: Regenerate.
1825 * lm32-desc.c: Regenerate.
1826 * m32c-desc.c: Regenerate.
1827 * m32r-desc.c: Regenerate.
1828 * mep-asm.c: Regenerate.
1829 * mep-desc.c: Regenerate.
1830 * mt-desc.c: Regenerate.
1831 * or1k-desc.c: Regenerate.
1832 * xc16x-desc.c: Regenerate.
1833 * xstormy16-desc.c: Regenerate.
1835 2020-05-20 Nelson Chu <nelson.chu@sifive.com>
1837 * riscv-opc.c (riscv_ext_version_table): The table used to store
1838 all information about the supported spec and the corresponding ISA
1839 versions. Currently, only Zicsr is supported to verify the
1840 correctness of Z sub extension settings. Others will be supported
1841 in the future patches.
1842 (struct isa_spec_t, isa_specs): List for all supported ISA spec
1843 classes and the corresponding strings.
1844 (riscv_get_isa_spec_class): New function. Get the corresponding ISA
1845 spec class by giving a ISA spec string.
1846 * riscv-opc.c (struct priv_spec_t): New structure.
1847 (struct priv_spec_t priv_specs): List for all supported privilege spec
1848 classes and the corresponding strings.
1849 (riscv_get_priv_spec_class): New function. Get the corresponding
1850 privilege spec class by giving a spec string.
1851 (riscv_get_priv_spec_name): New function. Get the corresponding
1852 privilege spec string by giving a CSR version class.
1853 * riscv-dis.c: Updated since DECLARE_CSR is changed.
1854 * riscv-dis.c: Add new disassembler option -Mpriv-spec to dump the CSR
1855 according to the chosen version. Build a hash table riscv_csr_hash to
1856 store the valid CSR for the chosen pirv verison. Dump the direct
1857 CSR address rather than it's name if it is invalid.
1858 (parse_riscv_dis_option_without_args): New function. Parse the options
1860 (parse_riscv_dis_option): Call parse_riscv_dis_option_without_args to
1861 parse the options without arguments first, and then handle the options
1862 with arguments. Add the new option -Mpriv-spec, which has argument.
1863 * riscv-dis.c (print_riscv_disassembler_options): Add description
1864 about the new OBJDUMP option.
1866 2020-05-19 Peter Bergner <bergner@linux.ibm.com>
1868 * ppc-opc.c (insert_ls, extract_ls): Handle 3-bit L fields and new
1869 WC values on POWER10 sync, dcbf and wait instructions.
1870 (insert_pl, extract_pl): New functions.
1871 (L2OPT, LS, WC): Use insert_ls and extract_ls.
1872 (LS3): New , 3-bit L for sync.
1873 (LS3, L3OPT): New, 3-bit L for sync and dcbf.
1874 (SC2, PL): New, 2-bit SC and PL for sync and wait.
1875 (XWCPL_MASK, XL3RT_MASK, XSYNCLS_MASK): New instruction masks.
1876 (XOPL3, XWCPL, XSYNCLS): New opcode macros.
1877 (powerpc_opcodes) <dcbflp, dcbfps, dcbstps pause_short, phwsync,
1878 plwsync, stcisync, stncisync, stsync, waitrsv>: New extended mnemonics.
1879 <wait>: Enable PL operand on POWER10.
1880 <dcbf>: Enable L3OPT operand on POWER10.
1881 <sync>: Enable SC2 operand on POWER10.
1883 2020-05-19 Stafford Horne <shorne@gmail.com>
1886 * or1k-asm.c: Regenerate.
1887 * or1k-desc.c: Regenerate.
1888 * or1k-desc.h: Regenerate.
1889 * or1k-dis.c: Regenerate.
1890 * or1k-ibld.c: Regenerate.
1891 * or1k-opc.c: Regenerate.
1892 * or1k-opc.h: Regenerate.
1893 * or1k-opinst.c: Regenerate.
1895 2020-05-11 Alan Modra <amodra@gmail.com>
1897 * ppc-opc (powerpc_opcodes): Add xscmpeqqp, xscmpgeqp, xscmpgtqp,
1900 2020-05-11 Alan Modra <amodra@gmail.com>
1902 * ppc-opc.c (powerpc_opcodes): Add lxvrbx, lxvrhx, lxvrwx, lxvrdx,
1903 stxvrbx, stxvrhx, stxvrwx, stxvrdx.
1905 2020-05-11 Alan Modra <amodra@gmail.com>
1907 * ppc-opc.c (powerpc_opcodes): Add xvtlsbb.
1909 2020-05-11 Alan Modra <amodra@gmail.com>
1911 * ppc-opc.c (powerpc_opcodes): Add vstribl, vstribr, vstrihl, vstrihr,
1912 vclrlb, vclrrb, vstribl., vstribr., vstrihl., vstrihr..
1914 2020-05-11 Peter Bergner <bergner@linux.ibm.com>
1916 * ppc-opc.c (powerpc_opcodes) <setbc, setbcr, setnbc, setnbcr>: New
1919 2020-05-11 Alan Modra <amodra@gmail.com>
1921 * ppc-opc.c (UIM8, P_U8XX4_MASK): Define.
1922 (powerpc_opcodes): Add vgnb, vcfuged, vpextd, vpdepd, vclzdm,
1923 vctzdm, cntlzdm, pdepd, pextd, cfuged, cnttzdm.
1924 (prefix_opcodes): Add xxeval.
1926 2020-05-11 Alan Modra <amodra@gmail.com>
1928 * ppc-opc.c (powerpc_opcodes): Add xxgenpcvbm, xxgenpcvhm,
1929 xxgenpcvwm, xxgenpcvdm.
1931 2020-05-11 Alan Modra <amodra@gmail.com>
1933 * ppc-opc.c (MP, VXVAM_MASK): Define.
1934 (VXVAPS_MASK): Use VXVA_MASK.
1935 (powerpc_opcodes): Add mtvsrbmi, vexpandbm, vexpandhm, vexpandwm,
1936 vexpanddm, vexpandqm, vextractbm, vextracthm, vextractwm,
1937 vextractdm, vextractqm, mtvsrbm, mtvsrhm, mtvsrwm, mtvsrdm, mtvsrqm,
1938 vcntmbb, vcntmbh, vcntmbw, vcntmbd.
1940 2020-05-11 Alan Modra <amodra@gmail.com>
1941 Peter Bergner <bergner@linux.ibm.com>
1943 * ppc-opc.c (insert_xa6a, extract_xa6a, insert_xb6a, extract_xb6a):
1945 (powerpc_operands): Define ACC, PMSK8, PMSK4, PMSK2, XMSK, YMSK,
1946 YMSK2, XA6a, XA6ap, XB6a entries.
1947 (PMMIRR, P_X_MASK, P_XX1_MASK, P_GER_MASK): Define
1948 (P_GER2_MASK, P_GER4_MASK, P_GER8_MASK, P_GER64_MASK): Define.
1950 (powerpc_opcodes): Add xxmfacc, xxmtacc, xxsetaccz,
1951 xvi8ger4pp, xvi8ger4, xvf16ger2pp, xvf16ger2, xvf32gerpp, xvf32ger,
1952 xvi4ger8pp, xvi4ger8, xvi16ger2spp, xvi16ger2s, xvbf16ger2pp,
1953 xvbf16ger2, xvf64gerpp, xvf64ger, xvi16ger2, xvf16ger2np,
1954 xvf32gernp, xvi8ger4spp, xvi16ger2pp, xvbf16ger2np, xvf64gernp,
1955 xvf16ger2pn, xvf32gerpn, xvbf16ger2pn, xvf64gerpn, xvf16ger2nn,
1956 xvf32gernn, xvbf16ger2nn, xvf64gernn, xvcvbf16sp, xvcvspbf16.
1957 (prefix_opcodes): Add pmxvi8ger4pp, pmxvi8ger4, pmxvf16ger2pp,
1958 pmxvf16ger2, pmxvf32gerpp, pmxvf32ger, pmxvi4ger8pp, pmxvi4ger8,
1959 pmxvi16ger2spp, pmxvi16ger2s, pmxvbf16ger2pp, pmxvbf16ger2,
1960 pmxvf64gerpp, pmxvf64ger, pmxvi16ger2, pmxvf16ger2np, pmxvf32gernp,
1961 pmxvi8ger4spp, pmxvi16ger2pp, pmxvbf16ger2np, pmxvf64gernp,
1962 pmxvf16ger2pn, pmxvf32gerpn, pmxvbf16ger2pn, pmxvf64gerpn,
1963 pmxvf16ger2nn, pmxvf32gernn, pmxvbf16ger2nn, pmxvf64gernn.
1965 2020-05-11 Alan Modra <amodra@gmail.com>
1967 * ppc-opc.c (insert_imm32, extract_imm32): New functions.
1968 (insert_xts, extract_xts): New functions.
1969 (IMM32, UIM3, IX, UIM5, SH3, XTS, P8RR): Define.
1970 (P_XX4_MASK, P_UXX4_MASK, VSOP, P_VS_MASK, P_VSI_MASK): Define.
1971 (VXRC_MASK, VXSH_MASK): Define.
1972 (powerpc_opcodes): Add vinsbvlx, vsldbi, vextdubvlx, vextdubvrx,
1973 vextduhvlx, vextduhvrx, vextduwvlx, vextduwvrx, vextddvlx,
1974 vextddvrx, vinshvlx, vinswvlx, vinsw, vinsbvrx, vinshvrx,
1975 vinswvrx, vinsd, vinsblx, vsrdbi, vinshlx, vinswlx, vinsdlx,
1976 vinsbrx, vinshrx, vinswrx, vinsdrx, lxvkq.
1977 (prefix_opcodes): Add xxsplti32dx, xxspltidp, xxspltiw, xxblendvb,
1978 xxblendvh, xxblendvw, xxblendvd, xxpermx.
1980 2020-05-11 Alan Modra <amodra@gmail.com>
1982 * ppc-opc.c (powerpc_opcodes): Add vrlq, vdivuq, vmsumcud, vrlqmi,
1983 vmuloud, vcmpuq, vslq, vdivsq, vcmpsq, vrlqnm, vcmpequq, vmulosd,
1984 vsrq, vdiveuq, vcmpgtuq, vmuleud, vsraq, vdivesq, vcmpgtsq, vmulesd,
1985 vcmpequq., vextsd2q, vmoduq, vcmpgtuq., vmodsq, vcmpgtsq., xscvqpuqz,
1986 xscvuqqp, xscvqpsqz, xscvsqqp, dcffixqq, dctfixqq.
1988 2020-05-11 Alan Modra <amodra@gmail.com>
1990 * ppc-opc.c (insert_xtp, extract_xtp): New functions.
1991 (XTP, DQXP, DQXP_MASK): Define.
1992 (powerpc_opcodes): Add lxvp, stxvp, lxvpx, stxvpx.
1993 (prefix_opcodes): Add plxvp and pstxvp.
1995 2020-05-11 Alan Modra <amodra@gmail.com>
1997 * ppc-opc.c (powerpc_opcodes): Add vdivuw, vdivud, vdivsw, vmulld,
1998 vdivsd, vmulhuw, vdiveuw, vmulhud, vdiveud, vmulhsw, vdivesw,
1999 vmulhsd, vdivesd, vmoduw, vmodud, vmodsw, vmodsd.
2001 2020-05-11 Peter Bergner <bergner@linux.ibm.com>
2003 * ppc-opc.c (powerpc_opcodes) <brd, brh, brw>: New mnemonics.
2005 2020-05-11 Peter Bergner <bergner@linux.ibm.com>
2007 * ppc-opc.c (insert_l1opt, extract_l1opt): New functions.
2009 (powerpc_opcodes) <paste.>: Add L operand for cpu POWER10.
2011 2020-05-11 Peter Bergner <bergner@linux.ibm.com>
2013 * ppc-opc.c (powerpc_opcodes) <slbiag>: Add variant with L operand.
2015 2020-05-11 Alan Modra <amodra@gmail.com>
2017 * ppc-dis.c (powerpc_init_dialect): Default to "power10".
2019 2020-05-11 Alan Modra <amodra@gmail.com>
2021 * ppc-dis.c (ppc_opts): Add "power10" entry.
2022 (print_insn_powerpc): Update for PPC_OPCODE_POWER10 renaming.
2023 * ppc-opc.c (POWER10): Rename from POWERXX. Update all uses.
2025 2020-05-11 Nick Clifton <nickc@redhat.com>
2027 * po/fr.po: Updated French translation.
2029 2020-04-30 Alex Coplan <alex.coplan@arm.com>
2031 * aarch64-opc.h (enum aarch64_field_kind): Add FLD_imm16_2.
2032 * aarch64-opc.c (fields): Add entry for FLD_imm16_2.
2033 (operand_general_constraint_met_p): validate
2034 AARCH64_OPND_UNDEFINED.
2035 * aarch64-tbl.h (aarch64_opcode_table): Add udf instruction, entry
2037 * aarch64-asm-2.c: Regenerated.
2038 * aarch64-dis-2.c: Regenerated.
2039 * aarch64-opc-2.c: Regenerated.
2041 2020-04-29 Nick Clifton <nickc@redhat.com>
2044 * sh-opc.h: Also use unsigned 8-bit immediate values for the LDRC
2047 2020-04-29 Nick Clifton <nickc@redhat.com>
2049 * po/sv.po: Updated Swedish translation.
2051 2020-04-29 Nick Clifton <nickc@redhat.com>
2054 * sh-opc.h (IMM0_8): Replace with IMM0_8S and IMM0_8U. Use
2055 IMM0_8S for arithmetic insns and IMM0_8U for logical insns.
2056 * sh-dis.c (print_insn_sh): Change IMM0_8 case to IMM0_8S and add
2059 2020-04-21 Andreas Schwab <schwab@linux-m68k.org>
2062 * m68k-opc.c (m68k_opcodes): Allow pc-rel for second operand of
2063 cmpi only on m68020up and cpu32.
2065 2020-04-20 Sudakshina Das <sudi.das@arm.com>
2067 * aarch64-asm.c (aarch64_ins_none): New.
2068 * aarch64-asm.h (ins_none): New declaration.
2069 * aarch64-dis.c (aarch64_ext_none): New.
2070 * aarch64-dis.h (ext_none): New declaration.
2071 * aarch64-opc.c (aarch64_print_operand): Update case for
2072 AARCH64_OPND_BARRIER_PSB.
2073 * aarch64-tbl.h (aarch64_opcode_table): Add tsb.
2074 (AARCH64_OPERANDS): Update inserter/extracter for
2075 AARCH64_OPND_BARRIER_PSB to use new dummy functions.
2076 * aarch64-asm-2.c: Regenerated.
2077 * aarch64-dis-2.c: Regenerated.
2078 * aarch64-opc-2.c: Regenerated.
2080 2020-04-20 Sudakshina Das <sudi.das@arm.com>
2082 * aarch64-tbl.h (aarch64_feature_bti, BTI, BTI_INSN): Remove.
2083 (aarch64_feature_ras, RAS): Likewise.
2084 (aarch64_feature_stat_profile, STAT_PROFILE): Likewise.
2085 (aarch64_opcode_table): Update bti, xpaclri, pacia1716, pacib1716,
2086 autia1716, autib1716, esb, psb, dgh, paciaz, paciasp, pacibz, pacibsp,
2087 autiaz, autiasp, autibz, autibsp to be CORE_INSN.
2088 * aarch64-asm-2.c: Regenerated.
2089 * aarch64-dis-2.c: Regenerated.
2090 * aarch64-opc-2.c: Regenerated.
2092 2020-04-17 Fredrik Strupe <fredrik@strupe.net>
2094 * arm-dis.c (neon_opcodes): Fix VDUP instruction masks.
2095 (print_insn_neon): Support disassembly of conditional
2098 2020-02-16 David Faust <david.faust@oracle.com>
2100 * bpf-desc.c: Regenerate.
2101 * bpf-desc.h: Likewise.
2102 * bpf-opc.c: Regenerate.
2103 * bpf-opc.h: Likewise.
2105 2020-04-07 Lili Cui <lili.cui@intel.com>
2107 * i386-dis.c (enum): Add PREFIX_0F01_REG_5_MOD_3_RM_1,
2108 (prefix_table): New instructions (see prefixes above).
2109 (rm_table): Likewise
2110 * i386-gen.c (cpu_flag_init): Add CPU_TSXLDTRK_FLAGS,
2111 CPU_ANY_TSXLDTRK_FLAGS.
2112 (cpu_flags): Add CpuTSXLDTRK.
2113 * i386-opc.h (enum): Add CpuTSXLDTRK.
2114 (i386_cpu_flags): Add cputsxldtrk.
2115 * i386-opc.tbl: Add XSUSPLDTRK insns.
2116 * i386-init.h: Regenerate.
2117 * i386-tbl.h: Likewise.
2119 2020-04-02 Lili Cui <lili.cui@intel.com>
2121 * i386-dis.c (prefix_table): New instructions serialize.
2122 * i386-gen.c (cpu_flag_init): Add CPU_SERIALIZE_FLAGS,
2123 CPU_ANY_SERIALIZE_FLAGS.
2124 (cpu_flags): Add CpuSERIALIZE.
2125 * i386-opc.h (enum): Add CpuSERIALIZE.
2126 (i386_cpu_flags): Add cpuserialize.
2127 * i386-opc.tbl: Add SERIALIZE insns.
2128 * i386-init.h: Regenerate.
2129 * i386-tbl.h: Likewise.
2131 2020-03-26 Alan Modra <amodra@gmail.com>
2133 * disassemble.h (opcodes_assert): Declare.
2134 (OPCODES_ASSERT): Define.
2135 * disassemble.c: Don't include assert.h. Include opintl.h.
2136 (opcodes_assert): New function.
2137 * h8300-dis.c (bfd_h8_disassemble_init): Use OPCODES_ASSERT.
2138 (bfd_h8_disassemble): Reduce size of data array. Correctly
2139 calculate maxlen. Omit insn decoding when insn length exceeds
2140 maxlen. Exit from nibble loop when looking for E, before
2141 accessing next data byte. Move processing of E outside loop.
2142 Replace tests of maxlen in loop with assertions.
2144 2020-03-26 Alan Modra <amodra@gmail.com>
2146 * arc-dis.c (find_format): Init needs_limm. Simplify use of limm.
2148 2020-03-25 Alan Modra <amodra@gmail.com>
2150 * z80-dis.c (suffix): Init mybuf.
2152 2020-03-22 Alan Modra <amodra@gmail.com>
2154 * h8300-dis.c (bfd_h8_disassemble): Limit data[] access to that
2155 successflly read from section.
2157 2020-03-22 Alan Modra <amodra@gmail.com>
2159 * arc-dis.c (find_format): Use ISO C string concatenation rather
2160 than line continuation within a string. Don't access needs_limm
2161 before testing opcode != NULL.
2163 2020-03-22 Alan Modra <amodra@gmail.com>
2165 * ns32k-dis.c (print_insn_arg): Update comment.
2166 (print_insn_ns32k): Reduce size of index_offset array, and
2167 initialize, passing -1 to print_insn_arg for args that are not
2168 an index. Don't exit arg loop early. Abort on bad arg number.
2170 2020-03-22 Alan Modra <amodra@gmail.com>
2172 * s12z-dis.c (abstract_read_memory): Don't print error on EOI.
2173 * s12z-opc.c: Formatting.
2174 (operands_f): Return an int.
2175 (opr_n_bytes_p1): Return -1 on reaching buffer memory limit.
2176 (opr_n_bytes2, bfextins_n_bytes, mul_n_bytes, bm_n_bytes),
2177 (shift_n_bytes, mov_imm_opr_n_bytes, loop_prim_n_bytes),
2178 (exg_sex_discrim): Likewise.
2179 (create_immediate_operand, create_bitfield_operand),
2180 (create_register_operand_with_size, create_register_all_operand),
2181 (create_register_all16_operand, create_simple_memory_operand),
2182 (create_memory_operand, create_memory_auto_operand): Don't
2183 segfault on malloc failure.
2184 (z_ext24_decode): Return an int status, negative on fail, zero
2186 (x_imm1, imm1_decode, trap_decode, z_opr_decode, z_opr_decode2),
2187 (imm1234, reg_s_imm, reg_s_opr, z_imm1234_8base, z_imm1234_0base),
2188 (z_tfr, z_reg, reg_xy, lea_reg_xys_opr, lea_reg_xys, rel_15_7),
2189 (decode_rel_15_7, cmp_xy, sub_d6_x_y, sub_d6_y_x),
2190 (ld_18bit_decode, mul_decode, bm_decode, bm_rel_decode),
2191 (mov_imm_opr, ld_18bit_decode, exg_sex_decode),
2192 (loop_primitive_decode, shift_decode, psh_pul_decode),
2193 (bit_field_decode): Similarly.
2194 (z_decode_signed_value, decode_signed_value): Similarly. Add arg
2195 to return value, update callers.
2196 (x_opr_decode_with_size): Check all reads, returning NULL on fail.
2197 Don't segfault on NULL operand.
2198 (decode_operation): Return OP_INVALID on first fail.
2199 (decode_s12z): Check all reads, returning -1 on fail.
2201 2020-03-20 Alan Modra <amodra@gmail.com>
2203 * metag-dis.c (print_insn_metag): Don't ignore status from
2206 2020-03-20 Alan Modra <amodra@gmail.com>
2208 * nds32-dis.c (print_insn_nds32): Remove unnecessary casts.
2209 Initialize parts of buffer not written when handling a possible
2210 2-byte insn at end of section. Don't attempt decoding of such
2211 an insn by the 4-byte machinery.
2213 2020-03-20 Alan Modra <amodra@gmail.com>
2215 * ppc-dis.c (print_insn_powerpc): Only clear needed bytes of
2216 partially filled buffer. Prevent lookup of 4-byte insns when
2217 only VLE 2-byte insns are possible due to section size. Print
2218 ".word" rather than ".long" for 2-byte leftovers.
2220 2020-03-17 Sergey Belyashov <sergey.belyashov@gmail.com>
2223 * z80-dis.c: Fix disassembling ED+A4/AC/B4/BC opcodes.
2225 2020-03-13 Jan Beulich <jbeulich@suse.com>
2227 * i386-dis.c (X86_64_0D): Rename to ...
2228 (X86_64_0E): ... this.
2230 2020-03-09 H.J. Lu <hongjiu.lu@intel.com>
2232 * Makefile.am ($(srcdir)/i386-init.h): Also pass -P to $(CPP).
2233 * Makefile.in: Regenerated.
2235 2020-03-09 Jan Beulich <jbeulich@suse.com>
2237 * i386-opc.tbl (avx_irel): New. Use is for AVX512 vpcmp*
2239 * i386-tbl.h: Re-generate.
2241 2020-03-09 Jan Beulich <jbeulich@suse.com>
2243 * i386-opc.tbl (xop_elem, xop_irel, xop_sign): New. Use them for XOP vpcom*,
2244 vprot*, vpsha*, and vpshl*.
2245 * i386-tbl.h: Re-generate.
2247 2020-03-09 Jan Beulich <jbeulich@suse.com>
2249 * i386-opc.tbl (avx_frel): New. Use it for AVX/AVX512 vcmpps,
2250 vcmpss, vcmppd, and vcmpsd 3-operand pseudo-ops.
2251 * i386-tbl.h: Re-generate.
2253 2020-03-09 Jan Beulich <jbeulich@suse.com>
2255 * i386-gen.c (set_bitfield): Ignore zero-length field names.
2256 * i386-opc.tbl (sse_frel): New. Use it for SSE/SSE2 cmpps,
2257 cmpss, cmppd, and cmpsd 2-operand pseudo-ops.
2258 * i386-tbl.h: Re-generate.
2260 2020-03-09 Jan Beulich <jbeulich@suse.com>
2262 * i386-gen.c (struct template_arg, struct template_instance,
2263 struct template_param, struct template, templates,
2264 parse_template, expand_templates): New.
2265 (process_i386_opcodes): Various local variables moved to
2266 expand_templates. Call parse_template and expand_templates.
2267 * i386-opc.tbl (cc): New. Use it for Jcc, SETcc, and CMOVcc.
2268 * i386-tbl.h: Re-generate.
2270 2020-03-06 Jan Beulich <jbeulich@suse.com>
2272 * i386-opc.tbl (vcvtdq2pd, vcvtps2pd, vcvtudq2pd, vcvtps2ph,
2273 vcvtps2qq, vcvtps2uqq, vcvttps2qq, vcvttps2uqq): Fold separate
2274 register and memory source templates. Replace VexW= by VexW*
2276 * i386-tbl.h: Re-generate.
2278 2020-03-06 Jan Beulich <jbeulich@suse.com>
2280 * i386-opc.tbl: Drop IgnoreSize from various SIMD insns. Replace
2281 VexW= by VexW* and VexVVVV=1 by just VexVVVV where applicable.
2282 * i386-tbl.h: Re-generate.
2284 2020-03-06 Jan Beulich <jbeulich@suse.com>
2286 * i386-opc.tbl (fildll, fistpll, fisttpll): Add ATTSyntax.
2287 * i386-tbl.h: Re-generate.
2289 2020-03-06 Jan Beulich <jbeulich@suse.com>
2291 * i386-opc.tbl (movq): Drop NoRex64 from XMM/XMM SSE2AVX variants.
2292 (movmskps, pextrw, pinsrw, pmovmskb, movmskpd, extractps,
2293 pextrb, pinsrb, roundsd): Drop NoRex64 and where applicable use
2294 VexW0 on SSE2AVX variants.
2295 (vmovq): Drop NoRex64 from XMM/XMM variants.
2296 (vextractps, vmovmskpd, vmovmskps, vpextrb, vpextrw, vpinsrb,
2297 vpinsrw, vpmovmskb, vroundsd, vpmovmskb): Drop NoRex64 and where
2298 applicable use VexW0.
2299 * i386-tbl.h: Re-generate.
2301 2020-03-06 Jan Beulich <jbeulich@suse.com>
2303 * i386-gen.c (opcode_modifiers): Remove Rex64 field.
2304 * i386-opc.h (Rex64): Delete.
2305 (struct i386_opcode_modifier): Remove rex64 field.
2306 * i386-opc.tbl (crc32): Drop Rex64.
2307 Replace Rex64 with Size64 everywhere else.
2308 * i386-tbl.h: Re-generate.
2310 2020-03-06 Jan Beulich <jbeulich@suse.com>
2312 * i386-dis.c (OP_E_memory): Exclude recording of used address
2313 prefix for "bnd" modes only in 64-bit mode. Don't decode 16-bit
2314 addressed memory operands for MPX insns.
2316 2020-03-06 Jan Beulich <jbeulich@suse.com>
2318 * i386-opc.tbl (movmskps, mwait, vmread, vmwrite, invept,
2319 invvpid, invpcid, rdfsbase, rdgsbase, wrfsbase, wrgsbase, adcx,
2320 adox, mwaitx, rdpid, movdiri): Add IgnoreSize.
2321 (ptwrite): Split into non-64-bit and 64-bit forms.
2322 * i386-tbl.h: Re-generate.
2324 2020-03-06 Jan Beulich <jbeulich@suse.com>
2326 * i386-opc.tbl (tpause, umwait): Add IgnoreSize. Add 3-operand
2328 * i386-tbl.h: Re-generate.
2330 2020-03-04 Jan Beulich <jbeulich@suse.com>
2332 * i386-dis.c (PREFIX_0F01_REG_3_RM_1): New.
2333 (prefix_table): Move vmmcall here. Add vmgexit.
2334 (rm_table): Replace vmmcall entry by prefix_table[] escape.
2335 * i386-gen.c (cpu_flag_init): Add CPU_SEV_ES_FLAGS entry.
2336 (cpu_flags): Add CpuSEV_ES entry.
2337 * i386-opc.h (CpuSEV_ES): New.
2338 (union i386_cpu_flags): Add cpusev_es field.
2339 * i386-opc.tbl (vmgexit): New.
2340 * i386-init.h, i386-tbl.h: Re-generate.
2342 2020-03-03 H.J. Lu <hongjiu.lu@intel.com>
2344 * i386-gen.c (opcode_modifiers): Replace IgnoreSize/DefaultSize
2346 * i386-opc.h (IGNORESIZE): New.
2347 (DEFAULTSIZE): Likewise.
2348 (IgnoreSize): Removed.
2349 (DefaultSize): Likewise.
2350 (MnemonicSize): New.
2351 (i386_opcode_modifier): Replace ignoresize/defaultsize with
2353 * i386-opc.tbl (IgnoreSize): New.
2354 (DefaultSize): Likewise.
2355 * i386-tbl.h: Regenerated.
2357 2020-03-03 Sergey Belyashov <sergey.belyashov@gmail.com>
2360 * z80-dis.c: Fix disassembly of LD IY,(HL) and D (HL),IX
2363 2020-03-03 H.J. Lu <hongjiu.lu@intel.com>
2366 * i386-opc.tbl: Add IgnoreSize to cvtsi2sd, cvtsi2ss, vcvtsi2sd,
2367 vcvtsi2ss, vcvtusi2sd and vcvtusi2ss for AT&T syntax.
2368 * i386-tbl.h: Regenerated.
2370 2020-02-26 Alan Modra <amodra@gmail.com>
2372 * aarch64-asm.c: Indent labels correctly.
2373 * aarch64-dis.c: Likewise.
2374 * aarch64-gen.c: Likewise.
2375 * aarch64-opc.c: Likewise.
2376 * alpha-dis.c: Likewise.
2377 * i386-dis.c: Likewise.
2378 * nds32-asm.c: Likewise.
2379 * nfp-dis.c: Likewise.
2380 * visium-dis.c: Likewise.
2382 2020-02-25 Claudiu Zissulescu <claziss@gmail.com>
2384 * arc-regs.h (int_vector_base): Make it available for all ARC
2387 2020-02-20 Nelson Chu <nelson.chu@sifive.com>
2389 * riscv-dis.c (print_insn_args): Updated since the DECLARE_CSR is
2392 2020-02-19 Nelson Chu <nelson.chu@sifive.com>
2394 * riscv-opc.c (riscv_opcodes): Convert add/addi to the compressed
2395 c.mv/c.li if rs1 is zero.
2397 2020-02-17 H.J. Lu <hongjiu.lu@intel.com>
2399 * i386-gen.c (cpu_flag_init): Replace CpuABM with
2400 CpuLZCNT|CpuPOPCNT. Add CpuPOPCNT to CPU_SSE4_2_FLAGS. Add
2402 (cpu_flags): Remove CpuABM. Add CpuPOPCNT.
2403 * i386-opc.h (CpuABM): Removed.
2405 (i386_cpu_flags): Remove cpuabm. Add cpupopcnt.
2406 * i386-opc.tbl: Replace CpuABM|CpuSSE4_2 with CpuPOPCNT on
2407 popcnt. Remove CpuABM from lzcnt.
2408 * i386-init.h: Regenerated.
2409 * i386-tbl.h: Likewise.
2411 2020-02-17 Jan Beulich <jbeulich@suse.com>
2413 * i386-opc.tbl (vcvtsi2sd, vcvtsi2ss, vcvtusi2sd, vcvtusi2ss):
2414 Fold CpuNo64 and Cpu64 templates. Use VexLIG/EVexLIG and VexW0/
2415 VexW1 instead of open-coding them.
2416 * i386-tbl.h: Re-generate.
2418 2020-02-17 Jan Beulich <jbeulich@suse.com>
2420 * i386-opc.tbl (AddrPrefixOpReg): Define.
2421 (monitor, invlpga, vmload, vmrun, vmsave, clzero, monitorx,
2422 umonitor, movdir64b, enqcmd, enqcmds): Fold Cpu64 and CpuNo64
2423 templates. Drop NoRex64.
2424 * i386-tbl.h: Re-generate.
2426 2020-02-17 Jan Beulich <jbeulich@suse.com>
2429 * i386-opc.tbl (vcvtpd2dq, vcvtpd2ps, vcvttpd2dq, vcvtpd2udq,
2430 vcvttpd2udq, vcvtqq2ps, vcvtuqq2ps): Split XMM/YMM source forms
2431 into Intel syntax instance (with Unpsecified) and AT&T one
2433 (vcvtneps2bf16): Likewise, along with folding the two so far
2435 * i386-tbl.h: Re-generate.
2437 2020-02-16 H.J. Lu <hongjiu.lu@intel.com>
2439 * i386-gen.c (cpu_flag_init): Remove CPU_ANY_SSE3_FLAGS from
2440 CPU_ANY_SSE4A_FLAGS.
2442 2020-02-17 Alan Modra <amodra@gmail.com>
2444 * i386-gen.c (cpu_flag_init): Correct last change.
2446 2020-02-16 H.J. Lu <hongjiu.lu@intel.com>
2448 * i386-gen.c (cpu_flag_init): Add CPU_ANY_SSE4A_FLAGS. Remove
2451 2020-02-14 H.J. Lu <hongjiu.lu@intel.com>
2453 * i386-opc.tbl (movsx): Remove Intel syntax comments.
2456 2020-02-14 Jan Beulich <jbeulich@suse.com>
2459 * i386-opc.tbl (movsx): Fold patterns. Also allow Reg32 as
2460 destination for Cpu64-only variant.
2461 (movzx): Fold patterns.
2462 * i386-tbl.h: Re-generate.
2464 2020-02-13 Jan Beulich <jbeulich@suse.com>
2466 * i386-gen.c (cpu_flag_init): Move CpuSSE4a from
2467 CPU_ANY_SSE_FLAGS entry to CPU_ANY_SSE3_FLAGS one. Add
2468 CPU_ANY_SSE4_FLAGS entry.
2469 * i386-init.h: Re-generate.
2471 2020-02-12 Jan Beulich <jbeulich@suse.com>
2473 * i386-opc.tbl (vfpclasspd, vfpclassps): Add Intel sytax form
2474 with Unspecified, making the present one AT&T syntax only.
2475 * i386-tbl.h: Re-generate.
2477 2020-02-12 Jan Beulich <jbeulich@suse.com>
2479 * i386-opc.tbl (jmp): Fold CpuNo64 and Amd64 direct variants.
2480 * i386-tbl.h: Re-generate.
2482 2020-02-12 Jan Beulich <jbeulich@suse.com>
2485 * i386-dis.c (putop): Handle REX.W in '^' case for Intel64 mode.
2486 * i386-opc.tbl (lfs, lgs, lss, lcall, ljmp): Split into
2487 Amd64 and Intel64 templates.
2488 (call, jmp): Likewise for far indirect variants. Dro
2490 * i386-tbl.h: Re-generate.
2492 2020-02-11 Jan Beulich <jbeulich@suse.com>
2494 * i386-gen.c (opcode_modifiers): Remove ShortForm entry.
2495 * i386-opc.h (ShortForm): Delete.
2496 (struct i386_opcode_modifier): Remove shortform field.
2497 * i386-opc.tbl (mov, movabs, push, pop, xchg, inc, dec, fld,
2498 fst, fstp, fxch, fcom, fcomp, fucom, fucomp, fadd, faddp, fsub,
2499 fsubp, fsubr, fsubrp, fmul, fmulp, fdiv, fdivp, fdivr, fdivrp,
2500 ffreep, bswap, fcmov*, fcomi, fcomip, fucomi, fucomip, movq):
2502 * i386-tbl.h: Re-generate.
2504 2020-02-11 Jan Beulich <jbeulich@suse.com>
2506 * i386-opc.tbl (fcomi, fucomi, fcomip, fcompi, fucomip,
2507 fucompi): Drop ShortForm from operand-less templates.
2508 * i386-tbl.h: Re-generate.
2510 2020-02-11 Alan Modra <amodra@gmail.com>
2512 * cgen-ibld.in (extract_normal): Set *valuep on all return paths.
2513 * bpf-ibld.c, * epiphany-ibld.c, * fr30-ibld.c, * frv-ibld.c,
2514 * ip2k-ibld.c, * iq2000-ibld.c, * lm32-ibld.c, * m32c-ibld.c,
2515 * m32r-ibld.c, * mep-ibld.c, * mt-ibld.c, * or1k-ibld.c,
2516 * xc16x-ibld.c, * xstormy16-ibld.c: Regenerate.
2518 2020-02-10 Matthew Malcomson <matthew.malcomson@arm.com>
2520 * arm-dis.c (print_insn_cde): Define 'V' parse character.
2521 (cde_opcodes): Add VCX* instructions.
2523 2020-02-10 Stam Markianos-Wright <stam.markianos-wright@arm.com>
2524 Matthew Malcomson <matthew.malcomson@arm.com>
2526 * arm-dis.c (struct cdeopcode32): New.
2527 (CDE_OPCODE): New macro.
2528 (cde_opcodes): New disassembly table.
2529 (regnames): New option to table.
2530 (cde_coprocs): New global variable.
2531 (print_insn_cde): New
2532 (print_insn_thumb32): Use print_insn_cde.
2533 (parse_arm_disassembler_options): Parse coprocN args.
2535 2020-02-10 H.J. Lu <hongjiu.lu@intel.com>
2538 * i386-gen.c (opcode_modifiers): Replace AMD64 and Intel64
2540 * i386-opc.h (AMD64): Removed.
2541 (Intel64): Likewose.
2543 (INTEL64): Likewise.
2544 (INTEL64ONLY): Likewise.
2545 (i386_opcode_modifier): Replace amd64 and intel64 with isa64.
2546 * i386-opc.tbl (Amd64): New.
2547 (Intel64): Likewise.
2548 (Intel64Only): Likewise.
2549 Replace AMD64 with Amd64. Update sysenter/sysenter with
2550 Cpu64 and Intel64Only. Remove AMD64 from sysenter/sysenter.
2551 * i386-tbl.h: Regenerated.
2553 2020-02-07 Sergey Belyashov <sergey.belyashov@gmail.com>
2556 * z80-dis.c: Add support for GBZ80 opcodes.
2558 2020-02-04 Alan Modra <amodra@gmail.com>
2560 * d30v-dis.c (print_insn): Make "val" and "opnum" unsigned.
2562 2020-02-03 Alan Modra <amodra@gmail.com>
2564 * m32c-ibld.c: Regenerate.
2566 2020-02-01 Alan Modra <amodra@gmail.com>
2568 * frv-ibld.c: Regenerate.
2570 2020-01-31 Jan Beulich <jbeulich@suse.com>
2572 * i386-dis.c (EXxmm_mdq, xmm_mdq_mode): Delete.
2573 (intel_operand_size, OP_EX): Drop xmm_mdq_mode case label.
2574 (OP_E_memory): Replace xmm_mdq_mode case label by
2575 vex_scalar_w_dq_mode one.
2576 * i386-dis-evex-prefix.h: Replace EXxmm_mdq by EXVexWdqScalar.
2578 2020-01-31 Jan Beulich <jbeulich@suse.com>
2580 * i386-dis.c (EXVexWdq, vex_w_dq_mode): Delete.
2581 (vex_vsib_d_w_dq_mode, vex_vsib_q_w_dq_mode,
2582 vex_scalar_w_dq_mode): Don't refer to vex_w_dq_mode in comments.
2583 (intel_operand_size): Drop vex_w_dq_mode case label.
2585 2020-01-31 Richard Sandiford <richard.sandiford@arm.com>
2587 * aarch64-tbl.h (aarch64_opcode): Set C_MAX_ELEM for SVE bfcvt.
2588 Remove C_SCAN_MOVPRFX for SVE bfcvtnt.
2590 2020-01-30 Alan Modra <amodra@gmail.com>
2592 * m32c-ibld.c: Regenerate.
2594 2020-01-30 Jose E. Marchesi <jose.marchesi@oracle.com>
2596 * bpf-opc.c: Regenerate.
2598 2020-01-30 Jan Beulich <jbeulich@suse.com>
2600 * i386-dis.c (X86_64_C2, X86_64_C3): New enumerators.
2601 (dis386): Use them to replace C2/C3 table entries.
2602 (x86_64_table): Add X86_64_C2 and X86_64_C3 entries.
2603 * i386-opc.tbl (ret): Split Cpu64 entries into AMD64 and Intel64
2604 ones. Use Size64 instead of DefaultSize on Intel64 ones.
2605 * i386-tbl.h: Re-generate.
2607 2020-01-30 Jan Beulich <jbeulich@suse.com>
2609 * i386-opc.tbl (call): Drop DefaultSize from Intel64 JumpDword
2611 (fldenv, fnstenv, fstenv, fnsave, fsave, frstor): Drop
2613 * i386-tbl.h: Re-generate.
2615 2020-01-30 Alan Modra <amodra@gmail.com>
2617 * tic4x-dis.c (tic4x_dp): Make unsigned.
2619 2020-01-27 H.J. Lu <hongjiu.lu@intel.com>
2620 Jan Beulich <jbeulich@suse.com>
2623 * i386-dis.c (MOVSXD_Fixup): New function.
2624 (movsxd_mode): New enum.
2625 (x86_64_table): Use MOVSXD_Fixup and movsxd_mode on movsxd.
2626 (intel_operand_size): Handle movsxd_mode.
2627 (OP_E_register): Likewise.
2629 * i386-opc.tbl: Remove Rex64 and allow 32-bit destination
2630 register on movsxd. Add movsxd with 16-bit destination register
2631 for AMD64 and Intel64 ISAs.
2632 * i386-tbl.h: Regenerated.
2634 2020-01-27 Tamar Christina <tamar.christina@arm.com>
2637 * aarch64-tbl.h (struct aarch64_opcode): Re-order cfinv.
2638 * aarch64-asm-2.c: Regenerate
2639 * aarch64-dis-2.c: Likewise.
2640 * aarch64-opc-2.c: Likewise.
2642 2020-01-21 Jan Beulich <jbeulich@suse.com>
2644 * i386-opc.tbl (sysret): Drop DefaultSize.
2645 * i386-tbl.h: Re-generate.
2647 2020-01-21 Jan Beulich <jbeulich@suse.com>
2649 * i386-opc.tbl (vcvtneps2bf16x): Add Broadcast, Xmmword, and
2651 (vcvtneps2bf16y): Add Broadcast, Ymmword, and Dword.
2652 * i386-tbl.h: Re-generate.
2654 2020-01-20 Nick Clifton <nickc@redhat.com>
2656 * po/de.po: Updated German translation.
2657 * po/pt_BR.po: Updated Brazilian Portuguese translation.
2658 * po/uk.po: Updated Ukranian translation.
2660 2020-01-20 Alan Modra <amodra@gmail.com>
2662 * hppa-dis.c (fput_const): Remove useless cast.
2664 2020-01-20 Alan Modra <amodra@gmail.com>
2666 * arm-dis.c (print_insn_arm): Wrap 'T' value.
2668 2020-01-18 Nick Clifton <nickc@redhat.com>
2670 * configure: Regenerate.
2671 * po/opcodes.pot: Regenerate.
2673 2020-01-18 Nick Clifton <nickc@redhat.com>
2675 Binutils 2.34 branch created.
2677 2020-01-17 Christian Biesinger <cbiesinger@google.com>
2679 * opintl.h: Fix spelling error (seperate).
2681 2020-01-17 H.J. Lu <hongjiu.lu@intel.com>
2683 * i386-opc.tbl: Add {vex} pseudo prefix.
2684 * i386-tbl.h: Regenerated.
2686 2020-01-16 Andre Vieira <andre.simoesdiasvieira@arm.com>
2689 * opcodes/arm-dis.c (coprocessor_opcodes): Use CORE_HIGH for MVE bits.
2690 (neon_opcodes): Likewise.
2691 (select_arm_features): Make sure we enable MVE bits when selecting
2692 armv8.1-m.main. Make sure we do not enable MVE bits when not selecting
2695 2020-01-16 Jan Beulich <jbeulich@suse.com>
2697 * i386-opc.tbl: Drop stale comment from XOP section.
2699 2020-01-16 Jan Beulich <jbeulich@suse.com>
2701 * i386-opc.tbl (movq): Add VexWIG to SSE2AVX XMM->XMM forms.
2702 (extractps): Add VexWIG to SSE2AVX forms.
2703 * i386-tbl.h: Re-generate.
2705 2020-01-16 Jan Beulich <jbeulich@suse.com>
2707 * i386-opc.tbl (pextrq, pinsrq): Drop IgnoreSize and Qword. Drop
2708 Size64 from and use VexW1 on SSE2AVX forms.
2709 (vpextrq, vpinsrq): Drop IgnoreSize and Qword. Drop Size64 from
2710 VEX-encoded forms. Add Cpu64 to EVEX-encoded forms. Use VexW1.
2711 * i386-tbl.h: Re-generate.
2713 2020-01-15 Alan Modra <amodra@gmail.com>
2715 * tic4x-dis.c (tic4x_version): Make unsigned long.
2716 (optab, optab_special, registernames): New file scope vars.
2717 (tic4x_print_register): Set up registernames rather than
2718 malloc'd registertable.
2719 (tic4x_disassemble): Delete optable and optable_special. Use
2720 optab and optab_special instead. Throw away old optab,
2721 optab_special and registernames when info->mach changes.
2723 2020-01-14 Sergey Belyashov <sergey.belyashov@gmail.com>
2726 * z80-dis.c (suffix): Use .db instruction to generate double
2729 2020-01-14 Alan Modra <amodra@gmail.com>
2731 * z8k-dis.c (unpack_instr): Formatting. Cast unsigned short
2732 values to unsigned before shifting.
2734 2020-01-13 Thomas Troeger <tstroege@gmx.de>
2736 * arm-dis.c (print_insn_arm): Fill in insn info fields for control
2738 (print_insn_thumb16, print_insn_thumb32): Likewise.
2739 (print_insn): Initialize the insn info.
2740 * i386-dis.c (print_insn): Initialize the insn info fields, and
2743 2012-01-13 Claudiu Zissulescu <claziss@gmail.com>
2745 * arc-opc.c (C_NE): Make it required.
2747 2012-01-13 Claudiu Zissulescu <claziss@gmail.com>
2749 * opcode/arc-dis.c (regnames): Correct ACCL/ACCH naming, fix typo
2750 reserved register name.
2752 2020-01-13 Alan Modra <amodra@gmail.com>
2754 * ns32k-dis.c (Is_gen): Use strchr, add 'f'.
2755 (print_insn_ns32k): Adjust ioffset for 'f' index_offset.
2757 2020-01-13 Alan Modra <amodra@gmail.com>
2759 * wasm32-dis.c (print_insn_wasm32): Localise variables. Store
2760 result of wasm_read_leb128 in a uint64_t and check that bits
2761 are not lost when copying to other locals. Use uint32_t for
2762 most locals. Use PRId64 when printing int64_t.
2764 2020-01-13 Alan Modra <amodra@gmail.com>
2766 * score-dis.c: Formatting.
2767 * score7-dis.c: Formatting.
2769 2020-01-13 Alan Modra <amodra@gmail.com>
2771 * score-dis.c (print_insn_score48): Use unsigned variables for
2772 unsigned values. Don't left shift negative values.
2773 (print_insn_score32): Likewise.
2774 * score7-dis.c (print_insn_score32, print_insn_score16): Likewise.
2776 2020-01-13 Alan Modra <amodra@gmail.com>
2778 * tic4x-dis.c (tic4x_print_register): Remove dead code.
2780 2020-01-13 Alan Modra <amodra@gmail.com>
2782 * fr30-ibld.c: Regenerate.
2784 2020-01-13 Alan Modra <amodra@gmail.com>
2786 * xgate-dis.c (print_insn): Don't left shift signed value.
2787 (ripBits): Formatting, use 1u.
2789 2020-01-10 Alan Modra <amodra@gmail.com>
2791 * tilepro-opc.c (parse_insn_tilepro): Make opval unsigned.
2792 * tilegx-opc.c (parse_insn_tilegx): Likewise. Delete raw_opval.
2794 2020-01-10 Alan Modra <amodra@gmail.com>
2796 * m10300-dis.c (disassemble): Move extraction of DREG, AREG, RREG,
2797 and XRREG value earlier to avoid a shift with negative exponent.
2798 * m10200-dis.c (disassemble): Similarly.
2800 2020-01-09 Nick Clifton <nickc@redhat.com>
2803 * z80-dis.c (ld_ii_ii): Use correct cast.
2805 2020-01-03 Sergey Belyashov <sergey.belyashov@gmail.com>
2808 * z80-dis.c (ld_ii_ii): Use character constant when checking
2811 2020-01-09 Jan Beulich <jbeulich@suse.com>
2813 * i386-dis.c (SEP_Fixup): New.
2815 (dis386_twobyte): Use it for sysenter/sysexit.
2816 (enum x86_64_isa): Change amd64 enumerator to value 1.
2817 (OP_J): Compare isa64 against intel64 instead of amd64.
2818 * i386-opc.tbl (sysenter, sysexit): Split into AMD64 and Intel64
2820 * i386-tbl.h: Re-generate.
2822 2020-01-08 Alan Modra <amodra@gmail.com>
2824 * z8k-dis.c: Include libiberty.h
2825 (instr_data_s): Make max_fetched unsigned.
2826 (z8k_lookup_instr): Make nibl_index and tabl_index unsigned.
2827 Don't exceed byte_info bounds.
2828 (output_instr): Make num_bytes unsigned.
2829 (unpack_instr): Likewise for nibl_count and loop.
2830 * z8kgen.c (gas <opcode_entry_type>): Make noperands, length and
2832 * z8k-opc.h: Regenerate.
2834 2020-01-07 Shahab Vahedi <shahab@synopsys.com>
2836 * arc-tbl.h (llock): Use 'LLOCK' as class.
2838 (scond): Use 'SCOND' as class.
2840 (llockd): Set data_size_mode to 'C_ZZ_D' which is 64-bit.
2843 2020-01-06 Alan Modra <amodra@gmail.com>
2845 * m32c-ibld.c: Regenerate.
2847 2020-01-06 Alan Modra <amodra@gmail.com>
2850 * z80-dis.c (suffix): Don't use a local struct buffer copy.
2851 Peek at next byte to prevent recursion on repeated prefix bytes.
2852 Ensure uninitialised "mybuf" is not accessed.
2853 (print_insn_z80): Don't zero n_fetch and n_used here,..
2854 (print_insn_z80_buf): ..do it here instead.
2856 2020-01-04 Alan Modra <amodra@gmail.com>
2858 * m32r-ibld.c: Regenerate.
2860 2020-01-04 Alan Modra <amodra@gmail.com>
2862 * cr16-dis.c (cr16_match_opcode): Avoid shift left of signed value.
2864 2020-01-04 Alan Modra <amodra@gmail.com>
2866 * crx-dis.c (match_opcode): Avoid shift left of signed value.
2868 2020-01-04 Alan Modra <amodra@gmail.com>
2870 * d30v-dis.c (print_insn): Avoid signed overflow in left shift.
2872 2020-01-03 Jan Beulich <jbeulich@suse.com>
2874 * aarch64-tbl.h (aarch64_opcode_table): Use
2875 SVE_ADDR_RX_LSL{1,2,3} for LD1RO{H,W,D}.
2877 2020-01-03 Jan Beulich <jbeulich@suse.com>
2879 * aarch64-tbl.h (aarch64_opcode_table): Correct SIMD
2880 forms of SUDOT and USDOT.
2882 2020-01-03 Jan Beulich <jbeulich@suse.com>
2884 * aarch64-tbl.h (aarch64_opcode_table): Drop 'i' from
2886 * opcodes/aarch64-dis-2.c: Re-generate.
2888 2020-01-03 Jan Beulich <jbeulich@suse.com>
2890 * aarch64-tbl.h (aarch64_opcode_table): Correct 64-bit
2892 * opcodes/aarch64-dis-2.c: Re-generate.
2894 2020-01-02 Sergey Belyashov <sergey.belyashov@gmail.com>
2896 * z80-dis.c: Add support for eZ80 and Z80 instructions.
2898 2020-01-01 Alan Modra <amodra@gmail.com>
2900 Update year range in copyright notice of all files.
2902 For older changes see ChangeLog-2019
2904 Copyright (C) 2020 Free Software Foundation, Inc.
2906 Copying and distribution of this file, with or without modification,
2907 are permitted in any medium without royalty provided the copyright
2908 notice and this notice are preserved.
2914 version-control: never
projects / thirdparty / binutils-gdb.git / blob