opcodes/ChangeLog

   1 2018-02-13  Maciej W. Rozycki  <macro@mips.com>
   2
   3         * wasm32-dis.c (print_insn_wasm32): Rename `index' local
   4         variable to `function_index'.
   5
   6 2018-02-12  Henry Wong <henry@stuffedcow.net>
   7
   8         * mips-opc.c (mips_builtin_opcodes): Correct "sigrie" encoding.
   9
  10 2018-02-05  Nick Clifton  <nickc@redhat.com>
  11
  12         * po/pt_BR.po: Updated Brazilian Portuguese translation.
  13
  14 2018-01-23  Igor Tsimbalist  <igor.v.tsimbalist@intel.com>
  15
  16         * i386-dis.c (enum): Add pconfig.
  17         * i386-gen.c (cpu_flag_init): Add CPU_PCONFIG_FLAGS.
  18         (cpu_flags): Add CpuPCONFIG.
  19         * i386-opc.h (enum): Add CpuPCONFIG.
  20         (i386_cpu_flags): Add cpupconfig.
  21         * i386-opc.tbl: Add PCONFIG instruction.
  22         * i386-init.h: Regenerate.
  23         * i386-tbl.h: Likewise.
  24
  25 2018-01-23  Igor Tsimbalist  <igor.v.tsimbalist@intel.com>
  26
  27         * i386-dis.c (enum): Add PREFIX_0F09.
  28         * i386-gen.c (cpu_flag_init): Add CPU_WBNOINVD_FLAGS.
  29         (cpu_flags): Add CpuWBNOINVD.
  30         * i386-opc.h (enum): Add CpuWBNOINVD.
  31         (i386_cpu_flags): Add cpuwbnoinvd.
  32         * i386-opc.tbl: Add WBNOINVD instruction.
  33         * i386-init.h: Regenerate.
  34         * i386-tbl.h: Likewise.
  35
  36 2018-01-17  Jim Wilson  <jimw@sifive.com>
  37
  38         * riscv-opc.c (riscv_opcodes) <addi>: Use z instead of 0.
  39
  40 2018-01-17  Igor Tsimbalist  <igor.v.tsimbalist@intel.com>
  41
  42         * i386-gen.c (cpu_flag_init): Delete CPU_CET_FLAGS, CpuCET.
  43         Add CPU_IBT_FLAGS, CPU_SHSTK_FLAGS, CPY_ANY_IBT_FLAGS,
  44         CPU_ANY_SHSTK_FLAGS, CpuIBT, CpuSHSTK.
  45         (cpu_flags): Add CpuIBT, CpuSHSTK.
  46         * i386-opc.h (enum): Add CpuIBT, CpuSHSTK.
  47         (i386_cpu_flags): Add cpuibt, cpushstk.
  48         * i386-opc.tbl: Change CpuCET to CpuSHSTK and CpuIBT.
  49         * i386-init.h: Regenerate.
  50         * i386-tbl.h: Likewise.
  51
  52 2018-01-16  Nick Clifton  <nickc@redhat.com>
  53
  54         * po/pt_BR.po: Updated Brazilian Portugese translation.
  55         * po/de.po: Updated German translation.
  56
  57 2018-01-15  Jim Wilson  <jimw@sifive.com>
  58
  59         * riscv-opc.c (match_c_nop): New.
  60         (riscv_opcodes) <addi>: Handle an addi that compresses to c.nop.
  61
  62 2018-01-15  Nick Clifton  <nickc@redhat.com>
  63
  64         * po/uk.po: Updated Ukranian translation.
  65
  66 2018-01-13  Nick Clifton  <nickc@redhat.com>
  67
  68         * po/opcodes.pot: Regenerated.
  69
  70 2018-01-13  Nick Clifton  <nickc@redhat.com>
  71
  72         * configure: Regenerate.
  73
  74 2018-01-13  Nick Clifton  <nickc@redhat.com>
  75
  76         2.30 branch created.
  77
  78 2018-01-11  Igor Tsimbalist  <igor.v.tsimbalist@intel.com>
  79
  80         * i386-opc.tbl: Remove VL variants for 4FMAPS and 4VNNIW insns.
  81         * i386-tbl.h: Regenerate.
  82
  83 2018-01-10  Jan Beulich  <jbeulich@suse.com>
  84
  85         * i386-opc.tbl (v4fmaddss, v4fnmaddss): Adjust Disp8MemShift.
  86         * i386-tbl.h: Re-generate.
  87
  88 2018-01-10  Jan Beulich  <jbeulich@suse.com>
  89
  90         * i386-opc.tbl (vpcmpeqb, vpcmpleb, vpcmpltb, vpcmpneqb,
  91         vpcmpnleb, vpcmpnltb, vpcmpequb, vpcmpleub, vpcmpltub,
  92         vpcmpnequb, vpcmpnleub, vpcmpnltub, vpcmpeqw, vpcmplew,
  93         vpcmpltw, vpcmpneqw, vpcmpnlew, vpcmpnltw, vpcmpequw, vpcmpleuw,
  94         vpcmpltuw, vpcmpnequw, vpcmpnleuw, vpcmpnltuw): Adjust
  95         Disp8MemShift of AVX512VL forms.
  96         * i386-tbl.h: Re-generate.
  97
  98 2018-01-09  Jim Wilson  <jimw@sifive.com>
  99
 100         * riscv-dis.c (maybe_print_address): If base_reg is zero,
 101         then the hi_addr value is zero.
 102
 103 2018-01-09  James Greenhalgh  <james.greenhalgh@arm.com>
 104
 105         * arm-dis.c (arm_opcodes): Add csdb.
 106         (thumb32_opcodes): Add csdb.
 107
 108 2018-01-09  James Greenhalgh  <james.greenhalgh@arm.com>
 109
 110         * aarch64-tbl.h (aarch64_opcode_table): Add "csdb".
 111         * aarch64-asm-2.c: Regenerate.
 112         * aarch64-dis-2.c: Regenerate.
 113         * aarch64-opc-2.c: Regenerate.
 114
 115 2018-01-08  H.J. Lu  <hongjiu.lu@intel.com>
 116
 117         PR gas/22681
 118         * i386-opc.tbl: Properly encode vmovd with Qword memeory operand.
 119         Remove AVX512 vmovd with 64-bit operands.
 120         * i386-tbl.h: Regenerated.
 121
 122 2018-01-05  Jim Wilson  <jimw@sifive.com>
 123
 124         * riscv-dis.c (print_insn_args) <'s'>: Call maybe_print_address for a
 125         jalr.
 126
 127 2018-01-03  Alan Modra  <amodra@gmail.com>
 128
 129         Update year range in copyright notice of all files.
 130
 131 2018-01-02  Jan Beulich  <jbeulich@suse.com>
 132
 133         * i386-gen.c (operand_type_init): Restore OPERAND_TYPE_REGYMM
 134         and OPERAND_TYPE_REGZMM entries.
 135
 136 For older changes see ChangeLog-2017
 137 \f
 138 Copyright (C) 2018 Free Software Foundation, Inc.
 139
 140 Copying and distribution of this file, with or without modification,
 141 are permitted in any medium without royalty provided the copyright
 142 notice and this notice are preserved.
 143
 144 Local Variables:
 145 mode: change-log
 146 left-margin: 8
 147 fill-column: 74
 148 version-control: never
 149 End: