]> git.ipfire.org Git - thirdparty/binutils-gdb.git/blob - opcodes/ChangeLog
Simplify VLE handling in print_insn_powerpc().
[thirdparty/binutils-gdb.git] / opcodes / ChangeLog
1 2018-05-07 Peter Bergner <bergner@vnet.ibm.com.com>
2
3 * ppc-dis.c (print_insn_powerpc) <insn_is_short>: Replace this...
4 <insn_length>: ...with this. Update usage.
5 Remove duplicate call to *info->memory_error_func.
6
7 2018-05-07 Igor Tsimbalist <igor.v.tsimbalist@intel.com>
8 H.J. Lu <hongjiu.lu@intel.com>
9
10 * i386-dis.c (Gva): New.
11 (enum): Add PREFIX_0F38F8, PREFIX_0F38F9,
12 MOD_0F38F8_PREFIX_2, MOD_0F38F9_PREFIX_0.
13 (prefix_table): New instructions (see prefix above).
14 (mod_table): New instructions (see prefix above).
15 (OP_G): Handle va_mode.
16 * i386-gen.c (cpu_flag_init): Add CPU_MOVDIRI_FLAGS,
17 CPU_MOVDIR64B_FLAGS.
18 (cpu_flags): Add CpuMOVDIRI and CpuMOVDIR64B.
19 * i386-opc.h (enum): Add CpuMOVDIRI, CpuMOVDIR64B.
20 (i386_cpu_flags): Add cpumovdiri and cpumovdir64b.
21 * i386-opc.tbl: Add movidir{i,64b}.
22 * i386-init.h: Regenerated.
23 * i386-tbl.h: Likewise.
24
25 2018-05-07 H.J. Lu <hongjiu.lu@intel.com>
26
27 * i386-gen.c (opcode_modifiers): Replace AddrPrefixOp0 with
28 AddrPrefixOpReg.
29 * i386-opc.h (AddrPrefixOp0): Renamed to ...
30 (AddrPrefixOpReg): This.
31 (i386_opcode_modifier): Rename addrprefixop0 to addrprefixopreg.
32 * i386-opc.tbl: Replace AddrPrefixOp0 with AddrPrefixOpReg.
33
34 2018-05-07 Peter Bergner <bergner@vnet.ibm.com.com>
35
36 * ppc-opc.c (powerpc_num_opcodes): Change type to unsigned.
37 (vle_num_opcodes): Likewise.
38 (spe2_num_opcodes): Likewise.
39 * ppc-dis.c (disassemble_init_powerpc) <powerpc_opcd_indices>: Rewrite
40 initialization loop.
41 (disassemble_init_powerpc) <vle_opcd_indices>: Likewise.
42 (disassemble_init_powerpc) <spe2_opcd_indices>: Likewise. Initialize
43 only once.
44
45 2018-05-01 Tamar Christina <tamar.christina@arm.com>
46
47 * aarch64-dis.c (aarch64_opcode_decode): Moved memory clear code.
48
49 2018-04-30 Francois H. Theron <francois.theron@netronome.com>
50
51 Makefile.am: Added nfp-dis.c.
52 configure.ac: Added bfd_nfp_arch.
53 disassemble.h: Added print_insn_nfp prototype.
54 disassemble.c: Added ARCH_nfp and call to print_insn_nfp
55 nfp-dis.c: New, for NFP support.
56 po/POTFILES.in: Added nfp-dis.c to the list.
57 Makefile.in: Regenerate.
58 configure: Regenerate.
59
60 2018-04-26 Jan Beulich <jbeulich@suse.com>
61
62 * i386-opc.tbl: Fold various non-memory operand AVX512VL
63 templates into their base ones.
64 * i386-tlb.h: Re-generate.
65
66 2018-04-26 Jan Beulich <jbeulich@suse.com>
67
68 * i386-gen.c (cpu_flag_init): Use CPU_XOP_FLAGS for
69 CPU_BDVER1_FLAGS. Use CPU_AVX2_FLAGS for CPU_ZNVER1_FLAGS. Use
70 CPU_AVX_FLAGS for CPU_BTVER1_FLAGS. Add CPU_XSAVE_FLAGS to
71 CPU_LWP_FLAGS, CPU_AVX_FLAGS, CPU_MPX_FLAGS, and CPU_OSPKE_FLAGS.
72 * i386-init.h: Re-generate.
73
74 2018-04-26 Jan Beulich <jbeulich@suse.com>
75
76 * i386-gen.c (cpu_flag_init): Drop all uses of CpuRegMMX,
77 CpuRegXMM, CpuRegYMM, CpuRegZMM, and CpuRegMask. Use
78 CPU_AVX2_FLAGS for CPU_AVX512F_FLAGS and drop bogus comment.
79 Don't use CPU_AVX2_FLAGS for CPU_AVX512VL_FLAGS and drop bogus
80 comment.
81 (cpu_flags): Drop CpuRegMMX, CpuRegXMM, CpuRegYMM, CpuRegZMM,
82 and CpuRegMask.
83 * i386-opc.h: CpuRegMMX, CpuRegXMM, CpuRegYMM, CpuRegZMM,
84 CpuRegMask: Delete.
85 (union i386_cpu_flags): Remove cpuregmmx, cpuregxmm, cpuregymm,
86 cpuregzmm, and cpuregmask.
87 * i386-init.h: Re-generate.
88 * i386-tbl.h: Re-generate.
89
90 2018-04-26 Jan Beulich <jbeulich@suse.com>
91
92 * i386-gen.c (cpu_flag_init): CPU_I586_FLAGS inherits Cpu387 only.
93 CPU_287_FLAGS is Cpu287 only. CPU_387_FLAGS is Cpu387 only.
94 * i386-init.h: Re-generate.
95
96 2018-04-26 Jan Beulich <jbeulich@suse.com>
97
98 * i386-gen.c (VexImmExt): Delete.
99 * i386-opc.h (VexImmExt, veximmext): Delete.
100 * i386-opc.tbl: Drop all VexImmExt uses.
101 * i386-tlb.h: Re-generate.
102
103 2018-04-25 Jan Beulich <jbeulich@suse.com>
104
105 * i386-opc.tbl (vpslld, vpsrad, vpsrld): Drop AVX512VL
106 register-only forms.
107 * i386-tlb.h: Re-generate.
108
109 2018-04-25 Tamar Christina <tamar.christina@arm.com>
110
111 * aarch64-tbl.h (sqrdmlah, sqrdmlsh): Fix masks.
112
113 2018-04-17 Igor Tsimbalist <igor.v.tsimbalist@intel.com>
114
115 * i386-dis.c: Add REG_0F1C_MOD_0, MOD_0F1C_PREFIX_0,
116 PREFIX_0F1C.
117 * i386-gen.c (cpu_flag_init): Add CPU_CLDEMOTE_FLAGS,
118 (cpu_flags): Add CpuCLDEMOTE.
119 * i386-init.h: Regenerate.
120 * i386-opc.h (enum): Add CpuCLDEMOTE,
121 (i386_cpu_flags): Add cpucldemote.
122 * i386-opc.tbl: Add cldemote.
123 * i386-tbl.h: Regenerate.
124
125 2018-04-16 Alan Modra <amodra@gmail.com>
126
127 * Makefile.am: Remove sh5 and sh64 support.
128 * configure.ac: Likewise.
129 * disassemble.c: Likewise.
130 * disassemble.h: Likewise.
131 * sh-dis.c: Likewise.
132 * sh64-dis.c: Delete.
133 * sh64-opc.c: Delete.
134 * sh64-opc.h: Delete.
135 * Makefile.in: Regenerate.
136 * configure: Regenerate.
137 * po/POTFILES.in: Regenerate.
138
139 2018-04-16 Alan Modra <amodra@gmail.com>
140
141 * Makefile.am: Remove w65 support.
142 * configure.ac: Likewise.
143 * disassemble.c: Likewise.
144 * disassemble.h: Likewise.
145 * w65-dis.c: Delete.
146 * w65-opc.h: Delete.
147 * Makefile.in: Regenerate.
148 * configure: Regenerate.
149 * po/POTFILES.in: Regenerate.
150
151 2018-04-16 Alan Modra <amodra@gmail.com>
152
153 * configure.ac: Remove we32k support.
154 * configure: Regenerate.
155
156 2018-04-16 Alan Modra <amodra@gmail.com>
157
158 * Makefile.am: Remove m88k support.
159 * configure.ac: Likewise.
160 * disassemble.c: Likewise.
161 * disassemble.h: Likewise.
162 * m88k-dis.c: Delete.
163 * Makefile.in: Regenerate.
164 * configure: Regenerate.
165 * po/POTFILES.in: Regenerate.
166
167 2018-04-16 Alan Modra <amodra@gmail.com>
168
169 * Makefile.am: Remove i370 support.
170 * configure.ac: Likewise.
171 * disassemble.c: Likewise.
172 * disassemble.h: Likewise.
173 * i370-dis.c: Delete.
174 * i370-opc.c: Delete.
175 * Makefile.in: Regenerate.
176 * configure: Regenerate.
177 * po/POTFILES.in: Regenerate.
178
179 2018-04-16 Alan Modra <amodra@gmail.com>
180
181 * Makefile.am: Remove h8500 support.
182 * configure.ac: Likewise.
183 * disassemble.c: Likewise.
184 * disassemble.h: Likewise.
185 * h8500-dis.c: Delete.
186 * h8500-opc.h: Delete.
187 * Makefile.in: Regenerate.
188 * configure: Regenerate.
189 * po/POTFILES.in: Regenerate.
190
191 2018-04-16 Alan Modra <amodra@gmail.com>
192
193 * configure.ac: Remove tahoe support.
194 * configure: Regenerate.
195
196 2018-04-15 H.J. Lu <hongjiu.lu@intel.com>
197
198 * i386-dis.c (prefix_table): Replace Em with Edq on tpause and
199 umwait.
200 * i386-opc.tbl: Allow 32-bit registers for tpause and umwait in
201 64-bit mode.
202 * i386-tbl.h: Regenerated.
203
204 2018-04-11 Igor Tsimbalist <igor.v.tsimbalist@intel.com>
205
206 * i386-dis.c (enum): Add PREFIX_MOD_0_0FAE_REG_6,
207 PREFIX_MOD_1_0FAE_REG_6.
208 (va_mode): New.
209 (OP_E_register): Use va_mode.
210 * i386-dis-evex.h (prefix_table):
211 New instructions (see prefixes above).
212 * i386-gen.c (cpu_flag_init): Add WAITPKG.
213 (cpu_flags): Likewise.
214 * i386-opc.h (enum): Likewise.
215 (i386_cpu_flags): Likewise.
216 * i386-opc.tbl: Add umonitor, umwait, tpause.
217 * i386-init.h: Regenerate.
218 * i386-tbl.h: Likewise.
219
220 2018-04-11 Alan Modra <amodra@gmail.com>
221
222 * opcodes/i860-dis.c: Delete.
223 * opcodes/i960-dis.c: Delete.
224 * Makefile.am: Remove i860 and i960 support.
225 * configure.ac: Likewise.
226 * disassemble.c: Likewise.
227 * disassemble.h: Likewise.
228 * Makefile.in: Regenerate.
229 * configure: Regenerate.
230 * po/POTFILES.in: Regenerate.
231
232 2018-04-04 H.J. Lu <hongjiu.lu@intel.com>
233
234 PR binutils/23025
235 * i386-dis.c (get_valid_dis386): Don't set vex.prefix nor vex.w
236 to 0.
237 (print_insn): Clear vex instead of vex.evex.
238
239 2018-04-04 Nick Clifton <nickc@redhat.com>
240
241 * po/es.po: Updated Spanish translation.
242
243 2018-03-28 Jan Beulich <jbeulich@suse.com>
244
245 * i386-gen.c (opcode_modifiers): Delete VecESize.
246 * i386-opc.h (VecESize): Delete.
247 (struct i386_opcode_modifier): Delete vecesize.
248 * i386-opc.tbl: Drop VecESize.
249 * i386-tlb.h: Re-generate.
250
251 2018-03-28 Jan Beulich <jbeulich@suse.com>
252
253 * i386-opc.h (NO_BROADCAST, BROADCAST_1TO16, BROADCAST_1TO8,
254 BROADCAST_1TO4, BROADCAST_1TO2): Delete.
255 (struct i386_opcode_modifier): Shrink broadcast field to 1 bit.
256 * i386-opc.tbl: Replace Broadcast=<N> by Broadcast.
257 * i386-tlb.h: Re-generate.
258
259 2018-03-28 Jan Beulich <jbeulich@suse.com>
260
261 * i386-opc.tbl (vcvt*d2si, vcvt*d2usi, vcvt*s2si, vcvt*s2usi):
262 Fold AVX512 forms
263 * i386-tlb.h: Re-generate.
264
265 2018-03-28 Jan Beulich <jbeulich@suse.com>
266
267 * i386-dis.c (prefix_table): Drop Y for cvt*2si.
268 (vex_len_table): Drop Y for vcvt*2si.
269 (putop): Replace plain 'Y' handling by abort().
270
271 2018-03-28 Nick Clifton <nickc@redhat.com>
272
273 PR 22988
274 * aarch64-tbl.h (aarch64_opcode_table): Add entries for LDFF1xx
275 instructions with only a base address register.
276 * aarch64-opc.c (operand_general_constraint_met_p): Add code to
277 handle AARHC64_OPND_SVE_ADDR_R.
278 (aarch64_print_operand): Likewise.
279 * aarch64-asm-2.c: Regenerate.
280 * aarch64_dis-2.c: Regenerate.
281 * aarch64-opc-2.c: Regenerate.
282
283 2018-03-22 Jan Beulich <jbeulich@suse.com>
284
285 * i386-opc.tbl: Drop VecESize from register only insn forms and
286 memory forms not allowing broadcast.
287 * i386-tlb.h: Re-generate.
288
289 2018-03-22 Jan Beulich <jbeulich@suse.com>
290
291 * i386-opc.tbl (vfrczs*, vphadd*, vphsub*, vpmacs*, vpmadcs*,
292 vprot*, vpsha*, vpshl*, bextr, blc*, bls*, t1mskc, tzmsk, sha1*,
293 sha256*): Drop Disp<N>.
294
295 2018-03-22 Jan Beulich <jbeulich@suse.com>
296
297 * i386-dis.c (EbndS, bnd_swap_mode): New.
298 (prefix_table): Use EbndS.
299 (OP_E_register, OP_E_memory): Also handle bnd_swap_mode.
300 * i386-opc.tbl (bndmov): Move misplaced Load.
301 * i386-tlb.h: Re-generate.
302
303 2018-03-22 Jan Beulich <jbeulich@suse.com>
304
305 * i386-opc.tbl (vcvtdq2pd, vcvtps2pd, vcvtudq2pd): Use separate
306 templates allowing memory operands and folded ones for register
307 only flavors.
308 * i386-tlb.h: Re-generate.
309
310 2018-03-22 Jan Beulich <jbeulich@suse.com>
311
312 * i386-opc.tbl (vfrczp*, vpcmov, vpermil2p*): Fold 128- and
313 256-bit templates. Drop redundant leftover Disp<N>.
314 * i386-tlb.h: Re-generate.
315
316 2018-03-14 Kito Cheng <kito.cheng@gmail.com>
317
318 * riscv-opc.c (riscv_insn_types): New.
319
320 2018-03-13 Nick Clifton <nickc@redhat.com>
321
322 * po/pt_BR.po: Updated Brazilian Portuguese translation.
323
324 2018-03-08 H.J. Lu <hongjiu.lu@intel.com>
325
326 * i386-opc.tbl: Add Optimize to clr.
327 * i386-tbl.h: Regenerated.
328
329 2018-03-08 H.J. Lu <hongjiu.lu@intel.com>
330
331 * i386-gen.c (opcode_modifiers): Remove OldGcc.
332 * i386-opc.h (OldGcc): Removed.
333 (i386_opcode_modifier): Remove oldgcc.
334 * i386-opc.tbl: Remove fsubp, fsubrp, fdivp and fdivrp
335 instructions for old (<= 2.8.1) versions of gcc.
336 * i386-tbl.h: Regenerated.
337
338 2018-03-08 Jan Beulich <jbeulich@suse.com>
339
340 * i386-opc.h (EVEXDYN): New.
341 * i386-opc.tbl: Fold various AVX512VL templates.
342 * i386-tlb.h: Re-generate.
343
344 2018-03-08 Jan Beulich <jbeulich@suse.com>
345
346 * i386-opc.tbl (vexpandpd, vexpandps, vmovapd, vmovaps,
347 vmovdqa32, vmovdqa64, vmovdqu32, vmovdqu64, vmovupd, vmovups,
348 vpexpandd, vpexpandq): Fold AFX512VF templates.
349 * i386-tlb.h: Re-generate.
350
351 2018-03-08 Jan Beulich <jbeulich@suse.com>
352
353 * i386-opc.tbl (vgf2p8affineinvqb, vgf2p8affineqb, vgf2p8mulb):
354 Fold 128- and 256-bit VEX-encoded templates.
355 * i386-tlb.h: Re-generate.
356
357 2018-03-08 Jan Beulich <jbeulich@suse.com>
358
359 * i386-opc.tbl (vexpandpd, vexpandps, vmovapd, vmovaps,
360 vmovdqa32, vmovdqa64, vmovdqu32, vmovdqu64, vmovupd, vmovups,
361 vpexpandd, vpexpandq): Fold AVX512F templates.
362 * i386-tlb.h: Re-generate.
363
364 2018-03-08 Jan Beulich <jbeulich@suse.com>
365
366 * i386-opc.tbl (llwpcb, slwpcb, lwpval, lwpins): Fold 32- and
367 64-bit templates. Drop Disp<N>.
368 * i386-tlb.h: Re-generate.
369
370 2018-03-08 Jan Beulich <jbeulich@suse.com>
371
372 * i386-opc.tbl (vfmadd*, vfmsub*, vfnmadd*, vfnmsub*): Fold 128-
373 and 256-bit templates.
374 * i386-tlb.h: Re-generate.
375
376 2018-03-08 Jan Beulich <jbeulich@suse.com>
377
378 * i386-opc.tbl (cmpxchg8b): Add NoRex64.
379 * i386-tlb.h: Re-generate.
380
381 2018-03-08 Jan Beulich <jbeulich@suse.com>
382
383 * i386-opc.tbl (cmpxchg16b, fisttp, fisttpll, bndmov, mwaitx):
384 Drop NoAVX.
385 * i386-tlb.h: Re-generate.
386
387 2018-03-08 Jan Beulich <jbeulich@suse.com>
388
389 * i386-opc.tbl (ldmxcsr, stmxcsr): Add NoAVX.
390 * i386-tlb.h: Re-generate.
391
392 2018-03-08 Jan Beulich <jbeulich@suse.com>
393
394 * i386-gen.c (opcode_modifiers): Delete FloatD.
395 * i386-opc.h (FloatD): Delete.
396 (struct i386_opcode_modifier): Delete floatd.
397 * i386-opc.tbl (fadd, fsub, fsubr, fmul, fdiv, fdivr): Replace
398 FloatD by D.
399 * i386-tlb.h: Re-generate.
400
401 2018-03-08 Jan Beulich <jbeulich@suse.com>
402
403 * i386-dis.c (float_reg): Adjust DC and DE fsub*/fdiv* patterns.
404
405 2018-03-08 Jan Beulich <jbeulich@suse.com>
406
407 * i386-opc.tbl (vmovd): Disallow Qword memory operands.
408 * i386-tlb.h: Re-generate.
409
410 2018-03-08 Jan Beulich <jbeulich@suse.com>
411
412 * i386-opc.tbl (vcvtpd2ps): Fold AVX 128- and 256-bit memory
413 forms.
414 * i386-tlb.h: Re-generate.
415
416 2018-03-07 Alan Modra <amodra@gmail.com>
417
418 * disassemble.c (disassembler): Use bfd_arch_powerpc entry for
419 bfd_arch_rs6000.
420 * disassemble.h (print_insn_rs6000): Delete.
421 * ppc-dis.c (powerpc_init_dialect): Handle rs6000.
422 (disassemble_init_powerpc): Call powerpc_init_dialect for rs6000.
423 (print_insn_rs6000): Delete.
424
425 2018-03-03 Alan Modra <amodra@gmail.com>
426
427 * sysdep.h (opcodes_error_handler): Define.
428 (_bfd_error_handler): Declare.
429 * Makefile.am: Remove stray #.
430 * opc2c.c (main): Remove bogus -l arg handling. Print "DO NOT
431 EDIT" comment.
432 * aarch64-dis.c, * arc-dis.c, * arm-dis.c, * avr-dis.c,
433 * d30v-dis.c, * h8300-dis.c, * mmix-dis.c, * ppc-dis.c,
434 * riscv-dis.c, * s390-dis.c, * sparc-dis.c, * v850-dis.c: Use
435 opcodes_error_handler to print errors. Standardize error messages.
436 * msp430-decode.opc, * nios2-dis.c, * rl78-decode.opc: Likewise,
437 and include opintl.h.
438 * nds32-asm.c: Likewise, and include sysdep.h and opintl.h.
439 * i386-gen.c: Standardize error messages.
440 * msp430-decode.c, * rl78-decode.c, rx-decode.c: Regenerate.
441 * Makefile.in: Regenerate.
442 * epiphany-asm.c, * epiphany-desc.c, * epiphany-dis.c,
443 * epiphany-ibld.c, * fr30-asm.c, * fr30-desc.c, * fr30-dis.c,
444 * fr30-ibld.c, * frv-asm.c, * frv-desc.c, * frv-dis.c, * frv-ibld.c,
445 * frv-opc.c, * ip2k-asm.c, * ip2k-desc.c, * ip2k-dis.c, * ip2k-ibld.c,
446 * iq2000-asm.c, * iq2000-desc.c, * iq2000-dis.c, * iq2000-ibld.c,
447 * lm32-asm.c, * lm32-desc.c, * lm32-dis.c, * lm32-ibld.c,
448 * m32c-asm.c, * m32c-desc.c, * m32c-dis.c, * m32c-ibld.c,
449 * m32r-asm.c, * m32r-desc.c, * m32r-dis.c, * m32r-ibld.c,
450 * mep-asm.c, * mep-desc.c, * mep-dis.c, * mep-ibld.c, * mt-asm.c,
451 * mt-desc.c, * mt-dis.c, * mt-ibld.c, * or1k-asm.c, * or1k-desc.c,
452 * or1k-dis.c, * or1k-ibld.c, * xc16x-asm.c, * xc16x-desc.c,
453 * xc16x-dis.c, * xc16x-ibld.c, * xstormy16-asm.c, * xstormy16-desc.c,
454 * xstormy16-dis.c, * xstormy16-ibld.c: Regenerate.
455
456 2018-03-01 H.J. Lu <hongjiu.lu@intel.com>
457
458 * * i386-opc.tbl: Add "Optimize" to AVX256 and AVX512
459 vpsub[bwdq] instructions.
460 * i386-tbl.h: Regenerated.
461
462 2018-03-01 Alan Modra <amodra@gmail.com>
463
464 * configure.ac (ALL_LINGUAS): Sort.
465 * configure: Regenerate.
466
467 2018-02-27 Thomas Preud'homme <thomas.preudhomme@arm.com>
468
469 * arm-dis.c (print_insn_coprocessor): Replace uses of ARM_FEATURE_COPY
470 macro by assignements.
471
472 2018-02-27 H.J. Lu <hongjiu.lu@intel.com>
473
474 PR gas/22871
475 * i386-gen.c (opcode_modifiers): Add Optimize.
476 * i386-opc.h (Optimize): New enum.
477 (i386_opcode_modifier): Add optimize.
478 * i386-opc.tbl: Add "Optimize" to "mov $imm, reg",
479 "sub reg, reg/mem", "test $imm, acc", "test $imm, reg/mem",
480 "and $imm, acc", "and $imm, reg/mem", "xor reg, reg/mem",
481 "movq $imm, reg" and AVX256 and AVX512 versions of vandnps,
482 vandnpd, vpandn, vpandnd, vpandnq, vxorps, vxorpd, vpxor,
483 vpxord and vpxorq.
484 * i386-tbl.h: Regenerated.
485
486 2018-02-26 Alan Modra <amodra@gmail.com>
487
488 * crx-dis.c (getregliststring): Allocate a large enough buffer
489 to silence false positive gcc8 warning.
490
491 2018-02-22 Shea Levy <shea@shealevy.com>
492
493 * disassemble.c (ARCH_riscv): Define if ARCH_all.
494
495 2018-02-22 H.J. Lu <hongjiu.lu@intel.com>
496
497 * i386-opc.tbl: Add {rex},
498 * i386-tbl.h: Regenerated.
499
500 2018-02-20 Maciej W. Rozycki <macro@mips.com>
501
502 * mips16-opc.c (decode_mips16_operand) <'M'>: Remove case.
503 (mips16_opcodes): Replace `M' with `m' for "restore".
504
505 2018-02-19 Thomas Preud'homme <thomas.preudhomme@arm.com>
506
507 * arm-dis.c (thumb_opcodes): Fix BXNS mask.
508
509 2018-02-13 Maciej W. Rozycki <macro@mips.com>
510
511 * wasm32-dis.c (print_insn_wasm32): Rename `index' local
512 variable to `function_index'.
513
514 2018-02-13 Nick Clifton <nickc@redhat.com>
515
516 PR 22823
517 * metag-dis.c (print_fmmov): Double buffer size to avoid warning
518 about truncation of printing.
519
520 2018-02-12 Henry Wong <henry@stuffedcow.net>
521
522 * mips-opc.c (mips_builtin_opcodes): Correct "sigrie" encoding.
523
524 2018-02-05 Nick Clifton <nickc@redhat.com>
525
526 * po/pt_BR.po: Updated Brazilian Portuguese translation.
527
528 2018-01-23 Igor Tsimbalist <igor.v.tsimbalist@intel.com>
529
530 * i386-dis.c (enum): Add pconfig.
531 * i386-gen.c (cpu_flag_init): Add CPU_PCONFIG_FLAGS.
532 (cpu_flags): Add CpuPCONFIG.
533 * i386-opc.h (enum): Add CpuPCONFIG.
534 (i386_cpu_flags): Add cpupconfig.
535 * i386-opc.tbl: Add PCONFIG instruction.
536 * i386-init.h: Regenerate.
537 * i386-tbl.h: Likewise.
538
539 2018-01-23 Igor Tsimbalist <igor.v.tsimbalist@intel.com>
540
541 * i386-dis.c (enum): Add PREFIX_0F09.
542 * i386-gen.c (cpu_flag_init): Add CPU_WBNOINVD_FLAGS.
543 (cpu_flags): Add CpuWBNOINVD.
544 * i386-opc.h (enum): Add CpuWBNOINVD.
545 (i386_cpu_flags): Add cpuwbnoinvd.
546 * i386-opc.tbl: Add WBNOINVD instruction.
547 * i386-init.h: Regenerate.
548 * i386-tbl.h: Likewise.
549
550 2018-01-17 Jim Wilson <jimw@sifive.com>
551
552 * riscv-opc.c (riscv_opcodes) <addi>: Use z instead of 0.
553
554 2018-01-17 Igor Tsimbalist <igor.v.tsimbalist@intel.com>
555
556 * i386-gen.c (cpu_flag_init): Delete CPU_CET_FLAGS, CpuCET.
557 Add CPU_IBT_FLAGS, CPU_SHSTK_FLAGS, CPY_ANY_IBT_FLAGS,
558 CPU_ANY_SHSTK_FLAGS, CpuIBT, CpuSHSTK.
559 (cpu_flags): Add CpuIBT, CpuSHSTK.
560 * i386-opc.h (enum): Add CpuIBT, CpuSHSTK.
561 (i386_cpu_flags): Add cpuibt, cpushstk.
562 * i386-opc.tbl: Change CpuCET to CpuSHSTK and CpuIBT.
563 * i386-init.h: Regenerate.
564 * i386-tbl.h: Likewise.
565
566 2018-01-16 Nick Clifton <nickc@redhat.com>
567
568 * po/pt_BR.po: Updated Brazilian Portugese translation.
569 * po/de.po: Updated German translation.
570
571 2018-01-15 Jim Wilson <jimw@sifive.com>
572
573 * riscv-opc.c (match_c_nop): New.
574 (riscv_opcodes) <addi>: Handle an addi that compresses to c.nop.
575
576 2018-01-15 Nick Clifton <nickc@redhat.com>
577
578 * po/uk.po: Updated Ukranian translation.
579
580 2018-01-13 Nick Clifton <nickc@redhat.com>
581
582 * po/opcodes.pot: Regenerated.
583
584 2018-01-13 Nick Clifton <nickc@redhat.com>
585
586 * configure: Regenerate.
587
588 2018-01-13 Nick Clifton <nickc@redhat.com>
589
590 2.30 branch created.
591
592 2018-01-11 Igor Tsimbalist <igor.v.tsimbalist@intel.com>
593
594 * i386-opc.tbl: Remove VL variants for 4FMAPS and 4VNNIW insns.
595 * i386-tbl.h: Regenerate.
596
597 2018-01-10 Jan Beulich <jbeulich@suse.com>
598
599 * i386-opc.tbl (v4fmaddss, v4fnmaddss): Adjust Disp8MemShift.
600 * i386-tbl.h: Re-generate.
601
602 2018-01-10 Jan Beulich <jbeulich@suse.com>
603
604 * i386-opc.tbl (vpcmpeqb, vpcmpleb, vpcmpltb, vpcmpneqb,
605 vpcmpnleb, vpcmpnltb, vpcmpequb, vpcmpleub, vpcmpltub,
606 vpcmpnequb, vpcmpnleub, vpcmpnltub, vpcmpeqw, vpcmplew,
607 vpcmpltw, vpcmpneqw, vpcmpnlew, vpcmpnltw, vpcmpequw, vpcmpleuw,
608 vpcmpltuw, vpcmpnequw, vpcmpnleuw, vpcmpnltuw): Adjust
609 Disp8MemShift of AVX512VL forms.
610 * i386-tbl.h: Re-generate.
611
612 2018-01-09 Jim Wilson <jimw@sifive.com>
613
614 * riscv-dis.c (maybe_print_address): If base_reg is zero,
615 then the hi_addr value is zero.
616
617 2018-01-09 James Greenhalgh <james.greenhalgh@arm.com>
618
619 * arm-dis.c (arm_opcodes): Add csdb.
620 (thumb32_opcodes): Add csdb.
621
622 2018-01-09 James Greenhalgh <james.greenhalgh@arm.com>
623
624 * aarch64-tbl.h (aarch64_opcode_table): Add "csdb".
625 * aarch64-asm-2.c: Regenerate.
626 * aarch64-dis-2.c: Regenerate.
627 * aarch64-opc-2.c: Regenerate.
628
629 2018-01-08 H.J. Lu <hongjiu.lu@intel.com>
630
631 PR gas/22681
632 * i386-opc.tbl: Properly encode vmovd with Qword memeory operand.
633 Remove AVX512 vmovd with 64-bit operands.
634 * i386-tbl.h: Regenerated.
635
636 2018-01-05 Jim Wilson <jimw@sifive.com>
637
638 * riscv-dis.c (print_insn_args) <'s'>: Call maybe_print_address for a
639 jalr.
640
641 2018-01-03 Alan Modra <amodra@gmail.com>
642
643 Update year range in copyright notice of all files.
644
645 2018-01-02 Jan Beulich <jbeulich@suse.com>
646
647 * i386-gen.c (operand_type_init): Restore OPERAND_TYPE_REGYMM
648 and OPERAND_TYPE_REGZMM entries.
649
650 For older changes see ChangeLog-2017
651 \f
652 Copyright (C) 2018 Free Software Foundation, Inc.
653
654 Copying and distribution of this file, with or without modification,
655 are permitted in any medium without royalty provided the copyright
656 notice and this notice are preserved.
657
658 Local Variables:
659 mode: change-log
660 left-margin: 8
661 fill-column: 74
662 version-control: never
663 End: