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Enable Intel MOVDIRI, MOVDIR64B instructions
[thirdparty/binutils-gdb.git] / opcodes / ChangeLog
1 2018-05-07 Igor Tsimbalist <igor.v.tsimbalist@intel.com>
2 H.J. Lu <hongjiu.lu@intel.com>
3
4 * i386-dis.c (Gva): New.
5 (enum): Add PREFIX_0F38F8, PREFIX_0F38F9,
6 MOD_0F38F8_PREFIX_2, MOD_0F38F9_PREFIX_0.
7 (prefix_table): New instructions (see prefix above).
8 (mod_table): New instructions (see prefix above).
9 (OP_G): Handle va_mode.
10 * i386-gen.c (cpu_flag_init): Add CPU_MOVDIRI_FLAGS,
11 CPU_MOVDIR64B_FLAGS.
12 (cpu_flags): Add CpuMOVDIRI and CpuMOVDIR64B.
13 * i386-opc.h (enum): Add CpuMOVDIRI, CpuMOVDIR64B.
14 (i386_cpu_flags): Add cpumovdiri and cpumovdir64b.
15 * i386-opc.tbl: Add movidir{i,64b}.
16 * i386-init.h: Regenerated.
17 * i386-tbl.h: Likewise.
18
19 2018-05-07 H.J. Lu <hongjiu.lu@intel.com>
20
21 * i386-gen.c (opcode_modifiers): Replace AddrPrefixOp0 with
22 AddrPrefixOpReg.
23 * i386-opc.h (AddrPrefixOp0): Renamed to ...
24 (AddrPrefixOpReg): This.
25 (i386_opcode_modifier): Rename addrprefixop0 to addrprefixopreg.
26 * i386-opc.tbl: Replace AddrPrefixOp0 with AddrPrefixOpReg.
27
28 2018-05-07 Peter Bergner <bergner@vnet.ibm.com.com>
29
30 * ppc-opc.c (powerpc_num_opcodes): Change type to unsigned.
31 (vle_num_opcodes): Likewise.
32 (spe2_num_opcodes): Likewise.
33 * ppc-dis.c (disassemble_init_powerpc) <powerpc_opcd_indices>: Rewrite
34 initialization loop.
35 (disassemble_init_powerpc) <vle_opcd_indices>: Likewise.
36 (disassemble_init_powerpc) <spe2_opcd_indices>: Likewise. Initialize
37 only once.
38
39 2018-05-01 Tamar Christina <tamar.christina@arm.com>
40
41 * aarch64-dis.c (aarch64_opcode_decode): Moved memory clear code.
42
43 2018-04-30 Francois H. Theron <francois.theron@netronome.com>
44
45 Makefile.am: Added nfp-dis.c.
46 configure.ac: Added bfd_nfp_arch.
47 disassemble.h: Added print_insn_nfp prototype.
48 disassemble.c: Added ARCH_nfp and call to print_insn_nfp
49 nfp-dis.c: New, for NFP support.
50 po/POTFILES.in: Added nfp-dis.c to the list.
51 Makefile.in: Regenerate.
52 configure: Regenerate.
53
54 2018-04-26 Jan Beulich <jbeulich@suse.com>
55
56 * i386-opc.tbl: Fold various non-memory operand AVX512VL
57 templates into their base ones.
58 * i386-tlb.h: Re-generate.
59
60 2018-04-26 Jan Beulich <jbeulich@suse.com>
61
62 * i386-gen.c (cpu_flag_init): Use CPU_XOP_FLAGS for
63 CPU_BDVER1_FLAGS. Use CPU_AVX2_FLAGS for CPU_ZNVER1_FLAGS. Use
64 CPU_AVX_FLAGS for CPU_BTVER1_FLAGS. Add CPU_XSAVE_FLAGS to
65 CPU_LWP_FLAGS, CPU_AVX_FLAGS, CPU_MPX_FLAGS, and CPU_OSPKE_FLAGS.
66 * i386-init.h: Re-generate.
67
68 2018-04-26 Jan Beulich <jbeulich@suse.com>
69
70 * i386-gen.c (cpu_flag_init): Drop all uses of CpuRegMMX,
71 CpuRegXMM, CpuRegYMM, CpuRegZMM, and CpuRegMask. Use
72 CPU_AVX2_FLAGS for CPU_AVX512F_FLAGS and drop bogus comment.
73 Don't use CPU_AVX2_FLAGS for CPU_AVX512VL_FLAGS and drop bogus
74 comment.
75 (cpu_flags): Drop CpuRegMMX, CpuRegXMM, CpuRegYMM, CpuRegZMM,
76 and CpuRegMask.
77 * i386-opc.h: CpuRegMMX, CpuRegXMM, CpuRegYMM, CpuRegZMM,
78 CpuRegMask: Delete.
79 (union i386_cpu_flags): Remove cpuregmmx, cpuregxmm, cpuregymm,
80 cpuregzmm, and cpuregmask.
81 * i386-init.h: Re-generate.
82 * i386-tbl.h: Re-generate.
83
84 2018-04-26 Jan Beulich <jbeulich@suse.com>
85
86 * i386-gen.c (cpu_flag_init): CPU_I586_FLAGS inherits Cpu387 only.
87 CPU_287_FLAGS is Cpu287 only. CPU_387_FLAGS is Cpu387 only.
88 * i386-init.h: Re-generate.
89
90 2018-04-26 Jan Beulich <jbeulich@suse.com>
91
92 * i386-gen.c (VexImmExt): Delete.
93 * i386-opc.h (VexImmExt, veximmext): Delete.
94 * i386-opc.tbl: Drop all VexImmExt uses.
95 * i386-tlb.h: Re-generate.
96
97 2018-04-25 Jan Beulich <jbeulich@suse.com>
98
99 * i386-opc.tbl (vpslld, vpsrad, vpsrld): Drop AVX512VL
100 register-only forms.
101 * i386-tlb.h: Re-generate.
102
103 2018-04-25 Tamar Christina <tamar.christina@arm.com>
104
105 * aarch64-tbl.h (sqrdmlah, sqrdmlsh): Fix masks.
106
107 2018-04-17 Igor Tsimbalist <igor.v.tsimbalist@intel.com>
108
109 * i386-dis.c: Add REG_0F1C_MOD_0, MOD_0F1C_PREFIX_0,
110 PREFIX_0F1C.
111 * i386-gen.c (cpu_flag_init): Add CPU_CLDEMOTE_FLAGS,
112 (cpu_flags): Add CpuCLDEMOTE.
113 * i386-init.h: Regenerate.
114 * i386-opc.h (enum): Add CpuCLDEMOTE,
115 (i386_cpu_flags): Add cpucldemote.
116 * i386-opc.tbl: Add cldemote.
117 * i386-tbl.h: Regenerate.
118
119 2018-04-16 Alan Modra <amodra@gmail.com>
120
121 * Makefile.am: Remove sh5 and sh64 support.
122 * configure.ac: Likewise.
123 * disassemble.c: Likewise.
124 * disassemble.h: Likewise.
125 * sh-dis.c: Likewise.
126 * sh64-dis.c: Delete.
127 * sh64-opc.c: Delete.
128 * sh64-opc.h: Delete.
129 * Makefile.in: Regenerate.
130 * configure: Regenerate.
131 * po/POTFILES.in: Regenerate.
132
133 2018-04-16 Alan Modra <amodra@gmail.com>
134
135 * Makefile.am: Remove w65 support.
136 * configure.ac: Likewise.
137 * disassemble.c: Likewise.
138 * disassemble.h: Likewise.
139 * w65-dis.c: Delete.
140 * w65-opc.h: Delete.
141 * Makefile.in: Regenerate.
142 * configure: Regenerate.
143 * po/POTFILES.in: Regenerate.
144
145 2018-04-16 Alan Modra <amodra@gmail.com>
146
147 * configure.ac: Remove we32k support.
148 * configure: Regenerate.
149
150 2018-04-16 Alan Modra <amodra@gmail.com>
151
152 * Makefile.am: Remove m88k support.
153 * configure.ac: Likewise.
154 * disassemble.c: Likewise.
155 * disassemble.h: Likewise.
156 * m88k-dis.c: Delete.
157 * Makefile.in: Regenerate.
158 * configure: Regenerate.
159 * po/POTFILES.in: Regenerate.
160
161 2018-04-16 Alan Modra <amodra@gmail.com>
162
163 * Makefile.am: Remove i370 support.
164 * configure.ac: Likewise.
165 * disassemble.c: Likewise.
166 * disassemble.h: Likewise.
167 * i370-dis.c: Delete.
168 * i370-opc.c: Delete.
169 * Makefile.in: Regenerate.
170 * configure: Regenerate.
171 * po/POTFILES.in: Regenerate.
172
173 2018-04-16 Alan Modra <amodra@gmail.com>
174
175 * Makefile.am: Remove h8500 support.
176 * configure.ac: Likewise.
177 * disassemble.c: Likewise.
178 * disassemble.h: Likewise.
179 * h8500-dis.c: Delete.
180 * h8500-opc.h: Delete.
181 * Makefile.in: Regenerate.
182 * configure: Regenerate.
183 * po/POTFILES.in: Regenerate.
184
185 2018-04-16 Alan Modra <amodra@gmail.com>
186
187 * configure.ac: Remove tahoe support.
188 * configure: Regenerate.
189
190 2018-04-15 H.J. Lu <hongjiu.lu@intel.com>
191
192 * i386-dis.c (prefix_table): Replace Em with Edq on tpause and
193 umwait.
194 * i386-opc.tbl: Allow 32-bit registers for tpause and umwait in
195 64-bit mode.
196 * i386-tbl.h: Regenerated.
197
198 2018-04-11 Igor Tsimbalist <igor.v.tsimbalist@intel.com>
199
200 * i386-dis.c (enum): Add PREFIX_MOD_0_0FAE_REG_6,
201 PREFIX_MOD_1_0FAE_REG_6.
202 (va_mode): New.
203 (OP_E_register): Use va_mode.
204 * i386-dis-evex.h (prefix_table):
205 New instructions (see prefixes above).
206 * i386-gen.c (cpu_flag_init): Add WAITPKG.
207 (cpu_flags): Likewise.
208 * i386-opc.h (enum): Likewise.
209 (i386_cpu_flags): Likewise.
210 * i386-opc.tbl: Add umonitor, umwait, tpause.
211 * i386-init.h: Regenerate.
212 * i386-tbl.h: Likewise.
213
214 2018-04-11 Alan Modra <amodra@gmail.com>
215
216 * opcodes/i860-dis.c: Delete.
217 * opcodes/i960-dis.c: Delete.
218 * Makefile.am: Remove i860 and i960 support.
219 * configure.ac: Likewise.
220 * disassemble.c: Likewise.
221 * disassemble.h: Likewise.
222 * Makefile.in: Regenerate.
223 * configure: Regenerate.
224 * po/POTFILES.in: Regenerate.
225
226 2018-04-04 H.J. Lu <hongjiu.lu@intel.com>
227
228 PR binutils/23025
229 * i386-dis.c (get_valid_dis386): Don't set vex.prefix nor vex.w
230 to 0.
231 (print_insn): Clear vex instead of vex.evex.
232
233 2018-04-04 Nick Clifton <nickc@redhat.com>
234
235 * po/es.po: Updated Spanish translation.
236
237 2018-03-28 Jan Beulich <jbeulich@suse.com>
238
239 * i386-gen.c (opcode_modifiers): Delete VecESize.
240 * i386-opc.h (VecESize): Delete.
241 (struct i386_opcode_modifier): Delete vecesize.
242 * i386-opc.tbl: Drop VecESize.
243 * i386-tlb.h: Re-generate.
244
245 2018-03-28 Jan Beulich <jbeulich@suse.com>
246
247 * i386-opc.h (NO_BROADCAST, BROADCAST_1TO16, BROADCAST_1TO8,
248 BROADCAST_1TO4, BROADCAST_1TO2): Delete.
249 (struct i386_opcode_modifier): Shrink broadcast field to 1 bit.
250 * i386-opc.tbl: Replace Broadcast=<N> by Broadcast.
251 * i386-tlb.h: Re-generate.
252
253 2018-03-28 Jan Beulich <jbeulich@suse.com>
254
255 * i386-opc.tbl (vcvt*d2si, vcvt*d2usi, vcvt*s2si, vcvt*s2usi):
256 Fold AVX512 forms
257 * i386-tlb.h: Re-generate.
258
259 2018-03-28 Jan Beulich <jbeulich@suse.com>
260
261 * i386-dis.c (prefix_table): Drop Y for cvt*2si.
262 (vex_len_table): Drop Y for vcvt*2si.
263 (putop): Replace plain 'Y' handling by abort().
264
265 2018-03-28 Nick Clifton <nickc@redhat.com>
266
267 PR 22988
268 * aarch64-tbl.h (aarch64_opcode_table): Add entries for LDFF1xx
269 instructions with only a base address register.
270 * aarch64-opc.c (operand_general_constraint_met_p): Add code to
271 handle AARHC64_OPND_SVE_ADDR_R.
272 (aarch64_print_operand): Likewise.
273 * aarch64-asm-2.c: Regenerate.
274 * aarch64_dis-2.c: Regenerate.
275 * aarch64-opc-2.c: Regenerate.
276
277 2018-03-22 Jan Beulich <jbeulich@suse.com>
278
279 * i386-opc.tbl: Drop VecESize from register only insn forms and
280 memory forms not allowing broadcast.
281 * i386-tlb.h: Re-generate.
282
283 2018-03-22 Jan Beulich <jbeulich@suse.com>
284
285 * i386-opc.tbl (vfrczs*, vphadd*, vphsub*, vpmacs*, vpmadcs*,
286 vprot*, vpsha*, vpshl*, bextr, blc*, bls*, t1mskc, tzmsk, sha1*,
287 sha256*): Drop Disp<N>.
288
289 2018-03-22 Jan Beulich <jbeulich@suse.com>
290
291 * i386-dis.c (EbndS, bnd_swap_mode): New.
292 (prefix_table): Use EbndS.
293 (OP_E_register, OP_E_memory): Also handle bnd_swap_mode.
294 * i386-opc.tbl (bndmov): Move misplaced Load.
295 * i386-tlb.h: Re-generate.
296
297 2018-03-22 Jan Beulich <jbeulich@suse.com>
298
299 * i386-opc.tbl (vcvtdq2pd, vcvtps2pd, vcvtudq2pd): Use separate
300 templates allowing memory operands and folded ones for register
301 only flavors.
302 * i386-tlb.h: Re-generate.
303
304 2018-03-22 Jan Beulich <jbeulich@suse.com>
305
306 * i386-opc.tbl (vfrczp*, vpcmov, vpermil2p*): Fold 128- and
307 256-bit templates. Drop redundant leftover Disp<N>.
308 * i386-tlb.h: Re-generate.
309
310 2018-03-14 Kito Cheng <kito.cheng@gmail.com>
311
312 * riscv-opc.c (riscv_insn_types): New.
313
314 2018-03-13 Nick Clifton <nickc@redhat.com>
315
316 * po/pt_BR.po: Updated Brazilian Portuguese translation.
317
318 2018-03-08 H.J. Lu <hongjiu.lu@intel.com>
319
320 * i386-opc.tbl: Add Optimize to clr.
321 * i386-tbl.h: Regenerated.
322
323 2018-03-08 H.J. Lu <hongjiu.lu@intel.com>
324
325 * i386-gen.c (opcode_modifiers): Remove OldGcc.
326 * i386-opc.h (OldGcc): Removed.
327 (i386_opcode_modifier): Remove oldgcc.
328 * i386-opc.tbl: Remove fsubp, fsubrp, fdivp and fdivrp
329 instructions for old (<= 2.8.1) versions of gcc.
330 * i386-tbl.h: Regenerated.
331
332 2018-03-08 Jan Beulich <jbeulich@suse.com>
333
334 * i386-opc.h (EVEXDYN): New.
335 * i386-opc.tbl: Fold various AVX512VL templates.
336 * i386-tlb.h: Re-generate.
337
338 2018-03-08 Jan Beulich <jbeulich@suse.com>
339
340 * i386-opc.tbl (vexpandpd, vexpandps, vmovapd, vmovaps,
341 vmovdqa32, vmovdqa64, vmovdqu32, vmovdqu64, vmovupd, vmovups,
342 vpexpandd, vpexpandq): Fold AFX512VF templates.
343 * i386-tlb.h: Re-generate.
344
345 2018-03-08 Jan Beulich <jbeulich@suse.com>
346
347 * i386-opc.tbl (vgf2p8affineinvqb, vgf2p8affineqb, vgf2p8mulb):
348 Fold 128- and 256-bit VEX-encoded templates.
349 * i386-tlb.h: Re-generate.
350
351 2018-03-08 Jan Beulich <jbeulich@suse.com>
352
353 * i386-opc.tbl (vexpandpd, vexpandps, vmovapd, vmovaps,
354 vmovdqa32, vmovdqa64, vmovdqu32, vmovdqu64, vmovupd, vmovups,
355 vpexpandd, vpexpandq): Fold AVX512F templates.
356 * i386-tlb.h: Re-generate.
357
358 2018-03-08 Jan Beulich <jbeulich@suse.com>
359
360 * i386-opc.tbl (llwpcb, slwpcb, lwpval, lwpins): Fold 32- and
361 64-bit templates. Drop Disp<N>.
362 * i386-tlb.h: Re-generate.
363
364 2018-03-08 Jan Beulich <jbeulich@suse.com>
365
366 * i386-opc.tbl (vfmadd*, vfmsub*, vfnmadd*, vfnmsub*): Fold 128-
367 and 256-bit templates.
368 * i386-tlb.h: Re-generate.
369
370 2018-03-08 Jan Beulich <jbeulich@suse.com>
371
372 * i386-opc.tbl (cmpxchg8b): Add NoRex64.
373 * i386-tlb.h: Re-generate.
374
375 2018-03-08 Jan Beulich <jbeulich@suse.com>
376
377 * i386-opc.tbl (cmpxchg16b, fisttp, fisttpll, bndmov, mwaitx):
378 Drop NoAVX.
379 * i386-tlb.h: Re-generate.
380
381 2018-03-08 Jan Beulich <jbeulich@suse.com>
382
383 * i386-opc.tbl (ldmxcsr, stmxcsr): Add NoAVX.
384 * i386-tlb.h: Re-generate.
385
386 2018-03-08 Jan Beulich <jbeulich@suse.com>
387
388 * i386-gen.c (opcode_modifiers): Delete FloatD.
389 * i386-opc.h (FloatD): Delete.
390 (struct i386_opcode_modifier): Delete floatd.
391 * i386-opc.tbl (fadd, fsub, fsubr, fmul, fdiv, fdivr): Replace
392 FloatD by D.
393 * i386-tlb.h: Re-generate.
394
395 2018-03-08 Jan Beulich <jbeulich@suse.com>
396
397 * i386-dis.c (float_reg): Adjust DC and DE fsub*/fdiv* patterns.
398
399 2018-03-08 Jan Beulich <jbeulich@suse.com>
400
401 * i386-opc.tbl (vmovd): Disallow Qword memory operands.
402 * i386-tlb.h: Re-generate.
403
404 2018-03-08 Jan Beulich <jbeulich@suse.com>
405
406 * i386-opc.tbl (vcvtpd2ps): Fold AVX 128- and 256-bit memory
407 forms.
408 * i386-tlb.h: Re-generate.
409
410 2018-03-07 Alan Modra <amodra@gmail.com>
411
412 * disassemble.c (disassembler): Use bfd_arch_powerpc entry for
413 bfd_arch_rs6000.
414 * disassemble.h (print_insn_rs6000): Delete.
415 * ppc-dis.c (powerpc_init_dialect): Handle rs6000.
416 (disassemble_init_powerpc): Call powerpc_init_dialect for rs6000.
417 (print_insn_rs6000): Delete.
418
419 2018-03-03 Alan Modra <amodra@gmail.com>
420
421 * sysdep.h (opcodes_error_handler): Define.
422 (_bfd_error_handler): Declare.
423 * Makefile.am: Remove stray #.
424 * opc2c.c (main): Remove bogus -l arg handling. Print "DO NOT
425 EDIT" comment.
426 * aarch64-dis.c, * arc-dis.c, * arm-dis.c, * avr-dis.c,
427 * d30v-dis.c, * h8300-dis.c, * mmix-dis.c, * ppc-dis.c,
428 * riscv-dis.c, * s390-dis.c, * sparc-dis.c, * v850-dis.c: Use
429 opcodes_error_handler to print errors. Standardize error messages.
430 * msp430-decode.opc, * nios2-dis.c, * rl78-decode.opc: Likewise,
431 and include opintl.h.
432 * nds32-asm.c: Likewise, and include sysdep.h and opintl.h.
433 * i386-gen.c: Standardize error messages.
434 * msp430-decode.c, * rl78-decode.c, rx-decode.c: Regenerate.
435 * Makefile.in: Regenerate.
436 * epiphany-asm.c, * epiphany-desc.c, * epiphany-dis.c,
437 * epiphany-ibld.c, * fr30-asm.c, * fr30-desc.c, * fr30-dis.c,
438 * fr30-ibld.c, * frv-asm.c, * frv-desc.c, * frv-dis.c, * frv-ibld.c,
439 * frv-opc.c, * ip2k-asm.c, * ip2k-desc.c, * ip2k-dis.c, * ip2k-ibld.c,
440 * iq2000-asm.c, * iq2000-desc.c, * iq2000-dis.c, * iq2000-ibld.c,
441 * lm32-asm.c, * lm32-desc.c, * lm32-dis.c, * lm32-ibld.c,
442 * m32c-asm.c, * m32c-desc.c, * m32c-dis.c, * m32c-ibld.c,
443 * m32r-asm.c, * m32r-desc.c, * m32r-dis.c, * m32r-ibld.c,
444 * mep-asm.c, * mep-desc.c, * mep-dis.c, * mep-ibld.c, * mt-asm.c,
445 * mt-desc.c, * mt-dis.c, * mt-ibld.c, * or1k-asm.c, * or1k-desc.c,
446 * or1k-dis.c, * or1k-ibld.c, * xc16x-asm.c, * xc16x-desc.c,
447 * xc16x-dis.c, * xc16x-ibld.c, * xstormy16-asm.c, * xstormy16-desc.c,
448 * xstormy16-dis.c, * xstormy16-ibld.c: Regenerate.
449
450 2018-03-01 H.J. Lu <hongjiu.lu@intel.com>
451
452 * * i386-opc.tbl: Add "Optimize" to AVX256 and AVX512
453 vpsub[bwdq] instructions.
454 * i386-tbl.h: Regenerated.
455
456 2018-03-01 Alan Modra <amodra@gmail.com>
457
458 * configure.ac (ALL_LINGUAS): Sort.
459 * configure: Regenerate.
460
461 2018-02-27 Thomas Preud'homme <thomas.preudhomme@arm.com>
462
463 * arm-dis.c (print_insn_coprocessor): Replace uses of ARM_FEATURE_COPY
464 macro by assignements.
465
466 2018-02-27 H.J. Lu <hongjiu.lu@intel.com>
467
468 PR gas/22871
469 * i386-gen.c (opcode_modifiers): Add Optimize.
470 * i386-opc.h (Optimize): New enum.
471 (i386_opcode_modifier): Add optimize.
472 * i386-opc.tbl: Add "Optimize" to "mov $imm, reg",
473 "sub reg, reg/mem", "test $imm, acc", "test $imm, reg/mem",
474 "and $imm, acc", "and $imm, reg/mem", "xor reg, reg/mem",
475 "movq $imm, reg" and AVX256 and AVX512 versions of vandnps,
476 vandnpd, vpandn, vpandnd, vpandnq, vxorps, vxorpd, vpxor,
477 vpxord and vpxorq.
478 * i386-tbl.h: Regenerated.
479
480 2018-02-26 Alan Modra <amodra@gmail.com>
481
482 * crx-dis.c (getregliststring): Allocate a large enough buffer
483 to silence false positive gcc8 warning.
484
485 2018-02-22 Shea Levy <shea@shealevy.com>
486
487 * disassemble.c (ARCH_riscv): Define if ARCH_all.
488
489 2018-02-22 H.J. Lu <hongjiu.lu@intel.com>
490
491 * i386-opc.tbl: Add {rex},
492 * i386-tbl.h: Regenerated.
493
494 2018-02-20 Maciej W. Rozycki <macro@mips.com>
495
496 * mips16-opc.c (decode_mips16_operand) <'M'>: Remove case.
497 (mips16_opcodes): Replace `M' with `m' for "restore".
498
499 2018-02-19 Thomas Preud'homme <thomas.preudhomme@arm.com>
500
501 * arm-dis.c (thumb_opcodes): Fix BXNS mask.
502
503 2018-02-13 Maciej W. Rozycki <macro@mips.com>
504
505 * wasm32-dis.c (print_insn_wasm32): Rename `index' local
506 variable to `function_index'.
507
508 2018-02-13 Nick Clifton <nickc@redhat.com>
509
510 PR 22823
511 * metag-dis.c (print_fmmov): Double buffer size to avoid warning
512 about truncation of printing.
513
514 2018-02-12 Henry Wong <henry@stuffedcow.net>
515
516 * mips-opc.c (mips_builtin_opcodes): Correct "sigrie" encoding.
517
518 2018-02-05 Nick Clifton <nickc@redhat.com>
519
520 * po/pt_BR.po: Updated Brazilian Portuguese translation.
521
522 2018-01-23 Igor Tsimbalist <igor.v.tsimbalist@intel.com>
523
524 * i386-dis.c (enum): Add pconfig.
525 * i386-gen.c (cpu_flag_init): Add CPU_PCONFIG_FLAGS.
526 (cpu_flags): Add CpuPCONFIG.
527 * i386-opc.h (enum): Add CpuPCONFIG.
528 (i386_cpu_flags): Add cpupconfig.
529 * i386-opc.tbl: Add PCONFIG instruction.
530 * i386-init.h: Regenerate.
531 * i386-tbl.h: Likewise.
532
533 2018-01-23 Igor Tsimbalist <igor.v.tsimbalist@intel.com>
534
535 * i386-dis.c (enum): Add PREFIX_0F09.
536 * i386-gen.c (cpu_flag_init): Add CPU_WBNOINVD_FLAGS.
537 (cpu_flags): Add CpuWBNOINVD.
538 * i386-opc.h (enum): Add CpuWBNOINVD.
539 (i386_cpu_flags): Add cpuwbnoinvd.
540 * i386-opc.tbl: Add WBNOINVD instruction.
541 * i386-init.h: Regenerate.
542 * i386-tbl.h: Likewise.
543
544 2018-01-17 Jim Wilson <jimw@sifive.com>
545
546 * riscv-opc.c (riscv_opcodes) <addi>: Use z instead of 0.
547
548 2018-01-17 Igor Tsimbalist <igor.v.tsimbalist@intel.com>
549
550 * i386-gen.c (cpu_flag_init): Delete CPU_CET_FLAGS, CpuCET.
551 Add CPU_IBT_FLAGS, CPU_SHSTK_FLAGS, CPY_ANY_IBT_FLAGS,
552 CPU_ANY_SHSTK_FLAGS, CpuIBT, CpuSHSTK.
553 (cpu_flags): Add CpuIBT, CpuSHSTK.
554 * i386-opc.h (enum): Add CpuIBT, CpuSHSTK.
555 (i386_cpu_flags): Add cpuibt, cpushstk.
556 * i386-opc.tbl: Change CpuCET to CpuSHSTK and CpuIBT.
557 * i386-init.h: Regenerate.
558 * i386-tbl.h: Likewise.
559
560 2018-01-16 Nick Clifton <nickc@redhat.com>
561
562 * po/pt_BR.po: Updated Brazilian Portugese translation.
563 * po/de.po: Updated German translation.
564
565 2018-01-15 Jim Wilson <jimw@sifive.com>
566
567 * riscv-opc.c (match_c_nop): New.
568 (riscv_opcodes) <addi>: Handle an addi that compresses to c.nop.
569
570 2018-01-15 Nick Clifton <nickc@redhat.com>
571
572 * po/uk.po: Updated Ukranian translation.
573
574 2018-01-13 Nick Clifton <nickc@redhat.com>
575
576 * po/opcodes.pot: Regenerated.
577
578 2018-01-13 Nick Clifton <nickc@redhat.com>
579
580 * configure: Regenerate.
581
582 2018-01-13 Nick Clifton <nickc@redhat.com>
583
584 2.30 branch created.
585
586 2018-01-11 Igor Tsimbalist <igor.v.tsimbalist@intel.com>
587
588 * i386-opc.tbl: Remove VL variants for 4FMAPS and 4VNNIW insns.
589 * i386-tbl.h: Regenerate.
590
591 2018-01-10 Jan Beulich <jbeulich@suse.com>
592
593 * i386-opc.tbl (v4fmaddss, v4fnmaddss): Adjust Disp8MemShift.
594 * i386-tbl.h: Re-generate.
595
596 2018-01-10 Jan Beulich <jbeulich@suse.com>
597
598 * i386-opc.tbl (vpcmpeqb, vpcmpleb, vpcmpltb, vpcmpneqb,
599 vpcmpnleb, vpcmpnltb, vpcmpequb, vpcmpleub, vpcmpltub,
600 vpcmpnequb, vpcmpnleub, vpcmpnltub, vpcmpeqw, vpcmplew,
601 vpcmpltw, vpcmpneqw, vpcmpnlew, vpcmpnltw, vpcmpequw, vpcmpleuw,
602 vpcmpltuw, vpcmpnequw, vpcmpnleuw, vpcmpnltuw): Adjust
603 Disp8MemShift of AVX512VL forms.
604 * i386-tbl.h: Re-generate.
605
606 2018-01-09 Jim Wilson <jimw@sifive.com>
607
608 * riscv-dis.c (maybe_print_address): If base_reg is zero,
609 then the hi_addr value is zero.
610
611 2018-01-09 James Greenhalgh <james.greenhalgh@arm.com>
612
613 * arm-dis.c (arm_opcodes): Add csdb.
614 (thumb32_opcodes): Add csdb.
615
616 2018-01-09 James Greenhalgh <james.greenhalgh@arm.com>
617
618 * aarch64-tbl.h (aarch64_opcode_table): Add "csdb".
619 * aarch64-asm-2.c: Regenerate.
620 * aarch64-dis-2.c: Regenerate.
621 * aarch64-opc-2.c: Regenerate.
622
623 2018-01-08 H.J. Lu <hongjiu.lu@intel.com>
624
625 PR gas/22681
626 * i386-opc.tbl: Properly encode vmovd with Qword memeory operand.
627 Remove AVX512 vmovd with 64-bit operands.
628 * i386-tbl.h: Regenerated.
629
630 2018-01-05 Jim Wilson <jimw@sifive.com>
631
632 * riscv-dis.c (print_insn_args) <'s'>: Call maybe_print_address for a
633 jalr.
634
635 2018-01-03 Alan Modra <amodra@gmail.com>
636
637 Update year range in copyright notice of all files.
638
639 2018-01-02 Jan Beulich <jbeulich@suse.com>
640
641 * i386-gen.c (operand_type_init): Restore OPERAND_TYPE_REGYMM
642 and OPERAND_TYPE_REGZMM entries.
643
644 For older changes see ChangeLog-2017
645 \f
646 Copyright (C) 2018 Free Software Foundation, Inc.
647
648 Copying and distribution of this file, with or without modification,
649 are permitted in any medium without royalty provided the copyright
650 notice and this notice are preserved.
651
652 Local Variables:
653 mode: change-log
654 left-margin: 8
655 fill-column: 74
656 version-control: never
657 End: