1 2020-07-15 Jan Beulich <jbeulich@suse.com>
3 * i386-dis.c (dis386): Adjust 'V' description. Use P-based
4 construct for push/pop of register.
5 (putop): Honor cond when handling 'P'. Drop handling of plain
8 2020-07-15 Jan Beulich <jbeulich@suse.com>
10 * i386-dis.c (dis386): Adjust 'P', 'T', 'U', and '@'
11 description. Drop '&' description. Use P for push of immediate,
12 pushf/popf, enter, and leave. Use %LP for lret/retf.
13 (dis386_twobyte): Use P for push/pop of fs/gs.
14 (reg_table): Use P for push/pop. Use @ for near call/jmp.
15 (x86_64_table): Use P for far call/jmp.
16 (putop): Drop handling of 'U' and '&'. Move and adjust handling
17 of '@'. Adjust handling of 'P' and 'T'. Drop case_P and case_Q
19 (OP_J): Drop marking of REX_W as used for v_mode (ISA-dependent)
20 and dqw_mode (unconditional).
22 2020-07-14 H.J. Lu <hongjiu.lu@intel.com>
25 * i386-dis.c (OP_E_memory): Without base nor index registers,
26 32-bit displacement to 64 bits.
28 2020-07-14 Claudiu Zissulescu <claziss@gmail.com>
30 * arc-dis.c (print_insn_arc): Detect and emit a warning when a
31 faulty double register pair is detected.
33 2020-07-14 Jan Beulich <jbeulich@suse.com>
35 * i386-dis.c (OP_D): Print dr<N> instead of db<N> in Intel mode.
37 2020-07-14 Jan Beulich <jbeulich@suse.com>
39 * i386-dis.c (OP_R, Rm): Delete.
40 (MOD_0F24, MOD_0F26): Rename to ...
41 (X86_64_0F24, X86_64_0F26): ... respectively.
42 (dis386): Update 'L' and 'Z' comments.
43 (dis386_twobyte): Replace Rm by Em. Change opcode 0F24 and 0F26
45 (mod_table): Move opcode 0F24 and 0F26 entries ...
46 (x86_64_table): ... here.
47 (putop): Drop handling of 'L'. Set modrm.mod to 3 for 'Z'. Move
50 2020-07-14 Jan Beulich <jbeulich@suse.com>
52 * i386-dis.c (Rd, Rdq, MaskR): Delete.
53 (MOD_EVEX_0F3828_P_1, MOD_EVEX_0F382A_P_1_W_1,
54 MOD_EVEX_0F3838_P_1, MOD_EVEX_0F383A_P_1_W_0,
55 MOD_EVEX_0F387A_W_0, MOD_EVEX_0F387B_W_0,
56 MOD_EVEX_0F387C): New enumerators.
57 (reg_table): Use Edq for rdssp.
58 (prefix_table): Use Edq for incssp.
59 (mod_table): Use Rm for move to/from %tr. Use MaskE for kand*,
60 kandn*, knot*, kor*, kxnor*, kxor*, kadd*, kunpck*, kortest*,
61 ktest*, and kshift*. Use Edq / MaskE for kmov*.
62 * i386-dis-evex.h: Reference mod_table[] for opcode 0F387C.
63 * i386-dis-evex-mod.h: New entries for opcodes 0F3828, 0F382A,
64 0F3838, 0F383A, 0F387A, 0F387B, and 0F387C.
65 * i386-dis-evex-prefix.h: Reference mod_table[] for opcodes
66 0F3828_P_1 and 0F3838_P_1.
67 * i386-dis-evex-w.h: Reference mod_table[] for opcodes
68 0F382A_P_1, 0F383A_P_1, 0F387A, and 0F387B.
70 2020-07-14 Jan Beulich <jbeulich@suse.com>
72 * i386-dis.c (PREFIX_0F01_REG_7_MOD_3_RM_3,
73 PREFIX_0FAE_REG_5_MOD_0, PREFIX_0FC3_MOD_0, PREFIX_0F38C8,
74 PREFIX_0F38C9, PREFIX_0F38CA, PREFIX_0F38CB, PREFIX_0F38CC,
75 PREFIX_0F38CD, PREFIX_0F38F9, PREFIX_0F3ACC, PREFIX_VEX_0F77,
76 PREFIX_VEX_0F38F2, PREFIX_VEX_0F38F3_REG_1,
77 PREFIX_VEX_0F38F3_REG_2, PREFIX_VEX_0F38F3_REG_3): Delete.
78 (MOD_0F38F9_PREFIX_0, VEX_LEN_0F77_P_0, VEX_LEN_0F38F2_P_0,
79 VEX_LEN_0F38F3_R_1_P_0, VEX_LEN_0F38F3_R_2_P_0,
80 VEX_LEN_0F38F3_R_3_P_0): Rename to ...
81 (MOD_0F38F9, VEX_LEN_0F77, VEX_LEN_0F38F2, VEX_LEN_0F38F3_R_1,
82 VEX_LEN_0F38F3_R_2, VEX_LEN_0F38F3_R_3): ... these respectively.
83 (reg_table, prefix_table, three_byte_table, vex_table,
84 vex_len_table, mod_table, rm_table): Replace / remove respective
86 (intel_operand_size, OP_E_register, OP_G): Avoid undue setting
87 of PREFIX_DATA in used_prefixes.
89 2020-07-14 Jan Beulich <jbeulich@suse.com>
91 * i386-dis.c (MOD_VEX_0F3A30_L_0_W_0, MOD_VEX_0F3A30_L_0_W_1,
92 MOD_VEX_0F3A31_L_0_W_0, MOD_VEX_0F3A31_L_0_W_1,
93 MOD_VEX_0F3A32_L_0_W_0, MOD_VEX_0F3A32_L_0_W_1,
94 MOD_VEX_0F3A33_L_0_W_0, MOD_VEX_0F3A33_L_0_W_1): Replace by ...
95 (MOD_VEX_0F3A30_L_0, MOD_VEX_0F3A31_L_0,
96 MOD_VEX_0F3A32_L_0, MOD_VEX_0F3A33_L_0): ... these.
97 (VEX_W_0F3A30_L_0, VEX_W_0F3A31_L_0, VEX_W_0F3A32_L_0,
98 VEX_W_0F3A33_L_0): Delete.
99 (dis386): Adjust "BW" description.
100 (vex_len_table): Refer to mod_table[] for opcodes 0F3A30,
101 0F3A31, 0F3A32, and 0F3A33.
102 (vex_w_table): Delete opcode 0F3A30, 0F3A31, 0F3A32, and 0F3A33
104 (mod_table): Replace opcode 0F3A30, 0F3A31, 0F3A32, and 0F3A33
107 2020-07-14 Jan Beulich <jbeulich@suse.com>
109 * i386-dis.c (PREFIX_0F6C, PREFIX_0F6D, PREFIX_0F73_REG_3,
110 PREFIX_0F73_REG_7, PREFIX_0F3810, PREFIX_0F3814, PREFIX_0F3815,
111 PREFIX_0F3817, PREFIX_0F3820, PREFIX_0F3821, PREFIX_0F3822,
112 PREFIX_0F3823, PREFIX_0F3824, PREFIX_0F3825, PREFIX_0F3828,
113 PREFIX_0F3829, PREFIX_0F382A, PREFIX_0F382B, PREFIX_0F3830,
114 PREFIX_0F3831, PREFIX_0F3832, PREFIX_0F3833, PREFIX_0F3834,
115 PREFIX_0F3835, PREFIX_0F3837, PREFIX_0F3838, PREFIX_0F3839,
116 PREFIX_0F383A, PREFIX_0F383B, PREFIX_0F383C, PREFIX_0F383D,
117 PREFIX_0F383E, PREFIX_0F383F, PREFIX_0F3840, PREFIX_0F3841,
118 PREFIX_0F3880, PREFIX_0F3881, PREFIX_0F3882, PREFIX_0F38CF,
119 PREFIX_0F38DB, PREFIX_0F38DC, PREFIX_0F38DD, PREFIX_0F38DE,
120 PREFIX_0F38DF, PREFIX_0F38F5, PREFIX_0F3A08, PREFIX_0F3A09,
121 PREFIX_0F3A0A, PREFIX_0F3A0B, PREFIX_0F3A0C, PREFIX_0F3A0D,
122 PREFIX_0F3A0E, PREFIX_0F3A14, PREFIX_0F3A15, PREFIX_0F3A16,
123 PREFIX_0F3A17, PREFIX_0F3A20, PREFIX_0F3A21, PREFIX_0F3A22,
124 PREFIX_0F3A40, PREFIX_0F3A41, PREFIX_0F3A42, PREFIX_0F3A44,
125 PREFIX_0F3A60, PREFIX_0F3A61, PREFIX_0F3A62, PREFIX_0F3A63,
126 PREFIX_0F3ACE, PREFIX_0F3ACF, PREFIX_0F3ADF, PREFIX_VEX_0F60,
127 PREFIX_VEX_0F61, PREFIX_VEX_0F62, PREFIX_VEX_0F63,
128 PREFIX_VEX_0F64, PREFIX_VEX_0F65, PREFIX_VEX_0F66,
129 PREFIX_VEX_0F67, PREFIX_VEX_0F68, PREFIX_VEX_0F69,
130 PREFIX_VEX_0F6A, PREFIX_VEX_0F6B, PREFIX_VEX_0F6C,
131 PREFIX_VEX_0F6D, PREFIX_VEX_0F6E, PREFIX_VEX_0F71_REG_2,
132 PREFIX_VEX_0F71_REG_4, PREFIX_VEX_0F71_REG_6,
133 PREFIX_VEX_0F72_REG_2, PREFIX_VEX_0F72_REG_4,
134 PREFIX_VEX_0F72_REG_6, PREFIX_VEX_0F73_REG_2,
135 PREFIX_VEX_0F73_REG_3, PREFIX_VEX_0F73_REG_6,
136 PREFIX_VEX_0F73_REG_7, PREFIX_VEX_0F74,
137 PREFIX_VEX_0F75, PREFIX_VEX_0F76, PREFIX_VEX_0FC4,
138 PREFIX_VEX_0FC5, PREFIX_VEX_0FD1, PREFIX_VEX_0FD2,
139 PREFIX_VEX_0FD3, PREFIX_VEX_0FD4, PREFIX_VEX_0FD5,
140 PREFIX_VEX_0FD6, PREFIX_VEX_0FD7, PREFIX_VEX_0FD8,
141 PREFIX_VEX_0FD9, PREFIX_VEX_0FDA, PREFIX_VEX_0FDB,
142 PREFIX_VEX_0FDC, PREFIX_VEX_0FDD, PREFIX_VEX_0FDE,
143 PREFIX_VEX_0FDF, PREFIX_VEX_0FE0, PREFIX_VEX_0FE1,
144 PREFIX_VEX_0FE2, PREFIX_VEX_0FE3, PREFIX_VEX_0FE4,
145 PREFIX_VEX_0FE5, PREFIX_VEX_0FE7, PREFIX_VEX_0FE8,
146 PREFIX_VEX_0FE9, PREFIX_VEX_0FEA, PREFIX_VEX_0FEB,
147 PREFIX_VEX_0FEC, PREFIX_VEX_0FED, PREFIX_VEX_0FEE,
148 PREFIX_VEX_0FEF, PREFIX_VEX_0FF1, PREFIX_VEX_0FF2,
149 PREFIX_VEX_0FF3, PREFIX_VEX_0FF4, PREFIX_VEX_0FF5,
150 PREFIX_VEX_0FF6, PREFIX_VEX_0FF7, PREFIX_VEX_0FF8,
151 PREFIX_VEX_0FF9, PREFIX_VEX_0FFA, PREFIX_VEX_0FFB,
152 PREFIX_VEX_0FFC, PREFIX_VEX_0FFD, PREFIX_VEX_0FFE,
153 PREFIX_VEX_0F3800, PREFIX_VEX_0F3801, PREFIX_VEX_0F3802,
154 PREFIX_VEX_0F3803, PREFIX_VEX_0F3804, PREFIX_VEX_0F3805,
155 PREFIX_VEX_0F3806, PREFIX_VEX_0F3807, PREFIX_VEX_0F3808,
156 PREFIX_VEX_0F3809, PREFIX_VEX_0F380A, PREFIX_VEX_0F380B,
157 PREFIX_VEX_0F380C, PREFIX_VEX_0F380D, PREFIX_VEX_0F380E,
158 PREFIX_VEX_0F380F, PREFIX_VEX_0F3813, PREFIX_VEX_0F3816,
159 PREFIX_VEX_0F3817, PREFIX_VEX_0F3818, PREFIX_VEX_0F3819,
160 PREFIX_VEX_0F381A, PREFIX_VEX_0F381C, PREFIX_VEX_0F381D,
161 PREFIX_VEX_0F381E, PREFIX_VEX_0F3820, PREFIX_VEX_0F3821,
162 PREFIX_VEX_0F3822, PREFIX_VEX_0F3823, PREFIX_VEX_0F3824,
163 PREFIX_VEX_0F3825, PREFIX_VEX_0F3828, PREFIX_VEX_0F3829,
164 PREFIX_VEX_0F382A, PREFIX_VEX_0F382B, PREFIX_VEX_0F382C,
165 PREFIX_VEX_0F382D, PREFIX_VEX_0F382E, PREFIX_VEX_0F382F,
166 PREFIX_VEX_0F3830, PREFIX_VEX_0F3831, PREFIX_VEX_0F3832,
167 PREFIX_VEX_0F3833, PREFIX_VEX_0F3834, PREFIX_VEX_0F3835,
168 PREFIX_VEX_0F3836, PREFIX_VEX_0F3837, PREFIX_VEX_0F3838,
169 PREFIX_VEX_0F3839, PREFIX_VEX_0F383A, PREFIX_VEX_0F383B,
170 PREFIX_VEX_0F383C, PREFIX_VEX_0F383D, PREFIX_VEX_0F383E,
171 PREFIX_VEX_0F383F, PREFIX_VEX_0F3840, PREFIX_VEX_0F3841,
172 PREFIX_VEX_0F3845, PREFIX_VEX_0F3846, PREFIX_VEX_0F3847,
173 PREFIX_VEX_0F3858, PREFIX_VEX_0F3859, PREFIX_VEX_0F385A,
174 PREFIX_VEX_0F3878, PREFIX_VEX_0F3879, PREFIX_VEX_0F388C,
175 PREFIX_VEX_0F388E, PREFIX_VEX_0F3890, PREFIX_VEX_0F3891,
176 PREFIX_VEX_0F3892, PREFIX_VEX_0F3893, PREFIX_VEX_0F3896,
177 PREFIX_VEX_0F3897, PREFIX_VEX_0F3898, PREFIX_VEX_0F3899,
178 PREFIX_VEX_0F389A, PREFIX_VEX_0F389B, PREFIX_VEX_0F389C,
179 PREFIX_VEX_0F389D, PREFIX_VEX_0F389E, PREFIX_VEX_0F389F,
180 PREFIX_VEX_0F38A6, PREFIX_VEX_0F38A7, PREFIX_VEX_0F38A8,
181 PREFIX_VEX_0F38A9, PREFIX_VEX_0F38AA, PREFIX_VEX_0F38AB,
182 PREFIX_VEX_0F38AC, PREFIX_VEX_0F38AD, PREFIX_VEX_0F38AE,
183 PREFIX_VEX_0F38AF, PREFIX_VEX_0F38B6, PREFIX_VEX_0F38B7,
184 PREFIX_VEX_0F38B8, PREFIX_VEX_0F38B9, PREFIX_VEX_0F38BA,
185 PREFIX_VEX_0F38BB, PREFIX_VEX_0F38BC, PREFIX_VEX_0F38BD,
186 PREFIX_VEX_0F38BE, PREFIX_VEX_0F38BF, PREFIX_VEX_0F38CF,
187 PREFIX_VEX_0F38DB, PREFIX_VEX_0F38DC, PREFIX_VEX_0F38DD,
188 PREFIX_VEX_0F38DE, PREFIX_VEX_0F38DF, PREFIX_VEX_0F3A00,
189 PREFIX_VEX_0F3A01, PREFIX_VEX_0F3A02, PREFIX_VEX_0F3A04,
190 PREFIX_VEX_0F3A05, PREFIX_VEX_0F3A06, PREFIX_VEX_0F3A08,
191 PREFIX_VEX_0F3A09, PREFIX_VEX_0F3A0A, PREFIX_VEX_0F3A0B,
192 PREFIX_VEX_0F3A0C, PREFIX_VEX_0F3A0D, PREFIX_VEX_0F3A0E,
193 PREFIX_VEX_0F3A0F, PREFIX_VEX_0F3A14, PREFIX_VEX_0F3A15,
194 PREFIX_VEX_0F3A16, PREFIX_VEX_0F3A17, PREFIX_VEX_0F3A18,
195 PREFIX_VEX_0F3A19, PREFIX_VEX_0F3A1D, PREFIX_VEX_0F3A20,
196 PREFIX_VEX_0F3A21, PREFIX_VEX_0F3A22, PREFIX_VEX_0F3A30,
197 PREFIX_VEX_0F3A31, PREFIX_VEX_0F3A32, PREFIX_VEX_0F3A33,
198 PREFIX_VEX_0F3A38, PREFIX_VEX_0F3A39, PREFIX_VEX_0F3A40,
199 PREFIX_VEX_0F3A41, PREFIX_VEX_0F3A42, PREFIX_VEX_0F3A44,
200 PREFIX_VEX_0F3A46, PREFIX_VEX_0F3A48, PREFIX_VEX_0F3A49,
201 PREFIX_VEX_0F3A4A, PREFIX_VEX_0F3A4B, PREFIX_VEX_0F3A4C,
202 PREFIX_VEX_0F3A5C, PREFIX_VEX_0F3A5D, PREFIX_VEX_0F3A5E,
203 PREFIX_VEX_0F3A5F, PREFIX_VEX_0F3A60, PREFIX_VEX_0F3A61,
204 PREFIX_VEX_0F3A62, PREFIX_VEX_0F3A63, PREFIX_VEX_0F3A68,
205 PREFIX_VEX_0F3A69, PREFIX_VEX_0F3A6A, PREFIX_VEX_0F3A6B,
206 PREFIX_VEX_0F3A6C, PREFIX_VEX_0F3A6D, PREFIX_VEX_0F3A6E,
207 PREFIX_VEX_0F3A6F, PREFIX_VEX_0F3A78, PREFIX_VEX_0F3A79,
208 PREFIX_VEX_0F3A7A, PREFIX_VEX_0F3A7B, PREFIX_VEX_0F3A7C,
209 PREFIX_VEX_0F3A7D, PREFIX_VEX_0F3A7E, PREFIX_VEX_0F3A7F,
210 PREFIX_VEX_0F3ACE, PREFIX_VEX_0F3ACF, PREFIX_VEX_0F3ADF,
211 PREFIX_EVEX_0F64, PREFIX_EVEX_0F65, PREFIX_EVEX_0F66,
212 PREFIX_EVEX_0F6E, PREFIX_EVEX_0F71_REG_2,
213 PREFIX_EVEX_0F71_REG_4, PREFIX_EVEX_0F71_REG_6,
214 PREFIX_EVEX_0F72_REG_0, PREFIX_EVEX_0F72_REG_1,
215 PREFIX_EVEX_0F72_REG_2, PREFIX_EVEX_0F72_REG_4,
216 PREFIX_EVEX_0F72_REG_6, PREFIX_EVEX_0F73_REG_2,
217 PREFIX_EVEX_0F73_REG_3, PREFIX_EVEX_0F73_REG_6,
218 PREFIX_EVEX_0F73_REG_7, PREFIX_EVEX_0F74, PREFIX_EVEX_0F75,
219 PREFIX_EVEX_0F76, PREFIX_EVEX_0FC4, PREFIX_EVEX_0FC5,
220 PREFIX_EVEX_0FD6, PREFIX_EVEX_0FDB, PREFIX_EVEX_0FDF,
221 PREFIX_EVEX_0FE2, PREFIX_EVEX_0FE7, PREFIX_EVEX_0FEB,
222 PREFIX_EVEX_0FEF, PREFIX_EVEX_0F380D, PREFIX_EVEX_0F3816,
223 PREFIX_EVEX_0F3819, PREFIX_EVEX_0F381A, PREFIX_EVEX_0F381B,
224 PREFIX_EVEX_0F381E, PREFIX_EVEX_0F381F, PREFIX_EVEX_0F382C,
225 PREFIX_EVEX_0F382D, PREFIX_EVEX_0F3836, PREFIX_EVEX_0F3837,
226 PREFIX_EVEX_0F383B, PREFIX_EVEX_0F383D, PREFIX_EVEX_0F383F,
227 PREFIX_EVEX_0F3840, PREFIX_EVEX_0F3842, PREFIX_EVEX_0F3843,
228 PREFIX_EVEX_0F3844, PREFIX_EVEX_0F3845, PREFIX_EVEX_0F3846,
229 PREFIX_EVEX_0F3847, PREFIX_EVEX_0F384C, PREFIX_EVEX_0F384D,
230 PREFIX_EVEX_0F384E, PREFIX_EVEX_0F384F, PREFIX_EVEX_0F3850,
231 PREFIX_EVEX_0F3851, PREFIX_EVEX_0F3854, PREFIX_EVEX_0F3855,
232 PREFIX_EVEX_0F3859, PREFIX_EVEX_0F385A, PREFIX_EVEX_0F385B,
233 PREFIX_EVEX_0F3862, PREFIX_EVEX_0F3863, PREFIX_EVEX_0F3864,
234 PREFIX_EVEX_0F3865, PREFIX_EVEX_0F3866, PREFIX_EVEX_0F3870,
235 PREFIX_EVEX_0F3871, PREFIX_EVEX_0F3873, PREFIX_EVEX_0F3875,
236 PREFIX_EVEX_0F3876, PREFIX_EVEX_0F3877, PREFIX_EVEX_0F387A,
237 PREFIX_EVEX_0F387B, PREFIX_EVEX_0F387C, PREFIX_EVEX_0F387D,
238 PREFIX_EVEX_0F387E, PREFIX_EVEX_0F387F, PREFIX_EVEX_0F3883,
239 PREFIX_EVEX_0F3888, PREFIX_EVEX_0F3889, PREFIX_EVEX_0F388A,
240 PREFIX_EVEX_0F388B, PREFIX_EVEX_0F388D, PREFIX_EVEX_0F388F,
241 PREFIX_EVEX_0F3890, PREFIX_EVEX_0F3891, PREFIX_EVEX_0F3892,
242 PREFIX_EVEX_0F3893, PREFIX_EVEX_0F38A0, PREFIX_EVEX_0F38A1,
243 PREFIX_EVEX_0F38A2, PREFIX_EVEX_0F38A3, PREFIX_EVEX_0F38B4,
244 PREFIX_EVEX_0F38B5, PREFIX_EVEX_0F38C4,
245 PREFIX_EVEX_0F38C6_REG_1, PREFIX_EVEX_0F38C6_REG_2,
246 PREFIX_EVEX_0F38C6_REG_5, PREFIX_EVEX_0F38C6_REG_6,
247 PREFIX_EVEX_0F38C7_REG_1, PREFIX_EVEX_0F38C7_REG_2,
248 PREFIX_EVEX_0F38C7_REG_5, PREFIX_EVEX_0F38C7_REG_6,
249 PREFIX_EVEX_0F38C8, PREFIX_EVEX_0F38CA, PREFIX_EVEX_0F38CB,
250 PREFIX_EVEX_0F38CC, PREFIX_EVEX_0F38CD, PREFIX_EVEX_0F3A00,
251 PREFIX_EVEX_0F3A01, PREFIX_EVEX_0F3A03, PREFIX_EVEX_0F3A05,
252 PREFIX_EVEX_0F3A08, PREFIX_EVEX_0F3A09, PREFIX_EVEX_0F3A0A,
253 PREFIX_EVEX_0F3A0B, PREFIX_EVEX_0F3A14, PREFIX_EVEX_0F3A15,
254 PREFIX_EVEX_0F3A16, PREFIX_EVEX_0F3A17, PREFIX_EVEX_0F3A18,
255 PREFIX_EVEX_0F3A19, PREFIX_EVEX_0F3A1A, PREFIX_EVEX_0F3A1B,
256 PREFIX_EVEX_0F3A1E, PREFIX_EVEX_0F3A1F, PREFIX_EVEX_0F3A20,
257 PREFIX_EVEX_0F3A21, PREFIX_EVEX_0F3A22, PREFIX_EVEX_0F3A23,
258 PREFIX_EVEX_0F3A25, PREFIX_EVEX_0F3A26, PREFIX_EVEX_0F3A27,
259 PREFIX_EVEX_0F3A38, PREFIX_EVEX_0F3A39, PREFIX_EVEX_0F3A3A,
260 PREFIX_EVEX_0F3A3B, PREFIX_EVEX_0F3A3E, PREFIX_EVEX_0F3A3F,
261 PREFIX_EVEX_0F3A42, PREFIX_EVEX_0F3A43, PREFIX_EVEX_0F3A50,
262 PREFIX_EVEX_0F3A51, PREFIX_EVEX_0F3A54, PREFIX_EVEX_0F3A55,
263 PREFIX_EVEX_0F3A56, PREFIX_EVEX_0F3A57, PREFIX_EVEX_0F3A66,
264 PREFIX_EVEX_0F3A67, PREFIX_EVEX_0F3A70, PREFIX_EVEX_0F3A71,
265 PREFIX_EVEX_0F3A72, PREFIX_EVEX_0F3A73): Delete.
266 (MOD_0F382A_PREFIX_2, MOD_0F38F5_PREFIX_2,
267 MOD_VEX_0FD7_PREFIX_2, MOD_VEX_0FE7_PREFIX_2,
268 MOD_VEX_0F381A_PREFIX_2, MOD_VEX_0F382A_PREFIX_2,
269 MOD_VEX_0F382C_PREFIX_2, MOD_VEX_0F382D_PREFIX_2,
270 MOD_VEX_0F382E_PREFIX_2, MOD_VEX_0F382F_PREFIX_2,
271 MOD_VEX_0F385A_PREFIX_2, MOD_VEX_0F388C_PREFIX_2,
272 MOD_VEX_0F388E_PREFIX_2, MOD_VEX_W_0_0F3A30_P_2_LEN_0,
273 MOD_VEX_W_1_0F3A30_P_2_LEN_0, MOD_VEX_W_0_0F3A31_P_2_LEN_0,
274 MOD_VEX_W_1_0F3A31_P_2_LEN_0, MOD_VEX_W_0_0F3A32_P_2_LEN_0,
275 MOD_VEX_W_1_0F3A32_P_2_LEN_0, MOD_VEX_W_0_0F3A33_P_2_LEN_0,
276 MOD_VEX_W_1_0F3A33_P_2_LEN_0, MOD_EVEX_0F381A_P_2_W_0,
277 MOD_EVEX_0F381A_P_2_W_1, MOD_EVEX_0F381B_P_2_W_0,
278 MOD_EVEX_0F381B_P_2_W_1, MOD_EVEX_0F385A_P_2_W_0,
279 MOD_EVEX_0F385A_P_2_W_1, MOD_EVEX_0F385B_P_2_W_0,
280 MOD_EVEX_0F385B_P_2_W_1, VEX_LEN_0F6E_P_2,
281 VEX_LEN_0FC4_P_2, VEX_LEN_0FC5_P_2, VEX_LEN_0FD6_P_2,
282 VEX_LEN_0FF7_P_2, VEX_LEN_0F3816_P_2, VEX_LEN_0F3819_P_2,
283 VEX_LEN_0F381A_P_2_M_0, VEX_LEN_0F3836_P_2,
284 VEX_LEN_0F3841_P_2, VEX_LEN_0F385A_P_2_M_0,
285 VEX_LEN_0F38DB_P_2, VEX_LEN_0F3A00_P_2, VEX_LEN_0F3A01_P_2,
286 VEX_LEN_0F3A06_P_2, VEX_LEN_0F3A14_P_2, VEX_LEN_0F3A15_P_2,
287 VEX_LEN_0F3A16_P_2, VEX_LEN_0F3A17_P_2, VEX_LEN_0F3A18_P_2,
288 VEX_LEN_0F3A19_P_2, VEX_LEN_0F3A20_P_2, VEX_LEN_0F3A21_P_2,
289 VEX_LEN_0F3A22_P_2, VEX_LEN_0F3A30_P_2, VEX_LEN_0F3A31_P_2,
290 VEX_LEN_0F3A32_P_2, VEX_LEN_0F3A33_P_2, VEX_LEN_0F3A38_P_2,
291 VEX_LEN_0F3A39_P_2, VEX_LEN_0F3A41_P_2, VEX_LEN_0F3A46_P_2,
292 VEX_LEN_0F3A60_P_2, VEX_LEN_0F3A61_P_2, VEX_LEN_0F3A62_P_2,
293 VEX_LEN_0F3A63_P_2, VEX_LEN_0F3ADF_P_2, EVEX_LEN_0F6E_P_2,
294 EVEX_LEN_0FC4_P_2, EVEX_LEN_0FC5_P_2, EVEX_LEN_0FD6_P_2,
295 EVEX_LEN_0F3816_P_2, EVEX_LEN_0F3819_P_2_W_0,
296 EVEX_LEN_0F3819_P_2_W_1, EVEX_LEN_0F381A_P_2_W_0_M_0,
297 EVEX_LEN_0F381A_P_2_W_1_M_0, EVEX_LEN_0F381B_P_2_W_0_M_0,
298 EVEX_LEN_0F381B_P_2_W_1_M_0, EVEX_LEN_0F3836_P_2,
299 EVEX_LEN_0F385A_P_2_W_0_M_0, EVEX_LEN_0F385A_P_2_W_1_M_0,
300 EVEX_LEN_0F385B_P_2_W_0_M_0, EVEX_LEN_0F385B_P_2_W_1_M_0,
301 EVEX_LEN_0F38C6_REG_1_PREFIX_2, EVEX_LEN_0F38C6_REG_2_PREFIX_2,
302 EVEX_LEN_0F38C6_REG_5_PREFIX_2, EVEX_LEN_0F38C6_REG_6_PREFIX_2,
303 EVEX_LEN_0F38C7_R_1_P_2_W_0, EVEX_LEN_0F38C7_R_1_P_2_W_1,
304 EVEX_LEN_0F38C7_R_2_P_2_W_0, EVEX_LEN_0F38C7_R_2_P_2_W_1,
305 EVEX_LEN_0F38C7_R_5_P_2_W_0, EVEX_LEN_0F38C7_R_5_P_2_W_1,
306 EVEX_LEN_0F38C7_R_6_P_2_W_0, EVEX_LEN_0F38C7_R_6_P_2_W_1,
307 EVEX_LEN_0F3A00_P_2_W_1, EVEX_LEN_0F3A01_P_2_W_1,
308 EVEX_LEN_0F3A14_P_2, EVEX_LEN_0F3A15_P_2, EVEX_LEN_0F3A16_P_2,
309 EVEX_LEN_0F3A17_P_2, EVEX_LEN_0F3A18_P_2_W_0,
310 EVEX_LEN_0F3A18_P_2_W_1, EVEX_LEN_0F3A19_P_2_W_0,
311 EVEX_LEN_0F3A19_P_2_W_1, EVEX_LEN_0F3A1A_P_2_W_0,
312 EVEX_LEN_0F3A1A_P_2_W_1, EVEX_LEN_0F3A1B_P_2_W_0,
313 EVEX_LEN_0F3A1B_P_2_W_1, EVEX_LEN_0F3A20_P_2,
314 EVEX_LEN_0F3A21_P_2_W_0, EVEX_LEN_0F3A22_P_2,
315 EVEX_LEN_0F3A23_P_2_W_0, EVEX_LEN_0F3A23_P_2_W_1,
316 EVEX_LEN_0F3A38_P_2_W_0, EVEX_LEN_0F3A38_P_2_W_1,
317 EVEX_LEN_0F3A39_P_2_W_0, EVEX_LEN_0F3A39_P_2_W_1,
318 EVEX_LEN_0F3A3A_P_2_W_0, EVEX_LEN_0F3A3A_P_2_W_1,
319 EVEX_LEN_0F3A3B_P_2_W_0, EVEX_LEN_0F3A3B_P_2_W_1,
320 EVEX_LEN_0F3A43_P_2_W_0, EVEX_LEN_0F3A43_P_2_W_1
321 VEX_W_0F380C_P_2, VEX_W_0F380D_P_2, VEX_W_0F380E_P_2,
322 VEX_W_0F380F_P_2, VEX_W_0F3813_P_2, VEX_W_0F3816_P_2,
323 VEX_W_0F3818_P_2, VEX_W_0F3819_P_2,
324 VEX_W_0F381A_P_2_M_0_L_0, VEX_W_0F382C_P_2_M_0,
325 VEX_W_0F382D_P_2_M_0, VEX_W_0F382E_P_2_M_0,
326 VEX_W_0F382F_P_2_M_0, VEX_W_0F3836_P_2,
327 VEX_W_0F3846_P_2, VEX_W_0F3858_P_2, VEX_W_0F3859_P_2,
328 VEX_W_0F385A_P_2_M_0_L_0, VEX_W_0F3878_P_2,
329 VEX_W_0F3879_P_2, VEX_W_0F38CF_P_2, VEX_W_0F3A00_P_2,
330 VEX_W_0F3A01_P_2, VEX_W_0F3A02_P_2, VEX_W_0F3A04_P_2,
331 VEX_W_0F3A05_P_2, VEX_W_0F3A06_P_2_L_0,
332 VEX_W_0F3A18_P_2_L_0, VEX_W_0F3A19_P_2_L_0,
333 VEX_W_0F3A1D_P_2, VEX_W_0F3A30_P_2_LEN_0,
334 VEX_W_0F3A31_P_2_LEN_0, VEX_W_0F3A32_P_2_LEN_0,
335 VEX_W_0F3A33_P_2_LEN_0, VEX_W_0F3A38_P_2_L_0,
336 VEX_W_0F3A39_P_2_L_0, VEX_W_0F3A46_P_2_L_0,
337 VEX_W_0F3A4A_P_2, VEX_W_0F3A4B_P_2, VEX_W_0F3A4C_P_2,
338 VEX_W_0F3ACE_P_2, VEX_W_0F3ACF_P_2, EVEX_W_0F66_P_2,
339 EVEX_W_0F72_R_2_P_2, EVEX_W_0F72_R_6_P_2,
340 EVEX_W_0F73_R_2_P_2, EVEX_W_0F73_R_6_P_2,
341 EVEX_W_0F76_P_2, EVEX_W_0FD6_P_2, EVEX_W_0FE7_P_2,
342 EVEX_W_0F380D_P_2, EVEX_W_0F3819_P_2,
343 EVEX_W_0F381A_P_2, EVEX_W_0F381B_P_2,
344 EVEX_W_0F381E_P_2, EVEX_W_0F381F_P_2,
345 EVEX_W_0F3837_P_2, EVEX_W_0F3859_P_2,
346 EVEX_W_0F385A_P_2, EVEX_W_0F385B_P_2,
347 EVEX_W_0F3870_P_2, EVEX_W_0F387A_P_2,
348 EVEX_W_0F387B_P_2, EVEX_W_0F3883_P_2,
349 EVEX_W_0F3891_P_2, EVEX_W_0F3893_P_2,
350 EVEX_W_0F38A1_P_2, EVEX_W_0F38A3_P_2,
351 EVEX_W_0F38C7_R_1_P_2, EVEX_W_0F38C7_R_2_P_2,
352 EVEX_W_0F38C7_R_5_P_2, EVEX_W_0F38C7_R_6_P_2,
353 EVEX_W_0F3A00_P_2, EVEX_W_0F3A01_P_2,
354 EVEX_W_0F3A05_P_2, EVEX_W_0F3A08_P_2,
355 EVEX_W_0F3A09_P_2, EVEX_W_0F3A0A_P_2,
356 EVEX_W_0F3A0B_P_2, EVEX_W_0F3A18_P_2,
357 EVEX_W_0F3A19_P_2, EVEX_W_0F3A1A_P_2,
358 EVEX_W_0F3A1B_P_2, EVEX_W_0F3A21_P_2,
359 EVEX_W_0F3A23_P_2, EVEX_W_0F3A38_P_2,
360 EVEX_W_0F3A39_P_2, EVEX_W_0F3A3A_P_2,
361 EVEX_W_0F3A3B_P_2, EVEX_W_0F3A42_P_2,
362 EVEX_W_0F3A43_P_2, EVEX_W_0F3A70_P_2,
363 EVEX_W_0F3A72_P_2): Rename to ...
364 (MOD_0F382A, MOD_0F38F5, MOD_VEX_0FD7, MOD_VEX_0FE7,
365 MOD_VEX_0F381A, MOD_VEX_0F382A, MOD_VEX_0F382C, MOD_VEX_0F382D,
366 MOD_VEX_0F382E, MOD_VEX_0F382F, MOD_VEX_0F385A, MOD_VEX_0F388C,
367 MOD_VEX_0F388E, MOD_VEX_0F3A30_L_0_W_0,
368 MOD_VEX_0F3A30_L_0_W_1, MOD_VEX_0F3A31_L_0_W_0,
369 MOD_VEX_0F3A31_L_0_W_1, MOD_VEX_0F3A32_L_0_W_0,
370 MOD_VEX_0F3A32_L_0_W_1, MOD_VEX_0F3A33_L_0_W_0,
371 MOD_VEX_0F3A33_L_0_W_1, MOD_EVEX_0F381A_W_0,
372 MOD_EVEX_0F381A_W_1, MOD_EVEX_0F381B_W_0, MOD_EVEX_0F381B_W_1,
373 MOD_EVEX_0F385A_W_0, MOD_EVEX_0F385A_W_1, MOD_EVEX_0F385B_W_0,
374 MOD_EVEX_0F385B_W_1, VEX_LEN_0F6E, VEX_LEN_0FC4, VEX_LEN_0FC5,
375 VEX_LEN_0FD6, VEX_LEN_0FF7, VEX_LEN_0F3816, VEX_LEN_0F3819,
376 VEX_LEN_0F381A_M_0, VEX_LEN_0F3836, VEX_LEN_0F3841,
377 VEX_LEN_0F385A_M_0, VEX_LEN_0F38DB, VEX_LEN_0F3A00,
378 VEX_LEN_0F3A01, VEX_LEN_0F3A06, VEX_LEN_0F3A14, VEX_LEN_0F3A15,
379 VEX_LEN_0F3A16, VEX_LEN_0F3A17, VEX_LEN_0F3A18, VEX_LEN_0F3A19,
380 VEX_LEN_0F3A20, VEX_LEN_0F3A21, VEX_LEN_0F3A22, VEX_LEN_0F3A30,
381 VEX_LEN_0F3A31, VEX_LEN_0F3A32, VEX_LEN_0F3A33, VEX_LEN_0F3A38,
382 VEX_LEN_0F3A39, VEX_LEN_0F3A41, VEX_LEN_0F3A46, VEX_LEN_0F3A60,
383 VEX_LEN_0F3A61, VEX_LEN_0F3A62, VEX_LEN_0F3A63, VEX_LEN_0F3ADF,
384 EVEX_LEN_0F6E, EVEX_LEN_0FC4, EVEX_LEN_0FC5, EVEX_LEN_0FD6,
385 EVEX_LEN_0F3816, EVEX_LEN_0F3819_W_0, EVEX_LEN_0F3819_W_1,
386 EVEX_LEN_0F381A_W_0_M_0, EVEX_LEN_0F381A_W_1_M_0,
387 EVEX_LEN_0F381B_W_0_M_0, EVEX_LEN_0F381B_W_1_M_0,
388 EVEX_LEN_0F3836, EVEX_LEN_0F385A_W_0_M_0,
389 EVEX_LEN_0F385A_W_1_M_0, EVEX_LEN_0F385B_W_0_M_0,
390 EVEX_LEN_0F385B_W_1_M_0, EVEX_LEN_0F38C6_R_1_M_0,
391 EVEX_LEN_0F38C6_R_2_M_0, EVEX_LEN_0F38C6_R_5_M_0,
392 EVEX_LEN_0F38C6_R_6_M_0, EVEX_LEN_0F38C7_R_1_M_0_W_0,
393 EVEX_LEN_0F38C7_R_1_M_0_W_1, EVEX_LEN_0F38C7_R_2_M_0_W_0,
394 EVEX_LEN_0F38C7_R_2_M_0_W_1, EVEX_LEN_0F38C7_R_5_M_0_W_0,
395 EVEX_LEN_0F38C7_R_5_M_0_W_1, EVEX_LEN_0F38C7_R_6_M_0_W_0,
396 EVEX_LEN_0F38C7_R_6_M_0_W_1, EVEX_LEN_0F3A00_W_1,
397 EVEX_LEN_0F3A01_W_1, EVEX_LEN_0F3A14, EVEX_LEN_0F3A15,
398 EVEX_LEN_0F3A16, EVEX_LEN_0F3A17, EVEX_LEN_0F3A18_W_0,
399 EVEX_LEN_0F3A18_W_1, EVEX_LEN_0F3A19_W_0,
400 EVEX_LEN_0F3A19_W_1, EVEX_LEN_0F3A1A_W_0,
401 EVEX_LEN_0F3A1A_W_1, EVEX_LEN_0F3A1B_W_0,
402 EVEX_LEN_0F3A1B_W_1, EVEX_LEN_0F3A20, EVEX_LEN_0F3A21_W_0,
403 EVEX_LEN_0F3A22, EVEX_LEN_0F3A23_W_0, EVEX_LEN_0F3A23_W_1,
404 EVEX_LEN_0F3A38_W_0, EVEX_LEN_0F3A38_W_1,
405 EVEX_LEN_0F3A39_W_0, EVEX_LEN_0F3A39_W_1,
406 EVEX_LEN_0F3A3A_W_0, EVEX_LEN_0F3A3A_W_1,
407 EVEX_LEN_0F3A3B_W_0, EVEX_LEN_0F3A3B_W_1,
408 EVEX_LEN_0F3A43_W_0, EVEX_LEN_0F3A43_W_1
409 VEX_W_0F380C, VEX_W_0F380D, VEX_W_0F380E, VEX_W_0F380F,
410 VEX_W_0F3813, VEX_W_0F3816_L_1, VEX_W_0F3818,
411 VEX_W_0F3819_L_1, VEX_W_0F381A_M_0_L_1, VEX_W_0F382C_M_0,
412 VEX_W_0F382D_M_0, VEX_W_0F382E_M_0, VEX_W_0F382F_M_0,
413 VEX_W_0F3836, VEX_W_0F3846, VEX_W_0F3858, VEX_W_0F3859,
414 VEX_W_0F385A_M_0_L_0, VEX_W_0F3878, VEX_W_0F3879,
415 VEX_W_0F38CF, VEX_W_0F3A00_L_1, VEX_W_0F3A01_L_1,
416 VEX_W_0F3A02, VEX_W_0F3A04, VEX_W_0F3A05, VEX_W_0F3A06_L_1,
417 VEX_W_0F3A18_L_1, VEX_W_0F3A19_L_1, VEX_W_0F3A1D,
418 VEX_W_0F3A30_L_0, VEX_W_0F3A31_L_0, VEX_W_0F3A32_L_0,
419 VEX_W_0F3A33_L_0, VEX_W_0F3A38_L_1, VEX_W_0F3A39_L_1,
420 VEX_W_0F3A46_L_1, VEX_W_0F3A4A, VEX_W_0F3A4B, VEX_W_0F3A4C,
421 VEX_W_0F3ACE, VEX_W_0F3ACF, EVEX_W_0F66, EVEX_W_0F72_R_2,
422 EVEX_W_0F72_R_6, EVEX_W_0F73_R_2, EVEX_W_0F73_R_6,
423 EVEX_W_0F76, EVEX_W_0FD6_L_0, EVEX_W_0FE7, EVEX_W_0F380D,
424 EVEX_W_0F3819, EVEX_W_0F381A, EVEX_W_0F381B, EVEX_W_0F381E,
425 EVEX_W_0F381F, EVEX_W_0F3837, EVEX_W_0F3859, EVEX_W_0F385A,
426 EVEX_W_0F385B, EVEX_W_0F3870, EVEX_W_0F387A, EVEX_W_0F387B,
427 EVEX_W_0F3883, EVEX_W_0F3891, EVEX_W_0F3893, EVEX_W_0F38A1,
428 EVEX_W_0F38A3, EVEX_W_0F38C7_R_1_M_0,
429 EVEX_W_0F38C7_R_2_M_0, EVEX_W_0F38C7_R_5_M_0,
430 EVEX_W_0F38C7_R_6_M_0, EVEX_W_0F3A00, EVEX_W_0F3A01,
431 EVEX_W_0F3A05, EVEX_W_0F3A08, EVEX_W_0F3A09, EVEX_W_0F3A0A,
432 EVEX_W_0F3A0B, EVEX_W_0F3A18, EVEX_W_0F3A19, EVEX_W_0F3A1A,
433 EVEX_W_0F3A1B, EVEX_W_0F3A21, EVEX_W_0F3A23, EVEX_W_0F3A38,
434 EVEX_W_0F3A39, EVEX_W_0F3A3A, EVEX_W_0F3A3B, EVEX_W_0F3A42,
435 EVEX_W_0F3A43, EVEX_W_0F3A70, EVEX_W_0F3A72): ... these
437 (dis386_twobyte, three_byte_table, vex_table, vex_len_table,
438 vex_w_table, mod_table): Replace / remove respective entries.
439 (print_insn): Move up dp->prefix_requirement handling. Handle
441 * i386-dis-evex.h, i386-dis-evex-len.h, i386-dis-evex-mod.h,
442 i386-dis-evex-prefix.h, i386-dis-evex-reg.h, i386-dis-evex-w.h:
443 Replace / remove respective entries.
445 2020-07-14 Jan Beulich <jbeulich@suse.com>
447 * i386-dis.c (PREFIX_EVEX_0F2C, PREFIX_EVEX_0F2D,
448 PREFIX_EVEX_0F2E, PREFIX_EVEX_0F2F): Delete.
449 (prefix_table): Add EXxEVexS operand to vcvttss2si, vcvttsd2si,
450 vcvtss2si, vcvtsd2si, vucomiss, and vucomisd table entries.
451 Retain X macro and PREFIX_OPCODE use from tjhe EVEX table for
453 * i386-dis-evex.h (evex_table): Reference VEX table for opcodes
454 0F2C, 0F2D, 0F2E, and 0F2F.
455 * i386-dis-evex-prefix.h: Delete opcode 0F2C, 0F2D, 0F2E, and
458 2020-07-14 Jan Beulich <jbeulich@suse.com>
460 * i386-dis.c (OP_VexR, VexScalarR): New.
461 (OP_EX_Vex, OP_XMM_Vex, EXdVexScalarS, EXqVexScalarS,
462 XMVexScalar, d_scalar_swap_mode, q_scalar_swap_mode,
463 need_vex_reg): Delete.
464 (prefix_table): Replace VexScalar by VexScalarR and
465 XMVexScalar by XMScalar for vmovss and vmovsd. Replace
466 EXdVexScalarS by EXdS and EXqVexScalarS by EXqS.
467 (vex_len_table): Replace EXqVexScalarS by EXqS.
468 (get_valid_dis386): Don't set need_vex_reg.
469 (print_insn): Don't initialize need_vex_reg.
470 (intel_operand_size, OP_E_memory): Drop d_scalar_swap_mode and
471 q_scalar_swap_mode cases.
472 (OP_EX): Don't check for d_scalar_swap_mode and
474 (OP_VEX): Done check need_vex_reg.
475 * i386-dis-evex-w.h: Replace VexScalar by VexScalarR and
476 XMVexScalar by XMScalar for vmovss and vmovsd. Replace
477 EXdVexScalarS by EXdS and EXqVexScalarS by EXqS.
479 2020-07-14 Jan Beulich <jbeulich@suse.com>
481 * i386-dis.c (Vex128, Vex256, vex128_mode, vex256_mode): Delete.
482 (VEX_W_0F381A_P_2_M_0, VEX_W_0F385A_P_2_M_0, VEX_W_0F3A06_P_2,
483 VEX_W_0F3A18_P_2, VEX_W_0F3A19_P_2, VEX_W_0F3A38_P_2,
484 VEX_W_0F3A39_P_2, VEX_W_0F3A46_P_2): Rename to ...
485 (VEX_W_0F381A_P_2_M_0_L_0, VEX_W_0F385A_P_2_M_0_L_0,
486 VEX_W_0F3A06_P_2_L_0, VEX_W_0F3A18_P_2_L_0,
487 VEX_W_0F3A19_P_2_L_0, VEX_W_0F3A38_P_2_L_0,
488 VEX_W_0F3A39_P_2_L_0, VEX_W_0F3A46_P_2_L_0): ... respectively.
489 (vex_table): Replace Vex128 by Vex.
490 (vex_len_table): Likewise. Adjust referenced enum names.
491 (vex_w_table): Replace Vex128 and Vex256 by Vex. Adjust
492 referenced enum names.
493 (OP_VEX): Drop vex128_mode and vex256_mode cases.
494 * i386-dis-evex-len.h (evex_len_table): Replace Vex128 by Vex.
496 2020-07-14 Jan Beulich <jbeulich@suse.com>
498 * i386-dis.c (dis386): "LW" description now applies to "DQ".
499 (putop): Handle "DQ". Don't handle "LW" anymore.
500 (prefix_table, mod_table): Replace %LW by %DQ.
501 * i386-dis-evex-len.h, i386-dis-evex-prefix.h: Likewise.
503 2020-07-14 Jan Beulich <jbeulich@suse.com>
505 * i386-dis.c (OP_E_memory): Move xmm_mw_mode, xmm_mb_mode,
506 dqd_mode, xmm_md_mode, d_mode, d_swap_mode, and
507 d_scalar_swap_mode case handling. Move shift adjsutment into
508 the case its applicable to.
510 2020-07-14 Jan Beulich <jbeulich@suse.com>
512 * i386-dis.c (EVEX_W_0F3862_P_2, EVEX_W_0F3863_P_2): Delete.
513 (EXbScalar, EXwScalar): Fold to ...
514 (EXbwUnit): ... this.
515 (b_scalar_mode, w_scalar_mode): Fold to ...
516 (bw_unit_mode): ... this.
517 (intel_operand_size, OP_E_memory): Replace b_scalar_mode /
518 w_scalar_mode handling by bw_unit_mode one.
519 * i386-dis-evex-w.h: Move entries for opcodes 0F3862 and 0F3863
521 * i386-dis-evex-prefix.h: ... here.
523 2020-07-14 Jan Beulich <jbeulich@suse.com>
525 * i386-dis.c (PCMPESTR_Fixup): Delete.
526 (dis386): Adjust "LQ" description.
527 (prefix_table): Make %LQ apply to AT&T case only for cvtsi2ss,
528 cvtsi2sd, ptwrite, vcvtsi2ss, and vcvtsi2sd. Replace use of
529 PCMPESTR_Fixup by !%LQ and EXx for pcmpestrm, pcmpestri,
530 vpcmpestrm, and vpcmpestri.
531 (putop): Honor "cond" when handling LQ.
532 * i386-dis-evex-prefix.h: Make %LQ apply to AT&T case only for
533 vcvtsi2ss and vcvtusi2ss.
534 * i386-dis-evex-w.h: Make %LQ apply to AT&T case only for
535 vcvtsi2sd and vcvtusi2sd.
537 2020-07-14 Jan Beulich <jbeulich@suse.com>
539 * i386-dis.c (VCMP_Fixup, VCMP): Delete.
540 (simd_cmp_op): Add const.
541 (vex_cmp_op): Move up and drop initial 8 entries. Add const.
542 (CMP_Fixup): Handle VEX case.
543 (prefix_table): Replace VCMP by CMP.
544 * i386-dis-evex-prefix.h, i386-dis-evex-w.h: Likewise.
546 2020-07-14 Jan Beulich <jbeulich@suse.com>
548 * i386-dis.c (MOVBE_Fixup): Delete.
550 (prefix_table): Use Mv for movbe entries.
552 2020-07-14 Jan Beulich <jbeulich@suse.com>
554 * i386-dis.c (CRC32_Fixup): Delete.
555 (prefix_table): Use Eb/Ev for crc32 entries.
557 2020-07-14 Jan Beulich <jbeulich@suse.com>
559 * i386-dis.c (OP_E_register, OP_G, OP_REG, CRC32_Fixup):
560 Conditionalize invocations of "USED_REX (0)".
562 2020-07-14 Jan Beulich <jbeulich@suse.com>
564 * i386-dis.c (eBX, eCX, eDX, eSP, eBP, eSI, eDI, DL, BL, AH,
565 CH, DH, BH, AX, DX): Delete.
566 (OP_IMREG): Drop handling of eBX_reg, eCX_reg, eDX_reg, eSP_reg,
567 eBP_reg, eSI_reg, eDI_reg, dl_reg, bl_reg, ah_reg, ch_reg,
568 dh_reg, bh_reg, ax_reg, and dx_reg. Simplify what's left.
570 2020-07-10 Lili Cui <lili.cui@intel.com>
572 * i386-dis.c (TMM): New.
575 (MVexSIBMEM): Likewise.
576 (tmm_mode): Likewise.
577 (vex_sibmem_mode): Likewise.
578 (REG_VEX_0F3849_X86_64_P_0_W_0_M_1): Likewise.
579 (MOD_VEX_0F3849_X86_64_P_0_W_0): Likewise.
580 (MOD_VEX_0F3849_X86_64_P_2_W_0): Likewise.
581 (MOD_VEX_0F3849_X86_64_P_3_W_0): Likewise.
582 (MOD_VEX_0F384B_X86_64_P_1_W_0): Likewise.
583 (MOD_VEX_0F384B_X86_64_P_2_W_0): Likewise.
584 (MOD_VEX_0F384B_X86_64_P_3_W_0): Likewise.
585 (MOD_VEX_0F385C_X86_64_P_1_W_0): Likewise.
586 (MOD_VEX_0F385E_X86_64_P_0_W_0): Likewise.
587 (MOD_VEX_0F385E_X86_64_P_1_W_0): Likewise.
588 (MOD_VEX_0F385E_X86_64_P_2_W_0): Likewise.
589 (MOD_VEX_0F385E_X86_64_P_3_W_0): Likewise.
590 (RM_VEX_0F3849_X86_64_P_0_W_0_M_1_R_0): Likewise.
591 (PREFIX_VEX_0F3849_X86_64): Likewise.
592 (PREFIX_VEX_0F384B_X86_64): Likewise.
593 (PREFIX_VEX_0F385C_X86_64): Likewise.
594 (PREFIX_VEX_0F385E_X86_64): Likewise.
595 (X86_64_VEX_0F3849): Likewise.
596 (X86_64_VEX_0F384B): Likewise.
597 (X86_64_VEX_0F385C): Likewise.
598 (X86_64_VEX_0F385E): Likewise.
599 (VEX_LEN_0F3849_X86_64_P_0_W_0_M_0): Likewise.
600 (VEX_LEN_0F3849_X86_64_P_0_W_0_M_1_REG_0_RM_0): Likewise.
601 (VEX_LEN_0F3849_X86_64_P_2_W_0_M_0): Likewise.
602 (VEX_LEN_0F3849_X86_64_P_3_W_0_M_0): Likewise.
603 (VEX_LEN_0F384B_X86_64_P_1_W_0_M_0): Likewise.
604 (VEX_LEN_0F384B_X86_64_P_2_W_0_M_0): Likewise.
605 (VEX_LEN_0F384B_X86_64_P_3_W_0_M_0): Likewise.
606 (VEX_LEN_0F385C_X86_64_P_1_W_0_M_0): Likewise.
607 (VEX_LEN_0F385E_X86_64_P_0_W_0_M_0): Likewise.
608 (VEX_LEN_0F385E_X86_64_P_1_W_0_M_0): Likewise.
609 (VEX_LEN_0F385E_X86_64_P_2_W_0_M_0): Likewise.
610 (VEX_LEN_0F385E_X86_64_P_3_W_0_M_0): Likewise.
611 (VEX_W_0F3849_X86_64_P_0): Likewise.
612 (VEX_W_0F3849_X86_64_P_2): Likewise.
613 (VEX_W_0F3849_X86_64_P_3): Likewise.
614 (VEX_W_0F384B_X86_64_P_1): Likewise.
615 (VEX_W_0F384B_X86_64_P_2): Likewise.
616 (VEX_W_0F384B_X86_64_P_3): Likewise.
617 (VEX_W_0F385C_X86_64_P_1): Likewise.
618 (VEX_W_0F385E_X86_64_P_0): Likewise.
619 (VEX_W_0F385E_X86_64_P_1): Likewise.
620 (VEX_W_0F385E_X86_64_P_2): Likewise.
621 (VEX_W_0F385E_X86_64_P_3): Likewise.
622 (names_tmm): Likewise.
623 (att_names_tmm): Likewise.
624 (intel_operand_size): Handle void_mode.
625 (OP_XMM): Handle tmm_mode.
628 * i386-gen.c (cpu_flag_init): Add entries for CpuAMX_INT8,
629 CpuAMX_BF16 and CpuAMX_TILE.
630 (operand_type_shorthands): Add RegTMM.
631 (operand_type_init): Likewise.
632 (operand_types): Add Tmmword.
633 (cpu_flag_init): Add CPU_AMX_INT8, CpuAMX_BF16 and CpuAMX_TILE.
634 (cpu_flags): Add CpuAMX_INT8, CpuAMX_BF16 and CpuAMX_TILE.
635 * i386-opc.h (CpuAMX_INT8): New.
636 (CpuAMX_BF16): Likewise.
637 (CpuAMX_TILE): Likewise.
640 (i386_cpu_flags): Add cpuamx_int8, cpuamx_bf16 and cpuamx_tile.
641 (i386_opcode_modifier): Extend width of fields vexvvvv and sib.
642 (i386_operand_type): Add tmmword.
643 * i386-opc.tbl: Add AMX instructions.
644 * i386-reg.tbl: Add AMX registers.
645 * i386-init.h: Regenerated.
646 * i386-tbl.h: Likewise.
648 2020-07-08 Jan Beulich <jbeulich@suse.com>
650 * i386-dis.c (OP_LWPCB_E, OP_LWP_E): Delete.
651 (REG_XOP_LWPCB, REG_XOP_LWP, REG_XOP_TBM_01, REG_XOP_TBM_02):
653 (REG_0FXOP_09_12_M_1_L_0, REG_0FXOP_0A_12_L_0,
654 REG_0FXOP_09_01_L_0, REG_0FXOP_09_02_L_0): ... these
656 (MOD_VEX_0FXOP_09_12, VEX_LEN_0FXOP_08_85, VEX_LEN_0FXOP_08_86,
657 VEX_LEN_0FXOP_08_87, VEX_LEN_0FXOP_08_8E, VEX_LEN_0FXOP_08_8F,
658 VEX_LEN_0FXOP_08_95, VEX_LEN_0FXOP_08_96, VEX_LEN_0FXOP_08_97,
659 VEX_LEN_0FXOP_08_9E, VEX_LEN_0FXOP_08_9F, VEX_LEN_0FXOP_08_A3,
660 VEX_LEN_0FXOP_08_A6, VEX_LEN_0FXOP_08_B6, VEX_LEN_0FXOP_08_C0,
661 VEX_LEN_0FXOP_08_C1, VEX_LEN_0FXOP_08_C2, VEX_LEN_0FXOP_08_C3,
662 VEX_LEN_0FXOP_09_01, VEX_LEN_0FXOP_09_02, VEX_LEN_0FXOP_09_12_M_1,
663 VEX_LEN_0FXOP_09_90, VEX_LEN_0FXOP_09_91, VEX_LEN_0FXOP_09_92,
664 VEX_LEN_0FXOP_09_93, VEX_LEN_0FXOP_09_94, VEX_LEN_0FXOP_09_95,
665 VEX_LEN_0FXOP_09_96, VEX_LEN_0FXOP_09_97, VEX_LEN_0FXOP_09_98,
666 VEX_LEN_0FXOP_09_99, VEX_LEN_0FXOP_09_9A, VEX_LEN_0FXOP_09_9B,
667 VEX_LEN_0FXOP_09_C1, VEX_LEN_0FXOP_09_C2, VEX_LEN_0FXOP_09_C3,
668 VEX_LEN_0FXOP_09_C6, VEX_LEN_0FXOP_09_C7, VEX_LEN_0FXOP_09_CB,
669 VEX_LEN_0FXOP_09_D1, VEX_LEN_0FXOP_09_D2, VEX_LEN_0FXOP_09_D3,
670 VEX_LEN_0FXOP_09_D6, VEX_LEN_0FXOP_09_D7, VEX_LEN_0FXOP_09_DB,
671 VEX_LEN_0FXOP_09_E1, VEX_LEN_0FXOP_09_E2, VEX_LEN_0FXOP_09_E3,
672 VEX_LEN_0FXOP_0A_12, VEX_W_0FXOP_08_85_L_0,
673 VEX_W_0FXOP_08_86_L_0, VEX_W_0FXOP_08_87_L_0,
674 VEX_W_0FXOP_08_8E_L_0, VEX_W_0FXOP_08_8F_L_0,
675 VEX_W_0FXOP_08_95_L_0, VEX_W_0FXOP_08_96_L_0,
676 VEX_W_0FXOP_08_97_L_0, VEX_W_0FXOP_08_9E_L_0,
677 VEX_W_0FXOP_08_9F_L_0, VEX_W_0FXOP_08_A6_L_0,
678 VEX_W_0FXOP_08_B6_L_0, VEX_W_0FXOP_08_C0_L_0,
679 VEX_W_0FXOP_08_C1_L_0, VEX_W_0FXOP_08_C2_L_0,
680 VEX_W_0FXOP_08_C3_L_0, VEX_W_0FXOP_08_CC_L_0,
681 VEX_W_0FXOP_08_CD_L_0, VEX_W_0FXOP_08_CE_L_0,
682 VEX_W_0FXOP_08_CF_L_0, VEX_W_0FXOP_08_EC_L_0,
683 VEX_W_0FXOP_08_ED_L_0, VEX_W_0FXOP_08_EE_L_0,
684 VEX_W_0FXOP_08_EF_L_0, VEX_W_0FXOP_09_C1_L_0,
685 VEX_W_0FXOP_09_C2_L_0, VEX_W_0FXOP_09_C3_L_0,
686 VEX_W_0FXOP_09_C6_L_0, VEX_W_0FXOP_09_C7_L_0,
687 VEX_W_0FXOP_09_CB_L_0, VEX_W_0FXOP_09_D1_L_0,
688 VEX_W_0FXOP_09_D2_L_0, VEX_W_0FXOP_09_D3_L_0,
689 VEX_W_0FXOP_09_D6_L_0, VEX_W_0FXOP_09_D7_L_0,
690 VEX_W_0FXOP_09_DB_L_0, VEX_W_0FXOP_09_E1_L_0,
691 VEX_W_0FXOP_09_E2_L_0, VEX_W_0FXOP_09_E3_L_0): New enumerators.
692 (reg_table): Re-order XOP entries. Adjust their operands.
693 (xop_table): Replace 08_85, 08_86, 08_87, 08_8E, 08_8F, 08_95,
694 08_96, 08_97, 08_9E, 08_9F, 08_A3, 08_A6, 08_B6, 08_C0, 08_C1,
695 08_C2, 08_C3, 09_01, 09_02, 09_12, 09_90, 09_91, 09_92, 09_93,
696 09_94, 09_95, 09_96, 09_97, 09_98, 09_99, 09_9A, 09_9B, 09_C1,
697 09_C2, 09_C3, 09_C6, 09_C7, 09_CB, 09_D1, 09_D2, 09_D3, 09_D6,
698 09_D7, 09_DB, 09_E1, 09_E2, 09_E3, and VEX_LEN_0FXOP_0A_12
699 entries by references ...
700 (vex_len_table): ... to resepctive new entries here. For several
701 new and existing entries reference ...
702 (vex_w_table): ... new entries here.
703 (mod_table): New MOD_VEX_0FXOP_09_12 entry.
705 2020-07-08 Jan Beulich <jbeulich@suse.com>
707 * i386-dis.c (XMVexScalarI4): Define.
708 (VEX_LEN_0F3A6A_P_2, VEX_LEN_0F3A6B_P_2, VEX_LEN_0F3A6E_P_2,
709 VEX_LEN_0F3A6F_P_2, VEX_LEN_0F3A7A_P_2, VEX_LEN_0F3A7B_P_2,
710 VEX_LEN_0F3A7E_P_2, VEX_LEN_0F3A7F_P_2): Delete.
711 (vex_len_table): Move scalar FMA4 entries ...
712 (prefix_table): ... here.
713 (OP_REG_VexI4): Handle scalar_mode.
714 * i386-opc.tbl: Use VexLIG for scalar FMA4 insns.
715 * i386-tbl.h: Re-generate.
717 2020-07-08 Jan Beulich <jbeulich@suse.com>
719 * i386-dis.c (OP_Vex_2src_1, OP_Vex_2src_2, Vex_2src_1,
721 (OP_VexW, VexW): New.
722 (xop_table): Use EXx for rotates by immediate. Use EXx and VexW
723 for shifts and rotates by register.
725 2020-07-08 Jan Beulich <jbeulich@suse.com>
727 * i386-dis.c (OP_EX_VexImmW, OP_XMM_VexW, EXVexImmW, XMVexW,
728 VEX_W_0F3A48_P_2, VEX_W_0F3A49_P_2, vex_w_done, get_vex_imm8,
729 OP_EX_VexReg): Delete.
730 (OP_VexI4, VexI4): New.
731 (vex_w_table): Move vpermil2ps and vpermil2pd entries ...
732 (prefix_table): ... here.
733 (print_insn): Drop setting of vex_w_done.
735 2020-07-08 Jan Beulich <jbeulich@suse.com>
737 * i386-dis.c (OP_EX_VexW, EXVexW, EXdVexW, EXqVexW): Delete.
738 (prefix_table, vex_len_table): Replace operands for FMA4 insns.
739 (xop_table): Replace operands of 4-operand insns.
740 (OP_REG_VexI4): Move VEX.W based operand swaping here.
742 2020-07-07 Claudiu Zissulescu <claziss@synopsys.com>
744 * arc-opc.c (insert_rbd): New function.
747 * arc-tbl.h (vadd2, vadd4h, vmac2h, vmpy2h, vsub4h): Update
750 2020-07-07 Jan Beulich <jbeulich@suse.com>
752 * i386-dis.c (EVEX_W_0F3826_P_1, EVEX_W_0F3826_P_2,
753 EVEX_W_0F3828_P_1, EVEX_W_0F3829_P_1, EVEX_W_0F3854_P_2,
754 EVEX_W_0F3866_P_2, EVEX_W_0F3875_P_2, EVEX_W_0F387D_P_2,
755 EVEX_W_0F388D_P_2, EVEX_W_0F3A3E_P_2, EVEX_W_0F3A3F_P_2):
757 (putop): Handle "BW".
758 * i386-dis-evex-w.h: Move entries for opcodes 0F3826, 0F3826,
759 0F3828, 0F3829, 0F3854, 0F3866, 0F3875, 0F387D, 0F388D, 0F3A3E,
761 * i386-dis-evex-prefix.h: ... here.
763 2020-07-06 Jan Beulich <jbeulich@suse.com>
765 * i386-dis.c (VEX_LEN_0FXOP_09_80, VEX_LEN_0FXOP_09_81): Delete.
766 (VEX_LEN_0FXOP_09_82_W_0, VEX_LEN_0FXOP_09_83_W_0,
767 VEX_W_0FXOP_09_80, VEX_W_0FXOP_09_81, VEX_W_0FXOP_09_82,
768 VEX_W_0FXOP_09_83): New enumerators.
769 (xop_table): Reference the above.
770 (vex_len_table): Replace vfrczp* entries by vfrczs* ones.
771 (vex_w_table): New VEX_W_0FXOP_09_80, VEX_W_0FXOP_09_81,
772 VEX_W_0FXOP_09_82, and VEX_W_0FXOP_09_83 entries.
773 (get_valid_dis386): Return bad_opcode for XOP.PP != 0.
775 2020-07-06 Jan Beulich <jbeulich@suse.com>
777 * i386-dis.c (EVEX_W_0F3838_P_1,
778 EVEX_W_0F3839_P_1, EVEX_W_0F3840_P_2, EVEX_W_0F3855_P_2,
779 EVEX_W_0F3868_P_3, EVEX_W_0F3871_P_2, EVEX_W_0F3873_P_2,
780 EVEX_W_0F3A50_P_2, EVEX_W_0F3A51_P_2, EVEX_W_0F3A56_P_2,
781 EVEX_W_0F3A57_P_2, EVEX_W_0F3A66_P_2, EVEX_W_0F3A67_P_2,
782 EVEX_W_0F3A71_P_2, EVEX_W_0F3A73_P_2): Delete.
783 (putop): Centralize management of last[]. Delete SAVE_LAST.
784 * i386-dis-evex-w.h: Move entries for opcodes 0F3838, 0F3839,
785 0F3840, 0F3855, 0F3868, 0F3871, 0F3873, 0F3A50, 0F3A51, 0F3A56,
786 0F3A57, 0F3A66, 0F3A67, 0F3A71, and 0F3A73 ...
787 * i386-dis-evex-prefix.h: here.
789 2020-07-06 Jan Beulich <jbeulich@suse.com>
791 * i386-dis.c (MOD_EVEX_0F381A_P_2_W_0, MOD_EVEX_0F381A_P_2_W_1,
792 MOD_EVEX_0F381B_P_2_W_0, MOD_EVEX_0F381B_P_2_W_1,
793 MOD_EVEX_0F385A_P_2_W_0, MOD_EVEX_0F385A_P_2_W_1,
794 MOD_EVEX_0F385B_P_2_W_0, MOD_EVEX_0F385B_P_2_W_1): New
796 (EVEX_LEN_0F381A_P_2_W_0, EVEX_LEN_0F381A_P_2_W_1,
797 EVEX_LEN_0F381B_P_2_W_0, EVEX_LEN_0F381B_P_2_W_1,
798 EVEX_LEN_0F385A_P_2_W_0, EVEX_LEN_0F385A_P_2_W_1,
799 EVEX_LEN_0F385B_P_2_W_0, EVEX_LEN_0F385B_P_2_W_1): Rename to ...
800 (EVEX_LEN_0F381A_P_2_W_0_M_0, EVEX_LEN_0F381A_P_2_W_1_M_0,
801 EVEX_LEN_0F381B_P_2_W_0_M_0, EVEX_LEN_0F381B_P_2_W_1_M_0,
802 EVEX_LEN_0F385A_P_2_W_0_M_0, EVEX_LEN_0F385A_P_2_W_1_M_0,
803 EVEX_LEN_0F385B_P_2_W_0_M_0, EVEX_LEN_0F385B_P_2_W_1_M_0): ...
805 * i386-dis-evex-len.h: Adjust comments.
806 * i386-dis-evex-mod.h: New MOD_EVEX_0F381A_P_2_W_0,
807 MOD_EVEX_0F381A_P_2_W_1, MOD_EVEX_0F381B_P_2_W_0,
808 MOD_EVEX_0F381B_P_2_W_1, MOD_EVEX_0F385A_P_2_W_0,
809 MOD_EVEX_0F385A_P_2_W_1, MOD_EVEX_0F385B_P_2_W_0, and
810 MOD_EVEX_0F385B_P_2_W_1 table entries.
811 * i386-dis-evex-w.h: Reference mod_table[] for
812 EVEX_W_0F381A_P_2, EVEX_W_0F381B_P_2, EVEX_W_0F385A_P_2, and
815 2020-07-06 Jan Beulich <jbeulich@suse.com>
817 * i386-dis-evex-len.h (vbroadcastf32x8, vbroadcasti32x8,
818 vinsertf32x8, vinsertf64x4, vextractf32x8, vextractf64x4): Use
820 (vinserti32x8, vinserti64x4, vextracti32x8, vextracti64x4):
821 Likewise. Mark 256-bit entries invalid.
823 2020-07-06 Jan Beulich <jbeulich@suse.com>
825 * i386-dis.c (PREFIX_EVEX_0F62, PREFIX_EVEX_0F6A,
826 PREFIX_EVEX_0F6B, PREFIX_EVEX_0F6C, PREFIX_EVEX_0F6D,
827 PREFIX_EVEX_0FD2, PREFIX_EVEX_0FD3, PREFIX_EVEX_0FD4,
828 PREFIX_EVEX_0FF2, PREFIX_EVEX_0FF3, PREFIX_EVEX_0FF4,
829 PREFIX_EVEX_0FFA, PREFIX_EVEX_0FFB, PREFIX_EVEX_0FFE,
830 PREFIX_EVEX_0F382B): Delete.
831 (EVEX_W_0F62_P_2, EVEX_W_0F6A_P_2, EVEX_W_0F6B_P_2,
832 EVEX_W_0F6C_P_2, EVEX_W_0F6D_P_2, EVEX_W_0FD2_P_2,
833 EVEX_W_0FD3_P_2, EVEX_W_0FD4_P_2, EVEX_W_0FF2_P_2,
834 EVEX_W_0FF3_P_2, EVEX_W_0FF4_P_2, EVEX_W_0FFA_P_2,
835 EVEX_W_0FFB_P_2, EVEX_W_0FFE_P_2, EVEX_W_0F382B_P_2): Rename
837 (EVEX_W_0F62, EVEX_W_0F6A, EVEX_W_0F6B, EVEX_W_0F6C,
838 EVEX_W_0F6D, EVEX_W_0FD2, EVEX_W_0FD3, EVEX_W_0FD4,
839 EVEX_W_0FF2, EVEX_W_0FF3, EVEX_W_0FF4, EVEX_W_0FFA,
840 EVEX_W_0FFB, EVEX_W_0FFE, EVEX_W_0F382B): ... these
842 * i386-dis-evex.h (evex_table): Reference VEX_W table entries
843 for opcodes 0F62, 0F6A, 0F6B, 0F6C, 0F6D, 0FD2, 0FD3, 0FD4,
844 0FF2, 0FF3, 0FF4, 0FFA, 0FFB, 0FFE, 0F382B.
845 * i386-dis-evex-prefix.h (PREFIX_EVEX_0F62, PREFIX_EVEX_0F6A,
846 PREFIX_EVEX_0F6B, PREFIX_EVEX_0F6C, PREFIX_EVEX_0F6D,
847 PREFIX_EVEX_0FD2, PREFIX_EVEX_0FD3, PREFIX_EVEX_0FD4,
848 PREFIX_EVEX_0FF2, PREFIX_EVEX_0FF3, PREFIX_EVEX_0FF4,
849 PREFIX_EVEX_0FFA, PREFIX_EVEX_0FFB, PREFIX_EVEX_0FFE,
850 PREFIX_EVEX_0F382B): Remove table entries.
851 * i386-dis-evex-w.h: Reference VEX table entries for opcodes
852 0F62, 0F6A, 0F6B, 0F6C, 0F6D, 0FD2, 0FD3, 0FD4, 0FF2, 0FF3,
853 0FF4, 0FFA, 0FFB, 0FFE, 0F382B.
855 2020-07-06 Jan Beulich <jbeulich@suse.com>
857 * i386-dis.c (EVEX_LEN_0F3816_P_2, EVEX_LEN_0F3836_P_2,
858 EVEX_LEN_0F3A00_P_2_W_1, EVEX_LEN_0F3A01_P_2_W_1): New
860 * i386-dis-evex-len.h (evex_len_table): New EVEX_LEN_0F3816_P_2,
861 EVEX_LEN_0F3836_P_2, EVEX_LEN_0F3A00_P_2_W_1, and
862 EVEX_LEN_0F3A01_P_2_W_1 table entries.
863 * i386-dis-evex-prefix.h, i386-dis-evex-w.h: Reference the above
866 2020-07-06 Jan Beulich <jbeulich@suse.com>
868 * i386-dis.c (EVEX_LEN_0FC4_P_2, EVEX_LEN_0FC5_P_2,
869 EVEX_LEN_0F3A14_P_2, EVEX_LEN_0F3A15_P_2, EVEX_LEN_0F3A16_P_2,
870 EVEX_LEN_0F3A17_P_2, EVEX_LEN_0F3A20_P_2,
871 EVEX_LEN_0F3A21_P_2_W_0, EVEX_LEN_0F3A22_P_2): New enumerators.
872 * i386-dis-evex-len.h (evex_len_table): New EVEX_LEN_0FC4_P_2,
873 EVEX_LEN_0FC5_P_2, EVEX_LEN_0F3A14_P_2, EVEX_LEN_0F3A15_P_2,
874 EVEX_LEN_0F3A16_P_2, EVEX_LEN_0F3A17_P_2, EVEX_LEN_0F3A20_P_2,
875 EVEX_LEN_0F3A21_P_2_W_0, and EVEX_LEN_0F3A22_P_2 table entries.
876 * i386-dis-evex-prefix.h, i386-dis-evex-w.h: Reference the above
879 2020-07-06 Jan Beulich <jbeulich@suse.com>
881 * i386-dis.c (PREFIX_EVEX_0F3A1D, EVEX_W_0F3A1D_P_2): Delete.
882 (VEX_W_0F3813_P_2, VEX_W_0F3A1D_P_2): New enumerators.
883 (prefix_table): Reference VEX_W_0F3813_P_2 and VEX_W_0F3A1D_P_2
885 (vex_w_table): New VEX_W_0F3813_P_2 and VEX_W_0F3A1D_P_2 table
887 * i386-dis-evex.h (evex_table): Reference VEX table entry for
889 * i386-dis-evex-prefix.h (PREFIX_EVEX_0F3A1D): Delete table
891 * i386-dis-evex-w.h (EVEX_W_0F3A1D_P_2): Likewise.
893 2020-07-06 Jan Beulich <jbeulich@suse.com>
895 * i386-dis.c (PREFIX_EVEX_0F60, PREFIX_EVEX_0F61,
896 PREFIX_EVEX_0F63, PREFIX_EVEX_0F67, PREFIX_EVEX_0F68,
897 PREFIX_EVEX_0F69, PREFIX_EVEX_0FD1, PREFIX_EVEX_0FD5,
898 PREFIX_EVEX_0FD8, PREFIX_EVEX_0FD9, PREFIX_EVEX_0FDA,
899 PREFIX_EVEX_0FDC, PREFIX_EVEX_0FDD, PREFIX_EVEX_0FDE,
900 PREFIX_EVEX_0FE0, PREFIX_EVEX_0FE1, PREFIX_EVEX_0FE3,
901 PREFIX_EVEX_0FE4, PREFIX_EVEX_0FE5, PREFIX_EVEX_0FE8,
902 PREFIX_EVEX_0FE9, PREFIX_EVEX_0FEA, PREFIX_EVEX_0FEC,
903 PREFIX_EVEX_0FED, PREFIX_EVEX_0FEE, PREFIX_EVEX_0FF1,
904 PREFIX_EVEX_0FF5, PREFIX_EVEX_0FF6, PREFIX_EVEX_0FF8,
905 PREFIX_EVEX_0FF9, PREFIX_EVEX_0FFC, PREFIX_EVEX_0FFD,
906 PREFIX_EVEX_0F3800, PREFIX_EVEX_0F3804, PREFIX_EVEX_0F380B,
907 PREFIX_EVEX_0F380C, PREFIX_EVEX_0F3818, PREFIX_EVEX_0F381C,
908 PREFIX_EVEX_0F381D, PREFIX_EVEX_0F383C, PREFIX_EVEX_0F383E,
909 PREFIX_EVEX_0F3858, PREFIX_EVEX_0F3878, PREFIX_EVEX_0F3879,
910 PREFIX_EVEX_0F3896, PREFIX_EVEX_0F3897, PREFIX_EVEX_0F3898,
911 PREFIX_EVEX_0F3899, PREFIX_EVEX_0F389C, PREFIX_EVEX_0F389D,
912 PREFIX_EVEX_0F389E, PREFIX_EVEX_0F389F, PREFIX_EVEX_0F38A6,
913 PREFIX_EVEX_0F38A7, PREFIX_EVEX_0F38A8, PREFIX_EVEX_0F38A9,
914 PREFIX_EVEX_0F38AC, PREFIX_EVEX_0F38AD, PREFIX_EVEX_0F38AE,
915 PREFIX_EVEX_0F38AF, PREFIX_EVEX_0F38B6, PREFIX_EVEX_0F38B7,
916 PREFIX_EVEX_0F38B8, PREFIX_EVEX_0F38B9, PREFIX_EVEX_0F38BA,
917 PREFIX_EVEX_0F38BB, PREFIX_EVEX_0F38BC, PREFIX_EVEX_0F38BD,
918 PREFIX_EVEX_0F38BE, PREFIX_EVEX_0F38BF, PREFIX_EVEX_0F38CF,
919 PREFIX_EVEX_0F38DC, PREFIX_EVEX_0F38DD, PREFIX_EVEX_0F38DE,
920 PREFIX_EVEX_0F38DF, PREFIX_EVEX_0F3A04, PREFIX_EVEX_0F3A0F,
921 PREFIX_EVEX_0F3A44, PREFIX_EVEX_0F3ACE, PREFIX_EVEX_0F3ACF,
922 EVEX_W_0F380C_P_2, EVEX_W_0F3818_P_2, EVEX_W_0F3858_P_2,
923 EVEX_W_0F3878_P_2, EVEX_W_0F3879_P_2, EVEX_W_0F3A04_P_2,
924 EVEX_W_0F3ACE_P_2, EVEX_W_0F3ACF_P_2): Delete.
925 (prefix_table): Add EXxEVexR to FMA table entries.
926 (OP_Rounding): Move abort() invocation.
927 * i386-dis-evex.h (evex_table): Reference VEX table for opcodes
928 0F60, 0F61, 0F63, 0F67, 0F68, 0F69, 0FD1, 0FD5, 0FD8, 0FD9,
929 0FDA, 0FDC, 0FDD, 0FDE, 0FE0, 0FE1, 0FE3, 0FE4, 0FE5, 0FE8,
930 0FE9, 0FEA, 0FEC, 0FED, 0FEE, 0FF1, 0FF5, 0FF6, 0FF8, 0FF9,
931 0FFC, 0FFD, 0F3800, 0F3804, 0F380B, 0F380C, 0F3818, 0F381C,
932 0F381D, 0F383C, 0F383E, 0F3858, 0F3878, 0F3879, 0F3896, 0F3897,
933 0F3898, 0F3899, 0F389C, 0F389D, 0F389E, 0F389F, 0F38A6, 0F38A7,
934 0F38A8, 0F38A9, 0F38AC, 0F38AD, 0F38AE, 0F38AF, 0F38B6, 0F38B7,
935 0F38B8, 0F38B9, 0F38BA, 0F38BB, 0F38BC, 0F38BD, 0F38BE, 0F38BF,
936 0F38CF, 0F38DC, 0F38DD, 0F38DE, 0F38DF, 0F3A04, 0F3A0F, 0F3A44,
938 * i386-dis-evex-prefix.h (PREFIX_EVEX_0F60, PREFIX_EVEX_0F61,
939 PREFIX_EVEX_0F63, PREFIX_EVEX_0F67, PREFIX_EVEX_0F68,
940 PREFIX_EVEX_0F69, PREFIX_EVEX_0FD1, PREFIX_EVEX_0FD5,
941 PREFIX_EVEX_0FD8, PREFIX_EVEX_0FD9, PREFIX_EVEX_0FDA,
942 PREFIX_EVEX_0FDC, PREFIX_EVEX_0FDD, PREFIX_EVEX_0FDE,
943 PREFIX_EVEX_0FE0, PREFIX_EVEX_0FE1, PREFIX_EVEX_0FE3,
944 PREFIX_EVEX_0FE4, PREFIX_EVEX_0FE5, PREFIX_EVEX_0FE8,
945 PREFIX_EVEX_0FE9, PREFIX_EVEX_0FEA, PREFIX_EVEX_0FEC,
946 PREFIX_EVEX_0FED, PREFIX_EVEX_0FEE, PREFIX_EVEX_0FF1,
947 PREFIX_EVEX_0FF5, PREFIX_EVEX_0FF6, PREFIX_EVEX_0FF8,
948 PREFIX_EVEX_0FF9, PREFIX_EVEX_0FFC, PREFIX_EVEX_0FFD,
949 PREFIX_EVEX_0F3800, PREFIX_EVEX_0F3804, PREFIX_EVEX_0F380B,
950 PREFIX_EVEX_0F380C, PREFIX_EVEX_0F3818, PREFIX_EVEX_0F381C,
951 PREFIX_EVEX_0F381D, PREFIX_EVEX_0F383C, PREFIX_EVEX_0F383E,
952 PREFIX_EVEX_0F3858, PREFIX_EVEX_0F3878, PREFIX_EVEX_0F3879,
953 PREFIX_EVEX_0F3896, PREFIX_EVEX_0F3897, PREFIX_EVEX_0F3898,
954 PREFIX_EVEX_0F3899, PREFIX_EVEX_0F389C, PREFIX_EVEX_0F389D,
955 PREFIX_EVEX_0F389E, PREFIX_EVEX_0F389F, PREFIX_EVEX_0F38A6,
956 PREFIX_EVEX_0F38A7, PREFIX_EVEX_0F38A8, PREFIX_EVEX_0F38A9,
957 PREFIX_EVEX_0F38AC, PREFIX_EVEX_0F38AD, PREFIX_EVEX_0F38AE,
958 PREFIX_EVEX_0F38AF, PREFIX_EVEX_0F38B6, PREFIX_EVEX_0F38B7,
959 PREFIX_EVEX_0F38B8, PREFIX_EVEX_0F38B9, PREFIX_EVEX_0F38BA,
960 PREFIX_EVEX_0F38BB, PREFIX_EVEX_0F38BC, PREFIX_EVEX_0F38BD,
961 PREFIX_EVEX_0F38BE, PREFIX_EVEX_0F38BF, PREFIX_EVEX_0F38CF,
962 PREFIX_EVEX_0F38DC, PREFIX_EVEX_0F38DD, PREFIX_EVEX_0F38DE,
963 PREFIX_EVEX_0F38DF, PREFIX_EVEX_0F3A04, PREFIX_EVEX_0F3A0F,
964 PREFIX_EVEX_0F3A44, PREFIX_EVEX_0F3ACE, PREFIX_EVEX_0F3ACF):
965 Delete table entries.
966 * i386-dis-evex-w.h (EVEX_W_0F380C_P_2, EVEX_W_0F3818_P_2,
967 EVEX_W_0F3858_P_2, EVEX_W_0F3878_P_2, EVEX_W_0F3879_P_2,
968 EVEX_W_0F3A04_P_2, EVEX_W_0F3ACE_P_2, EVEX_W_0F3ACF_P_2):
971 2020-07-06 Jan Beulich <jbeulich@suse.com>
973 * i386-dis.c (EXqScalarS): Delete.
974 (vex_len_table): Replace EXqScalarS by EXqVexScalarS.
975 * i386-dis-evex-w.h (vmovq): Use EXqVexScalarS.
977 2020-07-06 Jan Beulich <jbeulich@suse.com>
979 * i386-dis.c (safe-ctype.h): Include.
980 (EXdScalar, EXqScalar): Delete.
981 (d_scalar_mode, q_scalar_mode): Delete.
982 (prefix_table, vex_len_table): Use EXxmm_md in place of
983 EXdScalar and EXxmm_mq in place of EXqScalar.
984 (intel_operand_size, OP_E_memory, OP_EX): Remove uses of
985 d_scalar_mode and q_scalar_mode.
986 * i386-dis-evex-w.h (vmovss): Use EXxmm_md.
987 (vmovsd): Use EXxmm_mq.
989 2020-07-06 Yuri Chornoivan <yurchor@ukr.net>
992 * arc-dis.c: Fix spelling mistake.
993 * po/opcodes.pot: Regenerate.
995 2020-07-06 Nick Clifton <nickc@redhat.com>
997 * po/pt_BR.po: Updated Brazilian Portugugese translation.
998 * po/uk.po: Updated Ukranian translation.
1000 2020-07-04 Nick Clifton <nickc@redhat.com>
1002 * configure: Regenerate.
1003 * po/opcodes.pot: Regenerate.
1005 2020-07-04 Nick Clifton <nickc@redhat.com>
1007 Binutils 2.35 branch created.
1009 2020-07-02 H.J. Lu <hongjiu.lu@intel.com>
1011 * i386-gen.c (opcode_modifiers): Add VexSwapSources.
1012 * i386-opc.h (VexSwapSources): New.
1013 (i386_opcode_modifier): Add vexswapsources.
1014 * i386-opc.tbl: Add VexSwapSources to BMI2 and BMI instructions
1015 with two source operands swapped.
1016 * i386-tbl.h: Regenerated.
1018 2020-06-30 Nelson Chu <nelson.chu@sifive.com>
1020 * riscv-dis.c (print_insn_args, case 'E'): Updated. Let the
1021 unprivileged CSR can also be initialized.
1023 2020-06-29 Alan Modra <amodra@gmail.com>
1025 * arm-dis.c: Use C style comments.
1026 * cr16-opc.c: Likewise.
1027 * ft32-dis.c: Likewise.
1028 * moxie-opc.c: Likewise.
1029 * tic54x-dis.c: Likewise.
1030 * s12z-opc.c: Remove useless comment.
1031 * xgate-dis.c: Likewise.
1033 2020-06-26 H.J. Lu <hongjiu.lu@intel.com>
1035 * i386-opc.tbl: Add a blank line.
1037 2020-06-26 H.J. Lu <hongjiu.lu@intel.com>
1039 * i386-gen.c (opcode_modifiers): Replace VecSIB with SIB.
1040 (VecSIB128): Renamed to ...
1042 (VecSIB256): Renamed to ...
1044 (VecSIB512): Renamed to ...
1046 (VecSIB): Renamed to ...
1048 (i386_opcode_modifier): Replace vecsib with sib.
1049 * i386-opc.tbl (VecSIB128): New.
1050 (VecSIB256): Likewise.
1051 (VecSIB512): Likewise.
1052 Replace VecSIB=1, VecSIB=2 and VecSIB=3 with VecSIB128, VecSIB256
1053 and VecSIB512, respectively.
1055 2020-06-26 Jan Beulich <jbeulich@suse.com>
1057 * i386-dis.c: Adjust description of I macro.
1058 (x86_64_table): Drop use of I.
1059 (float_mem): Replace use of I.
1060 (putop): Remove handling of I. Adjust setting/clearing of "alt".
1062 2020-06-26 Jan Beulich <jbeulich@suse.com>
1064 * i386-dis.c: (print_insn): Avoid straight assignment to
1065 priv.orig_sizeflag when processing -M sub-options.
1067 2020-06-25 Jan Beulich <jbeulich@suse.com>
1069 * i386-dis.c: Adjust description of J macro.
1070 (dis386, x86_64_table, mod_table): Replace J.
1071 (putop): Remove handling of J.
1073 2020-06-25 Jan Beulich <jbeulich@suse.com>
1075 * i386-dis.c: (float_mem): Reduce alternatives for fstpt and fldpt.
1077 2020-06-25 Jan Beulich <jbeulich@suse.com>
1079 * i386-dis.c: Adjust description of "LQ" macro.
1080 (dis386_twobyte): Use LQ for sysret.
1081 (putop): Adjust handling of LQ.
1083 2020-06-22 Nelson Chu <nelson.chu@sifive.com>
1085 * riscv-opc.c: Move the structures and functions to bfd/elfxx-riscv.c.
1086 * riscv-dis.c: Include elfxx-riscv.h.
1088 2020-06-18 H.J. Lu <hongjiu.lu@intel.com>
1090 * i386-dis.c (prefix_table): Revert the last vmgexit change.
1092 2020-06-17 Lili Cui <lili.cui@intel.com>
1094 * i386-dis.c (prefix_table): Delete the incorrect vmgexit.
1096 2020-06-14 H.J. Lu <hongjiu.lu@intel.com>
1099 * i386-dis.c (prefix_table): Replace xsuspldtrk with xsusldtrk.
1100 * i386-opc.tbl: Likewise.
1101 * i386-tbl.h: Regenerated.
1103 2020-06-12 Nelson Chu <nelson.chu@sifive.com>
1105 * riscv-opc.c (priv_specs): Remove v1.9 and PRIV_SPEC_CLASS_1P9.
1107 2020-06-11 Alex Coplan <alex.coplan@arm.com>
1109 * aarch64-opc.c (SYSREG): New macro for describing system registers.
1110 (SR_CORE): Likewise.
1111 (SR_FEAT): Likewise.
1113 (SR_V8_1): Likewise.
1114 (SR_V8_2): Likewise.
1115 (SR_V8_3): Likewise.
1116 (SR_V8_4): Likewise.
1119 (SR_SSBS): Likewise.
1121 (SR_ID_PFR2): Likewise.
1122 (SR_PROFILE): Likewise.
1123 (SR_MEMTAG): Likewise.
1124 (SR_SCXTNUM): Likewise.
1125 (aarch64_sys_regs): Refactor to store feature information in the table.
1126 (aarch64_sys_reg_supported_p): Collapse logic for system registers
1127 that now describe their own features.
1128 (aarch64_pstatefield_supported_p): Likewise.
1130 2020-06-09 H.J. Lu <hongjiu.lu@intel.com>
1132 * i386-dis.c (prefix_table): Fix a typo in comments.
1134 2020-06-09 Jan Beulich <jbeulich@suse.com>
1136 * i386-dis.c (rex_ignored): Delete.
1137 (ckprefix): Drop rex_ignored initialization.
1138 (get_valid_dis386): Drop setting of rex_ignored.
1139 (print_insn): Drop checking of rex_ignored. Don't record data
1140 size prefix as used with VEX-and-alike encodings.
1142 2020-06-09 Jan Beulich <jbeulich@suse.com>
1144 * i386-dis.c (MOD_0F12_PREFIX_2, MOD_0F16_PREFIX_2,
1145 MOD_VEX_0F12_PREFIX_2, MOD_VEX_0F16_PREFIX_2): New enumerators.
1146 (VEX_LEN_0F12_P_2, VEX_LEN_0F16_P_2): Delete.
1147 (VEX_LEN_0F12_P_2_M_0, VEX_LEN_0F16_P_2_M_0): Define.
1148 (prefix_table): Decode MOD for cases 2 of opcodes 0F12, 0F16,
1149 VEX_0F12, and VEX_0F16.
1150 (vex_len_table): Use X for vmovlp* and vmovh*s. Drop
1151 VEX_LEN_0F12_P_2 and VEX_LEN_0F16_P_2 entries.
1152 (mod_table): Use X for movlpX and movhpX. Drop PREFIX_OPCODE
1153 from movlps and movhlps. New MOD_0F12_PREFIX_2,
1154 MOD_0F16_PREFIX_2, MOD_VEX_0F12_PREFIX_2, and
1155 MOD_VEX_0F16_PREFIX_2 entries.
1157 2020-06-09 Jan Beulich <jbeulich@suse.com>
1159 * i386-dis.c (MOD_EVEX_0F12_PREFIX_2, MOD_EVEX_0F13,
1160 MOD_EVEX_0F16_PREFIX_2, MOD_EVEX_0F17, MOD_EVEX_0F2B): New enumerators.
1161 (PREFIX_EVEX_0F13, PREFIX_EVEX_0F14, PREFIX_EVEX_0F15,
1162 PREFIX_EVEX_0F17, PREFIX_EVEX_0F28, PREFIX_EVEX_0F29,
1163 PREFIX_EVEX_0F2B, PREFIX_EVEX_0F54, PREFIX_EVEX_0F55,
1164 PREFIX_EVEX_0F56, PREFIX_EVEX_0F57, PREFIX_EVEX_0FC6,
1165 EVEX_W_0F10_P_0, EVEX_W_0F10_P_2, EVEX_W_0F11_P_0,
1166 EVEX_W_0F11_P_2, EVEX_W_0F12_P_0_M_0, EVEX_W_0F12_P_2,
1167 EVEX_W_0F13_P_0, EVEX_W_0F13_P_2, EVEX_W_0F14_P_0,
1168 EVEX_W_0F14_P_2, EVEX_W_0F15_P_0, EVEX_W_0F15_P_2,
1169 EVEX_W_0F16_P_0_M_0, EVEX_W_0F16_P_2, EVEX_W_0F17_P_0,
1170 EVEX_W_0F17_P_2, EVEX_W_0F28_P_0, EVEX_W_0F28_P_2,
1171 EVEX_W_0F29_P_0, EVEX_W_0F29_P_2, EVEX_W_0F2B_P_0,
1172 EVEX_W_0F2B_P_2, EVEX_W_0F2E_P_0, EVEX_W_0F2E_P_2,
1173 EVEX_W_0F2F_P_0, EVEX_W_0F2F_P_2, EVEX_W_0F51_P_0,
1174 EVEX_W_0F51_P_2, EVEX_W_0F54_P_0, EVEX_W_0F54_P_2,
1175 EVEX_W_0F55_P_0, EVEX_W_0F55_P_2, EVEX_W_0F56_P_0,
1176 EVEX_W_0F56_P_2, EVEX_W_0F57_P_0, EVEX_W_0F57_P_2,
1177 EVEX_W_0F58_P_0, EVEX_W_0F58_P_2, EVEX_W_0F59_P_0,
1178 EVEX_W_0F59_P_2, EVEX_W_0F5C_P_0, EVEX_W_0F5C_P_2,
1179 EVEX_W_0F5D_P_0, EVEX_W_0F5D_P_2, EVEX_W_0F5E_P_0,
1180 EVEX_W_0F5E_P_2, EVEX_W_0F5F_P_0, EVEX_W_0F5F_P_2,
1181 EVEX_W_0FC2_P_0, EVEX_W_0FC2_P_2, EVEX_W_0FC6_P_0,
1182 EVEX_W_0FC6_P_2): Delete.
1183 (print_insn): Add EVEX.W vs embedded prefix consistency check
1184 to prefix validation.
1185 * i386-dis-evex.h (evex_table): Don't further descend for
1186 vunpcklpX, vunpckhpX, vmovapX, vandpX, vandnpX, vorpX, vxorpX,
1187 and vshufpX. Continue with MOD decoding for opcodes 0F13, 0F17,
1189 * i386-dis-evex-mod.h: Add/adjust vmovlpX/vmovhpX entries.
1190 * i386-dis-evex-prefix.h: Don't further descend for vmovupX,
1191 vucomisX, vcomisX, vsqrtpX, vaddpX, vmulpX, vsubpX, vminpX,
1192 vdivpX, vmaxpX, and vcmppX. Continue with MOD decoding for cases
1193 2 of PREFIX_EVEX_0F12, PREFIX_EVEX_0F16, and PREFIX_EVEX_0F29.
1194 Drop PREFIX_EVEX_0F13, PREFIX_EVEX_0F14, PREFIX_EVEX_0F15,
1195 PREFIX_EVEX_0F17, PREFIX_EVEX_0F28, PREFIX_EVEX_0F2B,
1196 PREFIX_EVEX_0F54, PREFIX_EVEX_0F55, PREFIX_EVEX_0F56,
1197 PREFIX_EVEX_0F57, and PREFIX_EVEX_0FC6 entries.
1198 * i386-dis-evex-w.h: Drop EVEX_W_0F10_P_0, EVEX_W_0F10_P_2,
1199 EVEX_W_0F11_P_0, EVEX_W_0F11_P_2, EVEX_W_0F12_P_0_M_0,
1200 EVEX_W_0F12_P_2, EVEX_W_0F12_P_3, EVEX_W_0F13_P_0,
1201 EVEX_W_0F13_P_2, EVEX_W_0F14_P_0, EVEX_W_0F14_P_2,
1202 EVEX_W_0F15_P_0, EVEX_W_0F15_P_2, EVEX_W_0F16_P_0_M_0,
1203 EVEX_W_0F16_P_2, EVEX_W_0F17_P_0, EVEX_W_0F17_P_2,
1204 EVEX_W_0F28_P_0, EVEX_W_0F28_P_2, EVEX_W_0F29_P_0,
1205 EVEX_W_0F29_P_2, EVEX_W_0F2B_P_0, EVEX_W_0F2B_P_2,
1206 EVEX_W_0F2E_P_0, EVEX_W_0F2E_P_2, EVEX_W_0F2F_P_0,
1207 EVEX_W_0F2F_P_2, EVEX_W_0F51_P_0, EVEX_W_0F51_P_2,
1208 EVEX_W_0F54_P_0, EVEX_W_0F54_P_2, EVEX_W_0F55_P_0,
1209 EVEX_W_0F55_P_2, EVEX_W_0F56_P_0, EVEX_W_0F56_P_2,
1210 EVEX_W_0F57_P_0, EVEX_W_0F57_P_2, EVEX_W_0F58_P_0,
1211 EVEX_W_0F58_P_2, EVEX_W_0F59_P_0, EVEX_W_0F59_P_2,
1212 EVEX_W_0F5C_P_0, EVEX_W_0F5C_P_2, EVEX_W_0F5D_P_0,
1213 EVEX_W_0F5D_P_2, EVEX_W_0F5E_P_0, EVEX_W_0F5E_P_2,
1214 EVEX_W_0F5F_P_0, EVEX_W_0F5F_P_2, EVEX_W_0FC2_P_0,
1215 EVEX_W_0FC2_P_2, EVEX_W_0FC6_P_0, and EVEX_W_0FC6_P_2 entries.
1217 2020-06-09 Jan Beulich <jbeulich@suse.com>
1219 * i386-dis.c (vex_table): Use PREFIX_OPCODE for vunpcklpX,
1220 vunpckhpX, vmovapX, vandpX, vandnpX, vorpX, vxorpX and vshufpX.
1221 (vex_len_table) : Likewise for vmovlpX, vmovhpX, vmovntpX, and
1223 (print_insn): Drop pointless check against bad_opcode. Split
1224 prefix validation into legacy and VEX-and-alike parts.
1225 (putop): Re-work 'X' macro handling.
1227 2020-06-09 Jan Beulich <jbeulich@suse.com>
1229 * i386-dis.c (MOD_0F51): Rename to ...
1230 (MOD_0F50): ... this.
1232 2020-06-08 Alex Coplan <alex.coplan@arm.com>
1234 * arm-dis.c (arm_opcodes): Add dfb.
1235 (thumb32_opcodes): Add dfb.
1237 2020-06-08 Jan Beulich <jbeulich@suse.com>
1239 * i386-opc.h (reg_entry): Const-qualify reg_name field.
1241 2020-06-06 Alan Modra <amodra@gmail.com>
1243 * ppc-dis.c (ppc_opts): Accept -mpwr10/-Mpwr10.
1245 2020-06-05 Alan Modra <amodra@gmail.com>
1247 * cgen-dis.c (hash_insn_array): Increase size of buf. Assert
1248 size is large enough.
1250 2020-06-04 Jose E. Marchesi <jose.marchesi@oracle.com>
1252 * disassemble.c (disassemble_init_for_target): Set endian_code for
1254 * bpf-desc.c: Regenerate.
1255 * bpf-opc.c: Likewise.
1256 * bpf-dis.c: Likewise.
1258 2020-06-03 Jose E. Marchesi <jose.marchesi@oracle.com>
1260 * cgen-opc.c (cgen_get_insn_value): Get an `endian' argument.
1261 (cgen_put_insn_value): Likewise.
1262 (cgen_lookup_insn): Pass endianness to cgen_{get,put}_insn_value.
1263 * cgen-dis.in (print_insn): Likewise.
1264 * cgen-ibld.in (insert_1): Likewise.
1265 (insert_1): Likewise.
1266 (insert_insn_normal): Likewise.
1267 (extract_1): Likewise.
1268 * bpf-dis.c: Regenerate.
1269 * bpf-ibld.c: Likewise.
1270 * bpf-ibld.c: Likewise.
1271 * cgen-dis.in: Likewise.
1272 * cgen-ibld.in: Likewise.
1273 * cgen-opc.c: Likewise.
1274 * epiphany-dis.c: Likewise.
1275 * epiphany-ibld.c: Likewise.
1276 * fr30-dis.c: Likewise.
1277 * fr30-ibld.c: Likewise.
1278 * frv-dis.c: Likewise.
1279 * frv-ibld.c: Likewise.
1280 * ip2k-dis.c: Likewise.
1281 * ip2k-ibld.c: Likewise.
1282 * iq2000-dis.c: Likewise.
1283 * iq2000-ibld.c: Likewise.
1284 * lm32-dis.c: Likewise.
1285 * lm32-ibld.c: Likewise.
1286 * m32c-dis.c: Likewise.
1287 * m32c-ibld.c: Likewise.
1288 * m32r-dis.c: Likewise.
1289 * m32r-ibld.c: Likewise.
1290 * mep-dis.c: Likewise.
1291 * mep-ibld.c: Likewise.
1292 * mt-dis.c: Likewise.
1293 * mt-ibld.c: Likewise.
1294 * or1k-dis.c: Likewise.
1295 * or1k-ibld.c: Likewise.
1296 * xc16x-dis.c: Likewise.
1297 * xc16x-ibld.c: Likewise.
1298 * xstormy16-dis.c: Likewise.
1299 * xstormy16-ibld.c: Likewise.
1301 2020-06-04 Jose E. Marchesi <jemarch@gnu.org>
1303 * cgen-dis.in (cpu_desc_list): New field `insn_endian'.
1304 (print_insn_): Handle instruction endian.
1305 * bpf-dis.c: Regenerate.
1306 * bpf-desc.c: Regenerate.
1307 * epiphany-dis.c: Likewise.
1308 * epiphany-desc.c: Likewise.
1309 * fr30-dis.c: Likewise.
1310 * fr30-desc.c: Likewise.
1311 * frv-dis.c: Likewise.
1312 * frv-desc.c: Likewise.
1313 * ip2k-dis.c: Likewise.
1314 * ip2k-desc.c: Likewise.
1315 * iq2000-dis.c: Likewise.
1316 * iq2000-desc.c: Likewise.
1317 * lm32-dis.c: Likewise.
1318 * lm32-desc.c: Likewise.
1319 * m32c-dis.c: Likewise.
1320 * m32c-desc.c: Likewise.
1321 * m32r-dis.c: Likewise.
1322 * m32r-desc.c: Likewise.
1323 * mep-dis.c: Likewise.
1324 * mep-desc.c: Likewise.
1325 * mt-dis.c: Likewise.
1326 * mt-desc.c: Likewise.
1327 * or1k-dis.c: Likewise.
1328 * or1k-desc.c: Likewise.
1329 * xc16x-dis.c: Likewise.
1330 * xc16x-desc.c: Likewise.
1331 * xstormy16-dis.c: Likewise.
1332 * xstormy16-desc.c: Likewise.
1334 2020-06-03 Nick Clifton <nickc@redhat.com>
1336 * po/sr.po: Updated Serbian translation.
1338 2020-06-03 Nelson Chu <nelson.chu@sifive.com>
1340 * riscv-opc.c (riscv_get_isa_spec_class): Change bfd_boolean to int.
1341 (riscv_get_priv_spec_class): Likewise.
1343 2020-06-01 Alan Modra <amodra@gmail.com>
1345 * bpf-desc.c: Regenerate.
1347 2020-05-28 Jose E. Marchesi <jose.marchesi@oracle.com>
1348 David Faust <david.faust@oracle.com>
1350 * bpf-desc.c: Regenerate.
1351 * bpf-opc.h: Likewise.
1352 * bpf-opc.c: Likewise.
1353 * bpf-dis.c: Likewise.
1355 2020-05-28 Alan Modra <amodra@gmail.com>
1357 * nios2-dis.c (nios2_print_insn_arg): Avoid shift left of negative
1360 2020-05-28 Alan Modra <amodra@gmail.com>
1362 * ns32k-dis.c (print_insn_arg): Handle d value of 'f' for
1364 (print_insn_ns32k): Revert last change.
1366 2020-05-28 Nick Clifton <nickc@redhat.com>
1368 * ns32k-dis.c (print_insn_ns32k): Change the arg_bufs array to
1371 2020-05-26 Sandra Loosemore <sandra@codesourcery.com>
1373 Fix extraction of signed constants in nios2 disassembler (again).
1375 * nios2-dis.c (nios2_print_insn_arg): Add explicit casts to
1376 extractions of signed fields.
1378 2020-05-26 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
1380 * s390-opc.txt: Relocate vector load/store instructions with
1381 additional alignment parameter and change architecture level
1382 constraint from z14 to z13.
1384 2020-05-21 Alan Modra <amodra@gmail.com>
1386 * arc-ext.c: Replace "if (x) free (x)" with "free (x)" throughout.
1387 * sparc-dis.c: Likewise.
1388 * tic4x-dis.c: Likewise.
1389 * xtensa-dis.c: Likewise.
1390 * bpf-desc.c: Regenerate.
1391 * epiphany-desc.c: Regenerate.
1392 * fr30-desc.c: Regenerate.
1393 * frv-desc.c: Regenerate.
1394 * ip2k-desc.c: Regenerate.
1395 * iq2000-desc.c: Regenerate.
1396 * lm32-desc.c: Regenerate.
1397 * m32c-desc.c: Regenerate.
1398 * m32r-desc.c: Regenerate.
1399 * mep-asm.c: Regenerate.
1400 * mep-desc.c: Regenerate.
1401 * mt-desc.c: Regenerate.
1402 * or1k-desc.c: Regenerate.
1403 * xc16x-desc.c: Regenerate.
1404 * xstormy16-desc.c: Regenerate.
1406 2020-05-20 Nelson Chu <nelson.chu@sifive.com>
1408 * riscv-opc.c (riscv_ext_version_table): The table used to store
1409 all information about the supported spec and the corresponding ISA
1410 versions. Currently, only Zicsr is supported to verify the
1411 correctness of Z sub extension settings. Others will be supported
1412 in the future patches.
1413 (struct isa_spec_t, isa_specs): List for all supported ISA spec
1414 classes and the corresponding strings.
1415 (riscv_get_isa_spec_class): New function. Get the corresponding ISA
1416 spec class by giving a ISA spec string.
1417 * riscv-opc.c (struct priv_spec_t): New structure.
1418 (struct priv_spec_t priv_specs): List for all supported privilege spec
1419 classes and the corresponding strings.
1420 (riscv_get_priv_spec_class): New function. Get the corresponding
1421 privilege spec class by giving a spec string.
1422 (riscv_get_priv_spec_name): New function. Get the corresponding
1423 privilege spec string by giving a CSR version class.
1424 * riscv-dis.c: Updated since DECLARE_CSR is changed.
1425 * riscv-dis.c: Add new disassembler option -Mpriv-spec to dump the CSR
1426 according to the chosen version. Build a hash table riscv_csr_hash to
1427 store the valid CSR for the chosen pirv verison. Dump the direct
1428 CSR address rather than it's name if it is invalid.
1429 (parse_riscv_dis_option_without_args): New function. Parse the options
1431 (parse_riscv_dis_option): Call parse_riscv_dis_option_without_args to
1432 parse the options without arguments first, and then handle the options
1433 with arguments. Add the new option -Mpriv-spec, which has argument.
1434 * riscv-dis.c (print_riscv_disassembler_options): Add description
1435 about the new OBJDUMP option.
1437 2020-05-19 Peter Bergner <bergner@linux.ibm.com>
1439 * ppc-opc.c (insert_ls, extract_ls): Handle 3-bit L fields and new
1440 WC values on POWER10 sync, dcbf and wait instructions.
1441 (insert_pl, extract_pl): New functions.
1442 (L2OPT, LS, WC): Use insert_ls and extract_ls.
1443 (LS3): New , 3-bit L for sync.
1444 (LS3, L3OPT): New, 3-bit L for sync and dcbf.
1445 (SC2, PL): New, 2-bit SC and PL for sync and wait.
1446 (XWCPL_MASK, XL3RT_MASK, XSYNCLS_MASK): New instruction masks.
1447 (XOPL3, XWCPL, XSYNCLS): New opcode macros.
1448 (powerpc_opcodes) <dcbflp, dcbfps, dcbstps pause_short, phwsync,
1449 plwsync, stcisync, stncisync, stsync, waitrsv>: New extended mnemonics.
1450 <wait>: Enable PL operand on POWER10.
1451 <dcbf>: Enable L3OPT operand on POWER10.
1452 <sync>: Enable SC2 operand on POWER10.
1454 2020-05-19 Stafford Horne <shorne@gmail.com>
1457 * or1k-asm.c: Regenerate.
1458 * or1k-desc.c: Regenerate.
1459 * or1k-desc.h: Regenerate.
1460 * or1k-dis.c: Regenerate.
1461 * or1k-ibld.c: Regenerate.
1462 * or1k-opc.c: Regenerate.
1463 * or1k-opc.h: Regenerate.
1464 * or1k-opinst.c: Regenerate.
1466 2020-05-11 Alan Modra <amodra@gmail.com>
1468 * ppc-opc (powerpc_opcodes): Add xscmpeqqp, xscmpgeqp, xscmpgtqp,
1471 2020-05-11 Alan Modra <amodra@gmail.com>
1473 * ppc-opc.c (powerpc_opcodes): Add lxvrbx, lxvrhx, lxvrwx, lxvrdx,
1474 stxvrbx, stxvrhx, stxvrwx, stxvrdx.
1476 2020-05-11 Alan Modra <amodra@gmail.com>
1478 * ppc-opc.c (powerpc_opcodes): Add xvtlsbb.
1480 2020-05-11 Alan Modra <amodra@gmail.com>
1482 * ppc-opc.c (powerpc_opcodes): Add vstribl, vstribr, vstrihl, vstrihr,
1483 vclrlb, vclrrb, vstribl., vstribr., vstrihl., vstrihr..
1485 2020-05-11 Peter Bergner <bergner@linux.ibm.com>
1487 * ppc-opc.c (powerpc_opcodes) <setbc, setbcr, setnbc, setnbcr>: New
1490 2020-05-11 Alan Modra <amodra@gmail.com>
1492 * ppc-opc.c (UIM8, P_U8XX4_MASK): Define.
1493 (powerpc_opcodes): Add vgnb, vcfuged, vpextd, vpdepd, vclzdm,
1494 vctzdm, cntlzdm, pdepd, pextd, cfuged, cnttzdm.
1495 (prefix_opcodes): Add xxeval.
1497 2020-05-11 Alan Modra <amodra@gmail.com>
1499 * ppc-opc.c (powerpc_opcodes): Add xxgenpcvbm, xxgenpcvhm,
1500 xxgenpcvwm, xxgenpcvdm.
1502 2020-05-11 Alan Modra <amodra@gmail.com>
1504 * ppc-opc.c (MP, VXVAM_MASK): Define.
1505 (VXVAPS_MASK): Use VXVA_MASK.
1506 (powerpc_opcodes): Add mtvsrbmi, vexpandbm, vexpandhm, vexpandwm,
1507 vexpanddm, vexpandqm, vextractbm, vextracthm, vextractwm,
1508 vextractdm, vextractqm, mtvsrbm, mtvsrhm, mtvsrwm, mtvsrdm, mtvsrqm,
1509 vcntmbb, vcntmbh, vcntmbw, vcntmbd.
1511 2020-05-11 Alan Modra <amodra@gmail.com>
1512 Peter Bergner <bergner@linux.ibm.com>
1514 * ppc-opc.c (insert_xa6a, extract_xa6a, insert_xb6a, extract_xb6a):
1516 (powerpc_operands): Define ACC, PMSK8, PMSK4, PMSK2, XMSK, YMSK,
1517 YMSK2, XA6a, XA6ap, XB6a entries.
1518 (PMMIRR, P_X_MASK, P_XX1_MASK, P_GER_MASK): Define
1519 (P_GER2_MASK, P_GER4_MASK, P_GER8_MASK, P_GER64_MASK): Define.
1521 (powerpc_opcodes): Add xxmfacc, xxmtacc, xxsetaccz,
1522 xvi8ger4pp, xvi8ger4, xvf16ger2pp, xvf16ger2, xvf32gerpp, xvf32ger,
1523 xvi4ger8pp, xvi4ger8, xvi16ger2spp, xvi16ger2s, xvbf16ger2pp,
1524 xvbf16ger2, xvf64gerpp, xvf64ger, xvi16ger2, xvf16ger2np,
1525 xvf32gernp, xvi8ger4spp, xvi16ger2pp, xvbf16ger2np, xvf64gernp,
1526 xvf16ger2pn, xvf32gerpn, xvbf16ger2pn, xvf64gerpn, xvf16ger2nn,
1527 xvf32gernn, xvbf16ger2nn, xvf64gernn, xvcvbf16sp, xvcvspbf16.
1528 (prefix_opcodes): Add pmxvi8ger4pp, pmxvi8ger4, pmxvf16ger2pp,
1529 pmxvf16ger2, pmxvf32gerpp, pmxvf32ger, pmxvi4ger8pp, pmxvi4ger8,
1530 pmxvi16ger2spp, pmxvi16ger2s, pmxvbf16ger2pp, pmxvbf16ger2,
1531 pmxvf64gerpp, pmxvf64ger, pmxvi16ger2, pmxvf16ger2np, pmxvf32gernp,
1532 pmxvi8ger4spp, pmxvi16ger2pp, pmxvbf16ger2np, pmxvf64gernp,
1533 pmxvf16ger2pn, pmxvf32gerpn, pmxvbf16ger2pn, pmxvf64gerpn,
1534 pmxvf16ger2nn, pmxvf32gernn, pmxvbf16ger2nn, pmxvf64gernn.
1536 2020-05-11 Alan Modra <amodra@gmail.com>
1538 * ppc-opc.c (insert_imm32, extract_imm32): New functions.
1539 (insert_xts, extract_xts): New functions.
1540 (IMM32, UIM3, IX, UIM5, SH3, XTS, P8RR): Define.
1541 (P_XX4_MASK, P_UXX4_MASK, VSOP, P_VS_MASK, P_VSI_MASK): Define.
1542 (VXRC_MASK, VXSH_MASK): Define.
1543 (powerpc_opcodes): Add vinsbvlx, vsldbi, vextdubvlx, vextdubvrx,
1544 vextduhvlx, vextduhvrx, vextduwvlx, vextduwvrx, vextddvlx,
1545 vextddvrx, vinshvlx, vinswvlx, vinsw, vinsbvrx, vinshvrx,
1546 vinswvrx, vinsd, vinsblx, vsrdbi, vinshlx, vinswlx, vinsdlx,
1547 vinsbrx, vinshrx, vinswrx, vinsdrx, lxvkq.
1548 (prefix_opcodes): Add xxsplti32dx, xxspltidp, xxspltiw, xxblendvb,
1549 xxblendvh, xxblendvw, xxblendvd, xxpermx.
1551 2020-05-11 Alan Modra <amodra@gmail.com>
1553 * ppc-opc.c (powerpc_opcodes): Add vrlq, vdivuq, vmsumcud, vrlqmi,
1554 vmuloud, vcmpuq, vslq, vdivsq, vcmpsq, vrlqnm, vcmpequq, vmulosd,
1555 vsrq, vdiveuq, vcmpgtuq, vmuleud, vsraq, vdivesq, vcmpgtsq, vmulesd,
1556 vcmpequq., vextsd2q, vmoduq, vcmpgtuq., vmodsq, vcmpgtsq., xscvqpuqz,
1557 xscvuqqp, xscvqpsqz, xscvsqqp, dcffixqq, dctfixqq.
1559 2020-05-11 Alan Modra <amodra@gmail.com>
1561 * ppc-opc.c (insert_xtp, extract_xtp): New functions.
1562 (XTP, DQXP, DQXP_MASK): Define.
1563 (powerpc_opcodes): Add lxvp, stxvp, lxvpx, stxvpx.
1564 (prefix_opcodes): Add plxvp and pstxvp.
1566 2020-05-11 Alan Modra <amodra@gmail.com>
1568 * ppc-opc.c (powerpc_opcodes): Add vdivuw, vdivud, vdivsw, vmulld,
1569 vdivsd, vmulhuw, vdiveuw, vmulhud, vdiveud, vmulhsw, vdivesw,
1570 vmulhsd, vdivesd, vmoduw, vmodud, vmodsw, vmodsd.
1572 2020-05-11 Peter Bergner <bergner@linux.ibm.com>
1574 * ppc-opc.c (powerpc_opcodes) <brd, brh, brw>: New mnemonics.
1576 2020-05-11 Peter Bergner <bergner@linux.ibm.com>
1578 * ppc-opc.c (insert_l1opt, extract_l1opt): New functions.
1580 (powerpc_opcodes) <paste.>: Add L operand for cpu POWER10.
1582 2020-05-11 Peter Bergner <bergner@linux.ibm.com>
1584 * ppc-opc.c (powerpc_opcodes) <slbiag>: Add variant with L operand.
1586 2020-05-11 Alan Modra <amodra@gmail.com>
1588 * ppc-dis.c (powerpc_init_dialect): Default to "power10".
1590 2020-05-11 Alan Modra <amodra@gmail.com>
1592 * ppc-dis.c (ppc_opts): Add "power10" entry.
1593 (print_insn_powerpc): Update for PPC_OPCODE_POWER10 renaming.
1594 * ppc-opc.c (POWER10): Rename from POWERXX. Update all uses.
1596 2020-05-11 Nick Clifton <nickc@redhat.com>
1598 * po/fr.po: Updated French translation.
1600 2020-04-30 Alex Coplan <alex.coplan@arm.com>
1602 * aarch64-opc.h (enum aarch64_field_kind): Add FLD_imm16_2.
1603 * aarch64-opc.c (fields): Add entry for FLD_imm16_2.
1604 (operand_general_constraint_met_p): validate
1605 AARCH64_OPND_UNDEFINED.
1606 * aarch64-tbl.h (aarch64_opcode_table): Add udf instruction, entry
1608 * aarch64-asm-2.c: Regenerated.
1609 * aarch64-dis-2.c: Regenerated.
1610 * aarch64-opc-2.c: Regenerated.
1612 2020-04-29 Nick Clifton <nickc@redhat.com>
1615 * sh-opc.h: Also use unsigned 8-bit immediate values for the LDRC
1618 2020-04-29 Nick Clifton <nickc@redhat.com>
1620 * po/sv.po: Updated Swedish translation.
1622 2020-04-29 Nick Clifton <nickc@redhat.com>
1625 * sh-opc.h (IMM0_8): Replace with IMM0_8S and IMM0_8U. Use
1626 IMM0_8S for arithmetic insns and IMM0_8U for logical insns.
1627 * sh-dis.c (print_insn_sh): Change IMM0_8 case to IMM0_8S and add
1630 2020-04-21 Andreas Schwab <schwab@linux-m68k.org>
1633 * m68k-opc.c (m68k_opcodes): Allow pc-rel for second operand of
1634 cmpi only on m68020up and cpu32.
1636 2020-04-20 Sudakshina Das <sudi.das@arm.com>
1638 * aarch64-asm.c (aarch64_ins_none): New.
1639 * aarch64-asm.h (ins_none): New declaration.
1640 * aarch64-dis.c (aarch64_ext_none): New.
1641 * aarch64-dis.h (ext_none): New declaration.
1642 * aarch64-opc.c (aarch64_print_operand): Update case for
1643 AARCH64_OPND_BARRIER_PSB.
1644 * aarch64-tbl.h (aarch64_opcode_table): Add tsb.
1645 (AARCH64_OPERANDS): Update inserter/extracter for
1646 AARCH64_OPND_BARRIER_PSB to use new dummy functions.
1647 * aarch64-asm-2.c: Regenerated.
1648 * aarch64-dis-2.c: Regenerated.
1649 * aarch64-opc-2.c: Regenerated.
1651 2020-04-20 Sudakshina Das <sudi.das@arm.com>
1653 * aarch64-tbl.h (aarch64_feature_bti, BTI, BTI_INSN): Remove.
1654 (aarch64_feature_ras, RAS): Likewise.
1655 (aarch64_feature_stat_profile, STAT_PROFILE): Likewise.
1656 (aarch64_opcode_table): Update bti, xpaclri, pacia1716, pacib1716,
1657 autia1716, autib1716, esb, psb, dgh, paciaz, paciasp, pacibz, pacibsp,
1658 autiaz, autiasp, autibz, autibsp to be CORE_INSN.
1659 * aarch64-asm-2.c: Regenerated.
1660 * aarch64-dis-2.c: Regenerated.
1661 * aarch64-opc-2.c: Regenerated.
1663 2020-04-17 Fredrik Strupe <fredrik@strupe.net>
1665 * arm-dis.c (neon_opcodes): Fix VDUP instruction masks.
1666 (print_insn_neon): Support disassembly of conditional
1669 2020-02-16 David Faust <david.faust@oracle.com>
1671 * bpf-desc.c: Regenerate.
1672 * bpf-desc.h: Likewise.
1673 * bpf-opc.c: Regenerate.
1674 * bpf-opc.h: Likewise.
1676 2020-04-07 Lili Cui <lili.cui@intel.com>
1678 * i386-dis.c (enum): Add PREFIX_0F01_REG_5_MOD_3_RM_1,
1679 (prefix_table): New instructions (see prefixes above).
1680 (rm_table): Likewise
1681 * i386-gen.c (cpu_flag_init): Add CPU_TSXLDTRK_FLAGS,
1682 CPU_ANY_TSXLDTRK_FLAGS.
1683 (cpu_flags): Add CpuTSXLDTRK.
1684 * i386-opc.h (enum): Add CpuTSXLDTRK.
1685 (i386_cpu_flags): Add cputsxldtrk.
1686 * i386-opc.tbl: Add XSUSPLDTRK insns.
1687 * i386-init.h: Regenerate.
1688 * i386-tbl.h: Likewise.
1690 2020-04-02 Lili Cui <lili.cui@intel.com>
1692 * i386-dis.c (prefix_table): New instructions serialize.
1693 * i386-gen.c (cpu_flag_init): Add CPU_SERIALIZE_FLAGS,
1694 CPU_ANY_SERIALIZE_FLAGS.
1695 (cpu_flags): Add CpuSERIALIZE.
1696 * i386-opc.h (enum): Add CpuSERIALIZE.
1697 (i386_cpu_flags): Add cpuserialize.
1698 * i386-opc.tbl: Add SERIALIZE insns.
1699 * i386-init.h: Regenerate.
1700 * i386-tbl.h: Likewise.
1702 2020-03-26 Alan Modra <amodra@gmail.com>
1704 * disassemble.h (opcodes_assert): Declare.
1705 (OPCODES_ASSERT): Define.
1706 * disassemble.c: Don't include assert.h. Include opintl.h.
1707 (opcodes_assert): New function.
1708 * h8300-dis.c (bfd_h8_disassemble_init): Use OPCODES_ASSERT.
1709 (bfd_h8_disassemble): Reduce size of data array. Correctly
1710 calculate maxlen. Omit insn decoding when insn length exceeds
1711 maxlen. Exit from nibble loop when looking for E, before
1712 accessing next data byte. Move processing of E outside loop.
1713 Replace tests of maxlen in loop with assertions.
1715 2020-03-26 Alan Modra <amodra@gmail.com>
1717 * arc-dis.c (find_format): Init needs_limm. Simplify use of limm.
1719 2020-03-25 Alan Modra <amodra@gmail.com>
1721 * z80-dis.c (suffix): Init mybuf.
1723 2020-03-22 Alan Modra <amodra@gmail.com>
1725 * h8300-dis.c (bfd_h8_disassemble): Limit data[] access to that
1726 successflly read from section.
1728 2020-03-22 Alan Modra <amodra@gmail.com>
1730 * arc-dis.c (find_format): Use ISO C string concatenation rather
1731 than line continuation within a string. Don't access needs_limm
1732 before testing opcode != NULL.
1734 2020-03-22 Alan Modra <amodra@gmail.com>
1736 * ns32k-dis.c (print_insn_arg): Update comment.
1737 (print_insn_ns32k): Reduce size of index_offset array, and
1738 initialize, passing -1 to print_insn_arg for args that are not
1739 an index. Don't exit arg loop early. Abort on bad arg number.
1741 2020-03-22 Alan Modra <amodra@gmail.com>
1743 * s12z-dis.c (abstract_read_memory): Don't print error on EOI.
1744 * s12z-opc.c: Formatting.
1745 (operands_f): Return an int.
1746 (opr_n_bytes_p1): Return -1 on reaching buffer memory limit.
1747 (opr_n_bytes2, bfextins_n_bytes, mul_n_bytes, bm_n_bytes),
1748 (shift_n_bytes, mov_imm_opr_n_bytes, loop_prim_n_bytes),
1749 (exg_sex_discrim): Likewise.
1750 (create_immediate_operand, create_bitfield_operand),
1751 (create_register_operand_with_size, create_register_all_operand),
1752 (create_register_all16_operand, create_simple_memory_operand),
1753 (create_memory_operand, create_memory_auto_operand): Don't
1754 segfault on malloc failure.
1755 (z_ext24_decode): Return an int status, negative on fail, zero
1757 (x_imm1, imm1_decode, trap_decode, z_opr_decode, z_opr_decode2),
1758 (imm1234, reg_s_imm, reg_s_opr, z_imm1234_8base, z_imm1234_0base),
1759 (z_tfr, z_reg, reg_xy, lea_reg_xys_opr, lea_reg_xys, rel_15_7),
1760 (decode_rel_15_7, cmp_xy, sub_d6_x_y, sub_d6_y_x),
1761 (ld_18bit_decode, mul_decode, bm_decode, bm_rel_decode),
1762 (mov_imm_opr, ld_18bit_decode, exg_sex_decode),
1763 (loop_primitive_decode, shift_decode, psh_pul_decode),
1764 (bit_field_decode): Similarly.
1765 (z_decode_signed_value, decode_signed_value): Similarly. Add arg
1766 to return value, update callers.
1767 (x_opr_decode_with_size): Check all reads, returning NULL on fail.
1768 Don't segfault on NULL operand.
1769 (decode_operation): Return OP_INVALID on first fail.
1770 (decode_s12z): Check all reads, returning -1 on fail.
1772 2020-03-20 Alan Modra <amodra@gmail.com>
1774 * metag-dis.c (print_insn_metag): Don't ignore status from
1777 2020-03-20 Alan Modra <amodra@gmail.com>
1779 * nds32-dis.c (print_insn_nds32): Remove unnecessary casts.
1780 Initialize parts of buffer not written when handling a possible
1781 2-byte insn at end of section. Don't attempt decoding of such
1782 an insn by the 4-byte machinery.
1784 2020-03-20 Alan Modra <amodra@gmail.com>
1786 * ppc-dis.c (print_insn_powerpc): Only clear needed bytes of
1787 partially filled buffer. Prevent lookup of 4-byte insns when
1788 only VLE 2-byte insns are possible due to section size. Print
1789 ".word" rather than ".long" for 2-byte leftovers.
1791 2020-03-17 Sergey Belyashov <sergey.belyashov@gmail.com>
1794 * z80-dis.c: Fix disassembling ED+A4/AC/B4/BC opcodes.
1796 2020-03-13 Jan Beulich <jbeulich@suse.com>
1798 * i386-dis.c (X86_64_0D): Rename to ...
1799 (X86_64_0E): ... this.
1801 2020-03-09 H.J. Lu <hongjiu.lu@intel.com>
1803 * Makefile.am ($(srcdir)/i386-init.h): Also pass -P to $(CPP).
1804 * Makefile.in: Regenerated.
1806 2020-03-09 Jan Beulich <jbeulich@suse.com>
1808 * i386-opc.tbl (avx_irel): New. Use is for AVX512 vpcmp*
1810 * i386-tbl.h: Re-generate.
1812 2020-03-09 Jan Beulich <jbeulich@suse.com>
1814 * i386-opc.tbl (xop_elem, xop_irel, xop_sign): New. Use them for XOP vpcom*,
1815 vprot*, vpsha*, and vpshl*.
1816 * i386-tbl.h: Re-generate.
1818 2020-03-09 Jan Beulich <jbeulich@suse.com>
1820 * i386-opc.tbl (avx_frel): New. Use it for AVX/AVX512 vcmpps,
1821 vcmpss, vcmppd, and vcmpsd 3-operand pseudo-ops.
1822 * i386-tbl.h: Re-generate.
1824 2020-03-09 Jan Beulich <jbeulich@suse.com>
1826 * i386-gen.c (set_bitfield): Ignore zero-length field names.
1827 * i386-opc.tbl (sse_frel): New. Use it for SSE/SSE2 cmpps,
1828 cmpss, cmppd, and cmpsd 2-operand pseudo-ops.
1829 * i386-tbl.h: Re-generate.
1831 2020-03-09 Jan Beulich <jbeulich@suse.com>
1833 * i386-gen.c (struct template_arg, struct template_instance,
1834 struct template_param, struct template, templates,
1835 parse_template, expand_templates): New.
1836 (process_i386_opcodes): Various local variables moved to
1837 expand_templates. Call parse_template and expand_templates.
1838 * i386-opc.tbl (cc): New. Use it for Jcc, SETcc, and CMOVcc.
1839 * i386-tbl.h: Re-generate.
1841 2020-03-06 Jan Beulich <jbeulich@suse.com>
1843 * i386-opc.tbl (vcvtdq2pd, vcvtps2pd, vcvtudq2pd, vcvtps2ph,
1844 vcvtps2qq, vcvtps2uqq, vcvttps2qq, vcvttps2uqq): Fold separate
1845 register and memory source templates. Replace VexW= by VexW*
1847 * i386-tbl.h: Re-generate.
1849 2020-03-06 Jan Beulich <jbeulich@suse.com>
1851 * i386-opc.tbl: Drop IgnoreSize from various SIMD insns. Replace
1852 VexW= by VexW* and VexVVVV=1 by just VexVVVV where applicable.
1853 * i386-tbl.h: Re-generate.
1855 2020-03-06 Jan Beulich <jbeulich@suse.com>
1857 * i386-opc.tbl (fildll, fistpll, fisttpll): Add ATTSyntax.
1858 * i386-tbl.h: Re-generate.
1860 2020-03-06 Jan Beulich <jbeulich@suse.com>
1862 * i386-opc.tbl (movq): Drop NoRex64 from XMM/XMM SSE2AVX variants.
1863 (movmskps, pextrw, pinsrw, pmovmskb, movmskpd, extractps,
1864 pextrb, pinsrb, roundsd): Drop NoRex64 and where applicable use
1865 VexW0 on SSE2AVX variants.
1866 (vmovq): Drop NoRex64 from XMM/XMM variants.
1867 (vextractps, vmovmskpd, vmovmskps, vpextrb, vpextrw, vpinsrb,
1868 vpinsrw, vpmovmskb, vroundsd, vpmovmskb): Drop NoRex64 and where
1869 applicable use VexW0.
1870 * i386-tbl.h: Re-generate.
1872 2020-03-06 Jan Beulich <jbeulich@suse.com>
1874 * i386-gen.c (opcode_modifiers): Remove Rex64 field.
1875 * i386-opc.h (Rex64): Delete.
1876 (struct i386_opcode_modifier): Remove rex64 field.
1877 * i386-opc.tbl (crc32): Drop Rex64.
1878 Replace Rex64 with Size64 everywhere else.
1879 * i386-tbl.h: Re-generate.
1881 2020-03-06 Jan Beulich <jbeulich@suse.com>
1883 * i386-dis.c (OP_E_memory): Exclude recording of used address
1884 prefix for "bnd" modes only in 64-bit mode. Don't decode 16-bit
1885 addressed memory operands for MPX insns.
1887 2020-03-06 Jan Beulich <jbeulich@suse.com>
1889 * i386-opc.tbl (movmskps, mwait, vmread, vmwrite, invept,
1890 invvpid, invpcid, rdfsbase, rdgsbase, wrfsbase, wrgsbase, adcx,
1891 adox, mwaitx, rdpid, movdiri): Add IgnoreSize.
1892 (ptwrite): Split into non-64-bit and 64-bit forms.
1893 * i386-tbl.h: Re-generate.
1895 2020-03-06 Jan Beulich <jbeulich@suse.com>
1897 * i386-opc.tbl (tpause, umwait): Add IgnoreSize. Add 3-operand
1899 * i386-tbl.h: Re-generate.
1901 2020-03-04 Jan Beulich <jbeulich@suse.com>
1903 * i386-dis.c (PREFIX_0F01_REG_3_RM_1): New.
1904 (prefix_table): Move vmmcall here. Add vmgexit.
1905 (rm_table): Replace vmmcall entry by prefix_table[] escape.
1906 * i386-gen.c (cpu_flag_init): Add CPU_SEV_ES_FLAGS entry.
1907 (cpu_flags): Add CpuSEV_ES entry.
1908 * i386-opc.h (CpuSEV_ES): New.
1909 (union i386_cpu_flags): Add cpusev_es field.
1910 * i386-opc.tbl (vmgexit): New.
1911 * i386-init.h, i386-tbl.h: Re-generate.
1913 2020-03-03 H.J. Lu <hongjiu.lu@intel.com>
1915 * i386-gen.c (opcode_modifiers): Replace IgnoreSize/DefaultSize
1917 * i386-opc.h (IGNORESIZE): New.
1918 (DEFAULTSIZE): Likewise.
1919 (IgnoreSize): Removed.
1920 (DefaultSize): Likewise.
1921 (MnemonicSize): New.
1922 (i386_opcode_modifier): Replace ignoresize/defaultsize with
1924 * i386-opc.tbl (IgnoreSize): New.
1925 (DefaultSize): Likewise.
1926 * i386-tbl.h: Regenerated.
1928 2020-03-03 Sergey Belyashov <sergey.belyashov@gmail.com>
1931 * z80-dis.c: Fix disassembly of LD IY,(HL) and D (HL),IX
1934 2020-03-03 H.J. Lu <hongjiu.lu@intel.com>
1937 * i386-opc.tbl: Add IgnoreSize to cvtsi2sd, cvtsi2ss, vcvtsi2sd,
1938 vcvtsi2ss, vcvtusi2sd and vcvtusi2ss for AT&T syntax.
1939 * i386-tbl.h: Regenerated.
1941 2020-02-26 Alan Modra <amodra@gmail.com>
1943 * aarch64-asm.c: Indent labels correctly.
1944 * aarch64-dis.c: Likewise.
1945 * aarch64-gen.c: Likewise.
1946 * aarch64-opc.c: Likewise.
1947 * alpha-dis.c: Likewise.
1948 * i386-dis.c: Likewise.
1949 * nds32-asm.c: Likewise.
1950 * nfp-dis.c: Likewise.
1951 * visium-dis.c: Likewise.
1953 2020-02-25 Claudiu Zissulescu <claziss@gmail.com>
1955 * arc-regs.h (int_vector_base): Make it available for all ARC
1958 2020-02-20 Nelson Chu <nelson.chu@sifive.com>
1960 * riscv-dis.c (print_insn_args): Updated since the DECLARE_CSR is
1963 2020-02-19 Nelson Chu <nelson.chu@sifive.com>
1965 * riscv-opc.c (riscv_opcodes): Convert add/addi to the compressed
1966 c.mv/c.li if rs1 is zero.
1968 2020-02-17 H.J. Lu <hongjiu.lu@intel.com>
1970 * i386-gen.c (cpu_flag_init): Replace CpuABM with
1971 CpuLZCNT|CpuPOPCNT. Add CpuPOPCNT to CPU_SSE4_2_FLAGS. Add
1973 (cpu_flags): Remove CpuABM. Add CpuPOPCNT.
1974 * i386-opc.h (CpuABM): Removed.
1976 (i386_cpu_flags): Remove cpuabm. Add cpupopcnt.
1977 * i386-opc.tbl: Replace CpuABM|CpuSSE4_2 with CpuPOPCNT on
1978 popcnt. Remove CpuABM from lzcnt.
1979 * i386-init.h: Regenerated.
1980 * i386-tbl.h: Likewise.
1982 2020-02-17 Jan Beulich <jbeulich@suse.com>
1984 * i386-opc.tbl (vcvtsi2sd, vcvtsi2ss, vcvtusi2sd, vcvtusi2ss):
1985 Fold CpuNo64 and Cpu64 templates. Use VexLIG/EVexLIG and VexW0/
1986 VexW1 instead of open-coding them.
1987 * i386-tbl.h: Re-generate.
1989 2020-02-17 Jan Beulich <jbeulich@suse.com>
1991 * i386-opc.tbl (AddrPrefixOpReg): Define.
1992 (monitor, invlpga, vmload, vmrun, vmsave, clzero, monitorx,
1993 umonitor, movdir64b, enqcmd, enqcmds): Fold Cpu64 and CpuNo64
1994 templates. Drop NoRex64.
1995 * i386-tbl.h: Re-generate.
1997 2020-02-17 Jan Beulich <jbeulich@suse.com>
2000 * i386-opc.tbl (vcvtpd2dq, vcvtpd2ps, vcvttpd2dq, vcvtpd2udq,
2001 vcvttpd2udq, vcvtqq2ps, vcvtuqq2ps): Split XMM/YMM source forms
2002 into Intel syntax instance (with Unpsecified) and AT&T one
2004 (vcvtneps2bf16): Likewise, along with folding the two so far
2006 * i386-tbl.h: Re-generate.
2008 2020-02-16 H.J. Lu <hongjiu.lu@intel.com>
2010 * i386-gen.c (cpu_flag_init): Remove CPU_ANY_SSE3_FLAGS from
2011 CPU_ANY_SSE4A_FLAGS.
2013 2020-02-17 Alan Modra <amodra@gmail.com>
2015 * i386-gen.c (cpu_flag_init): Correct last change.
2017 2020-02-16 H.J. Lu <hongjiu.lu@intel.com>
2019 * i386-gen.c (cpu_flag_init): Add CPU_ANY_SSE4A_FLAGS. Remove
2022 2020-02-14 H.J. Lu <hongjiu.lu@intel.com>
2024 * i386-opc.tbl (movsx): Remove Intel syntax comments.
2027 2020-02-14 Jan Beulich <jbeulich@suse.com>
2030 * i386-opc.tbl (movsx): Fold patterns. Also allow Reg32 as
2031 destination for Cpu64-only variant.
2032 (movzx): Fold patterns.
2033 * i386-tbl.h: Re-generate.
2035 2020-02-13 Jan Beulich <jbeulich@suse.com>
2037 * i386-gen.c (cpu_flag_init): Move CpuSSE4a from
2038 CPU_ANY_SSE_FLAGS entry to CPU_ANY_SSE3_FLAGS one. Add
2039 CPU_ANY_SSE4_FLAGS entry.
2040 * i386-init.h: Re-generate.
2042 2020-02-12 Jan Beulich <jbeulich@suse.com>
2044 * i386-opc.tbl (vfpclasspd, vfpclassps): Add Intel sytax form
2045 with Unspecified, making the present one AT&T syntax only.
2046 * i386-tbl.h: Re-generate.
2048 2020-02-12 Jan Beulich <jbeulich@suse.com>
2050 * i386-opc.tbl (jmp): Fold CpuNo64 and Amd64 direct variants.
2051 * i386-tbl.h: Re-generate.
2053 2020-02-12 Jan Beulich <jbeulich@suse.com>
2056 * i386-dis.c (putop): Handle REX.W in '^' case for Intel64 mode.
2057 * i386-opc.tbl (lfs, lgs, lss, lcall, ljmp): Split into
2058 Amd64 and Intel64 templates.
2059 (call, jmp): Likewise for far indirect variants. Dro
2061 * i386-tbl.h: Re-generate.
2063 2020-02-11 Jan Beulich <jbeulich@suse.com>
2065 * i386-gen.c (opcode_modifiers): Remove ShortForm entry.
2066 * i386-opc.h (ShortForm): Delete.
2067 (struct i386_opcode_modifier): Remove shortform field.
2068 * i386-opc.tbl (mov, movabs, push, pop, xchg, inc, dec, fld,
2069 fst, fstp, fxch, fcom, fcomp, fucom, fucomp, fadd, faddp, fsub,
2070 fsubp, fsubr, fsubrp, fmul, fmulp, fdiv, fdivp, fdivr, fdivrp,
2071 ffreep, bswap, fcmov*, fcomi, fcomip, fucomi, fucomip, movq):
2073 * i386-tbl.h: Re-generate.
2075 2020-02-11 Jan Beulich <jbeulich@suse.com>
2077 * i386-opc.tbl (fcomi, fucomi, fcomip, fcompi, fucomip,
2078 fucompi): Drop ShortForm from operand-less templates.
2079 * i386-tbl.h: Re-generate.
2081 2020-02-11 Alan Modra <amodra@gmail.com>
2083 * cgen-ibld.in (extract_normal): Set *valuep on all return paths.
2084 * bpf-ibld.c, * epiphany-ibld.c, * fr30-ibld.c, * frv-ibld.c,
2085 * ip2k-ibld.c, * iq2000-ibld.c, * lm32-ibld.c, * m32c-ibld.c,
2086 * m32r-ibld.c, * mep-ibld.c, * mt-ibld.c, * or1k-ibld.c,
2087 * xc16x-ibld.c, * xstormy16-ibld.c: Regenerate.
2089 2020-02-10 Matthew Malcomson <matthew.malcomson@arm.com>
2091 * arm-dis.c (print_insn_cde): Define 'V' parse character.
2092 (cde_opcodes): Add VCX* instructions.
2094 2020-02-10 Stam Markianos-Wright <stam.markianos-wright@arm.com>
2095 Matthew Malcomson <matthew.malcomson@arm.com>
2097 * arm-dis.c (struct cdeopcode32): New.
2098 (CDE_OPCODE): New macro.
2099 (cde_opcodes): New disassembly table.
2100 (regnames): New option to table.
2101 (cde_coprocs): New global variable.
2102 (print_insn_cde): New
2103 (print_insn_thumb32): Use print_insn_cde.
2104 (parse_arm_disassembler_options): Parse coprocN args.
2106 2020-02-10 H.J. Lu <hongjiu.lu@intel.com>
2109 * i386-gen.c (opcode_modifiers): Replace AMD64 and Intel64
2111 * i386-opc.h (AMD64): Removed.
2112 (Intel64): Likewose.
2114 (INTEL64): Likewise.
2115 (INTEL64ONLY): Likewise.
2116 (i386_opcode_modifier): Replace amd64 and intel64 with isa64.
2117 * i386-opc.tbl (Amd64): New.
2118 (Intel64): Likewise.
2119 (Intel64Only): Likewise.
2120 Replace AMD64 with Amd64. Update sysenter/sysenter with
2121 Cpu64 and Intel64Only. Remove AMD64 from sysenter/sysenter.
2122 * i386-tbl.h: Regenerated.
2124 2020-02-07 Sergey Belyashov <sergey.belyashov@gmail.com>
2127 * z80-dis.c: Add support for GBZ80 opcodes.
2129 2020-02-04 Alan Modra <amodra@gmail.com>
2131 * d30v-dis.c (print_insn): Make "val" and "opnum" unsigned.
2133 2020-02-03 Alan Modra <amodra@gmail.com>
2135 * m32c-ibld.c: Regenerate.
2137 2020-02-01 Alan Modra <amodra@gmail.com>
2139 * frv-ibld.c: Regenerate.
2141 2020-01-31 Jan Beulich <jbeulich@suse.com>
2143 * i386-dis.c (EXxmm_mdq, xmm_mdq_mode): Delete.
2144 (intel_operand_size, OP_EX): Drop xmm_mdq_mode case label.
2145 (OP_E_memory): Replace xmm_mdq_mode case label by
2146 vex_scalar_w_dq_mode one.
2147 * i386-dis-evex-prefix.h: Replace EXxmm_mdq by EXVexWdqScalar.
2149 2020-01-31 Jan Beulich <jbeulich@suse.com>
2151 * i386-dis.c (EXVexWdq, vex_w_dq_mode): Delete.
2152 (vex_vsib_d_w_dq_mode, vex_vsib_q_w_dq_mode,
2153 vex_scalar_w_dq_mode): Don't refer to vex_w_dq_mode in comments.
2154 (intel_operand_size): Drop vex_w_dq_mode case label.
2156 2020-01-31 Richard Sandiford <richard.sandiford@arm.com>
2158 * aarch64-tbl.h (aarch64_opcode): Set C_MAX_ELEM for SVE bfcvt.
2159 Remove C_SCAN_MOVPRFX for SVE bfcvtnt.
2161 2020-01-30 Alan Modra <amodra@gmail.com>
2163 * m32c-ibld.c: Regenerate.
2165 2020-01-30 Jose E. Marchesi <jose.marchesi@oracle.com>
2167 * bpf-opc.c: Regenerate.
2169 2020-01-30 Jan Beulich <jbeulich@suse.com>
2171 * i386-dis.c (X86_64_C2, X86_64_C3): New enumerators.
2172 (dis386): Use them to replace C2/C3 table entries.
2173 (x86_64_table): Add X86_64_C2 and X86_64_C3 entries.
2174 * i386-opc.tbl (ret): Split Cpu64 entries into AMD64 and Intel64
2175 ones. Use Size64 instead of DefaultSize on Intel64 ones.
2176 * i386-tbl.h: Re-generate.
2178 2020-01-30 Jan Beulich <jbeulich@suse.com>
2180 * i386-opc.tbl (call): Drop DefaultSize from Intel64 JumpDword
2182 (fldenv, fnstenv, fstenv, fnsave, fsave, frstor): Drop
2184 * i386-tbl.h: Re-generate.
2186 2020-01-30 Alan Modra <amodra@gmail.com>
2188 * tic4x-dis.c (tic4x_dp): Make unsigned.
2190 2020-01-27 H.J. Lu <hongjiu.lu@intel.com>
2191 Jan Beulich <jbeulich@suse.com>
2194 * i386-dis.c (MOVSXD_Fixup): New function.
2195 (movsxd_mode): New enum.
2196 (x86_64_table): Use MOVSXD_Fixup and movsxd_mode on movsxd.
2197 (intel_operand_size): Handle movsxd_mode.
2198 (OP_E_register): Likewise.
2200 * i386-opc.tbl: Remove Rex64 and allow 32-bit destination
2201 register on movsxd. Add movsxd with 16-bit destination register
2202 for AMD64 and Intel64 ISAs.
2203 * i386-tbl.h: Regenerated.
2205 2020-01-27 Tamar Christina <tamar.christina@arm.com>
2208 * aarch64-tbl.h (struct aarch64_opcode): Re-order cfinv.
2209 * aarch64-asm-2.c: Regenerate
2210 * aarch64-dis-2.c: Likewise.
2211 * aarch64-opc-2.c: Likewise.
2213 2020-01-21 Jan Beulich <jbeulich@suse.com>
2215 * i386-opc.tbl (sysret): Drop DefaultSize.
2216 * i386-tbl.h: Re-generate.
2218 2020-01-21 Jan Beulich <jbeulich@suse.com>
2220 * i386-opc.tbl (vcvtneps2bf16x): Add Broadcast, Xmmword, and
2222 (vcvtneps2bf16y): Add Broadcast, Ymmword, and Dword.
2223 * i386-tbl.h: Re-generate.
2225 2020-01-20 Nick Clifton <nickc@redhat.com>
2227 * po/de.po: Updated German translation.
2228 * po/pt_BR.po: Updated Brazilian Portuguese translation.
2229 * po/uk.po: Updated Ukranian translation.
2231 2020-01-20 Alan Modra <amodra@gmail.com>
2233 * hppa-dis.c (fput_const): Remove useless cast.
2235 2020-01-20 Alan Modra <amodra@gmail.com>
2237 * arm-dis.c (print_insn_arm): Wrap 'T' value.
2239 2020-01-18 Nick Clifton <nickc@redhat.com>
2241 * configure: Regenerate.
2242 * po/opcodes.pot: Regenerate.
2244 2020-01-18 Nick Clifton <nickc@redhat.com>
2246 Binutils 2.34 branch created.
2248 2020-01-17 Christian Biesinger <cbiesinger@google.com>
2250 * opintl.h: Fix spelling error (seperate).
2252 2020-01-17 H.J. Lu <hongjiu.lu@intel.com>
2254 * i386-opc.tbl: Add {vex} pseudo prefix.
2255 * i386-tbl.h: Regenerated.
2257 2020-01-16 Andre Vieira <andre.simoesdiasvieira@arm.com>
2260 * opcodes/arm-dis.c (coprocessor_opcodes): Use CORE_HIGH for MVE bits.
2261 (neon_opcodes): Likewise.
2262 (select_arm_features): Make sure we enable MVE bits when selecting
2263 armv8.1-m.main. Make sure we do not enable MVE bits when not selecting
2266 2020-01-16 Jan Beulich <jbeulich@suse.com>
2268 * i386-opc.tbl: Drop stale comment from XOP section.
2270 2020-01-16 Jan Beulich <jbeulich@suse.com>
2272 * i386-opc.tbl (movq): Add VexWIG to SSE2AVX XMM->XMM forms.
2273 (extractps): Add VexWIG to SSE2AVX forms.
2274 * i386-tbl.h: Re-generate.
2276 2020-01-16 Jan Beulich <jbeulich@suse.com>
2278 * i386-opc.tbl (pextrq, pinsrq): Drop IgnoreSize and Qword. Drop
2279 Size64 from and use VexW1 on SSE2AVX forms.
2280 (vpextrq, vpinsrq): Drop IgnoreSize and Qword. Drop Size64 from
2281 VEX-encoded forms. Add Cpu64 to EVEX-encoded forms. Use VexW1.
2282 * i386-tbl.h: Re-generate.
2284 2020-01-15 Alan Modra <amodra@gmail.com>
2286 * tic4x-dis.c (tic4x_version): Make unsigned long.
2287 (optab, optab_special, registernames): New file scope vars.
2288 (tic4x_print_register): Set up registernames rather than
2289 malloc'd registertable.
2290 (tic4x_disassemble): Delete optable and optable_special. Use
2291 optab and optab_special instead. Throw away old optab,
2292 optab_special and registernames when info->mach changes.
2294 2020-01-14 Sergey Belyashov <sergey.belyashov@gmail.com>
2297 * z80-dis.c (suffix): Use .db instruction to generate double
2300 2020-01-14 Alan Modra <amodra@gmail.com>
2302 * z8k-dis.c (unpack_instr): Formatting. Cast unsigned short
2303 values to unsigned before shifting.
2305 2020-01-13 Thomas Troeger <tstroege@gmx.de>
2307 * arm-dis.c (print_insn_arm): Fill in insn info fields for control
2309 (print_insn_thumb16, print_insn_thumb32): Likewise.
2310 (print_insn): Initialize the insn info.
2311 * i386-dis.c (print_insn): Initialize the insn info fields, and
2314 2012-01-13 Claudiu Zissulescu <claziss@gmail.com>
2316 * arc-opc.c (C_NE): Make it required.
2318 2012-01-13 Claudiu Zissulescu <claziss@gmail.com>
2320 * opcode/arc-dis.c (regnames): Correct ACCL/ACCH naming, fix typo
2321 reserved register name.
2323 2020-01-13 Alan Modra <amodra@gmail.com>
2325 * ns32k-dis.c (Is_gen): Use strchr, add 'f'.
2326 (print_insn_ns32k): Adjust ioffset for 'f' index_offset.
2328 2020-01-13 Alan Modra <amodra@gmail.com>
2330 * wasm32-dis.c (print_insn_wasm32): Localise variables. Store
2331 result of wasm_read_leb128 in a uint64_t and check that bits
2332 are not lost when copying to other locals. Use uint32_t for
2333 most locals. Use PRId64 when printing int64_t.
2335 2020-01-13 Alan Modra <amodra@gmail.com>
2337 * score-dis.c: Formatting.
2338 * score7-dis.c: Formatting.
2340 2020-01-13 Alan Modra <amodra@gmail.com>
2342 * score-dis.c (print_insn_score48): Use unsigned variables for
2343 unsigned values. Don't left shift negative values.
2344 (print_insn_score32): Likewise.
2345 * score7-dis.c (print_insn_score32, print_insn_score16): Likewise.
2347 2020-01-13 Alan Modra <amodra@gmail.com>
2349 * tic4x-dis.c (tic4x_print_register): Remove dead code.
2351 2020-01-13 Alan Modra <amodra@gmail.com>
2353 * fr30-ibld.c: Regenerate.
2355 2020-01-13 Alan Modra <amodra@gmail.com>
2357 * xgate-dis.c (print_insn): Don't left shift signed value.
2358 (ripBits): Formatting, use 1u.
2360 2020-01-10 Alan Modra <amodra@gmail.com>
2362 * tilepro-opc.c (parse_insn_tilepro): Make opval unsigned.
2363 * tilegx-opc.c (parse_insn_tilegx): Likewise. Delete raw_opval.
2365 2020-01-10 Alan Modra <amodra@gmail.com>
2367 * m10300-dis.c (disassemble): Move extraction of DREG, AREG, RREG,
2368 and XRREG value earlier to avoid a shift with negative exponent.
2369 * m10200-dis.c (disassemble): Similarly.
2371 2020-01-09 Nick Clifton <nickc@redhat.com>
2374 * z80-dis.c (ld_ii_ii): Use correct cast.
2376 2020-01-03 Sergey Belyashov <sergey.belyashov@gmail.com>
2379 * z80-dis.c (ld_ii_ii): Use character constant when checking
2382 2020-01-09 Jan Beulich <jbeulich@suse.com>
2384 * i386-dis.c (SEP_Fixup): New.
2386 (dis386_twobyte): Use it for sysenter/sysexit.
2387 (enum x86_64_isa): Change amd64 enumerator to value 1.
2388 (OP_J): Compare isa64 against intel64 instead of amd64.
2389 * i386-opc.tbl (sysenter, sysexit): Split into AMD64 and Intel64
2391 * i386-tbl.h: Re-generate.
2393 2020-01-08 Alan Modra <amodra@gmail.com>
2395 * z8k-dis.c: Include libiberty.h
2396 (instr_data_s): Make max_fetched unsigned.
2397 (z8k_lookup_instr): Make nibl_index and tabl_index unsigned.
2398 Don't exceed byte_info bounds.
2399 (output_instr): Make num_bytes unsigned.
2400 (unpack_instr): Likewise for nibl_count and loop.
2401 * z8kgen.c (gas <opcode_entry_type>): Make noperands, length and
2403 * z8k-opc.h: Regenerate.
2405 2020-01-07 Shahab Vahedi <shahab@synopsys.com>
2407 * arc-tbl.h (llock): Use 'LLOCK' as class.
2409 (scond): Use 'SCOND' as class.
2411 (llockd): Set data_size_mode to 'C_ZZ_D' which is 64-bit.
2414 2020-01-06 Alan Modra <amodra@gmail.com>
2416 * m32c-ibld.c: Regenerate.
2418 2020-01-06 Alan Modra <amodra@gmail.com>
2421 * z80-dis.c (suffix): Don't use a local struct buffer copy.
2422 Peek at next byte to prevent recursion on repeated prefix bytes.
2423 Ensure uninitialised "mybuf" is not accessed.
2424 (print_insn_z80): Don't zero n_fetch and n_used here,..
2425 (print_insn_z80_buf): ..do it here instead.
2427 2020-01-04 Alan Modra <amodra@gmail.com>
2429 * m32r-ibld.c: Regenerate.
2431 2020-01-04 Alan Modra <amodra@gmail.com>
2433 * cr16-dis.c (cr16_match_opcode): Avoid shift left of signed value.
2435 2020-01-04 Alan Modra <amodra@gmail.com>
2437 * crx-dis.c (match_opcode): Avoid shift left of signed value.
2439 2020-01-04 Alan Modra <amodra@gmail.com>
2441 * d30v-dis.c (print_insn): Avoid signed overflow in left shift.
2443 2020-01-03 Jan Beulich <jbeulich@suse.com>
2445 * aarch64-tbl.h (aarch64_opcode_table): Use
2446 SVE_ADDR_RX_LSL{1,2,3} for LD1RO{H,W,D}.
2448 2020-01-03 Jan Beulich <jbeulich@suse.com>
2450 * aarch64-tbl.h (aarch64_opcode_table): Correct SIMD
2451 forms of SUDOT and USDOT.
2453 2020-01-03 Jan Beulich <jbeulich@suse.com>
2455 * aarch64-tbl.h (aarch64_opcode_table): Drop 'i' from
2457 * opcodes/aarch64-dis-2.c: Re-generate.
2459 2020-01-03 Jan Beulich <jbeulich@suse.com>
2461 * aarch64-tbl.h (aarch64_opcode_table): Correct 64-bit
2463 * opcodes/aarch64-dis-2.c: Re-generate.
2465 2020-01-02 Sergey Belyashov <sergey.belyashov@gmail.com>
2467 * z80-dis.c: Add support for eZ80 and Z80 instructions.
2469 2020-01-01 Alan Modra <amodra@gmail.com>
2471 Update year range in copyright notice of all files.
2473 For older changes see ChangeLog-2019
2475 Copyright (C) 2020 Free Software Foundation, Inc.
2477 Copying and distribution of this file, with or without modification,
2478 are permitted in any medium without royalty provided the copyright
2479 notice and this notice are preserved.
2485 version-control: never
projects / thirdparty / binutils-gdb.git / blob