opcodes/ChangeLog

   1 2005-12-07  Hans-Peter Nilsson  <hp@axis.com>
   2
   3         * cris-opc.c (cris_opcodes) <"move" "s,P">: Define using
   4         MOVE_M_TO_PREG_OPCODE and MOVE_M_TO_PREG_ZBITS instead of constants.
   5
   6 2005-12-06  H.J. Lu  <hongjiu.lu@intel.com>
   7
   8         PR gas/1874
   9         * i386-dis.c (address_mode): New enum type.
  10         (address_mode): New variable.
  11         (mode_64bit): Removed.
  12         (ckprefix): Updated to check address_mode instead of mode_64bit.
  13         (prefix_name): Likewise.
  14         (print_insn): Likewise.
  15         (putop): Likewise.
  16         (print_operand_value): Likewise.
  17         (intel_operand_size): Likewise.
  18         (OP_E): Likewise.
  19         (OP_G): Likewise.
  20         (set_op): Likewise.
  21         (OP_REG): Likewise.
  22         (OP_I): Likewise.
  23         (OP_I64): Likewise.
  24         (OP_OFF): Likewise.
  25         (OP_OFF64): Likewise.
  26         (ptr_reg): Likewise.
  27         (OP_C): Likewise.
  28         (SVME_Fixup): Likewise.
  29         (print_insn): Set address_mode.
  30         (PNI_Fixup): Add 64bit and address size override support for
  31         monitor and mwait.
  32
  33 2005-12-06  Hans-Peter Nilsson  <hp@axis.com>
  34
  35         * cris-dis.c (bytes_to_skip): Handle new parameter prefix_matchedp.
  36         (print_with_operands): Check for prefix when [PC+] is seen.
  37
  38 2005-12-02  Dave Brolley  <brolley@redhat.com>
  39
  40         * configure.in (cgen_files): Add cgen-bitset.lo.
  41         (ta): Add cgen-bitset.lo when arch==bfd_cris_arch.
  42         * Makefile.am (CFILES): Add cgen-bitset.c.
  43         (ALL_MACHINES): Add cgen-bitset.lo.
  44         (cgen-bitset.lo): New target.
  45         * cgen-opc.c (cgen_bitset_create, cgen_bitset_init, cgen_bitset_clear)
  46         (cgen_bitset_add, cgen_bitset_set, cgen_bitset_contains)
  47         (cgen_bitset_compare, cgen_bitset_intersect_p, cgen_bitset_copy)
  48         (cgen_bitset_union): Moved from here ...
  49         * cgen-bitset.c: ... to here. New file.
  50         * Makefile.in: Regenerated.
  51         * configure: Regenerated.
  52
  53 2005-11-22  James E Wilson  <wilson@specifix.com>
  54
  55         * ia64-gen.c (_opcode_int64_low, _opcode_int64_high,
  56         opcode_fprintf_vma): New.
  57         (print_main_table): New opcode_fprintf_vma instead of fprintf_vma.
  58
  59 2005-11-16  Alan Modra  <amodra@bigpond.net.au>
  60
  61         * ppc-opc.c (powerpc_opcodes): Add frin,friz,frip,frim.  Correct
  62         frsqrtes.
  63
  64 2005-11-14  David Ung  <davidu@mips.com>
  65
  66         * mips16-opc.c: Add MIPS16e save/restore opcodes.
  67         * mips-dis.c (print_mips16_insn_arg): Handle printing of 'm'/'M'
  68         codes for save/restore.
  69
  70 2005-11-10  Andreas Schwab  <schwab@suse.de>
  71
  72         * m68k-dis.c (print_insn_m68k): Only match FPU insns with
  73         coprocessor ID 1.
  74
  75 2005-11-08  H.J. Lu  <hongjiu.lu@intel.com>
  76
  77         * m32c-desc.c: Regenerated.
  78
  79 2005-11-08  Nathan Sidwell  <nathan@codesourcery.com>
  80
  81         Add ms2.
  82         * ms1-asm.c, ms1-desc.c, ms1-desc.h, ms1-dis.c, ms1-ibld.c,
  83         ms1-opc.c, ms1-opc.h: Regenerated.
  84
  85 2005-11-07  Steve Ellcey  <sje@cup.hp.com>
  86
  87         * configure: Regenerate after modifying bfd/warning.m4.
  88
  89 2005-11-07  Alan Modra  <amodra@bigpond.net.au>
  90
  91         * i386-dis.c (ckprefix): Handle rex on fwait.  Don't print
  92         ignored rex prefixes here.
  93         (print_insn): Instead, handle them similarly to fwait followed
  94         by non-fp insns.
  95
  96 2005-11-02  H.J. Lu  <hongjiu.lu@intel.com>
  97
  98         * iq2000-desc.c: Regenerated.
  99         * iq2000-desc.h: Likewise.
 100         * iq2000-dis.c: Likewise.
 101         * iq2000-opc.c: Likewise.
 102
 103 2005-11-02  Paul Brook  <paul@codesourcery.com>
 104
 105         * arm-dis.c (print_insn_thumb32): Word align blx target address.
 106
 107 2005-10-31  Alan Modra  <amodra@bigpond.net.au>
 108
 109         * arm-dis.c (print_insn): Warning fix.
 110
 111 2005-10-30  H.J. Lu  <hongjiu.lu@intel.com>
 112
 113         * Makefile.am: Run "make dep-am".
 114         * Makefile.in: Regenerated.
 115
 116         * dep-in.sed: Replace " ./" with " ".
 117
 118 2005-10-28  Dave Brolley  <brolley@redhat.com>
 119
 120         * All CGEN-generated sources: Regenerate.
 121
 122         Contribute the following changes:
 123         2005-09-19  Dave Brolley  <brolley@redhat.com>
 124
 125         * disassemble.c (disassemble_init_for_target): Add 'break' to case for
 126         bfd_arch_tic4x. Use cgen_bitset_create and cgen_bitset_set for
 127         bfd_arch_m32c case.
 128
 129         2005-02-16  Dave Brolley  <brolley@redhat.com>
 130
 131         * cgen-dis.in: Rename CGEN_ISA_MASK to CGEN_BITSET. Rename
 132         cgen_isa_mask_* to cgen_bitset_*.
 133         * cgen-opc.c: Likewise.
 134
 135         2003-11-28  Richard Sandiford  <rsandifo@redhat.com>
 136
 137         * cgen-dis.in (print_insn_@arch@): Fix comparison with cached isas.
 138         * *-dis.c: Regenerate.
 139
 140         2003-06-05  DJ Delorie  <dj@redhat.com>
 141
 142         * cgen-dis.in (print_insn_@arch@): Copy prev_isas, don't assign
 143         it, as it may point to a reused buffer. Set prev_isas when we
 144         change cpus.
 145
 146         2002-12-13  Dave Brolley  <brolley@redhat.com>
 147
 148         * cgen-opc.c (cgen_isa_mask_create): New support function for
 149         CGEN_ISA_MASK.
 150         (cgen_isa_mask_init): Ditto.
 151         (cgen_isa_mask_clear): Ditto.
 152         (cgen_isa_mask_add): Ditto.
 153         (cgen_isa_mask_set): Ditto.
 154         (cgen_isa_supported): Ditto.
 155         (cgen_isa_mask_compare): Ditto.
 156         (cgen_isa_mask_intersection): Ditto.
 157         (cgen_isa_mask_copy): Ditto.
 158         (cgen_isa_mask_combine): Ditto.
 159         * cgen-dis.in (libiberty.h): #include it.
 160         (isas): Renamed from 'isa' and now (CGEN_ISA_MASK *).
 161         (print_insn_@arch@): Use CGEN_ISA_MASK and support functions.
 162         * Makefile.am (CGENDEPS): Add utils-cgen.scm and attrs.scm.
 163         * Makefile.in: Regenerated.
 164
 165 2005-10-27  DJ Delorie  <dj@redhat.com>
 166
 167         * m32c-asm.c: Regenerate.
 168         * m32c-desc.c: Regenerate.
 169         * m32c-desc.h: Regenerate.
 170         * m32c-dis.c: Regenerate.
 171         * m32c-ibld.c: Regenerate.
 172         * m32c-opc.c: Regenerate.
 173         * m32c-opc.h: Regenerate.
 174
 175 2005-10-26  DJ Delorie  <dj@redhat.com>
 176
 177         * m32c-asm.c: Regenerate.
 178         * m32c-desc.c: Regenerate.
 179         * m32c-desc.h: Regenerate.
 180         * m32c-dis.c: Regenerate.
 181         * m32c-ibld.c: Regenerate.
 182         * m32c-opc.c: Regenerate.
 183         * m32c-opc.h: Regenerate.
 184
 185 2005-10-26  Paul Brook  <paul@codesourcery.com>
 186
 187         * arm-dis.c (arm_opcodes): Correct "sel" entry.
 188
 189 2005-10-26  Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
 190
 191         * m32r-asm.c: Regenerate.
 192
 193 2005-10-25  DJ Delorie  <dj@redhat.com>
 194
 195         * m32c-asm.c: Regenerate.
 196         * m32c-desc.c: Regenerate.
 197         * m32c-desc.h: Regenerate.
 198         * m32c-dis.c: Regenerate.
 199         * m32c-ibld.c: Regenerate.
 200         * m32c-opc.c: Regenerate.
 201         * m32c-opc.h: Regenerate.
 202
 203 2005-10-25  Arnold Metselaar  <arnold.metselaar@planet.nl>
 204
 205         * configure.in: Add target architecture bfd_arch_z80.
 206         * configure: Regenerated.
 207         * disassemble.c (disassembler)<ARCH_z80>: Add case
 208         bfd_arch_z80.
 209         * z80-dis.c: New file.
 210
 211 2005-10-25  Alan Modra  <amodra@bigpond.net.au>
 212
 213         * po/POTFILES.in: Regenerate.
 214         * po/opcodes.pot: Regenerate.
 215
 216 2005-10-24  Jan Beulich  <jbeulich@novell.com>
 217
 218         * ia64-asmtab.c: Regenerate.
 219
 220 2005-10-21  DJ Delorie  <dj@redhat.com>
 221
 222         * m32c-asm.c: Regenerate.
 223         * m32c-desc.c: Regenerate.
 224         * m32c-desc.h: Regenerate.
 225         * m32c-dis.c: Regenerate.
 226         * m32c-ibld.c: Regenerate.
 227         * m32c-opc.c: Regenerate.
 228         * m32c-opc.h: Regenerate.
 229
 230 2005-10-21  Nick Clifton  <nickc@redhat.com>
 231
 232         * bfin-dis.c: Tidy up code, removing redundant constructs.
 233
 234 2005-10-19  Martin Schwidefsky  <schwidefsky@de.ibm.com>
 235
 236         * s390-opc.txt: Add unnormalized hfp multiply and multiply-and-add
 237         instructions.
 238
 239 2005-10-18  Nick Clifton  <nickc@redhat.com>
 240
 241         * m32r-asm.c: Regenerate after updating m32r.opc.
 242
 243 2005-10-18  Jie Zhang  <jie.zhang@analog.com>
 244
 245         * bfin-dis.c (print_insn_bfin): Do proper endian transform when
 246         reading instruction from memory.
 247
 248 2005-10-18  Nick Clifton  <nickc@redhat.com>
 249
 250         * m32r-asm.c: Regenerate after updating m32r.opc.
 251
 252 2005-10-14  Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
 253
 254         * m32r-asm.c: Regenerate after updating m32r.opc.
 255
 256 2005-10-08  James Lemke  <jim@wasabisystems.com>
 257
 258         * arm-dis.c (coprocessor_opcodes): Fix mask for various Maverick CDP
 259         operations.
 260
 261 2005-10-06  Daniel Jacobowitz  <dan@codesourcery.com>
 262
 263         * ppc-dis.c (struct dis_private): Remove.
 264         (powerpc_dialect): Avoid aliasing warnings.
 265         (print_insn_big_powerpc, print_insn_little_powerpc): Likewise.
 266
 267 2005-09-30  Nick Clifton  <nickc@redhat.com>
 268
 269         * po/ga.po: New Irish translation.
 270         * configure.in (ALL_LINGUAS): Add "ga".
 271         * configure: Regenerate.
 272
 273 2005-09-30  H.J. Lu  <hongjiu.lu@intel.com>
 274
 275         * Makefile.am: Run "make dep-am".
 276         * Makefile.in: Regenerated.
 277         * aclocal.m4: Likewise.
 278         * configure: Likewise.
 279
 280 2005-09-30  Catherine Moore  <clm@cm00re.com>
 281
 282         * Makefile.am: Bfin support.
 283         * Makefile.in: Regenerated.
 284         * aclocal.m4: Regenerated.
 285         * bfin-dis.c: New file.
 286         * configure.in: Bfin support.
 287         * configure: Regenerated.
 288         * disassemble.c (ARCH_bfin): Define.
 289         (disassembler): Add case for bfd_arch_bfin.
 290
 291 2005-09-28  Jan Beulich  <jbeulich@novell.com>
 292
 293         * i386-dis.c (stack_v_mode): Renamed from branch_v_mode.
 294         (indirEv): Use it.
 295         (stackEv): New.
 296         (Ob64, Ov64): Rename to Ob, Ov. Delete unused original definitions.
 297         (dis386): Document and use new 'V' meta character. Use it for
 298         single-byte push/pop opcode forms. Use stackEv for mod-r/m push/pop
 299         opcode forms. Correct typo in 'pop ss'. Replace Ob64/Ov64 by Ob/Ov.
 300         (putop): 'q' suffix for 'T' and 'U' meta depends on DFLAG. Mark
 301         data prefix as used whenever DFLAG was examined. Handle 'V'.
 302         (intel_operand_size): Use stack_v_mode.
 303         (OP_E): Use stack_v_mode, but handle only the special case of
 304         64-bit mode without operand size override here; fall through to
 305         v_mode case otherwise.
 306         (OP_REG): Special case rAX_reg ... rDI_reg only when 64-bit mode
 307         and no operand size override is present.
 308         (OP_J): Use get32s for obtaining the displacement also when rex64
 309         is present.
 310
 311 2005-09-08  Paul Brook  <paul@codesourcery.com>
 312
 313         * arm-dis.c (arm_opcodes, thumb32_opcodes): Rename smi to smc.
 314
 315 2005-09-06  Chao-ying Fu  <fu@mips.com>
 316
 317         * mips-opc.c (MT32): New define.
 318         (mips_builtin_opcodes): Move "bc0f", "bc0fl", "bc0t", "bc0tl" to the
 319         bottom to avoid opcode collision with "mftr" and "mttr".
 320         Add MT instructions.
 321         * mips-dis.c (mips_arch_choices): Enable INSN_MT for mips32r2.
 322         (print_insn_args): Add supports for +t, +T, !, $, *, &, g operand
 323         formats.
 324
 325 2005-09-02  Paul Brook  <paul@codesourcery.com>
 326
 327         * arm-dis.c (coprocessor_opcodes): Add null terminator.
 328
 329 2005-09-02  Paul Brook  <paul@codesourcery.com>
 330
 331         * arm-dis.c (coprocessor_opcodes): New.
 332         (arm_opcodes, thumb32_opcodes): Remove coprocessor insns.
 333         (print_insn_coprocessor): New function.
 334         (print_insn_arm): Use print_insn_coprocessor.  Remove coprocessor
 335         format characters.
 336         (print_insn_thumb32): Use print_insn_coprocessor.
 337
 338 2005-08-30  Paul Brook  <paul@codesourcery.com>
 339
 340         * arm-dis.c (thumb_opcodes): Disassemble sub(3) as subs.
 341
 342 2005-08-26  Jan Beulich  <jbeulich@novell.com>
 343
 344         * i386-dis.c (intel_operand_size): New, broken out from OP_E for
 345         re-use.
 346         (OP_E): Call intel_operand_size, move call site out of mode
 347         dependent code.
 348         (OP_OFF): Call intel_operand_size if suffix_always. Remove
 349         ATTRIBUTE_UNUSED from parameters.
 350         (OP_OFF64): Likewise.
 351         (OP_ESreg): Call intel_operand_size.
 352         (OP_DSreg): Likewise.
 353         (OP_DIR): Use colon rather than semicolon as separator of far
 354         jump/call operands.
 355
 356 2005-08-25  Chao-ying Fu  <fu@mips.com>
 357
 358         * mips-opc.c (WR_a, RD_a, MOD_a, DSP_VOLA, D32): New define.
 359         (mips_builtin_opcodes): Add DSP instructions.
 360         * mips-dis.c (mips_arch_choices): Enable INSN_DSP for mips32, mips32r2,
 361         mips64, mips64r2.
 362         (print_insn_args): Add supports for 3, 4, 5, 6, 7, 8, 9, 0, :, ', @
 363         operand formats.
 364
 365 2005-08-23  David Ung  <davidu@mips.com>
 366
 367         * mips16-opc.c (mips16_opcodes): Add the MIPS16e jalrc/jrc
 368         instructions to the table.
 369
 370 2005-08-18  Alan Modra  <amodra@bigpond.net.au>
 371
 372         * a29k-dis.c: Delete.
 373         * Makefile.am: Remove a29k support.
 374         * configure.in: Likewise.
 375         * disassemble.c: Likewise.
 376         * Makefile.in: Regenerate.
 377         * configure: Regenerate.
 378         * po/POTFILES.in: Regenerate.
 379
 380 2005-08-15  Daniel Jacobowitz  <dan@codesourcery.com>
 381
 382         * ppc-dis.c (powerpc_dialect): Handle e300.
 383         (print_ppc_disassembler_options): Likewise.
 384         * ppc-opc.c (PPCE300): Define.
 385         (powerpc_opcodes): Mark icbt as available for the e300.
 386
 387 2005-08-13  John David Anglin  <dave.anglin@nrc-cnrc.gc.ca>
 388
 389         * hppa-dis.c (print_insn_hppa): Don't print '%' before register names.
 390         Use "rp" instead of "%r2" in "b,l" insns.
 391
 392 2005-08-12 Martin Schwidefsky  <schwidefsky@de.ibm.com>
 393
 394         * s390-dis.c (print_insn_s390): Print unsigned operands with %u.
 395         * s390-mkopc.c (s390_opcode_cpu_val): Add support for cpu type z9-109.
 396         (main): Likewise.
 397         * s390-opc.c (I32_16, U32_16, M_16): Add defines 32 bit immediates
 398         and 4 bit optional masks.
 399         (INSTR_RIL_RI, INSTR_RIL_RU, INSTR_RRF_M0RR, INSTR_RSE_CCRD,
 400         INSTR_RSY_CCRD, INSTR_SSF_RRDRD): Add new instruction formats.
 401         (MASK_RIL_RI, MASK_RIL_RU, MASK_RRF_M0RR, MASK_RSE_CCRD,
 402         MASK_RSY_CCRD, MASK_SSF_RRDRD): Likewise.
 403         (s390_opformats): Likewise.
 404         * s390-opc.txt: Add new instructions for cpu type z9-109.
 405
 406 2005-08-05  John David Anglin  <dave.anglin@nrc-crnc.gc.ca>
 407
 408         * hppa-dis.c (print_insn_hppa): Prefix 21-bit values with "L%".
 409
 410 2005-07-29  Paul Brook  <paul@codesourcery.com>
 411
 412         * arm-dis.c: Fix disassebly of thumb2 writeback addressing modes.
 413
 414 2005-07-29  Paul Brook  <paul@codesourcery.com>
 415
 416         * arm-dis.c (thumb32_opc): Fix addressing mode for tbh.
 417         (print_insn_thumb32): Fix decoding of thumb2 'I' operands.
 418
 419 2005-07-25  DJ Delorie  <dj@redhat.com>
 420
 421         * m32c-asm.c Regenerate.
 422         * m32c-dis.c Regenerate.
 423
 424 2005-07-20  DJ Delorie  <dj@redhat.com>
 425
 426         * disassemble.c (disassemble_init_for_target): M32C ISAs are
 427         enums, so convert them to bit masks, which attributes are.
 428
 429 2005-07-18  Nick Clifton  <nickc@redhat.com>
 430
 431         * configure.in: Restore alpha ordering to list of arches.
 432         * configure: Regenerate.
 433         * disassemble.c: Restore alpha ordering to list of arches.
 434
 435 2005-07-18  Nick Clifton  <nickc@redhat.com>
 436
 437         * m32c-asm.c: Regenerate.
 438         * m32c-desc.c: Regenerate.
 439         * m32c-desc.h: Regenerate.
 440         * m32c-dis.c: Regenerate.
 441         * m32c-ibld.h: Regenerate.
 442         * m32c-opc.c: Regenerate.
 443         * m32c-opc.h: Regenerate.
 444
 445 2005-07-18  H.J. Lu  <hongjiu.lu@intel.com>
 446
 447         * i386-dis.c (PNI_Fixup): Update comment.
 448         (VMX_Fixup): Properly handle the suffix check.
 449
 450 2005-07-16  John David Anglin  <dave.anglin@nrc-cnrc.gc.ca>
 451
 452         * hppa-dis.c (print_insn_hppa): Add space after 'w' in wide-mode
 453         mfctl disassembly.
 454
 455 2005-07-16  Alan Modra  <amodra@bigpond.net.au>
 456
 457         * Makefile.am: Run "make dep-am".
 458         (stamp-m32c): Fix cpu dependencies.
 459         * Makefile.in: Regenerate.
 460         * ip2k-dis.c: Regenerate.
 461
 462 2007-07-15  H.J. Lu <hongjiu.lu@intel.com>
 463
 464         * i386-dis.c (OP_VMX): New. Handle Intel VMX Instructions.
 465         (VMX_Fixup): New. Fix up Intel VMX Instructions.
 466         (Em): New.
 467         (Gm): New.
 468         (VM): New.
 469         (dis386_twobyte): Updated entries 0x78 and 0x79.
 470         (twobyte_has_modrm): Likewise.
 471         (grps): Use OP_VMX in the "sgdtIQ" entry. Updated GRP9.
 472         (OP_G): Handle m_mode.
 473
 474 2005-07-14  Jim Blandy  <jimb@redhat.com>
 475
 476         Add support for the Renesas M32C and M16C.
 477         * m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c, m32c-opc.c: New.
 478         * m32c-desc.h, m32c-opc.h: New.
 479         * Makefile.am (HFILES): List m32c-desc.h and m32c-opc.h.
 480         (CFILES): List m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c,
 481         m32c-opc.c.
 482         (ALL_MACHINES): List m32c-asm.lo, m32c-desc.lo, m32c-dis.lo,
 483         m32c-ibld.lo, m32c-opc.lo.
 484         (CLEANFILES): List stamp-m32c.
 485         (M32C_DEPS): List stamp-m32c, if CGEN_MAINT.
 486         (CGEN_CPUS): Add m32c.
 487         (m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c, m32c-opc.c)
 488         (m32c-desc.h, m32c-opc.h): Depend on M32C_DEPS.
 489         (m32c_opc_h): New variable.
 490         (stamp-m32c, m32c-asm.lo, m32c-desc.lo, m32c-dis.lo, m32c-ibld.lo)
 491         (m32c-opc.lo): New rules.
 492         * Makefile.in: Regenerated.
 493         * configure.in: Add case for bfd_m32c_arch.
 494         * configure: Regenerated.
 495         * disassemble.c (ARCH_m32c): New.
 496         [ARCH_m32c]: #include "m32c-desc.h".
 497         (disassembler) [ARCH_m32c]: Add case for bfd_arch_m32c.
 498         (disassemble_init_for_target) [ARCH_m32c]: Same.
 499
 500         * cgen-ops.h, cgen-types.h: New files.
 501         * Makefile.am (HFILES): List them.
 502         * Makefile.in: Regenerated.
 503
 504 2005-07-07  Kaveh R. Ghazi  <ghazi@caip.rutgers.edu>
 505
 506         * arc-dis.c, arm-dis.c, cris-dis.c, crx-dis.c, d10v-dis.c,
 507         d30v-dis.c, fr30-dis.c, h8300-dis.c, h8500-dis.c, i860-dis.c,
 508         ia64-dis.c, ip2k-dis.c, m10200-dis.c, m10300-dis.c,
 509         m88k-dis.c, mcore-dis.c, mips-dis.c, ms1-dis.c, or32-dis.c,
 510         ppc-dis.c, sh64-dis.c, sparc-dis.c, tic4x-dis.c, tic80-dis.c,
 511         v850-dis.c: Fix format bugs.
 512         * ia64-gen.c (fail, warn): Add format attribute.
 513         * or32-opc.c (debug): Likewise.
 514
 515 2005-07-07  Khem Raj  <kraj@mvista.com>
 516
 517         * arm-dis.c (opcode32 arm_opcodes): Fix ARM VFP fadds instruction
 518         disassembly pattern.
 519
 520 2005-07-06  Alan Modra  <amodra@bigpond.net.au>
 521
 522         * Makefile.am (stamp-m32r): Fix path to cpu files.
 523         (stamp-m32r, stamp-iq2000): Likewise.
 524         * Makefile.in: Regenerate.
 525         * m32r-asm.c: Regenerate.
 526         * po/POTFILES.in: Remove arm-opc.h.  Add ms1-asm.c, ms1-desc.c,
 527         ms1-desc.h, ms1-dis.c, ms1-ibld.c, ms1-opc.c, ms1-opc.h.
 528
 529 2005-07-05  Nick Clifton  <nickc@redhat.com>
 530
 531         * iq2000-asm.c: Regenerate.
 532         * ms1-asm.c: Regenerate.
 533
 534 2005-07-05  Jan Beulich  <jbeulich@novell.com>
 535
 536         * i386-dis.c (SVME_Fixup): New.
 537         (grps): Use it for the lidt entry.
 538         (PNI_Fixup): Call OP_M rather than OP_E.
 539         (INVLPG_Fixup): Likewise.
 540
 541 2005-07-04  H.J. Lu  <hongjiu.lu@intel.com>
 542
 543         * tic30-dis.c (cnvt_tmsfloat_ieee): Use HUGE_VALF if defined.
 544
 545 2005-07-01  Nick Clifton  <nickc@redhat.com>
 546
 547         * a29k-dis.c: Update to ISO C90 style function declarations and
 548         fix formatting.
 549         * alpha-opc.c: Likewise.
 550         * arc-dis.c: Likewise.
 551         * arc-opc.c: Likewise.
 552         * avr-dis.c: Likewise.
 553         * cgen-asm.in: Likewise.
 554         * cgen-dis.in: Likewise.
 555         * cgen-ibld.in: Likewise.
 556         * cgen-opc.c: Likewise.
 557         * cris-dis.c: Likewise.
 558         * d10v-dis.c: Likewise.
 559         * d30v-dis.c: Likewise.
 560         * d30v-opc.c: Likewise.
 561         * dis-buf.c: Likewise.
 562         * dlx-dis.c: Likewise.
 563         * h8300-dis.c: Likewise.
 564         * h8500-dis.c: Likewise.
 565         * hppa-dis.c: Likewise.
 566         * i370-dis.c: Likewise.
 567         * i370-opc.c: Likewise.
 568         * m10200-dis.c: Likewise.
 569         * m10300-dis.c: Likewise.
 570         * m68k-dis.c: Likewise.
 571         * m88k-dis.c: Likewise.
 572         * mips-dis.c: Likewise.
 573         * mmix-dis.c: Likewise.
 574         * msp430-dis.c: Likewise.
 575         * ns32k-dis.c: Likewise.
 576         * or32-dis.c: Likewise.
 577         * or32-opc.c: Likewise.
 578         * pdp11-dis.c: Likewise.
 579         * pj-dis.c: Likewise.
 580         * s390-dis.c: Likewise.
 581         * sh-dis.c: Likewise.
 582         * sh64-dis.c: Likewise.
 583         * sparc-dis.c: Likewise.
 584         * sparc-opc.c: Likewise.
 585         * sysdep.h: Likewise.
 586         * tic30-dis.c: Likewise.
 587         * tic4x-dis.c: Likewise.
 588         * tic80-dis.c: Likewise.
 589         * v850-dis.c: Likewise.
 590         * v850-opc.c: Likewise.
 591         * vax-dis.c: Likewise.
 592         * w65-dis.c: Likewise.
 593         * z8kgen.c: Likewise.
 594
 595         * fr30-*: Regenerate.
 596         * frv-*: Regenerate.
 597         * ip2k-*: Regenerate.
 598         * iq2000-*: Regenerate.
 599         * m32r-*: Regenerate.
 600         * ms1-*: Regenerate.
 601         * openrisc-*: Regenerate.
 602         * xstormy16-*: Regenerate.
 603
 604 2005-06-23  Ben Elliston  <bje@gnu.org>
 605
 606         * m68k-dis.c: Use ISC C90.
 607         * m68k-opc.c: Formatting fixes.
 608
 609 2005-06-16  David Ung  <davidu@mips.com>
 610
 611         * mips16-opc.c (mips16_opcodes): Add the following MIPS16e
 612         instructions to the table; seb/seh/sew/zeb/zeh/zew.
 613
 614 2005-06-15  Dave Brolley  <brolley@redhat.com>
 615
 616         Contribute Morpho ms1 on behalf of Red Hat
 617         * ms1-asm.c, ms1-desc.c, ms1-dis.c, ms1-ibld.c, ms1-opc.c,
 618         ms1-opc.h: New files, Morpho ms1 target.
 619
 620         2004-05-14  Stan Cox  <scox@redhat.com>
 621
 622         * disassemble.c (ARCH_ms1): Define.
 623         (disassembler): Handle bfd_arch_ms1
 624
 625         2004-05-13  Michael Snyder  <msnyder@redhat.com>
 626
 627         * Makefile.am, Makefile.in: Add ms1 target.
 628         * configure.in: Ditto.
 629
 630 2005-06-08  Zack Weinberg  <zack@codesourcery.com>
 631
 632         * arm-opc.h: Delete; fold contents into ...
 633         * arm-dis.c: ... here.  Move includes of internal COFF headers
 634         next to includes of internal ELF headers.
 635         (streq, WORD_ADDRESS, BDISP, BDISP23): Delete, unused.
 636         (struct arm_opcode): Rename struct opcode32.  Make 'assembler' const.
 637         (struct thumb_opcode): Rename struct opcode16.  Make 'assembler' const.
 638         (arm_conditional, arm_fp_const, arm_shift, arm_regname, regnames)
 639         (iwmmxt_wwnames, iwmmxt_wwssnames):
 640         Make const.
 641         (regnames): Remove iWMMXt coprocessor register sets.
 642         (iwmmxt_regnames, iwmmxt_cregnames): New statics.
 643         (get_arm_regnames): Adjust fourth argument to match above changes.
 644         (set_iwmmxt_regnames): Delete.
 645         (print_insn_arm): Constify 'c'.  Use ISO syntax for function
 646         pointer calls.  Expand sole use of BDISP.  Use iwmmxt_regnames
 647         and iwmmxt_cregnames, not set_iwmmxt_regnames.
 648         (print_insn_thumb16, print_insn_thumb32): Constify 'c'.  Use
 649         ISO syntax for function pointer calls.
 650
 651 2005-06-07  Zack Weinberg  <zack@codesourcery.com>
 652
 653         * arm-dis.c: Split up the comments describing the format codes, so
 654         that the ARM and 16-bit Thumb opcode tables each have comments
 655         preceding them that describe all the codes, and only the codes,
 656         valid in those tables.  (32-bit Thumb table is already like this.)
 657         Reorder the lists in all three comments to match the order in
 658         which the codes are implemented.
 659         Remove all forward declarations of static functions.  Convert all
 660         function definitions to ISO C format.
 661         (print_insn_arm, print_insn_thumb16, print_insn_thumb32):
 662         Return nothing.
 663         (print_insn_thumb16): Remove unused case 'I'.
 664         (print_insn): Update for changed calling convention of subroutines.
 665
 666 2005-05-25  Jan Beulich  <jbeulich@novell.com>
 667
 668         * i386-dis.c (OP_E): In Intel mode, display 32-bit displacements in
 669         hex (but retain it being displayed as signed). Remove redundant
 670         checks. Add handling of displacements for 16-bit addressing in Intel
 671         mode.
 672
 673 2005-05-25  Jan Beulich  <jbeulich@novell.com>
 674
 675         * i386-dis.c (prefix_name): Remove pointless mode_64bit check.
 676         (OP_E): Remove redundant REX_EXTZ handling. Remove pointless
 677         masking of 'rm' in 16-bit memory address handling.
 678
 679 2005-05-19  Anton Blanchard  <anton@samba.org>
 680
 681         * ppc-dis.c (powerpc_dialect): Handle "-Mpower5".
 682         (print_ppc_disassembler_options): Document it.
 683         * ppc-opc.c (SVC_LEV): Define.
 684         (LEV): Allow optional operand.
 685         (POWER5): Define.
 686         (powerpc_opcodes): Extend "sc".  Adjust "svc" and "svcl".  Add
 687         "hrfid", "popcntb", "fsqrtes", "fsqrtes.", "fre" and "fre.".
 688
 689 2005-05-19  Kelley Cook  <kcook@gcc.gnu.org>
 690
 691         * Makefile.in:  Regenerate.
 692
 693 2005-05-17  Zack Weinberg  <zack@codesourcery.com>
 694
 695         * arm-dis.c (thumb_opcodes): Add disassembly for V6T2 16-bit
 696         instructions.  Adjust disassembly of some opcodes to match
 697         unified syntax.
 698         (thumb32_opcodes): New table.
 699         (print_insn_thumb): Rename print_insn_thumb16; don't handle
 700         two-halfword branches here.
 701         (print_insn_thumb32): New function.
 702         (print_insn): Choose among print_insn_arm, print_insn_thumb16,
 703         and print_insn_thumb32.  Be consistent about order of
 704         halfwords when printing 32-bit instructions.
 705
 706 2005-05-07  H.J. Lu  <hongjiu.lu@intel.com>
 707
 708         PR 843
 709         * i386-dis.c (branch_v_mode): New.
 710         (indirEv): Use branch_v_mode instead of v_mode.
 711         (OP_E): Handle branch_v_mode.
 712
 713 2005-05-07  H.J. Lu  <hongjiu.lu@intel.com>
 714
 715         * d10v-dis.c (dis_2_short): Support 64bit host.
 716
 717 2005-05-07  Nick Clifton  <nickc@redhat.com>
 718
 719         * po/nl.po: Updated translation.
 720
 721 2005-05-07  Nick Clifton  <nickc@redhat.com>
 722
 723         * Update the address and phone number of the FSF organization in
 724         the GPL notices in the following files:
 725         a29k-dis.c, aclocal.m4, alpha-dis.c, alpha-opc.c, arc-dis.c,
 726         arc-dis.h, arc-ext.c, arc-ext.h, arc-opc.c, arm-dis.c, arm-opc.h,
 727         avr-dis.c, cgen-asm.c, cgen-asm.in, cgen-dis.c, cgen-dis.in,
 728         cgen-ibld.in, cgen-opc.c, cgen.sh, cris-dis.c, cris-opc.c,
 729         crx-dis.c, crx-opc.c, d10v-dis.c, d10v-opc.c, d30v-dis.c,
 730         d30v-opc.c, dis-buf.c, dis-init.c, disassemble.c, dlx-dis.c,
 731         fr30-asm.c, fr30-desc.c, fr30-desc.h, fr30-dis.c, fr30-ibld.c,
 732         fr30-opc.c, fr30-opc.h, frv-asm.c, frv-desc.c, frv-desc.h,
 733         frv-dis.c, frv-ibld.c, frv-opc.c, frv-opc.h, h8300-dis.c,
 734         h8500-dis.c, h8500-opc.h, hppa-dis.c, i370-dis.c, i370-opc.c,
 735         i386-dis.c, i860-dis.c, i960-dis.c, ia64-asmtab.h, ia64-dis.c,
 736         ia64-gen.c, ia64-opc-a.c, ia64-opc-b.c, ia64-opc-d.c,
 737         ia64-opc-f.c, ia64-opc-i.c, ia64-opc-m.c, ia64-opc-x.c,
 738         ia64-opc.c, ia64-opc.h, ip2k-asm.c, ip2k-desc.c, ip2k-desc.h,
 739         ip2k-dis.c, ip2k-ibld.c, ip2k-opc.c, ip2k-opc.h, iq2000-asm.c,
 740         iq2000-desc.c, iq2000-desc.h, iq2000-dis.c, iq2000-ibld.c,
 741         iq2000-opc.c, iq2000-opc.h, m10200-dis.c, m10200-opc.c,
 742         m10300-dis.c, m10300-opc.c, m32r-asm.c, m32r-desc.c, m32r-desc.h,
 743         m32r-dis.c, m32r-ibld.c, m32r-opc.c, m32r-opc.h, m32r-opinst.c,
 744         m68hc11-dis.c, m68hc11-opc.c, m68k-dis.c, m68k-opc.c, m88k-dis.c,
 745         maxq-dis.c, mcore-dis.c, mcore-opc.h, mips-dis.c, mips-opc.c,
 746         mips16-opc.c, mmix-dis.c, mmix-opc.c, msp430-dis.c, ns32k-dis.c,
 747         openrisc-asm.c, openrisc-desc.c, openrisc-desc.h, openrisc-dis.c,
 748         openrisc-ibld.c, openrisc-opc.c, openrisc-opc.h, opintl.h,
 749         or32-dis.c, or32-opc.c, pdp11-dis.c, pdp11-opc.c, pj-dis.c,
 750         pj-opc.c, ppc-dis.c, ppc-opc.c, s390-dis.c, s390-mkopc.c,
 751         s390-opc.c, sh-dis.c, sh-opc.h, sh64-dis.c, sh64-opc.c,
 752         sh64-opc.h, sparc-dis.c, sparc-opc.c, sysdep.h, tic30-dis.c,
 753         tic4x-dis.c, tic54x-dis.c, tic54x-opc.c, tic80-dis.c, tic80-opc.c,
 754         v850-dis.c, v850-opc.c, vax-dis.c, w65-dis.c, w65-opc.h,
 755         xstormy16-asm.c, xstormy16-desc.c, xstormy16-desc.h,
 756         xstormy16-dis.c, xstormy16-ibld.c, xstormy16-opc.c,
 757         xstormy16-opc.h, xtensa-dis.c, z8k-dis.c, z8kgen.c
 758
 759 2005-05-05  James E Wilson  <wilson@specifixinc.com>
 760
 761         * ia64-opc.c: Include sysdep.h before libiberty.h.
 762
 763 2005-05-05  Nick Clifton  <nickc@redhat.com>
 764
 765         * configure.in (ALL_LINGUAS): Add vi.
 766         * configure: Regenerate.
 767         * po/vi.po: New.
 768
 769 2005-04-26  Jerome Guitton  <guitton@gnat.com>
 770
 771         * configure.in: Fix the check for basename declaration.
 772         * configure: Regenerate.
 773
 774 2005-04-19  Alan Modra  <amodra@bigpond.net.au>
 775
 776         * ppc-opc.c (RTO): Define.
 777         (powerpc_opcodes <tlbsx, tlbsx., tlbre>): Combine PPC403 and BOOKE
 778         entries to suit PPC440.
 779
 780 2005-04-18  Mark Kettenis  <kettenis@gnu.org>
 781
 782         * i386-dis.c: Insert hyphens into selected VIA PadLock extensions.
 783         Add xcrypt-ctr.
 784
 785 2005-04-14  Nick Clifton  <nickc@redhat.com>
 786
 787         * po/fi.po: New translation: Finnish.
 788         * configure.in (ALL_LINGUAS): Add fi.
 789         * configure: Regenerate.
 790
 791 2005-04-14  Alan Modra  <amodra@bigpond.net.au>
 792
 793         * Makefile.am (NO_WERROR): Define.
 794         * configure.in: Invoke AM_BINUTILS_WARNINGS.
 795         * Makefile.in: Regenerate.
 796         * aclocal.m4: Regenerate.
 797         * configure: Regenerate.
 798
 799 2005-04-04  Nick Clifton  <nickc@redhat.com>
 800
 801         * fr30-asm.c: Regenerate.
 802         * frv-asm.c: Regenerate.
 803         * iq2000-asm.c: Regenerate.
 804         * m32r-asm.c: Regenerate.
 805         * openrisc-asm.c: Regenerate.
 806
 807 2005-04-01  Jan Beulich  <jbeulich@novell.com>
 808
 809         * i386-dis.c (PNI_Fixup): Neither mwait nor monitor have any
 810         visible operands in Intel mode. The first operand of monitor is
 811         %rax in 64-bit mode.
 812
 813 2005-04-01  Jan Beulich  <jbeulich@novell.com>
 814
 815         * i386-dis.c (INVLPG_Fixup): Decode rdtscp; change code to allow for
 816         easier future additions.
 817
 818 2005-03-31  Jerome Guitton  <guitton@gnat.com>
 819
 820         * configure.in: Check for basename.
 821         * configure: Regenerate.
 822         * config.in: Ditto.
 823
 824 2005-03-29  H.J. Lu  <hongjiu.lu@intel.com>
 825
 826         * i386-dis.c (SEG_Fixup): New.
 827         (Sv): New.
 828         (dis386): Use "Sv" for 0x8c and 0x8e.
 829
 830 2005-03-21  Jan-Benedict Glaw  <jbglaw@lug-owl.de>
 831             Nick Clifton  <nickc@redhat.com>
 832
 833         * vax-dis.c: (entry_addr): New varible:  An array of user supplied
 834         function entry mask addresses.
 835         (entry_addr_occupied_slots): New variable: The number of occupied
 836         elements in entry_addr.
 837         (entry_addr_total_slots): New variable: The total number of
 838         elements in entry_addr.
 839         (parse_disassembler_options): New function.  Fills in the entry_addr
 840         array.
 841         (free_entry_array): New function.  Release the memory used by the
 842         entry addr array.  Suppressed because there is no way to call it.
 843         (is_function_entry): Check if a given address is a function's
 844         start address by looking at supplied entry mask addresses and
 845         symbol information, if available.
 846         (print_insn_vax): Use parse_disassembler_options and is_function_entry.
 847
 848 2005-03-23  H.J. Lu  <hongjiu.lu@intel.com>
 849
 850         * cris-dis.c (print_with_operands): Use ~31L for long instead
 851         of ~31.
 852
 853 2005-03-20  H.J. Lu  <hongjiu.lu@intel.com>
 854
 855         * mmix-opc.c (O): Revert the last change.
 856         (Z): Likewise.
 857
 858 2005-03-19  H.J. Lu  <hongjiu.lu@intel.com>
 859
 860         * mmix-opc.c (O): Use 24UL instead of 24 for unsigned long.
 861         (Z): Likewise.
 862
 863 2005-03-19  Hans-Peter Nilsson  <hp@bitrange.com>
 864
 865         * mmix-opc.c (O, Z): Force expression as unsigned long.
 866
 867 2005-03-18  Nick Clifton  <nickc@redhat.com>
 868
 869         * ip2k-asm.c: Regenerate.
 870         * op/opcodes.pot: Regenerate.
 871
 872 2005-03-16  Nick Clifton  <nickc@redhat.com>
 873             Ben Elliston  <bje@au.ibm.com>
 874
 875         * configure.in (werror): New switch: Add -Werror to the
 876         compiler command line.  Enabled by default.  Disable via
 877         --disable-werror.
 878         * configure: Regenerate.
 879
 880 2005-03-16  Alan Modra  <amodra@bigpond.net.au>
 881
 882         * ppc-dis.c (powerpc_dialect): Don't set PPC_OPCODE_ALTIVEC when
 883         BOOKE.
 884
 885 2005-03-15  Alan Modra  <amodra@bigpond.net.au>
 886
 887         * po/es.po: Commit new Spanish translation.
 888
 889         * po/fr.po: Commit new French translation.
 890
 891 2005-03-14  Jan-Benedict Glaw  <jbglaw@lug-owl.de>
 892
 893         * vax-dis.c: Fix spelling error
 894         (print_insn_vax): Use ".word 0x0012 # Entry mask: r1 r2 >" instead
 895         of just "Entry mask: < r1 ... >"
 896
 897 2005-03-12  Zack Weinberg  <zack@codesourcery.com>
 898
 899         * arm-dis.c (arm_opcodes): Document %E and %V.
 900         Add entries for v6T2 ARM instructions:
 901         bfc bfi mls strht ldrht ldrsht ldrsbt movw movt rbit ubfx sbfx.
 902         (print_insn_arm): Add support for %E and %V.
 903         (thumb_opcodes): Add ARMv6K instructions nop, sev, wfe, wfi, yield.
 904
 905 2005-03-10  Jeff Baker  <jbaker@qnx.com>
 906             Alan Modra  <amodra@bigpond.net.au>
 907
 908         * ppc-opc.c (insert_sprg, extract_sprg): New Functions.
 909         (powerpc_operands <SPRG>): Call the above.  Bit field is 5 bits.
 910         (SPRG_MASK): Delete.
 911         (XSPRG_MASK): Mask off extra bits now part of sprg field.
 912         (powerpc_opcodes): Asjust mfsprg and mtsprg to suit new mask.  Move
 913         mfsprg4..7 after msprg and consolidate.
 914
 915 2005-03-09  Jan-Benedict Glaw  <jbglaw@lug-owl.de>
 916
 917         * vax-dis.c (entry_mask_bit): New array.
 918         (print_insn_vax): Decode function entry mask.
 919
 920 2005-03-07  Aldy Hernandez  <aldyh@redhat.com>
 921
 922         * ppc-opc.c (powerpc_opcodes): Fix encoding of efscfd.
 923
 924 2005-03-05  Alan Modra  <amodra@bigpond.net.au>
 925
 926         * po/opcodes.pot: Regenerate.
 927
 928 2005-03-03  Ramana Radhakrishnan  <ramana.radhakrishnan@codito.com>
 929
 930         * arc-dis.c (a4_decoding_class): New enum.
 931         (dsmOneArcInst): Use the enum values for the decoding class.
 932         Remove redundant case in the switch for decodingClass value 11.
 933
 934 2005-03-02  Jan Beulich  <jbeulich@novell.com>
 935
 936         * i386-dis.c (print_insn): Suppress lock prefix printing for cr8...15
 937         accesses.
 938         (OP_C): Consider lock prefix in non-64-bit modes.
 939
 940 2005-02-24  Alan Modra  <amodra@bigpond.net.au>
 941
 942         * cris-dis.c (format_hex): Remove ineffective warning fix.
 943         * crx-dis.c (make_instruction): Warning fix.
 944         * frv-asm.c: Regenerate.
 945
 946 2005-02-23  Nick Clifton  <nickc@redhat.com>
 947
 948         * cgen-dis.in: Use bfd_byte for buffers that are passed to
 949         read_memory.
 950
 951         * ia64-opc.c (locate_opcode_ent): Initialise opval array.
 952
 953         * crx-dis.c (make_instruction): Move argument structure into inner
 954         scope and ensure that all of its fields are initialised before
 955         they are used.
 956
 957         * fr30-asm.c: Regenerate.
 958         * fr30-dis.c: Regenerate.
 959         * frv-asm.c: Regenerate.
 960         * frv-dis.c: Regenerate.
 961         * ip2k-asm.c: Regenerate.
 962         * ip2k-dis.c: Regenerate.
 963         * iq2000-asm.c: Regenerate.
 964         * iq2000-dis.c: Regenerate.
 965         * m32r-asm.c: Regenerate.
 966         * m32r-dis.c: Regenerate.
 967         * openrisc-asm.c: Regenerate.
 968         * openrisc-dis.c: Regenerate.
 969         * xstormy16-asm.c: Regenerate.
 970         * xstormy16-dis.c: Regenerate.
 971
 972 2005-02-22  Alan Modra  <amodra@bigpond.net.au>
 973
 974         * arc-ext.c: Warning fixes.
 975         * arc-ext.h: Likewise.
 976         * cgen-opc.c: Likewise.
 977         * ia64-gen.c: Likewise.
 978         * maxq-dis.c: Likewise.
 979         * ns32k-dis.c: Likewise.
 980         * w65-dis.c: Likewise.
 981         * ia64-asmtab.c: Regenerate.
 982
 983 2005-02-22  Alan Modra  <amodra@bigpond.net.au>
 984
 985         * fr30-desc.c: Regenerate.
 986         * fr30-desc.h: Regenerate.
 987         * fr30-opc.c: Regenerate.
 988         * fr30-opc.h: Regenerate.
 989         * frv-desc.c: Regenerate.
 990         * frv-desc.h: Regenerate.
 991         * frv-opc.c: Regenerate.
 992         * frv-opc.h: Regenerate.
 993         * ip2k-desc.c: Regenerate.
 994         * ip2k-desc.h: Regenerate.
 995         * ip2k-opc.c: Regenerate.
 996         * ip2k-opc.h: Regenerate.
 997         * iq2000-desc.c: Regenerate.
 998         * iq2000-desc.h: Regenerate.
 999         * iq2000-opc.c: Regenerate.
1000         * iq2000-opc.h: Regenerate.
1001         * m32r-desc.c: Regenerate.
1002         * m32r-desc.h: Regenerate.
1003         * m32r-opc.c: Regenerate.
1004         * m32r-opc.h: Regenerate.
1005         * m32r-opinst.c: Regenerate.
1006         * openrisc-desc.c: Regenerate.
1007         * openrisc-desc.h: Regenerate.
1008         * openrisc-opc.c: Regenerate.
1009         * openrisc-opc.h: Regenerate.
1010         * xstormy16-desc.c: Regenerate.
1011         * xstormy16-desc.h: Regenerate.
1012         * xstormy16-opc.c: Regenerate.
1013         * xstormy16-opc.h: Regenerate.
1014
1015 2005-02-21  Alan Modra  <amodra@bigpond.net.au>
1016
1017         * Makefile.am: Run "make dep-am"
1018         * Makefile.in: Regenerate.
1019
1020 2005-02-15  Nick Clifton  <nickc@redhat.com>
1021
1022         * cgen-dis.in (print_address): Add an ATTRIBUTE_UNUSED to prevent
1023         compile time warnings.
1024         (print_keyword): Likewise.
1025         (default_print_insn): Likewise.
1026
1027         * fr30-desc.c: Regenerated.
1028         * fr30-desc.h: Regenerated.
1029         * fr30-dis.c: Regenerated.
1030         * fr30-opc.c: Regenerated.
1031         * fr30-opc.h: Regenerated.
1032         * frv-desc.c: Regenerated.
1033         * frv-dis.c: Regenerated.
1034         * frv-opc.c: Regenerated.
1035         * ip2k-asm.c: Regenerated.
1036         * ip2k-desc.c: Regenerated.
1037         * ip2k-desc.h: Regenerated.
1038         * ip2k-dis.c: Regenerated.
1039         * ip2k-opc.c: Regenerated.
1040         * ip2k-opc.h: Regenerated.
1041         * iq2000-desc.c: Regenerated.
1042         * iq2000-dis.c: Regenerated.
1043         * iq2000-opc.c: Regenerated.
1044         * m32r-asm.c: Regenerated.
1045         * m32r-desc.c: Regenerated.
1046         * m32r-desc.h: Regenerated.
1047         * m32r-dis.c: Regenerated.
1048         * m32r-opc.c: Regenerated.
1049         * m32r-opc.h: Regenerated.
1050         * m32r-opinst.c: Regenerated.
1051         * openrisc-desc.c: Regenerated.
1052         * openrisc-desc.h: Regenerated.
1053         * openrisc-dis.c: Regenerated.
1054         * openrisc-opc.c: Regenerated.
1055         * openrisc-opc.h: Regenerated.
1056         * xstormy16-desc.c: Regenerated.
1057         * xstormy16-desc.h: Regenerated.
1058         * xstormy16-dis.c: Regenerated.
1059         * xstormy16-opc.c: Regenerated.
1060         * xstormy16-opc.h: Regenerated.
1061
1062 2005-02-14  H.J. Lu  <hongjiu.lu@intel.com>
1063
1064         * dis-buf.c (perror_memory): Use sprintf_vma to print out
1065         address.
1066
1067 2005-02-11  Nick Clifton  <nickc@redhat.com>
1068
1069         * iq2000-asm.c: Regenerate.
1070
1071         * frv-dis.c: Regenerate.
1072
1073 2005-02-07  Jim Blandy  <jimb@redhat.com>
1074
1075         * Makefile.am (CGEN): Load guile.scm before calling the main
1076         application script.
1077         * Makefile.in: Regenerated.
1078         * cgen.sh: Be prepared for the 'cgen' argument to contain spaces.
1079         Simply pass the cgen-opc.scm path to ${cgen} as its first
1080         argument; ${cgen} itself now contains the '-s', or whatever is
1081         appropriate for the Scheme being used.
1082
1083 2005-01-31  Andrew Cagney  <cagney@gnu.org>
1084
1085         * configure: Regenerate to track ../gettext.m4.
1086
1087 2005-01-31  Jan Beulich  <jbeulich@novell.com>
1088
1089         * ia64-gen.c (NELEMS): Define.
1090         (shrink): Generate alias with missing second predicate register when
1091         opcode has two outputs and these are both predicates.
1092         * ia64-opc-i.c (FULL17): Define.
1093         (ia64_opcodes_i): Add mov-to-pr alias without second input. Use FULL17
1094         here to generate output template.
1095         (TBITCM, TNATCM): Undefine after use.
1096         * ia64-opc-m.c (ia64_opcodes_i): Add alloc alias without ar.pfs as
1097         first input. Add ld16 aliases without ar.csd as second output. Add
1098         st16 aliases without ar.csd as second input. Add cmpxchg aliases
1099         without ar.ccv as third input. Add cmp8xchg16 aliases without ar.csd/
1100         ar.ccv as third/fourth inputs. Consolidate through...
1101         (CMPXCHG_acq, CMPXCHG_rel, CMPXCHG_1, CMPXCHG_2, CMPXCHG_4, CMPXCHG_8,
1102         CMPXCHGn, CMP8XCHG16, CMPXCHG_ALL): Define.
1103         * ia64-asmtab.c: Regenerate.
1104
1105 2005-01-27  Andrew Cagney  <cagney@gnu.org>
1106
1107         * configure: Regenerate to track ../gettext.m4 change.
1108
1109 2005-01-25  Alexandre Oliva  <aoliva@redhat.com>
1110
1111         2004-11-10  Alexandre Oliva  <aoliva@redhat.com>
1112         * frv-asm.c: Rebuilt.
1113         * frv-desc.c: Rebuilt.
1114         * frv-desc.h: Rebuilt.
1115         * frv-dis.c: Rebuilt.
1116         * frv-ibld.c: Rebuilt.
1117         * frv-opc.c: Rebuilt.
1118         * frv-opc.h: Rebuilt.
1119
1120 2005-01-24  Andrew Cagney  <cagney@gnu.org>
1121
1122         * configure: Regenerate, ../gettext.m4 was updated.
1123
1124 2005-01-21  Fred Fish  <fnf@specifixinc.com>
1125
1126         * mips-opc.c:  Change INSN_ALIAS to INSN2_ALIAS.
1127         Change INSN_WRITE_MDMX_ACC to INSN2_WRITE_MDMX_ACC.
1128         Change INSN_READ_MDMX_ACC to INSN2_READ_MDMX_ACC.
1129         * mips-dis.c: Ditto.
1130
1131 2005-01-20  Alan Modra  <amodra@bigpond.net.au>
1132
1133         * ppc-opc.c (powerpc_opcodes): Add optional 'l' arg to tlbiel.
1134
1135 2005-01-19  Fred Fish  <fnf@specifixinc.com>
1136
1137         * mips-dis.c (no_aliases): New disassembly option flag.
1138         (set_default_mips_dis_options): Init no_aliases to zero.
1139         (parse_mips_dis_option): Handle no-aliases option.
1140         (print_insn_mips): Ignore table entries that are aliases
1141         if no_aliases is set.
1142         (print_insn_mips16): Ditto.
1143         * mips-opc.c (mips_builtin_opcodes): Add initializer column for
1144         new pinfo2 member and add INSN_ALIAS initializers as needed.  Also
1145         move WR_MACC and RD_MACC initializers from pinfo to pinfo2.
1146         * mips16-opc.c (mips16_opcodes): Ditto.
1147
1148 2005-01-17  Andrew Stubbs  <andrew.stubbs@st.com>
1149
1150         * sh-opc.h (arch_sh2a_or_sh3e,arch_sh2a_or_sh4): Correct definition.
1151         (inheritance diagram): Add missing edge.
1152         (arch_sh1_up): Rename arch_sh_up to match external name to make life
1153         easier for the testsuite.
1154         (arch_sh4_nofp_up): Likewise, rename arch_sh4_nofpu_up.
1155         (arch_sh4a_nofp_up): Likewise, rename arch_sh4a_nofpu_up.
1156         (arch_sh2a_nofpu_or_sh4_nommu_nofpu_up): Add missing
1157         arch_sh2a_or_sh4_up child.
1158         (sh_table): Do renaming as above.
1159         Correct comment for ldc.l for gas testsuite to read.
1160         Remove rogue mul.l from sh1 (duplicate of the one for sh2).
1161         Correct comments for movy.w and movy.l for gas testsuite to read.
1162         Correct comments for fmov.d and fmov.s for gas testsuite to read.
1163
1164 2005-01-12  H.J. Lu  <hongjiu.lu@intel.com>
1165
1166         * i386-dis.c (OP_E): Don't ignore scale in SIB for 64 bit mode.
1167
1168 2005-01-12  H.J. Lu  <hongjiu.lu@intel.com>
1169
1170         * i386-dis.c (OP_E): Ignore scale when index == 0x4 in SIB.
1171
1172 2005-01-10  Andreas Schwab  <schwab@suse.de>
1173
1174         * disassemble.c (disassemble_init_for_target) <case
1175         bfd_arch_ia64>: Set skip_zeroes to 16.
1176         <case bfd_arch_tic4x>: Set skip_zeroes to 32.
1177
1178 2004-12-23  Tomer Levi  <Tomer.Levi@nsc.com>
1179
1180         * crx-opc.c: Mark 'bcop' instruction as RELAXABLE.
1181
1182 2004-12-14  Svein E. Seldal  <Svein.Seldal@solidas.com>
1183
1184         * avr-dis.c: Prettyprint. Added printing of symbol names in all
1185         memory references. Convert avr_operand() to C90 formatting.
1186
1187 2004-12-05  Tomer Levi  <Tomer.Levi@nsc.com>
1188
1189         * crx-dis.c (print_arg): Use 'info->print_address_func' for address printing.
1190
1191 2004-11-29  Tomer Levi  <Tomer.Levi@nsc.com>
1192
1193         * crx-opc.c (crx_optab): Mark all rbase_disps* operands as signed.
1194         (no_op_insn): Initialize array with instructions that have no
1195         operands.
1196         * crx-dis.c (make_instruction): Get rid of COP_BRANCH_INS operand swapping.
1197
1198 2004-11-29  Richard Earnshaw  <rearnsha@arm.com>
1199
1200         * arm-dis.c: Correct top-level comment.
1201
1202 2004-11-27  Richard Earnshaw  <rearnsha@arm.com>
1203
1204         * arm-opc.h (arm_opcode, thumb_opcode): Add extra field for the
1205         architecuture defining the insn.
1206         (arm_opcodes, thumb_opcodes): Delete.  Move to ...
1207         * arm-dis.c (arm_opcodes, thumb_opcodes): Here.  Add architecutre
1208         field.
1209         Also include opcode/arm.h.
1210         * Makefile.am (arm-dis.lo): Update dependency list.
1211         * Makefile.in: Regenerate.
1212
1213 2004-11-22  Ravi Ramaseshan  <ravi.ramaseshan@codito.com>
1214
1215         * opcode/arc-opc.c (insert_base): Modify ls_operand[LS_OFFSET] to
1216         reflect the change to the short immediate syntax.
1217
1218 2004-11-19  Alan Modra  <amodra@bigpond.net.au>
1219
1220         * or32-opc.c (debug): Warning fix.
1221         * po/POTFILES.in: Regenerate.
1222
1223         * maxq-dis.c: Formatting.
1224         (print_insn): Warning fix.
1225
1226 2004-11-17  Daniel Jacobowitz  <dan@codesourcery.com>
1227
1228         * arm-dis.c (WORD_ADDRESS): Define.
1229         (print_insn): Use it.  Correct big-endian end-of-section handling.
1230
1231 2004-11-08  Inderpreet Singh   <inderpreetb@nioda.hcltech.com>
1232             Vineet Sharma      <vineets@noida.hcltech.com>
1233
1234         * maxq-dis.c: New file.
1235         * disassemble.c (ARCH_maxq): Define.
1236         (disassembler): Add 'print_insn_maxq_little' for handling maxq
1237         instructions..
1238         * configure.in: Add case for bfd_maxq_arch.
1239         * configure: Regenerate.
1240         * Makefile.am: Add support for maxq-dis.c
1241         * Makefile.in: Regenerate.
1242         * aclocal.m4: Regenerate.
1243
1244 2004-11-05  Tomer Levi  <Tomer.Levi@nsc.com>
1245
1246         * crx-opc.c (crx_optab): Rename 'arg_icr' to 'arg_idxr' for Index register
1247         mode.
1248         * crx-dis.c: Likewise.
1249
1250 2004-11-04  Hans-Peter Nilsson  <hp@axis.com>
1251
1252         Generally, handle CRISv32.
1253         * cris-dis.c (TRACE_CASE): Define as (disdata->trace_case).
1254         (struct cris_disasm_data): New type.
1255         (format_reg, format_hex, cris_constraint, print_flags)
1256         (get_opcode_entry): Add struct cris_disasm_data * parameter.  All
1257         callers changed.
1258         (format_sup_reg, print_insn_crisv32_with_register_prefix)
1259         (print_insn_crisv32_without_register_prefix)
1260         (print_insn_crisv10_v32_with_register_prefix)
1261         (print_insn_crisv10_v32_without_register_prefix)
1262         (cris_parse_disassembler_options): New functions.
1263         (bytes_to_skip, cris_spec_reg): Add enum cris_disass_family
1264         parameter.  All callers changed.
1265         (get_opcode_entry): Call malloc, not xmalloc.  Return NULL on
1266         failure.
1267         (cris_constraint) <case 'Y', 'U'>: New cases.
1268         (bytes_to_skip): Handle 'Y' and 'N' as 's'.  Skip size is 4 bytes
1269         for constraint 'n'.
1270         (print_with_operands) <case 'Y'>: New case.
1271         (print_with_operands) <case 'T', 'A', '[', ']', 'd', 'n', 'u'>
1272         <case 'N', 'Y', 'Q'>: New cases.
1273         (print_insn_cris_generic): Emit "bcc ." for zero and CRISv32.
1274         (print_insn_cris_with_register_prefix)
1275         (print_insn_cris_without_register_prefix): Call
1276         cris_parse_disassembler_options.
1277         * cris-opc.c (cris_spec_regs): Mention that this table isn't used
1278         for CRISv32 and the size of immediate operands.  New v32-only
1279         entries for bz, pid, srs, wz, exs, eda, dz, ebp, erp, nrp, ccs and
1280         spc.  Add v32-only 4-byte entries for p2, p3, p5 and p6.  Change
1281         ccr, ibr, irp to be v0..v10.  Change bar, dccr to be v8..v10.
1282         Change brp to be v3..v10.
1283         (cris_support_regs): New vector.
1284         (cris_opcodes): Update head comment.  New format characters '[',
1285         ']', space, 'A', 'd', 'N', 'n', 'Q', 'T', 'u', 'U', 'Y'.
1286         Add new opcodes for v32 and adjust existing opcodes to accommodate
1287         differences to earlier variants.
1288         (cris_cond15s): New vector.
1289
1290 2004-11-04 Jan Beulich <jbeulich@novell.com>
1291
1292         * i386-dis.c (Eq, Edqw, indirEp, Gdq, I1): Define.
1293         (indirEb): Remove.
1294         (Mp): Use f_mode rather than none at all.
1295         (t_mode, dq_mode, dqw_mode, f_mode, const_1_mode): Define. t_mode
1296         replaces what previously was x_mode; x_mode now means 128-bit SSE
1297         operands.
1298         (dis386): Make far jumps and calls have an 'l' prefix only in AT&T
1299         mode. movmskpX's, pextrw's, and pmovmskb's first operands are Gdq.
1300         pinsrw's second operand is Edqw.
1301         (grps): 1-bit shifts' and rotates' second operands are I1. cmpxchg8b's
1302         operand is Eq. movntq's and movntdq's first operands are EM. s[gi]dt,
1303         fldenv, frstor, fsave, fstenv all should also have suffixes in Intel
1304         mode when an operand size override is present or always suffixing.
1305         More instructions will need to be added to this group.
1306         (putop): Handle new macro chars 'C' (short/long suffix selector),
1307         'I' (Intel mode override for following macro char), and 'J' (for
1308         adding the 'l' prefix to far branches in AT&T mode). When an
1309         alternative was specified in the template, honor macro character when
1310         specified for Intel mode.
1311         (OP_E): Handle new *_mode values. Correct pointer specifications for
1312         memory operands. Consolidate output of index register.
1313         (OP_G): Handle new *_mode values.
1314         (OP_I): Handle const_1_mode.
1315         (OP_ESreg, OP_DSreg): Generate pointer specifications. Indicate
1316         respective opcode prefix bits have been consumed.
1317         (OP_EM, OP_EX): Provide some default handling for generating pointer
1318         specifications.
1319
1320 2004-10-28  Tomer Levi  <Tomer.Levi@nsc.com>
1321
1322         * crx-opc.c (REV_COP_INST): New macro, reverse operand order of
1323         COP_INST macro.
1324
1325 2004-10-27  Tomer Levi  <Tomer.Levi@nsc.com>
1326
1327         * crx-dis.c (enum REG_ARG_TYPE): New, replacing COP_ARG_TYPE.
1328         (getregliststring): Support HI/LO and user registers.
1329         * crx-opc.c (crx_instruction): Update data structure according to the
1330         rearrangement done in CRX opcode header file.
1331         (crx_regtab):  Likewise.
1332         (crx_optab):  Likewise.
1333         (crx_instruction): Reorder load/stor instructions, remove unsupported
1334         formats.
1335         support new Co-Processor instruction 'cpi'.
1336
1337 2004-10-27  Nick Clifton  <nickc@redhat.com>
1338
1339         * opcodes/iq2000-asm.c: Regenerate.
1340         * opcodes/iq2000-desc.c: Regenerate.
1341         * opcodes/iq2000-desc.h: Regenerate.
1342         * opcodes/iq2000-dis.c: Regenerate.
1343         * opcodes/iq2000-ibld.c: Regenerate.
1344         * opcodes/iq2000-opc.c: Regenerate.
1345         * opcodes/iq2000-opc.h: Regenerate.
1346
1347 2004-10-21  Tomer Levi  <Tomer.Levi@nsc.com>
1348
1349         * crx-opc.c (crx_instruction): Replace i3, i4, i5 with us3,
1350         us4, us5 (respectively).
1351         Remove unsupported 'popa' instruction.
1352         Reverse operands order in store co-processor instructions.
1353
1354 2004-10-15  Alan Modra  <amodra@bigpond.net.au>
1355
1356         * Makefile.am: Run "make dep-am"
1357         * Makefile.in: Regenerate.
1358
1359 2004-10-12  Bob Wilson  <bob.wilson@acm.org>
1360
1361         * xtensa-dis.c: Use ISO C90 formatting.
1362
1363 2004-10-09  Alan Modra  <amodra@bigpond.net.au>
1364
1365         * ppc-opc.c: Revert 2004-09-09 change.
1366
1367 2004-10-07  Bob Wilson  <bob.wilson@acm.org>
1368
1369         * xtensa-dis.c (state_names): Delete.
1370         (fetch_data): Use xtensa_isa_maxlength.
1371         (print_xtensa_operand): Replace operand parameter with opcode/operand
1372         pair.  Remove print_sr_name parameter.  Use new xtensa-isa.h functions.
1373         (print_insn_xtensa): Use new xtensa-isa.h functions.  Handle multislot
1374         instruction bundles.  Use xmalloc instead of malloc.
1375
1376 2004-10-07  David Gibson  <david@gibson.dropbear.id.au>
1377
1378         * ppc-opc.c: Replace literal "0"s with NULLs in pointer
1379         initializers.
1380
1381 2004-10-07  Tomer Levi  <Tomer.Levi@nsc.com>
1382
1383         * crx-opc.c (crx_instruction): Support Co-processor insns.
1384         * crx-dis.c (COP_ARG_TYPE): New enum for CO-Processor arguments.
1385         (getregliststring): Change function to use the above enum.
1386         (print_arg): Handle CO-Processor insns.
1387         (crx_cinvs): Add 'b' option to invalidate the branch-target
1388         cache.
1389
1390 2004-10-06  Aldy Hernandez  <aldyh@redhat.com>
1391
1392         * ppc-opc.c (powerpc_opcodes): Add efscfd, efdabs, efdnabs,
1393         efdneg, efdadd, efdsub, efdmul, efddiv, efdcmpgt, efdcmplt,
1394         efdcmpeq, efdtstgt, efdtstlt, efdtsteq, efdcfsi, efdcfsid,
1395         efdcfui, efdcfuid, efdcfsf, efdcfuf, efdctsi, efdctsidz, efdctsiz,
1396         efdctui, efdctuidz, efdctuiz, efdctsf, efdctuf, efdctuf, efdcfs.
1397
1398 2004-10-01  Bill Farmer  <Bill@the-farmers.freeserve.co.uk>
1399
1400         * pdp11-dis.c (print_insn_pdp11): Subtract the SOB's displacement
1401         rather than add it.
1402
1403 2004-09-30  Paul Brook  <paul@codesourcery.com>
1404
1405         * arm-dis.c (print_insn_arm): Handle 'e' for SMI instruction.
1406         * arm-opc.h: Document %e.  Add ARMv6ZK instructions.
1407
1408 2004-09-17  H.J. Lu  <hongjiu.lu@intel.com>
1409
1410         * Makefile.am (AUTOMAKE_OPTIONS): Require 1.9.
1411         (CONFIG_STATUS_DEPENDENCIES): New.
1412         (Makefile): Removed.
1413         (config.status): Likewise.
1414         * Makefile.in: Regenerated.
1415
1416 2004-09-17  Alan Modra  <amodra@bigpond.net.au>
1417
1418         * Makefile.am: Run "make dep-am".
1419         * Makefile.in: Regenerate.
1420         * aclocal.m4: Regenerate.
1421         * configure: Regenerate.
1422         * po/POTFILES.in: Regenerate.
1423         * po/opcodes.pot: Regenerate.
1424
1425 2004-09-11  Andreas Schwab  <schwab@suse.de>
1426
1427         * configure: Rebuild.
1428
1429 2004-09-09  Segher Boessenkool  <segher@kernel.crashing.org>
1430
1431         * ppc-opc.c (L): Make this field not optional.
1432
1433 2004-09-03  Tomer Levi  <Tomer.Levi@nsc.com>
1434
1435         * opc-crx.c: Rename 'popma' to 'popa', remove 'pushma'.
1436         Fix parameter to 'm[t|f]csr' insns.
1437
1438 2004-08-30  Nathanael Nerode  <neroden@gcc.gnu.org>
1439
1440         * configure.in: Autoupdate to autoconf 2.59.
1441         * aclocal.m4: Rebuild with aclocal 1.4p6.
1442         * configure: Rebuild with autoconf 2.59.
1443         * Makefile.in: Rebuild with automake 1.4p6 (picking up
1444         bfd changes for autoconf 2.59 on the way).
1445         * config.in: Rebuild with autoheader 2.59.
1446
1447 2004-08-27  Richard Sandiford  <rsandifo@redhat.com>
1448
1449         * frv-desc.[ch], frv-opc.[ch]: Regenerated.
1450
1451 2004-07-30  Michal Ludvig  <mludvig@suse.cz>
1452
1453         * i386-dis.c (GRPPADLCK): Renamed to GRPPADLCK1
1454         (GRPPADLCK2): New define.
1455         (twobyte_has_modrm): True for 0xA6.
1456         (grps): GRPPADLCK2 for opcode 0xA6.
1457
1458 2004-07-29  Alexandre Oliva  <aoliva@redhat.com>
1459
1460         Introduce SH2a support.
1461         * sh-opc.h (arch_sh2a_base): Renumber.
1462         (arch_sh2a_nofpu_base): Remove.
1463         (arch_sh_base_mask): Adjust.
1464         (arch_opann_mask): New.
1465         (arch_sh2a, arch_sh2a_nofpu): Adjust.
1466         (arch_sh2a_up, arch_sh2a_nofpu_up): Likewise.
1467         (sh_table): Adjust whitespace.
1468         2004-02-24  Corinna Vinschen  <vinschen@redhat.com>
1469         * sh-opc.h (arch_sh2a_nofpu_up): New.  Use instead of arch_sh2a_up in
1470         instruction list throughout.
1471         (arch_sh2a_up): Redefine to include fpu instruction set.  Use instead
1472         of arch_sh2a in instruction list throughout.
1473         (arch_sh2e_up): Accomodate above changes.
1474         (arch_sh2_up): Ditto.
1475         2004-02-20  Corinna Vinschen  <vinschen@redhat.com>
1476         * sh-opc.h: Add arch_sh2a_nofpu to arch_sh2_up.
1477         2004-02-18  Corinna Vinschen  <vinschen@redhat.com>
1478         * sh-dis.c (print_insn_sh): Add bfd_mach_sh2a_nofpu handling.
1479         * sh-opc.h (arch_sh2a_nofpu): New.
1480         (arch_sh2a_up): New, defines sh2a and sh2a_nofpu.
1481         (sh_table): Change all arch_sh2a to arch_sh2a_up unless FPU
1482         instruction.
1483         2004-01-20  DJ Delorie  <dj@redhat.com>
1484         * sh-dis.c (print_insn_sh): SH2A does not have 'X' fp regs.
1485         2003-12-29  DJ Delorie  <dj@redhat.com>
1486         * sh-opc.c (sh_nibble_type, sh_arg_type, arch_2a, arch_2e_up,
1487         sh_opcode_info, sh_table): Add sh2a support.
1488         (arch_op32): New, to tag 32-bit opcodes.
1489         * sh-dis.c (print_insn_sh): Support sh2a opcodes.
1490         2003-12-02  Michael Snyder  <msnyder@redhat.com>
1491         * sh-opc.h (arch_sh2a): Add.
1492         * sh-dis.c (arch_sh2a): Handle.
1493         * sh-opc.h (arch_sh2_up): Fix up to include arch_sh2a.
1494
1495 2004-07-27  Tomer Levi  <Tomer.Levi@nsc.com>
1496
1497         * crx-opc.c: Add popx,pushx insns. Indent code, fix comments.
1498
1499 2004-07-22  Nick Clifton  <nickc@redhat.com>
1500
1501         PR/280
1502         * h8300-dis.c (bfd_h8_disassemble): Do not dump raw bytes for the
1503         insns - this is done by objdump itself.
1504         * h8500-dis.c (print_insn_h8500): Likewise.
1505
1506 2004-07-21  Jan Beulich <jbeulich@novell.com>
1507
1508         * i386-dis.c (OP_E): Show rip-relative addressing in 64-bit mode
1509         regardless of address size prefix in effect.
1510         (ptr_reg): Size or address registers does not depend on rex64, but
1511         on the presence of an address size override.
1512         (OP_MMX): Use rex.x only for xmm registers.
1513         (OP_EM): Use rex.z only for xmm registers.
1514
1515 2004-07-20  Maciej W. Rozycki  <macro@linux-mips.org>
1516
1517         * mips-opc.c (mips_builtin_opcodes): Move coprocessor 2
1518         move/branch operations to the bottom so that VR5400 multimedia
1519         instructions take precedence in disassembly.
1520
1521 2004-07-20  Maciej W. Rozycki  <macro@linux-mips.org>
1522
1523         * mips-opc.c (mips_builtin_opcodes): Remove the MIPS32
1524         ISA-specific "break" encoding.
1525
1526 2004-07-13  Elvis Chiang  <elvisfb@gmail.com>
1527
1528         * arm-opc.h: Fix typo in comment.
1529
1530 2004-07-11  Andreas Schwab  <schwab@suse.de>
1531
1532         * m68k-dis.c (m68k_valid_ea): Fix typos in last change.
1533
1534 2004-07-09  Andreas Schwab  <schwab@suse.de>
1535
1536         * m68k-dis.c (m68k_valid_ea): Check validity of all codes.
1537
1538 2004-07-07  Tomer Levi  <Tomer.Levi@nsc.com>
1539
1540         * Makefile.am (CFILES): Add crx-dis.c, crx-opc.c.
1541         (ALL_MACHINES): Add crx-dis.lo, crx-opc.lo.
1542         (crx-dis.lo): New target.
1543         (crx-opc.lo): Likewise.
1544         * Makefile.in: Regenerate.
1545         * configure.in: Handle bfd_crx_arch.
1546         * configure: Regenerate.
1547         * crx-dis.c: New file.
1548         * crx-opc.c: New file.
1549         * disassemble.c (ARCH_crx): Define.
1550         (disassembler): Handle ARCH_crx.
1551
1552 2004-06-29  James E Wilson  <wilson@specifixinc.com>
1553
1554         * ia64-opc-a.c (ia64_opcodes_a): Delete mov immediate pseudo for adds.
1555         * ia64-asmtab.c: Regnerate.
1556
1557 2004-06-28  Alan Modra  <amodra@bigpond.net.au>
1558
1559         * ppc-opc.c (insert_fxm): Handle mfocrf and mtocrf.
1560         (extract_fxm): Don't test dialect.
1561         (XFXFXM_MASK): Include the power4 bit.
1562         (XFXM): Add p4 param.
1563         (powerpc_opcodes): Add mfocrf and mtocrf.  Adjust mtcr.
1564
1565 2004-06-27  Alexandre Oliva  <aoliva@redhat.com>
1566
1567         2003-07-21  Richard Sandiford  <rsandifo@redhat.com>
1568         * disassemble.c (disassembler): Handle bfd_mach_h8300sxn.
1569
1570 2004-06-26  Alan Modra  <amodra@bigpond.net.au>
1571
1572         * ppc-opc.c (BH, XLBH_MASK): Define.
1573         (powerpc_opcodes): Allow BH field on bclr, bclrl, bcctr, bcctrl.
1574
1575 2004-06-24  Alan Modra  <amodra@bigpond.net.au>
1576
1577         * i386-dis.c (x_mode): Comment.
1578         (two_source_ops): File scope.
1579         (float_mem): Correct fisttpll and fistpll.
1580         (float_mem_mode): New table.
1581         (dofloat): Use it.
1582         (OP_E): Correct intel mode PTR output.
1583         (ptr_reg): Use open_char and close_char.
1584         (PNI_Fixup): Handle possible suffix on sidt.  Use op1out etc. for
1585         operands.  Set two_source_ops.
1586
1587 2004-06-15  Alan Modra  <amodra@bigpond.net.au>
1588
1589         * arc-ext.c (build_ARC_extmap): Use bfd_get_section_size
1590         instead of _raw_size.
1591
1592 2004-06-08  Jakub Jelinek  <jakub@redhat.com>
1593
1594         * ia64-gen.c (in_iclass): Handle more postinc st
1595         and ld variants.
1596         * ia64-asmtab.c: Rebuilt.
1597
1598 2004-06-01  Martin Schwidefsky  <schwidefsky@de.ibm.com>
1599
1600         * s390-opc.txt: Correct architecture mask for some opcodes.
1601         lrv, lrvh, strv, ml, dl, alc, slb rll and mvclu are available
1602         in the esa mode as well.
1603
1604 2004-05-28  Andrew Stubbs <andrew.stubbs@superh.com>
1605
1606         * sh-dis.c (target_arch): Make unsigned.
1607         (print_insn_sh): Replace (most of) switch with a call to
1608         sh_get_arch_from_bfd_mach(). Also use new architecture flags system.
1609         * sh-opc.h: Redefine architecture flags values.
1610         Add sh3-nommu architecture.
1611         Reorganise <arch>_up macros so they make more visual sense.
1612         (SH_MERGE_ARCH_SET): Define new macro.
1613         (SH_VALID_BASE_ARCH_SET): Likewise.
1614         (SH_VALID_MMU_ARCH_SET): Likewise.
1615         (SH_VALID_CO_ARCH_SET): Likewise.
1616         (SH_VALID_ARCH_SET): Likewise.
1617         (SH_MERGE_ARCH_SET_VALID): Likewise.
1618         (SH_ARCH_SET_HAS_FPU): Likewise.
1619         (SH_ARCH_SET_HAS_DSP): Likewise.
1620         (SH_ARCH_UNKNOWN_ARCH): Likewise.
1621         (sh_get_arch_from_bfd_mach): Add prototype.
1622         (sh_get_arch_up_from_bfd_mach): Likewise.
1623         (sh_get_bfd_mach_from_arch_set): Likewise.
1624         (sh_merge_bfd_arc): Likewise.
1625
1626 2004-05-24  Peter Barada  <peter@the-baradas.com>
1627
1628         * m68k-dis.c(print_insn_m68k): Strip body of diassembly out
1629         into new match_insn_m68k function.  Loop over canidate
1630         matches and select first that completely matches.
1631         * m68k-dis.c(print_insn_arg): Fix 'g' case to only extract 1 bit.
1632         * m68k-dis.c(print_insn_arg): Call new function m68k_valid_ea
1633         to verify addressing for MAC/EMAC.
1634         * m68k-dis.c(print_insn_arg): Use reg_half_names for MAC/EMAC
1635         reigster halves since 'fpu' and 'spl' look misleading.
1636         * m68k-dis.c(fetch_arg): Fix 'G', 'H', 'I', 'f', 'M', 'N' cases.
1637         * m68k-opc.c: Rearragne mac/emac cases to use longest for
1638         first, tighten up match masks.
1639         * m68k-opc.c: Add 'size' field to struct m68k_opcode.  Produce
1640         'size' from special case code in print_insn_m68k to
1641         determine decode size of insns.
1642
1643 2004-05-19  Alan Modra  <amodra@bigpond.net.au>
1644
1645         * ppc-opc.c (insert_fxm): Enable two operand mfcr when -many as
1646         well as when -mpower4.
1647
1648 2004-05-13  Nick Clifton  <nickc@redhat.com>
1649
1650         * po/fr.po: Updated French translation.
1651
1652 2004-05-05  Peter Barada  <peter@the-baradas.com>
1653
1654         * m68k-dis.c(print_insn_m68k): Add new chips, use core
1655         variants in arch_mask.  Only set m68881/68851 for 68k chips.
1656         * m68k-op.c: Switch from ColdFire chips to core variants.
1657
1658 2004-05-05  Alan Modra  <amodra@bigpond.net.au>
1659
1660         PR 147.
1661         * ppc-opc.c (PPCVEC): Remove PPC_OPCODE_PPC.
1662
1663 2004-04-29  Ben Elliston  <bje@au.ibm.com>
1664
1665         * ppc-opc.c (XCMPL): Renmame to XOPL. Update users.
1666         (powerpc_opcodes): Add "dbczl" instruction for PPC970.
1667
1668 2004-04-22  Kaz Kojima  <kkojima@rr.iij4u.or.jp>
1669
1670         * sh-dis.c (print_insn_sh): Print the value in constant pool
1671         as a symbol if it looks like a symbol.
1672
1673 2004-04-22  Peter Barada <peter@the-baradas.com>
1674
1675         * m68k-dis.c(print_insn_m68k): Set mfcmac/mcfemac on
1676         appropriate ColdFire architectures.
1677         (print_insn_m68k): Handle EMAC, MAC/EMAC scalefactor, and MAC/EMAC
1678         mask addressing.
1679         Add EMAC instructions, fix MAC instructions. Remove
1680         macmw/macml/msacmw/msacml instructions since mask addressing now
1681         supported.
1682
1683 2004-04-20  Jakub Jelinek  <jakub@redhat.com>
1684
1685         * sparc-opc.c (fmoviccx, fmovfccx, fmovccx): Define.
1686         (fmovicc, fmovfcc, fmovcc): Remove fpsize argument, change opcode to
1687         suffix.  Use fmov*x macros, create all 3 fpsize variants in one
1688         macro.  Adjust all users.
1689
1690 2004-04-15  Anil Paranjpe  <anilp1@kpitcummins.com>
1691
1692         * h8300-dis.c (bfd_h8_disassemble) : Treat "adds" & "subs"
1693         separately.
1694
1695 2004-03-30  Kazuhiro Inaoka  <inaoka.kazuhiro@renesas.com>
1696
1697         * m32r-asm.c: Regenerate.
1698
1699 2004-03-29  Stan Shebs  <shebs@apple.com>
1700
1701         * mpw-config.in, mpw-make.sed: Remove MPW support files, no longer
1702         used.
1703
1704 2004-03-19  Alan Modra  <amodra@bigpond.net.au>
1705
1706         * aclocal.m4: Regenerate.
1707         * config.in: Regenerate.
1708         * configure: Regenerate.
1709         * po/POTFILES.in: Regenerate.
1710         * po/opcodes.pot: Regenerate.
1711
1712 2004-03-16  Alan Modra  <amodra@bigpond.net.au>
1713
1714         * ppc-dis.c (print_insn_powerpc): Don't print tabs.  Handle
1715         PPC_OPERANDS_GPR_0.
1716         * ppc-opc.c (RA0): Define.
1717         (RAQ, RAL, RAM, RAS, RSQ, RTQ, RSO): Use PPC_OPERAND_GPR_0.
1718         (RAOPT): Rename from RAO.  Update all uses.
1719         (powerpc_opcodes): Use RA0 as appropriate.
1720
1721 2004-03-15  Aldy Hernandez  <aldyh@redhat.com>
1722
1723         * ppc-opc.c (powerpc_opcodes): Add BOOKE versions of mfsprg.
1724
1725 2004-03-15  Alan Modra  <amodra@bigpond.net.au>
1726
1727         * sparc-dis.c (print_insn_sparc): Update getword prototype.
1728
1729 2004-03-12  Michal Ludvig  <mludvig@suse.cz>
1730
1731         * i386-dis.c (GRPPLOCK): Delete.
1732         (grps): Delete GRPPLOCK entry.
1733
1734 2004-03-12  Alan Modra  <amodra@bigpond.net.au>
1735
1736         * i386-dis.c (OP_M, OP_0f0e, OP_0fae, NOP_Fixup): New functions.
1737         (M, Mp): Use OP_M.
1738         (None, PADLOCK_SPECIAL, PADLOCK_0): Delete.
1739         (GRPPADLCK): Define.
1740         (dis386): Use NOP_Fixup on "nop".
1741         (dis386_twobyte): Use GRPPADLCK on opcode 0xa7.
1742         (twobyte_has_modrm): Set for 0xa7.
1743         (padlock_table): Delete.  Move to..
1744         (grps): ..here, using OP_0f07.  Use OP_Ofae on lfence, mfence
1745         and clflush.
1746         (print_insn): Revert PADLOCK_SPECIAL code.
1747         (OP_E): Delete sfence, lfence, mfence checks.
1748
1749 2004-03-12  Jakub Jelinek  <jakub@redhat.com>
1750
1751         * i386-dis.c (grps): Use INVLPG_Fixup instead of OP_E for invlpg.
1752         (INVLPG_Fixup): New function.
1753         (PNI_Fixup): Remove ATTRIBUTE_UNUSED from sizeflag.
1754
1755 2004-03-12  Michal Ludvig  <mludvig@suse.cz>
1756
1757         * i386-dis.c (PADLOCK_SPECIAL, PADLOCK_0): New defines.
1758         (dis386_twobyte): Opcode 0xa7 is PADLOCK_0.
1759         (padlock_table): New struct with PadLock instructions.
1760         (print_insn): Handle PADLOCK_SPECIAL.
1761
1762 2004-03-12  Alan Modra  <amodra@bigpond.net.au>
1763
1764         * i386-dis.c (grps): Use clflush by default for 0x0fae/7.
1765         (OP_E): Twiddle clflush to sfence here.
1766
1767 2004-03-08  Nick Clifton  <nickc@redhat.com>
1768
1769         * po/de.po: Updated German translation.
1770
1771 2003-03-03  Andrew Stubbs  <andrew.stubbs@superh.com>
1772
1773         * sh-dis.c (print_insn_sh): Don't disassemble fp instructions in
1774         nofpu mode.  Add BFD type bfd_mach_sh4_nommu_nofpu.
1775         * sh-opc.h: Add sh4_nommu_nofpu architecture and adjust instructions
1776         accordingly.
1777
1778 2004-03-01  Richard Sandiford  <rsandifo@redhat.com>
1779
1780         * frv-asm.c: Regenerate.
1781         * frv-desc.c: Regenerate.
1782         * frv-desc.h: Regenerate.
1783         * frv-dis.c: Regenerate.
1784         * frv-ibld.c: Regenerate.
1785         * frv-opc.c: Regenerate.
1786         * frv-opc.h: Regenerate.
1787
1788 2004-03-01  Richard Sandiford  <rsandifo@redhat.com>
1789
1790         * frv-desc.c, frv-opc.c: Regenerate.
1791
1792 2004-03-01  Richard Sandiford  <rsandifo@redhat.com>
1793
1794         * frv-desc.c, frv-opc.c, frv-opc.h: Regenerate.
1795
1796 2004-02-26  Andrew Stubbs  <andrew.stubbs@superh.com>
1797
1798         * sh-opc.h: Move fsca and fsrra instructions from sh4a to sh4.
1799         Also correct mistake in the comment.
1800
1801 2004-02-26  Andrew Stubbs <andrew.stubbs@superh.com>
1802
1803         * sh-dis.c (print_insn_sh): Add REG_N_D nibble type to
1804         ensure that double registers have even numbers.
1805         Add REG_N_B01 for nn01 (binary 01) nibble to ensure
1806         that reserved instruction 0xfffd does not decode the same
1807         as 0xfdfd (ftrv).
1808         * sh-opc.h: Add REG_N_D nibble type and use it whereever
1809         REG_N refers to a double register.
1810         Add REG_N_B01 nibble type and use it instead of REG_NM
1811         in ftrv.
1812         Adjust the bit patterns in a few comments.
1813
1814 2004-02-25  Aldy Hernandez  <aldyh@redhat.com>
1815
1816         * ppc-opc.c (powerpc_opcodes): Change mask for dcbt and dcbtst.
1817
1818 2004-02-20  Aldy Hernandez  <aldyh@redhat.com>
1819
1820         * ppc-opc.c (powerpc_opcodes): Move mfmcsrr0 before mfdc_dat.
1821
1822 2004-02-20  Aldy Hernandez  <aldyh@redhat.com>
1823
1824         * ppc-opc.c (powerpc_opcodes): Add m*ivor35.
1825
1826 2004-02-20  Aldy Hernandez  <aldyh@redhat.com>
1827
1828         * ppc-opc.c (powerpc_opcodes): Add mfivor32, mfivor33, mfivor34,
1829         mtivor32, mtivor33, mtivor34.
1830
1831 2004-02-19  Aldy Hernandez  <aldyh@redhat.com>
1832
1833         * ppc-opc.c (powerpc_opcodes): Add mfmcar.
1834
1835 2004-02-10  Petko Manolov  <petkan@nucleusys.com>
1836
1837         * arm-opc.h Maverick accumulator register opcode fixes.
1838
1839 2004-02-13  Ben Elliston  <bje@wasabisystems.com>
1840
1841         * m32r-dis.c: Regenerate.
1842
1843 2004-01-27  Michael Snyder  <msnyder@redhat.com>
1844
1845         * sh-opc.h (sh_table): "fsrra", not "fssra".
1846
1847 2004-01-23  Andrew Over <andrew.over@cs.anu.edu.au>
1848
1849         * sparc-opc.c (fdtox, fstox, fqtox, fxtod, fxtos, fxtoq): Tighten
1850         contraints.
1851
1852 2004-01-19  Andrew Over  <andrew.over@cs.anu.edu.au>
1853
1854         * sparc-opc.c (sparc_opcodes) <f[dsq]tox, fxto[dsq]>: Fix args.
1855
1856 2004-01-19  Alan Modra  <amodra@bigpond.net.au>
1857
1858         * i386-dis.c (OP_E): Print scale factor on intel mode sib when not
1859         1.  Don't print scale factor on AT&T mode when index missing.
1860
1861 2004-01-16  Alexandre Oliva  <aoliva@redhat.com>
1862
1863         * m10300-opc.c (mov): 8- and 24-bit immediates are zero-extended
1864         when loaded into XR registers.
1865
1866 2004-01-14  Richard Sandiford  <rsandifo@redhat.com>
1867
1868         * frv-desc.h: Regenerate.
1869         * frv-desc.c: Regenerate.
1870         * frv-opc.c: Regenerate.
1871
1872 2004-01-13  Michael Snyder  <msnyder@redhat.com>
1873
1874         * sh-dis.c (print_insn_sh): Allocate 4 bytes for insn.
1875
1876 2004-01-09  Paul Brook  <paul@codesourcery.com>
1877
1878         * arm-opc.h (arm_opcodes): Move generic mcrr after known
1879         specific opcodes.
1880
1881 2004-01-07  Daniel Jacobowitz  <drow@mvista.com>
1882
1883         * Makefile.am (libopcodes_la_DEPENDENCIES)
1884         (libopcodes_la_LIBADD): Revert 2003-05-17 change.  Add explanatory
1885         comment about the problem.
1886         * Makefile.in: Regenerate.
1887
1888 2004-01-06  Alexandre Oliva  <aoliva@redhat.com>
1889
1890         2003-12-19  Alexandre Oliva  <aoliva@redhat.com>
1891         * frv-asm.c (parse_ulo16, parse_uhi16, parse_d12): Fix some
1892         cut&paste errors in shifting/truncating numerical operands.
1893         2003-08-04  Alexandre Oliva  <aoliva@redhat.com>
1894         * frv-asm.c (parse_ulo16): Parse gotofflo and gotofffuncdesclo.
1895         (parse_uslo16): Likewise.
1896         (parse_uhi16): Parse gotoffhi and gotofffuncdeschi.
1897         (parse_d12): Parse gotoff12 and gotofffuncdesc12.
1898         (parse_s12): Likewise.
1899         2003-08-04  Alexandre Oliva  <aoliva@redhat.com>
1900         * frv-asm.c (parse_ulo16): Parse gotlo and gotfuncdesclo.
1901         (parse_uslo16): Likewise.
1902         (parse_uhi16): Parse gothi and gotfuncdeschi.
1903         (parse_d12): Parse got12 and gotfuncdesc12.
1904         (parse_s12): Likewise.
1905
1906 2004-01-02  Albert Bartoszko  <albar@nt.kegel.com.pl>
1907
1908         * msp430-dis.c (msp430_doubleoperand): Check for an 'add'
1909         instruction which looks similar to an 'rla' instruction.
1910
1911 For older changes see ChangeLog-0203
1912 \f
1913 Local Variables:
1914 mode: change-log
1915 left-margin: 8
1916 fill-column: 74
1917 version-control: never
1918 End: