]> git.ipfire.org Git - thirdparty/binutils-gdb.git/blob - opcodes/ChangeLog
Add SIB.
[thirdparty/binutils-gdb.git] / opcodes / ChangeLog
1 2010-05-26 H.J. Lu <hongjiu.lu@intel.com>
2
3 * i386-dis.c (sib): New.
4 (get_sib): Likewise.
5 (print_insn): Call get_sib.
6 OP_E_memory): Use sib.
7
8 2010-05-26 Catherine Moore <clm@codesoourcery.com>
9
10 * mips-dis.c (mips_arch): Remove INSN_MIPS16.
11 * mips-opc.c (I16): Remove.
12 (mips_builtin_op): Reclassify jalx.
13
14 2010-05-19 Alan Modra <amodra@gmail.com>
15
16 * ppc-opc.c (powerpc_opcodes): Enable divdeu, devweu, divde,
17 divwe, divdeuo, divweuo, divdeo, divweo for A2. Add icswepx.
18
19 2010-05-13 Alan Modra <amodra@gmail.com>
20
21 * ppc-opc.c (powerpc_opcodes): Correct wclr encoding.
22
23 2010-05-11 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
24
25 * arm-dis.c (thumb_opcodes): Update ldmia entry to use new %W
26 format.
27 (print_insn_thumb16): Add support for new %W format.
28
29 2010-05-07 Tristan Gingold <gingold@adacore.com>
30
31 * Makefile.in: Regenerate with automake 1.11.1.
32 * aclocal.m4: Ditto.
33
34 2010-05-05 Nick Clifton <nickc@redhat.com>
35
36 * po/es.po: Updated Spanish translation.
37
38 2010-04-22 Nick Clifton <nickc@redhat.com>
39
40 * po/opcodes.pot: Updated by the Translation project.
41 * po/vi.po: Updated Vietnamese translation.
42
43 2010-04-16 H.J. Lu <hongjiu.lu@intel.com>
44
45 * i386-dis.c (get_valid_dis386): Return bad_opcode on unknown
46 bits in opcode.
47
48 2010-04-09 Nick Clifton <nickc@redhat.com>
49
50 * i386-dis.c (print_insn): Remove unused variable op.
51 (OP_sI): Remove unused variable mask.
52
53 2010-04-07 Alan Modra <amodra@gmail.com>
54
55 * configure: Regenerate.
56
57 2010-04-06 Peter Bergner <bergner@vnet.ibm.com>
58
59 * ppc-opc.c (RBOPT): New define.
60 ("dccci"): Enable for PPCA2. Make operands optional.
61 ("iccci"): Likewise. Do not deprecate for PPC476.
62
63 2010-04-02 Masaki Muranaka <monaka@monami-software.com>
64
65 * cr16-opc.c (cr16_instruction): Fix typo in comment.
66
67 2010-03-25 Joseph Myers <joseph@codesourcery.com>
68
69 * Makefile.am (TARGET_LIBOPCODES_CFILES): Add tic6x-dis.c.
70 * Makefile.in: Regenerate.
71 * configure.in (bfd_tic6x_arch): New.
72 * configure: Regenerate.
73 * disassemble.c (ARCH_tic6x): Define if ARCH_all.
74 (disassembler): Handle TI C6X.
75 * tic6x-dis.c: New.
76
77 2010-03-24 Mike Frysinger <vapier@gentoo.org>
78
79 * bfin-dis.c (decode_regs_hi): Change REG_LH2 typo to REG_MH2.
80
81 2010-03-23 Joseph Myers <joseph@codesourcery.com>
82
83 * dis-buf.c (buffer_read_memory): Give error for reading just
84 before the start of memory.
85
86 2010-03-22 Sebastian Pop <sebastian.pop@amd.com>
87 Quentin Neill <quentin.neill@amd.com>
88
89 * i386-dis.c (OP_LWP_I): Removed.
90 (reg_table): Do not use OP_LWP_I, use Iq.
91 (OP_LWPCB_E): Remove use of names16.
92 (OP_LWP_E): Same.
93 * i386-opc.tbl: Removed 16bit LWP insns. 32bit LWP insns
94 should not set the Vex.length bit.
95 * i386-tbl.h: Regenerated.
96
97 2010-02-25 Edmar Wienskoski <edmar@freescale.com>
98
99 * ppc-dis.c (ppc_opts): Add PPC_OPCODE_E500MC for "e500mc64".
100
101 2010-02-24 Nick Clifton <nickc@redhat.com>
102
103 PR binutils/6773
104 * arm-dis.c (arm_opcodes): Replace <prefix>addsubx with
105 <prefix>asx. Replace <prefix>subaddx with <prefix>sax.
106 (thumb32_opcodes): Likewise.
107
108 2010-02-15 Nick Clifton <nickc@redhat.com>
109
110 * po/vi.po: Updated Vietnamese translation.
111
112 2010-02-12 Doug Evans <dje@sebabeach.org>
113
114 * lm32-opinst.c: Regenerate.
115
116 2010-02-11 Doug Evans <dje@sebabeach.org>
117
118 * cgen-dis.in (print_normal): Delete CGEN_PRINT_NORMAL.
119 (print_address): Delete CGEN_PRINT_ADDRESS.
120 * fr30-dis.c, * frv-dis.c, * ip2k-dis.c, * iq2000-dis.c,
121 * lm32-dis.c, * m32c-dis.c, * m32r-desc.c, * m32r-desc.h,
122 * m32r-dis.c, * mep-dis.c, * mt-dis.c, * openrisc-dis.c,
123 * xc16x-dis.c, * xstormy16-dis.c: Regenerate.
124
125 * fr30-desc.c, * fr30-desc.h, * fr30-opc.c,
126 * frv-desc.c, * frv-desc.h, * frv-opc.c,
127 * ip2k-desc.c, * ip2k-desc.h, * ip2k-opc.c,
128 * iq2000-desc.c, * iq2000-desc.h, * iq2000-opc.c,
129 * lm32-desc.c, * lm32-desc.h, * lm32-opc.c, * lm32-opinst.c,
130 * m32c-desc.c, * m32c-desc.h, * m32c-opc.c,
131 * m32r-desc.c, * m32r-desc.h, * m32r-opc.c, * m32r-opinst.c,
132 * mep-desc.c, * mep-desc.h, * mep-opc.c,
133 * mt-desc.c, * mt-desc.h, * mt-opc.c,
134 * openrisc-desc.c, * openrisc-desc.h, * openrisc-opc.c,
135 * xc16x-desc.c, * xc16x-desc.h, * xc16x-opc.c,
136 * xstormy16-desc.c, * xstormy16-desc.h, * xstormy16-opc.c: Regenerate.
137
138 2010-02-11 H.J. Lu <hongjiu.lu@intel.com>
139
140 * i386-dis.c: Update copyright.
141 * i386-gen.c: Likewise.
142 * i386-opc.h: Likewise.
143 * i386-opc.tbl: Likewise.
144
145 2010-02-10 Quentin Neill <quentin.neill@amd.com>
146 Sebastian Pop <sebastian.pop@amd.com>
147
148 * i386-dis.c (OP_EX_VexImmW): Reintroduced
149 function to handle 5th imm8 operand.
150 (PREFIX_VEX_3A48): Added.
151 (PREFIX_VEX_3A49): Added.
152 (VEX_W_3A48_P_2): Added.
153 (VEX_W_3A49_P_2): Added.
154 (prefix table): Added entries for PREFIX_VEX_3A48
155 and PREFIX_VEX_3A49.
156 (vex table): Added entries for VEX_W_3A48_P_2 and
157 and VEX_W_3A49_P_2.
158 * i386-gen.c (operand_type_init): Added OPERAND_TYPE_VEC_IMM4
159 for Vec_Imm4 operands.
160 * i386-opc.h (enum): Added Vec_Imm4.
161 (i386_operand_type): Added vec_imm4.
162 * i386-opc.tbl: Add entries for vpermilp[ds].
163 * i386-init.h: Regenerated.
164 * i386-tbl.h: Regenerated.
165
166 2010-02-10 Richard Sandiford <r.sandiford@uk.ibm.com>
167
168 * ppc-dis.c (ppc_opts): Add "pwr4", "pwr5", "pwr5x", "pwr6"
169 and "pwr7". Move "a2" into alphabetical order.
170
171 2010-02-08 Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
172
173 * ppc-dis.c (ppc_opts): Add titan entry.
174 * ppc-opc.c (TITAN, MULHW): Define.
175 (powerpc_opcodes): Support AppliedMicro Titan core (APM83xxx).
176
177 2010-02-03 Quentin Neill <quentin.neill@amd.com>
178
179 * i386-gen.c (cpu_flag_init): Rename CPU_AMDFAM15_FLAGS
180 to CPU_BDVER1_FLAGS
181 * i386-init.h: Regenerated.
182
183 2010-02-03 Anthony Green <green@moxielogic.com>
184
185 * moxie-opc.c (moxie_form1_opc_info): Move "nop" from 0x00 to
186 0x0f, and make 0x00 an illegal instruction.
187
188 2010-01-29 Daniel Jacobowitz <dan@codesourcery.com>
189
190 * opcodes/arm-dis.c (struct arm_private_data): New.
191 (print_insn_coprocessor, print_insn_arm): Update to use struct
192 arm_private_data.
193 (is_mapping_symbol, get_map_sym_type): New functions.
194 (get_sym_code_type): Check the symbol's section. Do not check
195 mapping symbols.
196 (print_insn): Default to disassembling ARM mode code. Check
197 for mapping symbols separately from other symbols. Use
198 struct arm_private_data.
199
200 2010-01-28 H.J. Lu <hongjiu.lu@intel.com>
201
202 * i386-dis.c (EXVexWdqScalar): New.
203 (vex_scalar_w_dq_mode): Likewise.
204 (prefix_table): Update entries for PREFIX_VEX_3899,
205 PREFIX_VEX_389B, PREFIX_VEX_389D, PREFIX_VEX_389F,
206 PREFIX_VEX_38A9, PREFIX_VEX_38AB, PREFIX_VEX_38AD,
207 PREFIX_VEX_38AF, PREFIX_VEX_38B9, PREFIX_VEX_38BB,
208 PREFIX_VEX_38BD and PREFIX_VEX_38BF.
209 (intel_operand_size): Handle vex_scalar_w_dq_mode.
210 (OP_EX): Likewise.
211
212 2010-01-27 H.J. Lu <hongjiu.lu@intel.com>
213
214 * i386-dis.c (XMScalar): New.
215 (EXdScalar): Likewise.
216 (EXqScalar): Likewise.
217 (EXqScalarS): Likewise.
218 (VexScalar): Likewise.
219 (EXdVexScalarS): Likewise.
220 (EXqVexScalarS): Likewise.
221 (XMVexScalar): Likewise.
222 (scalar_mode): Likewise.
223 (d_scalar_mode): Likewise.
224 (d_scalar_swap_mode): Likewise.
225 (q_scalar_mode): Likewise.
226 (q_scalar_swap_mode): Likewise.
227 (vex_scalar_mode): Likewise.
228 (vex_len_table): Duplcate entries for VEX_LEN_10_P_1,
229 VEX_LEN_10_P_3, VEX_LEN_11_P_1, VEX_LEN_11_P_3, VEX_LEN_2A_P_1,
230 VEX_LEN_2A_P_3, VEX_LEN_2C_P_3, VEX_LEN_2D_P_1, VEX_LEN_2E_P_0,
231 VEX_LEN_2E_P_2, VEX_LEN_2F_P_2, VEX_LEN_51_P_1, VEX_LEN_51_P_3,
232 VEX_LEN_52_P_1, VEX_LEN_53_P_1, VEX_LEN_58_P_1, VEX_LEN_58_P_3,
233 VEX_LEN_59_P_1, VEX_LEN_5A_P_1, VEX_LEN_5A_P_3, VEX_LEN_5C_P_1,
234 VEX_LEN_5C_P_3, VEX_LEN_5D_P_1, VEX_LEN_5D_P_3, VEX_LEN_5E_P_1,
235 VEX_LEN_5E_P_3, VEX_LEN_5F_P_1, VEX_LEN_5F_P_3, VEX_LEN_6E_P_2,
236 VEX_LEN_7E_P_1, VEX_LEN_7E_P_2, VEX_LEN_D6_P_2, VEX_LEN_C2_P_1,
237 VEX_LEN_C2_P_3, VEX_LEN_3A0A_P_2 and VEX_LEN_3A0B_P_2.
238 (vex_w_table): Update entries for VEX_W_10_P_1, VEX_W_10_P_3,
239 VEX_W_11_P_1, VEX_W_11_P_3, VEX_W_2E_P_0, VEX_W_2E_P_2,
240 VEX_W_2F_P_0, VEX_W_2F_P_2, VEX_W_51_P_1, VEX_W_51_P_3,
241 VEX_W_52_P_1, VEX_W_53_P_1, VEX_W_58_P_1, VEX_W_58_P_3,
242 VEX_W_59_P_1, VEX_W_59_P_3, VEX_W_5A_P_1, VEX_W_5A_P_3,
243 VEX_W_5C_P_1, VEX_W_5C_P_3, VEX_W_5D_P_1, VEX_W_5D_P_3,
244 VEX_W_5E_P_1, VEX_W_5E_P_3, VEX_W_5F_P_1, VEX_W_5F_P_3,
245 VEX_W_7E_P_1, VEX_W_D6_P_2 VEX_W_C2_P_1, VEX_W_C2_P_3,
246 VEX_W_3A0A_P_2 and VEX_W_3A0B_P_2.
247 (intel_operand_size): Handle d_scalar_mode, d_scalar_swap_mode,
248 q_scalar_mode, q_scalar_swap_mode.
249 (OP_XMM): Handle scalar_mode.
250 (OP_EX): Handle d_scalar_mode, d_scalar_swap_mode, q_scalar_mode
251 and q_scalar_swap_mode.
252 (OP_VEX): Handle vex_scalar_mode.
253
254 2010-01-24 H.J. Lu <hongjiu.lu@intel.com>
255
256 * i386-dis.c (prefix_table): Remove trailing { Bad_Opcode }.
257
258 2010-01-24 H.J. Lu <hongjiu.lu@intel.com>
259
260 * i386-dis.c (vex_len_table): Remove trailing { Bad_Opcode }.
261
262 2010-01-24 H.J. Lu <hongjiu.lu@intel.com>
263
264 * i386-dis.c (prefix_table): Remove trailing { Bad_Opcode }.
265
266 2010-01-24 H.J. Lu <hongjiu.lu@intel.com>
267
268 * i386-dis.c (Bad_Opcode): New.
269 (bad_opcode): Likewise.
270 (dis386): Replace { "(bad)", { XX } } with { Bad_Opcode }.
271 (dis386_twobyte): Likewise.
272 (reg_table): Likewise.
273 (prefix_table): Likewise.
274 (x86_64_table): Likewise.
275 (vex_len_table): Likewise.
276 (vex_w_table): Likewise.
277 (mod_table): Likewise.
278 (rm_table): Likewise.
279 (float_reg): Likewise.
280 (reg_table): Remove trailing "(bad)" entries.
281 (prefix_table): Likewise.
282 (x86_64_table): Likewise.
283 (vex_len_table): Likewise.
284 (vex_w_table): Likewise.
285 (mod_table): Likewise.
286 (rm_table): Likewise.
287 (get_valid_dis386): Handle bytemode 0.
288
289 2010-01-23 H.J. Lu <hongjiu.lu@intel.com>
290
291 * i386-opc.h (VEXScalar): New.
292
293 * i386-opc.tbl: Replace "Vex" with "Vex=3" on AVX scalar
294 instructions.
295 * i386-tbl.h: Regenerated.
296
297 2010-01-21 H.J. Lu <hongjiu.lu@intel.com>
298
299 * i386-dis.c (mod_table): Use FXSAVE on xsave and xrstor.
300
301 * i386-opc.tbl: Add xsave64 and xrstor64.
302 * i386-tbl.h: Regenerated.
303
304 2010-01-20 Nick Clifton <nickc@redhat.com>
305
306 PR 11170
307 * arm-dis.c (print_arm_address): Do not ignore negative bit in PC
308 based post-indexed addressing.
309
310 2010-01-15 Sebastian Pop <sebastian.pop@amd.com>
311
312 * i386-opc.tbl: Support all the possible aliases for VPCOM* insns.
313 * i386-tbl.h: Regenerated.
314
315 2010-01-14 H.J. Lu <hongjiu.lu@intel.com>
316
317 * i386-opc.h (VexVVVV): Replace VEX.DNS with VEX.NDS in
318 comments.
319
320 2010-01-14 H.J. Lu <hongjiu.lu@intel.com>
321
322 * i386-dis.c (names_mm): New.
323 (intel_names_mm): Likewise.
324 (att_names_mm): Likewise.
325 (names_xmm): Likewise.
326 (intel_names_xmm): Likewise.
327 (att_names_xmm): Likewise.
328 (names_ymm): Likewise.
329 (intel_names_ymm): Likewise.
330 (att_names_ymm): Likewise.
331 (print_insn): Set names_mm, names_xmm and names_ymm.
332 (OP_MMX): Use names_mm, names_xmm and names_ymm.
333 (OP_XMM): Likewise.
334 (OP_EM): Likewise.
335 (OP_EMC): Likewise.
336 (OP_MXC): Likewise.
337 (OP_EX): Likewise.
338 (XMM_Fixup): Likewise.
339 (OP_VEX): Likewise.
340 (OP_EX_VexReg): Likewise.
341 (OP_Vex_2src): Likewise.
342 (OP_Vex_2src_1): Likewise.
343 (OP_Vex_2src_2): Likewise.
344 (OP_REG_VexI4): Likewise.
345
346 2010-01-13 H.J. Lu <hongjiu.lu@intel.com>
347
348 * i386-dis.c (print_insn): Update comments.
349
350 2010-01-12 H.J. Lu <hongjiu.lu@intel.com>
351
352 * i386-dis.c (rex_original): Removed.
353 (ckprefix): Remove rex_original.
354 (print_insn): Update comments.
355
356 2010-01-09 Ralf Wildenhues <Ralf.Wildenhues@gmx.de>
357
358 * Makefile.in: Regenerate.
359 * configure: Regenerate.
360
361 2010-01-07 Doug Evans <dje@sebabeach.org>
362
363 * cgen-ibld.in (insert_normal, extract_normal): Minor cleanup.
364 * fr30-ibld.c, * frv-ibld.c, * ip2k-ibld.c, * iq2000-ibld.c,
365 * lm32-ibld.c, * m32c-ibld.c, * m32r-ibld.c, * mep-ibld.c,
366 * mt-ibld.c, * openrisc-ibld.c, * xc16x-ibld.c,
367 * xstormy16-ibld.c: Regenerate.
368
369 2010-01-06 Quentin Neill <quentin.neill@amd.com>
370
371 * i386-gen.c (cpu_flag_init): Add new CPU_AMDFAM15_FLAGS.
372 * i386-init.h: Regenerated.
373
374 2010-01-06 Daniel Gutson <dgutson@codesourcery.com>
375
376 * arm-dis.c (print_insn): Fixed search for next symbol and data
377 dumping condition, and the initial mapping symbol state.
378
379 2010-01-05 Doug Evans <dje@sebabeach.org>
380
381 * cgen-ibld.in: #include "cgen/basic-modes.h".
382 * fr30-ibld.c, * frv-ibld.c, * ip2k-ibld.c, * iq2000-ibld.c,
383 * lm32-ibld.c, * m32c-ibld.c, * m32r-ibld.c, * mep-ibld.c,
384 * mt-ibld.c, * openrisc-ibld.c, * xc16x-ibld.c,
385 * xstormy16-ibld.c: Regenerate.
386
387 2010-01-04 Nick Clifton <nickc@redhat.com>
388
389 PR 11123
390 * arm-dis.c (print_insn_coprocessor): Initialise value.
391
392 2010-01-04 Edmar Wienskoski <edmar@freescale.com>
393
394 * ppc-dis.c (ppc_opts): Add entry for "e500mc64".
395
396 2010-01-02 Doug Evans <dje@sebabeach.org>
397
398 * cgen-asm.in: Update copyright year.
399 * cgen-dis.in: Update copyright year.
400 * cgen-ibld.in: Update copyright year.
401 * fr30-asm.c, * fr30-desc.c, * fr30-desc.h, * fr30-dis.c,
402 * fr30-ibld.c, * fr30-opc.c, * fr30-opc.h, * frv-asm.c, * frv-desc.c,
403 * frv-desc.h, * frv-dis.c, * frv-ibld.c, * frv-opc.c, * frv-opc.h,
404 * ip2k-asm.c, * ip2k-desc.c, * ip2k-desc.h, * ip2k-dis.c,
405 * ip2k-ibld.c, * ip2k-opc.c, * ip2k-opc.h, * iq2000-asm.c,
406 * iq2000-desc.c, * iq2000-desc.h, * iq2000-dis.c, * iq2000-ibld.c,
407 * iq2000-opc.c, * iq2000-opc.h, * lm32-asm.c, * lm32-desc.c,
408 * lm32-desc.h, * lm32-dis.c, * lm32-ibld.c, * lm32-opc.c, * lm32-opc.h,
409 * lm32-opinst.c, * m32c-asm.c, * m32c-desc.c, * m32c-desc.h,
410 * m32c-dis.c, * m32c-ibld.c, * m32c-opc.c, * m32c-opc.h, * m32r-asm.c,
411 * m32r-desc.c, * m32r-desc.h, * m32r-dis.c, * m32r-ibld.c,
412 * m32r-opc.c, * m32r-opc.h, * m32r-opinst.c, * mep-asm.c, * mep-desc.c,
413 * mep-desc.h, * mep-dis.c, * mep-ibld.c, * mep-opc.c, * mep-opc.h,
414 * mt-asm.c, * mt-desc.c, * mt-desc.h, * mt-dis.c, * mt-ibld.c,
415 * mt-opc.c, * mt-opc.h, * openrisc-asm.c, * openrisc-desc.c,
416 * openrisc-desc.h, * openrisc-dis.c, * openrisc-ibld.c,
417 * openrisc-opc.c, * openrisc-opc.h, * xc16x-asm.c, * xc16x-desc.c,
418 * xc16x-desc.h, * xc16x-dis.c, * xc16x-ibld.c, * xc16x-opc.c,
419 * xc16x-opc.h, * xstormy16-asm.c, * xstormy16-desc.c,
420 * xstormy16-desc.h, * xstormy16-dis.c, * xstormy16-ibld.c,
421 * xstormy16-opc.c, * xstormy16-opc.h: Regenerate.
422
423 For older changes see ChangeLog-2009
424 \f
425 Local Variables:
426 mode: change-log
427 left-margin: 8
428 fill-column: 74
429 version-control: never
430 End: