opcodes/ChangeLog

   1 2018-05-08  Jim Wilson  <jimw@sifive.com>
   2
   3         * riscv-opc.c (match_c_slli, match_slli_as_c_slli): New.
   4         (match_c_slli64, match_srxi_as_c_srxi): New.
   5         (riscv_opcodes) <slli, sll>: Use match_slli_as_c_slli.
   6         <srli, srl, srai, sra>: Use match_srxi_as_c_srxi.
   7         <c.slli, c.srli, c.srai>: Use match_s_slli.
   8         <c.slli64, c.srli64, c.srai64>: New.
   9
  10 2018-05-08  Alan Modra  <amodra@gmail.com>
  11
  12         * ppc-dis.c (PPC_OPCD_SEGS): Define using PPC_OP.
  13         (VLE_OPCD_SEGS, SPE2_OPCD_SEGS): Similarly, using macros used to
  14         partition opcode space for index lookup.
  15
  16 2018-05-07  Peter Bergner  <bergner@vnet.ibm.com.com>
  17
  18         * ppc-dis.c (print_insn_powerpc) <insn_is_short>: Replace this...
  19         <insn_length>: ...with this.  Update usage.
  20         Remove duplicate call to *info->memory_error_func.
  21
  22 2018-05-07  Igor Tsimbalist  <igor.v.tsimbalist@intel.com>
  23             H.J. Lu  <hongjiu.lu@intel.com>
  24
  25         * i386-dis.c (Gva): New.
  26         (enum): Add PREFIX_0F38F8, PREFIX_0F38F9,
  27         MOD_0F38F8_PREFIX_2, MOD_0F38F9_PREFIX_0.
  28         (prefix_table): New instructions (see prefix above).
  29         (mod_table): New instructions (see prefix above).
  30         (OP_G): Handle va_mode.
  31         * i386-gen.c (cpu_flag_init): Add CPU_MOVDIRI_FLAGS,
  32         CPU_MOVDIR64B_FLAGS.
  33         (cpu_flags): Add CpuMOVDIRI and CpuMOVDIR64B.
  34         * i386-opc.h (enum): Add CpuMOVDIRI, CpuMOVDIR64B.
  35         (i386_cpu_flags): Add cpumovdiri and cpumovdir64b.
  36         * i386-opc.tbl: Add movidir{i,64b}.
  37         * i386-init.h: Regenerated.
  38         * i386-tbl.h: Likewise.
  39
  40 2018-05-07  H.J. Lu  <hongjiu.lu@intel.com>
  41
  42         * i386-gen.c (opcode_modifiers): Replace AddrPrefixOp0 with
  43         AddrPrefixOpReg.
  44         * i386-opc.h (AddrPrefixOp0): Renamed to ...
  45         (AddrPrefixOpReg): This.
  46         (i386_opcode_modifier): Rename addrprefixop0 to addrprefixopreg.
  47         * i386-opc.tbl: Replace AddrPrefixOp0 with AddrPrefixOpReg.
  48
  49 2018-05-07  Peter Bergner  <bergner@vnet.ibm.com.com>
  50
  51         * ppc-opc.c (powerpc_num_opcodes): Change type to unsigned.
  52         (vle_num_opcodes): Likewise.
  53         (spe2_num_opcodes): Likewise.
  54         * ppc-dis.c (disassemble_init_powerpc) <powerpc_opcd_indices>: Rewrite
  55         initialization loop.
  56         (disassemble_init_powerpc) <vle_opcd_indices>: Likewise.
  57         (disassemble_init_powerpc) <spe2_opcd_indices>: Likewise.  Initialize
  58         only once.
  59
  60 2018-05-01  Tamar Christina  <tamar.christina@arm.com>
  61
  62         * aarch64-dis.c (aarch64_opcode_decode): Moved memory clear code.
  63
  64 2018-04-30  Francois H. Theron <francois.theron@netronome.com>
  65
  66         Makefile.am: Added nfp-dis.c.
  67         configure.ac: Added bfd_nfp_arch.
  68         disassemble.h: Added print_insn_nfp prototype.
  69         disassemble.c: Added ARCH_nfp and call to print_insn_nfp
  70         nfp-dis.c: New, for NFP support.
  71         po/POTFILES.in: Added nfp-dis.c to the list.
  72         Makefile.in: Regenerate.
  73         configure: Regenerate.
  74
  75 2018-04-26  Jan Beulich  <jbeulich@suse.com>
  76
  77         * i386-opc.tbl: Fold various non-memory operand AVX512VL
  78         templates into their base ones.
  79         * i386-tlb.h: Re-generate.
  80
  81 2018-04-26  Jan Beulich  <jbeulich@suse.com>
  82
  83         * i386-gen.c (cpu_flag_init): Use CPU_XOP_FLAGS for
  84         CPU_BDVER1_FLAGS. Use CPU_AVX2_FLAGS for CPU_ZNVER1_FLAGS. Use
  85         CPU_AVX_FLAGS for CPU_BTVER1_FLAGS. Add CPU_XSAVE_FLAGS to
  86         CPU_LWP_FLAGS, CPU_AVX_FLAGS, CPU_MPX_FLAGS, and CPU_OSPKE_FLAGS.
  87         * i386-init.h: Re-generate.
  88
  89 2018-04-26  Jan Beulich  <jbeulich@suse.com>
  90
  91         * i386-gen.c (cpu_flag_init): Drop all uses of CpuRegMMX,
  92         CpuRegXMM, CpuRegYMM, CpuRegZMM, and CpuRegMask. Use
  93         CPU_AVX2_FLAGS for CPU_AVX512F_FLAGS and drop bogus comment.
  94         Don't use CPU_AVX2_FLAGS for CPU_AVX512VL_FLAGS and drop bogus
  95         comment.
  96         (cpu_flags): Drop CpuRegMMX, CpuRegXMM, CpuRegYMM, CpuRegZMM,
  97         and CpuRegMask.
  98         * i386-opc.h: CpuRegMMX, CpuRegXMM, CpuRegYMM, CpuRegZMM,
  99         CpuRegMask: Delete.
 100         (union i386_cpu_flags): Remove cpuregmmx, cpuregxmm, cpuregymm,
 101         cpuregzmm, and cpuregmask.
 102         * i386-init.h: Re-generate.
 103         * i386-tbl.h: Re-generate.
 104
 105 2018-04-26  Jan Beulich  <jbeulich@suse.com>
 106
 107         * i386-gen.c (cpu_flag_init): CPU_I586_FLAGS inherits Cpu387 only.
 108         CPU_287_FLAGS is Cpu287 only. CPU_387_FLAGS is Cpu387 only.
 109         * i386-init.h: Re-generate.
 110
 111 2018-04-26  Jan Beulich  <jbeulich@suse.com>
 112
 113         * i386-gen.c (VexImmExt): Delete.
 114         * i386-opc.h (VexImmExt, veximmext): Delete.
 115         * i386-opc.tbl: Drop all VexImmExt uses.
 116         * i386-tlb.h: Re-generate.
 117
 118 2018-04-25  Jan Beulich  <jbeulich@suse.com>
 119
 120         * i386-opc.tbl (vpslld, vpsrad, vpsrld): Drop AVX512VL
 121         register-only forms.
 122         * i386-tlb.h: Re-generate.
 123
 124 2018-04-25  Tamar Christina  <tamar.christina@arm.com>
 125
 126         * aarch64-tbl.h (sqrdmlah, sqrdmlsh): Fix masks.
 127
 128 2018-04-17  Igor Tsimbalist  <igor.v.tsimbalist@intel.com>
 129
 130         * i386-dis.c: Add REG_0F1C_MOD_0, MOD_0F1C_PREFIX_0,
 131         PREFIX_0F1C.
 132         * i386-gen.c (cpu_flag_init): Add CPU_CLDEMOTE_FLAGS,
 133         (cpu_flags): Add CpuCLDEMOTE.
 134         * i386-init.h: Regenerate.
 135         * i386-opc.h (enum): Add CpuCLDEMOTE,
 136         (i386_cpu_flags): Add cpucldemote.
 137         * i386-opc.tbl: Add cldemote.
 138         * i386-tbl.h: Regenerate.
 139
 140 2018-04-16  Alan Modra  <amodra@gmail.com>
 141
 142         * Makefile.am: Remove sh5 and sh64 support.
 143         * configure.ac: Likewise.
 144         * disassemble.c: Likewise.
 145         * disassemble.h: Likewise.
 146         * sh-dis.c: Likewise.
 147         * sh64-dis.c: Delete.
 148         * sh64-opc.c: Delete.
 149         * sh64-opc.h: Delete.
 150         * Makefile.in: Regenerate.
 151         * configure: Regenerate.
 152         * po/POTFILES.in: Regenerate.
 153
 154 2018-04-16  Alan Modra  <amodra@gmail.com>
 155
 156         * Makefile.am: Remove w65 support.
 157         * configure.ac: Likewise.
 158         * disassemble.c: Likewise.
 159         * disassemble.h: Likewise.
 160         * w65-dis.c: Delete.
 161         * w65-opc.h: Delete.
 162         * Makefile.in: Regenerate.
 163         * configure: Regenerate.
 164         * po/POTFILES.in: Regenerate.
 165
 166 2018-04-16  Alan Modra  <amodra@gmail.com>
 167
 168         * configure.ac: Remove we32k support.
 169         * configure: Regenerate.
 170
 171 2018-04-16  Alan Modra  <amodra@gmail.com>
 172
 173         * Makefile.am: Remove m88k support.
 174         * configure.ac: Likewise.
 175         * disassemble.c: Likewise.
 176         * disassemble.h: Likewise.
 177         * m88k-dis.c: Delete.
 178         * Makefile.in: Regenerate.
 179         * configure: Regenerate.
 180         * po/POTFILES.in: Regenerate.
 181
 182 2018-04-16  Alan Modra  <amodra@gmail.com>
 183
 184         * Makefile.am: Remove i370 support.
 185         * configure.ac: Likewise.
 186         * disassemble.c: Likewise.
 187         * disassemble.h: Likewise.
 188         * i370-dis.c: Delete.
 189         * i370-opc.c: Delete.
 190         * Makefile.in: Regenerate.
 191         * configure: Regenerate.
 192         * po/POTFILES.in: Regenerate.
 193
 194 2018-04-16  Alan Modra  <amodra@gmail.com>
 195
 196         * Makefile.am: Remove h8500 support.
 197         * configure.ac: Likewise.
 198         * disassemble.c: Likewise.
 199         * disassemble.h: Likewise.
 200         * h8500-dis.c: Delete.
 201         * h8500-opc.h: Delete.
 202         * Makefile.in: Regenerate.
 203         * configure: Regenerate.
 204         * po/POTFILES.in: Regenerate.
 205
 206 2018-04-16  Alan Modra  <amodra@gmail.com>
 207
 208         * configure.ac: Remove tahoe support.
 209         * configure: Regenerate.
 210
 211 2018-04-15  H.J. Lu  <hongjiu.lu@intel.com>
 212
 213         * i386-dis.c (prefix_table): Replace Em with Edq on tpause and
 214         umwait.
 215         * i386-opc.tbl: Allow 32-bit registers for tpause and umwait in
 216         64-bit mode.
 217         * i386-tbl.h: Regenerated.
 218
 219 2018-04-11  Igor Tsimbalist  <igor.v.tsimbalist@intel.com>
 220
 221         * i386-dis.c (enum): Add PREFIX_MOD_0_0FAE_REG_6,
 222         PREFIX_MOD_1_0FAE_REG_6.
 223         (va_mode): New.
 224         (OP_E_register): Use va_mode.
 225         * i386-dis-evex.h (prefix_table):
 226         New instructions (see prefixes above).
 227         * i386-gen.c (cpu_flag_init): Add WAITPKG.
 228         (cpu_flags): Likewise.
 229         * i386-opc.h (enum): Likewise.
 230         (i386_cpu_flags): Likewise.
 231         * i386-opc.tbl: Add umonitor, umwait, tpause.
 232         * i386-init.h: Regenerate.
 233         * i386-tbl.h: Likewise.
 234
 235 2018-04-11  Alan Modra  <amodra@gmail.com>
 236
 237         * opcodes/i860-dis.c: Delete.
 238         * opcodes/i960-dis.c: Delete.
 239         * Makefile.am: Remove i860 and i960 support.
 240         * configure.ac: Likewise.
 241         * disassemble.c: Likewise.
 242         * disassemble.h: Likewise.
 243         * Makefile.in: Regenerate.
 244         * configure: Regenerate.
 245         * po/POTFILES.in: Regenerate.
 246
 247 2018-04-04  H.J. Lu  <hongjiu.lu@intel.com>
 248
 249         PR binutils/23025
 250         * i386-dis.c (get_valid_dis386): Don't set vex.prefix nor vex.w
 251         to 0.
 252         (print_insn): Clear vex instead of vex.evex.
 253
 254 2018-04-04  Nick Clifton  <nickc@redhat.com>
 255
 256         * po/es.po: Updated Spanish translation.
 257
 258 2018-03-28  Jan Beulich  <jbeulich@suse.com>
 259
 260         * i386-gen.c (opcode_modifiers): Delete VecESize.
 261         * i386-opc.h (VecESize): Delete.
 262         (struct i386_opcode_modifier): Delete vecesize.
 263         * i386-opc.tbl: Drop VecESize.
 264         * i386-tlb.h: Re-generate.
 265
 266 2018-03-28  Jan Beulich  <jbeulich@suse.com>
 267
 268         * i386-opc.h (NO_BROADCAST, BROADCAST_1TO16, BROADCAST_1TO8,
 269         BROADCAST_1TO4, BROADCAST_1TO2): Delete.
 270         (struct i386_opcode_modifier): Shrink broadcast field to 1 bit.
 271         * i386-opc.tbl: Replace Broadcast=<N> by Broadcast.
 272         * i386-tlb.h: Re-generate.
 273
 274 2018-03-28  Jan Beulich  <jbeulich@suse.com>
 275
 276         * i386-opc.tbl (vcvt*d2si, vcvt*d2usi, vcvt*s2si, vcvt*s2usi):
 277         Fold AVX512 forms
 278         * i386-tlb.h: Re-generate.
 279
 280 2018-03-28  Jan Beulich  <jbeulich@suse.com>
 281
 282         * i386-dis.c (prefix_table): Drop Y for cvt*2si.
 283         (vex_len_table): Drop Y for vcvt*2si.
 284         (putop): Replace plain 'Y' handling by abort().
 285
 286 2018-03-28  Nick Clifton  <nickc@redhat.com>
 287
 288         PR 22988
 289         * aarch64-tbl.h (aarch64_opcode_table): Add entries for LDFF1xx
 290         instructions with only a base address register.
 291         * aarch64-opc.c (operand_general_constraint_met_p): Add code to
 292         handle AARHC64_OPND_SVE_ADDR_R.
 293         (aarch64_print_operand): Likewise.
 294         * aarch64-asm-2.c: Regenerate.
 295         * aarch64_dis-2.c: Regenerate.
 296         * aarch64-opc-2.c: Regenerate.
 297
 298 2018-03-22  Jan Beulich  <jbeulich@suse.com>
 299
 300         * i386-opc.tbl: Drop VecESize from register only insn forms and
 301         memory forms not allowing broadcast.
 302         * i386-tlb.h: Re-generate.
 303
 304 2018-03-22  Jan Beulich  <jbeulich@suse.com>
 305
 306         * i386-opc.tbl (vfrczs*, vphadd*, vphsub*, vpmacs*, vpmadcs*,
 307         vprot*, vpsha*, vpshl*, bextr, blc*, bls*, t1mskc, tzmsk, sha1*,
 308         sha256*): Drop Disp<N>.
 309
 310 2018-03-22  Jan Beulich  <jbeulich@suse.com>
 311
 312         * i386-dis.c (EbndS, bnd_swap_mode): New.
 313         (prefix_table): Use EbndS.
 314         (OP_E_register, OP_E_memory): Also handle bnd_swap_mode.
 315         * i386-opc.tbl (bndmov): Move misplaced Load.
 316         * i386-tlb.h: Re-generate.
 317
 318 2018-03-22  Jan Beulich  <jbeulich@suse.com>
 319
 320         * i386-opc.tbl (vcvtdq2pd, vcvtps2pd, vcvtudq2pd): Use separate
 321         templates allowing memory operands and folded ones for register
 322         only flavors.
 323         * i386-tlb.h: Re-generate.
 324
 325 2018-03-22  Jan Beulich  <jbeulich@suse.com>
 326
 327         * i386-opc.tbl (vfrczp*, vpcmov, vpermil2p*): Fold 128- and
 328         256-bit templates. Drop redundant leftover Disp<N>.
 329         * i386-tlb.h: Re-generate.
 330
 331 2018-03-14  Kito Cheng  <kito.cheng@gmail.com>
 332
 333         * riscv-opc.c (riscv_insn_types): New.
 334
 335 2018-03-13  Nick Clifton  <nickc@redhat.com>
 336
 337         * po/pt_BR.po: Updated Brazilian Portuguese translation.
 338
 339 2018-03-08  H.J. Lu  <hongjiu.lu@intel.com>
 340
 341         * i386-opc.tbl: Add Optimize to clr.
 342         * i386-tbl.h: Regenerated.
 343
 344 2018-03-08  H.J. Lu  <hongjiu.lu@intel.com>
 345
 346         * i386-gen.c (opcode_modifiers): Remove OldGcc.
 347         * i386-opc.h (OldGcc): Removed.
 348         (i386_opcode_modifier): Remove oldgcc.
 349         * i386-opc.tbl: Remove fsubp, fsubrp, fdivp and fdivrp
 350         instructions for old (<= 2.8.1) versions of gcc.
 351         * i386-tbl.h: Regenerated.
 352
 353 2018-03-08  Jan Beulich  <jbeulich@suse.com>
 354
 355         * i386-opc.h (EVEXDYN): New.
 356         * i386-opc.tbl: Fold various AVX512VL templates.
 357         * i386-tlb.h: Re-generate.
 358
 359 2018-03-08  Jan Beulich  <jbeulich@suse.com>
 360
 361         * i386-opc.tbl (vexpandpd, vexpandps, vmovapd, vmovaps,
 362         vmovdqa32, vmovdqa64, vmovdqu32, vmovdqu64, vmovupd, vmovups,
 363         vpexpandd, vpexpandq): Fold AFX512VF templates.
 364         * i386-tlb.h: Re-generate.
 365
 366 2018-03-08  Jan Beulich  <jbeulich@suse.com>
 367
 368         * i386-opc.tbl (vgf2p8affineinvqb, vgf2p8affineqb, vgf2p8mulb):
 369         Fold 128- and 256-bit VEX-encoded templates.
 370         * i386-tlb.h: Re-generate.
 371
 372 2018-03-08  Jan Beulich  <jbeulich@suse.com>
 373
 374         * i386-opc.tbl (vexpandpd, vexpandps, vmovapd, vmovaps,
 375         vmovdqa32, vmovdqa64, vmovdqu32, vmovdqu64, vmovupd, vmovups,
 376         vpexpandd, vpexpandq): Fold AVX512F templates.
 377         * i386-tlb.h: Re-generate.
 378
 379 2018-03-08  Jan Beulich  <jbeulich@suse.com>
 380
 381         * i386-opc.tbl (llwpcb, slwpcb, lwpval, lwpins): Fold 32- and
 382         64-bit templates. Drop Disp<N>.
 383         * i386-tlb.h: Re-generate.
 384
 385 2018-03-08  Jan Beulich  <jbeulich@suse.com>
 386
 387         * i386-opc.tbl (vfmadd*, vfmsub*, vfnmadd*, vfnmsub*): Fold 128-
 388         and 256-bit templates.
 389         * i386-tlb.h: Re-generate.
 390
 391 2018-03-08  Jan Beulich  <jbeulich@suse.com>
 392
 393         * i386-opc.tbl (cmpxchg8b): Add NoRex64.
 394         * i386-tlb.h: Re-generate.
 395
 396 2018-03-08  Jan Beulich  <jbeulich@suse.com>
 397
 398         * i386-opc.tbl (cmpxchg16b, fisttp, fisttpll, bndmov, mwaitx):
 399         Drop NoAVX.
 400         * i386-tlb.h: Re-generate.
 401
 402 2018-03-08  Jan Beulich  <jbeulich@suse.com>
 403
 404         * i386-opc.tbl (ldmxcsr, stmxcsr): Add NoAVX.
 405         * i386-tlb.h: Re-generate.
 406
 407 2018-03-08  Jan Beulich  <jbeulich@suse.com>
 408
 409         * i386-gen.c (opcode_modifiers): Delete FloatD.
 410         * i386-opc.h (FloatD): Delete.
 411         (struct i386_opcode_modifier): Delete floatd.
 412         * i386-opc.tbl (fadd, fsub, fsubr, fmul, fdiv, fdivr): Replace
 413         FloatD by D.
 414         * i386-tlb.h: Re-generate.
 415
 416 2018-03-08  Jan Beulich  <jbeulich@suse.com>
 417
 418         * i386-dis.c (float_reg): Adjust DC and DE fsub*/fdiv* patterns.
 419
 420 2018-03-08  Jan Beulich  <jbeulich@suse.com>
 421
 422         * i386-opc.tbl (vmovd): Disallow Qword memory operands.
 423         * i386-tlb.h: Re-generate.
 424
 425 2018-03-08  Jan Beulich  <jbeulich@suse.com>
 426
 427         * i386-opc.tbl (vcvtpd2ps): Fold AVX 128- and 256-bit memory
 428         forms.
 429         * i386-tlb.h: Re-generate.
 430
 431 2018-03-07  Alan Modra  <amodra@gmail.com>
 432
 433         * disassemble.c (disassembler): Use bfd_arch_powerpc entry for
 434         bfd_arch_rs6000.
 435         * disassemble.h (print_insn_rs6000): Delete.
 436         * ppc-dis.c (powerpc_init_dialect): Handle rs6000.
 437         (disassemble_init_powerpc): Call powerpc_init_dialect for rs6000.
 438         (print_insn_rs6000): Delete.
 439
 440 2018-03-03  Alan Modra  <amodra@gmail.com>
 441
 442         * sysdep.h (opcodes_error_handler): Define.
 443         (_bfd_error_handler): Declare.
 444         * Makefile.am: Remove stray #.
 445         * opc2c.c (main): Remove bogus -l arg handling.  Print "DO NOT
 446         EDIT" comment.
 447         * aarch64-dis.c, * arc-dis.c, * arm-dis.c, * avr-dis.c,
 448         * d30v-dis.c, * h8300-dis.c, * mmix-dis.c, * ppc-dis.c,
 449         * riscv-dis.c, * s390-dis.c, * sparc-dis.c, * v850-dis.c: Use
 450         opcodes_error_handler to print errors.  Standardize error messages.
 451         * msp430-decode.opc, * nios2-dis.c, * rl78-decode.opc: Likewise,
 452         and include opintl.h.
 453         * nds32-asm.c: Likewise, and include sysdep.h and opintl.h.
 454         * i386-gen.c: Standardize error messages.
 455         * msp430-decode.c, * rl78-decode.c, rx-decode.c: Regenerate.
 456         * Makefile.in: Regenerate.
 457         * epiphany-asm.c, * epiphany-desc.c, * epiphany-dis.c,
 458         * epiphany-ibld.c, * fr30-asm.c, * fr30-desc.c, * fr30-dis.c,
 459         * fr30-ibld.c, * frv-asm.c, * frv-desc.c, * frv-dis.c, * frv-ibld.c,
 460         * frv-opc.c, * ip2k-asm.c, * ip2k-desc.c, * ip2k-dis.c, * ip2k-ibld.c,
 461         * iq2000-asm.c, * iq2000-desc.c, * iq2000-dis.c, * iq2000-ibld.c,
 462         * lm32-asm.c, * lm32-desc.c, * lm32-dis.c, * lm32-ibld.c,
 463         * m32c-asm.c, * m32c-desc.c, * m32c-dis.c, * m32c-ibld.c,
 464         * m32r-asm.c, * m32r-desc.c, * m32r-dis.c, * m32r-ibld.c,
 465         * mep-asm.c, * mep-desc.c, * mep-dis.c, * mep-ibld.c, * mt-asm.c,
 466         * mt-desc.c, * mt-dis.c, * mt-ibld.c, * or1k-asm.c, * or1k-desc.c,
 467         * or1k-dis.c, * or1k-ibld.c, * xc16x-asm.c, * xc16x-desc.c,
 468         * xc16x-dis.c, * xc16x-ibld.c, * xstormy16-asm.c, * xstormy16-desc.c,
 469         * xstormy16-dis.c, * xstormy16-ibld.c: Regenerate.
 470
 471 2018-03-01  H.J. Lu  <hongjiu.lu@intel.com>
 472
 473         * * i386-opc.tbl: Add "Optimize" to AVX256 and AVX512
 474         vpsub[bwdq] instructions.
 475         * i386-tbl.h: Regenerated.
 476
 477 2018-03-01  Alan Modra  <amodra@gmail.com>
 478
 479         * configure.ac (ALL_LINGUAS): Sort.
 480         * configure: Regenerate.
 481
 482 2018-02-27  Thomas Preud'homme  <thomas.preudhomme@arm.com>
 483
 484         * arm-dis.c (print_insn_coprocessor): Replace uses of ARM_FEATURE_COPY
 485         macro by assignements.
 486
 487 2018-02-27  H.J. Lu  <hongjiu.lu@intel.com>
 488
 489         PR gas/22871
 490         * i386-gen.c (opcode_modifiers): Add Optimize.
 491         * i386-opc.h (Optimize): New enum.
 492         (i386_opcode_modifier): Add optimize.
 493         * i386-opc.tbl: Add "Optimize" to "mov $imm, reg",
 494         "sub reg, reg/mem", "test $imm, acc", "test $imm, reg/mem",
 495         "and $imm, acc", "and $imm, reg/mem", "xor reg, reg/mem",
 496         "movq $imm, reg" and AVX256 and AVX512 versions of vandnps,
 497         vandnpd, vpandn, vpandnd, vpandnq, vxorps, vxorpd, vpxor,
 498         vpxord and vpxorq.
 499         * i386-tbl.h: Regenerated.
 500
 501 2018-02-26  Alan Modra  <amodra@gmail.com>
 502
 503         * crx-dis.c (getregliststring): Allocate a large enough buffer
 504         to silence false positive gcc8 warning.
 505
 506 2018-02-22  Shea Levy <shea@shealevy.com>
 507
 508         * disassemble.c (ARCH_riscv): Define if ARCH_all.
 509
 510 2018-02-22  H.J. Lu  <hongjiu.lu@intel.com>
 511
 512         * i386-opc.tbl: Add {rex},
 513         * i386-tbl.h: Regenerated.
 514
 515 2018-02-20  Maciej W. Rozycki  <macro@mips.com>
 516
 517         * mips16-opc.c (decode_mips16_operand) <'M'>: Remove case.
 518         (mips16_opcodes): Replace `M' with `m' for "restore".
 519
 520 2018-02-19  Thomas Preud'homme  <thomas.preudhomme@arm.com>
 521
 522         * arm-dis.c (thumb_opcodes): Fix BXNS mask.
 523
 524 2018-02-13  Maciej W. Rozycki  <macro@mips.com>
 525
 526         * wasm32-dis.c (print_insn_wasm32): Rename `index' local
 527         variable to `function_index'.
 528
 529 2018-02-13  Nick Clifton  <nickc@redhat.com>
 530
 531         PR 22823
 532         * metag-dis.c (print_fmmov): Double buffer size to avoid warning
 533         about truncation of printing.
 534
 535 2018-02-12  Henry Wong <henry@stuffedcow.net>
 536
 537         * mips-opc.c (mips_builtin_opcodes): Correct "sigrie" encoding.
 538
 539 2018-02-05  Nick Clifton  <nickc@redhat.com>
 540
 541         * po/pt_BR.po: Updated Brazilian Portuguese translation.
 542
 543 2018-01-23  Igor Tsimbalist  <igor.v.tsimbalist@intel.com>
 544
 545         * i386-dis.c (enum): Add pconfig.
 546         * i386-gen.c (cpu_flag_init): Add CPU_PCONFIG_FLAGS.
 547         (cpu_flags): Add CpuPCONFIG.
 548         * i386-opc.h (enum): Add CpuPCONFIG.
 549         (i386_cpu_flags): Add cpupconfig.
 550         * i386-opc.tbl: Add PCONFIG instruction.
 551         * i386-init.h: Regenerate.
 552         * i386-tbl.h: Likewise.
 553
 554 2018-01-23  Igor Tsimbalist  <igor.v.tsimbalist@intel.com>
 555
 556         * i386-dis.c (enum): Add PREFIX_0F09.
 557         * i386-gen.c (cpu_flag_init): Add CPU_WBNOINVD_FLAGS.
 558         (cpu_flags): Add CpuWBNOINVD.
 559         * i386-opc.h (enum): Add CpuWBNOINVD.
 560         (i386_cpu_flags): Add cpuwbnoinvd.
 561         * i386-opc.tbl: Add WBNOINVD instruction.
 562         * i386-init.h: Regenerate.
 563         * i386-tbl.h: Likewise.
 564
 565 2018-01-17  Jim Wilson  <jimw@sifive.com>
 566
 567         * riscv-opc.c (riscv_opcodes) <addi>: Use z instead of 0.
 568
 569 2018-01-17  Igor Tsimbalist  <igor.v.tsimbalist@intel.com>
 570
 571         * i386-gen.c (cpu_flag_init): Delete CPU_CET_FLAGS, CpuCET.
 572         Add CPU_IBT_FLAGS, CPU_SHSTK_FLAGS, CPY_ANY_IBT_FLAGS,
 573         CPU_ANY_SHSTK_FLAGS, CpuIBT, CpuSHSTK.
 574         (cpu_flags): Add CpuIBT, CpuSHSTK.
 575         * i386-opc.h (enum): Add CpuIBT, CpuSHSTK.
 576         (i386_cpu_flags): Add cpuibt, cpushstk.
 577         * i386-opc.tbl: Change CpuCET to CpuSHSTK and CpuIBT.
 578         * i386-init.h: Regenerate.
 579         * i386-tbl.h: Likewise.
 580
 581 2018-01-16  Nick Clifton  <nickc@redhat.com>
 582
 583         * po/pt_BR.po: Updated Brazilian Portugese translation.
 584         * po/de.po: Updated German translation.
 585
 586 2018-01-15  Jim Wilson  <jimw@sifive.com>
 587
 588         * riscv-opc.c (match_c_nop): New.
 589         (riscv_opcodes) <addi>: Handle an addi that compresses to c.nop.
 590
 591 2018-01-15  Nick Clifton  <nickc@redhat.com>
 592
 593         * po/uk.po: Updated Ukranian translation.
 594
 595 2018-01-13  Nick Clifton  <nickc@redhat.com>
 596
 597         * po/opcodes.pot: Regenerated.
 598
 599 2018-01-13  Nick Clifton  <nickc@redhat.com>
 600
 601         * configure: Regenerate.
 602
 603 2018-01-13  Nick Clifton  <nickc@redhat.com>
 604
 605         2.30 branch created.
 606
 607 2018-01-11  Igor Tsimbalist  <igor.v.tsimbalist@intel.com>
 608
 609         * i386-opc.tbl: Remove VL variants for 4FMAPS and 4VNNIW insns.
 610         * i386-tbl.h: Regenerate.
 611
 612 2018-01-10  Jan Beulich  <jbeulich@suse.com>
 613
 614         * i386-opc.tbl (v4fmaddss, v4fnmaddss): Adjust Disp8MemShift.
 615         * i386-tbl.h: Re-generate.
 616
 617 2018-01-10  Jan Beulich  <jbeulich@suse.com>
 618
 619         * i386-opc.tbl (vpcmpeqb, vpcmpleb, vpcmpltb, vpcmpneqb,
 620         vpcmpnleb, vpcmpnltb, vpcmpequb, vpcmpleub, vpcmpltub,
 621         vpcmpnequb, vpcmpnleub, vpcmpnltub, vpcmpeqw, vpcmplew,
 622         vpcmpltw, vpcmpneqw, vpcmpnlew, vpcmpnltw, vpcmpequw, vpcmpleuw,
 623         vpcmpltuw, vpcmpnequw, vpcmpnleuw, vpcmpnltuw): Adjust
 624         Disp8MemShift of AVX512VL forms.
 625         * i386-tbl.h: Re-generate.
 626
 627 2018-01-09  Jim Wilson  <jimw@sifive.com>
 628
 629         * riscv-dis.c (maybe_print_address): If base_reg is zero,
 630         then the hi_addr value is zero.
 631
 632 2018-01-09  James Greenhalgh  <james.greenhalgh@arm.com>
 633
 634         * arm-dis.c (arm_opcodes): Add csdb.
 635         (thumb32_opcodes): Add csdb.
 636
 637 2018-01-09  James Greenhalgh  <james.greenhalgh@arm.com>
 638
 639         * aarch64-tbl.h (aarch64_opcode_table): Add "csdb".
 640         * aarch64-asm-2.c: Regenerate.
 641         * aarch64-dis-2.c: Regenerate.
 642         * aarch64-opc-2.c: Regenerate.
 643
 644 2018-01-08  H.J. Lu  <hongjiu.lu@intel.com>
 645
 646         PR gas/22681
 647         * i386-opc.tbl: Properly encode vmovd with Qword memeory operand.
 648         Remove AVX512 vmovd with 64-bit operands.
 649         * i386-tbl.h: Regenerated.
 650
 651 2018-01-05  Jim Wilson  <jimw@sifive.com>
 652
 653         * riscv-dis.c (print_insn_args) <'s'>: Call maybe_print_address for a
 654         jalr.
 655
 656 2018-01-03  Alan Modra  <amodra@gmail.com>
 657
 658         Update year range in copyright notice of all files.
 659
 660 2018-01-02  Jan Beulich  <jbeulich@suse.com>
 661
 662         * i386-gen.c (operand_type_init): Restore OPERAND_TYPE_REGYMM
 663         and OPERAND_TYPE_REGZMM entries.
 664
 665 For older changes see ChangeLog-2017
 666 \f
 667 Copyright (C) 2018 Free Software Foundation, Inc.
 668
 669 Copying and distribution of this file, with or without modification,
 670 are permitted in any medium without royalty provided the copyright
 671 notice and this notice are preserved.
 672
 673 Local Variables:
 674 mode: change-log
 675 left-margin: 8
 676 fill-column: 74
 677 version-control: never
 678 End: