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x86-64: make SYSEXIT handling similar to SYSRET's
[thirdparty/binutils-gdb.git] / opcodes / ChangeLog
1 2021-03-09 Jan Beulich <jbeulich@suse.com>
2
3 * opcodes/i386-dis.c (dis386_twobyte): Add %LQ to sysexit.
4 * opcodes/i386-opc.tbl (sysexit): Drop No_lSuf and No_qSuf from
5 64-bit form.
6 * opcodes/i386-tbl.h: Re-generate.
7
8 2021-03-03 Jan Beulich <jbeulich@suse.com>
9
10 * i386-gen.c (output_i386_opcode): Don't get operand count. Look
11 for {} instead of {0}. Don't look for '0'.
12 * i386-opc.tbl: Drop operand count field. Drop redundant operand
13 size specifiers.
14
15 2021-02-19 Nelson Chu <nelson.chu@sifive.com>
16
17 PR 27158
18 * riscv-dis.c (print_insn_args): Updated encoding macros.
19 * riscv-opc.c (MASK_RVC_IMM): defined to ENCODE_CITYPE_IMM.
20 (match_c_addi16sp): Updated encoding macros.
21 (match_c_lui): Likewise.
22 (match_c_lui_with_hint): Likewise.
23 (match_c_addi4spn): Likewise.
24 (match_c_slli): Likewise.
25 (match_slli_as_c_slli): Likewise.
26 (match_c_slli64): Likewise.
27 (match_srxi_as_c_srxi): Likewise.
28 (riscv_insn_types): Added .insn css/cl/cs.
29
30 2021-02-18 Nelson Chu <nelson.chu@sifive.com>
31
32 * riscv-dis.c: Included cpu-riscv.h, and removed elfxx-riscv.h.
33 (default_priv_spec): Updated type to riscv_spec_class.
34 (parse_riscv_dis_option): Updated.
35 * riscv-opc.c: Moved stuff and make the file tidy.
36
37 2021-02-17 Alan Modra <amodra@gmail.com>
38
39 * wasm32-dis.c: Include limits.h.
40 (CHAR_BIT): Provide backup define.
41 (wasm_read_leb128): Use CHAR_BIT to size "result" in bits.
42 Correct signed overflow checking.
43
44 2021-02-16 Jan Beulich <jbeulich@suse.com>
45
46 * i386-opc.tbl: Split CVTPI2PD template. Add SSE2AVX variant.
47 * i386-tbl.h: Re-generate.
48
49 2021-02-16 Jan Beulich <jbeulich@suse.com>
50
51 * i386-gen.c (set_bitfield): Don't look for CpuFP, Mmword, nor
52 Oword.
53 * i386-opc.tbl (CpuFP, Mmword, Oword): Define.
54
55 2021-02-15 Andreas Krebbel <krebbel@linux.ibm.com>
56
57 * s390-mkopc.c (main): Accept arch14 as cpu string.
58 * s390-opc.txt: Add new arch14 instructions.
59
60 2021-02-04 Nick Alcock <nick.alcock@oracle.com>
61
62 * configure.ac (SHARED_LIBADD): Remove explicit -lintl population in
63 favour of LIBINTL.
64 * configure: Regenerated.
65
66 2021-02-08 Mike Frysinger <vapier@gentoo.org>
67
68 * tic54x-dis.c (sprint_mmr): Change to tic54x_mmregs.
69 * tic54x-opc.c (regs): Rename to ...
70 (tic54x_regs): ... this.
71 (mmregs): Rename to ...
72 (tic54x_mmregs): ... this.
73 (condition_codes): Rename to ...
74 (tic54x_condition_codes): ... this.
75 (cc2_codes): Rename to ...
76 (tic54x_cc2_codes): ... this.
77 (cc3_codes): Rename to ...
78 (tic54x_cc3_codes): ... this.
79 (status_bits): Rename to ...
80 (tic54x_status_bits): ... this.
81 (misc_symbols): Rename to ...
82 (tic54x_misc_symbols): ... this.
83
84 2021-02-04 Nelson Chu <nelson.chu@sifive.com>
85
86 * riscv-opc.c (MASK_RVB_IMM): Removed.
87 (riscv_opcodes): Removed zb* instructions.
88 (riscv_ext_version_table): Removed versions for zb*.
89
90 2021-01-26 Alan Modra <amodra@gmail.com>
91
92 * i386-gen.c (parse_template): Ensure entire template_instance
93 is initialised.
94
95 2021-01-15 Nelson Chu <nelson.chu@sifive.com>
96
97 * riscv-opc.c (riscv_gpr_names_abi): Aligned the code.
98 (riscv_fpr_names_abi): Likewise.
99 (riscv_opcodes): Likewise.
100 (riscv_insn_types): Likewise.
101
102 2021-01-15 Nelson Chu <nelson.chu@sifive.com>
103
104 * riscv-dis.c (parse_riscv_dis_option): Fix typos of message.
105
106 2021-01-15 Nelson Chu <nelson.chu@sifive.com>
107
108 * riscv-dis.c: Comments tidy and improvement.
109 * riscv-opc.c: Likewise.
110
111 2021-01-13 Alan Modra <amodra@gmail.com>
112
113 * Makefile.in: Regenerate.
114
115 2021-01-12 H.J. Lu <hongjiu.lu@intel.com>
116
117 PR binutils/26792
118 * configure.ac: Use GNU_MAKE_JOBSERVER.
119 * aclocal.m4: Regenerated.
120 * configure: Likewise.
121
122 2021-01-12 Nick Clifton <nickc@redhat.com>
123
124 * po/sr.po: Updated Serbian translation.
125
126 2021-01-11 H.J. Lu <hongjiu.lu@intel.com>
127
128 PR ld/27173
129 * configure: Regenerated.
130
131 2021-01-11 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
132
133 * aarch64-asm-2.c: Regenerate.
134 * aarch64-dis-2.c: Likewise.
135 * aarch64-opc-2.c: Likewise.
136 * aarch64-opc.c (aarch64_print_operand):
137 Delete handling of AARCH64_OPND_CSRE_CSR.
138 * aarch64-tbl.h (aarch64_feature_csre): Delete.
139 (CSRE): Likewise.
140 (_CSRE_INSN): Likewise.
141 (aarch64_opcode_table): Delete csr.
142
143 2021-01-11 Nick Clifton <nickc@redhat.com>
144
145 * po/de.po: Updated German translation.
146 * po/fr.po: Updated French translation.
147 * po/pt_BR.po: Updated Brazilian Portuguese translation.
148 * po/sv.po: Updated Swedish translation.
149 * po/uk.po: Updated Ukranian translation.
150
151 2021-01-09 H.J. Lu <hongjiu.lu@intel.com>
152
153 * configure: Regenerated.
154
155 2021-01-09 Nick Clifton <nickc@redhat.com>
156
157 * configure: Regenerate.
158 * po/opcodes.pot: Regenerate.
159
160 2021-01-09 Nick Clifton <nickc@redhat.com>
161
162 * 2.36 release branch crated.
163
164 2021-01-08 Peter Bergner <bergner@linux.ibm.com>
165
166 * ppc-opc.c (insert_dw, (extract_dw): New functions.
167 (DW, (XRC_MASK): Define.
168 (powerpc_opcodes) <hashchk, hashchkp, hashst, haststp>: New mnemonics.
169
170 2021-01-09 Alan Modra <amodra@gmail.com>
171
172 * configure: Regenerate.
173
174 2021-01-08 Nick Clifton <nickc@redhat.com>
175
176 * po/sv.po: Updated Swedish translation.
177
178 2021-01-08 Nick Clifton <nickc@redhat.com>
179
180 PR 27129
181 * aarch64-dis.c (determine_disassembling_preference): Move call to
182 aarch64_match_operands_constraint outside of the assertion.
183 * aarch64-asm.c (aarch64_ins_limm_1): Remove call to assert.
184 Replace with a return of FALSE.
185
186 PR 27139
187 * aarch64-opc.c (aarch64_sys_regs): Treat id_aa64mmfr2_el1 as a
188 core system register.
189
190 2021-01-07 Samuel Thibault <samuel.thibault@gnu.org>
191
192 * configure: Regenerate.
193
194 2021-01-07 Nick Clifton <nickc@redhat.com>
195
196 * po/fr.po: Updated French translation.
197
198 2021-01-07 Fredrik Noring <noring@nocrew.org>
199
200 * m68k-opc.c (chkl): Change minimum architecture requirement to
201 m68020.
202
203 2021-01-07 Philipp Tomsich <prt@gnu.org>
204
205 * riscv-opc.c (riscv_opcodes): Add pause hint instruction.
206
207 2021-01-07 Claire Xenia Wolf <claire@symbioticeda.com>
208 Jim Wilson <jimw@sifive.com>
209 Andrew Waterman <andrew@sifive.com>
210 Maxim Blinov <maxim.blinov@embecosm.com>
211 Kito Cheng <kito.cheng@sifive.com>
212 Nelson Chu <nelson.chu@sifive.com>
213
214 * riscv-opc.c (riscv_opcodes): Add ZBA/ZBB/ZBC instructions.
215 (MASK_RVB_IMM): Used for rev8 and orc.b encoding.
216
217 2021-01-01 Alan Modra <amodra@gmail.com>
218
219 Update year range in copyright notice of all files.
220
221 For older changes see ChangeLog-2020
222 \f
223 Copyright (C) 2021 Free Software Foundation, Inc.
224
225 Copying and distribution of this file, with or without modification,
226 are permitted in any medium without royalty provided the copyright
227 notice and this notice are preserved.
228
229 Local Variables:
230 mode: change-log
231 left-margin: 8
232 fill-column: 74
233 version-control: never
234 End: