opcodes/ChangeLog

   1 2006-03-09  Nick Clifton  <nickc@redhat.com>
   2
   3         * po/sv.po: Updated Swedish translation.
   4
   5 2006-03-07  H.J. Lu  <hongjiu.lu@intel.com>
   6
   7         PR binutils/2428
   8         * i386-dis.c (REP_Fixup): New function.
   9         (AL): Remove duplicate.
  10         (Xbr): New.
  11         (Xvr): Likewise.
  12         (Ybr): Likewise.
  13         (Yvr): Likewise.
  14         (indirDXr): Likewise.
  15         (ALr): Likewise.
  16         (eAXr): Likewise.
  17         (dis386): Updated entries of ins, outs, movs, lods and stos.
  18
  19 2006-03-05  Nick Clifton  <nickc@redhat.com>
  20
  21         * cgen-ibld.in (insert_normal): Cope with attempts to insert a
  22         signed 32-bit value into an unsigned 32-bit field when the host is
  23         a 64-bit machine.
  24         * fr30-ibld.c: Regenerate.
  25         * frv-ibld.c: Regenerate.
  26         * ip2k-ibld.c: Regenerate.
  27         * iq2000-asm.c: Regenerate.
  28         * iq2000-ibld.c: Regenerate.
  29         * m32c-ibld.c: Regenerate.
  30         * m32r-ibld.c: Regenerate.
  31         * openrisc-ibld.c: Regenerate.
  32         * xc16x-ibld.c: Regenerate.
  33         * xstormy16-ibld.c: Regenerate.
  34
  35 2006-03-03 Shrirang Khisti <shrirangk@kpitcummins.com)
  36
  37         * xc16x-asm.c: Regenerate.
  38         * xc16x-dis.c: Regenerate.
  39
  40 2006-02-27  Carlos O'Donell  <carlos@codesourcery.com>
  41
  42         * po/Make-in: Add html target.
  43
  44 2006-02-27  H.J. Lu <hongjiu.lu@intel.com>
  45
  46         * i386-dis.c (IS_3BYTE_OPCODE): New for 3-byte opcodes used by
  47         Intel Merom New Instructions.
  48         (THREE_BYTE_0): Likewise.
  49         (THREE_BYTE_1): Likewise.
  50         (three_byte_table): Likewise.
  51         (dis386_twobyte): Use THREE_BYTE_0 for entry 0x38. Use
  52         THREE_BYTE_1 for entry 0x3a.
  53         (twobyte_has_modrm): Updated.
  54         (twobyte_uses_SSE_prefix): Likewise.
  55         (print_insn): Handle 3-byte opcodes used by Intel Merom New
  56         Instructions.
  57
  58 2006-02-24  David S. Miller  <davem@sunset.davemloft.net>
  59
  60         * sparc-dis.c (v9_priv_reg_names): Add "gl" entry.
  61         (v9_hpriv_reg_names): New table.
  62         (print_insn_sparc): Allow values up to 16 for '?' and '!'.
  63         New cases '$' and '%' for read/write hyperprivileged register.
  64         * sparc-opc.c (sparc_opcodes): Add new entries for UA2005
  65         window handling and rdhpr/wrhpr instructions.
  66
  67 2006-02-24  DJ Delorie  <dj@redhat.com>
  68
  69         * m32c-desc.c: Regenerate with linker relaxation attributes.
  70         * m32c-desc.h: Likewise.
  71         * m32c-dis.c: Likewise.
  72         * m32c-opc.c: Likewise.
  73
  74 2006-02-24  Paul Brook  <paul@codesourcery.com>
  75
  76         * arm-dis.c (arm_opcodes): Add V7 instructions.
  77         (thumb32_opcodes): Ditto.  Handle V7M MSR/MRS variants.
  78         (print_arm_address): New function.
  79         (print_insn_arm): Use it.  Add 'P' and 'U' cases.
  80         (psr_name): New function.
  81         (print_insn_thumb32): Add 'U', 'C' and 'D' cases.
  82
  83 2006-02-23  H.J. Lu  <hongjiu.lu@intel.com>
  84
  85         * ia64-opc-i.c (bXc): New.
  86         (mXc): Likewise.
  87         (OpX2TaTbYaXcC): Likewise.
  88         (TF). Likewise.
  89         (TFCM). Likewise.
  90         (ia64_opcodes_i): Add instructions for tf.
  91
  92         * ia64-opc.h (IMMU5b): New.
  93
  94         * ia64-asmtab.c: Regenerated.
  95
  96 2006-02-23  H.J. Lu  <hongjiu.lu@intel.com>
  97
  98         * ia64-gen.c: Update copyright years.
  99         * ia64-opc-b.c: Likewise.
 100
 101 2006-02-22  H.J. Lu  <hongjiu.lu@intel.com>
 102
 103         * ia64-gen.c (lookup_regindex): Handle ".vm".
 104         (print_dependency_table): Handle '\"'.
 105
 106         * ia64-ic.tbl: Updated from SDM 2.2.
 107         * ia64-raw.tbl: Likewise.
 108         * ia64-waw.tbl: Likewise.
 109         * ia64-asmtab.c: Regenerated.
 110
 111         * ia64-opc-b.c (ia64_opcodes_b): Add vmsw.0 and vmsw.1.
 112
 113 2006-02-17  Shrirang Khisti  <shrirangk@kpitcummins.com>
 114             Anil Paranjape   <anilp1@kpitcummins.com>
 115             Shilin Shakti    <shilins@kpitcummins.com>
 116
 117         * xc16x-desc.h: New file
 118         * xc16x-desc.c: New file
 119         * xc16x-opc.h: New file
 120         * xc16x-opc.c: New file
 121         * xc16x-ibld.c: New file
 122         * xc16x-asm.c: New file
 123         * xc16x-dis.c: New file
 124         * Makefile.am: Entries for xc16x
 125         * Makefile.in: Regenerate
 126         * cofigure.in: Add xc16x target information.
 127         * configure: Regenerate.
 128         * disassemble.c: Add xc16x target information.
 129
 130 2006-02-11  H.J. Lu  <hongjiu.lu@intel.com>
 131
 132         * i386-dis.c (dis386_twobyte): Use "movZ" for debug register
 133         moves.
 134
 135 2006-02-11  H.J. Lu  <hongjiu.lu@intel.com>
 136
 137         * i386-dis.c ('Z'): Add a new macro.
 138         (dis386_twobyte): Use "movZ" for control register moves.
 139
 140 2006-02-10  Nick Clifton  <nickc@redhat.com>
 141
 142         * iq2000-asm.c: Regenerate.
 143
 144 2006-02-07  Nathan Sidwell  <nathan@codesourcery.com>
 145
 146         * m68k-dis.c (print_insn_m68k): Use bfd_m68k_mach_to_features.
 147
 148 2006-01-26  David Ung  <davidu@mips.com>
 149
 150         * mips-opc.c: Add I33 masks to these MIPS32R2 instructions: prefx,
 151         ceil.l.d, ceil.l.s, cvt.d.l, cvt.l.d, cvt.l.s, cvt.s.l, floor.l.d,
 152         floor.l.s, ldxc1, lwxc1, madd.d, madd.s, msub.d, msub.s, nmadd.d,
 153         nmadd.s, nmsub.d, nmsub.s, recip.d, recip.s, round.l.d, rsqrt.d,
 154         rsqrt.s, sdxc1, swxc1, trunc.l.d, trunc.l.s.
 155
 156 2006-01-18  Arnold Metselaar  <arnoldm@sourceware.org>
 157
 158         * z80-dis.c (struct buffer, prt_d, prt_d_n, arit_d, ld_r_d,
 159         ld_d_r, pref_xd_cb): Use signed char to hold data to be
 160         disassembled.
 161         * z80-dis.c (TXTSIZ): Increase buffer size to 24, this fixes
 162         buffer overflows when disassembling instructions like
 163         ld (ix+123),0x23
 164         * z80-dis.c (opc_ind, pref_xd_cb): Suppress '+' in an indexed
 165         operand, if the offset is negative.
 166
 167 2006-01-17  Arnold Metselaar  <arnoldm@sourceware.org>
 168
 169         * z80-dis.c (struct buffer, prt_d, prt_d_n, pref_xd_cb): Use
 170         unsigned char to hold data to be disassembled.
 171
 172 2006-01-17  Andreas Schwab  <schwab@suse.de>
 173
 174         PR binutils/1486
 175         * disassemble.c (disassemble_init_for_target): Set
 176         disassembler_needs_relocs for bfd_arch_arm.
 177
 178 2006-01-16  Paul Brook  <paul@codesourcery.com>
 179
 180         * m68k-opc.c (m68k_opcodes): Fix opcodes for ColdFire f?abss,
 181         f?add?, and f?sub? instructions.
 182
 183 2006-01-16  Nick Clifton  <nickc@redhat.com>
 184
 185         * po/zh_CN.po: New Chinese (simplified) translation.
 186         * configure.in (ALL_LINGUAS): Add "zh_CH".
 187         * configure: Regenerate.
 188
 189 2006-01-05  Paul Brook  <paul@codesourcery.com>
 190
 191         * m68k-opc.c (m68k_opcodes): Add missing ColdFire fdsqrtd entry.
 192
 193 2006-01-06  DJ Delorie  <dj@redhat.com>
 194
 195         * m32c-desc.c: Regenerate.
 196         * m32c-opc.c: Regenerate.
 197         * m32c-opc.h: Regenerate.
 198
 199 2006-01-03  DJ Delorie  <dj@redhat.com>
 200
 201         * cgen-ibld.in (extract_normal): Avoid memory range errors.
 202         * m32c-ibld.c: Regenerated.
 203
 204 For older changes see ChangeLog-2005
 205 \f
 206 Local Variables:
 207 mode: change-log
 208 left-margin: 8
 209 fill-column: 74
 210 version-control: never
 211 End: