1 2020-08-10 Przemyslaw Wirkus <przemyslaw.wirkus@arm.com>
3 * aarch64-opc.c (aarch64_print_operand):
4 (aarch64_sys_reg_deprecated_p): Functions paramaters changed.
5 (aarch64_sys_reg_supported_p): Function removed.
6 (aarch64_sys_ins_reg_supported_p): Functions paramaters changed.
7 (aarch64_sys_ins_reg_supported_p): Merged aarch64_sys_reg_supported_p
10 2020-08-10 Alan Modra <amodra@gmail.com>
12 * ppc-opc.c (powerpc_opcodes): Add many mtspr and mfspr extended
15 2020-08-10 Alan Modra <amodra@gmail.com>
17 * ppc-opc.c (powerpc_opcodes): Add exser, msgsndu, msgclru.
18 Enable icbt for power5, miso for power8.
20 2020-08-10 Alan Modra <amodra@gmail.com>
22 * ppc-opc.c (powerpc_opcodes): Prioritise mtfprd and mtvrd over
23 mtvsrd, and similarly for mfvsrd.
25 2020-08-04 Christian Groessler <chris@groessler.org>
26 Tadashi G. Takaoka <tadashi.g.takaoka@gmail.com>
28 * z8kgen.c (opt): Fix "sout imm16,rs" and "soutb imm16,rbs"
29 opcodes (special "out" to absolute address).
30 * z8k-opc.h: Regenerate.
32 2020-07-30 H.J. Lu <hongjiu.lu@intel.com>
35 * i386-opc.h (Prefix_Disp8): New.
36 (Prefix_Disp16): Likewise.
37 (Prefix_Disp32): Likewise.
38 (Prefix_Load): Likewise.
39 (Prefix_Store): Likewise.
40 (Prefix_VEX): Likewise.
41 (Prefix_VEX3): Likewise.
42 (Prefix_EVEX): Likewise.
43 (Prefix_REX): Likewise.
44 (Prefix_NoOptimize): Likewise.
45 * i386-opc.tbl: Use Prefix_XXX on pseudo prefixes. Add {disp16}.
46 * i386-tbl.h: Regenerated.
48 2020-07-29 Andreas Arnez <arnez@linux.ibm.com>
50 * s390-mkopc.c (insertExpandedMnemonic): Handle unreachable
51 default case with abort() instead of printing an error message and
52 continuing, to avoid a maybe-uninitialized warning.
54 2020-07-24 Nick Clifton <nickc@redhat.com>
56 * po/de.po: Updated German translation.
58 2020-07-21 Jan Beulich <jbeulich@suse.com>
60 * i386-dis.c (OP_E_memory): Revert previous change.
62 2020-07-15 H.J. Lu <hongjiu.lu@intel.com>
65 * i386-dis.c (OP_E_memory): Don't display eiz with no scale
66 without base nor index registers.
68 2020-07-15 Jan Beulich <jbeulich@suse.com>
70 * i386-dis.c (putop): Move 'V' and 'W' handling.
72 2020-07-15 Jan Beulich <jbeulich@suse.com>
74 * i386-dis.c (dis386): Adjust 'V' description. Use P-based
75 construct for push/pop of register.
76 (putop): Honor cond when handling 'P'. Drop handling of plain
79 2020-07-15 Jan Beulich <jbeulich@suse.com>
81 * i386-dis.c (dis386): Adjust 'P', 'T', 'U', and '@'
82 description. Drop '&' description. Use P for push of immediate,
83 pushf/popf, enter, and leave. Use %LP for lret/retf.
84 (dis386_twobyte): Use P for push/pop of fs/gs.
85 (reg_table): Use P for push/pop. Use @ for near call/jmp.
86 (x86_64_table): Use P for far call/jmp.
87 (putop): Drop handling of 'U' and '&'. Move and adjust handling
88 of '@'. Adjust handling of 'P' and 'T'. Drop case_P and case_Q
90 (OP_J): Drop marking of REX_W as used for v_mode (ISA-dependent)
91 and dqw_mode (unconditional).
93 2020-07-14 H.J. Lu <hongjiu.lu@intel.com>
96 * i386-dis.c (OP_E_memory): Without base nor index registers,
97 32-bit displacement to 64 bits.
99 2020-07-14 Claudiu Zissulescu <claziss@gmail.com>
101 * arc-dis.c (print_insn_arc): Detect and emit a warning when a
102 faulty double register pair is detected.
104 2020-07-14 Jan Beulich <jbeulich@suse.com>
106 * i386-dis.c (OP_D): Print dr<N> instead of db<N> in Intel mode.
108 2020-07-14 Jan Beulich <jbeulich@suse.com>
110 * i386-dis.c (OP_R, Rm): Delete.
111 (MOD_0F24, MOD_0F26): Rename to ...
112 (X86_64_0F24, X86_64_0F26): ... respectively.
113 (dis386): Update 'L' and 'Z' comments.
114 (dis386_twobyte): Replace Rm by Em. Change opcode 0F24 and 0F26
116 (mod_table): Move opcode 0F24 and 0F26 entries ...
117 (x86_64_table): ... here.
118 (putop): Drop handling of 'L'. Set modrm.mod to 3 for 'Z'. Move
121 2020-07-14 Jan Beulich <jbeulich@suse.com>
123 * i386-dis.c (Rd, Rdq, MaskR): Delete.
124 (MOD_EVEX_0F3828_P_1, MOD_EVEX_0F382A_P_1_W_1,
125 MOD_EVEX_0F3838_P_1, MOD_EVEX_0F383A_P_1_W_0,
126 MOD_EVEX_0F387A_W_0, MOD_EVEX_0F387B_W_0,
127 MOD_EVEX_0F387C): New enumerators.
128 (reg_table): Use Edq for rdssp.
129 (prefix_table): Use Edq for incssp.
130 (mod_table): Use Rm for move to/from %tr. Use MaskE for kand*,
131 kandn*, knot*, kor*, kxnor*, kxor*, kadd*, kunpck*, kortest*,
132 ktest*, and kshift*. Use Edq / MaskE for kmov*.
133 * i386-dis-evex.h: Reference mod_table[] for opcode 0F387C.
134 * i386-dis-evex-mod.h: New entries for opcodes 0F3828, 0F382A,
135 0F3838, 0F383A, 0F387A, 0F387B, and 0F387C.
136 * i386-dis-evex-prefix.h: Reference mod_table[] for opcodes
137 0F3828_P_1 and 0F3838_P_1.
138 * i386-dis-evex-w.h: Reference mod_table[] for opcodes
139 0F382A_P_1, 0F383A_P_1, 0F387A, and 0F387B.
141 2020-07-14 Jan Beulich <jbeulich@suse.com>
143 * i386-dis.c (PREFIX_0F01_REG_7_MOD_3_RM_3,
144 PREFIX_0FAE_REG_5_MOD_0, PREFIX_0FC3_MOD_0, PREFIX_0F38C8,
145 PREFIX_0F38C9, PREFIX_0F38CA, PREFIX_0F38CB, PREFIX_0F38CC,
146 PREFIX_0F38CD, PREFIX_0F38F9, PREFIX_0F3ACC, PREFIX_VEX_0F77,
147 PREFIX_VEX_0F38F2, PREFIX_VEX_0F38F3_REG_1,
148 PREFIX_VEX_0F38F3_REG_2, PREFIX_VEX_0F38F3_REG_3): Delete.
149 (MOD_0F38F9_PREFIX_0, VEX_LEN_0F77_P_0, VEX_LEN_0F38F2_P_0,
150 VEX_LEN_0F38F3_R_1_P_0, VEX_LEN_0F38F3_R_2_P_0,
151 VEX_LEN_0F38F3_R_3_P_0): Rename to ...
152 (MOD_0F38F9, VEX_LEN_0F77, VEX_LEN_0F38F2, VEX_LEN_0F38F3_R_1,
153 VEX_LEN_0F38F3_R_2, VEX_LEN_0F38F3_R_3): ... these respectively.
154 (reg_table, prefix_table, three_byte_table, vex_table,
155 vex_len_table, mod_table, rm_table): Replace / remove respective
157 (intel_operand_size, OP_E_register, OP_G): Avoid undue setting
158 of PREFIX_DATA in used_prefixes.
160 2020-07-14 Jan Beulich <jbeulich@suse.com>
162 * i386-dis.c (MOD_VEX_0F3A30_L_0_W_0, MOD_VEX_0F3A30_L_0_W_1,
163 MOD_VEX_0F3A31_L_0_W_0, MOD_VEX_0F3A31_L_0_W_1,
164 MOD_VEX_0F3A32_L_0_W_0, MOD_VEX_0F3A32_L_0_W_1,
165 MOD_VEX_0F3A33_L_0_W_0, MOD_VEX_0F3A33_L_0_W_1): Replace by ...
166 (MOD_VEX_0F3A30_L_0, MOD_VEX_0F3A31_L_0,
167 MOD_VEX_0F3A32_L_0, MOD_VEX_0F3A33_L_0): ... these.
168 (VEX_W_0F3A30_L_0, VEX_W_0F3A31_L_0, VEX_W_0F3A32_L_0,
169 VEX_W_0F3A33_L_0): Delete.
170 (dis386): Adjust "BW" description.
171 (vex_len_table): Refer to mod_table[] for opcodes 0F3A30,
172 0F3A31, 0F3A32, and 0F3A33.
173 (vex_w_table): Delete opcode 0F3A30, 0F3A31, 0F3A32, and 0F3A33
175 (mod_table): Replace opcode 0F3A30, 0F3A31, 0F3A32, and 0F3A33
178 2020-07-14 Jan Beulich <jbeulich@suse.com>
180 * i386-dis.c (PREFIX_0F6C, PREFIX_0F6D, PREFIX_0F73_REG_3,
181 PREFIX_0F73_REG_7, PREFIX_0F3810, PREFIX_0F3814, PREFIX_0F3815,
182 PREFIX_0F3817, PREFIX_0F3820, PREFIX_0F3821, PREFIX_0F3822,
183 PREFIX_0F3823, PREFIX_0F3824, PREFIX_0F3825, PREFIX_0F3828,
184 PREFIX_0F3829, PREFIX_0F382A, PREFIX_0F382B, PREFIX_0F3830,
185 PREFIX_0F3831, PREFIX_0F3832, PREFIX_0F3833, PREFIX_0F3834,
186 PREFIX_0F3835, PREFIX_0F3837, PREFIX_0F3838, PREFIX_0F3839,
187 PREFIX_0F383A, PREFIX_0F383B, PREFIX_0F383C, PREFIX_0F383D,
188 PREFIX_0F383E, PREFIX_0F383F, PREFIX_0F3840, PREFIX_0F3841,
189 PREFIX_0F3880, PREFIX_0F3881, PREFIX_0F3882, PREFIX_0F38CF,
190 PREFIX_0F38DB, PREFIX_0F38DC, PREFIX_0F38DD, PREFIX_0F38DE,
191 PREFIX_0F38DF, PREFIX_0F38F5, PREFIX_0F3A08, PREFIX_0F3A09,
192 PREFIX_0F3A0A, PREFIX_0F3A0B, PREFIX_0F3A0C, PREFIX_0F3A0D,
193 PREFIX_0F3A0E, PREFIX_0F3A14, PREFIX_0F3A15, PREFIX_0F3A16,
194 PREFIX_0F3A17, PREFIX_0F3A20, PREFIX_0F3A21, PREFIX_0F3A22,
195 PREFIX_0F3A40, PREFIX_0F3A41, PREFIX_0F3A42, PREFIX_0F3A44,
196 PREFIX_0F3A60, PREFIX_0F3A61, PREFIX_0F3A62, PREFIX_0F3A63,
197 PREFIX_0F3ACE, PREFIX_0F3ACF, PREFIX_0F3ADF, PREFIX_VEX_0F60,
198 PREFIX_VEX_0F61, PREFIX_VEX_0F62, PREFIX_VEX_0F63,
199 PREFIX_VEX_0F64, PREFIX_VEX_0F65, PREFIX_VEX_0F66,
200 PREFIX_VEX_0F67, PREFIX_VEX_0F68, PREFIX_VEX_0F69,
201 PREFIX_VEX_0F6A, PREFIX_VEX_0F6B, PREFIX_VEX_0F6C,
202 PREFIX_VEX_0F6D, PREFIX_VEX_0F6E, PREFIX_VEX_0F71_REG_2,
203 PREFIX_VEX_0F71_REG_4, PREFIX_VEX_0F71_REG_6,
204 PREFIX_VEX_0F72_REG_2, PREFIX_VEX_0F72_REG_4,
205 PREFIX_VEX_0F72_REG_6, PREFIX_VEX_0F73_REG_2,
206 PREFIX_VEX_0F73_REG_3, PREFIX_VEX_0F73_REG_6,
207 PREFIX_VEX_0F73_REG_7, PREFIX_VEX_0F74,
208 PREFIX_VEX_0F75, PREFIX_VEX_0F76, PREFIX_VEX_0FC4,
209 PREFIX_VEX_0FC5, PREFIX_VEX_0FD1, PREFIX_VEX_0FD2,
210 PREFIX_VEX_0FD3, PREFIX_VEX_0FD4, PREFIX_VEX_0FD5,
211 PREFIX_VEX_0FD6, PREFIX_VEX_0FD7, PREFIX_VEX_0FD8,
212 PREFIX_VEX_0FD9, PREFIX_VEX_0FDA, PREFIX_VEX_0FDB,
213 PREFIX_VEX_0FDC, PREFIX_VEX_0FDD, PREFIX_VEX_0FDE,
214 PREFIX_VEX_0FDF, PREFIX_VEX_0FE0, PREFIX_VEX_0FE1,
215 PREFIX_VEX_0FE2, PREFIX_VEX_0FE3, PREFIX_VEX_0FE4,
216 PREFIX_VEX_0FE5, PREFIX_VEX_0FE7, PREFIX_VEX_0FE8,
217 PREFIX_VEX_0FE9, PREFIX_VEX_0FEA, PREFIX_VEX_0FEB,
218 PREFIX_VEX_0FEC, PREFIX_VEX_0FED, PREFIX_VEX_0FEE,
219 PREFIX_VEX_0FEF, PREFIX_VEX_0FF1, PREFIX_VEX_0FF2,
220 PREFIX_VEX_0FF3, PREFIX_VEX_0FF4, PREFIX_VEX_0FF5,
221 PREFIX_VEX_0FF6, PREFIX_VEX_0FF7, PREFIX_VEX_0FF8,
222 PREFIX_VEX_0FF9, PREFIX_VEX_0FFA, PREFIX_VEX_0FFB,
223 PREFIX_VEX_0FFC, PREFIX_VEX_0FFD, PREFIX_VEX_0FFE,
224 PREFIX_VEX_0F3800, PREFIX_VEX_0F3801, PREFIX_VEX_0F3802,
225 PREFIX_VEX_0F3803, PREFIX_VEX_0F3804, PREFIX_VEX_0F3805,
226 PREFIX_VEX_0F3806, PREFIX_VEX_0F3807, PREFIX_VEX_0F3808,
227 PREFIX_VEX_0F3809, PREFIX_VEX_0F380A, PREFIX_VEX_0F380B,
228 PREFIX_VEX_0F380C, PREFIX_VEX_0F380D, PREFIX_VEX_0F380E,
229 PREFIX_VEX_0F380F, PREFIX_VEX_0F3813, PREFIX_VEX_0F3816,
230 PREFIX_VEX_0F3817, PREFIX_VEX_0F3818, PREFIX_VEX_0F3819,
231 PREFIX_VEX_0F381A, PREFIX_VEX_0F381C, PREFIX_VEX_0F381D,
232 PREFIX_VEX_0F381E, PREFIX_VEX_0F3820, PREFIX_VEX_0F3821,
233 PREFIX_VEX_0F3822, PREFIX_VEX_0F3823, PREFIX_VEX_0F3824,
234 PREFIX_VEX_0F3825, PREFIX_VEX_0F3828, PREFIX_VEX_0F3829,
235 PREFIX_VEX_0F382A, PREFIX_VEX_0F382B, PREFIX_VEX_0F382C,
236 PREFIX_VEX_0F382D, PREFIX_VEX_0F382E, PREFIX_VEX_0F382F,
237 PREFIX_VEX_0F3830, PREFIX_VEX_0F3831, PREFIX_VEX_0F3832,
238 PREFIX_VEX_0F3833, PREFIX_VEX_0F3834, PREFIX_VEX_0F3835,
239 PREFIX_VEX_0F3836, PREFIX_VEX_0F3837, PREFIX_VEX_0F3838,
240 PREFIX_VEX_0F3839, PREFIX_VEX_0F383A, PREFIX_VEX_0F383B,
241 PREFIX_VEX_0F383C, PREFIX_VEX_0F383D, PREFIX_VEX_0F383E,
242 PREFIX_VEX_0F383F, PREFIX_VEX_0F3840, PREFIX_VEX_0F3841,
243 PREFIX_VEX_0F3845, PREFIX_VEX_0F3846, PREFIX_VEX_0F3847,
244 PREFIX_VEX_0F3858, PREFIX_VEX_0F3859, PREFIX_VEX_0F385A,
245 PREFIX_VEX_0F3878, PREFIX_VEX_0F3879, PREFIX_VEX_0F388C,
246 PREFIX_VEX_0F388E, PREFIX_VEX_0F3890, PREFIX_VEX_0F3891,
247 PREFIX_VEX_0F3892, PREFIX_VEX_0F3893, PREFIX_VEX_0F3896,
248 PREFIX_VEX_0F3897, PREFIX_VEX_0F3898, PREFIX_VEX_0F3899,
249 PREFIX_VEX_0F389A, PREFIX_VEX_0F389B, PREFIX_VEX_0F389C,
250 PREFIX_VEX_0F389D, PREFIX_VEX_0F389E, PREFIX_VEX_0F389F,
251 PREFIX_VEX_0F38A6, PREFIX_VEX_0F38A7, PREFIX_VEX_0F38A8,
252 PREFIX_VEX_0F38A9, PREFIX_VEX_0F38AA, PREFIX_VEX_0F38AB,
253 PREFIX_VEX_0F38AC, PREFIX_VEX_0F38AD, PREFIX_VEX_0F38AE,
254 PREFIX_VEX_0F38AF, PREFIX_VEX_0F38B6, PREFIX_VEX_0F38B7,
255 PREFIX_VEX_0F38B8, PREFIX_VEX_0F38B9, PREFIX_VEX_0F38BA,
256 PREFIX_VEX_0F38BB, PREFIX_VEX_0F38BC, PREFIX_VEX_0F38BD,
257 PREFIX_VEX_0F38BE, PREFIX_VEX_0F38BF, PREFIX_VEX_0F38CF,
258 PREFIX_VEX_0F38DB, PREFIX_VEX_0F38DC, PREFIX_VEX_0F38DD,
259 PREFIX_VEX_0F38DE, PREFIX_VEX_0F38DF, PREFIX_VEX_0F3A00,
260 PREFIX_VEX_0F3A01, PREFIX_VEX_0F3A02, PREFIX_VEX_0F3A04,
261 PREFIX_VEX_0F3A05, PREFIX_VEX_0F3A06, PREFIX_VEX_0F3A08,
262 PREFIX_VEX_0F3A09, PREFIX_VEX_0F3A0A, PREFIX_VEX_0F3A0B,
263 PREFIX_VEX_0F3A0C, PREFIX_VEX_0F3A0D, PREFIX_VEX_0F3A0E,
264 PREFIX_VEX_0F3A0F, PREFIX_VEX_0F3A14, PREFIX_VEX_0F3A15,
265 PREFIX_VEX_0F3A16, PREFIX_VEX_0F3A17, PREFIX_VEX_0F3A18,
266 PREFIX_VEX_0F3A19, PREFIX_VEX_0F3A1D, PREFIX_VEX_0F3A20,
267 PREFIX_VEX_0F3A21, PREFIX_VEX_0F3A22, PREFIX_VEX_0F3A30,
268 PREFIX_VEX_0F3A31, PREFIX_VEX_0F3A32, PREFIX_VEX_0F3A33,
269 PREFIX_VEX_0F3A38, PREFIX_VEX_0F3A39, PREFIX_VEX_0F3A40,
270 PREFIX_VEX_0F3A41, PREFIX_VEX_0F3A42, PREFIX_VEX_0F3A44,
271 PREFIX_VEX_0F3A46, PREFIX_VEX_0F3A48, PREFIX_VEX_0F3A49,
272 PREFIX_VEX_0F3A4A, PREFIX_VEX_0F3A4B, PREFIX_VEX_0F3A4C,
273 PREFIX_VEX_0F3A5C, PREFIX_VEX_0F3A5D, PREFIX_VEX_0F3A5E,
274 PREFIX_VEX_0F3A5F, PREFIX_VEX_0F3A60, PREFIX_VEX_0F3A61,
275 PREFIX_VEX_0F3A62, PREFIX_VEX_0F3A63, PREFIX_VEX_0F3A68,
276 PREFIX_VEX_0F3A69, PREFIX_VEX_0F3A6A, PREFIX_VEX_0F3A6B,
277 PREFIX_VEX_0F3A6C, PREFIX_VEX_0F3A6D, PREFIX_VEX_0F3A6E,
278 PREFIX_VEX_0F3A6F, PREFIX_VEX_0F3A78, PREFIX_VEX_0F3A79,
279 PREFIX_VEX_0F3A7A, PREFIX_VEX_0F3A7B, PREFIX_VEX_0F3A7C,
280 PREFIX_VEX_0F3A7D, PREFIX_VEX_0F3A7E, PREFIX_VEX_0F3A7F,
281 PREFIX_VEX_0F3ACE, PREFIX_VEX_0F3ACF, PREFIX_VEX_0F3ADF,
282 PREFIX_EVEX_0F64, PREFIX_EVEX_0F65, PREFIX_EVEX_0F66,
283 PREFIX_EVEX_0F6E, PREFIX_EVEX_0F71_REG_2,
284 PREFIX_EVEX_0F71_REG_4, PREFIX_EVEX_0F71_REG_6,
285 PREFIX_EVEX_0F72_REG_0, PREFIX_EVEX_0F72_REG_1,
286 PREFIX_EVEX_0F72_REG_2, PREFIX_EVEX_0F72_REG_4,
287 PREFIX_EVEX_0F72_REG_6, PREFIX_EVEX_0F73_REG_2,
288 PREFIX_EVEX_0F73_REG_3, PREFIX_EVEX_0F73_REG_6,
289 PREFIX_EVEX_0F73_REG_7, PREFIX_EVEX_0F74, PREFIX_EVEX_0F75,
290 PREFIX_EVEX_0F76, PREFIX_EVEX_0FC4, PREFIX_EVEX_0FC5,
291 PREFIX_EVEX_0FD6, PREFIX_EVEX_0FDB, PREFIX_EVEX_0FDF,
292 PREFIX_EVEX_0FE2, PREFIX_EVEX_0FE7, PREFIX_EVEX_0FEB,
293 PREFIX_EVEX_0FEF, PREFIX_EVEX_0F380D, PREFIX_EVEX_0F3816,
294 PREFIX_EVEX_0F3819, PREFIX_EVEX_0F381A, PREFIX_EVEX_0F381B,
295 PREFIX_EVEX_0F381E, PREFIX_EVEX_0F381F, PREFIX_EVEX_0F382C,
296 PREFIX_EVEX_0F382D, PREFIX_EVEX_0F3836, PREFIX_EVEX_0F3837,
297 PREFIX_EVEX_0F383B, PREFIX_EVEX_0F383D, PREFIX_EVEX_0F383F,
298 PREFIX_EVEX_0F3840, PREFIX_EVEX_0F3842, PREFIX_EVEX_0F3843,
299 PREFIX_EVEX_0F3844, PREFIX_EVEX_0F3845, PREFIX_EVEX_0F3846,
300 PREFIX_EVEX_0F3847, PREFIX_EVEX_0F384C, PREFIX_EVEX_0F384D,
301 PREFIX_EVEX_0F384E, PREFIX_EVEX_0F384F, PREFIX_EVEX_0F3850,
302 PREFIX_EVEX_0F3851, PREFIX_EVEX_0F3854, PREFIX_EVEX_0F3855,
303 PREFIX_EVEX_0F3859, PREFIX_EVEX_0F385A, PREFIX_EVEX_0F385B,
304 PREFIX_EVEX_0F3862, PREFIX_EVEX_0F3863, PREFIX_EVEX_0F3864,
305 PREFIX_EVEX_0F3865, PREFIX_EVEX_0F3866, PREFIX_EVEX_0F3870,
306 PREFIX_EVEX_0F3871, PREFIX_EVEX_0F3873, PREFIX_EVEX_0F3875,
307 PREFIX_EVEX_0F3876, PREFIX_EVEX_0F3877, PREFIX_EVEX_0F387A,
308 PREFIX_EVEX_0F387B, PREFIX_EVEX_0F387C, PREFIX_EVEX_0F387D,
309 PREFIX_EVEX_0F387E, PREFIX_EVEX_0F387F, PREFIX_EVEX_0F3883,
310 PREFIX_EVEX_0F3888, PREFIX_EVEX_0F3889, PREFIX_EVEX_0F388A,
311 PREFIX_EVEX_0F388B, PREFIX_EVEX_0F388D, PREFIX_EVEX_0F388F,
312 PREFIX_EVEX_0F3890, PREFIX_EVEX_0F3891, PREFIX_EVEX_0F3892,
313 PREFIX_EVEX_0F3893, PREFIX_EVEX_0F38A0, PREFIX_EVEX_0F38A1,
314 PREFIX_EVEX_0F38A2, PREFIX_EVEX_0F38A3, PREFIX_EVEX_0F38B4,
315 PREFIX_EVEX_0F38B5, PREFIX_EVEX_0F38C4,
316 PREFIX_EVEX_0F38C6_REG_1, PREFIX_EVEX_0F38C6_REG_2,
317 PREFIX_EVEX_0F38C6_REG_5, PREFIX_EVEX_0F38C6_REG_6,
318 PREFIX_EVEX_0F38C7_REG_1, PREFIX_EVEX_0F38C7_REG_2,
319 PREFIX_EVEX_0F38C7_REG_5, PREFIX_EVEX_0F38C7_REG_6,
320 PREFIX_EVEX_0F38C8, PREFIX_EVEX_0F38CA, PREFIX_EVEX_0F38CB,
321 PREFIX_EVEX_0F38CC, PREFIX_EVEX_0F38CD, PREFIX_EVEX_0F3A00,
322 PREFIX_EVEX_0F3A01, PREFIX_EVEX_0F3A03, PREFIX_EVEX_0F3A05,
323 PREFIX_EVEX_0F3A08, PREFIX_EVEX_0F3A09, PREFIX_EVEX_0F3A0A,
324 PREFIX_EVEX_0F3A0B, PREFIX_EVEX_0F3A14, PREFIX_EVEX_0F3A15,
325 PREFIX_EVEX_0F3A16, PREFIX_EVEX_0F3A17, PREFIX_EVEX_0F3A18,
326 PREFIX_EVEX_0F3A19, PREFIX_EVEX_0F3A1A, PREFIX_EVEX_0F3A1B,
327 PREFIX_EVEX_0F3A1E, PREFIX_EVEX_0F3A1F, PREFIX_EVEX_0F3A20,
328 PREFIX_EVEX_0F3A21, PREFIX_EVEX_0F3A22, PREFIX_EVEX_0F3A23,
329 PREFIX_EVEX_0F3A25, PREFIX_EVEX_0F3A26, PREFIX_EVEX_0F3A27,
330 PREFIX_EVEX_0F3A38, PREFIX_EVEX_0F3A39, PREFIX_EVEX_0F3A3A,
331 PREFIX_EVEX_0F3A3B, PREFIX_EVEX_0F3A3E, PREFIX_EVEX_0F3A3F,
332 PREFIX_EVEX_0F3A42, PREFIX_EVEX_0F3A43, PREFIX_EVEX_0F3A50,
333 PREFIX_EVEX_0F3A51, PREFIX_EVEX_0F3A54, PREFIX_EVEX_0F3A55,
334 PREFIX_EVEX_0F3A56, PREFIX_EVEX_0F3A57, PREFIX_EVEX_0F3A66,
335 PREFIX_EVEX_0F3A67, PREFIX_EVEX_0F3A70, PREFIX_EVEX_0F3A71,
336 PREFIX_EVEX_0F3A72, PREFIX_EVEX_0F3A73): Delete.
337 (MOD_0F382A_PREFIX_2, MOD_0F38F5_PREFIX_2,
338 MOD_VEX_0FD7_PREFIX_2, MOD_VEX_0FE7_PREFIX_2,
339 MOD_VEX_0F381A_PREFIX_2, MOD_VEX_0F382A_PREFIX_2,
340 MOD_VEX_0F382C_PREFIX_2, MOD_VEX_0F382D_PREFIX_2,
341 MOD_VEX_0F382E_PREFIX_2, MOD_VEX_0F382F_PREFIX_2,
342 MOD_VEX_0F385A_PREFIX_2, MOD_VEX_0F388C_PREFIX_2,
343 MOD_VEX_0F388E_PREFIX_2, MOD_VEX_W_0_0F3A30_P_2_LEN_0,
344 MOD_VEX_W_1_0F3A30_P_2_LEN_0, MOD_VEX_W_0_0F3A31_P_2_LEN_0,
345 MOD_VEX_W_1_0F3A31_P_2_LEN_0, MOD_VEX_W_0_0F3A32_P_2_LEN_0,
346 MOD_VEX_W_1_0F3A32_P_2_LEN_0, MOD_VEX_W_0_0F3A33_P_2_LEN_0,
347 MOD_VEX_W_1_0F3A33_P_2_LEN_0, MOD_EVEX_0F381A_P_2_W_0,
348 MOD_EVEX_0F381A_P_2_W_1, MOD_EVEX_0F381B_P_2_W_0,
349 MOD_EVEX_0F381B_P_2_W_1, MOD_EVEX_0F385A_P_2_W_0,
350 MOD_EVEX_0F385A_P_2_W_1, MOD_EVEX_0F385B_P_2_W_0,
351 MOD_EVEX_0F385B_P_2_W_1, VEX_LEN_0F6E_P_2,
352 VEX_LEN_0FC4_P_2, VEX_LEN_0FC5_P_2, VEX_LEN_0FD6_P_2,
353 VEX_LEN_0FF7_P_2, VEX_LEN_0F3816_P_2, VEX_LEN_0F3819_P_2,
354 VEX_LEN_0F381A_P_2_M_0, VEX_LEN_0F3836_P_2,
355 VEX_LEN_0F3841_P_2, VEX_LEN_0F385A_P_2_M_0,
356 VEX_LEN_0F38DB_P_2, VEX_LEN_0F3A00_P_2, VEX_LEN_0F3A01_P_2,
357 VEX_LEN_0F3A06_P_2, VEX_LEN_0F3A14_P_2, VEX_LEN_0F3A15_P_2,
358 VEX_LEN_0F3A16_P_2, VEX_LEN_0F3A17_P_2, VEX_LEN_0F3A18_P_2,
359 VEX_LEN_0F3A19_P_2, VEX_LEN_0F3A20_P_2, VEX_LEN_0F3A21_P_2,
360 VEX_LEN_0F3A22_P_2, VEX_LEN_0F3A30_P_2, VEX_LEN_0F3A31_P_2,
361 VEX_LEN_0F3A32_P_2, VEX_LEN_0F3A33_P_2, VEX_LEN_0F3A38_P_2,
362 VEX_LEN_0F3A39_P_2, VEX_LEN_0F3A41_P_2, VEX_LEN_0F3A46_P_2,
363 VEX_LEN_0F3A60_P_2, VEX_LEN_0F3A61_P_2, VEX_LEN_0F3A62_P_2,
364 VEX_LEN_0F3A63_P_2, VEX_LEN_0F3ADF_P_2, EVEX_LEN_0F6E_P_2,
365 EVEX_LEN_0FC4_P_2, EVEX_LEN_0FC5_P_2, EVEX_LEN_0FD6_P_2,
366 EVEX_LEN_0F3816_P_2, EVEX_LEN_0F3819_P_2_W_0,
367 EVEX_LEN_0F3819_P_2_W_1, EVEX_LEN_0F381A_P_2_W_0_M_0,
368 EVEX_LEN_0F381A_P_2_W_1_M_0, EVEX_LEN_0F381B_P_2_W_0_M_0,
369 EVEX_LEN_0F381B_P_2_W_1_M_0, EVEX_LEN_0F3836_P_2,
370 EVEX_LEN_0F385A_P_2_W_0_M_0, EVEX_LEN_0F385A_P_2_W_1_M_0,
371 EVEX_LEN_0F385B_P_2_W_0_M_0, EVEX_LEN_0F385B_P_2_W_1_M_0,
372 EVEX_LEN_0F38C6_REG_1_PREFIX_2, EVEX_LEN_0F38C6_REG_2_PREFIX_2,
373 EVEX_LEN_0F38C6_REG_5_PREFIX_2, EVEX_LEN_0F38C6_REG_6_PREFIX_2,
374 EVEX_LEN_0F38C7_R_1_P_2_W_0, EVEX_LEN_0F38C7_R_1_P_2_W_1,
375 EVEX_LEN_0F38C7_R_2_P_2_W_0, EVEX_LEN_0F38C7_R_2_P_2_W_1,
376 EVEX_LEN_0F38C7_R_5_P_2_W_0, EVEX_LEN_0F38C7_R_5_P_2_W_1,
377 EVEX_LEN_0F38C7_R_6_P_2_W_0, EVEX_LEN_0F38C7_R_6_P_2_W_1,
378 EVEX_LEN_0F3A00_P_2_W_1, EVEX_LEN_0F3A01_P_2_W_1,
379 EVEX_LEN_0F3A14_P_2, EVEX_LEN_0F3A15_P_2, EVEX_LEN_0F3A16_P_2,
380 EVEX_LEN_0F3A17_P_2, EVEX_LEN_0F3A18_P_2_W_0,
381 EVEX_LEN_0F3A18_P_2_W_1, EVEX_LEN_0F3A19_P_2_W_0,
382 EVEX_LEN_0F3A19_P_2_W_1, EVEX_LEN_0F3A1A_P_2_W_0,
383 EVEX_LEN_0F3A1A_P_2_W_1, EVEX_LEN_0F3A1B_P_2_W_0,
384 EVEX_LEN_0F3A1B_P_2_W_1, EVEX_LEN_0F3A20_P_2,
385 EVEX_LEN_0F3A21_P_2_W_0, EVEX_LEN_0F3A22_P_2,
386 EVEX_LEN_0F3A23_P_2_W_0, EVEX_LEN_0F3A23_P_2_W_1,
387 EVEX_LEN_0F3A38_P_2_W_0, EVEX_LEN_0F3A38_P_2_W_1,
388 EVEX_LEN_0F3A39_P_2_W_0, EVEX_LEN_0F3A39_P_2_W_1,
389 EVEX_LEN_0F3A3A_P_2_W_0, EVEX_LEN_0F3A3A_P_2_W_1,
390 EVEX_LEN_0F3A3B_P_2_W_0, EVEX_LEN_0F3A3B_P_2_W_1,
391 EVEX_LEN_0F3A43_P_2_W_0, EVEX_LEN_0F3A43_P_2_W_1
392 VEX_W_0F380C_P_2, VEX_W_0F380D_P_2, VEX_W_0F380E_P_2,
393 VEX_W_0F380F_P_2, VEX_W_0F3813_P_2, VEX_W_0F3816_P_2,
394 VEX_W_0F3818_P_2, VEX_W_0F3819_P_2,
395 VEX_W_0F381A_P_2_M_0_L_0, VEX_W_0F382C_P_2_M_0,
396 VEX_W_0F382D_P_2_M_0, VEX_W_0F382E_P_2_M_0,
397 VEX_W_0F382F_P_2_M_0, VEX_W_0F3836_P_2,
398 VEX_W_0F3846_P_2, VEX_W_0F3858_P_2, VEX_W_0F3859_P_2,
399 VEX_W_0F385A_P_2_M_0_L_0, VEX_W_0F3878_P_2,
400 VEX_W_0F3879_P_2, VEX_W_0F38CF_P_2, VEX_W_0F3A00_P_2,
401 VEX_W_0F3A01_P_2, VEX_W_0F3A02_P_2, VEX_W_0F3A04_P_2,
402 VEX_W_0F3A05_P_2, VEX_W_0F3A06_P_2_L_0,
403 VEX_W_0F3A18_P_2_L_0, VEX_W_0F3A19_P_2_L_0,
404 VEX_W_0F3A1D_P_2, VEX_W_0F3A30_P_2_LEN_0,
405 VEX_W_0F3A31_P_2_LEN_0, VEX_W_0F3A32_P_2_LEN_0,
406 VEX_W_0F3A33_P_2_LEN_0, VEX_W_0F3A38_P_2_L_0,
407 VEX_W_0F3A39_P_2_L_0, VEX_W_0F3A46_P_2_L_0,
408 VEX_W_0F3A4A_P_2, VEX_W_0F3A4B_P_2, VEX_W_0F3A4C_P_2,
409 VEX_W_0F3ACE_P_2, VEX_W_0F3ACF_P_2, EVEX_W_0F66_P_2,
410 EVEX_W_0F72_R_2_P_2, EVEX_W_0F72_R_6_P_2,
411 EVEX_W_0F73_R_2_P_2, EVEX_W_0F73_R_6_P_2,
412 EVEX_W_0F76_P_2, EVEX_W_0FD6_P_2, EVEX_W_0FE7_P_2,
413 EVEX_W_0F380D_P_2, EVEX_W_0F3819_P_2,
414 EVEX_W_0F381A_P_2, EVEX_W_0F381B_P_2,
415 EVEX_W_0F381E_P_2, EVEX_W_0F381F_P_2,
416 EVEX_W_0F3837_P_2, EVEX_W_0F3859_P_2,
417 EVEX_W_0F385A_P_2, EVEX_W_0F385B_P_2,
418 EVEX_W_0F3870_P_2, EVEX_W_0F387A_P_2,
419 EVEX_W_0F387B_P_2, EVEX_W_0F3883_P_2,
420 EVEX_W_0F3891_P_2, EVEX_W_0F3893_P_2,
421 EVEX_W_0F38A1_P_2, EVEX_W_0F38A3_P_2,
422 EVEX_W_0F38C7_R_1_P_2, EVEX_W_0F38C7_R_2_P_2,
423 EVEX_W_0F38C7_R_5_P_2, EVEX_W_0F38C7_R_6_P_2,
424 EVEX_W_0F3A00_P_2, EVEX_W_0F3A01_P_2,
425 EVEX_W_0F3A05_P_2, EVEX_W_0F3A08_P_2,
426 EVEX_W_0F3A09_P_2, EVEX_W_0F3A0A_P_2,
427 EVEX_W_0F3A0B_P_2, EVEX_W_0F3A18_P_2,
428 EVEX_W_0F3A19_P_2, EVEX_W_0F3A1A_P_2,
429 EVEX_W_0F3A1B_P_2, EVEX_W_0F3A21_P_2,
430 EVEX_W_0F3A23_P_2, EVEX_W_0F3A38_P_2,
431 EVEX_W_0F3A39_P_2, EVEX_W_0F3A3A_P_2,
432 EVEX_W_0F3A3B_P_2, EVEX_W_0F3A42_P_2,
433 EVEX_W_0F3A43_P_2, EVEX_W_0F3A70_P_2,
434 EVEX_W_0F3A72_P_2): Rename to ...
435 (MOD_0F382A, MOD_0F38F5, MOD_VEX_0FD7, MOD_VEX_0FE7,
436 MOD_VEX_0F381A, MOD_VEX_0F382A, MOD_VEX_0F382C, MOD_VEX_0F382D,
437 MOD_VEX_0F382E, MOD_VEX_0F382F, MOD_VEX_0F385A, MOD_VEX_0F388C,
438 MOD_VEX_0F388E, MOD_VEX_0F3A30_L_0_W_0,
439 MOD_VEX_0F3A30_L_0_W_1, MOD_VEX_0F3A31_L_0_W_0,
440 MOD_VEX_0F3A31_L_0_W_1, MOD_VEX_0F3A32_L_0_W_0,
441 MOD_VEX_0F3A32_L_0_W_1, MOD_VEX_0F3A33_L_0_W_0,
442 MOD_VEX_0F3A33_L_0_W_1, MOD_EVEX_0F381A_W_0,
443 MOD_EVEX_0F381A_W_1, MOD_EVEX_0F381B_W_0, MOD_EVEX_0F381B_W_1,
444 MOD_EVEX_0F385A_W_0, MOD_EVEX_0F385A_W_1, MOD_EVEX_0F385B_W_0,
445 MOD_EVEX_0F385B_W_1, VEX_LEN_0F6E, VEX_LEN_0FC4, VEX_LEN_0FC5,
446 VEX_LEN_0FD6, VEX_LEN_0FF7, VEX_LEN_0F3816, VEX_LEN_0F3819,
447 VEX_LEN_0F381A_M_0, VEX_LEN_0F3836, VEX_LEN_0F3841,
448 VEX_LEN_0F385A_M_0, VEX_LEN_0F38DB, VEX_LEN_0F3A00,
449 VEX_LEN_0F3A01, VEX_LEN_0F3A06, VEX_LEN_0F3A14, VEX_LEN_0F3A15,
450 VEX_LEN_0F3A16, VEX_LEN_0F3A17, VEX_LEN_0F3A18, VEX_LEN_0F3A19,
451 VEX_LEN_0F3A20, VEX_LEN_0F3A21, VEX_LEN_0F3A22, VEX_LEN_0F3A30,
452 VEX_LEN_0F3A31, VEX_LEN_0F3A32, VEX_LEN_0F3A33, VEX_LEN_0F3A38,
453 VEX_LEN_0F3A39, VEX_LEN_0F3A41, VEX_LEN_0F3A46, VEX_LEN_0F3A60,
454 VEX_LEN_0F3A61, VEX_LEN_0F3A62, VEX_LEN_0F3A63, VEX_LEN_0F3ADF,
455 EVEX_LEN_0F6E, EVEX_LEN_0FC4, EVEX_LEN_0FC5, EVEX_LEN_0FD6,
456 EVEX_LEN_0F3816, EVEX_LEN_0F3819_W_0, EVEX_LEN_0F3819_W_1,
457 EVEX_LEN_0F381A_W_0_M_0, EVEX_LEN_0F381A_W_1_M_0,
458 EVEX_LEN_0F381B_W_0_M_0, EVEX_LEN_0F381B_W_1_M_0,
459 EVEX_LEN_0F3836, EVEX_LEN_0F385A_W_0_M_0,
460 EVEX_LEN_0F385A_W_1_M_0, EVEX_LEN_0F385B_W_0_M_0,
461 EVEX_LEN_0F385B_W_1_M_0, EVEX_LEN_0F38C6_R_1_M_0,
462 EVEX_LEN_0F38C6_R_2_M_0, EVEX_LEN_0F38C6_R_5_M_0,
463 EVEX_LEN_0F38C6_R_6_M_0, EVEX_LEN_0F38C7_R_1_M_0_W_0,
464 EVEX_LEN_0F38C7_R_1_M_0_W_1, EVEX_LEN_0F38C7_R_2_M_0_W_0,
465 EVEX_LEN_0F38C7_R_2_M_0_W_1, EVEX_LEN_0F38C7_R_5_M_0_W_0,
466 EVEX_LEN_0F38C7_R_5_M_0_W_1, EVEX_LEN_0F38C7_R_6_M_0_W_0,
467 EVEX_LEN_0F38C7_R_6_M_0_W_1, EVEX_LEN_0F3A00_W_1,
468 EVEX_LEN_0F3A01_W_1, EVEX_LEN_0F3A14, EVEX_LEN_0F3A15,
469 EVEX_LEN_0F3A16, EVEX_LEN_0F3A17, EVEX_LEN_0F3A18_W_0,
470 EVEX_LEN_0F3A18_W_1, EVEX_LEN_0F3A19_W_0,
471 EVEX_LEN_0F3A19_W_1, EVEX_LEN_0F3A1A_W_0,
472 EVEX_LEN_0F3A1A_W_1, EVEX_LEN_0F3A1B_W_0,
473 EVEX_LEN_0F3A1B_W_1, EVEX_LEN_0F3A20, EVEX_LEN_0F3A21_W_0,
474 EVEX_LEN_0F3A22, EVEX_LEN_0F3A23_W_0, EVEX_LEN_0F3A23_W_1,
475 EVEX_LEN_0F3A38_W_0, EVEX_LEN_0F3A38_W_1,
476 EVEX_LEN_0F3A39_W_0, EVEX_LEN_0F3A39_W_1,
477 EVEX_LEN_0F3A3A_W_0, EVEX_LEN_0F3A3A_W_1,
478 EVEX_LEN_0F3A3B_W_0, EVEX_LEN_0F3A3B_W_1,
479 EVEX_LEN_0F3A43_W_0, EVEX_LEN_0F3A43_W_1
480 VEX_W_0F380C, VEX_W_0F380D, VEX_W_0F380E, VEX_W_0F380F,
481 VEX_W_0F3813, VEX_W_0F3816_L_1, VEX_W_0F3818,
482 VEX_W_0F3819_L_1, VEX_W_0F381A_M_0_L_1, VEX_W_0F382C_M_0,
483 VEX_W_0F382D_M_0, VEX_W_0F382E_M_0, VEX_W_0F382F_M_0,
484 VEX_W_0F3836, VEX_W_0F3846, VEX_W_0F3858, VEX_W_0F3859,
485 VEX_W_0F385A_M_0_L_0, VEX_W_0F3878, VEX_W_0F3879,
486 VEX_W_0F38CF, VEX_W_0F3A00_L_1, VEX_W_0F3A01_L_1,
487 VEX_W_0F3A02, VEX_W_0F3A04, VEX_W_0F3A05, VEX_W_0F3A06_L_1,
488 VEX_W_0F3A18_L_1, VEX_W_0F3A19_L_1, VEX_W_0F3A1D,
489 VEX_W_0F3A30_L_0, VEX_W_0F3A31_L_0, VEX_W_0F3A32_L_0,
490 VEX_W_0F3A33_L_0, VEX_W_0F3A38_L_1, VEX_W_0F3A39_L_1,
491 VEX_W_0F3A46_L_1, VEX_W_0F3A4A, VEX_W_0F3A4B, VEX_W_0F3A4C,
492 VEX_W_0F3ACE, VEX_W_0F3ACF, EVEX_W_0F66, EVEX_W_0F72_R_2,
493 EVEX_W_0F72_R_6, EVEX_W_0F73_R_2, EVEX_W_0F73_R_6,
494 EVEX_W_0F76, EVEX_W_0FD6_L_0, EVEX_W_0FE7, EVEX_W_0F380D,
495 EVEX_W_0F3819, EVEX_W_0F381A, EVEX_W_0F381B, EVEX_W_0F381E,
496 EVEX_W_0F381F, EVEX_W_0F3837, EVEX_W_0F3859, EVEX_W_0F385A,
497 EVEX_W_0F385B, EVEX_W_0F3870, EVEX_W_0F387A, EVEX_W_0F387B,
498 EVEX_W_0F3883, EVEX_W_0F3891, EVEX_W_0F3893, EVEX_W_0F38A1,
499 EVEX_W_0F38A3, EVEX_W_0F38C7_R_1_M_0,
500 EVEX_W_0F38C7_R_2_M_0, EVEX_W_0F38C7_R_5_M_0,
501 EVEX_W_0F38C7_R_6_M_0, EVEX_W_0F3A00, EVEX_W_0F3A01,
502 EVEX_W_0F3A05, EVEX_W_0F3A08, EVEX_W_0F3A09, EVEX_W_0F3A0A,
503 EVEX_W_0F3A0B, EVEX_W_0F3A18, EVEX_W_0F3A19, EVEX_W_0F3A1A,
504 EVEX_W_0F3A1B, EVEX_W_0F3A21, EVEX_W_0F3A23, EVEX_W_0F3A38,
505 EVEX_W_0F3A39, EVEX_W_0F3A3A, EVEX_W_0F3A3B, EVEX_W_0F3A42,
506 EVEX_W_0F3A43, EVEX_W_0F3A70, EVEX_W_0F3A72): ... these
508 (dis386_twobyte, three_byte_table, vex_table, vex_len_table,
509 vex_w_table, mod_table): Replace / remove respective entries.
510 (print_insn): Move up dp->prefix_requirement handling. Handle
512 * i386-dis-evex.h, i386-dis-evex-len.h, i386-dis-evex-mod.h,
513 i386-dis-evex-prefix.h, i386-dis-evex-reg.h, i386-dis-evex-w.h:
514 Replace / remove respective entries.
516 2020-07-14 Jan Beulich <jbeulich@suse.com>
518 * i386-dis.c (PREFIX_EVEX_0F2C, PREFIX_EVEX_0F2D,
519 PREFIX_EVEX_0F2E, PREFIX_EVEX_0F2F): Delete.
520 (prefix_table): Add EXxEVexS operand to vcvttss2si, vcvttsd2si,
521 vcvtss2si, vcvtsd2si, vucomiss, and vucomisd table entries.
522 Retain X macro and PREFIX_OPCODE use from tjhe EVEX table for
524 * i386-dis-evex.h (evex_table): Reference VEX table for opcodes
525 0F2C, 0F2D, 0F2E, and 0F2F.
526 * i386-dis-evex-prefix.h: Delete opcode 0F2C, 0F2D, 0F2E, and
529 2020-07-14 Jan Beulich <jbeulich@suse.com>
531 * i386-dis.c (OP_VexR, VexScalarR): New.
532 (OP_EX_Vex, OP_XMM_Vex, EXdVexScalarS, EXqVexScalarS,
533 XMVexScalar, d_scalar_swap_mode, q_scalar_swap_mode,
534 need_vex_reg): Delete.
535 (prefix_table): Replace VexScalar by VexScalarR and
536 XMVexScalar by XMScalar for vmovss and vmovsd. Replace
537 EXdVexScalarS by EXdS and EXqVexScalarS by EXqS.
538 (vex_len_table): Replace EXqVexScalarS by EXqS.
539 (get_valid_dis386): Don't set need_vex_reg.
540 (print_insn): Don't initialize need_vex_reg.
541 (intel_operand_size, OP_E_memory): Drop d_scalar_swap_mode and
542 q_scalar_swap_mode cases.
543 (OP_EX): Don't check for d_scalar_swap_mode and
545 (OP_VEX): Done check need_vex_reg.
546 * i386-dis-evex-w.h: Replace VexScalar by VexScalarR and
547 XMVexScalar by XMScalar for vmovss and vmovsd. Replace
548 EXdVexScalarS by EXdS and EXqVexScalarS by EXqS.
550 2020-07-14 Jan Beulich <jbeulich@suse.com>
552 * i386-dis.c (Vex128, Vex256, vex128_mode, vex256_mode): Delete.
553 (VEX_W_0F381A_P_2_M_0, VEX_W_0F385A_P_2_M_0, VEX_W_0F3A06_P_2,
554 VEX_W_0F3A18_P_2, VEX_W_0F3A19_P_2, VEX_W_0F3A38_P_2,
555 VEX_W_0F3A39_P_2, VEX_W_0F3A46_P_2): Rename to ...
556 (VEX_W_0F381A_P_2_M_0_L_0, VEX_W_0F385A_P_2_M_0_L_0,
557 VEX_W_0F3A06_P_2_L_0, VEX_W_0F3A18_P_2_L_0,
558 VEX_W_0F3A19_P_2_L_0, VEX_W_0F3A38_P_2_L_0,
559 VEX_W_0F3A39_P_2_L_0, VEX_W_0F3A46_P_2_L_0): ... respectively.
560 (vex_table): Replace Vex128 by Vex.
561 (vex_len_table): Likewise. Adjust referenced enum names.
562 (vex_w_table): Replace Vex128 and Vex256 by Vex. Adjust
563 referenced enum names.
564 (OP_VEX): Drop vex128_mode and vex256_mode cases.
565 * i386-dis-evex-len.h (evex_len_table): Replace Vex128 by Vex.
567 2020-07-14 Jan Beulich <jbeulich@suse.com>
569 * i386-dis.c (dis386): "LW" description now applies to "DQ".
570 (putop): Handle "DQ". Don't handle "LW" anymore.
571 (prefix_table, mod_table): Replace %LW by %DQ.
572 * i386-dis-evex-len.h, i386-dis-evex-prefix.h: Likewise.
574 2020-07-14 Jan Beulich <jbeulich@suse.com>
576 * i386-dis.c (OP_E_memory): Move xmm_mw_mode, xmm_mb_mode,
577 dqd_mode, xmm_md_mode, d_mode, d_swap_mode, and
578 d_scalar_swap_mode case handling. Move shift adjsutment into
579 the case its applicable to.
581 2020-07-14 Jan Beulich <jbeulich@suse.com>
583 * i386-dis.c (EVEX_W_0F3862_P_2, EVEX_W_0F3863_P_2): Delete.
584 (EXbScalar, EXwScalar): Fold to ...
585 (EXbwUnit): ... this.
586 (b_scalar_mode, w_scalar_mode): Fold to ...
587 (bw_unit_mode): ... this.
588 (intel_operand_size, OP_E_memory): Replace b_scalar_mode /
589 w_scalar_mode handling by bw_unit_mode one.
590 * i386-dis-evex-w.h: Move entries for opcodes 0F3862 and 0F3863
592 * i386-dis-evex-prefix.h: ... here.
594 2020-07-14 Jan Beulich <jbeulich@suse.com>
596 * i386-dis.c (PCMPESTR_Fixup): Delete.
597 (dis386): Adjust "LQ" description.
598 (prefix_table): Make %LQ apply to AT&T case only for cvtsi2ss,
599 cvtsi2sd, ptwrite, vcvtsi2ss, and vcvtsi2sd. Replace use of
600 PCMPESTR_Fixup by !%LQ and EXx for pcmpestrm, pcmpestri,
601 vpcmpestrm, and vpcmpestri.
602 (putop): Honor "cond" when handling LQ.
603 * i386-dis-evex-prefix.h: Make %LQ apply to AT&T case only for
604 vcvtsi2ss and vcvtusi2ss.
605 * i386-dis-evex-w.h: Make %LQ apply to AT&T case only for
606 vcvtsi2sd and vcvtusi2sd.
608 2020-07-14 Jan Beulich <jbeulich@suse.com>
610 * i386-dis.c (VCMP_Fixup, VCMP): Delete.
611 (simd_cmp_op): Add const.
612 (vex_cmp_op): Move up and drop initial 8 entries. Add const.
613 (CMP_Fixup): Handle VEX case.
614 (prefix_table): Replace VCMP by CMP.
615 * i386-dis-evex-prefix.h, i386-dis-evex-w.h: Likewise.
617 2020-07-14 Jan Beulich <jbeulich@suse.com>
619 * i386-dis.c (MOVBE_Fixup): Delete.
621 (prefix_table): Use Mv for movbe entries.
623 2020-07-14 Jan Beulich <jbeulich@suse.com>
625 * i386-dis.c (CRC32_Fixup): Delete.
626 (prefix_table): Use Eb/Ev for crc32 entries.
628 2020-07-14 Jan Beulich <jbeulich@suse.com>
630 * i386-dis.c (OP_E_register, OP_G, OP_REG, CRC32_Fixup):
631 Conditionalize invocations of "USED_REX (0)".
633 2020-07-14 Jan Beulich <jbeulich@suse.com>
635 * i386-dis.c (eBX, eCX, eDX, eSP, eBP, eSI, eDI, DL, BL, AH,
636 CH, DH, BH, AX, DX): Delete.
637 (OP_IMREG): Drop handling of eBX_reg, eCX_reg, eDX_reg, eSP_reg,
638 eBP_reg, eSI_reg, eDI_reg, dl_reg, bl_reg, ah_reg, ch_reg,
639 dh_reg, bh_reg, ax_reg, and dx_reg. Simplify what's left.
641 2020-07-10 Lili Cui <lili.cui@intel.com>
643 * i386-dis.c (TMM): New.
646 (MVexSIBMEM): Likewise.
647 (tmm_mode): Likewise.
648 (vex_sibmem_mode): Likewise.
649 (REG_VEX_0F3849_X86_64_P_0_W_0_M_1): Likewise.
650 (MOD_VEX_0F3849_X86_64_P_0_W_0): Likewise.
651 (MOD_VEX_0F3849_X86_64_P_2_W_0): Likewise.
652 (MOD_VEX_0F3849_X86_64_P_3_W_0): Likewise.
653 (MOD_VEX_0F384B_X86_64_P_1_W_0): Likewise.
654 (MOD_VEX_0F384B_X86_64_P_2_W_0): Likewise.
655 (MOD_VEX_0F384B_X86_64_P_3_W_0): Likewise.
656 (MOD_VEX_0F385C_X86_64_P_1_W_0): Likewise.
657 (MOD_VEX_0F385E_X86_64_P_0_W_0): Likewise.
658 (MOD_VEX_0F385E_X86_64_P_1_W_0): Likewise.
659 (MOD_VEX_0F385E_X86_64_P_2_W_0): Likewise.
660 (MOD_VEX_0F385E_X86_64_P_3_W_0): Likewise.
661 (RM_VEX_0F3849_X86_64_P_0_W_0_M_1_R_0): Likewise.
662 (PREFIX_VEX_0F3849_X86_64): Likewise.
663 (PREFIX_VEX_0F384B_X86_64): Likewise.
664 (PREFIX_VEX_0F385C_X86_64): Likewise.
665 (PREFIX_VEX_0F385E_X86_64): Likewise.
666 (X86_64_VEX_0F3849): Likewise.
667 (X86_64_VEX_0F384B): Likewise.
668 (X86_64_VEX_0F385C): Likewise.
669 (X86_64_VEX_0F385E): Likewise.
670 (VEX_LEN_0F3849_X86_64_P_0_W_0_M_0): Likewise.
671 (VEX_LEN_0F3849_X86_64_P_0_W_0_M_1_REG_0_RM_0): Likewise.
672 (VEX_LEN_0F3849_X86_64_P_2_W_0_M_0): Likewise.
673 (VEX_LEN_0F3849_X86_64_P_3_W_0_M_0): Likewise.
674 (VEX_LEN_0F384B_X86_64_P_1_W_0_M_0): Likewise.
675 (VEX_LEN_0F384B_X86_64_P_2_W_0_M_0): Likewise.
676 (VEX_LEN_0F384B_X86_64_P_3_W_0_M_0): Likewise.
677 (VEX_LEN_0F385C_X86_64_P_1_W_0_M_0): Likewise.
678 (VEX_LEN_0F385E_X86_64_P_0_W_0_M_0): Likewise.
679 (VEX_LEN_0F385E_X86_64_P_1_W_0_M_0): Likewise.
680 (VEX_LEN_0F385E_X86_64_P_2_W_0_M_0): Likewise.
681 (VEX_LEN_0F385E_X86_64_P_3_W_0_M_0): Likewise.
682 (VEX_W_0F3849_X86_64_P_0): Likewise.
683 (VEX_W_0F3849_X86_64_P_2): Likewise.
684 (VEX_W_0F3849_X86_64_P_3): Likewise.
685 (VEX_W_0F384B_X86_64_P_1): Likewise.
686 (VEX_W_0F384B_X86_64_P_2): Likewise.
687 (VEX_W_0F384B_X86_64_P_3): Likewise.
688 (VEX_W_0F385C_X86_64_P_1): Likewise.
689 (VEX_W_0F385E_X86_64_P_0): Likewise.
690 (VEX_W_0F385E_X86_64_P_1): Likewise.
691 (VEX_W_0F385E_X86_64_P_2): Likewise.
692 (VEX_W_0F385E_X86_64_P_3): Likewise.
693 (names_tmm): Likewise.
694 (att_names_tmm): Likewise.
695 (intel_operand_size): Handle void_mode.
696 (OP_XMM): Handle tmm_mode.
699 * i386-gen.c (cpu_flag_init): Add entries for CpuAMX_INT8,
700 CpuAMX_BF16 and CpuAMX_TILE.
701 (operand_type_shorthands): Add RegTMM.
702 (operand_type_init): Likewise.
703 (operand_types): Add Tmmword.
704 (cpu_flag_init): Add CPU_AMX_INT8, CpuAMX_BF16 and CpuAMX_TILE.
705 (cpu_flags): Add CpuAMX_INT8, CpuAMX_BF16 and CpuAMX_TILE.
706 * i386-opc.h (CpuAMX_INT8): New.
707 (CpuAMX_BF16): Likewise.
708 (CpuAMX_TILE): Likewise.
711 (i386_cpu_flags): Add cpuamx_int8, cpuamx_bf16 and cpuamx_tile.
712 (i386_opcode_modifier): Extend width of fields vexvvvv and sib.
713 (i386_operand_type): Add tmmword.
714 * i386-opc.tbl: Add AMX instructions.
715 * i386-reg.tbl: Add AMX registers.
716 * i386-init.h: Regenerated.
717 * i386-tbl.h: Likewise.
719 2020-07-08 Jan Beulich <jbeulich@suse.com>
721 * i386-dis.c (OP_LWPCB_E, OP_LWP_E): Delete.
722 (REG_XOP_LWPCB, REG_XOP_LWP, REG_XOP_TBM_01, REG_XOP_TBM_02):
724 (REG_0FXOP_09_12_M_1_L_0, REG_0FXOP_0A_12_L_0,
725 REG_0FXOP_09_01_L_0, REG_0FXOP_09_02_L_0): ... these
727 (MOD_VEX_0FXOP_09_12, VEX_LEN_0FXOP_08_85, VEX_LEN_0FXOP_08_86,
728 VEX_LEN_0FXOP_08_87, VEX_LEN_0FXOP_08_8E, VEX_LEN_0FXOP_08_8F,
729 VEX_LEN_0FXOP_08_95, VEX_LEN_0FXOP_08_96, VEX_LEN_0FXOP_08_97,
730 VEX_LEN_0FXOP_08_9E, VEX_LEN_0FXOP_08_9F, VEX_LEN_0FXOP_08_A3,
731 VEX_LEN_0FXOP_08_A6, VEX_LEN_0FXOP_08_B6, VEX_LEN_0FXOP_08_C0,
732 VEX_LEN_0FXOP_08_C1, VEX_LEN_0FXOP_08_C2, VEX_LEN_0FXOP_08_C3,
733 VEX_LEN_0FXOP_09_01, VEX_LEN_0FXOP_09_02, VEX_LEN_0FXOP_09_12_M_1,
734 VEX_LEN_0FXOP_09_90, VEX_LEN_0FXOP_09_91, VEX_LEN_0FXOP_09_92,
735 VEX_LEN_0FXOP_09_93, VEX_LEN_0FXOP_09_94, VEX_LEN_0FXOP_09_95,
736 VEX_LEN_0FXOP_09_96, VEX_LEN_0FXOP_09_97, VEX_LEN_0FXOP_09_98,
737 VEX_LEN_0FXOP_09_99, VEX_LEN_0FXOP_09_9A, VEX_LEN_0FXOP_09_9B,
738 VEX_LEN_0FXOP_09_C1, VEX_LEN_0FXOP_09_C2, VEX_LEN_0FXOP_09_C3,
739 VEX_LEN_0FXOP_09_C6, VEX_LEN_0FXOP_09_C7, VEX_LEN_0FXOP_09_CB,
740 VEX_LEN_0FXOP_09_D1, VEX_LEN_0FXOP_09_D2, VEX_LEN_0FXOP_09_D3,
741 VEX_LEN_0FXOP_09_D6, VEX_LEN_0FXOP_09_D7, VEX_LEN_0FXOP_09_DB,
742 VEX_LEN_0FXOP_09_E1, VEX_LEN_0FXOP_09_E2, VEX_LEN_0FXOP_09_E3,
743 VEX_LEN_0FXOP_0A_12, VEX_W_0FXOP_08_85_L_0,
744 VEX_W_0FXOP_08_86_L_0, VEX_W_0FXOP_08_87_L_0,
745 VEX_W_0FXOP_08_8E_L_0, VEX_W_0FXOP_08_8F_L_0,
746 VEX_W_0FXOP_08_95_L_0, VEX_W_0FXOP_08_96_L_0,
747 VEX_W_0FXOP_08_97_L_0, VEX_W_0FXOP_08_9E_L_0,
748 VEX_W_0FXOP_08_9F_L_0, VEX_W_0FXOP_08_A6_L_0,
749 VEX_W_0FXOP_08_B6_L_0, VEX_W_0FXOP_08_C0_L_0,
750 VEX_W_0FXOP_08_C1_L_0, VEX_W_0FXOP_08_C2_L_0,
751 VEX_W_0FXOP_08_C3_L_0, VEX_W_0FXOP_08_CC_L_0,
752 VEX_W_0FXOP_08_CD_L_0, VEX_W_0FXOP_08_CE_L_0,
753 VEX_W_0FXOP_08_CF_L_0, VEX_W_0FXOP_08_EC_L_0,
754 VEX_W_0FXOP_08_ED_L_0, VEX_W_0FXOP_08_EE_L_0,
755 VEX_W_0FXOP_08_EF_L_0, VEX_W_0FXOP_09_C1_L_0,
756 VEX_W_0FXOP_09_C2_L_0, VEX_W_0FXOP_09_C3_L_0,
757 VEX_W_0FXOP_09_C6_L_0, VEX_W_0FXOP_09_C7_L_0,
758 VEX_W_0FXOP_09_CB_L_0, VEX_W_0FXOP_09_D1_L_0,
759 VEX_W_0FXOP_09_D2_L_0, VEX_W_0FXOP_09_D3_L_0,
760 VEX_W_0FXOP_09_D6_L_0, VEX_W_0FXOP_09_D7_L_0,
761 VEX_W_0FXOP_09_DB_L_0, VEX_W_0FXOP_09_E1_L_0,
762 VEX_W_0FXOP_09_E2_L_0, VEX_W_0FXOP_09_E3_L_0): New enumerators.
763 (reg_table): Re-order XOP entries. Adjust their operands.
764 (xop_table): Replace 08_85, 08_86, 08_87, 08_8E, 08_8F, 08_95,
765 08_96, 08_97, 08_9E, 08_9F, 08_A3, 08_A6, 08_B6, 08_C0, 08_C1,
766 08_C2, 08_C3, 09_01, 09_02, 09_12, 09_90, 09_91, 09_92, 09_93,
767 09_94, 09_95, 09_96, 09_97, 09_98, 09_99, 09_9A, 09_9B, 09_C1,
768 09_C2, 09_C3, 09_C6, 09_C7, 09_CB, 09_D1, 09_D2, 09_D3, 09_D6,
769 09_D7, 09_DB, 09_E1, 09_E2, 09_E3, and VEX_LEN_0FXOP_0A_12
770 entries by references ...
771 (vex_len_table): ... to resepctive new entries here. For several
772 new and existing entries reference ...
773 (vex_w_table): ... new entries here.
774 (mod_table): New MOD_VEX_0FXOP_09_12 entry.
776 2020-07-08 Jan Beulich <jbeulich@suse.com>
778 * i386-dis.c (XMVexScalarI4): Define.
779 (VEX_LEN_0F3A6A_P_2, VEX_LEN_0F3A6B_P_2, VEX_LEN_0F3A6E_P_2,
780 VEX_LEN_0F3A6F_P_2, VEX_LEN_0F3A7A_P_2, VEX_LEN_0F3A7B_P_2,
781 VEX_LEN_0F3A7E_P_2, VEX_LEN_0F3A7F_P_2): Delete.
782 (vex_len_table): Move scalar FMA4 entries ...
783 (prefix_table): ... here.
784 (OP_REG_VexI4): Handle scalar_mode.
785 * i386-opc.tbl: Use VexLIG for scalar FMA4 insns.
786 * i386-tbl.h: Re-generate.
788 2020-07-08 Jan Beulich <jbeulich@suse.com>
790 * i386-dis.c (OP_Vex_2src_1, OP_Vex_2src_2, Vex_2src_1,
792 (OP_VexW, VexW): New.
793 (xop_table): Use EXx for rotates by immediate. Use EXx and VexW
794 for shifts and rotates by register.
796 2020-07-08 Jan Beulich <jbeulich@suse.com>
798 * i386-dis.c (OP_EX_VexImmW, OP_XMM_VexW, EXVexImmW, XMVexW,
799 VEX_W_0F3A48_P_2, VEX_W_0F3A49_P_2, vex_w_done, get_vex_imm8,
800 OP_EX_VexReg): Delete.
801 (OP_VexI4, VexI4): New.
802 (vex_w_table): Move vpermil2ps and vpermil2pd entries ...
803 (prefix_table): ... here.
804 (print_insn): Drop setting of vex_w_done.
806 2020-07-08 Jan Beulich <jbeulich@suse.com>
808 * i386-dis.c (OP_EX_VexW, EXVexW, EXdVexW, EXqVexW): Delete.
809 (prefix_table, vex_len_table): Replace operands for FMA4 insns.
810 (xop_table): Replace operands of 4-operand insns.
811 (OP_REG_VexI4): Move VEX.W based operand swaping here.
813 2020-07-07 Claudiu Zissulescu <claziss@synopsys.com>
815 * arc-opc.c (insert_rbd): New function.
818 * arc-tbl.h (vadd2, vadd4h, vmac2h, vmpy2h, vsub4h): Update
821 2020-07-07 Jan Beulich <jbeulich@suse.com>
823 * i386-dis.c (EVEX_W_0F3826_P_1, EVEX_W_0F3826_P_2,
824 EVEX_W_0F3828_P_1, EVEX_W_0F3829_P_1, EVEX_W_0F3854_P_2,
825 EVEX_W_0F3866_P_2, EVEX_W_0F3875_P_2, EVEX_W_0F387D_P_2,
826 EVEX_W_0F388D_P_2, EVEX_W_0F3A3E_P_2, EVEX_W_0F3A3F_P_2):
828 (putop): Handle "BW".
829 * i386-dis-evex-w.h: Move entries for opcodes 0F3826, 0F3826,
830 0F3828, 0F3829, 0F3854, 0F3866, 0F3875, 0F387D, 0F388D, 0F3A3E,
832 * i386-dis-evex-prefix.h: ... here.
834 2020-07-06 Jan Beulich <jbeulich@suse.com>
836 * i386-dis.c (VEX_LEN_0FXOP_09_80, VEX_LEN_0FXOP_09_81): Delete.
837 (VEX_LEN_0FXOP_09_82_W_0, VEX_LEN_0FXOP_09_83_W_0,
838 VEX_W_0FXOP_09_80, VEX_W_0FXOP_09_81, VEX_W_0FXOP_09_82,
839 VEX_W_0FXOP_09_83): New enumerators.
840 (xop_table): Reference the above.
841 (vex_len_table): Replace vfrczp* entries by vfrczs* ones.
842 (vex_w_table): New VEX_W_0FXOP_09_80, VEX_W_0FXOP_09_81,
843 VEX_W_0FXOP_09_82, and VEX_W_0FXOP_09_83 entries.
844 (get_valid_dis386): Return bad_opcode for XOP.PP != 0.
846 2020-07-06 Jan Beulich <jbeulich@suse.com>
848 * i386-dis.c (EVEX_W_0F3838_P_1,
849 EVEX_W_0F3839_P_1, EVEX_W_0F3840_P_2, EVEX_W_0F3855_P_2,
850 EVEX_W_0F3868_P_3, EVEX_W_0F3871_P_2, EVEX_W_0F3873_P_2,
851 EVEX_W_0F3A50_P_2, EVEX_W_0F3A51_P_2, EVEX_W_0F3A56_P_2,
852 EVEX_W_0F3A57_P_2, EVEX_W_0F3A66_P_2, EVEX_W_0F3A67_P_2,
853 EVEX_W_0F3A71_P_2, EVEX_W_0F3A73_P_2): Delete.
854 (putop): Centralize management of last[]. Delete SAVE_LAST.
855 * i386-dis-evex-w.h: Move entries for opcodes 0F3838, 0F3839,
856 0F3840, 0F3855, 0F3868, 0F3871, 0F3873, 0F3A50, 0F3A51, 0F3A56,
857 0F3A57, 0F3A66, 0F3A67, 0F3A71, and 0F3A73 ...
858 * i386-dis-evex-prefix.h: here.
860 2020-07-06 Jan Beulich <jbeulich@suse.com>
862 * i386-dis.c (MOD_EVEX_0F381A_P_2_W_0, MOD_EVEX_0F381A_P_2_W_1,
863 MOD_EVEX_0F381B_P_2_W_0, MOD_EVEX_0F381B_P_2_W_1,
864 MOD_EVEX_0F385A_P_2_W_0, MOD_EVEX_0F385A_P_2_W_1,
865 MOD_EVEX_0F385B_P_2_W_0, MOD_EVEX_0F385B_P_2_W_1): New
867 (EVEX_LEN_0F381A_P_2_W_0, EVEX_LEN_0F381A_P_2_W_1,
868 EVEX_LEN_0F381B_P_2_W_0, EVEX_LEN_0F381B_P_2_W_1,
869 EVEX_LEN_0F385A_P_2_W_0, EVEX_LEN_0F385A_P_2_W_1,
870 EVEX_LEN_0F385B_P_2_W_0, EVEX_LEN_0F385B_P_2_W_1): Rename to ...
871 (EVEX_LEN_0F381A_P_2_W_0_M_0, EVEX_LEN_0F381A_P_2_W_1_M_0,
872 EVEX_LEN_0F381B_P_2_W_0_M_0, EVEX_LEN_0F381B_P_2_W_1_M_0,
873 EVEX_LEN_0F385A_P_2_W_0_M_0, EVEX_LEN_0F385A_P_2_W_1_M_0,
874 EVEX_LEN_0F385B_P_2_W_0_M_0, EVEX_LEN_0F385B_P_2_W_1_M_0): ...
876 * i386-dis-evex-len.h: Adjust comments.
877 * i386-dis-evex-mod.h: New MOD_EVEX_0F381A_P_2_W_0,
878 MOD_EVEX_0F381A_P_2_W_1, MOD_EVEX_0F381B_P_2_W_0,
879 MOD_EVEX_0F381B_P_2_W_1, MOD_EVEX_0F385A_P_2_W_0,
880 MOD_EVEX_0F385A_P_2_W_1, MOD_EVEX_0F385B_P_2_W_0, and
881 MOD_EVEX_0F385B_P_2_W_1 table entries.
882 * i386-dis-evex-w.h: Reference mod_table[] for
883 EVEX_W_0F381A_P_2, EVEX_W_0F381B_P_2, EVEX_W_0F385A_P_2, and
886 2020-07-06 Jan Beulich <jbeulich@suse.com>
888 * i386-dis-evex-len.h (vbroadcastf32x8, vbroadcasti32x8,
889 vinsertf32x8, vinsertf64x4, vextractf32x8, vextractf64x4): Use
891 (vinserti32x8, vinserti64x4, vextracti32x8, vextracti64x4):
892 Likewise. Mark 256-bit entries invalid.
894 2020-07-06 Jan Beulich <jbeulich@suse.com>
896 * i386-dis.c (PREFIX_EVEX_0F62, PREFIX_EVEX_0F6A,
897 PREFIX_EVEX_0F6B, PREFIX_EVEX_0F6C, PREFIX_EVEX_0F6D,
898 PREFIX_EVEX_0FD2, PREFIX_EVEX_0FD3, PREFIX_EVEX_0FD4,
899 PREFIX_EVEX_0FF2, PREFIX_EVEX_0FF3, PREFIX_EVEX_0FF4,
900 PREFIX_EVEX_0FFA, PREFIX_EVEX_0FFB, PREFIX_EVEX_0FFE,
901 PREFIX_EVEX_0F382B): Delete.
902 (EVEX_W_0F62_P_2, EVEX_W_0F6A_P_2, EVEX_W_0F6B_P_2,
903 EVEX_W_0F6C_P_2, EVEX_W_0F6D_P_2, EVEX_W_0FD2_P_2,
904 EVEX_W_0FD3_P_2, EVEX_W_0FD4_P_2, EVEX_W_0FF2_P_2,
905 EVEX_W_0FF3_P_2, EVEX_W_0FF4_P_2, EVEX_W_0FFA_P_2,
906 EVEX_W_0FFB_P_2, EVEX_W_0FFE_P_2, EVEX_W_0F382B_P_2): Rename
908 (EVEX_W_0F62, EVEX_W_0F6A, EVEX_W_0F6B, EVEX_W_0F6C,
909 EVEX_W_0F6D, EVEX_W_0FD2, EVEX_W_0FD3, EVEX_W_0FD4,
910 EVEX_W_0FF2, EVEX_W_0FF3, EVEX_W_0FF4, EVEX_W_0FFA,
911 EVEX_W_0FFB, EVEX_W_0FFE, EVEX_W_0F382B): ... these
913 * i386-dis-evex.h (evex_table): Reference VEX_W table entries
914 for opcodes 0F62, 0F6A, 0F6B, 0F6C, 0F6D, 0FD2, 0FD3, 0FD4,
915 0FF2, 0FF3, 0FF4, 0FFA, 0FFB, 0FFE, 0F382B.
916 * i386-dis-evex-prefix.h (PREFIX_EVEX_0F62, PREFIX_EVEX_0F6A,
917 PREFIX_EVEX_0F6B, PREFIX_EVEX_0F6C, PREFIX_EVEX_0F6D,
918 PREFIX_EVEX_0FD2, PREFIX_EVEX_0FD3, PREFIX_EVEX_0FD4,
919 PREFIX_EVEX_0FF2, PREFIX_EVEX_0FF3, PREFIX_EVEX_0FF4,
920 PREFIX_EVEX_0FFA, PREFIX_EVEX_0FFB, PREFIX_EVEX_0FFE,
921 PREFIX_EVEX_0F382B): Remove table entries.
922 * i386-dis-evex-w.h: Reference VEX table entries for opcodes
923 0F62, 0F6A, 0F6B, 0F6C, 0F6D, 0FD2, 0FD3, 0FD4, 0FF2, 0FF3,
924 0FF4, 0FFA, 0FFB, 0FFE, 0F382B.
926 2020-07-06 Jan Beulich <jbeulich@suse.com>
928 * i386-dis.c (EVEX_LEN_0F3816_P_2, EVEX_LEN_0F3836_P_2,
929 EVEX_LEN_0F3A00_P_2_W_1, EVEX_LEN_0F3A01_P_2_W_1): New
931 * i386-dis-evex-len.h (evex_len_table): New EVEX_LEN_0F3816_P_2,
932 EVEX_LEN_0F3836_P_2, EVEX_LEN_0F3A00_P_2_W_1, and
933 EVEX_LEN_0F3A01_P_2_W_1 table entries.
934 * i386-dis-evex-prefix.h, i386-dis-evex-w.h: Reference the above
937 2020-07-06 Jan Beulich <jbeulich@suse.com>
939 * i386-dis.c (EVEX_LEN_0FC4_P_2, EVEX_LEN_0FC5_P_2,
940 EVEX_LEN_0F3A14_P_2, EVEX_LEN_0F3A15_P_2, EVEX_LEN_0F3A16_P_2,
941 EVEX_LEN_0F3A17_P_2, EVEX_LEN_0F3A20_P_2,
942 EVEX_LEN_0F3A21_P_2_W_0, EVEX_LEN_0F3A22_P_2): New enumerators.
943 * i386-dis-evex-len.h (evex_len_table): New EVEX_LEN_0FC4_P_2,
944 EVEX_LEN_0FC5_P_2, EVEX_LEN_0F3A14_P_2, EVEX_LEN_0F3A15_P_2,
945 EVEX_LEN_0F3A16_P_2, EVEX_LEN_0F3A17_P_2, EVEX_LEN_0F3A20_P_2,
946 EVEX_LEN_0F3A21_P_2_W_0, and EVEX_LEN_0F3A22_P_2 table entries.
947 * i386-dis-evex-prefix.h, i386-dis-evex-w.h: Reference the above
950 2020-07-06 Jan Beulich <jbeulich@suse.com>
952 * i386-dis.c (PREFIX_EVEX_0F3A1D, EVEX_W_0F3A1D_P_2): Delete.
953 (VEX_W_0F3813_P_2, VEX_W_0F3A1D_P_2): New enumerators.
954 (prefix_table): Reference VEX_W_0F3813_P_2 and VEX_W_0F3A1D_P_2
956 (vex_w_table): New VEX_W_0F3813_P_2 and VEX_W_0F3A1D_P_2 table
958 * i386-dis-evex.h (evex_table): Reference VEX table entry for
960 * i386-dis-evex-prefix.h (PREFIX_EVEX_0F3A1D): Delete table
962 * i386-dis-evex-w.h (EVEX_W_0F3A1D_P_2): Likewise.
964 2020-07-06 Jan Beulich <jbeulich@suse.com>
966 * i386-dis.c (PREFIX_EVEX_0F60, PREFIX_EVEX_0F61,
967 PREFIX_EVEX_0F63, PREFIX_EVEX_0F67, PREFIX_EVEX_0F68,
968 PREFIX_EVEX_0F69, PREFIX_EVEX_0FD1, PREFIX_EVEX_0FD5,
969 PREFIX_EVEX_0FD8, PREFIX_EVEX_0FD9, PREFIX_EVEX_0FDA,
970 PREFIX_EVEX_0FDC, PREFIX_EVEX_0FDD, PREFIX_EVEX_0FDE,
971 PREFIX_EVEX_0FE0, PREFIX_EVEX_0FE1, PREFIX_EVEX_0FE3,
972 PREFIX_EVEX_0FE4, PREFIX_EVEX_0FE5, PREFIX_EVEX_0FE8,
973 PREFIX_EVEX_0FE9, PREFIX_EVEX_0FEA, PREFIX_EVEX_0FEC,
974 PREFIX_EVEX_0FED, PREFIX_EVEX_0FEE, PREFIX_EVEX_0FF1,
975 PREFIX_EVEX_0FF5, PREFIX_EVEX_0FF6, PREFIX_EVEX_0FF8,
976 PREFIX_EVEX_0FF9, PREFIX_EVEX_0FFC, PREFIX_EVEX_0FFD,
977 PREFIX_EVEX_0F3800, PREFIX_EVEX_0F3804, PREFIX_EVEX_0F380B,
978 PREFIX_EVEX_0F380C, PREFIX_EVEX_0F3818, PREFIX_EVEX_0F381C,
979 PREFIX_EVEX_0F381D, PREFIX_EVEX_0F383C, PREFIX_EVEX_0F383E,
980 PREFIX_EVEX_0F3858, PREFIX_EVEX_0F3878, PREFIX_EVEX_0F3879,
981 PREFIX_EVEX_0F3896, PREFIX_EVEX_0F3897, PREFIX_EVEX_0F3898,
982 PREFIX_EVEX_0F3899, PREFIX_EVEX_0F389C, PREFIX_EVEX_0F389D,
983 PREFIX_EVEX_0F389E, PREFIX_EVEX_0F389F, PREFIX_EVEX_0F38A6,
984 PREFIX_EVEX_0F38A7, PREFIX_EVEX_0F38A8, PREFIX_EVEX_0F38A9,
985 PREFIX_EVEX_0F38AC, PREFIX_EVEX_0F38AD, PREFIX_EVEX_0F38AE,
986 PREFIX_EVEX_0F38AF, PREFIX_EVEX_0F38B6, PREFIX_EVEX_0F38B7,
987 PREFIX_EVEX_0F38B8, PREFIX_EVEX_0F38B9, PREFIX_EVEX_0F38BA,
988 PREFIX_EVEX_0F38BB, PREFIX_EVEX_0F38BC, PREFIX_EVEX_0F38BD,
989 PREFIX_EVEX_0F38BE, PREFIX_EVEX_0F38BF, PREFIX_EVEX_0F38CF,
990 PREFIX_EVEX_0F38DC, PREFIX_EVEX_0F38DD, PREFIX_EVEX_0F38DE,
991 PREFIX_EVEX_0F38DF, PREFIX_EVEX_0F3A04, PREFIX_EVEX_0F3A0F,
992 PREFIX_EVEX_0F3A44, PREFIX_EVEX_0F3ACE, PREFIX_EVEX_0F3ACF,
993 EVEX_W_0F380C_P_2, EVEX_W_0F3818_P_2, EVEX_W_0F3858_P_2,
994 EVEX_W_0F3878_P_2, EVEX_W_0F3879_P_2, EVEX_W_0F3A04_P_2,
995 EVEX_W_0F3ACE_P_2, EVEX_W_0F3ACF_P_2): Delete.
996 (prefix_table): Add EXxEVexR to FMA table entries.
997 (OP_Rounding): Move abort() invocation.
998 * i386-dis-evex.h (evex_table): Reference VEX table for opcodes
999 0F60, 0F61, 0F63, 0F67, 0F68, 0F69, 0FD1, 0FD5, 0FD8, 0FD9,
1000 0FDA, 0FDC, 0FDD, 0FDE, 0FE0, 0FE1, 0FE3, 0FE4, 0FE5, 0FE8,
1001 0FE9, 0FEA, 0FEC, 0FED, 0FEE, 0FF1, 0FF5, 0FF6, 0FF8, 0FF9,
1002 0FFC, 0FFD, 0F3800, 0F3804, 0F380B, 0F380C, 0F3818, 0F381C,
1003 0F381D, 0F383C, 0F383E, 0F3858, 0F3878, 0F3879, 0F3896, 0F3897,
1004 0F3898, 0F3899, 0F389C, 0F389D, 0F389E, 0F389F, 0F38A6, 0F38A7,
1005 0F38A8, 0F38A9, 0F38AC, 0F38AD, 0F38AE, 0F38AF, 0F38B6, 0F38B7,
1006 0F38B8, 0F38B9, 0F38BA, 0F38BB, 0F38BC, 0F38BD, 0F38BE, 0F38BF,
1007 0F38CF, 0F38DC, 0F38DD, 0F38DE, 0F38DF, 0F3A04, 0F3A0F, 0F3A44,
1009 * i386-dis-evex-prefix.h (PREFIX_EVEX_0F60, PREFIX_EVEX_0F61,
1010 PREFIX_EVEX_0F63, PREFIX_EVEX_0F67, PREFIX_EVEX_0F68,
1011 PREFIX_EVEX_0F69, PREFIX_EVEX_0FD1, PREFIX_EVEX_0FD5,
1012 PREFIX_EVEX_0FD8, PREFIX_EVEX_0FD9, PREFIX_EVEX_0FDA,
1013 PREFIX_EVEX_0FDC, PREFIX_EVEX_0FDD, PREFIX_EVEX_0FDE,
1014 PREFIX_EVEX_0FE0, PREFIX_EVEX_0FE1, PREFIX_EVEX_0FE3,
1015 PREFIX_EVEX_0FE4, PREFIX_EVEX_0FE5, PREFIX_EVEX_0FE8,
1016 PREFIX_EVEX_0FE9, PREFIX_EVEX_0FEA, PREFIX_EVEX_0FEC,
1017 PREFIX_EVEX_0FED, PREFIX_EVEX_0FEE, PREFIX_EVEX_0FF1,
1018 PREFIX_EVEX_0FF5, PREFIX_EVEX_0FF6, PREFIX_EVEX_0FF8,
1019 PREFIX_EVEX_0FF9, PREFIX_EVEX_0FFC, PREFIX_EVEX_0FFD,
1020 PREFIX_EVEX_0F3800, PREFIX_EVEX_0F3804, PREFIX_EVEX_0F380B,
1021 PREFIX_EVEX_0F380C, PREFIX_EVEX_0F3818, PREFIX_EVEX_0F381C,
1022 PREFIX_EVEX_0F381D, PREFIX_EVEX_0F383C, PREFIX_EVEX_0F383E,
1023 PREFIX_EVEX_0F3858, PREFIX_EVEX_0F3878, PREFIX_EVEX_0F3879,
1024 PREFIX_EVEX_0F3896, PREFIX_EVEX_0F3897, PREFIX_EVEX_0F3898,
1025 PREFIX_EVEX_0F3899, PREFIX_EVEX_0F389C, PREFIX_EVEX_0F389D,
1026 PREFIX_EVEX_0F389E, PREFIX_EVEX_0F389F, PREFIX_EVEX_0F38A6,
1027 PREFIX_EVEX_0F38A7, PREFIX_EVEX_0F38A8, PREFIX_EVEX_0F38A9,
1028 PREFIX_EVEX_0F38AC, PREFIX_EVEX_0F38AD, PREFIX_EVEX_0F38AE,
1029 PREFIX_EVEX_0F38AF, PREFIX_EVEX_0F38B6, PREFIX_EVEX_0F38B7,
1030 PREFIX_EVEX_0F38B8, PREFIX_EVEX_0F38B9, PREFIX_EVEX_0F38BA,
1031 PREFIX_EVEX_0F38BB, PREFIX_EVEX_0F38BC, PREFIX_EVEX_0F38BD,
1032 PREFIX_EVEX_0F38BE, PREFIX_EVEX_0F38BF, PREFIX_EVEX_0F38CF,
1033 PREFIX_EVEX_0F38DC, PREFIX_EVEX_0F38DD, PREFIX_EVEX_0F38DE,
1034 PREFIX_EVEX_0F38DF, PREFIX_EVEX_0F3A04, PREFIX_EVEX_0F3A0F,
1035 PREFIX_EVEX_0F3A44, PREFIX_EVEX_0F3ACE, PREFIX_EVEX_0F3ACF):
1036 Delete table entries.
1037 * i386-dis-evex-w.h (EVEX_W_0F380C_P_2, EVEX_W_0F3818_P_2,
1038 EVEX_W_0F3858_P_2, EVEX_W_0F3878_P_2, EVEX_W_0F3879_P_2,
1039 EVEX_W_0F3A04_P_2, EVEX_W_0F3ACE_P_2, EVEX_W_0F3ACF_P_2):
1042 2020-07-06 Jan Beulich <jbeulich@suse.com>
1044 * i386-dis.c (EXqScalarS): Delete.
1045 (vex_len_table): Replace EXqScalarS by EXqVexScalarS.
1046 * i386-dis-evex-w.h (vmovq): Use EXqVexScalarS.
1048 2020-07-06 Jan Beulich <jbeulich@suse.com>
1050 * i386-dis.c (safe-ctype.h): Include.
1051 (EXdScalar, EXqScalar): Delete.
1052 (d_scalar_mode, q_scalar_mode): Delete.
1053 (prefix_table, vex_len_table): Use EXxmm_md in place of
1054 EXdScalar and EXxmm_mq in place of EXqScalar.
1055 (intel_operand_size, OP_E_memory, OP_EX): Remove uses of
1056 d_scalar_mode and q_scalar_mode.
1057 * i386-dis-evex-w.h (vmovss): Use EXxmm_md.
1058 (vmovsd): Use EXxmm_mq.
1060 2020-07-06 Yuri Chornoivan <yurchor@ukr.net>
1063 * arc-dis.c: Fix spelling mistake.
1064 * po/opcodes.pot: Regenerate.
1066 2020-07-06 Nick Clifton <nickc@redhat.com>
1068 * po/pt_BR.po: Updated Brazilian Portugugese translation.
1069 * po/uk.po: Updated Ukranian translation.
1071 2020-07-04 Nick Clifton <nickc@redhat.com>
1073 * configure: Regenerate.
1074 * po/opcodes.pot: Regenerate.
1076 2020-07-04 Nick Clifton <nickc@redhat.com>
1078 Binutils 2.35 branch created.
1080 2020-07-02 H.J. Lu <hongjiu.lu@intel.com>
1082 * i386-gen.c (opcode_modifiers): Add VexSwapSources.
1083 * i386-opc.h (VexSwapSources): New.
1084 (i386_opcode_modifier): Add vexswapsources.
1085 * i386-opc.tbl: Add VexSwapSources to BMI2 and BMI instructions
1086 with two source operands swapped.
1087 * i386-tbl.h: Regenerated.
1089 2020-06-30 Nelson Chu <nelson.chu@sifive.com>
1091 * riscv-dis.c (print_insn_args, case 'E'): Updated. Let the
1092 unprivileged CSR can also be initialized.
1094 2020-06-29 Alan Modra <amodra@gmail.com>
1096 * arm-dis.c: Use C style comments.
1097 * cr16-opc.c: Likewise.
1098 * ft32-dis.c: Likewise.
1099 * moxie-opc.c: Likewise.
1100 * tic54x-dis.c: Likewise.
1101 * s12z-opc.c: Remove useless comment.
1102 * xgate-dis.c: Likewise.
1104 2020-06-26 H.J. Lu <hongjiu.lu@intel.com>
1106 * i386-opc.tbl: Add a blank line.
1108 2020-06-26 H.J. Lu <hongjiu.lu@intel.com>
1110 * i386-gen.c (opcode_modifiers): Replace VecSIB with SIB.
1111 (VecSIB128): Renamed to ...
1113 (VecSIB256): Renamed to ...
1115 (VecSIB512): Renamed to ...
1117 (VecSIB): Renamed to ...
1119 (i386_opcode_modifier): Replace vecsib with sib.
1120 * i386-opc.tbl (VecSIB128): New.
1121 (VecSIB256): Likewise.
1122 (VecSIB512): Likewise.
1123 Replace VecSIB=1, VecSIB=2 and VecSIB=3 with VecSIB128, VecSIB256
1124 and VecSIB512, respectively.
1126 2020-06-26 Jan Beulich <jbeulich@suse.com>
1128 * i386-dis.c: Adjust description of I macro.
1129 (x86_64_table): Drop use of I.
1130 (float_mem): Replace use of I.
1131 (putop): Remove handling of I. Adjust setting/clearing of "alt".
1133 2020-06-26 Jan Beulich <jbeulich@suse.com>
1135 * i386-dis.c: (print_insn): Avoid straight assignment to
1136 priv.orig_sizeflag when processing -M sub-options.
1138 2020-06-25 Jan Beulich <jbeulich@suse.com>
1140 * i386-dis.c: Adjust description of J macro.
1141 (dis386, x86_64_table, mod_table): Replace J.
1142 (putop): Remove handling of J.
1144 2020-06-25 Jan Beulich <jbeulich@suse.com>
1146 * i386-dis.c: (float_mem): Reduce alternatives for fstpt and fldpt.
1148 2020-06-25 Jan Beulich <jbeulich@suse.com>
1150 * i386-dis.c: Adjust description of "LQ" macro.
1151 (dis386_twobyte): Use LQ for sysret.
1152 (putop): Adjust handling of LQ.
1154 2020-06-22 Nelson Chu <nelson.chu@sifive.com>
1156 * riscv-opc.c: Move the structures and functions to bfd/elfxx-riscv.c.
1157 * riscv-dis.c: Include elfxx-riscv.h.
1159 2020-06-18 H.J. Lu <hongjiu.lu@intel.com>
1161 * i386-dis.c (prefix_table): Revert the last vmgexit change.
1163 2020-06-17 Lili Cui <lili.cui@intel.com>
1165 * i386-dis.c (prefix_table): Delete the incorrect vmgexit.
1167 2020-06-14 H.J. Lu <hongjiu.lu@intel.com>
1170 * i386-dis.c (prefix_table): Replace xsuspldtrk with xsusldtrk.
1171 * i386-opc.tbl: Likewise.
1172 * i386-tbl.h: Regenerated.
1174 2020-06-12 Nelson Chu <nelson.chu@sifive.com>
1176 * riscv-opc.c (priv_specs): Remove v1.9 and PRIV_SPEC_CLASS_1P9.
1178 2020-06-11 Alex Coplan <alex.coplan@arm.com>
1180 * aarch64-opc.c (SYSREG): New macro for describing system registers.
1181 (SR_CORE): Likewise.
1182 (SR_FEAT): Likewise.
1184 (SR_V8_1): Likewise.
1185 (SR_V8_2): Likewise.
1186 (SR_V8_3): Likewise.
1187 (SR_V8_4): Likewise.
1190 (SR_SSBS): Likewise.
1192 (SR_ID_PFR2): Likewise.
1193 (SR_PROFILE): Likewise.
1194 (SR_MEMTAG): Likewise.
1195 (SR_SCXTNUM): Likewise.
1196 (aarch64_sys_regs): Refactor to store feature information in the table.
1197 (aarch64_sys_reg_supported_p): Collapse logic for system registers
1198 that now describe their own features.
1199 (aarch64_pstatefield_supported_p): Likewise.
1201 2020-06-09 H.J. Lu <hongjiu.lu@intel.com>
1203 * i386-dis.c (prefix_table): Fix a typo in comments.
1205 2020-06-09 Jan Beulich <jbeulich@suse.com>
1207 * i386-dis.c (rex_ignored): Delete.
1208 (ckprefix): Drop rex_ignored initialization.
1209 (get_valid_dis386): Drop setting of rex_ignored.
1210 (print_insn): Drop checking of rex_ignored. Don't record data
1211 size prefix as used with VEX-and-alike encodings.
1213 2020-06-09 Jan Beulich <jbeulich@suse.com>
1215 * i386-dis.c (MOD_0F12_PREFIX_2, MOD_0F16_PREFIX_2,
1216 MOD_VEX_0F12_PREFIX_2, MOD_VEX_0F16_PREFIX_2): New enumerators.
1217 (VEX_LEN_0F12_P_2, VEX_LEN_0F16_P_2): Delete.
1218 (VEX_LEN_0F12_P_2_M_0, VEX_LEN_0F16_P_2_M_0): Define.
1219 (prefix_table): Decode MOD for cases 2 of opcodes 0F12, 0F16,
1220 VEX_0F12, and VEX_0F16.
1221 (vex_len_table): Use X for vmovlp* and vmovh*s. Drop
1222 VEX_LEN_0F12_P_2 and VEX_LEN_0F16_P_2 entries.
1223 (mod_table): Use X for movlpX and movhpX. Drop PREFIX_OPCODE
1224 from movlps and movhlps. New MOD_0F12_PREFIX_2,
1225 MOD_0F16_PREFIX_2, MOD_VEX_0F12_PREFIX_2, and
1226 MOD_VEX_0F16_PREFIX_2 entries.
1228 2020-06-09 Jan Beulich <jbeulich@suse.com>
1230 * i386-dis.c (MOD_EVEX_0F12_PREFIX_2, MOD_EVEX_0F13,
1231 MOD_EVEX_0F16_PREFIX_2, MOD_EVEX_0F17, MOD_EVEX_0F2B): New enumerators.
1232 (PREFIX_EVEX_0F13, PREFIX_EVEX_0F14, PREFIX_EVEX_0F15,
1233 PREFIX_EVEX_0F17, PREFIX_EVEX_0F28, PREFIX_EVEX_0F29,
1234 PREFIX_EVEX_0F2B, PREFIX_EVEX_0F54, PREFIX_EVEX_0F55,
1235 PREFIX_EVEX_0F56, PREFIX_EVEX_0F57, PREFIX_EVEX_0FC6,
1236 EVEX_W_0F10_P_0, EVEX_W_0F10_P_2, EVEX_W_0F11_P_0,
1237 EVEX_W_0F11_P_2, EVEX_W_0F12_P_0_M_0, EVEX_W_0F12_P_2,
1238 EVEX_W_0F13_P_0, EVEX_W_0F13_P_2, EVEX_W_0F14_P_0,
1239 EVEX_W_0F14_P_2, EVEX_W_0F15_P_0, EVEX_W_0F15_P_2,
1240 EVEX_W_0F16_P_0_M_0, EVEX_W_0F16_P_2, EVEX_W_0F17_P_0,
1241 EVEX_W_0F17_P_2, EVEX_W_0F28_P_0, EVEX_W_0F28_P_2,
1242 EVEX_W_0F29_P_0, EVEX_W_0F29_P_2, EVEX_W_0F2B_P_0,
1243 EVEX_W_0F2B_P_2, EVEX_W_0F2E_P_0, EVEX_W_0F2E_P_2,
1244 EVEX_W_0F2F_P_0, EVEX_W_0F2F_P_2, EVEX_W_0F51_P_0,
1245 EVEX_W_0F51_P_2, EVEX_W_0F54_P_0, EVEX_W_0F54_P_2,
1246 EVEX_W_0F55_P_0, EVEX_W_0F55_P_2, EVEX_W_0F56_P_0,
1247 EVEX_W_0F56_P_2, EVEX_W_0F57_P_0, EVEX_W_0F57_P_2,
1248 EVEX_W_0F58_P_0, EVEX_W_0F58_P_2, EVEX_W_0F59_P_0,
1249 EVEX_W_0F59_P_2, EVEX_W_0F5C_P_0, EVEX_W_0F5C_P_2,
1250 EVEX_W_0F5D_P_0, EVEX_W_0F5D_P_2, EVEX_W_0F5E_P_0,
1251 EVEX_W_0F5E_P_2, EVEX_W_0F5F_P_0, EVEX_W_0F5F_P_2,
1252 EVEX_W_0FC2_P_0, EVEX_W_0FC2_P_2, EVEX_W_0FC6_P_0,
1253 EVEX_W_0FC6_P_2): Delete.
1254 (print_insn): Add EVEX.W vs embedded prefix consistency check
1255 to prefix validation.
1256 * i386-dis-evex.h (evex_table): Don't further descend for
1257 vunpcklpX, vunpckhpX, vmovapX, vandpX, vandnpX, vorpX, vxorpX,
1258 and vshufpX. Continue with MOD decoding for opcodes 0F13, 0F17,
1260 * i386-dis-evex-mod.h: Add/adjust vmovlpX/vmovhpX entries.
1261 * i386-dis-evex-prefix.h: Don't further descend for vmovupX,
1262 vucomisX, vcomisX, vsqrtpX, vaddpX, vmulpX, vsubpX, vminpX,
1263 vdivpX, vmaxpX, and vcmppX. Continue with MOD decoding for cases
1264 2 of PREFIX_EVEX_0F12, PREFIX_EVEX_0F16, and PREFIX_EVEX_0F29.
1265 Drop PREFIX_EVEX_0F13, PREFIX_EVEX_0F14, PREFIX_EVEX_0F15,
1266 PREFIX_EVEX_0F17, PREFIX_EVEX_0F28, PREFIX_EVEX_0F2B,
1267 PREFIX_EVEX_0F54, PREFIX_EVEX_0F55, PREFIX_EVEX_0F56,
1268 PREFIX_EVEX_0F57, and PREFIX_EVEX_0FC6 entries.
1269 * i386-dis-evex-w.h: Drop EVEX_W_0F10_P_0, EVEX_W_0F10_P_2,
1270 EVEX_W_0F11_P_0, EVEX_W_0F11_P_2, EVEX_W_0F12_P_0_M_0,
1271 EVEX_W_0F12_P_2, EVEX_W_0F12_P_3, EVEX_W_0F13_P_0,
1272 EVEX_W_0F13_P_2, EVEX_W_0F14_P_0, EVEX_W_0F14_P_2,
1273 EVEX_W_0F15_P_0, EVEX_W_0F15_P_2, EVEX_W_0F16_P_0_M_0,
1274 EVEX_W_0F16_P_2, EVEX_W_0F17_P_0, EVEX_W_0F17_P_2,
1275 EVEX_W_0F28_P_0, EVEX_W_0F28_P_2, EVEX_W_0F29_P_0,
1276 EVEX_W_0F29_P_2, EVEX_W_0F2B_P_0, EVEX_W_0F2B_P_2,
1277 EVEX_W_0F2E_P_0, EVEX_W_0F2E_P_2, EVEX_W_0F2F_P_0,
1278 EVEX_W_0F2F_P_2, EVEX_W_0F51_P_0, EVEX_W_0F51_P_2,
1279 EVEX_W_0F54_P_0, EVEX_W_0F54_P_2, EVEX_W_0F55_P_0,
1280 EVEX_W_0F55_P_2, EVEX_W_0F56_P_0, EVEX_W_0F56_P_2,
1281 EVEX_W_0F57_P_0, EVEX_W_0F57_P_2, EVEX_W_0F58_P_0,
1282 EVEX_W_0F58_P_2, EVEX_W_0F59_P_0, EVEX_W_0F59_P_2,
1283 EVEX_W_0F5C_P_0, EVEX_W_0F5C_P_2, EVEX_W_0F5D_P_0,
1284 EVEX_W_0F5D_P_2, EVEX_W_0F5E_P_0, EVEX_W_0F5E_P_2,
1285 EVEX_W_0F5F_P_0, EVEX_W_0F5F_P_2, EVEX_W_0FC2_P_0,
1286 EVEX_W_0FC2_P_2, EVEX_W_0FC6_P_0, and EVEX_W_0FC6_P_2 entries.
1288 2020-06-09 Jan Beulich <jbeulich@suse.com>
1290 * i386-dis.c (vex_table): Use PREFIX_OPCODE for vunpcklpX,
1291 vunpckhpX, vmovapX, vandpX, vandnpX, vorpX, vxorpX and vshufpX.
1292 (vex_len_table) : Likewise for vmovlpX, vmovhpX, vmovntpX, and
1294 (print_insn): Drop pointless check against bad_opcode. Split
1295 prefix validation into legacy and VEX-and-alike parts.
1296 (putop): Re-work 'X' macro handling.
1298 2020-06-09 Jan Beulich <jbeulich@suse.com>
1300 * i386-dis.c (MOD_0F51): Rename to ...
1301 (MOD_0F50): ... this.
1303 2020-06-08 Alex Coplan <alex.coplan@arm.com>
1305 * arm-dis.c (arm_opcodes): Add dfb.
1306 (thumb32_opcodes): Add dfb.
1308 2020-06-08 Jan Beulich <jbeulich@suse.com>
1310 * i386-opc.h (reg_entry): Const-qualify reg_name field.
1312 2020-06-06 Alan Modra <amodra@gmail.com>
1314 * ppc-dis.c (ppc_opts): Accept -mpwr10/-Mpwr10.
1316 2020-06-05 Alan Modra <amodra@gmail.com>
1318 * cgen-dis.c (hash_insn_array): Increase size of buf. Assert
1319 size is large enough.
1321 2020-06-04 Jose E. Marchesi <jose.marchesi@oracle.com>
1323 * disassemble.c (disassemble_init_for_target): Set endian_code for
1325 * bpf-desc.c: Regenerate.
1326 * bpf-opc.c: Likewise.
1327 * bpf-dis.c: Likewise.
1329 2020-06-03 Jose E. Marchesi <jose.marchesi@oracle.com>
1331 * cgen-opc.c (cgen_get_insn_value): Get an `endian' argument.
1332 (cgen_put_insn_value): Likewise.
1333 (cgen_lookup_insn): Pass endianness to cgen_{get,put}_insn_value.
1334 * cgen-dis.in (print_insn): Likewise.
1335 * cgen-ibld.in (insert_1): Likewise.
1336 (insert_1): Likewise.
1337 (insert_insn_normal): Likewise.
1338 (extract_1): Likewise.
1339 * bpf-dis.c: Regenerate.
1340 * bpf-ibld.c: Likewise.
1341 * bpf-ibld.c: Likewise.
1342 * cgen-dis.in: Likewise.
1343 * cgen-ibld.in: Likewise.
1344 * cgen-opc.c: Likewise.
1345 * epiphany-dis.c: Likewise.
1346 * epiphany-ibld.c: Likewise.
1347 * fr30-dis.c: Likewise.
1348 * fr30-ibld.c: Likewise.
1349 * frv-dis.c: Likewise.
1350 * frv-ibld.c: Likewise.
1351 * ip2k-dis.c: Likewise.
1352 * ip2k-ibld.c: Likewise.
1353 * iq2000-dis.c: Likewise.
1354 * iq2000-ibld.c: Likewise.
1355 * lm32-dis.c: Likewise.
1356 * lm32-ibld.c: Likewise.
1357 * m32c-dis.c: Likewise.
1358 * m32c-ibld.c: Likewise.
1359 * m32r-dis.c: Likewise.
1360 * m32r-ibld.c: Likewise.
1361 * mep-dis.c: Likewise.
1362 * mep-ibld.c: Likewise.
1363 * mt-dis.c: Likewise.
1364 * mt-ibld.c: Likewise.
1365 * or1k-dis.c: Likewise.
1366 * or1k-ibld.c: Likewise.
1367 * xc16x-dis.c: Likewise.
1368 * xc16x-ibld.c: Likewise.
1369 * xstormy16-dis.c: Likewise.
1370 * xstormy16-ibld.c: Likewise.
1372 2020-06-04 Jose E. Marchesi <jemarch@gnu.org>
1374 * cgen-dis.in (cpu_desc_list): New field `insn_endian'.
1375 (print_insn_): Handle instruction endian.
1376 * bpf-dis.c: Regenerate.
1377 * bpf-desc.c: Regenerate.
1378 * epiphany-dis.c: Likewise.
1379 * epiphany-desc.c: Likewise.
1380 * fr30-dis.c: Likewise.
1381 * fr30-desc.c: Likewise.
1382 * frv-dis.c: Likewise.
1383 * frv-desc.c: Likewise.
1384 * ip2k-dis.c: Likewise.
1385 * ip2k-desc.c: Likewise.
1386 * iq2000-dis.c: Likewise.
1387 * iq2000-desc.c: Likewise.
1388 * lm32-dis.c: Likewise.
1389 * lm32-desc.c: Likewise.
1390 * m32c-dis.c: Likewise.
1391 * m32c-desc.c: Likewise.
1392 * m32r-dis.c: Likewise.
1393 * m32r-desc.c: Likewise.
1394 * mep-dis.c: Likewise.
1395 * mep-desc.c: Likewise.
1396 * mt-dis.c: Likewise.
1397 * mt-desc.c: Likewise.
1398 * or1k-dis.c: Likewise.
1399 * or1k-desc.c: Likewise.
1400 * xc16x-dis.c: Likewise.
1401 * xc16x-desc.c: Likewise.
1402 * xstormy16-dis.c: Likewise.
1403 * xstormy16-desc.c: Likewise.
1405 2020-06-03 Nick Clifton <nickc@redhat.com>
1407 * po/sr.po: Updated Serbian translation.
1409 2020-06-03 Nelson Chu <nelson.chu@sifive.com>
1411 * riscv-opc.c (riscv_get_isa_spec_class): Change bfd_boolean to int.
1412 (riscv_get_priv_spec_class): Likewise.
1414 2020-06-01 Alan Modra <amodra@gmail.com>
1416 * bpf-desc.c: Regenerate.
1418 2020-05-28 Jose E. Marchesi <jose.marchesi@oracle.com>
1419 David Faust <david.faust@oracle.com>
1421 * bpf-desc.c: Regenerate.
1422 * bpf-opc.h: Likewise.
1423 * bpf-opc.c: Likewise.
1424 * bpf-dis.c: Likewise.
1426 2020-05-28 Alan Modra <amodra@gmail.com>
1428 * nios2-dis.c (nios2_print_insn_arg): Avoid shift left of negative
1431 2020-05-28 Alan Modra <amodra@gmail.com>
1433 * ns32k-dis.c (print_insn_arg): Handle d value of 'f' for
1435 (print_insn_ns32k): Revert last change.
1437 2020-05-28 Nick Clifton <nickc@redhat.com>
1439 * ns32k-dis.c (print_insn_ns32k): Change the arg_bufs array to
1442 2020-05-26 Sandra Loosemore <sandra@codesourcery.com>
1444 Fix extraction of signed constants in nios2 disassembler (again).
1446 * nios2-dis.c (nios2_print_insn_arg): Add explicit casts to
1447 extractions of signed fields.
1449 2020-05-26 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
1451 * s390-opc.txt: Relocate vector load/store instructions with
1452 additional alignment parameter and change architecture level
1453 constraint from z14 to z13.
1455 2020-05-21 Alan Modra <amodra@gmail.com>
1457 * arc-ext.c: Replace "if (x) free (x)" with "free (x)" throughout.
1458 * sparc-dis.c: Likewise.
1459 * tic4x-dis.c: Likewise.
1460 * xtensa-dis.c: Likewise.
1461 * bpf-desc.c: Regenerate.
1462 * epiphany-desc.c: Regenerate.
1463 * fr30-desc.c: Regenerate.
1464 * frv-desc.c: Regenerate.
1465 * ip2k-desc.c: Regenerate.
1466 * iq2000-desc.c: Regenerate.
1467 * lm32-desc.c: Regenerate.
1468 * m32c-desc.c: Regenerate.
1469 * m32r-desc.c: Regenerate.
1470 * mep-asm.c: Regenerate.
1471 * mep-desc.c: Regenerate.
1472 * mt-desc.c: Regenerate.
1473 * or1k-desc.c: Regenerate.
1474 * xc16x-desc.c: Regenerate.
1475 * xstormy16-desc.c: Regenerate.
1477 2020-05-20 Nelson Chu <nelson.chu@sifive.com>
1479 * riscv-opc.c (riscv_ext_version_table): The table used to store
1480 all information about the supported spec and the corresponding ISA
1481 versions. Currently, only Zicsr is supported to verify the
1482 correctness of Z sub extension settings. Others will be supported
1483 in the future patches.
1484 (struct isa_spec_t, isa_specs): List for all supported ISA spec
1485 classes and the corresponding strings.
1486 (riscv_get_isa_spec_class): New function. Get the corresponding ISA
1487 spec class by giving a ISA spec string.
1488 * riscv-opc.c (struct priv_spec_t): New structure.
1489 (struct priv_spec_t priv_specs): List for all supported privilege spec
1490 classes and the corresponding strings.
1491 (riscv_get_priv_spec_class): New function. Get the corresponding
1492 privilege spec class by giving a spec string.
1493 (riscv_get_priv_spec_name): New function. Get the corresponding
1494 privilege spec string by giving a CSR version class.
1495 * riscv-dis.c: Updated since DECLARE_CSR is changed.
1496 * riscv-dis.c: Add new disassembler option -Mpriv-spec to dump the CSR
1497 according to the chosen version. Build a hash table riscv_csr_hash to
1498 store the valid CSR for the chosen pirv verison. Dump the direct
1499 CSR address rather than it's name if it is invalid.
1500 (parse_riscv_dis_option_without_args): New function. Parse the options
1502 (parse_riscv_dis_option): Call parse_riscv_dis_option_without_args to
1503 parse the options without arguments first, and then handle the options
1504 with arguments. Add the new option -Mpriv-spec, which has argument.
1505 * riscv-dis.c (print_riscv_disassembler_options): Add description
1506 about the new OBJDUMP option.
1508 2020-05-19 Peter Bergner <bergner@linux.ibm.com>
1510 * ppc-opc.c (insert_ls, extract_ls): Handle 3-bit L fields and new
1511 WC values on POWER10 sync, dcbf and wait instructions.
1512 (insert_pl, extract_pl): New functions.
1513 (L2OPT, LS, WC): Use insert_ls and extract_ls.
1514 (LS3): New , 3-bit L for sync.
1515 (LS3, L3OPT): New, 3-bit L for sync and dcbf.
1516 (SC2, PL): New, 2-bit SC and PL for sync and wait.
1517 (XWCPL_MASK, XL3RT_MASK, XSYNCLS_MASK): New instruction masks.
1518 (XOPL3, XWCPL, XSYNCLS): New opcode macros.
1519 (powerpc_opcodes) <dcbflp, dcbfps, dcbstps pause_short, phwsync,
1520 plwsync, stcisync, stncisync, stsync, waitrsv>: New extended mnemonics.
1521 <wait>: Enable PL operand on POWER10.
1522 <dcbf>: Enable L3OPT operand on POWER10.
1523 <sync>: Enable SC2 operand on POWER10.
1525 2020-05-19 Stafford Horne <shorne@gmail.com>
1528 * or1k-asm.c: Regenerate.
1529 * or1k-desc.c: Regenerate.
1530 * or1k-desc.h: Regenerate.
1531 * or1k-dis.c: Regenerate.
1532 * or1k-ibld.c: Regenerate.
1533 * or1k-opc.c: Regenerate.
1534 * or1k-opc.h: Regenerate.
1535 * or1k-opinst.c: Regenerate.
1537 2020-05-11 Alan Modra <amodra@gmail.com>
1539 * ppc-opc (powerpc_opcodes): Add xscmpeqqp, xscmpgeqp, xscmpgtqp,
1542 2020-05-11 Alan Modra <amodra@gmail.com>
1544 * ppc-opc.c (powerpc_opcodes): Add lxvrbx, lxvrhx, lxvrwx, lxvrdx,
1545 stxvrbx, stxvrhx, stxvrwx, stxvrdx.
1547 2020-05-11 Alan Modra <amodra@gmail.com>
1549 * ppc-opc.c (powerpc_opcodes): Add xvtlsbb.
1551 2020-05-11 Alan Modra <amodra@gmail.com>
1553 * ppc-opc.c (powerpc_opcodes): Add vstribl, vstribr, vstrihl, vstrihr,
1554 vclrlb, vclrrb, vstribl., vstribr., vstrihl., vstrihr..
1556 2020-05-11 Peter Bergner <bergner@linux.ibm.com>
1558 * ppc-opc.c (powerpc_opcodes) <setbc, setbcr, setnbc, setnbcr>: New
1561 2020-05-11 Alan Modra <amodra@gmail.com>
1563 * ppc-opc.c (UIM8, P_U8XX4_MASK): Define.
1564 (powerpc_opcodes): Add vgnb, vcfuged, vpextd, vpdepd, vclzdm,
1565 vctzdm, cntlzdm, pdepd, pextd, cfuged, cnttzdm.
1566 (prefix_opcodes): Add xxeval.
1568 2020-05-11 Alan Modra <amodra@gmail.com>
1570 * ppc-opc.c (powerpc_opcodes): Add xxgenpcvbm, xxgenpcvhm,
1571 xxgenpcvwm, xxgenpcvdm.
1573 2020-05-11 Alan Modra <amodra@gmail.com>
1575 * ppc-opc.c (MP, VXVAM_MASK): Define.
1576 (VXVAPS_MASK): Use VXVA_MASK.
1577 (powerpc_opcodes): Add mtvsrbmi, vexpandbm, vexpandhm, vexpandwm,
1578 vexpanddm, vexpandqm, vextractbm, vextracthm, vextractwm,
1579 vextractdm, vextractqm, mtvsrbm, mtvsrhm, mtvsrwm, mtvsrdm, mtvsrqm,
1580 vcntmbb, vcntmbh, vcntmbw, vcntmbd.
1582 2020-05-11 Alan Modra <amodra@gmail.com>
1583 Peter Bergner <bergner@linux.ibm.com>
1585 * ppc-opc.c (insert_xa6a, extract_xa6a, insert_xb6a, extract_xb6a):
1587 (powerpc_operands): Define ACC, PMSK8, PMSK4, PMSK2, XMSK, YMSK,
1588 YMSK2, XA6a, XA6ap, XB6a entries.
1589 (PMMIRR, P_X_MASK, P_XX1_MASK, P_GER_MASK): Define
1590 (P_GER2_MASK, P_GER4_MASK, P_GER8_MASK, P_GER64_MASK): Define.
1592 (powerpc_opcodes): Add xxmfacc, xxmtacc, xxsetaccz,
1593 xvi8ger4pp, xvi8ger4, xvf16ger2pp, xvf16ger2, xvf32gerpp, xvf32ger,
1594 xvi4ger8pp, xvi4ger8, xvi16ger2spp, xvi16ger2s, xvbf16ger2pp,
1595 xvbf16ger2, xvf64gerpp, xvf64ger, xvi16ger2, xvf16ger2np,
1596 xvf32gernp, xvi8ger4spp, xvi16ger2pp, xvbf16ger2np, xvf64gernp,
1597 xvf16ger2pn, xvf32gerpn, xvbf16ger2pn, xvf64gerpn, xvf16ger2nn,
1598 xvf32gernn, xvbf16ger2nn, xvf64gernn, xvcvbf16sp, xvcvspbf16.
1599 (prefix_opcodes): Add pmxvi8ger4pp, pmxvi8ger4, pmxvf16ger2pp,
1600 pmxvf16ger2, pmxvf32gerpp, pmxvf32ger, pmxvi4ger8pp, pmxvi4ger8,
1601 pmxvi16ger2spp, pmxvi16ger2s, pmxvbf16ger2pp, pmxvbf16ger2,
1602 pmxvf64gerpp, pmxvf64ger, pmxvi16ger2, pmxvf16ger2np, pmxvf32gernp,
1603 pmxvi8ger4spp, pmxvi16ger2pp, pmxvbf16ger2np, pmxvf64gernp,
1604 pmxvf16ger2pn, pmxvf32gerpn, pmxvbf16ger2pn, pmxvf64gerpn,
1605 pmxvf16ger2nn, pmxvf32gernn, pmxvbf16ger2nn, pmxvf64gernn.
1607 2020-05-11 Alan Modra <amodra@gmail.com>
1609 * ppc-opc.c (insert_imm32, extract_imm32): New functions.
1610 (insert_xts, extract_xts): New functions.
1611 (IMM32, UIM3, IX, UIM5, SH3, XTS, P8RR): Define.
1612 (P_XX4_MASK, P_UXX4_MASK, VSOP, P_VS_MASK, P_VSI_MASK): Define.
1613 (VXRC_MASK, VXSH_MASK): Define.
1614 (powerpc_opcodes): Add vinsbvlx, vsldbi, vextdubvlx, vextdubvrx,
1615 vextduhvlx, vextduhvrx, vextduwvlx, vextduwvrx, vextddvlx,
1616 vextddvrx, vinshvlx, vinswvlx, vinsw, vinsbvrx, vinshvrx,
1617 vinswvrx, vinsd, vinsblx, vsrdbi, vinshlx, vinswlx, vinsdlx,
1618 vinsbrx, vinshrx, vinswrx, vinsdrx, lxvkq.
1619 (prefix_opcodes): Add xxsplti32dx, xxspltidp, xxspltiw, xxblendvb,
1620 xxblendvh, xxblendvw, xxblendvd, xxpermx.
1622 2020-05-11 Alan Modra <amodra@gmail.com>
1624 * ppc-opc.c (powerpc_opcodes): Add vrlq, vdivuq, vmsumcud, vrlqmi,
1625 vmuloud, vcmpuq, vslq, vdivsq, vcmpsq, vrlqnm, vcmpequq, vmulosd,
1626 vsrq, vdiveuq, vcmpgtuq, vmuleud, vsraq, vdivesq, vcmpgtsq, vmulesd,
1627 vcmpequq., vextsd2q, vmoduq, vcmpgtuq., vmodsq, vcmpgtsq., xscvqpuqz,
1628 xscvuqqp, xscvqpsqz, xscvsqqp, dcffixqq, dctfixqq.
1630 2020-05-11 Alan Modra <amodra@gmail.com>
1632 * ppc-opc.c (insert_xtp, extract_xtp): New functions.
1633 (XTP, DQXP, DQXP_MASK): Define.
1634 (powerpc_opcodes): Add lxvp, stxvp, lxvpx, stxvpx.
1635 (prefix_opcodes): Add plxvp and pstxvp.
1637 2020-05-11 Alan Modra <amodra@gmail.com>
1639 * ppc-opc.c (powerpc_opcodes): Add vdivuw, vdivud, vdivsw, vmulld,
1640 vdivsd, vmulhuw, vdiveuw, vmulhud, vdiveud, vmulhsw, vdivesw,
1641 vmulhsd, vdivesd, vmoduw, vmodud, vmodsw, vmodsd.
1643 2020-05-11 Peter Bergner <bergner@linux.ibm.com>
1645 * ppc-opc.c (powerpc_opcodes) <brd, brh, brw>: New mnemonics.
1647 2020-05-11 Peter Bergner <bergner@linux.ibm.com>
1649 * ppc-opc.c (insert_l1opt, extract_l1opt): New functions.
1651 (powerpc_opcodes) <paste.>: Add L operand for cpu POWER10.
1653 2020-05-11 Peter Bergner <bergner@linux.ibm.com>
1655 * ppc-opc.c (powerpc_opcodes) <slbiag>: Add variant with L operand.
1657 2020-05-11 Alan Modra <amodra@gmail.com>
1659 * ppc-dis.c (powerpc_init_dialect): Default to "power10".
1661 2020-05-11 Alan Modra <amodra@gmail.com>
1663 * ppc-dis.c (ppc_opts): Add "power10" entry.
1664 (print_insn_powerpc): Update for PPC_OPCODE_POWER10 renaming.
1665 * ppc-opc.c (POWER10): Rename from POWERXX. Update all uses.
1667 2020-05-11 Nick Clifton <nickc@redhat.com>
1669 * po/fr.po: Updated French translation.
1671 2020-04-30 Alex Coplan <alex.coplan@arm.com>
1673 * aarch64-opc.h (enum aarch64_field_kind): Add FLD_imm16_2.
1674 * aarch64-opc.c (fields): Add entry for FLD_imm16_2.
1675 (operand_general_constraint_met_p): validate
1676 AARCH64_OPND_UNDEFINED.
1677 * aarch64-tbl.h (aarch64_opcode_table): Add udf instruction, entry
1679 * aarch64-asm-2.c: Regenerated.
1680 * aarch64-dis-2.c: Regenerated.
1681 * aarch64-opc-2.c: Regenerated.
1683 2020-04-29 Nick Clifton <nickc@redhat.com>
1686 * sh-opc.h: Also use unsigned 8-bit immediate values for the LDRC
1689 2020-04-29 Nick Clifton <nickc@redhat.com>
1691 * po/sv.po: Updated Swedish translation.
1693 2020-04-29 Nick Clifton <nickc@redhat.com>
1696 * sh-opc.h (IMM0_8): Replace with IMM0_8S and IMM0_8U. Use
1697 IMM0_8S for arithmetic insns and IMM0_8U for logical insns.
1698 * sh-dis.c (print_insn_sh): Change IMM0_8 case to IMM0_8S and add
1701 2020-04-21 Andreas Schwab <schwab@linux-m68k.org>
1704 * m68k-opc.c (m68k_opcodes): Allow pc-rel for second operand of
1705 cmpi only on m68020up and cpu32.
1707 2020-04-20 Sudakshina Das <sudi.das@arm.com>
1709 * aarch64-asm.c (aarch64_ins_none): New.
1710 * aarch64-asm.h (ins_none): New declaration.
1711 * aarch64-dis.c (aarch64_ext_none): New.
1712 * aarch64-dis.h (ext_none): New declaration.
1713 * aarch64-opc.c (aarch64_print_operand): Update case for
1714 AARCH64_OPND_BARRIER_PSB.
1715 * aarch64-tbl.h (aarch64_opcode_table): Add tsb.
1716 (AARCH64_OPERANDS): Update inserter/extracter for
1717 AARCH64_OPND_BARRIER_PSB to use new dummy functions.
1718 * aarch64-asm-2.c: Regenerated.
1719 * aarch64-dis-2.c: Regenerated.
1720 * aarch64-opc-2.c: Regenerated.
1722 2020-04-20 Sudakshina Das <sudi.das@arm.com>
1724 * aarch64-tbl.h (aarch64_feature_bti, BTI, BTI_INSN): Remove.
1725 (aarch64_feature_ras, RAS): Likewise.
1726 (aarch64_feature_stat_profile, STAT_PROFILE): Likewise.
1727 (aarch64_opcode_table): Update bti, xpaclri, pacia1716, pacib1716,
1728 autia1716, autib1716, esb, psb, dgh, paciaz, paciasp, pacibz, pacibsp,
1729 autiaz, autiasp, autibz, autibsp to be CORE_INSN.
1730 * aarch64-asm-2.c: Regenerated.
1731 * aarch64-dis-2.c: Regenerated.
1732 * aarch64-opc-2.c: Regenerated.
1734 2020-04-17 Fredrik Strupe <fredrik@strupe.net>
1736 * arm-dis.c (neon_opcodes): Fix VDUP instruction masks.
1737 (print_insn_neon): Support disassembly of conditional
1740 2020-02-16 David Faust <david.faust@oracle.com>
1742 * bpf-desc.c: Regenerate.
1743 * bpf-desc.h: Likewise.
1744 * bpf-opc.c: Regenerate.
1745 * bpf-opc.h: Likewise.
1747 2020-04-07 Lili Cui <lili.cui@intel.com>
1749 * i386-dis.c (enum): Add PREFIX_0F01_REG_5_MOD_3_RM_1,
1750 (prefix_table): New instructions (see prefixes above).
1751 (rm_table): Likewise
1752 * i386-gen.c (cpu_flag_init): Add CPU_TSXLDTRK_FLAGS,
1753 CPU_ANY_TSXLDTRK_FLAGS.
1754 (cpu_flags): Add CpuTSXLDTRK.
1755 * i386-opc.h (enum): Add CpuTSXLDTRK.
1756 (i386_cpu_flags): Add cputsxldtrk.
1757 * i386-opc.tbl: Add XSUSPLDTRK insns.
1758 * i386-init.h: Regenerate.
1759 * i386-tbl.h: Likewise.
1761 2020-04-02 Lili Cui <lili.cui@intel.com>
1763 * i386-dis.c (prefix_table): New instructions serialize.
1764 * i386-gen.c (cpu_flag_init): Add CPU_SERIALIZE_FLAGS,
1765 CPU_ANY_SERIALIZE_FLAGS.
1766 (cpu_flags): Add CpuSERIALIZE.
1767 * i386-opc.h (enum): Add CpuSERIALIZE.
1768 (i386_cpu_flags): Add cpuserialize.
1769 * i386-opc.tbl: Add SERIALIZE insns.
1770 * i386-init.h: Regenerate.
1771 * i386-tbl.h: Likewise.
1773 2020-03-26 Alan Modra <amodra@gmail.com>
1775 * disassemble.h (opcodes_assert): Declare.
1776 (OPCODES_ASSERT): Define.
1777 * disassemble.c: Don't include assert.h. Include opintl.h.
1778 (opcodes_assert): New function.
1779 * h8300-dis.c (bfd_h8_disassemble_init): Use OPCODES_ASSERT.
1780 (bfd_h8_disassemble): Reduce size of data array. Correctly
1781 calculate maxlen. Omit insn decoding when insn length exceeds
1782 maxlen. Exit from nibble loop when looking for E, before
1783 accessing next data byte. Move processing of E outside loop.
1784 Replace tests of maxlen in loop with assertions.
1786 2020-03-26 Alan Modra <amodra@gmail.com>
1788 * arc-dis.c (find_format): Init needs_limm. Simplify use of limm.
1790 2020-03-25 Alan Modra <amodra@gmail.com>
1792 * z80-dis.c (suffix): Init mybuf.
1794 2020-03-22 Alan Modra <amodra@gmail.com>
1796 * h8300-dis.c (bfd_h8_disassemble): Limit data[] access to that
1797 successflly read from section.
1799 2020-03-22 Alan Modra <amodra@gmail.com>
1801 * arc-dis.c (find_format): Use ISO C string concatenation rather
1802 than line continuation within a string. Don't access needs_limm
1803 before testing opcode != NULL.
1805 2020-03-22 Alan Modra <amodra@gmail.com>
1807 * ns32k-dis.c (print_insn_arg): Update comment.
1808 (print_insn_ns32k): Reduce size of index_offset array, and
1809 initialize, passing -1 to print_insn_arg for args that are not
1810 an index. Don't exit arg loop early. Abort on bad arg number.
1812 2020-03-22 Alan Modra <amodra@gmail.com>
1814 * s12z-dis.c (abstract_read_memory): Don't print error on EOI.
1815 * s12z-opc.c: Formatting.
1816 (operands_f): Return an int.
1817 (opr_n_bytes_p1): Return -1 on reaching buffer memory limit.
1818 (opr_n_bytes2, bfextins_n_bytes, mul_n_bytes, bm_n_bytes),
1819 (shift_n_bytes, mov_imm_opr_n_bytes, loop_prim_n_bytes),
1820 (exg_sex_discrim): Likewise.
1821 (create_immediate_operand, create_bitfield_operand),
1822 (create_register_operand_with_size, create_register_all_operand),
1823 (create_register_all16_operand, create_simple_memory_operand),
1824 (create_memory_operand, create_memory_auto_operand): Don't
1825 segfault on malloc failure.
1826 (z_ext24_decode): Return an int status, negative on fail, zero
1828 (x_imm1, imm1_decode, trap_decode, z_opr_decode, z_opr_decode2),
1829 (imm1234, reg_s_imm, reg_s_opr, z_imm1234_8base, z_imm1234_0base),
1830 (z_tfr, z_reg, reg_xy, lea_reg_xys_opr, lea_reg_xys, rel_15_7),
1831 (decode_rel_15_7, cmp_xy, sub_d6_x_y, sub_d6_y_x),
1832 (ld_18bit_decode, mul_decode, bm_decode, bm_rel_decode),
1833 (mov_imm_opr, ld_18bit_decode, exg_sex_decode),
1834 (loop_primitive_decode, shift_decode, psh_pul_decode),
1835 (bit_field_decode): Similarly.
1836 (z_decode_signed_value, decode_signed_value): Similarly. Add arg
1837 to return value, update callers.
1838 (x_opr_decode_with_size): Check all reads, returning NULL on fail.
1839 Don't segfault on NULL operand.
1840 (decode_operation): Return OP_INVALID on first fail.
1841 (decode_s12z): Check all reads, returning -1 on fail.
1843 2020-03-20 Alan Modra <amodra@gmail.com>
1845 * metag-dis.c (print_insn_metag): Don't ignore status from
1848 2020-03-20 Alan Modra <amodra@gmail.com>
1850 * nds32-dis.c (print_insn_nds32): Remove unnecessary casts.
1851 Initialize parts of buffer not written when handling a possible
1852 2-byte insn at end of section. Don't attempt decoding of such
1853 an insn by the 4-byte machinery.
1855 2020-03-20 Alan Modra <amodra@gmail.com>
1857 * ppc-dis.c (print_insn_powerpc): Only clear needed bytes of
1858 partially filled buffer. Prevent lookup of 4-byte insns when
1859 only VLE 2-byte insns are possible due to section size. Print
1860 ".word" rather than ".long" for 2-byte leftovers.
1862 2020-03-17 Sergey Belyashov <sergey.belyashov@gmail.com>
1865 * z80-dis.c: Fix disassembling ED+A4/AC/B4/BC opcodes.
1867 2020-03-13 Jan Beulich <jbeulich@suse.com>
1869 * i386-dis.c (X86_64_0D): Rename to ...
1870 (X86_64_0E): ... this.
1872 2020-03-09 H.J. Lu <hongjiu.lu@intel.com>
1874 * Makefile.am ($(srcdir)/i386-init.h): Also pass -P to $(CPP).
1875 * Makefile.in: Regenerated.
1877 2020-03-09 Jan Beulich <jbeulich@suse.com>
1879 * i386-opc.tbl (avx_irel): New. Use is for AVX512 vpcmp*
1881 * i386-tbl.h: Re-generate.
1883 2020-03-09 Jan Beulich <jbeulich@suse.com>
1885 * i386-opc.tbl (xop_elem, xop_irel, xop_sign): New. Use them for XOP vpcom*,
1886 vprot*, vpsha*, and vpshl*.
1887 * i386-tbl.h: Re-generate.
1889 2020-03-09 Jan Beulich <jbeulich@suse.com>
1891 * i386-opc.tbl (avx_frel): New. Use it for AVX/AVX512 vcmpps,
1892 vcmpss, vcmppd, and vcmpsd 3-operand pseudo-ops.
1893 * i386-tbl.h: Re-generate.
1895 2020-03-09 Jan Beulich <jbeulich@suse.com>
1897 * i386-gen.c (set_bitfield): Ignore zero-length field names.
1898 * i386-opc.tbl (sse_frel): New. Use it for SSE/SSE2 cmpps,
1899 cmpss, cmppd, and cmpsd 2-operand pseudo-ops.
1900 * i386-tbl.h: Re-generate.
1902 2020-03-09 Jan Beulich <jbeulich@suse.com>
1904 * i386-gen.c (struct template_arg, struct template_instance,
1905 struct template_param, struct template, templates,
1906 parse_template, expand_templates): New.
1907 (process_i386_opcodes): Various local variables moved to
1908 expand_templates. Call parse_template and expand_templates.
1909 * i386-opc.tbl (cc): New. Use it for Jcc, SETcc, and CMOVcc.
1910 * i386-tbl.h: Re-generate.
1912 2020-03-06 Jan Beulich <jbeulich@suse.com>
1914 * i386-opc.tbl (vcvtdq2pd, vcvtps2pd, vcvtudq2pd, vcvtps2ph,
1915 vcvtps2qq, vcvtps2uqq, vcvttps2qq, vcvttps2uqq): Fold separate
1916 register and memory source templates. Replace VexW= by VexW*
1918 * i386-tbl.h: Re-generate.
1920 2020-03-06 Jan Beulich <jbeulich@suse.com>
1922 * i386-opc.tbl: Drop IgnoreSize from various SIMD insns. Replace
1923 VexW= by VexW* and VexVVVV=1 by just VexVVVV where applicable.
1924 * i386-tbl.h: Re-generate.
1926 2020-03-06 Jan Beulich <jbeulich@suse.com>
1928 * i386-opc.tbl (fildll, fistpll, fisttpll): Add ATTSyntax.
1929 * i386-tbl.h: Re-generate.
1931 2020-03-06 Jan Beulich <jbeulich@suse.com>
1933 * i386-opc.tbl (movq): Drop NoRex64 from XMM/XMM SSE2AVX variants.
1934 (movmskps, pextrw, pinsrw, pmovmskb, movmskpd, extractps,
1935 pextrb, pinsrb, roundsd): Drop NoRex64 and where applicable use
1936 VexW0 on SSE2AVX variants.
1937 (vmovq): Drop NoRex64 from XMM/XMM variants.
1938 (vextractps, vmovmskpd, vmovmskps, vpextrb, vpextrw, vpinsrb,
1939 vpinsrw, vpmovmskb, vroundsd, vpmovmskb): Drop NoRex64 and where
1940 applicable use VexW0.
1941 * i386-tbl.h: Re-generate.
1943 2020-03-06 Jan Beulich <jbeulich@suse.com>
1945 * i386-gen.c (opcode_modifiers): Remove Rex64 field.
1946 * i386-opc.h (Rex64): Delete.
1947 (struct i386_opcode_modifier): Remove rex64 field.
1948 * i386-opc.tbl (crc32): Drop Rex64.
1949 Replace Rex64 with Size64 everywhere else.
1950 * i386-tbl.h: Re-generate.
1952 2020-03-06 Jan Beulich <jbeulich@suse.com>
1954 * i386-dis.c (OP_E_memory): Exclude recording of used address
1955 prefix for "bnd" modes only in 64-bit mode. Don't decode 16-bit
1956 addressed memory operands for MPX insns.
1958 2020-03-06 Jan Beulich <jbeulich@suse.com>
1960 * i386-opc.tbl (movmskps, mwait, vmread, vmwrite, invept,
1961 invvpid, invpcid, rdfsbase, rdgsbase, wrfsbase, wrgsbase, adcx,
1962 adox, mwaitx, rdpid, movdiri): Add IgnoreSize.
1963 (ptwrite): Split into non-64-bit and 64-bit forms.
1964 * i386-tbl.h: Re-generate.
1966 2020-03-06 Jan Beulich <jbeulich@suse.com>
1968 * i386-opc.tbl (tpause, umwait): Add IgnoreSize. Add 3-operand
1970 * i386-tbl.h: Re-generate.
1972 2020-03-04 Jan Beulich <jbeulich@suse.com>
1974 * i386-dis.c (PREFIX_0F01_REG_3_RM_1): New.
1975 (prefix_table): Move vmmcall here. Add vmgexit.
1976 (rm_table): Replace vmmcall entry by prefix_table[] escape.
1977 * i386-gen.c (cpu_flag_init): Add CPU_SEV_ES_FLAGS entry.
1978 (cpu_flags): Add CpuSEV_ES entry.
1979 * i386-opc.h (CpuSEV_ES): New.
1980 (union i386_cpu_flags): Add cpusev_es field.
1981 * i386-opc.tbl (vmgexit): New.
1982 * i386-init.h, i386-tbl.h: Re-generate.
1984 2020-03-03 H.J. Lu <hongjiu.lu@intel.com>
1986 * i386-gen.c (opcode_modifiers): Replace IgnoreSize/DefaultSize
1988 * i386-opc.h (IGNORESIZE): New.
1989 (DEFAULTSIZE): Likewise.
1990 (IgnoreSize): Removed.
1991 (DefaultSize): Likewise.
1992 (MnemonicSize): New.
1993 (i386_opcode_modifier): Replace ignoresize/defaultsize with
1995 * i386-opc.tbl (IgnoreSize): New.
1996 (DefaultSize): Likewise.
1997 * i386-tbl.h: Regenerated.
1999 2020-03-03 Sergey Belyashov <sergey.belyashov@gmail.com>
2002 * z80-dis.c: Fix disassembly of LD IY,(HL) and D (HL),IX
2005 2020-03-03 H.J. Lu <hongjiu.lu@intel.com>
2008 * i386-opc.tbl: Add IgnoreSize to cvtsi2sd, cvtsi2ss, vcvtsi2sd,
2009 vcvtsi2ss, vcvtusi2sd and vcvtusi2ss for AT&T syntax.
2010 * i386-tbl.h: Regenerated.
2012 2020-02-26 Alan Modra <amodra@gmail.com>
2014 * aarch64-asm.c: Indent labels correctly.
2015 * aarch64-dis.c: Likewise.
2016 * aarch64-gen.c: Likewise.
2017 * aarch64-opc.c: Likewise.
2018 * alpha-dis.c: Likewise.
2019 * i386-dis.c: Likewise.
2020 * nds32-asm.c: Likewise.
2021 * nfp-dis.c: Likewise.
2022 * visium-dis.c: Likewise.
2024 2020-02-25 Claudiu Zissulescu <claziss@gmail.com>
2026 * arc-regs.h (int_vector_base): Make it available for all ARC
2029 2020-02-20 Nelson Chu <nelson.chu@sifive.com>
2031 * riscv-dis.c (print_insn_args): Updated since the DECLARE_CSR is
2034 2020-02-19 Nelson Chu <nelson.chu@sifive.com>
2036 * riscv-opc.c (riscv_opcodes): Convert add/addi to the compressed
2037 c.mv/c.li if rs1 is zero.
2039 2020-02-17 H.J. Lu <hongjiu.lu@intel.com>
2041 * i386-gen.c (cpu_flag_init): Replace CpuABM with
2042 CpuLZCNT|CpuPOPCNT. Add CpuPOPCNT to CPU_SSE4_2_FLAGS. Add
2044 (cpu_flags): Remove CpuABM. Add CpuPOPCNT.
2045 * i386-opc.h (CpuABM): Removed.
2047 (i386_cpu_flags): Remove cpuabm. Add cpupopcnt.
2048 * i386-opc.tbl: Replace CpuABM|CpuSSE4_2 with CpuPOPCNT on
2049 popcnt. Remove CpuABM from lzcnt.
2050 * i386-init.h: Regenerated.
2051 * i386-tbl.h: Likewise.
2053 2020-02-17 Jan Beulich <jbeulich@suse.com>
2055 * i386-opc.tbl (vcvtsi2sd, vcvtsi2ss, vcvtusi2sd, vcvtusi2ss):
2056 Fold CpuNo64 and Cpu64 templates. Use VexLIG/EVexLIG and VexW0/
2057 VexW1 instead of open-coding them.
2058 * i386-tbl.h: Re-generate.
2060 2020-02-17 Jan Beulich <jbeulich@suse.com>
2062 * i386-opc.tbl (AddrPrefixOpReg): Define.
2063 (monitor, invlpga, vmload, vmrun, vmsave, clzero, monitorx,
2064 umonitor, movdir64b, enqcmd, enqcmds): Fold Cpu64 and CpuNo64
2065 templates. Drop NoRex64.
2066 * i386-tbl.h: Re-generate.
2068 2020-02-17 Jan Beulich <jbeulich@suse.com>
2071 * i386-opc.tbl (vcvtpd2dq, vcvtpd2ps, vcvttpd2dq, vcvtpd2udq,
2072 vcvttpd2udq, vcvtqq2ps, vcvtuqq2ps): Split XMM/YMM source forms
2073 into Intel syntax instance (with Unpsecified) and AT&T one
2075 (vcvtneps2bf16): Likewise, along with folding the two so far
2077 * i386-tbl.h: Re-generate.
2079 2020-02-16 H.J. Lu <hongjiu.lu@intel.com>
2081 * i386-gen.c (cpu_flag_init): Remove CPU_ANY_SSE3_FLAGS from
2082 CPU_ANY_SSE4A_FLAGS.
2084 2020-02-17 Alan Modra <amodra@gmail.com>
2086 * i386-gen.c (cpu_flag_init): Correct last change.
2088 2020-02-16 H.J. Lu <hongjiu.lu@intel.com>
2090 * i386-gen.c (cpu_flag_init): Add CPU_ANY_SSE4A_FLAGS. Remove
2093 2020-02-14 H.J. Lu <hongjiu.lu@intel.com>
2095 * i386-opc.tbl (movsx): Remove Intel syntax comments.
2098 2020-02-14 Jan Beulich <jbeulich@suse.com>
2101 * i386-opc.tbl (movsx): Fold patterns. Also allow Reg32 as
2102 destination for Cpu64-only variant.
2103 (movzx): Fold patterns.
2104 * i386-tbl.h: Re-generate.
2106 2020-02-13 Jan Beulich <jbeulich@suse.com>
2108 * i386-gen.c (cpu_flag_init): Move CpuSSE4a from
2109 CPU_ANY_SSE_FLAGS entry to CPU_ANY_SSE3_FLAGS one. Add
2110 CPU_ANY_SSE4_FLAGS entry.
2111 * i386-init.h: Re-generate.
2113 2020-02-12 Jan Beulich <jbeulich@suse.com>
2115 * i386-opc.tbl (vfpclasspd, vfpclassps): Add Intel sytax form
2116 with Unspecified, making the present one AT&T syntax only.
2117 * i386-tbl.h: Re-generate.
2119 2020-02-12 Jan Beulich <jbeulich@suse.com>
2121 * i386-opc.tbl (jmp): Fold CpuNo64 and Amd64 direct variants.
2122 * i386-tbl.h: Re-generate.
2124 2020-02-12 Jan Beulich <jbeulich@suse.com>
2127 * i386-dis.c (putop): Handle REX.W in '^' case for Intel64 mode.
2128 * i386-opc.tbl (lfs, lgs, lss, lcall, ljmp): Split into
2129 Amd64 and Intel64 templates.
2130 (call, jmp): Likewise for far indirect variants. Dro
2132 * i386-tbl.h: Re-generate.
2134 2020-02-11 Jan Beulich <jbeulich@suse.com>
2136 * i386-gen.c (opcode_modifiers): Remove ShortForm entry.
2137 * i386-opc.h (ShortForm): Delete.
2138 (struct i386_opcode_modifier): Remove shortform field.
2139 * i386-opc.tbl (mov, movabs, push, pop, xchg, inc, dec, fld,
2140 fst, fstp, fxch, fcom, fcomp, fucom, fucomp, fadd, faddp, fsub,
2141 fsubp, fsubr, fsubrp, fmul, fmulp, fdiv, fdivp, fdivr, fdivrp,
2142 ffreep, bswap, fcmov*, fcomi, fcomip, fucomi, fucomip, movq):
2144 * i386-tbl.h: Re-generate.
2146 2020-02-11 Jan Beulich <jbeulich@suse.com>
2148 * i386-opc.tbl (fcomi, fucomi, fcomip, fcompi, fucomip,
2149 fucompi): Drop ShortForm from operand-less templates.
2150 * i386-tbl.h: Re-generate.
2152 2020-02-11 Alan Modra <amodra@gmail.com>
2154 * cgen-ibld.in (extract_normal): Set *valuep on all return paths.
2155 * bpf-ibld.c, * epiphany-ibld.c, * fr30-ibld.c, * frv-ibld.c,
2156 * ip2k-ibld.c, * iq2000-ibld.c, * lm32-ibld.c, * m32c-ibld.c,
2157 * m32r-ibld.c, * mep-ibld.c, * mt-ibld.c, * or1k-ibld.c,
2158 * xc16x-ibld.c, * xstormy16-ibld.c: Regenerate.
2160 2020-02-10 Matthew Malcomson <matthew.malcomson@arm.com>
2162 * arm-dis.c (print_insn_cde): Define 'V' parse character.
2163 (cde_opcodes): Add VCX* instructions.
2165 2020-02-10 Stam Markianos-Wright <stam.markianos-wright@arm.com>
2166 Matthew Malcomson <matthew.malcomson@arm.com>
2168 * arm-dis.c (struct cdeopcode32): New.
2169 (CDE_OPCODE): New macro.
2170 (cde_opcodes): New disassembly table.
2171 (regnames): New option to table.
2172 (cde_coprocs): New global variable.
2173 (print_insn_cde): New
2174 (print_insn_thumb32): Use print_insn_cde.
2175 (parse_arm_disassembler_options): Parse coprocN args.
2177 2020-02-10 H.J. Lu <hongjiu.lu@intel.com>
2180 * i386-gen.c (opcode_modifiers): Replace AMD64 and Intel64
2182 * i386-opc.h (AMD64): Removed.
2183 (Intel64): Likewose.
2185 (INTEL64): Likewise.
2186 (INTEL64ONLY): Likewise.
2187 (i386_opcode_modifier): Replace amd64 and intel64 with isa64.
2188 * i386-opc.tbl (Amd64): New.
2189 (Intel64): Likewise.
2190 (Intel64Only): Likewise.
2191 Replace AMD64 with Amd64. Update sysenter/sysenter with
2192 Cpu64 and Intel64Only. Remove AMD64 from sysenter/sysenter.
2193 * i386-tbl.h: Regenerated.
2195 2020-02-07 Sergey Belyashov <sergey.belyashov@gmail.com>
2198 * z80-dis.c: Add support for GBZ80 opcodes.
2200 2020-02-04 Alan Modra <amodra@gmail.com>
2202 * d30v-dis.c (print_insn): Make "val" and "opnum" unsigned.
2204 2020-02-03 Alan Modra <amodra@gmail.com>
2206 * m32c-ibld.c: Regenerate.
2208 2020-02-01 Alan Modra <amodra@gmail.com>
2210 * frv-ibld.c: Regenerate.
2212 2020-01-31 Jan Beulich <jbeulich@suse.com>
2214 * i386-dis.c (EXxmm_mdq, xmm_mdq_mode): Delete.
2215 (intel_operand_size, OP_EX): Drop xmm_mdq_mode case label.
2216 (OP_E_memory): Replace xmm_mdq_mode case label by
2217 vex_scalar_w_dq_mode one.
2218 * i386-dis-evex-prefix.h: Replace EXxmm_mdq by EXVexWdqScalar.
2220 2020-01-31 Jan Beulich <jbeulich@suse.com>
2222 * i386-dis.c (EXVexWdq, vex_w_dq_mode): Delete.
2223 (vex_vsib_d_w_dq_mode, vex_vsib_q_w_dq_mode,
2224 vex_scalar_w_dq_mode): Don't refer to vex_w_dq_mode in comments.
2225 (intel_operand_size): Drop vex_w_dq_mode case label.
2227 2020-01-31 Richard Sandiford <richard.sandiford@arm.com>
2229 * aarch64-tbl.h (aarch64_opcode): Set C_MAX_ELEM for SVE bfcvt.
2230 Remove C_SCAN_MOVPRFX for SVE bfcvtnt.
2232 2020-01-30 Alan Modra <amodra@gmail.com>
2234 * m32c-ibld.c: Regenerate.
2236 2020-01-30 Jose E. Marchesi <jose.marchesi@oracle.com>
2238 * bpf-opc.c: Regenerate.
2240 2020-01-30 Jan Beulich <jbeulich@suse.com>
2242 * i386-dis.c (X86_64_C2, X86_64_C3): New enumerators.
2243 (dis386): Use them to replace C2/C3 table entries.
2244 (x86_64_table): Add X86_64_C2 and X86_64_C3 entries.
2245 * i386-opc.tbl (ret): Split Cpu64 entries into AMD64 and Intel64
2246 ones. Use Size64 instead of DefaultSize on Intel64 ones.
2247 * i386-tbl.h: Re-generate.
2249 2020-01-30 Jan Beulich <jbeulich@suse.com>
2251 * i386-opc.tbl (call): Drop DefaultSize from Intel64 JumpDword
2253 (fldenv, fnstenv, fstenv, fnsave, fsave, frstor): Drop
2255 * i386-tbl.h: Re-generate.
2257 2020-01-30 Alan Modra <amodra@gmail.com>
2259 * tic4x-dis.c (tic4x_dp): Make unsigned.
2261 2020-01-27 H.J. Lu <hongjiu.lu@intel.com>
2262 Jan Beulich <jbeulich@suse.com>
2265 * i386-dis.c (MOVSXD_Fixup): New function.
2266 (movsxd_mode): New enum.
2267 (x86_64_table): Use MOVSXD_Fixup and movsxd_mode on movsxd.
2268 (intel_operand_size): Handle movsxd_mode.
2269 (OP_E_register): Likewise.
2271 * i386-opc.tbl: Remove Rex64 and allow 32-bit destination
2272 register on movsxd. Add movsxd with 16-bit destination register
2273 for AMD64 and Intel64 ISAs.
2274 * i386-tbl.h: Regenerated.
2276 2020-01-27 Tamar Christina <tamar.christina@arm.com>
2279 * aarch64-tbl.h (struct aarch64_opcode): Re-order cfinv.
2280 * aarch64-asm-2.c: Regenerate
2281 * aarch64-dis-2.c: Likewise.
2282 * aarch64-opc-2.c: Likewise.
2284 2020-01-21 Jan Beulich <jbeulich@suse.com>
2286 * i386-opc.tbl (sysret): Drop DefaultSize.
2287 * i386-tbl.h: Re-generate.
2289 2020-01-21 Jan Beulich <jbeulich@suse.com>
2291 * i386-opc.tbl (vcvtneps2bf16x): Add Broadcast, Xmmword, and
2293 (vcvtneps2bf16y): Add Broadcast, Ymmword, and Dword.
2294 * i386-tbl.h: Re-generate.
2296 2020-01-20 Nick Clifton <nickc@redhat.com>
2298 * po/de.po: Updated German translation.
2299 * po/pt_BR.po: Updated Brazilian Portuguese translation.
2300 * po/uk.po: Updated Ukranian translation.
2302 2020-01-20 Alan Modra <amodra@gmail.com>
2304 * hppa-dis.c (fput_const): Remove useless cast.
2306 2020-01-20 Alan Modra <amodra@gmail.com>
2308 * arm-dis.c (print_insn_arm): Wrap 'T' value.
2310 2020-01-18 Nick Clifton <nickc@redhat.com>
2312 * configure: Regenerate.
2313 * po/opcodes.pot: Regenerate.
2315 2020-01-18 Nick Clifton <nickc@redhat.com>
2317 Binutils 2.34 branch created.
2319 2020-01-17 Christian Biesinger <cbiesinger@google.com>
2321 * opintl.h: Fix spelling error (seperate).
2323 2020-01-17 H.J. Lu <hongjiu.lu@intel.com>
2325 * i386-opc.tbl: Add {vex} pseudo prefix.
2326 * i386-tbl.h: Regenerated.
2328 2020-01-16 Andre Vieira <andre.simoesdiasvieira@arm.com>
2331 * opcodes/arm-dis.c (coprocessor_opcodes): Use CORE_HIGH for MVE bits.
2332 (neon_opcodes): Likewise.
2333 (select_arm_features): Make sure we enable MVE bits when selecting
2334 armv8.1-m.main. Make sure we do not enable MVE bits when not selecting
2337 2020-01-16 Jan Beulich <jbeulich@suse.com>
2339 * i386-opc.tbl: Drop stale comment from XOP section.
2341 2020-01-16 Jan Beulich <jbeulich@suse.com>
2343 * i386-opc.tbl (movq): Add VexWIG to SSE2AVX XMM->XMM forms.
2344 (extractps): Add VexWIG to SSE2AVX forms.
2345 * i386-tbl.h: Re-generate.
2347 2020-01-16 Jan Beulich <jbeulich@suse.com>
2349 * i386-opc.tbl (pextrq, pinsrq): Drop IgnoreSize and Qword. Drop
2350 Size64 from and use VexW1 on SSE2AVX forms.
2351 (vpextrq, vpinsrq): Drop IgnoreSize and Qword. Drop Size64 from
2352 VEX-encoded forms. Add Cpu64 to EVEX-encoded forms. Use VexW1.
2353 * i386-tbl.h: Re-generate.
2355 2020-01-15 Alan Modra <amodra@gmail.com>
2357 * tic4x-dis.c (tic4x_version): Make unsigned long.
2358 (optab, optab_special, registernames): New file scope vars.
2359 (tic4x_print_register): Set up registernames rather than
2360 malloc'd registertable.
2361 (tic4x_disassemble): Delete optable and optable_special. Use
2362 optab and optab_special instead. Throw away old optab,
2363 optab_special and registernames when info->mach changes.
2365 2020-01-14 Sergey Belyashov <sergey.belyashov@gmail.com>
2368 * z80-dis.c (suffix): Use .db instruction to generate double
2371 2020-01-14 Alan Modra <amodra@gmail.com>
2373 * z8k-dis.c (unpack_instr): Formatting. Cast unsigned short
2374 values to unsigned before shifting.
2376 2020-01-13 Thomas Troeger <tstroege@gmx.de>
2378 * arm-dis.c (print_insn_arm): Fill in insn info fields for control
2380 (print_insn_thumb16, print_insn_thumb32): Likewise.
2381 (print_insn): Initialize the insn info.
2382 * i386-dis.c (print_insn): Initialize the insn info fields, and
2385 2012-01-13 Claudiu Zissulescu <claziss@gmail.com>
2387 * arc-opc.c (C_NE): Make it required.
2389 2012-01-13 Claudiu Zissulescu <claziss@gmail.com>
2391 * opcode/arc-dis.c (regnames): Correct ACCL/ACCH naming, fix typo
2392 reserved register name.
2394 2020-01-13 Alan Modra <amodra@gmail.com>
2396 * ns32k-dis.c (Is_gen): Use strchr, add 'f'.
2397 (print_insn_ns32k): Adjust ioffset for 'f' index_offset.
2399 2020-01-13 Alan Modra <amodra@gmail.com>
2401 * wasm32-dis.c (print_insn_wasm32): Localise variables. Store
2402 result of wasm_read_leb128 in a uint64_t and check that bits
2403 are not lost when copying to other locals. Use uint32_t for
2404 most locals. Use PRId64 when printing int64_t.
2406 2020-01-13 Alan Modra <amodra@gmail.com>
2408 * score-dis.c: Formatting.
2409 * score7-dis.c: Formatting.
2411 2020-01-13 Alan Modra <amodra@gmail.com>
2413 * score-dis.c (print_insn_score48): Use unsigned variables for
2414 unsigned values. Don't left shift negative values.
2415 (print_insn_score32): Likewise.
2416 * score7-dis.c (print_insn_score32, print_insn_score16): Likewise.
2418 2020-01-13 Alan Modra <amodra@gmail.com>
2420 * tic4x-dis.c (tic4x_print_register): Remove dead code.
2422 2020-01-13 Alan Modra <amodra@gmail.com>
2424 * fr30-ibld.c: Regenerate.
2426 2020-01-13 Alan Modra <amodra@gmail.com>
2428 * xgate-dis.c (print_insn): Don't left shift signed value.
2429 (ripBits): Formatting, use 1u.
2431 2020-01-10 Alan Modra <amodra@gmail.com>
2433 * tilepro-opc.c (parse_insn_tilepro): Make opval unsigned.
2434 * tilegx-opc.c (parse_insn_tilegx): Likewise. Delete raw_opval.
2436 2020-01-10 Alan Modra <amodra@gmail.com>
2438 * m10300-dis.c (disassemble): Move extraction of DREG, AREG, RREG,
2439 and XRREG value earlier to avoid a shift with negative exponent.
2440 * m10200-dis.c (disassemble): Similarly.
2442 2020-01-09 Nick Clifton <nickc@redhat.com>
2445 * z80-dis.c (ld_ii_ii): Use correct cast.
2447 2020-01-03 Sergey Belyashov <sergey.belyashov@gmail.com>
2450 * z80-dis.c (ld_ii_ii): Use character constant when checking
2453 2020-01-09 Jan Beulich <jbeulich@suse.com>
2455 * i386-dis.c (SEP_Fixup): New.
2457 (dis386_twobyte): Use it for sysenter/sysexit.
2458 (enum x86_64_isa): Change amd64 enumerator to value 1.
2459 (OP_J): Compare isa64 against intel64 instead of amd64.
2460 * i386-opc.tbl (sysenter, sysexit): Split into AMD64 and Intel64
2462 * i386-tbl.h: Re-generate.
2464 2020-01-08 Alan Modra <amodra@gmail.com>
2466 * z8k-dis.c: Include libiberty.h
2467 (instr_data_s): Make max_fetched unsigned.
2468 (z8k_lookup_instr): Make nibl_index and tabl_index unsigned.
2469 Don't exceed byte_info bounds.
2470 (output_instr): Make num_bytes unsigned.
2471 (unpack_instr): Likewise for nibl_count and loop.
2472 * z8kgen.c (gas <opcode_entry_type>): Make noperands, length and
2474 * z8k-opc.h: Regenerate.
2476 2020-01-07 Shahab Vahedi <shahab@synopsys.com>
2478 * arc-tbl.h (llock): Use 'LLOCK' as class.
2480 (scond): Use 'SCOND' as class.
2482 (llockd): Set data_size_mode to 'C_ZZ_D' which is 64-bit.
2485 2020-01-06 Alan Modra <amodra@gmail.com>
2487 * m32c-ibld.c: Regenerate.
2489 2020-01-06 Alan Modra <amodra@gmail.com>
2492 * z80-dis.c (suffix): Don't use a local struct buffer copy.
2493 Peek at next byte to prevent recursion on repeated prefix bytes.
2494 Ensure uninitialised "mybuf" is not accessed.
2495 (print_insn_z80): Don't zero n_fetch and n_used here,..
2496 (print_insn_z80_buf): ..do it here instead.
2498 2020-01-04 Alan Modra <amodra@gmail.com>
2500 * m32r-ibld.c: Regenerate.
2502 2020-01-04 Alan Modra <amodra@gmail.com>
2504 * cr16-dis.c (cr16_match_opcode): Avoid shift left of signed value.
2506 2020-01-04 Alan Modra <amodra@gmail.com>
2508 * crx-dis.c (match_opcode): Avoid shift left of signed value.
2510 2020-01-04 Alan Modra <amodra@gmail.com>
2512 * d30v-dis.c (print_insn): Avoid signed overflow in left shift.
2514 2020-01-03 Jan Beulich <jbeulich@suse.com>
2516 * aarch64-tbl.h (aarch64_opcode_table): Use
2517 SVE_ADDR_RX_LSL{1,2,3} for LD1RO{H,W,D}.
2519 2020-01-03 Jan Beulich <jbeulich@suse.com>
2521 * aarch64-tbl.h (aarch64_opcode_table): Correct SIMD
2522 forms of SUDOT and USDOT.
2524 2020-01-03 Jan Beulich <jbeulich@suse.com>
2526 * aarch64-tbl.h (aarch64_opcode_table): Drop 'i' from
2528 * opcodes/aarch64-dis-2.c: Re-generate.
2530 2020-01-03 Jan Beulich <jbeulich@suse.com>
2532 * aarch64-tbl.h (aarch64_opcode_table): Correct 64-bit
2534 * opcodes/aarch64-dis-2.c: Re-generate.
2536 2020-01-02 Sergey Belyashov <sergey.belyashov@gmail.com>
2538 * z80-dis.c: Add support for eZ80 and Z80 instructions.
2540 2020-01-01 Alan Modra <amodra@gmail.com>
2542 Update year range in copyright notice of all files.
2544 For older changes see ChangeLog-2019
2546 Copyright (C) 2020 Free Software Foundation, Inc.
2548 Copying and distribution of this file, with or without modification,
2549 are permitted in any medium without royalty provided the copyright
2550 notice and this notice are preserved.
2556 version-control: never
projects / thirdparty / binutils-gdb.git / blob