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[thirdparty/binutils-gdb.git] / opcodes / avr-dis.c
1 /* Disassemble AVR instructions.
2 Copyright (C) 1999, 2000 Free Software Foundation, Inc.
3
4 Contributed by Denis Chertykov <denisc@overta.ru>
5
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2 of the License, or
9 (at your option) any later version.
10
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
18 Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
19
20
21 #include "sysdep.h"
22 #include "dis-asm.h"
23 #include "opintl.h"
24
25 typedef unsigned char u8;
26 typedef unsigned short u16;
27 typedef unsigned long u32;
28
29 #define IFMASK(a,b) ((opcode & (a)) == (b))
30
31 static char* SREG_flags = "CZNVSHTI";
32 static char* sect94[] = {"COM","NEG","SWAP","INC",0,"ASR","LSR","ROR",
33 0,0,"DEC",0,0,0,0,0};
34 static char* sect98[] = {"CBI","SBIC","SBI","SBIS"};
35 static char* branchs[] = {
36 "BRCS","BREQ","BRMI","BRVS",
37 "BRLT","BRHS","BRTS","BRIE",
38 "BRCC","BRNE","BRPL","BRVC",
39 "BRGE","BRHC","BRTC","BRID"
40 };
41
42 static char* last4[] = {"BLD","BST","SBRC","SBRS"};
43
44
45 static void dispLDD PARAMS ((u16, char *));
46
47 static void
48 dispLDD (opcode, dest)
49 u16 opcode;
50 char *dest;
51 {
52 opcode = (((opcode & 0x2000) >> 8) | ((opcode & 0x0c00) >> 7)
53 | (opcode & 7));
54 sprintf(dest, "%d", opcode);
55 }
56
57
58 static void regPP PARAMS ((u16, char *));
59
60 static void
61 regPP (opcode, dest)
62 u16 opcode;
63 char *dest;
64 {
65 opcode = ((opcode & 0x0600) >> 5) | (opcode & 0xf);
66 sprintf(dest, "0x%02X", opcode);
67 }
68
69
70 static void reg50 PARAMS ((u16, char *));
71
72 static void
73 reg50 (opcode, dest)
74 u16 opcode;
75 char *dest;
76 {
77 opcode = (opcode & 0x01f0) >> 4;
78 sprintf(dest, "R%d", opcode);
79 }
80
81
82 static void reg104 PARAMS ((u16, char *));
83
84 static void
85 reg104 (opcode, dest)
86 u16 opcode;
87 char *dest;
88 {
89 opcode = (opcode & 0xf) | ((opcode & 0x0200) >> 5);
90 sprintf(dest, "R%d", opcode);
91 }
92
93
94 static void reg40 PARAMS ((u16, char *));
95
96 static void
97 reg40 (opcode, dest)
98 u16 opcode;
99 char *dest;
100 {
101 opcode = (opcode & 0xf0) >> 4;
102 sprintf(dest, "R%d", opcode + 16);
103 }
104
105
106 static void reg20w PARAMS ((u16, char *));
107
108 static void
109 reg20w (opcode, dest)
110 u16 opcode;
111 char *dest;
112 {
113 opcode = (opcode & 0x30) >> 4;
114 sprintf(dest, "R%d", 24 + opcode * 2);
115 }
116
117
118 static void reg_fmul_d PARAMS ((u16, char *));
119
120 static void
121 reg_fmul_d (opcode, dest)
122 u16 opcode;
123 char *dest;
124 {
125 sprintf(dest, "R%d", 16 + ((opcode >> 4) & 7));
126 }
127
128
129 static void reg_fmul_r PARAMS ((u16, char *));
130
131 static void
132 reg_fmul_r (opcode, dest)
133 u16 opcode;
134 char *dest;
135 {
136 sprintf(dest, "R%d", 16 + (opcode & 7));
137 }
138
139
140 static void reg_muls_d PARAMS ((u16, char *));
141
142 static void
143 reg_muls_d (opcode, dest)
144 u16 opcode;
145 char *dest;
146 {
147 sprintf(dest, "R%d", 16 + ((opcode >> 4) & 0xf));
148 }
149
150
151 static void reg_muls_r PARAMS ((u16, char *));
152
153 static void
154 reg_muls_r (opcode, dest)
155 u16 opcode;
156 char *dest;
157 {
158 sprintf(dest, "R%d", 16 + (opcode & 0xf));
159 }
160
161
162 static void reg_movw_d PARAMS ((u16, char *));
163
164 static void
165 reg_movw_d (opcode, dest)
166 u16 opcode;
167 char *dest;
168 {
169 sprintf(dest, "R%d", 2 * ((opcode >> 4) & 0xf));
170 }
171
172
173 static void reg_movw_r PARAMS ((u16, char *));
174
175 static void
176 reg_movw_r (opcode, dest)
177 u16 opcode;
178 char *dest;
179 {
180 sprintf(dest, "R%d", 2 * (opcode & 0xf));
181 }
182
183
184 static void lit404 PARAMS ((u16, char *));
185
186 static void
187 lit404 (opcode, dest)
188 u16 opcode;
189 char *dest;
190 {
191 opcode = ((opcode & 0xf00) >> 4) | (opcode & 0xf);
192 sprintf(dest, "0x%02X", opcode);
193 }
194
195
196 static void lit204 PARAMS ((u16, char *));
197
198 static void
199 lit204 (opcode, dest)
200 u16 opcode;
201 char *dest;
202 {
203 opcode = ((opcode & 0xc0) >> 2) | (opcode & 0xf);
204 sprintf(dest, "0x%02X", opcode);
205 }
206
207
208 static void add0fff PARAMS ((u16, char *, int));
209
210 static void
211 add0fff (op, dest, pc)
212 u16 op;
213 char *dest;
214 int pc;
215 {
216 int rel_addr = (((op & 0xfff) ^ 0x800) - 0x800) * 2;
217 sprintf(dest, ".%+-8d ; 0x%06X", rel_addr, pc + 2 + rel_addr);
218 }
219
220
221 static void add03f8 PARAMS ((u16, char *, int));
222
223 static void
224 add03f8 (op, dest, pc)
225 u16 op;
226 char *dest;
227 int pc;
228 {
229 int rel_addr = ((((op >> 3) & 0x7f) ^ 0x40) - 0x40) * 2;
230 sprintf(dest, ".%+-8d ; 0x%06X", rel_addr, pc + 2 + rel_addr);
231 }
232
233
234 static u16 avrdis_opcode PARAMS ((bfd_vma, disassemble_info *));
235
236 static u16
237 avrdis_opcode (addr, info)
238 bfd_vma addr;
239 disassemble_info *info;
240 {
241 bfd_byte buffer[2];
242 int status;
243 status = info->read_memory_func(addr, buffer, 2, info);
244 if (status != 0)
245 {
246 info->memory_error_func(status, addr, info);
247 return -1;
248 }
249 return bfd_getl16 (buffer);
250 }
251
252
253 int
254 print_insn_avr(addr, info)
255 bfd_vma addr;
256 disassemble_info *info;
257 {
258 char rr[200];
259 char rd[200];
260 u16 opcode;
261 void *stream = info->stream;
262 fprintf_ftype prin = info->fprintf_func;
263 int cmd_len = 2;
264
265 opcode = avrdis_opcode (addr, info);
266
267 if (IFMASK(0xd000, 0x8000))
268 {
269 char letter;
270 reg50(opcode, rd);
271 dispLDD(opcode, rr);
272 if (opcode & 8)
273 letter = 'Y';
274 else
275 letter = 'Z';
276 if (opcode & 0x0200)
277 (*prin) (stream, " STD %c+%s,%s", letter, rr, rd);
278 else
279 (*prin) (stream, " LDD %s,%c+%s", rd, letter, rr);
280 }
281 else
282 {
283 switch (opcode & 0xf000)
284 {
285 case 0x0000:
286 {
287 reg50(opcode, rd);
288 reg104(opcode, rr);
289 switch (opcode & 0x0c00)
290 {
291 case 0x0000:
292 switch (opcode & 0x0300)
293 {
294 case 0x0000:
295 (*prin) (stream, " NOP");
296 break;
297 case 0x0100:
298 reg_movw_d(opcode, rd);
299 reg_movw_r(opcode, rr);
300 (*prin) (stream, " MOVW %s,%s", rd, rr);
301 break;
302 case 0x0200:
303 reg_muls_d(opcode, rd);
304 reg_muls_r(opcode, rr);
305 (*prin) (stream, " MULS %s,%s", rd, rr);
306 break;
307 case 0x0300:
308 reg_fmul_d(opcode, rd);
309 reg_fmul_r(opcode, rr);
310 if (IFMASK(0x88, 0))
311 (*prin) (stream, " MULSU %s,%s", rd, rr);
312 else if (IFMASK(0x88, 8))
313 (*prin) (stream, " FMUL %s,%s", rd, rr);
314 else if (IFMASK(0x88, 0x80))
315 (*prin) (stream, " FMULS %s,%s", rd, rr);
316 else
317 (*prin) (stream, " FMULSU %s,%s", rd, rr);
318 }
319 break;
320 case 0x0400:
321 (*prin) (stream, " CPC %s,%s", rd, rr);
322 break;
323 case 0x0800:
324 (*prin) (stream, " SBC %s,%s", rd, rr);
325 break;
326 case 0x0c00:
327 (*prin) (stream, " ADD %s,%s", rd, rr);
328 break;
329 }
330 }
331 break;
332 case 0x1000:
333 {
334 reg50(opcode, rd);
335 reg104(opcode, rr);
336 switch (opcode & 0x0c00)
337 {
338 case 0x0000:
339 (*prin) (stream, " CPSE %s,%s", rd, rr);
340 break;
341 case 0x0400:
342 (*prin) (stream, " CP %s,%s", rd, rr);
343 break;
344 case 0x0800:
345 (*prin) (stream, " SUB %s,%s", rd, rr);
346 break;
347 case 0x0c00:
348 (*prin) (stream, " ADC %s,%s", rd, rr);
349 break;
350 }
351 }
352 break;
353 case 0x2000:
354 {
355 reg50(opcode, rd);
356 reg104(opcode, rr);
357 switch (opcode & 0x0c00)
358 {
359 case 0x0000:
360 (*prin) (stream, " AND %s,%s", rd, rr);
361 break;
362 case 0x0400:
363 (*prin) (stream, " EOR %s,%s", rd, rr);
364 break;
365 case 0x0800:
366 (*prin) (stream, " OR %s,%s", rd, rr);
367 break;
368 case 0x0c00:
369 (*prin) (stream, " MOV %s,%s", rd, rr);
370 break;
371 }
372 }
373 break;
374 case 0x3000:
375 {
376 reg40(opcode, rd);
377 lit404(opcode, rr);
378 (*prin) (stream, " CPI %s,%s", rd, rr);
379 }
380 break;
381 case 0x4000:
382 {
383 reg40(opcode, rd);
384 lit404(opcode, rr);
385 (*prin) (stream, " SBCI %s,%s", rd, rr);
386 }
387 break;
388 case 0x5000:
389 {
390 reg40(opcode, rd);
391 lit404(opcode, rr);
392 (*prin) (stream, " SUBI %s,%s", rd, rr);
393 }
394 break;
395 case 0x6000:
396 {
397 reg40(opcode, rd);
398 lit404(opcode, rr);
399 (*prin) (stream, " ORI %s,%s", rd, rr);
400 }
401 break;
402 case 0x7000:
403 {
404 reg40(opcode, rd);
405 lit404(opcode, rr);
406 (*prin) (stream, " ANDI %s,%s", rd, rr);
407 }
408 break;
409 case 0x9000:
410 {
411 switch (opcode & 0x0e00)
412 {
413 case 0x0000:
414 {
415 reg50(opcode, rd);
416 switch (opcode & 0xf)
417 {
418 case 0x0:
419 {
420 (*prin) (stream, " LDS %s,0x%04X", rd,
421 avrdis_opcode(addr + 2, info));
422 cmd_len = 4;
423 }
424 break;
425 case 0x1:
426 (*prin) (stream, " LD %s,Z+", rd);
427 break;
428 case 0x2:
429 (*prin) (stream, " LD %s,-Z", rd);
430 break;
431 case 0x4:
432 (*prin) (stream, " LPM %s,Z", rd);
433 break;
434 case 0x5:
435 (*prin) (stream, " LPM %s,Z+", rd);
436 break;
437 case 0x6:
438 (*prin) (stream, " ELPM %s,Z", rd);
439 break;
440 case 0x7:
441 (*prin) (stream, " ELPM %s,Z+", rd);
442 break;
443 case 0x9:
444 (*prin) (stream, " LD %s,Y+", rd);
445 break;
446 case 0xa:
447 (*prin) (stream, " LD %s,-Y", rd);
448 break;
449 case 0xc:
450 (*prin) (stream, " LD %s,X", rd);
451 break;
452 case 0xd:
453 (*prin) (stream, " LD %s,X+", rd);
454 break;
455 case 0xe:
456 (*prin) (stream, " LD %s,-X", rd);
457 break;
458 case 0xf:
459 (*prin) (stream, " POP %s", rd);
460 break;
461 default:
462 (*prin) (stream, " ????");
463 break;
464 }
465 }
466 break;
467 case 0x0200:
468 {
469 reg50(opcode, rd);
470 switch (opcode & 0xf)
471 {
472 case 0x0:
473 {
474 (*prin) (stream, " STS 0x%04X,%s",
475 avrdis_opcode(addr + 2, info), rd);
476 cmd_len = 4;
477 }
478 break;
479 case 0x1:
480 (*prin) (stream, " ST Z+,%s", rd);
481 break;
482 case 0x2:
483 (*prin) (stream, " ST -Z,%s", rd);
484 break;
485 case 0x9:
486 (*prin) (stream, " ST Y+,%s", rd);
487 break;
488 case 0xa:
489 (*prin) (stream, " ST -Y,%s", rd);
490 break;
491 case 0xc:
492 (*prin) (stream, " ST X,%s", rd);
493 break;
494 case 0xd:
495 (*prin) (stream, " ST X+,%s", rd);
496 break;
497 case 0xe:
498 (*prin) (stream, " ST -X,%s", rd);
499 break;
500 case 0xf:
501 (*prin) (stream, " PUSH %s", rd);
502 break;
503 default:
504 (*prin) (stream, " ????");
505 break;
506 }
507 }
508 break;
509 case 0x0400:
510 {
511 if (IFMASK(0x020c, 0x000c))
512 {
513 u32 k = ((opcode & 0x01f0) >> 3) | (opcode & 1);
514 k = (k << 16) | avrdis_opcode(addr + 2, info);
515 if (opcode & 0x0002)
516 (*prin) (stream, " CALL 0x%06X", k*2);
517 else
518 (*prin) (stream, " JMP 0x%06X", k*2);
519 cmd_len = 4;
520 }
521 else if (IFMASK(0x010f, 0x0008))
522 {
523 int sf = (opcode & 0x70) >> 4;
524 if (opcode & 0x0080)
525 (*prin) (stream, " CL%c", SREG_flags[sf]);
526 else
527 (*prin) (stream, " SE%c", SREG_flags[sf]);
528 }
529 else if (IFMASK(0x001f, 0x0009))
530 {
531 if (opcode & 0x0100)
532 (*prin) (stream, " ICALL");
533 else
534 (*prin) (stream, " IJMP");
535 }
536 else if (IFMASK(0x001f, 0x0019))
537 {
538 if (opcode & 0x0100)
539 (*prin) (stream, " EICALL");
540 else
541 (*prin) (stream, " EIJMP");
542 }
543 else if (IFMASK(0x010f, 0x0108))
544 {
545 if (IFMASK(0x0090, 0x0000))
546 (*prin) (stream, " RET");
547 else if (IFMASK(0x0090, 0x0010))
548 (*prin) (stream, " RETI");
549 else if (IFMASK(0x00e0, 0x0080))
550 (*prin) (stream, " SLEEP");
551 else if (IFMASK(0x00e0, 0x00a0))
552 (*prin) (stream, " WDR");
553 else if (IFMASK(0x00f0, 0x00c0))
554 (*prin) (stream, " LPM");
555 else if (IFMASK(0x00f0, 0x00d0))
556 (*prin) (stream, " ELPM");
557 else if (IFMASK(0x00f0, 0x00e0))
558 (*prin) (stream, " SPM");
559 else if (IFMASK(0x00f0, 0x00f0))
560 (*prin) (stream, " ESPM");
561 else
562 (*prin) (stream, " ????");
563 }
564 else
565 {
566 const char* p;
567 reg50(opcode, rd);
568 p = sect94[opcode & 0xf];
569 if (!p)
570 p = "????";
571 (*prin) (stream, " %-8s%s", p, rd);
572 }
573 }
574 break;
575 case 0x0600:
576 {
577 if (opcode & 0x0200)
578 {
579 lit204(opcode, rd);
580 reg20w(opcode, rr);
581 if (opcode & 0x0100)
582 (*prin) (stream, " SBIW %s,%s", rr, rd);
583 else
584 (*prin) (stream, " ADIW %s,%s", rr, rd);
585 }
586 }
587 break;
588 case 0x0800:
589 case 0x0a00:
590 {
591 (*prin) (stream, " %-8s0x%02X,%d",
592 sect98[(opcode & 0x0300) >> 8],
593 (opcode & 0xf8) >> 3,
594 opcode & 7);
595 }
596 break;
597 default:
598 {
599 reg50(opcode, rd);
600 reg104(opcode, rr);
601 (*prin) (stream, " MUL %s,%s", rd, rr);
602 }
603 }
604 }
605 break;
606 case 0xb000:
607 {
608 reg50(opcode, rd);
609 regPP(opcode, rr);
610 if (opcode & 0x0800)
611 (*prin) (stream, " OUT %s,%s", rr, rd);
612 else
613 (*prin) (stream, " IN %s,%s", rd, rr);
614 }
615 break;
616 case 0xc000:
617 {
618 add0fff(opcode, rd, addr);
619 (*prin) (stream, " RJMP %s", rd);
620 }
621 break;
622 case 0xd000:
623 {
624 add0fff(opcode, rd, addr);
625 (*prin) (stream, " RCALL %s", rd);
626 }
627 break;
628 case 0xe000:
629 {
630 reg40(opcode, rd);
631 lit404(opcode, rr);
632 (*prin) (stream, " LDI %s,%s", rd, rr);
633 }
634 break;
635 case 0xf000:
636 {
637 if (opcode & 0x0800)
638 {
639 reg50(opcode, rd);
640 (*prin) (stream, " %-8s%s,%d",
641 last4[(opcode & 0x0600) >> 9],
642 rd, opcode & 7);
643 }
644 else
645 {
646 char* p;
647 add03f8(opcode, rd, addr);
648 p = branchs[((opcode & 0x0400) >> 7) | (opcode & 7)];
649 (*prin) (stream, " %-8s%s", p, rd);
650 }
651 }
652 break;
653 }
654 }
655 return cmd_len;
656 }