opcodes/fr30-ibld.c

   1 /* DO NOT EDIT!  -*- buffer-read-only: t -*- vi:set ro:  */
   2 /* Instruction building/extraction support for fr30. -*- C -*-
   3
   4    THIS FILE IS MACHINE GENERATED WITH CGEN: Cpu tools GENerator.
   5    - the resultant file is machine generated, cgen-ibld.in isn't
   6
   7    Copyright (C) 1996-2018 Free Software Foundation, Inc.
   8
   9    This file is part of libopcodes.
  10
  11    This library is free software; you can redistribute it and/or modify
  12    it under the terms of the GNU General Public License as published by
  13    the Free Software Foundation; either version 3, or (at your option)
  14    any later version.
  15
  16    It is distributed in the hope that it will be useful, but WITHOUT
  17    ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
  18    or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
  19    License for more details.
  20
  21    You should have received a copy of the GNU General Public License
  22    along with this program; if not, write to the Free Software Foundation, Inc.,
  23    51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA.  */
  24
  25 /* ??? Eventually more and more of this stuff can go to cpu-independent files.
  26    Keep that in mind.  */
  27
  28 #include "sysdep.h"
  29 #include <stdio.h>
  30 #include "ansidecl.h"
  31 #include "dis-asm.h"
  32 #include "bfd.h"
  33 #include "symcat.h"
  34 #include "fr30-desc.h"
  35 #include "fr30-opc.h"
  36 #include "cgen/basic-modes.h"
  37 #include "opintl.h"
  38 #include "safe-ctype.h"
  39
  40 #undef  min
  41 #define min(a,b) ((a) < (b) ? (a) : (b))
  42 #undef  max
  43 #define max(a,b) ((a) > (b) ? (a) : (b))
  44
  45 /* Used by the ifield rtx function.  */
  46 #define FLD(f) (fields->f)
  47
  48 static const char * insert_normal
  49   (CGEN_CPU_DESC, long, unsigned int, unsigned int, unsigned int,
  50    unsigned int, unsigned int, unsigned int, CGEN_INSN_BYTES_PTR);
  51 static const char * insert_insn_normal
  52   (CGEN_CPU_DESC, const CGEN_INSN *,
  53    CGEN_FIELDS *, CGEN_INSN_BYTES_PTR, bfd_vma);
  54 static int extract_normal
  55   (CGEN_CPU_DESC, CGEN_EXTRACT_INFO *, CGEN_INSN_INT,
  56    unsigned int, unsigned int, unsigned int, unsigned int,
  57    unsigned int, unsigned int, bfd_vma, long *);
  58 static int extract_insn_normal
  59   (CGEN_CPU_DESC, const CGEN_INSN *, CGEN_EXTRACT_INFO *,
  60    CGEN_INSN_INT, CGEN_FIELDS *, bfd_vma);
  61 #if CGEN_INT_INSN_P
  62 static void put_insn_int_value
  63   (CGEN_CPU_DESC, CGEN_INSN_BYTES_PTR, int, int, CGEN_INSN_INT);
  64 #endif
  65 #if ! CGEN_INT_INSN_P
  66 static CGEN_INLINE void insert_1
  67   (CGEN_CPU_DESC, unsigned long, int, int, int, unsigned char *);
  68 static CGEN_INLINE int fill_cache
  69   (CGEN_CPU_DESC, CGEN_EXTRACT_INFO *,  int, int, bfd_vma);
  70 static CGEN_INLINE long extract_1
  71   (CGEN_CPU_DESC, CGEN_EXTRACT_INFO *, int, int, int, unsigned char *, bfd_vma);
  72 #endif
  73 \f
  74 /* Operand insertion.  */
  75
  76 #if ! CGEN_INT_INSN_P
  77
  78 /* Subroutine of insert_normal.  */
  79
  80 static CGEN_INLINE void
  81 insert_1 (CGEN_CPU_DESC cd,
  82           unsigned long value,
  83           int start,
  84           int length,
  85           int word_length,
  86           unsigned char *bufp)
  87 {
  88   unsigned long x,mask;
  89   int shift;
  90
  91   x = cgen_get_insn_value (cd, bufp, word_length);
  92
  93   /* Written this way to avoid undefined behaviour.  */
  94   mask = (((1L << (length - 1)) - 1) << 1) | 1;
  95   if (CGEN_INSN_LSB0_P)
  96     shift = (start + 1) - length;
  97   else
  98     shift = (word_length - (start + length));
  99   x = (x & ~(mask << shift)) | ((value & mask) << shift);
 100
 101   cgen_put_insn_value (cd, bufp, word_length, (bfd_vma) x);
 102 }
 103
 104 #endif /* ! CGEN_INT_INSN_P */
 105
 106 /* Default insertion routine.
 107
 108    ATTRS is a mask of the boolean attributes.
 109    WORD_OFFSET is the offset in bits from the start of the insn of the value.
 110    WORD_LENGTH is the length of the word in bits in which the value resides.
 111    START is the starting bit number in the word, architecture origin.
 112    LENGTH is the length of VALUE in bits.
 113    TOTAL_LENGTH is the total length of the insn in bits.
 114
 115    The result is an error message or NULL if success.  */
 116
 117 /* ??? This duplicates functionality with bfd's howto table and
 118    bfd_install_relocation.  */
 119 /* ??? This doesn't handle bfd_vma's.  Create another function when
 120    necessary.  */
 121
 122 static const char *
 123 insert_normal (CGEN_CPU_DESC cd,
 124                long value,
 125                unsigned int attrs,
 126                unsigned int word_offset,
 127                unsigned int start,
 128                unsigned int length,
 129                unsigned int word_length,
 130                unsigned int total_length,
 131                CGEN_INSN_BYTES_PTR buffer)
 132 {
 133   static char errbuf[100];
 134   /* Written this way to avoid undefined behaviour.  */
 135   unsigned long mask = (((1L << (length - 1)) - 1) << 1) | 1;
 136
 137   /* If LENGTH is zero, this operand doesn't contribute to the value.  */
 138   if (length == 0)
 139     return NULL;
 140
 141   if (word_length > 8 * sizeof (CGEN_INSN_INT))
 142     abort ();
 143
 144   /* For architectures with insns smaller than the base-insn-bitsize,
 145      word_length may be too big.  */
 146   if (cd->min_insn_bitsize < cd->base_insn_bitsize)
 147     {
 148       if (word_offset == 0
 149           && word_length > total_length)
 150         word_length = total_length;
 151     }
 152
 153   /* Ensure VALUE will fit.  */
 154   if (CGEN_BOOL_ATTR (attrs, CGEN_IFLD_SIGN_OPT))
 155     {
 156       long minval = - (1L << (length - 1));
 157       unsigned long maxval = mask;
 158
 159       if ((value > 0 && (unsigned long) value > maxval)
 160           || value < minval)
 161         {
 162           /* xgettext:c-format */
 163           sprintf (errbuf,
 164                    _("operand out of range (%ld not between %ld and %lu)"),
 165                    value, minval, maxval);
 166           return errbuf;
 167         }
 168     }
 169   else if (! CGEN_BOOL_ATTR (attrs, CGEN_IFLD_SIGNED))
 170     {
 171       unsigned long maxval = mask;
 172       unsigned long val = (unsigned long) value;
 173
 174       /* For hosts with a word size > 32 check to see if value has been sign
 175          extended beyond 32 bits.  If so then ignore these higher sign bits
 176          as the user is attempting to store a 32-bit signed value into an
 177          unsigned 32-bit field which is allowed.  */
 178       if (sizeof (unsigned long) > 4 && ((value >> 32) == -1))
 179         val &= 0xFFFFFFFF;
 180
 181       if (val > maxval)
 182         {
 183           /* xgettext:c-format */
 184           sprintf (errbuf,
 185                    _("operand out of range (0x%lx not between 0 and 0x%lx)"),
 186                    val, maxval);
 187           return errbuf;
 188         }
 189     }
 190   else
 191     {
 192       if (! cgen_signed_overflow_ok_p (cd))
 193         {
 194           long minval = - (1L << (length - 1));
 195           long maxval =   (1L << (length - 1)) - 1;
 196
 197           if (value < minval || value > maxval)
 198             {
 199               sprintf
 200                 /* xgettext:c-format */
 201                 (errbuf, _("operand out of range (%ld not between %ld and %ld)"),
 202                  value, minval, maxval);
 203               return errbuf;
 204             }
 205         }
 206     }
 207
 208 #if CGEN_INT_INSN_P
 209
 210   {
 211     int shift_within_word, shift_to_word, shift;
 212
 213     /* How to shift the value to BIT0 of the word.  */
 214     shift_to_word = total_length - (word_offset + word_length);
 215
 216     /* How to shift the value to the field within the word.  */
 217     if (CGEN_INSN_LSB0_P)
 218       shift_within_word = start + 1 - length;
 219     else
 220       shift_within_word = word_length - start - length;
 221
 222     /* The total SHIFT, then mask in the value.  */
 223     shift = shift_to_word + shift_within_word;
 224     *buffer = (*buffer & ~(mask << shift)) | ((value & mask) << shift);
 225   }
 226
 227 #else /* ! CGEN_INT_INSN_P */
 228
 229   {
 230     unsigned char *bufp = (unsigned char *) buffer + word_offset / 8;
 231
 232     insert_1 (cd, value, start, length, word_length, bufp);
 233   }
 234
 235 #endif /* ! CGEN_INT_INSN_P */
 236
 237   return NULL;
 238 }
 239
 240 /* Default insn builder (insert handler).
 241    The instruction is recorded in CGEN_INT_INSN_P byte order (meaning
 242    that if CGEN_INSN_BYTES_PTR is an int * and thus, the value is
 243    recorded in host byte order, otherwise BUFFER is an array of bytes
 244    and the value is recorded in target byte order).
 245    The result is an error message or NULL if success.  */
 246
 247 static const char *
 248 insert_insn_normal (CGEN_CPU_DESC cd,
 249                     const CGEN_INSN * insn,
 250                     CGEN_FIELDS * fields,
 251                     CGEN_INSN_BYTES_PTR buffer,
 252                     bfd_vma pc)
 253 {
 254   const CGEN_SYNTAX *syntax = CGEN_INSN_SYNTAX (insn);
 255   unsigned long value;
 256   const CGEN_SYNTAX_CHAR_TYPE * syn;
 257
 258   CGEN_INIT_INSERT (cd);
 259   value = CGEN_INSN_BASE_VALUE (insn);
 260
 261   /* If we're recording insns as numbers (rather than a string of bytes),
 262      target byte order handling is deferred until later.  */
 263
 264 #if CGEN_INT_INSN_P
 265
 266   put_insn_int_value (cd, buffer, cd->base_insn_bitsize,
 267                       CGEN_FIELDS_BITSIZE (fields), value);
 268
 269 #else
 270
 271   cgen_put_insn_value (cd, buffer, min ((unsigned) cd->base_insn_bitsize,
 272                                         (unsigned) CGEN_FIELDS_BITSIZE (fields)),
 273                        value);
 274
 275 #endif /* ! CGEN_INT_INSN_P */
 276
 277   /* ??? It would be better to scan the format's fields.
 278      Still need to be able to insert a value based on the operand though;
 279      e.g. storing a branch displacement that got resolved later.
 280      Needs more thought first.  */
 281
 282   for (syn = CGEN_SYNTAX_STRING (syntax); * syn; ++ syn)
 283     {
 284       const char *errmsg;
 285
 286       if (CGEN_SYNTAX_CHAR_P (* syn))
 287         continue;
 288
 289       errmsg = (* cd->insert_operand) (cd, CGEN_SYNTAX_FIELD (*syn),
 290                                        fields, buffer, pc);
 291       if (errmsg)
 292         return errmsg;
 293     }
 294
 295   return NULL;
 296 }
 297
 298 #if CGEN_INT_INSN_P
 299 /* Cover function to store an insn value into an integral insn.  Must go here
 300    because it needs <prefix>-desc.h for CGEN_INT_INSN_P.  */
 301
 302 static void
 303 put_insn_int_value (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
 304                     CGEN_INSN_BYTES_PTR buf,
 305                     int length,
 306                     int insn_length,
 307                     CGEN_INSN_INT value)
 308 {
 309   /* For architectures with insns smaller than the base-insn-bitsize,
 310      length may be too big.  */
 311   if (length > insn_length)
 312     *buf = value;
 313   else
 314     {
 315       int shift = insn_length - length;
 316       /* Written this way to avoid undefined behaviour.  */
 317       CGEN_INSN_INT mask = (((1L << (length - 1)) - 1) << 1) | 1;
 318
 319       *buf = (*buf & ~(mask << shift)) | ((value & mask) << shift);
 320     }
 321 }
 322 #endif
 323 \f
 324 /* Operand extraction.  */
 325
 326 #if ! CGEN_INT_INSN_P
 327
 328 /* Subroutine of extract_normal.
 329    Ensure sufficient bytes are cached in EX_INFO.
 330    OFFSET is the offset in bytes from the start of the insn of the value.
 331    BYTES is the length of the needed value.
 332    Returns 1 for success, 0 for failure.  */
 333
 334 static CGEN_INLINE int
 335 fill_cache (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
 336             CGEN_EXTRACT_INFO *ex_info,
 337             int offset,
 338             int bytes,
 339             bfd_vma pc)
 340 {
 341   /* It's doubtful that the middle part has already been fetched so
 342      we don't optimize that case.  kiss.  */
 343   unsigned int mask;
 344   disassemble_info *info = (disassemble_info *) ex_info->dis_info;
 345
 346   /* First do a quick check.  */
 347   mask = (1 << bytes) - 1;
 348   if (((ex_info->valid >> offset) & mask) == mask)
 349     return 1;
 350
 351   /* Search for the first byte we need to read.  */
 352   for (mask = 1 << offset; bytes > 0; --bytes, ++offset, mask <<= 1)
 353     if (! (mask & ex_info->valid))
 354       break;
 355
 356   if (bytes)
 357     {
 358       int status;
 359
 360       pc += offset;
 361       status = (*info->read_memory_func)
 362         (pc, ex_info->insn_bytes + offset, bytes, info);
 363
 364       if (status != 0)
 365         {
 366           (*info->memory_error_func) (status, pc, info);
 367           return 0;
 368         }
 369
 370       ex_info->valid |= ((1 << bytes) - 1) << offset;
 371     }
 372
 373   return 1;
 374 }
 375
 376 /* Subroutine of extract_normal.  */
 377
 378 static CGEN_INLINE long
 379 extract_1 (CGEN_CPU_DESC cd,
 380            CGEN_EXTRACT_INFO *ex_info ATTRIBUTE_UNUSED,
 381            int start,
 382            int length,
 383            int word_length,
 384            unsigned char *bufp,
 385            bfd_vma pc ATTRIBUTE_UNUSED)
 386 {
 387   unsigned long x;
 388   int shift;
 389
 390   x = cgen_get_insn_value (cd, bufp, word_length);
 391
 392   if (CGEN_INSN_LSB0_P)
 393     shift = (start + 1) - length;
 394   else
 395     shift = (word_length - (start + length));
 396   return x >> shift;
 397 }
 398
 399 #endif /* ! CGEN_INT_INSN_P */
 400
 401 /* Default extraction routine.
 402
 403    INSN_VALUE is the first base_insn_bitsize bits of the insn in host order,
 404    or sometimes less for cases like the m32r where the base insn size is 32
 405    but some insns are 16 bits.
 406    ATTRS is a mask of the boolean attributes.  We only need `SIGNED',
 407    but for generality we take a bitmask of all of them.
 408    WORD_OFFSET is the offset in bits from the start of the insn of the value.
 409    WORD_LENGTH is the length of the word in bits in which the value resides.
 410    START is the starting bit number in the word, architecture origin.
 411    LENGTH is the length of VALUE in bits.
 412    TOTAL_LENGTH is the total length of the insn in bits.
 413
 414    Returns 1 for success, 0 for failure.  */
 415
 416 /* ??? The return code isn't properly used.  wip.  */
 417
 418 /* ??? This doesn't handle bfd_vma's.  Create another function when
 419    necessary.  */
 420
 421 static int
 422 extract_normal (CGEN_CPU_DESC cd,
 423 #if ! CGEN_INT_INSN_P
 424                 CGEN_EXTRACT_INFO *ex_info,
 425 #else
 426                 CGEN_EXTRACT_INFO *ex_info ATTRIBUTE_UNUSED,
 427 #endif
 428                 CGEN_INSN_INT insn_value,
 429                 unsigned int attrs,
 430                 unsigned int word_offset,
 431                 unsigned int start,
 432                 unsigned int length,
 433                 unsigned int word_length,
 434                 unsigned int total_length,
 435 #if ! CGEN_INT_INSN_P
 436                 bfd_vma pc,
 437 #else
 438                 bfd_vma pc ATTRIBUTE_UNUSED,
 439 #endif
 440                 long *valuep)
 441 {
 442   long value, mask;
 443
 444   /* If LENGTH is zero, this operand doesn't contribute to the value
 445      so give it a standard value of zero.  */
 446   if (length == 0)
 447     {
 448       *valuep = 0;
 449       return 1;
 450     }
 451
 452   if (word_length > 8 * sizeof (CGEN_INSN_INT))
 453     abort ();
 454
 455   /* For architectures with insns smaller than the insn-base-bitsize,
 456      word_length may be too big.  */
 457   if (cd->min_insn_bitsize < cd->base_insn_bitsize)
 458     {
 459       if (word_offset + word_length > total_length)
 460         word_length = total_length - word_offset;
 461     }
 462
 463   /* Does the value reside in INSN_VALUE, and at the right alignment?  */
 464
 465   if (CGEN_INT_INSN_P || (word_offset == 0 && word_length == total_length))
 466     {
 467       if (CGEN_INSN_LSB0_P)
 468         value = insn_value >> ((word_offset + start + 1) - length);
 469       else
 470         value = insn_value >> (total_length - ( word_offset + start + length));
 471     }
 472
 473 #if ! CGEN_INT_INSN_P
 474
 475   else
 476     {
 477       unsigned char *bufp = ex_info->insn_bytes + word_offset / 8;
 478
 479       if (word_length > 8 * sizeof (CGEN_INSN_INT))
 480         abort ();
 481
 482       if (fill_cache (cd, ex_info, word_offset / 8, word_length / 8, pc) == 0)
 483         return 0;
 484
 485       value = extract_1 (cd, ex_info, start, length, word_length, bufp, pc);
 486     }
 487
 488 #endif /* ! CGEN_INT_INSN_P */
 489
 490   /* Written this way to avoid undefined behaviour.  */
 491   mask = (((1L << (length - 1)) - 1) << 1) | 1;
 492
 493   value &= mask;
 494   /* sign extend? */
 495   if (CGEN_BOOL_ATTR (attrs, CGEN_IFLD_SIGNED)
 496       && (value & (1L << (length - 1))))
 497     value |= ~mask;
 498
 499   *valuep = value;
 500
 501   return 1;
 502 }
 503
 504 /* Default insn extractor.
 505
 506    INSN_VALUE is the first base_insn_bitsize bits, translated to host order.
 507    The extracted fields are stored in FIELDS.
 508    EX_INFO is used to handle reading variable length insns.
 509    Return the length of the insn in bits, or 0 if no match,
 510    or -1 if an error occurs fetching data (memory_error_func will have
 511    been called).  */
 512
 513 static int
 514 extract_insn_normal (CGEN_CPU_DESC cd,
 515                      const CGEN_INSN *insn,
 516                      CGEN_EXTRACT_INFO *ex_info,
 517                      CGEN_INSN_INT insn_value,
 518                      CGEN_FIELDS *fields,
 519                      bfd_vma pc)
 520 {
 521   const CGEN_SYNTAX *syntax = CGEN_INSN_SYNTAX (insn);
 522   const CGEN_SYNTAX_CHAR_TYPE *syn;
 523
 524   CGEN_FIELDS_BITSIZE (fields) = CGEN_INSN_BITSIZE (insn);
 525
 526   CGEN_INIT_EXTRACT (cd);
 527
 528   for (syn = CGEN_SYNTAX_STRING (syntax); *syn; ++syn)
 529     {
 530       int length;
 531
 532       if (CGEN_SYNTAX_CHAR_P (*syn))
 533         continue;
 534
 535       length = (* cd->extract_operand) (cd, CGEN_SYNTAX_FIELD (*syn),
 536                                         ex_info, insn_value, fields, pc);
 537       if (length <= 0)
 538         return length;
 539     }
 540
 541   /* We recognized and successfully extracted this insn.  */
 542   return CGEN_INSN_BITSIZE (insn);
 543 }
 544 \f
 545 /* Machine generated code added here.  */
 546
 547 const char * fr30_cgen_insert_operand
 548   (CGEN_CPU_DESC, int, CGEN_FIELDS *, CGEN_INSN_BYTES_PTR, bfd_vma);
 549
 550 /* Main entry point for operand insertion.
 551
 552    This function is basically just a big switch statement.  Earlier versions
 553    used tables to look up the function to use, but
 554    - if the table contains both assembler and disassembler functions then
 555      the disassembler contains much of the assembler and vice-versa,
 556    - there's a lot of inlining possibilities as things grow,
 557    - using a switch statement avoids the function call overhead.
 558
 559    This function could be moved into `parse_insn_normal', but keeping it
 560    separate makes clear the interface between `parse_insn_normal' and each of
 561    the handlers.  It's also needed by GAS to insert operands that couldn't be
 562    resolved during parsing.  */
 563
 564 const char *
 565 fr30_cgen_insert_operand (CGEN_CPU_DESC cd,
 566                              int opindex,
 567                              CGEN_FIELDS * fields,
 568                              CGEN_INSN_BYTES_PTR buffer,
 569                              bfd_vma pc ATTRIBUTE_UNUSED)
 570 {
 571   const char * errmsg = NULL;
 572   unsigned int total_length = CGEN_FIELDS_BITSIZE (fields);
 573
 574   switch (opindex)
 575     {
 576     case FR30_OPERAND_CRI :
 577       errmsg = insert_normal (cd, fields->f_CRi, 0, 16, 12, 4, 16, total_length, buffer);
 578       break;
 579     case FR30_OPERAND_CRJ :
 580       errmsg = insert_normal (cd, fields->f_CRj, 0, 16, 8, 4, 16, total_length, buffer);
 581       break;
 582     case FR30_OPERAND_R13 :
 583       break;
 584     case FR30_OPERAND_R14 :
 585       break;
 586     case FR30_OPERAND_R15 :
 587       break;
 588     case FR30_OPERAND_RI :
 589       errmsg = insert_normal (cd, fields->f_Ri, 0, 0, 12, 4, 16, total_length, buffer);
 590       break;
 591     case FR30_OPERAND_RIC :
 592       errmsg = insert_normal (cd, fields->f_Ric, 0, 16, 12, 4, 16, total_length, buffer);
 593       break;
 594     case FR30_OPERAND_RJ :
 595       errmsg = insert_normal (cd, fields->f_Rj, 0, 0, 8, 4, 16, total_length, buffer);
 596       break;
 597     case FR30_OPERAND_RJC :
 598       errmsg = insert_normal (cd, fields->f_Rjc, 0, 16, 8, 4, 16, total_length, buffer);
 599       break;
 600     case FR30_OPERAND_RS1 :
 601       errmsg = insert_normal (cd, fields->f_Rs1, 0, 0, 8, 4, 16, total_length, buffer);
 602       break;
 603     case FR30_OPERAND_RS2 :
 604       errmsg = insert_normal (cd, fields->f_Rs2, 0, 0, 12, 4, 16, total_length, buffer);
 605       break;
 606     case FR30_OPERAND_CC :
 607       errmsg = insert_normal (cd, fields->f_cc, 0, 0, 4, 4, 16, total_length, buffer);
 608       break;
 609     case FR30_OPERAND_CCC :
 610       errmsg = insert_normal (cd, fields->f_ccc, 0, 16, 0, 8, 16, total_length, buffer);
 611       break;
 612     case FR30_OPERAND_DIR10 :
 613       {
 614         long value = fields->f_dir10;
 615         value = ((USI) (value) >> (2));
 616         errmsg = insert_normal (cd, value, 0, 0, 8, 8, 16, total_length, buffer);
 617       }
 618       break;
 619     case FR30_OPERAND_DIR8 :
 620       errmsg = insert_normal (cd, fields->f_dir8, 0, 0, 8, 8, 16, total_length, buffer);
 621       break;
 622     case FR30_OPERAND_DIR9 :
 623       {
 624         long value = fields->f_dir9;
 625         value = ((USI) (value) >> (1));
 626         errmsg = insert_normal (cd, value, 0, 0, 8, 8, 16, total_length, buffer);
 627       }
 628       break;
 629     case FR30_OPERAND_DISP10 :
 630       {
 631         long value = fields->f_disp10;
 632         value = ((SI) (value) >> (2));
 633         errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED), 0, 4, 8, 16, total_length, buffer);
 634       }
 635       break;
 636     case FR30_OPERAND_DISP8 :
 637       errmsg = insert_normal (cd, fields->f_disp8, 0|(1<<CGEN_IFLD_SIGNED), 0, 4, 8, 16, total_length, buffer);
 638       break;
 639     case FR30_OPERAND_DISP9 :
 640       {
 641         long value = fields->f_disp9;
 642         value = ((SI) (value) >> (1));
 643         errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED), 0, 4, 8, 16, total_length, buffer);
 644       }
 645       break;
 646     case FR30_OPERAND_I20 :
 647       {
 648 {
 649   FLD (f_i20_4) = ((UINT) (FLD (f_i20)) >> (16));
 650   FLD (f_i20_16) = ((FLD (f_i20)) & (65535));
 651 }
 652         errmsg = insert_normal (cd, fields->f_i20_4, 0, 0, 8, 4, 16, total_length, buffer);
 653         if (errmsg)
 654           break;
 655         errmsg = insert_normal (cd, fields->f_i20_16, 0, 16, 0, 16, 16, total_length, buffer);
 656         if (errmsg)
 657           break;
 658       }
 659       break;
 660     case FR30_OPERAND_I32 :
 661       errmsg = insert_normal (cd, fields->f_i32, 0|(1<<CGEN_IFLD_SIGN_OPT), 16, 0, 32, 32, total_length, buffer);
 662       break;
 663     case FR30_OPERAND_I8 :
 664       errmsg = insert_normal (cd, fields->f_i8, 0, 0, 4, 8, 16, total_length, buffer);
 665       break;
 666     case FR30_OPERAND_LABEL12 :
 667       {
 668         long value = fields->f_rel12;
 669         value = ((SI) (((value) - (((pc) + (2))))) >> (1));
 670         errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 5, 11, 16, total_length, buffer);
 671       }
 672       break;
 673     case FR30_OPERAND_LABEL9 :
 674       {
 675         long value = fields->f_rel9;
 676         value = ((SI) (((value) - (((pc) + (2))))) >> (1));
 677         errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 8, 8, 16, total_length, buffer);
 678       }
 679       break;
 680     case FR30_OPERAND_M4 :
 681       {
 682         long value = fields->f_m4;
 683         value = ((value) & (15));
 684         errmsg = insert_normal (cd, value, 0, 0, 8, 4, 16, total_length, buffer);
 685       }
 686       break;
 687     case FR30_OPERAND_PS :
 688       break;
 689     case FR30_OPERAND_REGLIST_HI_LD :
 690       errmsg = insert_normal (cd, fields->f_reglist_hi_ld, 0, 0, 8, 8, 16, total_length, buffer);
 691       break;
 692     case FR30_OPERAND_REGLIST_HI_ST :
 693       errmsg = insert_normal (cd, fields->f_reglist_hi_st, 0, 0, 8, 8, 16, total_length, buffer);
 694       break;
 695     case FR30_OPERAND_REGLIST_LOW_LD :
 696       errmsg = insert_normal (cd, fields->f_reglist_low_ld, 0, 0, 8, 8, 16, total_length, buffer);
 697       break;
 698     case FR30_OPERAND_REGLIST_LOW_ST :
 699       errmsg = insert_normal (cd, fields->f_reglist_low_st, 0, 0, 8, 8, 16, total_length, buffer);
 700       break;
 701     case FR30_OPERAND_S10 :
 702       {
 703         long value = fields->f_s10;
 704         value = ((SI) (value) >> (2));
 705         errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED), 0, 8, 8, 16, total_length, buffer);
 706       }
 707       break;
 708     case FR30_OPERAND_U10 :
 709       {
 710         long value = fields->f_u10;
 711         value = ((USI) (value) >> (2));
 712         errmsg = insert_normal (cd, value, 0, 0, 8, 8, 16, total_length, buffer);
 713       }
 714       break;
 715     case FR30_OPERAND_U4 :
 716       errmsg = insert_normal (cd, fields->f_u4, 0, 0, 8, 4, 16, total_length, buffer);
 717       break;
 718     case FR30_OPERAND_U4C :
 719       errmsg = insert_normal (cd, fields->f_u4c, 0, 0, 12, 4, 16, total_length, buffer);
 720       break;
 721     case FR30_OPERAND_U8 :
 722       errmsg = insert_normal (cd, fields->f_u8, 0, 0, 8, 8, 16, total_length, buffer);
 723       break;
 724     case FR30_OPERAND_UDISP6 :
 725       {
 726         long value = fields->f_udisp6;
 727         value = ((USI) (value) >> (2));
 728         errmsg = insert_normal (cd, value, 0, 0, 8, 4, 16, total_length, buffer);
 729       }
 730       break;
 731
 732     default :
 733       /* xgettext:c-format */
 734       fprintf (stderr, _("Unrecognized field %d while building insn.\n"),
 735                opindex);
 736       abort ();
 737   }
 738
 739   return errmsg;
 740 }
 741
 742 int fr30_cgen_extract_operand
 743   (CGEN_CPU_DESC, int, CGEN_EXTRACT_INFO *, CGEN_INSN_INT, CGEN_FIELDS *, bfd_vma);
 744
 745 /* Main entry point for operand extraction.
 746    The result is <= 0 for error, >0 for success.
 747    ??? Actual values aren't well defined right now.
 748
 749    This function is basically just a big switch statement.  Earlier versions
 750    used tables to look up the function to use, but
 751    - if the table contains both assembler and disassembler functions then
 752      the disassembler contains much of the assembler and vice-versa,
 753    - there's a lot of inlining possibilities as things grow,
 754    - using a switch statement avoids the function call overhead.
 755
 756    This function could be moved into `print_insn_normal', but keeping it
 757    separate makes clear the interface between `print_insn_normal' and each of
 758    the handlers.  */
 759
 760 int
 761 fr30_cgen_extract_operand (CGEN_CPU_DESC cd,
 762                              int opindex,
 763                              CGEN_EXTRACT_INFO *ex_info,
 764                              CGEN_INSN_INT insn_value,
 765                              CGEN_FIELDS * fields,
 766                              bfd_vma pc)
 767 {
 768   /* Assume success (for those operands that are nops).  */
 769   int length = 1;
 770   unsigned int total_length = CGEN_FIELDS_BITSIZE (fields);
 771
 772   switch (opindex)
 773     {
 774     case FR30_OPERAND_CRI :
 775       length = extract_normal (cd, ex_info, insn_value, 0, 16, 12, 4, 16, total_length, pc, & fields->f_CRi);
 776       break;
 777     case FR30_OPERAND_CRJ :
 778       length = extract_normal (cd, ex_info, insn_value, 0, 16, 8, 4, 16, total_length, pc, & fields->f_CRj);
 779       break;
 780     case FR30_OPERAND_R13 :
 781       break;
 782     case FR30_OPERAND_R14 :
 783       break;
 784     case FR30_OPERAND_R15 :
 785       break;
 786     case FR30_OPERAND_RI :
 787       length = extract_normal (cd, ex_info, insn_value, 0, 0, 12, 4, 16, total_length, pc, & fields->f_Ri);
 788       break;
 789     case FR30_OPERAND_RIC :
 790       length = extract_normal (cd, ex_info, insn_value, 0, 16, 12, 4, 16, total_length, pc, & fields->f_Ric);
 791       break;
 792     case FR30_OPERAND_RJ :
 793       length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 4, 16, total_length, pc, & fields->f_Rj);
 794       break;
 795     case FR30_OPERAND_RJC :
 796       length = extract_normal (cd, ex_info, insn_value, 0, 16, 8, 4, 16, total_length, pc, & fields->f_Rjc);
 797       break;
 798     case FR30_OPERAND_RS1 :
 799       length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 4, 16, total_length, pc, & fields->f_Rs1);
 800       break;
 801     case FR30_OPERAND_RS2 :
 802       length = extract_normal (cd, ex_info, insn_value, 0, 0, 12, 4, 16, total_length, pc, & fields->f_Rs2);
 803       break;
 804     case FR30_OPERAND_CC :
 805       length = extract_normal (cd, ex_info, insn_value, 0, 0, 4, 4, 16, total_length, pc, & fields->f_cc);
 806       break;
 807     case FR30_OPERAND_CCC :
 808       length = extract_normal (cd, ex_info, insn_value, 0, 16, 0, 8, 16, total_length, pc, & fields->f_ccc);
 809       break;
 810     case FR30_OPERAND_DIR10 :
 811       {
 812         long value;
 813         length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 8, 16, total_length, pc, & value);
 814         value = ((value) << (2));
 815         fields->f_dir10 = value;
 816       }
 817       break;
 818     case FR30_OPERAND_DIR8 :
 819       length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 8, 16, total_length, pc, & fields->f_dir8);
 820       break;
 821     case FR30_OPERAND_DIR9 :
 822       {
 823         long value;
 824         length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 8, 16, total_length, pc, & value);
 825         value = ((value) << (1));
 826         fields->f_dir9 = value;
 827       }
 828       break;
 829     case FR30_OPERAND_DISP10 :
 830       {
 831         long value;
 832         length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 4, 8, 16, total_length, pc, & value);
 833         value = ((value) << (2));
 834         fields->f_disp10 = value;
 835       }
 836       break;
 837     case FR30_OPERAND_DISP8 :
 838       length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 4, 8, 16, total_length, pc, & fields->f_disp8);
 839       break;
 840     case FR30_OPERAND_DISP9 :
 841       {
 842         long value;
 843         length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 4, 8, 16, total_length, pc, & value);
 844         value = ((value) << (1));
 845         fields->f_disp9 = value;
 846       }
 847       break;
 848     case FR30_OPERAND_I20 :
 849       {
 850         length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 4, 16, total_length, pc, & fields->f_i20_4);
 851         if (length <= 0) break;
 852         length = extract_normal (cd, ex_info, insn_value, 0, 16, 0, 16, 16, total_length, pc, & fields->f_i20_16);
 853         if (length <= 0) break;
 854 {
 855   FLD (f_i20) = ((((FLD (f_i20_4)) << (16))) | (FLD (f_i20_16)));
 856 }
 857       }
 858       break;
 859     case FR30_OPERAND_I32 :
 860       length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGN_OPT), 16, 0, 32, 32, total_length, pc, & fields->f_i32);
 861       break;
 862     case FR30_OPERAND_I8 :
 863       length = extract_normal (cd, ex_info, insn_value, 0, 0, 4, 8, 16, total_length, pc, & fields->f_i8);
 864       break;
 865     case FR30_OPERAND_LABEL12 :
 866       {
 867         long value;
 868         length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 5, 11, 16, total_length, pc, & value);
 869         value = ((((value) << (1))) + (((pc) + (2))));
 870         fields->f_rel12 = value;
 871       }
 872       break;
 873     case FR30_OPERAND_LABEL9 :
 874       {
 875         long value;
 876         length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 8, 8, 16, total_length, pc, & value);
 877         value = ((((value) << (1))) + (((pc) + (2))));
 878         fields->f_rel9 = value;
 879       }
 880       break;
 881     case FR30_OPERAND_M4 :
 882       {
 883         long value;
 884         length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 4, 16, total_length, pc, & value);
 885         value = ((value) | (-16));
 886         fields->f_m4 = value;
 887       }
 888       break;
 889     case FR30_OPERAND_PS :
 890       break;
 891     case FR30_OPERAND_REGLIST_HI_LD :
 892       length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 8, 16, total_length, pc, & fields->f_reglist_hi_ld);
 893       break;
 894     case FR30_OPERAND_REGLIST_HI_ST :
 895       length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 8, 16, total_length, pc, & fields->f_reglist_hi_st);
 896       break;
 897     case FR30_OPERAND_REGLIST_LOW_LD :
 898       length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 8, 16, total_length, pc, & fields->f_reglist_low_ld);
 899       break;
 900     case FR30_OPERAND_REGLIST_LOW_ST :
 901       length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 8, 16, total_length, pc, & fields->f_reglist_low_st);
 902       break;
 903     case FR30_OPERAND_S10 :
 904       {
 905         long value;
 906         length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 8, 8, 16, total_length, pc, & value);
 907         value = ((value) << (2));
 908         fields->f_s10 = value;
 909       }
 910       break;
 911     case FR30_OPERAND_U10 :
 912       {
 913         long value;
 914         length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 8, 16, total_length, pc, & value);
 915         value = ((value) << (2));
 916         fields->f_u10 = value;
 917       }
 918       break;
 919     case FR30_OPERAND_U4 :
 920       length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 4, 16, total_length, pc, & fields->f_u4);
 921       break;
 922     case FR30_OPERAND_U4C :
 923       length = extract_normal (cd, ex_info, insn_value, 0, 0, 12, 4, 16, total_length, pc, & fields->f_u4c);
 924       break;
 925     case FR30_OPERAND_U8 :
 926       length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 8, 16, total_length, pc, & fields->f_u8);
 927       break;
 928     case FR30_OPERAND_UDISP6 :
 929       {
 930         long value;
 931         length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 4, 16, total_length, pc, & value);
 932         value = ((value) << (2));
 933         fields->f_udisp6 = value;
 934       }
 935       break;
 936
 937     default :
 938       /* xgettext:c-format */
 939       fprintf (stderr, _("Unrecognized field %d while decoding insn.\n"),
 940                opindex);
 941       abort ();
 942     }
 943
 944   return length;
 945 }
 946
 947 cgen_insert_fn * const fr30_cgen_insert_handlers[] =
 948 {
 949   insert_insn_normal,
 950 };
 951
 952 cgen_extract_fn * const fr30_cgen_extract_handlers[] =
 953 {
 954   extract_insn_normal,
 955 };
 956
 957 int fr30_cgen_get_int_operand     (CGEN_CPU_DESC, int, const CGEN_FIELDS *);
 958 bfd_vma fr30_cgen_get_vma_operand (CGEN_CPU_DESC, int, const CGEN_FIELDS *);
 959
 960 /* Getting values from cgen_fields is handled by a collection of functions.
 961    They are distinguished by the type of the VALUE argument they return.
 962    TODO: floating point, inlining support, remove cases where result type
 963    not appropriate.  */
 964
 965 int
 966 fr30_cgen_get_int_operand (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
 967                              int opindex,
 968                              const CGEN_FIELDS * fields)
 969 {
 970   int value;
 971
 972   switch (opindex)
 973     {
 974     case FR30_OPERAND_CRI :
 975       value = fields->f_CRi;
 976       break;
 977     case FR30_OPERAND_CRJ :
 978       value = fields->f_CRj;
 979       break;
 980     case FR30_OPERAND_R13 :
 981       value = 0;
 982       break;
 983     case FR30_OPERAND_R14 :
 984       value = 0;
 985       break;
 986     case FR30_OPERAND_R15 :
 987       value = 0;
 988       break;
 989     case FR30_OPERAND_RI :
 990       value = fields->f_Ri;
 991       break;
 992     case FR30_OPERAND_RIC :
 993       value = fields->f_Ric;
 994       break;
 995     case FR30_OPERAND_RJ :
 996       value = fields->f_Rj;
 997       break;
 998     case FR30_OPERAND_RJC :
 999       value = fields->f_Rjc;
1000       break;
1001     case FR30_OPERAND_RS1 :
1002       value = fields->f_Rs1;
1003       break;
1004     case FR30_OPERAND_RS2 :
1005       value = fields->f_Rs2;
1006       break;
1007     case FR30_OPERAND_CC :
1008       value = fields->f_cc;
1009       break;
1010     case FR30_OPERAND_CCC :
1011       value = fields->f_ccc;
1012       break;
1013     case FR30_OPERAND_DIR10 :
1014       value = fields->f_dir10;
1015       break;
1016     case FR30_OPERAND_DIR8 :
1017       value = fields->f_dir8;
1018       break;
1019     case FR30_OPERAND_DIR9 :
1020       value = fields->f_dir9;
1021       break;
1022     case FR30_OPERAND_DISP10 :
1023       value = fields->f_disp10;
1024       break;
1025     case FR30_OPERAND_DISP8 :
1026       value = fields->f_disp8;
1027       break;
1028     case FR30_OPERAND_DISP9 :
1029       value = fields->f_disp9;
1030       break;
1031     case FR30_OPERAND_I20 :
1032       value = fields->f_i20;
1033       break;
1034     case FR30_OPERAND_I32 :
1035       value = fields->f_i32;
1036       break;
1037     case FR30_OPERAND_I8 :
1038       value = fields->f_i8;
1039       break;
1040     case FR30_OPERAND_LABEL12 :
1041       value = fields->f_rel12;
1042       break;
1043     case FR30_OPERAND_LABEL9 :
1044       value = fields->f_rel9;
1045       break;
1046     case FR30_OPERAND_M4 :
1047       value = fields->f_m4;
1048       break;
1049     case FR30_OPERAND_PS :
1050       value = 0;
1051       break;
1052     case FR30_OPERAND_REGLIST_HI_LD :
1053       value = fields->f_reglist_hi_ld;
1054       break;
1055     case FR30_OPERAND_REGLIST_HI_ST :
1056       value = fields->f_reglist_hi_st;
1057       break;
1058     case FR30_OPERAND_REGLIST_LOW_LD :
1059       value = fields->f_reglist_low_ld;
1060       break;
1061     case FR30_OPERAND_REGLIST_LOW_ST :
1062       value = fields->f_reglist_low_st;
1063       break;
1064     case FR30_OPERAND_S10 :
1065       value = fields->f_s10;
1066       break;
1067     case FR30_OPERAND_U10 :
1068       value = fields->f_u10;
1069       break;
1070     case FR30_OPERAND_U4 :
1071       value = fields->f_u4;
1072       break;
1073     case FR30_OPERAND_U4C :
1074       value = fields->f_u4c;
1075       break;
1076     case FR30_OPERAND_U8 :
1077       value = fields->f_u8;
1078       break;
1079     case FR30_OPERAND_UDISP6 :
1080       value = fields->f_udisp6;
1081       break;
1082
1083     default :
1084       /* xgettext:c-format */
1085       fprintf (stderr, _("Unrecognized field %d while getting int operand.\n"),
1086                        opindex);
1087       abort ();
1088   }
1089
1090   return value;
1091 }
1092
1093 bfd_vma
1094 fr30_cgen_get_vma_operand (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
1095                              int opindex,
1096                              const CGEN_FIELDS * fields)
1097 {
1098   bfd_vma value;
1099
1100   switch (opindex)
1101     {
1102     case FR30_OPERAND_CRI :
1103       value = fields->f_CRi;
1104       break;
1105     case FR30_OPERAND_CRJ :
1106       value = fields->f_CRj;
1107       break;
1108     case FR30_OPERAND_R13 :
1109       value = 0;
1110       break;
1111     case FR30_OPERAND_R14 :
1112       value = 0;
1113       break;
1114     case FR30_OPERAND_R15 :
1115       value = 0;
1116       break;
1117     case FR30_OPERAND_RI :
1118       value = fields->f_Ri;
1119       break;
1120     case FR30_OPERAND_RIC :
1121       value = fields->f_Ric;
1122       break;
1123     case FR30_OPERAND_RJ :
1124       value = fields->f_Rj;
1125       break;
1126     case FR30_OPERAND_RJC :
1127       value = fields->f_Rjc;
1128       break;
1129     case FR30_OPERAND_RS1 :
1130       value = fields->f_Rs1;
1131       break;
1132     case FR30_OPERAND_RS2 :
1133       value = fields->f_Rs2;
1134       break;
1135     case FR30_OPERAND_CC :
1136       value = fields->f_cc;
1137       break;
1138     case FR30_OPERAND_CCC :
1139       value = fields->f_ccc;
1140       break;
1141     case FR30_OPERAND_DIR10 :
1142       value = fields->f_dir10;
1143       break;
1144     case FR30_OPERAND_DIR8 :
1145       value = fields->f_dir8;
1146       break;
1147     case FR30_OPERAND_DIR9 :
1148       value = fields->f_dir9;
1149       break;
1150     case FR30_OPERAND_DISP10 :
1151       value = fields->f_disp10;
1152       break;
1153     case FR30_OPERAND_DISP8 :
1154       value = fields->f_disp8;
1155       break;
1156     case FR30_OPERAND_DISP9 :
1157       value = fields->f_disp9;
1158       break;
1159     case FR30_OPERAND_I20 :
1160       value = fields->f_i20;
1161       break;
1162     case FR30_OPERAND_I32 :
1163       value = fields->f_i32;
1164       break;
1165     case FR30_OPERAND_I8 :
1166       value = fields->f_i8;
1167       break;
1168     case FR30_OPERAND_LABEL12 :
1169       value = fields->f_rel12;
1170       break;
1171     case FR30_OPERAND_LABEL9 :
1172       value = fields->f_rel9;
1173       break;
1174     case FR30_OPERAND_M4 :
1175       value = fields->f_m4;
1176       break;
1177     case FR30_OPERAND_PS :
1178       value = 0;
1179       break;
1180     case FR30_OPERAND_REGLIST_HI_LD :
1181       value = fields->f_reglist_hi_ld;
1182       break;
1183     case FR30_OPERAND_REGLIST_HI_ST :
1184       value = fields->f_reglist_hi_st;
1185       break;
1186     case FR30_OPERAND_REGLIST_LOW_LD :
1187       value = fields->f_reglist_low_ld;
1188       break;
1189     case FR30_OPERAND_REGLIST_LOW_ST :
1190       value = fields->f_reglist_low_st;
1191       break;
1192     case FR30_OPERAND_S10 :
1193       value = fields->f_s10;
1194       break;
1195     case FR30_OPERAND_U10 :
1196       value = fields->f_u10;
1197       break;
1198     case FR30_OPERAND_U4 :
1199       value = fields->f_u4;
1200       break;
1201     case FR30_OPERAND_U4C :
1202       value = fields->f_u4c;
1203       break;
1204     case FR30_OPERAND_U8 :
1205       value = fields->f_u8;
1206       break;
1207     case FR30_OPERAND_UDISP6 :
1208       value = fields->f_udisp6;
1209       break;
1210
1211     default :
1212       /* xgettext:c-format */
1213       fprintf (stderr, _("Unrecognized field %d while getting vma operand.\n"),
1214                        opindex);
1215       abort ();
1216   }
1217
1218   return value;
1219 }
1220
1221 void fr30_cgen_set_int_operand  (CGEN_CPU_DESC, int, CGEN_FIELDS *, int);
1222 void fr30_cgen_set_vma_operand  (CGEN_CPU_DESC, int, CGEN_FIELDS *, bfd_vma);
1223
1224 /* Stuffing values in cgen_fields is handled by a collection of functions.
1225    They are distinguished by the type of the VALUE argument they accept.
1226    TODO: floating point, inlining support, remove cases where argument type
1227    not appropriate.  */
1228
1229 void
1230 fr30_cgen_set_int_operand (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
1231                              int opindex,
1232                              CGEN_FIELDS * fields,
1233                              int value)
1234 {
1235   switch (opindex)
1236     {
1237     case FR30_OPERAND_CRI :
1238       fields->f_CRi = value;
1239       break;
1240     case FR30_OPERAND_CRJ :
1241       fields->f_CRj = value;
1242       break;
1243     case FR30_OPERAND_R13 :
1244       break;
1245     case FR30_OPERAND_R14 :
1246       break;
1247     case FR30_OPERAND_R15 :
1248       break;
1249     case FR30_OPERAND_RI :
1250       fields->f_Ri = value;
1251       break;
1252     case FR30_OPERAND_RIC :
1253       fields->f_Ric = value;
1254       break;
1255     case FR30_OPERAND_RJ :
1256       fields->f_Rj = value;
1257       break;
1258     case FR30_OPERAND_RJC :
1259       fields->f_Rjc = value;
1260       break;
1261     case FR30_OPERAND_RS1 :
1262       fields->f_Rs1 = value;
1263       break;
1264     case FR30_OPERAND_RS2 :
1265       fields->f_Rs2 = value;
1266       break;
1267     case FR30_OPERAND_CC :
1268       fields->f_cc = value;
1269       break;
1270     case FR30_OPERAND_CCC :
1271       fields->f_ccc = value;
1272       break;
1273     case FR30_OPERAND_DIR10 :
1274       fields->f_dir10 = value;
1275       break;
1276     case FR30_OPERAND_DIR8 :
1277       fields->f_dir8 = value;
1278       break;
1279     case FR30_OPERAND_DIR9 :
1280       fields->f_dir9 = value;
1281       break;
1282     case FR30_OPERAND_DISP10 :
1283       fields->f_disp10 = value;
1284       break;
1285     case FR30_OPERAND_DISP8 :
1286       fields->f_disp8 = value;
1287       break;
1288     case FR30_OPERAND_DISP9 :
1289       fields->f_disp9 = value;
1290       break;
1291     case FR30_OPERAND_I20 :
1292       fields->f_i20 = value;
1293       break;
1294     case FR30_OPERAND_I32 :
1295       fields->f_i32 = value;
1296       break;
1297     case FR30_OPERAND_I8 :
1298       fields->f_i8 = value;
1299       break;
1300     case FR30_OPERAND_LABEL12 :
1301       fields->f_rel12 = value;
1302       break;
1303     case FR30_OPERAND_LABEL9 :
1304       fields->f_rel9 = value;
1305       break;
1306     case FR30_OPERAND_M4 :
1307       fields->f_m4 = value;
1308       break;
1309     case FR30_OPERAND_PS :
1310       break;
1311     case FR30_OPERAND_REGLIST_HI_LD :
1312       fields->f_reglist_hi_ld = value;
1313       break;
1314     case FR30_OPERAND_REGLIST_HI_ST :
1315       fields->f_reglist_hi_st = value;
1316       break;
1317     case FR30_OPERAND_REGLIST_LOW_LD :
1318       fields->f_reglist_low_ld = value;
1319       break;
1320     case FR30_OPERAND_REGLIST_LOW_ST :
1321       fields->f_reglist_low_st = value;
1322       break;
1323     case FR30_OPERAND_S10 :
1324       fields->f_s10 = value;
1325       break;
1326     case FR30_OPERAND_U10 :
1327       fields->f_u10 = value;
1328       break;
1329     case FR30_OPERAND_U4 :
1330       fields->f_u4 = value;
1331       break;
1332     case FR30_OPERAND_U4C :
1333       fields->f_u4c = value;
1334       break;
1335     case FR30_OPERAND_U8 :
1336       fields->f_u8 = value;
1337       break;
1338     case FR30_OPERAND_UDISP6 :
1339       fields->f_udisp6 = value;
1340       break;
1341
1342     default :
1343       /* xgettext:c-format */
1344       fprintf (stderr, _("Unrecognized field %d while setting int operand.\n"),
1345                        opindex);
1346       abort ();
1347   }
1348 }
1349
1350 void
1351 fr30_cgen_set_vma_operand (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
1352                              int opindex,
1353                              CGEN_FIELDS * fields,
1354                              bfd_vma value)
1355 {
1356   switch (opindex)
1357     {
1358     case FR30_OPERAND_CRI :
1359       fields->f_CRi = value;
1360       break;
1361     case FR30_OPERAND_CRJ :
1362       fields->f_CRj = value;
1363       break;
1364     case FR30_OPERAND_R13 :
1365       break;
1366     case FR30_OPERAND_R14 :
1367       break;
1368     case FR30_OPERAND_R15 :
1369       break;
1370     case FR30_OPERAND_RI :
1371       fields->f_Ri = value;
1372       break;
1373     case FR30_OPERAND_RIC :
1374       fields->f_Ric = value;
1375       break;
1376     case FR30_OPERAND_RJ :
1377       fields->f_Rj = value;
1378       break;
1379     case FR30_OPERAND_RJC :
1380       fields->f_Rjc = value;
1381       break;
1382     case FR30_OPERAND_RS1 :
1383       fields->f_Rs1 = value;
1384       break;
1385     case FR30_OPERAND_RS2 :
1386       fields->f_Rs2 = value;
1387       break;
1388     case FR30_OPERAND_CC :
1389       fields->f_cc = value;
1390       break;
1391     case FR30_OPERAND_CCC :
1392       fields->f_ccc = value;
1393       break;
1394     case FR30_OPERAND_DIR10 :
1395       fields->f_dir10 = value;
1396       break;
1397     case FR30_OPERAND_DIR8 :
1398       fields->f_dir8 = value;
1399       break;
1400     case FR30_OPERAND_DIR9 :
1401       fields->f_dir9 = value;
1402       break;
1403     case FR30_OPERAND_DISP10 :
1404       fields->f_disp10 = value;
1405       break;
1406     case FR30_OPERAND_DISP8 :
1407       fields->f_disp8 = value;
1408       break;
1409     case FR30_OPERAND_DISP9 :
1410       fields->f_disp9 = value;
1411       break;
1412     case FR30_OPERAND_I20 :
1413       fields->f_i20 = value;
1414       break;
1415     case FR30_OPERAND_I32 :
1416       fields->f_i32 = value;
1417       break;
1418     case FR30_OPERAND_I8 :
1419       fields->f_i8 = value;
1420       break;
1421     case FR30_OPERAND_LABEL12 :
1422       fields->f_rel12 = value;
1423       break;
1424     case FR30_OPERAND_LABEL9 :
1425       fields->f_rel9 = value;
1426       break;
1427     case FR30_OPERAND_M4 :
1428       fields->f_m4 = value;
1429       break;
1430     case FR30_OPERAND_PS :
1431       break;
1432     case FR30_OPERAND_REGLIST_HI_LD :
1433       fields->f_reglist_hi_ld = value;
1434       break;
1435     case FR30_OPERAND_REGLIST_HI_ST :
1436       fields->f_reglist_hi_st = value;
1437       break;
1438     case FR30_OPERAND_REGLIST_LOW_LD :
1439       fields->f_reglist_low_ld = value;
1440       break;
1441     case FR30_OPERAND_REGLIST_LOW_ST :
1442       fields->f_reglist_low_st = value;
1443       break;
1444     case FR30_OPERAND_S10 :
1445       fields->f_s10 = value;
1446       break;
1447     case FR30_OPERAND_U10 :
1448       fields->f_u10 = value;
1449       break;
1450     case FR30_OPERAND_U4 :
1451       fields->f_u4 = value;
1452       break;
1453     case FR30_OPERAND_U4C :
1454       fields->f_u4c = value;
1455       break;
1456     case FR30_OPERAND_U8 :
1457       fields->f_u8 = value;
1458       break;
1459     case FR30_OPERAND_UDISP6 :
1460       fields->f_udisp6 = value;
1461       break;
1462
1463     default :
1464       /* xgettext:c-format */
1465       fprintf (stderr, _("Unrecognized field %d while setting vma operand.\n"),
1466                        opindex);
1467       abort ();
1468   }
1469 }
1470
1471 /* Function to call before using the instruction builder tables.  */
1472
1473 void
1474 fr30_cgen_init_ibld_table (CGEN_CPU_DESC cd)
1475 {
1476   cd->insert_handlers = & fr30_cgen_insert_handlers[0];
1477   cd->extract_handlers = & fr30_cgen_extract_handlers[0];
1478
1479   cd->insert_operand = fr30_cgen_insert_operand;
1480   cd->extract_operand = fr30_cgen_extract_operand;
1481
1482   cd->get_int_operand = fr30_cgen_get_int_operand;
1483   cd->set_int_operand = fr30_cgen_set_int_operand;
1484   cd->get_vma_operand = fr30_cgen_get_vma_operand;
1485   cd->set_vma_operand = fr30_cgen_set_vma_operand;
1486 }