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[thirdparty/binutils-gdb.git] / opcodes / m32c-asm.c
1 /* Assembler interface for targets using CGEN. -*- C -*-
2 CGEN: Cpu tools GENerator
3
4 THIS FILE IS MACHINE GENERATED WITH CGEN.
5 - the resultant file is machine generated, cgen-asm.in isn't
6
7 Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2005
8 Free Software Foundation, Inc.
9
10 This file is part of the GNU Binutils and GDB, the GNU debugger.
11
12 This program is free software; you can redistribute it and/or modify
13 it under the terms of the GNU General Public License as published by
14 the Free Software Foundation; either version 2, or (at your option)
15 any later version.
16
17 This program is distributed in the hope that it will be useful,
18 but WITHOUT ANY WARRANTY; without even the implied warranty of
19 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 GNU General Public License for more details.
21
22 You should have received a copy of the GNU General Public License
23 along with this program; if not, write to the Free Software Foundation, Inc.,
24 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */
25
26 /* ??? Eventually more and more of this stuff can go to cpu-independent files.
27 Keep that in mind. */
28
29 #include "sysdep.h"
30 #include <stdio.h>
31 #include "ansidecl.h"
32 #include "bfd.h"
33 #include "symcat.h"
34 #include "m32c-desc.h"
35 #include "m32c-opc.h"
36 #include "opintl.h"
37 #include "xregex.h"
38 #include "libiberty.h"
39 #include "safe-ctype.h"
40
41 #undef min
42 #define min(a,b) ((a) < (b) ? (a) : (b))
43 #undef max
44 #define max(a,b) ((a) > (b) ? (a) : (b))
45
46 static const char * parse_insn_normal
47 (CGEN_CPU_DESC, const CGEN_INSN *, const char **, CGEN_FIELDS *);
48 \f
49 /* -- assembler routines inserted here. */
50
51 /* -- asm.c */
52 #include "safe-ctype.h"
53
54 #define MACH_M32C 5 /* Must match md_begin. */
55
56 static int
57 m32c_cgen_isa_register (const char **strp)
58 {
59 int u;
60 const char *s = *strp;
61 static char * m32c_register_names [] =
62 {
63 "r0", "r1", "r2", "r3", "r0l", "r0h", "r1l", "r1h",
64 "a0", "a1", "r2r0", "r3r1", "sp", "fb", "dct0", "dct1", "flg", "svf",
65 "drc0", "drc1", "dmd0", "dmd1", "intb", "svp", "vct", "isp", "dma0",
66 "dma1", "dra0", "dra1", "dsa0", "dsa1", 0
67 };
68
69 for (u = 0; m32c_register_names[u]; u++)
70 {
71 int len = strlen (m32c_register_names[u]);
72
73 if (memcmp (m32c_register_names[u], s, len) == 0
74 && (s[len] == 0 || ! ISALNUM (s[len])))
75 return 1;
76 }
77 return 0;
78 }
79
80 #define PARSE_UNSIGNED \
81 do \
82 { \
83 /* Don't successfully parse literals beginning with '['. */ \
84 if (**strp == '[') \
85 return "Invalid literal"; /* Anything -- will not be seen. */ \
86 \
87 errmsg = cgen_parse_unsigned_integer (cd, strp, opindex, & value);\
88 if (errmsg) \
89 return errmsg; \
90 } \
91 while (0)
92
93 #define PARSE_SIGNED \
94 do \
95 { \
96 /* Don't successfully parse literals beginning with '['. */ \
97 if (**strp == '[') \
98 return "Invalid literal"; /* Anything -- will not be seen. */ \
99 \
100 errmsg = cgen_parse_signed_integer (cd, strp, opindex, & value); \
101 if (errmsg) \
102 return errmsg; \
103 } \
104 while (0)
105
106 static const char *
107 parse_unsigned6 (CGEN_CPU_DESC cd, const char **strp,
108 int opindex, unsigned long *valuep)
109 {
110 const char *errmsg = 0;
111 unsigned long value;
112
113 PARSE_UNSIGNED;
114
115 if (value > 0x3f)
116 return _("imm:6 immediate is out of range");
117
118 *valuep = value;
119 return 0;
120 }
121
122 static const char *
123 parse_unsigned8 (CGEN_CPU_DESC cd, const char **strp,
124 int opindex, unsigned long *valuep)
125 {
126 const char *errmsg = 0;
127 unsigned long value;
128 long have_zero = 0;
129
130 if (strncmp (*strp, "0x0", 3) == 0
131 || (**strp == '0' && *(*strp + 1) != 'x'))
132 have_zero = 1;
133
134 PARSE_UNSIGNED;
135
136 if (value > 0xff)
137 return _("dsp:8 immediate is out of range");
138
139 /* If this field may require a relocation then use larger dsp16. */
140 if (! have_zero && value == 0)
141 return _("dsp:8 immediate is out of range");
142
143 *valuep = value;
144 return 0;
145 }
146
147 static const char *
148 parse_signed4 (CGEN_CPU_DESC cd, const char **strp,
149 int opindex, signed long *valuep)
150 {
151 const char *errmsg = 0;
152 signed long value;
153 long have_zero = 0;
154
155 if (strncmp (*strp, "0x0", 3) == 0
156 || (**strp == '0' && *(*strp + 1) != 'x'))
157 have_zero = 1;
158
159 PARSE_SIGNED;
160
161 if (value < -8 || value > 7)
162 return _("Immediate is out of range -8 to 7");
163
164 /* If this field may require a relocation then use larger dsp16. */
165 if (! have_zero && value == 0)
166 return _("Immediate is out of range -8 to 7");
167
168 *valuep = value;
169 return 0;
170 }
171
172 static const char *
173 parse_signed8 (CGEN_CPU_DESC cd, const char **strp,
174 int opindex, signed long *valuep)
175 {
176 const char *errmsg = 0;
177 signed long value;
178
179 PARSE_SIGNED;
180
181 if (value <= 255 && value > 127)
182 value -= 0x100;
183
184 if (value < -128 || value > 127)
185 return _("dsp:8 immediate is out of range");
186
187 *valuep = value;
188 return 0;
189 }
190
191 static const char *
192 parse_unsigned16 (CGEN_CPU_DESC cd, const char **strp,
193 int opindex, unsigned long *valuep)
194 {
195 const char *errmsg = 0;
196 unsigned long value;
197 long have_zero = 0;
198
199 /* Don't successfully parse literals beginning with '['. */
200 if (**strp == '[')
201 return "Invalid literal"; /* Anything -- will not be seen. */
202
203 /* Don't successfully parse register names. */
204 if (m32c_cgen_isa_register (strp))
205 return "Invalid literal"; /* Anything -- will not be seen. */
206
207 if (strncmp (*strp, "0x0", 3) == 0
208 || (**strp == '0' && *(*strp + 1) != 'x'))
209 have_zero = 1;
210
211 errmsg = cgen_parse_unsigned_integer (cd, strp, opindex, & value);
212 if (errmsg)
213 return errmsg;
214
215 if (value > 0xffff)
216 return _("dsp:16 immediate is out of range");
217
218 /* If this field may require a relocation then use larger dsp24. */
219 if (cd->machs == MACH_M32C && ! have_zero && value == 0
220 && (strncmp (*strp, "[a", 2) == 0
221 || **strp == ','
222 || **strp == 0))
223 return _("dsp:16 immediate is out of range");
224
225 *valuep = value;
226 return 0;
227 }
228
229 static const char *
230 parse_signed16 (CGEN_CPU_DESC cd, const char **strp,
231 int opindex, signed long *valuep)
232 {
233 const char *errmsg = 0;
234 signed long value;
235
236 PARSE_SIGNED;
237
238 if (value <= 65535 && value > 32767)
239 value -= 0x10000;
240
241 if (value < -32768 || value > 32767)
242 return _("dsp:16 immediate is out of range");
243
244 *valuep = value;
245 return 0;
246 }
247
248 static const char *
249 parse_unsigned20 (CGEN_CPU_DESC cd, const char **strp,
250 int opindex, unsigned long *valuep)
251 {
252 const char *errmsg = 0;
253 unsigned long value;
254
255 /* Don't successfully parse literals beginning with '['. */
256 if (**strp == '[')
257 return "Invalid literal"; /* Anything -- will not be seen. */
258
259 /* Don't successfully parse register names. */
260 if (m32c_cgen_isa_register (strp))
261 return "Invalid literal"; /* Anything -- will not be seen. */
262
263 errmsg = cgen_parse_unsigned_integer (cd, strp, opindex, & value);
264 if (errmsg)
265 return errmsg;
266
267 if (value > 0xfffff)
268 return _("dsp:20 immediate is out of range");
269
270 *valuep = value;
271 return 0;
272 }
273
274 static const char *
275 parse_unsigned24 (CGEN_CPU_DESC cd, const char **strp,
276 int opindex, unsigned long *valuep)
277 {
278 const char *errmsg = 0;
279 unsigned long value;
280
281 /* Don't successfully parse literals beginning with '['. */
282 if (**strp == '[')
283 return "Invalid literal"; /* Anything -- will not be seen. */
284
285 /* Don't successfully parse register names. */
286 if (m32c_cgen_isa_register (strp))
287 return "Invalid literal"; /* Anything -- will not be seen. */
288
289 errmsg = cgen_parse_unsigned_integer (cd, strp, opindex, & value);
290 if (errmsg)
291 return errmsg;
292
293 if (value > 0xffffff)
294 return _("dsp:24 immediate is out of range");
295
296 *valuep = value;
297 return 0;
298 }
299
300 static const char *
301 parse_signed32 (CGEN_CPU_DESC cd, const char **strp,
302 int opindex, signed long *valuep)
303 {
304 const char *errmsg = 0;
305 signed long value;
306
307 errmsg = cgen_parse_signed_integer (cd, strp, opindex, & value);
308 if (errmsg)
309 return errmsg;
310
311 *valuep = value;
312 return 0;
313 }
314
315 static const char *
316 parse_imm1_S (CGEN_CPU_DESC cd, const char **strp,
317 int opindex, signed long *valuep)
318 {
319 const char *errmsg = 0;
320 signed long value;
321
322 errmsg = cgen_parse_signed_integer (cd, strp, opindex, & value);
323 if (errmsg)
324 return errmsg;
325
326 if (value < 1 || value > 2)
327 return _("immediate is out of range 1-2");
328
329 *valuep = value;
330 return 0;
331 }
332
333 static const char *
334 parse_imm3_S (CGEN_CPU_DESC cd, const char **strp,
335 int opindex, signed long *valuep)
336 {
337 const char *errmsg = 0;
338 signed long value;
339
340 errmsg = cgen_parse_signed_integer (cd, strp, opindex, & value);
341 if (errmsg)
342 return errmsg;
343
344 if (value < 1 || value > 8)
345 return _("immediate is out of range 1-8");
346
347 *valuep = value;
348 return 0;
349 }
350
351 static const char *
352 parse_lab_5_3 (CGEN_CPU_DESC cd,
353 const char **strp,
354 int opindex ATTRIBUTE_UNUSED,
355 int opinfo,
356 enum cgen_parse_operand_result *type_addr,
357 unsigned long *valuep)
358 {
359 const char *errmsg = 0;
360 unsigned long value;
361 enum cgen_parse_operand_result op_res;
362
363 errmsg = cgen_parse_address (cd, strp, M32C_OPERAND_LAB_5_3,
364 opinfo, & op_res, & value);
365
366 if (type_addr)
367 *type_addr = op_res;
368
369 if (op_res == CGEN_PARSE_OPERAND_ADDRESS)
370 {
371 /* This is a hack; the field cannot handle near-zero signed
372 offsets that CGEN wants to put in to indicate an "empty"
373 operand at first. */
374 *valuep = 2;
375 return 0;
376 }
377 if (errmsg)
378 return errmsg;
379
380 if (value < 2 || value > 9)
381 return _("immediate is out of range 2-9");
382
383 *valuep = value;
384 return 0;
385 }
386
387 static const char *
388 parse_Bitno16R (CGEN_CPU_DESC cd, const char **strp,
389 int opindex, unsigned long *valuep)
390 {
391 const char *errmsg = 0;
392 unsigned long value;
393
394 errmsg = cgen_parse_unsigned_integer (cd, strp, opindex, & value);
395 if (errmsg)
396 return errmsg;
397
398 if (value > 15)
399 return _("Bit number for indexing general register is out of range 0-15");
400
401 *valuep = value;
402 return 0;
403 }
404
405 static const char *
406 parse_unsigned_bitbase (CGEN_CPU_DESC cd, const char **strp,
407 int opindex, unsigned long *valuep,
408 unsigned bits)
409 {
410 const char *errmsg = 0;
411 unsigned long bit;
412 unsigned long base;
413 const char *newp = *strp;
414 unsigned long long bitbase;
415
416 errmsg = cgen_parse_unsigned_integer (cd, & newp, opindex, & bit);
417 if (errmsg)
418 return errmsg;
419
420 if (*newp != ',')
421 return "Missing base for bit,base:8";
422
423 ++newp;
424 errmsg = cgen_parse_unsigned_integer (cd, & newp, opindex, & base);
425 if (errmsg)
426 return errmsg;
427
428 bitbase = (unsigned long long) bit + ((unsigned long long) base * 8);
429
430 if (bitbase >= (1ull << bits))
431 return _("bit,base is out of range");
432
433 *valuep = bitbase;
434 *strp = newp;
435 return 0;
436 }
437
438 static const char *
439 parse_signed_bitbase (CGEN_CPU_DESC cd, const char **strp,
440 int opindex, signed long *valuep,
441 unsigned bits)
442 {
443 const char *errmsg = 0;
444 unsigned long bit;
445 signed long base;
446 const char *newp = *strp;
447 long long bitbase;
448 long long limit;
449
450 errmsg = cgen_parse_unsigned_integer (cd, & newp, opindex, & bit);
451 if (errmsg)
452 return errmsg;
453
454 if (*newp != ',')
455 return "Missing base for bit,base:8";
456
457 ++newp;
458 errmsg = cgen_parse_signed_integer (cd, & newp, opindex, & base);
459 if (errmsg)
460 return errmsg;
461
462 bitbase = (long long)bit + ((long long)base * 8);
463
464 limit = 1ll << (bits - 1);
465 if (bitbase < -limit || bitbase >= limit)
466 return _("bit,base is out of range");
467
468 *valuep = bitbase;
469 *strp = newp;
470 return 0;
471 }
472
473 static const char *
474 parse_unsigned_bitbase8 (CGEN_CPU_DESC cd, const char **strp,
475 int opindex, unsigned long *valuep)
476 {
477 return parse_unsigned_bitbase (cd, strp, opindex, valuep, 8);
478 }
479
480 static const char *
481 parse_unsigned_bitbase11 (CGEN_CPU_DESC cd, const char **strp,
482 int opindex, unsigned long *valuep)
483 {
484 return parse_unsigned_bitbase (cd, strp, opindex, valuep, 11);
485 }
486
487 static const char *
488 parse_unsigned_bitbase16 (CGEN_CPU_DESC cd, const char **strp,
489 int opindex, unsigned long *valuep)
490 {
491 return parse_unsigned_bitbase (cd, strp, opindex, valuep, 16);
492 }
493
494 static const char *
495 parse_unsigned_bitbase19 (CGEN_CPU_DESC cd, const char **strp,
496 int opindex, unsigned long *valuep)
497 {
498 return parse_unsigned_bitbase (cd, strp, opindex, valuep, 19);
499 }
500
501 static const char *
502 parse_unsigned_bitbase27 (CGEN_CPU_DESC cd, const char **strp,
503 int opindex, unsigned long *valuep)
504 {
505 return parse_unsigned_bitbase (cd, strp, opindex, valuep, 27);
506 }
507
508 static const char *
509 parse_signed_bitbase8 (CGEN_CPU_DESC cd, const char **strp,
510 int opindex, signed long *valuep)
511 {
512 return parse_signed_bitbase (cd, strp, opindex, valuep, 8);
513 }
514
515 static const char *
516 parse_signed_bitbase11 (CGEN_CPU_DESC cd, const char **strp,
517 int opindex, signed long *valuep)
518 {
519 return parse_signed_bitbase (cd, strp, opindex, valuep, 11);
520 }
521
522 static const char *
523 parse_signed_bitbase19 (CGEN_CPU_DESC cd, const char **strp,
524 int opindex, signed long *valuep)
525 {
526 return parse_signed_bitbase (cd, strp, opindex, valuep, 19);
527 }
528
529 /* Parse the suffix as :<char> or as nothing followed by a whitespace. */
530
531 static const char *
532 parse_suffix (const char **strp, char suffix)
533 {
534 const char *newp = *strp;
535
536 if (**strp == ':' && TOLOWER (*(*strp + 1)) == suffix)
537 newp = *strp + 2;
538
539 if (ISSPACE (*newp))
540 {
541 *strp = newp;
542 return 0;
543 }
544
545 return "Invalid suffix"; /* Anything -- will not be seen. */
546 }
547
548 static const char *
549 parse_S (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, const char **strp,
550 int opindex ATTRIBUTE_UNUSED, signed long *valuep ATTRIBUTE_UNUSED)
551 {
552 return parse_suffix (strp, 's');
553 }
554
555 static const char *
556 parse_G (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, const char **strp,
557 int opindex ATTRIBUTE_UNUSED, signed long *valuep ATTRIBUTE_UNUSED)
558 {
559 return parse_suffix (strp, 'g');
560 }
561
562 static const char *
563 parse_Q (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, const char **strp,
564 int opindex ATTRIBUTE_UNUSED, signed long *valuep ATTRIBUTE_UNUSED)
565 {
566 return parse_suffix (strp, 'q');
567 }
568
569 static const char *
570 parse_Z (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, const char **strp,
571 int opindex ATTRIBUTE_UNUSED, signed long *valuep ATTRIBUTE_UNUSED)
572 {
573 return parse_suffix (strp, 'z');
574 }
575
576 /* Parse an empty suffix. Fail if the next char is ':'. */
577
578 static const char *
579 parse_X (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, const char **strp,
580 int opindex ATTRIBUTE_UNUSED, signed long *valuep ATTRIBUTE_UNUSED)
581 {
582 if (**strp == ':')
583 return "Unexpected suffix";
584 return 0;
585 }
586
587 static const char *
588 parse_r0l_r0h (CGEN_CPU_DESC cd, const char **strp,
589 int opindex ATTRIBUTE_UNUSED, signed long *valuep)
590 {
591 const char *errmsg;
592 signed long value;
593 signed long junk;
594 const char *newp = *strp;
595
596 /* Parse r0[hl]. */
597 errmsg = cgen_parse_keyword (cd, & newp, & m32c_cgen_opval_h_r0l_r0h, & value);
598 if (errmsg)
599 return errmsg;
600
601 if (*newp != ',')
602 return _("not a valid r0l/r0h pair");
603 ++newp;
604
605 /* Parse the second register in the pair. */
606 if (value == 0) /* r0l */
607 errmsg = cgen_parse_keyword (cd, & newp, & m32c_cgen_opval_h_r0h, & junk);
608 else
609 errmsg = cgen_parse_keyword (cd, & newp, & m32c_cgen_opval_h_r0l, & junk);
610 if (errmsg)
611 return errmsg;
612
613 *strp = newp;
614 *valuep = ! value;
615 return 0;
616 }
617
618 /* Accept .b or .w in any case. */
619
620 static const char *
621 parse_size (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, const char **strp,
622 int opindex ATTRIBUTE_UNUSED, signed long *valuep ATTRIBUTE_UNUSED)
623 {
624 if (**strp == '.'
625 && (*(*strp + 1) == 'b' || *(*strp + 1) == 'B'
626 || *(*strp + 1) == 'w' || *(*strp + 1) == 'W'))
627 {
628 *strp += 2;
629 return NULL;
630 }
631
632 return _("Invalid size specifier");
633 }
634
635 /* Special check to ensure that instruction exists for given machine. */
636
637 int
638 m32c_cgen_insn_supported (CGEN_CPU_DESC cd,
639 const CGEN_INSN *insn)
640 {
641 int machs = CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_MACH);
642 int isas = CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_ISA);
643
644 /* If attributes are absent, assume no restriction. */
645 if (machs == 0)
646 machs = ~0;
647
648 return ((machs & cd->machs)
649 && (isas & cd->isas));
650 }
651
652 /* Parse a set of registers, R0,R1,A0,A1,SB,FB. */
653
654 static const char *
655 parse_regset (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
656 const char **strp,
657 int opindex ATTRIBUTE_UNUSED,
658 unsigned long *valuep,
659 int push)
660 {
661 const char *errmsg = 0;
662 int regno = 0;
663
664 *valuep = 0;
665 while (**strp && **strp != ')')
666 {
667 if (**strp == 'r' || **strp == 'R')
668 {
669 ++*strp;
670 regno = **strp - '0';
671 if (regno > 4)
672 errmsg = _("Register number is not valid");
673 }
674 else if (**strp == 'a' || **strp == 'A')
675 {
676 ++*strp;
677 regno = **strp - '0';
678 if (regno > 2)
679 errmsg = _("Register number is not valid");
680 regno = **strp - '0' + 4;
681 }
682
683 else if (strncasecmp (*strp, "sb", 2) == 0 || strncasecmp (*strp, "SB", 2) == 0)
684 {
685 regno = 6;
686 ++*strp;
687 }
688
689 else if (strncasecmp (*strp, "fb", 2) == 0 || strncasecmp (*strp, "FB", 2) == 0)
690 {
691 regno = 7;
692 ++*strp;
693 }
694
695 if (push) /* Mask is reversed for push. */
696 *valuep |= 0x80 >> regno;
697 else
698 *valuep |= 1 << regno;
699
700 ++*strp;
701 if (**strp == ',')
702 {
703 if (*(*strp + 1) == ')')
704 break;
705 ++*strp;
706 }
707 }
708
709 if (!*strp)
710 errmsg = _("Register list is not valid");
711
712 return errmsg;
713 }
714
715 #define POP 0
716 #define PUSH 1
717
718 static const char *
719 parse_pop_regset (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
720 const char **strp,
721 int opindex ATTRIBUTE_UNUSED,
722 unsigned long *valuep)
723 {
724 return parse_regset (cd, strp, opindex, valuep, POP);
725 }
726
727 static const char *
728 parse_push_regset (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
729 const char **strp,
730 int opindex ATTRIBUTE_UNUSED,
731 unsigned long *valuep)
732 {
733 return parse_regset (cd, strp, opindex, valuep, PUSH);
734 }
735
736 /* -- dis.c */
737
738 const char * m32c_cgen_parse_operand
739 (CGEN_CPU_DESC, int, const char **, CGEN_FIELDS *);
740
741 /* Main entry point for operand parsing.
742
743 This function is basically just a big switch statement. Earlier versions
744 used tables to look up the function to use, but
745 - if the table contains both assembler and disassembler functions then
746 the disassembler contains much of the assembler and vice-versa,
747 - there's a lot of inlining possibilities as things grow,
748 - using a switch statement avoids the function call overhead.
749
750 This function could be moved into `parse_insn_normal', but keeping it
751 separate makes clear the interface between `parse_insn_normal' and each of
752 the handlers. */
753
754 const char *
755 m32c_cgen_parse_operand (CGEN_CPU_DESC cd,
756 int opindex,
757 const char ** strp,
758 CGEN_FIELDS * fields)
759 {
760 const char * errmsg = NULL;
761 /* Used by scalar operands that still need to be parsed. */
762 long junk ATTRIBUTE_UNUSED;
763
764 switch (opindex)
765 {
766 case M32C_OPERAND_A0 :
767 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_a0, & junk);
768 break;
769 case M32C_OPERAND_A1 :
770 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_a1, & junk);
771 break;
772 case M32C_OPERAND_AN16_PUSH_S :
773 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar_HI, & fields->f_4_1);
774 break;
775 case M32C_OPERAND_BIT16AN :
776 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar, & fields->f_dst16_an);
777 break;
778 case M32C_OPERAND_BIT16RN :
779 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_HI, & fields->f_dst16_rn);
780 break;
781 case M32C_OPERAND_BIT32ANPREFIXED :
782 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar, & fields->f_dst32_an_prefixed);
783 break;
784 case M32C_OPERAND_BIT32ANUNPREFIXED :
785 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar, & fields->f_dst32_an_unprefixed);
786 break;
787 case M32C_OPERAND_BIT32RNPREFIXED :
788 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_QI, & fields->f_dst32_rn_prefixed_QI);
789 break;
790 case M32C_OPERAND_BIT32RNUNPREFIXED :
791 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_QI, & fields->f_dst32_rn_unprefixed_QI);
792 break;
793 case M32C_OPERAND_BITBASE16_16_S8 :
794 errmsg = parse_signed_bitbase8 (cd, strp, M32C_OPERAND_BITBASE16_16_S8, (long *) (& fields->f_dsp_16_s8));
795 break;
796 case M32C_OPERAND_BITBASE16_16_U16 :
797 errmsg = parse_unsigned_bitbase16 (cd, strp, M32C_OPERAND_BITBASE16_16_U16, (unsigned long *) (& fields->f_dsp_16_u16));
798 break;
799 case M32C_OPERAND_BITBASE16_16_U8 :
800 errmsg = parse_unsigned_bitbase8 (cd, strp, M32C_OPERAND_BITBASE16_16_U8, (unsigned long *) (& fields->f_dsp_16_u8));
801 break;
802 case M32C_OPERAND_BITBASE16_8_U11_S :
803 errmsg = parse_unsigned_bitbase11 (cd, strp, M32C_OPERAND_BITBASE16_8_U11_S, (unsigned long *) (& fields->f_bitbase16_u11_S));
804 break;
805 case M32C_OPERAND_BITBASE32_16_S11_UNPREFIXED :
806 errmsg = parse_signed_bitbase11 (cd, strp, M32C_OPERAND_BITBASE32_16_S11_UNPREFIXED, (long *) (& fields->f_bitbase32_16_s11_unprefixed));
807 break;
808 case M32C_OPERAND_BITBASE32_16_S19_UNPREFIXED :
809 errmsg = parse_signed_bitbase19 (cd, strp, M32C_OPERAND_BITBASE32_16_S19_UNPREFIXED, (long *) (& fields->f_bitbase32_16_s19_unprefixed));
810 break;
811 case M32C_OPERAND_BITBASE32_16_U11_UNPREFIXED :
812 errmsg = parse_unsigned_bitbase11 (cd, strp, M32C_OPERAND_BITBASE32_16_U11_UNPREFIXED, (unsigned long *) (& fields->f_bitbase32_16_u11_unprefixed));
813 break;
814 case M32C_OPERAND_BITBASE32_16_U19_UNPREFIXED :
815 errmsg = parse_unsigned_bitbase19 (cd, strp, M32C_OPERAND_BITBASE32_16_U19_UNPREFIXED, (unsigned long *) (& fields->f_bitbase32_16_u19_unprefixed));
816 break;
817 case M32C_OPERAND_BITBASE32_16_U27_UNPREFIXED :
818 errmsg = parse_unsigned_bitbase27 (cd, strp, M32C_OPERAND_BITBASE32_16_U27_UNPREFIXED, (unsigned long *) (& fields->f_bitbase32_16_u27_unprefixed));
819 break;
820 case M32C_OPERAND_BITBASE32_24_S11_PREFIXED :
821 errmsg = parse_signed_bitbase11 (cd, strp, M32C_OPERAND_BITBASE32_24_S11_PREFIXED, (long *) (& fields->f_bitbase32_24_s11_prefixed));
822 break;
823 case M32C_OPERAND_BITBASE32_24_S19_PREFIXED :
824 errmsg = parse_signed_bitbase19 (cd, strp, M32C_OPERAND_BITBASE32_24_S19_PREFIXED, (long *) (& fields->f_bitbase32_24_s19_prefixed));
825 break;
826 case M32C_OPERAND_BITBASE32_24_U11_PREFIXED :
827 errmsg = parse_unsigned_bitbase11 (cd, strp, M32C_OPERAND_BITBASE32_24_U11_PREFIXED, (unsigned long *) (& fields->f_bitbase32_24_u11_prefixed));
828 break;
829 case M32C_OPERAND_BITBASE32_24_U19_PREFIXED :
830 errmsg = parse_unsigned_bitbase19 (cd, strp, M32C_OPERAND_BITBASE32_24_U19_PREFIXED, (unsigned long *) (& fields->f_bitbase32_24_u19_prefixed));
831 break;
832 case M32C_OPERAND_BITBASE32_24_U27_PREFIXED :
833 errmsg = parse_unsigned_bitbase27 (cd, strp, M32C_OPERAND_BITBASE32_24_U27_PREFIXED, (unsigned long *) (& fields->f_bitbase32_24_u27_prefixed));
834 break;
835 case M32C_OPERAND_BITNO16R :
836 errmsg = parse_Bitno16R (cd, strp, M32C_OPERAND_BITNO16R, (unsigned long *) (& fields->f_dsp_16_u8));
837 break;
838 case M32C_OPERAND_BITNO32PREFIXED :
839 errmsg = cgen_parse_unsigned_integer (cd, strp, M32C_OPERAND_BITNO32PREFIXED, (unsigned long *) (& fields->f_bitno32_prefixed));
840 break;
841 case M32C_OPERAND_BITNO32UNPREFIXED :
842 errmsg = cgen_parse_unsigned_integer (cd, strp, M32C_OPERAND_BITNO32UNPREFIXED, (unsigned long *) (& fields->f_bitno32_unprefixed));
843 break;
844 case M32C_OPERAND_DSP_10_U6 :
845 errmsg = parse_unsigned6 (cd, strp, M32C_OPERAND_DSP_10_U6, (unsigned long *) (& fields->f_dsp_10_u6));
846 break;
847 case M32C_OPERAND_DSP_16_S16 :
848 errmsg = parse_signed16 (cd, strp, M32C_OPERAND_DSP_16_S16, (long *) (& fields->f_dsp_16_s16));
849 break;
850 case M32C_OPERAND_DSP_16_S8 :
851 errmsg = parse_signed8 (cd, strp, M32C_OPERAND_DSP_16_S8, (long *) (& fields->f_dsp_16_s8));
852 break;
853 case M32C_OPERAND_DSP_16_U16 :
854 errmsg = parse_unsigned16 (cd, strp, M32C_OPERAND_DSP_16_U16, (unsigned long *) (& fields->f_dsp_16_u16));
855 break;
856 case M32C_OPERAND_DSP_16_U20 :
857 errmsg = parse_unsigned20 (cd, strp, M32C_OPERAND_DSP_16_U20, (unsigned long *) (& fields->f_dsp_16_u24));
858 break;
859 case M32C_OPERAND_DSP_16_U24 :
860 errmsg = parse_unsigned24 (cd, strp, M32C_OPERAND_DSP_16_U24, (unsigned long *) (& fields->f_dsp_16_u24));
861 break;
862 case M32C_OPERAND_DSP_16_U8 :
863 errmsg = parse_unsigned8 (cd, strp, M32C_OPERAND_DSP_16_U8, (unsigned long *) (& fields->f_dsp_16_u8));
864 break;
865 case M32C_OPERAND_DSP_24_S16 :
866 errmsg = parse_signed16 (cd, strp, M32C_OPERAND_DSP_24_S16, (long *) (& fields->f_dsp_24_s16));
867 break;
868 case M32C_OPERAND_DSP_24_S8 :
869 errmsg = parse_signed8 (cd, strp, M32C_OPERAND_DSP_24_S8, (long *) (& fields->f_dsp_24_s8));
870 break;
871 case M32C_OPERAND_DSP_24_U16 :
872 errmsg = parse_unsigned16 (cd, strp, M32C_OPERAND_DSP_24_U16, (unsigned long *) (& fields->f_dsp_24_u16));
873 break;
874 case M32C_OPERAND_DSP_24_U20 :
875 errmsg = parse_unsigned20 (cd, strp, M32C_OPERAND_DSP_24_U20, (unsigned long *) (& fields->f_dsp_24_u24));
876 break;
877 case M32C_OPERAND_DSP_24_U24 :
878 errmsg = parse_unsigned24 (cd, strp, M32C_OPERAND_DSP_24_U24, (unsigned long *) (& fields->f_dsp_24_u24));
879 break;
880 case M32C_OPERAND_DSP_24_U8 :
881 errmsg = parse_unsigned8 (cd, strp, M32C_OPERAND_DSP_24_U8, (unsigned long *) (& fields->f_dsp_24_u8));
882 break;
883 case M32C_OPERAND_DSP_32_S16 :
884 errmsg = parse_signed16 (cd, strp, M32C_OPERAND_DSP_32_S16, (long *) (& fields->f_dsp_32_s16));
885 break;
886 case M32C_OPERAND_DSP_32_S8 :
887 errmsg = parse_signed8 (cd, strp, M32C_OPERAND_DSP_32_S8, (long *) (& fields->f_dsp_32_s8));
888 break;
889 case M32C_OPERAND_DSP_32_U16 :
890 errmsg = parse_unsigned16 (cd, strp, M32C_OPERAND_DSP_32_U16, (unsigned long *) (& fields->f_dsp_32_u16));
891 break;
892 case M32C_OPERAND_DSP_32_U20 :
893 errmsg = parse_unsigned20 (cd, strp, M32C_OPERAND_DSP_32_U20, (unsigned long *) (& fields->f_dsp_32_u24));
894 break;
895 case M32C_OPERAND_DSP_32_U24 :
896 errmsg = parse_unsigned24 (cd, strp, M32C_OPERAND_DSP_32_U24, (unsigned long *) (& fields->f_dsp_32_u24));
897 break;
898 case M32C_OPERAND_DSP_32_U8 :
899 errmsg = parse_unsigned8 (cd, strp, M32C_OPERAND_DSP_32_U8, (unsigned long *) (& fields->f_dsp_32_u8));
900 break;
901 case M32C_OPERAND_DSP_40_S16 :
902 errmsg = parse_signed16 (cd, strp, M32C_OPERAND_DSP_40_S16, (long *) (& fields->f_dsp_40_s16));
903 break;
904 case M32C_OPERAND_DSP_40_S8 :
905 errmsg = parse_signed8 (cd, strp, M32C_OPERAND_DSP_40_S8, (long *) (& fields->f_dsp_40_s8));
906 break;
907 case M32C_OPERAND_DSP_40_U16 :
908 errmsg = parse_unsigned16 (cd, strp, M32C_OPERAND_DSP_40_U16, (unsigned long *) (& fields->f_dsp_40_u16));
909 break;
910 case M32C_OPERAND_DSP_40_U24 :
911 errmsg = parse_unsigned24 (cd, strp, M32C_OPERAND_DSP_40_U24, (unsigned long *) (& fields->f_dsp_40_u24));
912 break;
913 case M32C_OPERAND_DSP_40_U8 :
914 errmsg = parse_unsigned8 (cd, strp, M32C_OPERAND_DSP_40_U8, (unsigned long *) (& fields->f_dsp_40_u8));
915 break;
916 case M32C_OPERAND_DSP_48_S16 :
917 errmsg = parse_signed16 (cd, strp, M32C_OPERAND_DSP_48_S16, (long *) (& fields->f_dsp_48_s16));
918 break;
919 case M32C_OPERAND_DSP_48_S8 :
920 errmsg = parse_signed8 (cd, strp, M32C_OPERAND_DSP_48_S8, (long *) (& fields->f_dsp_48_s8));
921 break;
922 case M32C_OPERAND_DSP_48_U16 :
923 errmsg = parse_unsigned16 (cd, strp, M32C_OPERAND_DSP_48_U16, (unsigned long *) (& fields->f_dsp_48_u16));
924 break;
925 case M32C_OPERAND_DSP_48_U24 :
926 errmsg = parse_unsigned24 (cd, strp, M32C_OPERAND_DSP_48_U24, (unsigned long *) (& fields->f_dsp_48_u24));
927 break;
928 case M32C_OPERAND_DSP_48_U8 :
929 errmsg = parse_unsigned8 (cd, strp, M32C_OPERAND_DSP_48_U8, (unsigned long *) (& fields->f_dsp_48_u8));
930 break;
931 case M32C_OPERAND_DSP_8_S8 :
932 errmsg = parse_signed8 (cd, strp, M32C_OPERAND_DSP_8_S8, (long *) (& fields->f_dsp_8_s8));
933 break;
934 case M32C_OPERAND_DSP_8_U16 :
935 errmsg = parse_unsigned16 (cd, strp, M32C_OPERAND_DSP_8_U16, (unsigned long *) (& fields->f_dsp_8_u16));
936 break;
937 case M32C_OPERAND_DSP_8_U24 :
938 errmsg = parse_unsigned24 (cd, strp, M32C_OPERAND_DSP_8_U24, (unsigned long *) (& fields->f_dsp_8_u24));
939 break;
940 case M32C_OPERAND_DSP_8_U6 :
941 errmsg = parse_unsigned6 (cd, strp, M32C_OPERAND_DSP_8_U6, (unsigned long *) (& fields->f_dsp_8_u6));
942 break;
943 case M32C_OPERAND_DSP_8_U8 :
944 errmsg = parse_unsigned8 (cd, strp, M32C_OPERAND_DSP_8_U8, (unsigned long *) (& fields->f_dsp_8_u8));
945 break;
946 case M32C_OPERAND_DST16AN :
947 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar, & fields->f_dst16_an);
948 break;
949 case M32C_OPERAND_DST16AN_S :
950 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar_HI, & fields->f_dst16_an_s);
951 break;
952 case M32C_OPERAND_DST16ANHI :
953 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar_HI, & fields->f_dst16_an);
954 break;
955 case M32C_OPERAND_DST16ANQI :
956 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar_QI, & fields->f_dst16_an);
957 break;
958 case M32C_OPERAND_DST16ANQI_S :
959 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar_QI, & fields->f_dst16_rn_QI_s);
960 break;
961 case M32C_OPERAND_DST16ANSI :
962 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar_SI, & fields->f_dst16_an);
963 break;
964 case M32C_OPERAND_DST16RNEXTQI :
965 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_ext_QI, & fields->f_dst16_rn_ext);
966 break;
967 case M32C_OPERAND_DST16RNHI :
968 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_HI, & fields->f_dst16_rn);
969 break;
970 case M32C_OPERAND_DST16RNQI :
971 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_QI, & fields->f_dst16_rn);
972 break;
973 case M32C_OPERAND_DST16RNQI_S :
974 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_r0l_r0h, & fields->f_dst16_rn_QI_s);
975 break;
976 case M32C_OPERAND_DST16RNSI :
977 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_SI, & fields->f_dst16_rn);
978 break;
979 case M32C_OPERAND_DST32ANEXTUNPREFIXED :
980 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar, & fields->f_dst32_an_unprefixed);
981 break;
982 case M32C_OPERAND_DST32ANPREFIXED :
983 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar, & fields->f_dst32_an_prefixed);
984 break;
985 case M32C_OPERAND_DST32ANPREFIXEDHI :
986 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar_HI, & fields->f_dst32_an_prefixed);
987 break;
988 case M32C_OPERAND_DST32ANPREFIXEDQI :
989 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar_QI, & fields->f_dst32_an_prefixed);
990 break;
991 case M32C_OPERAND_DST32ANPREFIXEDSI :
992 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar, & fields->f_dst32_an_prefixed);
993 break;
994 case M32C_OPERAND_DST32ANUNPREFIXED :
995 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar, & fields->f_dst32_an_unprefixed);
996 break;
997 case M32C_OPERAND_DST32ANUNPREFIXEDHI :
998 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar_HI, & fields->f_dst32_an_unprefixed);
999 break;
1000 case M32C_OPERAND_DST32ANUNPREFIXEDQI :
1001 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar_QI, & fields->f_dst32_an_unprefixed);
1002 break;
1003 case M32C_OPERAND_DST32ANUNPREFIXEDSI :
1004 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar, & fields->f_dst32_an_unprefixed);
1005 break;
1006 case M32C_OPERAND_DST32R0HI_S :
1007 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_r0, & junk);
1008 break;
1009 case M32C_OPERAND_DST32R0QI_S :
1010 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_r0l, & junk);
1011 break;
1012 case M32C_OPERAND_DST32RNEXTUNPREFIXEDHI :
1013 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_ext_HI, & fields->f_dst32_rn_ext_unprefixed);
1014 break;
1015 case M32C_OPERAND_DST32RNEXTUNPREFIXEDQI :
1016 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_ext_QI, & fields->f_dst32_rn_ext_unprefixed);
1017 break;
1018 case M32C_OPERAND_DST32RNPREFIXEDHI :
1019 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_HI, & fields->f_dst32_rn_prefixed_HI);
1020 break;
1021 case M32C_OPERAND_DST32RNPREFIXEDQI :
1022 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_QI, & fields->f_dst32_rn_prefixed_QI);
1023 break;
1024 case M32C_OPERAND_DST32RNPREFIXEDSI :
1025 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_SI, & fields->f_dst32_rn_prefixed_SI);
1026 break;
1027 case M32C_OPERAND_DST32RNUNPREFIXEDHI :
1028 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_HI, & fields->f_dst32_rn_unprefixed_HI);
1029 break;
1030 case M32C_OPERAND_DST32RNUNPREFIXEDQI :
1031 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_QI, & fields->f_dst32_rn_unprefixed_QI);
1032 break;
1033 case M32C_OPERAND_DST32RNUNPREFIXEDSI :
1034 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_SI, & fields->f_dst32_rn_unprefixed_SI);
1035 break;
1036 case M32C_OPERAND_G :
1037 errmsg = parse_G (cd, strp, M32C_OPERAND_G, (long *) (& junk));
1038 break;
1039 case M32C_OPERAND_IMM_12_S4 :
1040 errmsg = parse_signed4 (cd, strp, M32C_OPERAND_IMM_12_S4, (long *) (& fields->f_imm_12_s4));
1041 break;
1042 case M32C_OPERAND_IMM_13_U3 :
1043 errmsg = parse_signed4 (cd, strp, M32C_OPERAND_IMM_13_U3, (long *) (& fields->f_imm_13_u3));
1044 break;
1045 case M32C_OPERAND_IMM_16_HI :
1046 errmsg = parse_signed16 (cd, strp, M32C_OPERAND_IMM_16_HI, (long *) (& fields->f_dsp_16_s16));
1047 break;
1048 case M32C_OPERAND_IMM_16_QI :
1049 errmsg = parse_signed8 (cd, strp, M32C_OPERAND_IMM_16_QI, (long *) (& fields->f_dsp_16_s8));
1050 break;
1051 case M32C_OPERAND_IMM_16_SI :
1052 errmsg = parse_signed32 (cd, strp, M32C_OPERAND_IMM_16_SI, (long *) (& fields->f_dsp_16_s32));
1053 break;
1054 case M32C_OPERAND_IMM_20_S4 :
1055 errmsg = parse_signed4 (cd, strp, M32C_OPERAND_IMM_20_S4, (long *) (& fields->f_imm_20_s4));
1056 break;
1057 case M32C_OPERAND_IMM_24_HI :
1058 errmsg = parse_signed16 (cd, strp, M32C_OPERAND_IMM_24_HI, (long *) (& fields->f_dsp_24_s16));
1059 break;
1060 case M32C_OPERAND_IMM_24_QI :
1061 errmsg = parse_signed8 (cd, strp, M32C_OPERAND_IMM_24_QI, (long *) (& fields->f_dsp_24_s8));
1062 break;
1063 case M32C_OPERAND_IMM_24_SI :
1064 errmsg = parse_signed32 (cd, strp, M32C_OPERAND_IMM_24_SI, (long *) (& fields->f_dsp_24_s32));
1065 break;
1066 case M32C_OPERAND_IMM_32_HI :
1067 errmsg = parse_signed16 (cd, strp, M32C_OPERAND_IMM_32_HI, (long *) (& fields->f_dsp_32_s16));
1068 break;
1069 case M32C_OPERAND_IMM_32_QI :
1070 errmsg = parse_signed8 (cd, strp, M32C_OPERAND_IMM_32_QI, (long *) (& fields->f_dsp_32_s8));
1071 break;
1072 case M32C_OPERAND_IMM_32_SI :
1073 errmsg = parse_signed32 (cd, strp, M32C_OPERAND_IMM_32_SI, (long *) (& fields->f_dsp_32_s32));
1074 break;
1075 case M32C_OPERAND_IMM_40_HI :
1076 errmsg = parse_signed16 (cd, strp, M32C_OPERAND_IMM_40_HI, (long *) (& fields->f_dsp_40_s16));
1077 break;
1078 case M32C_OPERAND_IMM_40_QI :
1079 errmsg = parse_signed8 (cd, strp, M32C_OPERAND_IMM_40_QI, (long *) (& fields->f_dsp_40_s8));
1080 break;
1081 case M32C_OPERAND_IMM_40_SI :
1082 errmsg = parse_signed32 (cd, strp, M32C_OPERAND_IMM_40_SI, (long *) (& fields->f_dsp_40_s32));
1083 break;
1084 case M32C_OPERAND_IMM_48_HI :
1085 errmsg = parse_signed16 (cd, strp, M32C_OPERAND_IMM_48_HI, (long *) (& fields->f_dsp_48_s16));
1086 break;
1087 case M32C_OPERAND_IMM_48_QI :
1088 errmsg = parse_signed8 (cd, strp, M32C_OPERAND_IMM_48_QI, (long *) (& fields->f_dsp_48_s8));
1089 break;
1090 case M32C_OPERAND_IMM_48_SI :
1091 errmsg = parse_signed32 (cd, strp, M32C_OPERAND_IMM_48_SI, (long *) (& fields->f_dsp_48_s32));
1092 break;
1093 case M32C_OPERAND_IMM_56_HI :
1094 errmsg = parse_signed16 (cd, strp, M32C_OPERAND_IMM_56_HI, (long *) (& fields->f_dsp_56_s16));
1095 break;
1096 case M32C_OPERAND_IMM_56_QI :
1097 errmsg = parse_signed8 (cd, strp, M32C_OPERAND_IMM_56_QI, (long *) (& fields->f_dsp_56_s8));
1098 break;
1099 case M32C_OPERAND_IMM_64_HI :
1100 errmsg = parse_signed16 (cd, strp, M32C_OPERAND_IMM_64_HI, (long *) (& fields->f_dsp_64_s16));
1101 break;
1102 case M32C_OPERAND_IMM_8_HI :
1103 errmsg = parse_signed16 (cd, strp, M32C_OPERAND_IMM_8_HI, (long *) (& fields->f_dsp_8_s16));
1104 break;
1105 case M32C_OPERAND_IMM_8_QI :
1106 errmsg = parse_signed8 (cd, strp, M32C_OPERAND_IMM_8_QI, (long *) (& fields->f_dsp_8_s8));
1107 break;
1108 case M32C_OPERAND_IMM_8_S4 :
1109 errmsg = parse_signed4 (cd, strp, M32C_OPERAND_IMM_8_S4, (long *) (& fields->f_imm_8_s4));
1110 break;
1111 case M32C_OPERAND_IMM_SH_12_S4 :
1112 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_shimm, & fields->f_imm_12_s4);
1113 break;
1114 case M32C_OPERAND_IMM_SH_20_S4 :
1115 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_shimm, & fields->f_imm_20_s4);
1116 break;
1117 case M32C_OPERAND_IMM_SH_8_S4 :
1118 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_shimm, & fields->f_imm_8_s4);
1119 break;
1120 case M32C_OPERAND_IMM1_S :
1121 errmsg = parse_imm1_S (cd, strp, M32C_OPERAND_IMM1_S, (long *) (& fields->f_imm1_S));
1122 break;
1123 case M32C_OPERAND_IMM3_S :
1124 errmsg = parse_imm3_S (cd, strp, M32C_OPERAND_IMM3_S, (long *) (& fields->f_imm3_S));
1125 break;
1126 case M32C_OPERAND_LAB_16_8 :
1127 {
1128 bfd_vma value = 0;
1129 errmsg = cgen_parse_address (cd, strp, M32C_OPERAND_LAB_16_8, 0, NULL, & value);
1130 fields->f_lab_16_8 = value;
1131 }
1132 break;
1133 case M32C_OPERAND_LAB_24_8 :
1134 {
1135 bfd_vma value = 0;
1136 errmsg = cgen_parse_address (cd, strp, M32C_OPERAND_LAB_24_8, 0, NULL, & value);
1137 fields->f_lab_24_8 = value;
1138 }
1139 break;
1140 case M32C_OPERAND_LAB_32_8 :
1141 {
1142 bfd_vma value = 0;
1143 errmsg = cgen_parse_address (cd, strp, M32C_OPERAND_LAB_32_8, 0, NULL, & value);
1144 fields->f_lab_32_8 = value;
1145 }
1146 break;
1147 case M32C_OPERAND_LAB_40_8 :
1148 {
1149 bfd_vma value = 0;
1150 errmsg = cgen_parse_address (cd, strp, M32C_OPERAND_LAB_40_8, 0, NULL, & value);
1151 fields->f_lab_40_8 = value;
1152 }
1153 break;
1154 case M32C_OPERAND_LAB_5_3 :
1155 {
1156 bfd_vma value = 0;
1157 errmsg = parse_lab_5_3 (cd, strp, M32C_OPERAND_LAB_5_3, 0, NULL, & value);
1158 fields->f_lab_5_3 = value;
1159 }
1160 break;
1161 case M32C_OPERAND_LAB_8_16 :
1162 {
1163 bfd_vma value = 0;
1164 errmsg = cgen_parse_address (cd, strp, M32C_OPERAND_LAB_8_16, 0, NULL, & value);
1165 fields->f_lab_8_16 = value;
1166 }
1167 break;
1168 case M32C_OPERAND_LAB_8_24 :
1169 {
1170 bfd_vma value = 0;
1171 errmsg = cgen_parse_address (cd, strp, M32C_OPERAND_LAB_8_24, 0, NULL, & value);
1172 fields->f_lab_8_24 = value;
1173 }
1174 break;
1175 case M32C_OPERAND_LAB_8_8 :
1176 {
1177 bfd_vma value = 0;
1178 errmsg = cgen_parse_address (cd, strp, M32C_OPERAND_LAB_8_8, 0, NULL, & value);
1179 fields->f_lab_8_8 = value;
1180 }
1181 break;
1182 case M32C_OPERAND_LAB32_JMP_S :
1183 {
1184 bfd_vma value = 0;
1185 errmsg = parse_lab_5_3 (cd, strp, M32C_OPERAND_LAB32_JMP_S, 0, NULL, & value);
1186 fields->f_lab32_jmp_s = value;
1187 }
1188 break;
1189 case M32C_OPERAND_Q :
1190 errmsg = parse_Q (cd, strp, M32C_OPERAND_Q, (long *) (& junk));
1191 break;
1192 case M32C_OPERAND_R0 :
1193 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_r0, & junk);
1194 break;
1195 case M32C_OPERAND_R0H :
1196 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_r0h, & junk);
1197 break;
1198 case M32C_OPERAND_R0L :
1199 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_r0l, & junk);
1200 break;
1201 case M32C_OPERAND_R1 :
1202 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_r1, & junk);
1203 break;
1204 case M32C_OPERAND_R1R2R0 :
1205 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_r1r2r0, & junk);
1206 break;
1207 case M32C_OPERAND_R2 :
1208 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_r2, & junk);
1209 break;
1210 case M32C_OPERAND_R2R0 :
1211 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_r2r0, & junk);
1212 break;
1213 case M32C_OPERAND_R3 :
1214 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_r3, & junk);
1215 break;
1216 case M32C_OPERAND_R3R1 :
1217 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_r3r1, & junk);
1218 break;
1219 case M32C_OPERAND_REGSETPOP :
1220 errmsg = parse_pop_regset (cd, strp, M32C_OPERAND_REGSETPOP, (unsigned long *) (& fields->f_8_8));
1221 break;
1222 case M32C_OPERAND_REGSETPUSH :
1223 errmsg = parse_push_regset (cd, strp, M32C_OPERAND_REGSETPUSH, (unsigned long *) (& fields->f_8_8));
1224 break;
1225 case M32C_OPERAND_RN16_PUSH_S :
1226 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_QI, & fields->f_4_1);
1227 break;
1228 case M32C_OPERAND_S :
1229 errmsg = parse_S (cd, strp, M32C_OPERAND_S, (long *) (& junk));
1230 break;
1231 case M32C_OPERAND_SRC16AN :
1232 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar, & fields->f_src16_an);
1233 break;
1234 case M32C_OPERAND_SRC16ANHI :
1235 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar_HI, & fields->f_src16_an);
1236 break;
1237 case M32C_OPERAND_SRC16ANQI :
1238 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar_QI, & fields->f_src16_an);
1239 break;
1240 case M32C_OPERAND_SRC16RNHI :
1241 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_HI, & fields->f_src16_rn);
1242 break;
1243 case M32C_OPERAND_SRC16RNQI :
1244 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_QI, & fields->f_src16_rn);
1245 break;
1246 case M32C_OPERAND_SRC32ANPREFIXED :
1247 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar, & fields->f_src32_an_prefixed);
1248 break;
1249 case M32C_OPERAND_SRC32ANPREFIXEDHI :
1250 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar_HI, & fields->f_src32_an_prefixed);
1251 break;
1252 case M32C_OPERAND_SRC32ANPREFIXEDQI :
1253 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar_QI, & fields->f_src32_an_prefixed);
1254 break;
1255 case M32C_OPERAND_SRC32ANPREFIXEDSI :
1256 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar, & fields->f_src32_an_prefixed);
1257 break;
1258 case M32C_OPERAND_SRC32ANUNPREFIXED :
1259 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar, & fields->f_src32_an_unprefixed);
1260 break;
1261 case M32C_OPERAND_SRC32ANUNPREFIXEDHI :
1262 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar_HI, & fields->f_src32_an_unprefixed);
1263 break;
1264 case M32C_OPERAND_SRC32ANUNPREFIXEDQI :
1265 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar_QI, & fields->f_src32_an_unprefixed);
1266 break;
1267 case M32C_OPERAND_SRC32ANUNPREFIXEDSI :
1268 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar, & fields->f_src32_an_unprefixed);
1269 break;
1270 case M32C_OPERAND_SRC32RNPREFIXEDHI :
1271 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_HI, & fields->f_src32_rn_prefixed_HI);
1272 break;
1273 case M32C_OPERAND_SRC32RNPREFIXEDQI :
1274 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_QI, & fields->f_src32_rn_prefixed_QI);
1275 break;
1276 case M32C_OPERAND_SRC32RNPREFIXEDSI :
1277 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_SI, & fields->f_src32_rn_prefixed_SI);
1278 break;
1279 case M32C_OPERAND_SRC32RNUNPREFIXEDHI :
1280 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_HI, & fields->f_src32_rn_unprefixed_HI);
1281 break;
1282 case M32C_OPERAND_SRC32RNUNPREFIXEDQI :
1283 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_QI, & fields->f_src32_rn_unprefixed_QI);
1284 break;
1285 case M32C_OPERAND_SRC32RNUNPREFIXEDSI :
1286 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_SI, & fields->f_src32_rn_unprefixed_SI);
1287 break;
1288 case M32C_OPERAND_SRCDST16_R0L_R0H_S_NORMAL :
1289 errmsg = parse_r0l_r0h (cd, strp, M32C_OPERAND_SRCDST16_R0L_R0H_S_NORMAL, (long *) (& fields->f_5_1));
1290 break;
1291 case M32C_OPERAND_X :
1292 errmsg = parse_X (cd, strp, M32C_OPERAND_X, (long *) (& junk));
1293 break;
1294 case M32C_OPERAND_Z :
1295 errmsg = parse_Z (cd, strp, M32C_OPERAND_Z, (long *) (& junk));
1296 break;
1297 case M32C_OPERAND_COND16_16 :
1298 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_cond16, & fields->f_dsp_16_u8);
1299 break;
1300 case M32C_OPERAND_COND16_24 :
1301 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_cond16, & fields->f_dsp_24_u8);
1302 break;
1303 case M32C_OPERAND_COND16_32 :
1304 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_cond16, & fields->f_dsp_32_u8);
1305 break;
1306 case M32C_OPERAND_COND16C :
1307 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_cond16c, & fields->f_cond16);
1308 break;
1309 case M32C_OPERAND_COND16J :
1310 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_cond16j, & fields->f_cond16);
1311 break;
1312 case M32C_OPERAND_COND16J5 :
1313 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_cond16j_5, & fields->f_cond16j_5);
1314 break;
1315 case M32C_OPERAND_COND32 :
1316 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_cond32, & fields->f_cond32);
1317 break;
1318 case M32C_OPERAND_COND32_16 :
1319 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_cond32, & fields->f_dsp_16_u8);
1320 break;
1321 case M32C_OPERAND_COND32_24 :
1322 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_cond32, & fields->f_dsp_24_u8);
1323 break;
1324 case M32C_OPERAND_COND32_32 :
1325 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_cond32, & fields->f_dsp_32_u8);
1326 break;
1327 case M32C_OPERAND_COND32_40 :
1328 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_cond32, & fields->f_dsp_40_u8);
1329 break;
1330 case M32C_OPERAND_COND32J :
1331 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_cond32, & fields->f_cond32j);
1332 break;
1333 case M32C_OPERAND_CR1_PREFIXED_32 :
1334 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_cr1_32, & fields->f_21_3);
1335 break;
1336 case M32C_OPERAND_CR1_UNPREFIXED_32 :
1337 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_cr1_32, & fields->f_13_3);
1338 break;
1339 case M32C_OPERAND_CR16 :
1340 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_cr_16, & fields->f_9_3);
1341 break;
1342 case M32C_OPERAND_CR2_32 :
1343 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_cr2_32, & fields->f_13_3);
1344 break;
1345 case M32C_OPERAND_CR3_PREFIXED_32 :
1346 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_cr3_32, & fields->f_21_3);
1347 break;
1348 case M32C_OPERAND_CR3_UNPREFIXED_32 :
1349 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_cr3_32, & fields->f_13_3);
1350 break;
1351 case M32C_OPERAND_FLAGS16 :
1352 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_flags, & fields->f_9_3);
1353 break;
1354 case M32C_OPERAND_FLAGS32 :
1355 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_flags, & fields->f_13_3);
1356 break;
1357 case M32C_OPERAND_SCCOND32 :
1358 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_cond32, & fields->f_cond16);
1359 break;
1360 case M32C_OPERAND_SIZE :
1361 errmsg = parse_size (cd, strp, M32C_OPERAND_SIZE, (long *) (& junk));
1362 break;
1363
1364 default :
1365 /* xgettext:c-format */
1366 fprintf (stderr, _("Unrecognized field %d while parsing.\n"), opindex);
1367 abort ();
1368 }
1369
1370 return errmsg;
1371 }
1372
1373 cgen_parse_fn * const m32c_cgen_parse_handlers[] =
1374 {
1375 parse_insn_normal,
1376 };
1377
1378 void
1379 m32c_cgen_init_asm (CGEN_CPU_DESC cd)
1380 {
1381 m32c_cgen_init_opcode_table (cd);
1382 m32c_cgen_init_ibld_table (cd);
1383 cd->parse_handlers = & m32c_cgen_parse_handlers[0];
1384 cd->parse_operand = m32c_cgen_parse_operand;
1385 }
1386
1387 \f
1388
1389 /* Regex construction routine.
1390
1391 This translates an opcode syntax string into a regex string,
1392 by replacing any non-character syntax element (such as an
1393 opcode) with the pattern '.*'
1394
1395 It then compiles the regex and stores it in the opcode, for
1396 later use by m32c_cgen_assemble_insn
1397
1398 Returns NULL for success, an error message for failure. */
1399
1400 char *
1401 m32c_cgen_build_insn_regex (CGEN_INSN *insn)
1402 {
1403 CGEN_OPCODE *opc = (CGEN_OPCODE *) CGEN_INSN_OPCODE (insn);
1404 const char *mnem = CGEN_INSN_MNEMONIC (insn);
1405 char rxbuf[CGEN_MAX_RX_ELEMENTS];
1406 char *rx = rxbuf;
1407 const CGEN_SYNTAX_CHAR_TYPE *syn;
1408 int reg_err;
1409
1410 syn = CGEN_SYNTAX_STRING (CGEN_OPCODE_SYNTAX (opc));
1411
1412 /* Mnemonics come first in the syntax string. */
1413 if (! CGEN_SYNTAX_MNEMONIC_P (* syn))
1414 return _("missing mnemonic in syntax string");
1415 ++syn;
1416
1417 /* Generate a case sensitive regular expression that emulates case
1418 insensitive matching in the "C" locale. We cannot generate a case
1419 insensitive regular expression because in Turkish locales, 'i' and 'I'
1420 are not equal modulo case conversion. */
1421
1422 /* Copy the literal mnemonic out of the insn. */
1423 for (; *mnem; mnem++)
1424 {
1425 char c = *mnem;
1426
1427 if (ISALPHA (c))
1428 {
1429 *rx++ = '[';
1430 *rx++ = TOLOWER (c);
1431 *rx++ = TOUPPER (c);
1432 *rx++ = ']';
1433 }
1434 else
1435 *rx++ = c;
1436 }
1437
1438 /* Copy any remaining literals from the syntax string into the rx. */
1439 for(; * syn != 0 && rx <= rxbuf + (CGEN_MAX_RX_ELEMENTS - 7 - 4); ++syn)
1440 {
1441 if (CGEN_SYNTAX_CHAR_P (* syn))
1442 {
1443 char c = CGEN_SYNTAX_CHAR (* syn);
1444
1445 switch (c)
1446 {
1447 /* Escape any regex metacharacters in the syntax. */
1448 case '.': case '[': case '\\':
1449 case '*': case '^': case '$':
1450
1451 #ifdef CGEN_ESCAPE_EXTENDED_REGEX
1452 case '?': case '{': case '}':
1453 case '(': case ')': case '*':
1454 case '|': case '+': case ']':
1455 #endif
1456 *rx++ = '\\';
1457 *rx++ = c;
1458 break;
1459
1460 default:
1461 if (ISALPHA (c))
1462 {
1463 *rx++ = '[';
1464 *rx++ = TOLOWER (c);
1465 *rx++ = TOUPPER (c);
1466 *rx++ = ']';
1467 }
1468 else
1469 *rx++ = c;
1470 break;
1471 }
1472 }
1473 else
1474 {
1475 /* Replace non-syntax fields with globs. */
1476 *rx++ = '.';
1477 *rx++ = '*';
1478 }
1479 }
1480
1481 /* Trailing whitespace ok. */
1482 * rx++ = '[';
1483 * rx++ = ' ';
1484 * rx++ = '\t';
1485 * rx++ = ']';
1486 * rx++ = '*';
1487
1488 /* But anchor it after that. */
1489 * rx++ = '$';
1490 * rx = '\0';
1491
1492 CGEN_INSN_RX (insn) = xmalloc (sizeof (regex_t));
1493 reg_err = regcomp ((regex_t *) CGEN_INSN_RX (insn), rxbuf, REG_NOSUB);
1494
1495 if (reg_err == 0)
1496 return NULL;
1497 else
1498 {
1499 static char msg[80];
1500
1501 regerror (reg_err, (regex_t *) CGEN_INSN_RX (insn), msg, 80);
1502 regfree ((regex_t *) CGEN_INSN_RX (insn));
1503 free (CGEN_INSN_RX (insn));
1504 (CGEN_INSN_RX (insn)) = NULL;
1505 return msg;
1506 }
1507 }
1508
1509 \f
1510 /* Default insn parser.
1511
1512 The syntax string is scanned and operands are parsed and stored in FIELDS.
1513 Relocs are queued as we go via other callbacks.
1514
1515 ??? Note that this is currently an all-or-nothing parser. If we fail to
1516 parse the instruction, we return 0 and the caller will start over from
1517 the beginning. Backtracking will be necessary in parsing subexpressions,
1518 but that can be handled there. Not handling backtracking here may get
1519 expensive in the case of the m68k. Deal with later.
1520
1521 Returns NULL for success, an error message for failure. */
1522
1523 static const char *
1524 parse_insn_normal (CGEN_CPU_DESC cd,
1525 const CGEN_INSN *insn,
1526 const char **strp,
1527 CGEN_FIELDS *fields)
1528 {
1529 /* ??? Runtime added insns not handled yet. */
1530 const CGEN_SYNTAX *syntax = CGEN_INSN_SYNTAX (insn);
1531 const char *str = *strp;
1532 const char *errmsg;
1533 const char *p;
1534 const CGEN_SYNTAX_CHAR_TYPE * syn;
1535 #ifdef CGEN_MNEMONIC_OPERANDS
1536 /* FIXME: wip */
1537 int past_opcode_p;
1538 #endif
1539
1540 /* For now we assume the mnemonic is first (there are no leading operands).
1541 We can parse it without needing to set up operand parsing.
1542 GAS's input scrubber will ensure mnemonics are lowercase, but we may
1543 not be called from GAS. */
1544 p = CGEN_INSN_MNEMONIC (insn);
1545 while (*p && TOLOWER (*p) == TOLOWER (*str))
1546 ++p, ++str;
1547
1548 if (* p)
1549 return _("unrecognized instruction");
1550
1551 #ifndef CGEN_MNEMONIC_OPERANDS
1552 if (* str && ! ISSPACE (* str))
1553 return _("unrecognized instruction");
1554 #endif
1555
1556 CGEN_INIT_PARSE (cd);
1557 cgen_init_parse_operand (cd);
1558 #ifdef CGEN_MNEMONIC_OPERANDS
1559 past_opcode_p = 0;
1560 #endif
1561
1562 /* We don't check for (*str != '\0') here because we want to parse
1563 any trailing fake arguments in the syntax string. */
1564 syn = CGEN_SYNTAX_STRING (syntax);
1565
1566 /* Mnemonics come first for now, ensure valid string. */
1567 if (! CGEN_SYNTAX_MNEMONIC_P (* syn))
1568 abort ();
1569
1570 ++syn;
1571
1572 while (* syn != 0)
1573 {
1574 /* Non operand chars must match exactly. */
1575 if (CGEN_SYNTAX_CHAR_P (* syn))
1576 {
1577 /* FIXME: While we allow for non-GAS callers above, we assume the
1578 first char after the mnemonic part is a space. */
1579 /* FIXME: We also take inappropriate advantage of the fact that
1580 GAS's input scrubber will remove extraneous blanks. */
1581 if (TOLOWER (*str) == TOLOWER (CGEN_SYNTAX_CHAR (* syn)))
1582 {
1583 #ifdef CGEN_MNEMONIC_OPERANDS
1584 if (CGEN_SYNTAX_CHAR(* syn) == ' ')
1585 past_opcode_p = 1;
1586 #endif
1587 ++ syn;
1588 ++ str;
1589 }
1590 else if (*str)
1591 {
1592 /* Syntax char didn't match. Can't be this insn. */
1593 static char msg [80];
1594
1595 /* xgettext:c-format */
1596 sprintf (msg, _("syntax error (expected char `%c', found `%c')"),
1597 CGEN_SYNTAX_CHAR(*syn), *str);
1598 return msg;
1599 }
1600 else
1601 {
1602 /* Ran out of input. */
1603 static char msg [80];
1604
1605 /* xgettext:c-format */
1606 sprintf (msg, _("syntax error (expected char `%c', found end of instruction)"),
1607 CGEN_SYNTAX_CHAR(*syn));
1608 return msg;
1609 }
1610 continue;
1611 }
1612
1613 /* We have an operand of some sort. */
1614 errmsg = cd->parse_operand (cd, CGEN_SYNTAX_FIELD (*syn),
1615 &str, fields);
1616 if (errmsg)
1617 return errmsg;
1618
1619 /* Done with this operand, continue with next one. */
1620 ++ syn;
1621 }
1622
1623 /* If we're at the end of the syntax string, we're done. */
1624 if (* syn == 0)
1625 {
1626 /* FIXME: For the moment we assume a valid `str' can only contain
1627 blanks now. IE: We needn't try again with a longer version of
1628 the insn and it is assumed that longer versions of insns appear
1629 before shorter ones (eg: lsr r2,r3,1 vs lsr r2,r3). */
1630 while (ISSPACE (* str))
1631 ++ str;
1632
1633 if (* str != '\0')
1634 return _("junk at end of line"); /* FIXME: would like to include `str' */
1635
1636 return NULL;
1637 }
1638
1639 /* We couldn't parse it. */
1640 return _("unrecognized instruction");
1641 }
1642 \f
1643 /* Main entry point.
1644 This routine is called for each instruction to be assembled.
1645 STR points to the insn to be assembled.
1646 We assume all necessary tables have been initialized.
1647 The assembled instruction, less any fixups, is stored in BUF.
1648 Remember that if CGEN_INT_INSN_P then BUF is an int and thus the value
1649 still needs to be converted to target byte order, otherwise BUF is an array
1650 of bytes in target byte order.
1651 The result is a pointer to the insn's entry in the opcode table,
1652 or NULL if an error occured (an error message will have already been
1653 printed).
1654
1655 Note that when processing (non-alias) macro-insns,
1656 this function recurses.
1657
1658 ??? It's possible to make this cpu-independent.
1659 One would have to deal with a few minor things.
1660 At this point in time doing so would be more of a curiosity than useful
1661 [for example this file isn't _that_ big], but keeping the possibility in
1662 mind helps keep the design clean. */
1663
1664 const CGEN_INSN *
1665 m32c_cgen_assemble_insn (CGEN_CPU_DESC cd,
1666 const char *str,
1667 CGEN_FIELDS *fields,
1668 CGEN_INSN_BYTES_PTR buf,
1669 char **errmsg)
1670 {
1671 const char *start;
1672 CGEN_INSN_LIST *ilist;
1673 const char *parse_errmsg = NULL;
1674 const char *insert_errmsg = NULL;
1675 int recognized_mnemonic = 0;
1676
1677 /* Skip leading white space. */
1678 while (ISSPACE (* str))
1679 ++ str;
1680
1681 /* The instructions are stored in hashed lists.
1682 Get the first in the list. */
1683 ilist = CGEN_ASM_LOOKUP_INSN (cd, str);
1684
1685 /* Keep looking until we find a match. */
1686 start = str;
1687 for ( ; ilist != NULL ; ilist = CGEN_ASM_NEXT_INSN (ilist))
1688 {
1689 const CGEN_INSN *insn = ilist->insn;
1690 recognized_mnemonic = 1;
1691
1692 #ifdef CGEN_VALIDATE_INSN_SUPPORTED
1693 /* Not usually needed as unsupported opcodes
1694 shouldn't be in the hash lists. */
1695 /* Is this insn supported by the selected cpu? */
1696 if (! m32c_cgen_insn_supported (cd, insn))
1697 continue;
1698 #endif
1699 /* If the RELAXED attribute is set, this is an insn that shouldn't be
1700 chosen immediately. Instead, it is used during assembler/linker
1701 relaxation if possible. */
1702 if (CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_RELAXED) != 0)
1703 continue;
1704
1705 str = start;
1706
1707 /* Skip this insn if str doesn't look right lexically. */
1708 if (CGEN_INSN_RX (insn) != NULL &&
1709 regexec ((regex_t *) CGEN_INSN_RX (insn), str, 0, NULL, 0) == REG_NOMATCH)
1710 continue;
1711
1712 /* Allow parse/insert handlers to obtain length of insn. */
1713 CGEN_FIELDS_BITSIZE (fields) = CGEN_INSN_BITSIZE (insn);
1714
1715 parse_errmsg = CGEN_PARSE_FN (cd, insn) (cd, insn, & str, fields);
1716 if (parse_errmsg != NULL)
1717 continue;
1718
1719 /* ??? 0 is passed for `pc'. */
1720 insert_errmsg = CGEN_INSERT_FN (cd, insn) (cd, insn, fields, buf,
1721 (bfd_vma) 0);
1722 if (insert_errmsg != NULL)
1723 continue;
1724
1725 /* It is up to the caller to actually output the insn and any
1726 queued relocs. */
1727 return insn;
1728 }
1729
1730 {
1731 static char errbuf[150];
1732 #ifdef CGEN_VERBOSE_ASSEMBLER_ERRORS
1733 const char *tmp_errmsg;
1734
1735 /* If requesting verbose error messages, use insert_errmsg.
1736 Failing that, use parse_errmsg. */
1737 tmp_errmsg = (insert_errmsg ? insert_errmsg :
1738 parse_errmsg ? parse_errmsg :
1739 recognized_mnemonic ?
1740 _("unrecognized form of instruction") :
1741 _("unrecognized instruction"));
1742
1743 if (strlen (start) > 50)
1744 /* xgettext:c-format */
1745 sprintf (errbuf, "%s `%.50s...'", tmp_errmsg, start);
1746 else
1747 /* xgettext:c-format */
1748 sprintf (errbuf, "%s `%.50s'", tmp_errmsg, start);
1749 #else
1750 if (strlen (start) > 50)
1751 /* xgettext:c-format */
1752 sprintf (errbuf, _("bad instruction `%.50s...'"), start);
1753 else
1754 /* xgettext:c-format */
1755 sprintf (errbuf, _("bad instruction `%.50s'"), start);
1756 #endif
1757
1758 *errmsg = errbuf;
1759 return NULL;
1760 }
1761 }
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