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1 /* m68hc11-dis.c -- Motorola 68HC11 & 68HC12 disassembly
2 Copyright 1999, 2000, 2001, 2002 Free Software Foundation, Inc.
3 Written by Stephane Carrez (stcarrez@nerim.fr)
4
5 This program is free software; you can redistribute it and/or modify
6 it under the terms of the GNU General Public License as published by
7 the Free Software Foundation; either version 2 of the License, or
8 (at your option) any later version.
9
10 This program is distributed in the hope that it will be useful,
11 but WITHOUT ANY WARRANTY; without even the implied warranty of
12 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 GNU General Public License for more details.
14
15 You should have received a copy of the GNU General Public License
16 along with this program; if not, write to the Free Software
17 Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
18
19 #include <stdio.h>
20
21 #include "ansidecl.h"
22 #include "opcode/m68hc11.h"
23 #include "dis-asm.h"
24
25 static const char *const reg_name[] = {
26 "X", "Y", "SP", "PC"
27 };
28
29 static const char *const reg_src_table[] = {
30 "A", "B", "CCR", "TMP3", "D", "X", "Y", "SP"
31 };
32
33 static const char *const reg_dst_table[] = {
34 "A", "B", "CCR", "TMP2", "D", "X", "Y", "SP"
35 };
36
37 #define OP_PAGE_MASK (M6811_OP_PAGE2|M6811_OP_PAGE3|M6811_OP_PAGE4)
38
39 /* Prototypes for local functions. */
40 static int read_memory
41 PARAMS ((bfd_vma, bfd_byte *, int, struct disassemble_info *));
42 static int print_indexed_operand
43 PARAMS ((bfd_vma, struct disassemble_info *, int*, int));
44 static int print_insn
45 PARAMS ((bfd_vma, struct disassemble_info *, int));
46
47 static int
48 read_memory (memaddr, buffer, size, info)
49 bfd_vma memaddr;
50 bfd_byte *buffer;
51 int size;
52 struct disassemble_info *info;
53 {
54 int status;
55
56 /* Get first byte. Only one at a time because we don't know the
57 size of the insn. */
58 status = (*info->read_memory_func) (memaddr, buffer, size, info);
59 if (status != 0)
60 {
61 (*info->memory_error_func) (status, memaddr, info);
62 return -1;
63 }
64 return 0;
65 }
66
67
68 /* Read the 68HC12 indexed operand byte and print the corresponding mode.
69 Returns the number of bytes read or -1 if failure. */
70 static int
71 print_indexed_operand (memaddr, info, indirect, mov_insn)
72 bfd_vma memaddr;
73 struct disassemble_info *info;
74 int *indirect;
75 int mov_insn;
76 {
77 bfd_byte buffer[4];
78 int reg;
79 int status;
80 short sval;
81 int pos = 1;
82
83 if (indirect)
84 *indirect = 0;
85
86 status = read_memory (memaddr, &buffer[0], 1, info);
87 if (status != 0)
88 {
89 return status;
90 }
91
92 /* n,r with 5-bits signed constant. */
93 if ((buffer[0] & 0x20) == 0)
94 {
95 reg = (buffer[0] >> 6) & 3;
96 sval = (buffer[0] & 0x1f);
97 if (sval & 0x10)
98 sval |= 0xfff0;
99 (*info->fprintf_func) (info->stream, "%d,%s",
100 (int) sval, reg_name[reg]);
101 }
102
103 /* Auto pre/post increment/decrement. */
104 else if ((buffer[0] & 0xc0) != 0xc0)
105 {
106 const char *mode;
107
108 reg = (buffer[0] >> 6) & 3;
109 sval = (buffer[0] & 0x0f);
110 if (sval & 0x8)
111 {
112 sval |= 0xfff0;
113 sval = -sval;
114 mode = "-";
115 }
116 else
117 {
118 sval = sval + 1;
119 mode = "+";
120 }
121 (*info->fprintf_func) (info->stream, "%d,%s%s%s",
122 (int) sval,
123 (buffer[0] & 0x10 ? "" : mode),
124 reg_name[reg], (buffer[0] & 0x10 ? mode : ""));
125 }
126
127 /* [n,r] 16-bits offset indexed indirect. */
128 else if ((buffer[0] & 0x07) == 3)
129 {
130 if (mov_insn)
131 {
132 (*info->fprintf_func) (info->stream, "<invalid op: 0x%x>",
133 buffer[0] & 0x0ff);
134 return 0;
135 }
136 reg = (buffer[0] >> 3) & 0x03;
137 status = read_memory (memaddr + pos, &buffer[0], 2, info);
138 if (status != 0)
139 {
140 return status;
141 }
142
143 pos += 2;
144 sval = ((buffer[0] << 8) | (buffer[1] & 0x0FF));
145 (*info->fprintf_func) (info->stream, "[%u,%s]",
146 sval & 0x0ffff, reg_name[reg]);
147 if (indirect)
148 *indirect = 1;
149 }
150 else if ((buffer[0] & 0x4) == 0)
151 {
152 if (mov_insn)
153 {
154 (*info->fprintf_func) (info->stream, "<invalid op: 0x%x>",
155 buffer[0] & 0x0ff);
156 return 0;
157 }
158 reg = (buffer[0] >> 3) & 0x03;
159 status = read_memory (memaddr + pos,
160 &buffer[1], (buffer[0] & 0x2 ? 2 : 1), info);
161 if (status != 0)
162 {
163 return status;
164 }
165 if (buffer[0] & 2)
166 {
167 sval = ((buffer[1] << 8) | (buffer[2] & 0x0FF));
168 sval &= 0x0FFFF;
169 pos += 2;
170 }
171 else
172 {
173 sval = buffer[1] & 0x00ff;
174 if (buffer[0] & 0x01)
175 sval |= 0xff00;
176 pos++;
177 }
178 (*info->fprintf_func) (info->stream, "%d,%s",
179 (int) sval, reg_name[reg]);
180 }
181 else
182 {
183 reg = (buffer[0] >> 3) & 0x03;
184 switch (buffer[0] & 3)
185 {
186 case 0:
187 (*info->fprintf_func) (info->stream, "A,%s", reg_name[reg]);
188 break;
189 case 1:
190 (*info->fprintf_func) (info->stream, "B,%s", reg_name[reg]);
191 break;
192 case 2:
193 (*info->fprintf_func) (info->stream, "D,%s", reg_name[reg]);
194 break;
195 case 3:
196 default:
197 (*info->fprintf_func) (info->stream, "[D,%s]", reg_name[reg]);
198 if (indirect)
199 *indirect = 1;
200 break;
201 }
202 }
203
204 return pos;
205 }
206
207 /* Disassemble one instruction at address 'memaddr'. Returns the number
208 of bytes used by that instruction. */
209 static int
210 print_insn (memaddr, info, arch)
211 bfd_vma memaddr;
212 struct disassemble_info *info;
213 int arch;
214 {
215 int status;
216 bfd_byte buffer[4];
217 unsigned char code;
218 long format, pos, i;
219 short sval;
220 const struct m68hc11_opcode *opcode;
221
222 /* Get first byte. Only one at a time because we don't know the
223 size of the insn. */
224 status = read_memory (memaddr, buffer, 1, info);
225 if (status != 0)
226 {
227 return status;
228 }
229
230 format = 0;
231 code = buffer[0];
232 pos = 0;
233
234 /* Look for page2,3,4 opcodes. */
235 if (code == M6811_OPCODE_PAGE2)
236 {
237 pos++;
238 format = M6811_OP_PAGE2;
239 }
240 else if (code == M6811_OPCODE_PAGE3 && arch == cpu6811)
241 {
242 pos++;
243 format = M6811_OP_PAGE3;
244 }
245 else if (code == M6811_OPCODE_PAGE4 && arch == cpu6811)
246 {
247 pos++;
248 format = M6811_OP_PAGE4;
249 }
250
251 /* We are in page2,3,4; get the real opcode. */
252 if (pos == 1)
253 {
254 status = read_memory (memaddr + pos, &buffer[1], 1, info);
255 if (status != 0)
256 {
257 return status;
258 }
259 code = buffer[1];
260 }
261
262
263 /* Look first for a 68HC12 alias. All of them are 2-bytes long and
264 in page 1. There is no operand to print. We read the second byte
265 only when we have a possible match. */
266 if ((arch & cpu6812) && format == 0)
267 {
268 int must_read = 1;
269
270 /* Walk the alias table to find a code1+code2 match. */
271 for (i = 0; i < m68hc12_num_alias; i++)
272 {
273 if (m68hc12_alias[i].code1 == code)
274 {
275 if (must_read)
276 {
277 status = read_memory (memaddr + pos + 1,
278 &buffer[1], 1, info);
279 if (status != 0)
280 break;
281
282 must_read = 1;
283 }
284 if (m68hc12_alias[i].code2 == (unsigned char) buffer[1])
285 {
286 (*info->fprintf_func) (info->stream, "%s",
287 m68hc12_alias[i].name);
288 return 2;
289 }
290 }
291 }
292 }
293
294 pos++;
295
296 /* Scan the opcode table until we find the opcode
297 with the corresponding page. */
298 opcode = m68hc11_opcodes;
299 for (i = 0; i < m68hc11_num_opcodes; i++, opcode++)
300 {
301 int offset;
302
303 if ((opcode->arch & arch) == 0)
304 continue;
305 if (opcode->opcode != code)
306 continue;
307 if ((opcode->format & OP_PAGE_MASK) != format)
308 continue;
309
310 if (opcode->format & M6812_OP_REG)
311 {
312 int j;
313 int is_jump;
314
315 if (opcode->format & M6811_OP_JUMP_REL)
316 is_jump = 1;
317 else
318 is_jump = 0;
319
320 status = read_memory (memaddr + pos, &buffer[0], 1, info);
321 if (status != 0)
322 {
323 return status;
324 }
325 for (j = 0; i + j < m68hc11_num_opcodes; j++)
326 {
327 if ((opcode[j].arch & arch) == 0)
328 continue;
329 if (opcode[j].opcode != code)
330 continue;
331 if (is_jump)
332 {
333 if (!(opcode[j].format & M6811_OP_JUMP_REL))
334 continue;
335
336 if ((opcode[j].format & M6812_OP_IBCC_MARKER)
337 && (buffer[0] & 0xc0) != 0x80)
338 continue;
339 if ((opcode[j].format & M6812_OP_TBCC_MARKER)
340 && (buffer[0] & 0xc0) != 0x40)
341 continue;
342 if ((opcode[j].format & M6812_OP_DBCC_MARKER)
343 && (buffer[0] & 0xc0) != 0)
344 continue;
345 if ((opcode[j].format & M6812_OP_EQ_MARKER)
346 && (buffer[0] & 0x20) == 0)
347 break;
348 if (!(opcode[j].format & M6812_OP_EQ_MARKER)
349 && (buffer[0] & 0x20) != 0)
350 break;
351 continue;
352 }
353 if (opcode[j].format & M6812_OP_EXG_MARKER && buffer[0] & 0x80)
354 break;
355 if ((opcode[j].format & M6812_OP_SEX_MARKER)
356 && (((buffer[0] & 0x07) >= 3 && (buffer[0] & 7) <= 7))
357 && ((buffer[0] & 0x0f0) <= 0x20))
358 break;
359 if (opcode[j].format & M6812_OP_TFR_MARKER
360 && !(buffer[0] & 0x80))
361 break;
362 }
363 if (i + j < m68hc11_num_opcodes)
364 opcode = &opcode[j];
365 }
366
367 /* We have found the opcode. Extract the operand and print it. */
368 (*info->fprintf_func) (info->stream, "%s", opcode->name);
369
370 format = opcode->format;
371 if (format & (M6811_OP_MASK | M6811_OP_BITMASK
372 | M6811_OP_JUMP_REL | M6812_OP_JUMP_REL16))
373 {
374 (*info->fprintf_func) (info->stream, "\t");
375 }
376
377 /* The movb and movw must be handled in a special way...
378 The source constant 'ii' is not always at the same place.
379 This is the same for the destination for the post-indexed byte.
380 The 'offset' is used to do the appropriate correction.
381
382 offset offset
383 for constant for destination
384 movb 18 OB ii hh ll 0 0
385 18 08 xb ii 1 -1
386 18 0C hh ll hh ll 0 0
387 18 09 xb hh ll 1 -1
388 18 0D xb hh ll 0 0
389 18 0A xb xb 0 0
390
391 movw 18 03 jj kk hh ll 0 0
392 18 00 xb jj kk 1 -1
393 18 04 hh ll hh ll 0 0
394 18 01 xb hh ll 1 -1
395 18 05 xb hh ll 0 0
396 18 02 xb xb 0 0
397
398 After the source operand is read, the position 'pos' is incremented
399 this explains the negative offset for destination.
400
401 movb/movw above are the only instructions with this matching
402 format. */
403 offset = ((format & M6812_OP_IDX_P2)
404 && (format & (M6811_OP_IMM8 | M6811_OP_IMM16 |
405 M6811_OP_IND16)));
406
407 /* Operand with one more byte: - immediate, offset,
408 direct-low address. */
409 if (format &
410 (M6811_OP_IMM8 | M6811_OP_IX | M6811_OP_IY | M6811_OP_DIRECT))
411 {
412 status = read_memory (memaddr + pos + offset, &buffer[0], 1, info);
413 if (status != 0)
414 {
415 return status;
416 }
417
418 pos++;
419
420 /* This movb/movw is special (see above). */
421 offset = -offset;
422
423 if (format & M6811_OP_IMM8)
424 {
425 (*info->fprintf_func) (info->stream, "#%d", (int) buffer[0]);
426 format &= ~M6811_OP_IMM8;
427 }
428 else if (format & M6811_OP_IX)
429 {
430 /* Offsets are in range 0..255, print them unsigned. */
431 (*info->fprintf_func) (info->stream, "%u,x", buffer[0] & 0x0FF);
432 format &= ~M6811_OP_IX;
433 }
434 else if (format & M6811_OP_IY)
435 {
436 (*info->fprintf_func) (info->stream, "%u,y", buffer[0] & 0x0FF);
437 format &= ~M6811_OP_IY;
438 }
439 else if (format & M6811_OP_DIRECT)
440 {
441 (*info->fprintf_func) (info->stream, "*");
442 (*info->print_address_func) (buffer[0] & 0x0FF, info);
443 format &= ~M6811_OP_DIRECT;
444 }
445 }
446
447 #define M6812_INDEXED_FLAGS (M6812_OP_IDX|M6812_OP_IDX_1|M6812_OP_IDX_2)
448 /* Analyze the 68HC12 indexed byte. */
449 if (format & M6812_INDEXED_FLAGS)
450 {
451 int indirect;
452
453 status = print_indexed_operand (memaddr + pos, info, &indirect, 0);
454 if (status < 0)
455 {
456 return status;
457 }
458 pos += status;
459
460 /* The indirect addressing mode of the call instruction does
461 not need the page code. */
462 if ((format & M6812_OP_PAGE) && indirect)
463 format &= ~M6812_OP_PAGE;
464 }
465
466 /* 68HC12 dbcc/ibcc/tbcc operands. */
467 if ((format & M6812_OP_REG) && (format & M6811_OP_JUMP_REL))
468 {
469 status = read_memory (memaddr + pos, &buffer[0], 2, info);
470 if (status != 0)
471 {
472 return status;
473 }
474 (*info->fprintf_func) (info->stream, "%s,",
475 reg_src_table[buffer[0] & 0x07]);
476 sval = buffer[1] & 0x0ff;
477 if (buffer[0] & 0x10)
478 sval |= 0xff00;
479
480 pos += 2;
481 (*info->print_address_func) (memaddr + pos + sval, info);
482 format &= ~(M6812_OP_REG | M6811_OP_JUMP_REL);
483 }
484 else if (format & (M6812_OP_REG | M6812_OP_REG_2))
485 {
486 status = read_memory (memaddr + pos, &buffer[0], 1, info);
487 if (status != 0)
488 {
489 return status;
490 }
491
492 pos++;
493 (*info->fprintf_func) (info->stream, "%s,%s",
494 reg_src_table[(buffer[0] >> 4) & 7],
495 reg_dst_table[(buffer[0] & 7)]);
496 }
497
498 /* M6811_OP_BITMASK and M6811_OP_JUMP_REL must be treated separately
499 and in that order. The brset/brclr insn have a bitmask and then
500 a relative branch offset. */
501 if (format & M6811_OP_BITMASK)
502 {
503 status = read_memory (memaddr + pos, &buffer[0], 1, info);
504 if (status != 0)
505 {
506 return status;
507 }
508 pos++;
509 (*info->fprintf_func) (info->stream, " #$%02x%s",
510 buffer[0] & 0x0FF,
511 (format & M6811_OP_JUMP_REL ? " " : ""));
512 format &= ~M6811_OP_BITMASK;
513 }
514 if (format & M6811_OP_JUMP_REL)
515 {
516 int val;
517
518 status = read_memory (memaddr + pos, &buffer[0], 1, info);
519 if (status != 0)
520 {
521 return status;
522 }
523
524 pos++;
525 val = (buffer[0] & 0x80) ? buffer[0] | 0xFFFFFF00 : buffer[0];
526 (*info->print_address_func) (memaddr + pos + val, info);
527 format &= ~M6811_OP_JUMP_REL;
528 }
529 else if (format & M6812_OP_JUMP_REL16)
530 {
531 int val;
532
533 status = read_memory (memaddr + pos, &buffer[0], 2, info);
534 if (status != 0)
535 {
536 return status;
537 }
538
539 pos += 2;
540 val = ((buffer[0] << 8) | (buffer[1] & 0x0FF));
541 if (val & 0x8000)
542 val |= 0xffff0000;
543
544 (*info->print_address_func) (memaddr + pos + val, info);
545 format &= ~M6812_OP_JUMP_REL16;
546 }
547 if (format & (M6811_OP_IMM16 | M6811_OP_IND16))
548 {
549 int val;
550 bfd_vma addr;
551 unsigned page = 0;
552
553 status = read_memory (memaddr + pos + offset, &buffer[0], 2, info);
554 if (status != 0)
555 {
556 return status;
557 }
558 if (format & M6812_OP_IDX_P2)
559 offset = -2;
560 else
561 offset = 0;
562 pos += 2;
563
564 val = ((buffer[0] << 8) | (buffer[1] & 0x0FF));
565 val &= 0x0FFFF;
566 addr = val;
567 if (format & M6812_OP_PAGE)
568 {
569 status = read_memory (memaddr + pos + offset, buffer, 1, info);
570 if (status != 0)
571 return status;
572
573 page = (unsigned) buffer[0];
574 if (addr >= M68HC12_BANK_BASE && addr < 0x0c000)
575 addr = ((val - M68HC12_BANK_BASE)
576 | (page << M68HC12_BANK_SHIFT))
577 + M68HC12_BANK_VIRT;
578 }
579 else if ((arch & cpu6812)
580 && addr >= M68HC12_BANK_BASE && addr < 0x0c000)
581 {
582 int cur_page;
583 bfd_vma vaddr;
584
585 if (memaddr >= M68HC12_BANK_VIRT)
586 cur_page = ((memaddr - M68HC12_BANK_VIRT)
587 >> M68HC12_BANK_SHIFT);
588 else
589 cur_page = 0;
590
591 vaddr = ((addr - M68HC12_BANK_BASE)
592 + (cur_page << M68HC12_BANK_SHIFT))
593 + M68HC12_BANK_VIRT;
594 if (!info->symbol_at_address_func (addr, info)
595 && info->symbol_at_address_func (vaddr, info))
596 addr = vaddr;
597 }
598 if (format & M6811_OP_IMM16)
599 {
600 format &= ~M6811_OP_IMM16;
601 (*info->fprintf_func) (info->stream, "#");
602 }
603 else
604 format &= ~M6811_OP_IND16;
605
606 (*info->print_address_func) (addr, info);
607 if (format & M6812_OP_PAGE)
608 {
609 (* info->fprintf_func) (info->stream, " {");
610 (* info->print_address_func) (val, info);
611 (* info->fprintf_func) (info->stream, ", %d}", page);
612 format &= ~M6812_OP_PAGE;
613 pos += 1;
614 }
615 }
616
617 if (format & M6812_OP_IDX_P2)
618 {
619 (*info->fprintf_func) (info->stream, ", ");
620 status = print_indexed_operand (memaddr + pos + offset, info, 0, 1);
621 if (status < 0)
622 return status;
623 pos += status;
624 }
625
626 if (format & M6812_OP_IND16_P2)
627 {
628 int val;
629
630 (*info->fprintf_func) (info->stream, ", ");
631
632 status = read_memory (memaddr + pos + offset, &buffer[0], 2, info);
633 if (status != 0)
634 {
635 return status;
636 }
637 pos += 2;
638
639 val = ((buffer[0] << 8) | (buffer[1] & 0x0FF));
640 val &= 0x0FFFF;
641 (*info->print_address_func) (val, info);
642 }
643
644 if (format & M6812_OP_PAGE)
645 {
646 int val;
647
648 status = read_memory (memaddr + pos + offset, &buffer[0], 1, info);
649 if (status != 0)
650 {
651 return status;
652 }
653 pos += 1;
654
655 val = buffer[0] & 0x0ff;
656 (*info->fprintf_func) (info->stream, ", %d", val);
657 }
658
659 #ifdef DEBUG
660 /* Consistency check. 'format' must be 0, so that we have handled
661 all formats; and the computed size of the insn must match the
662 opcode table content. */
663 if (format & ~(M6811_OP_PAGE4 | M6811_OP_PAGE3 | M6811_OP_PAGE2))
664 {
665 (*info->fprintf_func) (info->stream, "; Error, format: %x", format);
666 }
667 if (pos != opcode->size)
668 {
669 (*info->fprintf_func) (info->stream, "; Error, size: %d expect %d",
670 pos, opcode->size);
671 }
672 #endif
673 return pos;
674 }
675
676 /* Opcode not recognized. */
677 if (format == M6811_OP_PAGE2 && arch & cpu6812
678 && ((code >= 0x30 && code <= 0x39) || (code >= 0x40 && code <= 0xff)))
679 (*info->fprintf_func) (info->stream, "trap\t#%d", code & 0x0ff);
680
681 else if (format == M6811_OP_PAGE2)
682 (*info->fprintf_func) (info->stream, ".byte\t0x%02x, 0x%02x",
683 M6811_OPCODE_PAGE2, code);
684 else if (format == M6811_OP_PAGE3)
685 (*info->fprintf_func) (info->stream, ".byte\t0x%02x, 0x%02x",
686 M6811_OPCODE_PAGE3, code);
687 else if (format == M6811_OP_PAGE4)
688 (*info->fprintf_func) (info->stream, ".byte\t0x%02x, 0x%02x",
689 M6811_OPCODE_PAGE4, code);
690 else
691 (*info->fprintf_func) (info->stream, ".byte\t0x%02x", code);
692
693 return pos;
694 }
695
696 /* Disassemble one instruction at address 'memaddr'. Returns the number
697 of bytes used by that instruction. */
698 int
699 print_insn_m68hc11 (memaddr, info)
700 bfd_vma memaddr;
701 struct disassemble_info *info;
702 {
703 return print_insn (memaddr, info, cpu6811);
704 }
705
706 int
707 print_insn_m68hc12 (memaddr, info)
708 bfd_vma memaddr;
709 struct disassemble_info *info;
710 {
711 return print_insn (memaddr, info, cpu6812);
712 }