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Fix RL78 disassembly of DE+offset addressing to always show the offset, even when...
[thirdparty/binutils-gdb.git] / opcodes / rl78-decode.c
1 #line 1 "rl78-decode.opc"
2 /* -*- c -*- */
3 /* Copyright (C) 2012-2015 Free Software Foundation, Inc.
4 Contributed by Red Hat.
5 Written by DJ Delorie.
6
7 This file is part of the GNU opcodes library.
8
9 This library is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 3, or (at your option)
12 any later version.
13
14 It is distributed in the hope that it will be useful, but WITHOUT
15 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
16 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
17 License for more details.
18
19 You should have received a copy of the GNU General Public License
20 along with this program; if not, write to the Free Software
21 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
22 MA 02110-1301, USA. */
23
24 #include "sysdep.h"
25 #include <stdio.h>
26 #include <stdlib.h>
27 #include <string.h>
28 #include "ansidecl.h"
29 #include "opcode/rl78.h"
30
31 static int trace = 0;
32
33 typedef struct
34 {
35 RL78_Opcode_Decoded * rl78;
36 int (* getbyte)(void *);
37 void * ptr;
38 unsigned char * op;
39 } LocalData;
40
41 #define ID(x) rl78->id = RLO_##x, rl78->lineno = __LINE__
42 #define OP(n,t,r,a) (rl78->op[n].type = t, \
43 rl78->op[n].reg = r, \
44 rl78->op[n].addend = a )
45 #define OPX(n,t,r1,r2,a) \
46 (rl78->op[n].type = t, \
47 rl78->op[n].reg = r1, \
48 rl78->op[n].reg2 = r2, \
49 rl78->op[n].addend = a )
50
51 #define W() rl78->size = RL78_Word
52
53 #define AU ATTRIBUTE_UNUSED
54 #define GETBYTE() (ld->op [ld->rl78->n_bytes++] = ld->getbyte (ld->ptr))
55 #define B ((unsigned long) GETBYTE())
56
57 #define SYNTAX(x) rl78->syntax = x
58
59 #define UNSUPPORTED() \
60 rl78->syntax = "*unknown*"
61
62 #define RB(x) ((x)+RL78_Reg_X)
63 #define RW(x) ((x)+RL78_Reg_AX)
64
65 #define Fz rl78->flags = RL78_PSW_Z
66 #define Fza rl78->flags = RL78_PSW_Z | RL78_PSW_AC
67 #define Fzc rl78->flags = RL78_PSW_Z | RL78_PSW_CY
68 #define Fzac rl78->flags = RL78_PSW_Z | RL78_PSW_AC | RL78_PSW_CY
69 #define Fa rl78->flags = RL78_PSW_AC
70 #define Fc rl78->flags = RL78_PSW_CY
71 #define Fac rl78->flags = RL78_PSW_AC | RL78_PSW_CY
72
73 #define IMMU(bytes) immediate (bytes, 0, ld)
74 #define IMMS(bytes) immediate (bytes, 1, ld)
75
76 static int
77 immediate (int bytes, int sign_extend, LocalData * ld)
78 {
79 unsigned long i = 0;
80
81 switch (bytes)
82 {
83 case 1:
84 i |= B;
85 if (sign_extend && (i & 0x80))
86 i -= 0x100;
87 break;
88 case 2:
89 i |= B;
90 i |= B << 8;
91 if (sign_extend && (i & 0x8000))
92 i -= 0x10000;
93 break;
94 case 3:
95 i |= B;
96 i |= B << 8;
97 i |= B << 16;
98 if (sign_extend && (i & 0x800000))
99 i -= 0x1000000;
100 break;
101 default:
102 fprintf (stderr, "Programmer error: immediate() called with invalid byte count %d\n", bytes);
103 abort();
104 }
105 return i;
106 }
107
108 #define DC(c) OP (0, RL78_Operand_Immediate, 0, c)
109 #define DR(r) OP (0, RL78_Operand_Register, RL78_Reg_##r, 0)
110 #define DRB(r) OP (0, RL78_Operand_Register, RB(r), 0)
111 #define DRW(r) OP (0, RL78_Operand_Register, RW(r), 0)
112 #define DM(r,a) OP (0, RL78_Operand_Indirect, RL78_Reg_##r, a)
113 #define DM2(r1,r2,a) OPX (0, RL78_Operand_Indirect, RL78_Reg_##r1, RL78_Reg_##r2, a)
114 #define DE() rl78->op[0].use_es = 1
115 #define DB(b) set_bit (rl78->op, b)
116 #define DCY() DR(PSW); DB(0)
117 #define DPUSH() OP (0, RL78_Operand_PreDec, RL78_Reg_SP, 0);
118
119 #define SC(c) OP (1, RL78_Operand_Immediate, 0, c)
120 #define SR(r) OP (1, RL78_Operand_Register, RL78_Reg_##r, 0)
121 #define SRB(r) OP (1, RL78_Operand_Register, RB(r), 0)
122 #define SRW(r) OP (1, RL78_Operand_Register, RW(r), 0)
123 #define SM(r,a) OP (1, RL78_Operand_Indirect, RL78_Reg_##r, a)
124 #define SM2(r1,r2,a) OPX (1, RL78_Operand_Indirect, RL78_Reg_##r1, RL78_Reg_##r2, a)
125 #define SE() rl78->op[1].use_es = 1
126 #define SB(b) set_bit (rl78->op+1, b)
127 #define SCY() SR(PSW); SB(0)
128 #define COND(c) rl78->op[1].condition = RL78_Condition_##c
129 #define SPOP() OP (1, RL78_Operand_PostInc, RL78_Reg_SP, 0);
130
131 static void
132 set_bit (RL78_Opcode_Operand *op, int bit)
133 {
134 op->bit_number = bit;
135 switch (op->type) {
136 case RL78_Operand_Register:
137 op->type = RL78_Operand_Bit;
138 break;
139 case RL78_Operand_Indirect:
140 op->type = RL78_Operand_BitIndirect;
141 break;
142 default:
143 break;
144 }
145 }
146
147 static int
148 saddr (int x)
149 {
150 if (x < 0x20)
151 return 0xfff00 + x;
152 return 0xffe00 + x;
153 }
154
155 static int
156 sfr (int x)
157 {
158 return 0xfff00 + x;
159 }
160
161 #define SADDR saddr (IMMU (1))
162 #define SFR sfr (IMMU (1))
163
164 int
165 rl78_decode_opcode (unsigned long pc AU,
166 RL78_Opcode_Decoded * rl78,
167 int (* getbyte)(void *),
168 void * ptr,
169 RL78_Dis_Isa isa)
170 {
171 LocalData lds, * ld = &lds;
172 unsigned char op_buf[20] = {0};
173 unsigned char *op = op_buf;
174 int op0, op1;
175
176 lds.rl78 = rl78;
177 lds.getbyte = getbyte;
178 lds.ptr = ptr;
179 lds.op = op;
180
181 memset (rl78, 0, sizeof (*rl78));
182
183 start_again:
184
185 /* Byte registers, not including A. */
186 /* Word registers, not including AX. */
187
188 /*----------------------------------------------------------------------*/
189 /* ES: prefix */
190
191 GETBYTE ();
192 switch (op[0] & 0xff)
193 {
194 case 0x00:
195 {
196 /** 0000 0000 nop */
197 if (trace)
198 {
199 printf ("\033[33m%s\033[0m %02x\n",
200 "/** 0000 0000 nop */",
201 op[0]);
202 }
203 SYNTAX("nop");
204 #line 912 "rl78-decode.opc"
205 ID(nop);
206
207 /*----------------------------------------------------------------------*/
208
209 }
210 break;
211 case 0x01:
212 case 0x03:
213 case 0x05:
214 case 0x07:
215 {
216 /** 0000 0rw1 addw %0, %1 */
217 #line 274 "rl78-decode.opc"
218 int rw AU = (op[0] >> 1) & 0x03;
219 if (trace)
220 {
221 printf ("\033[33m%s\033[0m %02x\n",
222 "/** 0000 0rw1 addw %0, %1 */",
223 op[0]);
224 printf (" rw = 0x%x\n", rw);
225 }
226 SYNTAX("addw %0, %1");
227 #line 274 "rl78-decode.opc"
228 ID(add); W(); DR(AX); SRW(rw); Fzac;
229
230 }
231 break;
232 case 0x02:
233 {
234 /** 0000 0010 addw %0, %e!1 */
235 if (trace)
236 {
237 printf ("\033[33m%s\033[0m %02x\n",
238 "/** 0000 0010 addw %0, %e!1 */",
239 op[0]);
240 }
241 SYNTAX("addw %0, %e!1");
242 #line 265 "rl78-decode.opc"
243 ID(add); W(); DR(AX); SM(None, IMMU(2)); Fzac;
244
245 }
246 break;
247 case 0x04:
248 {
249 /** 0000 0100 addw %0, #%1 */
250 if (trace)
251 {
252 printf ("\033[33m%s\033[0m %02x\n",
253 "/** 0000 0100 addw %0, #%1 */",
254 op[0]);
255 }
256 SYNTAX("addw %0, #%1");
257 #line 271 "rl78-decode.opc"
258 ID(add); W(); DR(AX); SC(IMMU(2)); Fzac;
259
260 }
261 break;
262 case 0x06:
263 {
264 /** 0000 0110 addw %0, %1 */
265 if (trace)
266 {
267 printf ("\033[33m%s\033[0m %02x\n",
268 "/** 0000 0110 addw %0, %1 */",
269 op[0]);
270 }
271 SYNTAX("addw %0, %1");
272 #line 277 "rl78-decode.opc"
273 ID(add); W(); DR(AX); SM(None, SADDR); Fzac;
274
275 }
276 break;
277 case 0x08:
278 {
279 /** 0000 1000 xch a, x */
280 if (trace)
281 {
282 printf ("\033[33m%s\033[0m %02x\n",
283 "/** 0000 1000 xch a, x */",
284 op[0]);
285 }
286 SYNTAX("xch a, x");
287 #line 1235 "rl78-decode.opc"
288 ID(xch); DR(A); SR(X);
289
290 /*----------------------------------------------------------------------*/
291
292 }
293 break;
294 case 0x09:
295 {
296 /** 0000 1001 mov %0, %e1 */
297 if (trace)
298 {
299 printf ("\033[33m%s\033[0m %02x\n",
300 "/** 0000 1001 mov %0, %e1 */",
301 op[0]);
302 }
303 SYNTAX("mov %0, %e1");
304 #line 678 "rl78-decode.opc"
305 ID(mov); DR(A); SM(B, IMMU(2));
306
307 }
308 break;
309 case 0x0a:
310 {
311 /** 0000 1010 add %0, #%1 */
312 if (trace)
313 {
314 printf ("\033[33m%s\033[0m %02x\n",
315 "/** 0000 1010 add %0, #%1 */",
316 op[0]);
317 }
318 SYNTAX("add %0, #%1");
319 #line 228 "rl78-decode.opc"
320 ID(add); DM(None, SADDR); SC(IMMU(1)); Fzac;
321
322 /*----------------------------------------------------------------------*/
323
324 }
325 break;
326 case 0x0b:
327 {
328 /** 0000 1011 add %0, %1 */
329 if (trace)
330 {
331 printf ("\033[33m%s\033[0m %02x\n",
332 "/** 0000 1011 add %0, %1 */",
333 op[0]);
334 }
335 SYNTAX("add %0, %1");
336 #line 222 "rl78-decode.opc"
337 ID(add); DR(A); SM(None, SADDR); Fzac;
338
339 }
340 break;
341 case 0x0c:
342 {
343 /** 0000 1100 add %0, #%1 */
344 if (trace)
345 {
346 printf ("\033[33m%s\033[0m %02x\n",
347 "/** 0000 1100 add %0, #%1 */",
348 op[0]);
349 }
350 SYNTAX("add %0, #%1");
351 #line 216 "rl78-decode.opc"
352 ID(add); DR(A); SC(IMMU(1)); Fzac;
353
354 }
355 break;
356 case 0x0d:
357 {
358 /** 0000 1101 add %0, %e1 */
359 if (trace)
360 {
361 printf ("\033[33m%s\033[0m %02x\n",
362 "/** 0000 1101 add %0, %e1 */",
363 op[0]);
364 }
365 SYNTAX("add %0, %e1");
366 #line 204 "rl78-decode.opc"
367 ID(add); DR(A); SM(HL, 0); Fzac;
368
369 }
370 break;
371 case 0x0e:
372 {
373 /** 0000 1110 add %0, %ea1 */
374 if (trace)
375 {
376 printf ("\033[33m%s\033[0m %02x\n",
377 "/** 0000 1110 add %0, %ea1 */",
378 op[0]);
379 }
380 SYNTAX("add %0, %ea1");
381 #line 210 "rl78-decode.opc"
382 ID(add); DR(A); SM(HL, IMMU(1)); Fzac;
383
384 }
385 break;
386 case 0x0f:
387 {
388 /** 0000 1111 add %0, %e!1 */
389 if (trace)
390 {
391 printf ("\033[33m%s\033[0m %02x\n",
392 "/** 0000 1111 add %0, %e!1 */",
393 op[0]);
394 }
395 SYNTAX("add %0, %e!1");
396 #line 201 "rl78-decode.opc"
397 ID(add); DR(A); SM(None, IMMU(2)); Fzac;
398
399 }
400 break;
401 case 0x10:
402 {
403 /** 0001 0000 addw %0, #%1 */
404 if (trace)
405 {
406 printf ("\033[33m%s\033[0m %02x\n",
407 "/** 0001 0000 addw %0, #%1 */",
408 op[0]);
409 }
410 SYNTAX("addw %0, #%1");
411 #line 280 "rl78-decode.opc"
412 ID(add); W(); DR(SP); SC(IMMU(1)); Fzac;
413
414 /*----------------------------------------------------------------------*/
415
416 }
417 break;
418 case 0x11:
419 {
420 /** 0001 0001 es: */
421 if (trace)
422 {
423 printf ("\033[33m%s\033[0m %02x\n",
424 "/** 0001 0001 es: */",
425 op[0]);
426 }
427 SYNTAX("es:");
428 #line 193 "rl78-decode.opc"
429 DE(); SE();
430 op ++;
431 pc ++;
432 goto start_again;
433
434 /*----------------------------------------------------------------------*/
435
436 }
437 break;
438 case 0x12:
439 case 0x14:
440 case 0x16:
441 {
442 /** 0001 0ra0 movw %0, %1 */
443 #line 859 "rl78-decode.opc"
444 int ra AU = (op[0] >> 1) & 0x03;
445 if (trace)
446 {
447 printf ("\033[33m%s\033[0m %02x\n",
448 "/** 0001 0ra0 movw %0, %1 */",
449 op[0]);
450 printf (" ra = 0x%x\n", ra);
451 }
452 SYNTAX("movw %0, %1");
453 #line 859 "rl78-decode.opc"
454 ID(mov); W(); DRW(ra); SR(AX);
455
456 }
457 break;
458 case 0x13:
459 case 0x15:
460 case 0x17:
461 {
462 /** 0001 0ra1 movw %0, %1 */
463 #line 856 "rl78-decode.opc"
464 int ra AU = (op[0] >> 1) & 0x03;
465 if (trace)
466 {
467 printf ("\033[33m%s\033[0m %02x\n",
468 "/** 0001 0ra1 movw %0, %1 */",
469 op[0]);
470 printf (" ra = 0x%x\n", ra);
471 }
472 SYNTAX("movw %0, %1");
473 #line 856 "rl78-decode.opc"
474 ID(mov); W(); DR(AX); SRW(ra);
475
476 }
477 break;
478 case 0x18:
479 {
480 /** 0001 1000 mov %e0, %1 */
481 if (trace)
482 {
483 printf ("\033[33m%s\033[0m %02x\n",
484 "/** 0001 1000 mov %e0, %1 */",
485 op[0]);
486 }
487 SYNTAX("mov %e0, %1");
488 #line 729 "rl78-decode.opc"
489 ID(mov); DM(B, IMMU(2)); SR(A);
490
491 }
492 break;
493 case 0x19:
494 {
495 /** 0001 1001 mov %e0, #%1 */
496 if (trace)
497 {
498 printf ("\033[33m%s\033[0m %02x\n",
499 "/** 0001 1001 mov %e0, #%1 */",
500 op[0]);
501 }
502 SYNTAX("mov %e0, #%1");
503 #line 726 "rl78-decode.opc"
504 ID(mov); DM(B, IMMU(2)); SC(IMMU(1));
505
506 }
507 break;
508 case 0x1a:
509 {
510 /** 0001 1010 addc %0, #%1 */
511 if (trace)
512 {
513 printf ("\033[33m%s\033[0m %02x\n",
514 "/** 0001 1010 addc %0, #%1 */",
515 op[0]);
516 }
517 SYNTAX("addc %0, #%1");
518 #line 260 "rl78-decode.opc"
519 ID(addc); DM(None, SADDR); SC(IMMU(1)); Fzac;
520
521 /*----------------------------------------------------------------------*/
522
523 }
524 break;
525 case 0x1b:
526 {
527 /** 0001 1011 addc %0, %1 */
528 if (trace)
529 {
530 printf ("\033[33m%s\033[0m %02x\n",
531 "/** 0001 1011 addc %0, %1 */",
532 op[0]);
533 }
534 SYNTAX("addc %0, %1");
535 #line 257 "rl78-decode.opc"
536 ID(addc); DR(A); SM(None, SADDR); Fzac;
537
538 }
539 break;
540 case 0x1c:
541 {
542 /** 0001 1100 addc %0, #%1 */
543 if (trace)
544 {
545 printf ("\033[33m%s\033[0m %02x\n",
546 "/** 0001 1100 addc %0, #%1 */",
547 op[0]);
548 }
549 SYNTAX("addc %0, #%1");
550 #line 248 "rl78-decode.opc"
551 ID(addc); DR(A); SC(IMMU(1)); Fzac;
552
553 }
554 break;
555 case 0x1d:
556 {
557 /** 0001 1101 addc %0, %e1 */
558 if (trace)
559 {
560 printf ("\033[33m%s\033[0m %02x\n",
561 "/** 0001 1101 addc %0, %e1 */",
562 op[0]);
563 }
564 SYNTAX("addc %0, %e1");
565 #line 236 "rl78-decode.opc"
566 ID(addc); DR(A); SM(HL, 0); Fzac;
567
568 }
569 break;
570 case 0x1e:
571 {
572 /** 0001 1110 addc %0, %ea1 */
573 if (trace)
574 {
575 printf ("\033[33m%s\033[0m %02x\n",
576 "/** 0001 1110 addc %0, %ea1 */",
577 op[0]);
578 }
579 SYNTAX("addc %0, %ea1");
580 #line 245 "rl78-decode.opc"
581 ID(addc); DR(A); SM(HL, IMMU(1)); Fzac;
582
583 }
584 break;
585 case 0x1f:
586 {
587 /** 0001 1111 addc %0, %e!1 */
588 if (trace)
589 {
590 printf ("\033[33m%s\033[0m %02x\n",
591 "/** 0001 1111 addc %0, %e!1 */",
592 op[0]);
593 }
594 SYNTAX("addc %0, %e!1");
595 #line 233 "rl78-decode.opc"
596 ID(addc); DR(A); SM(None, IMMU(2)); Fzac;
597
598 }
599 break;
600 case 0x20:
601 {
602 /** 0010 0000 subw %0, #%1 */
603 if (trace)
604 {
605 printf ("\033[33m%s\033[0m %02x\n",
606 "/** 0010 0000 subw %0, #%1 */",
607 op[0]);
608 }
609 SYNTAX("subw %0, #%1");
610 #line 1199 "rl78-decode.opc"
611 ID(sub); W(); DR(SP); SC(IMMU(1)); Fzac;
612
613 /*----------------------------------------------------------------------*/
614
615 }
616 break;
617 case 0x21:
618 case 0x23:
619 case 0x25:
620 case 0x27:
621 {
622 /** 0010 0rw1 subw %0, %1 */
623 #line 1193 "rl78-decode.opc"
624 int rw AU = (op[0] >> 1) & 0x03;
625 if (trace)
626 {
627 printf ("\033[33m%s\033[0m %02x\n",
628 "/** 0010 0rw1 subw %0, %1 */",
629 op[0]);
630 printf (" rw = 0x%x\n", rw);
631 }
632 SYNTAX("subw %0, %1");
633 #line 1193 "rl78-decode.opc"
634 ID(sub); W(); DR(AX); SRW(rw); Fzac;
635
636 }
637 break;
638 case 0x22:
639 {
640 /** 0010 0010 subw %0, %e!1 */
641 if (trace)
642 {
643 printf ("\033[33m%s\033[0m %02x\n",
644 "/** 0010 0010 subw %0, %e!1 */",
645 op[0]);
646 }
647 SYNTAX("subw %0, %e!1");
648 #line 1184 "rl78-decode.opc"
649 ID(sub); W(); DR(AX); SM(None, IMMU(2)); Fzac;
650
651 }
652 break;
653 case 0x24:
654 {
655 /** 0010 0100 subw %0, #%1 */
656 if (trace)
657 {
658 printf ("\033[33m%s\033[0m %02x\n",
659 "/** 0010 0100 subw %0, #%1 */",
660 op[0]);
661 }
662 SYNTAX("subw %0, #%1");
663 #line 1190 "rl78-decode.opc"
664 ID(sub); W(); DR(AX); SC(IMMU(2)); Fzac;
665
666 }
667 break;
668 case 0x26:
669 {
670 /** 0010 0110 subw %0, %1 */
671 if (trace)
672 {
673 printf ("\033[33m%s\033[0m %02x\n",
674 "/** 0010 0110 subw %0, %1 */",
675 op[0]);
676 }
677 SYNTAX("subw %0, %1");
678 #line 1196 "rl78-decode.opc"
679 ID(sub); W(); DR(AX); SM(None, SADDR); Fzac;
680
681 }
682 break;
683 case 0x28:
684 {
685 /** 0010 1000 mov %e0, %1 */
686 if (trace)
687 {
688 printf ("\033[33m%s\033[0m %02x\n",
689 "/** 0010 1000 mov %e0, %1 */",
690 op[0]);
691 }
692 SYNTAX("mov %e0, %1");
693 #line 741 "rl78-decode.opc"
694 ID(mov); DM(C, IMMU(2)); SR(A);
695
696 }
697 break;
698 case 0x29:
699 {
700 /** 0010 1001 mov %0, %e1 */
701 if (trace)
702 {
703 printf ("\033[33m%s\033[0m %02x\n",
704 "/** 0010 1001 mov %0, %e1 */",
705 op[0]);
706 }
707 SYNTAX("mov %0, %e1");
708 #line 684 "rl78-decode.opc"
709 ID(mov); DR(A); SM(C, IMMU(2));
710
711 }
712 break;
713 case 0x2a:
714 {
715 /** 0010 1010 sub %0, #%1 */
716 if (trace)
717 {
718 printf ("\033[33m%s\033[0m %02x\n",
719 "/** 0010 1010 sub %0, #%1 */",
720 op[0]);
721 }
722 SYNTAX("sub %0, #%1");
723 #line 1147 "rl78-decode.opc"
724 ID(sub); DM(None, SADDR); SC(IMMU(1)); Fzac;
725
726 /*----------------------------------------------------------------------*/
727
728 }
729 break;
730 case 0x2b:
731 {
732 /** 0010 1011 sub %0, %1 */
733 if (trace)
734 {
735 printf ("\033[33m%s\033[0m %02x\n",
736 "/** 0010 1011 sub %0, %1 */",
737 op[0]);
738 }
739 SYNTAX("sub %0, %1");
740 #line 1141 "rl78-decode.opc"
741 ID(sub); DR(A); SM(None, SADDR); Fzac;
742
743 }
744 break;
745 case 0x2c:
746 {
747 /** 0010 1100 sub %0, #%1 */
748 if (trace)
749 {
750 printf ("\033[33m%s\033[0m %02x\n",
751 "/** 0010 1100 sub %0, #%1 */",
752 op[0]);
753 }
754 SYNTAX("sub %0, #%1");
755 #line 1135 "rl78-decode.opc"
756 ID(sub); DR(A); SC(IMMU(1)); Fzac;
757
758 }
759 break;
760 case 0x2d:
761 {
762 /** 0010 1101 sub %0, %e1 */
763 if (trace)
764 {
765 printf ("\033[33m%s\033[0m %02x\n",
766 "/** 0010 1101 sub %0, %e1 */",
767 op[0]);
768 }
769 SYNTAX("sub %0, %e1");
770 #line 1123 "rl78-decode.opc"
771 ID(sub); DR(A); SM(HL, 0); Fzac;
772
773 }
774 break;
775 case 0x2e:
776 {
777 /** 0010 1110 sub %0, %ea1 */
778 if (trace)
779 {
780 printf ("\033[33m%s\033[0m %02x\n",
781 "/** 0010 1110 sub %0, %ea1 */",
782 op[0]);
783 }
784 SYNTAX("sub %0, %ea1");
785 #line 1129 "rl78-decode.opc"
786 ID(sub); DR(A); SM(HL, IMMU(1)); Fzac;
787
788 }
789 break;
790 case 0x2f:
791 {
792 /** 0010 1111 sub %0, %e!1 */
793 if (trace)
794 {
795 printf ("\033[33m%s\033[0m %02x\n",
796 "/** 0010 1111 sub %0, %e!1 */",
797 op[0]);
798 }
799 SYNTAX("sub %0, %e!1");
800 #line 1120 "rl78-decode.opc"
801 ID(sub); DR(A); SM(None, IMMU(2)); Fzac;
802
803 }
804 break;
805 case 0x30:
806 case 0x32:
807 case 0x34:
808 case 0x36:
809 {
810 /** 0011 0rg0 movw %0, #%1 */
811 #line 853 "rl78-decode.opc"
812 int rg AU = (op[0] >> 1) & 0x03;
813 if (trace)
814 {
815 printf ("\033[33m%s\033[0m %02x\n",
816 "/** 0011 0rg0 movw %0, #%1 */",
817 op[0]);
818 printf (" rg = 0x%x\n", rg);
819 }
820 SYNTAX("movw %0, #%1");
821 #line 853 "rl78-decode.opc"
822 ID(mov); W(); DRW(rg); SC(IMMU(2));
823
824 }
825 break;
826 case 0x31:
827 GETBYTE ();
828 switch (op[1] & 0x8f)
829 {
830 case 0x00:
831 {
832 /** 0011 0001 0bit 0000 btclr %s1, $%a0 */
833 #line 416 "rl78-decode.opc"
834 int bit AU = (op[1] >> 4) & 0x07;
835 if (trace)
836 {
837 printf ("\033[33m%s\033[0m %02x %02x\n",
838 "/** 0011 0001 0bit 0000 btclr %s1, $%a0 */",
839 op[0], op[1]);
840 printf (" bit = 0x%x\n", bit);
841 }
842 SYNTAX("btclr %s1, $%a0");
843 #line 416 "rl78-decode.opc"
844 ID(branch_cond_clear); SM(None, SADDR); SB(bit); DC(pc+IMMS(1)+4); COND(T);
845
846 /*----------------------------------------------------------------------*/
847
848 }
849 break;
850 case 0x01:
851 {
852 /** 0011 0001 0bit 0001 btclr %1, $%a0 */
853 #line 410 "rl78-decode.opc"
854 int bit AU = (op[1] >> 4) & 0x07;
855 if (trace)
856 {
857 printf ("\033[33m%s\033[0m %02x %02x\n",
858 "/** 0011 0001 0bit 0001 btclr %1, $%a0 */",
859 op[0], op[1]);
860 printf (" bit = 0x%x\n", bit);
861 }
862 SYNTAX("btclr %1, $%a0");
863 #line 410 "rl78-decode.opc"
864 ID(branch_cond_clear); DC(pc+IMMS(1)+3); SR(A); SB(bit); COND(T);
865
866 }
867 break;
868 case 0x02:
869 {
870 /** 0011 0001 0bit 0010 bt %s1, $%a0 */
871 #line 402 "rl78-decode.opc"
872 int bit AU = (op[1] >> 4) & 0x07;
873 if (trace)
874 {
875 printf ("\033[33m%s\033[0m %02x %02x\n",
876 "/** 0011 0001 0bit 0010 bt %s1, $%a0 */",
877 op[0], op[1]);
878 printf (" bit = 0x%x\n", bit);
879 }
880 SYNTAX("bt %s1, $%a0");
881 #line 402 "rl78-decode.opc"
882 ID(branch_cond); SM(None, SADDR); SB(bit); DC(pc+IMMS(1)+4); COND(T);
883
884 /*----------------------------------------------------------------------*/
885
886 }
887 break;
888 case 0x03:
889 {
890 /** 0011 0001 0bit 0011 bt %1, $%a0 */
891 #line 396 "rl78-decode.opc"
892 int bit AU = (op[1] >> 4) & 0x07;
893 if (trace)
894 {
895 printf ("\033[33m%s\033[0m %02x %02x\n",
896 "/** 0011 0001 0bit 0011 bt %1, $%a0 */",
897 op[0], op[1]);
898 printf (" bit = 0x%x\n", bit);
899 }
900 SYNTAX("bt %1, $%a0");
901 #line 396 "rl78-decode.opc"
902 ID(branch_cond); DC(pc+IMMS(1)+3); SR(A); SB(bit); COND(T);
903
904 }
905 break;
906 case 0x04:
907 {
908 /** 0011 0001 0bit 0100 bf %s1, $%a0 */
909 #line 363 "rl78-decode.opc"
910 int bit AU = (op[1] >> 4) & 0x07;
911 if (trace)
912 {
913 printf ("\033[33m%s\033[0m %02x %02x\n",
914 "/** 0011 0001 0bit 0100 bf %s1, $%a0 */",
915 op[0], op[1]);
916 printf (" bit = 0x%x\n", bit);
917 }
918 SYNTAX("bf %s1, $%a0");
919 #line 363 "rl78-decode.opc"
920 ID(branch_cond); SM(None, SADDR); SB(bit); DC(pc+IMMS(1)+4); COND(F);
921
922 /*----------------------------------------------------------------------*/
923
924 }
925 break;
926 case 0x05:
927 {
928 /** 0011 0001 0bit 0101 bf %1, $%a0 */
929 #line 357 "rl78-decode.opc"
930 int bit AU = (op[1] >> 4) & 0x07;
931 if (trace)
932 {
933 printf ("\033[33m%s\033[0m %02x %02x\n",
934 "/** 0011 0001 0bit 0101 bf %1, $%a0 */",
935 op[0], op[1]);
936 printf (" bit = 0x%x\n", bit);
937 }
938 SYNTAX("bf %1, $%a0");
939 #line 357 "rl78-decode.opc"
940 ID(branch_cond); DC(pc+IMMS(1)+3); SR(A); SB(bit); COND(F);
941
942 }
943 break;
944 case 0x07:
945 {
946 /** 0011 0001 0cnt 0111 shl %0, %1 */
947 #line 1076 "rl78-decode.opc"
948 int cnt AU = (op[1] >> 4) & 0x07;
949 if (trace)
950 {
951 printf ("\033[33m%s\033[0m %02x %02x\n",
952 "/** 0011 0001 0cnt 0111 shl %0, %1 */",
953 op[0], op[1]);
954 printf (" cnt = 0x%x\n", cnt);
955 }
956 SYNTAX("shl %0, %1");
957 #line 1076 "rl78-decode.opc"
958 ID(shl); DR(C); SC(cnt);
959
960 }
961 break;
962 case 0x08:
963 {
964 /** 0011 0001 0cnt 1000 shl %0, %1 */
965 #line 1073 "rl78-decode.opc"
966 int cnt AU = (op[1] >> 4) & 0x07;
967 if (trace)
968 {
969 printf ("\033[33m%s\033[0m %02x %02x\n",
970 "/** 0011 0001 0cnt 1000 shl %0, %1 */",
971 op[0], op[1]);
972 printf (" cnt = 0x%x\n", cnt);
973 }
974 SYNTAX("shl %0, %1");
975 #line 1073 "rl78-decode.opc"
976 ID(shl); DR(B); SC(cnt);
977
978 }
979 break;
980 case 0x09:
981 {
982 /** 0011 0001 0cnt 1001 shl %0, %1 */
983 #line 1070 "rl78-decode.opc"
984 int cnt AU = (op[1] >> 4) & 0x07;
985 if (trace)
986 {
987 printf ("\033[33m%s\033[0m %02x %02x\n",
988 "/** 0011 0001 0cnt 1001 shl %0, %1 */",
989 op[0], op[1]);
990 printf (" cnt = 0x%x\n", cnt);
991 }
992 SYNTAX("shl %0, %1");
993 #line 1070 "rl78-decode.opc"
994 ID(shl); DR(A); SC(cnt);
995
996 }
997 break;
998 case 0x0a:
999 {
1000 /** 0011 0001 0cnt 1010 shr %0, %1 */
1001 #line 1087 "rl78-decode.opc"
1002 int cnt AU = (op[1] >> 4) & 0x07;
1003 if (trace)
1004 {
1005 printf ("\033[33m%s\033[0m %02x %02x\n",
1006 "/** 0011 0001 0cnt 1010 shr %0, %1 */",
1007 op[0], op[1]);
1008 printf (" cnt = 0x%x\n", cnt);
1009 }
1010 SYNTAX("shr %0, %1");
1011 #line 1087 "rl78-decode.opc"
1012 ID(shr); DR(A); SC(cnt);
1013
1014 }
1015 break;
1016 case 0x0b:
1017 {
1018 /** 0011 0001 0cnt 1011 sar %0, %1 */
1019 #line 1034 "rl78-decode.opc"
1020 int cnt AU = (op[1] >> 4) & 0x07;
1021 if (trace)
1022 {
1023 printf ("\033[33m%s\033[0m %02x %02x\n",
1024 "/** 0011 0001 0cnt 1011 sar %0, %1 */",
1025 op[0], op[1]);
1026 printf (" cnt = 0x%x\n", cnt);
1027 }
1028 SYNTAX("sar %0, %1");
1029 #line 1034 "rl78-decode.opc"
1030 ID(sar); DR(A); SC(cnt);
1031
1032 }
1033 break;
1034 case 0x0c:
1035 case 0x8c:
1036 {
1037 /** 0011 0001 wcnt 1100 shlw %0, %1 */
1038 #line 1082 "rl78-decode.opc"
1039 int wcnt AU = (op[1] >> 4) & 0x0f;
1040 if (trace)
1041 {
1042 printf ("\033[33m%s\033[0m %02x %02x\n",
1043 "/** 0011 0001 wcnt 1100 shlw %0, %1 */",
1044 op[0], op[1]);
1045 printf (" wcnt = 0x%x\n", wcnt);
1046 }
1047 SYNTAX("shlw %0, %1");
1048 #line 1082 "rl78-decode.opc"
1049 ID(shl); W(); DR(BC); SC(wcnt);
1050
1051 /*----------------------------------------------------------------------*/
1052
1053 }
1054 break;
1055 case 0x0d:
1056 case 0x8d:
1057 {
1058 /** 0011 0001 wcnt 1101 shlw %0, %1 */
1059 #line 1079 "rl78-decode.opc"
1060 int wcnt AU = (op[1] >> 4) & 0x0f;
1061 if (trace)
1062 {
1063 printf ("\033[33m%s\033[0m %02x %02x\n",
1064 "/** 0011 0001 wcnt 1101 shlw %0, %1 */",
1065 op[0], op[1]);
1066 printf (" wcnt = 0x%x\n", wcnt);
1067 }
1068 SYNTAX("shlw %0, %1");
1069 #line 1079 "rl78-decode.opc"
1070 ID(shl); W(); DR(AX); SC(wcnt);
1071
1072 }
1073 break;
1074 case 0x0e:
1075 case 0x8e:
1076 {
1077 /** 0011 0001 wcnt 1110 shrw %0, %1 */
1078 #line 1090 "rl78-decode.opc"
1079 int wcnt AU = (op[1] >> 4) & 0x0f;
1080 if (trace)
1081 {
1082 printf ("\033[33m%s\033[0m %02x %02x\n",
1083 "/** 0011 0001 wcnt 1110 shrw %0, %1 */",
1084 op[0], op[1]);
1085 printf (" wcnt = 0x%x\n", wcnt);
1086 }
1087 SYNTAX("shrw %0, %1");
1088 #line 1090 "rl78-decode.opc"
1089 ID(shr); W(); DR(AX); SC(wcnt);
1090
1091 /*----------------------------------------------------------------------*/
1092
1093 }
1094 break;
1095 case 0x0f:
1096 case 0x8f:
1097 {
1098 /** 0011 0001 wcnt 1111 sarw %0, %1 */
1099 #line 1037 "rl78-decode.opc"
1100 int wcnt AU = (op[1] >> 4) & 0x0f;
1101 if (trace)
1102 {
1103 printf ("\033[33m%s\033[0m %02x %02x\n",
1104 "/** 0011 0001 wcnt 1111 sarw %0, %1 */",
1105 op[0], op[1]);
1106 printf (" wcnt = 0x%x\n", wcnt);
1107 }
1108 SYNTAX("sarw %0, %1");
1109 #line 1037 "rl78-decode.opc"
1110 ID(sar); W(); DR(AX); SC(wcnt);
1111
1112 /*----------------------------------------------------------------------*/
1113
1114 }
1115 break;
1116 case 0x80:
1117 {
1118 /** 0011 0001 1bit 0000 btclr %s1, $%a0 */
1119 #line 413 "rl78-decode.opc"
1120 int bit AU = (op[1] >> 4) & 0x07;
1121 if (trace)
1122 {
1123 printf ("\033[33m%s\033[0m %02x %02x\n",
1124 "/** 0011 0001 1bit 0000 btclr %s1, $%a0 */",
1125 op[0], op[1]);
1126 printf (" bit = 0x%x\n", bit);
1127 }
1128 SYNTAX("btclr %s1, $%a0");
1129 #line 413 "rl78-decode.opc"
1130 ID(branch_cond_clear); SM(None, SFR); SB(bit); DC(pc+IMMS(1)+4); COND(T);
1131
1132 }
1133 break;
1134 case 0x81:
1135 {
1136 /** 0011 0001 1bit 0001 btclr %e1, $%a0 */
1137 #line 407 "rl78-decode.opc"
1138 int bit AU = (op[1] >> 4) & 0x07;
1139 if (trace)
1140 {
1141 printf ("\033[33m%s\033[0m %02x %02x\n",
1142 "/** 0011 0001 1bit 0001 btclr %e1, $%a0 */",
1143 op[0], op[1]);
1144 printf (" bit = 0x%x\n", bit);
1145 }
1146 SYNTAX("btclr %e1, $%a0");
1147 #line 407 "rl78-decode.opc"
1148 ID(branch_cond_clear); DC(pc+IMMS(1)+3); SM(HL,0); SB(bit); COND(T);
1149
1150 }
1151 break;
1152 case 0x82:
1153 {
1154 /** 0011 0001 1bit 0010 bt %s1, $%a0 */
1155 #line 399 "rl78-decode.opc"
1156 int bit AU = (op[1] >> 4) & 0x07;
1157 if (trace)
1158 {
1159 printf ("\033[33m%s\033[0m %02x %02x\n",
1160 "/** 0011 0001 1bit 0010 bt %s1, $%a0 */",
1161 op[0], op[1]);
1162 printf (" bit = 0x%x\n", bit);
1163 }
1164 SYNTAX("bt %s1, $%a0");
1165 #line 399 "rl78-decode.opc"
1166 ID(branch_cond); SM(None, SFR); SB(bit); DC(pc+IMMS(1)+4); COND(T);
1167
1168 }
1169 break;
1170 case 0x83:
1171 {
1172 /** 0011 0001 1bit 0011 bt %e1, $%a0 */
1173 #line 393 "rl78-decode.opc"
1174 int bit AU = (op[1] >> 4) & 0x07;
1175 if (trace)
1176 {
1177 printf ("\033[33m%s\033[0m %02x %02x\n",
1178 "/** 0011 0001 1bit 0011 bt %e1, $%a0 */",
1179 op[0], op[1]);
1180 printf (" bit = 0x%x\n", bit);
1181 }
1182 SYNTAX("bt %e1, $%a0");
1183 #line 393 "rl78-decode.opc"
1184 ID(branch_cond); DC(pc+IMMS(1)+3); SM(HL,0); SB(bit); COND(T);
1185
1186 }
1187 break;
1188 case 0x84:
1189 {
1190 /** 0011 0001 1bit 0100 bf %s1, $%a0 */
1191 #line 360 "rl78-decode.opc"
1192 int bit AU = (op[1] >> 4) & 0x07;
1193 if (trace)
1194 {
1195 printf ("\033[33m%s\033[0m %02x %02x\n",
1196 "/** 0011 0001 1bit 0100 bf %s1, $%a0 */",
1197 op[0], op[1]);
1198 printf (" bit = 0x%x\n", bit);
1199 }
1200 SYNTAX("bf %s1, $%a0");
1201 #line 360 "rl78-decode.opc"
1202 ID(branch_cond); SM(None, SFR); SB(bit); DC(pc+IMMS(1)+4); COND(F);
1203
1204 }
1205 break;
1206 case 0x85:
1207 {
1208 /** 0011 0001 1bit 0101 bf %e1, $%a0 */
1209 #line 354 "rl78-decode.opc"
1210 int bit AU = (op[1] >> 4) & 0x07;
1211 if (trace)
1212 {
1213 printf ("\033[33m%s\033[0m %02x %02x\n",
1214 "/** 0011 0001 1bit 0101 bf %e1, $%a0 */",
1215 op[0], op[1]);
1216 printf (" bit = 0x%x\n", bit);
1217 }
1218 SYNTAX("bf %e1, $%a0");
1219 #line 354 "rl78-decode.opc"
1220 ID(branch_cond); DC(pc+IMMS(1)+3); SM(HL,0); SB(bit); COND(F);
1221
1222 }
1223 break;
1224 default: UNSUPPORTED(); break;
1225 }
1226 break;
1227 case 0x33:
1228 case 0x35:
1229 case 0x37:
1230 {
1231 /** 0011 0ra1 xchw %0, %1 */
1232 #line 1240 "rl78-decode.opc"
1233 int ra AU = (op[0] >> 1) & 0x03;
1234 if (trace)
1235 {
1236 printf ("\033[33m%s\033[0m %02x\n",
1237 "/** 0011 0ra1 xchw %0, %1 */",
1238 op[0]);
1239 printf (" ra = 0x%x\n", ra);
1240 }
1241 SYNTAX("xchw %0, %1");
1242 #line 1240 "rl78-decode.opc"
1243 ID(xch); W(); DR(AX); SRW(ra);
1244
1245 /*----------------------------------------------------------------------*/
1246
1247 }
1248 break;
1249 case 0x38:
1250 {
1251 /** 0011 1000 mov %e0, #%1 */
1252 if (trace)
1253 {
1254 printf ("\033[33m%s\033[0m %02x\n",
1255 "/** 0011 1000 mov %e0, #%1 */",
1256 op[0]);
1257 }
1258 SYNTAX("mov %e0, #%1");
1259 #line 738 "rl78-decode.opc"
1260 ID(mov); DM(C, IMMU(2)); SC(IMMU(1));
1261
1262 }
1263 break;
1264 case 0x39:
1265 {
1266 /** 0011 1001 mov %e0, #%1 */
1267 if (trace)
1268 {
1269 printf ("\033[33m%s\033[0m %02x\n",
1270 "/** 0011 1001 mov %e0, #%1 */",
1271 op[0]);
1272 }
1273 SYNTAX("mov %e0, #%1");
1274 #line 732 "rl78-decode.opc"
1275 ID(mov); DM(BC, IMMU(2)); SC(IMMU(1));
1276
1277 }
1278 break;
1279 case 0x3a:
1280 {
1281 /** 0011 1010 subc %0, #%1 */
1282 if (trace)
1283 {
1284 printf ("\033[33m%s\033[0m %02x\n",
1285 "/** 0011 1010 subc %0, #%1 */",
1286 op[0]);
1287 }
1288 SYNTAX("subc %0, #%1");
1289 #line 1179 "rl78-decode.opc"
1290 ID(subc); DM(None, SADDR); SC(IMMU(1)); Fzac;
1291
1292 /*----------------------------------------------------------------------*/
1293
1294 }
1295 break;
1296 case 0x3b:
1297 {
1298 /** 0011 1011 subc %0, %1 */
1299 if (trace)
1300 {
1301 printf ("\033[33m%s\033[0m %02x\n",
1302 "/** 0011 1011 subc %0, %1 */",
1303 op[0]);
1304 }
1305 SYNTAX("subc %0, %1");
1306 #line 1176 "rl78-decode.opc"
1307 ID(subc); DR(A); SM(None, SADDR); Fzac;
1308
1309 }
1310 break;
1311 case 0x3c:
1312 {
1313 /** 0011 1100 subc %0, #%1 */
1314 if (trace)
1315 {
1316 printf ("\033[33m%s\033[0m %02x\n",
1317 "/** 0011 1100 subc %0, #%1 */",
1318 op[0]);
1319 }
1320 SYNTAX("subc %0, #%1");
1321 #line 1167 "rl78-decode.opc"
1322 ID(subc); DR(A); SC(IMMU(1)); Fzac;
1323
1324 }
1325 break;
1326 case 0x3d:
1327 {
1328 /** 0011 1101 subc %0, %e1 */
1329 if (trace)
1330 {
1331 printf ("\033[33m%s\033[0m %02x\n",
1332 "/** 0011 1101 subc %0, %e1 */",
1333 op[0]);
1334 }
1335 SYNTAX("subc %0, %e1");
1336 #line 1155 "rl78-decode.opc"
1337 ID(subc); DR(A); SM(HL, 0); Fzac;
1338
1339 }
1340 break;
1341 case 0x3e:
1342 {
1343 /** 0011 1110 subc %0, %ea1 */
1344 if (trace)
1345 {
1346 printf ("\033[33m%s\033[0m %02x\n",
1347 "/** 0011 1110 subc %0, %ea1 */",
1348 op[0]);
1349 }
1350 SYNTAX("subc %0, %ea1");
1351 #line 1164 "rl78-decode.opc"
1352 ID(subc); DR(A); SM(HL, IMMU(1)); Fzac;
1353
1354 }
1355 break;
1356 case 0x3f:
1357 {
1358 /** 0011 1111 subc %0, %e!1 */
1359 if (trace)
1360 {
1361 printf ("\033[33m%s\033[0m %02x\n",
1362 "/** 0011 1111 subc %0, %e!1 */",
1363 op[0]);
1364 }
1365 SYNTAX("subc %0, %e!1");
1366 #line 1152 "rl78-decode.opc"
1367 ID(subc); DR(A); SM(None, IMMU(2)); Fzac;
1368
1369 }
1370 break;
1371 case 0x40:
1372 {
1373 /** 0100 0000 cmp %e!0, #%1 */
1374 if (trace)
1375 {
1376 printf ("\033[33m%s\033[0m %02x\n",
1377 "/** 0100 0000 cmp %e!0, #%1 */",
1378 op[0]);
1379 }
1380 SYNTAX("cmp %e!0, #%1");
1381 #line 480 "rl78-decode.opc"
1382 ID(cmp); DM(None, IMMU(2)); SC(IMMU(1)); Fzac;
1383
1384 }
1385 break;
1386 case 0x41:
1387 {
1388 /** 0100 0001 mov %0, #%1 */
1389 if (trace)
1390 {
1391 printf ("\033[33m%s\033[0m %02x\n",
1392 "/** 0100 0001 mov %0, #%1 */",
1393 op[0]);
1394 }
1395 SYNTAX("mov %0, #%1");
1396 #line 717 "rl78-decode.opc"
1397 ID(mov); DR(ES); SC(IMMU(1));
1398
1399 }
1400 break;
1401 case 0x42:
1402 {
1403 /** 0100 0010 cmpw %0, %e!1 */
1404 if (trace)
1405 {
1406 printf ("\033[33m%s\033[0m %02x\n",
1407 "/** 0100 0010 cmpw %0, %e!1 */",
1408 op[0]);
1409 }
1410 SYNTAX("cmpw %0, %e!1");
1411 #line 531 "rl78-decode.opc"
1412 ID(cmp); W(); DR(AX); SM(None, IMMU(2)); Fzac;
1413
1414 }
1415 break;
1416 case 0x43:
1417 case 0x45:
1418 case 0x47:
1419 {
1420 /** 0100 0ra1 cmpw %0, %1 */
1421 #line 540 "rl78-decode.opc"
1422 int ra AU = (op[0] >> 1) & 0x03;
1423 if (trace)
1424 {
1425 printf ("\033[33m%s\033[0m %02x\n",
1426 "/** 0100 0ra1 cmpw %0, %1 */",
1427 op[0]);
1428 printf (" ra = 0x%x\n", ra);
1429 }
1430 SYNTAX("cmpw %0, %1");
1431 #line 540 "rl78-decode.opc"
1432 ID(cmp); W(); DR(AX); SRW(ra); Fzac;
1433
1434 }
1435 break;
1436 case 0x44:
1437 {
1438 /** 0100 0100 cmpw %0, #%1 */
1439 if (trace)
1440 {
1441 printf ("\033[33m%s\033[0m %02x\n",
1442 "/** 0100 0100 cmpw %0, #%1 */",
1443 op[0]);
1444 }
1445 SYNTAX("cmpw %0, #%1");
1446 #line 537 "rl78-decode.opc"
1447 ID(cmp); W(); DR(AX); SC(IMMU(2)); Fzac;
1448
1449 }
1450 break;
1451 case 0x46:
1452 {
1453 /** 0100 0110 cmpw %0, %1 */
1454 if (trace)
1455 {
1456 printf ("\033[33m%s\033[0m %02x\n",
1457 "/** 0100 0110 cmpw %0, %1 */",
1458 op[0]);
1459 }
1460 SYNTAX("cmpw %0, %1");
1461 #line 543 "rl78-decode.opc"
1462 ID(cmp); W(); DR(AX); SM(None, SADDR); Fzac;
1463
1464 /*----------------------------------------------------------------------*/
1465
1466 }
1467 break;
1468 case 0x48:
1469 {
1470 /** 0100 1000 mov %e0, %1 */
1471 if (trace)
1472 {
1473 printf ("\033[33m%s\033[0m %02x\n",
1474 "/** 0100 1000 mov %e0, %1 */",
1475 op[0]);
1476 }
1477 SYNTAX("mov %e0, %1");
1478 #line 735 "rl78-decode.opc"
1479 ID(mov); DM(BC, IMMU(2)); SR(A);
1480
1481 }
1482 break;
1483 case 0x49:
1484 {
1485 /** 0100 1001 mov %0, %e1 */
1486 if (trace)
1487 {
1488 printf ("\033[33m%s\033[0m %02x\n",
1489 "/** 0100 1001 mov %0, %e1 */",
1490 op[0]);
1491 }
1492 SYNTAX("mov %0, %e1");
1493 #line 681 "rl78-decode.opc"
1494 ID(mov); DR(A); SM(BC, IMMU(2));
1495
1496 }
1497 break;
1498 case 0x4a:
1499 {
1500 /** 0100 1010 cmp %0, #%1 */
1501 if (trace)
1502 {
1503 printf ("\033[33m%s\033[0m %02x\n",
1504 "/** 0100 1010 cmp %0, #%1 */",
1505 op[0]);
1506 }
1507 SYNTAX("cmp %0, #%1");
1508 #line 483 "rl78-decode.opc"
1509 ID(cmp); DM(None, SADDR); SC(IMMU(1)); Fzac;
1510
1511 }
1512 break;
1513 case 0x4b:
1514 {
1515 /** 0100 1011 cmp %0, %1 */
1516 if (trace)
1517 {
1518 printf ("\033[33m%s\033[0m %02x\n",
1519 "/** 0100 1011 cmp %0, %1 */",
1520 op[0]);
1521 }
1522 SYNTAX("cmp %0, %1");
1523 #line 510 "rl78-decode.opc"
1524 ID(cmp); DR(A); SM(None, SADDR); Fzac;
1525
1526 /*----------------------------------------------------------------------*/
1527
1528 }
1529 break;
1530 case 0x4c:
1531 {
1532 /** 0100 1100 cmp %0, #%1 */
1533 if (trace)
1534 {
1535 printf ("\033[33m%s\033[0m %02x\n",
1536 "/** 0100 1100 cmp %0, #%1 */",
1537 op[0]);
1538 }
1539 SYNTAX("cmp %0, #%1");
1540 #line 501 "rl78-decode.opc"
1541 ID(cmp); DR(A); SC(IMMU(1)); Fzac;
1542
1543 }
1544 break;
1545 case 0x4d:
1546 {
1547 /** 0100 1101 cmp %0, %e1 */
1548 if (trace)
1549 {
1550 printf ("\033[33m%s\033[0m %02x\n",
1551 "/** 0100 1101 cmp %0, %e1 */",
1552 op[0]);
1553 }
1554 SYNTAX("cmp %0, %e1");
1555 #line 489 "rl78-decode.opc"
1556 ID(cmp); DR(A); SM(HL, 0); Fzac;
1557
1558 }
1559 break;
1560 case 0x4e:
1561 {
1562 /** 0100 1110 cmp %0, %ea1 */
1563 if (trace)
1564 {
1565 printf ("\033[33m%s\033[0m %02x\n",
1566 "/** 0100 1110 cmp %0, %ea1 */",
1567 op[0]);
1568 }
1569 SYNTAX("cmp %0, %ea1");
1570 #line 498 "rl78-decode.opc"
1571 ID(cmp); DR(A); SM(HL, IMMU(1)); Fzac;
1572
1573 }
1574 break;
1575 case 0x4f:
1576 {
1577 /** 0100 1111 cmp %0, %e!1 */
1578 if (trace)
1579 {
1580 printf ("\033[33m%s\033[0m %02x\n",
1581 "/** 0100 1111 cmp %0, %e!1 */",
1582 op[0]);
1583 }
1584 SYNTAX("cmp %0, %e!1");
1585 #line 486 "rl78-decode.opc"
1586 ID(cmp); DR(A); SM(None, IMMU(2)); Fzac;
1587
1588 }
1589 break;
1590 case 0x50:
1591 case 0x51:
1592 case 0x52:
1593 case 0x53:
1594 case 0x54:
1595 case 0x55:
1596 case 0x56:
1597 case 0x57:
1598 {
1599 /** 0101 0reg mov %0, #%1 */
1600 #line 669 "rl78-decode.opc"
1601 int reg AU = op[0] & 0x07;
1602 if (trace)
1603 {
1604 printf ("\033[33m%s\033[0m %02x\n",
1605 "/** 0101 0reg mov %0, #%1 */",
1606 op[0]);
1607 printf (" reg = 0x%x\n", reg);
1608 }
1609 SYNTAX("mov %0, #%1");
1610 #line 669 "rl78-decode.opc"
1611 ID(mov); DRB(reg); SC(IMMU(1));
1612
1613 }
1614 break;
1615 case 0x58:
1616 {
1617 /** 0101 1000 movw %e0, %1 */
1618 if (trace)
1619 {
1620 printf ("\033[33m%s\033[0m %02x\n",
1621 "/** 0101 1000 movw %e0, %1 */",
1622 op[0]);
1623 }
1624 SYNTAX("movw %e0, %1");
1625 #line 871 "rl78-decode.opc"
1626 ID(mov); W(); DM(B, IMMU(2)); SR(AX);
1627
1628 }
1629 break;
1630 case 0x59:
1631 {
1632 /** 0101 1001 movw %0, %e1 */
1633 if (trace)
1634 {
1635 printf ("\033[33m%s\033[0m %02x\n",
1636 "/** 0101 1001 movw %0, %e1 */",
1637 op[0]);
1638 }
1639 SYNTAX("movw %0, %e1");
1640 #line 862 "rl78-decode.opc"
1641 ID(mov); W(); DR(AX); SM(B, IMMU(2));
1642
1643 }
1644 break;
1645 case 0x5a:
1646 {
1647 /** 0101 1010 and %0, #%1 */
1648 if (trace)
1649 {
1650 printf ("\033[33m%s\033[0m %02x\n",
1651 "/** 0101 1010 and %0, #%1 */",
1652 op[0]);
1653 }
1654 SYNTAX("and %0, #%1");
1655 #line 312 "rl78-decode.opc"
1656 ID(and); DM(None, SADDR); SC(IMMU(1)); Fz;
1657
1658 /*----------------------------------------------------------------------*/
1659
1660 }
1661 break;
1662 case 0x5b:
1663 {
1664 /** 0101 1011 and %0, %1 */
1665 if (trace)
1666 {
1667 printf ("\033[33m%s\033[0m %02x\n",
1668 "/** 0101 1011 and %0, %1 */",
1669 op[0]);
1670 }
1671 SYNTAX("and %0, %1");
1672 #line 309 "rl78-decode.opc"
1673 ID(and); DR(A); SM(None, SADDR); Fz;
1674
1675 }
1676 break;
1677 case 0x5c:
1678 {
1679 /** 0101 1100 and %0, #%1 */
1680 if (trace)
1681 {
1682 printf ("\033[33m%s\033[0m %02x\n",
1683 "/** 0101 1100 and %0, #%1 */",
1684 op[0]);
1685 }
1686 SYNTAX("and %0, #%1");
1687 #line 300 "rl78-decode.opc"
1688 ID(and); DR(A); SC(IMMU(1)); Fz;
1689
1690 }
1691 break;
1692 case 0x5d:
1693 {
1694 /** 0101 1101 and %0, %e1 */
1695 if (trace)
1696 {
1697 printf ("\033[33m%s\033[0m %02x\n",
1698 "/** 0101 1101 and %0, %e1 */",
1699 op[0]);
1700 }
1701 SYNTAX("and %0, %e1");
1702 #line 288 "rl78-decode.opc"
1703 ID(and); DR(A); SM(HL, 0); Fz;
1704
1705 }
1706 break;
1707 case 0x5e:
1708 {
1709 /** 0101 1110 and %0, %ea1 */
1710 if (trace)
1711 {
1712 printf ("\033[33m%s\033[0m %02x\n",
1713 "/** 0101 1110 and %0, %ea1 */",
1714 op[0]);
1715 }
1716 SYNTAX("and %0, %ea1");
1717 #line 294 "rl78-decode.opc"
1718 ID(and); DR(A); SM(HL, IMMU(1)); Fz;
1719
1720 }
1721 break;
1722 case 0x5f:
1723 {
1724 /** 0101 1111 and %0, %e!1 */
1725 if (trace)
1726 {
1727 printf ("\033[33m%s\033[0m %02x\n",
1728 "/** 0101 1111 and %0, %e!1 */",
1729 op[0]);
1730 }
1731 SYNTAX("and %0, %e!1");
1732 #line 285 "rl78-decode.opc"
1733 ID(and); DR(A); SM(None, IMMU(2)); Fz;
1734
1735 }
1736 break;
1737 case 0x60:
1738 case 0x62:
1739 case 0x63:
1740 case 0x64:
1741 case 0x65:
1742 case 0x66:
1743 case 0x67:
1744 {
1745 /** 0110 0rba mov %0, %1 */
1746 #line 672 "rl78-decode.opc"
1747 int rba AU = op[0] & 0x07;
1748 if (trace)
1749 {
1750 printf ("\033[33m%s\033[0m %02x\n",
1751 "/** 0110 0rba mov %0, %1 */",
1752 op[0]);
1753 printf (" rba = 0x%x\n", rba);
1754 }
1755 SYNTAX("mov %0, %1");
1756 #line 672 "rl78-decode.opc"
1757 ID(mov); DR(A); SRB(rba);
1758
1759 }
1760 break;
1761 case 0x61:
1762 GETBYTE ();
1763 switch (op[1] & 0xff)
1764 {
1765 case 0x00:
1766 case 0x01:
1767 case 0x02:
1768 case 0x03:
1769 case 0x04:
1770 case 0x05:
1771 case 0x06:
1772 case 0x07:
1773 {
1774 /** 0110 0001 0000 0reg add %0, %1 */
1775 #line 225 "rl78-decode.opc"
1776 int reg AU = op[1] & 0x07;
1777 if (trace)
1778 {
1779 printf ("\033[33m%s\033[0m %02x %02x\n",
1780 "/** 0110 0001 0000 0reg add %0, %1 */",
1781 op[0], op[1]);
1782 printf (" reg = 0x%x\n", reg);
1783 }
1784 SYNTAX("add %0, %1");
1785 #line 225 "rl78-decode.opc"
1786 ID(add); DRB(reg); SR(A); Fzac;
1787
1788 }
1789 break;
1790 case 0x08:
1791 case 0x0a:
1792 case 0x0b:
1793 case 0x0c:
1794 case 0x0d:
1795 case 0x0e:
1796 case 0x0f:
1797 {
1798 /** 0110 0001 0000 1rba add %0, %1 */
1799 #line 219 "rl78-decode.opc"
1800 int rba AU = op[1] & 0x07;
1801 if (trace)
1802 {
1803 printf ("\033[33m%s\033[0m %02x %02x\n",
1804 "/** 0110 0001 0000 1rba add %0, %1 */",
1805 op[0], op[1]);
1806 printf (" rba = 0x%x\n", rba);
1807 }
1808 SYNTAX("add %0, %1");
1809 #line 219 "rl78-decode.opc"
1810 ID(add); DR(A); SRB(rba); Fzac;
1811
1812 }
1813 break;
1814 case 0x09:
1815 {
1816 /** 0110 0001 0000 1001 addw %0, %ea1 */
1817 if (trace)
1818 {
1819 printf ("\033[33m%s\033[0m %02x %02x\n",
1820 "/** 0110 0001 0000 1001 addw %0, %ea1 */",
1821 op[0], op[1]);
1822 }
1823 SYNTAX("addw %0, %ea1");
1824 #line 268 "rl78-decode.opc"
1825 ID(add); W(); DR(AX); SM(HL, IMMU(1)); Fzac;
1826
1827 }
1828 break;
1829 case 0x10:
1830 case 0x11:
1831 case 0x12:
1832 case 0x13:
1833 case 0x14:
1834 case 0x15:
1835 case 0x16:
1836 case 0x17:
1837 {
1838 /** 0110 0001 0001 0reg addc %0, %1 */
1839 #line 254 "rl78-decode.opc"
1840 int reg AU = op[1] & 0x07;
1841 if (trace)
1842 {
1843 printf ("\033[33m%s\033[0m %02x %02x\n",
1844 "/** 0110 0001 0001 0reg addc %0, %1 */",
1845 op[0], op[1]);
1846 printf (" reg = 0x%x\n", reg);
1847 }
1848 SYNTAX("addc %0, %1");
1849 #line 254 "rl78-decode.opc"
1850 ID(addc); DRB(reg); SR(A); Fzac;
1851
1852 }
1853 break;
1854 case 0x18:
1855 case 0x1a:
1856 case 0x1b:
1857 case 0x1c:
1858 case 0x1d:
1859 case 0x1e:
1860 case 0x1f:
1861 {
1862 /** 0110 0001 0001 1rba addc %0, %1 */
1863 #line 251 "rl78-decode.opc"
1864 int rba AU = op[1] & 0x07;
1865 if (trace)
1866 {
1867 printf ("\033[33m%s\033[0m %02x %02x\n",
1868 "/** 0110 0001 0001 1rba addc %0, %1 */",
1869 op[0], op[1]);
1870 printf (" rba = 0x%x\n", rba);
1871 }
1872 SYNTAX("addc %0, %1");
1873 #line 251 "rl78-decode.opc"
1874 ID(addc); DR(A); SRB(rba); Fzac;
1875
1876 }
1877 break;
1878 case 0x20:
1879 case 0x21:
1880 case 0x22:
1881 case 0x23:
1882 case 0x24:
1883 case 0x25:
1884 case 0x26:
1885 case 0x27:
1886 {
1887 /** 0110 0001 0010 0reg sub %0, %1 */
1888 #line 1144 "rl78-decode.opc"
1889 int reg AU = op[1] & 0x07;
1890 if (trace)
1891 {
1892 printf ("\033[33m%s\033[0m %02x %02x\n",
1893 "/** 0110 0001 0010 0reg sub %0, %1 */",
1894 op[0], op[1]);
1895 printf (" reg = 0x%x\n", reg);
1896 }
1897 SYNTAX("sub %0, %1");
1898 #line 1144 "rl78-decode.opc"
1899 ID(sub); DRB(reg); SR(A); Fzac;
1900
1901 }
1902 break;
1903 case 0x28:
1904 case 0x2a:
1905 case 0x2b:
1906 case 0x2c:
1907 case 0x2d:
1908 case 0x2e:
1909 case 0x2f:
1910 {
1911 /** 0110 0001 0010 1rba sub %0, %1 */
1912 #line 1138 "rl78-decode.opc"
1913 int rba AU = op[1] & 0x07;
1914 if (trace)
1915 {
1916 printf ("\033[33m%s\033[0m %02x %02x\n",
1917 "/** 0110 0001 0010 1rba sub %0, %1 */",
1918 op[0], op[1]);
1919 printf (" rba = 0x%x\n", rba);
1920 }
1921 SYNTAX("sub %0, %1");
1922 #line 1138 "rl78-decode.opc"
1923 ID(sub); DR(A); SRB(rba); Fzac;
1924
1925 }
1926 break;
1927 case 0x29:
1928 {
1929 /** 0110 0001 0010 1001 subw %0, %ea1 */
1930 if (trace)
1931 {
1932 printf ("\033[33m%s\033[0m %02x %02x\n",
1933 "/** 0110 0001 0010 1001 subw %0, %ea1 */",
1934 op[0], op[1]);
1935 }
1936 SYNTAX("subw %0, %ea1");
1937 #line 1187 "rl78-decode.opc"
1938 ID(sub); W(); DR(AX); SM(HL, IMMU(1)); Fzac;
1939
1940 }
1941 break;
1942 case 0x30:
1943 case 0x31:
1944 case 0x32:
1945 case 0x33:
1946 case 0x34:
1947 case 0x35:
1948 case 0x36:
1949 case 0x37:
1950 {
1951 /** 0110 0001 0011 0reg subc %0, %1 */
1952 #line 1173 "rl78-decode.opc"
1953 int reg AU = op[1] & 0x07;
1954 if (trace)
1955 {
1956 printf ("\033[33m%s\033[0m %02x %02x\n",
1957 "/** 0110 0001 0011 0reg subc %0, %1 */",
1958 op[0], op[1]);
1959 printf (" reg = 0x%x\n", reg);
1960 }
1961 SYNTAX("subc %0, %1");
1962 #line 1173 "rl78-decode.opc"
1963 ID(subc); DRB(reg); SR(A); Fzac;
1964
1965 }
1966 break;
1967 case 0x38:
1968 case 0x3a:
1969 case 0x3b:
1970 case 0x3c:
1971 case 0x3d:
1972 case 0x3e:
1973 case 0x3f:
1974 {
1975 /** 0110 0001 0011 1rba subc %0, %1 */
1976 #line 1170 "rl78-decode.opc"
1977 int rba AU = op[1] & 0x07;
1978 if (trace)
1979 {
1980 printf ("\033[33m%s\033[0m %02x %02x\n",
1981 "/** 0110 0001 0011 1rba subc %0, %1 */",
1982 op[0], op[1]);
1983 printf (" rba = 0x%x\n", rba);
1984 }
1985 SYNTAX("subc %0, %1");
1986 #line 1170 "rl78-decode.opc"
1987 ID(subc); DR(A); SRB(rba); Fzac;
1988
1989 }
1990 break;
1991 case 0x40:
1992 case 0x41:
1993 case 0x42:
1994 case 0x43:
1995 case 0x44:
1996 case 0x45:
1997 case 0x46:
1998 case 0x47:
1999 {
2000 /** 0110 0001 0100 0reg cmp %0, %1 */
2001 #line 507 "rl78-decode.opc"
2002 int reg AU = op[1] & 0x07;
2003 if (trace)
2004 {
2005 printf ("\033[33m%s\033[0m %02x %02x\n",
2006 "/** 0110 0001 0100 0reg cmp %0, %1 */",
2007 op[0], op[1]);
2008 printf (" reg = 0x%x\n", reg);
2009 }
2010 SYNTAX("cmp %0, %1");
2011 #line 507 "rl78-decode.opc"
2012 ID(cmp); DRB(reg); SR(A); Fzac;
2013
2014 }
2015 break;
2016 case 0x48:
2017 case 0x4a:
2018 case 0x4b:
2019 case 0x4c:
2020 case 0x4d:
2021 case 0x4e:
2022 case 0x4f:
2023 {
2024 /** 0110 0001 0100 1rba cmp %0, %1 */
2025 #line 504 "rl78-decode.opc"
2026 int rba AU = op[1] & 0x07;
2027 if (trace)
2028 {
2029 printf ("\033[33m%s\033[0m %02x %02x\n",
2030 "/** 0110 0001 0100 1rba cmp %0, %1 */",
2031 op[0], op[1]);
2032 printf (" rba = 0x%x\n", rba);
2033 }
2034 SYNTAX("cmp %0, %1");
2035 #line 504 "rl78-decode.opc"
2036 ID(cmp); DR(A); SRB(rba); Fzac;
2037
2038 }
2039 break;
2040 case 0x49:
2041 {
2042 /** 0110 0001 0100 1001 cmpw %0, %ea1 */
2043 if (trace)
2044 {
2045 printf ("\033[33m%s\033[0m %02x %02x\n",
2046 "/** 0110 0001 0100 1001 cmpw %0, %ea1 */",
2047 op[0], op[1]);
2048 }
2049 SYNTAX("cmpw %0, %ea1");
2050 #line 534 "rl78-decode.opc"
2051 ID(cmp); W(); DR(AX); SM(HL, IMMU(1)); Fzac;
2052
2053 }
2054 break;
2055 case 0x50:
2056 case 0x51:
2057 case 0x52:
2058 case 0x53:
2059 case 0x54:
2060 case 0x55:
2061 case 0x56:
2062 case 0x57:
2063 {
2064 /** 0110 0001 0101 0reg and %0, %1 */
2065 #line 306 "rl78-decode.opc"
2066 int reg AU = op[1] & 0x07;
2067 if (trace)
2068 {
2069 printf ("\033[33m%s\033[0m %02x %02x\n",
2070 "/** 0110 0001 0101 0reg and %0, %1 */",
2071 op[0], op[1]);
2072 printf (" reg = 0x%x\n", reg);
2073 }
2074 SYNTAX("and %0, %1");
2075 #line 306 "rl78-decode.opc"
2076 ID(and); DRB(reg); SR(A); Fz;
2077
2078 }
2079 break;
2080 case 0x58:
2081 case 0x5a:
2082 case 0x5b:
2083 case 0x5c:
2084 case 0x5d:
2085 case 0x5e:
2086 case 0x5f:
2087 {
2088 /** 0110 0001 0101 1rba and %0, %1 */
2089 #line 303 "rl78-decode.opc"
2090 int rba AU = op[1] & 0x07;
2091 if (trace)
2092 {
2093 printf ("\033[33m%s\033[0m %02x %02x\n",
2094 "/** 0110 0001 0101 1rba and %0, %1 */",
2095 op[0], op[1]);
2096 printf (" rba = 0x%x\n", rba);
2097 }
2098 SYNTAX("and %0, %1");
2099 #line 303 "rl78-decode.opc"
2100 ID(and); DR(A); SRB(rba); Fz;
2101
2102 }
2103 break;
2104 case 0x59:
2105 {
2106 /** 0110 0001 0101 1001 inc %ea0 */
2107 if (trace)
2108 {
2109 printf ("\033[33m%s\033[0m %02x %02x\n",
2110 "/** 0110 0001 0101 1001 inc %ea0 */",
2111 op[0], op[1]);
2112 }
2113 SYNTAX("inc %ea0");
2114 #line 584 "rl78-decode.opc"
2115 ID(add); DM(HL, IMMU(1)); SC(1); Fza;
2116
2117 }
2118 break;
2119 case 0x60:
2120 case 0x61:
2121 case 0x62:
2122 case 0x63:
2123 case 0x64:
2124 case 0x65:
2125 case 0x66:
2126 case 0x67:
2127 {
2128 /** 0110 0001 0110 0reg or %0, %1 */
2129 #line 962 "rl78-decode.opc"
2130 int reg AU = op[1] & 0x07;
2131 if (trace)
2132 {
2133 printf ("\033[33m%s\033[0m %02x %02x\n",
2134 "/** 0110 0001 0110 0reg or %0, %1 */",
2135 op[0], op[1]);
2136 printf (" reg = 0x%x\n", reg);
2137 }
2138 SYNTAX("or %0, %1");
2139 #line 962 "rl78-decode.opc"
2140 ID(or); DRB(reg); SR(A); Fz;
2141
2142 }
2143 break;
2144 case 0x68:
2145 case 0x6a:
2146 case 0x6b:
2147 case 0x6c:
2148 case 0x6d:
2149 case 0x6e:
2150 case 0x6f:
2151 {
2152 /** 0110 0001 0110 1rba or %0, %1 */
2153 #line 959 "rl78-decode.opc"
2154 int rba AU = op[1] & 0x07;
2155 if (trace)
2156 {
2157 printf ("\033[33m%s\033[0m %02x %02x\n",
2158 "/** 0110 0001 0110 1rba or %0, %1 */",
2159 op[0], op[1]);
2160 printf (" rba = 0x%x\n", rba);
2161 }
2162 SYNTAX("or %0, %1");
2163 #line 959 "rl78-decode.opc"
2164 ID(or); DR(A); SRB(rba); Fz;
2165
2166 }
2167 break;
2168 case 0x69:
2169 {
2170 /** 0110 0001 0110 1001 dec %ea0 */
2171 if (trace)
2172 {
2173 printf ("\033[33m%s\033[0m %02x %02x\n",
2174 "/** 0110 0001 0110 1001 dec %ea0 */",
2175 op[0], op[1]);
2176 }
2177 SYNTAX("dec %ea0");
2178 #line 551 "rl78-decode.opc"
2179 ID(sub); DM(HL, IMMU(1)); SC(1); Fza;
2180
2181 }
2182 break;
2183 case 0x70:
2184 case 0x71:
2185 case 0x72:
2186 case 0x73:
2187 case 0x74:
2188 case 0x75:
2189 case 0x76:
2190 case 0x77:
2191 {
2192 /** 0110 0001 0111 0reg xor %0, %1 */
2193 #line 1266 "rl78-decode.opc"
2194 int reg AU = op[1] & 0x07;
2195 if (trace)
2196 {
2197 printf ("\033[33m%s\033[0m %02x %02x\n",
2198 "/** 0110 0001 0111 0reg xor %0, %1 */",
2199 op[0], op[1]);
2200 printf (" reg = 0x%x\n", reg);
2201 }
2202 SYNTAX("xor %0, %1");
2203 #line 1266 "rl78-decode.opc"
2204 ID(xor); DRB(reg); SR(A); Fz;
2205
2206 }
2207 break;
2208 case 0x78:
2209 case 0x7a:
2210 case 0x7b:
2211 case 0x7c:
2212 case 0x7d:
2213 case 0x7e:
2214 case 0x7f:
2215 {
2216 /** 0110 0001 0111 1rba xor %0, %1 */
2217 #line 1263 "rl78-decode.opc"
2218 int rba AU = op[1] & 0x07;
2219 if (trace)
2220 {
2221 printf ("\033[33m%s\033[0m %02x %02x\n",
2222 "/** 0110 0001 0111 1rba xor %0, %1 */",
2223 op[0], op[1]);
2224 printf (" rba = 0x%x\n", rba);
2225 }
2226 SYNTAX("xor %0, %1");
2227 #line 1263 "rl78-decode.opc"
2228 ID(xor); DR(A); SRB(rba); Fz;
2229
2230 }
2231 break;
2232 case 0x79:
2233 {
2234 /** 0110 0001 0111 1001 incw %ea0 */
2235 if (trace)
2236 {
2237 printf ("\033[33m%s\033[0m %02x %02x\n",
2238 "/** 0110 0001 0111 1001 incw %ea0 */",
2239 op[0], op[1]);
2240 }
2241 SYNTAX("incw %ea0");
2242 #line 598 "rl78-decode.opc"
2243 ID(add); W(); DM(HL, IMMU(1)); SC(1);
2244
2245 }
2246 break;
2247 case 0x80:
2248 case 0x81:
2249 {
2250 /** 0110 0001 1000 000 add %0, %e1 */
2251 if (trace)
2252 {
2253 printf ("\033[33m%s\033[0m %02x %02x\n",
2254 "/** 0110 0001 1000 000 add %0, %e1 */",
2255 op[0], op[1]);
2256 }
2257 SYNTAX("add %0, %e1");
2258 #line 207 "rl78-decode.opc"
2259 ID(add); DR(A); SM2(HL, B, 0); Fzac;
2260
2261 }
2262 break;
2263 case 0x82:
2264 {
2265 /** 0110 0001 1000 0010 add %0, %e1 */
2266 if (trace)
2267 {
2268 printf ("\033[33m%s\033[0m %02x %02x\n",
2269 "/** 0110 0001 1000 0010 add %0, %e1 */",
2270 op[0], op[1]);
2271 }
2272 SYNTAX("add %0, %e1");
2273 #line 213 "rl78-decode.opc"
2274 ID(add); DR(A); SM2(HL, C, 0); Fzac;
2275
2276 }
2277 break;
2278 case 0x84:
2279 case 0x85:
2280 case 0x86:
2281 case 0x87:
2282 case 0x94:
2283 case 0x95:
2284 case 0x96:
2285 case 0x97:
2286 case 0xa4:
2287 case 0xa5:
2288 case 0xa6:
2289 case 0xa7:
2290 case 0xb4:
2291 case 0xb5:
2292 case 0xb6:
2293 case 0xb7:
2294 case 0xc4:
2295 case 0xc5:
2296 case 0xc6:
2297 case 0xc7:
2298 case 0xd4:
2299 case 0xd5:
2300 case 0xd6:
2301 case 0xd7:
2302 case 0xe4:
2303 case 0xe5:
2304 case 0xe6:
2305 case 0xe7:
2306 case 0xf4:
2307 case 0xf5:
2308 case 0xf6:
2309 case 0xf7:
2310 {
2311 /** 0110 0001 1nnn 01mm callt [%x0] */
2312 #line 433 "rl78-decode.opc"
2313 int nnn AU = (op[1] >> 4) & 0x07;
2314 #line 433 "rl78-decode.opc"
2315 int mm AU = op[1] & 0x03;
2316 if (trace)
2317 {
2318 printf ("\033[33m%s\033[0m %02x %02x\n",
2319 "/** 0110 0001 1nnn 01mm callt [%x0] */",
2320 op[0], op[1]);
2321 printf (" nnn = 0x%x,", nnn);
2322 printf (" mm = 0x%x\n", mm);
2323 }
2324 SYNTAX("callt [%x0]");
2325 #line 433 "rl78-decode.opc"
2326 ID(call); DM(None, 0x80 + mm*16 + nnn*2);
2327
2328 /*----------------------------------------------------------------------*/
2329
2330 }
2331 break;
2332 case 0x88:
2333 case 0x8a:
2334 case 0x8b:
2335 case 0x8c:
2336 case 0x8d:
2337 case 0x8e:
2338 case 0x8f:
2339 {
2340 /** 0110 0001 1000 1reg xch %0, %1 */
2341 #line 1225 "rl78-decode.opc"
2342 int reg AU = op[1] & 0x07;
2343 if (trace)
2344 {
2345 printf ("\033[33m%s\033[0m %02x %02x\n",
2346 "/** 0110 0001 1000 1reg xch %0, %1 */",
2347 op[0], op[1]);
2348 printf (" reg = 0x%x\n", reg);
2349 }
2350 SYNTAX("xch %0, %1");
2351 #line 1225 "rl78-decode.opc"
2352 /* Note: DECW uses reg == X, so this must follow DECW */
2353 ID(xch); DR(A); SRB(reg);
2354
2355 }
2356 break;
2357 case 0x89:
2358 {
2359 /** 0110 0001 1000 1001 decw %ea0 */
2360 if (trace)
2361 {
2362 printf ("\033[33m%s\033[0m %02x %02x\n",
2363 "/** 0110 0001 1000 1001 decw %ea0 */",
2364 op[0], op[1]);
2365 }
2366 SYNTAX("decw %ea0");
2367 #line 565 "rl78-decode.opc"
2368 ID(sub); W(); DM(HL, IMMU(1)); SC(1);
2369
2370 }
2371 break;
2372 case 0x90:
2373 {
2374 /** 0110 0001 1001 0000 addc %0, %e1 */
2375 if (trace)
2376 {
2377 printf ("\033[33m%s\033[0m %02x %02x\n",
2378 "/** 0110 0001 1001 0000 addc %0, %e1 */",
2379 op[0], op[1]);
2380 }
2381 SYNTAX("addc %0, %e1");
2382 #line 239 "rl78-decode.opc"
2383 ID(addc); DR(A); SM2(HL, B, 0); Fzac;
2384
2385 }
2386 break;
2387 case 0x92:
2388 {
2389 /** 0110 0001 1001 0010 addc %0, %e1 */
2390 if (trace)
2391 {
2392 printf ("\033[33m%s\033[0m %02x %02x\n",
2393 "/** 0110 0001 1001 0010 addc %0, %e1 */",
2394 op[0], op[1]);
2395 }
2396 SYNTAX("addc %0, %e1");
2397 #line 242 "rl78-decode.opc"
2398 ID(addc); DR(A); SM2(HL, C, 0); Fzac;
2399
2400 }
2401 break;
2402 case 0xa0:
2403 case 0xa1:
2404 {
2405 /** 0110 0001 1010 000 sub %0, %e1 */
2406 if (trace)
2407 {
2408 printf ("\033[33m%s\033[0m %02x %02x\n",
2409 "/** 0110 0001 1010 000 sub %0, %e1 */",
2410 op[0], op[1]);
2411 }
2412 SYNTAX("sub %0, %e1");
2413 #line 1126 "rl78-decode.opc"
2414 ID(sub); DR(A); SM2(HL, B, 0); Fzac;
2415
2416 }
2417 break;
2418 case 0xa2:
2419 {
2420 /** 0110 0001 1010 0010 sub %0, %e1 */
2421 if (trace)
2422 {
2423 printf ("\033[33m%s\033[0m %02x %02x\n",
2424 "/** 0110 0001 1010 0010 sub %0, %e1 */",
2425 op[0], op[1]);
2426 }
2427 SYNTAX("sub %0, %e1");
2428 #line 1132 "rl78-decode.opc"
2429 ID(sub); DR(A); SM2(HL, C, 0); Fzac;
2430
2431 }
2432 break;
2433 case 0xa8:
2434 {
2435 /** 0110 0001 1010 1000 xch %0, %1 */
2436 if (trace)
2437 {
2438 printf ("\033[33m%s\033[0m %02x %02x\n",
2439 "/** 0110 0001 1010 1000 xch %0, %1 */",
2440 op[0], op[1]);
2441 }
2442 SYNTAX("xch %0, %1");
2443 #line 1229 "rl78-decode.opc"
2444 ID(xch); DR(A); SM(None, SADDR);
2445
2446 }
2447 break;
2448 case 0xa9:
2449 {
2450 /** 0110 0001 1010 1001 xch %0, %e1 */
2451 if (trace)
2452 {
2453 printf ("\033[33m%s\033[0m %02x %02x\n",
2454 "/** 0110 0001 1010 1001 xch %0, %e1 */",
2455 op[0], op[1]);
2456 }
2457 SYNTAX("xch %0, %e1");
2458 #line 1222 "rl78-decode.opc"
2459 ID(xch); DR(A); SM2(HL, C, 0);
2460
2461 }
2462 break;
2463 case 0xaa:
2464 {
2465 /** 0110 0001 1010 1010 xch %0, %e!1 */
2466 if (trace)
2467 {
2468 printf ("\033[33m%s\033[0m %02x %02x\n",
2469 "/** 0110 0001 1010 1010 xch %0, %e!1 */",
2470 op[0], op[1]);
2471 }
2472 SYNTAX("xch %0, %e!1");
2473 #line 1204 "rl78-decode.opc"
2474 ID(xch); DR(A); SM(None, IMMU(2));
2475
2476 }
2477 break;
2478 case 0xab:
2479 {
2480 /** 0110 0001 1010 1011 xch %0, %s1 */
2481 if (trace)
2482 {
2483 printf ("\033[33m%s\033[0m %02x %02x\n",
2484 "/** 0110 0001 1010 1011 xch %0, %1 */",
2485 op[0], op[1]);
2486 }
2487 SYNTAX("xch %0, %s1");
2488 #line 1232 "rl78-decode.opc"
2489 ID(xch); DR(A); SM(None, SFR);
2490
2491 }
2492 break;
2493 case 0xac:
2494 {
2495 /** 0110 0001 1010 1100 xch %0, %e1 */
2496 if (trace)
2497 {
2498 printf ("\033[33m%s\033[0m %02x %02x\n",
2499 "/** 0110 0001 1010 1100 xch %0, %e1 */",
2500 op[0], op[1]);
2501 }
2502 SYNTAX("xch %0, %e1");
2503 #line 1213 "rl78-decode.opc"
2504 ID(xch); DR(A); SM(HL, 0);
2505
2506 }
2507 break;
2508 case 0xad:
2509 {
2510 /** 0110 0001 1010 1101 xch %0, %ea1 */
2511 if (trace)
2512 {
2513 printf ("\033[33m%s\033[0m %02x %02x\n",
2514 "/** 0110 0001 1010 1101 xch %0, %ea1 */",
2515 op[0], op[1]);
2516 }
2517 SYNTAX("xch %0, %ea1");
2518 #line 1219 "rl78-decode.opc"
2519 ID(xch); DR(A); SM(HL, IMMU(1));
2520
2521 }
2522 break;
2523 case 0xae:
2524 {
2525 /** 0110 0001 1010 1110 xch %0, %e1 */
2526 if (trace)
2527 {
2528 printf ("\033[33m%s\033[0m %02x %02x\n",
2529 "/** 0110 0001 1010 1110 xch %0, %e1 */",
2530 op[0], op[1]);
2531 }
2532 SYNTAX("xch %0, %e1");
2533 #line 1207 "rl78-decode.opc"
2534 ID(xch); DR(A); SM(DE, 0);
2535
2536 }
2537 break;
2538 case 0xaf:
2539 {
2540 /** 0110 0001 1010 1111 xch %0, %ea1 */
2541 if (trace)
2542 {
2543 printf ("\033[33m%s\033[0m %02x %02x\n",
2544 "/** 0110 0001 1010 1111 xch %0, %ea1 */",
2545 op[0], op[1]);
2546 }
2547 SYNTAX("xch %0, %ea1");
2548 #line 1210 "rl78-decode.opc"
2549 ID(xch); DR(A); SM(DE, IMMU(1));
2550
2551 }
2552 break;
2553 case 0xb0:
2554 {
2555 /** 0110 0001 1011 0000 subc %0, %e1 */
2556 if (trace)
2557 {
2558 printf ("\033[33m%s\033[0m %02x %02x\n",
2559 "/** 0110 0001 1011 0000 subc %0, %e1 */",
2560 op[0], op[1]);
2561 }
2562 SYNTAX("subc %0, %e1");
2563 #line 1158 "rl78-decode.opc"
2564 ID(subc); DR(A); SM2(HL, B, 0); Fzac;
2565
2566 }
2567 break;
2568 case 0xb2:
2569 {
2570 /** 0110 0001 1011 0010 subc %0, %e1 */
2571 if (trace)
2572 {
2573 printf ("\033[33m%s\033[0m %02x %02x\n",
2574 "/** 0110 0001 1011 0010 subc %0, %e1 */",
2575 op[0], op[1]);
2576 }
2577 SYNTAX("subc %0, %e1");
2578 #line 1161 "rl78-decode.opc"
2579 ID(subc); DR(A); SM2(HL, C, 0); Fzac;
2580
2581 }
2582 break;
2583 case 0xb8:
2584 {
2585 /** 0110 0001 1011 1000 mov %0, %1 */
2586 if (trace)
2587 {
2588 printf ("\033[33m%s\033[0m %02x %02x\n",
2589 "/** 0110 0001 1011 1000 mov %0, %1 */",
2590 op[0], op[1]);
2591 }
2592 SYNTAX("mov %0, %1");
2593 #line 723 "rl78-decode.opc"
2594 ID(mov); DR(ES); SM(None, SADDR);
2595
2596 }
2597 break;
2598 case 0xb9:
2599 {
2600 /** 0110 0001 1011 1001 xch %0, %e1 */
2601 if (trace)
2602 {
2603 printf ("\033[33m%s\033[0m %02x %02x\n",
2604 "/** 0110 0001 1011 1001 xch %0, %e1 */",
2605 op[0], op[1]);
2606 }
2607 SYNTAX("xch %0, %e1");
2608 #line 1216 "rl78-decode.opc"
2609 ID(xch); DR(A); SM2(HL, B, 0);
2610
2611 }
2612 break;
2613 case 0xc0:
2614 {
2615 /** 0110 0001 1100 0000 cmp %0, %e1 */
2616 if (trace)
2617 {
2618 printf ("\033[33m%s\033[0m %02x %02x\n",
2619 "/** 0110 0001 1100 0000 cmp %0, %e1 */",
2620 op[0], op[1]);
2621 }
2622 SYNTAX("cmp %0, %e1");
2623 #line 492 "rl78-decode.opc"
2624 ID(cmp); DR(A); SM2(HL, B, 0); Fzac;
2625
2626 }
2627 break;
2628 case 0xc2:
2629 {
2630 /** 0110 0001 1100 0010 cmp %0, %e1 */
2631 if (trace)
2632 {
2633 printf ("\033[33m%s\033[0m %02x %02x\n",
2634 "/** 0110 0001 1100 0010 cmp %0, %e1 */",
2635 op[0], op[1]);
2636 }
2637 SYNTAX("cmp %0, %e1");
2638 #line 495 "rl78-decode.opc"
2639 ID(cmp); DR(A); SM2(HL, C, 0); Fzac;
2640
2641 }
2642 break;
2643 case 0xc3:
2644 {
2645 /** 0110 0001 1100 0011 bh $%a0 */
2646 if (trace)
2647 {
2648 printf ("\033[33m%s\033[0m %02x %02x\n",
2649 "/** 0110 0001 1100 0011 bh $%a0 */",
2650 op[0], op[1]);
2651 }
2652 SYNTAX("bh $%a0");
2653 #line 340 "rl78-decode.opc"
2654 ID(branch_cond); DC(pc+IMMS(1)+3); SR(None); COND(H);
2655
2656 }
2657 break;
2658 case 0xc8:
2659 {
2660 /** 0110 0001 1100 1000 sk%c1 */
2661 if (trace)
2662 {
2663 printf ("\033[33m%s\033[0m %02x %02x\n",
2664 "/** 0110 0001 1100 1000 sk%c1 */",
2665 op[0], op[1]);
2666 }
2667 SYNTAX("sk%c1");
2668 #line 1095 "rl78-decode.opc"
2669 ID(skip); COND(C);
2670
2671 }
2672 break;
2673 case 0xc9:
2674 {
2675 /** 0110 0001 1100 1001 mov %0, %e1 */
2676 if (trace)
2677 {
2678 printf ("\033[33m%s\033[0m %02x %02x\n",
2679 "/** 0110 0001 1100 1001 mov %0, %e1 */",
2680 op[0], op[1]);
2681 }
2682 SYNTAX("mov %0, %e1");
2683 #line 660 "rl78-decode.opc"
2684 ID(mov); DR(A); SM2(HL, B, 0);
2685
2686 }
2687 break;
2688 case 0xca:
2689 case 0xda:
2690 case 0xea:
2691 case 0xfa:
2692 {
2693 /** 0110 0001 11rg 1010 call %0 */
2694 #line 430 "rl78-decode.opc"
2695 int rg AU = (op[1] >> 4) & 0x03;
2696 if (trace)
2697 {
2698 printf ("\033[33m%s\033[0m %02x %02x\n",
2699 "/** 0110 0001 11rg 1010 call %0 */",
2700 op[0], op[1]);
2701 printf (" rg = 0x%x\n", rg);
2702 }
2703 SYNTAX("call %0");
2704 #line 430 "rl78-decode.opc"
2705 ID(call); DRW(rg);
2706
2707 }
2708 break;
2709 case 0xcb:
2710 {
2711 /** 0110 0001 1100 1011 br ax */
2712 if (trace)
2713 {
2714 printf ("\033[33m%s\033[0m %02x %02x\n",
2715 "/** 0110 0001 1100 1011 br ax */",
2716 op[0], op[1]);
2717 }
2718 SYNTAX("br ax");
2719 #line 380 "rl78-decode.opc"
2720 ID(branch); DR(AX);
2721
2722 /*----------------------------------------------------------------------*/
2723
2724 }
2725 break;
2726 case 0xcc:
2727 {
2728 /** 0110 0001 1100 1100 brk */
2729 if (trace)
2730 {
2731 printf ("\033[33m%s\033[0m %02x %02x\n",
2732 "/** 0110 0001 1100 1100 brk */",
2733 op[0], op[1]);
2734 }
2735 SYNTAX("brk");
2736 #line 388 "rl78-decode.opc"
2737 ID(break);
2738
2739 /*----------------------------------------------------------------------*/
2740
2741 }
2742 break;
2743 case 0xcd:
2744 {
2745 /** 0110 0001 1100 1101 pop %s0 */
2746 if (trace)
2747 {
2748 printf ("\033[33m%s\033[0m %02x %02x\n",
2749 "/** 0110 0001 1100 1101 pop %s0 */",
2750 op[0], op[1]);
2751 }
2752 SYNTAX("pop %s0");
2753 #line 990 "rl78-decode.opc"
2754 ID(mov); W(); DR(PSW); SPOP();
2755
2756 /*----------------------------------------------------------------------*/
2757
2758 }
2759 break;
2760 case 0xce:
2761 {
2762 /** 0110 0001 1100 1110 movs %ea0, %1 */
2763 if (trace)
2764 {
2765 printf ("\033[33m%s\033[0m %02x %02x\n",
2766 "/** 0110 0001 1100 1110 movs %ea0, %1 */",
2767 op[0], op[1]);
2768 }
2769 SYNTAX("movs %ea0, %1");
2770 #line 811 "rl78-decode.opc"
2771 ID(mov); DM(HL, IMMU(1)); SR(X); Fzc;
2772
2773 /*----------------------------------------------------------------------*/
2774
2775 }
2776 break;
2777 case 0xcf:
2778 case 0xdf:
2779 case 0xef:
2780 case 0xff:
2781 {
2782 /** 0110 0001 11rb 1111 sel rb%1 */
2783 #line 1042 "rl78-decode.opc"
2784 int rb AU = (op[1] >> 4) & 0x03;
2785 if (trace)
2786 {
2787 printf ("\033[33m%s\033[0m %02x %02x\n",
2788 "/** 0110 0001 11rb 1111 sel rb%1 */",
2789 op[0], op[1]);
2790 printf (" rb = 0x%x\n", rb);
2791 }
2792 SYNTAX("sel rb%1");
2793 #line 1042 "rl78-decode.opc"
2794 ID(sel); SC(rb);
2795
2796 /*----------------------------------------------------------------------*/
2797
2798 }
2799 break;
2800 case 0xd0:
2801 {
2802 /** 0110 0001 1101 0000 and %0, %e1 */
2803 if (trace)
2804 {
2805 printf ("\033[33m%s\033[0m %02x %02x\n",
2806 "/** 0110 0001 1101 0000 and %0, %e1 */",
2807 op[0], op[1]);
2808 }
2809 SYNTAX("and %0, %e1");
2810 #line 291 "rl78-decode.opc"
2811 ID(and); DR(A); SM2(HL, B, 0); Fz;
2812
2813 }
2814 break;
2815 case 0xd2:
2816 {
2817 /** 0110 0001 1101 0010 and %0, %e1 */
2818 if (trace)
2819 {
2820 printf ("\033[33m%s\033[0m %02x %02x\n",
2821 "/** 0110 0001 1101 0010 and %0, %e1 */",
2822 op[0], op[1]);
2823 }
2824 SYNTAX("and %0, %e1");
2825 #line 297 "rl78-decode.opc"
2826 ID(and); DR(A); SM2(HL, C, 0); Fz;
2827
2828 }
2829 break;
2830 case 0xd3:
2831 {
2832 /** 0110 0001 1101 0011 bnh $%a0 */
2833 if (trace)
2834 {
2835 printf ("\033[33m%s\033[0m %02x %02x\n",
2836 "/** 0110 0001 1101 0011 bnh $%a0 */",
2837 op[0], op[1]);
2838 }
2839 SYNTAX("bnh $%a0");
2840 #line 343 "rl78-decode.opc"
2841 ID(branch_cond); DC(pc+IMMS(1)+3); SR(None); COND(NH);
2842
2843 }
2844 break;
2845 case 0xd8:
2846 {
2847 /** 0110 0001 1101 1000 sk%c1 */
2848 if (trace)
2849 {
2850 printf ("\033[33m%s\033[0m %02x %02x\n",
2851 "/** 0110 0001 1101 1000 sk%c1 */",
2852 op[0], op[1]);
2853 }
2854 SYNTAX("sk%c1");
2855 #line 1101 "rl78-decode.opc"
2856 ID(skip); COND(NC);
2857
2858 }
2859 break;
2860 case 0xd9:
2861 {
2862 /** 0110 0001 1101 1001 mov %e0, %1 */
2863 if (trace)
2864 {
2865 printf ("\033[33m%s\033[0m %02x %02x\n",
2866 "/** 0110 0001 1101 1001 mov %e0, %1 */",
2867 op[0], op[1]);
2868 }
2869 SYNTAX("mov %e0, %1");
2870 #line 627 "rl78-decode.opc"
2871 ID(mov); DM2(HL, B, 0); SR(A);
2872
2873 }
2874 break;
2875 case 0xdb:
2876 {
2877 /** 0110 0001 1101 1011 ror %0, %1 */
2878 if (trace)
2879 {
2880 printf ("\033[33m%s\033[0m %02x %02x\n",
2881 "/** 0110 0001 1101 1011 ror %0, %1 */",
2882 op[0], op[1]);
2883 }
2884 SYNTAX("ror %0, %1");
2885 #line 1023 "rl78-decode.opc"
2886 ID(ror); DR(A); SC(1);
2887
2888 }
2889 break;
2890 case 0xdc:
2891 {
2892 /** 0110 0001 1101 1100 rolc %0, %1 */
2893 if (trace)
2894 {
2895 printf ("\033[33m%s\033[0m %02x %02x\n",
2896 "/** 0110 0001 1101 1100 rolc %0, %1 */",
2897 op[0], op[1]);
2898 }
2899 SYNTAX("rolc %0, %1");
2900 #line 1017 "rl78-decode.opc"
2901 ID(rolc); DR(A); SC(1);
2902
2903 }
2904 break;
2905 case 0xdd:
2906 {
2907 /** 0110 0001 1101 1101 push %s1 */
2908 if (trace)
2909 {
2910 printf ("\033[33m%s\033[0m %02x %02x\n",
2911 "/** 0110 0001 1101 1101 push %s1 */",
2912 op[0], op[1]);
2913 }
2914 SYNTAX("push %s1");
2915 #line 998 "rl78-decode.opc"
2916 ID(mov); W(); DPUSH(); SR(PSW);
2917
2918 /*----------------------------------------------------------------------*/
2919
2920 }
2921 break;
2922 case 0xde:
2923 {
2924 /** 0110 0001 1101 1110 cmps %0, %ea1 */
2925 if (trace)
2926 {
2927 printf ("\033[33m%s\033[0m %02x %02x\n",
2928 "/** 0110 0001 1101 1110 cmps %0, %ea1 */",
2929 op[0], op[1]);
2930 }
2931 SYNTAX("cmps %0, %ea1");
2932 #line 526 "rl78-decode.opc"
2933 ID(cmp); DR(X); SM(HL, IMMU(1)); Fzac;
2934
2935 /*----------------------------------------------------------------------*/
2936
2937 }
2938 break;
2939 case 0xe0:
2940 {
2941 /** 0110 0001 1110 0000 or %0, %e1 */
2942 if (trace)
2943 {
2944 printf ("\033[33m%s\033[0m %02x %02x\n",
2945 "/** 0110 0001 1110 0000 or %0, %e1 */",
2946 op[0], op[1]);
2947 }
2948 SYNTAX("or %0, %e1");
2949 #line 947 "rl78-decode.opc"
2950 ID(or); DR(A); SM2(HL, B, 0); Fz;
2951
2952 }
2953 break;
2954 case 0xe2:
2955 {
2956 /** 0110 0001 1110 0010 or %0, %e1 */
2957 if (trace)
2958 {
2959 printf ("\033[33m%s\033[0m %02x %02x\n",
2960 "/** 0110 0001 1110 0010 or %0, %e1 */",
2961 op[0], op[1]);
2962 }
2963 SYNTAX("or %0, %e1");
2964 #line 953 "rl78-decode.opc"
2965 ID(or); DR(A); SM2(HL, C, 0); Fz;
2966
2967 }
2968 break;
2969 case 0xe3:
2970 {
2971 /** 0110 0001 1110 0011 sk%c1 */
2972 if (trace)
2973 {
2974 printf ("\033[33m%s\033[0m %02x %02x\n",
2975 "/** 0110 0001 1110 0011 sk%c1 */",
2976 op[0], op[1]);
2977 }
2978 SYNTAX("sk%c1");
2979 #line 1098 "rl78-decode.opc"
2980 ID(skip); COND(H);
2981
2982 }
2983 break;
2984 case 0xe8:
2985 {
2986 /** 0110 0001 1110 1000 sk%c1 */
2987 if (trace)
2988 {
2989 printf ("\033[33m%s\033[0m %02x %02x\n",
2990 "/** 0110 0001 1110 1000 sk%c1 */",
2991 op[0], op[1]);
2992 }
2993 SYNTAX("sk%c1");
2994 #line 1110 "rl78-decode.opc"
2995 ID(skip); COND(Z);
2996
2997 /*----------------------------------------------------------------------*/
2998
2999 }
3000 break;
3001 case 0xe9:
3002 {
3003 /** 0110 0001 1110 1001 mov %0, %e1 */
3004 if (trace)
3005 {
3006 printf ("\033[33m%s\033[0m %02x %02x\n",
3007 "/** 0110 0001 1110 1001 mov %0, %e1 */",
3008 op[0], op[1]);
3009 }
3010 SYNTAX("mov %0, %e1");
3011 #line 663 "rl78-decode.opc"
3012 ID(mov); DR(A); SM2(HL, C, 0);
3013
3014 }
3015 break;
3016 case 0xeb:
3017 {
3018 /** 0110 0001 1110 1011 rol %0, %1 */
3019 if (trace)
3020 {
3021 printf ("\033[33m%s\033[0m %02x %02x\n",
3022 "/** 0110 0001 1110 1011 rol %0, %1 */",
3023 op[0], op[1]);
3024 }
3025 SYNTAX("rol %0, %1");
3026 #line 1014 "rl78-decode.opc"
3027 ID(rol); DR(A); SC(1);
3028
3029 }
3030 break;
3031 case 0xec:
3032 {
3033 /** 0110 0001 1110 1100 retb */
3034 if (trace)
3035 {
3036 printf ("\033[33m%s\033[0m %02x %02x\n",
3037 "/** 0110 0001 1110 1100 retb */",
3038 op[0], op[1]);
3039 }
3040 SYNTAX("retb");
3041 #line 1009 "rl78-decode.opc"
3042 ID(reti);
3043
3044 /*----------------------------------------------------------------------*/
3045
3046 }
3047 break;
3048 case 0xed:
3049 {
3050 /** 0110 0001 1110 1101 halt */
3051 if (trace)
3052 {
3053 printf ("\033[33m%s\033[0m %02x %02x\n",
3054 "/** 0110 0001 1110 1101 halt */",
3055 op[0], op[1]);
3056 }
3057 SYNTAX("halt");
3058 #line 576 "rl78-decode.opc"
3059 ID(halt);
3060
3061 /*----------------------------------------------------------------------*/
3062
3063 }
3064 break;
3065 case 0xee:
3066 case 0xfe:
3067 {
3068 /** 0110 0001 111r 1110 rolwc %0, %1 */
3069 #line 1020 "rl78-decode.opc"
3070 int r AU = (op[1] >> 4) & 0x01;
3071 if (trace)
3072 {
3073 printf ("\033[33m%s\033[0m %02x %02x\n",
3074 "/** 0110 0001 111r 1110 rolwc %0, %1 */",
3075 op[0], op[1]);
3076 printf (" r = 0x%x\n", r);
3077 }
3078 SYNTAX("rolwc %0, %1");
3079 #line 1020 "rl78-decode.opc"
3080 ID(rolc); W(); DRW(r); SC(1);
3081
3082 }
3083 break;
3084 case 0xf0:
3085 {
3086 /** 0110 0001 1111 0000 xor %0, %e1 */
3087 if (trace)
3088 {
3089 printf ("\033[33m%s\033[0m %02x %02x\n",
3090 "/** 0110 0001 1111 0000 xor %0, %e1 */",
3091 op[0], op[1]);
3092 }
3093 SYNTAX("xor %0, %e1");
3094 #line 1251 "rl78-decode.opc"
3095 ID(xor); DR(A); SM2(HL, B, 0); Fz;
3096
3097 }
3098 break;
3099 case 0xf2:
3100 {
3101 /** 0110 0001 1111 0010 xor %0, %e1 */
3102 if (trace)
3103 {
3104 printf ("\033[33m%s\033[0m %02x %02x\n",
3105 "/** 0110 0001 1111 0010 xor %0, %e1 */",
3106 op[0], op[1]);
3107 }
3108 SYNTAX("xor %0, %e1");
3109 #line 1257 "rl78-decode.opc"
3110 ID(xor); DR(A); SM2(HL, C, 0); Fz;
3111
3112 }
3113 break;
3114 case 0xf3:
3115 {
3116 /** 0110 0001 1111 0011 sk%c1 */
3117 if (trace)
3118 {
3119 printf ("\033[33m%s\033[0m %02x %02x\n",
3120 "/** 0110 0001 1111 0011 sk%c1 */",
3121 op[0], op[1]);
3122 }
3123 SYNTAX("sk%c1");
3124 #line 1104 "rl78-decode.opc"
3125 ID(skip); COND(NH);
3126
3127 }
3128 break;
3129 case 0xf8:
3130 {
3131 /** 0110 0001 1111 1000 sk%c1 */
3132 if (trace)
3133 {
3134 printf ("\033[33m%s\033[0m %02x %02x\n",
3135 "/** 0110 0001 1111 1000 sk%c1 */",
3136 op[0], op[1]);
3137 }
3138 SYNTAX("sk%c1");
3139 #line 1107 "rl78-decode.opc"
3140 ID(skip); COND(NZ);
3141
3142 }
3143 break;
3144 case 0xf9:
3145 {
3146 /** 0110 0001 1111 1001 mov %e0, %1 */
3147 if (trace)
3148 {
3149 printf ("\033[33m%s\033[0m %02x %02x\n",
3150 "/** 0110 0001 1111 1001 mov %e0, %1 */",
3151 op[0], op[1]);
3152 }
3153 SYNTAX("mov %e0, %1");
3154 #line 636 "rl78-decode.opc"
3155 ID(mov); DM2(HL, C, 0); SR(A);
3156
3157 }
3158 break;
3159 case 0xfb:
3160 {
3161 /** 0110 0001 1111 1011 rorc %0, %1 */
3162 if (trace)
3163 {
3164 printf ("\033[33m%s\033[0m %02x %02x\n",
3165 "/** 0110 0001 1111 1011 rorc %0, %1 */",
3166 op[0], op[1]);
3167 }
3168 SYNTAX("rorc %0, %1");
3169 #line 1026 "rl78-decode.opc"
3170 ID(rorc); DR(A); SC(1);
3171
3172 /*----------------------------------------------------------------------*/
3173
3174 /* Note that the branch insns need to be listed before the shift
3175 ones, as "shift count of zero" means "branch insn" */
3176
3177 }
3178 break;
3179 case 0xfc:
3180 {
3181 /** 0110 0001 1111 1100 reti */
3182 if (trace)
3183 {
3184 printf ("\033[33m%s\033[0m %02x %02x\n",
3185 "/** 0110 0001 1111 1100 reti */",
3186 op[0], op[1]);
3187 }
3188 SYNTAX("reti");
3189 #line 1006 "rl78-decode.opc"
3190 ID(reti);
3191
3192 }
3193 break;
3194 case 0xfd:
3195 {
3196 /** 0110 0001 1111 1101 stop */
3197 if (trace)
3198 {
3199 printf ("\033[33m%s\033[0m %02x %02x\n",
3200 "/** 0110 0001 1111 1101 stop */",
3201 op[0], op[1]);
3202 }
3203 SYNTAX("stop");
3204 #line 1115 "rl78-decode.opc"
3205 ID(stop);
3206
3207 /*----------------------------------------------------------------------*/
3208
3209 }
3210 break;
3211 default: UNSUPPORTED(); break;
3212 }
3213 break;
3214 case 0x68:
3215 {
3216 /** 0110 1000 movw %e0, %1 */
3217 if (trace)
3218 {
3219 printf ("\033[33m%s\033[0m %02x\n",
3220 "/** 0110 1000 movw %e0, %1 */",
3221 op[0]);
3222 }
3223 SYNTAX("movw %e0, %1");
3224 #line 874 "rl78-decode.opc"
3225 ID(mov); W(); DM(C, IMMU(2)); SR(AX);
3226
3227 }
3228 break;
3229 case 0x69:
3230 {
3231 /** 0110 1001 movw %0, %e1 */
3232 if (trace)
3233 {
3234 printf ("\033[33m%s\033[0m %02x\n",
3235 "/** 0110 1001 movw %0, %e1 */",
3236 op[0]);
3237 }
3238 SYNTAX("movw %0, %e1");
3239 #line 865 "rl78-decode.opc"
3240 ID(mov); W(); DR(AX); SM(C, IMMU(2));
3241
3242 }
3243 break;
3244 case 0x6a:
3245 {
3246 /** 0110 1010 or %0, #%1 */
3247 if (trace)
3248 {
3249 printf ("\033[33m%s\033[0m %02x\n",
3250 "/** 0110 1010 or %0, #%1 */",
3251 op[0]);
3252 }
3253 SYNTAX("or %0, #%1");
3254 #line 968 "rl78-decode.opc"
3255 ID(or); DM(None, SADDR); SC(IMMU(1)); Fz;
3256
3257 /*----------------------------------------------------------------------*/
3258
3259 }
3260 break;
3261 case 0x6b:
3262 {
3263 /** 0110 1011 or %0, %1 */
3264 if (trace)
3265 {
3266 printf ("\033[33m%s\033[0m %02x\n",
3267 "/** 0110 1011 or %0, %1 */",
3268 op[0]);
3269 }
3270 SYNTAX("or %0, %1");
3271 #line 965 "rl78-decode.opc"
3272 ID(or); DR(A); SM(None, SADDR); Fz;
3273
3274 }
3275 break;
3276 case 0x6c:
3277 {
3278 /** 0110 1100 or %0, #%1 */
3279 if (trace)
3280 {
3281 printf ("\033[33m%s\033[0m %02x\n",
3282 "/** 0110 1100 or %0, #%1 */",
3283 op[0]);
3284 }
3285 SYNTAX("or %0, #%1");
3286 #line 956 "rl78-decode.opc"
3287 ID(or); DR(A); SC(IMMU(1)); Fz;
3288
3289 }
3290 break;
3291 case 0x6d:
3292 {
3293 /** 0110 1101 or %0, %e1 */
3294 if (trace)
3295 {
3296 printf ("\033[33m%s\033[0m %02x\n",
3297 "/** 0110 1101 or %0, %e1 */",
3298 op[0]);
3299 }
3300 SYNTAX("or %0, %e1");
3301 #line 944 "rl78-decode.opc"
3302 ID(or); DR(A); SM(HL, 0); Fz;
3303
3304 }
3305 break;
3306 case 0x6e:
3307 {
3308 /** 0110 1110 or %0, %ea1 */
3309 if (trace)
3310 {
3311 printf ("\033[33m%s\033[0m %02x\n",
3312 "/** 0110 1110 or %0, %ea1 */",
3313 op[0]);
3314 }
3315 SYNTAX("or %0, %ea1");
3316 #line 950 "rl78-decode.opc"
3317 ID(or); DR(A); SM(HL, IMMU(1)); Fz;
3318
3319 }
3320 break;
3321 case 0x6f:
3322 {
3323 /** 0110 1111 or %0, %e!1 */
3324 if (trace)
3325 {
3326 printf ("\033[33m%s\033[0m %02x\n",
3327 "/** 0110 1111 or %0, %e!1 */",
3328 op[0]);
3329 }
3330 SYNTAX("or %0, %e!1");
3331 #line 941 "rl78-decode.opc"
3332 ID(or); DR(A); SM(None, IMMU(2)); Fz;
3333
3334 }
3335 break;
3336 case 0x70:
3337 case 0x72:
3338 case 0x73:
3339 case 0x74:
3340 case 0x75:
3341 case 0x76:
3342 case 0x77:
3343 {
3344 /** 0111 0rba mov %0, %1 */
3345 #line 696 "rl78-decode.opc"
3346 int rba AU = op[0] & 0x07;
3347 if (trace)
3348 {
3349 printf ("\033[33m%s\033[0m %02x\n",
3350 "/** 0111 0rba mov %0, %1 */",
3351 op[0]);
3352 printf (" rba = 0x%x\n", rba);
3353 }
3354 SYNTAX("mov %0, %1");
3355 #line 696 "rl78-decode.opc"
3356 ID(mov); DRB(rba); SR(A);
3357
3358 }
3359 break;
3360 case 0x71:
3361 GETBYTE ();
3362 switch (op[1] & 0xff)
3363 {
3364 case 0x00:
3365 case 0x10:
3366 case 0x20:
3367 case 0x30:
3368 case 0x40:
3369 case 0x50:
3370 case 0x60:
3371 case 0x70:
3372 {
3373 /** 0111 0001 0bit 0000 set1 %e!0 */
3374 #line 1047 "rl78-decode.opc"
3375 int bit AU = (op[1] >> 4) & 0x07;
3376 if (trace)
3377 {
3378 printf ("\033[33m%s\033[0m %02x %02x\n",
3379 "/** 0111 0001 0bit 0000 set1 %e!0 */",
3380 op[0], op[1]);
3381 printf (" bit = 0x%x\n", bit);
3382 }
3383 SYNTAX("set1 %e!0");
3384 #line 1047 "rl78-decode.opc"
3385 ID(mov); DM(None, IMMU(2)); DB(bit); SC(1);
3386
3387 }
3388 break;
3389 case 0x01:
3390 case 0x11:
3391 case 0x21:
3392 case 0x31:
3393 case 0x41:
3394 case 0x51:
3395 case 0x61:
3396 case 0x71:
3397 {
3398 /** 0111 0001 0bit 0001 mov1 %0, cy */
3399 #line 803 "rl78-decode.opc"
3400 int bit AU = (op[1] >> 4) & 0x07;
3401 if (trace)
3402 {
3403 printf ("\033[33m%s\033[0m %02x %02x\n",
3404 "/** 0111 0001 0bit 0001 mov1 %0, cy */",
3405 op[0], op[1]);
3406 printf (" bit = 0x%x\n", bit);
3407 }
3408 SYNTAX("mov1 %0, cy");
3409 #line 803 "rl78-decode.opc"
3410 ID(mov); DM(None, SADDR); DB(bit); SCY();
3411
3412 }
3413 break;
3414 case 0x02:
3415 case 0x12:
3416 case 0x22:
3417 case 0x32:
3418 case 0x42:
3419 case 0x52:
3420 case 0x62:
3421 case 0x72:
3422 {
3423 /** 0111 0001 0bit 0010 set1 %0 */
3424 #line 1065 "rl78-decode.opc"
3425 int bit AU = (op[1] >> 4) & 0x07;
3426 if (trace)
3427 {
3428 printf ("\033[33m%s\033[0m %02x %02x\n",
3429 "/** 0111 0001 0bit 0010 set1 %0 */",
3430 op[0], op[1]);
3431 printf (" bit = 0x%x\n", bit);
3432 }
3433 SYNTAX("set1 %0");
3434 #line 1065 "rl78-decode.opc"
3435 ID(mov); DM(None, SADDR); DB(bit); SC(1);
3436
3437 /*----------------------------------------------------------------------*/
3438
3439 }
3440 break;
3441 case 0x03:
3442 case 0x13:
3443 case 0x23:
3444 case 0x33:
3445 case 0x43:
3446 case 0x53:
3447 case 0x63:
3448 case 0x73:
3449 {
3450 /** 0111 0001 0bit 0011 clr1 %0 */
3451 #line 456 "rl78-decode.opc"
3452 int bit AU = (op[1] >> 4) & 0x07;
3453 if (trace)
3454 {
3455 printf ("\033[33m%s\033[0m %02x %02x\n",
3456 "/** 0111 0001 0bit 0011 clr1 %0 */",
3457 op[0], op[1]);
3458 printf (" bit = 0x%x\n", bit);
3459 }
3460 SYNTAX("clr1 %0");
3461 #line 456 "rl78-decode.opc"
3462 ID(mov); DM(None, SADDR); DB(bit); SC(0);
3463
3464 /*----------------------------------------------------------------------*/
3465
3466 }
3467 break;
3468 case 0x04:
3469 case 0x14:
3470 case 0x24:
3471 case 0x34:
3472 case 0x44:
3473 case 0x54:
3474 case 0x64:
3475 case 0x74:
3476 {
3477 /** 0111 0001 0bit 0100 mov1 cy, %1 */
3478 #line 797 "rl78-decode.opc"
3479 int bit AU = (op[1] >> 4) & 0x07;
3480 if (trace)
3481 {
3482 printf ("\033[33m%s\033[0m %02x %02x\n",
3483 "/** 0111 0001 0bit 0100 mov1 cy, %1 */",
3484 op[0], op[1]);
3485 printf (" bit = 0x%x\n", bit);
3486 }
3487 SYNTAX("mov1 cy, %1");
3488 #line 797 "rl78-decode.opc"
3489 ID(mov); DCY(); SM(None, SADDR); SB(bit);
3490
3491 }
3492 break;
3493 case 0x05:
3494 case 0x15:
3495 case 0x25:
3496 case 0x35:
3497 case 0x45:
3498 case 0x55:
3499 case 0x65:
3500 case 0x75:
3501 {
3502 /** 0111 0001 0bit 0101 and1 cy, %s1 */
3503 #line 326 "rl78-decode.opc"
3504 int bit AU = (op[1] >> 4) & 0x07;
3505 if (trace)
3506 {
3507 printf ("\033[33m%s\033[0m %02x %02x\n",
3508 "/** 0111 0001 0bit 0101 and1 cy, %s1 */",
3509 op[0], op[1]);
3510 printf (" bit = 0x%x\n", bit);
3511 }
3512 SYNTAX("and1 cy, %s1");
3513 #line 326 "rl78-decode.opc"
3514 ID(and); DCY(); SM(None, SADDR); SB(bit);
3515
3516 /*----------------------------------------------------------------------*/
3517
3518 /* Note that the branch insns need to be listed before the shift
3519 ones, as "shift count of zero" means "branch insn" */
3520
3521 }
3522 break;
3523 case 0x06:
3524 case 0x16:
3525 case 0x26:
3526 case 0x36:
3527 case 0x46:
3528 case 0x56:
3529 case 0x66:
3530 case 0x76:
3531 {
3532 /** 0111 0001 0bit 0110 or1 cy, %s1 */
3533 #line 982 "rl78-decode.opc"
3534 int bit AU = (op[1] >> 4) & 0x07;
3535 if (trace)
3536 {
3537 printf ("\033[33m%s\033[0m %02x %02x\n",
3538 "/** 0111 0001 0bit 0110 or1 cy, %s1 */",
3539 op[0], op[1]);
3540 printf (" bit = 0x%x\n", bit);
3541 }
3542 SYNTAX("or1 cy, %s1");
3543 #line 982 "rl78-decode.opc"
3544 ID(or); DCY(); SM(None, SADDR); SB(bit);
3545
3546 /*----------------------------------------------------------------------*/
3547
3548 }
3549 break;
3550 case 0x07:
3551 case 0x17:
3552 case 0x27:
3553 case 0x37:
3554 case 0x47:
3555 case 0x57:
3556 case 0x67:
3557 case 0x77:
3558 {
3559 /** 0111 0001 0bit 0111 xor1 cy, %s1 */
3560 #line 1286 "rl78-decode.opc"
3561 int bit AU = (op[1] >> 4) & 0x07;
3562 if (trace)
3563 {
3564 printf ("\033[33m%s\033[0m %02x %02x\n",
3565 "/** 0111 0001 0bit 0111 xor1 cy, %s1 */",
3566 op[0], op[1]);
3567 printf (" bit = 0x%x\n", bit);
3568 }
3569 SYNTAX("xor1 cy, %s1");
3570 #line 1286 "rl78-decode.opc"
3571 ID(xor); DCY(); SM(None, SADDR); SB(bit);
3572
3573 /*----------------------------------------------------------------------*/
3574
3575 }
3576 break;
3577 case 0x08:
3578 case 0x18:
3579 case 0x28:
3580 case 0x38:
3581 case 0x48:
3582 case 0x58:
3583 case 0x68:
3584 case 0x78:
3585 {
3586 /** 0111 0001 0bit 1000 clr1 %e!0 */
3587 #line 438 "rl78-decode.opc"
3588 int bit AU = (op[1] >> 4) & 0x07;
3589 if (trace)
3590 {
3591 printf ("\033[33m%s\033[0m %02x %02x\n",
3592 "/** 0111 0001 0bit 1000 clr1 %e!0 */",
3593 op[0], op[1]);
3594 printf (" bit = 0x%x\n", bit);
3595 }
3596 SYNTAX("clr1 %e!0");
3597 #line 438 "rl78-decode.opc"
3598 ID(mov); DM(None, IMMU(2)); DB(bit); SC(0);
3599
3600 }
3601 break;
3602 case 0x09:
3603 case 0x19:
3604 case 0x29:
3605 case 0x39:
3606 case 0x49:
3607 case 0x59:
3608 case 0x69:
3609 case 0x79:
3610 {
3611 /** 0111 0001 0bit 1001 mov1 %s0, cy */
3612 #line 806 "rl78-decode.opc"
3613 int bit AU = (op[1] >> 4) & 0x07;
3614 if (trace)
3615 {
3616 printf ("\033[33m%s\033[0m %02x %02x\n",
3617 "/** 0111 0001 0bit 1001 mov1 %s0, cy */",
3618 op[0], op[1]);
3619 printf (" bit = 0x%x\n", bit);
3620 }
3621 SYNTAX("mov1 %s0, cy");
3622 #line 806 "rl78-decode.opc"
3623 ID(mov); DM(None, SFR); DB(bit); SCY();
3624
3625 /*----------------------------------------------------------------------*/
3626
3627 }
3628 break;
3629 case 0x0a:
3630 case 0x1a:
3631 case 0x2a:
3632 case 0x3a:
3633 case 0x4a:
3634 case 0x5a:
3635 case 0x6a:
3636 case 0x7a:
3637 {
3638 /** 0111 0001 0bit 1010 set1 %s0 */
3639 #line 1059 "rl78-decode.opc"
3640 int bit AU = (op[1] >> 4) & 0x07;
3641 if (trace)
3642 {
3643 printf ("\033[33m%s\033[0m %02x %02x\n",
3644 "/** 0111 0001 0bit 1010 set1 %s0 */",
3645 op[0], op[1]);
3646 printf (" bit = 0x%x\n", bit);
3647 }
3648 SYNTAX("set1 %s0");
3649 #line 1059 "rl78-decode.opc"
3650 op0 = SFR;
3651 ID(mov); DM(None, op0); DB(bit); SC(1);
3652 if (op0 == RL78_SFR_PSW && bit == 7)
3653 rl78->syntax = "ei";
3654
3655 }
3656 break;
3657 case 0x0b:
3658 case 0x1b:
3659 case 0x2b:
3660 case 0x3b:
3661 case 0x4b:
3662 case 0x5b:
3663 case 0x6b:
3664 case 0x7b:
3665 {
3666 /** 0111 0001 0bit 1011 clr1 %s0 */
3667 #line 450 "rl78-decode.opc"
3668 int bit AU = (op[1] >> 4) & 0x07;
3669 if (trace)
3670 {
3671 printf ("\033[33m%s\033[0m %02x %02x\n",
3672 "/** 0111 0001 0bit 1011 clr1 %s0 */",
3673 op[0], op[1]);
3674 printf (" bit = 0x%x\n", bit);
3675 }
3676 SYNTAX("clr1 %s0");
3677 #line 450 "rl78-decode.opc"
3678 op0 = SFR;
3679 ID(mov); DM(None, op0); DB(bit); SC(0);
3680 if (op0 == RL78_SFR_PSW && bit == 7)
3681 rl78->syntax = "di";
3682
3683 }
3684 break;
3685 case 0x0c:
3686 case 0x1c:
3687 case 0x2c:
3688 case 0x3c:
3689 case 0x4c:
3690 case 0x5c:
3691 case 0x6c:
3692 case 0x7c:
3693 {
3694 /** 0111 0001 0bit 1100 mov1 cy, %s1 */
3695 #line 800 "rl78-decode.opc"
3696 int bit AU = (op[1] >> 4) & 0x07;
3697 if (trace)
3698 {
3699 printf ("\033[33m%s\033[0m %02x %02x\n",
3700 "/** 0111 0001 0bit 1100 mov1 cy, %s1 */",
3701 op[0], op[1]);
3702 printf (" bit = 0x%x\n", bit);
3703 }
3704 SYNTAX("mov1 cy, %s1");
3705 #line 800 "rl78-decode.opc"
3706 ID(mov); DCY(); SM(None, SFR); SB(bit);
3707
3708 }
3709 break;
3710 case 0x0d:
3711 case 0x1d:
3712 case 0x2d:
3713 case 0x3d:
3714 case 0x4d:
3715 case 0x5d:
3716 case 0x6d:
3717 case 0x7d:
3718 {
3719 /** 0111 0001 0bit 1101 and1 cy, %s1 */
3720 #line 323 "rl78-decode.opc"
3721 int bit AU = (op[1] >> 4) & 0x07;
3722 if (trace)
3723 {
3724 printf ("\033[33m%s\033[0m %02x %02x\n",
3725 "/** 0111 0001 0bit 1101 and1 cy, %s1 */",
3726 op[0], op[1]);
3727 printf (" bit = 0x%x\n", bit);
3728 }
3729 SYNTAX("and1 cy, %s1");
3730 #line 323 "rl78-decode.opc"
3731 ID(and); DCY(); SM(None, SFR); SB(bit);
3732
3733 }
3734 break;
3735 case 0x0e:
3736 case 0x1e:
3737 case 0x2e:
3738 case 0x3e:
3739 case 0x4e:
3740 case 0x5e:
3741 case 0x6e:
3742 case 0x7e:
3743 {
3744 /** 0111 0001 0bit 1110 or1 cy, %s1 */
3745 #line 979 "rl78-decode.opc"
3746 int bit AU = (op[1] >> 4) & 0x07;
3747 if (trace)
3748 {
3749 printf ("\033[33m%s\033[0m %02x %02x\n",
3750 "/** 0111 0001 0bit 1110 or1 cy, %s1 */",
3751 op[0], op[1]);
3752 printf (" bit = 0x%x\n", bit);
3753 }
3754 SYNTAX("or1 cy, %s1");
3755 #line 979 "rl78-decode.opc"
3756 ID(or); DCY(); SM(None, SFR); SB(bit);
3757
3758 }
3759 break;
3760 case 0x0f:
3761 case 0x1f:
3762 case 0x2f:
3763 case 0x3f:
3764 case 0x4f:
3765 case 0x5f:
3766 case 0x6f:
3767 case 0x7f:
3768 {
3769 /** 0111 0001 0bit 1111 xor1 cy, %s1 */
3770 #line 1283 "rl78-decode.opc"
3771 int bit AU = (op[1] >> 4) & 0x07;
3772 if (trace)
3773 {
3774 printf ("\033[33m%s\033[0m %02x %02x\n",
3775 "/** 0111 0001 0bit 1111 xor1 cy, %s1 */",
3776 op[0], op[1]);
3777 printf (" bit = 0x%x\n", bit);
3778 }
3779 SYNTAX("xor1 cy, %s1");
3780 #line 1283 "rl78-decode.opc"
3781 ID(xor); DCY(); SM(None, SFR); SB(bit);
3782
3783 }
3784 break;
3785 case 0x80:
3786 {
3787 /** 0111 0001 1000 0000 set1 cy */
3788 if (trace)
3789 {
3790 printf ("\033[33m%s\033[0m %02x %02x\n",
3791 "/** 0111 0001 1000 0000 set1 cy */",
3792 op[0], op[1]);
3793 }
3794 SYNTAX("set1 cy");
3795 #line 1056 "rl78-decode.opc"
3796 ID(mov); DCY(); SC(1);
3797
3798 }
3799 break;
3800 case 0x81:
3801 case 0x91:
3802 case 0xa1:
3803 case 0xb1:
3804 case 0xc1:
3805 case 0xd1:
3806 case 0xe1:
3807 case 0xf1:
3808 {
3809 /** 0111 0001 1bit 0001 mov1 %e0, cy */
3810 #line 785 "rl78-decode.opc"
3811 int bit AU = (op[1] >> 4) & 0x07;
3812 if (trace)
3813 {
3814 printf ("\033[33m%s\033[0m %02x %02x\n",
3815 "/** 0111 0001 1bit 0001 mov1 %e0, cy */",
3816 op[0], op[1]);
3817 printf (" bit = 0x%x\n", bit);
3818 }
3819 SYNTAX("mov1 %e0, cy");
3820 #line 785 "rl78-decode.opc"
3821 ID(mov); DM(HL, 0); DB(bit); SCY();
3822
3823 }
3824 break;
3825 case 0x82:
3826 case 0x92:
3827 case 0xa2:
3828 case 0xb2:
3829 case 0xc2:
3830 case 0xd2:
3831 case 0xe2:
3832 case 0xf2:
3833 {
3834 /** 0111 0001 1bit 0010 set1 %e0 */
3835 #line 1050 "rl78-decode.opc"
3836 int bit AU = (op[1] >> 4) & 0x07;
3837 if (trace)
3838 {
3839 printf ("\033[33m%s\033[0m %02x %02x\n",
3840 "/** 0111 0001 1bit 0010 set1 %e0 */",
3841 op[0], op[1]);
3842 printf (" bit = 0x%x\n", bit);
3843 }
3844 SYNTAX("set1 %e0");
3845 #line 1050 "rl78-decode.opc"
3846 ID(mov); DM(HL, 0); DB(bit); SC(1);
3847
3848 }
3849 break;
3850 case 0x83:
3851 case 0x93:
3852 case 0xa3:
3853 case 0xb3:
3854 case 0xc3:
3855 case 0xd3:
3856 case 0xe3:
3857 case 0xf3:
3858 {
3859 /** 0111 0001 1bit 0011 clr1 %e0 */
3860 #line 441 "rl78-decode.opc"
3861 int bit AU = (op[1] >> 4) & 0x07;
3862 if (trace)
3863 {
3864 printf ("\033[33m%s\033[0m %02x %02x\n",
3865 "/** 0111 0001 1bit 0011 clr1 %e0 */",
3866 op[0], op[1]);
3867 printf (" bit = 0x%x\n", bit);
3868 }
3869 SYNTAX("clr1 %e0");
3870 #line 441 "rl78-decode.opc"
3871 ID(mov); DM(HL, 0); DB(bit); SC(0);
3872
3873 }
3874 break;
3875 case 0x84:
3876 case 0x94:
3877 case 0xa4:
3878 case 0xb4:
3879 case 0xc4:
3880 case 0xd4:
3881 case 0xe4:
3882 case 0xf4:
3883 {
3884 /** 0111 0001 1bit 0100 mov1 cy, %e1 */
3885 #line 791 "rl78-decode.opc"
3886 int bit AU = (op[1] >> 4) & 0x07;
3887 if (trace)
3888 {
3889 printf ("\033[33m%s\033[0m %02x %02x\n",
3890 "/** 0111 0001 1bit 0100 mov1 cy, %e1 */",
3891 op[0], op[1]);
3892 printf (" bit = 0x%x\n", bit);
3893 }
3894 SYNTAX("mov1 cy, %e1");
3895 #line 791 "rl78-decode.opc"
3896 ID(mov); DCY(); SM(HL, 0); SB(bit);
3897
3898 }
3899 break;
3900 case 0x85:
3901 case 0x95:
3902 case 0xa5:
3903 case 0xb5:
3904 case 0xc5:
3905 case 0xd5:
3906 case 0xe5:
3907 case 0xf5:
3908 {
3909 /** 0111 0001 1bit 0101 and1 cy, %e1 */
3910 #line 317 "rl78-decode.opc"
3911 int bit AU = (op[1] >> 4) & 0x07;
3912 if (trace)
3913 {
3914 printf ("\033[33m%s\033[0m %02x %02x\n",
3915 "/** 0111 0001 1bit 0101 and1 cy, %e1 */",
3916 op[0], op[1]);
3917 printf (" bit = 0x%x\n", bit);
3918 }
3919 SYNTAX("and1 cy, %e1");
3920 #line 317 "rl78-decode.opc"
3921 ID(and); DCY(); SM(HL, 0); SB(bit);
3922
3923 }
3924 break;
3925 case 0x86:
3926 case 0x96:
3927 case 0xa6:
3928 case 0xb6:
3929 case 0xc6:
3930 case 0xd6:
3931 case 0xe6:
3932 case 0xf6:
3933 {
3934 /** 0111 0001 1bit 0110 or1 cy, %e1 */
3935 #line 973 "rl78-decode.opc"
3936 int bit AU = (op[1] >> 4) & 0x07;
3937 if (trace)
3938 {
3939 printf ("\033[33m%s\033[0m %02x %02x\n",
3940 "/** 0111 0001 1bit 0110 or1 cy, %e1 */",
3941 op[0], op[1]);
3942 printf (" bit = 0x%x\n", bit);
3943 }
3944 SYNTAX("or1 cy, %e1");
3945 #line 973 "rl78-decode.opc"
3946 ID(or); DCY(); SM(HL, 0); SB(bit);
3947
3948 }
3949 break;
3950 case 0x87:
3951 case 0x97:
3952 case 0xa7:
3953 case 0xb7:
3954 case 0xc7:
3955 case 0xd7:
3956 case 0xe7:
3957 case 0xf7:
3958 {
3959 /** 0111 0001 1bit 0111 xor1 cy, %e1 */
3960 #line 1277 "rl78-decode.opc"
3961 int bit AU = (op[1] >> 4) & 0x07;
3962 if (trace)
3963 {
3964 printf ("\033[33m%s\033[0m %02x %02x\n",
3965 "/** 0111 0001 1bit 0111 xor1 cy, %e1 */",
3966 op[0], op[1]);
3967 printf (" bit = 0x%x\n", bit);
3968 }
3969 SYNTAX("xor1 cy, %e1");
3970 #line 1277 "rl78-decode.opc"
3971 ID(xor); DCY(); SM(HL, 0); SB(bit);
3972
3973 }
3974 break;
3975 case 0x88:
3976 {
3977 /** 0111 0001 1000 1000 clr1 cy */
3978 if (trace)
3979 {
3980 printf ("\033[33m%s\033[0m %02x %02x\n",
3981 "/** 0111 0001 1000 1000 clr1 cy */",
3982 op[0], op[1]);
3983 }
3984 SYNTAX("clr1 cy");
3985 #line 447 "rl78-decode.opc"
3986 ID(mov); DCY(); SC(0);
3987
3988 }
3989 break;
3990 case 0x89:
3991 case 0x99:
3992 case 0xa9:
3993 case 0xb9:
3994 case 0xc9:
3995 case 0xd9:
3996 case 0xe9:
3997 case 0xf9:
3998 {
3999 /** 0111 0001 1bit 1001 mov1 %e0, cy */
4000 #line 788 "rl78-decode.opc"
4001 int bit AU = (op[1] >> 4) & 0x07;
4002 if (trace)
4003 {
4004 printf ("\033[33m%s\033[0m %02x %02x\n",
4005 "/** 0111 0001 1bit 1001 mov1 %e0, cy */",
4006 op[0], op[1]);
4007 printf (" bit = 0x%x\n", bit);
4008 }
4009 SYNTAX("mov1 %e0, cy");
4010 #line 788 "rl78-decode.opc"
4011 ID(mov); DR(A); DB(bit); SCY();
4012
4013 }
4014 break;
4015 case 0x8a:
4016 case 0x9a:
4017 case 0xaa:
4018 case 0xba:
4019 case 0xca:
4020 case 0xda:
4021 case 0xea:
4022 case 0xfa:
4023 {
4024 /** 0111 0001 1bit 1010 set1 %0 */
4025 #line 1053 "rl78-decode.opc"
4026 int bit AU = (op[1] >> 4) & 0x07;
4027 if (trace)
4028 {
4029 printf ("\033[33m%s\033[0m %02x %02x\n",
4030 "/** 0111 0001 1bit 1010 set1 %0 */",
4031 op[0], op[1]);
4032 printf (" bit = 0x%x\n", bit);
4033 }
4034 SYNTAX("set1 %0");
4035 #line 1053 "rl78-decode.opc"
4036 ID(mov); DR(A); DB(bit); SC(1);
4037
4038 }
4039 break;
4040 case 0x8b:
4041 case 0x9b:
4042 case 0xab:
4043 case 0xbb:
4044 case 0xcb:
4045 case 0xdb:
4046 case 0xeb:
4047 case 0xfb:
4048 {
4049 /** 0111 0001 1bit 1011 clr1 %0 */
4050 #line 444 "rl78-decode.opc"
4051 int bit AU = (op[1] >> 4) & 0x07;
4052 if (trace)
4053 {
4054 printf ("\033[33m%s\033[0m %02x %02x\n",
4055 "/** 0111 0001 1bit 1011 clr1 %0 */",
4056 op[0], op[1]);
4057 printf (" bit = 0x%x\n", bit);
4058 }
4059 SYNTAX("clr1 %0");
4060 #line 444 "rl78-decode.opc"
4061 ID(mov); DR(A); DB(bit); SC(0);
4062
4063 }
4064 break;
4065 case 0x8c:
4066 case 0x9c:
4067 case 0xac:
4068 case 0xbc:
4069 case 0xcc:
4070 case 0xdc:
4071 case 0xec:
4072 case 0xfc:
4073 {
4074 /** 0111 0001 1bit 1100 mov1 cy, %e1 */
4075 #line 794 "rl78-decode.opc"
4076 int bit AU = (op[1] >> 4) & 0x07;
4077 if (trace)
4078 {
4079 printf ("\033[33m%s\033[0m %02x %02x\n",
4080 "/** 0111 0001 1bit 1100 mov1 cy, %e1 */",
4081 op[0], op[1]);
4082 printf (" bit = 0x%x\n", bit);
4083 }
4084 SYNTAX("mov1 cy, %e1");
4085 #line 794 "rl78-decode.opc"
4086 ID(mov); DCY(); SR(A); SB(bit);
4087
4088 }
4089 break;
4090 case 0x8d:
4091 case 0x9d:
4092 case 0xad:
4093 case 0xbd:
4094 case 0xcd:
4095 case 0xdd:
4096 case 0xed:
4097 case 0xfd:
4098 {
4099 /** 0111 0001 1bit 1101 and1 cy, %1 */
4100 #line 320 "rl78-decode.opc"
4101 int bit AU = (op[1] >> 4) & 0x07;
4102 if (trace)
4103 {
4104 printf ("\033[33m%s\033[0m %02x %02x\n",
4105 "/** 0111 0001 1bit 1101 and1 cy, %1 */",
4106 op[0], op[1]);
4107 printf (" bit = 0x%x\n", bit);
4108 }
4109 SYNTAX("and1 cy, %1");
4110 #line 320 "rl78-decode.opc"
4111 ID(and); DCY(); SR(A); SB(bit);
4112
4113 }
4114 break;
4115 case 0x8e:
4116 case 0x9e:
4117 case 0xae:
4118 case 0xbe:
4119 case 0xce:
4120 case 0xde:
4121 case 0xee:
4122 case 0xfe:
4123 {
4124 /** 0111 0001 1bit 1110 or1 cy, %1 */
4125 #line 976 "rl78-decode.opc"
4126 int bit AU = (op[1] >> 4) & 0x07;
4127 if (trace)
4128 {
4129 printf ("\033[33m%s\033[0m %02x %02x\n",
4130 "/** 0111 0001 1bit 1110 or1 cy, %1 */",
4131 op[0], op[1]);
4132 printf (" bit = 0x%x\n", bit);
4133 }
4134 SYNTAX("or1 cy, %1");
4135 #line 976 "rl78-decode.opc"
4136 ID(or); DCY(); SR(A); SB(bit);
4137
4138 }
4139 break;
4140 case 0x8f:
4141 case 0x9f:
4142 case 0xaf:
4143 case 0xbf:
4144 case 0xcf:
4145 case 0xdf:
4146 case 0xef:
4147 case 0xff:
4148 {
4149 /** 0111 0001 1bit 1111 xor1 cy, %1 */
4150 #line 1280 "rl78-decode.opc"
4151 int bit AU = (op[1] >> 4) & 0x07;
4152 if (trace)
4153 {
4154 printf ("\033[33m%s\033[0m %02x %02x\n",
4155 "/** 0111 0001 1bit 1111 xor1 cy, %1 */",
4156 op[0], op[1]);
4157 printf (" bit = 0x%x\n", bit);
4158 }
4159 SYNTAX("xor1 cy, %1");
4160 #line 1280 "rl78-decode.opc"
4161 ID(xor); DCY(); SR(A); SB(bit);
4162
4163 }
4164 break;
4165 case 0xc0:
4166 {
4167 /** 0111 0001 1100 0000 not1 cy */
4168 if (trace)
4169 {
4170 printf ("\033[33m%s\033[0m %02x %02x\n",
4171 "/** 0111 0001 1100 0000 not1 cy */",
4172 op[0], op[1]);
4173 }
4174 SYNTAX("not1 cy");
4175 #line 917 "rl78-decode.opc"
4176 ID(xor); DCY(); SC(1);
4177
4178 /*----------------------------------------------------------------------*/
4179
4180 }
4181 break;
4182 default: UNSUPPORTED(); break;
4183 }
4184 break;
4185 case 0x78:
4186 {
4187 /** 0111 1000 movw %e0, %1 */
4188 if (trace)
4189 {
4190 printf ("\033[33m%s\033[0m %02x\n",
4191 "/** 0111 1000 movw %e0, %1 */",
4192 op[0]);
4193 }
4194 SYNTAX("movw %e0, %1");
4195 #line 877 "rl78-decode.opc"
4196 ID(mov); W(); DM(BC, IMMU(2)); SR(AX);
4197
4198 }
4199 break;
4200 case 0x79:
4201 {
4202 /** 0111 1001 movw %0, %e1 */
4203 if (trace)
4204 {
4205 printf ("\033[33m%s\033[0m %02x\n",
4206 "/** 0111 1001 movw %0, %e1 */",
4207 op[0]);
4208 }
4209 SYNTAX("movw %0, %e1");
4210 #line 868 "rl78-decode.opc"
4211 ID(mov); W(); DR(AX); SM(BC, IMMU(2));
4212
4213 }
4214 break;
4215 case 0x7a:
4216 {
4217 /** 0111 1010 xor %0, #%1 */
4218 if (trace)
4219 {
4220 printf ("\033[33m%s\033[0m %02x\n",
4221 "/** 0111 1010 xor %0, #%1 */",
4222 op[0]);
4223 }
4224 SYNTAX("xor %0, #%1");
4225 #line 1272 "rl78-decode.opc"
4226 ID(xor); DM(None, SADDR); SC(IMMU(1)); Fz;
4227
4228 /*----------------------------------------------------------------------*/
4229
4230 }
4231 break;
4232 case 0x7b:
4233 {
4234 /** 0111 1011 xor %0, %1 */
4235 if (trace)
4236 {
4237 printf ("\033[33m%s\033[0m %02x\n",
4238 "/** 0111 1011 xor %0, %1 */",
4239 op[0]);
4240 }
4241 SYNTAX("xor %0, %1");
4242 #line 1269 "rl78-decode.opc"
4243 ID(xor); DR(A); SM(None, SADDR); Fz;
4244
4245 }
4246 break;
4247 case 0x7c:
4248 {
4249 /** 0111 1100 xor %0, #%1 */
4250 if (trace)
4251 {
4252 printf ("\033[33m%s\033[0m %02x\n",
4253 "/** 0111 1100 xor %0, #%1 */",
4254 op[0]);
4255 }
4256 SYNTAX("xor %0, #%1");
4257 #line 1260 "rl78-decode.opc"
4258 ID(xor); DR(A); SC(IMMU(1)); Fz;
4259
4260 }
4261 break;
4262 case 0x7d:
4263 {
4264 /** 0111 1101 xor %0, %e1 */
4265 if (trace)
4266 {
4267 printf ("\033[33m%s\033[0m %02x\n",
4268 "/** 0111 1101 xor %0, %e1 */",
4269 op[0]);
4270 }
4271 SYNTAX("xor %0, %e1");
4272 #line 1248 "rl78-decode.opc"
4273 ID(xor); DR(A); SM(HL, 0); Fz;
4274
4275 }
4276 break;
4277 case 0x7e:
4278 {
4279 /** 0111 1110 xor %0, %ea1 */
4280 if (trace)
4281 {
4282 printf ("\033[33m%s\033[0m %02x\n",
4283 "/** 0111 1110 xor %0, %ea1 */",
4284 op[0]);
4285 }
4286 SYNTAX("xor %0, %ea1");
4287 #line 1254 "rl78-decode.opc"
4288 ID(xor); DR(A); SM(HL, IMMU(1)); Fz;
4289
4290 }
4291 break;
4292 case 0x7f:
4293 {
4294 /** 0111 1111 xor %0, %e!1 */
4295 if (trace)
4296 {
4297 printf ("\033[33m%s\033[0m %02x\n",
4298 "/** 0111 1111 xor %0, %e!1 */",
4299 op[0]);
4300 }
4301 SYNTAX("xor %0, %e!1");
4302 #line 1245 "rl78-decode.opc"
4303 ID(xor); DR(A); SM(None, IMMU(2)); Fz;
4304
4305 }
4306 break;
4307 case 0x80:
4308 case 0x81:
4309 case 0x82:
4310 case 0x83:
4311 case 0x84:
4312 case 0x85:
4313 case 0x86:
4314 case 0x87:
4315 {
4316 /** 1000 0reg inc %0 */
4317 #line 587 "rl78-decode.opc"
4318 int reg AU = op[0] & 0x07;
4319 if (trace)
4320 {
4321 printf ("\033[33m%s\033[0m %02x\n",
4322 "/** 1000 0reg inc %0 */",
4323 op[0]);
4324 printf (" reg = 0x%x\n", reg);
4325 }
4326 SYNTAX("inc %0");
4327 #line 587 "rl78-decode.opc"
4328 ID(add); DRB(reg); SC(1); Fza;
4329
4330 }
4331 break;
4332 case 0x88:
4333 {
4334 /** 1000 1000 mov %0, %ea1 */
4335 if (trace)
4336 {
4337 printf ("\033[33m%s\033[0m %02x\n",
4338 "/** 1000 1000 mov %0, %ea1 */",
4339 op[0]);
4340 }
4341 SYNTAX("mov %0, %ea1");
4342 #line 666 "rl78-decode.opc"
4343 ID(mov); DR(A); SM(SP, IMMU(1));
4344
4345 }
4346 break;
4347 case 0x89:
4348 {
4349 /** 1000 1001 mov %0, %e1 */
4350 if (trace)
4351 {
4352 printf ("\033[33m%s\033[0m %02x\n",
4353 "/** 1000 1001 mov %0, %e1 */",
4354 op[0]);
4355 }
4356 SYNTAX("mov %0, %e1");
4357 #line 648 "rl78-decode.opc"
4358 ID(mov); DR(A); SM(DE, 0);
4359
4360 }
4361 break;
4362 case 0x8a:
4363 {
4364 /** 1000 1010 mov %0, %ea1 */
4365 if (trace)
4366 {
4367 printf ("\033[33m%s\033[0m %02x\n",
4368 "/** 1000 1010 mov %0, %ea1 */",
4369 op[0]);
4370 }
4371 SYNTAX("mov %0, %ea1");
4372 #line 651 "rl78-decode.opc"
4373 ID(mov); DR(A); SM(DE, IMMU(1));
4374
4375 }
4376 break;
4377 case 0x8b:
4378 {
4379 /** 1000 1011 mov %0, %e1 */
4380 if (trace)
4381 {
4382 printf ("\033[33m%s\033[0m %02x\n",
4383 "/** 1000 1011 mov %0, %e1 */",
4384 op[0]);
4385 }
4386 SYNTAX("mov %0, %e1");
4387 #line 654 "rl78-decode.opc"
4388 ID(mov); DR(A); SM(HL, 0);
4389
4390 }
4391 break;
4392 case 0x8c:
4393 {
4394 /** 1000 1100 mov %0, %ea1 */
4395 if (trace)
4396 {
4397 printf ("\033[33m%s\033[0m %02x\n",
4398 "/** 1000 1100 mov %0, %ea1 */",
4399 op[0]);
4400 }
4401 SYNTAX("mov %0, %ea1");
4402 #line 657 "rl78-decode.opc"
4403 ID(mov); DR(A); SM(HL, IMMU(1));
4404
4405 }
4406 break;
4407 case 0x8d:
4408 {
4409 /** 1000 1101 mov %0, %1 */
4410 if (trace)
4411 {
4412 printf ("\033[33m%s\033[0m %02x\n",
4413 "/** 1000 1101 mov %0, %1 */",
4414 op[0]);
4415 }
4416 SYNTAX("mov %0, %1");
4417 #line 690 "rl78-decode.opc"
4418 ID(mov); DR(A); SM(None, SADDR);
4419
4420 }
4421 break;
4422 case 0x8e:
4423 {
4424 /** 1000 1110 mov %0, %s1 */
4425 if (trace)
4426 {
4427 printf ("\033[33m%s\033[0m %02x\n",
4428 "/** 1000 1110 mov %0, %s1 */",
4429 op[0]);
4430 }
4431 SYNTAX("mov %0, %s1");
4432 #line 687 "rl78-decode.opc"
4433 ID(mov); DR(A); SM(None, SFR);
4434
4435 }
4436 break;
4437 case 0x8f:
4438 {
4439 /** 1000 1111 mov %0, %e!1 */
4440 if (trace)
4441 {
4442 printf ("\033[33m%s\033[0m %02x\n",
4443 "/** 1000 1111 mov %0, %e!1 */",
4444 op[0]);
4445 }
4446 SYNTAX("mov %0, %e!1");
4447 #line 645 "rl78-decode.opc"
4448 ID(mov); DR(A); SM(None, IMMU(2));
4449
4450 }
4451 break;
4452 case 0x90:
4453 case 0x91:
4454 case 0x92:
4455 case 0x93:
4456 case 0x94:
4457 case 0x95:
4458 case 0x96:
4459 case 0x97:
4460 {
4461 /** 1001 0reg dec %0 */
4462 #line 554 "rl78-decode.opc"
4463 int reg AU = op[0] & 0x07;
4464 if (trace)
4465 {
4466 printf ("\033[33m%s\033[0m %02x\n",
4467 "/** 1001 0reg dec %0 */",
4468 op[0]);
4469 printf (" reg = 0x%x\n", reg);
4470 }
4471 SYNTAX("dec %0");
4472 #line 554 "rl78-decode.opc"
4473 ID(sub); DRB(reg); SC(1); Fza;
4474
4475 }
4476 break;
4477 case 0x98:
4478 {
4479 /** 1001 1000 mov %a0, %1 */
4480 if (trace)
4481 {
4482 printf ("\033[33m%s\033[0m %02x\n",
4483 "/** 1001 1000 mov %a0, %1 */",
4484 op[0]);
4485 }
4486 SYNTAX("mov %a0, %1");
4487 #line 642 "rl78-decode.opc"
4488 ID(mov); DM(SP, IMMU(1)); SR(A);
4489
4490 }
4491 break;
4492 case 0x99:
4493 {
4494 /** 1001 1001 mov %e0, %1 */
4495 if (trace)
4496 {
4497 printf ("\033[33m%s\033[0m %02x\n",
4498 "/** 1001 1001 mov %e0, %1 */",
4499 op[0]);
4500 }
4501 SYNTAX("mov %e0, %1");
4502 #line 615 "rl78-decode.opc"
4503 ID(mov); DM(DE, 0); SR(A);
4504
4505 }
4506 break;
4507 case 0x9a:
4508 {
4509 /** 1001 1010 mov %ea0, %1 */
4510 if (trace)
4511 {
4512 printf ("\033[33m%s\033[0m %02x\n",
4513 "/** 1001 1010 mov %ea0, %1 */",
4514 op[0]);
4515 }
4516 SYNTAX("mov %ea0, %1");
4517 #line 621 "rl78-decode.opc"
4518 ID(mov); DM(DE, IMMU(1)); SR(A);
4519
4520 }
4521 break;
4522 case 0x9b:
4523 {
4524 /** 1001 1011 mov %e0, %1 */
4525 if (trace)
4526 {
4527 printf ("\033[33m%s\033[0m %02x\n",
4528 "/** 1001 1011 mov %e0, %1 */",
4529 op[0]);
4530 }
4531 SYNTAX("mov %e0, %1");
4532 #line 624 "rl78-decode.opc"
4533 ID(mov); DM(HL, 0); SR(A);
4534
4535 }
4536 break;
4537 case 0x9c:
4538 {
4539 /** 1001 1100 mov %ea0, %1 */
4540 if (trace)
4541 {
4542 printf ("\033[33m%s\033[0m %02x\n",
4543 "/** 1001 1100 mov %ea0, %1 */",
4544 op[0]);
4545 }
4546 SYNTAX("mov %ea0, %1");
4547 #line 633 "rl78-decode.opc"
4548 ID(mov); DM(HL, IMMU(1)); SR(A);
4549
4550 }
4551 break;
4552 case 0x9d:
4553 {
4554 /** 1001 1101 mov %0, %1 */
4555 if (trace)
4556 {
4557 printf ("\033[33m%s\033[0m %02x\n",
4558 "/** 1001 1101 mov %0, %1 */",
4559 op[0]);
4560 }
4561 SYNTAX("mov %0, %1");
4562 #line 747 "rl78-decode.opc"
4563 ID(mov); DM(None, SADDR); SR(A);
4564
4565 }
4566 break;
4567 case 0x9e:
4568 {
4569 /** 1001 1110 mov %s0, %1 */
4570 if (trace)
4571 {
4572 printf ("\033[33m%s\033[0m %02x\n",
4573 "/** 1001 1110 mov %0, %1 */",
4574 op[0]);
4575 }
4576 SYNTAX("mov %s0, %1");
4577 #line 780 "rl78-decode.opc"
4578 ID(mov); DM(None, SFR); SR(A);
4579
4580 /*----------------------------------------------------------------------*/
4581
4582 }
4583 break;
4584 case 0x9f:
4585 {
4586 /** 1001 1111 mov %e!0, %1 */
4587 if (trace)
4588 {
4589 printf ("\033[33m%s\033[0m %02x\n",
4590 "/** 1001 1111 mov %e!0, %1 */",
4591 op[0]);
4592 }
4593 SYNTAX("mov %e!0, %1");
4594 #line 612 "rl78-decode.opc"
4595 ID(mov); DM(None, IMMU(2)); SR(A);
4596
4597 }
4598 break;
4599 case 0xa0:
4600 {
4601 /** 1010 0000 inc %e!0 */
4602 if (trace)
4603 {
4604 printf ("\033[33m%s\033[0m %02x\n",
4605 "/** 1010 0000 inc %e!0 */",
4606 op[0]);
4607 }
4608 SYNTAX("inc %e!0");
4609 #line 581 "rl78-decode.opc"
4610 ID(add); DM(None, IMMU(2)); SC(1); Fza;
4611
4612 }
4613 break;
4614 case 0xa1:
4615 case 0xa3:
4616 case 0xa5:
4617 case 0xa7:
4618 {
4619 /** 1010 0rg1 incw %0 */
4620 #line 601 "rl78-decode.opc"
4621 int rg AU = (op[0] >> 1) & 0x03;
4622 if (trace)
4623 {
4624 printf ("\033[33m%s\033[0m %02x\n",
4625 "/** 1010 0rg1 incw %0 */",
4626 op[0]);
4627 printf (" rg = 0x%x\n", rg);
4628 }
4629 SYNTAX("incw %0");
4630 #line 601 "rl78-decode.opc"
4631 ID(add); W(); DRW(rg); SC(1);
4632
4633 }
4634 break;
4635 case 0xa2:
4636 {
4637 /** 1010 0010 incw %e!0 */
4638 if (trace)
4639 {
4640 printf ("\033[33m%s\033[0m %02x\n",
4641 "/** 1010 0010 incw %e!0 */",
4642 op[0]);
4643 }
4644 SYNTAX("incw %e!0");
4645 #line 595 "rl78-decode.opc"
4646 ID(add); W(); DM(None, IMMU(2)); SC(1);
4647
4648 }
4649 break;
4650 case 0xa4:
4651 {
4652 /** 1010 0100 inc %0 */
4653 if (trace)
4654 {
4655 printf ("\033[33m%s\033[0m %02x\n",
4656 "/** 1010 0100 inc %0 */",
4657 op[0]);
4658 }
4659 SYNTAX("inc %0");
4660 #line 590 "rl78-decode.opc"
4661 ID(add); DM(None, SADDR); SC(1); Fza;
4662
4663 /*----------------------------------------------------------------------*/
4664
4665 }
4666 break;
4667 case 0xa6:
4668 {
4669 /** 1010 0110 incw %0 */
4670 if (trace)
4671 {
4672 printf ("\033[33m%s\033[0m %02x\n",
4673 "/** 1010 0110 incw %0 */",
4674 op[0]);
4675 }
4676 SYNTAX("incw %0");
4677 #line 604 "rl78-decode.opc"
4678 ID(add); W(); DM(None, SADDR); SC(1);
4679
4680 /*----------------------------------------------------------------------*/
4681
4682 }
4683 break;
4684 case 0xa8:
4685 {
4686 /** 1010 1000 movw %0, %a1 */
4687 if (trace)
4688 {
4689 printf ("\033[33m%s\033[0m %02x\n",
4690 "/** 1010 1000 movw %0, %a1 */",
4691 op[0]);
4692 }
4693 SYNTAX("movw %0, %a1");
4694 #line 850 "rl78-decode.opc"
4695 ID(mov); W(); DR(AX); SM(SP, IMMU(1));
4696
4697 }
4698 break;
4699 case 0xa9:
4700 {
4701 /** 1010 1001 movw %0, %e1 */
4702 if (trace)
4703 {
4704 printf ("\033[33m%s\033[0m %02x\n",
4705 "/** 1010 1001 movw %0, %e1 */",
4706 op[0]);
4707 }
4708 SYNTAX("movw %0, %e1");
4709 #line 838 "rl78-decode.opc"
4710 ID(mov); W(); DR(AX); SM(DE, 0);
4711
4712 }
4713 break;
4714 case 0xaa:
4715 {
4716 /** 1010 1010 movw %0, %ea1 */
4717 if (trace)
4718 {
4719 printf ("\033[33m%s\033[0m %02x\n",
4720 "/** 1010 1010 movw %0, %ea1 */",
4721 op[0]);
4722 }
4723 SYNTAX("movw %0, %ea1");
4724 #line 841 "rl78-decode.opc"
4725 ID(mov); W(); DR(AX); SM(DE, IMMU(1));
4726
4727 }
4728 break;
4729 case 0xab:
4730 {
4731 /** 1010 1011 movw %0, %e1 */
4732 if (trace)
4733 {
4734 printf ("\033[33m%s\033[0m %02x\n",
4735 "/** 1010 1011 movw %0, %e1 */",
4736 op[0]);
4737 }
4738 SYNTAX("movw %0, %e1");
4739 #line 844 "rl78-decode.opc"
4740 ID(mov); W(); DR(AX); SM(HL, 0);
4741
4742 }
4743 break;
4744 case 0xac:
4745 {
4746 /** 1010 1100 movw %0, %ea1 */
4747 if (trace)
4748 {
4749 printf ("\033[33m%s\033[0m %02x\n",
4750 "/** 1010 1100 movw %0, %ea1 */",
4751 op[0]);
4752 }
4753 SYNTAX("movw %0, %ea1");
4754 #line 847 "rl78-decode.opc"
4755 ID(mov); W(); DR(AX); SM(HL, IMMU(1));
4756
4757 }
4758 break;
4759 case 0xad:
4760 {
4761 /** 1010 1101 movw %0, %1 */
4762 if (trace)
4763 {
4764 printf ("\033[33m%s\033[0m %02x\n",
4765 "/** 1010 1101 movw %0, %1 */",
4766 op[0]);
4767 }
4768 SYNTAX("movw %0, %1");
4769 #line 880 "rl78-decode.opc"
4770 ID(mov); W(); DR(AX); SM(None, SADDR);
4771
4772 }
4773 break;
4774 case 0xae:
4775 {
4776 /** 1010 1110 movw %0, %s1 */
4777 if (trace)
4778 {
4779 printf ("\033[33m%s\033[0m %02x\n",
4780 "/** 1010 1110 movw %0, %s1 */",
4781 op[0]);
4782 }
4783 SYNTAX("movw %0, %s1");
4784 #line 883 "rl78-decode.opc"
4785 ID(mov); W(); DR(AX); SM(None, SFR);
4786
4787 }
4788 break;
4789 case 0xaf:
4790 {
4791 /** 1010 1111 movw %0, %e!1 */
4792 if (trace)
4793 {
4794 printf ("\033[33m%s\033[0m %02x\n",
4795 "/** 1010 1111 movw %0, %e!1 */",
4796 op[0]);
4797 }
4798 SYNTAX("movw %0, %e!1");
4799 #line 834 "rl78-decode.opc"
4800 ID(mov); W(); DR(AX); SM(None, IMMU(2));
4801
4802
4803 }
4804 break;
4805 case 0xb0:
4806 {
4807 /** 1011 0000 dec %e!0 */
4808 if (trace)
4809 {
4810 printf ("\033[33m%s\033[0m %02x\n",
4811 "/** 1011 0000 dec %e!0 */",
4812 op[0]);
4813 }
4814 SYNTAX("dec %e!0");
4815 #line 548 "rl78-decode.opc"
4816 ID(sub); DM(None, IMMU(2)); SC(1); Fza;
4817
4818 }
4819 break;
4820 case 0xb1:
4821 case 0xb3:
4822 case 0xb5:
4823 case 0xb7:
4824 {
4825 /** 1011 0rg1 decw %0 */
4826 #line 568 "rl78-decode.opc"
4827 int rg AU = (op[0] >> 1) & 0x03;
4828 if (trace)
4829 {
4830 printf ("\033[33m%s\033[0m %02x\n",
4831 "/** 1011 0rg1 decw %0 */",
4832 op[0]);
4833 printf (" rg = 0x%x\n", rg);
4834 }
4835 SYNTAX("decw %0");
4836 #line 568 "rl78-decode.opc"
4837 ID(sub); W(); DRW(rg); SC(1);
4838
4839 }
4840 break;
4841 case 0xb2:
4842 {
4843 /** 1011 0010 decw %e!0 */
4844 if (trace)
4845 {
4846 printf ("\033[33m%s\033[0m %02x\n",
4847 "/** 1011 0010 decw %e!0 */",
4848 op[0]);
4849 }
4850 SYNTAX("decw %e!0");
4851 #line 562 "rl78-decode.opc"
4852 ID(sub); W(); DM(None, IMMU(2)); SC(1);
4853
4854 }
4855 break;
4856 case 0xb4:
4857 {
4858 /** 1011 0100 dec %0 */
4859 if (trace)
4860 {
4861 printf ("\033[33m%s\033[0m %02x\n",
4862 "/** 1011 0100 dec %0 */",
4863 op[0]);
4864 }
4865 SYNTAX("dec %0");
4866 #line 557 "rl78-decode.opc"
4867 ID(sub); DM(None, SADDR); SC(1); Fza;
4868
4869 /*----------------------------------------------------------------------*/
4870
4871 }
4872 break;
4873 case 0xb6:
4874 {
4875 /** 1011 0110 decw %0 */
4876 if (trace)
4877 {
4878 printf ("\033[33m%s\033[0m %02x\n",
4879 "/** 1011 0110 decw %0 */",
4880 op[0]);
4881 }
4882 SYNTAX("decw %0");
4883 #line 571 "rl78-decode.opc"
4884 ID(sub); W(); DM(None, SADDR); SC(1);
4885
4886 /*----------------------------------------------------------------------*/
4887
4888 }
4889 break;
4890 case 0xb8:
4891 {
4892 /** 1011 1000 movw %a0, %1 */
4893 if (trace)
4894 {
4895 printf ("\033[33m%s\033[0m %02x\n",
4896 "/** 1011 1000 movw %a0, %1 */",
4897 op[0]);
4898 }
4899 SYNTAX("movw %a0, %1");
4900 #line 831 "rl78-decode.opc"
4901 ID(mov); W(); DM(SP, IMMU(1)); SR(AX);
4902
4903 }
4904 break;
4905 case 0xb9:
4906 {
4907 /** 1011 1001 movw %e0, %1 */
4908 if (trace)
4909 {
4910 printf ("\033[33m%s\033[0m %02x\n",
4911 "/** 1011 1001 movw %e0, %1 */",
4912 op[0]);
4913 }
4914 SYNTAX("movw %e0, %1");
4915 #line 819 "rl78-decode.opc"
4916 ID(mov); W(); DM(DE, 0); SR(AX);
4917
4918 }
4919 break;
4920 case 0xba:
4921 {
4922 /** 1011 1010 movw %ea0, %1 */
4923 if (trace)
4924 {
4925 printf ("\033[33m%s\033[0m %02x\n",
4926 "/** 1011 1010 movw %ea0, %1 */",
4927 op[0]);
4928 }
4929 SYNTAX("movw %ea0, %1");
4930 #line 822 "rl78-decode.opc"
4931 ID(mov); W(); DM(DE, IMMU(1)); SR(AX);
4932
4933 }
4934 break;
4935 case 0xbb:
4936 {
4937 /** 1011 1011 movw %e0, %1 */
4938 if (trace)
4939 {
4940 printf ("\033[33m%s\033[0m %02x\n",
4941 "/** 1011 1011 movw %e0, %1 */",
4942 op[0]);
4943 }
4944 SYNTAX("movw %e0, %1");
4945 #line 825 "rl78-decode.opc"
4946 ID(mov); W(); DM(HL, 0); SR(AX);
4947
4948 }
4949 break;
4950 case 0xbc:
4951 {
4952 /** 1011 1100 movw %ea0, %1 */
4953 if (trace)
4954 {
4955 printf ("\033[33m%s\033[0m %02x\n",
4956 "/** 1011 1100 movw %ea0, %1 */",
4957 op[0]);
4958 }
4959 SYNTAX("movw %ea0, %1");
4960 #line 828 "rl78-decode.opc"
4961 ID(mov); W(); DM(HL, IMMU(1)); SR(AX);
4962
4963 }
4964 break;
4965 case 0xbd:
4966 {
4967 /** 1011 1101 movw %0, %1 */
4968 if (trace)
4969 {
4970 printf ("\033[33m%s\033[0m %02x\n",
4971 "/** 1011 1101 movw %0, %1 */",
4972 op[0]);
4973 }
4974 SYNTAX("movw %0, %1");
4975 #line 895 "rl78-decode.opc"
4976 ID(mov); W(); DM(None, SADDR); SR(AX);
4977
4978 }
4979 break;
4980 case 0xbe:
4981 {
4982 /** 1011 1110 movw %s0, %1 */
4983 if (trace)
4984 {
4985 printf ("\033[33m%s\033[0m %02x\n",
4986 "/** 1011 1110 movw %s0, %1 */",
4987 op[0]);
4988 }
4989 SYNTAX("movw %s0, %1");
4990 #line 901 "rl78-decode.opc"
4991 ID(mov); W(); DM(None, SFR); SR(AX);
4992
4993 /*----------------------------------------------------------------------*/
4994
4995 }
4996 break;
4997 case 0xbf:
4998 {
4999 /** 1011 1111 movw %e!0, %1 */
5000 if (trace)
5001 {
5002 printf ("\033[33m%s\033[0m %02x\n",
5003 "/** 1011 1111 movw %e!0, %1 */",
5004 op[0]);
5005 }
5006 SYNTAX("movw %e!0, %1");
5007 #line 816 "rl78-decode.opc"
5008 ID(mov); W(); DM(None, IMMU(2)); SR(AX);
5009
5010 }
5011 break;
5012 case 0xc0:
5013 case 0xc2:
5014 case 0xc4:
5015 case 0xc6:
5016 {
5017 /** 1100 0rg0 pop %0 */
5018 #line 987 "rl78-decode.opc"
5019 int rg AU = (op[0] >> 1) & 0x03;
5020 if (trace)
5021 {
5022 printf ("\033[33m%s\033[0m %02x\n",
5023 "/** 1100 0rg0 pop %0 */",
5024 op[0]);
5025 printf (" rg = 0x%x\n", rg);
5026 }
5027 SYNTAX("pop %0");
5028 #line 987 "rl78-decode.opc"
5029 ID(mov); W(); DRW(rg); SPOP();
5030
5031 }
5032 break;
5033 case 0xc1:
5034 case 0xc3:
5035 case 0xc5:
5036 case 0xc7:
5037 {
5038 /** 1100 0rg1 push %1 */
5039 #line 995 "rl78-decode.opc"
5040 int rg AU = (op[0] >> 1) & 0x03;
5041 if (trace)
5042 {
5043 printf ("\033[33m%s\033[0m %02x\n",
5044 "/** 1100 0rg1 push %1 */",
5045 op[0]);
5046 printf (" rg = 0x%x\n", rg);
5047 }
5048 SYNTAX("push %1");
5049 #line 995 "rl78-decode.opc"
5050 ID(mov); W(); DPUSH(); SRW(rg);
5051
5052 }
5053 break;
5054 case 0xc8:
5055 {
5056 /** 1100 1000 mov %a0, #%1 */
5057 if (trace)
5058 {
5059 printf ("\033[33m%s\033[0m %02x\n",
5060 "/** 1100 1000 mov %a0, #%1 */",
5061 op[0]);
5062 }
5063 SYNTAX("mov %a0, #%1");
5064 #line 639 "rl78-decode.opc"
5065 ID(mov); DM(SP, IMMU(1)); SC(IMMU(1));
5066
5067 }
5068 break;
5069 case 0xc9:
5070 {
5071 /** 1100 1001 movw %0, #%1 */
5072 if (trace)
5073 {
5074 printf ("\033[33m%s\033[0m %02x\n",
5075 "/** 1100 1001 movw %0, #%1 */",
5076 op[0]);
5077 }
5078 SYNTAX("movw %0, #%1");
5079 #line 892 "rl78-decode.opc"
5080 ID(mov); W(); DM(None, SADDR); SC(IMMU(2));
5081
5082 }
5083 break;
5084 case 0xca:
5085 {
5086 /** 1100 1010 mov %ea0, #%1 */
5087 if (trace)
5088 {
5089 printf ("\033[33m%s\033[0m %02x\n",
5090 "/** 1100 1010 mov %ea0, #%1 */",
5091 op[0]);
5092 }
5093 SYNTAX("mov %ea0, #%1");
5094 #line 618 "rl78-decode.opc"
5095 ID(mov); DM(DE, IMMU(1)); SC(IMMU(1));
5096
5097 }
5098 break;
5099 case 0xcb:
5100 {
5101 /** 1100 1011 movw %s0, #%1 */
5102 if (trace)
5103 {
5104 printf ("\033[33m%s\033[0m %02x\n",
5105 "/** 1100 1011 movw %0, #%1 */",
5106 op[0]);
5107 }
5108 SYNTAX("movw %s0, #%1");
5109 #line 898 "rl78-decode.opc"
5110 ID(mov); W(); DM(None, SFR); SC(IMMU(2));
5111
5112 }
5113 break;
5114 case 0xcc:
5115 {
5116 /** 1100 1100 mov %ea0, #%1 */
5117 if (trace)
5118 {
5119 printf ("\033[33m%s\033[0m %02x\n",
5120 "/** 1100 1100 mov %ea0, #%1 */",
5121 op[0]);
5122 }
5123 SYNTAX("mov %ea0, #%1");
5124 #line 630 "rl78-decode.opc"
5125 ID(mov); DM(HL, IMMU(1)); SC(IMMU(1));
5126
5127 }
5128 break;
5129 case 0xcd:
5130 {
5131 /** 1100 1101 mov %0, #%1 */
5132 if (trace)
5133 {
5134 printf ("\033[33m%s\033[0m %02x\n",
5135 "/** 1100 1101 mov %0, #%1 */",
5136 op[0]);
5137 }
5138 SYNTAX("mov %0, #%1");
5139 #line 744 "rl78-decode.opc"
5140 ID(mov); DM(None, SADDR); SC(IMMU(1));
5141
5142 }
5143 break;
5144 case 0xce:
5145 {
5146 /** 1100 1110 mov %s0, #%1 */
5147 if (trace)
5148 {
5149 printf ("\033[33m%s\033[0m %02x\n",
5150 "/** 1100 1110 mov %s0, #%1 */",
5151 op[0]);
5152 }
5153 SYNTAX("mov %s0, #%1");
5154 #line 750 "rl78-decode.opc"
5155 op0 = SFR;
5156 op1 = IMMU(1);
5157 ID(mov); DM(None, op0); SC(op1);
5158 if (op0 == 0xffffb && isa == RL78_ISA_G14)
5159 switch (op1)
5160 {
5161 case 0x01:
5162 rl78->syntax = "mulhu"; ID(mulhu);
5163 break;
5164 case 0x02:
5165 rl78->syntax = "mulh"; ID(mulh);
5166 break;
5167 case 0x03:
5168 rl78->syntax = "divhu"; ID(divhu);
5169 break;
5170 case 0x04:
5171 rl78->syntax = "divwu <old-encoding>"; ID(divwu);
5172 break;
5173 case 0x05:
5174 rl78->syntax = "machu"; ID(machu);
5175 break;
5176 case 0x06:
5177 rl78->syntax = "mach"; ID(mach);
5178 break;
5179 case 0x0b:
5180 rl78->syntax = "divwu"; ID(divwu);
5181 break;
5182 }
5183
5184 }
5185 break;
5186 case 0xcf:
5187 {
5188 /** 1100 1111 mov %e!0, #%1 */
5189 if (trace)
5190 {
5191 printf ("\033[33m%s\033[0m %02x\n",
5192 "/** 1100 1111 mov %e!0, #%1 */",
5193 op[0]);
5194 }
5195 SYNTAX("mov %e!0, #%1");
5196 #line 609 "rl78-decode.opc"
5197 ID(mov); DM(None, IMMU(2)); SC(IMMU(1));
5198
5199 }
5200 break;
5201 case 0xd0:
5202 case 0xd1:
5203 case 0xd2:
5204 case 0xd3:
5205 {
5206 /** 1101 00rg cmp0 %0 */
5207 #line 518 "rl78-decode.opc"
5208 int rg AU = op[0] & 0x03;
5209 if (trace)
5210 {
5211 printf ("\033[33m%s\033[0m %02x\n",
5212 "/** 1101 00rg cmp0 %0 */",
5213 op[0]);
5214 printf (" rg = 0x%x\n", rg);
5215 }
5216 SYNTAX("cmp0 %0");
5217 #line 518 "rl78-decode.opc"
5218 ID(cmp); DRB(rg); SC(0); Fzac;
5219
5220 }
5221 break;
5222 case 0xd4:
5223 {
5224 /** 1101 0100 cmp0 %0 */
5225 if (trace)
5226 {
5227 printf ("\033[33m%s\033[0m %02x\n",
5228 "/** 1101 0100 cmp0 %0 */",
5229 op[0]);
5230 }
5231 SYNTAX("cmp0 %0");
5232 #line 521 "rl78-decode.opc"
5233 ID(cmp); DM(None, SADDR); SC(0); Fzac;
5234
5235 /*----------------------------------------------------------------------*/
5236
5237 }
5238 break;
5239 case 0xd5:
5240 {
5241 /** 1101 0101 cmp0 %e!0 */
5242 if (trace)
5243 {
5244 printf ("\033[33m%s\033[0m %02x\n",
5245 "/** 1101 0101 cmp0 %e!0 */",
5246 op[0]);
5247 }
5248 SYNTAX("cmp0 %e!0");
5249 #line 515 "rl78-decode.opc"
5250 ID(cmp); DM(None, IMMU(2)); SC(0); Fzac;
5251
5252 }
5253 break;
5254 case 0xd6:
5255 {
5256 /** 1101 0110 mulu x */
5257 if (trace)
5258 {
5259 printf ("\033[33m%s\033[0m %02x\n",
5260 "/** 1101 0110 mulu x */",
5261 op[0]);
5262 }
5263 SYNTAX("mulu x");
5264 #line 906 "rl78-decode.opc"
5265 if (isa == RL78_ISA_G14)
5266 ID(mulu);
5267
5268 /*----------------------------------------------------------------------*/
5269
5270 }
5271 break;
5272 case 0xd7:
5273 {
5274 /** 1101 0111 ret */
5275 if (trace)
5276 {
5277 printf ("\033[33m%s\033[0m %02x\n",
5278 "/** 1101 0111 ret */",
5279 op[0]);
5280 }
5281 SYNTAX("ret");
5282 #line 1003 "rl78-decode.opc"
5283 ID(ret);
5284
5285 }
5286 break;
5287 case 0xd8:
5288 {
5289 /** 1101 1000 mov %0, %1 */
5290 if (trace)
5291 {
5292 printf ("\033[33m%s\033[0m %02x\n",
5293 "/** 1101 1000 mov %0, %1 */",
5294 op[0]);
5295 }
5296 SYNTAX("mov %0, %1");
5297 #line 711 "rl78-decode.opc"
5298 ID(mov); DR(X); SM(None, SADDR);
5299
5300 }
5301 break;
5302 case 0xd9:
5303 {
5304 /** 1101 1001 mov %0, %e!1 */
5305 if (trace)
5306 {
5307 printf ("\033[33m%s\033[0m %02x\n",
5308 "/** 1101 1001 mov %0, %e!1 */",
5309 op[0]);
5310 }
5311 SYNTAX("mov %0, %e!1");
5312 #line 708 "rl78-decode.opc"
5313 ID(mov); DR(X); SM(None, IMMU(2));
5314
5315 }
5316 break;
5317 case 0xda:
5318 case 0xea:
5319 case 0xfa:
5320 {
5321 /** 11ra 1010 movw %0, %1 */
5322 #line 889 "rl78-decode.opc"
5323 int ra AU = (op[0] >> 4) & 0x03;
5324 if (trace)
5325 {
5326 printf ("\033[33m%s\033[0m %02x\n",
5327 "/** 11ra 1010 movw %0, %1 */",
5328 op[0]);
5329 printf (" ra = 0x%x\n", ra);
5330 }
5331 SYNTAX("movw %0, %1");
5332 #line 889 "rl78-decode.opc"
5333 ID(mov); W(); DRW(ra); SM(None, SADDR);
5334
5335 }
5336 break;
5337 case 0xdb:
5338 case 0xeb:
5339 case 0xfb:
5340 {
5341 /** 11ra 1011 movw %0, %e!1 */
5342 #line 886 "rl78-decode.opc"
5343 int ra AU = (op[0] >> 4) & 0x03;
5344 if (trace)
5345 {
5346 printf ("\033[33m%s\033[0m %02x\n",
5347 "/** 11ra 1011 movw %0, %e!1 */",
5348 op[0]);
5349 printf (" ra = 0x%x\n", ra);
5350 }
5351 SYNTAX("movw %0, %e!1");
5352 #line 886 "rl78-decode.opc"
5353 ID(mov); W(); DRW(ra); SM(None, IMMU(2));
5354
5355 }
5356 break;
5357 case 0xdc:
5358 {
5359 /** 1101 1100 bc $%a0 */
5360 if (trace)
5361 {
5362 printf ("\033[33m%s\033[0m %02x\n",
5363 "/** 1101 1100 bc $%a0 */",
5364 op[0]);
5365 }
5366 SYNTAX("bc $%a0");
5367 #line 334 "rl78-decode.opc"
5368 ID(branch_cond); DC(pc+IMMS(1)+2); SR(None); COND(C);
5369
5370 }
5371 break;
5372 case 0xdd:
5373 {
5374 /** 1101 1101 bz $%a0 */
5375 if (trace)
5376 {
5377 printf ("\033[33m%s\033[0m %02x\n",
5378 "/** 1101 1101 bz $%a0 */",
5379 op[0]);
5380 }
5381 SYNTAX("bz $%a0");
5382 #line 346 "rl78-decode.opc"
5383 ID(branch_cond); DC(pc+IMMS(1)+2); SR(None); COND(Z);
5384
5385 }
5386 break;
5387 case 0xde:
5388 {
5389 /** 1101 1110 bnc $%a0 */
5390 if (trace)
5391 {
5392 printf ("\033[33m%s\033[0m %02x\n",
5393 "/** 1101 1110 bnc $%a0 */",
5394 op[0]);
5395 }
5396 SYNTAX("bnc $%a0");
5397 #line 337 "rl78-decode.opc"
5398 ID(branch_cond); DC(pc+IMMS(1)+2); SR(None); COND(NC);
5399
5400 }
5401 break;
5402 case 0xdf:
5403 {
5404 /** 1101 1111 bnz $%a0 */
5405 if (trace)
5406 {
5407 printf ("\033[33m%s\033[0m %02x\n",
5408 "/** 1101 1111 bnz $%a0 */",
5409 op[0]);
5410 }
5411 SYNTAX("bnz $%a0");
5412 #line 349 "rl78-decode.opc"
5413 ID(branch_cond); DC(pc+IMMS(1)+2); SR(None); COND(NZ);
5414
5415 /*----------------------------------------------------------------------*/
5416
5417 }
5418 break;
5419 case 0xe0:
5420 case 0xe1:
5421 case 0xe2:
5422 case 0xe3:
5423 {
5424 /** 1110 00rg oneb %0 */
5425 #line 925 "rl78-decode.opc"
5426 int rg AU = op[0] & 0x03;
5427 if (trace)
5428 {
5429 printf ("\033[33m%s\033[0m %02x\n",
5430 "/** 1110 00rg oneb %0 */",
5431 op[0]);
5432 printf (" rg = 0x%x\n", rg);
5433 }
5434 SYNTAX("oneb %0");
5435 #line 925 "rl78-decode.opc"
5436 ID(mov); DRB(rg); SC(1);
5437
5438 }
5439 break;
5440 case 0xe4:
5441 {
5442 /** 1110 0100 oneb %0 */
5443 if (trace)
5444 {
5445 printf ("\033[33m%s\033[0m %02x\n",
5446 "/** 1110 0100 oneb %0 */",
5447 op[0]);
5448 }
5449 SYNTAX("oneb %0");
5450 #line 928 "rl78-decode.opc"
5451 ID(mov); DM(None, SADDR); SC(1);
5452
5453 /*----------------------------------------------------------------------*/
5454
5455 }
5456 break;
5457 case 0xe5:
5458 {
5459 /** 1110 0101 oneb %e!0 */
5460 if (trace)
5461 {
5462 printf ("\033[33m%s\033[0m %02x\n",
5463 "/** 1110 0101 oneb %e!0 */",
5464 op[0]);
5465 }
5466 SYNTAX("oneb %e!0");
5467 #line 922 "rl78-decode.opc"
5468 ID(mov); DM(None, IMMU(2)); SC(1);
5469
5470 }
5471 break;
5472 case 0xe6:
5473 {
5474 /** 1110 0110 onew %0 */
5475 if (trace)
5476 {
5477 printf ("\033[33m%s\033[0m %02x\n",
5478 "/** 1110 0110 onew %0 */",
5479 op[0]);
5480 }
5481 SYNTAX("onew %0");
5482 #line 933 "rl78-decode.opc"
5483 ID(mov); DR(AX); SC(1);
5484
5485 }
5486 break;
5487 case 0xe7:
5488 {
5489 /** 1110 0111 onew %0 */
5490 if (trace)
5491 {
5492 printf ("\033[33m%s\033[0m %02x\n",
5493 "/** 1110 0111 onew %0 */",
5494 op[0]);
5495 }
5496 SYNTAX("onew %0");
5497 #line 936 "rl78-decode.opc"
5498 ID(mov); DR(BC); SC(1);
5499
5500 /*----------------------------------------------------------------------*/
5501
5502 }
5503 break;
5504 case 0xe8:
5505 {
5506 /** 1110 1000 mov %0, %1 */
5507 if (trace)
5508 {
5509 printf ("\033[33m%s\033[0m %02x\n",
5510 "/** 1110 1000 mov %0, %1 */",
5511 op[0]);
5512 }
5513 SYNTAX("mov %0, %1");
5514 #line 699 "rl78-decode.opc"
5515 ID(mov); DR(B); SM(None, SADDR);
5516
5517 }
5518 break;
5519 case 0xe9:
5520 {
5521 /** 1110 1001 mov %0, %e!1 */
5522 if (trace)
5523 {
5524 printf ("\033[33m%s\033[0m %02x\n",
5525 "/** 1110 1001 mov %0, %e!1 */",
5526 op[0]);
5527 }
5528 SYNTAX("mov %0, %e!1");
5529 #line 693 "rl78-decode.opc"
5530 ID(mov); DR(B); SM(None, IMMU(2));
5531
5532 }
5533 break;
5534 case 0xec:
5535 {
5536 /** 1110 1100 br !%!a0 */
5537 if (trace)
5538 {
5539 printf ("\033[33m%s\033[0m %02x\n",
5540 "/** 1110 1100 br !%!a0 */",
5541 op[0]);
5542 }
5543 SYNTAX("br !%!a0");
5544 #line 368 "rl78-decode.opc"
5545 ID(branch); DC(IMMU(3));
5546
5547 }
5548 break;
5549 case 0xed:
5550 {
5551 /** 1110 1101 br %!a0 */
5552 if (trace)
5553 {
5554 printf ("\033[33m%s\033[0m %02x\n",
5555 "/** 1110 1101 br %!a0 */",
5556 op[0]);
5557 }
5558 SYNTAX("br %!a0");
5559 #line 371 "rl78-decode.opc"
5560 ID(branch); DC(IMMU(2));
5561
5562 }
5563 break;
5564 case 0xee:
5565 {
5566 /** 1110 1110 br $%!a0 */
5567 if (trace)
5568 {
5569 printf ("\033[33m%s\033[0m %02x\n",
5570 "/** 1110 1110 br $%!a0 */",
5571 op[0]);
5572 }
5573 SYNTAX("br $%!a0");
5574 #line 374 "rl78-decode.opc"
5575 ID(branch); DC(pc+IMMS(2)+3);
5576
5577 }
5578 break;
5579 case 0xef:
5580 {
5581 /** 1110 1111 br $%a0 */
5582 if (trace)
5583 {
5584 printf ("\033[33m%s\033[0m %02x\n",
5585 "/** 1110 1111 br $%a0 */",
5586 op[0]);
5587 }
5588 SYNTAX("br $%a0");
5589 #line 377 "rl78-decode.opc"
5590 ID(branch); DC(pc+IMMS(1)+2);
5591
5592 }
5593 break;
5594 case 0xf0:
5595 case 0xf1:
5596 case 0xf2:
5597 case 0xf3:
5598 {
5599 /** 1111 00rg clrb %0 */
5600 #line 464 "rl78-decode.opc"
5601 int rg AU = op[0] & 0x03;
5602 if (trace)
5603 {
5604 printf ("\033[33m%s\033[0m %02x\n",
5605 "/** 1111 00rg clrb %0 */",
5606 op[0]);
5607 printf (" rg = 0x%x\n", rg);
5608 }
5609 SYNTAX("clrb %0");
5610 #line 464 "rl78-decode.opc"
5611 ID(mov); DRB(rg); SC(0);
5612
5613 }
5614 break;
5615 case 0xf4:
5616 {
5617 /** 1111 0100 clrb %0 */
5618 if (trace)
5619 {
5620 printf ("\033[33m%s\033[0m %02x\n",
5621 "/** 1111 0100 clrb %0 */",
5622 op[0]);
5623 }
5624 SYNTAX("clrb %0");
5625 #line 467 "rl78-decode.opc"
5626 ID(mov); DM(None, SADDR); SC(0);
5627
5628 /*----------------------------------------------------------------------*/
5629
5630 }
5631 break;
5632 case 0xf5:
5633 {
5634 /** 1111 0101 clrb %e!0 */
5635 if (trace)
5636 {
5637 printf ("\033[33m%s\033[0m %02x\n",
5638 "/** 1111 0101 clrb %e!0 */",
5639 op[0]);
5640 }
5641 SYNTAX("clrb %e!0");
5642 #line 461 "rl78-decode.opc"
5643 ID(mov); DM(None, IMMU(2)); SC(0);
5644
5645 }
5646 break;
5647 case 0xf6:
5648 {
5649 /** 1111 0110 clrw %0 */
5650 if (trace)
5651 {
5652 printf ("\033[33m%s\033[0m %02x\n",
5653 "/** 1111 0110 clrw %0 */",
5654 op[0]);
5655 }
5656 SYNTAX("clrw %0");
5657 #line 472 "rl78-decode.opc"
5658 ID(mov); DR(AX); SC(0);
5659
5660 }
5661 break;
5662 case 0xf7:
5663 {
5664 /** 1111 0111 clrw %0 */
5665 if (trace)
5666 {
5667 printf ("\033[33m%s\033[0m %02x\n",
5668 "/** 1111 0111 clrw %0 */",
5669 op[0]);
5670 }
5671 SYNTAX("clrw %0");
5672 #line 475 "rl78-decode.opc"
5673 ID(mov); DR(BC); SC(0);
5674
5675 /*----------------------------------------------------------------------*/
5676
5677 }
5678 break;
5679 case 0xf8:
5680 {
5681 /** 1111 1000 mov %0, %1 */
5682 if (trace)
5683 {
5684 printf ("\033[33m%s\033[0m %02x\n",
5685 "/** 1111 1000 mov %0, %1 */",
5686 op[0]);
5687 }
5688 SYNTAX("mov %0, %1");
5689 #line 705 "rl78-decode.opc"
5690 ID(mov); DR(C); SM(None, SADDR);
5691
5692 }
5693 break;
5694 case 0xf9:
5695 {
5696 /** 1111 1001 mov %0, %e!1 */
5697 if (trace)
5698 {
5699 printf ("\033[33m%s\033[0m %02x\n",
5700 "/** 1111 1001 mov %0, %e!1 */",
5701 op[0]);
5702 }
5703 SYNTAX("mov %0, %e!1");
5704 #line 702 "rl78-decode.opc"
5705 ID(mov); DR(C); SM(None, IMMU(2));
5706
5707 }
5708 break;
5709 case 0xfc:
5710 {
5711 /** 1111 1100 call !%!a0 */
5712 if (trace)
5713 {
5714 printf ("\033[33m%s\033[0m %02x\n",
5715 "/** 1111 1100 call !%!a0 */",
5716 op[0]);
5717 }
5718 SYNTAX("call !%!a0");
5719 #line 421 "rl78-decode.opc"
5720 ID(call); DC(IMMU(3));
5721
5722 }
5723 break;
5724 case 0xfd:
5725 {
5726 /** 1111 1101 call %!a0 */
5727 if (trace)
5728 {
5729 printf ("\033[33m%s\033[0m %02x\n",
5730 "/** 1111 1101 call %!a0 */",
5731 op[0]);
5732 }
5733 SYNTAX("call %!a0");
5734 #line 424 "rl78-decode.opc"
5735 ID(call); DC(IMMU(2));
5736
5737 }
5738 break;
5739 case 0xfe:
5740 {
5741 /** 1111 1110 call $%!a0 */
5742 if (trace)
5743 {
5744 printf ("\033[33m%s\033[0m %02x\n",
5745 "/** 1111 1110 call $%!a0 */",
5746 op[0]);
5747 }
5748 SYNTAX("call $%!a0");
5749 #line 427 "rl78-decode.opc"
5750 ID(call); DC(pc+IMMS(2)+3);
5751
5752 }
5753 break;
5754 case 0xff:
5755 {
5756 /** 1111 1111 brk1 */
5757 if (trace)
5758 {
5759 printf ("\033[33m%s\033[0m %02x\n",
5760 "/** 1111 1111 brk1 */",
5761 op[0]);
5762 }
5763 SYNTAX("brk1");
5764 #line 385 "rl78-decode.opc"
5765 ID(break);
5766
5767 }
5768 break;
5769 }
5770 #line 1291 "rl78-decode.opc"
5771
5772 return rl78->n_bytes;
5773 }
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