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Add failfast support.
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1 /*
2 * Intel(R) Matrix Storage Manager hardware and firmware support routines
3 *
4 * Copyright (C) 2008 Intel Corporation
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms and conditions of the GNU General Public License,
8 * version 2, as published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 * more details.
14 *
15 * You should have received a copy of the GNU General Public License along with
16 * this program; if not, write to the Free Software Foundation, Inc.,
17 * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
18 */
19 #include <asm/types.h>
20 #include <strings.h>
21
22 /* The IMSM Capability (IMSM AHCI and ISCU OROM/EFI variable) Version Table definition */
23 struct imsm_orom {
24 __u8 signature[4];
25 #define IMSM_OROM_SIGNATURE "$VER"
26 #define IMSM_NVME_OROM_COMPAT_SIGNATURE "$NVM"
27 __u8 table_ver_major; /* Currently 2 (can change with future revs) */
28 __u8 table_ver_minor; /* Currently 2 (can change with future revs) */
29 __u16 major_ver; /* Example: 8 as in 8.6.0.1020 */
30 __u16 minor_ver; /* Example: 6 as in 8.6.0.1020 */
31 __u16 hotfix_ver; /* Example: 0 as in 8.6.0.1020 */
32 __u16 build; /* Example: 1020 as in 8.6.0.1020 */
33 __u8 len; /* number of bytes in this entire table */
34 __u8 checksum; /* checksum of all the bytes in this table */
35 __u16 rlc; /* RAID Level Capability */
36 /* we assume the cpu is x86 as the orom should not be found
37 * anywhere else
38 */
39 #define IMSM_OROM_RLC_RAID0 (1 << 0)
40 #define IMSM_OROM_RLC_RAID1 (1 << 1)
41 #define IMSM_OROM_RLC_RAID10 (1 << 2)
42 #define IMSM_OROM_RLC_RAID1E (1 << 3)
43 #define IMSM_OROM_RLC_RAID5 (1 << 4)
44 #define IMSM_OROM_RLC_RAID_CNG (1 << 5)
45 __u16 sss; /* Strip Size Supported */
46 #define IMSM_OROM_SSS_2kB (1 << 0)
47 #define IMSM_OROM_SSS_4kB (1 << 1)
48 #define IMSM_OROM_SSS_8kB (1 << 2)
49 #define IMSM_OROM_SSS_16kB (1 << 3)
50 #define IMSM_OROM_SSS_32kB (1 << 4)
51 #define IMSM_OROM_SSS_64kB (1 << 5)
52 #define IMSM_OROM_SSS_128kB (1 << 6)
53 #define IMSM_OROM_SSS_256kB (1 << 7)
54 #define IMSM_OROM_SSS_512kB (1 << 8)
55 #define IMSM_OROM_SSS_1MB (1 << 9)
56 #define IMSM_OROM_SSS_2MB (1 << 10)
57 #define IMSM_OROM_SSS_4MB (1 << 11)
58 #define IMSM_OROM_SSS_8MB (1 << 12)
59 #define IMSM_OROM_SSS_16MB (1 << 13)
60 #define IMSM_OROM_SSS_32MB (1 << 14)
61 #define IMSM_OROM_SSS_64MB (1 << 15)
62 __u16 dpa; /* Disks Per Array supported */
63 #define IMSM_OROM_DISKS_PER_ARRAY 6
64 #define IMSM_OROM_DISKS_PER_ARRAY_NVME 12
65 __u16 tds; /* Total Disks Supported */
66 #define IMSM_OROM_TOTAL_DISKS 6
67 #define IMSM_OROM_TOTAL_DISKS_NVME 12
68 __u8 vpa; /* # Volumes Per Array supported */
69 #define IMSM_OROM_VOLUMES_PER_ARRAY 2
70 __u8 vphba; /* # Volumes Per Host Bus Adapter supported */
71 #define IMSM_OROM_VOLUMES_PER_HBA 4
72 #define IMSM_OROM_VOLUMES_PER_HBA_NVME 4
73 /* Attributes supported. This should map to the
74 * attributes in the MPB. Also, lower 16 bits
75 * should match/duplicate RLC bits above.
76 */
77 __u32 attr;
78 #define IMSM_OROM_ATTR_RAID0 IMSM_OROM_RLC_RAID0
79 #define IMSM_OROM_ATTR_RAID1 IMSM_OROM_RLC_RAID1
80 #define IMSM_OROM_ATTR_RAID10 IMSM_OROM_RLC_RAID10
81 #define IMSM_OROM_ATTR_RAID1E IMSM_OROM_RLC_RAID1E
82 #define IMSM_OROM_ATTR_RAID5 IMSM_OROM_RLC_RAID5
83 #define IMSM_OROM_ATTR_RAID_CNG IMSM_OROM_RLC_RAID_CNG
84 #define IMSM_OROM_ATTR_2TB_DISK (1 << 26)
85 #define IMSM_OROM_ATTR_2TB (1 << 29)
86 #define IMSM_OROM_ATTR_PM (1 << 30)
87 #define IMSM_OROM_ATTR_ChecksumVerify (1 << 31)
88 __u32 capabilities;
89 #define IMSM_OROM_CAPABILITIES_Ext_SATA (1 << 0)
90 #define IMSM_OROM_CAPABILITIES_TurboMemory (1 << 1)
91 #define IMSM_OROM_CAPABILITIES_HddPassword (1 << 2)
92 #define IMSM_OROM_CAPABILITIES_DiskCoercion (1 << 3)
93 __u32 driver_features;
94 #define IMSM_OROM_CAPABILITIES_HDDUnlock (1 << 0)
95 #define IMSM_OROM_CAPABILITIES_LEDLoc (1 << 1)
96 #define IMSM_OROM_CAPABILITIES_EnterpriseSystem (1 << 2)
97 #define IMSM_OROM_CAPABILITIES_Zpodd (1 << 3)
98 #define IMSM_OROM_CAPABILITIES_LargeDramCache (1 << 4)
99 #define IMSM_OROM_CAPABILITIES_Rohi (1 << 5)
100 #define IMSM_OROM_CAPABILITIES_ReadPatrol (1 << 6)
101 #define IMSM_OROM_CAPABILITIES_XorHw (1 << 7)
102 } __attribute__((packed));
103
104 static inline int imsm_orom_has_raid0(const struct imsm_orom *orom)
105 {
106 return !!(orom->rlc & IMSM_OROM_RLC_RAID0);
107 }
108 static inline int imsm_orom_has_raid1(const struct imsm_orom *orom)
109 {
110 return !!(orom->rlc & IMSM_OROM_RLC_RAID1);
111 }
112 static inline int imsm_orom_has_raid1e(const struct imsm_orom *orom)
113 {
114 return !!(orom->rlc & IMSM_OROM_RLC_RAID1E);
115 }
116 static inline int imsm_orom_has_raid10(const struct imsm_orom *orom)
117 {
118 return !!(orom->rlc & IMSM_OROM_RLC_RAID10);
119 }
120 static inline int imsm_orom_has_raid5(const struct imsm_orom *orom)
121 {
122 return !!(orom->rlc & IMSM_OROM_RLC_RAID5);
123 }
124
125 /**
126 * imsm_orom_has_chunk - check if the orom supports the given chunk size
127 * @orom: orom pointer from find_imsm_orom
128 * @chunk: chunk size in kibibytes
129 */
130 static inline int imsm_orom_has_chunk(const struct imsm_orom *orom, int chunk)
131 {
132 int fs = ffs(chunk);
133 if (!fs)
134 return 0;
135 fs--; /* bit num to bit index */
136 if (chunk & (chunk-1))
137 return 0; /* not a power of 2 */
138 return !!(orom->sss & (1 << (fs - 1)));
139 }
140
141 /**
142 * fls - find last (most-significant) bit set
143 * @x: the word to search
144 * The funciton is borrowed from Linux kernel code
145 * include/asm-generic/bitops/fls.h
146 */
147 static inline int fls(int x)
148 {
149 int r = 32;
150
151 if (!x)
152 return 0;
153 if (!(x & 0xffff0000u)) {
154 x <<= 16;
155 r -= 16;
156 }
157 if (!(x & 0xff000000u)) {
158 x <<= 8;
159 r -= 8;
160 }
161 if (!(x & 0xf0000000u)) {
162 x <<= 4;
163 r -= 4;
164 }
165 if (!(x & 0xc0000000u)) {
166 x <<= 2;
167 r -= 2;
168 }
169 if (!(x & 0x80000000u)) {
170 x <<= 1;
171 r -= 1;
172 }
173 return r;
174 }
175
176 static inline int imsm_orom_is_enterprise(const struct imsm_orom *orom)
177 {
178 return !!(orom->driver_features & IMSM_OROM_CAPABILITIES_EnterpriseSystem);
179 }
180
181 static inline int imsm_orom_is_nvme(const struct imsm_orom *orom)
182 {
183 return memcmp(orom->signature, IMSM_NVME_OROM_COMPAT_SIGNATURE,
184 sizeof(orom->signature)) == 0;
185 }
186
187 enum sys_dev_type {
188 SYS_DEV_UNKNOWN = 0,
189 SYS_DEV_SAS,
190 SYS_DEV_SATA,
191 SYS_DEV_NVME,
192 SYS_DEV_VMD,
193 SYS_DEV_MAX
194 };
195
196 struct sys_dev {
197 enum sys_dev_type type;
198 char *path;
199 char *pci_id;
200 __u16 dev_id;
201 __u32 class;
202 struct sys_dev *next;
203 };
204
205 struct efi_guid {
206 __u8 b[16];
207 };
208
209 struct devid_list {
210 __u16 devid;
211 struct devid_list *next;
212 };
213
214 struct orom_entry {
215 struct imsm_orom orom;
216 struct devid_list *devid_list;
217 enum sys_dev_type type;
218 struct orom_entry *next;
219 };
220
221 extern struct orom_entry *orom_entries;
222
223 static inline char *guid_str(char *buf, struct efi_guid guid)
224 {
225 sprintf(buf, "%02x%02x%02x%02x-%02x%02x-%02x%02x-%02x%02x-%02x%02x%02x%02x%02x%02x",
226 guid.b[3], guid.b[2], guid.b[1], guid.b[0],
227 guid.b[5], guid.b[4], guid.b[7], guid.b[6],
228 guid.b[8], guid.b[9], guid.b[10], guid.b[11],
229 guid.b[12], guid.b[13], guid.b[14], guid.b[15]);
230 return buf;
231 }
232
233 char *diskfd_to_devpath(int fd);
234 __u16 devpath_to_vendor(const char *dev_path);
235 struct sys_dev *find_driver_devices(const char *bus, const char *driver);
236 struct sys_dev *find_intel_devices(void);
237 const struct imsm_orom *find_imsm_capability(struct sys_dev *hba);
238 const struct imsm_orom *find_imsm_orom(void);
239 int disk_attached_to_hba(int fd, const char *hba_path);
240 int devt_attached_to_hba(dev_t dev, const char *hba_path);
241 char *devt_to_devpath(dev_t dev);
242 int path_attached_to_hba(const char *disk_path, const char *hba_path);
243 const char *get_sys_dev_type(enum sys_dev_type);
244 const struct orom_entry *get_orom_entry_by_device_id(__u16 dev_id);
245 const struct imsm_orom *get_orom_by_device_id(__u16 device_id);
246 struct sys_dev *device_by_id(__u16 device_id);
247 char *vmd_domain_to_controller(struct sys_dev *hba, char *buf);