1 # Makefile.in generated by automake 1.15.1 from Makefile.am.
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= d10v
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434 @SIM_ENABLE_ARCH_erc32_TRUE@
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$(am__DEPENDENCIES_1
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548 ppc_psim_SOURCES
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$(OBJEXT
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$(OBJEXT
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$(OBJEXT
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609 AM_V_P
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613 AM_V_GEN
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= @REPORT_BUGS_TEXI@
1098 REPORT_BUGS_TO
= @REPORT_BUGS_TO@
1099 SDL_CFLAGS
= @SDL_CFLAGS@
1100 SDL_LIBS
= @SDL_LIBS@
1102 SET_MAKE
= @SET_MAKE@
1104 SIM_COMMON_BUILD_FALSE
= @SIM_COMMON_BUILD_FALSE@
1105 SIM_COMMON_BUILD_TRUE
= @SIM_COMMON_BUILD_TRUE@
1106 SIM_ENABLED_ARCHES
= @SIM_ENABLED_ARCHES@
1107 SIM_FRV_TRAPDUMP_FLAGS
= @SIM_FRV_TRAPDUMP_FLAGS@
1108 SIM_HW_CFLAGS
= @SIM_HW_CFLAGS@
1109 SIM_HW_SOCKSER
= @SIM_HW_SOCKSER@
1110 SIM_INLINE
= @SIM_INLINE@
1111 SIM_MIPS_BITSIZE
= @SIM_MIPS_BITSIZE@
1112 SIM_MIPS_FPU_BITSIZE
= @SIM_MIPS_FPU_BITSIZE@
1113 SIM_MIPS_GEN
= @SIM_MIPS_GEN@
1114 SIM_MIPS_IGEN_FLAGS
= @SIM_MIPS_IGEN_FLAGS@
1115 SIM_MIPS_M16_FLAGS
= @SIM_MIPS_M16_FLAGS@
1116 SIM_MIPS_MICROMIPS16_FLAGS
= @SIM_MIPS_MICROMIPS16_FLAGS@
1117 SIM_MIPS_MICROMIPS_FLAGS
= @SIM_MIPS_MICROMIPS_FLAGS@
1118 SIM_MIPS_MULTI_FLAGS
= @SIM_MIPS_MULTI_FLAGS@
1119 SIM_MIPS_MULTI_IGEN_CONFIGS
= @SIM_MIPS_MULTI_IGEN_CONFIGS@
1120 SIM_MIPS_MULTI_OBJ
= @SIM_MIPS_MULTI_OBJ@
1121 SIM_MIPS_MULTI_SRC
= @SIM_MIPS_MULTI_SRC@
1122 SIM_MIPS_SUBTARGET
= @SIM_MIPS_SUBTARGET@
1123 SIM_PRIMARY_TARGET
= @SIM_PRIMARY_TARGET@
1124 SIM_RISCV_BITSIZE
= @SIM_RISCV_BITSIZE@
1125 SIM_RX_CYCLE_ACCURATE_FLAGS
= @SIM_RX_CYCLE_ACCURATE_FLAGS@
1126 SIM_SUBDIRS
= @SIM_SUBDIRS@
1127 SIM_TOOLCHAIN_VARS
= @SIM_TOOLCHAIN_VARS@
1129 TERMCAP_LIB
= @TERMCAP_LIB@
1131 WARN_CFLAGS
= @WARN_CFLAGS@
1132 WERROR_CFLAGS
= @WERROR_CFLAGS@
1133 abs_builddir
= @abs_builddir@
1134 abs_srcdir
= @abs_srcdir@
1135 abs_top_builddir
= @abs_top_builddir@
1136 abs_top_srcdir
= @abs_top_srcdir@
1137 ac_ct_CC
= @ac_ct_CC@
1138 ac_ct_DUMPBIN
= @ac_ct_DUMPBIN@
1139 am__include
= @am__include@
1140 am__leading_dot
= @am__leading_dot@
1141 am__quote
= @am__quote@
1143 am__untar
= @am__untar@
1146 build_alias
= @build_alias@
1147 build_cpu
= @build_cpu@
1148 build_os
= @build_os@
1149 build_vendor
= @build_vendor@
1150 builddir
= @builddir@
1154 datarootdir
= @datarootdir@
1157 exec_prefix = @
exec_prefix@
1159 host_alias
= @host_alias@
1160 host_cpu
= @host_cpu@
1162 host_vendor
= @host_vendor@
1164 include_makefile
= @include_makefile@
1165 includedir = @
includedir@
1167 install_sh
= @install_sh@
1169 libexecdir
= @libexecdir@
1170 localedir
= @localedir@
1171 localstatedir
= @localstatedir@
1174 oldincludedir = @
oldincludedir@
1177 program_transform_name
= @program_transform_name@
1180 sharedstatedir
= @sharedstatedir@
1181 sim_bitsize
= @sim_bitsize@
1182 sim_float
= @sim_float@
1185 sysconfdir
= @sysconfdir@
1187 target_alias
= @target_alias@
1188 target_cpu
= @target_cpu@
1189 target_os
= @target_os@
1190 target_vendor
= @target_vendor@
1191 top_build_prefix
= @top_build_prefix@
1192 top_builddir
= @top_builddir@
1193 top_srcdir
= @top_srcdir@
1194 AUTOMAKE_OPTIONS
= dejagnu foreign no-dist subdir-objects
1195 ACLOCAL_AMFLAGS
= -Im4
-I..
-I..
/config
1196 GNULIB_PARENT_DIR
= ..
1197 srccom
= $(srcdir)/common
1198 srcroot
= $(srcdir)/..
1199 SUBDIRS
= @subdirs@
$(SIM_SUBDIRS
)
1200 AM_MAKEFLAGS
= SIM_NEW_COMMON_OBJS_
="$(SIM_NEW_COMMON_OBJS)" \
1201 $(am__append_3
) $(am__append_12
) $(am__append_21
) \
1202 $(am__append_42
) $(am__append_50
) $(am__append_54
) \
1203 $(am__append_62
) $(am__append_64
)
1204 pkginclude_HEADERS
= $(am__append_1
)
1205 noinst_LIBRARIES
= $(SIM_COMMON_LIB
) $(am__append_5
)
1206 CLEANFILES
= common
/version.c common
/version.c-stamp \
1207 testsuite
/common
/bits-gen testsuite
/common
/bits32m0.c \
1208 testsuite
/common
/bits32m31.c testsuite
/common
/bits64m0.c \
1209 testsuite
/common
/bits64m63.c
1211 MOSTLYCLEANFILES
= core
$(common_HW_CONFIG_H_TARGETS
) $(patsubst \
1212 %,%/stamp-hw
,$(SIM_ENABLED_ARCHES
)) $(am__append_7
) \
1213 site-sim-config.exp testrun.log testrun.sum
$(am__append_15
) \
1214 $(am__append_19
) $(am__append_24
) $(am__append_28
) \
1215 $(am__append_35
) $(am__append_40
) $(am__append_44
) \
1216 $(am__append_48
) $(am__append_52
) $(am__append_57
) \
1217 $(am__append_66
) $(am__append_71
) $(am__append_80
) \
1219 AM_CFLAGS
= $(WERROR_CFLAGS
) $(WARN_CFLAGS
)
1220 AM_CPPFLAGS
= $(INCGNU
) -I
$(srcroot
)/include -I..
/bfd
-I.. \
1221 $(SIM_HW_CFLAGS
) $(SIM_INLINE
) -I
$(srcdir)/common \
1223 AM_CPPFLAGS_FOR_BUILD
= -I
$(srcroot
)/include $(SIM_HW_CFLAGS
) \
1224 $(SIM_INLINE
) -I
$(srcdir)/common
1225 COMPILE_FOR_BUILD
= $(CC_FOR_BUILD
) $(AM_CPPFLAGS_FOR_BUILD
) $(CPPFLAGS_FOR_BUILD
) $(CFLAGS_FOR_BUILD
)
1226 LINK_FOR_BUILD
= $(CC_FOR_BUILD
) $(CFLAGS_FOR_BUILD
) $(LDFLAGS_FOR_BUILD
) -o
$@
1227 SIM_ALL_RECURSIVE_DEPS
= common
/libcommon.a \
1228 $(common_HW_CONFIG_H_TARGETS
) $(am__append_4
) $(am__append_14
) \
1229 $(am__append_17
) $(am__append_23
) $(am__append_26
) \
1230 $(am__append_34
) $(am__append_39
) $(am__append_43
) \
1231 $(am__append_46
) $(am__append_51
) $(am__append_55
) \
1232 $(am__append_61
) $(am__append_65
) $(am__append_70
) \
1233 $(am__append_78
) $(am__append_82
)
1234 SIM_INSTALL_DATA_LOCAL_DEPS
=
1235 SIM_INSTALL_EXEC_LOCAL_DEPS
= $(am__append_30
)
1236 SIM_UNINSTALL_LOCAL_DEPS
= $(am__append_31
)
1237 SIM_COMMON_LIB
= common
/libcommon.a
1238 common_libcommon_a_SOURCES
= \
1240 common
/portability.c \
1243 common
/target-newlib-errno.c \
1244 common
/target-newlib-open.c \
1245 common
/target-newlib-signal.c \
1246 common
/target-newlib-syscall.c \
1249 SIM_COMMON_HW_OBJS
= \
1261 SIM_NEW_COMMON_OBJS
= sim-arange.o sim-bits.o sim-close.o \
1262 sim-command.o sim-config.o sim-core.o sim-cpu.o sim-endian.o \
1263 sim-engine.o sim-events.o sim-fpu.o sim-hload.o sim-hrw.o \
1264 sim-io.o sim-info.o sim-memopt.o sim-model.o sim-module.o \
1265 sim-options.o sim-profile.o sim-reason.o sim-reg.o \
1266 sim-signal.o sim-stop.o sim-syscall.o sim-trace.o sim-utils.o \
1267 sim-watch.o
$(am__append_2
)
1268 SIM_HW_DEVICES
= cfi core pal glue
1269 common_HW_CONFIG_H_TARGETS
= $(patsubst %,%/hw-config.h
,$(SIM_ENABLED_ARCHES
))
1270 LIBIBERTY_LIB
= ..
/libiberty
/libiberty.a
1271 BFD_LIB
= ..
/bfd
/libbfd.la
1272 OPCODES_LIB
= ..
/opcodes
/libopcodes.la
1279 $(LIBGNU_EXTRA_LIBS
)
1282 # igen leaks memory, and therefore makes AddressSanitizer unhappy. Disable
1283 # leak detection while running it.
1284 @SIM_ENABLE_IGEN_TRUE@IGEN
= igen
/igen
$(EXEEXT
)
1285 @SIM_ENABLE_IGEN_TRUE@IGEN_RUN
= ASAN_OPTIONS
=detect_leaks
=0 $(IGEN
)
1286 @SIM_ENABLE_IGEN_TRUE@igen_libigen_a_SOURCES
= \
1287 @SIM_ENABLE_IGEN_TRUE@ igen
/table.c \
1288 @SIM_ENABLE_IGEN_TRUE@ igen
/lf.c \
1289 @SIM_ENABLE_IGEN_TRUE@ igen
/misc.c \
1290 @SIM_ENABLE_IGEN_TRUE@ igen
/filter_host.c \
1291 @SIM_ENABLE_IGEN_TRUE@ igen
/ld-decode.c \
1292 @SIM_ENABLE_IGEN_TRUE@ igen
/ld-cache.c \
1293 @SIM_ENABLE_IGEN_TRUE@ igen
/filter.c \
1294 @SIM_ENABLE_IGEN_TRUE@ igen
/ld-insn.c \
1295 @SIM_ENABLE_IGEN_TRUE@ igen
/gen-model.c \
1296 @SIM_ENABLE_IGEN_TRUE@ igen
/gen-itable.c \
1297 @SIM_ENABLE_IGEN_TRUE@ igen
/gen-icache.c \
1298 @SIM_ENABLE_IGEN_TRUE@ igen
/gen-semantics.c \
1299 @SIM_ENABLE_IGEN_TRUE@ igen
/gen-idecode.c \
1300 @SIM_ENABLE_IGEN_TRUE@ igen
/gen-support.c \
1301 @SIM_ENABLE_IGEN_TRUE@ igen
/gen-engine.c \
1302 @SIM_ENABLE_IGEN_TRUE@ igen
/gen.c
1304 @SIM_ENABLE_IGEN_TRUE@igen_igen_SOURCES
= igen
/igen.c
1305 @SIM_ENABLE_IGEN_TRUE@igen_igen_LDADD
= igen
/libigen.a
1306 @SIM_ENABLE_IGEN_TRUE@igen_filter_SOURCES
=
1307 @SIM_ENABLE_IGEN_TRUE@igen_filter_LDADD
= igen
/filter-main.o igen
/libigen.a
1308 @SIM_ENABLE_IGEN_TRUE@igen_gen_SOURCES
=
1309 @SIM_ENABLE_IGEN_TRUE@igen_gen_LDADD
= igen
/gen-main.o igen
/libigen.a
1310 @SIM_ENABLE_IGEN_TRUE@igen_ld_cache_SOURCES
=
1311 @SIM_ENABLE_IGEN_TRUE@igen_ld_cache_LDADD
= igen
/ld-cache-main.o igen
/libigen.a
1312 @SIM_ENABLE_IGEN_TRUE@igen_ld_decode_SOURCES
=
1313 @SIM_ENABLE_IGEN_TRUE@igen_ld_decode_LDADD
= igen
/ld-decode-main.o igen
/libigen.a
1314 @SIM_ENABLE_IGEN_TRUE@igen_ld_insn_SOURCES
=
1315 @SIM_ENABLE_IGEN_TRUE@igen_ld_insn_LDADD
= igen
/ld-insn-main.o igen
/libigen.a
1316 @SIM_ENABLE_IGEN_TRUE@igen_table_SOURCES
=
1317 @SIM_ENABLE_IGEN_TRUE@igen_table_LDADD
= igen
/table-main.o igen
/libigen.a
1318 @SIM_ENABLE_IGEN_TRUE@igen_IGEN_TOOLS
= \
1319 @SIM_ENABLE_IGEN_TRUE@
$(IGEN
) \
1320 @SIM_ENABLE_IGEN_TRUE@ igen
/filter \
1321 @SIM_ENABLE_IGEN_TRUE@ igen
/gen \
1322 @SIM_ENABLE_IGEN_TRUE@ igen
/ld-cache \
1323 @SIM_ENABLE_IGEN_TRUE@ igen
/ld-decode \
1324 @SIM_ENABLE_IGEN_TRUE@ igen
/ld-insn \
1325 @SIM_ENABLE_IGEN_TRUE@ igen
/table
1327 EXTRA_DEJAGNU_SITE_CONFIG
= site-sim-config.exp
1329 # Custom verbose test variables that automake doesn't provide (yet?).
1330 AM_V_RUNTEST
= $(AM_V_RUNTEST_@AM_V@
)
1331 AM_V_RUNTEST_
= $(AM_V_RUNTEST_@AM_DEFAULT_V@
)
1332 AM_V_RUNTEST_0
= @echo
" RUNTEST $(RUNTESTFLAGS) $*";
1335 LC_ALL
=C
; export LC_ALL
; \
1336 EXPECT
=${EXPECT} ; export EXPECT
; \
1337 runtest
=$(RUNTEST
); \
1338 $$runtest $(RUNTESTFLAGS
)
1340 testsuite_common_CPPFLAGS
= \
1341 -I
$(srcdir)/common \
1342 -I
$(srcroot
)/include \
1345 @SIM_ENABLE_ARCH_aarch64_TRUE@aarch64_run_SOURCES
=
1346 @SIM_ENABLE_ARCH_aarch64_TRUE@aarch64_run_LDADD
= \
1347 @SIM_ENABLE_ARCH_aarch64_TRUE@ aarch64
/nrun.o \
1348 @SIM_ENABLE_ARCH_aarch64_TRUE@ aarch64
/libsim.a \
1349 @SIM_ENABLE_ARCH_aarch64_TRUE@
$(SIM_COMMON_LIBS
)
1351 @SIM_ENABLE_ARCH_arm_TRUE@arm_run_SOURCES
=
1352 @SIM_ENABLE_ARCH_arm_TRUE@arm_run_LDADD
= \
1353 @SIM_ENABLE_ARCH_arm_TRUE@ arm
/nrun.o \
1354 @SIM_ENABLE_ARCH_arm_TRUE@ arm
/libsim.a \
1355 @SIM_ENABLE_ARCH_arm_TRUE@
$(SIM_COMMON_LIBS
)
1357 @SIM_ENABLE_ARCH_arm_TRUE@armdocdir
= $(docdir
)/arm
1358 @SIM_ENABLE_ARCH_arm_TRUE@armdoc_DATA
= arm
/README
1359 @SIM_ENABLE_ARCH_avr_TRUE@avr_run_SOURCES
=
1360 @SIM_ENABLE_ARCH_avr_TRUE@avr_run_LDADD
= \
1361 @SIM_ENABLE_ARCH_avr_TRUE@ avr
/nrun.o \
1362 @SIM_ENABLE_ARCH_avr_TRUE@ avr
/libsim.a \
1363 @SIM_ENABLE_ARCH_avr_TRUE@
$(SIM_COMMON_LIBS
)
1365 @SIM_ENABLE_ARCH_bfin_TRUE@bfin_run_SOURCES
=
1366 @SIM_ENABLE_ARCH_bfin_TRUE@bfin_run_LDADD
= \
1367 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin
/nrun.o \
1368 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin
/libsim.a \
1369 @SIM_ENABLE_ARCH_bfin_TRUE@
$(SIM_COMMON_LIBS
)
1371 @SIM_ENABLE_ARCH_bfin_TRUE@bfin_SIM_EXTRA_HW_DEVICES
= \
1372 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_cec \
1373 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_ctimer \
1374 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_dma \
1375 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_dmac \
1376 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_ebiu_amc \
1377 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_ebiu_ddrc \
1378 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_ebiu_sdc \
1379 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_emac \
1380 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_eppi \
1381 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_evt \
1382 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_gpio \
1383 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_gpio2 \
1384 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_gptimer \
1385 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_jtag \
1386 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_mmu \
1387 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_nfc \
1388 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_otp \
1389 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_pfmon \
1390 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_pint \
1391 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_pll \
1392 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_ppi \
1393 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_rtc \
1394 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_sic \
1395 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_spi \
1396 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_trace \
1397 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_twi \
1398 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_uart \
1399 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_uart2 \
1400 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_wdog \
1401 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_wp \
1402 @SIM_ENABLE_ARCH_bfin_TRUE@ eth_phy
1404 @SIM_ENABLE_ARCH_bpf_TRUE@bpf_run_SOURCES
=
1405 @SIM_ENABLE_ARCH_bpf_TRUE@bpf_run_LDADD
= \
1406 @SIM_ENABLE_ARCH_bpf_TRUE@ bpf
/nrun.o \
1407 @SIM_ENABLE_ARCH_bpf_TRUE@ bpf
/libsim.a \
1408 @SIM_ENABLE_ARCH_bpf_TRUE@
$(SIM_COMMON_LIBS
)
1410 @SIM_ENABLE_ARCH_bpf_TRUE@bpf_BUILD_OUTPUTS
= \
1411 @SIM_ENABLE_ARCH_bpf_TRUE@ bpf
/eng-le.h \
1412 @SIM_ENABLE_ARCH_bpf_TRUE@ bpf
/mloop-le.c \
1413 @SIM_ENABLE_ARCH_bpf_TRUE@ bpf
/stamp-mloop-le \
1414 @SIM_ENABLE_ARCH_bpf_TRUE@ bpf
/eng-be.h \
1415 @SIM_ENABLE_ARCH_bpf_TRUE@ bpf
/mloop-be.c \
1416 @SIM_ENABLE_ARCH_bpf_TRUE@ bpf
/stamp-mloop-be
1418 @SIM_ENABLE_ARCH_cr16_TRUE@cr16_run_SOURCES
=
1419 @SIM_ENABLE_ARCH_cr16_TRUE@cr16_run_LDADD
= \
1420 @SIM_ENABLE_ARCH_cr16_TRUE@ cr16
/nrun.o \
1421 @SIM_ENABLE_ARCH_cr16_TRUE@ cr16
/libsim.a \
1422 @SIM_ENABLE_ARCH_cr16_TRUE@
$(SIM_COMMON_LIBS
)
1424 @SIM_ENABLE_ARCH_cr16_TRUE@cr16_BUILD_OUTPUTS
= \
1425 @SIM_ENABLE_ARCH_cr16_TRUE@ cr16
/gencode
$(EXEEXT
) \
1426 @SIM_ENABLE_ARCH_cr16_TRUE@ cr16
/simops.h \
1427 @SIM_ENABLE_ARCH_cr16_TRUE@ cr16
/table.c
1429 @SIM_ENABLE_ARCH_cr16_TRUE@cr16_gencode_SOURCES
= cr16
/gencode.c
1430 @SIM_ENABLE_ARCH_cr16_TRUE@cr16_gencode_LDADD
= cr16
/cr16-opc.o
1431 @SIM_ENABLE_ARCH_cris_TRUE@cris_run_SOURCES
=
1432 @SIM_ENABLE_ARCH_cris_TRUE@cris_run_LDADD
= \
1433 @SIM_ENABLE_ARCH_cris_TRUE@ cris
/nrun.o \
1434 @SIM_ENABLE_ARCH_cris_TRUE@ cris
/libsim.a \
1435 @SIM_ENABLE_ARCH_cris_TRUE@
$(SIM_COMMON_LIBS
)
1437 @SIM_ENABLE_ARCH_cris_TRUE@cris_SIM_EXTRA_HW_DEVICES
= rv cris cris_900000xx
1438 @SIM_ENABLE_ARCH_cris_TRUE@cris_rvdummy_SOURCES
= cris
/rvdummy.c
1439 @SIM_ENABLE_ARCH_cris_TRUE@cris_rvdummy_LDADD
= $(LIBIBERTY_LIB
)
1440 @SIM_ENABLE_ARCH_cris_TRUE@cris_BUILD_OUTPUTS
= \
1441 @SIM_ENABLE_ARCH_cris_TRUE@ cris
/engv10.h \
1442 @SIM_ENABLE_ARCH_cris_TRUE@ cris
/mloopv10f.c \
1443 @SIM_ENABLE_ARCH_cris_TRUE@ cris
/stamp-mloop-v10f \
1444 @SIM_ENABLE_ARCH_cris_TRUE@ cris
/engv32.h \
1445 @SIM_ENABLE_ARCH_cris_TRUE@ cris
/mloopv32f.c \
1446 @SIM_ENABLE_ARCH_cris_TRUE@ cris
/stamp-mloop-v32f
1448 @SIM_ENABLE_ARCH_d10v_TRUE@d10v_run_SOURCES
=
1449 @SIM_ENABLE_ARCH_d10v_TRUE@d10v_run_LDADD
= \
1450 @SIM_ENABLE_ARCH_d10v_TRUE@ d10v
/nrun.o \
1451 @SIM_ENABLE_ARCH_d10v_TRUE@ d10v
/libsim.a \
1452 @SIM_ENABLE_ARCH_d10v_TRUE@
$(SIM_COMMON_LIBS
)
1454 @SIM_ENABLE_ARCH_d10v_TRUE@d10v_BUILD_OUTPUTS
= \
1455 @SIM_ENABLE_ARCH_d10v_TRUE@ d10v
/gencode
$(EXEEXT
) \
1456 @SIM_ENABLE_ARCH_d10v_TRUE@ d10v
/simops.h \
1457 @SIM_ENABLE_ARCH_d10v_TRUE@ d10v
/table.c
1459 @SIM_ENABLE_ARCH_d10v_TRUE@d10v_gencode_SOURCES
= d10v
/gencode.c
1460 @SIM_ENABLE_ARCH_d10v_TRUE@d10v_gencode_LDADD
= d10v
/d10v-opc.o
1461 @SIM_ENABLE_ARCH_erc32_TRUE@erc32_run_SOURCES
=
1462 @SIM_ENABLE_ARCH_erc32_TRUE@erc32_run_LDADD
= \
1463 @SIM_ENABLE_ARCH_erc32_TRUE@ erc32
/sis.o \
1464 @SIM_ENABLE_ARCH_erc32_TRUE@ erc32
/libsim.a \
1465 @SIM_ENABLE_ARCH_erc32_TRUE@
$(SIM_COMMON_LIBS
) $(READLINE_LIB
) $(TERMCAP_LIB
)
1467 @SIM_ENABLE_ARCH_erc32_TRUE@erc32docdir
= $(docdir
)/erc32
1468 @SIM_ENABLE_ARCH_erc32_TRUE@erc32doc_DATA
= erc32
/README.erc32 erc32
/README.gdb erc32
/README.sis
1469 @SIM_ENABLE_ARCH_examples_TRUE@example_synacor_run_SOURCES
=
1470 @SIM_ENABLE_ARCH_examples_TRUE@example_synacor_run_LDADD
= \
1471 @SIM_ENABLE_ARCH_examples_TRUE@ example-synacor
/nrun.o \
1472 @SIM_ENABLE_ARCH_examples_TRUE@ example-synacor
/libsim.a \
1473 @SIM_ENABLE_ARCH_examples_TRUE@
$(SIM_COMMON_LIBS
)
1475 @SIM_ENABLE_ARCH_frv_TRUE@frv_run_SOURCES
=
1476 @SIM_ENABLE_ARCH_frv_TRUE@frv_run_LDADD
= \
1477 @SIM_ENABLE_ARCH_frv_TRUE@ frv
/nrun.o \
1478 @SIM_ENABLE_ARCH_frv_TRUE@ frv
/libsim.a \
1479 @SIM_ENABLE_ARCH_frv_TRUE@
$(SIM_COMMON_LIBS
)
1481 @SIM_ENABLE_ARCH_frv_TRUE@frvdocdir
= $(docdir
)/frv
1482 @SIM_ENABLE_ARCH_frv_TRUE@frvdoc_DATA
= frv
/README
1483 @SIM_ENABLE_ARCH_frv_TRUE@frv_BUILD_OUTPUTS
= \
1484 @SIM_ENABLE_ARCH_frv_TRUE@ frv
/eng.h \
1485 @SIM_ENABLE_ARCH_frv_TRUE@ frv
/mloop.c \
1486 @SIM_ENABLE_ARCH_frv_TRUE@ frv
/stamp-mloop
1488 @SIM_ENABLE_ARCH_ft32_TRUE@ft32_run_SOURCES
=
1489 @SIM_ENABLE_ARCH_ft32_TRUE@ft32_run_LDADD
= \
1490 @SIM_ENABLE_ARCH_ft32_TRUE@ ft32
/nrun.o \
1491 @SIM_ENABLE_ARCH_ft32_TRUE@ ft32
/libsim.a \
1492 @SIM_ENABLE_ARCH_ft32_TRUE@
$(SIM_COMMON_LIBS
)
1494 @SIM_ENABLE_ARCH_h8300_TRUE@h8300_run_SOURCES
=
1495 @SIM_ENABLE_ARCH_h8300_TRUE@h8300_run_LDADD
= \
1496 @SIM_ENABLE_ARCH_h8300_TRUE@ h8300
/nrun.o \
1497 @SIM_ENABLE_ARCH_h8300_TRUE@ h8300
/libsim.a \
1498 @SIM_ENABLE_ARCH_h8300_TRUE@
$(SIM_COMMON_LIBS
)
1500 @SIM_ENABLE_ARCH_iq2000_TRUE@iq2000_run_SOURCES
=
1501 @SIM_ENABLE_ARCH_iq2000_TRUE@iq2000_run_LDADD
= \
1502 @SIM_ENABLE_ARCH_iq2000_TRUE@ iq2000
/nrun.o \
1503 @SIM_ENABLE_ARCH_iq2000_TRUE@ iq2000
/libsim.a \
1504 @SIM_ENABLE_ARCH_iq2000_TRUE@
$(SIM_COMMON_LIBS
)
1506 @SIM_ENABLE_ARCH_iq2000_TRUE@iq2000_BUILD_OUTPUTS
= \
1507 @SIM_ENABLE_ARCH_iq2000_TRUE@ iq2000
/eng.h \
1508 @SIM_ENABLE_ARCH_iq2000_TRUE@ iq2000
/mloop.c \
1509 @SIM_ENABLE_ARCH_iq2000_TRUE@ iq2000
/stamp-mloop
1511 @SIM_ENABLE_ARCH_lm32_TRUE@lm32_run_SOURCES
=
1512 @SIM_ENABLE_ARCH_lm32_TRUE@lm32_run_LDADD
= \
1513 @SIM_ENABLE_ARCH_lm32_TRUE@ lm32
/nrun.o \
1514 @SIM_ENABLE_ARCH_lm32_TRUE@ lm32
/libsim.a \
1515 @SIM_ENABLE_ARCH_lm32_TRUE@
$(SIM_COMMON_LIBS
)
1517 @SIM_ENABLE_ARCH_lm32_TRUE@lm32_SIM_EXTRA_HW_DEVICES
= lm32cpu lm32timer lm32uart
1518 @SIM_ENABLE_ARCH_lm32_TRUE@lm32_BUILD_OUTPUTS
= \
1519 @SIM_ENABLE_ARCH_lm32_TRUE@ lm32
/eng.h \
1520 @SIM_ENABLE_ARCH_lm32_TRUE@ lm32
/mloop.c \
1521 @SIM_ENABLE_ARCH_lm32_TRUE@ lm32
/stamp-mloop
1523 @SIM_ENABLE_ARCH_m32c_TRUE@m32c_run_SOURCES
=
1524 @SIM_ENABLE_ARCH_m32c_TRUE@m32c_run_LDADD
= \
1525 @SIM_ENABLE_ARCH_m32c_TRUE@ m32c
/main.o \
1526 @SIM_ENABLE_ARCH_m32c_TRUE@ m32c
/libsim.a \
1527 @SIM_ENABLE_ARCH_m32c_TRUE@
$(SIM_COMMON_LIBS
)
1529 @SIM_ENABLE_ARCH_m32c_TRUE@m32c_BUILD_OUTPUTS
= \
1530 @SIM_ENABLE_ARCH_m32c_TRUE@ m32c
/opc2c
$(EXEEXT
) \
1531 @SIM_ENABLE_ARCH_m32c_TRUE@ m32c
/m32c.c \
1532 @SIM_ENABLE_ARCH_m32c_TRUE@ m32c
/r8c.c
1534 @SIM_ENABLE_ARCH_m32c_TRUE@m32c_opc2c_SOURCES
= m32c
/opc2c.c
1536 # opc2c leaks memory, and therefore makes AddressSanitizer unhappy. Disable
1537 # leak detection while running it.
1538 @SIM_ENABLE_ARCH_m32c_TRUE@m32c_OPC2C_RUN
= ASAN_OPTIONS
=detect_leaks
=0 m32c
/opc2c
$(EXEEXT
)
1539 @SIM_ENABLE_ARCH_m32r_TRUE@m32r_run_SOURCES
=
1540 @SIM_ENABLE_ARCH_m32r_TRUE@m32r_run_LDADD
= \
1541 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r
/nrun.o \
1542 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r
/libsim.a \
1543 @SIM_ENABLE_ARCH_m32r_TRUE@
$(SIM_COMMON_LIBS
)
1545 @SIM_ENABLE_ARCH_m32r_TRUE@m32r_SIM_EXTRA_HW_DEVICES
= m32r_cache m32r_uart
1546 @SIM_ENABLE_ARCH_m32r_TRUE@m32r_BUILD_OUTPUTS
= \
1547 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r
/eng.h \
1548 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r
/mloop.c \
1549 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r
/stamp-mloop \
1550 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r
/engx.h \
1551 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r
/mloopx.c \
1552 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r
/stamp-mloop-x \
1553 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r
/eng2.h \
1554 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r
/mloop2.c \
1555 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r
/stamp-mloop-2
1557 @SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11_run_SOURCES
=
1558 @SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11_run_LDADD
= \
1559 @SIM_ENABLE_ARCH_m68hc11_TRUE@ m68hc11
/nrun.o \
1560 @SIM_ENABLE_ARCH_m68hc11_TRUE@ m68hc11
/libsim.a \
1561 @SIM_ENABLE_ARCH_m68hc11_TRUE@
$(SIM_COMMON_LIBS
)
1563 @SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11_SIM_EXTRA_HW_DEVICES
= m68hc11 m68hc11sio m68hc11eepr m68hc11tim m68hc11spi nvram
1564 @SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11_BUILD_OUTPUTS
= \
1565 @SIM_ENABLE_ARCH_m68hc11_TRUE@ m68hc11
/gencode
$(EXEEXT
) \
1566 @SIM_ENABLE_ARCH_m68hc11_TRUE@ m68hc11
/m68hc11int.c \
1567 @SIM_ENABLE_ARCH_m68hc11_TRUE@ m68hc11
/m68hc12int.c
1569 @SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11_gencode_SOURCES
= m68hc11
/gencode.c
1570 @SIM_ENABLE_ARCH_mcore_TRUE@mcore_run_SOURCES
=
1571 @SIM_ENABLE_ARCH_mcore_TRUE@mcore_run_LDADD
= \
1572 @SIM_ENABLE_ARCH_mcore_TRUE@ mcore
/nrun.o \
1573 @SIM_ENABLE_ARCH_mcore_TRUE@ mcore
/libsim.a \
1574 @SIM_ENABLE_ARCH_mcore_TRUE@
$(SIM_COMMON_LIBS
)
1576 @SIM_ENABLE_ARCH_microblaze_TRUE@microblaze_run_SOURCES
=
1577 @SIM_ENABLE_ARCH_microblaze_TRUE@microblaze_run_LDADD
= \
1578 @SIM_ENABLE_ARCH_microblaze_TRUE@ microblaze
/nrun.o \
1579 @SIM_ENABLE_ARCH_microblaze_TRUE@ microblaze
/libsim.a \
1580 @SIM_ENABLE_ARCH_microblaze_TRUE@
$(SIM_COMMON_LIBS
)
1582 @SIM_ENABLE_ARCH_mips_TRUE@mips_run_SOURCES
=
1583 @SIM_ENABLE_ARCH_mips_TRUE@mips_run_LDADD
= \
1584 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/nrun.o \
1585 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/libsim.a \
1586 @SIM_ENABLE_ARCH_mips_TRUE@
$(SIM_COMMON_LIBS
)
1588 @SIM_ENABLE_ARCH_mips_TRUE@mips_SIM_EXTRA_HW_DEVICES
= tx3904cpu tx3904irc tx3904tmr tx3904sio
1589 @SIM_ENABLE_ARCH_mn10300_TRUE@mn10300_run_SOURCES
=
1590 @SIM_ENABLE_ARCH_mn10300_TRUE@mn10300_run_LDADD
= \
1591 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300
/nrun.o \
1592 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300
/libsim.a \
1593 @SIM_ENABLE_ARCH_mn10300_TRUE@
$(SIM_COMMON_LIBS
)
1595 @SIM_ENABLE_ARCH_mn10300_TRUE@mn10300_SIM_EXTRA_HW_DEVICES
= mn103cpu mn103int mn103tim mn103ser mn103iop
1596 @SIM_ENABLE_ARCH_mn10300_TRUE@mn10300_BUILT_SRC_FROM_IGEN
= \
1597 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300
/icache.h \
1598 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300
/icache.c \
1599 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300
/idecode.h \
1600 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300
/idecode.c \
1601 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300
/semantics.h \
1602 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300
/semantics.c \
1603 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300
/model.h \
1604 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300
/model.c \
1605 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300
/support.h \
1606 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300
/support.c \
1607 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300
/itable.h \
1608 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300
/itable.c \
1609 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300
/engine.h \
1610 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300
/engine.c \
1611 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300
/irun.c
1613 @SIM_ENABLE_ARCH_mn10300_TRUE@mn10300_BUILD_OUTPUTS
= \
1614 @SIM_ENABLE_ARCH_mn10300_TRUE@
$(mn10300_BUILT_SRC_FROM_IGEN
) \
1615 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300
/stamp-igen
1617 @SIM_ENABLE_ARCH_mn10300_TRUE@mn10300_IGEN_TRACE
= # -G omit-line-numbers # -G trace-rule-selection -G trace-rule-rejection -G trace-entries
1618 @SIM_ENABLE_ARCH_mn10300_TRUE@mn10300_IGEN_INSN
= $(srcdir)/mn10300
/mn10300.igen
1619 @SIM_ENABLE_ARCH_mn10300_TRUE@mn10300_IGEN_INSN_INC
= mn10300
/am33.igen mn10300
/am33-2.igen
1620 @SIM_ENABLE_ARCH_mn10300_TRUE@mn10300_IGEN_DC
= $(srcdir)/mn10300
/mn10300.dc
1621 @SIM_ENABLE_ARCH_moxie_TRUE@moxie_run_SOURCES
=
1622 @SIM_ENABLE_ARCH_moxie_TRUE@moxie_run_LDADD
= \
1623 @SIM_ENABLE_ARCH_moxie_TRUE@ moxie
/nrun.o \
1624 @SIM_ENABLE_ARCH_moxie_TRUE@ moxie
/libsim.a \
1625 @SIM_ENABLE_ARCH_moxie_TRUE@
$(SIM_COMMON_LIBS
)
1627 @SIM_ENABLE_ARCH_moxie_TRUE@dtbdir
= $(datadir)/gdb
/dtb
1628 @SIM_ENABLE_ARCH_moxie_TRUE@dtb_DATA
= moxie
/moxie-gdb.dtb
1629 @SIM_ENABLE_ARCH_msp430_TRUE@msp430_run_SOURCES
=
1630 @SIM_ENABLE_ARCH_msp430_TRUE@msp430_run_LDADD
= \
1631 @SIM_ENABLE_ARCH_msp430_TRUE@ msp430
/nrun.o \
1632 @SIM_ENABLE_ARCH_msp430_TRUE@ msp430
/libsim.a \
1633 @SIM_ENABLE_ARCH_msp430_TRUE@
$(SIM_COMMON_LIBS
)
1635 @SIM_ENABLE_ARCH_or1k_TRUE@or1k_run_SOURCES
=
1636 @SIM_ENABLE_ARCH_or1k_TRUE@or1k_run_LDADD
= \
1637 @SIM_ENABLE_ARCH_or1k_TRUE@ or1k
/nrun.o \
1638 @SIM_ENABLE_ARCH_or1k_TRUE@ or1k
/libsim.a \
1639 @SIM_ENABLE_ARCH_or1k_TRUE@
$(SIM_COMMON_LIBS
)
1641 @SIM_ENABLE_ARCH_or1k_TRUE@or1kdocdir
= $(docdir
)/or1k
1642 @SIM_ENABLE_ARCH_or1k_TRUE@or1kdoc_DATA
= or1k
/README
1643 @SIM_ENABLE_ARCH_or1k_TRUE@or1k_BUILD_OUTPUTS
= \
1644 @SIM_ENABLE_ARCH_or1k_TRUE@ or1k
/eng.h \
1645 @SIM_ENABLE_ARCH_or1k_TRUE@ or1k
/mloop.c \
1646 @SIM_ENABLE_ARCH_or1k_TRUE@ or1k
/stamp-mloop
1648 @SIM_ENABLE_ARCH_ppc_TRUE@ppc_run_SOURCES
=
1649 @SIM_ENABLE_ARCH_ppc_TRUE@ppc_run_LDADD
= \
1650 @SIM_ENABLE_ARCH_ppc_TRUE@ ppc
/main.o \
1651 @SIM_ENABLE_ARCH_ppc_TRUE@ ppc
/libsim.a \
1652 @SIM_ENABLE_ARCH_ppc_TRUE@
$(SIM_COMMON_LIBS
)
1654 @SIM_ENABLE_ARCH_ppc_TRUE@ppcdocdir
= $(docdir
)/ppc
1655 @SIM_ENABLE_ARCH_ppc_TRUE@ppcdoc_DATA
= ppc
/BUGS ppc
/INSTALL ppc
/README ppc
/RUN
1656 @SIM_ENABLE_ARCH_pru_TRUE@pru_run_SOURCES
=
1657 @SIM_ENABLE_ARCH_pru_TRUE@pru_run_LDADD
= \
1658 @SIM_ENABLE_ARCH_pru_TRUE@ pru
/nrun.o \
1659 @SIM_ENABLE_ARCH_pru_TRUE@ pru
/libsim.a \
1660 @SIM_ENABLE_ARCH_pru_TRUE@
$(SIM_COMMON_LIBS
)
1662 @SIM_ENABLE_ARCH_riscv_TRUE@riscv_run_SOURCES
=
1663 @SIM_ENABLE_ARCH_riscv_TRUE@riscv_run_LDADD
= \
1664 @SIM_ENABLE_ARCH_riscv_TRUE@ riscv
/nrun.o \
1665 @SIM_ENABLE_ARCH_riscv_TRUE@ riscv
/libsim.a \
1666 @SIM_ENABLE_ARCH_riscv_TRUE@
$(SIM_COMMON_LIBS
)
1668 @SIM_ENABLE_ARCH_rl78_TRUE@rl78_run_SOURCES
=
1669 @SIM_ENABLE_ARCH_rl78_TRUE@rl78_run_LDADD
= \
1670 @SIM_ENABLE_ARCH_rl78_TRUE@ rl78
/main.o \
1671 @SIM_ENABLE_ARCH_rl78_TRUE@ rl78
/libsim.a \
1672 @SIM_ENABLE_ARCH_rl78_TRUE@
$(SIM_COMMON_LIBS
)
1674 @SIM_ENABLE_ARCH_rx_TRUE@rx_run_SOURCES
=
1675 @SIM_ENABLE_ARCH_rx_TRUE@rx_run_LDADD
= \
1676 @SIM_ENABLE_ARCH_rx_TRUE@ rx
/main.o \
1677 @SIM_ENABLE_ARCH_rx_TRUE@ rx
/libsim.a \
1678 @SIM_ENABLE_ARCH_rx_TRUE@
$(SIM_COMMON_LIBS
)
1680 @SIM_ENABLE_ARCH_rx_TRUE@rxdocdir
= $(docdir
)/rx
1681 @SIM_ENABLE_ARCH_rx_TRUE@rxdoc_DATA
= rx
/README.txt
1682 @SIM_ENABLE_ARCH_sh_TRUE@sh_run_SOURCES
=
1683 @SIM_ENABLE_ARCH_sh_TRUE@sh_run_LDADD
= \
1684 @SIM_ENABLE_ARCH_sh_TRUE@ sh
/nrun.o \
1685 @SIM_ENABLE_ARCH_sh_TRUE@ sh
/libsim.a \
1686 @SIM_ENABLE_ARCH_sh_TRUE@
$(SIM_COMMON_LIBS
)
1688 @SIM_ENABLE_ARCH_sh_TRUE@sh_BUILD_OUTPUTS
= \
1689 @SIM_ENABLE_ARCH_sh_TRUE@ sh
/gencode
$(EXEEXT
) \
1690 @SIM_ENABLE_ARCH_sh_TRUE@ sh
/code.c \
1691 @SIM_ENABLE_ARCH_sh_TRUE@ sh
/ppi.c \
1692 @SIM_ENABLE_ARCH_sh_TRUE@ sh
/table.c
1694 @SIM_ENABLE_ARCH_sh_TRUE@sh_gencode_SOURCES
= sh
/gencode.c
1695 @SIM_ENABLE_ARCH_v850_TRUE@v850_run_SOURCES
=
1696 @SIM_ENABLE_ARCH_v850_TRUE@v850_run_LDADD
= \
1697 @SIM_ENABLE_ARCH_v850_TRUE@ v850
/nrun.o \
1698 @SIM_ENABLE_ARCH_v850_TRUE@ v850
/libsim.a \
1699 @SIM_ENABLE_ARCH_v850_TRUE@
$(SIM_COMMON_LIBS
)
1701 @SIM_ENABLE_ARCH_v850_TRUE@v850_BUILT_SRC_FROM_IGEN
= \
1702 @SIM_ENABLE_ARCH_v850_TRUE@ v850
/icache.h \
1703 @SIM_ENABLE_ARCH_v850_TRUE@ v850
/icache.c \
1704 @SIM_ENABLE_ARCH_v850_TRUE@ v850
/idecode.h \
1705 @SIM_ENABLE_ARCH_v850_TRUE@ v850
/idecode.c \
1706 @SIM_ENABLE_ARCH_v850_TRUE@ v850
/semantics.h \
1707 @SIM_ENABLE_ARCH_v850_TRUE@ v850
/semantics.c \
1708 @SIM_ENABLE_ARCH_v850_TRUE@ v850
/model.h \
1709 @SIM_ENABLE_ARCH_v850_TRUE@ v850
/model.c \
1710 @SIM_ENABLE_ARCH_v850_TRUE@ v850
/support.h \
1711 @SIM_ENABLE_ARCH_v850_TRUE@ v850
/support.c \
1712 @SIM_ENABLE_ARCH_v850_TRUE@ v850
/itable.h \
1713 @SIM_ENABLE_ARCH_v850_TRUE@ v850
/itable.c \
1714 @SIM_ENABLE_ARCH_v850_TRUE@ v850
/engine.h \
1715 @SIM_ENABLE_ARCH_v850_TRUE@ v850
/engine.c \
1716 @SIM_ENABLE_ARCH_v850_TRUE@ v850
/irun.c
1718 @SIM_ENABLE_ARCH_v850_TRUE@v850_BUILD_OUTPUTS
= \
1719 @SIM_ENABLE_ARCH_v850_TRUE@
$(v850_BUILT_SRC_FROM_IGEN
) \
1720 @SIM_ENABLE_ARCH_v850_TRUE@ v850
/stamp-igen
1722 @SIM_ENABLE_ARCH_v850_TRUE@v850_IGEN_TRACE
= # -G omit-line-numbers # -G trace-rule-selection -G trace-rule-rejection -G trace-entries
1723 @SIM_ENABLE_ARCH_v850_TRUE@v850_IGEN_INSN
= $(srcdir)/v850
/v850.igen
1724 @SIM_ENABLE_ARCH_v850_TRUE@v850_IGEN_DC
= $(srcdir)/v850
/v850.dc
1726 $(MAKE
) $(AM_MAKEFLAGS
) all-recursive
1729 .SUFFIXES
: .c .lo .log .o .obj .
test .
test$(EXEEXT
) .trs
1730 am--refresh
: Makefile
1732 $(srcdir)/Makefile.in
: @MAINTAINER_MODE_TRUE@
$(srcdir)/Makefile.am
$(srcdir)/common
/local.mk
$(srcdir)/igen
/local.mk
$(srcdir)/testsuite
/local.mk
$(srcdir)/testsuite
/common
/local.mk
$(srcdir)/aarch64
/local.mk
$(srcdir)/arm
/local.mk
$(srcdir)/avr
/local.mk
$(srcdir)/bfin
/local.mk
$(srcdir)/bpf
/local.mk
$(srcdir)/cr16
/local.mk
$(srcdir)/cris
/local.mk
$(srcdir)/d10v
/local.mk
$(srcdir)/erc32
/local.mk
$(srcdir)/example-synacor
/local.mk
$(srcdir)/frv
/local.mk
$(srcdir)/ft32
/local.mk
$(srcdir)/h8300
/local.mk
$(srcdir)/iq2000
/local.mk
$(srcdir)/lm32
/local.mk
$(srcdir)/m32c
/local.mk
$(srcdir)/m32r
/local.mk
$(srcdir)/m68hc11
/local.mk
$(srcdir)/mcore
/local.mk
$(srcdir)/microblaze
/local.mk
$(srcdir)/mips
/local.mk
$(srcdir)/mn10300
/local.mk
$(srcdir)/moxie
/local.mk
$(srcdir)/msp430
/local.mk
$(srcdir)/or1k
/local.mk
$(srcdir)/ppc
/local.mk
$(srcdir)/pru
/local.mk
$(srcdir)/riscv
/local.mk
$(srcdir)/rl78
/local.mk
$(srcdir)/rx
/local.mk
$(srcdir)/sh
/local.mk
$(srcdir)/v850
/local.mk
$(am__configure_deps
)
1733 @for dep in
$?
; do \
1734 case
'$(am__configure_deps)' in \
1736 echo
' cd $(srcdir) && $(AUTOMAKE) --foreign'; \
1737 $(am__cd
) $(srcdir) && $(AUTOMAKE
) --foreign \
1742 echo
' cd $(top_srcdir) && $(AUTOMAKE) --foreign Makefile'; \
1743 $(am__cd
) $(top_srcdir
) && \
1744 $(AUTOMAKE
) --foreign Makefile
1745 Makefile
: $(srcdir)/Makefile.in
$(top_builddir
)/config.status
1748 echo
' $(SHELL) ./config.status'; \
1749 $(SHELL
) .
/config.status
;; \
1751 echo
' cd $(top_builddir) && $(SHELL) ./config.status $@ $(am__depfiles_maybe)'; \
1752 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
$(am__depfiles_maybe
);; \
1754 $(srcdir)/common
/local.mk
$(srcdir)/igen
/local.mk
$(srcdir)/testsuite
/local.mk
$(srcdir)/testsuite
/common
/local.mk
$(srcdir)/aarch64
/local.mk
$(srcdir)/arm
/local.mk
$(srcdir)/avr
/local.mk
$(srcdir)/bfin
/local.mk
$(srcdir)/bpf
/local.mk
$(srcdir)/cr16
/local.mk
$(srcdir)/cris
/local.mk
$(srcdir)/d10v
/local.mk
$(srcdir)/erc32
/local.mk
$(srcdir)/example-synacor
/local.mk
$(srcdir)/frv
/local.mk
$(srcdir)/ft32
/local.mk
$(srcdir)/h8300
/local.mk
$(srcdir)/iq2000
/local.mk
$(srcdir)/lm32
/local.mk
$(srcdir)/m32c
/local.mk
$(srcdir)/m32r
/local.mk
$(srcdir)/m68hc11
/local.mk
$(srcdir)/mcore
/local.mk
$(srcdir)/microblaze
/local.mk
$(srcdir)/mips
/local.mk
$(srcdir)/mn10300
/local.mk
$(srcdir)/moxie
/local.mk
$(srcdir)/msp430
/local.mk
$(srcdir)/or1k
/local.mk
$(srcdir)/ppc
/local.mk
$(srcdir)/pru
/local.mk
$(srcdir)/riscv
/local.mk
$(srcdir)/rl78
/local.mk
$(srcdir)/rx
/local.mk
$(srcdir)/sh
/local.mk
$(srcdir)/v850
/local.mk
$(am__empty
):
1756 $(top_builddir
)/config.status
: $(top_srcdir
)/configure
$(CONFIG_STATUS_DEPENDENCIES
)
1757 $(SHELL
) .
/config.status
--recheck
1759 $(top_srcdir
)/configure
: @MAINTAINER_MODE_TRUE@
$(am__configure_deps
)
1760 $(am__cd
) $(srcdir) && $(AUTOCONF
)
1761 $(ACLOCAL_M4
): @MAINTAINER_MODE_TRUE@
$(am__aclocal_m4_deps
)
1762 $(am__cd
) $(srcdir) && $(ACLOCAL
) $(ACLOCAL_AMFLAGS
)
1763 $(am__aclocal_m4_deps
):
1766 @
test -f
$@ ||
rm -f stamp-h1
1767 @
test -f
$@ ||
$(MAKE
) $(AM_MAKEFLAGS
) stamp-h1
1769 stamp-h1
: $(srcdir)/config.h.in
$(top_builddir
)/config.status
1771 cd
$(top_builddir
) && $(SHELL
) .
/config.status config.h
1772 $(srcdir)/config.h.in
: @MAINTAINER_MODE_TRUE@
$(am__configure_deps
)
1773 ($(am__cd
) $(top_srcdir
) && $(AUTOHEADER
))
1778 -rm -f config.h stamp-h1
1779 Make-common.sim
: $(top_builddir
)/config.status
$(top_srcdir
)/common
/Make-common.in
1780 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
1781 aarch64
/Makefile.sim
: $(top_builddir
)/config.status
$(top_srcdir
)/aarch64
/Makefile.in
1782 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
1783 aarch64
/.gdbinit
: $(top_builddir
)/config.status
$(top_srcdir
)/common
/gdbinit.in
1784 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
1785 arm
/Makefile.sim
: $(top_builddir
)/config.status
$(top_srcdir
)/arm
/Makefile.in
1786 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
1787 arm
/.gdbinit
: $(top_builddir
)/config.status
$(top_srcdir
)/common
/gdbinit.in
1788 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
1789 avr
/Makefile.sim
: $(top_builddir
)/config.status
$(top_srcdir
)/avr
/Makefile.in
1790 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
1791 avr
/.gdbinit
: $(top_builddir
)/config.status
$(top_srcdir
)/common
/gdbinit.in
1792 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
1793 bfin
/Makefile.sim
: $(top_builddir
)/config.status
$(top_srcdir
)/bfin
/Makefile.in
1794 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
1795 bfin
/.gdbinit
: $(top_builddir
)/config.status
$(top_srcdir
)/common
/gdbinit.in
1796 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
1797 bpf
/Makefile.sim
: $(top_builddir
)/config.status
$(top_srcdir
)/bpf
/Makefile.in
1798 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
1799 bpf
/.gdbinit
: $(top_builddir
)/config.status
$(top_srcdir
)/common
/gdbinit.in
1800 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
1801 cr16
/Makefile.sim
: $(top_builddir
)/config.status
$(top_srcdir
)/cr16
/Makefile.in
1802 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
1803 cr16
/.gdbinit
: $(top_builddir
)/config.status
$(top_srcdir
)/common
/gdbinit.in
1804 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
1805 cris
/Makefile.sim
: $(top_builddir
)/config.status
$(top_srcdir
)/cris
/Makefile.in
1806 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
1807 cris
/.gdbinit
: $(top_builddir
)/config.status
$(top_srcdir
)/common
/gdbinit.in
1808 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
1809 d10v
/Makefile.sim
: $(top_builddir
)/config.status
$(top_srcdir
)/d10v
/Makefile.in
1810 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
1811 d10v
/.gdbinit
: $(top_builddir
)/config.status
$(top_srcdir
)/common
/gdbinit.in
1812 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
1813 frv
/Makefile.sim
: $(top_builddir
)/config.status
$(top_srcdir
)/frv
/Makefile.in
1814 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
1815 frv
/.gdbinit
: $(top_builddir
)/config.status
$(top_srcdir
)/common
/gdbinit.in
1816 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
1817 ft32
/Makefile.sim
: $(top_builddir
)/config.status
$(top_srcdir
)/ft32
/Makefile.in
1818 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
1819 ft32
/.gdbinit
: $(top_builddir
)/config.status
$(top_srcdir
)/common
/gdbinit.in
1820 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
1821 h8300
/Makefile.sim
: $(top_builddir
)/config.status
$(top_srcdir
)/h8300
/Makefile.in
1822 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
1823 h8300
/.gdbinit
: $(top_builddir
)/config.status
$(top_srcdir
)/common
/gdbinit.in
1824 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
1825 iq2000
/Makefile.sim
: $(top_builddir
)/config.status
$(top_srcdir
)/iq2000
/Makefile.in
1826 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
1827 iq2000
/.gdbinit
: $(top_builddir
)/config.status
$(top_srcdir
)/common
/gdbinit.in
1828 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
1829 lm32
/Makefile.sim
: $(top_builddir
)/config.status
$(top_srcdir
)/lm32
/Makefile.in
1830 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
1831 lm32
/.gdbinit
: $(top_builddir
)/config.status
$(top_srcdir
)/common
/gdbinit.in
1832 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
1833 m32c
/Makefile.sim
: $(top_builddir
)/config.status
$(top_srcdir
)/m32c
/Makefile.in
1834 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
1835 m32c
/.gdbinit
: $(top_builddir
)/config.status
$(top_srcdir
)/common
/gdbinit.in
1836 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
1837 m32r
/Makefile.sim
: $(top_builddir
)/config.status
$(top_srcdir
)/m32r
/Makefile.in
1838 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
1839 m32r
/.gdbinit
: $(top_builddir
)/config.status
$(top_srcdir
)/common
/gdbinit.in
1840 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
1841 m68hc11
/Makefile.sim
: $(top_builddir
)/config.status
$(top_srcdir
)/m68hc11
/Makefile.in
1842 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
1843 m68hc11
/.gdbinit
: $(top_builddir
)/config.status
$(top_srcdir
)/common
/gdbinit.in
1844 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
1845 mcore
/Makefile.sim
: $(top_builddir
)/config.status
$(top_srcdir
)/mcore
/Makefile.in
1846 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
1847 mcore
/.gdbinit
: $(top_builddir
)/config.status
$(top_srcdir
)/common
/gdbinit.in
1848 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
1849 microblaze
/Makefile.sim
: $(top_builddir
)/config.status
$(top_srcdir
)/microblaze
/Makefile.in
1850 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
1851 microblaze
/.gdbinit
: $(top_builddir
)/config.status
$(top_srcdir
)/common
/gdbinit.in
1852 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
1853 mips
/Makefile.sim
: $(top_builddir
)/config.status
$(top_srcdir
)/mips
/Makefile.in
1854 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
1855 mips
/.gdbinit
: $(top_builddir
)/config.status
$(top_srcdir
)/common
/gdbinit.in
1856 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
1857 mn10300
/Makefile.sim
: $(top_builddir
)/config.status
$(top_srcdir
)/mn10300
/Makefile.in
1858 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
1859 mn10300
/.gdbinit
: $(top_builddir
)/config.status
$(top_srcdir
)/common
/gdbinit.in
1860 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
1861 moxie
/Makefile.sim
: $(top_builddir
)/config.status
$(top_srcdir
)/moxie
/Makefile.in
1862 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
1863 moxie
/.gdbinit
: $(top_builddir
)/config.status
$(top_srcdir
)/common
/gdbinit.in
1864 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
1865 msp430
/Makefile.sim
: $(top_builddir
)/config.status
$(top_srcdir
)/msp430
/Makefile.in
1866 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
1867 msp430
/.gdbinit
: $(top_builddir
)/config.status
$(top_srcdir
)/common
/gdbinit.in
1868 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
1869 or1k
/Makefile.sim
: $(top_builddir
)/config.status
$(top_srcdir
)/or1k
/Makefile.in
1870 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
1871 or1k
/.gdbinit
: $(top_builddir
)/config.status
$(top_srcdir
)/common
/gdbinit.in
1872 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
1873 ppc
/.gdbinit
: $(top_builddir
)/config.status
$(top_srcdir
)/common
/gdbinit.in
1874 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
1875 pru
/Makefile.sim
: $(top_builddir
)/config.status
$(top_srcdir
)/pru
/Makefile.in
1876 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
1877 pru
/.gdbinit
: $(top_builddir
)/config.status
$(top_srcdir
)/common
/gdbinit.in
1878 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
1879 riscv
/Makefile.sim
: $(top_builddir
)/config.status
$(top_srcdir
)/riscv
/Makefile.in
1880 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
1881 riscv
/.gdbinit
: $(top_builddir
)/config.status
$(top_srcdir
)/common
/gdbinit.in
1882 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
1883 rl78
/Makefile.sim
: $(top_builddir
)/config.status
$(top_srcdir
)/rl78
/Makefile.in
1884 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
1885 rl78
/.gdbinit
: $(top_builddir
)/config.status
$(top_srcdir
)/common
/gdbinit.in
1886 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
1887 rx
/Makefile.sim
: $(top_builddir
)/config.status
$(top_srcdir
)/rx
/Makefile.in
1888 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
1889 rx
/.gdbinit
: $(top_builddir
)/config.status
$(top_srcdir
)/common
/gdbinit.in
1890 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
1891 sh
/Makefile.sim
: $(top_builddir
)/config.status
$(top_srcdir
)/sh
/Makefile.in
1892 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
1893 sh
/.gdbinit
: $(top_builddir
)/config.status
$(top_srcdir
)/common
/gdbinit.in
1894 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
1895 erc32
/Makefile.sim
: $(top_builddir
)/config.status
$(top_srcdir
)/erc32
/Makefile.in
1896 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
1897 erc32
/.gdbinit
: $(top_builddir
)/config.status
$(top_srcdir
)/common
/gdbinit.in
1898 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
1899 v850
/Makefile.sim
: $(top_builddir
)/config.status
$(top_srcdir
)/v850
/Makefile.in
1900 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
1901 v850
/.gdbinit
: $(top_builddir
)/config.status
$(top_srcdir
)/common
/gdbinit.in
1902 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
1903 example-synacor
/Makefile.sim
: $(top_builddir
)/config.status
$(top_srcdir
)/example-synacor
/Makefile.in
1904 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
1905 example-synacor
/.gdbinit
: $(top_builddir
)/config.status
$(top_srcdir
)/common
/gdbinit.in
1906 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
1907 arch-subdir.mk
: $(top_builddir
)/config.status
$(srcdir)/arch-subdir.mk.in
1908 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
1909 .gdbinit
: $(top_builddir
)/config.status
$(srcdir)/gdbinit.in
1910 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
1912 clean-noinstLIBRARIES
:
1913 -test -z
"$(noinst_LIBRARIES)" ||
rm -f
$(noinst_LIBRARIES
)
1914 common
/$(am__dirstamp
):
1916 @
: > common
/$(am__dirstamp
)
1917 common
/$(DEPDIR
)/$(am__dirstamp
):
1918 @
$(MKDIR_P
) common
/$(DEPDIR
)
1919 @
: > common
/$(DEPDIR
)/$(am__dirstamp
)
1920 common
/callback.
$(OBJEXT
): common
/$(am__dirstamp
) \
1921 common
/$(DEPDIR
)/$(am__dirstamp
)
1922 common
/portability.
$(OBJEXT
): common
/$(am__dirstamp
) \
1923 common
/$(DEPDIR
)/$(am__dirstamp
)
1924 common
/sim-load.
$(OBJEXT
): common
/$(am__dirstamp
) \
1925 common
/$(DEPDIR
)/$(am__dirstamp
)
1926 common
/syscall.
$(OBJEXT
): common
/$(am__dirstamp
) \
1927 common
/$(DEPDIR
)/$(am__dirstamp
)
1928 common
/target-newlib-errno.
$(OBJEXT
): common
/$(am__dirstamp
) \
1929 common
/$(DEPDIR
)/$(am__dirstamp
)
1930 common
/target-newlib-open.
$(OBJEXT
): common
/$(am__dirstamp
) \
1931 common
/$(DEPDIR
)/$(am__dirstamp
)
1932 common
/target-newlib-signal.
$(OBJEXT
): common
/$(am__dirstamp
) \
1933 common
/$(DEPDIR
)/$(am__dirstamp
)
1934 common
/target-newlib-syscall.
$(OBJEXT
): common
/$(am__dirstamp
) \
1935 common
/$(DEPDIR
)/$(am__dirstamp
)
1936 common
/version.
$(OBJEXT
): common
/$(am__dirstamp
) \
1937 common
/$(DEPDIR
)/$(am__dirstamp
)
1939 common
/libcommon.a
: $(common_libcommon_a_OBJECTS
) $(common_libcommon_a_DEPENDENCIES
) $(EXTRA_common_libcommon_a_DEPENDENCIES
) common
/$(am__dirstamp
)
1940 $(AM_V_at
)-rm -f common
/libcommon.a
1941 $(AM_V_AR
)$(common_libcommon_a_AR
) common
/libcommon.a
$(common_libcommon_a_OBJECTS
) $(common_libcommon_a_LIBADD
)
1942 $(AM_V_at
)$(RANLIB
) common
/libcommon.a
1943 igen
/$(am__dirstamp
):
1945 @
: > igen
/$(am__dirstamp
)
1946 igen
/$(DEPDIR
)/$(am__dirstamp
):
1947 @
$(MKDIR_P
) igen
/$(DEPDIR
)
1948 @
: > igen
/$(DEPDIR
)/$(am__dirstamp
)
1949 igen
/table.
$(OBJEXT
): igen
/$(am__dirstamp
) \
1950 igen
/$(DEPDIR
)/$(am__dirstamp
)
1951 igen
/lf.
$(OBJEXT
): igen
/$(am__dirstamp
) igen
/$(DEPDIR
)/$(am__dirstamp
)
1952 igen
/misc.
$(OBJEXT
): igen
/$(am__dirstamp
) \
1953 igen
/$(DEPDIR
)/$(am__dirstamp
)
1954 igen
/filter_host.
$(OBJEXT
): igen
/$(am__dirstamp
) \
1955 igen
/$(DEPDIR
)/$(am__dirstamp
)
1956 igen
/ld-decode.
$(OBJEXT
): igen
/$(am__dirstamp
) \
1957 igen
/$(DEPDIR
)/$(am__dirstamp
)
1958 igen
/ld-cache.
$(OBJEXT
): igen
/$(am__dirstamp
) \
1959 igen
/$(DEPDIR
)/$(am__dirstamp
)
1960 igen
/filter.
$(OBJEXT
): igen
/$(am__dirstamp
) \
1961 igen
/$(DEPDIR
)/$(am__dirstamp
)
1962 igen
/ld-insn.
$(OBJEXT
): igen
/$(am__dirstamp
) \
1963 igen
/$(DEPDIR
)/$(am__dirstamp
)
1964 igen
/gen-model.
$(OBJEXT
): igen
/$(am__dirstamp
) \
1965 igen
/$(DEPDIR
)/$(am__dirstamp
)
1966 igen
/gen-itable.
$(OBJEXT
): igen
/$(am__dirstamp
) \
1967 igen
/$(DEPDIR
)/$(am__dirstamp
)
1968 igen
/gen-icache.
$(OBJEXT
): igen
/$(am__dirstamp
) \
1969 igen
/$(DEPDIR
)/$(am__dirstamp
)
1970 igen
/gen-semantics.
$(OBJEXT
): igen
/$(am__dirstamp
) \
1971 igen
/$(DEPDIR
)/$(am__dirstamp
)
1972 igen
/gen-idecode.
$(OBJEXT
): igen
/$(am__dirstamp
) \
1973 igen
/$(DEPDIR
)/$(am__dirstamp
)
1974 igen
/gen-support.
$(OBJEXT
): igen
/$(am__dirstamp
) \
1975 igen
/$(DEPDIR
)/$(am__dirstamp
)
1976 igen
/gen-engine.
$(OBJEXT
): igen
/$(am__dirstamp
) \
1977 igen
/$(DEPDIR
)/$(am__dirstamp
)
1978 igen
/gen.
$(OBJEXT
): igen
/$(am__dirstamp
) \
1979 igen
/$(DEPDIR
)/$(am__dirstamp
)
1981 @SIM_ENABLE_IGEN_FALSE@igen
/libigen.a
: $(igen_libigen_a_OBJECTS
) $(igen_libigen_a_DEPENDENCIES
) $(EXTRA_igen_libigen_a_DEPENDENCIES
) igen
/$(am__dirstamp
)
1982 @SIM_ENABLE_IGEN_FALSE@
$(AM_V_at
)-rm -f igen
/libigen.a
1983 @SIM_ENABLE_IGEN_FALSE@
$(AM_V_AR
)$(igen_libigen_a_AR
) igen
/libigen.a
$(igen_libigen_a_OBJECTS
) $(igen_libigen_a_LIBADD
)
1984 @SIM_ENABLE_IGEN_FALSE@
$(AM_V_at
)$(RANLIB
) igen
/libigen.a
1986 clean-checkPROGRAMS
:
1987 @list
='$(check_PROGRAMS)'; test -n
"$$list" || exit
0; \
1988 echo
" rm -f" $$list; \
1989 rm -f
$$list || exit
$$?
; \
1990 test -n
"$(EXEEXT)" || exit
0; \
1991 list
=`for p in $$list; do echo "$$p"; done | sed 's/$(EXEEXT)$$//'`; \
1992 echo
" rm -f" $$list; \
1995 clean-noinstPROGRAMS
:
1996 @list
='$(noinst_PROGRAMS)'; test -n
"$$list" || exit
0; \
1997 echo
" rm -f" $$list; \
1998 rm -f
$$list || exit
$$?
; \
1999 test -n
"$(EXEEXT)" || exit
0; \
2000 list
=`for p in $$list; do echo "$$p"; done | sed 's/$(EXEEXT)$$//'`; \
2001 echo
" rm -f" $$list; \
2003 aarch64
/$(am__dirstamp
):
2005 @
: > aarch64
/$(am__dirstamp
)
2007 aarch64
/run
$(EXEEXT
): $(aarch64_run_OBJECTS
) $(aarch64_run_DEPENDENCIES
) $(EXTRA_aarch64_run_DEPENDENCIES
) aarch64
/$(am__dirstamp
)
2008 @
rm -f aarch64
/run
$(EXEEXT
)
2009 $(AM_V_CCLD
)$(LINK
) $(aarch64_run_OBJECTS
) $(aarch64_run_LDADD
) $(LIBS
)
2010 arm
/$(am__dirstamp
):
2012 @
: > arm
/$(am__dirstamp
)
2014 arm
/run
$(EXEEXT
): $(arm_run_OBJECTS
) $(arm_run_DEPENDENCIES
) $(EXTRA_arm_run_DEPENDENCIES
) arm
/$(am__dirstamp
)
2015 @
rm -f arm
/run
$(EXEEXT
)
2016 $(AM_V_CCLD
)$(LINK
) $(arm_run_OBJECTS
) $(arm_run_LDADD
) $(LIBS
)
2017 avr
/$(am__dirstamp
):
2019 @
: > avr
/$(am__dirstamp
)
2021 avr
/run
$(EXEEXT
): $(avr_run_OBJECTS
) $(avr_run_DEPENDENCIES
) $(EXTRA_avr_run_DEPENDENCIES
) avr
/$(am__dirstamp
)
2022 @
rm -f avr
/run
$(EXEEXT
)
2023 $(AM_V_CCLD
)$(LINK
) $(avr_run_OBJECTS
) $(avr_run_LDADD
) $(LIBS
)
2024 bfin
/$(am__dirstamp
):
2026 @
: > bfin
/$(am__dirstamp
)
2028 bfin
/run
$(EXEEXT
): $(bfin_run_OBJECTS
) $(bfin_run_DEPENDENCIES
) $(EXTRA_bfin_run_DEPENDENCIES
) bfin
/$(am__dirstamp
)
2029 @
rm -f bfin
/run
$(EXEEXT
)
2030 $(AM_V_CCLD
)$(LINK
) $(bfin_run_OBJECTS
) $(bfin_run_LDADD
) $(LIBS
)
2031 bpf
/$(am__dirstamp
):
2033 @
: > bpf
/$(am__dirstamp
)
2035 bpf
/run
$(EXEEXT
): $(bpf_run_OBJECTS
) $(bpf_run_DEPENDENCIES
) $(EXTRA_bpf_run_DEPENDENCIES
) bpf
/$(am__dirstamp
)
2036 @
rm -f bpf
/run
$(EXEEXT
)
2037 $(AM_V_CCLD
)$(LINK
) $(bpf_run_OBJECTS
) $(bpf_run_LDADD
) $(LIBS
)
2038 cr16
/$(am__dirstamp
):
2040 @
: > cr16
/$(am__dirstamp
)
2041 cr16
/$(DEPDIR
)/$(am__dirstamp
):
2042 @
$(MKDIR_P
) cr16
/$(DEPDIR
)
2043 @
: > cr16
/$(DEPDIR
)/$(am__dirstamp
)
2044 cr16
/gencode.
$(OBJEXT
): cr16
/$(am__dirstamp
) \
2045 cr16
/$(DEPDIR
)/$(am__dirstamp
)
2047 @SIM_ENABLE_ARCH_cr16_FALSE@cr16
/gencode
$(EXEEXT
): $(cr16_gencode_OBJECTS
) $(cr16_gencode_DEPENDENCIES
) $(EXTRA_cr16_gencode_DEPENDENCIES
) cr16
/$(am__dirstamp
)
2048 @SIM_ENABLE_ARCH_cr16_FALSE@ @
rm -f cr16
/gencode
$(EXEEXT
)
2049 @SIM_ENABLE_ARCH_cr16_FALSE@
$(AM_V_CCLD
)$(LINK
) $(cr16_gencode_OBJECTS
) $(cr16_gencode_LDADD
) $(LIBS
)
2051 cr16
/run
$(EXEEXT
): $(cr16_run_OBJECTS
) $(cr16_run_DEPENDENCIES
) $(EXTRA_cr16_run_DEPENDENCIES
) cr16
/$(am__dirstamp
)
2052 @
rm -f cr16
/run
$(EXEEXT
)
2053 $(AM_V_CCLD
)$(LINK
) $(cr16_run_OBJECTS
) $(cr16_run_LDADD
) $(LIBS
)
2054 cris
/$(am__dirstamp
):
2056 @
: > cris
/$(am__dirstamp
)
2058 cris
/run
$(EXEEXT
): $(cris_run_OBJECTS
) $(cris_run_DEPENDENCIES
) $(EXTRA_cris_run_DEPENDENCIES
) cris
/$(am__dirstamp
)
2059 @
rm -f cris
/run
$(EXEEXT
)
2060 $(AM_V_CCLD
)$(LINK
) $(cris_run_OBJECTS
) $(cris_run_LDADD
) $(LIBS
)
2061 cris
/$(DEPDIR
)/$(am__dirstamp
):
2062 @
$(MKDIR_P
) cris
/$(DEPDIR
)
2063 @
: > cris
/$(DEPDIR
)/$(am__dirstamp
)
2064 cris
/rvdummy.
$(OBJEXT
): cris
/$(am__dirstamp
) \
2065 cris
/$(DEPDIR
)/$(am__dirstamp
)
2067 cris
/rvdummy
$(EXEEXT
): $(cris_rvdummy_OBJECTS
) $(cris_rvdummy_DEPENDENCIES
) $(EXTRA_cris_rvdummy_DEPENDENCIES
) cris
/$(am__dirstamp
)
2068 @
rm -f cris
/rvdummy
$(EXEEXT
)
2069 $(AM_V_CCLD
)$(LINK
) $(cris_rvdummy_OBJECTS
) $(cris_rvdummy_LDADD
) $(LIBS
)
2070 d10v
/$(am__dirstamp
):
2072 @
: > d10v
/$(am__dirstamp
)
2073 d10v
/$(DEPDIR
)/$(am__dirstamp
):
2074 @
$(MKDIR_P
) d10v
/$(DEPDIR
)
2075 @
: > d10v
/$(DEPDIR
)/$(am__dirstamp
)
2076 d10v
/gencode.
$(OBJEXT
): d10v
/$(am__dirstamp
) \
2077 d10v
/$(DEPDIR
)/$(am__dirstamp
)
2079 @SIM_ENABLE_ARCH_d10v_FALSE@d10v
/gencode
$(EXEEXT
): $(d10v_gencode_OBJECTS
) $(d10v_gencode_DEPENDENCIES
) $(EXTRA_d10v_gencode_DEPENDENCIES
) d10v
/$(am__dirstamp
)
2080 @SIM_ENABLE_ARCH_d10v_FALSE@ @
rm -f d10v
/gencode
$(EXEEXT
)
2081 @SIM_ENABLE_ARCH_d10v_FALSE@
$(AM_V_CCLD
)$(LINK
) $(d10v_gencode_OBJECTS
) $(d10v_gencode_LDADD
) $(LIBS
)
2083 d10v
/run
$(EXEEXT
): $(d10v_run_OBJECTS
) $(d10v_run_DEPENDENCIES
) $(EXTRA_d10v_run_DEPENDENCIES
) d10v
/$(am__dirstamp
)
2084 @
rm -f d10v
/run
$(EXEEXT
)
2085 $(AM_V_CCLD
)$(LINK
) $(d10v_run_OBJECTS
) $(d10v_run_LDADD
) $(LIBS
)
2086 erc32
/$(am__dirstamp
):
2088 @
: > erc32
/$(am__dirstamp
)
2090 erc32
/run
$(EXEEXT
): $(erc32_run_OBJECTS
) $(erc32_run_DEPENDENCIES
) $(EXTRA_erc32_run_DEPENDENCIES
) erc32
/$(am__dirstamp
)
2091 @
rm -f erc32
/run
$(EXEEXT
)
2092 $(AM_V_CCLD
)$(LINK
) $(erc32_run_OBJECTS
) $(erc32_run_LDADD
) $(LIBS
)
2093 erc32
/$(DEPDIR
)/$(am__dirstamp
):
2094 @
$(MKDIR_P
) erc32
/$(DEPDIR
)
2095 @
: > erc32
/$(DEPDIR
)/$(am__dirstamp
)
2096 erc32
/sis.
$(OBJEXT
): erc32
/$(am__dirstamp
) \
2097 erc32
/$(DEPDIR
)/$(am__dirstamp
)
2099 @SIM_ENABLE_ARCH_erc32_FALSE@erc32
/sis
$(EXEEXT
): $(erc32_sis_OBJECTS
) $(erc32_sis_DEPENDENCIES
) $(EXTRA_erc32_sis_DEPENDENCIES
) erc32
/$(am__dirstamp
)
2100 @SIM_ENABLE_ARCH_erc32_FALSE@ @
rm -f erc32
/sis
$(EXEEXT
)
2101 @SIM_ENABLE_ARCH_erc32_FALSE@
$(AM_V_CCLD
)$(LINK
) $(erc32_sis_OBJECTS
) $(erc32_sis_LDADD
) $(LIBS
)
2102 example-synacor
/$(am__dirstamp
):
2103 @
$(MKDIR_P
) example-synacor
2104 @
: > example-synacor
/$(am__dirstamp
)
2106 example-synacor
/run
$(EXEEXT
): $(example_synacor_run_OBJECTS
) $(example_synacor_run_DEPENDENCIES
) $(EXTRA_example_synacor_run_DEPENDENCIES
) example-synacor
/$(am__dirstamp
)
2107 @
rm -f example-synacor
/run
$(EXEEXT
)
2108 $(AM_V_CCLD
)$(LINK
) $(example_synacor_run_OBJECTS
) $(example_synacor_run_LDADD
) $(LIBS
)
2109 frv
/$(am__dirstamp
):
2111 @
: > frv
/$(am__dirstamp
)
2113 frv
/run
$(EXEEXT
): $(frv_run_OBJECTS
) $(frv_run_DEPENDENCIES
) $(EXTRA_frv_run_DEPENDENCIES
) frv
/$(am__dirstamp
)
2114 @
rm -f frv
/run
$(EXEEXT
)
2115 $(AM_V_CCLD
)$(LINK
) $(frv_run_OBJECTS
) $(frv_run_LDADD
) $(LIBS
)
2116 ft32
/$(am__dirstamp
):
2118 @
: > ft32
/$(am__dirstamp
)
2120 ft32
/run
$(EXEEXT
): $(ft32_run_OBJECTS
) $(ft32_run_DEPENDENCIES
) $(EXTRA_ft32_run_DEPENDENCIES
) ft32
/$(am__dirstamp
)
2121 @
rm -f ft32
/run
$(EXEEXT
)
2122 $(AM_V_CCLD
)$(LINK
) $(ft32_run_OBJECTS
) $(ft32_run_LDADD
) $(LIBS
)
2123 h8300
/$(am__dirstamp
):
2125 @
: > h8300
/$(am__dirstamp
)
2127 h8300
/run
$(EXEEXT
): $(h8300_run_OBJECTS
) $(h8300_run_DEPENDENCIES
) $(EXTRA_h8300_run_DEPENDENCIES
) h8300
/$(am__dirstamp
)
2128 @
rm -f h8300
/run
$(EXEEXT
)
2129 $(AM_V_CCLD
)$(LINK
) $(h8300_run_OBJECTS
) $(h8300_run_LDADD
) $(LIBS
)
2131 igen
/filter$(EXEEXT
): $(igen_filter_OBJECTS
) $(igen_filter_DEPENDENCIES
) $(EXTRA_igen_filter_DEPENDENCIES
) igen
/$(am__dirstamp
)
2132 @
rm -f igen
/filter$(EXEEXT
)
2133 $(AM_V_CCLD
)$(LINK
) $(igen_filter_OBJECTS
) $(igen_filter_LDADD
) $(LIBS
)
2135 igen
/gen
$(EXEEXT
): $(igen_gen_OBJECTS
) $(igen_gen_DEPENDENCIES
) $(EXTRA_igen_gen_DEPENDENCIES
) igen
/$(am__dirstamp
)
2136 @
rm -f igen
/gen
$(EXEEXT
)
2137 $(AM_V_CCLD
)$(LINK
) $(igen_gen_OBJECTS
) $(igen_gen_LDADD
) $(LIBS
)
2138 igen
/igen.
$(OBJEXT
): igen
/$(am__dirstamp
) \
2139 igen
/$(DEPDIR
)/$(am__dirstamp
)
2141 @SIM_ENABLE_IGEN_FALSE@igen
/igen
$(EXEEXT
): $(igen_igen_OBJECTS
) $(igen_igen_DEPENDENCIES
) $(EXTRA_igen_igen_DEPENDENCIES
) igen
/$(am__dirstamp
)
2142 @SIM_ENABLE_IGEN_FALSE@ @
rm -f igen
/igen
$(EXEEXT
)
2143 @SIM_ENABLE_IGEN_FALSE@
$(AM_V_CCLD
)$(LINK
) $(igen_igen_OBJECTS
) $(igen_igen_LDADD
) $(LIBS
)
2145 igen
/ld-cache
$(EXEEXT
): $(igen_ld_cache_OBJECTS
) $(igen_ld_cache_DEPENDENCIES
) $(EXTRA_igen_ld_cache_DEPENDENCIES
) igen
/$(am__dirstamp
)
2146 @
rm -f igen
/ld-cache
$(EXEEXT
)
2147 $(AM_V_CCLD
)$(LINK
) $(igen_ld_cache_OBJECTS
) $(igen_ld_cache_LDADD
) $(LIBS
)
2149 igen
/ld-decode
$(EXEEXT
): $(igen_ld_decode_OBJECTS
) $(igen_ld_decode_DEPENDENCIES
) $(EXTRA_igen_ld_decode_DEPENDENCIES
) igen
/$(am__dirstamp
)
2150 @
rm -f igen
/ld-decode
$(EXEEXT
)
2151 $(AM_V_CCLD
)$(LINK
) $(igen_ld_decode_OBJECTS
) $(igen_ld_decode_LDADD
) $(LIBS
)
2153 igen
/ld-insn
$(EXEEXT
): $(igen_ld_insn_OBJECTS
) $(igen_ld_insn_DEPENDENCIES
) $(EXTRA_igen_ld_insn_DEPENDENCIES
) igen
/$(am__dirstamp
)
2154 @
rm -f igen
/ld-insn
$(EXEEXT
)
2155 $(AM_V_CCLD
)$(LINK
) $(igen_ld_insn_OBJECTS
) $(igen_ld_insn_LDADD
) $(LIBS
)
2157 igen
/table
$(EXEEXT
): $(igen_table_OBJECTS
) $(igen_table_DEPENDENCIES
) $(EXTRA_igen_table_DEPENDENCIES
) igen
/$(am__dirstamp
)
2158 @
rm -f igen
/table
$(EXEEXT
)
2159 $(AM_V_CCLD
)$(LINK
) $(igen_table_OBJECTS
) $(igen_table_LDADD
) $(LIBS
)
2160 iq2000
/$(am__dirstamp
):
2162 @
: > iq2000
/$(am__dirstamp
)
2164 iq2000
/run
$(EXEEXT
): $(iq2000_run_OBJECTS
) $(iq2000_run_DEPENDENCIES
) $(EXTRA_iq2000_run_DEPENDENCIES
) iq2000
/$(am__dirstamp
)
2165 @
rm -f iq2000
/run
$(EXEEXT
)
2166 $(AM_V_CCLD
)$(LINK
) $(iq2000_run_OBJECTS
) $(iq2000_run_LDADD
) $(LIBS
)
2167 lm32
/$(am__dirstamp
):
2169 @
: > lm32
/$(am__dirstamp
)
2171 lm32
/run
$(EXEEXT
): $(lm32_run_OBJECTS
) $(lm32_run_DEPENDENCIES
) $(EXTRA_lm32_run_DEPENDENCIES
) lm32
/$(am__dirstamp
)
2172 @
rm -f lm32
/run
$(EXEEXT
)
2173 $(AM_V_CCLD
)$(LINK
) $(lm32_run_OBJECTS
) $(lm32_run_LDADD
) $(LIBS
)
2174 m32c
/$(am__dirstamp
):
2176 @
: > m32c
/$(am__dirstamp
)
2177 m32c
/$(DEPDIR
)/$(am__dirstamp
):
2178 @
$(MKDIR_P
) m32c
/$(DEPDIR
)
2179 @
: > m32c
/$(DEPDIR
)/$(am__dirstamp
)
2180 m32c
/opc2c.
$(OBJEXT
): m32c
/$(am__dirstamp
) \
2181 m32c
/$(DEPDIR
)/$(am__dirstamp
)
2183 @SIM_ENABLE_ARCH_m32c_FALSE@m32c
/opc2c
$(EXEEXT
): $(m32c_opc2c_OBJECTS
) $(m32c_opc2c_DEPENDENCIES
) $(EXTRA_m32c_opc2c_DEPENDENCIES
) m32c
/$(am__dirstamp
)
2184 @SIM_ENABLE_ARCH_m32c_FALSE@ @
rm -f m32c
/opc2c
$(EXEEXT
)
2185 @SIM_ENABLE_ARCH_m32c_FALSE@
$(AM_V_CCLD
)$(LINK
) $(m32c_opc2c_OBJECTS
) $(m32c_opc2c_LDADD
) $(LIBS
)
2187 m32c
/run
$(EXEEXT
): $(m32c_run_OBJECTS
) $(m32c_run_DEPENDENCIES
) $(EXTRA_m32c_run_DEPENDENCIES
) m32c
/$(am__dirstamp
)
2188 @
rm -f m32c
/run
$(EXEEXT
)
2189 $(AM_V_CCLD
)$(LINK
) $(m32c_run_OBJECTS
) $(m32c_run_LDADD
) $(LIBS
)
2190 m32r
/$(am__dirstamp
):
2192 @
: > m32r
/$(am__dirstamp
)
2194 m32r
/run
$(EXEEXT
): $(m32r_run_OBJECTS
) $(m32r_run_DEPENDENCIES
) $(EXTRA_m32r_run_DEPENDENCIES
) m32r
/$(am__dirstamp
)
2195 @
rm -f m32r
/run
$(EXEEXT
)
2196 $(AM_V_CCLD
)$(LINK
) $(m32r_run_OBJECTS
) $(m32r_run_LDADD
) $(LIBS
)
2197 m68hc11
/$(am__dirstamp
):
2199 @
: > m68hc11
/$(am__dirstamp
)
2200 m68hc11
/$(DEPDIR
)/$(am__dirstamp
):
2201 @
$(MKDIR_P
) m68hc11
/$(DEPDIR
)
2202 @
: > m68hc11
/$(DEPDIR
)/$(am__dirstamp
)
2203 m68hc11
/gencode.
$(OBJEXT
): m68hc11
/$(am__dirstamp
) \
2204 m68hc11
/$(DEPDIR
)/$(am__dirstamp
)
2206 @SIM_ENABLE_ARCH_m68hc11_FALSE@m68hc11
/gencode
$(EXEEXT
): $(m68hc11_gencode_OBJECTS
) $(m68hc11_gencode_DEPENDENCIES
) $(EXTRA_m68hc11_gencode_DEPENDENCIES
) m68hc11
/$(am__dirstamp
)
2207 @SIM_ENABLE_ARCH_m68hc11_FALSE@ @
rm -f m68hc11
/gencode
$(EXEEXT
)
2208 @SIM_ENABLE_ARCH_m68hc11_FALSE@
$(AM_V_CCLD
)$(LINK
) $(m68hc11_gencode_OBJECTS
) $(m68hc11_gencode_LDADD
) $(LIBS
)
2210 m68hc11
/run
$(EXEEXT
): $(m68hc11_run_OBJECTS
) $(m68hc11_run_DEPENDENCIES
) $(EXTRA_m68hc11_run_DEPENDENCIES
) m68hc11
/$(am__dirstamp
)
2211 @
rm -f m68hc11
/run
$(EXEEXT
)
2212 $(AM_V_CCLD
)$(LINK
) $(m68hc11_run_OBJECTS
) $(m68hc11_run_LDADD
) $(LIBS
)
2213 mcore
/$(am__dirstamp
):
2215 @
: > mcore
/$(am__dirstamp
)
2217 mcore
/run
$(EXEEXT
): $(mcore_run_OBJECTS
) $(mcore_run_DEPENDENCIES
) $(EXTRA_mcore_run_DEPENDENCIES
) mcore
/$(am__dirstamp
)
2218 @
rm -f mcore
/run
$(EXEEXT
)
2219 $(AM_V_CCLD
)$(LINK
) $(mcore_run_OBJECTS
) $(mcore_run_LDADD
) $(LIBS
)
2220 microblaze
/$(am__dirstamp
):
2221 @
$(MKDIR_P
) microblaze
2222 @
: > microblaze
/$(am__dirstamp
)
2224 microblaze
/run
$(EXEEXT
): $(microblaze_run_OBJECTS
) $(microblaze_run_DEPENDENCIES
) $(EXTRA_microblaze_run_DEPENDENCIES
) microblaze
/$(am__dirstamp
)
2225 @
rm -f microblaze
/run
$(EXEEXT
)
2226 $(AM_V_CCLD
)$(LINK
) $(microblaze_run_OBJECTS
) $(microblaze_run_LDADD
) $(LIBS
)
2227 mips
/$(am__dirstamp
):
2229 @
: > mips
/$(am__dirstamp
)
2231 mips
/run
$(EXEEXT
): $(mips_run_OBJECTS
) $(mips_run_DEPENDENCIES
) $(EXTRA_mips_run_DEPENDENCIES
) mips
/$(am__dirstamp
)
2232 @
rm -f mips
/run
$(EXEEXT
)
2233 $(AM_V_CCLD
)$(LINK
) $(mips_run_OBJECTS
) $(mips_run_LDADD
) $(LIBS
)
2234 mn10300
/$(am__dirstamp
):
2236 @
: > mn10300
/$(am__dirstamp
)
2238 mn10300
/run
$(EXEEXT
): $(mn10300_run_OBJECTS
) $(mn10300_run_DEPENDENCIES
) $(EXTRA_mn10300_run_DEPENDENCIES
) mn10300
/$(am__dirstamp
)
2239 @
rm -f mn10300
/run
$(EXEEXT
)
2240 $(AM_V_CCLD
)$(LINK
) $(mn10300_run_OBJECTS
) $(mn10300_run_LDADD
) $(LIBS
)
2241 moxie
/$(am__dirstamp
):
2243 @
: > moxie
/$(am__dirstamp
)
2245 moxie
/run
$(EXEEXT
): $(moxie_run_OBJECTS
) $(moxie_run_DEPENDENCIES
) $(EXTRA_moxie_run_DEPENDENCIES
) moxie
/$(am__dirstamp
)
2246 @
rm -f moxie
/run
$(EXEEXT
)
2247 $(AM_V_CCLD
)$(LINK
) $(moxie_run_OBJECTS
) $(moxie_run_LDADD
) $(LIBS
)
2248 msp430
/$(am__dirstamp
):
2250 @
: > msp430
/$(am__dirstamp
)
2252 msp430
/run
$(EXEEXT
): $(msp430_run_OBJECTS
) $(msp430_run_DEPENDENCIES
) $(EXTRA_msp430_run_DEPENDENCIES
) msp430
/$(am__dirstamp
)
2253 @
rm -f msp430
/run
$(EXEEXT
)
2254 $(AM_V_CCLD
)$(LINK
) $(msp430_run_OBJECTS
) $(msp430_run_LDADD
) $(LIBS
)
2255 or1k
/$(am__dirstamp
):
2257 @
: > or1k
/$(am__dirstamp
)
2259 or1k
/run
$(EXEEXT
): $(or1k_run_OBJECTS
) $(or1k_run_DEPENDENCIES
) $(EXTRA_or1k_run_DEPENDENCIES
) or1k
/$(am__dirstamp
)
2260 @
rm -f or1k
/run
$(EXEEXT
)
2261 $(AM_V_CCLD
)$(LINK
) $(or1k_run_OBJECTS
) $(or1k_run_LDADD
) $(LIBS
)
2262 ppc
/$(am__dirstamp
):
2264 @
: > ppc
/$(am__dirstamp
)
2265 ppc
/$(DEPDIR
)/$(am__dirstamp
):
2266 @
$(MKDIR_P
) ppc
/$(DEPDIR
)
2267 @
: > ppc
/$(DEPDIR
)/$(am__dirstamp
)
2268 ppc
/psim.
$(OBJEXT
): ppc
/$(am__dirstamp
) ppc
/$(DEPDIR
)/$(am__dirstamp
)
2270 @SIM_ENABLE_ARCH_ppc_FALSE@ppc
/psim
$(EXEEXT
): $(ppc_psim_OBJECTS
) $(ppc_psim_DEPENDENCIES
) $(EXTRA_ppc_psim_DEPENDENCIES
) ppc
/$(am__dirstamp
)
2271 @SIM_ENABLE_ARCH_ppc_FALSE@ @
rm -f ppc
/psim
$(EXEEXT
)
2272 @SIM_ENABLE_ARCH_ppc_FALSE@
$(AM_V_CCLD
)$(LINK
) $(ppc_psim_OBJECTS
) $(ppc_psim_LDADD
) $(LIBS
)
2274 ppc
/run
$(EXEEXT
): $(ppc_run_OBJECTS
) $(ppc_run_DEPENDENCIES
) $(EXTRA_ppc_run_DEPENDENCIES
) ppc
/$(am__dirstamp
)
2275 @
rm -f ppc
/run
$(EXEEXT
)
2276 $(AM_V_CCLD
)$(LINK
) $(ppc_run_OBJECTS
) $(ppc_run_LDADD
) $(LIBS
)
2277 pru
/$(am__dirstamp
):
2279 @
: > pru
/$(am__dirstamp
)
2281 pru
/run
$(EXEEXT
): $(pru_run_OBJECTS
) $(pru_run_DEPENDENCIES
) $(EXTRA_pru_run_DEPENDENCIES
) pru
/$(am__dirstamp
)
2282 @
rm -f pru
/run
$(EXEEXT
)
2283 $(AM_V_CCLD
)$(LINK
) $(pru_run_OBJECTS
) $(pru_run_LDADD
) $(LIBS
)
2284 riscv
/$(am__dirstamp
):
2286 @
: > riscv
/$(am__dirstamp
)
2288 riscv
/run
$(EXEEXT
): $(riscv_run_OBJECTS
) $(riscv_run_DEPENDENCIES
) $(EXTRA_riscv_run_DEPENDENCIES
) riscv
/$(am__dirstamp
)
2289 @
rm -f riscv
/run
$(EXEEXT
)
2290 $(AM_V_CCLD
)$(LINK
) $(riscv_run_OBJECTS
) $(riscv_run_LDADD
) $(LIBS
)
2291 rl78
/$(am__dirstamp
):
2293 @
: > rl78
/$(am__dirstamp
)
2295 rl78
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/$(am__dirstamp
)
3052 -rm -f rl78
/$(am__dirstamp
)
3053 -rm -f rx
/$(am__dirstamp
)
3054 -rm -f sh
/$(DEPDIR
)/$(am__dirstamp
)
3055 -rm -f sh
/$(am__dirstamp
)
3056 -rm -f testsuite
/common
/$(DEPDIR
)/$(am__dirstamp
)
3057 -rm -f testsuite
/common
/$(am__dirstamp
)
3058 -rm -f v850
/$(am__dirstamp
)
3059 -test -z
"$(DISTCLEANFILES)" ||
rm -f
$(DISTCLEANFILES
)
3061 maintainer-clean-generic
:
3062 @echo
"This command is intended for maintainers to use"
3063 @echo
"it deletes files that may require special tools to rebuild."
3064 clean: clean-recursive
3066 clean-am
: clean-checkPROGRAMS clean-generic clean-libtool \
3067 clean-noinstLIBRARIES clean-noinstPROGRAMS mostlyclean-am
3069 distclean: distclean-recursive
3070 -rm -f
$(am__CONFIG_DISTCLEAN_FILES
)
3071 -rm -rf common
/$(DEPDIR
) cr16
/$(DEPDIR
) cris
/$(DEPDIR
) d10v
/$(DEPDIR
) erc32
/$(DEPDIR
) igen
/$(DEPDIR
) m32c
/$(DEPDIR
) m68hc11
/$(DEPDIR
) ppc
/$(DEPDIR
) sh
/$(DEPDIR
) testsuite
/common
/$(DEPDIR
)
3073 distclean-am
: clean-am distclean-DEJAGNU distclean-compile \
3074 distclean-generic distclean-hdr distclean-libtool \
3081 html
: html-recursive
3085 info: info-recursive
3089 install-data-am
: install-armdocDATA install-data-local install-dtbDATA \
3090 install-erc32docDATA install-frvdocDATA install-or1kdocDATA \
3091 install-pkgincludeHEADERS install-ppcdocDATA install-rxdocDATA
3093 install-dvi
: install-dvi-recursive
3097 install-exec-am
: install-exec-local
3099 install-html
: install-html-recursive
3103 install-info
: install-info-recursive
3109 install-pdf
: install-pdf-recursive
3113 install-ps
: install-ps-recursive
3119 maintainer-clean
: maintainer-clean-recursive
3120 -rm -f
$(am__CONFIG_DISTCLEAN_FILES
)
3121 -rm -rf
$(top_srcdir
)/autom4te.cache
3122 -rm -rf common
/$(DEPDIR
) cr16
/$(DEPDIR
) cris
/$(DEPDIR
) d10v
/$(DEPDIR
) erc32
/$(DEPDIR
) igen
/$(DEPDIR
) m32c
/$(DEPDIR
) m68hc11
/$(DEPDIR
) ppc
/$(DEPDIR
) sh
/$(DEPDIR
) testsuite
/common
/$(DEPDIR
)
3124 maintainer-clean-am
: distclean-am maintainer-clean-generic
3126 mostlyclean: mostlyclean-recursive
3128 mostlyclean-am
: mostlyclean-compile mostlyclean-generic \
3139 uninstall-am
: uninstall-armdocDATA uninstall-dtbDATA \
3140 uninstall-erc32docDATA uninstall-frvdocDATA uninstall-local \
3141 uninstall-or1kdocDATA uninstall-pkgincludeHEADERS \
3142 uninstall-ppcdocDATA uninstall-rxdocDATA
3144 .MAKE
: $(am__recursive_targets
) all check-am install-am install-strip
3146 .PHONY
: $(am__recursive_targets
) CTAGS GTAGS TAGS
all all-am \
3147 am--refresh
check check-DEJAGNU check-TESTS check-am
clean \
3148 clean-checkPROGRAMS clean-cscope clean-generic clean-libtool \
3149 clean-noinstLIBRARIES clean-noinstPROGRAMS cscope \
3150 cscopelist-am ctags ctags-am
distclean distclean-DEJAGNU \
3151 distclean-compile distclean-generic distclean-hdr \
3152 distclean-libtool distclean-tags
dvi dvi-am html html-am
info \
3153 info-am
install install-am install-armdocDATA install-data \
3154 install-data-am install-data-local install-dtbDATA install-dvi \
3155 install-dvi-am install-erc32docDATA install-exec \
3156 install-exec-am install-exec-local install-frvdocDATA \
3157 install-html install-html-am install-info install-info-am \
3158 install-man install-or1kdocDATA install-pdf install-pdf-am \
3159 install-pkgincludeHEADERS install-ppcdocDATA install-ps \
3160 install-ps-am install-rxdocDATA install-strip
installcheck \
3161 installcheck-am
installdirs installdirs-am maintainer-clean \
3162 maintainer-clean-generic
mostlyclean mostlyclean-compile \
3163 mostlyclean-generic mostlyclean-libtool pdf pdf-am ps ps-am \
3164 recheck
tags tags-am
uninstall uninstall-am \
3165 uninstall-armdocDATA uninstall-dtbDATA uninstall-erc32docDATA \
3166 uninstall-frvdocDATA uninstall-local uninstall-or1kdocDATA \
3167 uninstall-pkgincludeHEADERS uninstall-ppcdocDATA \
3172 @include_makefile@
$(GNULIB_PARENT_DIR
)/gnulib
/Makefile.gnulib.inc
3174 # Generate target constants for newlib/libgloss from its source tree.
3175 # This file is shipped with distributions so we build in the source dir.
3176 # Use `make nltvals' to rebuild.
3179 $(srccom
)/gennltvals.py
--cpp "$(CPP)"
3181 common
/version.c
: common
/version.c-stamp
; @true
3182 common
/version.c-stamp
: $(srcroot
)/gdb
/version.in
$(srcroot
)/bfd
/version.h
$(srcdir)/common
/create-version.sh
3183 $(AM_V_GEN
)$(SHELL
) $(srcdir)/common
/create-version.sh
$(srcroot
)/gdb
$@.tmp
3184 $(AM_V_at
)$(SHELL
) $(srcroot
)/move-if-change
$@.tmp
$(@
:-stamp
=)
3187 # FIXME This is one very simple-minded way of generating the file hw-config.h.
3188 %/hw-config.h
: %/stamp-hw
; @true
3189 %/stamp-hw
: Makefile
3190 $(AM_V_GEN
)set
-e
; \
3192 sim_hw
="$(SIM_HW_DEVICES) $($(@D)_SIM_EXTRA_HW_DEVICES)" ; \
3193 echo
"/* generated by Makefile */" ; \
3194 printf
"extern const struct hw_descriptor dv_%s_descriptor[];\n" $$sim_hw ; \
3195 echo
"const struct hw_descriptor * const hw_descriptors[] = {" ; \
3196 printf
" dv_%s_descriptor,\n" $$sim_hw ; \
3200 $(SHELL
) $(srcroot
)/move-if-change
$@.tmp
$(@D
)/hw-config.h
; \
3202 .PRECIOUS
: %/stamp-hw
3204 # Alias for developers.
3205 @SIM_ENABLE_IGEN_TRUE@igen
: $(IGEN
)
3207 # These rules are copied from automake, but tweaked to use FOR_BUILD variables.
3208 @SIM_ENABLE_IGEN_TRUE@igen
/libigen.a
: $(igen_libigen_a_OBJECTS
) $(igen_libigen_a_DEPENDENCIES
) $(EXTRA_igen_libigen_a_DEPENDENCIES
) igen
/$(am__dirstamp
)
3209 @SIM_ENABLE_IGEN_TRUE@
$(AM_V_at
)-rm -f
$@
3210 @SIM_ENABLE_IGEN_TRUE@
$(AM_V_AR
)$(AR_FOR_BUILD
) $(ARFLAGS
) $@
$(igen_libigen_a_OBJECTS
) $(igen_libigen_a_LIBADD
)
3211 @SIM_ENABLE_IGEN_TRUE@
$(AM_V_at
)$(RANLIB_FOR_BUILD
) $@
3213 @SIM_ENABLE_IGEN_TRUE@igen
/igen
$(EXEEXT
): $(igen_igen_OBJECTS
) $(igen_igen_DEPENDENCIES
) igen
/$(am__dirstamp
)
3214 @SIM_ENABLE_IGEN_TRUE@
$(AM_V_CCLD
)$(LINK_FOR_BUILD
) $(igen_igen_OBJECTS
) $(igen_igen_LDADD
)
3216 # igen is a build-time only tool. Override the default rules for it.
3217 @SIM_ENABLE_IGEN_TRUE@igen
/%.o
: igen
/%.c
3218 @SIM_ENABLE_IGEN_TRUE@
$(AM_V_CC
)$(COMPILE_FOR_BUILD
) -c
$< -o
$@
3220 # Build some of the files in standalone mode for developers of igen itself.
3221 @SIM_ENABLE_IGEN_TRUE@igen
/%-main.o
: igen
/%.c
3222 @SIM_ENABLE_IGEN_TRUE@
$(AM_V_CC
)$(COMPILE_FOR_BUILD
) -DMAIN
-c
$< -o
$@
3224 site-sim-config.exp
: Makefile
3226 echo
"set SIM_PRIMARY_TARGET \"$(SIM_PRIMARY_TARGET)\""; \
3227 echo
"set builddir \"$(builddir)\""; \
3228 echo
"set srcdir \"$(srcdir)/testsuite\""; \
3229 $(foreach V
,$(SIM_TOOLCHAIN_VARS
),echo
"set $(V) \"$($(V))\"";) \
3232 # Ignore dirs that only contain configuration settings.
3233 check/.
/config
/%.exp
: ; @true
3234 check/config
/%.exp
: ; @true
3235 check/.
/lib
/%.exp
: ; @true
3236 check/lib
/%.exp
: ; @true
3239 $(AM_V_at
)mkdir
-p testsuite
/$*
3240 $(AM_V_RUNTEST
)$(DO_RUNTEST
) --objdir testsuite
/$* --outdir testsuite
/$* $*.exp
3242 check-DEJAGNU-parallel
:
3244 set
-- `cd $(srcdir)/testsuite && find . -name '*.exp' -printf '%P\n' | sed 's:[.]exp$$::'`; \
3245 $(MAKE
) -k
`printf 'check/%s.exp ' $$@`; \
3247 set
-- `printf 'testsuite/%s/ ' $$@`; \
3248 $(SHELL
) $(srcroot
)/contrib
/dg-extract-results.sh \
3249 `find $$@ -maxdepth 1 -name testrun.sum 2>/dev/null | sort` > testrun.sum
; \
3250 $(SHELL
) $(srcroot
)/contrib
/dg-extract-results.sh
-L \
3251 `find $$@ -maxdepth 1 -name testrun.log 2>/dev/null | sort` > testrun.log
; \
3253 $(SED
) -n
'/^.*===.*Summary.*===/,$$p' testrun.sum
; \
3256 check-DEJAGNU-single
:
3257 $(AM_V_RUNTEST
)$(DO_RUNTEST
)
3259 # If running a single job, invoking runtest once is faster & has nicer output.
3260 check-DEJAGNU
: site.exp
3261 $(AM_V_at
)(set
-e
; \
3262 EXPECT
=${EXPECT} ; export EXPECT
; \
3263 runtest
=$(RUNTEST
); \
3264 if
$(SHELL
) -c
"$$runtest --version" > /dev
/null
2>&1; then \
3265 case
"$(MAKEFLAGS)" in \
3266 *-j
*) $(MAKE
) check-DEJAGNU-parallel
;; \
3267 *) $(MAKE
) check-DEJAGNU-single
;; \
3270 echo
"WARNING: could not find \`runtest'" 1>&2; :;\
3273 # These tests are build-time only tools. Override the default rules for them.
3274 testsuite
/common
/%.o
: testsuite
/common
/%.c
3275 $(AM_V_CC
)$(COMPILE_FOR_BUILD
) $(testsuite_common_CPPFLAGS
) -c
$< -o
$@
3277 testsuite
/common
/alu-tst
$(EXEEXT
): $(testsuite_common_alu_tst_OBJECTS
) $(testsuite_common_alu_tst_DEPENDENCIES
) testsuite
/common
/$(am__dirstamp
)
3278 $(AM_V_CCLD
)$(LINK_FOR_BUILD
) $(testsuite_common_alu_tst_OBJECTS
) $(testsuite_common_alu_tst_LDADD
)
3280 testsuite
/common
/fpu-tst
$(EXEEXT
): $(testsuite_common_fpu_tst_OBJECTS
) $(testsuite_common_fpu_tst_DEPENDENCIES
) testsuite
/common
/$(am__dirstamp
)
3281 $(AM_V_CCLD
)$(LINK_FOR_BUILD
) $(testsuite_common_fpu_tst_OBJECTS
) $(testsuite_common_fpu_tst_LDADD
)
3283 testsuite
/common
/bits-gen
$(EXEEXT
): $(testsuite_common_bits_gen_OBJECTS
) $(testsuite_common_bits_gen_DEPENDENCIES
) testsuite
/common
/$(am__dirstamp
)
3284 $(AM_V_CCLD
)$(LINK_FOR_BUILD
) $(testsuite_common_bits_gen_OBJECTS
) $(testsuite_common_bits_gen_LDADD
)
3286 testsuite
/common
/bits32m0
$(EXEEXT
): $(testsuite_common_bits32m0_OBJECTS
) $(testsuite_common_bits32m0_DEPENDENCIES
) testsuite
/common
/$(am__dirstamp
)
3287 $(AM_V_CCLD
)$(LINK_FOR_BUILD
) $(testsuite_common_bits32m0_OBJECTS
) $(testsuite_common_bits32m0_LDADD
)
3289 testsuite
/common
/bits32m0.c
: testsuite
/common
/bits-gen
$(EXEEXT
) testsuite
/common
/bits-tst.c
3290 $(AM_V_GEN
)$< 32 0 big
> $@.tmp
3291 $(AM_V_at
)cat
$(srcdir)/testsuite
/common
/bits-tst.c
>> $@.tmp
3292 $(AM_V_at
)mv
$@.tmp
$@
3294 testsuite
/common
/bits32m31
$(EXEEXT
): $(testsuite_common_bits32m31_OBJECTS
) $(testsuite_common_bits32m31_DEPENDENCIES
) testsuite
/common
/$(am__dirstamp
)
3295 $(AM_V_CCLD
)$(LINK_FOR_BUILD
) $(testsuite_common_bits32m31_OBJECTS
) $(testsuite_common_bits32m31_LDADD
)
3297 testsuite
/common
/bits32m31.c
: testsuite
/common
/bits-gen
$(EXEEXT
) testsuite
/common
/bits-tst.c
3298 $(AM_V_GEN
)$< 32 31 little
> $@.tmp
3299 $(AM_V_at
)cat
$(srcdir)/testsuite
/common
/bits-tst.c
>> $@.tmp
3300 $(AM_V_at
)mv
$@.tmp
$@
3302 testsuite
/common
/bits64m0
$(EXEEXT
): $(testsuite_common_bits64m0_OBJECTS
) $(testsuite_common_bits64m0_DEPENDENCIES
) testsuite
/common
/$(am__dirstamp
)
3303 $(AM_V_CCLD
)$(LINK_FOR_BUILD
) $(testsuite_common_bits64m0_OBJECTS
) $(testsuite_common_bits64m0_LDADD
)
3305 testsuite
/common
/bits64m0.c
: testsuite
/common
/bits-gen
$(EXEEXT
) testsuite
/common
/bits-tst.c
3306 $(AM_V_GEN
)$< 64 0 big
> $@.tmp
3307 $(AM_V_at
)cat
$(srcdir)/testsuite
/common
/bits-tst.c
>> $@.tmp
3308 $(AM_V_at
)mv
$@.tmp
$@
3310 testsuite
/common
/bits64m63
$(EXEEXT
): $(testsuite_common_bits64m63_OBJECTS
) $(testsuite_common_bits64m63_DEPENDENCIES
) testsuite
/common
/$(am__dirstamp
)
3311 $(AM_V_CCLD
)$(LINK_FOR_BUILD
) $(testsuite_common_bits64m63_OBJECTS
) $(testsuite_common_bits64m63_LDADD
)
3313 testsuite
/common
/bits64m63.c
: testsuite
/common
/bits-gen
$(EXEEXT
) testsuite
/common
/bits-tst.c
3314 $(AM_V_GEN
)$< 64 63 little
> $@.tmp
3315 $(AM_V_at
)cat
$(srcdir)/testsuite
/common
/bits-tst.c
>> $@.tmp
3316 $(AM_V_at
)mv
$@.tmp
$@
3318 @SIM_ENABLE_ARCH_bfin_TRUE@bfin
/linux-fixed-code.h
: @MAINT@
$(srcdir)/bfin
/linux-fixed-code.s bfin
/local.mk bfin
/$(am__dirstamp
)
3319 @SIM_ENABLE_ARCH_bfin_TRUE@
$(AM_V_GEN
)$(AS_FOR_TARGET_BFIN
) $(srcdir)/bfin
/linux-fixed-code.s
-o bfin
/linux-fixed-code.o
3320 @SIM_ENABLE_ARCH_bfin_TRUE@
$(AM_V_at
)(\
3321 @SIM_ENABLE_ARCH_bfin_TRUE@ set
-e
; \
3322 @SIM_ENABLE_ARCH_bfin_TRUE@ echo
"/* DO NOT EDIT: Autogenerated from linux-fixed-code.s. */"; \
3323 @SIM_ENABLE_ARCH_bfin_TRUE@ echo
"static const unsigned char bfin_linux_fixed_code[] ="; \
3324 @SIM_ENABLE_ARCH_bfin_TRUE@ echo
"{"; \
3325 @SIM_ENABLE_ARCH_bfin_TRUE@
$(OBJDUMP_FOR_TARGET_BFIN
) -d
-z bfin
/linux-fixed-code.o
> $@.dis
; \
3326 @SIM_ENABLE_ARCH_bfin_TRUE@ sed
-n \
3327 @SIM_ENABLE_ARCH_bfin_TRUE@
-e
's:^[^ ]* :0x:' \
3328 @SIM_ENABLE_ARCH_bfin_TRUE@
-e
'/^0x/{s: .*::;s: *$$:,:;s: :, 0x:g;p;}' \
3329 @SIM_ENABLE_ARCH_bfin_TRUE@
$@.dis
; \
3330 @SIM_ENABLE_ARCH_bfin_TRUE@
rm -f
$@.dis
; \
3331 @SIM_ENABLE_ARCH_bfin_TRUE@ echo
"};" \
3332 @SIM_ENABLE_ARCH_bfin_TRUE@
) > $@.tmp
3333 @SIM_ENABLE_ARCH_bfin_TRUE@
$(AM_V_at
)$(SHELL
) $(srcroot
)/move-if-change
$@.tmp
$(srcdir)/bfin
/linux-fixed-code.h
3334 @SIM_ENABLE_ARCH_bfin_TRUE@
$(AM_V_at
)touch
$(srcdir)/bfin
/linux-fixed-code.h
3336 @SIM_ENABLE_ARCH_bpf_TRUE@bpf
/mloop-le.c bpf
/eng-le.h
: bpf
/stamp-mloop-le
; @true
3337 @SIM_ENABLE_ARCH_bpf_TRUE@bpf
/stamp-mloop-le
: $(srccom
)/genmloop.sh bpf
/mloop.in
3338 @SIM_ENABLE_ARCH_bpf_TRUE@
$(AM_V_GEN
)$(SHELL
) $(srccom
)/genmloop.sh
-shell $(SHELL
) \
3339 @SIM_ENABLE_ARCH_bpf_TRUE@
-mono
-scache
-prefix bpfbf_ebpfle
-cpu bpfbf \
3340 @SIM_ENABLE_ARCH_bpf_TRUE@
-infile
$(srcdir)/bpf
/mloop.in \
3341 @SIM_ENABLE_ARCH_bpf_TRUE@
-outfile-prefix bpf
/ -outfile-suffix
-le
3342 @SIM_ENABLE_ARCH_bpf_TRUE@
$(AM_V_at
)$(SHELL
) $(srcroot
)/move-if-change bpf
/eng-le.hin bpf
/eng-le.h
3343 @SIM_ENABLE_ARCH_bpf_TRUE@
$(AM_V_at
)$(SHELL
) $(srcroot
)/move-if-change bpf
/mloop-le.cin bpf
/mloop-le.c
3344 @SIM_ENABLE_ARCH_bpf_TRUE@
$(AM_V_at
)touch
$@
3346 @SIM_ENABLE_ARCH_bpf_TRUE@bpf
/mloop-be.c bpf
/eng-be.h
: bpf
/stamp-mloop-be
; @true
3347 @SIM_ENABLE_ARCH_bpf_TRUE@bpf
/stamp-mloop-be
: $(srccom
)/genmloop.sh bpf
/mloop.in
3348 @SIM_ENABLE_ARCH_bpf_TRUE@
$(AM_V_GEN
)$(SHELL
) $(srccom
)/genmloop.sh
-shell $(SHELL
) \
3349 @SIM_ENABLE_ARCH_bpf_TRUE@
-mono
-scache
-prefix bpfbf_ebpfbe
-cpu bpfbf \
3350 @SIM_ENABLE_ARCH_bpf_TRUE@
-infile
$(srcdir)/bpf
/mloop.in \
3351 @SIM_ENABLE_ARCH_bpf_TRUE@
-outfile-prefix bpf
/ -outfile-suffix
-be
3352 @SIM_ENABLE_ARCH_bpf_TRUE@
$(AM_V_at
)$(SHELL
) $(srcroot
)/move-if-change bpf
/eng-be.hin bpf
/eng-be.h
3353 @SIM_ENABLE_ARCH_bpf_TRUE@
$(AM_V_at
)$(SHELL
) $(srcroot
)/move-if-change bpf
/mloop-be.cin bpf
/mloop-be.c
3354 @SIM_ENABLE_ARCH_bpf_TRUE@
$(AM_V_at
)touch
$@
3356 # These rules are copied from automake, but tweaked to use FOR_BUILD variables.
3357 @SIM_ENABLE_ARCH_cr16_TRUE@cr16
/gencode
$(EXEEXT
): $(cr16_gencode_OBJECTS
) $(cr16_gencode_DEPENDENCIES
) cr16
/$(am__dirstamp
)
3358 @SIM_ENABLE_ARCH_cr16_TRUE@
$(AM_V_CCLD
)$(LINK_FOR_BUILD
) $(cr16_gencode_OBJECTS
) $(cr16_gencode_LDADD
)
3360 # gencode is a build-time only tool. Override the default rules for it.
3361 @SIM_ENABLE_ARCH_cr16_TRUE@cr16
/gencode.o
: cr16
/gencode.c
3362 @SIM_ENABLE_ARCH_cr16_TRUE@
$(AM_V_CC
)$(COMPILE_FOR_BUILD
) -c
$< -o
$@
3363 @SIM_ENABLE_ARCH_cr16_TRUE@cr16
/cr16-opc.o
: ..
/opcodes
/cr16-opc.c
3364 @SIM_ENABLE_ARCH_cr16_TRUE@
$(AM_V_CC
)$(COMPILE_FOR_BUILD
) -c
$< -o
$@
3366 @SIM_ENABLE_ARCH_cr16_TRUE@cr16
/simops.h
: cr16
/gencode
$(EXEEXT
)
3367 @SIM_ENABLE_ARCH_cr16_TRUE@
$(AM_V_GEN
)$< -h
>$@
3369 @SIM_ENABLE_ARCH_cr16_TRUE@cr16
/table.c
: cr16
/gencode
$(EXEEXT
)
3370 @SIM_ENABLE_ARCH_cr16_TRUE@
$(AM_V_GEN
)$< >$@
3372 @SIM_ENABLE_ARCH_cris_TRUE@cris
/mloopv10f.c cris
/engv10.h
: cris
/stamp-mloop-v10f
; @true
3373 @SIM_ENABLE_ARCH_cris_TRUE@cris
/stamp-mloop-v10f
: $(srccom
)/genmloop.sh cris
/mloop.in
3374 @SIM_ENABLE_ARCH_cris_TRUE@
$(AM_V_GEN
)$(SHELL
) $(srccom
)/genmloop.sh
-shell $(SHELL
) \
3375 @SIM_ENABLE_ARCH_cris_TRUE@
-mono
-no-fast
-pbb
-switch semcrisv10f-switch.c \
3376 @SIM_ENABLE_ARCH_cris_TRUE@
-cpu crisv10f \
3377 @SIM_ENABLE_ARCH_cris_TRUE@
-infile
$(srcdir)/cris
/mloop.in
-outfile-prefix cris
/ -outfile-suffix
-v10f
3378 @SIM_ENABLE_ARCH_cris_TRUE@
$(AM_V_at
)$(SHELL
) $(srcroot
)/move-if-change cris
/eng-v10f.hin cris
/engv10.h
3379 @SIM_ENABLE_ARCH_cris_TRUE@
$(AM_V_at
)$(SHELL
) $(srcroot
)/move-if-change cris
/mloop-v10f.cin cris
/mloopv10f.c
3380 @SIM_ENABLE_ARCH_cris_TRUE@
$(AM_V_at
)touch
$@
3382 @SIM_ENABLE_ARCH_cris_TRUE@cris
/mloopv32f.c cris
/engv32.h
: cris
/stamp-mloop-v32f
; @true
3383 @SIM_ENABLE_ARCH_cris_TRUE@cris
/stamp-mloop-v32f
: $(srccom
)/genmloop.sh cris
/mloop.in
3384 @SIM_ENABLE_ARCH_cris_TRUE@
$(AM_V_GEN
)$(SHELL
) $(srccom
)/genmloop.sh
-shell $(SHELL
) \
3385 @SIM_ENABLE_ARCH_cris_TRUE@
-mono
-no-fast
-pbb
-switch semcrisv32f-switch.c \
3386 @SIM_ENABLE_ARCH_cris_TRUE@
-cpu crisv32f \
3387 @SIM_ENABLE_ARCH_cris_TRUE@
-infile
$(srcdir)/cris
/mloop.in
-outfile-prefix cris
/ -outfile-suffix
-v32f
3388 @SIM_ENABLE_ARCH_cris_TRUE@
$(AM_V_at
)$(SHELL
) $(srcroot
)/move-if-change cris
/eng-v32f.hin cris
/engv32.h
3389 @SIM_ENABLE_ARCH_cris_TRUE@
$(AM_V_at
)$(SHELL
) $(srcroot
)/move-if-change cris
/mloop-v32f.cin cris
/mloopv32f.c
3390 @SIM_ENABLE_ARCH_cris_TRUE@
$(AM_V_at
)touch
$@
3392 # These rules are copied from automake, but tweaked to use FOR_BUILD variables.
3393 @SIM_ENABLE_ARCH_d10v_TRUE@d10v
/gencode
$(EXEEXT
): $(d10v_gencode_OBJECTS
) $(d10v_gencode_DEPENDENCIES
) d10v
/$(am__dirstamp
)
3394 @SIM_ENABLE_ARCH_d10v_TRUE@
$(AM_V_CCLD
)$(LINK_FOR_BUILD
) $(d10v_gencode_OBJECTS
) $(d10v_gencode_LDADD
)
3396 # gencode is a build-time only tool. Override the default rules for it.
3397 @SIM_ENABLE_ARCH_d10v_TRUE@d10v
/gencode.o
: d10v
/gencode.c
3398 @SIM_ENABLE_ARCH_d10v_TRUE@
$(AM_V_CC
)$(COMPILE_FOR_BUILD
) -c
$< -o
$@
3399 @SIM_ENABLE_ARCH_d10v_TRUE@d10v
/d10v-opc.o
: ..
/opcodes
/d10v-opc.c
3400 @SIM_ENABLE_ARCH_d10v_TRUE@
$(AM_V_CC
)$(COMPILE_FOR_BUILD
) -c
$< -o
$@
3402 @SIM_ENABLE_ARCH_d10v_TRUE@d10v
/simops.h
: d10v
/gencode
$(EXEEXT
)
3403 @SIM_ENABLE_ARCH_d10v_TRUE@
$(AM_V_GEN
)$< -h
>$@
3405 @SIM_ENABLE_ARCH_d10v_TRUE@d10v
/table.c
: d10v
/gencode
$(EXEEXT
)
3406 @SIM_ENABLE_ARCH_d10v_TRUE@
$(AM_V_GEN
)$< >$@
3408 @SIM_ENABLE_ARCH_erc32_TRUE@erc32
/sis
$(EXEEXT
): erc32
/run
$(EXEEXT
)
3409 @SIM_ENABLE_ARCH_erc32_TRUE@
$(AM_V_GEN
)ln
$< $@
2>/dev
/null ||
$(LN_S
) $< $@
2>/dev
/null || cp
-p
$< $@
3411 @SIM_ENABLE_ARCH_erc32_TRUE@erc32
/%.o
: erc32
/%.c | erc32
/libsim.a
$(SIM_ALL_RECURSIVE_DEPS
)
3412 @SIM_ENABLE_ARCH_erc32_TRUE@
$(MAKE
) $(AM_MAKEFLAGS
) -C
$(@D
) $(@F
)
3413 @SIM_ENABLE_ARCH_erc32_TRUE@sim-
%D-install-exec-local
: installdirs
3414 @SIM_ENABLE_ARCH_erc32_TRUE@
$(AM_V_at
)$(MKDIR_P
) $(DESTDIR
)$(bindir)
3415 @SIM_ENABLE_ARCH_erc32_TRUE@ n
=`echo sis | sed '$(program_transform_name)'`; \
3416 @SIM_ENABLE_ARCH_erc32_TRUE@
$(LIBTOOL
) --mode
=install $(INSTALL_PROGRAM
) erc32
/run
$(EXEEXT
) $(DESTDIR
)$(bindir)/$$n$(EXEEXT
)
3417 @SIM_ENABLE_ARCH_erc32_TRUE@sim-erc32-uninstall-local
:
3418 @SIM_ENABLE_ARCH_erc32_TRUE@
rm -f
$(DESTDIR
)$(bindir)/sis
3420 @SIM_ENABLE_ARCH_frv_TRUE@frv
/mloop.c frv
/eng.h
: frv
/stamp-mloop
; @true
3421 @SIM_ENABLE_ARCH_frv_TRUE@frv
/stamp-mloop
: $(srccom
)/genmloop.sh frv
/mloop.in
3422 @SIM_ENABLE_ARCH_frv_TRUE@
$(AM_V_GEN
)$(SHELL
) $(srccom
)/genmloop.sh
-shell $(SHELL
) \
3423 @SIM_ENABLE_ARCH_frv_TRUE@
-mono
-scache
-parallel-generic-write
-parallel-only \
3424 @SIM_ENABLE_ARCH_frv_TRUE@
-cpu frvbf \
3425 @SIM_ENABLE_ARCH_frv_TRUE@
-infile
$(srcdir)/frv
/mloop.in
-outfile-prefix frv
/
3426 @SIM_ENABLE_ARCH_frv_TRUE@
$(AM_V_at
)$(SHELL
) $(srcroot
)/move-if-change frv
/eng.hin frv
/eng.h
3427 @SIM_ENABLE_ARCH_frv_TRUE@
$(AM_V_at
)$(SHELL
) $(srcroot
)/move-if-change frv
/mloop.cin frv
/mloop.c
3428 @SIM_ENABLE_ARCH_frv_TRUE@
$(AM_V_at
)touch
$@
3430 @SIM_ENABLE_ARCH_iq2000_TRUE@iq2000
/mloop.c iq2000
/eng.h
: iq2000
/stamp-mloop
; @true
3431 @SIM_ENABLE_ARCH_iq2000_TRUE@iq2000
/stamp-mloop
: $(srccom
)/genmloop.sh iq2000
/mloop.in
3432 @SIM_ENABLE_ARCH_iq2000_TRUE@
$(AM_V_GEN
)$(SHELL
) $(srccom
)/genmloop.sh
-shell $(SHELL
) \
3433 @SIM_ENABLE_ARCH_iq2000_TRUE@
-mono
-fast
-pbb
-switch sem-switch.c \
3434 @SIM_ENABLE_ARCH_iq2000_TRUE@
-cpu iq2000bf \
3435 @SIM_ENABLE_ARCH_iq2000_TRUE@
-infile
$(srcdir)/iq2000
/mloop.in
-outfile-prefix iq2000
/
3436 @SIM_ENABLE_ARCH_iq2000_TRUE@
$(AM_V_at
)$(SHELL
) $(srcroot
)/move-if-change iq2000
/eng.hin iq2000
/eng.h
3437 @SIM_ENABLE_ARCH_iq2000_TRUE@
$(AM_V_at
)$(SHELL
) $(srcroot
)/move-if-change iq2000
/mloop.cin iq2000
/mloop.c
3438 @SIM_ENABLE_ARCH_iq2000_TRUE@
$(AM_V_at
)touch
$@
3440 @SIM_ENABLE_ARCH_lm32_TRUE@lm32
/mloop.c lm32
/eng.h
: lm32
/stamp-mloop
; @true
3441 @SIM_ENABLE_ARCH_lm32_TRUE@lm32
/stamp-mloop
: $(srccom
)/genmloop.sh lm32
/mloop.in
3442 @SIM_ENABLE_ARCH_lm32_TRUE@
$(AM_V_GEN
)$(SHELL
) $(srccom
)/genmloop.sh
-shell $(SHELL
) \
3443 @SIM_ENABLE_ARCH_lm32_TRUE@
-mono
-fast
-pbb
-switch sem-switch.c \
3444 @SIM_ENABLE_ARCH_lm32_TRUE@
-cpu lm32bf \
3445 @SIM_ENABLE_ARCH_lm32_TRUE@
-infile
$(srcdir)/lm32
/mloop.in
-outfile-prefix lm32
/
3446 @SIM_ENABLE_ARCH_lm32_TRUE@
$(AM_V_at
)$(SHELL
) $(srcroot
)/move-if-change lm32
/eng.hin lm32
/eng.h
3447 @SIM_ENABLE_ARCH_lm32_TRUE@
$(AM_V_at
)$(SHELL
) $(srcroot
)/move-if-change lm32
/mloop.cin lm32
/mloop.c
3448 @SIM_ENABLE_ARCH_lm32_TRUE@
$(AM_V_at
)touch
$@
3450 @SIM_ENABLE_ARCH_m32c_TRUE@m32c
/%.o
: m32c
/%.c | m32c
/libsim.a
$(SIM_ALL_RECURSIVE_DEPS
)
3451 @SIM_ENABLE_ARCH_m32c_TRUE@
$(MAKE
) $(AM_MAKEFLAGS
) -C
$(@D
) $(@F
)
3453 # These rules are copied from automake, but tweaked to use FOR_BUILD variables.
3454 @SIM_ENABLE_ARCH_m32c_TRUE@m32c
/opc2c
$(EXEEXT
): $(m32c_opc2c_OBJECTS
) $(m32c_opc2c_DEPENDENCIES
) m32c
/$(am__dirstamp
)
3455 @SIM_ENABLE_ARCH_m32c_TRUE@
$(AM_V_CCLD
)$(LINK_FOR_BUILD
) $(m32c_opc2c_OBJECTS
) $(m32c_opc2c_LDADD
)
3457 # opc2c is a build-time only tool. Override the default rules for it.
3458 @SIM_ENABLE_ARCH_m32c_TRUE@m32c
/opc2c.o
: m32c
/opc2c.c
3459 @SIM_ENABLE_ARCH_m32c_TRUE@
$(AM_V_CC
)$(COMPILE_FOR_BUILD
) -c
$< -o
$@
3461 @SIM_ENABLE_ARCH_m32c_TRUE@m32c
/m32c.c
: m32c
/m32c.opc m32c
/opc2c
$(EXEEXT
)
3462 @SIM_ENABLE_ARCH_m32c_TRUE@
$(AM_V_GEN
)$(m32c_OPC2C_RUN
) -l
$@.log
$< > $@.tmp
3463 @SIM_ENABLE_ARCH_m32c_TRUE@
$(AM_V_at
)mv
$@.tmp
$@
3465 @SIM_ENABLE_ARCH_m32c_TRUE@m32c
/r8c.c
: m32c
/r8c.opc m32c
/opc2c
$(EXEEXT
)
3466 @SIM_ENABLE_ARCH_m32c_TRUE@
$(AM_V_GEN
)$(m32c_OPC2C_RUN
) -l
$@.log
$< > $@.tmp
3467 @SIM_ENABLE_ARCH_m32c_TRUE@
$(AM_V_at
)mv
$@.tmp
$@
3469 @SIM_ENABLE_ARCH_m32r_TRUE@m32r
/mloop.c m32r
/eng.h
: m32r
/stamp-mloop
; @true
3470 @SIM_ENABLE_ARCH_m32r_TRUE@m32r
/stamp-mloop
: $(srccom
)/genmloop.sh m32r
/mloop.in
3471 @SIM_ENABLE_ARCH_m32r_TRUE@
$(AM_V_GEN
)$(SHELL
) $(srccom
)/genmloop.sh
-shell $(SHELL
) \
3472 @SIM_ENABLE_ARCH_m32r_TRUE@
-mono
-fast
-pbb
-switch sem-switch.c \
3473 @SIM_ENABLE_ARCH_m32r_TRUE@
-cpu m32rbf \
3474 @SIM_ENABLE_ARCH_m32r_TRUE@
-infile
$(srcdir)/m32r
/mloop.in
-outfile-prefix m32r
/
3475 @SIM_ENABLE_ARCH_m32r_TRUE@
$(AM_V_at
)$(SHELL
) $(srcroot
)/move-if-change m32r
/eng.hin m32r
/eng.h
3476 @SIM_ENABLE_ARCH_m32r_TRUE@
$(AM_V_at
)$(SHELL
) $(srcroot
)/move-if-change m32r
/mloop.cin m32r
/mloop.c
3477 @SIM_ENABLE_ARCH_m32r_TRUE@
$(AM_V_at
)touch
$@
3479 @SIM_ENABLE_ARCH_m32r_TRUE@m32r
/mloopx.c m32r
/engx.h
: m32r
/stamp-mloop
; @true
3480 @SIM_ENABLE_ARCH_m32r_TRUE@m32r
/stamp-mloop-x
: $(srccom
)/genmloop.sh m32r
/mloop.in
3481 @SIM_ENABLE_ARCH_m32r_TRUE@
$(AM_V_GEN
)$(SHELL
) $(srccom
)/genmloop.sh
-shell $(SHELL
) \
3482 @SIM_ENABLE_ARCH_m32r_TRUE@
-mono
-no-fast
-pbb
-parallel-write
-switch semx-switch.c \
3483 @SIM_ENABLE_ARCH_m32r_TRUE@
-cpu m32rxf \
3484 @SIM_ENABLE_ARCH_m32r_TRUE@
-infile
$(srcdir)/m32r
/mloopx.in
-outfile-prefix m32r
/ -outfile-suffix x
3485 @SIM_ENABLE_ARCH_m32r_TRUE@
$(AM_V_at
)$(SHELL
) $(srcroot
)/move-if-change m32r
/engx.hin m32r
/engx.h
3486 @SIM_ENABLE_ARCH_m32r_TRUE@
$(AM_V_at
)$(SHELL
) $(srcroot
)/move-if-change m32r
/mloopx.cin m32r
/mloopx.c
3487 @SIM_ENABLE_ARCH_m32r_TRUE@
$(AM_V_at
)touch
$@
3489 @SIM_ENABLE_ARCH_m32r_TRUE@m32r
/mloop2.c m32r
/eng2.h
: m32r
/stamp-mloop
; @true
3490 @SIM_ENABLE_ARCH_m32r_TRUE@m32r
/stamp-mloop-2
: $(srccom
)/genmloop.sh m32r
/mloop.in
3491 @SIM_ENABLE_ARCH_m32r_TRUE@
$(AM_V_GEN
)$(SHELL
) $(srccom
)/genmloop.sh
-shell $(SHELL
) \
3492 @SIM_ENABLE_ARCH_m32r_TRUE@
-mono
-no-fast
-pbb
-parallel-write
-switch sem2-switch.c \
3493 @SIM_ENABLE_ARCH_m32r_TRUE@
-cpu m32r2f \
3494 @SIM_ENABLE_ARCH_m32r_TRUE@
-infile
$(srcdir)/m32r
/mloop2.in
-outfile-prefix m32r
/ -outfile-suffix
2
3495 @SIM_ENABLE_ARCH_m32r_TRUE@
$(AM_V_at
)$(SHELL
) $(srcroot
)/move-if-change m32r
/eng2.hin m32r
/eng2.h
3496 @SIM_ENABLE_ARCH_m32r_TRUE@
$(AM_V_at
)$(SHELL
) $(srcroot
)/move-if-change m32r
/mloop2.cin m32r
/mloop2.c
3497 @SIM_ENABLE_ARCH_m32r_TRUE@
$(AM_V_at
)touch
$@
3499 # These rules are copied from automake, but tweaked to use FOR_BUILD variables.
3500 @SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11
/gencode
$(EXEEXT
): $(m68hc11_gencode_OBJECTS
) $(m68hc11_gencode_DEPENDENCIES
) m68hc11
/$(am__dirstamp
)
3501 @SIM_ENABLE_ARCH_m68hc11_TRUE@
$(AM_V_CCLD
)$(LINK_FOR_BUILD
) $(m68hc11_gencode_OBJECTS
) $(m68hc11_gencode_LDADD
)
3503 # gencode is a build-time only tool. Override the default rules for it.
3504 @SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11
/gencode.o
: m68hc11
/gencode.c
3505 @SIM_ENABLE_ARCH_m68hc11_TRUE@
$(AM_V_CC
)$(COMPILE_FOR_BUILD
) -c
$< -o
$@
3507 @SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11
/m68hc11int.c
: m68hc11
/gencode
$(EXEEXT
)
3508 @SIM_ENABLE_ARCH_m68hc11_TRUE@
$(AM_V_GEN
)$< -m6811
>$@
3510 @SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11
/m68hc12int.c
: m68hc11
/gencode
$(EXEEXT
)
3511 @SIM_ENABLE_ARCH_m68hc11_TRUE@
$(AM_V_GEN
)$< -m6812
>$@
3513 @SIM_ENABLE_ARCH_mn10300_TRUE@
$(mn10300_BUILT_SRC_FROM_IGEN
): mn10300
/stamp-igen
3514 @SIM_ENABLE_ARCH_mn10300_TRUE@mn10300
/stamp-igen
: $(mn10300_IGEN_INSN
) $(mn10300_IGEN_INSN_INC
) $(mn10300_IGEN_DC
) $(IGEN
)
3515 @SIM_ENABLE_ARCH_mn10300_TRUE@
$(AM_V_GEN
)$(IGEN_RUN
) \
3516 @SIM_ENABLE_ARCH_mn10300_TRUE@
$(mn10300_IGEN_TRACE
) \
3517 @SIM_ENABLE_ARCH_mn10300_TRUE@
-G gen-direct-access \
3518 @SIM_ENABLE_ARCH_mn10300_TRUE@
-M mn10300
,am33
-G gen-multi-sim
=am33 \
3519 @SIM_ENABLE_ARCH_mn10300_TRUE@
-M am33_2 \
3520 @SIM_ENABLE_ARCH_mn10300_TRUE@
-I
$(srcdir)/mn10300 \
3521 @SIM_ENABLE_ARCH_mn10300_TRUE@
-i
$(mn10300_IGEN_INSN
) \
3522 @SIM_ENABLE_ARCH_mn10300_TRUE@
-o
$(mn10300_IGEN_DC
) \
3523 @SIM_ENABLE_ARCH_mn10300_TRUE@
-x \
3524 @SIM_ENABLE_ARCH_mn10300_TRUE@
-n icache.h
-hc mn10300
/icache.h \
3525 @SIM_ENABLE_ARCH_mn10300_TRUE@
-n icache.c
-c mn10300
/icache.c \
3526 @SIM_ENABLE_ARCH_mn10300_TRUE@
-n semantics.h
-hs mn10300
/semantics.h \
3527 @SIM_ENABLE_ARCH_mn10300_TRUE@
-n semantics.c
-s mn10300
/semantics.c \
3528 @SIM_ENABLE_ARCH_mn10300_TRUE@
-n idecode.h
-hd mn10300
/idecode.h \
3529 @SIM_ENABLE_ARCH_mn10300_TRUE@
-n idecode.c
-d mn10300
/idecode.c \
3530 @SIM_ENABLE_ARCH_mn10300_TRUE@
-n model.h
-hm mn10300
/model.h \
3531 @SIM_ENABLE_ARCH_mn10300_TRUE@
-n model.c
-m mn10300
/model.c \
3532 @SIM_ENABLE_ARCH_mn10300_TRUE@
-n support.h
-hf mn10300
/support.h \
3533 @SIM_ENABLE_ARCH_mn10300_TRUE@
-n support.c
-f mn10300
/support.c \
3534 @SIM_ENABLE_ARCH_mn10300_TRUE@
-n itable.h
-ht mn10300
/itable.h \
3535 @SIM_ENABLE_ARCH_mn10300_TRUE@
-n itable.c
-t mn10300
/itable.c \
3536 @SIM_ENABLE_ARCH_mn10300_TRUE@
-n engine.h
-he mn10300
/engine.h \
3537 @SIM_ENABLE_ARCH_mn10300_TRUE@
-n engine.c
-e mn10300
/engine.c \
3538 @SIM_ENABLE_ARCH_mn10300_TRUE@
-n irun.c
-r mn10300
/irun.c
3539 @SIM_ENABLE_ARCH_mn10300_TRUE@
$(AM_V_at
)touch
$@
3541 @SIM_ENABLE_ARCH_moxie_TRUE@moxie
/moxie-gdb.dtb
: @MAINT@ moxie
/moxie-gdb.dts moxie
/$(am__dirstamp
)
3542 @SIM_ENABLE_ARCH_moxie_TRUE@
$(AM_V_GEN
) \
3543 @SIM_ENABLE_ARCH_moxie_TRUE@ if
test "x$(DTC)" != x
; then \
3544 @SIM_ENABLE_ARCH_moxie_TRUE@
$(DTC
) -O dtb
-o
$@.tmp
${srcdir}/moxie
/moxie-gdb.dts || exit
1; \
3545 @SIM_ENABLE_ARCH_moxie_TRUE@
$(SHELL
) $(srcroot
)/move-if-change
$@.tmp
${srcdir}/moxie
/moxie-gdb.dtb || exit
1; \
3546 @SIM_ENABLE_ARCH_moxie_TRUE@ touch
${srcdir}/moxie
/moxie-gdb.dtb
; \
3547 @SIM_ENABLE_ARCH_moxie_TRUE@
else \
3548 @SIM_ENABLE_ARCH_moxie_TRUE@ echo
"Could not update the moxie-gdb.dtb file because the device "; \
3549 @SIM_ENABLE_ARCH_moxie_TRUE@ echo
"tree compiler tool (dtc) is missing. Install the tool to "; \
3550 @SIM_ENABLE_ARCH_moxie_TRUE@ echo
"update the device tree blob."; \
3551 @SIM_ENABLE_ARCH_moxie_TRUE@ fi
3553 @SIM_ENABLE_ARCH_or1k_TRUE@or1k
/mloop.c or1k
/eng.h
: or1k
/stamp-mloop
; @true
3554 @SIM_ENABLE_ARCH_or1k_TRUE@or1k
/stamp-mloop
: $(srccom
)/genmloop.sh or1k
/mloop.in
3555 @SIM_ENABLE_ARCH_or1k_TRUE@
$(AM_V_GEN
)$(SHELL
) $(srccom
)/genmloop.sh
-shell $(SHELL
) \
3556 @SIM_ENABLE_ARCH_or1k_TRUE@
-mono
-fast
-pbb
-switch sem-switch.c \
3557 @SIM_ENABLE_ARCH_or1k_TRUE@
-cpu or1k32bf \
3558 @SIM_ENABLE_ARCH_or1k_TRUE@
-infile
$(srcdir)/or1k
/mloop.in
-outfile-prefix or1k
/
3559 @SIM_ENABLE_ARCH_or1k_TRUE@
$(AM_V_at
)$(SHELL
) $(srcroot
)/move-if-change or1k
/eng.hin or1k
/eng.h
3560 @SIM_ENABLE_ARCH_or1k_TRUE@
$(AM_V_at
)$(SHELL
) $(srcroot
)/move-if-change or1k
/mloop.cin or1k
/mloop.c
3561 @SIM_ENABLE_ARCH_or1k_TRUE@
$(AM_V_at
)touch
$@
3563 @SIM_ENABLE_ARCH_ppc_TRUE@ppc
/psim
$(EXEEXT
): ppc
/run
$(EXEEXT
)
3564 @SIM_ENABLE_ARCH_ppc_TRUE@
$(AM_V_GEN
)ln
$< $@
2>/dev
/null ||
$(LN_S
) $< $@
2>/dev
/null || cp
-p
$< $@
3566 @SIM_ENABLE_ARCH_ppc_TRUE@ppc
/%.o
: ppc
/%.c | ppc
/libsim.a
$(SIM_ALL_RECURSIVE_DEPS
)
3567 @SIM_ENABLE_ARCH_ppc_TRUE@
$(MAKE
) $(AM_MAKEFLAGS
) -C
$(@D
) $(@F
)
3569 @SIM_ENABLE_ARCH_ppc_TRUE@ppc
/spreg.c
: @MAINT@ ppc
/ppc-spr-table ppc
/spreg-gen.py ppc
/$(am__dirstamp
)
3570 @SIM_ENABLE_ARCH_ppc_TRUE@
$(AM_V_GEN
)$(srcdir)/ppc
/spreg-gen.py
--source
$@.tmp
3571 @SIM_ENABLE_ARCH_ppc_TRUE@
$(AM_V_at
)$(SHELL
) $(srcroot
)/move-if-change
$@.tmp
$(srcdir)/ppc
/spreg.c
3572 @SIM_ENABLE_ARCH_ppc_TRUE@
$(AM_V_at
)touch
$(srcdir)/ppc
/spreg.c
3574 @SIM_ENABLE_ARCH_ppc_TRUE@ppc
/spreg.h
: @MAINT@ ppc
/ppc-spr-table ppc
/spreg-gen.py ppc
/$(am__dirstamp
)
3575 @SIM_ENABLE_ARCH_ppc_TRUE@
$(AM_V_GEN
)$(srcdir)/ppc
/spreg-gen.py
--header
$@.tmp
3576 @SIM_ENABLE_ARCH_ppc_TRUE@
$(AM_V_at
)$(SHELL
) $(srcroot
)/move-if-change
$@.tmp
$(srcdir)/ppc
/spreg.h
3577 @SIM_ENABLE_ARCH_ppc_TRUE@
$(AM_V_at
)touch
$(srcdir)/ppc
/spreg.h
3579 @SIM_ENABLE_ARCH_rl78_TRUE@rl78
/%.o
: rl78
/%.c | rl78
/libsim.a
$(SIM_ALL_RECURSIVE_DEPS
)
3580 @SIM_ENABLE_ARCH_rl78_TRUE@
$(MAKE
) $(AM_MAKEFLAGS
) -C
$(@D
) $(@F
)
3582 @SIM_ENABLE_ARCH_rx_TRUE@rx
/%.o
: rx
/%.c | rx
/libsim.a
$(SIM_ALL_RECURSIVE_DEPS
)
3583 @SIM_ENABLE_ARCH_rx_TRUE@
$(MAKE
) $(AM_MAKEFLAGS
) -C
$(@D
) $(@F
)
3585 # These rules are copied from automake, but tweaked to use FOR_BUILD variables.
3586 @SIM_ENABLE_ARCH_sh_TRUE@sh
/gencode
$(EXEEXT
): $(sh_gencode_OBJECTS
) $(sh_gencode_DEPENDENCIES
) sh
/$(am__dirstamp
)
3587 @SIM_ENABLE_ARCH_sh_TRUE@
$(AM_V_CCLD
)$(LINK_FOR_BUILD
) $(sh_gencode_OBJECTS
) $(sh_gencode_LDADD
)
3589 # gencode is a build-time only tool. Override the default rules for it.
3590 @SIM_ENABLE_ARCH_sh_TRUE@sh
/gencode.o
: sh
/gencode.c
3591 @SIM_ENABLE_ARCH_sh_TRUE@
$(AM_V_CC
)$(COMPILE_FOR_BUILD
) -c
$< -o
$@
3593 @SIM_ENABLE_ARCH_sh_TRUE@sh
/code.c
: sh
/gencode
$(EXEEXT
)
3594 @SIM_ENABLE_ARCH_sh_TRUE@
$(AM_V_GEN
)$< -x
>$@
3596 @SIM_ENABLE_ARCH_sh_TRUE@sh
/ppi.c
: sh
/gencode
$(EXEEXT
)
3597 @SIM_ENABLE_ARCH_sh_TRUE@
$(AM_V_GEN
)$< -p
>$@
3599 @SIM_ENABLE_ARCH_sh_TRUE@sh
/table.c
: sh
/gencode
$(EXEEXT
)
3600 @SIM_ENABLE_ARCH_sh_TRUE@
$(AM_V_GEN
)$< -s
>$@
3602 @SIM_ENABLE_ARCH_v850_TRUE@
$(v850_BUILT_SRC_FROM_IGEN
): v850
/stamp-igen
3603 @SIM_ENABLE_ARCH_v850_TRUE@v850
/stamp-igen
: $(v850_IGEN_INSN
) $(v850_IGEN_DC
) $(IGEN
)
3604 @SIM_ENABLE_ARCH_v850_TRUE@
$(AM_V_GEN
)$(IGEN_RUN
) \
3605 @SIM_ENABLE_ARCH_v850_TRUE@
$(v850_IGEN_TRACE
) \
3606 @SIM_ENABLE_ARCH_v850_TRUE@
-G gen-direct-access \
3607 @SIM_ENABLE_ARCH_v850_TRUE@
-G gen-zero-r0 \
3608 @SIM_ENABLE_ARCH_v850_TRUE@
-i
$(v850_IGEN_INSN
) \
3609 @SIM_ENABLE_ARCH_v850_TRUE@
-o
$(v850_IGEN_DC
) \
3610 @SIM_ENABLE_ARCH_v850_TRUE@
-x \
3611 @SIM_ENABLE_ARCH_v850_TRUE@
-n icache.h
-hc v850
/icache.h \
3612 @SIM_ENABLE_ARCH_v850_TRUE@
-n icache.c
-c v850
/icache.c \
3613 @SIM_ENABLE_ARCH_v850_TRUE@
-n semantics.h
-hs v850
/semantics.h \
3614 @SIM_ENABLE_ARCH_v850_TRUE@
-n semantics.c
-s v850
/semantics.c \
3615 @SIM_ENABLE_ARCH_v850_TRUE@
-n idecode.h
-hd v850
/idecode.h \
3616 @SIM_ENABLE_ARCH_v850_TRUE@
-n idecode.c
-d v850
/idecode.c \
3617 @SIM_ENABLE_ARCH_v850_TRUE@
-n model.h
-hm v850
/model.h \
3618 @SIM_ENABLE_ARCH_v850_TRUE@
-n model.c
-m v850
/model.c \
3619 @SIM_ENABLE_ARCH_v850_TRUE@
-n support.h
-hf v850
/support.h \
3620 @SIM_ENABLE_ARCH_v850_TRUE@
-n support.c
-f v850
/support.c \
3621 @SIM_ENABLE_ARCH_v850_TRUE@
-n itable.h
-ht v850
/itable.h \
3622 @SIM_ENABLE_ARCH_v850_TRUE@
-n itable.c
-t v850
/itable.c \
3623 @SIM_ENABLE_ARCH_v850_TRUE@
-n engine.h
-he v850
/engine.h \
3624 @SIM_ENABLE_ARCH_v850_TRUE@
-n engine.c
-e v850
/engine.c \
3625 @SIM_ENABLE_ARCH_v850_TRUE@
-n irun.c
-r v850
/irun.c
3626 @SIM_ENABLE_ARCH_v850_TRUE@
$(AM_V_at
)touch
$@
3628 %/libsim.a
: |
$(SIM_ALL_RECURSIVE_DEPS
)
3629 $(MAKE
) $(AM_MAKEFLAGS
) -C
$(@D
) $(@F
)
3631 %/nrun.o
: common
/nrun.c |
%/libsim.a
$(SIM_ALL_RECURSIVE_DEPS
)
3632 $(MAKE
) $(AM_MAKEFLAGS
) -C
$(@D
) $(@F
)
3634 all-recursive
: $(SIM_ALL_RECURSIVE_DEPS
)
3636 install-data-local
: installdirs $(SIM_INSTALL_DATA_LOCAL_DEPS
)
3637 $(AM_V_at
)$(MKDIR_P
) $(DESTDIR
)$(libdir)
3638 lib
=`echo sim | sed '$(program_transform_name)'`; \
3639 for d in
$(SIM_ENABLED_ARCHES
); do \
3641 [ "$(SIM_PRIMARY_TARGET)" = "$$d" ] || n
="$$n-$$d"; \
3643 $(INSTALL_DATA
) $$d/libsim.a
$(DESTDIR
)$(libdir)/$$n || exit
1; \
3646 install-exec-local
: installdirs $(SIM_INSTALL_EXEC_LOCAL_DEPS
)
3647 $(AM_V_at
)$(MKDIR_P
) $(DESTDIR
)$(bindir)
3648 run
=`echo run | sed '$(program_transform_name)'`; \
3649 for d in
$(SIM_ENABLED_ARCHES
); do \
3651 [ "$(SIM_PRIMARY_TARGET)" = "$$d" ] || n
="$$n-$$d"; \
3652 $(LIBTOOL
) --mode
=install \
3653 $(INSTALL_PROGRAM
) $$d/run
$(EXEEXT
) $(DESTDIR
)$(bindir)/$$n$(EXEEXT
) || exit
1; \
3656 uninstall-local
: $(SIM_UNINSTALL_LOCAL_DEPS
)
3657 rm -f
$(DESTDIR
)$(bindir)/run
$(DESTDIR
)$(libdir)/libsim.a
3658 for d in
$(SIM_ENABLED_ARCHES
); do \
3659 rm -f
$(DESTDIR
)$(bindir)/run-
$$d $(DESTDIR
)$(libdir)/libsim-
$$d.a
; \
3662 # Tell versions [3.59,3.63) of GNU make to not export all variables.
3663 # Otherwise a system limit (for SysV at least) may be exceeded.