1 # Makefile.in generated by automake 1.15.1 from Makefile.am.
4 # Copyright (C) 1994-2017 Free Software Foundation, Inc.
6 # This Makefile.in is free software; the Free Software Foundation
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11 # but WITHOUT ANY WARRANTY, to the extent permitted by law; without
12 # even the implied warranty of MERCHANTABILITY or FITNESS FOR A
17 # Copyright (C) 1993-2023 Free Software Foundation, Inc.
19 # This program is free software; you can redistribute it and/or modify
20 # it under the terms of the GNU General Public License as published by
21 # the Free Software Foundation; either version 3 of the License, or
22 # (at your option) any later version.
24 # This program is distributed in the hope that it will be useful,
25 # but WITHOUT ANY WARRANTY; without even the implied warranty of
26 # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
27 # GNU General Public License for more details.
29 # You should have received a copy of the GNU General Public License
30 # along with this program. If not, see <http://www.gnu.org/licenses/>.
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132 @SIM_ENABLE_HW_TRUE@
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135 testsuite
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162 @SIM_ENABLE_ARCH_d10v_TRUE@am__append_23
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167 @SIM_ENABLE_ARCH_erc32_TRUE@am__append_28
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168 @SIM_ENABLE_ARCH_erc32_TRUE@am__append_29
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169 @SIM_ENABLE_ARCH_erc32_TRUE@am__append_30
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170 @SIM_ENABLE_ARCH_erc32_TRUE@am__append_31
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171 @SIM_ENABLE_ARCH_examples_TRUE@am__append_32
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172 @SIM_ENABLE_ARCH_examples_TRUE@am__append_33
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173 @SIM_ENABLE_ARCH_frv_TRUE@am__append_34
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174 @SIM_ENABLE_ARCH_frv_TRUE@am__append_35
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176 @SIM_ENABLE_ARCH_frv_TRUE@am__append_37
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177 @SIM_ENABLE_ARCH_ft32_TRUE@am__append_38
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180 @SIM_ENABLE_ARCH_h8300_TRUE@am__append_41
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181 @SIM_ENABLE_ARCH_iq2000_TRUE@am__append_42
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185 @SIM_ENABLE_ARCH_lm32_TRUE@am__append_46
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186 @SIM_ENABLE_ARCH_lm32_TRUE@am__append_47
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209 @SIM_ENABLE_ARCH_mcore_TRUE@am__append_62
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211 @SIM_ENABLE_ARCH_microblaze_TRUE@am__append_64
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212 @SIM_ENABLE_ARCH_microblaze_TRUE@am__append_65
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213 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_SINGLE_TRUE@am__append_66
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216 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_SINGLE_TRUE@ mips
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217 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_SINGLE_TRUE@ mips
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218 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_SINGLE_TRUE@ mips
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219 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_SINGLE_TRUE@ mips
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220 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_SINGLE_TRUE@ mips
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227 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@ \
228 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@ mips
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229 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@ mips
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230 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@ mips
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231 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@ mips
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232 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@ \
233 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@ mips
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234 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@ mips
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239 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_MULTI_TRUE@ mips
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242 @SIM_ENABLE_ARCH_mips_TRUE@am__append_70
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243 @SIM_ENABLE_ARCH_mips_TRUE@am__append_71
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244 @SIM_ENABLE_ARCH_mips_TRUE@
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245 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_SINGLE_TRUE@am__append_72
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250 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@
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252 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@ mips
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253 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@ mips
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255 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_MULTI_TRUE@am__append_74
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257 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_MULTI_TRUE@ mips
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258 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_MULTI_TRUE@ mips
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260 @SIM_ENABLE_ARCH_mips_TRUE@am__append_75
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261 @SIM_ENABLE_ARCH_mips_TRUE@am__append_76
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262 @SIM_ENABLE_ARCH_mn10300_TRUE@am__append_77
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263 @SIM_ENABLE_ARCH_mn10300_TRUE@am__append_78
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265 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300
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266 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300
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267 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300
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268 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300
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269 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300
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270 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300
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271 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300
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274 @SIM_ENABLE_ARCH_moxie_TRUE@am__append_81
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277 @SIM_ENABLE_ARCH_msp430_TRUE@am__append_84
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278 @SIM_ENABLE_ARCH_or1k_TRUE@am__append_85
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279 @SIM_ENABLE_ARCH_or1k_TRUE@am__append_86
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282 @SIM_ENABLE_ARCH_ppc_TRUE@am__append_89
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283 @SIM_ENABLE_ARCH_ppc_TRUE@
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284 @SIM_ENABLE_ARCH_ppc_TRUE@am__append_90
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285 @SIM_ENABLE_ARCH_ppc_TRUE@am__append_91
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286 @SIM_ENABLE_ARCH_ppc_TRUE@am__append_92
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287 @SIM_ENABLE_ARCH_ppc_TRUE@am__append_93
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288 @SIM_ENABLE_ARCH_pru_TRUE@am__append_94
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291 @SIM_ENABLE_ARCH_riscv_TRUE@am__append_97
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293 @SIM_ENABLE_ARCH_rl78_TRUE@am__append_99
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295 @SIM_ENABLE_ARCH_rx_TRUE@am__append_101
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296 @SIM_ENABLE_ARCH_sh_TRUE@am__append_102
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300 @SIM_ENABLE_ARCH_sh_TRUE@ sh
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303 @SIM_ENABLE_ARCH_sh_TRUE@am__append_106
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304 @SIM_ENABLE_ARCH_v850_TRUE@am__append_107
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308 @SIM_ENABLE_ARCH_v850_TRUE@ v850
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309 @SIM_ENABLE_ARCH_v850_TRUE@ v850
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310 @SIM_ENABLE_ARCH_v850_TRUE@ v850
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311 @SIM_ENABLE_ARCH_v850_TRUE@ v850
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324 $(top_srcdir
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= \
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$(OBJEXT
)
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= $(AR
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1493 $(am__vpath_adj_setup
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1494 $(am__tty_colors
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1495 srcdir=$(srcdir); export srcdir; \
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1513 am__expect_failure
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1515 am__expect_failure
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1517 $(AM_TESTS_ENVIRONMENT
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1518 # A shell command to get the names of the tests scripts with any registered
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1520 # the '.log' extension removed). The result is saved in the shell variable
1521 # '$bases'. This honors runtime overriding of TESTS and TEST_LOGS. Sadly,
1522 # we cannot use something simpler, involving e.g., "$(TEST_LOGS:.log=)",
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1525 am__set_TESTS_bases
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1526 bases
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1527 bases
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1529 RECHECK_LOGS
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1530 TEST_SUITE_LOG
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1531 TEST_EXTENSIONS
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1546 TEST_LOGS
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1559 AS_FOR_TARGET_AVR
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1561 AS_FOR_TARGET_BPF
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1563 AS_FOR_TARGET_CRIS
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1565 AS_FOR_TARGET_ERC32
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1566 AS_FOR_TARGET_EXAMPLE_SYNACOR
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1569 AS_FOR_TARGET_H8300
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1570 AS_FOR_TARGET_IQ2000
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1571 AS_FOR_TARGET_LM32
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1572 AS_FOR_TARGET_M32C
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1573 AS_FOR_TARGET_M32R
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1574 AS_FOR_TARGET_M68HC11
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1575 AS_FOR_TARGET_MCORE
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1576 AS_FOR_TARGET_MICROBLAZE
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1577 AS_FOR_TARGET_MIPS
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1578 AS_FOR_TARGET_MN10300
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1579 AS_FOR_TARGET_MOXIE
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1580 AS_FOR_TARGET_MSP430
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1581 AS_FOR_TARGET_OR1K
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1582 AS_FOR_TARGET_PPC
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1583 AS_FOR_TARGET_PRU
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1584 AS_FOR_TARGET_RISCV
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1585 AS_FOR_TARGET_RL78
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1586 AS_FOR_TARGET_RX
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1587 AS_FOR_TARGET_SH
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1588 AS_FOR_TARGET_V850
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1589 AUTOCONF
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1590 AUTOHEADER
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1591 AUTOMAKE
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1594 CCDEPMODE
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1595 CC_FOR_BUILD
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1596 CC_FOR_TARGET
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1598 CC_FOR_TARGET_ARM
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1599 CC_FOR_TARGET_AVR
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1600 CC_FOR_TARGET_BFIN
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1601 CC_FOR_TARGET_BPF
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1603 CC_FOR_TARGET_CRIS
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1604 CC_FOR_TARGET_D10V
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1605 CC_FOR_TARGET_ERC32
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1606 CC_FOR_TARGET_EXAMPLE_SYNACOR
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1607 CC_FOR_TARGET_FRV
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1608 CC_FOR_TARGET_FT32
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1609 CC_FOR_TARGET_H8300
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1610 CC_FOR_TARGET_IQ2000
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1611 CC_FOR_TARGET_LM32
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1612 CC_FOR_TARGET_M32C
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1613 CC_FOR_TARGET_M32R
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1614 CC_FOR_TARGET_M68HC11
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1615 CC_FOR_TARGET_MCORE
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1616 CC_FOR_TARGET_MICROBLAZE
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1617 CC_FOR_TARGET_MIPS
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1618 CC_FOR_TARGET_MN10300
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1619 CC_FOR_TARGET_MOXIE
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1620 CC_FOR_TARGET_MSP430
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1621 CC_FOR_TARGET_OR1K
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1622 CC_FOR_TARGET_PPC
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1623 CC_FOR_TARGET_PRU
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1624 CC_FOR_TARGET_RISCV
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1625 CC_FOR_TARGET_RL78
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1626 CC_FOR_TARGET_RX
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1627 CC_FOR_TARGET_SH
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1628 CC_FOR_TARGET_V850
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1630 CFLAGS_FOR_BUILD
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1631 CGEN_MAINT
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1633 CPPFLAGS
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1634 CPPFLAGS_FOR_BUILD
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1635 CYGPATH_W
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1636 C_DIALECT
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1639 DSYMUTIL
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1649 IGEN_FLAGS_SMP
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1651 INSTALL_DATA
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1652 INSTALL_PROGRAM
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1653 INSTALL_SCRIPT
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1654 INSTALL_STRIP_PROGRAM
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1657 LDFLAGS_FOR_BUILD
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1658 LD_FOR_TARGET
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1660 LD_FOR_TARGET_ARM
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1662 LD_FOR_TARGET_BFIN
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1663 LD_FOR_TARGET_BPF
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1664 LD_FOR_TARGET_CR16
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1665 LD_FOR_TARGET_CRIS
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1667 LD_FOR_TARGET_ERC32
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1668 LD_FOR_TARGET_EXAMPLE_SYNACOR
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1669 LD_FOR_TARGET_FRV
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1670 LD_FOR_TARGET_FT32
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1671 LD_FOR_TARGET_H8300
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1672 LD_FOR_TARGET_IQ2000
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1673 LD_FOR_TARGET_LM32
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1674 LD_FOR_TARGET_M32C
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1675 LD_FOR_TARGET_M32R
= @LD_FOR_TARGET_M32R@
1676 LD_FOR_TARGET_M68HC11
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1677 LD_FOR_TARGET_MCORE
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1678 LD_FOR_TARGET_MICROBLAZE
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1679 LD_FOR_TARGET_MIPS
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1680 LD_FOR_TARGET_MN10300
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1681 LD_FOR_TARGET_MOXIE
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1682 LD_FOR_TARGET_MSP430
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1683 LD_FOR_TARGET_OR1K
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1684 LD_FOR_TARGET_PPC
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1685 LD_FOR_TARGET_PRU
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1686 LD_FOR_TARGET_RISCV
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1687 LD_FOR_TARGET_RL78
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1688 LD_FOR_TARGET_RX
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1689 LD_FOR_TARGET_SH
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1690 LD_FOR_TARGET_V850
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1698 MAKEINFO
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1707 PACKAGE_BUGREPORT
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1708 PACKAGE_NAME
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1709 PACKAGE_STRING
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1710 PACKAGE_TARNAME
= @PACKAGE_TARNAME@
1711 PACKAGE_URL
= @PACKAGE_URL@
1712 PACKAGE_VERSION
= @PACKAGE_VERSION@
1713 PATH_SEPARATOR
= @PATH_SEPARATOR@
1714 PKGVERSION
= @PKGVERSION@
1715 PKG_CONFIG
= @PKG_CONFIG@
1716 PKG_CONFIG_LIBDIR
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1717 PKG_CONFIG_PATH
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1720 READLINE_CFLAGS
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1721 READLINE_LIB
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1722 REPORT_BUGS_TEXI
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1723 REPORT_BUGS_TO
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1724 SDL_CFLAGS
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1725 SDL_LIBS
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1727 SET_MAKE
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1729 SIM_CFLAG_WNO_SHADOW_LOCAL
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1730 SIM_CFLAG_WNO_UNUSED_BUT_SET_VARIABLE
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1732 SIM_FRV_TRAPDUMP_FLAGS
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1737 SIM_MIPS_FPU_BITSIZE
= @SIM_MIPS_FPU_BITSIZE@
1738 SIM_MIPS_GEN
= @SIM_MIPS_GEN@
1739 SIM_MIPS_IGEN_ITABLE_FLAGS
= @SIM_MIPS_IGEN_ITABLE_FLAGS@
1740 SIM_MIPS_M16_FLAGS
= @SIM_MIPS_M16_FLAGS@
1741 SIM_MIPS_MULTI_IGEN_CONFIGS
= @SIM_MIPS_MULTI_IGEN_CONFIGS@
1742 SIM_MIPS_MULTI_OBJ
= @SIM_MIPS_MULTI_OBJ@
1743 SIM_MIPS_MULTI_SRC
= @SIM_MIPS_MULTI_SRC@
1744 SIM_MIPS_SINGLE_FLAGS
= @SIM_MIPS_SINGLE_FLAGS@
1745 SIM_MIPS_SUBTARGET
= @SIM_MIPS_SUBTARGET@
1746 SIM_PRIMARY_TARGET
= @SIM_PRIMARY_TARGET@
1747 SIM_RISCV_BITSIZE
= @SIM_RISCV_BITSIZE@
1748 SIM_RX_CYCLE_ACCURATE_FLAGS
= @SIM_RX_CYCLE_ACCURATE_FLAGS@
1749 SIM_TOOLCHAIN_VARS
= @SIM_TOOLCHAIN_VARS@
1751 TERMCAP_LIB
= @TERMCAP_LIB@
1753 WARN_CFLAGS
= @WARN_CFLAGS@
1754 WERROR_CFLAGS
= @WERROR_CFLAGS@
1755 abs_builddir
= @abs_builddir@
1756 abs_srcdir
= @abs_srcdir@
1757 abs_top_builddir
= @abs_top_builddir@
1758 abs_top_srcdir
= @abs_top_srcdir@
1759 ac_ct_CC
= @ac_ct_CC@
1760 ac_ct_DUMPBIN
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1761 am__include
= @am__include@
1762 am__leading_dot
= @am__leading_dot@
1763 am__quote
= @am__quote@
1765 am__untar
= @am__untar@
1768 build_alias
= @build_alias@
1769 build_cpu
= @build_cpu@
1770 build_os
= @build_os@
1771 build_vendor
= @build_vendor@
1772 builddir
= @builddir@
1776 datarootdir
= @datarootdir@
1779 exec_prefix = @
exec_prefix@
1781 host_alias
= @host_alias@
1782 host_cpu
= @host_cpu@
1784 host_vendor
= @host_vendor@
1786 includedir = @
includedir@
1788 install_sh
= @install_sh@
1790 libexecdir
= @libexecdir@
1791 localedir
= @localedir@
1792 localstatedir
= @localstatedir@
1795 oldincludedir = @
oldincludedir@
1798 program_transform_name
= @program_transform_name@
1801 sharedstatedir
= @sharedstatedir@
1804 sysconfdir
= @sysconfdir@
1806 target_alias
= @target_alias@
1807 target_cpu
= @target_cpu@
1808 target_os
= @target_os@
1809 target_vendor
= @target_vendor@
1810 top_build_prefix
= @top_build_prefix@
1811 top_builddir
= @top_builddir@
1812 top_srcdir
= @top_srcdir@
1813 AUTOMAKE_OPTIONS
= dejagnu foreign no-dist subdir-objects
1814 ACLOCAL_AMFLAGS
= -Im4
-I..
-I..
/config
1815 GNULIB_PARENT_DIR
= ..
1816 srccom
= $(srcdir)/common
1817 srcroot
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1819 pkginclude_HEADERS
= $(am__append_1
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1820 EXTRA_LIBRARIES
= igen
/libigen.a
$(am__append_91
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1821 noinst_LIBRARIES
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$(am__append_3
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1822 $(am__append_7
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1823 $(am__append_13
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1825 $(am__append_38
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1826 $(am__append_46
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1827 $(am__append_58
) $(am__append_62
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) \
1829 $(am__append_83
) $(am__append_85
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1830 $(am__append_96
) $(am__append_98
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1831 $(am__append_102
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1832 BUILT_SOURCES
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) \
1833 $(am__append_36
) $(am__append_44
) $(am__append_48
) \
1834 $(am__append_56
) $(am__append_71
) $(am__append_79
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1835 $(am__append_87
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)
1836 CLEANFILES
= common
/version.c common
/version.c-stamp \
1837 testsuite
/common
/bits-gen testsuite
/common
/bits32m0.c \
1838 testsuite
/common
/bits32m31.c testsuite
/common
/bits64m0.c \
1839 testsuite
/common
/bits64m63.c
1840 DISTCLEANFILES
= $(am__append_76
)
1841 MOSTLYCLEANFILES
= core
$(SIM_ENABLED_ARCHES
:%=%/*.o
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1842 $(SIM_ENABLED_ARCHES
:%=%/hw-config.h
) \
1843 $(SIM_ENABLED_ARCHES
:%=%/stamp-hw
) \
1844 $(SIM_ENABLED_ARCHES
:%=%/modules.c
) \
1845 $(SIM_ENABLED_ARCHES
:%=%/stamp-modules
) $(igen_IGEN_TOOLS
) \
1846 igen
/libigen.a site-sim-config.exp testrun.log testrun.sum \
1847 $(am__append_17
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1850 $(am__append_75
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1851 $(am__append_93
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1852 CONFIG_STATUS_DEPENDENCIES
= $(srcroot
)/bfd
/development.sh
1856 $(AM_CFLAGS_
$(subst -,_
,$(@D
))) \
1857 $(AM_CFLAGS_
$(subst -,_
,$(@D
)_
$(@F
)))
1859 AM_CPPFLAGS
= $(INCGNU
) -I
$(srcroot
) -I
$(srcroot
)/include -I..
/bfd \
1860 -I..
-I
$(@D
) -I
$(srcdir)/$(@D
) $(SIM_HW_CFLAGS
) $(SIM_INLINE
) \
1861 $(AM_CPPFLAGS_
$(subst -,_
,$(@D
))) $(AM_CPPFLAGS_
$(subst \
1862 -,_
,$(@D
)_
$(@F
))) -I
$(srcdir)/common
-DSIM_TOPDIR_BUILD
1863 AM_CPPFLAGS_FOR_BUILD
= -I
$(srcroot
)/include $(SIM_HW_CFLAGS
) \
1864 $(SIM_INLINE
) -I
$(srcdir)/common
1865 COMPILE_FOR_BUILD
= $(CC_FOR_BUILD
) $(AM_CPPFLAGS_FOR_BUILD
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1866 LINK_FOR_BUILD
= $(CC_FOR_BUILD
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1867 SIM_ALL_RECURSIVE_DEPS
= $(am__append_89
)
1868 SIM_INSTALL_DATA_LOCAL_DEPS
=
1869 SIM_INSTALL_EXEC_LOCAL_DEPS
= $(am__append_30
)
1870 SIM_UNINSTALL_LOCAL_DEPS
= $(am__append_31
)
1871 SIM_DEPBASE
= $(@D
)/$(DEPDIR
)/$(@F
:.o
=)
1873 $(AM_V_CC
)$(COMPILE
) -MT
$@
-MD
-MP
-MF
$(SIM_DEPBASE
).Tpo
-c
-o
$@
$< && \
1874 $(am__mv
) $(SIM_DEPBASE
).Tpo
$(SIM_DEPBASE
).Po
1876 AM_CPPFLAGS_common
= -DSIM_COMMON_BUILD
1877 common_libcommon_a_SOURCES
= \
1879 common
/portability.c \
1881 common
/sim-signal.c \
1883 common
/target-newlib-errno.c \
1884 common
/target-newlib-open.c \
1885 common
/target-newlib-signal.c \
1886 common
/target-newlib-syscall.c \
1889 SIM_COMMON_HW_OBJS
= \
1901 SIM_NEW_COMMON_OBJS
= sim-arange.o sim-bits.o sim-close.o \
1902 sim-command.o sim-config.o sim-core.o sim-cpu.o sim-endian.o \
1903 sim-engine.o sim-events.o sim-fpu.o sim-hload.o sim-hrw.o \
1904 sim-io.o sim-info.o sim-memopt.o sim-model.o sim-module.o \
1905 sim-options.o sim-profile.o sim-reason.o sim-reg.o sim-stop.o \
1906 sim-syscall.o sim-trace.o sim-utils.o sim-watch.o \
1908 SIM_HW_DEVICES
= cfi core pal glue
1909 am_arch_d
= $(subst -,_
,$(@D
))
1910 GEN_MODULES_C_SRCS
= \
1912 $(patsubst %,$(srcdir)/%,$($(am_arch_d
)_libsim_a_SOURCES
)) \
1913 $(patsubst %.o
,$(srcdir)/%.c
,$($(am_arch_d
)_libsim_a_OBJECTS
) $($(am_arch_d
)_libsim_a_LIBADD
)) \
1914 $(filter-out %.o
,$(patsubst $(@D
)/%.o
,$(srcdir)/common
/%.c
,$($(am_arch_d
)_libsim_a_LIBADD
))))
1916 LIBIBERTY_LIB
= ..
/libiberty
/libiberty.a
1917 BFD_LIB
= ..
/bfd
/libbfd.la
1918 OPCODES_LIB
= ..
/opcodes
/libopcodes.la
1924 $(LIBGNU_EXTRA_LIBS
)
1927 CGEN
= "$(GUILE) -l $(cgendir)/guile.scm -s"
1929 CGEN_CPU_DIR
= $(cgendir
)/cpu
1930 CPU_DIR
= $(srcroot
)/cpu
1931 CGEN_ARCHFILE
= $(CPU_DIR
)/$(@D
).cpu
1932 CGEN_READ_SCM
= $(cgendir
)/sim.scm
1933 CGEN_ARCH_SCM
= $(cgendir
)/sim-arch.scm
1934 CGEN_CPU_SCM
= $(cgendir
)/sim-cpu.scm
$(cgendir
)/sim-model.scm
1935 CGEN_DECODE_SCM
= $(cgendir
)/sim-decode.scm
1936 CGEN_DESC_SCM
= $(cgendir
)/desc.scm
$(cgendir
)/desc-cpu.scm
1937 CGEN_CPU_EXTR
= /extr
/
1938 CGEN_CPU_READ
= /read
/
1939 CGEN_CPU_WRITE
= /write
/
1940 CGEN_CPU_SEM
= /sem
/
1941 CGEN_CPU_SEMSW
= /semsw
/
1942 CGEN_WRAPPER
= $(srccom
)/cgen.sh
1944 $(SHELL
) $(CGEN_WRAPPER
) arch
$(srcdir)/$(@D
) \
1945 $(CGEN
) $(cgendir
) "$(CGENFLAGS)" \
1946 $(@D
) "$$FLAGS" ignored
"$$isa" $$mach ignored \
1947 $(CGEN_ARCHFILE
) ignored
1950 $(SHELL
) $(CGEN_WRAPPER
) cpu
$(srcdir)/$(@D
) \
1951 $(CGEN
) $(cgendir
) "$(CGENFLAGS)" \
1952 $(@D
) "$$FLAGS" $$cpu "$$isa" $$mach "$$SUFFIX" \
1953 $(CGEN_ARCHFILE
) "$$EXTRAFILES"
1956 $(SHELL
) $(CGEN_WRAPPER
) defs
$(srcdir)/$(@D
) \
1957 $(CGEN
) $(cgendir
) "$(CGENFLAGS)" \
1958 $(@D
) "$$FLAGS" $$cpu "$$isa" $$mach "$$SUFFIX" \
1959 $(CGEN_ARCHFILE
) ignored
1962 $(SHELL
) $(CGEN_WRAPPER
) decode
$(srcdir)/$(@D
) \
1963 $(CGEN
) $(cgendir
) "$(CGENFLAGS)" \
1964 $(@D
) "$$FLAGS" $$cpu "$$isa" $$mach "$$SUFFIX" \
1965 $(CGEN_ARCHFILE
) "$$EXTRAFILES"
1967 CGEN_GEN_CPU_DECODE
= \
1968 $(SHELL
) $(CGEN_WRAPPER
) cpu-decode
$(srcdir)/$(@D
) \
1969 $(CGEN
) $(cgendir
) "$(CGENFLAGS)" \
1970 $(@D
) "$$FLAGS" $$cpu "$$isa" $$mach "$$SUFFIX" \
1971 $(CGEN_ARCHFILE
) "$$EXTRAFILES"
1973 CGEN_GEN_CPU_DESC
= \
1974 $(SHELL
) $(CGEN_WRAPPER
) desc
$(srcdir)/$(@D
) \
1975 $(CGEN
) $(cgendir
) "$(CGENFLAGS)" \
1976 $(@D
) "$$FLAGS" $$cpu "$$isa" $$mach "$$SUFFIX" \
1977 $(CGEN_ARCHFILE
) ignored
$$opcfile
1980 $(SHELL
) $(srccom
)/lineno.sh \
1981 $(srccom
)/genmloop.sh \
1983 -shell $(SHELL
) -awk
$(AWK
) -lineno
$(srccom
)/lineno.sh \
1984 -infile
$< -outfile-prefix
$(@D
)/
1987 # igen leaks memory, and therefore makes AddressSanitizer unhappy. Disable
1988 # leak detection while running it.
1989 IGEN
= igen
/igen
$(EXEEXT
)
1990 IGEN_RUN
= ASAN_OPTIONS
=detect_leaks
=0 $(IGEN
) $(IGEN_FLAGS_SMP
)
1991 igen_libigen_a_SOURCES
= \
1995 igen
/filter_host.c \
2003 igen
/gen-semantics.c \
2004 igen
/gen-idecode.c \
2005 igen
/gen-support.c \
2009 igen_igen_SOURCES
= igen
/igen.c
2010 igen_igen_LDADD
= igen
/libigen.a
2011 igen_filter_SOURCES
=
2012 igen_filter_LDADD
= igen
/filter-main.o igen
/libigen.a
2014 igen_gen_LDADD
= igen
/gen-main.o igen
/libigen.a
2015 igen_ld_cache_SOURCES
=
2016 igen_ld_cache_LDADD
= igen
/ld-cache-main.o igen
/libigen.a
2017 igen_ld_decode_SOURCES
=
2018 igen_ld_decode_LDADD
= igen
/ld-decode-main.o igen
/libigen.a
2019 igen_ld_insn_SOURCES
=
2020 igen_ld_insn_LDADD
= igen
/ld-insn-main.o igen
/libigen.a
2021 igen_table_SOURCES
=
2022 igen_table_LDADD
= igen
/table-main.o igen
/libigen.a
2032 EXTRA_DEJAGNU_SITE_CONFIG
= site-sim-config.exp
2034 # Custom verbose test variables that automake doesn't provide (yet?).
2035 AM_V_RUNTEST
= $(AM_V_RUNTEST_@AM_V@
)
2036 AM_V_RUNTEST_
= $(AM_V_RUNTEST_@AM_DEFAULT_V@
)
2037 AM_V_RUNTEST_0
= @echo
" RUNTEST $(RUNTESTFLAGS) $*";
2040 LC_ALL
=C
; export LC_ALL
; \
2041 EXPECT
=${EXPECT} ; export EXPECT
; \
2042 runtest
=$(RUNTEST
); \
2043 $$runtest $(RUNTESTFLAGS
)
2045 testsuite_common_CPPFLAGS
= \
2046 -I
$(srcdir)/common \
2047 -I
$(srcroot
)/include \
2050 @SIM_ENABLE_ARCH_aarch64_TRUE@nodist_aarch64_libsim_a_SOURCES
= \
2051 @SIM_ENABLE_ARCH_aarch64_TRUE@ aarch64
/modules.c
2053 @SIM_ENABLE_ARCH_aarch64_TRUE@aarch64_libsim_a_SOURCES
= \
2054 @SIM_ENABLE_ARCH_aarch64_TRUE@
$(common_libcommon_a_SOURCES
)
2056 @SIM_ENABLE_ARCH_aarch64_TRUE@aarch64_libsim_a_LIBADD
= \
2057 @SIM_ENABLE_ARCH_aarch64_TRUE@
$(patsubst %,aarch64
/%,$(SIM_NEW_COMMON_OBJS
)) \
2058 @SIM_ENABLE_ARCH_aarch64_TRUE@
$(patsubst %,aarch64
/dv-
%.o
,$(SIM_HW_DEVICES
)) \
2059 @SIM_ENABLE_ARCH_aarch64_TRUE@ aarch64
/cpustate.o \
2060 @SIM_ENABLE_ARCH_aarch64_TRUE@ aarch64
/interp.o \
2061 @SIM_ENABLE_ARCH_aarch64_TRUE@ aarch64
/memory.o \
2062 @SIM_ENABLE_ARCH_aarch64_TRUE@ aarch64
/sim-resume.o \
2063 @SIM_ENABLE_ARCH_aarch64_TRUE@ aarch64
/simulator.o
2065 @SIM_ENABLE_ARCH_aarch64_TRUE@aarch64_run_SOURCES
=
2066 @SIM_ENABLE_ARCH_aarch64_TRUE@aarch64_run_LDADD
= \
2067 @SIM_ENABLE_ARCH_aarch64_TRUE@ aarch64
/nrun.o \
2068 @SIM_ENABLE_ARCH_aarch64_TRUE@ aarch64
/libsim.a \
2069 @SIM_ENABLE_ARCH_aarch64_TRUE@
$(SIM_COMMON_LIBS
)
2071 @SIM_ENABLE_ARCH_arm_TRUE@AM_CPPFLAGS_arm
= -DMODET
2072 @SIM_ENABLE_ARCH_arm_TRUE@nodist_arm_libsim_a_SOURCES
= \
2073 @SIM_ENABLE_ARCH_arm_TRUE@ arm
/modules.c
2075 @SIM_ENABLE_ARCH_arm_TRUE@arm_libsim_a_SOURCES
= \
2076 @SIM_ENABLE_ARCH_arm_TRUE@
$(common_libcommon_a_SOURCES
)
2078 @SIM_ENABLE_ARCH_arm_TRUE@arm_libsim_a_LIBADD
= \
2079 @SIM_ENABLE_ARCH_arm_TRUE@ arm
/wrapper.o \
2080 @SIM_ENABLE_ARCH_arm_TRUE@
$(patsubst %,arm
/%,$(SIM_NEW_COMMON_OBJS
)) \
2081 @SIM_ENABLE_ARCH_arm_TRUE@
$(patsubst %,arm
/dv-
%.o
,$(SIM_HW_DEVICES
)) \
2082 @SIM_ENABLE_ARCH_arm_TRUE@ arm
/armemu.o \
2083 @SIM_ENABLE_ARCH_arm_TRUE@ arm
/armemu32.o arm
/arminit.o arm
/armos.o arm
/armsupp.o \
2084 @SIM_ENABLE_ARCH_arm_TRUE@ arm
/armvirt.o arm
/thumbemu.o \
2085 @SIM_ENABLE_ARCH_arm_TRUE@ arm
/armcopro.o arm
/maverick.o arm
/iwmmxt.o
2087 @SIM_ENABLE_ARCH_arm_TRUE@arm_run_SOURCES
=
2088 @SIM_ENABLE_ARCH_arm_TRUE@arm_run_LDADD
= \
2089 @SIM_ENABLE_ARCH_arm_TRUE@ arm
/nrun.o \
2090 @SIM_ENABLE_ARCH_arm_TRUE@ arm
/libsim.a \
2091 @SIM_ENABLE_ARCH_arm_TRUE@
$(SIM_COMMON_LIBS
)
2093 @SIM_ENABLE_ARCH_arm_TRUE@armdocdir
= $(docdir
)/arm
2094 @SIM_ENABLE_ARCH_arm_TRUE@armdoc_DATA
= arm
/README
2095 @SIM_ENABLE_ARCH_avr_TRUE@nodist_avr_libsim_a_SOURCES
= \
2096 @SIM_ENABLE_ARCH_avr_TRUE@ avr
/modules.c
2098 @SIM_ENABLE_ARCH_avr_TRUE@avr_libsim_a_SOURCES
= \
2099 @SIM_ENABLE_ARCH_avr_TRUE@
$(common_libcommon_a_SOURCES
)
2101 @SIM_ENABLE_ARCH_avr_TRUE@avr_libsim_a_LIBADD
= \
2102 @SIM_ENABLE_ARCH_avr_TRUE@ avr
/interp.o \
2103 @SIM_ENABLE_ARCH_avr_TRUE@
$(patsubst %,avr
/%,$(SIM_NEW_COMMON_OBJS
)) \
2104 @SIM_ENABLE_ARCH_avr_TRUE@
$(patsubst %,avr
/dv-
%.o
,$(SIM_HW_DEVICES
)) \
2105 @SIM_ENABLE_ARCH_avr_TRUE@ avr
/sim-resume.o
2107 @SIM_ENABLE_ARCH_avr_TRUE@avr_run_SOURCES
=
2108 @SIM_ENABLE_ARCH_avr_TRUE@avr_run_LDADD
= \
2109 @SIM_ENABLE_ARCH_avr_TRUE@ avr
/nrun.o \
2110 @SIM_ENABLE_ARCH_avr_TRUE@ avr
/libsim.a \
2111 @SIM_ENABLE_ARCH_avr_TRUE@
$(SIM_COMMON_LIBS
)
2113 @SIM_ENABLE_ARCH_bfin_TRUE@AM_CPPFLAGS_bfin
= $(SDL_CFLAGS
)
2114 @SIM_ENABLE_ARCH_bfin_TRUE@nodist_bfin_libsim_a_SOURCES
= \
2115 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin
/modules.c
2117 @SIM_ENABLE_ARCH_bfin_TRUE@bfin_libsim_a_SOURCES
= \
2118 @SIM_ENABLE_ARCH_bfin_TRUE@
$(common_libcommon_a_SOURCES
)
2120 @SIM_ENABLE_ARCH_bfin_TRUE@bfin_libsim_a_LIBADD
= \
2121 @SIM_ENABLE_ARCH_bfin_TRUE@
$(patsubst %,bfin
/%,$(SIM_NEW_COMMON_OBJS
)) \
2122 @SIM_ENABLE_ARCH_bfin_TRUE@
$(patsubst %,bfin
/dv-
%.o
,$(SIM_HW_DEVICES
)) \
2123 @SIM_ENABLE_ARCH_bfin_TRUE@
$(patsubst %,bfin
/dv-
%.o
,$(bfin_SIM_EXTRA_HW_DEVICES
)) \
2124 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin
/bfin-sim.o \
2125 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin
/devices.o \
2126 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin
/gui.o \
2127 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin
/interp.o \
2128 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin
/machs.o \
2129 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin
/sim-resume.o
2131 @SIM_ENABLE_ARCH_bfin_TRUE@bfin_run_SOURCES
=
2132 @SIM_ENABLE_ARCH_bfin_TRUE@bfin_run_LDADD
= \
2133 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin
/nrun.o \
2134 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin
/libsim.a \
2135 @SIM_ENABLE_ARCH_bfin_TRUE@
$(SIM_COMMON_LIBS
)
2137 @SIM_ENABLE_ARCH_bfin_TRUE@bfin_SIM_EXTRA_HW_DEVICES
= \
2138 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_cec \
2139 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_ctimer \
2140 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_dma \
2141 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_dmac \
2142 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_ebiu_amc \
2143 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_ebiu_ddrc \
2144 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_ebiu_sdc \
2145 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_emac \
2146 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_eppi \
2147 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_evt \
2148 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_gpio \
2149 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_gpio2 \
2150 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_gptimer \
2151 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_jtag \
2152 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_mmu \
2153 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_nfc \
2154 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_otp \
2155 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_pfmon \
2156 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_pint \
2157 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_pll \
2158 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_ppi \
2159 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_rtc \
2160 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_sic \
2161 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_spi \
2162 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_trace \
2163 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_twi \
2164 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_uart \
2165 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_uart2 \
2166 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_wdog \
2167 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_wp \
2168 @SIM_ENABLE_ARCH_bfin_TRUE@ eth_phy
2170 @SIM_ENABLE_ARCH_bpf_TRUE@nodist_bpf_libsim_a_SOURCES
= \
2171 @SIM_ENABLE_ARCH_bpf_TRUE@ bpf
/modules.c
2173 @SIM_ENABLE_ARCH_bpf_TRUE@bpf_libsim_a_SOURCES
= \
2174 @SIM_ENABLE_ARCH_bpf_TRUE@
$(common_libcommon_a_SOURCES
)
2176 @SIM_ENABLE_ARCH_bpf_TRUE@bpf_libsim_a_LIBADD
= \
2177 @SIM_ENABLE_ARCH_bpf_TRUE@ bpf
/bpf-sim.o \
2178 @SIM_ENABLE_ARCH_bpf_TRUE@
$(patsubst %,bpf
/%,$(SIM_NEW_COMMON_OBJS
)) \
2179 @SIM_ENABLE_ARCH_bpf_TRUE@
$(patsubst %,bpf
/dv-
%.o
,$(SIM_HW_DEVICES
)) \
2180 @SIM_ENABLE_ARCH_bpf_TRUE@ bpf
/sim-resume.o
2182 @SIM_ENABLE_ARCH_bpf_TRUE@bpf_run_SOURCES
=
2183 @SIM_ENABLE_ARCH_bpf_TRUE@bpf_run_LDADD
= \
2184 @SIM_ENABLE_ARCH_bpf_TRUE@ bpf
/nrun.o \
2185 @SIM_ENABLE_ARCH_bpf_TRUE@ bpf
/libsim.a \
2186 @SIM_ENABLE_ARCH_bpf_TRUE@
$(SIM_COMMON_LIBS
)
2188 @SIM_ENABLE_ARCH_cr16_TRUE@nodist_cr16_libsim_a_SOURCES
= \
2189 @SIM_ENABLE_ARCH_cr16_TRUE@ cr16
/modules.c
2191 @SIM_ENABLE_ARCH_cr16_TRUE@cr16_libsim_a_SOURCES
= \
2192 @SIM_ENABLE_ARCH_cr16_TRUE@
$(common_libcommon_a_SOURCES
)
2194 @SIM_ENABLE_ARCH_cr16_TRUE@cr16_libsim_a_LIBADD
= \
2195 @SIM_ENABLE_ARCH_cr16_TRUE@
$(patsubst %,cr16
/%,$(SIM_NEW_COMMON_OBJS
)) \
2196 @SIM_ENABLE_ARCH_cr16_TRUE@
$(patsubst %,cr16
/dv-
%.o
,$(SIM_HW_DEVICES
)) \
2197 @SIM_ENABLE_ARCH_cr16_TRUE@ cr16
/interp.o \
2198 @SIM_ENABLE_ARCH_cr16_TRUE@ cr16
/sim-resume.o \
2199 @SIM_ENABLE_ARCH_cr16_TRUE@ cr16
/simops.o \
2200 @SIM_ENABLE_ARCH_cr16_TRUE@ cr16
/table.o
2202 @SIM_ENABLE_ARCH_cr16_TRUE@cr16_run_SOURCES
=
2203 @SIM_ENABLE_ARCH_cr16_TRUE@cr16_run_LDADD
= \
2204 @SIM_ENABLE_ARCH_cr16_TRUE@ cr16
/nrun.o \
2205 @SIM_ENABLE_ARCH_cr16_TRUE@ cr16
/libsim.a \
2206 @SIM_ENABLE_ARCH_cr16_TRUE@
$(SIM_COMMON_LIBS
)
2208 @SIM_ENABLE_ARCH_cr16_TRUE@cr16_BUILD_OUTPUTS
= \
2209 @SIM_ENABLE_ARCH_cr16_TRUE@ cr16
/gencode
$(EXEEXT
) \
2210 @SIM_ENABLE_ARCH_cr16_TRUE@ cr16
/table.c
2212 @SIM_ENABLE_ARCH_cr16_TRUE@cr16_gencode_SOURCES
= cr16
/gencode.c
2213 @SIM_ENABLE_ARCH_cr16_TRUE@cr16_gencode_LDADD
= cr16
/cr16-opc.o
2214 @SIM_ENABLE_ARCH_cris_TRUE@AM_CFLAGS_cris_mloopv10f.o
= $(SIM_CFLAG_WNO_UNUSED_BUT_SET_VARIABLE
) \
2215 @SIM_ENABLE_ARCH_cris_TRUE@
$(SIM_CFLAG_WNO_SHADOW_LOCAL
)
2216 @SIM_ENABLE_ARCH_cris_TRUE@AM_CFLAGS_cris_mloopv32f.o
= $(SIM_CFLAG_WNO_UNUSED_BUT_SET_VARIABLE
)
2217 @SIM_ENABLE_ARCH_cris_TRUE@nodist_cris_libsim_a_SOURCES
= \
2218 @SIM_ENABLE_ARCH_cris_TRUE@ cris
/modules.c
2220 @SIM_ENABLE_ARCH_cris_TRUE@cris_libsim_a_SOURCES
= \
2221 @SIM_ENABLE_ARCH_cris_TRUE@
$(common_libcommon_a_SOURCES
)
2223 @SIM_ENABLE_ARCH_cris_TRUE@cris_libsim_a_LIBADD
= \
2224 @SIM_ENABLE_ARCH_cris_TRUE@
$(patsubst %,cris
/%,$(SIM_NEW_COMMON_OBJS
)) \
2225 @SIM_ENABLE_ARCH_cris_TRUE@
$(patsubst %,cris
/dv-
%.o
,$(SIM_HW_DEVICES
)) \
2226 @SIM_ENABLE_ARCH_cris_TRUE@
$(patsubst %,cris
/dv-
%.o
,$(cris_SIM_EXTRA_HW_DEVICES
)) \
2227 @SIM_ENABLE_ARCH_cris_TRUE@ \
2228 @SIM_ENABLE_ARCH_cris_TRUE@ cris
/cgen-run.o \
2229 @SIM_ENABLE_ARCH_cris_TRUE@ cris
/cgen-scache.o \
2230 @SIM_ENABLE_ARCH_cris_TRUE@ cris
/cgen-trace.o \
2231 @SIM_ENABLE_ARCH_cris_TRUE@ cris
/cgen-utils.o \
2232 @SIM_ENABLE_ARCH_cris_TRUE@ \
2233 @SIM_ENABLE_ARCH_cris_TRUE@ cris
/arch.o \
2234 @SIM_ENABLE_ARCH_cris_TRUE@ cris
/crisv10f.o \
2235 @SIM_ENABLE_ARCH_cris_TRUE@ cris
/cpuv10.o \
2236 @SIM_ENABLE_ARCH_cris_TRUE@ cris
/decodev10.o \
2237 @SIM_ENABLE_ARCH_cris_TRUE@ cris
/modelv10.o \
2238 @SIM_ENABLE_ARCH_cris_TRUE@ cris
/mloopv10f.o \
2239 @SIM_ENABLE_ARCH_cris_TRUE@ cris
/crisv32f.o \
2240 @SIM_ENABLE_ARCH_cris_TRUE@ cris
/cpuv32.o \
2241 @SIM_ENABLE_ARCH_cris_TRUE@ cris
/decodev32.o \
2242 @SIM_ENABLE_ARCH_cris_TRUE@ cris
/modelv32.o \
2243 @SIM_ENABLE_ARCH_cris_TRUE@ cris
/mloopv32f.o \
2244 @SIM_ENABLE_ARCH_cris_TRUE@ \
2245 @SIM_ENABLE_ARCH_cris_TRUE@ cris
/sim-if.o \
2246 @SIM_ENABLE_ARCH_cris_TRUE@ cris
/traps.o
2248 @SIM_ENABLE_ARCH_cris_TRUE@cris_run_SOURCES
=
2249 @SIM_ENABLE_ARCH_cris_TRUE@cris_run_LDADD
= \
2250 @SIM_ENABLE_ARCH_cris_TRUE@ cris
/nrun.o \
2251 @SIM_ENABLE_ARCH_cris_TRUE@ cris
/libsim.a \
2252 @SIM_ENABLE_ARCH_cris_TRUE@
$(SIM_COMMON_LIBS
)
2254 @SIM_ENABLE_ARCH_cris_TRUE@cris_SIM_EXTRA_HW_DEVICES
= rv cris cris_900000xx
2255 @SIM_ENABLE_ARCH_cris_TRUE@cris_rvdummy_SOURCES
= cris
/rvdummy.c
2256 @SIM_ENABLE_ARCH_cris_TRUE@cris_rvdummy_LDADD
= $(LIBIBERTY_LIB
)
2257 @SIM_ENABLE_ARCH_cris_TRUE@cris_BUILD_OUTPUTS
= \
2258 @SIM_ENABLE_ARCH_cris_TRUE@ cris
/mloopv10f.c \
2259 @SIM_ENABLE_ARCH_cris_TRUE@ cris
/stamp-mloop-v10f \
2260 @SIM_ENABLE_ARCH_cris_TRUE@ cris
/mloopv32f.c \
2261 @SIM_ENABLE_ARCH_cris_TRUE@ cris
/stamp-mloop-v32f
2263 @SIM_ENABLE_ARCH_d10v_TRUE@nodist_d10v_libsim_a_SOURCES
= \
2264 @SIM_ENABLE_ARCH_d10v_TRUE@ d10v
/modules.c
2266 @SIM_ENABLE_ARCH_d10v_TRUE@d10v_libsim_a_SOURCES
= \
2267 @SIM_ENABLE_ARCH_d10v_TRUE@
$(common_libcommon_a_SOURCES
)
2269 @SIM_ENABLE_ARCH_d10v_TRUE@d10v_libsim_a_LIBADD
= \
2270 @SIM_ENABLE_ARCH_d10v_TRUE@ d10v
/interp.o \
2271 @SIM_ENABLE_ARCH_d10v_TRUE@
$(patsubst %,d10v
/%,$(SIM_NEW_COMMON_OBJS
)) \
2272 @SIM_ENABLE_ARCH_d10v_TRUE@
$(patsubst %,d10v
/dv-
%.o
,$(SIM_HW_DEVICES
)) \
2273 @SIM_ENABLE_ARCH_d10v_TRUE@ d10v
/endian.o \
2274 @SIM_ENABLE_ARCH_d10v_TRUE@ d10v
/sim-resume.o \
2275 @SIM_ENABLE_ARCH_d10v_TRUE@ d10v
/simops.o \
2276 @SIM_ENABLE_ARCH_d10v_TRUE@ d10v
/table.o
2278 @SIM_ENABLE_ARCH_d10v_TRUE@d10v_run_SOURCES
=
2279 @SIM_ENABLE_ARCH_d10v_TRUE@d10v_run_LDADD
= \
2280 @SIM_ENABLE_ARCH_d10v_TRUE@ d10v
/nrun.o \
2281 @SIM_ENABLE_ARCH_d10v_TRUE@ d10v
/libsim.a \
2282 @SIM_ENABLE_ARCH_d10v_TRUE@
$(SIM_COMMON_LIBS
)
2284 @SIM_ENABLE_ARCH_d10v_TRUE@d10v_BUILD_OUTPUTS
= \
2285 @SIM_ENABLE_ARCH_d10v_TRUE@ d10v
/gencode
$(EXEEXT
) \
2286 @SIM_ENABLE_ARCH_d10v_TRUE@ d10v
/table.c
2288 @SIM_ENABLE_ARCH_d10v_TRUE@d10v_gencode_SOURCES
= d10v
/gencode.c
2289 @SIM_ENABLE_ARCH_d10v_TRUE@d10v_gencode_LDADD
= d10v
/d10v-opc.o
2290 @SIM_ENABLE_ARCH_erc32_TRUE@READLINE_SRC
= $(srcroot
)/readline
/readline
2291 @SIM_ENABLE_ARCH_erc32_TRUE@AM_CPPFLAGS_erc32
= $(READLINE_CFLAGS
) \
2292 @SIM_ENABLE_ARCH_erc32_TRUE@
-DFAST_UART
2293 @SIM_ENABLE_ARCH_erc32_TRUE@nodist_erc32_libsim_a_SOURCES
= \
2294 @SIM_ENABLE_ARCH_erc32_TRUE@ erc32
/modules.c
2296 @SIM_ENABLE_ARCH_erc32_TRUE@erc32_libsim_a_SOURCES
= \
2297 @SIM_ENABLE_ARCH_erc32_TRUE@
$(common_libcommon_a_SOURCES
)
2299 @SIM_ENABLE_ARCH_erc32_TRUE@erc32_libsim_a_LIBADD
= \
2300 @SIM_ENABLE_ARCH_erc32_TRUE@ erc32
/erc32.o \
2301 @SIM_ENABLE_ARCH_erc32_TRUE@ erc32
/exec.o \
2302 @SIM_ENABLE_ARCH_erc32_TRUE@ erc32
/float.o \
2303 @SIM_ENABLE_ARCH_erc32_TRUE@ erc32
/func.o \
2304 @SIM_ENABLE_ARCH_erc32_TRUE@ erc32
/help.o \
2305 @SIM_ENABLE_ARCH_erc32_TRUE@ erc32
/interf.o
2307 @SIM_ENABLE_ARCH_erc32_TRUE@erc32_run_SOURCES
=
2308 @SIM_ENABLE_ARCH_erc32_TRUE@erc32_run_LDADD
= \
2309 @SIM_ENABLE_ARCH_erc32_TRUE@ erc32
/sis.o \
2310 @SIM_ENABLE_ARCH_erc32_TRUE@ erc32
/libsim.a \
2311 @SIM_ENABLE_ARCH_erc32_TRUE@
$(SIM_COMMON_LIBS
) $(READLINE_LIB
) $(TERMCAP_LIB
)
2313 @SIM_ENABLE_ARCH_erc32_TRUE@erc32docdir
= $(docdir
)/erc32
2314 @SIM_ENABLE_ARCH_erc32_TRUE@erc32doc_DATA
= erc32
/README.erc32 erc32
/README.gdb erc32
/README.sis
2315 @SIM_ENABLE_ARCH_examples_TRUE@nodist_example_synacor_libsim_a_SOURCES
= \
2316 @SIM_ENABLE_ARCH_examples_TRUE@ example-synacor
/modules.c
2318 @SIM_ENABLE_ARCH_examples_TRUE@example_synacor_libsim_a_SOURCES
= \
2319 @SIM_ENABLE_ARCH_examples_TRUE@
$(common_libcommon_a_SOURCES
)
2321 @SIM_ENABLE_ARCH_examples_TRUE@example_synacor_libsim_a_LIBADD
= \
2322 @SIM_ENABLE_ARCH_examples_TRUE@
$(patsubst %,example-synacor
/%,$(SIM_NEW_COMMON_OBJS
)) \
2323 @SIM_ENABLE_ARCH_examples_TRUE@
$(patsubst %,example-synacor
/dv-
%.o
,$(SIM_HW_DEVICES
)) \
2324 @SIM_ENABLE_ARCH_examples_TRUE@ example-synacor
/interp.o \
2325 @SIM_ENABLE_ARCH_examples_TRUE@ example-synacor
/sim-main.o \
2326 @SIM_ENABLE_ARCH_examples_TRUE@ example-synacor
/sim-resume.o
2328 @SIM_ENABLE_ARCH_examples_TRUE@example_synacor_run_SOURCES
=
2329 @SIM_ENABLE_ARCH_examples_TRUE@example_synacor_run_LDADD
= \
2330 @SIM_ENABLE_ARCH_examples_TRUE@ example-synacor
/nrun.o \
2331 @SIM_ENABLE_ARCH_examples_TRUE@ example-synacor
/libsim.a \
2332 @SIM_ENABLE_ARCH_examples_TRUE@
$(SIM_COMMON_LIBS
)
2334 @SIM_ENABLE_ARCH_frv_TRUE@AM_CPPFLAGS_frv
= $(SIM_FRV_TRAPDUMP_FLAGS
)
2335 @SIM_ENABLE_ARCH_frv_TRUE@AM_CFLAGS_frv_sem.o
= -Wno-error
2336 @SIM_ENABLE_ARCH_frv_TRUE@nodist_frv_libsim_a_SOURCES
= \
2337 @SIM_ENABLE_ARCH_frv_TRUE@ frv
/modules.c
2339 @SIM_ENABLE_ARCH_frv_TRUE@frv_libsim_a_SOURCES
= \
2340 @SIM_ENABLE_ARCH_frv_TRUE@
$(common_libcommon_a_SOURCES
)
2342 @SIM_ENABLE_ARCH_frv_TRUE@frv_libsim_a_LIBADD
= \
2343 @SIM_ENABLE_ARCH_frv_TRUE@
$(patsubst %,frv
/%,$(SIM_NEW_COMMON_OBJS
)) \
2344 @SIM_ENABLE_ARCH_frv_TRUE@
$(patsubst %,frv
/dv-
%.o
,$(SIM_HW_DEVICES
)) \
2345 @SIM_ENABLE_ARCH_frv_TRUE@ \
2346 @SIM_ENABLE_ARCH_frv_TRUE@ frv
/cgen-accfp.o \
2347 @SIM_ENABLE_ARCH_frv_TRUE@ frv
/cgen-fpu.o \
2348 @SIM_ENABLE_ARCH_frv_TRUE@ frv
/cgen-run.o \
2349 @SIM_ENABLE_ARCH_frv_TRUE@ frv
/cgen-scache.o \
2350 @SIM_ENABLE_ARCH_frv_TRUE@ frv
/cgen-trace.o \
2351 @SIM_ENABLE_ARCH_frv_TRUE@ frv
/cgen-utils.o \
2352 @SIM_ENABLE_ARCH_frv_TRUE@ \
2353 @SIM_ENABLE_ARCH_frv_TRUE@ frv
/arch.o \
2354 @SIM_ENABLE_ARCH_frv_TRUE@ frv
/cgen-par.o \
2355 @SIM_ENABLE_ARCH_frv_TRUE@ frv
/cpu.o \
2356 @SIM_ENABLE_ARCH_frv_TRUE@ frv
/decode.o \
2357 @SIM_ENABLE_ARCH_frv_TRUE@ frv
/frv.o \
2358 @SIM_ENABLE_ARCH_frv_TRUE@ frv
/mloop.o \
2359 @SIM_ENABLE_ARCH_frv_TRUE@ frv
/model.o \
2360 @SIM_ENABLE_ARCH_frv_TRUE@ frv
/sem.o \
2361 @SIM_ENABLE_ARCH_frv_TRUE@ \
2362 @SIM_ENABLE_ARCH_frv_TRUE@ frv
/cache.o \
2363 @SIM_ENABLE_ARCH_frv_TRUE@ frv
/interrupts.o \
2364 @SIM_ENABLE_ARCH_frv_TRUE@ frv
/memory.o \
2365 @SIM_ENABLE_ARCH_frv_TRUE@ frv
/options.o \
2366 @SIM_ENABLE_ARCH_frv_TRUE@ frv
/pipeline.o \
2367 @SIM_ENABLE_ARCH_frv_TRUE@ frv
/profile.o \
2368 @SIM_ENABLE_ARCH_frv_TRUE@ frv
/profile-fr400.o \
2369 @SIM_ENABLE_ARCH_frv_TRUE@ frv
/profile-fr450.o \
2370 @SIM_ENABLE_ARCH_frv_TRUE@ frv
/profile-fr500.o \
2371 @SIM_ENABLE_ARCH_frv_TRUE@ frv
/profile-fr550.o \
2372 @SIM_ENABLE_ARCH_frv_TRUE@ frv
/registers.o \
2373 @SIM_ENABLE_ARCH_frv_TRUE@ frv
/reset.o \
2374 @SIM_ENABLE_ARCH_frv_TRUE@ frv
/sim-if.o \
2375 @SIM_ENABLE_ARCH_frv_TRUE@ frv
/traps.o
2377 @SIM_ENABLE_ARCH_frv_TRUE@frv_run_SOURCES
=
2378 @SIM_ENABLE_ARCH_frv_TRUE@frv_run_LDADD
= \
2379 @SIM_ENABLE_ARCH_frv_TRUE@ frv
/nrun.o \
2380 @SIM_ENABLE_ARCH_frv_TRUE@ frv
/libsim.a \
2381 @SIM_ENABLE_ARCH_frv_TRUE@
$(SIM_COMMON_LIBS
)
2383 @SIM_ENABLE_ARCH_frv_TRUE@frvdocdir
= $(docdir
)/frv
2384 @SIM_ENABLE_ARCH_frv_TRUE@frvdoc_DATA
= frv
/README
2385 @SIM_ENABLE_ARCH_frv_TRUE@frv_BUILD_OUTPUTS
= \
2386 @SIM_ENABLE_ARCH_frv_TRUE@ frv
/mloop.c \
2387 @SIM_ENABLE_ARCH_frv_TRUE@ frv
/stamp-mloop
2389 @SIM_ENABLE_ARCH_ft32_TRUE@nodist_ft32_libsim_a_SOURCES
= \
2390 @SIM_ENABLE_ARCH_ft32_TRUE@ ft32
/modules.c
2392 @SIM_ENABLE_ARCH_ft32_TRUE@ft32_libsim_a_SOURCES
= \
2393 @SIM_ENABLE_ARCH_ft32_TRUE@
$(common_libcommon_a_SOURCES
)
2395 @SIM_ENABLE_ARCH_ft32_TRUE@ft32_libsim_a_LIBADD
= \
2396 @SIM_ENABLE_ARCH_ft32_TRUE@
$(patsubst %,ft32
/%,$(SIM_NEW_COMMON_OBJS
)) \
2397 @SIM_ENABLE_ARCH_ft32_TRUE@
$(patsubst %,ft32
/dv-
%.o
,$(SIM_HW_DEVICES
)) \
2398 @SIM_ENABLE_ARCH_ft32_TRUE@ ft32
/interp.o \
2399 @SIM_ENABLE_ARCH_ft32_TRUE@ ft32
/sim-resume.o
2401 @SIM_ENABLE_ARCH_ft32_TRUE@ft32_run_SOURCES
=
2402 @SIM_ENABLE_ARCH_ft32_TRUE@ft32_run_LDADD
= \
2403 @SIM_ENABLE_ARCH_ft32_TRUE@ ft32
/nrun.o \
2404 @SIM_ENABLE_ARCH_ft32_TRUE@ ft32
/libsim.a \
2405 @SIM_ENABLE_ARCH_ft32_TRUE@
$(SIM_COMMON_LIBS
)
2407 @SIM_ENABLE_ARCH_h8300_TRUE@nodist_h8300_libsim_a_SOURCES
= \
2408 @SIM_ENABLE_ARCH_h8300_TRUE@ h8300
/modules.c
2410 @SIM_ENABLE_ARCH_h8300_TRUE@h8300_libsim_a_SOURCES
= \
2411 @SIM_ENABLE_ARCH_h8300_TRUE@
$(common_libcommon_a_SOURCES
)
2413 @SIM_ENABLE_ARCH_h8300_TRUE@h8300_libsim_a_LIBADD
= \
2414 @SIM_ENABLE_ARCH_h8300_TRUE@ h8300
/compile.o \
2415 @SIM_ENABLE_ARCH_h8300_TRUE@
$(patsubst %,h8300
/%,$(SIM_NEW_COMMON_OBJS
)) \
2416 @SIM_ENABLE_ARCH_h8300_TRUE@
$(patsubst %,h8300
/dv-
%.o
,$(SIM_HW_DEVICES
)) \
2417 @SIM_ENABLE_ARCH_h8300_TRUE@ h8300
/sim-resume.o
2419 @SIM_ENABLE_ARCH_h8300_TRUE@h8300_run_SOURCES
=
2420 @SIM_ENABLE_ARCH_h8300_TRUE@h8300_run_LDADD
= \
2421 @SIM_ENABLE_ARCH_h8300_TRUE@ h8300
/nrun.o \
2422 @SIM_ENABLE_ARCH_h8300_TRUE@ h8300
/libsim.a \
2423 @SIM_ENABLE_ARCH_h8300_TRUE@
$(SIM_COMMON_LIBS
)
2425 @SIM_ENABLE_ARCH_iq2000_TRUE@nodist_iq2000_libsim_a_SOURCES
= \
2426 @SIM_ENABLE_ARCH_iq2000_TRUE@ iq2000
/modules.c
2428 @SIM_ENABLE_ARCH_iq2000_TRUE@iq2000_libsim_a_SOURCES
= \
2429 @SIM_ENABLE_ARCH_iq2000_TRUE@
$(common_libcommon_a_SOURCES
)
2431 @SIM_ENABLE_ARCH_iq2000_TRUE@iq2000_libsim_a_LIBADD
= \
2432 @SIM_ENABLE_ARCH_iq2000_TRUE@
$(patsubst %,iq2000
/%,$(SIM_NEW_COMMON_OBJS
)) \
2433 @SIM_ENABLE_ARCH_iq2000_TRUE@
$(patsubst %,iq2000
/dv-
%.o
,$(SIM_HW_DEVICES
)) \
2434 @SIM_ENABLE_ARCH_iq2000_TRUE@ \
2435 @SIM_ENABLE_ARCH_iq2000_TRUE@ iq2000
/cgen-run.o \
2436 @SIM_ENABLE_ARCH_iq2000_TRUE@ iq2000
/cgen-scache.o \
2437 @SIM_ENABLE_ARCH_iq2000_TRUE@ iq2000
/cgen-trace.o \
2438 @SIM_ENABLE_ARCH_iq2000_TRUE@ iq2000
/cgen-utils.o \
2439 @SIM_ENABLE_ARCH_iq2000_TRUE@ \
2440 @SIM_ENABLE_ARCH_iq2000_TRUE@ iq2000
/arch.o \
2441 @SIM_ENABLE_ARCH_iq2000_TRUE@ iq2000
/cpu.o \
2442 @SIM_ENABLE_ARCH_iq2000_TRUE@ iq2000
/decode.o \
2443 @SIM_ENABLE_ARCH_iq2000_TRUE@ iq2000
/iq2000.o \
2444 @SIM_ENABLE_ARCH_iq2000_TRUE@ iq2000
/sem.o \
2445 @SIM_ENABLE_ARCH_iq2000_TRUE@ iq2000
/mloop.o \
2446 @SIM_ENABLE_ARCH_iq2000_TRUE@ iq2000
/model.o \
2447 @SIM_ENABLE_ARCH_iq2000_TRUE@ \
2448 @SIM_ENABLE_ARCH_iq2000_TRUE@ iq2000
/sim-if.o
2450 @SIM_ENABLE_ARCH_iq2000_TRUE@iq2000_run_SOURCES
=
2451 @SIM_ENABLE_ARCH_iq2000_TRUE@iq2000_run_LDADD
= \
2452 @SIM_ENABLE_ARCH_iq2000_TRUE@ iq2000
/nrun.o \
2453 @SIM_ENABLE_ARCH_iq2000_TRUE@ iq2000
/libsim.a \
2454 @SIM_ENABLE_ARCH_iq2000_TRUE@
$(SIM_COMMON_LIBS
)
2456 @SIM_ENABLE_ARCH_iq2000_TRUE@iq2000_BUILD_OUTPUTS
= \
2457 @SIM_ENABLE_ARCH_iq2000_TRUE@ iq2000
/mloop.c \
2458 @SIM_ENABLE_ARCH_iq2000_TRUE@ iq2000
/stamp-mloop
2460 @SIM_ENABLE_ARCH_lm32_TRUE@nodist_lm32_libsim_a_SOURCES
= \
2461 @SIM_ENABLE_ARCH_lm32_TRUE@ lm32
/modules.c
2463 @SIM_ENABLE_ARCH_lm32_TRUE@lm32_libsim_a_SOURCES
= \
2464 @SIM_ENABLE_ARCH_lm32_TRUE@
$(common_libcommon_a_SOURCES
)
2466 @SIM_ENABLE_ARCH_lm32_TRUE@lm32_libsim_a_LIBADD
= \
2467 @SIM_ENABLE_ARCH_lm32_TRUE@
$(patsubst %,lm32
/%,$(SIM_NEW_COMMON_OBJS
)) \
2468 @SIM_ENABLE_ARCH_lm32_TRUE@
$(patsubst %,lm32
/dv-
%.o
,$(SIM_HW_DEVICES
)) \
2469 @SIM_ENABLE_ARCH_lm32_TRUE@
$(patsubst %,lm32
/dv-
%.o
,$(lm32_SIM_EXTRA_HW_DEVICES
)) \
2470 @SIM_ENABLE_ARCH_lm32_TRUE@ \
2471 @SIM_ENABLE_ARCH_lm32_TRUE@ lm32
/cgen-run.o \
2472 @SIM_ENABLE_ARCH_lm32_TRUE@ lm32
/cgen-scache.o \
2473 @SIM_ENABLE_ARCH_lm32_TRUE@ lm32
/cgen-trace.o \
2474 @SIM_ENABLE_ARCH_lm32_TRUE@ lm32
/cgen-utils.o \
2475 @SIM_ENABLE_ARCH_lm32_TRUE@ \
2476 @SIM_ENABLE_ARCH_lm32_TRUE@ lm32
/arch.o \
2477 @SIM_ENABLE_ARCH_lm32_TRUE@ lm32
/cpu.o \
2478 @SIM_ENABLE_ARCH_lm32_TRUE@ lm32
/decode.o \
2479 @SIM_ENABLE_ARCH_lm32_TRUE@ lm32
/sem.o \
2480 @SIM_ENABLE_ARCH_lm32_TRUE@ lm32
/mloop.o \
2481 @SIM_ENABLE_ARCH_lm32_TRUE@ lm32
/model.o \
2482 @SIM_ENABLE_ARCH_lm32_TRUE@ \
2483 @SIM_ENABLE_ARCH_lm32_TRUE@ lm32
/lm32.o \
2484 @SIM_ENABLE_ARCH_lm32_TRUE@ lm32
/sim-if.o \
2485 @SIM_ENABLE_ARCH_lm32_TRUE@ lm32
/traps.o \
2486 @SIM_ENABLE_ARCH_lm32_TRUE@ lm32
/user.o
2488 @SIM_ENABLE_ARCH_lm32_TRUE@lm32_run_SOURCES
=
2489 @SIM_ENABLE_ARCH_lm32_TRUE@lm32_run_LDADD
= \
2490 @SIM_ENABLE_ARCH_lm32_TRUE@ lm32
/nrun.o \
2491 @SIM_ENABLE_ARCH_lm32_TRUE@ lm32
/libsim.a \
2492 @SIM_ENABLE_ARCH_lm32_TRUE@
$(SIM_COMMON_LIBS
)
2494 @SIM_ENABLE_ARCH_lm32_TRUE@lm32_SIM_EXTRA_HW_DEVICES
= lm32cpu lm32timer lm32uart
2495 @SIM_ENABLE_ARCH_lm32_TRUE@lm32_BUILD_OUTPUTS
= \
2496 @SIM_ENABLE_ARCH_lm32_TRUE@ lm32
/mloop.c \
2497 @SIM_ENABLE_ARCH_lm32_TRUE@ lm32
/stamp-mloop
2499 @SIM_ENABLE_ARCH_m32c_TRUE@AM_CPPFLAGS_m32c
= -DTIMER_A
2500 @SIM_ENABLE_ARCH_m32c_TRUE@nodist_m32c_libsim_a_SOURCES
= \
2501 @SIM_ENABLE_ARCH_m32c_TRUE@ m32c
/modules.c
2503 @SIM_ENABLE_ARCH_m32c_TRUE@m32c_libsim_a_SOURCES
= \
2504 @SIM_ENABLE_ARCH_m32c_TRUE@
$(common_libcommon_a_SOURCES
)
2506 @SIM_ENABLE_ARCH_m32c_TRUE@m32c_libsim_a_LIBADD
= \
2507 @SIM_ENABLE_ARCH_m32c_TRUE@ m32c
/gdb-if.o \
2508 @SIM_ENABLE_ARCH_m32c_TRUE@ m32c
/int.o \
2509 @SIM_ENABLE_ARCH_m32c_TRUE@ m32c
/load.o \
2510 @SIM_ENABLE_ARCH_m32c_TRUE@ m32c
/m32c.o \
2511 @SIM_ENABLE_ARCH_m32c_TRUE@ m32c
/mem.o \
2512 @SIM_ENABLE_ARCH_m32c_TRUE@ m32c
/misc.o \
2513 @SIM_ENABLE_ARCH_m32c_TRUE@ m32c
/r8c.o \
2514 @SIM_ENABLE_ARCH_m32c_TRUE@ m32c
/reg.o \
2515 @SIM_ENABLE_ARCH_m32c_TRUE@ m32c
/srcdest.o \
2516 @SIM_ENABLE_ARCH_m32c_TRUE@ m32c
/syscalls.o \
2517 @SIM_ENABLE_ARCH_m32c_TRUE@ m32c
/trace.o
2519 @SIM_ENABLE_ARCH_m32c_TRUE@m32c_run_SOURCES
=
2520 @SIM_ENABLE_ARCH_m32c_TRUE@m32c_run_LDADD
= \
2521 @SIM_ENABLE_ARCH_m32c_TRUE@ m32c
/main.o \
2522 @SIM_ENABLE_ARCH_m32c_TRUE@ m32c
/libsim.a \
2523 @SIM_ENABLE_ARCH_m32c_TRUE@
$(SIM_COMMON_LIBS
)
2525 @SIM_ENABLE_ARCH_m32c_TRUE@m32c_BUILD_OUTPUTS
= \
2526 @SIM_ENABLE_ARCH_m32c_TRUE@ m32c
/opc2c
$(EXEEXT
) \
2527 @SIM_ENABLE_ARCH_m32c_TRUE@ m32c
/m32c.c \
2528 @SIM_ENABLE_ARCH_m32c_TRUE@ m32c
/r8c.c
2530 @SIM_ENABLE_ARCH_m32c_TRUE@m32c_opc2c_SOURCES
= m32c
/opc2c.c
2532 # opc2c leaks memory, and therefore makes AddressSanitizer unhappy. Disable
2533 # leak detection while running it.
2534 @SIM_ENABLE_ARCH_m32c_TRUE@m32c_OPC2C_RUN
= ASAN_OPTIONS
=detect_leaks
=0 m32c
/opc2c
$(EXEEXT
)
2535 @SIM_ENABLE_ARCH_m32r_TRUE@AM_CFLAGS_m32r_traps.o
= -Wno-error
2536 @SIM_ENABLE_ARCH_m32r_TRUE@nodist_m32r_libsim_a_SOURCES
= \
2537 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r
/modules.c
2539 @SIM_ENABLE_ARCH_m32r_TRUE@m32r_libsim_a_SOURCES
= \
2540 @SIM_ENABLE_ARCH_m32r_TRUE@
$(common_libcommon_a_SOURCES
)
2542 @SIM_ENABLE_ARCH_m32r_TRUE@m32r_libsim_a_LIBADD
= \
2543 @SIM_ENABLE_ARCH_m32r_TRUE@
$(patsubst %,m32r
/%,$(SIM_NEW_COMMON_OBJS
)) \
2544 @SIM_ENABLE_ARCH_m32r_TRUE@
$(patsubst %,m32r
/dv-
%.o
,$(SIM_HW_DEVICES
)) \
2545 @SIM_ENABLE_ARCH_m32r_TRUE@
$(patsubst %,m32r
/dv-
%.o
,$(m32r_SIM_EXTRA_HW_DEVICES
)) \
2546 @SIM_ENABLE_ARCH_m32r_TRUE@ \
2547 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r
/cgen-run.o \
2548 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r
/cgen-scache.o \
2549 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r
/cgen-trace.o \
2550 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r
/cgen-utils.o \
2551 @SIM_ENABLE_ARCH_m32r_TRUE@ \
2552 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r
/arch.o \
2553 @SIM_ENABLE_ARCH_m32r_TRUE@ \
2554 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r
/m32r.o \
2555 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r
/cpu.o \
2556 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r
/decode.o \
2557 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r
/sem.o \
2558 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r
/model.o \
2559 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r
/mloop.o \
2560 @SIM_ENABLE_ARCH_m32r_TRUE@ \
2561 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r
/m32rx.o \
2562 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r
/cpux.o \
2563 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r
/decodex.o \
2564 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r
/modelx.o \
2565 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r
/mloopx.o \
2566 @SIM_ENABLE_ARCH_m32r_TRUE@ \
2567 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r
/m32r2.o \
2568 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r
/cpu2.o \
2569 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r
/decode2.o \
2570 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r
/model2.o \
2571 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r
/mloop2.o \
2572 @SIM_ENABLE_ARCH_m32r_TRUE@ \
2573 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r
/sim-if.o \
2574 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r
/traps.o
2576 @SIM_ENABLE_ARCH_m32r_TRUE@m32r_run_SOURCES
=
2577 @SIM_ENABLE_ARCH_m32r_TRUE@m32r_run_LDADD
= \
2578 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r
/nrun.o \
2579 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r
/libsim.a \
2580 @SIM_ENABLE_ARCH_m32r_TRUE@
$(SIM_COMMON_LIBS
)
2582 @SIM_ENABLE_ARCH_m32r_TRUE@m32r_SIM_EXTRA_HW_DEVICES
= m32r_cache m32r_uart
2583 @SIM_ENABLE_ARCH_m32r_TRUE@m32r_BUILD_OUTPUTS
= \
2584 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r
/mloop.c \
2585 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r
/stamp-mloop \
2586 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r
/mloopx.c \
2587 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r
/stamp-mloop-x \
2588 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r
/mloop2.c \
2589 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r
/stamp-mloop-2
2591 @SIM_ENABLE_ARCH_m68hc11_TRUE@AM_CPPFLAGS_m68hc11
= \
2592 @SIM_ENABLE_ARCH_m68hc11_TRUE@
-DWITH_TARGET_WORD_BITSIZE
=32 \
2593 @SIM_ENABLE_ARCH_m68hc11_TRUE@
-DWITH_TARGET_CELL_BITSIZE
=32 \
2594 @SIM_ENABLE_ARCH_m68hc11_TRUE@
-DWITH_TARGET_ADDRESS_BITSIZE
=32 \
2595 @SIM_ENABLE_ARCH_m68hc11_TRUE@
-DWITH_TARGET_WORD_MSB
=31
2597 @SIM_ENABLE_ARCH_m68hc11_TRUE@nodist_m68hc11_libsim_a_SOURCES
= \
2598 @SIM_ENABLE_ARCH_m68hc11_TRUE@ m68hc11
/modules.c
2600 @SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11_libsim_a_SOURCES
= \
2601 @SIM_ENABLE_ARCH_m68hc11_TRUE@
$(common_libcommon_a_SOURCES
)
2603 @SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11_libsim_a_LIBADD
= \
2604 @SIM_ENABLE_ARCH_m68hc11_TRUE@ m68hc11
/interp.o \
2605 @SIM_ENABLE_ARCH_m68hc11_TRUE@ m68hc11
/m68hc11int.o \
2606 @SIM_ENABLE_ARCH_m68hc11_TRUE@ m68hc11
/m68hc12int.o \
2607 @SIM_ENABLE_ARCH_m68hc11_TRUE@ m68hc11
/emulos.o \
2608 @SIM_ENABLE_ARCH_m68hc11_TRUE@ m68hc11
/interrupts.o \
2609 @SIM_ENABLE_ARCH_m68hc11_TRUE@ m68hc11
/m68hc11_sim.o \
2610 @SIM_ENABLE_ARCH_m68hc11_TRUE@
$(patsubst %,m68hc11
/%,$(SIM_NEW_COMMON_OBJS
)) \
2611 @SIM_ENABLE_ARCH_m68hc11_TRUE@
$(patsubst %,m68hc11
/dv-
%.o
,$(SIM_HW_DEVICES
)) \
2612 @SIM_ENABLE_ARCH_m68hc11_TRUE@
$(patsubst %,m68hc11
/dv-
%.o
,$(m68hc11_SIM_EXTRA_HW_DEVICES
)) \
2613 @SIM_ENABLE_ARCH_m68hc11_TRUE@ m68hc11
/sim-resume.o
2615 @SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11_run_SOURCES
=
2616 @SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11_run_LDADD
= \
2617 @SIM_ENABLE_ARCH_m68hc11_TRUE@ m68hc11
/nrun.o \
2618 @SIM_ENABLE_ARCH_m68hc11_TRUE@ m68hc11
/libsim.a \
2619 @SIM_ENABLE_ARCH_m68hc11_TRUE@
$(SIM_COMMON_LIBS
)
2621 @SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11_SIM_EXTRA_HW_DEVICES
= m68hc11 m68hc11sio m68hc11eepr m68hc11tim m68hc11spi nvram
2622 @SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11_BUILD_OUTPUTS
= \
2623 @SIM_ENABLE_ARCH_m68hc11_TRUE@ m68hc11
/gencode
$(EXEEXT
) \
2624 @SIM_ENABLE_ARCH_m68hc11_TRUE@ m68hc11
/m68hc11int.c \
2625 @SIM_ENABLE_ARCH_m68hc11_TRUE@ m68hc11
/m68hc12int.c
2627 @SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11_gencode_SOURCES
= m68hc11
/gencode.c
2628 @SIM_ENABLE_ARCH_mcore_TRUE@nodist_mcore_libsim_a_SOURCES
= \
2629 @SIM_ENABLE_ARCH_mcore_TRUE@ mcore
/modules.c
2631 @SIM_ENABLE_ARCH_mcore_TRUE@mcore_libsim_a_SOURCES
= \
2632 @SIM_ENABLE_ARCH_mcore_TRUE@
$(common_libcommon_a_SOURCES
)
2634 @SIM_ENABLE_ARCH_mcore_TRUE@mcore_libsim_a_LIBADD
= \
2635 @SIM_ENABLE_ARCH_mcore_TRUE@ mcore
/interp.o \
2636 @SIM_ENABLE_ARCH_mcore_TRUE@
$(patsubst %,mcore
/%,$(SIM_NEW_COMMON_OBJS
)) \
2637 @SIM_ENABLE_ARCH_mcore_TRUE@
$(patsubst %,mcore
/dv-
%.o
,$(SIM_HW_DEVICES
)) \
2638 @SIM_ENABLE_ARCH_mcore_TRUE@ mcore
/sim-resume.o
2640 @SIM_ENABLE_ARCH_mcore_TRUE@mcore_run_SOURCES
=
2641 @SIM_ENABLE_ARCH_mcore_TRUE@mcore_run_LDADD
= \
2642 @SIM_ENABLE_ARCH_mcore_TRUE@ mcore
/nrun.o \
2643 @SIM_ENABLE_ARCH_mcore_TRUE@ mcore
/libsim.a \
2644 @SIM_ENABLE_ARCH_mcore_TRUE@
$(SIM_COMMON_LIBS
)
2646 @SIM_ENABLE_ARCH_microblaze_TRUE@nodist_microblaze_libsim_a_SOURCES
= \
2647 @SIM_ENABLE_ARCH_microblaze_TRUE@ microblaze
/modules.c
2649 @SIM_ENABLE_ARCH_microblaze_TRUE@microblaze_libsim_a_SOURCES
= \
2650 @SIM_ENABLE_ARCH_microblaze_TRUE@
$(common_libcommon_a_SOURCES
)
2652 @SIM_ENABLE_ARCH_microblaze_TRUE@microblaze_libsim_a_LIBADD
= \
2653 @SIM_ENABLE_ARCH_microblaze_TRUE@ microblaze
/interp.o \
2654 @SIM_ENABLE_ARCH_microblaze_TRUE@
$(patsubst %,microblaze
/%,$(SIM_NEW_COMMON_OBJS
)) \
2655 @SIM_ENABLE_ARCH_microblaze_TRUE@
$(patsubst %,microblaze
/dv-
%.o
,$(SIM_HW_DEVICES
)) \
2656 @SIM_ENABLE_ARCH_microblaze_TRUE@ microblaze
/sim-resume.o
2658 @SIM_ENABLE_ARCH_microblaze_TRUE@microblaze_run_SOURCES
=
2659 @SIM_ENABLE_ARCH_microblaze_TRUE@microblaze_run_LDADD
= \
2660 @SIM_ENABLE_ARCH_microblaze_TRUE@ microblaze
/nrun.o \
2661 @SIM_ENABLE_ARCH_microblaze_TRUE@ microblaze
/libsim.a \
2662 @SIM_ENABLE_ARCH_microblaze_TRUE@
$(SIM_COMMON_LIBS
)
2664 @SIM_ENABLE_ARCH_mips_TRUE@AM_CPPFLAGS_mips
= \
2665 @SIM_ENABLE_ARCH_mips_TRUE@ @SIM_MIPS_SUBTARGET@ \
2666 @SIM_ENABLE_ARCH_mips_TRUE@
-DWITH_TARGET_WORD_BITSIZE
=@SIM_MIPS_BITSIZE@
-DWITH_TARGET_WORD_MSB
=WITH_TARGET_WORD_BITSIZE-1 \
2667 @SIM_ENABLE_ARCH_mips_TRUE@
-DWITH_FLOATING_POINT
=HARD_FLOATING_POINT
-DWITH_TARGET_FLOATING_POINT_BITSIZE
=@SIM_MIPS_FPU_BITSIZE@
2669 @SIM_ENABLE_ARCH_mips_TRUE@mips_GEN_OBJ
= $(am__append_66
) \
2670 @SIM_ENABLE_ARCH_mips_TRUE@
$(am__append_67
) $(am__append_68
)
2671 @SIM_ENABLE_ARCH_mips_TRUE@nodist_mips_libsim_a_SOURCES
= \
2672 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/modules.c
2674 @SIM_ENABLE_ARCH_mips_TRUE@mips_libsim_a_SOURCES
= \
2675 @SIM_ENABLE_ARCH_mips_TRUE@
$(common_libcommon_a_SOURCES
)
2677 @SIM_ENABLE_ARCH_mips_TRUE@mips_libsim_a_LIBADD
= \
2678 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/interp.o \
2679 @SIM_ENABLE_ARCH_mips_TRUE@
$(mips_GEN_OBJ
) \
2680 @SIM_ENABLE_ARCH_mips_TRUE@
$(patsubst %,mips
/%,$(SIM_NEW_COMMON_OBJS
)) \
2681 @SIM_ENABLE_ARCH_mips_TRUE@
$(patsubst %,mips
/dv-
%.o
,$(SIM_HW_DEVICES
)) \
2682 @SIM_ENABLE_ARCH_mips_TRUE@
$(patsubst %,mips
/dv-
%.o
,$(mips_SIM_EXTRA_HW_DEVICES
)) \
2683 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/cp1.o \
2684 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/dsp.o \
2685 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/mdmx.o \
2686 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/sim-main.o \
2687 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/sim-resume.o
2689 @SIM_ENABLE_ARCH_mips_TRUE@EXTRA_mips_libsim_a_DEPENDENCIES
= $(SIM_MIPS_MULTI_OBJ
)
2690 @SIM_ENABLE_ARCH_mips_TRUE@mips_run_SOURCES
=
2691 @SIM_ENABLE_ARCH_mips_TRUE@mips_run_LDADD
= \
2692 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/nrun.o \
2693 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/libsim.a \
2694 @SIM_ENABLE_ARCH_mips_TRUE@
$(SIM_COMMON_LIBS
)
2696 @SIM_ENABLE_ARCH_mips_TRUE@mips_SIM_EXTRA_HW_DEVICES
= tx3904cpu tx3904irc tx3904tmr tx3904sio
2697 @SIM_ENABLE_ARCH_mips_TRUE@mips_BUILT_SRC_FROM_IGEN_ITABLE
= \
2698 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/itable.h \
2699 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/itable.c
2701 @SIM_ENABLE_ARCH_mips_TRUE@mips_BUILT_SRC_FROM_GEN_MODE_SINGLE
= \
2702 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/icache.h \
2703 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/icache.c \
2704 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/idecode.h \
2705 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/idecode.c \
2706 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/semantics.h \
2707 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/semantics.c \
2708 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/model.h \
2709 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/model.c \
2710 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/support.h \
2711 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/support.c \
2712 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/engine.h \
2713 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/engine.c \
2714 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/irun.c
2716 @SIM_ENABLE_ARCH_mips_TRUE@mips_BUILT_SRC_FROM_GEN_MODE_M16_M16
= \
2717 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/m16_icache.h \
2718 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/m16_icache.c \
2719 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/m16_idecode.h \
2720 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/m16_idecode.c \
2721 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/m16_semantics.h \
2722 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/m16_semantics.c \
2723 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/m16_model.h \
2724 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/m16_model.c \
2725 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/m16_support.h \
2726 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/m16_support.c \
2727 @SIM_ENABLE_ARCH_mips_TRUE@mips_BUILT_SRC_FROM_GEN_MODE_M16_M32
= \
2728 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/m32_icache.h \
2729 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/m32_icache.c \
2730 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/m32_idecode.h \
2731 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/m32_idecode.c \
2732 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/m32_semantics.h \
2733 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/m32_semantics.c \
2734 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/m32_model.h \
2735 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/m32_model.c \
2736 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/m32_support.h \
2737 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/m32_support.c
2739 @SIM_ENABLE_ARCH_mips_TRUE@mips_BUILD_OUTPUTS
= \
2740 @SIM_ENABLE_ARCH_mips_TRUE@
$(mips_BUILT_SRC_FROM_IGEN_ITABLE
) \
2741 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/stamp-igen-itable \
2742 @SIM_ENABLE_ARCH_mips_TRUE@
$(am__append_72
) $(am__append_73
) \
2743 @SIM_ENABLE_ARCH_mips_TRUE@
$(am__append_74
)
2744 @SIM_ENABLE_ARCH_mips_TRUE@mips_IGEN_TRACE
= # -G omit-line-numbers # -G trace-rule-selection -G trace-rule-rejection -G trace-entries # -G trace-all
2745 @SIM_ENABLE_ARCH_mips_TRUE@mips_IGEN_INSN
= $(srcdir)/mips
/mips.igen
2746 @SIM_ENABLE_ARCH_mips_TRUE@mips_IGEN_INSN_INC
= \
2747 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/dsp.igen \
2748 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/dsp2.igen \
2749 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/m16.igen \
2750 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/m16e.igen \
2751 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/mdmx.igen \
2752 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/micromipsdsp.igen \
2753 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/micromips.igen \
2754 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/mips3264r2.igen \
2755 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/mips3264r6.igen \
2756 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/mips3d.igen \
2757 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/sb1.igen \
2758 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/tx.igen \
2759 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/vr.igen
2761 @SIM_ENABLE_ARCH_mips_TRUE@mips_IGEN_DC
= $(srcdir)/mips
/mips.dc
2762 @SIM_ENABLE_ARCH_mips_TRUE@mips_M16_DC
= $(srcdir)/mips
/m16.dc
2763 @SIM_ENABLE_ARCH_mips_TRUE@mips_MICROMIPS32_DC
= $(srcdir)/mips
/micromips.dc
2764 @SIM_ENABLE_ARCH_mips_TRUE@mips_MICROMIPS16_DC
= $(srcdir)/mips
/micromips16.dc
2765 @SIM_ENABLE_ARCH_mn10300_TRUE@AM_CPPFLAGS_mn10300
= \
2766 @SIM_ENABLE_ARCH_mn10300_TRUE@
-DPOLL_QUIT_INTERVAL
=0x20 \
2767 @SIM_ENABLE_ARCH_mn10300_TRUE@
-DWITH_TARGET_WORD_BITSIZE
=32 -DWITH_TARGET_WORD_MSB
=31
2769 @SIM_ENABLE_ARCH_mn10300_TRUE@nodist_mn10300_libsim_a_SOURCES
= \
2770 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300
/modules.c
2772 @SIM_ENABLE_ARCH_mn10300_TRUE@mn10300_libsim_a_SOURCES
= \
2773 @SIM_ENABLE_ARCH_mn10300_TRUE@
$(common_libcommon_a_SOURCES
)
2775 @SIM_ENABLE_ARCH_mn10300_TRUE@mn10300_libsim_a_LIBADD
= \
2776 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300
/itable.o \
2777 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300
/semantics.o \
2778 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300
/idecode.o \
2779 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300
/icache.o \
2780 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300
/engine.o \
2781 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300
/irun.o \
2782 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300
/support.o \
2783 @SIM_ENABLE_ARCH_mn10300_TRUE@
$(patsubst %,mn10300
/%,$(SIM_NEW_COMMON_OBJS
)) \
2784 @SIM_ENABLE_ARCH_mn10300_TRUE@
$(patsubst %,mn10300
/dv-
%.o
,$(SIM_HW_DEVICES
)) \
2785 @SIM_ENABLE_ARCH_mn10300_TRUE@
$(patsubst %,mn10300
/dv-
%.o
,$(mn10300_SIM_EXTRA_HW_DEVICES
)) \
2786 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300
/interp.o \
2787 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300
/op_utils.o \
2788 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300
/sim-resume.o
2790 @SIM_ENABLE_ARCH_mn10300_TRUE@mn10300_run_SOURCES
=
2791 @SIM_ENABLE_ARCH_mn10300_TRUE@mn10300_run_LDADD
= \
2792 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300
/nrun.o \
2793 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300
/libsim.a \
2794 @SIM_ENABLE_ARCH_mn10300_TRUE@
$(SIM_COMMON_LIBS
)
2796 @SIM_ENABLE_ARCH_mn10300_TRUE@mn10300_SIM_EXTRA_HW_DEVICES
= mn103cpu mn103int mn103tim mn103ser mn103iop
2797 @SIM_ENABLE_ARCH_mn10300_TRUE@mn10300_BUILT_SRC_FROM_IGEN
= \
2798 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300
/icache.h \
2799 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300
/icache.c \
2800 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300
/idecode.h \
2801 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300
/idecode.c \
2802 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300
/semantics.h \
2803 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300
/semantics.c \
2804 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300
/model.h \
2805 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300
/model.c \
2806 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300
/support.h \
2807 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300
/support.c \
2808 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300
/itable.h \
2809 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300
/itable.c \
2810 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300
/engine.h \
2811 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300
/engine.c \
2812 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300
/irun.c
2814 @SIM_ENABLE_ARCH_mn10300_TRUE@mn10300_BUILD_OUTPUTS
= \
2815 @SIM_ENABLE_ARCH_mn10300_TRUE@
$(mn10300_BUILT_SRC_FROM_IGEN
) \
2816 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300
/stamp-igen
2818 @SIM_ENABLE_ARCH_mn10300_TRUE@mn10300_IGEN_TRACE
= # -G omit-line-numbers # -G trace-rule-selection -G trace-rule-rejection -G trace-entries
2819 @SIM_ENABLE_ARCH_mn10300_TRUE@mn10300_IGEN_INSN
= $(srcdir)/mn10300
/mn10300.igen
2820 @SIM_ENABLE_ARCH_mn10300_TRUE@mn10300_IGEN_INSN_INC
= mn10300
/am33.igen mn10300
/am33-2.igen
2821 @SIM_ENABLE_ARCH_mn10300_TRUE@mn10300_IGEN_DC
= $(srcdir)/mn10300
/mn10300.dc
2822 @SIM_ENABLE_ARCH_moxie_TRUE@AM_CPPFLAGS_moxie
= -DDTB
="\"$(dtbdir)/moxie-gdb.dtb\""
2823 @SIM_ENABLE_ARCH_moxie_TRUE@nodist_moxie_libsim_a_SOURCES
= \
2824 @SIM_ENABLE_ARCH_moxie_TRUE@ moxie
/modules.c
2826 @SIM_ENABLE_ARCH_moxie_TRUE@moxie_libsim_a_SOURCES
= \
2827 @SIM_ENABLE_ARCH_moxie_TRUE@
$(common_libcommon_a_SOURCES
)
2829 @SIM_ENABLE_ARCH_moxie_TRUE@moxie_libsim_a_LIBADD
= \
2830 @SIM_ENABLE_ARCH_moxie_TRUE@
$(patsubst %,moxie
/%,$(SIM_NEW_COMMON_OBJS
)) \
2831 @SIM_ENABLE_ARCH_moxie_TRUE@
$(patsubst %,moxie
/dv-
%.o
,$(SIM_HW_DEVICES
)) \
2832 @SIM_ENABLE_ARCH_moxie_TRUE@ moxie
/interp.o \
2833 @SIM_ENABLE_ARCH_moxie_TRUE@ moxie
/sim-resume.o
2835 @SIM_ENABLE_ARCH_moxie_TRUE@moxie_run_SOURCES
=
2836 @SIM_ENABLE_ARCH_moxie_TRUE@moxie_run_LDADD
= \
2837 @SIM_ENABLE_ARCH_moxie_TRUE@ moxie
/nrun.o \
2838 @SIM_ENABLE_ARCH_moxie_TRUE@ moxie
/libsim.a \
2839 @SIM_ENABLE_ARCH_moxie_TRUE@
$(SIM_COMMON_LIBS
)
2841 @SIM_ENABLE_ARCH_moxie_TRUE@dtbdir
= $(datadir)/gdb
/dtb
2842 @SIM_ENABLE_ARCH_moxie_TRUE@dtb_DATA
= moxie
/moxie-gdb.dtb
2843 @SIM_ENABLE_ARCH_msp430_TRUE@nodist_msp430_libsim_a_SOURCES
= \
2844 @SIM_ENABLE_ARCH_msp430_TRUE@ msp430
/modules.c
2846 @SIM_ENABLE_ARCH_msp430_TRUE@msp430_libsim_a_SOURCES
= \
2847 @SIM_ENABLE_ARCH_msp430_TRUE@
$(common_libcommon_a_SOURCES
)
2849 @SIM_ENABLE_ARCH_msp430_TRUE@msp430_libsim_a_LIBADD
= \
2850 @SIM_ENABLE_ARCH_msp430_TRUE@
$(patsubst %,msp430
/%,$(SIM_NEW_COMMON_OBJS
)) \
2851 @SIM_ENABLE_ARCH_msp430_TRUE@
$(patsubst %,msp430
/dv-
%.o
,$(SIM_HW_DEVICES
)) \
2852 @SIM_ENABLE_ARCH_msp430_TRUE@ msp430
/msp430-sim.o \
2853 @SIM_ENABLE_ARCH_msp430_TRUE@ msp430
/sim-resume.o
2855 @SIM_ENABLE_ARCH_msp430_TRUE@msp430_run_SOURCES
=
2856 @SIM_ENABLE_ARCH_msp430_TRUE@msp430_run_LDADD
= \
2857 @SIM_ENABLE_ARCH_msp430_TRUE@ msp430
/nrun.o \
2858 @SIM_ENABLE_ARCH_msp430_TRUE@ msp430
/libsim.a \
2859 @SIM_ENABLE_ARCH_msp430_TRUE@
$(SIM_COMMON_LIBS
)
2861 @SIM_ENABLE_ARCH_or1k_TRUE@AM_CPPFLAGS_or1k
= -DWITH_TARGET_WORD_BITSIZE
=32 -DWITH_TARGET_WORD_MSB
=31
2862 @SIM_ENABLE_ARCH_or1k_TRUE@nodist_or1k_libsim_a_SOURCES
= \
2863 @SIM_ENABLE_ARCH_or1k_TRUE@ or1k
/modules.c
2865 @SIM_ENABLE_ARCH_or1k_TRUE@or1k_libsim_a_SOURCES
= \
2866 @SIM_ENABLE_ARCH_or1k_TRUE@
$(common_libcommon_a_SOURCES
)
2868 @SIM_ENABLE_ARCH_or1k_TRUE@or1k_libsim_a_LIBADD
= \
2869 @SIM_ENABLE_ARCH_or1k_TRUE@
$(patsubst %,or1k
/%,$(SIM_NEW_COMMON_OBJS
)) \
2870 @SIM_ENABLE_ARCH_or1k_TRUE@
$(patsubst %,or1k
/dv-
%.o
,$(SIM_HW_DEVICES
)) \
2871 @SIM_ENABLE_ARCH_or1k_TRUE@ \
2872 @SIM_ENABLE_ARCH_or1k_TRUE@ or1k
/cgen-accfp.o \
2873 @SIM_ENABLE_ARCH_or1k_TRUE@ or1k
/cgen-fpu.o \
2874 @SIM_ENABLE_ARCH_or1k_TRUE@ or1k
/cgen-run.o \
2875 @SIM_ENABLE_ARCH_or1k_TRUE@ or1k
/cgen-scache.o \
2876 @SIM_ENABLE_ARCH_or1k_TRUE@ or1k
/cgen-trace.o \
2877 @SIM_ENABLE_ARCH_or1k_TRUE@ or1k
/cgen-utils.o \
2878 @SIM_ENABLE_ARCH_or1k_TRUE@ \
2879 @SIM_ENABLE_ARCH_or1k_TRUE@ or1k
/arch.o \
2880 @SIM_ENABLE_ARCH_or1k_TRUE@ or1k
/cpu.o \
2881 @SIM_ENABLE_ARCH_or1k_TRUE@ or1k
/decode.o \
2882 @SIM_ENABLE_ARCH_or1k_TRUE@ or1k
/mloop.o \
2883 @SIM_ENABLE_ARCH_or1k_TRUE@ or1k
/model.o \
2884 @SIM_ENABLE_ARCH_or1k_TRUE@ or1k
/sem.o \
2885 @SIM_ENABLE_ARCH_or1k_TRUE@ \
2886 @SIM_ENABLE_ARCH_or1k_TRUE@ or1k
/or1k.o \
2887 @SIM_ENABLE_ARCH_or1k_TRUE@ or1k
/sim-if.o \
2888 @SIM_ENABLE_ARCH_or1k_TRUE@ or1k
/traps.o
2890 @SIM_ENABLE_ARCH_or1k_TRUE@or1k_run_SOURCES
=
2891 @SIM_ENABLE_ARCH_or1k_TRUE@or1k_run_LDADD
= \
2892 @SIM_ENABLE_ARCH_or1k_TRUE@ or1k
/nrun.o \
2893 @SIM_ENABLE_ARCH_or1k_TRUE@ or1k
/libsim.a \
2894 @SIM_ENABLE_ARCH_or1k_TRUE@
$(SIM_COMMON_LIBS
)
2896 @SIM_ENABLE_ARCH_or1k_TRUE@or1kdocdir
= $(docdir
)/or1k
2897 @SIM_ENABLE_ARCH_or1k_TRUE@or1kdoc_DATA
= or1k
/README
2898 @SIM_ENABLE_ARCH_or1k_TRUE@or1k_BUILD_OUTPUTS
= \
2899 @SIM_ENABLE_ARCH_or1k_TRUE@ or1k
/mloop.c \
2900 @SIM_ENABLE_ARCH_or1k_TRUE@ or1k
/stamp-mloop
2902 @SIM_ENABLE_ARCH_ppc_TRUE@ppc_run_SOURCES
=
2903 @SIM_ENABLE_ARCH_ppc_TRUE@ppc_run_LDADD
= \
2904 @SIM_ENABLE_ARCH_ppc_TRUE@ ppc
/main.o \
2905 @SIM_ENABLE_ARCH_ppc_TRUE@ ppc
/libsim.a \
2906 @SIM_ENABLE_ARCH_ppc_TRUE@
$(SIM_COMMON_LIBS
)
2908 @SIM_ENABLE_ARCH_ppc_TRUE@ppc_libigen_a_SOURCES
= \
2909 @SIM_ENABLE_ARCH_ppc_TRUE@ ppc
/table.c \
2910 @SIM_ENABLE_ARCH_ppc_TRUE@ ppc
/lf.c \
2911 @SIM_ENABLE_ARCH_ppc_TRUE@ ppc
/misc.c \
2912 @SIM_ENABLE_ARCH_ppc_TRUE@ ppc
/ld-decode.c \
2913 @SIM_ENABLE_ARCH_ppc_TRUE@ ppc
/ld-cache.c \
2914 @SIM_ENABLE_ARCH_ppc_TRUE@ ppc
/filter.c \
2915 @SIM_ENABLE_ARCH_ppc_TRUE@ ppc
/ld-insn.c \
2916 @SIM_ENABLE_ARCH_ppc_TRUE@ ppc
/gen-model.c \
2917 @SIM_ENABLE_ARCH_ppc_TRUE@ ppc
/gen-itable.c \
2918 @SIM_ENABLE_ARCH_ppc_TRUE@ ppc
/gen-icache.c \
2919 @SIM_ENABLE_ARCH_ppc_TRUE@ ppc
/gen-semantics.c \
2920 @SIM_ENABLE_ARCH_ppc_TRUE@ ppc
/gen-idecode.c \
2921 @SIM_ENABLE_ARCH_ppc_TRUE@ ppc
/gen-support.c
2923 @SIM_ENABLE_ARCH_ppc_TRUE@ppc_libigen_a_LIBADD
= igen
/filter_host.o
2924 @SIM_ENABLE_ARCH_ppc_TRUE@ppc_igen_SOURCES
= ppc
/igen.c
2925 @SIM_ENABLE_ARCH_ppc_TRUE@ppc_igen_LDADD
= ppc
/libigen.a
2926 @SIM_ENABLE_ARCH_ppc_TRUE@PPC_IGEN
= ppc
/igen
$(EXEEXT
)
2927 @SIM_ENABLE_ARCH_ppc_TRUE@ppc_filter_SOURCES
=
2928 @SIM_ENABLE_ARCH_ppc_TRUE@ppc_filter_LDADD
= ppc
/filter-main.o ppc
/libigen.a
2929 @SIM_ENABLE_ARCH_ppc_TRUE@ppc_ld_cache_SOURCES
=
2930 @SIM_ENABLE_ARCH_ppc_TRUE@ppc_ld_cache_LDADD
= ppc
/ld-cache-main.o ppc
/libigen.a
2931 @SIM_ENABLE_ARCH_ppc_TRUE@ppc_ld_decode_SOURCES
=
2932 @SIM_ENABLE_ARCH_ppc_TRUE@ppc_ld_decode_LDADD
= ppc
/ld-decode-main.o ppc
/libigen.a
2933 @SIM_ENABLE_ARCH_ppc_TRUE@ppc_ld_insn_SOURCES
=
2934 @SIM_ENABLE_ARCH_ppc_TRUE@ppc_ld_insn_LDADD
= ppc
/ld-insn-main.o ppc
/libigen.a
2935 @SIM_ENABLE_ARCH_ppc_TRUE@ppc_IGEN_TOOLS
= \
2936 @SIM_ENABLE_ARCH_ppc_TRUE@
$(PPC_IGEN
) \
2937 @SIM_ENABLE_ARCH_ppc_TRUE@ ppc
/filter \
2938 @SIM_ENABLE_ARCH_ppc_TRUE@ ppc
/ld-cache \
2939 @SIM_ENABLE_ARCH_ppc_TRUE@ ppc
/ld-decode \
2940 @SIM_ENABLE_ARCH_ppc_TRUE@ ppc
/ld-insn
2942 @SIM_ENABLE_ARCH_ppc_TRUE@ppcdocdir
= $(docdir
)/ppc
2943 @SIM_ENABLE_ARCH_ppc_TRUE@ppcdoc_DATA
= ppc
/BUGS ppc
/INSTALL ppc
/README ppc
/RUN
2944 @SIM_ENABLE_ARCH_pru_TRUE@nodist_pru_libsim_a_SOURCES
= \
2945 @SIM_ENABLE_ARCH_pru_TRUE@ pru
/modules.c
2947 @SIM_ENABLE_ARCH_pru_TRUE@pru_libsim_a_SOURCES
= \
2948 @SIM_ENABLE_ARCH_pru_TRUE@
$(common_libcommon_a_SOURCES
)
2950 @SIM_ENABLE_ARCH_pru_TRUE@pru_libsim_a_LIBADD
= \
2951 @SIM_ENABLE_ARCH_pru_TRUE@
$(patsubst %,pru
/%,$(SIM_NEW_COMMON_OBJS
)) \
2952 @SIM_ENABLE_ARCH_pru_TRUE@
$(patsubst %,pru
/dv-
%.o
,$(SIM_HW_DEVICES
)) \
2953 @SIM_ENABLE_ARCH_pru_TRUE@ pru
/interp.o \
2954 @SIM_ENABLE_ARCH_pru_TRUE@ pru
/sim-resume.o
2956 @SIM_ENABLE_ARCH_pru_TRUE@pru_run_SOURCES
=
2957 @SIM_ENABLE_ARCH_pru_TRUE@pru_run_LDADD
= \
2958 @SIM_ENABLE_ARCH_pru_TRUE@ pru
/nrun.o \
2959 @SIM_ENABLE_ARCH_pru_TRUE@ pru
/libsim.a \
2960 @SIM_ENABLE_ARCH_pru_TRUE@
$(SIM_COMMON_LIBS
)
2962 @SIM_ENABLE_ARCH_riscv_TRUE@AM_CPPFLAGS_riscv
= -DWITH_TARGET_WORD_BITSIZE
=$(SIM_RISCV_BITSIZE
)
2963 @SIM_ENABLE_ARCH_riscv_TRUE@nodist_riscv_libsim_a_SOURCES
= \
2964 @SIM_ENABLE_ARCH_riscv_TRUE@ riscv
/modules.c
2966 @SIM_ENABLE_ARCH_riscv_TRUE@riscv_libsim_a_SOURCES
= \
2967 @SIM_ENABLE_ARCH_riscv_TRUE@
$(common_libcommon_a_SOURCES
)
2969 @SIM_ENABLE_ARCH_riscv_TRUE@riscv_libsim_a_LIBADD
= \
2970 @SIM_ENABLE_ARCH_riscv_TRUE@
$(patsubst %,riscv
/%,$(SIM_NEW_COMMON_OBJS
)) \
2971 @SIM_ENABLE_ARCH_riscv_TRUE@
$(patsubst %,riscv
/dv-
%.o
,$(SIM_HW_DEVICES
)) \
2972 @SIM_ENABLE_ARCH_riscv_TRUE@ riscv
/interp.o \
2973 @SIM_ENABLE_ARCH_riscv_TRUE@ riscv
/machs.o \
2974 @SIM_ENABLE_ARCH_riscv_TRUE@ riscv
/sim-main.o \
2975 @SIM_ENABLE_ARCH_riscv_TRUE@ riscv
/sim-resume.o
2977 @SIM_ENABLE_ARCH_riscv_TRUE@riscv_run_SOURCES
=
2978 @SIM_ENABLE_ARCH_riscv_TRUE@riscv_run_LDADD
= \
2979 @SIM_ENABLE_ARCH_riscv_TRUE@ riscv
/nrun.o \
2980 @SIM_ENABLE_ARCH_riscv_TRUE@ riscv
/libsim.a \
2981 @SIM_ENABLE_ARCH_riscv_TRUE@
$(SIM_COMMON_LIBS
)
2983 @SIM_ENABLE_ARCH_rl78_TRUE@nodist_rl78_libsim_a_SOURCES
= \
2984 @SIM_ENABLE_ARCH_rl78_TRUE@ rl78
/modules.c
2986 @SIM_ENABLE_ARCH_rl78_TRUE@rl78_libsim_a_SOURCES
= \
2987 @SIM_ENABLE_ARCH_rl78_TRUE@
$(common_libcommon_a_SOURCES
)
2989 @SIM_ENABLE_ARCH_rl78_TRUE@rl78_libsim_a_LIBADD
= \
2990 @SIM_ENABLE_ARCH_rl78_TRUE@ rl78
/load.o \
2991 @SIM_ENABLE_ARCH_rl78_TRUE@ rl78
/mem.o \
2992 @SIM_ENABLE_ARCH_rl78_TRUE@ rl78
/cpu.o \
2993 @SIM_ENABLE_ARCH_rl78_TRUE@ rl78
/rl78.o \
2994 @SIM_ENABLE_ARCH_rl78_TRUE@ rl78
/gdb-if.o \
2995 @SIM_ENABLE_ARCH_rl78_TRUE@ rl78
/trace.o
2997 @SIM_ENABLE_ARCH_rl78_TRUE@rl78_run_SOURCES
=
2998 @SIM_ENABLE_ARCH_rl78_TRUE@rl78_run_LDADD
= \
2999 @SIM_ENABLE_ARCH_rl78_TRUE@ rl78
/main.o \
3000 @SIM_ENABLE_ARCH_rl78_TRUE@ rl78
/libsim.a \
3001 @SIM_ENABLE_ARCH_rl78_TRUE@
$(SIM_COMMON_LIBS
)
3003 @SIM_ENABLE_ARCH_rx_TRUE@AM_CPPFLAGS_rx
= $(SIM_RX_CYCLE_ACCURATE_FLAGS
)
3004 @SIM_ENABLE_ARCH_rx_TRUE@nodist_rx_libsim_a_SOURCES
= \
3005 @SIM_ENABLE_ARCH_rx_TRUE@ rx
/modules.c
3007 @SIM_ENABLE_ARCH_rx_TRUE@rx_libsim_a_SOURCES
= \
3008 @SIM_ENABLE_ARCH_rx_TRUE@
$(common_libcommon_a_SOURCES
)
3010 @SIM_ENABLE_ARCH_rx_TRUE@rx_libsim_a_LIBADD
= \
3011 @SIM_ENABLE_ARCH_rx_TRUE@ rx
/fpu.o \
3012 @SIM_ENABLE_ARCH_rx_TRUE@ rx
/load.o \
3013 @SIM_ENABLE_ARCH_rx_TRUE@ rx
/mem.o \
3014 @SIM_ENABLE_ARCH_rx_TRUE@ rx
/misc.o \
3015 @SIM_ENABLE_ARCH_rx_TRUE@ rx
/reg.o \
3016 @SIM_ENABLE_ARCH_rx_TRUE@ rx
/rx.o \
3017 @SIM_ENABLE_ARCH_rx_TRUE@ rx
/syscalls.o \
3018 @SIM_ENABLE_ARCH_rx_TRUE@ rx
/trace.o \
3019 @SIM_ENABLE_ARCH_rx_TRUE@ rx
/gdb-if.o \
3020 @SIM_ENABLE_ARCH_rx_TRUE@ rx
/err.o
3022 @SIM_ENABLE_ARCH_rx_TRUE@rx_run_SOURCES
=
3023 @SIM_ENABLE_ARCH_rx_TRUE@rx_run_LDADD
= \
3024 @SIM_ENABLE_ARCH_rx_TRUE@ rx
/main.o \
3025 @SIM_ENABLE_ARCH_rx_TRUE@ rx
/libsim.a \
3026 @SIM_ENABLE_ARCH_rx_TRUE@
$(SIM_COMMON_LIBS
)
3028 @SIM_ENABLE_ARCH_rx_TRUE@rxdocdir
= $(docdir
)/rx
3029 @SIM_ENABLE_ARCH_rx_TRUE@rxdoc_DATA
= rx
/README.txt
3030 @SIM_ENABLE_ARCH_sh_TRUE@nodist_sh_libsim_a_SOURCES
= \
3031 @SIM_ENABLE_ARCH_sh_TRUE@ sh
/modules.c
3033 @SIM_ENABLE_ARCH_sh_TRUE@sh_libsim_a_SOURCES
= \
3034 @SIM_ENABLE_ARCH_sh_TRUE@
$(common_libcommon_a_SOURCES
)
3036 @SIM_ENABLE_ARCH_sh_TRUE@sh_libsim_a_LIBADD
= \
3037 @SIM_ENABLE_ARCH_sh_TRUE@ sh
/interp.o \
3038 @SIM_ENABLE_ARCH_sh_TRUE@
$(patsubst %,sh
/%,$(SIM_NEW_COMMON_OBJS
)) \
3039 @SIM_ENABLE_ARCH_sh_TRUE@
$(patsubst %,sh
/dv-
%.o
,$(SIM_HW_DEVICES
)) \
3040 @SIM_ENABLE_ARCH_sh_TRUE@ sh
/table.o
3042 @SIM_ENABLE_ARCH_sh_TRUE@sh_run_SOURCES
=
3043 @SIM_ENABLE_ARCH_sh_TRUE@sh_run_LDADD
= \
3044 @SIM_ENABLE_ARCH_sh_TRUE@ sh
/nrun.o \
3045 @SIM_ENABLE_ARCH_sh_TRUE@ sh
/libsim.a \
3046 @SIM_ENABLE_ARCH_sh_TRUE@
$(SIM_COMMON_LIBS
)
3048 @SIM_ENABLE_ARCH_sh_TRUE@sh_BUILD_OUTPUTS
= \
3049 @SIM_ENABLE_ARCH_sh_TRUE@ sh
/gencode
$(EXEEXT
) \
3050 @SIM_ENABLE_ARCH_sh_TRUE@ sh
/table.c
3052 @SIM_ENABLE_ARCH_sh_TRUE@sh_gencode_SOURCES
= sh
/gencode.c
3053 @SIM_ENABLE_ARCH_v850_TRUE@AM_CPPFLAGS_v850
= -DWITH_TARGET_WORD_BITSIZE
=32 -DWITH_TARGET_WORD_MSB
=31
3054 @SIM_ENABLE_ARCH_v850_TRUE@nodist_v850_libsim_a_SOURCES
= \
3055 @SIM_ENABLE_ARCH_v850_TRUE@ v850
/modules.c
3057 @SIM_ENABLE_ARCH_v850_TRUE@v850_libsim_a_SOURCES
= \
3058 @SIM_ENABLE_ARCH_v850_TRUE@
$(common_libcommon_a_SOURCES
)
3060 @SIM_ENABLE_ARCH_v850_TRUE@v850_libsim_a_LIBADD
= \
3061 @SIM_ENABLE_ARCH_v850_TRUE@
$(patsubst %,v850
/%,$(SIM_NEW_COMMON_OBJS
)) \
3062 @SIM_ENABLE_ARCH_v850_TRUE@
$(patsubst %,v850
/dv-
%.o
,$(SIM_HW_DEVICES
)) \
3063 @SIM_ENABLE_ARCH_v850_TRUE@ v850
/simops.o \
3064 @SIM_ENABLE_ARCH_v850_TRUE@ v850
/interp.o \
3065 @SIM_ENABLE_ARCH_v850_TRUE@ v850
/itable.o \
3066 @SIM_ENABLE_ARCH_v850_TRUE@ v850
/semantics.o \
3067 @SIM_ENABLE_ARCH_v850_TRUE@ v850
/idecode.o \
3068 @SIM_ENABLE_ARCH_v850_TRUE@ v850
/icache.o \
3069 @SIM_ENABLE_ARCH_v850_TRUE@ v850
/engine.o \
3070 @SIM_ENABLE_ARCH_v850_TRUE@ v850
/irun.o \
3071 @SIM_ENABLE_ARCH_v850_TRUE@ v850
/support.o \
3072 @SIM_ENABLE_ARCH_v850_TRUE@ v850
/sim-resume.o
3074 @SIM_ENABLE_ARCH_v850_TRUE@v850_run_SOURCES
=
3075 @SIM_ENABLE_ARCH_v850_TRUE@v850_run_LDADD
= \
3076 @SIM_ENABLE_ARCH_v850_TRUE@ v850
/nrun.o \
3077 @SIM_ENABLE_ARCH_v850_TRUE@ v850
/libsim.a \
3078 @SIM_ENABLE_ARCH_v850_TRUE@
$(SIM_COMMON_LIBS
)
3080 @SIM_ENABLE_ARCH_v850_TRUE@v850_BUILT_SRC_FROM_IGEN
= \
3081 @SIM_ENABLE_ARCH_v850_TRUE@ v850
/icache.h \
3082 @SIM_ENABLE_ARCH_v850_TRUE@ v850
/icache.c \
3083 @SIM_ENABLE_ARCH_v850_TRUE@ v850
/idecode.h \
3084 @SIM_ENABLE_ARCH_v850_TRUE@ v850
/idecode.c \
3085 @SIM_ENABLE_ARCH_v850_TRUE@ v850
/semantics.h \
3086 @SIM_ENABLE_ARCH_v850_TRUE@ v850
/semantics.c \
3087 @SIM_ENABLE_ARCH_v850_TRUE@ v850
/model.h \
3088 @SIM_ENABLE_ARCH_v850_TRUE@ v850
/model.c \
3089 @SIM_ENABLE_ARCH_v850_TRUE@ v850
/support.h \
3090 @SIM_ENABLE_ARCH_v850_TRUE@ v850
/support.c \
3091 @SIM_ENABLE_ARCH_v850_TRUE@ v850
/itable.h \
3092 @SIM_ENABLE_ARCH_v850_TRUE@ v850
/itable.c \
3093 @SIM_ENABLE_ARCH_v850_TRUE@ v850
/engine.h \
3094 @SIM_ENABLE_ARCH_v850_TRUE@ v850
/engine.c \
3095 @SIM_ENABLE_ARCH_v850_TRUE@ v850
/irun.c
3097 @SIM_ENABLE_ARCH_v850_TRUE@v850_BUILD_OUTPUTS
= \
3098 @SIM_ENABLE_ARCH_v850_TRUE@
$(v850_BUILT_SRC_FROM_IGEN
) \
3099 @SIM_ENABLE_ARCH_v850_TRUE@ v850
/stamp-igen
3101 @SIM_ENABLE_ARCH_v850_TRUE@v850_IGEN_TRACE
= # -G omit-line-numbers # -G trace-rule-selection -G trace-rule-rejection -G trace-entries
3102 @SIM_ENABLE_ARCH_v850_TRUE@v850_IGEN_INSN
= $(srcdir)/v850
/v850.igen
3103 @SIM_ENABLE_ARCH_v850_TRUE@v850_IGEN_DC
= $(srcdir)/v850
/v850.dc
3104 all: $(BUILT_SOURCES
) config.h
3105 $(MAKE
) $(AM_MAKEFLAGS
) all-recursive
3108 .SUFFIXES
: .c .lo .log .o .obj .
test .
test$(EXEEXT
) .trs
3109 am--refresh
: Makefile
3111 $(srcdir)/Makefile.in
: @MAINTAINER_MODE_TRUE@
$(srcdir)/Makefile.am
$(srcdir)/common
/local.mk
$(srcdir)/igen
/local.mk
$(srcdir)/testsuite
/local.mk
$(srcdir)/testsuite
/common
/local.mk
$(srcdir)/aarch64
/local.mk
$(srcdir)/arm
/local.mk
$(srcdir)/avr
/local.mk
$(srcdir)/bfin
/local.mk
$(srcdir)/bpf
/local.mk
$(srcdir)/cr16
/local.mk
$(srcdir)/cris
/local.mk
$(srcdir)/d10v
/local.mk
$(srcdir)/erc32
/local.mk
$(srcdir)/example-synacor
/local.mk
$(srcdir)/frv
/local.mk
$(srcdir)/ft32
/local.mk
$(srcdir)/h8300
/local.mk
$(srcdir)/iq2000
/local.mk
$(srcdir)/lm32
/local.mk
$(srcdir)/m32c
/local.mk
$(srcdir)/m32r
/local.mk
$(srcdir)/m68hc11
/local.mk
$(srcdir)/mcore
/local.mk
$(srcdir)/microblaze
/local.mk
$(srcdir)/mips
/local.mk
$(srcdir)/mn10300
/local.mk
$(srcdir)/moxie
/local.mk
$(srcdir)/msp430
/local.mk
$(srcdir)/or1k
/local.mk
$(srcdir)/ppc
/local.mk
$(srcdir)/pru
/local.mk
$(srcdir)/riscv
/local.mk
$(srcdir)/rl78
/local.mk
$(srcdir)/rx
/local.mk
$(srcdir)/sh
/local.mk
$(srcdir)/v850
/local.mk
$(am__configure_deps
)
3112 @for dep in
$?
; do \
3113 case
'$(am__configure_deps)' in \
3115 echo
' cd $(srcdir) && $(AUTOMAKE) --foreign'; \
3116 $(am__cd
) $(srcdir) && $(AUTOMAKE
) --foreign \
3121 echo
' cd $(top_srcdir) && $(AUTOMAKE) --foreign Makefile'; \
3122 $(am__cd
) $(top_srcdir
) && \
3123 $(AUTOMAKE
) --foreign Makefile
3124 Makefile
: $(srcdir)/Makefile.in
$(top_builddir
)/config.status
3127 echo
' $(SHELL) ./config.status'; \
3128 $(SHELL
) .
/config.status
;; \
3130 echo
' cd $(top_builddir) && $(SHELL) ./config.status $@ $(am__depfiles_maybe)'; \
3131 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
$(am__depfiles_maybe
);; \
3133 $(srcdir)/common
/local.mk
$(srcdir)/igen
/local.mk
$(srcdir)/testsuite
/local.mk
$(srcdir)/testsuite
/common
/local.mk
$(srcdir)/aarch64
/local.mk
$(srcdir)/arm
/local.mk
$(srcdir)/avr
/local.mk
$(srcdir)/bfin
/local.mk
$(srcdir)/bpf
/local.mk
$(srcdir)/cr16
/local.mk
$(srcdir)/cris
/local.mk
$(srcdir)/d10v
/local.mk
$(srcdir)/erc32
/local.mk
$(srcdir)/example-synacor
/local.mk
$(srcdir)/frv
/local.mk
$(srcdir)/ft32
/local.mk
$(srcdir)/h8300
/local.mk
$(srcdir)/iq2000
/local.mk
$(srcdir)/lm32
/local.mk
$(srcdir)/m32c
/local.mk
$(srcdir)/m32r
/local.mk
$(srcdir)/m68hc11
/local.mk
$(srcdir)/mcore
/local.mk
$(srcdir)/microblaze
/local.mk
$(srcdir)/mips
/local.mk
$(srcdir)/mn10300
/local.mk
$(srcdir)/moxie
/local.mk
$(srcdir)/msp430
/local.mk
$(srcdir)/or1k
/local.mk
$(srcdir)/ppc
/local.mk
$(srcdir)/pru
/local.mk
$(srcdir)/riscv
/local.mk
$(srcdir)/rl78
/local.mk
$(srcdir)/rx
/local.mk
$(srcdir)/sh
/local.mk
$(srcdir)/v850
/local.mk
$(am__empty
):
3135 $(top_builddir
)/config.status
: $(top_srcdir
)/configure
$(CONFIG_STATUS_DEPENDENCIES
)
3136 $(SHELL
) .
/config.status
--recheck
3138 $(top_srcdir
)/configure
: @MAINTAINER_MODE_TRUE@
$(am__configure_deps
)
3139 $(am__cd
) $(srcdir) && $(AUTOCONF
)
3140 $(ACLOCAL_M4
): @MAINTAINER_MODE_TRUE@
$(am__aclocal_m4_deps
)
3141 $(am__cd
) $(srcdir) && $(ACLOCAL
) $(ACLOCAL_AMFLAGS
)
3142 $(am__aclocal_m4_deps
):
3145 @
test -f
$@ ||
rm -f stamp-h1
3146 @
test -f
$@ ||
$(MAKE
) $(AM_MAKEFLAGS
) stamp-h1
3148 stamp-h1
: $(srcdir)/config.h.in
$(top_builddir
)/config.status
3150 cd
$(top_builddir
) && $(SHELL
) .
/config.status config.h
3151 $(srcdir)/config.h.in
: @MAINTAINER_MODE_TRUE@
$(am__configure_deps
)
3152 ($(am__cd
) $(top_srcdir
) && $(AUTOHEADER
))
3157 -rm -f config.h stamp-h1
3158 aarch64
/.gdbinit
: $(top_builddir
)/config.status
$(top_srcdir
)/common
/gdbinit.in
3159 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
3160 arm
/.gdbinit
: $(top_builddir
)/config.status
$(top_srcdir
)/common
/gdbinit.in
3161 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
3162 avr
/.gdbinit
: $(top_builddir
)/config.status
$(top_srcdir
)/common
/gdbinit.in
3163 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
3164 bfin
/.gdbinit
: $(top_builddir
)/config.status
$(top_srcdir
)/common
/gdbinit.in
3165 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
3166 bpf
/.gdbinit
: $(top_builddir
)/config.status
$(top_srcdir
)/common
/gdbinit.in
3167 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
3168 cr16
/.gdbinit
: $(top_builddir
)/config.status
$(top_srcdir
)/common
/gdbinit.in
3169 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
3170 cris
/.gdbinit
: $(top_builddir
)/config.status
$(top_srcdir
)/common
/gdbinit.in
3171 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
3172 d10v
/.gdbinit
: $(top_builddir
)/config.status
$(top_srcdir
)/common
/gdbinit.in
3173 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
3174 frv
/.gdbinit
: $(top_builddir
)/config.status
$(top_srcdir
)/common
/gdbinit.in
3175 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
3176 ft32
/.gdbinit
: $(top_builddir
)/config.status
$(top_srcdir
)/common
/gdbinit.in
3177 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
3178 h8300
/.gdbinit
: $(top_builddir
)/config.status
$(top_srcdir
)/common
/gdbinit.in
3179 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
3180 iq2000
/.gdbinit
: $(top_builddir
)/config.status
$(top_srcdir
)/common
/gdbinit.in
3181 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
3182 lm32
/.gdbinit
: $(top_builddir
)/config.status
$(top_srcdir
)/common
/gdbinit.in
3183 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
3184 m32c
/.gdbinit
: $(top_builddir
)/config.status
$(top_srcdir
)/common
/gdbinit.in
3185 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
3186 m32r
/.gdbinit
: $(top_builddir
)/config.status
$(top_srcdir
)/common
/gdbinit.in
3187 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
3188 m68hc11
/.gdbinit
: $(top_builddir
)/config.status
$(top_srcdir
)/common
/gdbinit.in
3189 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
3190 mcore
/.gdbinit
: $(top_builddir
)/config.status
$(top_srcdir
)/common
/gdbinit.in
3191 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
3192 microblaze
/.gdbinit
: $(top_builddir
)/config.status
$(top_srcdir
)/common
/gdbinit.in
3193 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
3194 mips
/.gdbinit
: $(top_builddir
)/config.status
$(top_srcdir
)/common
/gdbinit.in
3195 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
3196 mn10300
/.gdbinit
: $(top_builddir
)/config.status
$(top_srcdir
)/common
/gdbinit.in
3197 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
3198 moxie
/.gdbinit
: $(top_builddir
)/config.status
$(top_srcdir
)/common
/gdbinit.in
3199 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
3200 msp430
/.gdbinit
: $(top_builddir
)/config.status
$(top_srcdir
)/common
/gdbinit.in
3201 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
3202 or1k
/.gdbinit
: $(top_builddir
)/config.status
$(top_srcdir
)/common
/gdbinit.in
3203 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
3204 ppc
/.gdbinit
: $(top_builddir
)/config.status
$(top_srcdir
)/common
/gdbinit.in
3205 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
3206 pru
/.gdbinit
: $(top_builddir
)/config.status
$(top_srcdir
)/common
/gdbinit.in
3207 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
3208 riscv
/.gdbinit
: $(top_builddir
)/config.status
$(top_srcdir
)/common
/gdbinit.in
3209 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
3210 rl78
/.gdbinit
: $(top_builddir
)/config.status
$(top_srcdir
)/common
/gdbinit.in
3211 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
3212 rx
/.gdbinit
: $(top_builddir
)/config.status
$(top_srcdir
)/common
/gdbinit.in
3213 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
3214 sh
/.gdbinit
: $(top_builddir
)/config.status
$(top_srcdir
)/common
/gdbinit.in
3215 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
3216 erc32
/.gdbinit
: $(top_builddir
)/config.status
$(top_srcdir
)/common
/gdbinit.in
3217 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
3218 v850
/.gdbinit
: $(top_builddir
)/config.status
$(top_srcdir
)/common
/gdbinit.in
3219 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
3220 example-synacor
/.gdbinit
: $(top_builddir
)/config.status
$(top_srcdir
)/common
/gdbinit.in
3221 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
3222 arch-subdir.mk
: $(top_builddir
)/config.status
$(srcdir)/arch-subdir.mk.in
3223 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
3224 .gdbinit
: $(top_builddir
)/config.status
$(srcdir)/gdbinit.in
3225 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
3227 clean-noinstLIBRARIES
:
3228 -test -z
"$(noinst_LIBRARIES)" ||
rm -f
$(noinst_LIBRARIES
)
3229 common
/$(am__dirstamp
):
3231 @
: > common
/$(am__dirstamp
)
3232 common
/$(DEPDIR
)/$(am__dirstamp
):
3233 @
$(MKDIR_P
) common
/$(DEPDIR
)
3234 @
: > common
/$(DEPDIR
)/$(am__dirstamp
)
3235 common
/callback.
$(OBJEXT
): common
/$(am__dirstamp
) \
3236 common
/$(DEPDIR
)/$(am__dirstamp
)
3237 common
/portability.
$(OBJEXT
): common
/$(am__dirstamp
) \
3238 common
/$(DEPDIR
)/$(am__dirstamp
)
3239 common
/sim-load.
$(OBJEXT
): common
/$(am__dirstamp
) \
3240 common
/$(DEPDIR
)/$(am__dirstamp
)
3241 common
/sim-signal.
$(OBJEXT
): common
/$(am__dirstamp
) \
3242 common
/$(DEPDIR
)/$(am__dirstamp
)
3243 common
/syscall.
$(OBJEXT
): common
/$(am__dirstamp
) \
3244 common
/$(DEPDIR
)/$(am__dirstamp
)
3245 common
/target-newlib-errno.
$(OBJEXT
): common
/$(am__dirstamp
) \
3246 common
/$(DEPDIR
)/$(am__dirstamp
)
3247 common
/target-newlib-open.
$(OBJEXT
): common
/$(am__dirstamp
) \
3248 common
/$(DEPDIR
)/$(am__dirstamp
)
3249 common
/target-newlib-signal.
$(OBJEXT
): common
/$(am__dirstamp
) \
3250 common
/$(DEPDIR
)/$(am__dirstamp
)
3251 common
/target-newlib-syscall.
$(OBJEXT
): common
/$(am__dirstamp
) \
3252 common
/$(DEPDIR
)/$(am__dirstamp
)
3253 common
/version.
$(OBJEXT
): common
/$(am__dirstamp
) \
3254 common
/$(DEPDIR
)/$(am__dirstamp
)
3255 aarch64
/$(am__dirstamp
):
3257 @
: > aarch64
/$(am__dirstamp
)
3258 aarch64
/$(DEPDIR
)/$(am__dirstamp
):
3259 @
$(MKDIR_P
) aarch64
/$(DEPDIR
)
3260 @
: > aarch64
/$(DEPDIR
)/$(am__dirstamp
)
3261 aarch64
/modules.
$(OBJEXT
): aarch64
/$(am__dirstamp
) \
3262 aarch64
/$(DEPDIR
)/$(am__dirstamp
)
3264 aarch64
/libsim.a
: $(aarch64_libsim_a_OBJECTS
) $(aarch64_libsim_a_DEPENDENCIES
) $(EXTRA_aarch64_libsim_a_DEPENDENCIES
) aarch64
/$(am__dirstamp
)
3265 $(AM_V_at
)-rm -f aarch64
/libsim.a
3266 $(AM_V_AR
)$(aarch64_libsim_a_AR
) aarch64
/libsim.a
$(aarch64_libsim_a_OBJECTS
) $(aarch64_libsim_a_LIBADD
)
3267 $(AM_V_at
)$(RANLIB
) aarch64
/libsim.a
3268 arm
/$(am__dirstamp
):
3270 @
: > arm
/$(am__dirstamp
)
3271 arm
/$(DEPDIR
)/$(am__dirstamp
):
3272 @
$(MKDIR_P
) arm
/$(DEPDIR
)
3273 @
: > arm
/$(DEPDIR
)/$(am__dirstamp
)
3274 arm
/modules.
$(OBJEXT
): arm
/$(am__dirstamp
) \
3275 arm
/$(DEPDIR
)/$(am__dirstamp
)
3277 arm
/libsim.a
: $(arm_libsim_a_OBJECTS
) $(arm_libsim_a_DEPENDENCIES
) $(EXTRA_arm_libsim_a_DEPENDENCIES
) arm
/$(am__dirstamp
)
3278 $(AM_V_at
)-rm -f arm
/libsim.a
3279 $(AM_V_AR
)$(arm_libsim_a_AR
) arm
/libsim.a
$(arm_libsim_a_OBJECTS
) $(arm_libsim_a_LIBADD
)
3280 $(AM_V_at
)$(RANLIB
) arm
/libsim.a
3281 avr
/$(am__dirstamp
):
3283 @
: > avr
/$(am__dirstamp
)
3284 avr
/$(DEPDIR
)/$(am__dirstamp
):
3285 @
$(MKDIR_P
) avr
/$(DEPDIR
)
3286 @
: > avr
/$(DEPDIR
)/$(am__dirstamp
)
3287 avr
/modules.
$(OBJEXT
): avr
/$(am__dirstamp
) \
3288 avr
/$(DEPDIR
)/$(am__dirstamp
)
3290 avr
/libsim.a
: $(avr_libsim_a_OBJECTS
) $(avr_libsim_a_DEPENDENCIES
) $(EXTRA_avr_libsim_a_DEPENDENCIES
) avr
/$(am__dirstamp
)
3291 $(AM_V_at
)-rm -f avr
/libsim.a
3292 $(AM_V_AR
)$(avr_libsim_a_AR
) avr
/libsim.a
$(avr_libsim_a_OBJECTS
) $(avr_libsim_a_LIBADD
)
3293 $(AM_V_at
)$(RANLIB
) avr
/libsim.a
3294 bfin
/$(am__dirstamp
):
3296 @
: > bfin
/$(am__dirstamp
)
3297 bfin
/$(DEPDIR
)/$(am__dirstamp
):
3298 @
$(MKDIR_P
) bfin
/$(DEPDIR
)
3299 @
: > bfin
/$(DEPDIR
)/$(am__dirstamp
)
3300 bfin
/modules.
$(OBJEXT
): bfin
/$(am__dirstamp
) \
3301 bfin
/$(DEPDIR
)/$(am__dirstamp
)
3303 bfin
/libsim.a
: $(bfin_libsim_a_OBJECTS
) $(bfin_libsim_a_DEPENDENCIES
) $(EXTRA_bfin_libsim_a_DEPENDENCIES
) bfin
/$(am__dirstamp
)
3304 $(AM_V_at
)-rm -f bfin
/libsim.a
3305 $(AM_V_AR
)$(bfin_libsim_a_AR
) bfin
/libsim.a
$(bfin_libsim_a_OBJECTS
) $(bfin_libsim_a_LIBADD
)
3306 $(AM_V_at
)$(RANLIB
) bfin
/libsim.a
3307 bpf
/$(am__dirstamp
):
3309 @
: > bpf
/$(am__dirstamp
)
3310 bpf
/$(DEPDIR
)/$(am__dirstamp
):
3311 @
$(MKDIR_P
) bpf
/$(DEPDIR
)
3312 @
: > bpf
/$(DEPDIR
)/$(am__dirstamp
)
3313 bpf
/modules.
$(OBJEXT
): bpf
/$(am__dirstamp
) \
3314 bpf
/$(DEPDIR
)/$(am__dirstamp
)
3316 bpf
/libsim.a
: $(bpf_libsim_a_OBJECTS
) $(bpf_libsim_a_DEPENDENCIES
) $(EXTRA_bpf_libsim_a_DEPENDENCIES
) bpf
/$(am__dirstamp
)
3317 $(AM_V_at
)-rm -f bpf
/libsim.a
3318 $(AM_V_AR
)$(bpf_libsim_a_AR
) bpf
/libsim.a
$(bpf_libsim_a_OBJECTS
) $(bpf_libsim_a_LIBADD
)
3319 $(AM_V_at
)$(RANLIB
) bpf
/libsim.a
3321 common
/libcommon.a
: $(common_libcommon_a_OBJECTS
) $(common_libcommon_a_DEPENDENCIES
) $(EXTRA_common_libcommon_a_DEPENDENCIES
) common
/$(am__dirstamp
)
3322 $(AM_V_at
)-rm -f common
/libcommon.a
3323 $(AM_V_AR
)$(common_libcommon_a_AR
) common
/libcommon.a
$(common_libcommon_a_OBJECTS
) $(common_libcommon_a_LIBADD
)
3324 $(AM_V_at
)$(RANLIB
) common
/libcommon.a
3325 cr16
/$(am__dirstamp
):
3327 @
: > cr16
/$(am__dirstamp
)
3328 cr16
/$(DEPDIR
)/$(am__dirstamp
):
3329 @
$(MKDIR_P
) cr16
/$(DEPDIR
)
3330 @
: > cr16
/$(DEPDIR
)/$(am__dirstamp
)
3331 cr16
/modules.
$(OBJEXT
): cr16
/$(am__dirstamp
) \
3332 cr16
/$(DEPDIR
)/$(am__dirstamp
)
3334 cr16
/libsim.a
: $(cr16_libsim_a_OBJECTS
) $(cr16_libsim_a_DEPENDENCIES
) $(EXTRA_cr16_libsim_a_DEPENDENCIES
) cr16
/$(am__dirstamp
)
3335 $(AM_V_at
)-rm -f cr16
/libsim.a
3336 $(AM_V_AR
)$(cr16_libsim_a_AR
) cr16
/libsim.a
$(cr16_libsim_a_OBJECTS
) $(cr16_libsim_a_LIBADD
)
3337 $(AM_V_at
)$(RANLIB
) cr16
/libsim.a
3338 cris
/$(am__dirstamp
):
3340 @
: > cris
/$(am__dirstamp
)
3341 cris
/$(DEPDIR
)/$(am__dirstamp
):
3342 @
$(MKDIR_P
) cris
/$(DEPDIR
)
3343 @
: > cris
/$(DEPDIR
)/$(am__dirstamp
)
3344 cris
/modules.
$(OBJEXT
): cris
/$(am__dirstamp
) \
3345 cris
/$(DEPDIR
)/$(am__dirstamp
)
3347 cris
/libsim.a
: $(cris_libsim_a_OBJECTS
) $(cris_libsim_a_DEPENDENCIES
) $(EXTRA_cris_libsim_a_DEPENDENCIES
) cris
/$(am__dirstamp
)
3348 $(AM_V_at
)-rm -f cris
/libsim.a
3349 $(AM_V_AR
)$(cris_libsim_a_AR
) cris
/libsim.a
$(cris_libsim_a_OBJECTS
) $(cris_libsim_a_LIBADD
)
3350 $(AM_V_at
)$(RANLIB
) cris
/libsim.a
3351 d10v
/$(am__dirstamp
):
3353 @
: > d10v
/$(am__dirstamp
)
3354 d10v
/$(DEPDIR
)/$(am__dirstamp
):
3355 @
$(MKDIR_P
) d10v
/$(DEPDIR
)
3356 @
: > d10v
/$(DEPDIR
)/$(am__dirstamp
)
3357 d10v
/modules.
$(OBJEXT
): d10v
/$(am__dirstamp
) \
3358 d10v
/$(DEPDIR
)/$(am__dirstamp
)
3360 d10v
/libsim.a
: $(d10v_libsim_a_OBJECTS
) $(d10v_libsim_a_DEPENDENCIES
) $(EXTRA_d10v_libsim_a_DEPENDENCIES
) d10v
/$(am__dirstamp
)
3361 $(AM_V_at
)-rm -f d10v
/libsim.a
3362 $(AM_V_AR
)$(d10v_libsim_a_AR
) d10v
/libsim.a
$(d10v_libsim_a_OBJECTS
) $(d10v_libsim_a_LIBADD
)
3363 $(AM_V_at
)$(RANLIB
) d10v
/libsim.a
3364 erc32
/$(am__dirstamp
):
3366 @
: > erc32
/$(am__dirstamp
)
3367 erc32
/$(DEPDIR
)/$(am__dirstamp
):
3368 @
$(MKDIR_P
) erc32
/$(DEPDIR
)
3369 @
: > erc32
/$(DEPDIR
)/$(am__dirstamp
)
3370 erc32
/modules.
$(OBJEXT
): erc32
/$(am__dirstamp
) \
3371 erc32
/$(DEPDIR
)/$(am__dirstamp
)
3373 erc32
/libsim.a
: $(erc32_libsim_a_OBJECTS
) $(erc32_libsim_a_DEPENDENCIES
) $(EXTRA_erc32_libsim_a_DEPENDENCIES
) erc32
/$(am__dirstamp
)
3374 $(AM_V_at
)-rm -f erc32
/libsim.a
3375 $(AM_V_AR
)$(erc32_libsim_a_AR
) erc32
/libsim.a
$(erc32_libsim_a_OBJECTS
) $(erc32_libsim_a_LIBADD
)
3376 $(AM_V_at
)$(RANLIB
) erc32
/libsim.a
3377 example-synacor
/$(am__dirstamp
):
3378 @
$(MKDIR_P
) example-synacor
3379 @
: > example-synacor
/$(am__dirstamp
)
3380 example-synacor
/$(DEPDIR
)/$(am__dirstamp
):
3381 @
$(MKDIR_P
) example-synacor
/$(DEPDIR
)
3382 @
: > example-synacor
/$(DEPDIR
)/$(am__dirstamp
)
3383 example-synacor
/modules.
$(OBJEXT
): example-synacor
/$(am__dirstamp
) \
3384 example-synacor
/$(DEPDIR
)/$(am__dirstamp
)
3386 example-synacor
/libsim.a
: $(example_synacor_libsim_a_OBJECTS
) $(example_synacor_libsim_a_DEPENDENCIES
) $(EXTRA_example_synacor_libsim_a_DEPENDENCIES
) example-synacor
/$(am__dirstamp
)
3387 $(AM_V_at
)-rm -f example-synacor
/libsim.a
3388 $(AM_V_AR
)$(example_synacor_libsim_a_AR
) example-synacor
/libsim.a
$(example_synacor_libsim_a_OBJECTS
) $(example_synacor_libsim_a_LIBADD
)
3389 $(AM_V_at
)$(RANLIB
) example-synacor
/libsim.a
3390 frv
/$(am__dirstamp
):
3392 @
: > frv
/$(am__dirstamp
)
3393 frv
/$(DEPDIR
)/$(am__dirstamp
):
3394 @
$(MKDIR_P
) frv
/$(DEPDIR
)
3395 @
: > frv
/$(DEPDIR
)/$(am__dirstamp
)
3396 frv
/modules.
$(OBJEXT
): frv
/$(am__dirstamp
) \
3397 frv
/$(DEPDIR
)/$(am__dirstamp
)
3399 frv
/libsim.a
: $(frv_libsim_a_OBJECTS
) $(frv_libsim_a_DEPENDENCIES
) $(EXTRA_frv_libsim_a_DEPENDENCIES
) frv
/$(am__dirstamp
)
3400 $(AM_V_at
)-rm -f frv
/libsim.a
3401 $(AM_V_AR
)$(frv_libsim_a_AR
) frv
/libsim.a
$(frv_libsim_a_OBJECTS
) $(frv_libsim_a_LIBADD
)
3402 $(AM_V_at
)$(RANLIB
) frv
/libsim.a
3403 ft32
/$(am__dirstamp
):
3405 @
: > ft32
/$(am__dirstamp
)
3406 ft32
/$(DEPDIR
)/$(am__dirstamp
):
3407 @
$(MKDIR_P
) ft32
/$(DEPDIR
)
3408 @
: > ft32
/$(DEPDIR
)/$(am__dirstamp
)
3409 ft32
/modules.
$(OBJEXT
): ft32
/$(am__dirstamp
) \
3410 ft32
/$(DEPDIR
)/$(am__dirstamp
)
3412 ft32
/libsim.a
: $(ft32_libsim_a_OBJECTS
) $(ft32_libsim_a_DEPENDENCIES
) $(EXTRA_ft32_libsim_a_DEPENDENCIES
) ft32
/$(am__dirstamp
)
3413 $(AM_V_at
)-rm -f ft32
/libsim.a
3414 $(AM_V_AR
)$(ft32_libsim_a_AR
) ft32
/libsim.a
$(ft32_libsim_a_OBJECTS
) $(ft32_libsim_a_LIBADD
)
3415 $(AM_V_at
)$(RANLIB
) ft32
/libsim.a
3416 h8300
/$(am__dirstamp
):
3418 @
: > h8300
/$(am__dirstamp
)
3419 h8300
/$(DEPDIR
)/$(am__dirstamp
):
3420 @
$(MKDIR_P
) h8300
/$(DEPDIR
)
3421 @
: > h8300
/$(DEPDIR
)/$(am__dirstamp
)
3422 h8300
/modules.
$(OBJEXT
): h8300
/$(am__dirstamp
) \
3423 h8300
/$(DEPDIR
)/$(am__dirstamp
)
3425 h8300
/libsim.a
: $(h8300_libsim_a_OBJECTS
) $(h8300_libsim_a_DEPENDENCIES
) $(EXTRA_h8300_libsim_a_DEPENDENCIES
) h8300
/$(am__dirstamp
)
3426 $(AM_V_at
)-rm -f h8300
/libsim.a
3427 $(AM_V_AR
)$(h8300_libsim_a_AR
) h8300
/libsim.a
$(h8300_libsim_a_OBJECTS
) $(h8300_libsim_a_LIBADD
)
3428 $(AM_V_at
)$(RANLIB
) h8300
/libsim.a
3429 igen
/$(am__dirstamp
):
3431 @
: > igen
/$(am__dirstamp
)
3432 igen
/$(DEPDIR
)/$(am__dirstamp
):
3433 @
$(MKDIR_P
) igen
/$(DEPDIR
)
3434 @
: > igen
/$(DEPDIR
)/$(am__dirstamp
)
3435 igen
/table.
$(OBJEXT
): igen
/$(am__dirstamp
) \
3436 igen
/$(DEPDIR
)/$(am__dirstamp
)
3437 igen
/lf.
$(OBJEXT
): igen
/$(am__dirstamp
) igen
/$(DEPDIR
)/$(am__dirstamp
)
3438 igen
/misc.
$(OBJEXT
): igen
/$(am__dirstamp
) \
3439 igen
/$(DEPDIR
)/$(am__dirstamp
)
3440 igen
/filter_host.
$(OBJEXT
): igen
/$(am__dirstamp
) \
3441 igen
/$(DEPDIR
)/$(am__dirstamp
)
3442 igen
/ld-decode.
$(OBJEXT
): igen
/$(am__dirstamp
) \
3443 igen
/$(DEPDIR
)/$(am__dirstamp
)
3444 igen
/ld-cache.
$(OBJEXT
): igen
/$(am__dirstamp
) \
3445 igen
/$(DEPDIR
)/$(am__dirstamp
)
3446 igen
/filter.
$(OBJEXT
): igen
/$(am__dirstamp
) \
3447 igen
/$(DEPDIR
)/$(am__dirstamp
)
3448 igen
/ld-insn.
$(OBJEXT
): igen
/$(am__dirstamp
) \
3449 igen
/$(DEPDIR
)/$(am__dirstamp
)
3450 igen
/gen-model.
$(OBJEXT
): igen
/$(am__dirstamp
) \
3451 igen
/$(DEPDIR
)/$(am__dirstamp
)
3452 igen
/gen-itable.
$(OBJEXT
): igen
/$(am__dirstamp
) \
3453 igen
/$(DEPDIR
)/$(am__dirstamp
)
3454 igen
/gen-icache.
$(OBJEXT
): igen
/$(am__dirstamp
) \
3455 igen
/$(DEPDIR
)/$(am__dirstamp
)
3456 igen
/gen-semantics.
$(OBJEXT
): igen
/$(am__dirstamp
) \
3457 igen
/$(DEPDIR
)/$(am__dirstamp
)
3458 igen
/gen-idecode.
$(OBJEXT
): igen
/$(am__dirstamp
) \
3459 igen
/$(DEPDIR
)/$(am__dirstamp
)
3460 igen
/gen-support.
$(OBJEXT
): igen
/$(am__dirstamp
) \
3461 igen
/$(DEPDIR
)/$(am__dirstamp
)
3462 igen
/gen-engine.
$(OBJEXT
): igen
/$(am__dirstamp
) \
3463 igen
/$(DEPDIR
)/$(am__dirstamp
)
3464 igen
/gen.
$(OBJEXT
): igen
/$(am__dirstamp
) \
3465 igen
/$(DEPDIR
)/$(am__dirstamp
)
3466 iq2000
/$(am__dirstamp
):
3468 @
: > iq2000
/$(am__dirstamp
)
3469 iq2000
/$(DEPDIR
)/$(am__dirstamp
):
3470 @
$(MKDIR_P
) iq2000
/$(DEPDIR
)
3471 @
: > iq2000
/$(DEPDIR
)/$(am__dirstamp
)
3472 iq2000
/modules.
$(OBJEXT
): iq2000
/$(am__dirstamp
) \
3473 iq2000
/$(DEPDIR
)/$(am__dirstamp
)
3475 iq2000
/libsim.a
: $(iq2000_libsim_a_OBJECTS
) $(iq2000_libsim_a_DEPENDENCIES
) $(EXTRA_iq2000_libsim_a_DEPENDENCIES
) iq2000
/$(am__dirstamp
)
3476 $(AM_V_at
)-rm -f iq2000
/libsim.a
3477 $(AM_V_AR
)$(iq2000_libsim_a_AR
) iq2000
/libsim.a
$(iq2000_libsim_a_OBJECTS
) $(iq2000_libsim_a_LIBADD
)
3478 $(AM_V_at
)$(RANLIB
) iq2000
/libsim.a
3479 lm32
/$(am__dirstamp
):
3481 @
: > lm32
/$(am__dirstamp
)
3482 lm32
/$(DEPDIR
)/$(am__dirstamp
):
3483 @
$(MKDIR_P
) lm32
/$(DEPDIR
)
3484 @
: > lm32
/$(DEPDIR
)/$(am__dirstamp
)
3485 lm32
/modules.
$(OBJEXT
): lm32
/$(am__dirstamp
) \
3486 lm32
/$(DEPDIR
)/$(am__dirstamp
)
3488 lm32
/libsim.a
: $(lm32_libsim_a_OBJECTS
) $(lm32_libsim_a_DEPENDENCIES
) $(EXTRA_lm32_libsim_a_DEPENDENCIES
) lm32
/$(am__dirstamp
)
3489 $(AM_V_at
)-rm -f lm32
/libsim.a
3490 $(AM_V_AR
)$(lm32_libsim_a_AR
) lm32
/libsim.a
$(lm32_libsim_a_OBJECTS
) $(lm32_libsim_a_LIBADD
)
3491 $(AM_V_at
)$(RANLIB
) lm32
/libsim.a
3492 m32c
/$(am__dirstamp
):
3494 @
: > m32c
/$(am__dirstamp
)
3495 m32c
/$(DEPDIR
)/$(am__dirstamp
):
3496 @
$(MKDIR_P
) m32c
/$(DEPDIR
)
3497 @
: > m32c
/$(DEPDIR
)/$(am__dirstamp
)
3498 m32c
/modules.
$(OBJEXT
): m32c
/$(am__dirstamp
) \
3499 m32c
/$(DEPDIR
)/$(am__dirstamp
)
3501 m32c
/libsim.a
: $(m32c_libsim_a_OBJECTS
) $(m32c_libsim_a_DEPENDENCIES
) $(EXTRA_m32c_libsim_a_DEPENDENCIES
) m32c
/$(am__dirstamp
)
3502 $(AM_V_at
)-rm -f m32c
/libsim.a
3503 $(AM_V_AR
)$(m32c_libsim_a_AR
) m32c
/libsim.a
$(m32c_libsim_a_OBJECTS
) $(m32c_libsim_a_LIBADD
)
3504 $(AM_V_at
)$(RANLIB
) m32c
/libsim.a
3505 m32r
/$(am__dirstamp
):
3507 @
: > m32r
/$(am__dirstamp
)
3508 m32r
/$(DEPDIR
)/$(am__dirstamp
):
3509 @
$(MKDIR_P
) m32r
/$(DEPDIR
)
3510 @
: > m32r
/$(DEPDIR
)/$(am__dirstamp
)
3511 m32r
/modules.
$(OBJEXT
): m32r
/$(am__dirstamp
) \
3512 m32r
/$(DEPDIR
)/$(am__dirstamp
)
3514 m32r
/libsim.a
: $(m32r_libsim_a_OBJECTS
) $(m32r_libsim_a_DEPENDENCIES
) $(EXTRA_m32r_libsim_a_DEPENDENCIES
) m32r
/$(am__dirstamp
)
3515 $(AM_V_at
)-rm -f m32r
/libsim.a
3516 $(AM_V_AR
)$(m32r_libsim_a_AR
) m32r
/libsim.a
$(m32r_libsim_a_OBJECTS
) $(m32r_libsim_a_LIBADD
)
3517 $(AM_V_at
)$(RANLIB
) m32r
/libsim.a
3518 m68hc11
/$(am__dirstamp
):
3520 @
: > m68hc11
/$(am__dirstamp
)
3521 m68hc11
/$(DEPDIR
)/$(am__dirstamp
):
3522 @
$(MKDIR_P
) m68hc11
/$(DEPDIR
)
3523 @
: > m68hc11
/$(DEPDIR
)/$(am__dirstamp
)
3524 m68hc11
/modules.
$(OBJEXT
): m68hc11
/$(am__dirstamp
) \
3525 m68hc11
/$(DEPDIR
)/$(am__dirstamp
)
3527 m68hc11
/libsim.a
: $(m68hc11_libsim_a_OBJECTS
) $(m68hc11_libsim_a_DEPENDENCIES
) $(EXTRA_m68hc11_libsim_a_DEPENDENCIES
) m68hc11
/$(am__dirstamp
)
3528 $(AM_V_at
)-rm -f m68hc11
/libsim.a
3529 $(AM_V_AR
)$(m68hc11_libsim_a_AR
) m68hc11
/libsim.a
$(m68hc11_libsim_a_OBJECTS
) $(m68hc11_libsim_a_LIBADD
)
3530 $(AM_V_at
)$(RANLIB
) m68hc11
/libsim.a
3531 mcore
/$(am__dirstamp
):
3533 @
: > mcore
/$(am__dirstamp
)
3534 mcore
/$(DEPDIR
)/$(am__dirstamp
):
3535 @
$(MKDIR_P
) mcore
/$(DEPDIR
)
3536 @
: > mcore
/$(DEPDIR
)/$(am__dirstamp
)
3537 mcore
/modules.
$(OBJEXT
): mcore
/$(am__dirstamp
) \
3538 mcore
/$(DEPDIR
)/$(am__dirstamp
)
3540 mcore
/libsim.a
: $(mcore_libsim_a_OBJECTS
) $(mcore_libsim_a_DEPENDENCIES
) $(EXTRA_mcore_libsim_a_DEPENDENCIES
) mcore
/$(am__dirstamp
)
3541 $(AM_V_at
)-rm -f mcore
/libsim.a
3542 $(AM_V_AR
)$(mcore_libsim_a_AR
) mcore
/libsim.a
$(mcore_libsim_a_OBJECTS
) $(mcore_libsim_a_LIBADD
)
3543 $(AM_V_at
)$(RANLIB
) mcore
/libsim.a
3544 microblaze
/$(am__dirstamp
):
3545 @
$(MKDIR_P
) microblaze
3546 @
: > microblaze
/$(am__dirstamp
)
3547 microblaze
/$(DEPDIR
)/$(am__dirstamp
):
3548 @
$(MKDIR_P
) microblaze
/$(DEPDIR
)
3549 @
: > microblaze
/$(DEPDIR
)/$(am__dirstamp
)
3550 microblaze
/modules.
$(OBJEXT
): microblaze
/$(am__dirstamp
) \
3551 microblaze
/$(DEPDIR
)/$(am__dirstamp
)
3553 microblaze
/libsim.a
: $(microblaze_libsim_a_OBJECTS
) $(microblaze_libsim_a_DEPENDENCIES
) $(EXTRA_microblaze_libsim_a_DEPENDENCIES
) microblaze
/$(am__dirstamp
)
3554 $(AM_V_at
)-rm -f microblaze
/libsim.a
3555 $(AM_V_AR
)$(microblaze_libsim_a_AR
) microblaze
/libsim.a
$(microblaze_libsim_a_OBJECTS
) $(microblaze_libsim_a_LIBADD
)
3556 $(AM_V_at
)$(RANLIB
) microblaze
/libsim.a
3557 mips
/$(am__dirstamp
):
3559 @
: > mips
/$(am__dirstamp
)
3560 mips
/$(DEPDIR
)/$(am__dirstamp
):
3561 @
$(MKDIR_P
) mips
/$(DEPDIR
)
3562 @
: > mips
/$(DEPDIR
)/$(am__dirstamp
)
3563 mips
/modules.
$(OBJEXT
): mips
/$(am__dirstamp
) \
3564 mips
/$(DEPDIR
)/$(am__dirstamp
)
3566 mips
/libsim.a
: $(mips_libsim_a_OBJECTS
) $(mips_libsim_a_DEPENDENCIES
) $(EXTRA_mips_libsim_a_DEPENDENCIES
) mips
/$(am__dirstamp
)
3567 $(AM_V_at
)-rm -f mips
/libsim.a
3568 $(AM_V_AR
)$(mips_libsim_a_AR
) mips
/libsim.a
$(mips_libsim_a_OBJECTS
) $(mips_libsim_a_LIBADD
)
3569 $(AM_V_at
)$(RANLIB
) mips
/libsim.a
3570 mn10300
/$(am__dirstamp
):
3572 @
: > mn10300
/$(am__dirstamp
)
3573 mn10300
/$(DEPDIR
)/$(am__dirstamp
):
3574 @
$(MKDIR_P
) mn10300
/$(DEPDIR
)
3575 @
: > mn10300
/$(DEPDIR
)/$(am__dirstamp
)
3576 mn10300
/modules.
$(OBJEXT
): mn10300
/$(am__dirstamp
) \
3577 mn10300
/$(DEPDIR
)/$(am__dirstamp
)
3579 mn10300
/libsim.a
: $(mn10300_libsim_a_OBJECTS
) $(mn10300_libsim_a_DEPENDENCIES
) $(EXTRA_mn10300_libsim_a_DEPENDENCIES
) mn10300
/$(am__dirstamp
)
3580 $(AM_V_at
)-rm -f mn10300
/libsim.a
3581 $(AM_V_AR
)$(mn10300_libsim_a_AR
) mn10300
/libsim.a
$(mn10300_libsim_a_OBJECTS
) $(mn10300_libsim_a_LIBADD
)
3582 $(AM_V_at
)$(RANLIB
) mn10300
/libsim.a
3583 moxie
/$(am__dirstamp
):
3585 @
: > moxie
/$(am__dirstamp
)
3586 moxie
/$(DEPDIR
)/$(am__dirstamp
):
3587 @
$(MKDIR_P
) moxie
/$(DEPDIR
)
3588 @
: > moxie
/$(DEPDIR
)/$(am__dirstamp
)
3589 moxie
/modules.
$(OBJEXT
): moxie
/$(am__dirstamp
) \
3590 moxie
/$(DEPDIR
)/$(am__dirstamp
)
3592 moxie
/libsim.a
: $(moxie_libsim_a_OBJECTS
) $(moxie_libsim_a_DEPENDENCIES
) $(EXTRA_moxie_libsim_a_DEPENDENCIES
) moxie
/$(am__dirstamp
)
3593 $(AM_V_at
)-rm -f moxie
/libsim.a
3594 $(AM_V_AR
)$(moxie_libsim_a_AR
) moxie
/libsim.a
$(moxie_libsim_a_OBJECTS
) $(moxie_libsim_a_LIBADD
)
3595 $(AM_V_at
)$(RANLIB
) moxie
/libsim.a
3596 msp430
/$(am__dirstamp
):
3598 @
: > msp430
/$(am__dirstamp
)
3599 msp430
/$(DEPDIR
)/$(am__dirstamp
):
3600 @
$(MKDIR_P
) msp430
/$(DEPDIR
)
3601 @
: > msp430
/$(DEPDIR
)/$(am__dirstamp
)
3602 msp430
/modules.
$(OBJEXT
): msp430
/$(am__dirstamp
) \
3603 msp430
/$(DEPDIR
)/$(am__dirstamp
)
3605 msp430
/libsim.a
: $(msp430_libsim_a_OBJECTS
) $(msp430_libsim_a_DEPENDENCIES
) $(EXTRA_msp430_libsim_a_DEPENDENCIES
) msp430
/$(am__dirstamp
)
3606 $(AM_V_at
)-rm -f msp430
/libsim.a
3607 $(AM_V_AR
)$(msp430_libsim_a_AR
) msp430
/libsim.a
$(msp430_libsim_a_OBJECTS
) $(msp430_libsim_a_LIBADD
)
3608 $(AM_V_at
)$(RANLIB
) msp430
/libsim.a
3609 or1k
/$(am__dirstamp
):
3611 @
: > or1k
/$(am__dirstamp
)
3612 or1k
/$(DEPDIR
)/$(am__dirstamp
):
3613 @
$(MKDIR_P
) or1k
/$(DEPDIR
)
3614 @
: > or1k
/$(DEPDIR
)/$(am__dirstamp
)
3615 or1k
/modules.
$(OBJEXT
): or1k
/$(am__dirstamp
) \
3616 or1k
/$(DEPDIR
)/$(am__dirstamp
)
3618 or1k
/libsim.a
: $(or1k_libsim_a_OBJECTS
) $(or1k_libsim_a_DEPENDENCIES
) $(EXTRA_or1k_libsim_a_DEPENDENCIES
) or1k
/$(am__dirstamp
)
3619 $(AM_V_at
)-rm -f or1k
/libsim.a
3620 $(AM_V_AR
)$(or1k_libsim_a_AR
) or1k
/libsim.a
$(or1k_libsim_a_OBJECTS
) $(or1k_libsim_a_LIBADD
)
3621 $(AM_V_at
)$(RANLIB
) or1k
/libsim.a
3622 ppc
/$(am__dirstamp
):
3624 @
: > ppc
/$(am__dirstamp
)
3625 ppc
/$(DEPDIR
)/$(am__dirstamp
):
3626 @
$(MKDIR_P
) ppc
/$(DEPDIR
)
3627 @
: > ppc
/$(DEPDIR
)/$(am__dirstamp
)
3628 ppc
/table.
$(OBJEXT
): ppc
/$(am__dirstamp
) ppc
/$(DEPDIR
)/$(am__dirstamp
)
3629 ppc
/lf.
$(OBJEXT
): ppc
/$(am__dirstamp
) ppc
/$(DEPDIR
)/$(am__dirstamp
)
3630 ppc
/misc.
$(OBJEXT
): ppc
/$(am__dirstamp
) ppc
/$(DEPDIR
)/$(am__dirstamp
)
3631 ppc
/ld-decode.
$(OBJEXT
): ppc
/$(am__dirstamp
) \
3632 ppc
/$(DEPDIR
)/$(am__dirstamp
)
3633 ppc
/ld-cache.
$(OBJEXT
): ppc
/$(am__dirstamp
) \
3634 ppc
/$(DEPDIR
)/$(am__dirstamp
)
3635 ppc
/filter.
$(OBJEXT
): ppc
/$(am__dirstamp
) \
3636 ppc
/$(DEPDIR
)/$(am__dirstamp
)
3637 ppc
/ld-insn.
$(OBJEXT
): ppc
/$(am__dirstamp
) \
3638 ppc
/$(DEPDIR
)/$(am__dirstamp
)
3639 ppc
/gen-model.
$(OBJEXT
): ppc
/$(am__dirstamp
) \
3640 ppc
/$(DEPDIR
)/$(am__dirstamp
)
3641 ppc
/gen-itable.
$(OBJEXT
): ppc
/$(am__dirstamp
) \
3642 ppc
/$(DEPDIR
)/$(am__dirstamp
)
3643 ppc
/gen-icache.
$(OBJEXT
): ppc
/$(am__dirstamp
) \
3644 ppc
/$(DEPDIR
)/$(am__dirstamp
)
3645 ppc
/gen-semantics.
$(OBJEXT
): ppc
/$(am__dirstamp
) \
3646 ppc
/$(DEPDIR
)/$(am__dirstamp
)
3647 ppc
/gen-idecode.
$(OBJEXT
): ppc
/$(am__dirstamp
) \
3648 ppc
/$(DEPDIR
)/$(am__dirstamp
)
3649 ppc
/gen-support.
$(OBJEXT
): ppc
/$(am__dirstamp
) \
3650 ppc
/$(DEPDIR
)/$(am__dirstamp
)
3652 @SIM_ENABLE_ARCH_ppc_FALSE@ppc
/libigen.a
: $(ppc_libigen_a_OBJECTS
) $(ppc_libigen_a_DEPENDENCIES
) $(EXTRA_ppc_libigen_a_DEPENDENCIES
) ppc
/$(am__dirstamp
)
3653 @SIM_ENABLE_ARCH_ppc_FALSE@
$(AM_V_at
)-rm -f ppc
/libigen.a
3654 @SIM_ENABLE_ARCH_ppc_FALSE@
$(AM_V_AR
)$(ppc_libigen_a_AR
) ppc
/libigen.a
$(ppc_libigen_a_OBJECTS
) $(ppc_libigen_a_LIBADD
)
3655 @SIM_ENABLE_ARCH_ppc_FALSE@
$(AM_V_at
)$(RANLIB
) ppc
/libigen.a
3656 pru
/$(am__dirstamp
):
3658 @
: > pru
/$(am__dirstamp
)
3659 pru
/$(DEPDIR
)/$(am__dirstamp
):
3660 @
$(MKDIR_P
) pru
/$(DEPDIR
)
3661 @
: > pru
/$(DEPDIR
)/$(am__dirstamp
)
3662 pru
/modules.
$(OBJEXT
): pru
/$(am__dirstamp
) \
3663 pru
/$(DEPDIR
)/$(am__dirstamp
)
3665 pru
/libsim.a
: $(pru_libsim_a_OBJECTS
) $(pru_libsim_a_DEPENDENCIES
) $(EXTRA_pru_libsim_a_DEPENDENCIES
) pru
/$(am__dirstamp
)
3666 $(AM_V_at
)-rm -f pru
/libsim.a
3667 $(AM_V_AR
)$(pru_libsim_a_AR
) pru
/libsim.a
$(pru_libsim_a_OBJECTS
) $(pru_libsim_a_LIBADD
)
3668 $(AM_V_at
)$(RANLIB
) pru
/libsim.a
3669 riscv
/$(am__dirstamp
):
3671 @
: > riscv
/$(am__dirstamp
)
3672 riscv
/$(DEPDIR
)/$(am__dirstamp
):
3673 @
$(MKDIR_P
) riscv
/$(DEPDIR
)
3674 @
: > riscv
/$(DEPDIR
)/$(am__dirstamp
)
3675 riscv
/modules.
$(OBJEXT
): riscv
/$(am__dirstamp
) \
3676 riscv
/$(DEPDIR
)/$(am__dirstamp
)
3678 riscv
/libsim.a
: $(riscv_libsim_a_OBJECTS
) $(riscv_libsim_a_DEPENDENCIES
) $(EXTRA_riscv_libsim_a_DEPENDENCIES
) riscv
/$(am__dirstamp
)
3679 $(AM_V_at
)-rm -f riscv
/libsim.a
3680 $(AM_V_AR
)$(riscv_libsim_a_AR
) riscv
/libsim.a
$(riscv_libsim_a_OBJECTS
) $(riscv_libsim_a_LIBADD
)
3681 $(AM_V_at
)$(RANLIB
) riscv
/libsim.a
3682 rl78
/$(am__dirstamp
):
3684 @
: > rl78
/$(am__dirstamp
)
3685 rl78
/$(DEPDIR
)/$(am__dirstamp
):
3686 @
$(MKDIR_P
) rl78
/$(DEPDIR
)
3687 @
: > rl78
/$(DEPDIR
)/$(am__dirstamp
)
3688 rl78
/modules.
$(OBJEXT
): rl78
/$(am__dirstamp
) \
3689 rl78
/$(DEPDIR
)/$(am__dirstamp
)
3691 rl78
/libsim.a
: $(rl78_libsim_a_OBJECTS
) $(rl78_libsim_a_DEPENDENCIES
) $(EXTRA_rl78_libsim_a_DEPENDENCIES
) rl78
/$(am__dirstamp
)
3692 $(AM_V_at
)-rm -f rl78
/libsim.a
3693 $(AM_V_AR
)$(rl78_libsim_a_AR
) rl78
/libsim.a
$(rl78_libsim_a_OBJECTS
) $(rl78_libsim_a_LIBADD
)
3694 $(AM_V_at
)$(RANLIB
) rl78
/libsim.a
3697 @
: > rx
/$(am__dirstamp
)
3698 rx
/$(DEPDIR
)/$(am__dirstamp
):
3699 @
$(MKDIR_P
) rx
/$(DEPDIR
)
3700 @
: > rx
/$(DEPDIR
)/$(am__dirstamp
)
3701 rx
/modules.
$(OBJEXT
): rx
/$(am__dirstamp
) rx
/$(DEPDIR
)/$(am__dirstamp
)
3703 rx
/libsim.a
: $(rx_libsim_a_OBJECTS
) $(rx_libsim_a_DEPENDENCIES
) $(EXTRA_rx_libsim_a_DEPENDENCIES
) rx
/$(am__dirstamp
)
3704 $(AM_V_at
)-rm -f rx
/libsim.a
3705 $(AM_V_AR
)$(rx_libsim_a_AR
) rx
/libsim.a
$(rx_libsim_a_OBJECTS
) $(rx_libsim_a_LIBADD
)
3706 $(AM_V_at
)$(RANLIB
) rx
/libsim.a
3709 @
: > sh
/$(am__dirstamp
)
3710 sh
/$(DEPDIR
)/$(am__dirstamp
):
3711 @
$(MKDIR_P
) sh
/$(DEPDIR
)
3712 @
: > sh
/$(DEPDIR
)/$(am__dirstamp
)
3713 sh
/modules.
$(OBJEXT
): sh
/$(am__dirstamp
) sh
/$(DEPDIR
)/$(am__dirstamp
)
3715 sh
/libsim.a
: $(sh_libsim_a_OBJECTS
) $(sh_libsim_a_DEPENDENCIES
) $(EXTRA_sh_libsim_a_DEPENDENCIES
) sh
/$(am__dirstamp
)
3716 $(AM_V_at
)-rm -f sh
/libsim.a
3717 $(AM_V_AR
)$(sh_libsim_a_AR
) sh
/libsim.a
$(sh_libsim_a_OBJECTS
) $(sh_libsim_a_LIBADD
)
3718 $(AM_V_at
)$(RANLIB
) sh
/libsim.a
3719 v850
/$(am__dirstamp
):
3721 @
: > v850
/$(am__dirstamp
)
3722 v850
/$(DEPDIR
)/$(am__dirstamp
):
3723 @
$(MKDIR_P
) v850
/$(DEPDIR
)
3724 @
: > v850
/$(DEPDIR
)/$(am__dirstamp
)
3725 v850
/modules.
$(OBJEXT
): v850
/$(am__dirstamp
) \
3726 v850
/$(DEPDIR
)/$(am__dirstamp
)
3728 v850
/libsim.a
: $(v850_libsim_a_OBJECTS
) $(v850_libsim_a_DEPENDENCIES
) $(EXTRA_v850_libsim_a_DEPENDENCIES
) v850
/$(am__dirstamp
)
3729 $(AM_V_at
)-rm -f v850
/libsim.a
3730 $(AM_V_AR
)$(v850_libsim_a_AR
) v850
/libsim.a
$(v850_libsim_a_OBJECTS
) $(v850_libsim_a_LIBADD
)
3731 $(AM_V_at
)$(RANLIB
) v850
/libsim.a
3733 clean-checkPROGRAMS
:
3734 @list
='$(check_PROGRAMS)'; test -n
"$$list" || exit
0; \
3735 echo
" rm -f" $$list; \
3736 rm -f
$$list || exit
$$?
; \
3737 test -n
"$(EXEEXT)" || exit
0; \
3738 list
=`for p in $$list; do echo "$$p"; done | sed 's/$(EXEEXT)$$//'`; \
3739 echo
" rm -f" $$list; \
3742 clean-noinstPROGRAMS
:
3743 @list
='$(noinst_PROGRAMS)'; test -n
"$$list" || exit
0; \
3744 echo
" rm -f" $$list; \
3745 rm -f
$$list || exit
$$?
; \
3746 test -n
"$(EXEEXT)" || exit
0; \
3747 list
=`for p in $$list; do echo "$$p"; done | sed 's/$(EXEEXT)$$//'`; \
3748 echo
" rm -f" $$list; \
3751 aarch64
/run
$(EXEEXT
): $(aarch64_run_OBJECTS
) $(aarch64_run_DEPENDENCIES
) $(EXTRA_aarch64_run_DEPENDENCIES
) aarch64
/$(am__dirstamp
)
3752 @
rm -f aarch64
/run
$(EXEEXT
)
3753 $(AM_V_CCLD
)$(LINK
) $(aarch64_run_OBJECTS
) $(aarch64_run_LDADD
) $(LIBS
)
3755 arm
/run
$(EXEEXT
): $(arm_run_OBJECTS
) $(arm_run_DEPENDENCIES
) $(EXTRA_arm_run_DEPENDENCIES
) arm
/$(am__dirstamp
)
3756 @
rm -f arm
/run
$(EXEEXT
)
3757 $(AM_V_CCLD
)$(LINK
) $(arm_run_OBJECTS
) $(arm_run_LDADD
) $(LIBS
)
3759 avr
/run
$(EXEEXT
): $(avr_run_OBJECTS
) $(avr_run_DEPENDENCIES
) $(EXTRA_avr_run_DEPENDENCIES
) avr
/$(am__dirstamp
)
3760 @
rm -f avr
/run
$(EXEEXT
)
3761 $(AM_V_CCLD
)$(LINK
) $(avr_run_OBJECTS
) $(avr_run_LDADD
) $(LIBS
)
3763 bfin
/run
$(EXEEXT
): $(bfin_run_OBJECTS
) $(bfin_run_DEPENDENCIES
) $(EXTRA_bfin_run_DEPENDENCIES
) bfin
/$(am__dirstamp
)
3764 @
rm -f bfin
/run
$(EXEEXT
)
3765 $(AM_V_CCLD
)$(LINK
) $(bfin_run_OBJECTS
) $(bfin_run_LDADD
) $(LIBS
)
3767 bpf
/run
$(EXEEXT
): $(bpf_run_OBJECTS
) $(bpf_run_DEPENDENCIES
) $(EXTRA_bpf_run_DEPENDENCIES
) bpf
/$(am__dirstamp
)
3768 @
rm -f bpf
/run
$(EXEEXT
)
3769 $(AM_V_CCLD
)$(LINK
) $(bpf_run_OBJECTS
) $(bpf_run_LDADD
) $(LIBS
)
3770 cr16
/gencode.
$(OBJEXT
): cr16
/$(am__dirstamp
) \
3771 cr16
/$(DEPDIR
)/$(am__dirstamp
)
3773 @SIM_ENABLE_ARCH_cr16_FALSE@cr16
/gencode
$(EXEEXT
): $(cr16_gencode_OBJECTS
) $(cr16_gencode_DEPENDENCIES
) $(EXTRA_cr16_gencode_DEPENDENCIES
) cr16
/$(am__dirstamp
)
3774 @SIM_ENABLE_ARCH_cr16_FALSE@ @
rm -f cr16
/gencode
$(EXEEXT
)
3775 @SIM_ENABLE_ARCH_cr16_FALSE@
$(AM_V_CCLD
)$(LINK
) $(cr16_gencode_OBJECTS
) $(cr16_gencode_LDADD
) $(LIBS
)
3777 cr16
/run
$(EXEEXT
): $(cr16_run_OBJECTS
) $(cr16_run_DEPENDENCIES
) $(EXTRA_cr16_run_DEPENDENCIES
) cr16
/$(am__dirstamp
)
3778 @
rm -f cr16
/run
$(EXEEXT
)
3779 $(AM_V_CCLD
)$(LINK
) $(cr16_run_OBJECTS
) $(cr16_run_LDADD
) $(LIBS
)
3781 cris
/run
$(EXEEXT
): $(cris_run_OBJECTS
) $(cris_run_DEPENDENCIES
) $(EXTRA_cris_run_DEPENDENCIES
) cris
/$(am__dirstamp
)
3782 @
rm -f cris
/run
$(EXEEXT
)
3783 $(AM_V_CCLD
)$(LINK
) $(cris_run_OBJECTS
) $(cris_run_LDADD
) $(LIBS
)
3784 cris
/rvdummy.
$(OBJEXT
): cris
/$(am__dirstamp
) \
3785 cris
/$(DEPDIR
)/$(am__dirstamp
)
3787 cris
/rvdummy
$(EXEEXT
): $(cris_rvdummy_OBJECTS
) $(cris_rvdummy_DEPENDENCIES
) $(EXTRA_cris_rvdummy_DEPENDENCIES
) cris
/$(am__dirstamp
)
3788 @
rm -f cris
/rvdummy
$(EXEEXT
)
3789 $(AM_V_CCLD
)$(LINK
) $(cris_rvdummy_OBJECTS
) $(cris_rvdummy_LDADD
) $(LIBS
)
3790 d10v
/gencode.
$(OBJEXT
): d10v
/$(am__dirstamp
) \
3791 d10v
/$(DEPDIR
)/$(am__dirstamp
)
3793 @SIM_ENABLE_ARCH_d10v_FALSE@d10v
/gencode
$(EXEEXT
): $(d10v_gencode_OBJECTS
) $(d10v_gencode_DEPENDENCIES
) $(EXTRA_d10v_gencode_DEPENDENCIES
) d10v
/$(am__dirstamp
)
3794 @SIM_ENABLE_ARCH_d10v_FALSE@ @
rm -f d10v
/gencode
$(EXEEXT
)
3795 @SIM_ENABLE_ARCH_d10v_FALSE@
$(AM_V_CCLD
)$(LINK
) $(d10v_gencode_OBJECTS
) $(d10v_gencode_LDADD
) $(LIBS
)
3797 d10v
/run
$(EXEEXT
): $(d10v_run_OBJECTS
) $(d10v_run_DEPENDENCIES
) $(EXTRA_d10v_run_DEPENDENCIES
) d10v
/$(am__dirstamp
)
3798 @
rm -f d10v
/run
$(EXEEXT
)
3799 $(AM_V_CCLD
)$(LINK
) $(d10v_run_OBJECTS
) $(d10v_run_LDADD
) $(LIBS
)
3801 erc32
/run
$(EXEEXT
): $(erc32_run_OBJECTS
) $(erc32_run_DEPENDENCIES
) $(EXTRA_erc32_run_DEPENDENCIES
) erc32
/$(am__dirstamp
)
3802 @
rm -f erc32
/run
$(EXEEXT
)
3803 $(AM_V_CCLD
)$(LINK
) $(erc32_run_OBJECTS
) $(erc32_run_LDADD
) $(LIBS
)
3804 erc32
/sis.
$(OBJEXT
): erc32
/$(am__dirstamp
) \
3805 erc32
/$(DEPDIR
)/$(am__dirstamp
)
3807 @SIM_ENABLE_ARCH_erc32_FALSE@erc32
/sis
$(EXEEXT
): $(erc32_sis_OBJECTS
) $(erc32_sis_DEPENDENCIES
) $(EXTRA_erc32_sis_DEPENDENCIES
) erc32
/$(am__dirstamp
)
3808 @SIM_ENABLE_ARCH_erc32_FALSE@ @
rm -f erc32
/sis
$(EXEEXT
)
3809 @SIM_ENABLE_ARCH_erc32_FALSE@
$(AM_V_CCLD
)$(LINK
) $(erc32_sis_OBJECTS
) $(erc32_sis_LDADD
) $(LIBS
)
3811 example-synacor
/run
$(EXEEXT
): $(example_synacor_run_OBJECTS
) $(example_synacor_run_DEPENDENCIES
) $(EXTRA_example_synacor_run_DEPENDENCIES
) example-synacor
/$(am__dirstamp
)
3812 @
rm -f example-synacor
/run
$(EXEEXT
)
3813 $(AM_V_CCLD
)$(LINK
) $(example_synacor_run_OBJECTS
) $(example_synacor_run_LDADD
) $(LIBS
)
3815 frv
/run
$(EXEEXT
): $(frv_run_OBJECTS
) $(frv_run_DEPENDENCIES
) $(EXTRA_frv_run_DEPENDENCIES
) frv
/$(am__dirstamp
)
3816 @
rm -f frv
/run
$(EXEEXT
)
3817 $(AM_V_CCLD
)$(LINK
) $(frv_run_OBJECTS
) $(frv_run_LDADD
) $(LIBS
)
3819 ft32
/run
$(EXEEXT
): $(ft32_run_OBJECTS
) $(ft32_run_DEPENDENCIES
) $(EXTRA_ft32_run_DEPENDENCIES
) ft32
/$(am__dirstamp
)
3820 @
rm -f ft32
/run
$(EXEEXT
)
3821 $(AM_V_CCLD
)$(LINK
) $(ft32_run_OBJECTS
) $(ft32_run_LDADD
) $(LIBS
)
3823 h8300
/run
$(EXEEXT
): $(h8300_run_OBJECTS
) $(h8300_run_DEPENDENCIES
) $(EXTRA_h8300_run_DEPENDENCIES
) h8300
/$(am__dirstamp
)
3824 @
rm -f h8300
/run
$(EXEEXT
)
3825 $(AM_V_CCLD
)$(LINK
) $(h8300_run_OBJECTS
) $(h8300_run_LDADD
) $(LIBS
)
3827 igen
/filter$(EXEEXT
): $(igen_filter_OBJECTS
) $(igen_filter_DEPENDENCIES
) $(EXTRA_igen_filter_DEPENDENCIES
) igen
/$(am__dirstamp
)
3828 @
rm -f igen
/filter$(EXEEXT
)
3829 $(AM_V_CCLD
)$(LINK
) $(igen_filter_OBJECTS
) $(igen_filter_LDADD
) $(LIBS
)
3831 igen
/gen
$(EXEEXT
): $(igen_gen_OBJECTS
) $(igen_gen_DEPENDENCIES
) $(EXTRA_igen_gen_DEPENDENCIES
) igen
/$(am__dirstamp
)
3832 @
rm -f igen
/gen
$(EXEEXT
)
3833 $(AM_V_CCLD
)$(LINK
) $(igen_gen_OBJECTS
) $(igen_gen_LDADD
) $(LIBS
)
3834 igen
/igen.
$(OBJEXT
): igen
/$(am__dirstamp
) \
3835 igen
/$(DEPDIR
)/$(am__dirstamp
)
3837 igen
/ld-cache
$(EXEEXT
): $(igen_ld_cache_OBJECTS
) $(igen_ld_cache_DEPENDENCIES
) $(EXTRA_igen_ld_cache_DEPENDENCIES
) igen
/$(am__dirstamp
)
3838 @
rm -f igen
/ld-cache
$(EXEEXT
)
3839 $(AM_V_CCLD
)$(LINK
) $(igen_ld_cache_OBJECTS
) $(igen_ld_cache_LDADD
) $(LIBS
)
3841 igen
/ld-decode
$(EXEEXT
): $(igen_ld_decode_OBJECTS
) $(igen_ld_decode_DEPENDENCIES
) $(EXTRA_igen_ld_decode_DEPENDENCIES
) igen
/$(am__dirstamp
)
3842 @
rm -f igen
/ld-decode
$(EXEEXT
)
3843 $(AM_V_CCLD
)$(LINK
) $(igen_ld_decode_OBJECTS
) $(igen_ld_decode_LDADD
) $(LIBS
)
3845 igen
/ld-insn
$(EXEEXT
): $(igen_ld_insn_OBJECTS
) $(igen_ld_insn_DEPENDENCIES
) $(EXTRA_igen_ld_insn_DEPENDENCIES
) igen
/$(am__dirstamp
)
3846 @
rm -f igen
/ld-insn
$(EXEEXT
)
3847 $(AM_V_CCLD
)$(LINK
) $(igen_ld_insn_OBJECTS
) $(igen_ld_insn_LDADD
) $(LIBS
)
3849 igen
/table
$(EXEEXT
): $(igen_table_OBJECTS
) $(igen_table_DEPENDENCIES
) $(EXTRA_igen_table_DEPENDENCIES
) igen
/$(am__dirstamp
)
3850 @
rm -f igen
/table
$(EXEEXT
)
3851 $(AM_V_CCLD
)$(LINK
) $(igen_table_OBJECTS
) $(igen_table_LDADD
) $(LIBS
)
3853 iq2000
/run
$(EXEEXT
): $(iq2000_run_OBJECTS
) $(iq2000_run_DEPENDENCIES
) $(EXTRA_iq2000_run_DEPENDENCIES
) iq2000
/$(am__dirstamp
)
3854 @
rm -f iq2000
/run
$(EXEEXT
)
3855 $(AM_V_CCLD
)$(LINK
) $(iq2000_run_OBJECTS
) $(iq2000_run_LDADD
) $(LIBS
)
3857 lm32
/run
$(EXEEXT
): $(lm32_run_OBJECTS
) $(lm32_run_DEPENDENCIES
) $(EXTRA_lm32_run_DEPENDENCIES
) lm32
/$(am__dirstamp
)
3858 @
rm -f lm32
/run
$(EXEEXT
)
3859 $(AM_V_CCLD
)$(LINK
) $(lm32_run_OBJECTS
) $(lm32_run_LDADD
) $(LIBS
)
3860 m32c
/opc2c.
$(OBJEXT
): m32c
/$(am__dirstamp
) \
3861 m32c
/$(DEPDIR
)/$(am__dirstamp
)
3863 @SIM_ENABLE_ARCH_m32c_FALSE@m32c
/opc2c
$(EXEEXT
): $(m32c_opc2c_OBJECTS
) $(m32c_opc2c_DEPENDENCIES
) $(EXTRA_m32c_opc2c_DEPENDENCIES
) m32c
/$(am__dirstamp
)
3864 @SIM_ENABLE_ARCH_m32c_FALSE@ @
rm -f m32c
/opc2c
$(EXEEXT
)
3865 @SIM_ENABLE_ARCH_m32c_FALSE@
$(AM_V_CCLD
)$(LINK
) $(m32c_opc2c_OBJECTS
) $(m32c_opc2c_LDADD
) $(LIBS
)
3867 m32c
/run
$(EXEEXT
): $(m32c_run_OBJECTS
) $(m32c_run_DEPENDENCIES
) $(EXTRA_m32c_run_DEPENDENCIES
) m32c
/$(am__dirstamp
)
3868 @
rm -f m32c
/run
$(EXEEXT
)
3869 $(AM_V_CCLD
)$(LINK
) $(m32c_run_OBJECTS
) $(m32c_run_LDADD
) $(LIBS
)
3871 m32r
/run
$(EXEEXT
): $(m32r_run_OBJECTS
) $(m32r_run_DEPENDENCIES
) $(EXTRA_m32r_run_DEPENDENCIES
) m32r
/$(am__dirstamp
)
3872 @
rm -f m32r
/run
$(EXEEXT
)
3873 $(AM_V_CCLD
)$(LINK
) $(m32r_run_OBJECTS
) $(m32r_run_LDADD
) $(LIBS
)
3874 m68hc11
/gencode.
$(OBJEXT
): m68hc11
/$(am__dirstamp
) \
3875 m68hc11
/$(DEPDIR
)/$(am__dirstamp
)
3877 @SIM_ENABLE_ARCH_m68hc11_FALSE@m68hc11
/gencode
$(EXEEXT
): $(m68hc11_gencode_OBJECTS
) $(m68hc11_gencode_DEPENDENCIES
) $(EXTRA_m68hc11_gencode_DEPENDENCIES
) m68hc11
/$(am__dirstamp
)
3878 @SIM_ENABLE_ARCH_m68hc11_FALSE@ @
rm -f m68hc11
/gencode
$(EXEEXT
)
3879 @SIM_ENABLE_ARCH_m68hc11_FALSE@
$(AM_V_CCLD
)$(LINK
) $(m68hc11_gencode_OBJECTS
) $(m68hc11_gencode_LDADD
) $(LIBS
)
3881 m68hc11
/run
$(EXEEXT
): $(m68hc11_run_OBJECTS
) $(m68hc11_run_DEPENDENCIES
) $(EXTRA_m68hc11_run_DEPENDENCIES
) m68hc11
/$(am__dirstamp
)
3882 @
rm -f m68hc11
/run
$(EXEEXT
)
3883 $(AM_V_CCLD
)$(LINK
) $(m68hc11_run_OBJECTS
) $(m68hc11_run_LDADD
) $(LIBS
)
3885 mcore
/run
$(EXEEXT
): $(mcore_run_OBJECTS
) $(mcore_run_DEPENDENCIES
) $(EXTRA_mcore_run_DEPENDENCIES
) mcore
/$(am__dirstamp
)
3886 @
rm -f mcore
/run
$(EXEEXT
)
3887 $(AM_V_CCLD
)$(LINK
) $(mcore_run_OBJECTS
) $(mcore_run_LDADD
) $(LIBS
)
3889 microblaze
/run
$(EXEEXT
): $(microblaze_run_OBJECTS
) $(microblaze_run_DEPENDENCIES
) $(EXTRA_microblaze_run_DEPENDENCIES
) microblaze
/$(am__dirstamp
)
3890 @
rm -f microblaze
/run
$(EXEEXT
)
3891 $(AM_V_CCLD
)$(LINK
) $(microblaze_run_OBJECTS
) $(microblaze_run_LDADD
) $(LIBS
)
3893 mips
/run
$(EXEEXT
): $(mips_run_OBJECTS
) $(mips_run_DEPENDENCIES
) $(EXTRA_mips_run_DEPENDENCIES
) mips
/$(am__dirstamp
)
3894 @
rm -f mips
/run
$(EXEEXT
)
3895 $(AM_V_CCLD
)$(LINK
) $(mips_run_OBJECTS
) $(mips_run_LDADD
) $(LIBS
)
3897 mn10300
/run
$(EXEEXT
): $(mn10300_run_OBJECTS
) $(mn10300_run_DEPENDENCIES
) $(EXTRA_mn10300_run_DEPENDENCIES
) mn10300
/$(am__dirstamp
)
3898 @
rm -f mn10300
/run
$(EXEEXT
)
3899 $(AM_V_CCLD
)$(LINK
) $(mn10300_run_OBJECTS
) $(mn10300_run_LDADD
) $(LIBS
)
3901 moxie
/run
$(EXEEXT
): $(moxie_run_OBJECTS
) $(moxie_run_DEPENDENCIES
) $(EXTRA_moxie_run_DEPENDENCIES
) moxie
/$(am__dirstamp
)
3902 @
rm -f moxie
/run
$(EXEEXT
)
3903 $(AM_V_CCLD
)$(LINK
) $(moxie_run_OBJECTS
) $(moxie_run_LDADD
) $(LIBS
)
3905 msp430
/run
$(EXEEXT
): $(msp430_run_OBJECTS
) $(msp430_run_DEPENDENCIES
) $(EXTRA_msp430_run_DEPENDENCIES
) msp430
/$(am__dirstamp
)
3906 @
rm -f msp430
/run
$(EXEEXT
)
3907 $(AM_V_CCLD
)$(LINK
) $(msp430_run_OBJECTS
) $(msp430_run_LDADD
) $(LIBS
)
3909 or1k
/run
$(EXEEXT
): $(or1k_run_OBJECTS
) $(or1k_run_DEPENDENCIES
) $(EXTRA_or1k_run_DEPENDENCIES
) or1k
/$(am__dirstamp
)
3910 @
rm -f or1k
/run
$(EXEEXT
)
3911 $(AM_V_CCLD
)$(LINK
) $(or1k_run_OBJECTS
) $(or1k_run_LDADD
) $(LIBS
)
3913 ppc
/filter$(EXEEXT
): $(ppc_filter_OBJECTS
) $(ppc_filter_DEPENDENCIES
) $(EXTRA_ppc_filter_DEPENDENCIES
) ppc
/$(am__dirstamp
)
3914 @
rm -f ppc
/filter$(EXEEXT
)
3915 $(AM_V_CCLD
)$(LINK
) $(ppc_filter_OBJECTS
) $(ppc_filter_LDADD
) $(LIBS
)
3916 ppc
/igen.
$(OBJEXT
): ppc
/$(am__dirstamp
) ppc
/$(DEPDIR
)/$(am__dirstamp
)
3918 @SIM_ENABLE_ARCH_ppc_FALSE@ppc
/igen
$(EXEEXT
): $(ppc_igen_OBJECTS
) $(ppc_igen_DEPENDENCIES
) $(EXTRA_ppc_igen_DEPENDENCIES
) ppc
/$(am__dirstamp
)
3919 @SIM_ENABLE_ARCH_ppc_FALSE@ @
rm -f ppc
/igen
$(EXEEXT
)
3920 @SIM_ENABLE_ARCH_ppc_FALSE@
$(AM_V_CCLD
)$(LINK
) $(ppc_igen_OBJECTS
) $(ppc_igen_LDADD
) $(LIBS
)
3922 ppc
/ld-cache
$(EXEEXT
): $(ppc_ld_cache_OBJECTS
) $(ppc_ld_cache_DEPENDENCIES
) $(EXTRA_ppc_ld_cache_DEPENDENCIES
) ppc
/$(am__dirstamp
)
3923 @
rm -f ppc
/ld-cache
$(EXEEXT
)
3924 $(AM_V_CCLD
)$(LINK
) $(ppc_ld_cache_OBJECTS
) $(ppc_ld_cache_LDADD
) $(LIBS
)
3926 ppc
/ld-decode
$(EXEEXT
): $(ppc_ld_decode_OBJECTS
) $(ppc_ld_decode_DEPENDENCIES
) $(EXTRA_ppc_ld_decode_DEPENDENCIES
) ppc
/$(am__dirstamp
)
3927 @
rm -f ppc
/ld-decode
$(EXEEXT
)
3928 $(AM_V_CCLD
)$(LINK
) $(ppc_ld_decode_OBJECTS
) $(ppc_ld_decode_LDADD
) $(LIBS
)
3930 ppc
/ld-insn
$(EXEEXT
): $(ppc_ld_insn_OBJECTS
) $(ppc_ld_insn_DEPENDENCIES
) $(EXTRA_ppc_ld_insn_DEPENDENCIES
) ppc
/$(am__dirstamp
)
3931 @
rm -f ppc
/ld-insn
$(EXEEXT
)
3932 $(AM_V_CCLD
)$(LINK
) $(ppc_ld_insn_OBJECTS
) $(ppc_ld_insn_LDADD
) $(LIBS
)
3934 ppc
/run
$(EXEEXT
): $(ppc_run_OBJECTS
) $(ppc_run_DEPENDENCIES
) $(EXTRA_ppc_run_DEPENDENCIES
) ppc
/$(am__dirstamp
)
3935 @
rm -f ppc
/run
$(EXEEXT
)
3936 $(AM_V_CCLD
)$(LINK
) $(ppc_run_OBJECTS
) $(ppc_run_LDADD
) $(LIBS
)
3938 pru
/run
$(EXEEXT
): $(pru_run_OBJECTS
) $(pru_run_DEPENDENCIES
) $(EXTRA_pru_run_DEPENDENCIES
) pru
/$(am__dirstamp
)
3939 @
rm -f pru
/run
$(EXEEXT
)
3940 $(AM_V_CCLD
)$(LINK
) $(pru_run_OBJECTS
) $(pru_run_LDADD
) $(LIBS
)
3942 riscv
/run
$(EXEEXT
): $(riscv_run_OBJECTS
) $(riscv_run_DEPENDENCIES
) $(EXTRA_riscv_run_DEPENDENCIES
) riscv
/$(am__dirstamp
)
3943 @
rm -f riscv
/run
$(EXEEXT
)
3944 $(AM_V_CCLD
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4664 $(am__common_driver_flags
) $(AM_LOG_DRIVER_FLAGS
) $(LOG_DRIVER_FLAGS
) -- $(LOG_COMPILE
) \
4665 "$$tst" $(AM_TESTS_FD_REDIRECT
)
4669 $(am__check_pre
) $(TEST_LOG_DRIVER
) --test-name
"$$f" \
4670 --log-file
$$b.log
--trs-file
$$b.trs \
4671 $(am__common_driver_flags
) $(AM_TEST_LOG_DRIVER_FLAGS
) $(TEST_LOG_DRIVER_FLAGS
) -- $(TEST_LOG_COMPILE
) \
4672 "$$tst" $(AM_TESTS_FD_REDIRECT
)
4673 @am__EXEEXT_TRUE@.
test$(EXEEXT
).log
:
4674 @am__EXEEXT_TRUE@ @p
='$<'; \
4675 @am__EXEEXT_TRUE@
$(am__set_b
); \
4676 @am__EXEEXT_TRUE@
$(am__check_pre
) $(TEST_LOG_DRIVER
) --test-name
"$$f" \
4677 @am__EXEEXT_TRUE@
--log-file
$$b.log
--trs-file
$$b.trs \
4678 @am__EXEEXT_TRUE@
$(am__common_driver_flags
) $(AM_TEST_LOG_DRIVER_FLAGS
) $(TEST_LOG_DRIVER_FLAGS
) -- $(TEST_LOG_COMPILE
) \
4679 @am__EXEEXT_TRUE@
"$$tst" $(AM_TESTS_FD_REDIRECT
)
4681 $(MAKE
) $(AM_MAKEFLAGS
) $(check_PROGRAMS
)
4682 $(MAKE
) $(AM_MAKEFLAGS
) check-DEJAGNU check-TESTS
4683 check: $(BUILT_SOURCES
)
4684 $(MAKE
) $(AM_MAKEFLAGS
) check-recursive
4685 all-am
: Makefile
$(LIBRARIES
) $(PROGRAMS
) $(DATA
) $(HEADERS
) config.h
4686 installdirs: installdirs-recursive
4688 for
dir in
"$(DESTDIR)$(armdocdir)" "$(DESTDIR)$(dtbdir)" "$(DESTDIR)$(erc32docdir)" "$(DESTDIR)$(frvdocdir)" "$(DESTDIR)$(or1kdocdir)" "$(DESTDIR)$(ppcdocdir)" "$(DESTDIR)$(rxdocdir)" "$(DESTDIR)$(pkgincludedir)"; do \
4689 test -z
"$$dir" ||
$(MKDIR_P
) "$$dir"; \
4691 install: $(BUILT_SOURCES
)
4692 $(MAKE
) $(AM_MAKEFLAGS
) install-recursive
4693 install-exec
: install-exec-recursive
4694 install-data
: install-data-recursive
4695 uninstall: uninstall-recursive
4698 @
$(MAKE
) $(AM_MAKEFLAGS
) install-exec-am install-data-am
4700 installcheck: installcheck-recursive
4702 if
test -z
'$(STRIP)'; then \
4703 $(MAKE
) $(AM_MAKEFLAGS
) INSTALL_PROGRAM
="$(INSTALL_STRIP_PROGRAM)" \
4704 install_sh_PROGRAM
="$(INSTALL_STRIP_PROGRAM)" INSTALL_STRIP_FLAG
=-s \
4707 $(MAKE
) $(AM_MAKEFLAGS
) INSTALL_PROGRAM
="$(INSTALL_STRIP_PROGRAM)" \
4708 install_sh_PROGRAM
="$(INSTALL_STRIP_PROGRAM)" INSTALL_STRIP_FLAG
=-s \
4709 "INSTALL_PROGRAM_ENV=STRIPPROG='$(STRIP)'" install; \
4711 mostlyclean-generic
:
4712 -test -z
"$(MOSTLYCLEANFILES)" ||
rm -f
$(MOSTLYCLEANFILES
)
4713 -test -z
"$(TEST_LOGS)" ||
rm -f
$(TEST_LOGS
)
4714 -test -z
"$(TEST_LOGS:.log=.trs)" ||
rm -f
$(TEST_LOGS
:.log
=.trs
)
4715 -test -z
"$(TEST_SUITE_LOG)" ||
rm -f
$(TEST_SUITE_LOG
)
4718 -test -z
"$(CLEANFILES)" ||
rm -f
$(CLEANFILES
)
4721 -test -z
"$(CONFIG_CLEAN_FILES)" ||
rm -f
$(CONFIG_CLEAN_FILES
)
4722 -test .
= "$(srcdir)" ||
test -z
"$(CONFIG_CLEAN_VPATH_FILES)" ||
rm -f
$(CONFIG_CLEAN_VPATH_FILES
)
4723 -rm -f aarch64
/$(DEPDIR
)/$(am__dirstamp
)
4724 -rm -f aarch64
/$(am__dirstamp
)
4725 -rm -f arm
/$(DEPDIR
)/$(am__dirstamp
)
4726 -rm -f arm
/$(am__dirstamp
)
4727 -rm -f avr
/$(DEPDIR
)/$(am__dirstamp
)
4728 -rm -f avr
/$(am__dirstamp
)
4729 -rm -f bfin
/$(DEPDIR
)/$(am__dirstamp
)
4730 -rm -f bfin
/$(am__dirstamp
)
4731 -rm -f bpf
/$(DEPDIR
)/$(am__dirstamp
)
4732 -rm -f bpf
/$(am__dirstamp
)
4733 -rm -f common
/$(DEPDIR
)/$(am__dirstamp
)
4734 -rm -f common
/$(am__dirstamp
)
4735 -rm -f cr16
/$(DEPDIR
)/$(am__dirstamp
)
4736 -rm -f cr16
/$(am__dirstamp
)
4737 -rm -f cris
/$(DEPDIR
)/$(am__dirstamp
)
4738 -rm -f cris
/$(am__dirstamp
)
4739 -rm -f d10v
/$(DEPDIR
)/$(am__dirstamp
)
4740 -rm -f d10v
/$(am__dirstamp
)
4741 -rm -f erc32
/$(DEPDIR
)/$(am__dirstamp
)
4742 -rm -f erc32
/$(am__dirstamp
)
4743 -rm -f example-synacor
/$(DEPDIR
)/$(am__dirstamp
)
4744 -rm -f example-synacor
/$(am__dirstamp
)
4745 -rm -f frv
/$(DEPDIR
)/$(am__dirstamp
)
4746 -rm -f frv
/$(am__dirstamp
)
4747 -rm -f ft32
/$(DEPDIR
)/$(am__dirstamp
)
4748 -rm -f ft32
/$(am__dirstamp
)
4749 -rm -f h8300
/$(DEPDIR
)/$(am__dirstamp
)
4750 -rm -f h8300
/$(am__dirstamp
)
4751 -rm -f igen
/$(DEPDIR
)/$(am__dirstamp
)
4752 -rm -f igen
/$(am__dirstamp
)
4753 -rm -f iq2000
/$(DEPDIR
)/$(am__dirstamp
)
4754 -rm -f iq2000
/$(am__dirstamp
)
4755 -rm -f lm32
/$(DEPDIR
)/$(am__dirstamp
)
4756 -rm -f lm32
/$(am__dirstamp
)
4757 -rm -f m32c
/$(DEPDIR
)/$(am__dirstamp
)
4758 -rm -f m32c
/$(am__dirstamp
)
4759 -rm -f m32r
/$(DEPDIR
)/$(am__dirstamp
)
4760 -rm -f m32r
/$(am__dirstamp
)
4761 -rm -f m68hc11
/$(DEPDIR
)/$(am__dirstamp
)
4762 -rm -f m68hc11
/$(am__dirstamp
)
4763 -rm -f mcore
/$(DEPDIR
)/$(am__dirstamp
)
4764 -rm -f mcore
/$(am__dirstamp
)
4765 -rm -f microblaze
/$(DEPDIR
)/$(am__dirstamp
)
4766 -rm -f microblaze
/$(am__dirstamp
)
4767 -rm -f mips
/$(DEPDIR
)/$(am__dirstamp
)
4768 -rm -f mips
/$(am__dirstamp
)
4769 -rm -f mn10300
/$(DEPDIR
)/$(am__dirstamp
)
4770 -rm -f mn10300
/$(am__dirstamp
)
4771 -rm -f moxie
/$(DEPDIR
)/$(am__dirstamp
)
4772 -rm -f moxie
/$(am__dirstamp
)
4773 -rm -f msp430
/$(DEPDIR
)/$(am__dirstamp
)
4774 -rm -f msp430
/$(am__dirstamp
)
4775 -rm -f or1k
/$(DEPDIR
)/$(am__dirstamp
)
4776 -rm -f or1k
/$(am__dirstamp
)
4777 -rm -f ppc
/$(DEPDIR
)/$(am__dirstamp
)
4778 -rm -f ppc
/$(am__dirstamp
)
4779 -rm -f pru
/$(DEPDIR
)/$(am__dirstamp
)
4780 -rm -f pru
/$(am__dirstamp
)
4781 -rm -f riscv
/$(DEPDIR
)/$(am__dirstamp
)
4782 -rm -f riscv
/$(am__dirstamp
)
4783 -rm -f rl78
/$(DEPDIR
)/$(am__dirstamp
)
4784 -rm -f rl78
/$(am__dirstamp
)
4785 -rm -f rx
/$(DEPDIR
)/$(am__dirstamp
)
4786 -rm -f rx
/$(am__dirstamp
)
4787 -rm -f sh
/$(DEPDIR
)/$(am__dirstamp
)
4788 -rm -f sh
/$(am__dirstamp
)
4789 -rm -f testsuite
/common
/$(DEPDIR
)/$(am__dirstamp
)
4790 -rm -f testsuite
/common
/$(am__dirstamp
)
4791 -rm -f v850
/$(DEPDIR
)/$(am__dirstamp
)
4792 -rm -f v850
/$(am__dirstamp
)
4793 -test -z
"$(DISTCLEANFILES)" ||
rm -f
$(DISTCLEANFILES
)
4795 maintainer-clean-generic
:
4796 @echo
"This command is intended for maintainers to use"
4797 @echo
"it deletes files that may require special tools to rebuild."
4798 -test -z
"$(BUILT_SOURCES)" ||
rm -f
$(BUILT_SOURCES
)
4799 clean: clean-recursive
4801 clean-am
: clean-checkPROGRAMS clean-generic clean-libtool \
4802 clean-noinstLIBRARIES clean-noinstPROGRAMS mostlyclean-am
4804 distclean: distclean-recursive
4805 -rm -f
$(am__CONFIG_DISTCLEAN_FILES
)
4806 -rm -rf aarch64
/$(DEPDIR
) arm
/$(DEPDIR
) avr
/$(DEPDIR
) bfin
/$(DEPDIR
) bpf
/$(DEPDIR
) common
/$(DEPDIR
) cr16
/$(DEPDIR
) cris
/$(DEPDIR
) d10v
/$(DEPDIR
) erc32
/$(DEPDIR
) example-synacor
/$(DEPDIR
) frv
/$(DEPDIR
) ft32
/$(DEPDIR
) h8300
/$(DEPDIR
) igen
/$(DEPDIR
) iq2000
/$(DEPDIR
) lm32
/$(DEPDIR
) m32c
/$(DEPDIR
) m32r
/$(DEPDIR
) m68hc11
/$(DEPDIR
) mcore
/$(DEPDIR
) microblaze
/$(DEPDIR
) mips
/$(DEPDIR
) mn10300
/$(DEPDIR
) moxie
/$(DEPDIR
) msp430
/$(DEPDIR
) or1k
/$(DEPDIR
) ppc
/$(DEPDIR
) pru
/$(DEPDIR
) riscv
/$(DEPDIR
) rl78
/$(DEPDIR
) rx
/$(DEPDIR
) sh
/$(DEPDIR
) testsuite
/common
/$(DEPDIR
) v850
/$(DEPDIR
)
4808 distclean-am
: clean-am distclean-DEJAGNU distclean-compile \
4809 distclean-generic distclean-hdr distclean-libtool \
4816 html
: html-recursive
4820 info: info-recursive
4824 install-data-am
: install-armdocDATA install-data-local install-dtbDATA \
4825 install-erc32docDATA install-frvdocDATA install-or1kdocDATA \
4826 install-pkgincludeHEADERS install-ppcdocDATA install-rxdocDATA
4828 install-dvi
: install-dvi-recursive
4832 install-exec-am
: install-exec-local
4834 install-html
: install-html-recursive
4838 install-info
: install-info-recursive
4844 install-pdf
: install-pdf-recursive
4848 install-ps
: install-ps-recursive
4854 maintainer-clean
: maintainer-clean-recursive
4855 -rm -f
$(am__CONFIG_DISTCLEAN_FILES
)
4856 -rm -rf
$(top_srcdir
)/autom4te.cache
4857 -rm -rf aarch64
/$(DEPDIR
) arm
/$(DEPDIR
) avr
/$(DEPDIR
) bfin
/$(DEPDIR
) bpf
/$(DEPDIR
) common
/$(DEPDIR
) cr16
/$(DEPDIR
) cris
/$(DEPDIR
) d10v
/$(DEPDIR
) erc32
/$(DEPDIR
) example-synacor
/$(DEPDIR
) frv
/$(DEPDIR
) ft32
/$(DEPDIR
) h8300
/$(DEPDIR
) igen
/$(DEPDIR
) iq2000
/$(DEPDIR
) lm32
/$(DEPDIR
) m32c
/$(DEPDIR
) m32r
/$(DEPDIR
) m68hc11
/$(DEPDIR
) mcore
/$(DEPDIR
) microblaze
/$(DEPDIR
) mips
/$(DEPDIR
) mn10300
/$(DEPDIR
) moxie
/$(DEPDIR
) msp430
/$(DEPDIR
) or1k
/$(DEPDIR
) ppc
/$(DEPDIR
) pru
/$(DEPDIR
) riscv
/$(DEPDIR
) rl78
/$(DEPDIR
) rx
/$(DEPDIR
) sh
/$(DEPDIR
) testsuite
/common
/$(DEPDIR
) v850
/$(DEPDIR
)
4859 maintainer-clean-am
: distclean-am maintainer-clean-generic
4861 mostlyclean: mostlyclean-recursive
4863 mostlyclean-am
: mostlyclean-compile mostlyclean-generic \
4874 uninstall-am
: uninstall-armdocDATA uninstall-dtbDATA \
4875 uninstall-erc32docDATA uninstall-frvdocDATA uninstall-local \
4876 uninstall-or1kdocDATA uninstall-pkgincludeHEADERS \
4877 uninstall-ppcdocDATA uninstall-rxdocDATA
4879 .MAKE
: $(am__recursive_targets
) all check check-am
install install-am \
4882 .PHONY
: $(am__recursive_targets
) CTAGS GTAGS TAGS
all all-am \
4883 am--refresh
check check-DEJAGNU check-TESTS check-am
clean \
4884 clean-checkPROGRAMS clean-cscope clean-generic clean-libtool \
4885 clean-noinstLIBRARIES clean-noinstPROGRAMS cscope \
4886 cscopelist-am ctags ctags-am
distclean distclean-DEJAGNU \
4887 distclean-compile distclean-generic distclean-hdr \
4888 distclean-libtool distclean-tags
dvi dvi-am html html-am
info \
4889 info-am
install install-am install-armdocDATA install-data \
4890 install-data-am install-data-local install-dtbDATA install-dvi \
4891 install-dvi-am install-erc32docDATA install-exec \
4892 install-exec-am install-exec-local install-frvdocDATA \
4893 install-html install-html-am install-info install-info-am \
4894 install-man install-or1kdocDATA install-pdf install-pdf-am \
4895 install-pkgincludeHEADERS install-ppcdocDATA install-ps \
4896 install-ps-am install-rxdocDATA install-strip
installcheck \
4897 installcheck-am
installdirs installdirs-am maintainer-clean \
4898 maintainer-clean-generic
mostlyclean mostlyclean-compile \
4899 mostlyclean-generic mostlyclean-libtool pdf pdf-am ps ps-am \
4900 recheck
tags tags-am
uninstall uninstall-am \
4901 uninstall-armdocDATA uninstall-dtbDATA uninstall-erc32docDATA \
4902 uninstall-frvdocDATA uninstall-local uninstall-or1kdocDATA \
4903 uninstall-pkgincludeHEADERS uninstall-ppcdocDATA \
4908 @am__include@ @am__quote@
$(GNULIB_PARENT_DIR
)/gnulib
/Makefile.gnulib.inc@am__quote@
4910 # Generate target constants for newlib/libgloss from its source tree.
4911 # This file is shipped with distributions so we build in the source dir.
4912 # Use `make nltvals' to rebuild.
4915 $(srccom
)/gennltvals.py
--cpp "$(CPP)"
4917 common
/version.c
: common
/version.c-stamp
; @true
4918 common
/version.c-stamp
: $(srcroot
)/gdb
/version.in
$(srcroot
)/bfd
/version.h
$(srcdir)/common
/create-version.sh
4919 $(AM_V_GEN
)$(SHELL
) $(srcdir)/common
/create-version.sh
$(srcroot
)/gdb
$@.tmp
4920 $(AM_V_at
)$(SHELL
) $(srcroot
)/move-if-change
$@.tmp
$(@
:-stamp
=)
4923 .PRECIOUS
: %/test-hw-events.o
4924 %/test-hw-events.o
: common
/hw-events.c
4925 $(AM_V_CC
)$(COMPILE
) -DMAIN
-c
-o
$@
$<
4926 %/test-hw-events
: %/test-hw-events.o
%/libsim.a
4927 $(AM_V_CCLD
)$(LINK
) -o
$@
$^
$(SIM_COMMON_LIBS
) $(LIBS
)
4929 # FIXME This is one very simple-minded way of generating the file hw-config.h.
4930 %/hw-config.h
: %/stamp-hw
; @true
4931 %/stamp-hw
: Makefile
4932 $(AM_V_GEN
)set
-e
; \
4934 sim_hw
="$(SIM_HW_DEVICES) $($(@D)_SIM_EXTRA_HW_DEVICES)" ; \
4935 echo
"/* generated by Makefile */" ; \
4936 printf
"extern const struct hw_descriptor dv_%s_descriptor[];\n" $$sim_hw ; \
4937 echo
"const struct hw_descriptor * const hw_descriptors[] = {" ; \
4938 printf
" dv_%s_descriptor,\n" $$sim_hw ; \
4942 $(SHELL
) $(srcroot
)/move-if-change
$@.tmp
$(@D
)/hw-config.h
; \
4944 .PRECIOUS
: %/stamp-hw
4945 %/modules.c
: %/stamp-modules
; @true
4946 %/stamp-modules
: Makefile
4947 $(AM_V_GEN
)set
-e
; \
4948 LANG
=C
; export LANG
; \
4949 LC_ALL
=C
; export LC_ALL
; \
4950 sed
-n
-e
'/^sim_install_/{s/^\(sim_install_[a-z_0-9A-Z]*\).*/\1/;p}' $(GEN_MODULES_C_SRCS
) |
sort >$@.l-tmp
; \
4952 echo
'/* Do not modify this file. */'; \
4953 echo
'/* It is created automatically by the Makefile. */'; \
4954 echo
'#include "libiberty.h"'; \
4955 echo
'#include "sim-module.h"'; \
4956 sed
-e
's:\(.*\):extern MODULE_INIT_FN \1;:' $@.l-tmp
; \
4957 echo
'MODULE_INSTALL_FN * const sim_modules_detected[] = {'; \
4958 sed
-e
's:\(.*\): \1,:' $@.l-tmp
; \
4960 echo
'const int sim_modules_detected_len = ARRAY_SIZE (sim_modules_detected);'; \
4962 $(SHELL
) $(srcroot
)/move-if-change
$@.tmp
$(@D
)/modules.c
; \
4965 .PRECIOUS
: %/stamp-modules
4967 # Alias for developers.
4970 # These rules are copied from automake, but tweaked to use FOR_BUILD variables.
4971 igen
/libigen.a
: $(igen_libigen_a_OBJECTS
) $(igen_libigen_a_DEPENDENCIES
) $(EXTRA_igen_libigen_a_DEPENDENCIES
) igen
/$(am__dirstamp
)
4973 $(AM_V_AR
)$(AR_FOR_BUILD
) $(ARFLAGS
) $@
$(igen_libigen_a_OBJECTS
) $(igen_libigen_a_LIBADD
)
4974 $(AM_V_at
)$(RANLIB_FOR_BUILD
) $@
4976 igen
/igen
$(EXEEXT
): $(igen_igen_OBJECTS
) $(igen_igen_DEPENDENCIES
) igen
/$(am__dirstamp
)
4977 $(AM_V_CCLD
)$(LINK_FOR_BUILD
) $(igen_igen_OBJECTS
) $(igen_igen_LDADD
)
4979 # igen is a build-time only tool. Override the default rules for it.
4981 $(AM_V_CC
)$(COMPILE_FOR_BUILD
) -c
$< -o
$@
4983 # Build some of the files in standalone mode for developers of igen itself.
4984 igen
/%-main.o
: igen
/%.c
4985 $(AM_V_CC
)$(COMPILE_FOR_BUILD
) -DMAIN
-c
$< -o
$@
4987 site-sim-config.exp
: Makefile
4989 echo
"set SIM_PRIMARY_TARGET \"$(SIM_PRIMARY_TARGET)\""; \
4990 echo
"set builddir \"$(builddir)\""; \
4991 echo
"set srcdir \"$(srcdir)/testsuite\""; \
4992 $(foreach V
,$(SIM_TOOLCHAIN_VARS
),echo
"set $(V) \"$($(V))\"";) \
4995 # Ignore dirs that only contain configuration settings.
4996 check/.
/config
/%.exp
: ; @true
4997 check/config
/%.exp
: ; @true
4998 check/.
/lib
/%.exp
: ; @true
4999 check/lib
/%.exp
: ; @true
5002 $(AM_V_at
)mkdir
-p testsuite
/$*
5003 $(AM_V_RUNTEST
)$(DO_RUNTEST
) --objdir testsuite
/$* --outdir testsuite
/$* $*.exp
5005 check-DEJAGNU-parallel
:
5007 set
-- `cd $(srcdir)/testsuite && find . -name '*.exp' -printf '%P\n' | sed 's:[.]exp$$::'`; \
5008 $(MAKE
) -k
`printf 'check/%s.exp ' $$@`; \
5010 set
-- `printf 'testsuite/%s/ ' $$@`; \
5011 $(SHELL
) $(srcroot
)/contrib
/dg-extract-results.sh \
5012 `find $$@ -maxdepth 1 -name testrun.sum 2>/dev/null | sort` > testrun.sum
; \
5013 $(SHELL
) $(srcroot
)/contrib
/dg-extract-results.sh
-L \
5014 `find $$@ -maxdepth 1 -name testrun.log 2>/dev/null | sort` > testrun.log
; \
5016 $(SED
) -n
'/^.*===.*Summary.*===/,$$p' testrun.sum
; \
5019 check-DEJAGNU-single
:
5020 $(AM_V_RUNTEST
)$(DO_RUNTEST
)
5022 # If running a single job, invoking runtest once is faster & has nicer output.
5023 check-DEJAGNU
: site.exp
5024 $(AM_V_at
)(set
-e
; \
5025 EXPECT
=${EXPECT} ; export EXPECT
; \
5026 runtest
=$(RUNTEST
); \
5027 if
$(SHELL
) -c
"$$runtest --version" > /dev
/null
2>&1; then \
5028 case
"$(MAKEFLAGS)" in \
5029 *-j
*) $(MAKE
) check-DEJAGNU-parallel
;; \
5030 *) $(MAKE
) check-DEJAGNU-single
;; \
5033 echo
"WARNING: could not find \`runtest'" 1>&2; :;\
5036 # These tests are build-time only tools. Override the default rules for them.
5037 testsuite
/common
/%.o
: testsuite
/common
/%.c
5038 $(AM_V_CC
)$(COMPILE_FOR_BUILD
) $(testsuite_common_CPPFLAGS
) -c
$< -o
$@
5040 testsuite
/common
/alu-tst
$(EXEEXT
): $(testsuite_common_alu_tst_OBJECTS
) $(testsuite_common_alu_tst_DEPENDENCIES
) testsuite
/common
/$(am__dirstamp
)
5041 $(AM_V_CCLD
)$(LINK_FOR_BUILD
) $(testsuite_common_alu_tst_OBJECTS
) $(testsuite_common_alu_tst_LDADD
)
5043 testsuite
/common
/fpu-tst
$(EXEEXT
): $(testsuite_common_fpu_tst_OBJECTS
) $(testsuite_common_fpu_tst_DEPENDENCIES
) testsuite
/common
/$(am__dirstamp
)
5044 $(AM_V_CCLD
)$(LINK_FOR_BUILD
) $(testsuite_common_fpu_tst_OBJECTS
) $(testsuite_common_fpu_tst_LDADD
)
5046 testsuite
/common
/bits-gen
$(EXEEXT
): $(testsuite_common_bits_gen_OBJECTS
) $(testsuite_common_bits_gen_DEPENDENCIES
) testsuite
/common
/$(am__dirstamp
)
5047 $(AM_V_CCLD
)$(LINK_FOR_BUILD
) $(testsuite_common_bits_gen_OBJECTS
) $(testsuite_common_bits_gen_LDADD
)
5049 testsuite
/common
/bits32m0
$(EXEEXT
): $(testsuite_common_bits32m0_OBJECTS
) $(testsuite_common_bits32m0_DEPENDENCIES
) testsuite
/common
/$(am__dirstamp
)
5050 $(AM_V_CCLD
)$(LINK_FOR_BUILD
) $(testsuite_common_bits32m0_OBJECTS
) $(testsuite_common_bits32m0_LDADD
)
5052 testsuite
/common
/bits32m0.c
: testsuite
/common
/bits-gen
$(EXEEXT
) testsuite
/common
/bits-tst.c
5053 $(AM_V_GEN
)$< 32 0 big
> $@.tmp
5054 $(AM_V_at
)cat
$(srcdir)/testsuite
/common
/bits-tst.c
>> $@.tmp
5055 $(AM_V_at
)mv
$@.tmp
$@
5057 testsuite
/common
/bits32m31
$(EXEEXT
): $(testsuite_common_bits32m31_OBJECTS
) $(testsuite_common_bits32m31_DEPENDENCIES
) testsuite
/common
/$(am__dirstamp
)
5058 $(AM_V_CCLD
)$(LINK_FOR_BUILD
) $(testsuite_common_bits32m31_OBJECTS
) $(testsuite_common_bits32m31_LDADD
)
5060 testsuite
/common
/bits32m31.c
: testsuite
/common
/bits-gen
$(EXEEXT
) testsuite
/common
/bits-tst.c
5061 $(AM_V_GEN
)$< 32 31 little
> $@.tmp
5062 $(AM_V_at
)cat
$(srcdir)/testsuite
/common
/bits-tst.c
>> $@.tmp
5063 $(AM_V_at
)mv
$@.tmp
$@
5065 testsuite
/common
/bits64m0
$(EXEEXT
): $(testsuite_common_bits64m0_OBJECTS
) $(testsuite_common_bits64m0_DEPENDENCIES
) testsuite
/common
/$(am__dirstamp
)
5066 $(AM_V_CCLD
)$(LINK_FOR_BUILD
) $(testsuite_common_bits64m0_OBJECTS
) $(testsuite_common_bits64m0_LDADD
)
5068 testsuite
/common
/bits64m0.c
: testsuite
/common
/bits-gen
$(EXEEXT
) testsuite
/common
/bits-tst.c
5069 $(AM_V_GEN
)$< 64 0 big
> $@.tmp
5070 $(AM_V_at
)cat
$(srcdir)/testsuite
/common
/bits-tst.c
>> $@.tmp
5071 $(AM_V_at
)mv
$@.tmp
$@
5073 testsuite
/common
/bits64m63
$(EXEEXT
): $(testsuite_common_bits64m63_OBJECTS
) $(testsuite_common_bits64m63_DEPENDENCIES
) testsuite
/common
/$(am__dirstamp
)
5074 $(AM_V_CCLD
)$(LINK_FOR_BUILD
) $(testsuite_common_bits64m63_OBJECTS
) $(testsuite_common_bits64m63_LDADD
)
5076 testsuite
/common
/bits64m63.c
: testsuite
/common
/bits-gen
$(EXEEXT
) testsuite
/common
/bits-tst.c
5077 $(AM_V_GEN
)$< 64 63 little
> $@.tmp
5078 $(AM_V_at
)cat
$(srcdir)/testsuite
/common
/bits-tst.c
>> $@.tmp
5079 $(AM_V_at
)mv
$@.tmp
$@
5080 @SIM_ENABLE_ARCH_aarch64_TRUE@
$(aarch64_libsim_a_OBJECTS
) $(aarch64_libsim_a_LIBADD
): aarch64
/hw-config.h
5082 @SIM_ENABLE_ARCH_aarch64_TRUE@aarch64
/modules.o
: aarch64
/modules.c
5084 @SIM_ENABLE_ARCH_aarch64_TRUE@aarch64
/%.o
: common
/%.c
; $(SIM_COMPILE
)
5085 @SIM_ENABLE_ARCH_aarch64_TRUE@
-@am__include@ aarch64
/$(DEPDIR
)/*.Po
5086 @SIM_ENABLE_ARCH_arm_TRUE@
$(arm_libsim_a_OBJECTS
) $(arm_libsim_a_LIBADD
): arm
/hw-config.h
5088 @SIM_ENABLE_ARCH_arm_TRUE@arm
/modules.o
: arm
/modules.c
5090 @SIM_ENABLE_ARCH_arm_TRUE@arm
/%.o
: common
/%.c
; $(SIM_COMPILE
)
5091 @SIM_ENABLE_ARCH_arm_TRUE@
-@am__include@ arm
/$(DEPDIR
)/*.Po
5092 @SIM_ENABLE_ARCH_avr_TRUE@
$(avr_libsim_a_OBJECTS
) $(avr_libsim_a_LIBADD
): avr
/hw-config.h
5094 @SIM_ENABLE_ARCH_avr_TRUE@avr
/modules.o
: avr
/modules.c
5096 @SIM_ENABLE_ARCH_avr_TRUE@avr
/%.o
: common
/%.c
; $(SIM_COMPILE
)
5097 @SIM_ENABLE_ARCH_avr_TRUE@
-@am__include@ avr
/$(DEPDIR
)/*.Po
5098 @SIM_ENABLE_ARCH_bfin_TRUE@
$(bfin_libsim_a_OBJECTS
) $(bfin_libsim_a_LIBADD
): bfin
/hw-config.h
5100 @SIM_ENABLE_ARCH_bfin_TRUE@bfin
/modules.o
: bfin
/modules.c
5102 @SIM_ENABLE_ARCH_bfin_TRUE@bfin
/%.o
: common
/%.c
; $(SIM_COMPILE
)
5103 @SIM_ENABLE_ARCH_bfin_TRUE@
-@am__include@ bfin
/$(DEPDIR
)/*.Po
5105 @SIM_ENABLE_ARCH_bfin_TRUE@bfin
/linux-fixed-code.h
: @MAINT@
$(srcdir)/bfin
/linux-fixed-code.s bfin
/local.mk bfin
/$(am__dirstamp
)
5106 @SIM_ENABLE_ARCH_bfin_TRUE@
$(AM_V_GEN
)$(AS_FOR_TARGET_BFIN
) $(srcdir)/bfin
/linux-fixed-code.s
-o bfin
/linux-fixed-code.o
5107 @SIM_ENABLE_ARCH_bfin_TRUE@
$(AM_V_at
)(\
5108 @SIM_ENABLE_ARCH_bfin_TRUE@ set
-e
; \
5109 @SIM_ENABLE_ARCH_bfin_TRUE@ echo
"/* DO NOT EDIT: Autogenerated from linux-fixed-code.s. */"; \
5110 @SIM_ENABLE_ARCH_bfin_TRUE@ echo
"static const unsigned char bfin_linux_fixed_code[] ="; \
5111 @SIM_ENABLE_ARCH_bfin_TRUE@ echo
"{"; \
5112 @SIM_ENABLE_ARCH_bfin_TRUE@
$(OBJDUMP_FOR_TARGET_BFIN
) -d
-z bfin
/linux-fixed-code.o
> $@.dis
; \
5113 @SIM_ENABLE_ARCH_bfin_TRUE@ sed
-n \
5114 @SIM_ENABLE_ARCH_bfin_TRUE@
-e
's:^[^ ]* :0x:' \
5115 @SIM_ENABLE_ARCH_bfin_TRUE@
-e
'/^0x/{s: .*::;s: *$$:,:;s: :, 0x:g;p;}' \
5116 @SIM_ENABLE_ARCH_bfin_TRUE@
$@.dis
; \
5117 @SIM_ENABLE_ARCH_bfin_TRUE@
rm -f
$@.dis
; \
5118 @SIM_ENABLE_ARCH_bfin_TRUE@ echo
"};" \
5119 @SIM_ENABLE_ARCH_bfin_TRUE@
) > $@.tmp
5120 @SIM_ENABLE_ARCH_bfin_TRUE@
$(AM_V_at
)$(SHELL
) $(srcroot
)/move-if-change
$@.tmp
$(srcdir)/bfin
/linux-fixed-code.h
5121 @SIM_ENABLE_ARCH_bfin_TRUE@
$(AM_V_at
)touch
$(srcdir)/bfin
/linux-fixed-code.h
5122 @SIM_ENABLE_ARCH_bpf_TRUE@
$(bpf_libsim_a_OBJECTS
) $(bpf_libsim_a_LIBADD
): bpf
/hw-config.h
5124 @SIM_ENABLE_ARCH_bpf_TRUE@bpf
/modules.o
: bpf
/modules.c
5126 @SIM_ENABLE_ARCH_bpf_TRUE@bpf
/%.o
: common
/%.c
; $(SIM_COMPILE
)
5127 @SIM_ENABLE_ARCH_bpf_TRUE@
-@am__include@ bpf
/$(DEPDIR
)/*.Po
5128 @SIM_ENABLE_ARCH_cr16_TRUE@
$(cr16_libsim_a_OBJECTS
) $(cr16_libsim_a_LIBADD
): cr16
/hw-config.h
5130 @SIM_ENABLE_ARCH_cr16_TRUE@cr16
/modules.o
: cr16
/modules.c
5132 @SIM_ENABLE_ARCH_cr16_TRUE@cr16
/%.o
: common
/%.c
; $(SIM_COMPILE
)
5133 @SIM_ENABLE_ARCH_cr16_TRUE@
-@am__include@ cr16
/$(DEPDIR
)/*.Po
5135 @SIM_ENABLE_ARCH_cr16_TRUE@cr16
/modules.c
: |
$(cr16_BUILD_OUTPUTS
)
5137 # These rules are copied from automake, but tweaked to use FOR_BUILD variables.
5138 @SIM_ENABLE_ARCH_cr16_TRUE@cr16
/gencode
$(EXEEXT
): $(cr16_gencode_OBJECTS
) $(cr16_gencode_DEPENDENCIES
) cr16
/$(am__dirstamp
)
5139 @SIM_ENABLE_ARCH_cr16_TRUE@
$(AM_V_CCLD
)$(LINK_FOR_BUILD
) $(cr16_gencode_OBJECTS
) $(cr16_gencode_LDADD
)
5141 # gencode is a build-time only tool. Override the default rules for it.
5142 @SIM_ENABLE_ARCH_cr16_TRUE@cr16
/gencode.o
: cr16
/gencode.c
5143 @SIM_ENABLE_ARCH_cr16_TRUE@
$(AM_V_CC
)$(COMPILE_FOR_BUILD
) -c
$< -o
$@
5144 @SIM_ENABLE_ARCH_cr16_TRUE@cr16
/cr16-opc.o
: ..
/opcodes
/cr16-opc.c
5145 @SIM_ENABLE_ARCH_cr16_TRUE@
$(AM_V_CC
)$(COMPILE_FOR_BUILD
) -c
$< -o
$@
5147 @SIM_ENABLE_ARCH_cr16_TRUE@cr16
/simops.h
: cr16
/gencode
$(EXEEXT
)
5148 @SIM_ENABLE_ARCH_cr16_TRUE@
$(AM_V_GEN
)$< -h
>$@
5150 @SIM_ENABLE_ARCH_cr16_TRUE@cr16
/table.c
: cr16
/gencode
$(EXEEXT
)
5151 @SIM_ENABLE_ARCH_cr16_TRUE@
$(AM_V_GEN
)$< >$@
5152 @SIM_ENABLE_ARCH_cris_TRUE@
$(cris_libsim_a_OBJECTS
) $(cris_libsim_a_LIBADD
): cris
/hw-config.h
5154 @SIM_ENABLE_ARCH_cris_TRUE@cris
/modules.o
: cris
/modules.c
5156 @SIM_ENABLE_ARCH_cris_TRUE@cris
/%.o
: common
/%.c
; $(SIM_COMPILE
)
5157 @SIM_ENABLE_ARCH_cris_TRUE@
-@am__include@ cris
/$(DEPDIR
)/*.Po
5159 @SIM_ENABLE_ARCH_cris_TRUE@cris
/modules.c
: |
$(cris_BUILD_OUTPUTS
)
5161 @SIM_ENABLE_ARCH_cris_TRUE@cris
/mloopv10f.c cris
/engv10.h
: cris
/stamp-mloop-v10f
; @true
5162 @SIM_ENABLE_ARCH_cris_TRUE@cris
/stamp-mloop-v10f
: cris
/mloop.in
$(srccom
)/genmloop.sh
5163 @SIM_ENABLE_ARCH_cris_TRUE@
$(AM_V_GEN
)$(CGEN_GEN_MLOOP
) \
5164 @SIM_ENABLE_ARCH_cris_TRUE@
-mono
-no-fast
-pbb
-switch semcrisv10f-switch.c \
5165 @SIM_ENABLE_ARCH_cris_TRUE@
-cpu crisv10f
-outfile-suffix
-v10f
5166 @SIM_ENABLE_ARCH_cris_TRUE@
$(AM_V_at
)$(SHELL
) $(srcroot
)/move-if-change cris
/eng-v10f.hin cris
/engv10.h
5167 @SIM_ENABLE_ARCH_cris_TRUE@
$(AM_V_at
)$(SHELL
) $(srcroot
)/move-if-change cris
/mloop-v10f.cin cris
/mloopv10f.c
5168 @SIM_ENABLE_ARCH_cris_TRUE@
$(AM_V_at
)touch
$@
5170 @SIM_ENABLE_ARCH_cris_TRUE@cris
/mloopv32f.c cris
/engv32.h
: cris
/stamp-mloop-v32f
; @true
5171 @SIM_ENABLE_ARCH_cris_TRUE@cris
/stamp-mloop-v32f
: cris
/mloop.in
$(srccom
)/genmloop.sh
5172 @SIM_ENABLE_ARCH_cris_TRUE@
$(AM_V_GEN
)$(CGEN_GEN_MLOOP
) \
5173 @SIM_ENABLE_ARCH_cris_TRUE@
-mono
-no-fast
-pbb
-switch semcrisv32f-switch.c \
5174 @SIM_ENABLE_ARCH_cris_TRUE@
-cpu crisv32f
-outfile-suffix
-v32f
5175 @SIM_ENABLE_ARCH_cris_TRUE@
$(AM_V_at
)$(SHELL
) $(srcroot
)/move-if-change cris
/eng-v32f.hin cris
/engv32.h
5176 @SIM_ENABLE_ARCH_cris_TRUE@
$(AM_V_at
)$(SHELL
) $(srcroot
)/move-if-change cris
/mloop-v32f.cin cris
/mloopv32f.c
5177 @SIM_ENABLE_ARCH_cris_TRUE@
$(AM_V_at
)touch
$@
5179 @SIM_ENABLE_ARCH_cris_TRUE@cris
/cgen
: cris
/cgen-arch cris
/cgen-cpu-decode-v10f cris
/cgen-cpu-decode-v32f
5181 @SIM_ENABLE_ARCH_cris_TRUE@cris
/cgen-arch
:
5182 @SIM_ENABLE_ARCH_cris_TRUE@
$(AM_V_GEN
)mach
=crisv10
,crisv32 FLAGS
="with-scache with-profile=fn"; $(CGEN_GEN_ARCH
)
5183 @SIM_ENABLE_ARCH_cris_TRUE@
$(srcdir)/cris
/arch.h
$(srcdir)/cris
/arch.c
$(srcdir)/cris
/cpuall.h
: @CGEN_MAINT@ cris
/cgen-arch
5185 @SIM_ENABLE_ARCH_cris_TRUE@cris
/cgen-cpu-decode-v10f
:
5186 @SIM_ENABLE_ARCH_cris_TRUE@
$(AM_V_GEN
)cpu
=crisv10f mach
=crisv10 SUFFIX
=v10 FLAGS
="with-scache with-profile=fn" EXTRAFILES
="$(CGEN_CPU_SEMSW)"; $(CGEN_GEN_CPU_DECODE
)
5187 @SIM_ENABLE_ARCH_cris_TRUE@
$(AM_V_at
)$(SHELL
) $(srcroot
)/move-if-change
$(srcdir)/cris
/semv10-switch.c
$(srcdir)/cris
/semcrisv10f-switch.c
5188 @SIM_ENABLE_ARCH_cris_TRUE@
$(srcdir)/cris
/cpuv10.h
$(srcdir)/cris
/cpuv10.c
$(srcdir)/cris
/semcrisv10f-switch.c
$(srcdir)/cris
/modelv10.c
$(srcdir)/cris
/decodev10.c
$(srcdir)/cris
/decodev10.h
: @CGEN_MAINT@ cris
/cgen-cpu-decode-v10f
5190 @SIM_ENABLE_ARCH_cris_TRUE@cris
/cgen-cpu-decode-v32f
:
5191 @SIM_ENABLE_ARCH_cris_TRUE@
$(AM_V_GEN
)cpu
=crisv32f mach
=crisv32 SUFFIX
=v32 FLAGS
="with-scache with-profile=fn" EXTRAFILES
="$(CGEN_CPU_SEMSW)"; $(CGEN_GEN_CPU_DECODE
)
5192 @SIM_ENABLE_ARCH_cris_TRUE@
$(AM_V_at
)$(SHELL
) $(srcroot
)/move-if-change
$(srcdir)/cris
/semv32-switch.c
$(srcdir)/cris
/semcrisv32f-switch.c
5193 @SIM_ENABLE_ARCH_cris_TRUE@
$(srcdir)/cris
/cpuv32.h
$(srcdir)/cris
/cpuv32.c
$(srcdir)/cris
/semcrisv32f-switch.c
$(srcdir)/cris
/modelv32.c
$(srcdir)/cris
/decodev32.c
$(srcdir)/cris
/decodev32.h
: @CGEN_MAINT@ cris
/cgen-cpu-decode-v32f
5194 @SIM_ENABLE_ARCH_d10v_TRUE@
$(d10v_libsim_a_OBJECTS
) $(d10v_libsim_a_LIBADD
): d10v
/hw-config.h
5196 @SIM_ENABLE_ARCH_d10v_TRUE@d10v
/modules.o
: d10v
/modules.c
5198 @SIM_ENABLE_ARCH_d10v_TRUE@d10v
/%.o
: common
/%.c
; $(SIM_COMPILE
)
5199 @SIM_ENABLE_ARCH_d10v_TRUE@
-@am__include@ d10v
/$(DEPDIR
)/*.Po
5201 @SIM_ENABLE_ARCH_d10v_TRUE@d10v
/modules.c
: |
$(d10v_BUILD_OUTPUTS
)
5203 # These rules are copied from automake, but tweaked to use FOR_BUILD variables.
5204 @SIM_ENABLE_ARCH_d10v_TRUE@d10v
/gencode
$(EXEEXT
): $(d10v_gencode_OBJECTS
) $(d10v_gencode_DEPENDENCIES
) d10v
/$(am__dirstamp
)
5205 @SIM_ENABLE_ARCH_d10v_TRUE@
$(AM_V_CCLD
)$(LINK_FOR_BUILD
) $(d10v_gencode_OBJECTS
) $(d10v_gencode_LDADD
)
5207 # gencode is a build-time only tool. Override the default rules for it.
5208 @SIM_ENABLE_ARCH_d10v_TRUE@d10v
/gencode.o
: d10v
/gencode.c
5209 @SIM_ENABLE_ARCH_d10v_TRUE@
$(AM_V_CC
)$(COMPILE_FOR_BUILD
) -c
$< -o
$@
5210 @SIM_ENABLE_ARCH_d10v_TRUE@d10v
/d10v-opc.o
: ..
/opcodes
/d10v-opc.c
5211 @SIM_ENABLE_ARCH_d10v_TRUE@
$(AM_V_CC
)$(COMPILE_FOR_BUILD
) -c
$< -o
$@
5213 @SIM_ENABLE_ARCH_d10v_TRUE@d10v
/simops.h
: d10v
/gencode
$(EXEEXT
)
5214 @SIM_ENABLE_ARCH_d10v_TRUE@
$(AM_V_GEN
)$< -h
>$@
5216 @SIM_ENABLE_ARCH_d10v_TRUE@d10v
/table.c
: d10v
/gencode
$(EXEEXT
)
5217 @SIM_ENABLE_ARCH_d10v_TRUE@
$(AM_V_GEN
)$< >$@
5218 @SIM_ENABLE_ARCH_erc32_TRUE@
$(erc32_libsim_a_OBJECTS
) $(erc32_libsim_a_LIBADD
): erc32
/hw-config.h
5220 @SIM_ENABLE_ARCH_erc32_TRUE@erc32
/modules.o
: erc32
/modules.c
5222 @SIM_ENABLE_ARCH_erc32_TRUE@erc32
/%.o
: common
/%.c
; $(SIM_COMPILE
)
5223 @SIM_ENABLE_ARCH_erc32_TRUE@
-@am__include@ erc32
/$(DEPDIR
)/*.Po
5225 @SIM_ENABLE_ARCH_erc32_TRUE@erc32
/sis
$(EXEEXT
): erc32
/run
$(EXEEXT
)
5226 @SIM_ENABLE_ARCH_erc32_TRUE@
$(AM_V_GEN
)ln
$< $@
2>/dev
/null ||
$(LN_S
) $< $@
2>/dev
/null || cp
-p
$< $@
5227 @SIM_ENABLE_ARCH_erc32_TRUE@sim-
%D-install-exec-local
: installdirs
5228 @SIM_ENABLE_ARCH_erc32_TRUE@
$(AM_V_at
)$(MKDIR_P
) $(DESTDIR
)$(bindir)
5229 @SIM_ENABLE_ARCH_erc32_TRUE@ n
=`echo sis | sed '$(program_transform_name)'`; \
5230 @SIM_ENABLE_ARCH_erc32_TRUE@
$(LIBTOOL
) --mode
=install $(INSTALL_PROGRAM
) erc32
/run
$(EXEEXT
) $(DESTDIR
)$(bindir)/$$n$(EXEEXT
)
5231 @SIM_ENABLE_ARCH_erc32_TRUE@sim-erc32-uninstall-local
:
5232 @SIM_ENABLE_ARCH_erc32_TRUE@
rm -f
$(DESTDIR
)$(bindir)/sis
5233 @SIM_ENABLE_ARCH_examples_TRUE@
$(example_synacor_libsim_a_OBJECTS
) $(example_synacor_libsim_a_LIBADD
): example-synacor
/hw-config.h
5235 @SIM_ENABLE_ARCH_examples_TRUE@example-synacor
/modules.o
: example-synacor
/modules.c
5237 @SIM_ENABLE_ARCH_examples_TRUE@example-synacor
/%.o
: common
/%.c
; $(SIM_COMPILE
)
5238 @SIM_ENABLE_ARCH_examples_TRUE@
-@am__include@ example-synacor
/$(DEPDIR
)/*.Po
5239 @SIM_ENABLE_ARCH_frv_TRUE@
$(frv_libsim_a_OBJECTS
) $(frv_libsim_a_LIBADD
): frv
/hw-config.h
5241 @SIM_ENABLE_ARCH_frv_TRUE@frv
/modules.o
: frv
/modules.c
5243 @SIM_ENABLE_ARCH_frv_TRUE@frv
/%.o
: common
/%.c
; $(SIM_COMPILE
)
5244 @SIM_ENABLE_ARCH_frv_TRUE@
-@am__include@ frv
/$(DEPDIR
)/*.Po
5246 @SIM_ENABLE_ARCH_frv_TRUE@frv
/modules.c
: |
$(frv_BUILD_OUTPUTS
)
5248 @SIM_ENABLE_ARCH_frv_TRUE@frv
/mloop.c frv
/eng.h
: frv
/stamp-mloop
; @true
5249 @SIM_ENABLE_ARCH_frv_TRUE@frv
/stamp-mloop
: frv
/mloop.in
$(srccom
)/genmloop.sh
5250 @SIM_ENABLE_ARCH_frv_TRUE@
$(AM_V_GEN
)$(CGEN_GEN_MLOOP
) \
5251 @SIM_ENABLE_ARCH_frv_TRUE@
-mono
-scache
-parallel-generic-write
-parallel-only \
5252 @SIM_ENABLE_ARCH_frv_TRUE@
-cpu frvbf
5253 @SIM_ENABLE_ARCH_frv_TRUE@
$(AM_V_at
)$(SHELL
) $(srcroot
)/move-if-change frv
/eng.hin frv
/eng.h
5254 @SIM_ENABLE_ARCH_frv_TRUE@
$(AM_V_at
)$(SHELL
) $(srcroot
)/move-if-change frv
/mloop.cin frv
/mloop.c
5255 @SIM_ENABLE_ARCH_frv_TRUE@
$(AM_V_at
)touch
$@
5257 @SIM_ENABLE_ARCH_frv_TRUE@frv
/cgen
: frv
/cgen-arch frv
/cgen-cpu-decode
5259 @SIM_ENABLE_ARCH_frv_TRUE@frv
/cgen-arch
:
5260 @SIM_ENABLE_ARCH_frv_TRUE@
$(AM_V_GEN
)mach
=all FLAGS
="with-scache"; $(CGEN_GEN_ARCH
)
5261 @SIM_ENABLE_ARCH_frv_TRUE@
$(srcdir)/frv
/arch.h
$(srcdir)/frv
/arch.c
$(srcdir)/frv
/cpuall.h
: @CGEN_MAINT@ frv
/cgen-arch
5263 @SIM_ENABLE_ARCH_frv_TRUE@frv
/cgen-cpu-decode
:
5264 @SIM_ENABLE_ARCH_frv_TRUE@
$(AM_V_GEN
)cpu
=frvbf mach
=frv
,fr550
,fr500
,fr450
,fr400
,tomcat
,simple FLAGS
="with-scache with-profile=fn with-generic-write with-parallel-only" EXTRAFILES
="$(CGEN_CPU_SEM)"; $(CGEN_GEN_CPU_DECODE
)
5265 @SIM_ENABLE_ARCH_frv_TRUE@
$(srcdir)/frv
/cpu.h
$(srcdir)/frv
/sem.c
$(srcdir)/frv
/model.c
$(srcdir)/frv
/decode.c
$(srcdir)/frv
/decode.h
: @CGEN_MAINT@ frv
/cgen-cpu-decode
5266 @SIM_ENABLE_ARCH_ft32_TRUE@
$(ft32_libsim_a_OBJECTS
) $(ft32_libsim_a_LIBADD
): ft32
/hw-config.h
5268 @SIM_ENABLE_ARCH_ft32_TRUE@ft32
/modules.o
: ft32
/modules.c
5270 @SIM_ENABLE_ARCH_ft32_TRUE@ft32
/%.o
: common
/%.c
; $(SIM_COMPILE
)
5271 @SIM_ENABLE_ARCH_ft32_TRUE@
-@am__include@ ft32
/$(DEPDIR
)/*.Po
5272 @SIM_ENABLE_ARCH_h8300_TRUE@
$(h8300_libsim_a_OBJECTS
) $(h8300_libsim_a_LIBADD
): h8300
/hw-config.h
5274 @SIM_ENABLE_ARCH_h8300_TRUE@h8300
/modules.o
: h8300
/modules.c
5276 @SIM_ENABLE_ARCH_h8300_TRUE@h8300
/%.o
: common
/%.c
; $(SIM_COMPILE
)
5277 @SIM_ENABLE_ARCH_h8300_TRUE@
-@am__include@ h8300
/$(DEPDIR
)/*.Po
5278 @SIM_ENABLE_ARCH_iq2000_TRUE@
$(iq2000_libsim_a_OBJECTS
) $(iq2000_libsim_a_LIBADD
): iq2000
/hw-config.h
5280 @SIM_ENABLE_ARCH_iq2000_TRUE@iq2000
/modules.o
: iq2000
/modules.c
5282 @SIM_ENABLE_ARCH_iq2000_TRUE@iq2000
/%.o
: common
/%.c
; $(SIM_COMPILE
)
5283 @SIM_ENABLE_ARCH_iq2000_TRUE@
-@am__include@ iq2000
/$(DEPDIR
)/*.Po
5285 @SIM_ENABLE_ARCH_iq2000_TRUE@iq2000
/modules.c
: |
$(iq2000_BUILD_OUTPUTS
)
5287 @SIM_ENABLE_ARCH_iq2000_TRUE@iq2000
/mloop.c iq2000
/eng.h
: iq2000
/stamp-mloop
; @true
5288 @SIM_ENABLE_ARCH_iq2000_TRUE@iq2000
/stamp-mloop
: iq2000
/mloop.in
$(srccom
)/genmloop.sh
5289 @SIM_ENABLE_ARCH_iq2000_TRUE@
$(AM_V_GEN
)$(CGEN_GEN_MLOOP
) \
5290 @SIM_ENABLE_ARCH_iq2000_TRUE@
-mono
-fast
-pbb
-switch sem-switch.c \
5291 @SIM_ENABLE_ARCH_iq2000_TRUE@
-cpu iq2000bf
5292 @SIM_ENABLE_ARCH_iq2000_TRUE@
$(AM_V_at
)$(SHELL
) $(srcroot
)/move-if-change iq2000
/eng.hin iq2000
/eng.h
5293 @SIM_ENABLE_ARCH_iq2000_TRUE@
$(AM_V_at
)$(SHELL
) $(srcroot
)/move-if-change iq2000
/mloop.cin iq2000
/mloop.c
5294 @SIM_ENABLE_ARCH_iq2000_TRUE@
$(AM_V_at
)touch
$@
5296 @SIM_ENABLE_ARCH_iq2000_TRUE@iq2000
/cgen
: iq2000
/cgen-arch iq2000
/cgen-cpu-decode
5298 @SIM_ENABLE_ARCH_iq2000_TRUE@iq2000
/cgen-arch
:
5299 @SIM_ENABLE_ARCH_iq2000_TRUE@
$(AM_V_GEN
)mach
=iq2000 FLAGS
="with-scache with-profile=fn"; $(CGEN_GEN_ARCH
)
5300 @SIM_ENABLE_ARCH_iq2000_TRUE@
$(srcdir)/iq2000
/arch.h
$(srcdir)/iq2000
/arch.c
$(srcdir)/iq2000
/cpuall.h
: @CGEN_MAINT@ iq2000
/cgen-arch
5302 @SIM_ENABLE_ARCH_iq2000_TRUE@iq2000
/cgen-cpu-decode
:
5303 @SIM_ENABLE_ARCH_iq2000_TRUE@
$(AM_V_GEN
)cpu
=iq2000bf mach
=iq2000 FLAGS
="with-scache with-profile=fn" EXTRAFILES
="$(CGEN_CPU_SEM) $(CGEN_CPU_SEMSW)"; $(CGEN_GEN_CPU_DECODE
)
5304 @SIM_ENABLE_ARCH_iq2000_TRUE@
$(srcdir)/iq2000
/cpu.h
$(srcdir)/iq2000
/sem.c
$(srcdir)/iq2000
/sem-switch.c
$(srcdir)/iq2000
/model.c
$(srcdir)/iq2000
/decode.c
$(srcdir)/iq2000
/decode.h
: @CGEN_MAINT@ iq2000
/cgen-cpu-decode
5305 @SIM_ENABLE_ARCH_lm32_TRUE@
$(lm32_libsim_a_OBJECTS
) $(lm32_libsim_a_LIBADD
): lm32
/hw-config.h
5307 @SIM_ENABLE_ARCH_lm32_TRUE@lm32
/modules.o
: lm32
/modules.c
5309 @SIM_ENABLE_ARCH_lm32_TRUE@lm32
/%.o
: common
/%.c
; $(SIM_COMPILE
)
5310 @SIM_ENABLE_ARCH_lm32_TRUE@
-@am__include@ lm32
/$(DEPDIR
)/*.Po
5312 @SIM_ENABLE_ARCH_lm32_TRUE@lm32
/modules.c
: |
$(lm32_BUILD_OUTPUTS
)
5314 @SIM_ENABLE_ARCH_lm32_TRUE@lm32
/mloop.c lm32
/eng.h
: lm32
/stamp-mloop
; @true
5315 @SIM_ENABLE_ARCH_lm32_TRUE@lm32
/stamp-mloop
: lm32
/mloop.in
$(srccom
)/genmloop.sh
5316 @SIM_ENABLE_ARCH_lm32_TRUE@
$(AM_V_GEN
)$(CGEN_GEN_MLOOP
) \
5317 @SIM_ENABLE_ARCH_lm32_TRUE@
-mono
-fast
-pbb
-switch sem-switch.c \
5318 @SIM_ENABLE_ARCH_lm32_TRUE@
-cpu lm32bf
5319 @SIM_ENABLE_ARCH_lm32_TRUE@
$(AM_V_at
)$(SHELL
) $(srcroot
)/move-if-change lm32
/eng.hin lm32
/eng.h
5320 @SIM_ENABLE_ARCH_lm32_TRUE@
$(AM_V_at
)$(SHELL
) $(srcroot
)/move-if-change lm32
/mloop.cin lm32
/mloop.c
5321 @SIM_ENABLE_ARCH_lm32_TRUE@
$(AM_V_at
)touch
$@
5323 @SIM_ENABLE_ARCH_lm32_TRUE@lm32
/cgen
: lm32
/cgen-arch lm32
/cgen-cpu-decode
5325 @SIM_ENABLE_ARCH_lm32_TRUE@lm32
/cgen-arch
:
5326 @SIM_ENABLE_ARCH_lm32_TRUE@
$(AM_V_GEN
)mach
=all FLAGS
="with-scache with-profile=fn"; $(CGEN_GEN_ARCH
)
5327 @SIM_ENABLE_ARCH_lm32_TRUE@
$(srcdir)/lm32
/arch.h
$(srcdir)/lm32
/arch.c
$(srcdir)/lm32
/cpuall.h
: @CGEN_MAINT@ lm32
/cgen-arch
5329 @SIM_ENABLE_ARCH_lm32_TRUE@lm32
/cgen-cpu-decode
:
5330 @SIM_ENABLE_ARCH_lm32_TRUE@
$(AM_V_GEN
)cpu
=lm32bf mach
=lm32 FLAGS
="with-scache with-profile=fn" EXTRAFILES
="$(CGEN_CPU_SEM) $(CGEN_CPU_SEMSW)"; $(CGEN_GEN_CPU_DECODE
)
5331 @SIM_ENABLE_ARCH_lm32_TRUE@
$(srcdir)/lm32
/cpu.h
$(srcdir)/lm32
/sem.c
$(srcdir)/lm32
/sem-switch.c
$(srcdir)/lm32
/model.c
$(srcdir)/lm32
/decode.c
$(srcdir)/lm32
/decode.h
: @CGEN_MAINT@ lm32
/cgen-cpu-decode
5332 @SIM_ENABLE_ARCH_m32c_TRUE@
$(m32c_libsim_a_OBJECTS
) $(m32c_libsim_a_LIBADD
): m32c
/hw-config.h
5334 @SIM_ENABLE_ARCH_m32c_TRUE@m32c
/modules.o
: m32c
/modules.c
5336 @SIM_ENABLE_ARCH_m32c_TRUE@m32c
/%.o
: common
/%.c
; $(SIM_COMPILE
)
5337 @SIM_ENABLE_ARCH_m32c_TRUE@
-@am__include@ m32c
/$(DEPDIR
)/*.Po
5339 @SIM_ENABLE_ARCH_m32c_TRUE@m32c
/modules.c
: |
$(m32c_BUILD_OUTPUTS
)
5341 # These rules are copied from automake, but tweaked to use FOR_BUILD variables.
5342 @SIM_ENABLE_ARCH_m32c_TRUE@m32c
/opc2c
$(EXEEXT
): $(m32c_opc2c_OBJECTS
) $(m32c_opc2c_DEPENDENCIES
) m32c
/$(am__dirstamp
)
5343 @SIM_ENABLE_ARCH_m32c_TRUE@
$(AM_V_CCLD
)$(LINK_FOR_BUILD
) $(m32c_opc2c_OBJECTS
) $(m32c_opc2c_LDADD
)
5345 # opc2c is a build-time only tool. Override the default rules for it.
5346 @SIM_ENABLE_ARCH_m32c_TRUE@m32c
/opc2c.o
: m32c
/opc2c.c
5347 @SIM_ENABLE_ARCH_m32c_TRUE@
$(AM_V_CC
)$(COMPILE_FOR_BUILD
) -c
$< -o
$@
5349 @SIM_ENABLE_ARCH_m32c_TRUE@m32c
/m32c.c
: m32c
/m32c.opc m32c
/opc2c
$(EXEEXT
)
5350 @SIM_ENABLE_ARCH_m32c_TRUE@
$(AM_V_GEN
)$(m32c_OPC2C_RUN
) -l
$@.log
$< > $@.tmp
5351 @SIM_ENABLE_ARCH_m32c_TRUE@
$(AM_V_at
)mv
$@.tmp
$@
5353 @SIM_ENABLE_ARCH_m32c_TRUE@m32c
/r8c.c
: m32c
/r8c.opc m32c
/opc2c
$(EXEEXT
)
5354 @SIM_ENABLE_ARCH_m32c_TRUE@
$(AM_V_GEN
)$(m32c_OPC2C_RUN
) -l
$@.log
$< > $@.tmp
5355 @SIM_ENABLE_ARCH_m32c_TRUE@
$(AM_V_at
)mv
$@.tmp
$@
5356 @SIM_ENABLE_ARCH_m32r_TRUE@
$(m32r_libsim_a_OBJECTS
) $(m32r_libsim_a_LIBADD
): m32r
/hw-config.h
5358 @SIM_ENABLE_ARCH_m32r_TRUE@m32r
/modules.o
: m32r
/modules.c
5360 @SIM_ENABLE_ARCH_m32r_TRUE@m32r
/%.o
: common
/%.c
; $(SIM_COMPILE
)
5361 @SIM_ENABLE_ARCH_m32r_TRUE@
-@am__include@ m32r
/$(DEPDIR
)/*.Po
5363 @SIM_ENABLE_ARCH_m32r_TRUE@m32r
/modules.c
: |
$(m32r_BUILD_OUTPUTS
)
5365 @SIM_ENABLE_ARCH_m32r_TRUE@m32r
/mloop.c m32r
/eng.h
: m32r
/stamp-mloop
; @true
5366 @SIM_ENABLE_ARCH_m32r_TRUE@m32r
/stamp-mloop
: m32r
/mloop.in
$(srccom
)/genmloop.sh
5367 @SIM_ENABLE_ARCH_m32r_TRUE@
$(AM_V_GEN
)$(CGEN_GEN_MLOOP
) \
5368 @SIM_ENABLE_ARCH_m32r_TRUE@
-mono
-fast
-pbb
-switch sem-switch.c \
5369 @SIM_ENABLE_ARCH_m32r_TRUE@
-cpu m32rbf
5370 @SIM_ENABLE_ARCH_m32r_TRUE@
$(AM_V_at
)$(SHELL
) $(srcroot
)/move-if-change m32r
/eng.hin m32r
/eng.h
5371 @SIM_ENABLE_ARCH_m32r_TRUE@
$(AM_V_at
)$(SHELL
) $(srcroot
)/move-if-change m32r
/mloop.cin m32r
/mloop.c
5372 @SIM_ENABLE_ARCH_m32r_TRUE@
$(AM_V_at
)touch
$@
5374 @SIM_ENABLE_ARCH_m32r_TRUE@m32r
/mloopx.c m32r
/engx.h
: m32r
/stamp-mloop-x
; @true
5375 @SIM_ENABLE_ARCH_m32r_TRUE@m32r
/stamp-mloop-x
: m32r
/mloopx.in
$(srccom
)/genmloop.sh
5376 @SIM_ENABLE_ARCH_m32r_TRUE@
$(AM_V_GEN
)$(CGEN_GEN_MLOOP
) \
5377 @SIM_ENABLE_ARCH_m32r_TRUE@
-mono
-no-fast
-pbb
-parallel-write
-switch semx-switch.c \
5378 @SIM_ENABLE_ARCH_m32r_TRUE@
-cpu m32rxf
-outfile-suffix x
5379 @SIM_ENABLE_ARCH_m32r_TRUE@
$(AM_V_at
)$(SHELL
) $(srcroot
)/move-if-change m32r
/engx.hin m32r
/engx.h
5380 @SIM_ENABLE_ARCH_m32r_TRUE@
$(AM_V_at
)$(SHELL
) $(srcroot
)/move-if-change m32r
/mloopx.cin m32r
/mloopx.c
5381 @SIM_ENABLE_ARCH_m32r_TRUE@
$(AM_V_at
)touch
$@
5383 @SIM_ENABLE_ARCH_m32r_TRUE@m32r
/mloop2.c m32r
/eng2.h
: m32r
/stamp-mloop-2
; @true
5384 @SIM_ENABLE_ARCH_m32r_TRUE@m32r
/stamp-mloop-2
: m32r
/mloop2.in
$(srccom
)/genmloop.sh
5385 @SIM_ENABLE_ARCH_m32r_TRUE@
$(AM_V_GEN
)$(CGEN_GEN_MLOOP
) \
5386 @SIM_ENABLE_ARCH_m32r_TRUE@
-mono
-no-fast
-pbb
-parallel-write
-switch sem2-switch.c \
5387 @SIM_ENABLE_ARCH_m32r_TRUE@
-cpu m32r2f
-outfile-suffix
2
5388 @SIM_ENABLE_ARCH_m32r_TRUE@
$(AM_V_at
)$(SHELL
) $(srcroot
)/move-if-change m32r
/eng2.hin m32r
/eng2.h
5389 @SIM_ENABLE_ARCH_m32r_TRUE@
$(AM_V_at
)$(SHELL
) $(srcroot
)/move-if-change m32r
/mloop2.cin m32r
/mloop2.c
5390 @SIM_ENABLE_ARCH_m32r_TRUE@
$(AM_V_at
)touch
$@
5392 @SIM_ENABLE_ARCH_m32r_TRUE@m32r
/cgen
: m32r
/cgen-arch m32r
/cgen-cpu-decode m32r
/cgen-cpu-decode-x m32r
/cgen-cpu-decode-2
5394 @SIM_ENABLE_ARCH_m32r_TRUE@m32r
/cgen-arch
:
5395 @SIM_ENABLE_ARCH_m32r_TRUE@
$(AM_V_GEN
)mach
=all FLAGS
="with-scache with-profile=fn"; $(CGEN_GEN_ARCH
)
5396 @SIM_ENABLE_ARCH_m32r_TRUE@
$(srcdir)/m32r
/arch.h
$(srcdir)/m32r
/arch.c
$(srcdir)/m32r
/cpuall.h
: @CGEN_MAINT@ m32r
/cgen-arch
5398 @SIM_ENABLE_ARCH_m32r_TRUE@m32r
/cgen-cpu-decode
:
5399 @SIM_ENABLE_ARCH_m32r_TRUE@
$(AM_V_GEN
)cpu
=m32rbf mach
=m32r FLAGS
="with-scache with-profile=fn" EXTRAFILES
="$(CGEN_CPU_SEM) $(CGEN_CPU_SEMSW)"; $(CGEN_GEN_CPU_DECODE
)
5400 @SIM_ENABLE_ARCH_m32r_TRUE@
$(srcdir)/m32r
/cpu.h
$(srcdir)/m32r
/sem.c
$(srcdir)/m32r
/sem-switch.c
$(srcdir)/m32r
/model.c
$(srcdir)/m32r
/decode.c
$(srcdir)/m32r
/decode.h
: @CGEN_MAINT@ m32r
/cgen-cpu-decode
5402 @SIM_ENABLE_ARCH_m32r_TRUE@m32r
/cgen-cpu-decode-x
:
5403 @SIM_ENABLE_ARCH_m32r_TRUE@
$(AM_V_GEN
)cpu
=m32rxf mach
=m32rx SUFFIX
=x FLAGS
="with-scache with-profile=fn" EXTRAFILES
="$(CGEN_CPU_SEMSW)"; $(CGEN_GEN_CPU_DECODE
)
5404 @SIM_ENABLE_ARCH_m32r_TRUE@
$(srcdir)/m32r
/cpux.h
$(srcdir)/m32r
/semx-switch.c
$(srcdir)/m32r
/modelx.c
$(srcdir)/m32r
/decodex.c
$(srcdir)/m32r
/decodex.h
: @CGEN_MAINT@ m32r
/cgen-cpu-decode-x
5406 @SIM_ENABLE_ARCH_m32r_TRUE@m32r
/cgen-cpu-decode-2
:
5407 @SIM_ENABLE_ARCH_m32r_TRUE@
$(AM_V_GEN
)cpu
=m32r2f mach
=m32r2 SUFFIX
=2 FLAGS
="with-scache with-profile=fn" EXTRAFILES
="$(CGEN_CPU_SEMSW)"; $(CGEN_GEN_CPU_DECODE
)
5408 @SIM_ENABLE_ARCH_m32r_TRUE@
$(srcdir)/m32r
/cpu2.h
$(srcdir)/m32r
/sem2-switch.c
$(srcdir)/m32r
/model2.c
$(srcdir)/m32r
/decode2.c
$(srcdir)/m32r
/decode2.h
: @CGEN_MAINT@ m32r
/cgen-cpu-decode-2
5409 @SIM_ENABLE_ARCH_m68hc11_TRUE@
$(m68hc11_libsim_a_OBJECTS
) $(m68hc11_libsim_a_LIBADD
): m68hc11
/hw-config.h
5411 @SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11
/modules.o
: m68hc11
/modules.c
5413 @SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11
/%.o
: common
/%.c
; $(SIM_COMPILE
)
5414 @SIM_ENABLE_ARCH_m68hc11_TRUE@
-@am__include@ m68hc11
/$(DEPDIR
)/*.Po
5416 @SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11
/modules.c
: |
$(m68hc11_BUILD_OUTPUTS
)
5418 # These rules are copied from automake, but tweaked to use FOR_BUILD variables.
5419 @SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11
/gencode
$(EXEEXT
): $(m68hc11_gencode_OBJECTS
) $(m68hc11_gencode_DEPENDENCIES
) m68hc11
/$(am__dirstamp
)
5420 @SIM_ENABLE_ARCH_m68hc11_TRUE@
$(AM_V_CCLD
)$(LINK_FOR_BUILD
) $(m68hc11_gencode_OBJECTS
) $(m68hc11_gencode_LDADD
)
5422 # gencode is a build-time only tool. Override the default rules for it.
5423 @SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11
/gencode.o
: m68hc11
/gencode.c
5424 @SIM_ENABLE_ARCH_m68hc11_TRUE@
$(AM_V_CC
)$(COMPILE_FOR_BUILD
) -c
$< -o
$@
5426 @SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11
/m68hc11int.c
: m68hc11
/gencode
$(EXEEXT
)
5427 @SIM_ENABLE_ARCH_m68hc11_TRUE@
$(AM_V_GEN
)$< -m6811
>$@
5429 @SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11
/m68hc12int.c
: m68hc11
/gencode
$(EXEEXT
)
5430 @SIM_ENABLE_ARCH_m68hc11_TRUE@
$(AM_V_GEN
)$< -m6812
>$@
5431 @SIM_ENABLE_ARCH_mcore_TRUE@
$(mcore_libsim_a_OBJECTS
) $(mcore_libsim_a_LIBADD
): mcore
/hw-config.h
5433 @SIM_ENABLE_ARCH_mcore_TRUE@mcore
/modules.o
: mcore
/modules.c
5435 @SIM_ENABLE_ARCH_mcore_TRUE@mcore
/%.o
: common
/%.c
; $(SIM_COMPILE
)
5436 @SIM_ENABLE_ARCH_mcore_TRUE@
-@am__include@ mcore
/$(DEPDIR
)/*.Po
5437 @SIM_ENABLE_ARCH_microblaze_TRUE@
$(microblaze_libsim_a_OBJECTS
) $(microblaze_libsim_a_LIBADD
): microblaze
/hw-config.h
5439 @SIM_ENABLE_ARCH_microblaze_TRUE@microblaze
/modules.o
: microblaze
/modules.c
5441 @SIM_ENABLE_ARCH_microblaze_TRUE@microblaze
/%.o
: common
/%.c
; $(SIM_COMPILE
)
5442 @SIM_ENABLE_ARCH_microblaze_TRUE@
-@am__include@ microblaze
/$(DEPDIR
)/*.Po
5443 @SIM_ENABLE_ARCH_mips_TRUE@
$(mips_libsim_a_OBJECTS
) $(mips_libsim_a_LIBADD
): mips
/hw-config.h
5445 @SIM_ENABLE_ARCH_mips_TRUE@mips
/modules.o
: mips
/modules.c
5447 @SIM_ENABLE_ARCH_mips_TRUE@mips
/%.o
: common
/%.c
; $(SIM_COMPILE
)
5448 @SIM_ENABLE_ARCH_mips_TRUE@
-@am__include@ mips
/$(DEPDIR
)/*.Po
5450 @SIM_ENABLE_ARCH_mips_TRUE@mips
/modules.c
: |
$(mips_BUILD_OUTPUTS
)
5452 @SIM_ENABLE_ARCH_mips_TRUE@
$(mips_BUILT_SRC_FROM_IGEN_ITABLE
): mips
/stamp-igen-itable
5453 @SIM_ENABLE_ARCH_mips_TRUE@
$(mips_BUILT_SRC_FROM_GEN_MODE_SINGLE
): mips
/stamp-gen-mode-single
5454 @SIM_ENABLE_ARCH_mips_TRUE@
$(mips_BUILT_SRC_FROM_GEN_MODE_M16_M16
): mips
/stamp-gen-mode-m16-m16
5455 @SIM_ENABLE_ARCH_mips_TRUE@
$(mips_BUILT_SRC_FROM_GEN_MODE_M16_M32
): mips
/stamp-gen-mode-m16-m32
5456 @SIM_ENABLE_ARCH_mips_TRUE@
$(SIM_MIPS_MULTI_SRC
): mips
/stamp-gen-mode-multi-igen mips
/stamp-gen-mode-multi-run
5458 @SIM_ENABLE_ARCH_mips_TRUE@mips
/stamp-igen-itable
: $(mips_IGEN_INSN
) $(mips_IGEN_INSN_INC
) $(IGEN
)
5459 @SIM_ENABLE_ARCH_mips_TRUE@
$(AM_V_GEN
)$(IGEN_RUN
) \
5460 @SIM_ENABLE_ARCH_mips_TRUE@
$(mips_IGEN_TRACE
) \
5461 @SIM_ENABLE_ARCH_mips_TRUE@
-I
$(srcdir)/mips \
5462 @SIM_ENABLE_ARCH_mips_TRUE@
-Werror \
5463 @SIM_ENABLE_ARCH_mips_TRUE@
-Wnodiscard \
5464 @SIM_ENABLE_ARCH_mips_TRUE@
-Wnowidth \
5465 @SIM_ENABLE_ARCH_mips_TRUE@
-Wnounimplemented \
5466 @SIM_ENABLE_ARCH_mips_TRUE@
$(SIM_MIPS_IGEN_ITABLE_FLAGS
) \
5467 @SIM_ENABLE_ARCH_mips_TRUE@
-G gen-direct-access \
5468 @SIM_ENABLE_ARCH_mips_TRUE@
-G gen-zero-r0 \
5469 @SIM_ENABLE_ARCH_mips_TRUE@
-i
$(mips_IGEN_INSN
) \
5470 @SIM_ENABLE_ARCH_mips_TRUE@
-n itable.h
-ht mips
/itable.h \
5471 @SIM_ENABLE_ARCH_mips_TRUE@
-n itable.c
-t mips
/itable.c
5472 @SIM_ENABLE_ARCH_mips_TRUE@
$(AM_V_at
)touch
$@
5474 @SIM_ENABLE_ARCH_mips_TRUE@mips
/stamp-gen-mode-single
: $(mips_IGEN_INSN
) $(mips_IGEN_INSN_INC
) $(mips_IGEN_DC
) $(IGEN
)
5475 @SIM_ENABLE_ARCH_mips_TRUE@
$(AM_V_GEN
)$(IGEN_RUN
) \
5476 @SIM_ENABLE_ARCH_mips_TRUE@
$(mips_IGEN_TRACE
) \
5477 @SIM_ENABLE_ARCH_mips_TRUE@
-I
$(srcdir)/mips \
5478 @SIM_ENABLE_ARCH_mips_TRUE@
-Werror \
5479 @SIM_ENABLE_ARCH_mips_TRUE@
-Wnodiscard \
5480 @SIM_ENABLE_ARCH_mips_TRUE@
$(SIM_MIPS_SINGLE_FLAGS
) \
5481 @SIM_ENABLE_ARCH_mips_TRUE@
-G gen-direct-access \
5482 @SIM_ENABLE_ARCH_mips_TRUE@
-G gen-zero-r0 \
5483 @SIM_ENABLE_ARCH_mips_TRUE@
-B
32 \
5484 @SIM_ENABLE_ARCH_mips_TRUE@
-H
31 \
5485 @SIM_ENABLE_ARCH_mips_TRUE@
-i
$(mips_IGEN_INSN
) \
5486 @SIM_ENABLE_ARCH_mips_TRUE@
-o
$(mips_IGEN_DC
) \
5487 @SIM_ENABLE_ARCH_mips_TRUE@
-x \
5488 @SIM_ENABLE_ARCH_mips_TRUE@
-n icache.h
-hc mips
/icache.h \
5489 @SIM_ENABLE_ARCH_mips_TRUE@
-n icache.c
-c mips
/icache.c \
5490 @SIM_ENABLE_ARCH_mips_TRUE@
-n semantics.h
-hs mips
/semantics.h \
5491 @SIM_ENABLE_ARCH_mips_TRUE@
-n semantics.c
-s mips
/semantics.c \
5492 @SIM_ENABLE_ARCH_mips_TRUE@
-n idecode.h
-hd mips
/idecode.h \
5493 @SIM_ENABLE_ARCH_mips_TRUE@
-n idecode.c
-d mips
/idecode.c \
5494 @SIM_ENABLE_ARCH_mips_TRUE@
-n model.h
-hm mips
/model.h \
5495 @SIM_ENABLE_ARCH_mips_TRUE@
-n model.c
-m mips
/model.c \
5496 @SIM_ENABLE_ARCH_mips_TRUE@
-n support.h
-hf mips
/support.h \
5497 @SIM_ENABLE_ARCH_mips_TRUE@
-n support.c
-f mips
/support.c \
5498 @SIM_ENABLE_ARCH_mips_TRUE@
-n engine.h
-he mips
/engine.h \
5499 @SIM_ENABLE_ARCH_mips_TRUE@
-n engine.c
-e mips
/engine.c \
5500 @SIM_ENABLE_ARCH_mips_TRUE@
-n irun.c
-r mips
/irun.c
5501 @SIM_ENABLE_ARCH_mips_TRUE@
$(AM_V_at
)touch
$@
5503 @SIM_ENABLE_ARCH_mips_TRUE@mips
/stamp-gen-mode-m16-m16
: $(mips_IGEN_INSN
) $(mips_IGEN_INSN_INC
) $(mips_M16_DC
) $(IGEN
)
5504 @SIM_ENABLE_ARCH_mips_TRUE@
$(AM_V_GEN
)$(IGEN_RUN
) \
5505 @SIM_ENABLE_ARCH_mips_TRUE@
$(mips_IGEN_TRACE
) \
5506 @SIM_ENABLE_ARCH_mips_TRUE@
-I
$(srcdir)/mips \
5507 @SIM_ENABLE_ARCH_mips_TRUE@
-Werror \
5508 @SIM_ENABLE_ARCH_mips_TRUE@
-Wnodiscard \
5509 @SIM_ENABLE_ARCH_mips_TRUE@
$(SIM_MIPS_M16_FLAGS
) \
5510 @SIM_ENABLE_ARCH_mips_TRUE@
-G gen-direct-access \
5511 @SIM_ENABLE_ARCH_mips_TRUE@
-G gen-zero-r0 \
5512 @SIM_ENABLE_ARCH_mips_TRUE@
-B
16 \
5513 @SIM_ENABLE_ARCH_mips_TRUE@
-H
15 \
5514 @SIM_ENABLE_ARCH_mips_TRUE@
-i
$(mips_IGEN_INSN
) \
5515 @SIM_ENABLE_ARCH_mips_TRUE@
-o
$(mips_M16_DC
) \
5516 @SIM_ENABLE_ARCH_mips_TRUE@
-P m16_ \
5517 @SIM_ENABLE_ARCH_mips_TRUE@
-x \
5518 @SIM_ENABLE_ARCH_mips_TRUE@
-n m16_icache.h
-hc mips
/m16_icache.h \
5519 @SIM_ENABLE_ARCH_mips_TRUE@
-n m16_icache.c
-c mips
/m16_icache.c \
5520 @SIM_ENABLE_ARCH_mips_TRUE@
-n m16_semantics.h
-hs mips
/m16_semantics.h \
5521 @SIM_ENABLE_ARCH_mips_TRUE@
-n m16_semantics.c
-s mips
/m16_semantics.c \
5522 @SIM_ENABLE_ARCH_mips_TRUE@
-n m16_idecode.h
-hd mips
/m16_idecode.h \
5523 @SIM_ENABLE_ARCH_mips_TRUE@
-n m16_idecode.c
-d mips
/m16_idecode.c \
5524 @SIM_ENABLE_ARCH_mips_TRUE@
-n m16_model.h
-hm mips
/m16_model.h \
5525 @SIM_ENABLE_ARCH_mips_TRUE@
-n m16_model.c
-m mips
/m16_model.c \
5526 @SIM_ENABLE_ARCH_mips_TRUE@
-n m16_support.h
-hf mips
/m16_support.h \
5527 @SIM_ENABLE_ARCH_mips_TRUE@
-n m16_support.c
-f mips
/m16_support.c
5528 @SIM_ENABLE_ARCH_mips_TRUE@
$(AM_V_at
)touch
$@
5530 @SIM_ENABLE_ARCH_mips_TRUE@mips
/stamp-gen-mode-m16-m32
: $(mips_IGEN_INSN
) $(mips_IGEN_INSN_INC
) $(mips_IGEN_DC
) $(IGEN
)
5531 @SIM_ENABLE_ARCH_mips_TRUE@
$(AM_V_GEN
)$(IGEN_RUN
) \
5532 @SIM_ENABLE_ARCH_mips_TRUE@
$(mips_IGEN_TRACE
) \
5533 @SIM_ENABLE_ARCH_mips_TRUE@
-I
$(srcdir)/mips \
5534 @SIM_ENABLE_ARCH_mips_TRUE@
-Werror \
5535 @SIM_ENABLE_ARCH_mips_TRUE@
-Wnodiscard \
5536 @SIM_ENABLE_ARCH_mips_TRUE@
$(SIM_MIPS_SINGLE_FLAGS
) \
5537 @SIM_ENABLE_ARCH_mips_TRUE@
-G gen-direct-access \
5538 @SIM_ENABLE_ARCH_mips_TRUE@
-G gen-zero-r0 \
5539 @SIM_ENABLE_ARCH_mips_TRUE@
-B
32 \
5540 @SIM_ENABLE_ARCH_mips_TRUE@
-H
31 \
5541 @SIM_ENABLE_ARCH_mips_TRUE@
-i
$(mips_IGEN_INSN
) \
5542 @SIM_ENABLE_ARCH_mips_TRUE@
-o
$(mips_IGEN_DC
) \
5543 @SIM_ENABLE_ARCH_mips_TRUE@
-P m32_ \
5544 @SIM_ENABLE_ARCH_mips_TRUE@
-x \
5545 @SIM_ENABLE_ARCH_mips_TRUE@
-n m32_icache.h
-hc mips
/m32_icache.h \
5546 @SIM_ENABLE_ARCH_mips_TRUE@
-n m32_icache.c
-c mips
/m32_icache.c \
5547 @SIM_ENABLE_ARCH_mips_TRUE@
-n m32_semantics.h
-hs mips
/m32_semantics.h \
5548 @SIM_ENABLE_ARCH_mips_TRUE@
-n m32_semantics.c
-s mips
/m32_semantics.c \
5549 @SIM_ENABLE_ARCH_mips_TRUE@
-n m32_idecode.h
-hd mips
/m32_idecode.h \
5550 @SIM_ENABLE_ARCH_mips_TRUE@
-n m32_idecode.c
-d mips
/m32_idecode.c \
5551 @SIM_ENABLE_ARCH_mips_TRUE@
-n m32_model.h
-hm mips
/m32_model.h \
5552 @SIM_ENABLE_ARCH_mips_TRUE@
-n m32_model.c
-m mips
/m32_model.c \
5553 @SIM_ENABLE_ARCH_mips_TRUE@
-n m32_support.h
-hf mips
/m32_support.h \
5554 @SIM_ENABLE_ARCH_mips_TRUE@
-n m32_support.c
-f mips
/m32_support.c
5555 @SIM_ENABLE_ARCH_mips_TRUE@
$(AM_V_at
)touch
$@
5557 @SIM_ENABLE_ARCH_mips_TRUE@mips
/stamp-gen-mode-multi-igen
: $(mips_IGEN_INSN
) $(mips_IGEN_INSN_INC
) $(mips_IGEN_DC
) $(mips_M16_DC
) $(mips_MICROMIPS32_DC
) $(mips_MICROMIPS16_DC
) $(IGEN
)
5558 @SIM_ENABLE_ARCH_mips_TRUE@
$(AM_V_GEN
)\
5559 @SIM_ENABLE_ARCH_mips_TRUE@ for t in
$(SIM_MIPS_MULTI_IGEN_CONFIGS
); do \
5560 @SIM_ENABLE_ARCH_mips_TRUE@ p
=`echo $${t} | sed -e 's/:.*//'` ; \
5561 @SIM_ENABLE_ARCH_mips_TRUE@ m
=`echo $${t} | sed -e 's/.*:\(.*\):.*/\1/'` ; \
5562 @SIM_ENABLE_ARCH_mips_TRUE@ f
=`echo $${t} | sed -e 's/.*://'` ; \
5563 @SIM_ENABLE_ARCH_mips_TRUE@ case
$${p} in \
5564 @SIM_ENABLE_ARCH_mips_TRUE@ micromips16
*) \
5565 @SIM_ENABLE_ARCH_mips_TRUE@ e
="-B 16 -H 15 -o $(mips_MICROMIPS16_DC) -F 16" ;; \
5566 @SIM_ENABLE_ARCH_mips_TRUE@ micromips32
* | micromips64
*) \
5567 @SIM_ENABLE_ARCH_mips_TRUE@ e
="-B 32 -H 31 -o $(mips_MICROMIPS32_DC) -F $${f}" ;; \
5568 @SIM_ENABLE_ARCH_mips_TRUE@ micromips_m32
*) \
5569 @SIM_ENABLE_ARCH_mips_TRUE@ e
="-B 32 -H 31 -o $(mips_IGEN_DC) -F $${f}"; \
5570 @SIM_ENABLE_ARCH_mips_TRUE@ m
="mips32r2,mips3d,mdmx,dsp,dsp2,smartmips" ;; \
5571 @SIM_ENABLE_ARCH_mips_TRUE@ micromips_m64
*) \
5572 @SIM_ENABLE_ARCH_mips_TRUE@ e
="-B 32 -H 31 -o $(mips_IGEN_DC) -F $${f}"; \
5573 @SIM_ENABLE_ARCH_mips_TRUE@ m
="mips64r2,mips3d,mdmx,dsp,dsp2,smartmips" ;; \
5574 @SIM_ENABLE_ARCH_mips_TRUE@ m16
*) \
5575 @SIM_ENABLE_ARCH_mips_TRUE@ e
="-B 16 -H 15 -o $(mips_M16_DC) -F 16" ;; \
5576 @SIM_ENABLE_ARCH_mips_TRUE@
*) \
5577 @SIM_ENABLE_ARCH_mips_TRUE@ e
="-B 32 -H 31 -o $(mips_IGEN_DC) -F $${f}" ;; \
5578 @SIM_ENABLE_ARCH_mips_TRUE@ esac
; \
5579 @SIM_ENABLE_ARCH_mips_TRUE@
$(IGEN_RUN
) \
5580 @SIM_ENABLE_ARCH_mips_TRUE@
$(mips_IGEN_TRACE
) \
5581 @SIM_ENABLE_ARCH_mips_TRUE@
$${e} \
5582 @SIM_ENABLE_ARCH_mips_TRUE@
-I
$(srcdir)/mips \
5583 @SIM_ENABLE_ARCH_mips_TRUE@
-Werror \
5584 @SIM_ENABLE_ARCH_mips_TRUE@
-Wnodiscard \
5585 @SIM_ENABLE_ARCH_mips_TRUE@
-M
$${m} \
5586 @SIM_ENABLE_ARCH_mips_TRUE@
-G gen-direct-access \
5587 @SIM_ENABLE_ARCH_mips_TRUE@
-G gen-zero-r0 \
5588 @SIM_ENABLE_ARCH_mips_TRUE@
-i
$(mips_IGEN_INSN
) \
5589 @SIM_ENABLE_ARCH_mips_TRUE@
-P
$${p}_ \
5590 @SIM_ENABLE_ARCH_mips_TRUE@
-x \
5591 @SIM_ENABLE_ARCH_mips_TRUE@
-n
$${p}_icache.h
-hc mips
/$${p}_icache.h \
5592 @SIM_ENABLE_ARCH_mips_TRUE@
-n
$${p}_icache.c
-c mips
/$${p}_icache.c \
5593 @SIM_ENABLE_ARCH_mips_TRUE@
-n
$${p}_semantics.h
-hs mips
/$${p}_semantics.h \
5594 @SIM_ENABLE_ARCH_mips_TRUE@
-n
$${p}_semantics.c
-s mips
/$${p}_semantics.c \
5595 @SIM_ENABLE_ARCH_mips_TRUE@
-n
$${p}_idecode.h
-hd mips
/$${p}_idecode.h \
5596 @SIM_ENABLE_ARCH_mips_TRUE@
-n
$${p}_idecode.c
-d mips
/$${p}_idecode.c \
5597 @SIM_ENABLE_ARCH_mips_TRUE@
-n
$${p}_model.h
-hm mips
/$${p}_model.h \
5598 @SIM_ENABLE_ARCH_mips_TRUE@
-n
$${p}_model.c
-m mips
/$${p}_model.c \
5599 @SIM_ENABLE_ARCH_mips_TRUE@
-n
$${p}_support.h
-hf mips
/$${p}_support.h \
5600 @SIM_ENABLE_ARCH_mips_TRUE@
-n
$${p}_support.c
-f mips
/$${p}_support.c \
5601 @SIM_ENABLE_ARCH_mips_TRUE@
-n
$${p}_engine.h
-he mips
/$${p}_engine.h \
5602 @SIM_ENABLE_ARCH_mips_TRUE@
-n
$${p}_engine.c
-e mips
/$${p}_engine.c \
5603 @SIM_ENABLE_ARCH_mips_TRUE@ || exit
; \
5604 @SIM_ENABLE_ARCH_mips_TRUE@ done
5605 @SIM_ENABLE_ARCH_mips_TRUE@
$(AM_V_at
)touch
$@
5607 @SIM_ENABLE_ARCH_mips_TRUE@mips
/stamp-gen-mode-multi-run
: mips
/m16run.c mips
/micromipsrun.c
5608 @SIM_ENABLE_ARCH_mips_TRUE@
$(AM_V_GEN
)\
5609 @SIM_ENABLE_ARCH_mips_TRUE@ for t in
$(SIM_MIPS_MULTI_IGEN_CONFIGS
); do \
5610 @SIM_ENABLE_ARCH_mips_TRUE@ case
$${t} in \
5611 @SIM_ENABLE_ARCH_mips_TRUE@ m16
*) \
5612 @SIM_ENABLE_ARCH_mips_TRUE@ m
=`echo $${t} | sed -e 's/^m16//' -e 's/:.*//'`; \
5613 @SIM_ENABLE_ARCH_mips_TRUE@ o
=mips
/m16
$${m}_run.c
; \
5614 @SIM_ENABLE_ARCH_mips_TRUE@ sed
< $(srcdir)/mips
/m16run.c
> $$o.tmp \
5615 @SIM_ENABLE_ARCH_mips_TRUE@
-e
"s/^sim_/m16$${m}_/" \
5616 @SIM_ENABLE_ARCH_mips_TRUE@
-e
"/include/s/sim-engine/m16$${m}_engine/" \
5617 @SIM_ENABLE_ARCH_mips_TRUE@
-e
"s/m16_/m16$${m}_/" \
5618 @SIM_ENABLE_ARCH_mips_TRUE@
-e
"s/m32_/m32$${m}_/" \
5619 @SIM_ENABLE_ARCH_mips_TRUE@ || exit
1; \
5620 @SIM_ENABLE_ARCH_mips_TRUE@
$(SHELL
) $(srcroot
)/move-if-change
$$o.tmp
$$o; \
5621 @SIM_ENABLE_ARCH_mips_TRUE@
;;\
5622 @SIM_ENABLE_ARCH_mips_TRUE@ micromips32
*) \
5623 @SIM_ENABLE_ARCH_mips_TRUE@ m
=`echo $${t} | sed -e 's/^micromips32//' -e 's/:.*//'`; \
5624 @SIM_ENABLE_ARCH_mips_TRUE@ o
=mips
/micromips
$${m}_run.c
; \
5625 @SIM_ENABLE_ARCH_mips_TRUE@ sed
< $(srcdir)/mips
/micromipsrun.c
> $$o.tmp \
5626 @SIM_ENABLE_ARCH_mips_TRUE@
-e
"s/^sim_/micromips32$${m}_/" \
5627 @SIM_ENABLE_ARCH_mips_TRUE@
-e
"/include/s/sim-engine/micromips32$${m}_engine/" \
5628 @SIM_ENABLE_ARCH_mips_TRUE@
-e
"s/micromips16_/micromips16$${m}_/" \
5629 @SIM_ENABLE_ARCH_mips_TRUE@
-e
"s/micromips32_/micromips32$${m}_/" \
5630 @SIM_ENABLE_ARCH_mips_TRUE@
-e
"s/m32_/m32$${m}_/" \
5631 @SIM_ENABLE_ARCH_mips_TRUE@ || exit
1; \
5632 @SIM_ENABLE_ARCH_mips_TRUE@
$(SHELL
) $(srcroot
)/move-if-change
$$o.tmp
$$o; \
5633 @SIM_ENABLE_ARCH_mips_TRUE@
;;\
5634 @SIM_ENABLE_ARCH_mips_TRUE@ micromips64
*) \
5635 @SIM_ENABLE_ARCH_mips_TRUE@ m
=`echo $${t} | sed -e 's/^micromips64//' -e 's/:.*//'`; \
5636 @SIM_ENABLE_ARCH_mips_TRUE@ o
=mips
/micromips
$${m}_run.c
; \
5637 @SIM_ENABLE_ARCH_mips_TRUE@ sed
< $(srcdir)/mips
/micromipsrun.c
> $$o.tmp \
5638 @SIM_ENABLE_ARCH_mips_TRUE@
-e
"s/^sim_/micromips64$${m}_/" \
5639 @SIM_ENABLE_ARCH_mips_TRUE@
-e
"/include/s/sim-engine/micromips64$${m}_engine/" \
5640 @SIM_ENABLE_ARCH_mips_TRUE@
-e
"s/micromips16_/micromips16$${m}_/" \
5641 @SIM_ENABLE_ARCH_mips_TRUE@
-e
"s/micromips32_/micromips64$${m}_/" \
5642 @SIM_ENABLE_ARCH_mips_TRUE@
-e
"s/m32_/m64$${m}_/" \
5643 @SIM_ENABLE_ARCH_mips_TRUE@ || exit
1; \
5644 @SIM_ENABLE_ARCH_mips_TRUE@
$(SHELL
) $(srcroot
)/move-if-change
$$o.tmp
$$o; \
5645 @SIM_ENABLE_ARCH_mips_TRUE@
;;\
5646 @SIM_ENABLE_ARCH_mips_TRUE@ esac \
5647 @SIM_ENABLE_ARCH_mips_TRUE@ done
5648 @SIM_ENABLE_ARCH_mips_TRUE@
$(AM_V_at
)touch
$@
5649 @SIM_ENABLE_ARCH_mn10300_TRUE@
$(mn10300_libsim_a_OBJECTS
) $(mn10300_libsim_a_LIBADD
): mn10300
/hw-config.h
5651 @SIM_ENABLE_ARCH_mn10300_TRUE@mn10300
/modules.o
: mn10300
/modules.c
5653 @SIM_ENABLE_ARCH_mn10300_TRUE@mn10300
/%.o
: common
/%.c
; $(SIM_COMPILE
)
5654 @SIM_ENABLE_ARCH_mn10300_TRUE@
-@am__include@ mn10300
/$(DEPDIR
)/*.Po
5656 @SIM_ENABLE_ARCH_mn10300_TRUE@mn10300
/modules.c
: |
$(mn10300_BUILD_OUTPUTS
)
5658 @SIM_ENABLE_ARCH_mn10300_TRUE@
$(mn10300_BUILT_SRC_FROM_IGEN
): mn10300
/stamp-igen
5659 @SIM_ENABLE_ARCH_mn10300_TRUE@mn10300
/stamp-igen
: $(mn10300_IGEN_INSN
) $(mn10300_IGEN_INSN_INC
) $(mn10300_IGEN_DC
) $(IGEN
)
5660 @SIM_ENABLE_ARCH_mn10300_TRUE@
$(AM_V_GEN
)$(IGEN_RUN
) \
5661 @SIM_ENABLE_ARCH_mn10300_TRUE@
$(mn10300_IGEN_TRACE
) \
5662 @SIM_ENABLE_ARCH_mn10300_TRUE@
-G gen-direct-access \
5663 @SIM_ENABLE_ARCH_mn10300_TRUE@
-M mn10300
,am33
-G gen-multi-sim
=am33 \
5664 @SIM_ENABLE_ARCH_mn10300_TRUE@
-M am33_2 \
5665 @SIM_ENABLE_ARCH_mn10300_TRUE@
-I
$(srcdir)/mn10300 \
5666 @SIM_ENABLE_ARCH_mn10300_TRUE@
-i
$(mn10300_IGEN_INSN
) \
5667 @SIM_ENABLE_ARCH_mn10300_TRUE@
-o
$(mn10300_IGEN_DC
) \
5668 @SIM_ENABLE_ARCH_mn10300_TRUE@
-x \
5669 @SIM_ENABLE_ARCH_mn10300_TRUE@
-n icache.h
-hc mn10300
/icache.h \
5670 @SIM_ENABLE_ARCH_mn10300_TRUE@
-n icache.c
-c mn10300
/icache.c \
5671 @SIM_ENABLE_ARCH_mn10300_TRUE@
-n semantics.h
-hs mn10300
/semantics.h \
5672 @SIM_ENABLE_ARCH_mn10300_TRUE@
-n semantics.c
-s mn10300
/semantics.c \
5673 @SIM_ENABLE_ARCH_mn10300_TRUE@
-n idecode.h
-hd mn10300
/idecode.h \
5674 @SIM_ENABLE_ARCH_mn10300_TRUE@
-n idecode.c
-d mn10300
/idecode.c \
5675 @SIM_ENABLE_ARCH_mn10300_TRUE@
-n model.h
-hm mn10300
/model.h \
5676 @SIM_ENABLE_ARCH_mn10300_TRUE@
-n model.c
-m mn10300
/model.c \
5677 @SIM_ENABLE_ARCH_mn10300_TRUE@
-n support.h
-hf mn10300
/support.h \
5678 @SIM_ENABLE_ARCH_mn10300_TRUE@
-n support.c
-f mn10300
/support.c \
5679 @SIM_ENABLE_ARCH_mn10300_TRUE@
-n itable.h
-ht mn10300
/itable.h \
5680 @SIM_ENABLE_ARCH_mn10300_TRUE@
-n itable.c
-t mn10300
/itable.c \
5681 @SIM_ENABLE_ARCH_mn10300_TRUE@
-n engine.h
-he mn10300
/engine.h \
5682 @SIM_ENABLE_ARCH_mn10300_TRUE@
-n engine.c
-e mn10300
/engine.c \
5683 @SIM_ENABLE_ARCH_mn10300_TRUE@
-n irun.c
-r mn10300
/irun.c
5684 @SIM_ENABLE_ARCH_mn10300_TRUE@
$(AM_V_at
)touch
$@
5685 @SIM_ENABLE_ARCH_moxie_TRUE@
$(moxie_libsim_a_OBJECTS
) $(moxie_libsim_a_LIBADD
): moxie
/hw-config.h
5687 @SIM_ENABLE_ARCH_moxie_TRUE@moxie
/modules.o
: moxie
/modules.c
5689 @SIM_ENABLE_ARCH_moxie_TRUE@moxie
/%.o
: common
/%.c
; $(SIM_COMPILE
)
5690 @SIM_ENABLE_ARCH_moxie_TRUE@
-@am__include@ moxie
/$(DEPDIR
)/*.Po
5692 @SIM_ENABLE_ARCH_moxie_TRUE@moxie
/moxie-gdb.dtb
: @MAINT@ moxie
/moxie-gdb.dts moxie
/$(am__dirstamp
)
5693 @SIM_ENABLE_ARCH_moxie_TRUE@
$(AM_V_GEN
) \
5694 @SIM_ENABLE_ARCH_moxie_TRUE@ if
test "x$(DTC)" != x
; then \
5695 @SIM_ENABLE_ARCH_moxie_TRUE@
$(DTC
) -O dtb
-o
$@.tmp
${srcdir}/moxie
/moxie-gdb.dts || exit
1; \
5696 @SIM_ENABLE_ARCH_moxie_TRUE@
$(SHELL
) $(srcroot
)/move-if-change
$@.tmp
${srcdir}/moxie
/moxie-gdb.dtb || exit
1; \
5697 @SIM_ENABLE_ARCH_moxie_TRUE@ touch
${srcdir}/moxie
/moxie-gdb.dtb
; \
5698 @SIM_ENABLE_ARCH_moxie_TRUE@
else \
5699 @SIM_ENABLE_ARCH_moxie_TRUE@ echo
"Could not update the moxie-gdb.dtb file because the device "; \
5700 @SIM_ENABLE_ARCH_moxie_TRUE@ echo
"tree compiler tool (dtc) is missing. Install the tool to "; \
5701 @SIM_ENABLE_ARCH_moxie_TRUE@ echo
"update the device tree blob."; \
5702 @SIM_ENABLE_ARCH_moxie_TRUE@ fi
5703 @SIM_ENABLE_ARCH_msp430_TRUE@
$(msp430_libsim_a_OBJECTS
) $(msp430_libsim_a_LIBADD
): msp430
/hw-config.h
5705 @SIM_ENABLE_ARCH_msp430_TRUE@msp430
/modules.o
: msp430
/modules.c
5707 @SIM_ENABLE_ARCH_msp430_TRUE@msp430
/%.o
: common
/%.c
; $(SIM_COMPILE
)
5708 @SIM_ENABLE_ARCH_msp430_TRUE@
-@am__include@ msp430
/$(DEPDIR
)/*.Po
5709 @SIM_ENABLE_ARCH_or1k_TRUE@
$(or1k_libsim_a_OBJECTS
) $(or1k_libsim_a_LIBADD
): or1k
/hw-config.h
5711 @SIM_ENABLE_ARCH_or1k_TRUE@or1k
/modules.o
: or1k
/modules.c
5713 @SIM_ENABLE_ARCH_or1k_TRUE@or1k
/%.o
: common
/%.c
; $(SIM_COMPILE
)
5714 @SIM_ENABLE_ARCH_or1k_TRUE@
-@am__include@ or1k
/$(DEPDIR
)/*.Po
5716 @SIM_ENABLE_ARCH_or1k_TRUE@or1k
/modules.c
: |
$(or1k_BUILD_OUTPUTS
)
5718 @SIM_ENABLE_ARCH_or1k_TRUE@or1k
/mloop.c or1k
/eng.h
: or1k
/stamp-mloop
; @true
5719 @SIM_ENABLE_ARCH_or1k_TRUE@or1k
/stamp-mloop
: or1k
/mloop.in
$(srccom
)/genmloop.sh
5720 @SIM_ENABLE_ARCH_or1k_TRUE@
$(AM_V_GEN
)$(CGEN_GEN_MLOOP
) \
5721 @SIM_ENABLE_ARCH_or1k_TRUE@
-mono
-fast
-pbb
-switch sem-switch.c \
5722 @SIM_ENABLE_ARCH_or1k_TRUE@
-cpu or1k32bf
5723 @SIM_ENABLE_ARCH_or1k_TRUE@
$(AM_V_at
)$(SHELL
) $(srcroot
)/move-if-change or1k
/eng.hin or1k
/eng.h
5724 @SIM_ENABLE_ARCH_or1k_TRUE@
$(AM_V_at
)$(SHELL
) $(srcroot
)/move-if-change or1k
/mloop.cin or1k
/mloop.c
5725 @SIM_ENABLE_ARCH_or1k_TRUE@
$(AM_V_at
)touch
$@
5727 @SIM_ENABLE_ARCH_or1k_TRUE@or1k
/cgen
: or1k
/cgen-arch or1k
/cgen-cpu-decode
5729 @SIM_ENABLE_ARCH_or1k_TRUE@or1k
/cgen-arch
:
5730 @SIM_ENABLE_ARCH_or1k_TRUE@
$(AM_V_GEN
)mach
=or32
,or32nd FLAGS
="with-scache"; $(CGEN_GEN_ARCH
)
5731 @SIM_ENABLE_ARCH_or1k_TRUE@
$(srcdir)/or1k
/arch.h
$(srcdir)/or1k
/arch.c
$(srcdir)/or1k
/cpuall.h
: @CGEN_MAINT@ or1k
/cgen-arch
5733 @SIM_ENABLE_ARCH_or1k_TRUE@or1k
/cgen-cpu-decode
:
5734 @SIM_ENABLE_ARCH_or1k_TRUE@
$(AM_V_GEN
)cpu
=or1k32bf mach
=or32
,or32nd FLAGS
="with-scache" EXTRAFILES
="$(CGEN_CPU_SEM) $(CGEN_CPU_SEMSW)"; $(CGEN_GEN_CPU_DECODE
)
5735 @SIM_ENABLE_ARCH_or1k_TRUE@
$(srcdir)/or1k
/cpu.h
$(srcdir)/or1k
/cpu.c
$(srcdir)/or1k
/model.c
$(srcdir)/or1k
/sem.c
$(srcdir)/or1k
/sem-switch.c
$(srcdir)/or1k
/decode.c
$(srcdir)/or1k
/decode.h
: @CGEN_MAINT@ or1k
/cgen-cpu-decode
5736 @SIM_ENABLE_ARCH_ppc_TRUE@ppc
/libsim.a
: common
/libcommon.a
5737 @SIM_ENABLE_ARCH_ppc_TRUE@
$(AM_V_at
)$(MAKE
) $(AM_MAKEFLAGS
) -C
$(@D
) $(@F
)
5739 @SIM_ENABLE_ARCH_ppc_TRUE@ppc
/main.o
: ppc
/%.o
: ppc
/%.c | ppc
/libsim.a
$(SIM_ALL_RECURSIVE_DEPS
)
5740 @SIM_ENABLE_ARCH_ppc_TRUE@
$(MAKE
) $(AM_MAKEFLAGS
) -C
$(@D
) $(@F
)
5742 @SIM_ENABLE_ARCH_ppc_TRUE@ppc
/spreg.c
: @MAINT@ ppc
/ppc-spr-table ppc
/spreg-gen.py ppc
/$(am__dirstamp
)
5743 @SIM_ENABLE_ARCH_ppc_TRUE@
$(AM_V_GEN
)$(srcdir)/ppc
/spreg-gen.py
--source
$@.tmp
5744 @SIM_ENABLE_ARCH_ppc_TRUE@
$(AM_V_at
)$(SHELL
) $(srcroot
)/move-if-change
$@.tmp
$(srcdir)/ppc
/spreg.c
5745 @SIM_ENABLE_ARCH_ppc_TRUE@
$(AM_V_at
)touch
$(srcdir)/ppc
/spreg.c
5747 @SIM_ENABLE_ARCH_ppc_TRUE@ppc
/spreg.h
: @MAINT@ ppc
/ppc-spr-table ppc
/spreg-gen.py ppc
/$(am__dirstamp
)
5748 @SIM_ENABLE_ARCH_ppc_TRUE@
$(AM_V_GEN
)$(srcdir)/ppc
/spreg-gen.py
--header
$@.tmp
5749 @SIM_ENABLE_ARCH_ppc_TRUE@
$(AM_V_at
)$(SHELL
) $(srcroot
)/move-if-change
$@.tmp
$(srcdir)/ppc
/spreg.h
5750 @SIM_ENABLE_ARCH_ppc_TRUE@
$(AM_V_at
)touch
$(srcdir)/ppc
/spreg.h
5752 @SIM_ENABLE_ARCH_ppc_TRUE@ppc
/libigen.a
: $(ppc_libigen_a_OBJECTS
) $(ppc_libigen_a_DEPENDENCIES
) $(EXTRA_ppc_libigen_a_DEPENDENCIES
) ppc
/$(am__dirstamp
)
5753 @SIM_ENABLE_ARCH_ppc_TRUE@
$(AM_V_at
)-rm -f
$@
5754 @SIM_ENABLE_ARCH_ppc_TRUE@
$(AM_V_AR
)$(AR_FOR_BUILD
) $(ARFLAGS
) $@
$(ppc_libigen_a_OBJECTS
) $(ppc_libigen_a_LIBADD
)
5755 @SIM_ENABLE_ARCH_ppc_TRUE@
$(AM_V_at
)$(RANLIB_FOR_BUILD
) $@
5757 @SIM_ENABLE_ARCH_ppc_TRUE@ppc
/igen
$(EXEEXT
): $(ppc_igen_OBJECTS
) $(ppc_igen_DEPENDENCIES
) ppc
/$(am__dirstamp
)
5758 @SIM_ENABLE_ARCH_ppc_TRUE@
$(AM_V_CCLD
)$(LINK_FOR_BUILD
) $(ppc_igen_OBJECTS
) $(ppc_igen_LDADD
)
5760 @SIM_ENABLE_ARCH_ppc_TRUE@
$(ppc_libigen_a_OBJECTS
) $(ppc_igen_OBJECTS
): ppc
/%.o
: ppc
/%.c
5761 @SIM_ENABLE_ARCH_ppc_TRUE@
$(AM_V_CC
)$(COMPILE_FOR_BUILD
) -I
$(srcdir)/igen
-I
$(srcdir)/ppc
-c
$< -o
$@
5763 @SIM_ENABLE_ARCH_ppc_TRUE@ppc
/%-main.o
: ppc
/%.c
5764 @SIM_ENABLE_ARCH_ppc_TRUE@
$(AM_V_CC
)$(COMPILE_FOR_BUILD
) -DMAIN
-c
$< -o
$@
5765 @SIM_ENABLE_ARCH_pru_TRUE@
$(pru_libsim_a_OBJECTS
) $(pru_libsim_a_LIBADD
): pru
/hw-config.h
5767 @SIM_ENABLE_ARCH_pru_TRUE@pru
/modules.o
: pru
/modules.c
5769 @SIM_ENABLE_ARCH_pru_TRUE@pru
/%.o
: common
/%.c
; $(SIM_COMPILE
)
5770 @SIM_ENABLE_ARCH_pru_TRUE@
-@am__include@ pru
/$(DEPDIR
)/*.Po
5771 @SIM_ENABLE_ARCH_riscv_TRUE@
$(riscv_libsim_a_OBJECTS
) $(riscv_libsim_a_LIBADD
): riscv
/hw-config.h
5773 @SIM_ENABLE_ARCH_riscv_TRUE@riscv
/modules.o
: riscv
/modules.c
5775 @SIM_ENABLE_ARCH_riscv_TRUE@riscv
/%.o
: common
/%.c
; $(SIM_COMPILE
)
5776 @SIM_ENABLE_ARCH_riscv_TRUE@
-@am__include@ riscv
/$(DEPDIR
)/*.Po
5777 @SIM_ENABLE_ARCH_rl78_TRUE@
$(rl78_libsim_a_OBJECTS
) $(rl78_libsim_a_LIBADD
): rl78
/hw-config.h
5779 @SIM_ENABLE_ARCH_rl78_TRUE@rl78
/modules.o
: rl78
/modules.c
5781 @SIM_ENABLE_ARCH_rl78_TRUE@rl78
/%.o
: common
/%.c
; $(SIM_COMPILE
)
5782 @SIM_ENABLE_ARCH_rl78_TRUE@
-@am__include@ rl78
/$(DEPDIR
)/*.Po
5783 @SIM_ENABLE_ARCH_rx_TRUE@
$(rx_libsim_a_OBJECTS
) $(rx_libsim_a_LIBADD
): rx
/hw-config.h
5785 @SIM_ENABLE_ARCH_rx_TRUE@rx
/modules.o
: rx
/modules.c
5787 @SIM_ENABLE_ARCH_rx_TRUE@rx
/%.o
: common
/%.c
; $(SIM_COMPILE
)
5788 @SIM_ENABLE_ARCH_rx_TRUE@
-@am__include@ rx
/$(DEPDIR
)/*.Po
5789 @SIM_ENABLE_ARCH_sh_TRUE@
$(sh_libsim_a_OBJECTS
) $(sh_libsim_a_LIBADD
): sh
/hw-config.h
5791 @SIM_ENABLE_ARCH_sh_TRUE@sh
/modules.o
: sh
/modules.c
5793 @SIM_ENABLE_ARCH_sh_TRUE@sh
/%.o
: common
/%.c
; $(SIM_COMPILE
)
5794 @SIM_ENABLE_ARCH_sh_TRUE@
-@am__include@ sh
/$(DEPDIR
)/*.Po
5796 @SIM_ENABLE_ARCH_sh_TRUE@sh
/modules.c
: |
$(sh_BUILD_OUTPUTS
)
5798 # These rules are copied from automake, but tweaked to use FOR_BUILD variables.
5799 @SIM_ENABLE_ARCH_sh_TRUE@sh
/gencode
$(EXEEXT
): $(sh_gencode_OBJECTS
) $(sh_gencode_DEPENDENCIES
) sh
/$(am__dirstamp
)
5800 @SIM_ENABLE_ARCH_sh_TRUE@
$(AM_V_CCLD
)$(LINK_FOR_BUILD
) $(sh_gencode_OBJECTS
) $(sh_gencode_LDADD
)
5802 # gencode is a build-time only tool. Override the default rules for it.
5803 @SIM_ENABLE_ARCH_sh_TRUE@sh
/gencode.o
: sh
/gencode.c
5804 @SIM_ENABLE_ARCH_sh_TRUE@
$(AM_V_CC
)$(COMPILE_FOR_BUILD
) -c
$< -o
$@
5806 @SIM_ENABLE_ARCH_sh_TRUE@sh
/code.c
: sh
/gencode
$(EXEEXT
)
5807 @SIM_ENABLE_ARCH_sh_TRUE@
$(AM_V_GEN
)$< -x
>$@
5809 @SIM_ENABLE_ARCH_sh_TRUE@sh
/ppi.c
: sh
/gencode
$(EXEEXT
)
5810 @SIM_ENABLE_ARCH_sh_TRUE@
$(AM_V_GEN
)$< -p
>$@
5812 @SIM_ENABLE_ARCH_sh_TRUE@sh
/table.c
: sh
/gencode
$(EXEEXT
)
5813 @SIM_ENABLE_ARCH_sh_TRUE@
$(AM_V_GEN
)$< -s
>$@
5814 @SIM_ENABLE_ARCH_v850_TRUE@
$(v850_libsim_a_OBJECTS
) $(v850_libsim_a_LIBADD
): v850
/hw-config.h
5816 @SIM_ENABLE_ARCH_v850_TRUE@v850
/modules.o
: v850
/modules.c
5818 @SIM_ENABLE_ARCH_v850_TRUE@v850
/%.o
: common
/%.c
; $(SIM_COMPILE
)
5819 @SIM_ENABLE_ARCH_v850_TRUE@
-@am__include@ v850
/$(DEPDIR
)/*.Po
5821 @SIM_ENABLE_ARCH_v850_TRUE@v850
/modules.c
: |
$(v850_BUILD_OUTPUTS
)
5823 @SIM_ENABLE_ARCH_v850_TRUE@
$(v850_BUILT_SRC_FROM_IGEN
): v850
/stamp-igen
5824 @SIM_ENABLE_ARCH_v850_TRUE@v850
/stamp-igen
: $(v850_IGEN_INSN
) $(v850_IGEN_DC
) $(IGEN
)
5825 @SIM_ENABLE_ARCH_v850_TRUE@
$(AM_V_GEN
)$(IGEN_RUN
) \
5826 @SIM_ENABLE_ARCH_v850_TRUE@
$(v850_IGEN_TRACE
) \
5827 @SIM_ENABLE_ARCH_v850_TRUE@
-G gen-direct-access \
5828 @SIM_ENABLE_ARCH_v850_TRUE@
-G gen-zero-r0 \
5829 @SIM_ENABLE_ARCH_v850_TRUE@
-i
$(v850_IGEN_INSN
) \
5830 @SIM_ENABLE_ARCH_v850_TRUE@
-o
$(v850_IGEN_DC
) \
5831 @SIM_ENABLE_ARCH_v850_TRUE@
-x \
5832 @SIM_ENABLE_ARCH_v850_TRUE@
-n icache.h
-hc v850
/icache.h \
5833 @SIM_ENABLE_ARCH_v850_TRUE@
-n icache.c
-c v850
/icache.c \
5834 @SIM_ENABLE_ARCH_v850_TRUE@
-n semantics.h
-hs v850
/semantics.h \
5835 @SIM_ENABLE_ARCH_v850_TRUE@
-n semantics.c
-s v850
/semantics.c \
5836 @SIM_ENABLE_ARCH_v850_TRUE@
-n idecode.h
-hd v850
/idecode.h \
5837 @SIM_ENABLE_ARCH_v850_TRUE@
-n idecode.c
-d v850
/idecode.c \
5838 @SIM_ENABLE_ARCH_v850_TRUE@
-n model.h
-hm v850
/model.h \
5839 @SIM_ENABLE_ARCH_v850_TRUE@
-n model.c
-m v850
/model.c \
5840 @SIM_ENABLE_ARCH_v850_TRUE@
-n support.h
-hf v850
/support.h \
5841 @SIM_ENABLE_ARCH_v850_TRUE@
-n support.c
-f v850
/support.c \
5842 @SIM_ENABLE_ARCH_v850_TRUE@
-n itable.h
-ht v850
/itable.h \
5843 @SIM_ENABLE_ARCH_v850_TRUE@
-n itable.c
-t v850
/itable.c \
5844 @SIM_ENABLE_ARCH_v850_TRUE@
-n engine.h
-he v850
/engine.h \
5845 @SIM_ENABLE_ARCH_v850_TRUE@
-n engine.c
-e v850
/engine.c \
5846 @SIM_ENABLE_ARCH_v850_TRUE@
-n irun.c
-r v850
/irun.c
5847 @SIM_ENABLE_ARCH_v850_TRUE@
$(AM_V_at
)touch
$@
5849 all-recursive
: $(SIM_ALL_RECURSIVE_DEPS
)
5851 install-data-local
: installdirs $(SIM_INSTALL_DATA_LOCAL_DEPS
)
5852 $(AM_V_at
)$(MKDIR_P
) $(DESTDIR
)$(libdir)
5853 lib
=`echo sim | sed '$(program_transform_name)'`; \
5854 for d in
$(SIM_ENABLED_ARCHES
); do \
5856 [ "$(SIM_PRIMARY_TARGET)" = "$$d" ] || n
="$$n-$$d"; \
5858 $(INSTALL_DATA
) $$d/libsim.a
$(DESTDIR
)$(libdir)/$$n || exit
1; \
5861 install-exec-local
: installdirs $(SIM_INSTALL_EXEC_LOCAL_DEPS
)
5862 $(AM_V_at
)$(MKDIR_P
) $(DESTDIR
)$(bindir)
5863 run
=`echo run | sed '$(program_transform_name)'`; \
5864 for d in
$(SIM_ENABLED_ARCHES
); do \
5866 [ "$(SIM_PRIMARY_TARGET)" = "$$d" ] || n
="$$n-$$d"; \
5867 $(LIBTOOL
) --mode
=install \
5868 $(INSTALL_PROGRAM
) $$d/run
$(EXEEXT
) $(DESTDIR
)$(bindir)/$$n$(EXEEXT
) || exit
1; \
5871 uninstall-local
: $(SIM_UNINSTALL_LOCAL_DEPS
)
5872 rm -f
$(DESTDIR
)$(bindir)/run
$(DESTDIR
)$(libdir)/libsim.a
5873 for d in
$(SIM_ENABLED_ARCHES
); do \
5874 rm -f
$(DESTDIR
)$(bindir)/run-
$$d $(DESTDIR
)$(libdir)/libsim-
$$d.a
; \
5877 # Tell versions [3.59,3.63) of GNU make to not export all variables.
5878 # Otherwise a system limit (for SysV at least) may be exceeded.