sim/Makefile.in

   1 # Makefile.in generated by automake 1.15.1 from Makefile.am.
   2 # @configure_input@
   3
   4 # Copyright (C) 1994-2017 Free Software Foundation, Inc.
   5
   6 # This Makefile.in is free software; the Free Software Foundation
   7 # gives unlimited permission to copy and/or distribute it,
   8 # with or without modifications, as long as this notice is preserved.
   9
  10 # This program is distributed in the hope that it will be useful,
  11 # but WITHOUT ANY WARRANTY, to the extent permitted by law; without
  12 # even the implied warranty of MERCHANTABILITY or FITNESS FOR A
  13 # PARTICULAR PURPOSE.
  14
  15 @SET_MAKE@
  16
  17 #   Copyright (C) 1993-2023 Free Software Foundation, Inc.
  18 #
  19 # This program is free software; you can redistribute it and/or modify
  20 # it under the terms of the GNU General Public License as published by
  21 # the Free Software Foundation; either version 3 of the License, or
  22 # (at your option) any later version.
  23 #
  24 # This program is distributed in the hope that it will be useful,
  25 # but WITHOUT ANY WARRANTY; without even the implied warranty of
  26 # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  27 # GNU General Public License for more details.
  28 #
  29 # You should have received a copy of the GNU General Public License
  30 # along with this program.  If not, see <http://www.gnu.org/licenses/>.
  31
  32
  33
  34
  35 VPATH = @srcdir@
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  89 am__make_dryrun = (target_option=n; $(am__make_running_with_option))
  90 am__make_keepgoing = (target_option=k; $(am__make_running_with_option))
  91 pkgdatadir = $(datadir)/@PACKAGE@
  92 pkgincludedir = $(includedir)/@PACKAGE@
  93 pkglibdir = $(libdir)/@PACKAGE@
  94 pkglibexecdir = $(libexecdir)/@PACKAGE@
  95 am__cd = CDPATH="$${ZSH_VERSION+.}$(PATH_SEPARATOR)" && cd
  96 install_sh_DATA = $(install_sh) -c -m 644
  97 install_sh_PROGRAM = $(install_sh) -c
  98 install_sh_SCRIPT = $(install_sh) -c
  99 INSTALL_HEADER = $(INSTALL_DATA)
 100 transform = $(program_transform_name)
 101 NORMAL_INSTALL = :
 102 PRE_INSTALL = :
 103 POST_INSTALL = :
 104 NORMAL_UNINSTALL = :
 105 PRE_UNINSTALL = :
 106 POST_UNINSTALL = :
 107 build_triplet = @build@
 108 host_triplet = @host@
 109 target_triplet = @target@
 110 check_PROGRAMS = $(am__EXEEXT_7) $(am__EXEEXT_8)
 111 noinst_PROGRAMS = $(am__EXEEXT_9) $(am__EXEEXT_10) $(am__EXEEXT_11) \
 112         $(am__EXEEXT_12) $(am__EXEEXT_13) $(am__EXEEXT_14) \
 113         $(am__EXEEXT_15) $(am__EXEEXT_16) $(am__EXEEXT_17) \
 114         $(am__EXEEXT_18) $(am__EXEEXT_19) $(am__EXEEXT_20) \
 115         $(am__EXEEXT_21) $(am__EXEEXT_22) $(am__EXEEXT_23) \
 116         $(am__EXEEXT_24) $(am__EXEEXT_25) $(am__EXEEXT_26) \
 117         $(am__EXEEXT_27) $(am__EXEEXT_28) $(am__EXEEXT_29) \
 118         $(am__EXEEXT_30) $(am__EXEEXT_31) $(am__EXEEXT_32) \
 119         $(am__EXEEXT_33) $(am__EXEEXT_34) $(am__EXEEXT_35) \
 120         $(am__EXEEXT_36) $(am__EXEEXT_37) $(am__EXEEXT_38) \
 121         $(am__EXEEXT_39) $(am__EXEEXT_40)
 122 EXTRA_PROGRAMS = $(am__EXEEXT_1) testsuite/common/bits-gen$(EXEEXT) \
 123         testsuite/common/fpu-tst$(EXEEXT) $(am__EXEEXT_2) \
 124         $(am__EXEEXT_3) $(am__EXEEXT_4) $(am__EXEEXT_5) \
 125         $(am__EXEEXT_6)
 126 @ENABLE_SIM_TRUE@am__append_1 = \
 127 @ENABLE_SIM_TRUE@       $(srcroot)/include/sim/callback.h \
 128 @ENABLE_SIM_TRUE@       $(srcroot)/include/sim/sim.h
 129
 130 @SIM_ENABLE_HW_TRUE@am__append_2 = \
 131 @SIM_ENABLE_HW_TRUE@    $(SIM_COMMON_HW_OBJS) \
 132 @SIM_ENABLE_HW_TRUE@    $(SIM_HW_SOCKSER)
 133
 134 TESTS = testsuite/common/bits32m0$(EXEEXT) \
 135         testsuite/common/bits32m31$(EXEEXT) \
 136         testsuite/common/bits64m0$(EXEEXT) \
 137         testsuite/common/bits64m63$(EXEEXT) \
 138         testsuite/common/alu-tst$(EXEEXT)
 139 @SIM_ENABLE_ARCH_aarch64_TRUE@am__append_3 = aarch64/libsim.a
 140 @SIM_ENABLE_ARCH_aarch64_TRUE@am__append_4 = aarch64/run
 141 @SIM_ENABLE_ARCH_arm_TRUE@am__append_5 = arm/libsim.a
 142 @SIM_ENABLE_ARCH_arm_TRUE@am__append_6 = arm/run
 143 @SIM_ENABLE_ARCH_avr_TRUE@am__append_7 = avr/libsim.a
 144 @SIM_ENABLE_ARCH_avr_TRUE@am__append_8 = avr/run
 145 @SIM_ENABLE_ARCH_bfin_TRUE@am__append_9 = bfin/libsim.a
 146 @SIM_ENABLE_ARCH_bfin_TRUE@am__append_10 = bfin/run
 147 @SIM_ENABLE_ARCH_bpf_TRUE@am__append_11 = bpf/libsim.a
 148 @SIM_ENABLE_ARCH_bpf_TRUE@am__append_12 = bpf/run
 149 @SIM_ENABLE_ARCH_bpf_TRUE@am__append_13 = \
 150 @SIM_ENABLE_ARCH_bpf_TRUE@      bpf/eng-le.h \
 151 @SIM_ENABLE_ARCH_bpf_TRUE@      bpf/eng-be.h
 152
 153 @SIM_ENABLE_ARCH_bpf_TRUE@am__append_14 = $(bpf_BUILD_OUTPUTS)
 154 @SIM_ENABLE_ARCH_cr16_TRUE@am__append_15 = cr16/libsim.a
 155 @SIM_ENABLE_ARCH_cr16_TRUE@am__append_16 = cr16/run
 156 @SIM_ENABLE_ARCH_cr16_TRUE@am__append_17 = cr16/simops.h
 157 @SIM_ENABLE_ARCH_cr16_TRUE@am__append_18 = cr16/gencode
 158 @SIM_ENABLE_ARCH_cr16_TRUE@am__append_19 = $(cr16_BUILD_OUTPUTS)
 159 @SIM_ENABLE_ARCH_cris_TRUE@am__append_20 = cris/libsim.a
 160 @SIM_ENABLE_ARCH_cris_TRUE@am__append_21 = cris/run
 161 @SIM_ENABLE_ARCH_cris_TRUE@am__append_22 = cris/rvdummy
 162 @SIM_ENABLE_ARCH_cris_TRUE@am__append_23 = \
 163 @SIM_ENABLE_ARCH_cris_TRUE@     cris/engv10.h \
 164 @SIM_ENABLE_ARCH_cris_TRUE@     cris/engv32.h
 165
 166 @SIM_ENABLE_ARCH_cris_TRUE@am__append_24 = $(cris_BUILD_OUTPUTS)
 167 @SIM_ENABLE_ARCH_d10v_TRUE@am__append_25 = d10v/libsim.a
 168 @SIM_ENABLE_ARCH_d10v_TRUE@am__append_26 = d10v/run
 169 @SIM_ENABLE_ARCH_d10v_TRUE@am__append_27 = d10v/simops.h
 170 @SIM_ENABLE_ARCH_d10v_TRUE@am__append_28 = d10v/gencode
 171 @SIM_ENABLE_ARCH_d10v_TRUE@am__append_29 = $(d10v_BUILD_OUTPUTS)
 172 @SIM_ENABLE_ARCH_erc32_TRUE@am__append_30 = erc32/libsim.a
 173 @SIM_ENABLE_ARCH_erc32_TRUE@am__append_31 = erc32/run erc32/sis
 174 @SIM_ENABLE_ARCH_erc32_TRUE@am__append_32 = sim-%D-install-exec-local
 175 @SIM_ENABLE_ARCH_erc32_TRUE@am__append_33 = sim-erc32-uninstall-local
 176 @SIM_ENABLE_ARCH_examples_TRUE@am__append_34 = example-synacor/libsim.a
 177 @SIM_ENABLE_ARCH_examples_TRUE@am__append_35 = example-synacor/run
 178 @SIM_ENABLE_ARCH_frv_TRUE@am__append_36 = frv/libsim.a
 179 @SIM_ENABLE_ARCH_frv_TRUE@am__append_37 = frv/run
 180 @SIM_ENABLE_ARCH_frv_TRUE@am__append_38 = frv/eng.h
 181 @SIM_ENABLE_ARCH_frv_TRUE@am__append_39 = $(frv_BUILD_OUTPUTS)
 182 @SIM_ENABLE_ARCH_ft32_TRUE@am__append_40 = ft32/libsim.a
 183 @SIM_ENABLE_ARCH_ft32_TRUE@am__append_41 = ft32/run
 184 @SIM_ENABLE_ARCH_h8300_TRUE@am__append_42 = h8300/libsim.a
 185 @SIM_ENABLE_ARCH_h8300_TRUE@am__append_43 = h8300/run
 186 @SIM_ENABLE_ARCH_iq2000_TRUE@am__append_44 = iq2000/libsim.a
 187 @SIM_ENABLE_ARCH_iq2000_TRUE@am__append_45 = iq2000/run
 188 @SIM_ENABLE_ARCH_iq2000_TRUE@am__append_46 = iq2000/eng.h
 189 @SIM_ENABLE_ARCH_iq2000_TRUE@am__append_47 = $(iq2000_BUILD_OUTPUTS)
 190 @SIM_ENABLE_ARCH_lm32_TRUE@am__append_48 = lm32/libsim.a
 191 @SIM_ENABLE_ARCH_lm32_TRUE@am__append_49 = lm32/run
 192 @SIM_ENABLE_ARCH_lm32_TRUE@am__append_50 = lm32/eng.h
 193 @SIM_ENABLE_ARCH_lm32_TRUE@am__append_51 = $(lm32_BUILD_OUTPUTS)
 194 @SIM_ENABLE_ARCH_m32c_TRUE@am__append_52 = m32c/libsim.a
 195 @SIM_ENABLE_ARCH_m32c_TRUE@am__append_53 = m32c/run
 196 @SIM_ENABLE_ARCH_m32c_TRUE@am__append_54 = m32c/opc2c
 197 @SIM_ENABLE_ARCH_m32c_TRUE@am__append_55 = \
 198 @SIM_ENABLE_ARCH_m32c_TRUE@     $(m32c_BUILD_OUTPUTS) \
 199 @SIM_ENABLE_ARCH_m32c_TRUE@     m32c/m32c.c.log \
 200 @SIM_ENABLE_ARCH_m32c_TRUE@     m32c/r8c.c.log
 201
 202 @SIM_ENABLE_ARCH_m32r_TRUE@am__append_56 = m32r/libsim.a
 203 @SIM_ENABLE_ARCH_m32r_TRUE@am__append_57 = m32r/run
 204 @SIM_ENABLE_ARCH_m32r_TRUE@am__append_58 = \
 205 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/eng.h \
 206 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/engx.h \
 207 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/eng2.h
 208
 209 @SIM_ENABLE_ARCH_m32r_TRUE@am__append_59 = $(m32r_BUILD_OUTPUTS)
 210 @SIM_ENABLE_ARCH_m68hc11_TRUE@am__append_60 = m68hc11/libsim.a
 211 @SIM_ENABLE_ARCH_m68hc11_TRUE@am__append_61 = m68hc11/run
 212 @SIM_ENABLE_ARCH_m68hc11_TRUE@am__append_62 = m68hc11/gencode
 213 @SIM_ENABLE_ARCH_m68hc11_TRUE@am__append_63 = $(m68hc11_BUILD_OUTPUTS)
 214 @SIM_ENABLE_ARCH_mcore_TRUE@am__append_64 = mcore/libsim.a
 215 @SIM_ENABLE_ARCH_mcore_TRUE@am__append_65 = mcore/run
 216 @SIM_ENABLE_ARCH_microblaze_TRUE@am__append_66 = microblaze/libsim.a
 217 @SIM_ENABLE_ARCH_microblaze_TRUE@am__append_67 = microblaze/run
 218 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_SINGLE_TRUE@am__append_68 = \
 219 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_SINGLE_TRUE@      mips/support.o \
 220 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_SINGLE_TRUE@      mips/itable.o \
 221 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_SINGLE_TRUE@      mips/semantics.o \
 222 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_SINGLE_TRUE@      mips/idecode.o \
 223 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_SINGLE_TRUE@      mips/icache.o \
 224 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_SINGLE_TRUE@      mips/engine.o \
 225 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_SINGLE_TRUE@      mips/irun.o
 226
 227 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@am__append_69 = \
 228 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@ mips/m16_support.o \
 229 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@ mips/m16_semantics.o \
 230 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@ mips/m16_idecode.o \
 231 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@ mips/m16_icache.o \
 232 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@ \
 233 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@ mips/m32_support.o \
 234 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@ mips/m32_semantics.o \
 235 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@ mips/m32_idecode.o \
 236 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@ mips/m32_icache.o \
 237 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@ \
 238 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@ mips/itable.o \
 239 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@ mips/m16run.o
 240
 241 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_MULTI_TRUE@am__append_70 = \
 242 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_MULTI_TRUE@       $(SIM_MIPS_MULTI_OBJ) \
 243 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_MULTI_TRUE@       mips/itable.o \
 244 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_MULTI_TRUE@       mips/multi-run.o
 245
 246 @SIM_ENABLE_ARCH_mips_TRUE@am__append_71 = mips/libsim.a
 247 @SIM_ENABLE_ARCH_mips_TRUE@am__append_72 = mips/run
 248 @SIM_ENABLE_ARCH_mips_TRUE@am__append_73 = mips/itable.h \
 249 @SIM_ENABLE_ARCH_mips_TRUE@     $(SIM_MIPS_MULTI_SRC)
 250 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_SINGLE_TRUE@am__append_74 = \
 251 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_SINGLE_TRUE@      $(mips_BUILT_SRC_FROM_GEN_MODE_SINGLE) \
 252 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_SINGLE_TRUE@      mips/stamp-gen-mode-single
 253
 254 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@am__append_75 = \
 255 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@ $(mips_BUILT_SRC_FROM_GEN_MODE_M16_M16) \
 256 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@ $(mips_BUILT_SRC_FROM_GEN_MODE_M16_M32) \
 257 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@ mips/stamp-gen-mode-m16-m16 \
 258 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@ mips/stamp-gen-mode-m16-m32
 259
 260 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_MULTI_TRUE@am__append_76 = \
 261 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_MULTI_TRUE@       $(SIM_MIPS_MULTI_SRC) \
 262 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_MULTI_TRUE@       mips/stamp-gen-mode-multi-igen \
 263 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_MULTI_TRUE@       mips/stamp-gen-mode-multi-run
 264
 265 @SIM_ENABLE_ARCH_mips_TRUE@am__append_77 = $(mips_BUILD_OUTPUTS)
 266 @SIM_ENABLE_ARCH_mips_TRUE@am__append_78 = mips/multi-include.h mips/multi-run.c
 267 @SIM_ENABLE_ARCH_mn10300_TRUE@am__append_79 = mn10300/libsim.a
 268 @SIM_ENABLE_ARCH_mn10300_TRUE@am__append_80 = mn10300/run
 269 @SIM_ENABLE_ARCH_mn10300_TRUE@am__append_81 = \
 270 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/icache.h \
 271 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/idecode.h \
 272 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/semantics.h \
 273 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/model.h \
 274 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/support.h \
 275 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/itable.h \
 276 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/engine.h
 277
 278 @SIM_ENABLE_ARCH_mn10300_TRUE@am__append_82 = $(mn10300_BUILD_OUTPUTS)
 279 @SIM_ENABLE_ARCH_moxie_TRUE@am__append_83 = moxie/libsim.a
 280 @SIM_ENABLE_ARCH_moxie_TRUE@am__append_84 = moxie/run
 281 @SIM_ENABLE_ARCH_msp430_TRUE@am__append_85 = msp430/libsim.a
 282 @SIM_ENABLE_ARCH_msp430_TRUE@am__append_86 = msp430/run
 283 @SIM_ENABLE_ARCH_or1k_TRUE@am__append_87 = or1k/libsim.a
 284 @SIM_ENABLE_ARCH_or1k_TRUE@am__append_88 = or1k/run
 285 @SIM_ENABLE_ARCH_or1k_TRUE@am__append_89 = or1k/eng.h
 286 @SIM_ENABLE_ARCH_or1k_TRUE@am__append_90 = $(or1k_BUILD_OUTPUTS)
 287 @SIM_ENABLE_ARCH_ppc_TRUE@am__append_91 = common/libcommon.a
 288 @SIM_ENABLE_ARCH_ppc_TRUE@am__append_92 = ppc/run
 289 @SIM_ENABLE_ARCH_pru_TRUE@am__append_93 = pru/libsim.a
 290 @SIM_ENABLE_ARCH_pru_TRUE@am__append_94 = pru/run
 291 @SIM_ENABLE_ARCH_riscv_TRUE@am__append_95 = riscv/libsim.a
 292 @SIM_ENABLE_ARCH_riscv_TRUE@am__append_96 = riscv/run
 293 @SIM_ENABLE_ARCH_rl78_TRUE@am__append_97 = rl78/libsim.a
 294 @SIM_ENABLE_ARCH_rl78_TRUE@am__append_98 = rl78/run
 295 @SIM_ENABLE_ARCH_rx_TRUE@am__append_99 = rx/libsim.a
 296 @SIM_ENABLE_ARCH_rx_TRUE@am__append_100 = rx/run
 297 @SIM_ENABLE_ARCH_sh_TRUE@am__append_101 = sh/libsim.a
 298 @SIM_ENABLE_ARCH_sh_TRUE@am__append_102 = sh/run
 299 @SIM_ENABLE_ARCH_sh_TRUE@am__append_103 = \
 300 @SIM_ENABLE_ARCH_sh_TRUE@       sh/code.c \
 301 @SIM_ENABLE_ARCH_sh_TRUE@       sh/ppi.c
 302
 303 @SIM_ENABLE_ARCH_sh_TRUE@am__append_104 = sh/gencode
 304 @SIM_ENABLE_ARCH_sh_TRUE@am__append_105 = $(sh_BUILD_OUTPUTS)
 305 @SIM_ENABLE_ARCH_v850_TRUE@am__append_106 = v850/libsim.a
 306 @SIM_ENABLE_ARCH_v850_TRUE@am__append_107 = v850/run
 307 @SIM_ENABLE_ARCH_v850_TRUE@am__append_108 = \
 308 @SIM_ENABLE_ARCH_v850_TRUE@     v850/icache.h \
 309 @SIM_ENABLE_ARCH_v850_TRUE@     v850/idecode.h \
 310 @SIM_ENABLE_ARCH_v850_TRUE@     v850/semantics.h \
 311 @SIM_ENABLE_ARCH_v850_TRUE@     v850/model.h \
 312 @SIM_ENABLE_ARCH_v850_TRUE@     v850/support.h \
 313 @SIM_ENABLE_ARCH_v850_TRUE@     v850/itable.h \
 314 @SIM_ENABLE_ARCH_v850_TRUE@     v850/engine.h
 315
 316 @SIM_ENABLE_ARCH_v850_TRUE@am__append_109 = $(v850_BUILD_OUTPUTS)
 317 subdir = .
 318 ACLOCAL_M4 = $(top_srcdir)/aclocal.m4
 319 am__aclocal_m4_deps = $(top_srcdir)/../config/acx.m4 \
 320         $(top_srcdir)/../config/depstand.m4 \
 321         $(top_srcdir)/../config/lead-dot.m4 \
 322         $(top_srcdir)/../config/override.m4 \
 323         $(top_srcdir)/../config/pkg.m4 $(top_srcdir)/../libtool.m4 \
 324         $(top_srcdir)/../ltoptions.m4 $(top_srcdir)/../ltsugar.m4 \
 325         $(top_srcdir)/../ltversion.m4 $(top_srcdir)/../lt~obsolete.m4 \
 326         $(top_srcdir)/m4/sim_ac_option_alignment.m4 \
 327         $(top_srcdir)/m4/sim_ac_option_assert.m4 \
 328         $(top_srcdir)/m4/sim_ac_option_cgen_maint.m4 \
 329         $(top_srcdir)/m4/sim_ac_option_debug.m4 \
 330         $(top_srcdir)/m4/sim_ac_option_endian.m4 \
 331         $(top_srcdir)/m4/sim_ac_option_environment.m4 \
 332         $(top_srcdir)/m4/sim_ac_option_hardware.m4 \
 333         $(top_srcdir)/m4/sim_ac_option_inline.m4 \
 334         $(top_srcdir)/m4/sim_ac_option_profile.m4 \
 335         $(top_srcdir)/m4/sim_ac_option_reserved_bits.m4 \
 336         $(top_srcdir)/m4/sim_ac_option_scache.m4 \
 337         $(top_srcdir)/m4/sim_ac_option_smp.m4 \
 338         $(top_srcdir)/m4/sim_ac_option_stdio.m4 \
 339         $(top_srcdir)/m4/sim_ac_option_trace.m4 \
 340         $(top_srcdir)/m4/sim_ac_option_warnings.m4 \
 341         $(top_srcdir)/m4/sim_ac_platform.m4 \
 342         $(top_srcdir)/m4/sim_ac_toolchain.m4 \
 343         $(top_srcdir)/frv/acinclude.m4 $(top_srcdir)/mips/acinclude.m4 \
 344         $(top_srcdir)/riscv/acinclude.m4 $(top_srcdir)/rx/acinclude.m4 \
 345         $(top_srcdir)/configure.ac
 346 am__configure_deps = $(am__aclocal_m4_deps) $(CONFIGURE_DEPENDENCIES) \
 347         $(ACLOCAL_M4)
 348 DIST_COMMON = $(srcdir)/Makefile.am $(top_srcdir)/configure \
 349         $(am__configure_deps) $(am__pkginclude_HEADERS_DIST)
 350 am__CONFIG_DISTCLEAN_FILES = config.status config.cache config.log \
 351  configure.lineno config.status.lineno
 352 mkinstalldirs = $(SHELL) $(top_srcdir)/../mkinstalldirs
 353 CONFIG_HEADER = config.h
 354 CONFIG_CLEAN_FILES = aarch64/.gdbinit arm/.gdbinit avr/.gdbinit \
 355         bfin/.gdbinit bpf/.gdbinit cr16/.gdbinit cris/.gdbinit \
 356         d10v/.gdbinit frv/.gdbinit ft32/.gdbinit h8300/.gdbinit \
 357         iq2000/.gdbinit lm32/.gdbinit m32c/.gdbinit m32r/.gdbinit \
 358         m68hc11/.gdbinit mcore/.gdbinit microblaze/.gdbinit \
 359         mips/.gdbinit mn10300/.gdbinit moxie/.gdbinit msp430/.gdbinit \
 360         or1k/.gdbinit ppc/.gdbinit pru/.gdbinit riscv/.gdbinit \
 361         rl78/.gdbinit rx/.gdbinit sh/.gdbinit erc32/.gdbinit \
 362         v850/.gdbinit example-synacor/.gdbinit arch-subdir.mk .gdbinit
 363 CONFIG_CLEAN_VPATH_FILES =
 364 LIBRARIES = $(noinst_LIBRARIES)
 365 ARFLAGS = cru
 366 AM_V_AR = $(am__v_AR_@AM_V@)
 367 am__v_AR_ = $(am__v_AR_@AM_DEFAULT_V@)
 368 am__v_AR_0 = @echo "  AR      " $@;
 369 am__v_AR_1 =
 370 aarch64_libsim_a_AR = $(AR) $(ARFLAGS)
 371 @SIM_ENABLE_ARCH_aarch64_TRUE@aarch64_libsim_a_DEPENDENCIES =  \
 372 @SIM_ENABLE_ARCH_aarch64_TRUE@  $(patsubst \
 373 @SIM_ENABLE_ARCH_aarch64_TRUE@  %,aarch64/%,$(SIM_NEW_COMMON_OBJS)) \
 374 @SIM_ENABLE_ARCH_aarch64_TRUE@  $(patsubst \
 375 @SIM_ENABLE_ARCH_aarch64_TRUE@  %,aarch64/dv-%.o,$(SIM_HW_DEVICES)) \
 376 @SIM_ENABLE_ARCH_aarch64_TRUE@  aarch64/cpustate.o \
 377 @SIM_ENABLE_ARCH_aarch64_TRUE@  aarch64/interp.o \
 378 @SIM_ENABLE_ARCH_aarch64_TRUE@  aarch64/memory.o \
 379 @SIM_ENABLE_ARCH_aarch64_TRUE@  aarch64/sim-resume.o \
 380 @SIM_ENABLE_ARCH_aarch64_TRUE@  aarch64/simulator.o
 381 am__dirstamp = $(am__leading_dot)dirstamp
 382 am__objects_1 = common/callback.$(OBJEXT) common/portability.$(OBJEXT) \
 383         common/sim-load.$(OBJEXT) common/syscall.$(OBJEXT) \
 384         common/target-newlib-errno.$(OBJEXT) \
 385         common/target-newlib-open.$(OBJEXT) \
 386         common/target-newlib-signal.$(OBJEXT) \
 387         common/target-newlib-syscall.$(OBJEXT) \
 388         common/version.$(OBJEXT)
 389 @SIM_ENABLE_ARCH_aarch64_TRUE@am_aarch64_libsim_a_OBJECTS =  \
 390 @SIM_ENABLE_ARCH_aarch64_TRUE@  $(am__objects_1)
 391 @SIM_ENABLE_ARCH_aarch64_TRUE@nodist_aarch64_libsim_a_OBJECTS =  \
 392 @SIM_ENABLE_ARCH_aarch64_TRUE@  aarch64/modules.$(OBJEXT)
 393 aarch64_libsim_a_OBJECTS = $(am_aarch64_libsim_a_OBJECTS) \
 394         $(nodist_aarch64_libsim_a_OBJECTS)
 395 arm_libsim_a_AR = $(AR) $(ARFLAGS)
 396 @SIM_ENABLE_ARCH_arm_TRUE@arm_libsim_a_DEPENDENCIES = arm/wrapper.o \
 397 @SIM_ENABLE_ARCH_arm_TRUE@      $(patsubst \
 398 @SIM_ENABLE_ARCH_arm_TRUE@      %,arm/%,$(SIM_NEW_COMMON_OBJS)) \
 399 @SIM_ENABLE_ARCH_arm_TRUE@      $(patsubst \
 400 @SIM_ENABLE_ARCH_arm_TRUE@      %,arm/dv-%.o,$(SIM_HW_DEVICES)) \
 401 @SIM_ENABLE_ARCH_arm_TRUE@      arm/armemu.o arm/armemu32.o \
 402 @SIM_ENABLE_ARCH_arm_TRUE@      arm/arminit.o arm/armos.o \
 403 @SIM_ENABLE_ARCH_arm_TRUE@      arm/armsupp.o arm/armvirt.o \
 404 @SIM_ENABLE_ARCH_arm_TRUE@      arm/thumbemu.o arm/armcopro.o \
 405 @SIM_ENABLE_ARCH_arm_TRUE@      arm/maverick.o arm/iwmmxt.o
 406 @SIM_ENABLE_ARCH_arm_TRUE@am_arm_libsim_a_OBJECTS = $(am__objects_1)
 407 @SIM_ENABLE_ARCH_arm_TRUE@nodist_arm_libsim_a_OBJECTS =  \
 408 @SIM_ENABLE_ARCH_arm_TRUE@      arm/modules.$(OBJEXT)
 409 arm_libsim_a_OBJECTS = $(am_arm_libsim_a_OBJECTS) \
 410         $(nodist_arm_libsim_a_OBJECTS)
 411 avr_libsim_a_AR = $(AR) $(ARFLAGS)
 412 @SIM_ENABLE_ARCH_avr_TRUE@avr_libsim_a_DEPENDENCIES = avr/interp.o \
 413 @SIM_ENABLE_ARCH_avr_TRUE@      $(patsubst \
 414 @SIM_ENABLE_ARCH_avr_TRUE@      %,avr/%,$(SIM_NEW_COMMON_OBJS)) \
 415 @SIM_ENABLE_ARCH_avr_TRUE@      $(patsubst \
 416 @SIM_ENABLE_ARCH_avr_TRUE@      %,avr/dv-%.o,$(SIM_HW_DEVICES)) \
 417 @SIM_ENABLE_ARCH_avr_TRUE@      avr/sim-resume.o
 418 @SIM_ENABLE_ARCH_avr_TRUE@am_avr_libsim_a_OBJECTS = $(am__objects_1)
 419 @SIM_ENABLE_ARCH_avr_TRUE@nodist_avr_libsim_a_OBJECTS =  \
 420 @SIM_ENABLE_ARCH_avr_TRUE@      avr/modules.$(OBJEXT)
 421 avr_libsim_a_OBJECTS = $(am_avr_libsim_a_OBJECTS) \
 422         $(nodist_avr_libsim_a_OBJECTS)
 423 bfin_libsim_a_AR = $(AR) $(ARFLAGS)
 424 @SIM_ENABLE_ARCH_bfin_TRUE@bfin_libsim_a_DEPENDENCIES = $(patsubst \
 425 @SIM_ENABLE_ARCH_bfin_TRUE@     %,bfin/%,$(SIM_NEW_COMMON_OBJS)) \
 426 @SIM_ENABLE_ARCH_bfin_TRUE@     $(patsubst \
 427 @SIM_ENABLE_ARCH_bfin_TRUE@     %,bfin/dv-%.o,$(SIM_HW_DEVICES)) \
 428 @SIM_ENABLE_ARCH_bfin_TRUE@     $(patsubst \
 429 @SIM_ENABLE_ARCH_bfin_TRUE@     %,bfin/dv-%.o,$(bfin_SIM_EXTRA_HW_DEVICES)) \
 430 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin/bfin-sim.o bfin/devices.o \
 431 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin/gui.o bfin/interp.o \
 432 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin/machs.o bfin/sim-resume.o
 433 @SIM_ENABLE_ARCH_bfin_TRUE@am_bfin_libsim_a_OBJECTS =  \
 434 @SIM_ENABLE_ARCH_bfin_TRUE@     $(am__objects_1)
 435 @SIM_ENABLE_ARCH_bfin_TRUE@nodist_bfin_libsim_a_OBJECTS =  \
 436 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin/modules.$(OBJEXT)
 437 bfin_libsim_a_OBJECTS = $(am_bfin_libsim_a_OBJECTS) \
 438         $(nodist_bfin_libsim_a_OBJECTS)
 439 bpf_libsim_a_AR = $(AR) $(ARFLAGS)
 440 @SIM_ENABLE_ARCH_bpf_TRUE@bpf_libsim_a_DEPENDENCIES = $(patsubst \
 441 @SIM_ENABLE_ARCH_bpf_TRUE@      %,bpf/%,$(SIM_NEW_COMMON_OBJS)) \
 442 @SIM_ENABLE_ARCH_bpf_TRUE@      $(patsubst \
 443 @SIM_ENABLE_ARCH_bpf_TRUE@      %,bpf/dv-%.o,$(SIM_HW_DEVICES)) \
 444 @SIM_ENABLE_ARCH_bpf_TRUE@      bpf/cgen-run.o bpf/cgen-scache.o \
 445 @SIM_ENABLE_ARCH_bpf_TRUE@      bpf/cgen-trace.o bpf/cgen-utils.o \
 446 @SIM_ENABLE_ARCH_bpf_TRUE@      bpf/arch.o bpf/cpu.o bpf/decode-le.o \
 447 @SIM_ENABLE_ARCH_bpf_TRUE@      bpf/decode-be.o bpf/sem-le.o \
 448 @SIM_ENABLE_ARCH_bpf_TRUE@      bpf/sem-be.o bpf/mloop-le.o \
 449 @SIM_ENABLE_ARCH_bpf_TRUE@      bpf/mloop-be.o bpf/bpf.o \
 450 @SIM_ENABLE_ARCH_bpf_TRUE@      bpf/bpf-helpers.o bpf/sim-if.o \
 451 @SIM_ENABLE_ARCH_bpf_TRUE@      bpf/traps.o
 452 @SIM_ENABLE_ARCH_bpf_TRUE@am_bpf_libsim_a_OBJECTS = $(am__objects_1)
 453 @SIM_ENABLE_ARCH_bpf_TRUE@nodist_bpf_libsim_a_OBJECTS =  \
 454 @SIM_ENABLE_ARCH_bpf_TRUE@      bpf/modules.$(OBJEXT)
 455 bpf_libsim_a_OBJECTS = $(am_bpf_libsim_a_OBJECTS) \
 456         $(nodist_bpf_libsim_a_OBJECTS)
 457 common_libcommon_a_AR = $(AR) $(ARFLAGS)
 458 common_libcommon_a_LIBADD =
 459 am_common_libcommon_a_OBJECTS = common/callback.$(OBJEXT) \
 460         common/portability.$(OBJEXT) common/sim-load.$(OBJEXT) \
 461         common/syscall.$(OBJEXT) common/target-newlib-errno.$(OBJEXT) \
 462         common/target-newlib-open.$(OBJEXT) \
 463         common/target-newlib-signal.$(OBJEXT) \
 464         common/target-newlib-syscall.$(OBJEXT) \
 465         common/version.$(OBJEXT)
 466 common_libcommon_a_OBJECTS = $(am_common_libcommon_a_OBJECTS)
 467 cr16_libsim_a_AR = $(AR) $(ARFLAGS)
 468 @SIM_ENABLE_ARCH_cr16_TRUE@cr16_libsim_a_DEPENDENCIES = $(patsubst \
 469 @SIM_ENABLE_ARCH_cr16_TRUE@     %,cr16/%,$(SIM_NEW_COMMON_OBJS)) \
 470 @SIM_ENABLE_ARCH_cr16_TRUE@     $(patsubst \
 471 @SIM_ENABLE_ARCH_cr16_TRUE@     %,cr16/dv-%.o,$(SIM_HW_DEVICES)) \
 472 @SIM_ENABLE_ARCH_cr16_TRUE@     cr16/interp.o cr16/sim-resume.o \
 473 @SIM_ENABLE_ARCH_cr16_TRUE@     cr16/simops.o cr16/table.o
 474 @SIM_ENABLE_ARCH_cr16_TRUE@am_cr16_libsim_a_OBJECTS =  \
 475 @SIM_ENABLE_ARCH_cr16_TRUE@     $(am__objects_1)
 476 @SIM_ENABLE_ARCH_cr16_TRUE@nodist_cr16_libsim_a_OBJECTS =  \
 477 @SIM_ENABLE_ARCH_cr16_TRUE@     cr16/modules.$(OBJEXT)
 478 cr16_libsim_a_OBJECTS = $(am_cr16_libsim_a_OBJECTS) \
 479         $(nodist_cr16_libsim_a_OBJECTS)
 480 cris_libsim_a_AR = $(AR) $(ARFLAGS)
 481 @SIM_ENABLE_ARCH_cris_TRUE@cris_libsim_a_DEPENDENCIES = $(patsubst \
 482 @SIM_ENABLE_ARCH_cris_TRUE@     %,cris/%,$(SIM_NEW_COMMON_OBJS)) \
 483 @SIM_ENABLE_ARCH_cris_TRUE@     $(patsubst \
 484 @SIM_ENABLE_ARCH_cris_TRUE@     %,cris/dv-%.o,$(SIM_HW_DEVICES)) \
 485 @SIM_ENABLE_ARCH_cris_TRUE@     $(patsubst \
 486 @SIM_ENABLE_ARCH_cris_TRUE@     %,cris/dv-%.o,$(cris_SIM_EXTRA_HW_DEVICES)) \
 487 @SIM_ENABLE_ARCH_cris_TRUE@     cris/cgen-run.o cris/cgen-scache.o \
 488 @SIM_ENABLE_ARCH_cris_TRUE@     cris/cgen-trace.o cris/cgen-utils.o \
 489 @SIM_ENABLE_ARCH_cris_TRUE@     cris/arch.o cris/crisv10f.o \
 490 @SIM_ENABLE_ARCH_cris_TRUE@     cris/cpuv10.o cris/decodev10.o \
 491 @SIM_ENABLE_ARCH_cris_TRUE@     cris/modelv10.o cris/mloopv10f.o \
 492 @SIM_ENABLE_ARCH_cris_TRUE@     cris/crisv32f.o cris/cpuv32.o \
 493 @SIM_ENABLE_ARCH_cris_TRUE@     cris/decodev32.o cris/modelv32.o \
 494 @SIM_ENABLE_ARCH_cris_TRUE@     cris/mloopv32f.o cris/sim-if.o \
 495 @SIM_ENABLE_ARCH_cris_TRUE@     cris/traps.o
 496 @SIM_ENABLE_ARCH_cris_TRUE@am_cris_libsim_a_OBJECTS =  \
 497 @SIM_ENABLE_ARCH_cris_TRUE@     $(am__objects_1)
 498 @SIM_ENABLE_ARCH_cris_TRUE@nodist_cris_libsim_a_OBJECTS =  \
 499 @SIM_ENABLE_ARCH_cris_TRUE@     cris/modules.$(OBJEXT)
 500 cris_libsim_a_OBJECTS = $(am_cris_libsim_a_OBJECTS) \
 501         $(nodist_cris_libsim_a_OBJECTS)
 502 d10v_libsim_a_AR = $(AR) $(ARFLAGS)
 503 @SIM_ENABLE_ARCH_d10v_TRUE@d10v_libsim_a_DEPENDENCIES = d10v/interp.o \
 504 @SIM_ENABLE_ARCH_d10v_TRUE@     $(patsubst \
 505 @SIM_ENABLE_ARCH_d10v_TRUE@     %,d10v/%,$(SIM_NEW_COMMON_OBJS)) \
 506 @SIM_ENABLE_ARCH_d10v_TRUE@     $(patsubst \
 507 @SIM_ENABLE_ARCH_d10v_TRUE@     %,d10v/dv-%.o,$(SIM_HW_DEVICES)) \
 508 @SIM_ENABLE_ARCH_d10v_TRUE@     d10v/endian.o d10v/sim-resume.o \
 509 @SIM_ENABLE_ARCH_d10v_TRUE@     d10v/simops.o d10v/table.o
 510 @SIM_ENABLE_ARCH_d10v_TRUE@am_d10v_libsim_a_OBJECTS =  \
 511 @SIM_ENABLE_ARCH_d10v_TRUE@     $(am__objects_1)
 512 @SIM_ENABLE_ARCH_d10v_TRUE@nodist_d10v_libsim_a_OBJECTS =  \
 513 @SIM_ENABLE_ARCH_d10v_TRUE@     d10v/modules.$(OBJEXT)
 514 d10v_libsim_a_OBJECTS = $(am_d10v_libsim_a_OBJECTS) \
 515         $(nodist_d10v_libsim_a_OBJECTS)
 516 erc32_libsim_a_AR = $(AR) $(ARFLAGS)
 517 @SIM_ENABLE_ARCH_erc32_TRUE@erc32_libsim_a_DEPENDENCIES =  \
 518 @SIM_ENABLE_ARCH_erc32_TRUE@    erc32/erc32.o erc32/exec.o \
 519 @SIM_ENABLE_ARCH_erc32_TRUE@    erc32/float.o erc32/func.o \
 520 @SIM_ENABLE_ARCH_erc32_TRUE@    erc32/help.o erc32/interf.o
 521 @SIM_ENABLE_ARCH_erc32_TRUE@am_erc32_libsim_a_OBJECTS =  \
 522 @SIM_ENABLE_ARCH_erc32_TRUE@    $(am__objects_1)
 523 @SIM_ENABLE_ARCH_erc32_TRUE@nodist_erc32_libsim_a_OBJECTS =  \
 524 @SIM_ENABLE_ARCH_erc32_TRUE@    erc32/modules.$(OBJEXT)
 525 erc32_libsim_a_OBJECTS = $(am_erc32_libsim_a_OBJECTS) \
 526         $(nodist_erc32_libsim_a_OBJECTS)
 527 example_synacor_libsim_a_AR = $(AR) $(ARFLAGS)
 528 @SIM_ENABLE_ARCH_examples_TRUE@example_synacor_libsim_a_DEPENDENCIES =  \
 529 @SIM_ENABLE_ARCH_examples_TRUE@ $(patsubst \
 530 @SIM_ENABLE_ARCH_examples_TRUE@ %,example-synacor/%,$(SIM_NEW_COMMON_OBJS)) \
 531 @SIM_ENABLE_ARCH_examples_TRUE@ $(patsubst \
 532 @SIM_ENABLE_ARCH_examples_TRUE@ %,example-synacor/dv-%.o,$(SIM_HW_DEVICES)) \
 533 @SIM_ENABLE_ARCH_examples_TRUE@ example-synacor/interp.o \
 534 @SIM_ENABLE_ARCH_examples_TRUE@ example-synacor/sim-main.o \
 535 @SIM_ENABLE_ARCH_examples_TRUE@ example-synacor/sim-resume.o
 536 @SIM_ENABLE_ARCH_examples_TRUE@am_example_synacor_libsim_a_OBJECTS =  \
 537 @SIM_ENABLE_ARCH_examples_TRUE@ $(am__objects_1)
 538 @SIM_ENABLE_ARCH_examples_TRUE@nodist_example_synacor_libsim_a_OBJECTS = example-synacor/modules.$(OBJEXT)
 539 example_synacor_libsim_a_OBJECTS =  \
 540         $(am_example_synacor_libsim_a_OBJECTS) \
 541         $(nodist_example_synacor_libsim_a_OBJECTS)
 542 frv_libsim_a_AR = $(AR) $(ARFLAGS)
 543 @SIM_ENABLE_ARCH_frv_TRUE@frv_libsim_a_DEPENDENCIES = $(patsubst \
 544 @SIM_ENABLE_ARCH_frv_TRUE@      %,frv/%,$(SIM_NEW_COMMON_OBJS)) \
 545 @SIM_ENABLE_ARCH_frv_TRUE@      $(patsubst \
 546 @SIM_ENABLE_ARCH_frv_TRUE@      %,frv/dv-%.o,$(SIM_HW_DEVICES)) \
 547 @SIM_ENABLE_ARCH_frv_TRUE@      frv/cgen-accfp.o frv/cgen-fpu.o \
 548 @SIM_ENABLE_ARCH_frv_TRUE@      frv/cgen-run.o frv/cgen-scache.o \
 549 @SIM_ENABLE_ARCH_frv_TRUE@      frv/cgen-trace.o frv/cgen-utils.o \
 550 @SIM_ENABLE_ARCH_frv_TRUE@      frv/arch.o frv/cgen-par.o frv/cpu.o \
 551 @SIM_ENABLE_ARCH_frv_TRUE@      frv/decode.o frv/frv.o frv/mloop.o \
 552 @SIM_ENABLE_ARCH_frv_TRUE@      frv/model.o frv/sem.o frv/cache.o \
 553 @SIM_ENABLE_ARCH_frv_TRUE@      frv/interrupts.o frv/memory.o \
 554 @SIM_ENABLE_ARCH_frv_TRUE@      frv/options.o frv/pipeline.o \
 555 @SIM_ENABLE_ARCH_frv_TRUE@      frv/profile.o frv/profile-fr400.o \
 556 @SIM_ENABLE_ARCH_frv_TRUE@      frv/profile-fr450.o \
 557 @SIM_ENABLE_ARCH_frv_TRUE@      frv/profile-fr500.o \
 558 @SIM_ENABLE_ARCH_frv_TRUE@      frv/profile-fr550.o frv/registers.o \
 559 @SIM_ENABLE_ARCH_frv_TRUE@      frv/reset.o frv/sim-if.o frv/traps.o
 560 @SIM_ENABLE_ARCH_frv_TRUE@am_frv_libsim_a_OBJECTS = $(am__objects_1)
 561 @SIM_ENABLE_ARCH_frv_TRUE@nodist_frv_libsim_a_OBJECTS =  \
 562 @SIM_ENABLE_ARCH_frv_TRUE@      frv/modules.$(OBJEXT)
 563 frv_libsim_a_OBJECTS = $(am_frv_libsim_a_OBJECTS) \
 564         $(nodist_frv_libsim_a_OBJECTS)
 565 ft32_libsim_a_AR = $(AR) $(ARFLAGS)
 566 @SIM_ENABLE_ARCH_ft32_TRUE@ft32_libsim_a_DEPENDENCIES = $(patsubst \
 567 @SIM_ENABLE_ARCH_ft32_TRUE@     %,ft32/%,$(SIM_NEW_COMMON_OBJS)) \
 568 @SIM_ENABLE_ARCH_ft32_TRUE@     $(patsubst \
 569 @SIM_ENABLE_ARCH_ft32_TRUE@     %,ft32/dv-%.o,$(SIM_HW_DEVICES)) \
 570 @SIM_ENABLE_ARCH_ft32_TRUE@     ft32/interp.o ft32/sim-resume.o
 571 @SIM_ENABLE_ARCH_ft32_TRUE@am_ft32_libsim_a_OBJECTS =  \
 572 @SIM_ENABLE_ARCH_ft32_TRUE@     $(am__objects_1)
 573 @SIM_ENABLE_ARCH_ft32_TRUE@nodist_ft32_libsim_a_OBJECTS =  \
 574 @SIM_ENABLE_ARCH_ft32_TRUE@     ft32/modules.$(OBJEXT)
 575 ft32_libsim_a_OBJECTS = $(am_ft32_libsim_a_OBJECTS) \
 576         $(nodist_ft32_libsim_a_OBJECTS)
 577 h8300_libsim_a_AR = $(AR) $(ARFLAGS)
 578 @SIM_ENABLE_ARCH_h8300_TRUE@h8300_libsim_a_DEPENDENCIES =  \
 579 @SIM_ENABLE_ARCH_h8300_TRUE@    h8300/compile.o $(patsubst \
 580 @SIM_ENABLE_ARCH_h8300_TRUE@    %,h8300/%,$(SIM_NEW_COMMON_OBJS)) \
 581 @SIM_ENABLE_ARCH_h8300_TRUE@    $(patsubst \
 582 @SIM_ENABLE_ARCH_h8300_TRUE@    %,h8300/dv-%.o,$(SIM_HW_DEVICES)) \
 583 @SIM_ENABLE_ARCH_h8300_TRUE@    h8300/sim-resume.o
 584 @SIM_ENABLE_ARCH_h8300_TRUE@am_h8300_libsim_a_OBJECTS =  \
 585 @SIM_ENABLE_ARCH_h8300_TRUE@    $(am__objects_1)
 586 @SIM_ENABLE_ARCH_h8300_TRUE@nodist_h8300_libsim_a_OBJECTS =  \
 587 @SIM_ENABLE_ARCH_h8300_TRUE@    h8300/modules.$(OBJEXT)
 588 h8300_libsim_a_OBJECTS = $(am_h8300_libsim_a_OBJECTS) \
 589         $(nodist_h8300_libsim_a_OBJECTS)
 590 igen_libigen_a_AR = $(AR) $(ARFLAGS)
 591 igen_libigen_a_LIBADD =
 592 am_igen_libigen_a_OBJECTS = igen/table.$(OBJEXT) igen/lf.$(OBJEXT) \
 593         igen/misc.$(OBJEXT) igen/filter_host.$(OBJEXT) \
 594         igen/ld-decode.$(OBJEXT) igen/ld-cache.$(OBJEXT) \
 595         igen/filter.$(OBJEXT) igen/ld-insn.$(OBJEXT) \
 596         igen/gen-model.$(OBJEXT) igen/gen-itable.$(OBJEXT) \
 597         igen/gen-icache.$(OBJEXT) igen/gen-semantics.$(OBJEXT) \
 598         igen/gen-idecode.$(OBJEXT) igen/gen-support.$(OBJEXT) \
 599         igen/gen-engine.$(OBJEXT) igen/gen.$(OBJEXT)
 600 igen_libigen_a_OBJECTS = $(am_igen_libigen_a_OBJECTS)
 601 iq2000_libsim_a_AR = $(AR) $(ARFLAGS)
 602 @SIM_ENABLE_ARCH_iq2000_TRUE@iq2000_libsim_a_DEPENDENCIES =  \
 603 @SIM_ENABLE_ARCH_iq2000_TRUE@   $(patsubst \
 604 @SIM_ENABLE_ARCH_iq2000_TRUE@   %,iq2000/%,$(SIM_NEW_COMMON_OBJS)) \
 605 @SIM_ENABLE_ARCH_iq2000_TRUE@   $(patsubst \
 606 @SIM_ENABLE_ARCH_iq2000_TRUE@   %,iq2000/dv-%.o,$(SIM_HW_DEVICES)) \
 607 @SIM_ENABLE_ARCH_iq2000_TRUE@   iq2000/cgen-run.o \
 608 @SIM_ENABLE_ARCH_iq2000_TRUE@   iq2000/cgen-scache.o \
 609 @SIM_ENABLE_ARCH_iq2000_TRUE@   iq2000/cgen-trace.o \
 610 @SIM_ENABLE_ARCH_iq2000_TRUE@   iq2000/cgen-utils.o iq2000/arch.o \
 611 @SIM_ENABLE_ARCH_iq2000_TRUE@   iq2000/cpu.o iq2000/decode.o \
 612 @SIM_ENABLE_ARCH_iq2000_TRUE@   iq2000/iq2000.o iq2000/sem.o \
 613 @SIM_ENABLE_ARCH_iq2000_TRUE@   iq2000/mloop.o iq2000/model.o \
 614 @SIM_ENABLE_ARCH_iq2000_TRUE@   iq2000/sim-if.o
 615 @SIM_ENABLE_ARCH_iq2000_TRUE@am_iq2000_libsim_a_OBJECTS =  \
 616 @SIM_ENABLE_ARCH_iq2000_TRUE@   $(am__objects_1)
 617 @SIM_ENABLE_ARCH_iq2000_TRUE@nodist_iq2000_libsim_a_OBJECTS =  \
 618 @SIM_ENABLE_ARCH_iq2000_TRUE@   iq2000/modules.$(OBJEXT)
 619 iq2000_libsim_a_OBJECTS = $(am_iq2000_libsim_a_OBJECTS) \
 620         $(nodist_iq2000_libsim_a_OBJECTS)
 621 lm32_libsim_a_AR = $(AR) $(ARFLAGS)
 622 @SIM_ENABLE_ARCH_lm32_TRUE@lm32_libsim_a_DEPENDENCIES = $(patsubst \
 623 @SIM_ENABLE_ARCH_lm32_TRUE@     %,lm32/%,$(SIM_NEW_COMMON_OBJS)) \
 624 @SIM_ENABLE_ARCH_lm32_TRUE@     $(patsubst \
 625 @SIM_ENABLE_ARCH_lm32_TRUE@     %,lm32/dv-%.o,$(SIM_HW_DEVICES)) \
 626 @SIM_ENABLE_ARCH_lm32_TRUE@     $(patsubst \
 627 @SIM_ENABLE_ARCH_lm32_TRUE@     %,lm32/dv-%.o,$(lm32_SIM_EXTRA_HW_DEVICES)) \
 628 @SIM_ENABLE_ARCH_lm32_TRUE@     lm32/cgen-run.o lm32/cgen-scache.o \
 629 @SIM_ENABLE_ARCH_lm32_TRUE@     lm32/cgen-trace.o lm32/cgen-utils.o \
 630 @SIM_ENABLE_ARCH_lm32_TRUE@     lm32/arch.o lm32/cpu.o \
 631 @SIM_ENABLE_ARCH_lm32_TRUE@     lm32/decode.o lm32/sem.o \
 632 @SIM_ENABLE_ARCH_lm32_TRUE@     lm32/mloop.o lm32/model.o \
 633 @SIM_ENABLE_ARCH_lm32_TRUE@     lm32/lm32.o lm32/sim-if.o \
 634 @SIM_ENABLE_ARCH_lm32_TRUE@     lm32/traps.o lm32/user.o
 635 @SIM_ENABLE_ARCH_lm32_TRUE@am_lm32_libsim_a_OBJECTS =  \
 636 @SIM_ENABLE_ARCH_lm32_TRUE@     $(am__objects_1)
 637 @SIM_ENABLE_ARCH_lm32_TRUE@nodist_lm32_libsim_a_OBJECTS =  \
 638 @SIM_ENABLE_ARCH_lm32_TRUE@     lm32/modules.$(OBJEXT)
 639 lm32_libsim_a_OBJECTS = $(am_lm32_libsim_a_OBJECTS) \
 640         $(nodist_lm32_libsim_a_OBJECTS)
 641 m32c_libsim_a_AR = $(AR) $(ARFLAGS)
 642 @SIM_ENABLE_ARCH_m32c_TRUE@m32c_libsim_a_DEPENDENCIES = m32c/gdb-if.o \
 643 @SIM_ENABLE_ARCH_m32c_TRUE@     m32c/int.o m32c/load.o m32c/m32c.o \
 644 @SIM_ENABLE_ARCH_m32c_TRUE@     m32c/mem.o m32c/misc.o m32c/r8c.o \
 645 @SIM_ENABLE_ARCH_m32c_TRUE@     m32c/reg.o m32c/srcdest.o \
 646 @SIM_ENABLE_ARCH_m32c_TRUE@     m32c/syscalls.o m32c/trace.o
 647 @SIM_ENABLE_ARCH_m32c_TRUE@am_m32c_libsim_a_OBJECTS =  \
 648 @SIM_ENABLE_ARCH_m32c_TRUE@     $(am__objects_1)
 649 @SIM_ENABLE_ARCH_m32c_TRUE@nodist_m32c_libsim_a_OBJECTS =  \
 650 @SIM_ENABLE_ARCH_m32c_TRUE@     m32c/modules.$(OBJEXT)
 651 m32c_libsim_a_OBJECTS = $(am_m32c_libsim_a_OBJECTS) \
 652         $(nodist_m32c_libsim_a_OBJECTS)
 653 m32r_libsim_a_AR = $(AR) $(ARFLAGS)
 654 @SIM_ENABLE_ARCH_m32r_TRUE@m32r_libsim_a_DEPENDENCIES = $(patsubst \
 655 @SIM_ENABLE_ARCH_m32r_TRUE@     %,m32r/%,$(SIM_NEW_COMMON_OBJS)) \
 656 @SIM_ENABLE_ARCH_m32r_TRUE@     $(patsubst \
 657 @SIM_ENABLE_ARCH_m32r_TRUE@     %,m32r/dv-%.o,$(SIM_HW_DEVICES)) \
 658 @SIM_ENABLE_ARCH_m32r_TRUE@     $(patsubst \
 659 @SIM_ENABLE_ARCH_m32r_TRUE@     %,m32r/dv-%.o,$(m32r_SIM_EXTRA_HW_DEVICES)) \
 660 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/cgen-run.o m32r/cgen-scache.o \
 661 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/cgen-trace.o m32r/cgen-utils.o \
 662 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/arch.o m32r/m32r.o m32r/cpu.o \
 663 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/decode.o m32r/sem.o \
 664 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/model.o m32r/mloop.o \
 665 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/m32rx.o m32r/cpux.o \
 666 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/decodex.o m32r/modelx.o \
 667 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/mloopx.o m32r/m32r2.o \
 668 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/cpu2.o m32r/decode2.o \
 669 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/model2.o m32r/mloop2.o \
 670 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/sim-if.o m32r/traps.o
 671 @SIM_ENABLE_ARCH_m32r_TRUE@am_m32r_libsim_a_OBJECTS =  \
 672 @SIM_ENABLE_ARCH_m32r_TRUE@     $(am__objects_1)
 673 @SIM_ENABLE_ARCH_m32r_TRUE@nodist_m32r_libsim_a_OBJECTS =  \
 674 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/modules.$(OBJEXT)
 675 m32r_libsim_a_OBJECTS = $(am_m32r_libsim_a_OBJECTS) \
 676         $(nodist_m32r_libsim_a_OBJECTS)
 677 m68hc11_libsim_a_AR = $(AR) $(ARFLAGS)
 678 @SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11_libsim_a_DEPENDENCIES =  \
 679 @SIM_ENABLE_ARCH_m68hc11_TRUE@  m68hc11/interp.o \
 680 @SIM_ENABLE_ARCH_m68hc11_TRUE@  m68hc11/m68hc11int.o \
 681 @SIM_ENABLE_ARCH_m68hc11_TRUE@  m68hc11/m68hc12int.o \
 682 @SIM_ENABLE_ARCH_m68hc11_TRUE@  m68hc11/emulos.o \
 683 @SIM_ENABLE_ARCH_m68hc11_TRUE@  m68hc11/interrupts.o \
 684 @SIM_ENABLE_ARCH_m68hc11_TRUE@  m68hc11/m68hc11_sim.o $(patsubst \
 685 @SIM_ENABLE_ARCH_m68hc11_TRUE@  %,m68hc11/%,$(SIM_NEW_COMMON_OBJS)) \
 686 @SIM_ENABLE_ARCH_m68hc11_TRUE@  $(patsubst \
 687 @SIM_ENABLE_ARCH_m68hc11_TRUE@  %,m68hc11/dv-%.o,$(SIM_HW_DEVICES)) \
 688 @SIM_ENABLE_ARCH_m68hc11_TRUE@  $(patsubst \
 689 @SIM_ENABLE_ARCH_m68hc11_TRUE@  %,m68hc11/dv-%.o,$(m68hc11_SIM_EXTRA_HW_DEVICES)) \
 690 @SIM_ENABLE_ARCH_m68hc11_TRUE@  m68hc11/sim-resume.o
 691 @SIM_ENABLE_ARCH_m68hc11_TRUE@am_m68hc11_libsim_a_OBJECTS =  \
 692 @SIM_ENABLE_ARCH_m68hc11_TRUE@  $(am__objects_1)
 693 @SIM_ENABLE_ARCH_m68hc11_TRUE@nodist_m68hc11_libsim_a_OBJECTS =  \
 694 @SIM_ENABLE_ARCH_m68hc11_TRUE@  m68hc11/modules.$(OBJEXT)
 695 m68hc11_libsim_a_OBJECTS = $(am_m68hc11_libsim_a_OBJECTS) \
 696         $(nodist_m68hc11_libsim_a_OBJECTS)
 697 mcore_libsim_a_AR = $(AR) $(ARFLAGS)
 698 @SIM_ENABLE_ARCH_mcore_TRUE@mcore_libsim_a_DEPENDENCIES =  \
 699 @SIM_ENABLE_ARCH_mcore_TRUE@    mcore/interp.o $(patsubst \
 700 @SIM_ENABLE_ARCH_mcore_TRUE@    %,mcore/%,$(SIM_NEW_COMMON_OBJS)) \
 701 @SIM_ENABLE_ARCH_mcore_TRUE@    $(patsubst \
 702 @SIM_ENABLE_ARCH_mcore_TRUE@    %,mcore/dv-%.o,$(SIM_HW_DEVICES)) \
 703 @SIM_ENABLE_ARCH_mcore_TRUE@    mcore/sim-resume.o
 704 @SIM_ENABLE_ARCH_mcore_TRUE@am_mcore_libsim_a_OBJECTS =  \
 705 @SIM_ENABLE_ARCH_mcore_TRUE@    $(am__objects_1)
 706 @SIM_ENABLE_ARCH_mcore_TRUE@nodist_mcore_libsim_a_OBJECTS =  \
 707 @SIM_ENABLE_ARCH_mcore_TRUE@    mcore/modules.$(OBJEXT)
 708 mcore_libsim_a_OBJECTS = $(am_mcore_libsim_a_OBJECTS) \
 709         $(nodist_mcore_libsim_a_OBJECTS)
 710 microblaze_libsim_a_AR = $(AR) $(ARFLAGS)
 711 @SIM_ENABLE_ARCH_microblaze_TRUE@microblaze_libsim_a_DEPENDENCIES =  \
 712 @SIM_ENABLE_ARCH_microblaze_TRUE@       microblaze/interp.o \
 713 @SIM_ENABLE_ARCH_microblaze_TRUE@       $(patsubst \
 714 @SIM_ENABLE_ARCH_microblaze_TRUE@       %,microblaze/%,$(SIM_NEW_COMMON_OBJS)) \
 715 @SIM_ENABLE_ARCH_microblaze_TRUE@       $(patsubst \
 716 @SIM_ENABLE_ARCH_microblaze_TRUE@       %,microblaze/dv-%.o,$(SIM_HW_DEVICES)) \
 717 @SIM_ENABLE_ARCH_microblaze_TRUE@       microblaze/sim-resume.o
 718 @SIM_ENABLE_ARCH_microblaze_TRUE@am_microblaze_libsim_a_OBJECTS =  \
 719 @SIM_ENABLE_ARCH_microblaze_TRUE@       $(am__objects_1)
 720 @SIM_ENABLE_ARCH_microblaze_TRUE@nodist_microblaze_libsim_a_OBJECTS =  \
 721 @SIM_ENABLE_ARCH_microblaze_TRUE@       microblaze/modules.$(OBJEXT)
 722 microblaze_libsim_a_OBJECTS = $(am_microblaze_libsim_a_OBJECTS) \
 723         $(nodist_microblaze_libsim_a_OBJECTS)
 724 mips_libsim_a_AR = $(AR) $(ARFLAGS)
 725 am__DEPENDENCIES_1 =
 726 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_MULTI_TRUE@am__DEPENDENCIES_2 = $(am__DEPENDENCIES_1) \
 727 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_MULTI_TRUE@       mips/itable.o \
 728 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_MULTI_TRUE@       mips/multi-run.o
 729 @SIM_ENABLE_ARCH_mips_TRUE@am__DEPENDENCIES_3 = $(am__append_68) \
 730 @SIM_ENABLE_ARCH_mips_TRUE@     $(am__append_69) \
 731 @SIM_ENABLE_ARCH_mips_TRUE@     $(am__DEPENDENCIES_2)
 732 @SIM_ENABLE_ARCH_mips_TRUE@mips_libsim_a_DEPENDENCIES = mips/interp.o \
 733 @SIM_ENABLE_ARCH_mips_TRUE@     $(am__DEPENDENCIES_3) $(patsubst \
 734 @SIM_ENABLE_ARCH_mips_TRUE@     %,mips/%,$(SIM_NEW_COMMON_OBJS)) \
 735 @SIM_ENABLE_ARCH_mips_TRUE@     $(patsubst \
 736 @SIM_ENABLE_ARCH_mips_TRUE@     %,mips/dv-%.o,$(SIM_HW_DEVICES)) \
 737 @SIM_ENABLE_ARCH_mips_TRUE@     $(patsubst \
 738 @SIM_ENABLE_ARCH_mips_TRUE@     %,mips/dv-%.o,$(mips_SIM_EXTRA_HW_DEVICES)) \
 739 @SIM_ENABLE_ARCH_mips_TRUE@     mips/cp1.o mips/dsp.o mips/mdmx.o \
 740 @SIM_ENABLE_ARCH_mips_TRUE@     mips/sim-main.o mips/sim-resume.o
 741 @SIM_ENABLE_ARCH_mips_TRUE@am_mips_libsim_a_OBJECTS =  \
 742 @SIM_ENABLE_ARCH_mips_TRUE@     $(am__objects_1)
 743 @SIM_ENABLE_ARCH_mips_TRUE@nodist_mips_libsim_a_OBJECTS =  \
 744 @SIM_ENABLE_ARCH_mips_TRUE@     mips/modules.$(OBJEXT)
 745 mips_libsim_a_OBJECTS = $(am_mips_libsim_a_OBJECTS) \
 746         $(nodist_mips_libsim_a_OBJECTS)
 747 mn10300_libsim_a_AR = $(AR) $(ARFLAGS)
 748 @SIM_ENABLE_ARCH_mn10300_TRUE@mn10300_libsim_a_DEPENDENCIES =  \
 749 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/itable.o \
 750 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/semantics.o \
 751 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/idecode.o \
 752 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/icache.o \
 753 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/engine.o mn10300/irun.o \
 754 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/support.o $(patsubst \
 755 @SIM_ENABLE_ARCH_mn10300_TRUE@  %,mn10300/%,$(SIM_NEW_COMMON_OBJS)) \
 756 @SIM_ENABLE_ARCH_mn10300_TRUE@  $(patsubst \
 757 @SIM_ENABLE_ARCH_mn10300_TRUE@  %,mn10300/dv-%.o,$(SIM_HW_DEVICES)) \
 758 @SIM_ENABLE_ARCH_mn10300_TRUE@  $(patsubst \
 759 @SIM_ENABLE_ARCH_mn10300_TRUE@  %,mn10300/dv-%.o,$(mn10300_SIM_EXTRA_HW_DEVICES)) \
 760 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/interp.o \
 761 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/op_utils.o \
 762 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/sim-resume.o
 763 @SIM_ENABLE_ARCH_mn10300_TRUE@am_mn10300_libsim_a_OBJECTS =  \
 764 @SIM_ENABLE_ARCH_mn10300_TRUE@  $(am__objects_1)
 765 @SIM_ENABLE_ARCH_mn10300_TRUE@nodist_mn10300_libsim_a_OBJECTS =  \
 766 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/modules.$(OBJEXT)
 767 mn10300_libsim_a_OBJECTS = $(am_mn10300_libsim_a_OBJECTS) \
 768         $(nodist_mn10300_libsim_a_OBJECTS)
 769 moxie_libsim_a_AR = $(AR) $(ARFLAGS)
 770 @SIM_ENABLE_ARCH_moxie_TRUE@moxie_libsim_a_DEPENDENCIES = $(patsubst \
 771 @SIM_ENABLE_ARCH_moxie_TRUE@    %,moxie/%,$(SIM_NEW_COMMON_OBJS)) \
 772 @SIM_ENABLE_ARCH_moxie_TRUE@    $(patsubst \
 773 @SIM_ENABLE_ARCH_moxie_TRUE@    %,moxie/dv-%.o,$(SIM_HW_DEVICES)) \
 774 @SIM_ENABLE_ARCH_moxie_TRUE@    moxie/interp.o moxie/sim-resume.o
 775 @SIM_ENABLE_ARCH_moxie_TRUE@am_moxie_libsim_a_OBJECTS =  \
 776 @SIM_ENABLE_ARCH_moxie_TRUE@    $(am__objects_1)
 777 @SIM_ENABLE_ARCH_moxie_TRUE@nodist_moxie_libsim_a_OBJECTS =  \
 778 @SIM_ENABLE_ARCH_moxie_TRUE@    moxie/modules.$(OBJEXT)
 779 moxie_libsim_a_OBJECTS = $(am_moxie_libsim_a_OBJECTS) \
 780         $(nodist_moxie_libsim_a_OBJECTS)
 781 msp430_libsim_a_AR = $(AR) $(ARFLAGS)
 782 @SIM_ENABLE_ARCH_msp430_TRUE@msp430_libsim_a_DEPENDENCIES =  \
 783 @SIM_ENABLE_ARCH_msp430_TRUE@   $(patsubst \
 784 @SIM_ENABLE_ARCH_msp430_TRUE@   %,msp430/%,$(SIM_NEW_COMMON_OBJS)) \
 785 @SIM_ENABLE_ARCH_msp430_TRUE@   $(patsubst \
 786 @SIM_ENABLE_ARCH_msp430_TRUE@   %,msp430/dv-%.o,$(SIM_HW_DEVICES)) \
 787 @SIM_ENABLE_ARCH_msp430_TRUE@   msp430/msp430-sim.o \
 788 @SIM_ENABLE_ARCH_msp430_TRUE@   msp430/sim-resume.o
 789 @SIM_ENABLE_ARCH_msp430_TRUE@am_msp430_libsim_a_OBJECTS =  \
 790 @SIM_ENABLE_ARCH_msp430_TRUE@   $(am__objects_1)
 791 @SIM_ENABLE_ARCH_msp430_TRUE@nodist_msp430_libsim_a_OBJECTS =  \
 792 @SIM_ENABLE_ARCH_msp430_TRUE@   msp430/modules.$(OBJEXT)
 793 msp430_libsim_a_OBJECTS = $(am_msp430_libsim_a_OBJECTS) \
 794         $(nodist_msp430_libsim_a_OBJECTS)
 795 or1k_libsim_a_AR = $(AR) $(ARFLAGS)
 796 @SIM_ENABLE_ARCH_or1k_TRUE@or1k_libsim_a_DEPENDENCIES = $(patsubst \
 797 @SIM_ENABLE_ARCH_or1k_TRUE@     %,or1k/%,$(SIM_NEW_COMMON_OBJS)) \
 798 @SIM_ENABLE_ARCH_or1k_TRUE@     $(patsubst \
 799 @SIM_ENABLE_ARCH_or1k_TRUE@     %,or1k/dv-%.o,$(SIM_HW_DEVICES)) \
 800 @SIM_ENABLE_ARCH_or1k_TRUE@     or1k/cgen-accfp.o or1k/cgen-fpu.o \
 801 @SIM_ENABLE_ARCH_or1k_TRUE@     or1k/cgen-run.o or1k/cgen-scache.o \
 802 @SIM_ENABLE_ARCH_or1k_TRUE@     or1k/cgen-trace.o or1k/cgen-utils.o \
 803 @SIM_ENABLE_ARCH_or1k_TRUE@     or1k/arch.o or1k/cpu.o \
 804 @SIM_ENABLE_ARCH_or1k_TRUE@     or1k/decode.o or1k/mloop.o \
 805 @SIM_ENABLE_ARCH_or1k_TRUE@     or1k/model.o or1k/sem.o or1k/or1k.o \
 806 @SIM_ENABLE_ARCH_or1k_TRUE@     or1k/sim-if.o or1k/traps.o
 807 @SIM_ENABLE_ARCH_or1k_TRUE@am_or1k_libsim_a_OBJECTS =  \
 808 @SIM_ENABLE_ARCH_or1k_TRUE@     $(am__objects_1)
 809 @SIM_ENABLE_ARCH_or1k_TRUE@nodist_or1k_libsim_a_OBJECTS =  \
 810 @SIM_ENABLE_ARCH_or1k_TRUE@     or1k/modules.$(OBJEXT)
 811 or1k_libsim_a_OBJECTS = $(am_or1k_libsim_a_OBJECTS) \
 812         $(nodist_or1k_libsim_a_OBJECTS)
 813 pru_libsim_a_AR = $(AR) $(ARFLAGS)
 814 @SIM_ENABLE_ARCH_pru_TRUE@pru_libsim_a_DEPENDENCIES = $(patsubst \
 815 @SIM_ENABLE_ARCH_pru_TRUE@      %,pru/%,$(SIM_NEW_COMMON_OBJS)) \
 816 @SIM_ENABLE_ARCH_pru_TRUE@      $(patsubst \
 817 @SIM_ENABLE_ARCH_pru_TRUE@      %,pru/dv-%.o,$(SIM_HW_DEVICES)) \
 818 @SIM_ENABLE_ARCH_pru_TRUE@      pru/interp.o pru/sim-resume.o
 819 @SIM_ENABLE_ARCH_pru_TRUE@am_pru_libsim_a_OBJECTS = $(am__objects_1)
 820 @SIM_ENABLE_ARCH_pru_TRUE@nodist_pru_libsim_a_OBJECTS =  \
 821 @SIM_ENABLE_ARCH_pru_TRUE@      pru/modules.$(OBJEXT)
 822 pru_libsim_a_OBJECTS = $(am_pru_libsim_a_OBJECTS) \
 823         $(nodist_pru_libsim_a_OBJECTS)
 824 riscv_libsim_a_AR = $(AR) $(ARFLAGS)
 825 @SIM_ENABLE_ARCH_riscv_TRUE@riscv_libsim_a_DEPENDENCIES = $(patsubst \
 826 @SIM_ENABLE_ARCH_riscv_TRUE@    %,riscv/%,$(SIM_NEW_COMMON_OBJS)) \
 827 @SIM_ENABLE_ARCH_riscv_TRUE@    $(patsubst \
 828 @SIM_ENABLE_ARCH_riscv_TRUE@    %,riscv/dv-%.o,$(SIM_HW_DEVICES)) \
 829 @SIM_ENABLE_ARCH_riscv_TRUE@    riscv/interp.o riscv/machs.o \
 830 @SIM_ENABLE_ARCH_riscv_TRUE@    riscv/sim-main.o \
 831 @SIM_ENABLE_ARCH_riscv_TRUE@    riscv/sim-resume.o
 832 @SIM_ENABLE_ARCH_riscv_TRUE@am_riscv_libsim_a_OBJECTS =  \
 833 @SIM_ENABLE_ARCH_riscv_TRUE@    $(am__objects_1)
 834 @SIM_ENABLE_ARCH_riscv_TRUE@nodist_riscv_libsim_a_OBJECTS =  \
 835 @SIM_ENABLE_ARCH_riscv_TRUE@    riscv/modules.$(OBJEXT)
 836 riscv_libsim_a_OBJECTS = $(am_riscv_libsim_a_OBJECTS) \
 837         $(nodist_riscv_libsim_a_OBJECTS)
 838 rl78_libsim_a_AR = $(AR) $(ARFLAGS)
 839 @SIM_ENABLE_ARCH_rl78_TRUE@rl78_libsim_a_DEPENDENCIES = rl78/load.o \
 840 @SIM_ENABLE_ARCH_rl78_TRUE@     rl78/mem.o rl78/cpu.o rl78/rl78.o \
 841 @SIM_ENABLE_ARCH_rl78_TRUE@     rl78/gdb-if.o rl78/trace.o
 842 @SIM_ENABLE_ARCH_rl78_TRUE@am_rl78_libsim_a_OBJECTS =  \
 843 @SIM_ENABLE_ARCH_rl78_TRUE@     $(am__objects_1)
 844 @SIM_ENABLE_ARCH_rl78_TRUE@nodist_rl78_libsim_a_OBJECTS =  \
 845 @SIM_ENABLE_ARCH_rl78_TRUE@     rl78/modules.$(OBJEXT)
 846 rl78_libsim_a_OBJECTS = $(am_rl78_libsim_a_OBJECTS) \
 847         $(nodist_rl78_libsim_a_OBJECTS)
 848 rx_libsim_a_AR = $(AR) $(ARFLAGS)
 849 @SIM_ENABLE_ARCH_rx_TRUE@rx_libsim_a_DEPENDENCIES = rx/fpu.o rx/load.o \
 850 @SIM_ENABLE_ARCH_rx_TRUE@       rx/mem.o rx/misc.o rx/reg.o rx/rx.o \
 851 @SIM_ENABLE_ARCH_rx_TRUE@       rx/syscalls.o rx/trace.o rx/gdb-if.o \
 852 @SIM_ENABLE_ARCH_rx_TRUE@       rx/err.o
 853 @SIM_ENABLE_ARCH_rx_TRUE@am_rx_libsim_a_OBJECTS = $(am__objects_1)
 854 @SIM_ENABLE_ARCH_rx_TRUE@nodist_rx_libsim_a_OBJECTS =  \
 855 @SIM_ENABLE_ARCH_rx_TRUE@       rx/modules.$(OBJEXT)
 856 rx_libsim_a_OBJECTS = $(am_rx_libsim_a_OBJECTS) \
 857         $(nodist_rx_libsim_a_OBJECTS)
 858 sh_libsim_a_AR = $(AR) $(ARFLAGS)
 859 @SIM_ENABLE_ARCH_sh_TRUE@sh_libsim_a_DEPENDENCIES = sh/interp.o \
 860 @SIM_ENABLE_ARCH_sh_TRUE@       $(patsubst \
 861 @SIM_ENABLE_ARCH_sh_TRUE@       %,sh/%,$(SIM_NEW_COMMON_OBJS)) \
 862 @SIM_ENABLE_ARCH_sh_TRUE@       $(patsubst \
 863 @SIM_ENABLE_ARCH_sh_TRUE@       %,sh/dv-%.o,$(SIM_HW_DEVICES)) \
 864 @SIM_ENABLE_ARCH_sh_TRUE@       sh/table.o
 865 @SIM_ENABLE_ARCH_sh_TRUE@am_sh_libsim_a_OBJECTS = $(am__objects_1)
 866 @SIM_ENABLE_ARCH_sh_TRUE@nodist_sh_libsim_a_OBJECTS =  \
 867 @SIM_ENABLE_ARCH_sh_TRUE@       sh/modules.$(OBJEXT)
 868 sh_libsim_a_OBJECTS = $(am_sh_libsim_a_OBJECTS) \
 869         $(nodist_sh_libsim_a_OBJECTS)
 870 v850_libsim_a_AR = $(AR) $(ARFLAGS)
 871 @SIM_ENABLE_ARCH_v850_TRUE@v850_libsim_a_DEPENDENCIES = $(patsubst \
 872 @SIM_ENABLE_ARCH_v850_TRUE@     %,v850/%,$(SIM_NEW_COMMON_OBJS)) \
 873 @SIM_ENABLE_ARCH_v850_TRUE@     $(patsubst \
 874 @SIM_ENABLE_ARCH_v850_TRUE@     %,v850/dv-%.o,$(SIM_HW_DEVICES)) \
 875 @SIM_ENABLE_ARCH_v850_TRUE@     v850/simops.o v850/interp.o \
 876 @SIM_ENABLE_ARCH_v850_TRUE@     v850/itable.o v850/semantics.o \
 877 @SIM_ENABLE_ARCH_v850_TRUE@     v850/idecode.o v850/icache.o \
 878 @SIM_ENABLE_ARCH_v850_TRUE@     v850/engine.o v850/irun.o \
 879 @SIM_ENABLE_ARCH_v850_TRUE@     v850/support.o v850/sim-resume.o
 880 @SIM_ENABLE_ARCH_v850_TRUE@am_v850_libsim_a_OBJECTS =  \
 881 @SIM_ENABLE_ARCH_v850_TRUE@     $(am__objects_1)
 882 @SIM_ENABLE_ARCH_v850_TRUE@nodist_v850_libsim_a_OBJECTS =  \
 883 @SIM_ENABLE_ARCH_v850_TRUE@     v850/modules.$(OBJEXT)
 884 v850_libsim_a_OBJECTS = $(am_v850_libsim_a_OBJECTS) \
 885         $(nodist_v850_libsim_a_OBJECTS)
 886 am__EXEEXT_1 = $(IGEN) igen/filter$(EXEEXT) igen/gen$(EXEEXT) \
 887         igen/ld-cache$(EXEEXT) igen/ld-decode$(EXEEXT) \
 888         igen/ld-insn$(EXEEXT) igen/table$(EXEEXT)
 889 @SIM_ENABLE_ARCH_cr16_TRUE@am__EXEEXT_2 = cr16/gencode$(EXEEXT)
 890 @SIM_ENABLE_ARCH_d10v_TRUE@am__EXEEXT_3 = d10v/gencode$(EXEEXT)
 891 @SIM_ENABLE_ARCH_m32c_TRUE@am__EXEEXT_4 = m32c/opc2c$(EXEEXT)
 892 @SIM_ENABLE_ARCH_m68hc11_TRUE@am__EXEEXT_5 = m68hc11/gencode$(EXEEXT)
 893 @SIM_ENABLE_ARCH_sh_TRUE@am__EXEEXT_6 = sh/gencode$(EXEEXT)
 894 am__EXEEXT_7 = testsuite/common/bits32m0$(EXEEXT) \
 895         testsuite/common/bits32m31$(EXEEXT) \
 896         testsuite/common/bits64m0$(EXEEXT) \
 897         testsuite/common/bits64m63$(EXEEXT) \
 898         testsuite/common/alu-tst$(EXEEXT)
 899 @SIM_ENABLE_ARCH_cris_TRUE@am__EXEEXT_8 = cris/rvdummy$(EXEEXT)
 900 @SIM_ENABLE_ARCH_aarch64_TRUE@am__EXEEXT_9 = aarch64/run$(EXEEXT)
 901 @SIM_ENABLE_ARCH_arm_TRUE@am__EXEEXT_10 = arm/run$(EXEEXT)
 902 @SIM_ENABLE_ARCH_avr_TRUE@am__EXEEXT_11 = avr/run$(EXEEXT)
 903 @SIM_ENABLE_ARCH_bfin_TRUE@am__EXEEXT_12 = bfin/run$(EXEEXT)
 904 @SIM_ENABLE_ARCH_bpf_TRUE@am__EXEEXT_13 = bpf/run$(EXEEXT)
 905 @SIM_ENABLE_ARCH_cr16_TRUE@am__EXEEXT_14 = cr16/run$(EXEEXT)
 906 @SIM_ENABLE_ARCH_cris_TRUE@am__EXEEXT_15 = cris/run$(EXEEXT)
 907 @SIM_ENABLE_ARCH_d10v_TRUE@am__EXEEXT_16 = d10v/run$(EXEEXT)
 908 @SIM_ENABLE_ARCH_erc32_TRUE@am__EXEEXT_17 = erc32/run$(EXEEXT) \
 909 @SIM_ENABLE_ARCH_erc32_TRUE@    erc32/sis$(EXEEXT)
 910 @SIM_ENABLE_ARCH_examples_TRUE@am__EXEEXT_18 =  \
 911 @SIM_ENABLE_ARCH_examples_TRUE@ example-synacor/run$(EXEEXT)
 912 @SIM_ENABLE_ARCH_frv_TRUE@am__EXEEXT_19 = frv/run$(EXEEXT)
 913 @SIM_ENABLE_ARCH_ft32_TRUE@am__EXEEXT_20 = ft32/run$(EXEEXT)
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 915 @SIM_ENABLE_ARCH_iq2000_TRUE@am__EXEEXT_22 = iq2000/run$(EXEEXT)
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1223         $(nodist_or1k_libsim_a_SOURCES) $(pru_libsim_a_SOURCES) \
1224         $(nodist_pru_libsim_a_SOURCES) $(riscv_libsim_a_SOURCES) \
1225         $(nodist_riscv_libsim_a_SOURCES) $(rl78_libsim_a_SOURCES) \
1226         $(nodist_rl78_libsim_a_SOURCES) $(rx_libsim_a_SOURCES) \
1227         $(nodist_rx_libsim_a_SOURCES) $(sh_libsim_a_SOURCES) \
1228         $(nodist_sh_libsim_a_SOURCES) $(v850_libsim_a_SOURCES) \
1229         $(nodist_v850_libsim_a_SOURCES) $(aarch64_run_SOURCES) \
1230         $(arm_run_SOURCES) $(avr_run_SOURCES) $(bfin_run_SOURCES) \
1231         $(bpf_run_SOURCES) $(cr16_gencode_SOURCES) $(cr16_run_SOURCES) \
1232         $(cris_run_SOURCES) $(cris_rvdummy_SOURCES) \
1233         $(d10v_gencode_SOURCES) $(d10v_run_SOURCES) \
1234         $(erc32_run_SOURCES) erc32/sis.c \
1235         $(example_synacor_run_SOURCES) $(frv_run_SOURCES) \
1236         $(ft32_run_SOURCES) $(h8300_run_SOURCES) \
1237         $(igen_filter_SOURCES) $(igen_gen_SOURCES) \
1238         $(igen_igen_SOURCES) $(igen_ld_cache_SOURCES) \
1239         $(igen_ld_decode_SOURCES) $(igen_ld_insn_SOURCES) \
1240         $(igen_table_SOURCES) $(iq2000_run_SOURCES) \
1241         $(lm32_run_SOURCES) $(m32c_opc2c_SOURCES) $(m32c_run_SOURCES) \
1242         $(m32r_run_SOURCES) $(m68hc11_gencode_SOURCES) \
1243         $(m68hc11_run_SOURCES) $(mcore_run_SOURCES) \
1244         $(microblaze_run_SOURCES) $(mips_run_SOURCES) \
1245         $(mn10300_run_SOURCES) $(moxie_run_SOURCES) \
1246         $(msp430_run_SOURCES) $(or1k_run_SOURCES) $(ppc_run_SOURCES) \
1247         $(pru_run_SOURCES) $(riscv_run_SOURCES) $(rl78_run_SOURCES) \
1248         $(rx_run_SOURCES) $(sh_gencode_SOURCES) $(sh_run_SOURCES) \
1249         testsuite/common/alu-tst.c testsuite/common/bits-gen.c \
1250         testsuite/common/bits32m0.c testsuite/common/bits32m31.c \
1251         testsuite/common/bits64m0.c testsuite/common/bits64m63.c \
1252         testsuite/common/fpu-tst.c $(v850_run_SOURCES)
1253 RECURSIVE_TARGETS = all-recursive check-recursive cscopelist-recursive \
1254         ctags-recursive dvi-recursive html-recursive info-recursive \
1255         install-data-recursive install-dvi-recursive \
1256         install-exec-recursive install-html-recursive \
1257         install-info-recursive install-pdf-recursive \
1258         install-ps-recursive install-recursive installcheck-recursive \
1259         installdirs-recursive pdf-recursive ps-recursive \
1260         tags-recursive uninstall-recursive
1261 am__can_run_installinfo = \
1262   case $$AM_UPDATE_INFO_DIR in \
1263     n|no|NO) false;; \
1264     *) (install-info --version) >/dev/null 2>&1;; \
1265   esac
1266 am__vpath_adj_setup = srcdirstrip=`echo "$(srcdir)" | sed 's|.|.|g'`;
1267 am__vpath_adj = case $$p in \
1268     $(srcdir)/*) f=`echo "$$p" | sed "s|^$$srcdirstrip/||"`;; \
1269     *) f=$$p;; \
1270   esac;
1271 am__strip_dir = f=`echo $$p | sed -e 's|^.*/||'`;
1272 am__install_max = 40
1273 am__nobase_strip_setup = \
1274   srcdirstrip=`echo "$(srcdir)" | sed 's/[].[^$$\\*|]/\\\\&/g'`
1275 am__nobase_strip = \
1276   for p in $$list; do echo "$$p"; done | sed -e "s|$$srcdirstrip/||"
1277 am__nobase_list = $(am__nobase_strip_setup); \
1278   for p in $$list; do echo "$$p $$p"; done | \
1279   sed "s| $$srcdirstrip/| |;"' / .*\//!s/ .*/ ./; s,\( .*\)/[^/]*$$,\1,' | \
1280   $(AWK) 'BEGIN { files["."] = "" } { files[$$2] = files[$$2] " " $$1; \
1281     if (++n[$$2] == $(am__install_max)) \
1282       { print $$2, files[$$2]; n[$$2] = 0; files[$$2] = "" } } \
1283     END { for (dir in files) print dir, files[dir] }'
1284 am__base_list = \
1285   sed '$$!N;$$!N;$$!N;$$!N;$$!N;$$!N;$$!N;s/\n/ /g' | \
1286   sed '$$!N;$$!N;$$!N;$$!N;s/\n/ /g'
1287 am__uninstall_files_from_dir = { \
1288   test -z "$$files" \
1289     || { test ! -d "$$dir" && test ! -f "$$dir" && test ! -r "$$dir"; } \
1290     || { echo " ( cd '$$dir' && rm -f" $$files ")"; \
1291          $(am__cd) "$$dir" && rm -f $$files; }; \
1292   }
1293 am__installdirs = "$(DESTDIR)$(armdocdir)" "$(DESTDIR)$(dtbdir)" \
1294         "$(DESTDIR)$(erc32docdir)" "$(DESTDIR)$(frvdocdir)" \
1295         "$(DESTDIR)$(or1kdocdir)" "$(DESTDIR)$(ppcdocdir)" \
1296         "$(DESTDIR)$(rxdocdir)" "$(DESTDIR)$(pkgincludedir)"
1297 DATA = $(armdoc_DATA) $(dtb_DATA) $(erc32doc_DATA) $(frvdoc_DATA) \
1298         $(or1kdoc_DATA) $(ppcdoc_DATA) $(rxdoc_DATA)
1299 am__pkginclude_HEADERS_DIST = $(srcroot)/include/sim/callback.h \
1300         $(srcroot)/include/sim/sim.h
1301 HEADERS = $(pkginclude_HEADERS)
1302 RECURSIVE_CLEAN_TARGETS = mostlyclean-recursive clean-recursive \
1303   distclean-recursive maintainer-clean-recursive
1304 am__recursive_targets = \
1305   $(RECURSIVE_TARGETS) \
1306   $(RECURSIVE_CLEAN_TARGETS) \
1307   $(am__extra_recursive_targets)
1308 AM_RECURSIVE_TARGETS = $(am__recursive_targets:-recursive=) TAGS CTAGS \
1309         cscope check recheck
1310 am__tagged_files = $(HEADERS) $(SOURCES) $(TAGS_FILES) \
1311         $(LISP)config.h.in
1312 # Read a list of newline-separated strings from the standard input,
1313 # and print each of them once, without duplicates.  Input order is
1314 # *not* preserved.
1315 am__uniquify_input = $(AWK) '\
1316   BEGIN { nonempty = 0; } \
1317   { items[$$0] = 1; nonempty = 1; } \
1318   END { if (nonempty) { for (i in items) print i; }; } \
1319 '
1320 # Make sure the list of sources is unique.  This is necessary because,
1321 # e.g., the same source file might be shared among _SOURCES variables
1322 # for different programs/libraries.
1323 am__define_uniq_tagged_files = \
1324   list='$(am__tagged_files)'; \
1325   unique=`for i in $$list; do \
1326     if test -f "$$i"; then echo $$i; else echo $(srcdir)/$$i; fi; \
1327   done | $(am__uniquify_input)`
1328 ETAGS = etags
1329 CTAGS = ctags
1330 CSCOPE = cscope
1331 DEJATOOL = $(PACKAGE)
1332 RUNTESTDEFAULTFLAGS = --tool $$tool --srcdir $$srcdir
1333 EXPECT = expect
1334 RUNTEST = runtest
1335 am__tty_colors_dummy = \
1336   mgn= red= grn= lgn= blu= brg= std=; \
1337   am__color_tests=no
1338 am__tty_colors = { \
1339   $(am__tty_colors_dummy); \
1340   if test "X$(AM_COLOR_TESTS)" = Xno; then \
1341     am__color_tests=no; \
1342   elif test "X$(AM_COLOR_TESTS)" = Xalways; then \
1343     am__color_tests=yes; \
1344   elif test "X$$TERM" != Xdumb && { test -t 1; } 2>/dev/null; then \
1345     am__color_tests=yes; \
1346   fi; \
1347   if test $$am__color_tests = yes; then \
1348     red='\e[0;31m'; \
1349     grn='\e[0;32m'; \
1350     lgn='\e[1;32m'; \
1351     blu='\e[1;34m'; \
1352     mgn='\e[0;35m'; \
1353     brg='\e[1m'; \
1354     std='\e[m'; \
1355   fi; \
1356 }
1357 am__recheck_rx = ^[     ]*:recheck:[    ]*
1358 am__global_test_result_rx = ^[  ]*:global-test-result:[         ]*
1359 am__copy_in_global_log_rx = ^[  ]*:copy-in-global-log:[         ]*
1360 # A command that, given a newline-separated list of test names on the
1361 # standard input, print the name of the tests that are to be re-run
1362 # upon "make recheck".
1363 am__list_recheck_tests = $(AWK) '{ \
1364   recheck = 1; \
1365   while ((rc = (getline line < ($$0 ".trs"))) != 0) \
1366     { \
1367       if (rc < 0) \
1368         { \
1369           if ((getline line2 < ($$0 ".log")) < 0) \
1370             recheck = 0; \
1371           break; \
1372         } \
1373       else if (line ~ /$(am__recheck_rx)[nN][Oo]/) \
1374         { \
1375           recheck = 0; \
1376           break; \
1377         } \
1378       else if (line ~ /$(am__recheck_rx)[yY][eE][sS]/) \
1379         { \
1380           break; \
1381         } \
1382     }; \
1383   if (recheck) \
1384     print $$0; \
1385   close ($$0 ".trs"); \
1386   close ($$0 ".log"); \
1387 }'
1388 # A command that, given a newline-separated list of test names on the
1389 # standard input, create the global log from their .trs and .log files.
1390 am__create_global_log = $(AWK) ' \
1391 function fatal(msg) \
1392 { \
1393   print "fatal: making $@: " msg | "cat >&2"; \
1394   exit 1; \
1395 } \
1396 function rst_section(header) \
1397 { \
1398   print header; \
1399   len = length(header); \
1400   for (i = 1; i <= len; i = i + 1) \
1401     printf "="; \
1402   printf "\n\n"; \
1403 } \
1404 { \
1405   copy_in_global_log = 1; \
1406   global_test_result = "RUN"; \
1407   while ((rc = (getline line < ($$0 ".trs"))) != 0) \
1408     { \
1409       if (rc < 0) \
1410          fatal("failed to read from " $$0 ".trs"); \
1411       if (line ~ /$(am__global_test_result_rx)/) \
1412         { \
1413           sub("$(am__global_test_result_rx)", "", line); \
1414           sub("[        ]*$$", "", line); \
1415           global_test_result = line; \
1416         } \
1417       else if (line ~ /$(am__copy_in_global_log_rx)[nN][oO]/) \
1418         copy_in_global_log = 0; \
1419     }; \
1420   if (copy_in_global_log) \
1421     { \
1422       rst_section(global_test_result ": " $$0); \
1423       while ((rc = (getline line < ($$0 ".log"))) != 0) \
1424       { \
1425         if (rc < 0) \
1426           fatal("failed to read from " $$0 ".log"); \
1427         print line; \
1428       }; \
1429       printf "\n"; \
1430     }; \
1431   close ($$0 ".trs"); \
1432   close ($$0 ".log"); \
1433 }'
1434 # Restructured Text title.
1435 am__rst_title = { sed 's/.*/   &   /;h;s/./=/g;p;x;s/ *$$//;p;g' && echo; }
1436 # Solaris 10 'make', and several other traditional 'make' implementations,
1437 # pass "-e" to $(SHELL), and POSIX 2008 even requires this.  Work around it
1438 # by disabling -e (using the XSI extension "set +e") if it's set.
1439 am__sh_e_setup = case $$- in *e*) set +e;; esac
1440 # Default flags passed to test drivers.
1441 am__common_driver_flags = \
1442   --color-tests "$$am__color_tests" \
1443   --enable-hard-errors "$$am__enable_hard_errors" \
1444   --expect-failure "$$am__expect_failure"
1445 # To be inserted before the command running the test.  Creates the
1446 # directory for the log if needed.  Stores in $dir the directory
1447 # containing $f, in $tst the test, in $log the log.  Executes the
1448 # developer- defined test setup AM_TESTS_ENVIRONMENT (if any), and
1449 # passes TESTS_ENVIRONMENT.  Set up options for the wrapper that
1450 # will run the test scripts (or their associated LOG_COMPILER, if
1451 # thy have one).
1452 am__check_pre = \
1453 $(am__sh_e_setup);                                      \
1454 $(am__vpath_adj_setup) $(am__vpath_adj)                 \
1455 $(am__tty_colors);                                      \
1456 srcdir=$(srcdir); export srcdir;                        \
1457 case "$@" in                                            \
1458   */*) am__odir=`echo "./$@" | sed 's|/[^/]*$$||'`;;    \
1459     *) am__odir=.;;                                     \
1460 esac;                                                   \
1461 test "x$$am__odir" = x"." || test -d "$$am__odir"       \
1462   || $(MKDIR_P) "$$am__odir" || exit $$?;               \
1463 if test -f "./$$f"; then dir=./;                        \
1464 elif test -f "$$f"; then dir=;                          \
1465 else dir="$(srcdir)/"; fi;                              \
1466 tst=$$dir$$f; log='$@';                                 \
1467 if test -n '$(DISABLE_HARD_ERRORS)'; then               \
1468   am__enable_hard_errors=no;                            \
1469 else                                                    \
1470   am__enable_hard_errors=yes;                           \
1471 fi;                                                     \
1472 case " $(XFAIL_TESTS) " in                              \
1473   *[\ \ ]$$f[\ \        ]* | *[\ \      ]$$dir$$f[\ \   ]*) \
1474     am__expect_failure=yes;;                            \
1475   *)                                                    \
1476     am__expect_failure=no;;                             \
1477 esac;                                                   \
1478 $(AM_TESTS_ENVIRONMENT) $(TESTS_ENVIRONMENT)
1479 # A shell command to get the names of the tests scripts with any registered
1480 # extension removed (i.e., equivalently, the names of the test logs, with
1481 # the '.log' extension removed).  The result is saved in the shell variable
1482 # '$bases'.  This honors runtime overriding of TESTS and TEST_LOGS.  Sadly,
1483 # we cannot use something simpler, involving e.g., "$(TEST_LOGS:.log=)",
1484 # since that might cause problem with VPATH rewrites for suffix-less tests.
1485 # See also 'test-harness-vpath-rewrite.sh' and 'test-trs-basic.sh'.
1486 am__set_TESTS_bases = \
1487   bases='$(TEST_LOGS)'; \
1488   bases=`for i in $$bases; do echo $$i; done | sed 's/\.log$$//'`; \
1489   bases=`echo $$bases`
1490 RECHECK_LOGS = $(TEST_LOGS)
1491 TEST_SUITE_LOG = test-suite.log
1492 TEST_EXTENSIONS = @EXEEXT@ .test
1493 LOG_DRIVER = $(SHELL) $(top_srcdir)/../test-driver
1494 LOG_COMPILE = $(LOG_COMPILER) $(AM_LOG_FLAGS) $(LOG_FLAGS)
1495 am__set_b = \
1496   case '$@' in \
1497     */*) \
1498       case '$*' in \
1499         */*) b='$*';; \
1500           *) b=`echo '$@' | sed 's/\.log$$//'`; \
1501        esac;; \
1502     *) \
1503       b='$*';; \
1504   esac
1505 am__test_logs1 = $(TESTS:=.log)
1506 am__test_logs2 = $(am__test_logs1:@EXEEXT@.log=.log)
1507 TEST_LOGS = $(am__test_logs2:.test.log=.log)
1508 TEST_LOG_DRIVER = $(SHELL) $(top_srcdir)/../test-driver
1509 TEST_LOG_COMPILE = $(TEST_LOG_COMPILER) $(AM_TEST_LOG_FLAGS) \
1510         $(TEST_LOG_FLAGS)
1511 DIST_SUBDIRS = $(SUBDIRS)
1512 ACLOCAL = @ACLOCAL@
1513 AMTAR = @AMTAR@
1514 AM_DEFAULT_VERBOSITY = @AM_DEFAULT_VERBOSITY@
1515 AR = @AR@
1516 AR_FOR_BUILD = @AR_FOR_BUILD@
1517 AS_FOR_TARGET = @AS_FOR_TARGET@
1518 AS_FOR_TARGET_AARCH64 = @AS_FOR_TARGET_AARCH64@
1519 AS_FOR_TARGET_ARM = @AS_FOR_TARGET_ARM@
1520 AS_FOR_TARGET_AVR = @AS_FOR_TARGET_AVR@
1521 AS_FOR_TARGET_BFIN = @AS_FOR_TARGET_BFIN@
1522 AS_FOR_TARGET_BPF = @AS_FOR_TARGET_BPF@
1523 AS_FOR_TARGET_CR16 = @AS_FOR_TARGET_CR16@
1524 AS_FOR_TARGET_CRIS = @AS_FOR_TARGET_CRIS@
1525 AS_FOR_TARGET_D10V = @AS_FOR_TARGET_D10V@
1526 AS_FOR_TARGET_ERC32 = @AS_FOR_TARGET_ERC32@
1527 AS_FOR_TARGET_EXAMPLE_SYNACOR = @AS_FOR_TARGET_EXAMPLE_SYNACOR@
1528 AS_FOR_TARGET_FRV = @AS_FOR_TARGET_FRV@
1529 AS_FOR_TARGET_FT32 = @AS_FOR_TARGET_FT32@
1530 AS_FOR_TARGET_H8300 = @AS_FOR_TARGET_H8300@
1531 AS_FOR_TARGET_IQ2000 = @AS_FOR_TARGET_IQ2000@
1532 AS_FOR_TARGET_LM32 = @AS_FOR_TARGET_LM32@
1533 AS_FOR_TARGET_M32C = @AS_FOR_TARGET_M32C@
1534 AS_FOR_TARGET_M32R = @AS_FOR_TARGET_M32R@
1535 AS_FOR_TARGET_M68HC11 = @AS_FOR_TARGET_M68HC11@
1536 AS_FOR_TARGET_MCORE = @AS_FOR_TARGET_MCORE@
1537 AS_FOR_TARGET_MICROBLAZE = @AS_FOR_TARGET_MICROBLAZE@
1538 AS_FOR_TARGET_MIPS = @AS_FOR_TARGET_MIPS@
1539 AS_FOR_TARGET_MN10300 = @AS_FOR_TARGET_MN10300@
1540 AS_FOR_TARGET_MOXIE = @AS_FOR_TARGET_MOXIE@
1541 AS_FOR_TARGET_MSP430 = @AS_FOR_TARGET_MSP430@
1542 AS_FOR_TARGET_OR1K = @AS_FOR_TARGET_OR1K@
1543 AS_FOR_TARGET_PPC = @AS_FOR_TARGET_PPC@
1544 AS_FOR_TARGET_PRU = @AS_FOR_TARGET_PRU@
1545 AS_FOR_TARGET_RISCV = @AS_FOR_TARGET_RISCV@
1546 AS_FOR_TARGET_RL78 = @AS_FOR_TARGET_RL78@
1547 AS_FOR_TARGET_RX = @AS_FOR_TARGET_RX@
1548 AS_FOR_TARGET_SH = @AS_FOR_TARGET_SH@
1549 AS_FOR_TARGET_V850 = @AS_FOR_TARGET_V850@
1550 AUTOCONF = @AUTOCONF@
1551 AUTOHEADER = @AUTOHEADER@
1552 AUTOMAKE = @AUTOMAKE@
1553 AWK = @AWK@
1554 CC = @CC@
1555 CCDEPMODE = @CCDEPMODE@
1556 CC_FOR_BUILD = @CC_FOR_BUILD@
1557 CC_FOR_TARGET = @CC_FOR_TARGET@
1558 CC_FOR_TARGET_AARCH64 = @CC_FOR_TARGET_AARCH64@
1559 CC_FOR_TARGET_ARM = @CC_FOR_TARGET_ARM@
1560 CC_FOR_TARGET_AVR = @CC_FOR_TARGET_AVR@
1561 CC_FOR_TARGET_BFIN = @CC_FOR_TARGET_BFIN@
1562 CC_FOR_TARGET_BPF = @CC_FOR_TARGET_BPF@
1563 CC_FOR_TARGET_CR16 = @CC_FOR_TARGET_CR16@
1564 CC_FOR_TARGET_CRIS = @CC_FOR_TARGET_CRIS@
1565 CC_FOR_TARGET_D10V = @CC_FOR_TARGET_D10V@
1566 CC_FOR_TARGET_ERC32 = @CC_FOR_TARGET_ERC32@
1567 CC_FOR_TARGET_EXAMPLE_SYNACOR = @CC_FOR_TARGET_EXAMPLE_SYNACOR@
1568 CC_FOR_TARGET_FRV = @CC_FOR_TARGET_FRV@
1569 CC_FOR_TARGET_FT32 = @CC_FOR_TARGET_FT32@
1570 CC_FOR_TARGET_H8300 = @CC_FOR_TARGET_H8300@
1571 CC_FOR_TARGET_IQ2000 = @CC_FOR_TARGET_IQ2000@
1572 CC_FOR_TARGET_LM32 = @CC_FOR_TARGET_LM32@
1573 CC_FOR_TARGET_M32C = @CC_FOR_TARGET_M32C@
1574 CC_FOR_TARGET_M32R = @CC_FOR_TARGET_M32R@
1575 CC_FOR_TARGET_M68HC11 = @CC_FOR_TARGET_M68HC11@
1576 CC_FOR_TARGET_MCORE = @CC_FOR_TARGET_MCORE@
1577 CC_FOR_TARGET_MICROBLAZE = @CC_FOR_TARGET_MICROBLAZE@
1578 CC_FOR_TARGET_MIPS = @CC_FOR_TARGET_MIPS@
1579 CC_FOR_TARGET_MN10300 = @CC_FOR_TARGET_MN10300@
1580 CC_FOR_TARGET_MOXIE = @CC_FOR_TARGET_MOXIE@
1581 CC_FOR_TARGET_MSP430 = @CC_FOR_TARGET_MSP430@
1582 CC_FOR_TARGET_OR1K = @CC_FOR_TARGET_OR1K@
1583 CC_FOR_TARGET_PPC = @CC_FOR_TARGET_PPC@
1584 CC_FOR_TARGET_PRU = @CC_FOR_TARGET_PRU@
1585 CC_FOR_TARGET_RISCV = @CC_FOR_TARGET_RISCV@
1586 CC_FOR_TARGET_RL78 = @CC_FOR_TARGET_RL78@
1587 CC_FOR_TARGET_RX = @CC_FOR_TARGET_RX@
1588 CC_FOR_TARGET_SH = @CC_FOR_TARGET_SH@
1589 CC_FOR_TARGET_V850 = @CC_FOR_TARGET_V850@
1590 CFLAGS = @CFLAGS@
1591 CFLAGS_FOR_BUILD = @CFLAGS_FOR_BUILD@
1592 CGEN_MAINT = @CGEN_MAINT@
1593 CPP = @CPP@
1594 CPPFLAGS = @CPPFLAGS@
1595 CPPFLAGS_FOR_BUILD = @CPPFLAGS_FOR_BUILD@
1596 CYGPATH_W = @CYGPATH_W@
1597 C_DIALECT = @C_DIALECT@
1598 DEFS = @DEFS@
1599 DEPDIR = @DEPDIR@
1600 DSYMUTIL = @DSYMUTIL@
1601 DTC = @DTC@
1602 DUMPBIN = @DUMPBIN@
1603 ECHO_C = @ECHO_C@
1604 ECHO_N = @ECHO_N@
1605 ECHO_T = @ECHO_T@
1606 EGREP = @EGREP@
1607 EXEEXT = @EXEEXT@
1608 FGREP = @FGREP@
1609 GREP = @GREP@
1610 IGEN_FLAGS_SMP = @IGEN_FLAGS_SMP@
1611 INSTALL = @INSTALL@
1612 INSTALL_DATA = @INSTALL_DATA@
1613 INSTALL_PROGRAM = @INSTALL_PROGRAM@
1614 INSTALL_SCRIPT = @INSTALL_SCRIPT@
1615 INSTALL_STRIP_PROGRAM = @INSTALL_STRIP_PROGRAM@
1616 LD = @LD@
1617 LDFLAGS = @LDFLAGS@
1618 LDFLAGS_FOR_BUILD = @LDFLAGS_FOR_BUILD@
1619 LD_FOR_TARGET = @LD_FOR_TARGET@
1620 LD_FOR_TARGET_AARCH64 = @LD_FOR_TARGET_AARCH64@
1621 LD_FOR_TARGET_ARM = @LD_FOR_TARGET_ARM@
1622 LD_FOR_TARGET_AVR = @LD_FOR_TARGET_AVR@
1623 LD_FOR_TARGET_BFIN = @LD_FOR_TARGET_BFIN@
1624 LD_FOR_TARGET_BPF = @LD_FOR_TARGET_BPF@
1625 LD_FOR_TARGET_CR16 = @LD_FOR_TARGET_CR16@
1626 LD_FOR_TARGET_CRIS = @LD_FOR_TARGET_CRIS@
1627 LD_FOR_TARGET_D10V = @LD_FOR_TARGET_D10V@
1628 LD_FOR_TARGET_ERC32 = @LD_FOR_TARGET_ERC32@
1629 LD_FOR_TARGET_EXAMPLE_SYNACOR = @LD_FOR_TARGET_EXAMPLE_SYNACOR@
1630 LD_FOR_TARGET_FRV = @LD_FOR_TARGET_FRV@
1631 LD_FOR_TARGET_FT32 = @LD_FOR_TARGET_FT32@
1632 LD_FOR_TARGET_H8300 = @LD_FOR_TARGET_H8300@
1633 LD_FOR_TARGET_IQ2000 = @LD_FOR_TARGET_IQ2000@
1634 LD_FOR_TARGET_LM32 = @LD_FOR_TARGET_LM32@
1635 LD_FOR_TARGET_M32C = @LD_FOR_TARGET_M32C@
1636 LD_FOR_TARGET_M32R = @LD_FOR_TARGET_M32R@
1637 LD_FOR_TARGET_M68HC11 = @LD_FOR_TARGET_M68HC11@
1638 LD_FOR_TARGET_MCORE = @LD_FOR_TARGET_MCORE@
1639 LD_FOR_TARGET_MICROBLAZE = @LD_FOR_TARGET_MICROBLAZE@
1640 LD_FOR_TARGET_MIPS = @LD_FOR_TARGET_MIPS@
1641 LD_FOR_TARGET_MN10300 = @LD_FOR_TARGET_MN10300@
1642 LD_FOR_TARGET_MOXIE = @LD_FOR_TARGET_MOXIE@
1643 LD_FOR_TARGET_MSP430 = @LD_FOR_TARGET_MSP430@
1644 LD_FOR_TARGET_OR1K = @LD_FOR_TARGET_OR1K@
1645 LD_FOR_TARGET_PPC = @LD_FOR_TARGET_PPC@
1646 LD_FOR_TARGET_PRU = @LD_FOR_TARGET_PRU@
1647 LD_FOR_TARGET_RISCV = @LD_FOR_TARGET_RISCV@
1648 LD_FOR_TARGET_RL78 = @LD_FOR_TARGET_RL78@
1649 LD_FOR_TARGET_RX = @LD_FOR_TARGET_RX@
1650 LD_FOR_TARGET_SH = @LD_FOR_TARGET_SH@
1651 LD_FOR_TARGET_V850 = @LD_FOR_TARGET_V850@
1652 LIBOBJS = @LIBOBJS@
1653 LIBS = @LIBS@
1654 LIBTOOL = @LIBTOOL@
1655 LIPO = @LIPO@
1656 LN_S = @LN_S@
1657 LTLIBOBJS = @LTLIBOBJS@
1658 MAINT = @MAINT@
1659 MAKEINFO = @MAKEINFO@
1660 MKDIR_P = @MKDIR_P@
1661 NM = @NM@
1662 NMEDIT = @NMEDIT@
1663 OBJDUMP = @OBJDUMP@
1664 OBJEXT = @OBJEXT@
1665 OTOOL = @OTOOL@
1666 OTOOL64 = @OTOOL64@
1667 PACKAGE = @PACKAGE@
1668 PACKAGE_BUGREPORT = @PACKAGE_BUGREPORT@
1669 PACKAGE_NAME = @PACKAGE_NAME@
1670 PACKAGE_STRING = @PACKAGE_STRING@
1671 PACKAGE_TARNAME = @PACKAGE_TARNAME@
1672 PACKAGE_URL = @PACKAGE_URL@
1673 PACKAGE_VERSION = @PACKAGE_VERSION@
1674 PATH_SEPARATOR = @PATH_SEPARATOR@
1675 PKGVERSION = @PKGVERSION@
1676 PKG_CONFIG = @PKG_CONFIG@
1677 PKG_CONFIG_LIBDIR = @PKG_CONFIG_LIBDIR@
1678 PKG_CONFIG_PATH = @PKG_CONFIG_PATH@
1679 RANLIB = @RANLIB@
1680 RANLIB_FOR_BUILD = @RANLIB_FOR_BUILD@
1681 READLINE_CFLAGS = @READLINE_CFLAGS@
1682 READLINE_LIB = @READLINE_LIB@
1683 REPORT_BUGS_TEXI = @REPORT_BUGS_TEXI@
1684 REPORT_BUGS_TO = @REPORT_BUGS_TO@
1685 SDL_CFLAGS = @SDL_CFLAGS@
1686 SDL_LIBS = @SDL_LIBS@
1687 SED = @SED@
1688 SET_MAKE = @SET_MAKE@
1689 SHELL = @SHELL@
1690 SIM_ENABLED_ARCHES = @SIM_ENABLED_ARCHES@
1691 SIM_FRV_TRAPDUMP_FLAGS = @SIM_FRV_TRAPDUMP_FLAGS@
1692 SIM_HW_CFLAGS = @SIM_HW_CFLAGS@
1693 SIM_HW_SOCKSER = @SIM_HW_SOCKSER@
1694 SIM_INLINE = @SIM_INLINE@
1695 SIM_MIPS_BITSIZE = @SIM_MIPS_BITSIZE@
1696 SIM_MIPS_FPU_BITSIZE = @SIM_MIPS_FPU_BITSIZE@
1697 SIM_MIPS_GEN = @SIM_MIPS_GEN@
1698 SIM_MIPS_IGEN_ITABLE_FLAGS = @SIM_MIPS_IGEN_ITABLE_FLAGS@
1699 SIM_MIPS_M16_FLAGS = @SIM_MIPS_M16_FLAGS@
1700 SIM_MIPS_MULTI_IGEN_CONFIGS = @SIM_MIPS_MULTI_IGEN_CONFIGS@
1701 SIM_MIPS_MULTI_OBJ = @SIM_MIPS_MULTI_OBJ@
1702 SIM_MIPS_MULTI_SRC = @SIM_MIPS_MULTI_SRC@
1703 SIM_MIPS_SINGLE_FLAGS = @SIM_MIPS_SINGLE_FLAGS@
1704 SIM_MIPS_SUBTARGET = @SIM_MIPS_SUBTARGET@
1705 SIM_PRIMARY_TARGET = @SIM_PRIMARY_TARGET@
1706 SIM_RISCV_BITSIZE = @SIM_RISCV_BITSIZE@
1707 SIM_RX_CYCLE_ACCURATE_FLAGS = @SIM_RX_CYCLE_ACCURATE_FLAGS@
1708 SIM_TOOLCHAIN_VARS = @SIM_TOOLCHAIN_VARS@
1709 STRIP = @STRIP@
1710 TERMCAP_LIB = @TERMCAP_LIB@
1711 VERSION = @VERSION@
1712 WARN_CFLAGS = @WARN_CFLAGS@
1713 WERROR_CFLAGS = @WERROR_CFLAGS@
1714 abs_builddir = @abs_builddir@
1715 abs_srcdir = @abs_srcdir@
1716 abs_top_builddir = @abs_top_builddir@
1717 abs_top_srcdir = @abs_top_srcdir@
1718 ac_ct_CC = @ac_ct_CC@
1719 ac_ct_DUMPBIN = @ac_ct_DUMPBIN@
1720 am__include = @am__include@
1721 am__leading_dot = @am__leading_dot@
1722 am__quote = @am__quote@
1723 am__tar = @am__tar@
1724 am__untar = @am__untar@
1725 bindir = @bindir@
1726 build = @build@
1727 build_alias = @build_alias@
1728 build_cpu = @build_cpu@
1729 build_os = @build_os@
1730 build_vendor = @build_vendor@
1731 builddir = @builddir@
1732 cgen = @cgen@
1733 cgendir = @cgendir@
1734 datadir = @datadir@
1735 datarootdir = @datarootdir@
1736 docdir = @docdir@
1737 dvidir = @dvidir@
1738 exec_prefix = @exec_prefix@
1739 host = @host@
1740 host_alias = @host_alias@
1741 host_cpu = @host_cpu@
1742 host_os = @host_os@
1743 host_vendor = @host_vendor@
1744 htmldir = @htmldir@
1745 includedir = @includedir@
1746 infodir = @infodir@
1747 install_sh = @install_sh@
1748 libdir = @libdir@
1749 libexecdir = @libexecdir@
1750 localedir = @localedir@
1751 localstatedir = @localstatedir@
1752 mandir = @mandir@
1753 mkdir_p = @mkdir_p@
1754 oldincludedir = @oldincludedir@
1755 pdfdir = @pdfdir@
1756 prefix = @prefix@
1757 program_transform_name = @program_transform_name@
1758 psdir = @psdir@
1759 sbindir = @sbindir@
1760 sharedstatedir = @sharedstatedir@
1761 srcdir = @srcdir@
1762 subdirs = @subdirs@
1763 sysconfdir = @sysconfdir@
1764 target = @target@
1765 target_alias = @target_alias@
1766 target_cpu = @target_cpu@
1767 target_os = @target_os@
1768 target_vendor = @target_vendor@
1769 top_build_prefix = @top_build_prefix@
1770 top_builddir = @top_builddir@
1771 top_srcdir = @top_srcdir@
1772 AUTOMAKE_OPTIONS = dejagnu foreign no-dist subdir-objects
1773 ACLOCAL_AMFLAGS = -Im4 -I.. -I../config
1774 GNULIB_PARENT_DIR = ..
1775 srccom = $(srcdir)/common
1776 srcroot = $(srcdir)/..
1777 SUBDIRS = @subdirs@
1778 pkginclude_HEADERS = $(am__append_1)
1779 EXTRA_LIBRARIES = igen/libigen.a
1780 noinst_LIBRARIES = common/libcommon.a $(am__append_3) $(am__append_5) \
1781         $(am__append_7) $(am__append_9) $(am__append_11) \
1782         $(am__append_15) $(am__append_20) $(am__append_25) \
1783         $(am__append_30) $(am__append_34) $(am__append_36) \
1784         $(am__append_40) $(am__append_42) $(am__append_44) \
1785         $(am__append_48) $(am__append_52) $(am__append_56) \
1786         $(am__append_60) $(am__append_64) $(am__append_66) \
1787         $(am__append_71) $(am__append_79) $(am__append_83) \
1788         $(am__append_85) $(am__append_87) $(am__append_93) \
1789         $(am__append_95) $(am__append_97) $(am__append_99) \
1790         $(am__append_101) $(am__append_106)
1791 BUILT_SOURCES = $(am__append_13) $(am__append_17) $(am__append_23) \
1792         $(am__append_27) $(am__append_38) $(am__append_46) \
1793         $(am__append_50) $(am__append_58) $(am__append_73) \
1794         $(am__append_81) $(am__append_89) $(am__append_103) \
1795         $(am__append_108)
1796 CLEANFILES = common/version.c common/version.c-stamp \
1797         testsuite/common/bits-gen testsuite/common/bits32m0.c \
1798         testsuite/common/bits32m31.c testsuite/common/bits64m0.c \
1799         testsuite/common/bits64m63.c
1800 DISTCLEANFILES = $(am__append_78)
1801 MOSTLYCLEANFILES = core $(SIM_ENABLED_ARCHES:%=%/*.o) \
1802         $(SIM_ENABLED_ARCHES:%=%/hw-config.h) \
1803         $(SIM_ENABLED_ARCHES:%=%/stamp-hw) \
1804         $(SIM_ENABLED_ARCHES:%=%/modules.c) \
1805         $(SIM_ENABLED_ARCHES:%=%/stamp-modules) $(igen_IGEN_TOOLS) \
1806         site-sim-config.exp testrun.log testrun.sum $(am__append_14) \
1807         $(am__append_19) $(am__append_24) $(am__append_29) \
1808         $(am__append_39) $(am__append_47) $(am__append_51) \
1809         $(am__append_55) $(am__append_59) $(am__append_63) \
1810         $(am__append_77) $(am__append_82) $(am__append_90) \
1811         $(am__append_105) $(am__append_109)
1812 AM_CFLAGS = \
1813         $(WERROR_CFLAGS) \
1814         $(WARN_CFLAGS) \
1815         $(AM_CFLAGS_$(subst -,_,$(@D))) \
1816         $(AM_CFLAGS_$(subst -,_,$(@D)_$(@F)))
1817
1818 AM_CPPFLAGS = $(INCGNU) -I$(srcroot) -I$(srcroot)/include -I../bfd \
1819         -I.. -I$(@D) -I$(srcdir)/$(@D) $(SIM_HW_CFLAGS) $(SIM_INLINE) \
1820         $(AM_CPPFLAGS_$(subst -,_,$(@D))) $(AM_CPPFLAGS_$(subst \
1821         -,_,$(@D)_$(@F))) -I$(srcdir)/common -DSIM_TOPDIR_BUILD
1822 AM_CPPFLAGS_FOR_BUILD = -I$(srcroot)/include $(SIM_HW_CFLAGS) \
1823         $(SIM_INLINE) -I$(srcdir)/common
1824 COMPILE_FOR_BUILD = $(CC_FOR_BUILD) $(AM_CPPFLAGS_FOR_BUILD) $(CPPFLAGS_FOR_BUILD) $(CFLAGS_FOR_BUILD)
1825 LINK_FOR_BUILD = $(CC_FOR_BUILD) $(CFLAGS_FOR_BUILD) $(LDFLAGS_FOR_BUILD) -o $@
1826 SIM_ALL_RECURSIVE_DEPS = $(am__append_91)
1827 SIM_INSTALL_DATA_LOCAL_DEPS =
1828 SIM_INSTALL_EXEC_LOCAL_DEPS = $(am__append_32)
1829 SIM_UNINSTALL_LOCAL_DEPS = $(am__append_33)
1830 SIM_DEPBASE = $(@D)/$(DEPDIR)/$(@F:.o=)
1831 SIM_COMPILE = \
1832         $(AM_V_CC)$(COMPILE) -MT $@ -MD -MP -MF $(SIM_DEPBASE).Tpo -c -o $@ $< && \
1833         $(am__mv) $(SIM_DEPBASE).Tpo $(SIM_DEPBASE).Po
1834
1835 AM_CPPFLAGS_common = -DSIM_COMMON_BUILD
1836 common_libcommon_a_SOURCES = \
1837         common/callback.c \
1838         common/portability.c \
1839         common/sim-load.c \
1840         common/syscall.c \
1841         common/target-newlib-errno.c \
1842         common/target-newlib-open.c \
1843         common/target-newlib-signal.c \
1844         common/target-newlib-syscall.c \
1845         common/version.c
1846
1847 SIM_COMMON_HW_OBJS = \
1848         hw-alloc.o \
1849         hw-base.o \
1850         hw-device.o \
1851         hw-events.o \
1852         hw-handles.o \
1853         hw-instances.o \
1854         hw-ports.o \
1855         hw-properties.o \
1856         hw-tree.o \
1857         sim-hw.o
1858
1859 SIM_NEW_COMMON_OBJS = sim-arange.o sim-bits.o sim-close.o \
1860         sim-command.o sim-config.o sim-core.o sim-cpu.o sim-endian.o \
1861         sim-engine.o sim-events.o sim-fpu.o sim-hload.o sim-hrw.o \
1862         sim-io.o sim-info.o sim-memopt.o sim-model.o sim-module.o \
1863         sim-options.o sim-profile.o sim-reason.o sim-reg.o \
1864         sim-signal.o sim-stop.o sim-syscall.o sim-trace.o sim-utils.o \
1865         sim-watch.o $(am__append_2)
1866 SIM_HW_DEVICES = cfi core pal glue
1867 am_arch_d = $(subst -,_,$(@D))
1868 GEN_MODULES_C_SRCS = \
1869         $(wildcard \
1870                 $(patsubst %,$(srcdir)/%,$($(am_arch_d)_libsim_a_SOURCES)) \
1871                 $(patsubst %.o,$(srcdir)/%.c,$($(am_arch_d)_libsim_a_OBJECTS) $($(am_arch_d)_libsim_a_LIBADD)) \
1872                 $(filter-out %.o,$(patsubst $(@D)/%.o,$(srcdir)/common/%.c,$($(am_arch_d)_libsim_a_LIBADD))))
1873
1874 LIBIBERTY_LIB = ../libiberty/libiberty.a
1875 BFD_LIB = ../bfd/libbfd.la
1876 OPCODES_LIB = ../opcodes/libopcodes.la
1877 SIM_COMMON_LIBS = \
1878         $(BFD_LIB) \
1879         $(OPCODES_LIB) \
1880         $(LIBIBERTY_LIB) \
1881         $(LIBGNU) \
1882         $(LIBGNU_EXTRA_LIBS)
1883
1884 GUILE = $(or $(wildcard ../guile/libguile/guile),guile)
1885 CGEN = "$(GUILE) -l $(cgendir)/guile.scm -s"
1886 CGENFLAGS = -v
1887 CGEN_CPU_DIR = $(cgendir)/cpu
1888 CPU_DIR = $(srcroot)/cpu
1889 CGEN_ARCHFILE = $(CPU_DIR)/$(@D).cpu
1890 CGEN_READ_SCM = $(cgendir)/sim.scm
1891 CGEN_ARCH_SCM = $(cgendir)/sim-arch.scm
1892 CGEN_CPU_SCM = $(cgendir)/sim-cpu.scm $(cgendir)/sim-model.scm
1893 CGEN_DECODE_SCM = $(cgendir)/sim-decode.scm
1894 CGEN_DESC_SCM = $(cgendir)/desc.scm $(cgendir)/desc-cpu.scm
1895 CGEN_CPU_EXTR = /extr/
1896 CGEN_CPU_READ = /read/
1897 CGEN_CPU_WRITE = /write/
1898 CGEN_CPU_SEM = /sem/
1899 CGEN_CPU_SEMSW = /semsw/
1900 CGEN_WRAPPER = $(srccom)/cgen.sh
1901 CGEN_GEN_ARCH = \
1902         $(SHELL) $(CGEN_WRAPPER) arch $(srcdir)/$(@D) \
1903                 $(CGEN) $(cgendir) "$(CGENFLAGS)" \
1904                 $(@D) "$$FLAGS" ignored "$$isa" $$mach ignored \
1905                 $(CGEN_ARCHFILE) ignored
1906
1907 CGEN_GEN_CPU = \
1908         $(SHELL) $(CGEN_WRAPPER) cpu $(srcdir)/$(@D) \
1909                 $(CGEN) $(cgendir) "$(CGENFLAGS)" \
1910                 $(@D) "$$FLAGS" $$cpu "$$isa" $$mach "$$SUFFIX" \
1911                 $(CGEN_ARCHFILE) "$$EXTRAFILES"
1912
1913 CGEN_GEN_DEFS = \
1914         $(SHELL) $(CGEN_WRAPPER) defs $(srcdir)/$(@D) \
1915                 $(CGEN) $(cgendir) "$(CGENFLAGS)" \
1916                 $(@D) "$$FLAGS" $$cpu "$$isa" $$mach "$$SUFFIX" \
1917                 $(CGEN_ARCHFILE) ignored
1918
1919 CGEN_GEN_DECODE = \
1920         $(SHELL) $(CGEN_WRAPPER) decode $(srcdir)/$(@D) \
1921                 $(CGEN) $(cgendir) "$(CGENFLAGS)" \
1922                 $(@D) "$$FLAGS" $$cpu "$$isa" $$mach "$$SUFFIX" \
1923                 $(CGEN_ARCHFILE) "$$EXTRAFILES"
1924
1925 CGEN_GEN_CPU_DECODE = \
1926         $(SHELL) $(CGEN_WRAPPER) cpu-decode $(srcdir)/$(@D) \
1927                 $(CGEN) $(cgendir) "$(CGENFLAGS)" \
1928                 $(@D) "$$FLAGS" $$cpu "$$isa" $$mach "$$SUFFIX" \
1929                 $(CGEN_ARCHFILE) "$$EXTRAFILES"
1930
1931 CGEN_GEN_CPU_DESC = \
1932         $(SHELL) $(CGEN_WRAPPER) desc $(srcdir)/$(@D) \
1933                 $(CGEN) $(cgendir) "$(CGENFLAGS)" \
1934                 $(@D) "$$FLAGS" $$cpu "$$isa" $$mach "$$SUFFIX" \
1935                 $(CGEN_ARCHFILE) ignored $$opcfile
1936
1937
1938 # igen leaks memory, and therefore makes AddressSanitizer unhappy.  Disable
1939 # leak detection while running it.
1940 IGEN = igen/igen$(EXEEXT)
1941 IGEN_RUN = ASAN_OPTIONS=detect_leaks=0 $(IGEN) $(IGEN_FLAGS_SMP)
1942 igen_libigen_a_SOURCES = \
1943         igen/table.c \
1944         igen/lf.c \
1945         igen/misc.c \
1946         igen/filter_host.c \
1947         igen/ld-decode.c \
1948         igen/ld-cache.c \
1949         igen/filter.c \
1950         igen/ld-insn.c \
1951         igen/gen-model.c \
1952         igen/gen-itable.c \
1953         igen/gen-icache.c \
1954         igen/gen-semantics.c \
1955         igen/gen-idecode.c \
1956         igen/gen-support.c \
1957         igen/gen-engine.c \
1958         igen/gen.c
1959
1960 igen_igen_SOURCES = igen/igen.c
1961 igen_igen_LDADD = igen/libigen.a
1962 igen_filter_SOURCES =
1963 igen_filter_LDADD = igen/filter-main.o igen/libigen.a
1964 igen_gen_SOURCES =
1965 igen_gen_LDADD = igen/gen-main.o igen/libigen.a
1966 igen_ld_cache_SOURCES =
1967 igen_ld_cache_LDADD = igen/ld-cache-main.o igen/libigen.a
1968 igen_ld_decode_SOURCES =
1969 igen_ld_decode_LDADD = igen/ld-decode-main.o igen/libigen.a
1970 igen_ld_insn_SOURCES =
1971 igen_ld_insn_LDADD = igen/ld-insn-main.o igen/libigen.a
1972 igen_table_SOURCES =
1973 igen_table_LDADD = igen/table-main.o igen/libigen.a
1974 igen_IGEN_TOOLS = \
1975         $(IGEN) \
1976         igen/filter \
1977         igen/gen \
1978         igen/ld-cache \
1979         igen/ld-decode \
1980         igen/ld-insn \
1981         igen/table
1982
1983 EXTRA_DEJAGNU_SITE_CONFIG = site-sim-config.exp
1984
1985 # Custom verbose test variables that automake doesn't provide (yet?).
1986 AM_V_RUNTEST = $(AM_V_RUNTEST_@AM_V@)
1987 AM_V_RUNTEST_ = $(AM_V_RUNTEST_@AM_DEFAULT_V@)
1988 AM_V_RUNTEST_0 = @echo "  RUNTEST  $(RUNTESTFLAGS) $*";
1989 AM_V_RUNTEST_1 =
1990 DO_RUNTEST = \
1991         LC_ALL=C; export LC_ALL; \
1992         EXPECT=${EXPECT} ; export EXPECT ; \
1993         runtest=$(RUNTEST); \
1994         $$runtest $(RUNTESTFLAGS)
1995
1996 testsuite_common_CPPFLAGS = \
1997         -I$(srcdir)/common \
1998         -I$(srcroot)/include \
1999         -I../bfd
2000
2001 @SIM_ENABLE_ARCH_aarch64_TRUE@nodist_aarch64_libsim_a_SOURCES = \
2002 @SIM_ENABLE_ARCH_aarch64_TRUE@  aarch64/modules.c
2003
2004 @SIM_ENABLE_ARCH_aarch64_TRUE@aarch64_libsim_a_SOURCES = \
2005 @SIM_ENABLE_ARCH_aarch64_TRUE@  $(common_libcommon_a_SOURCES)
2006
2007 @SIM_ENABLE_ARCH_aarch64_TRUE@aarch64_libsim_a_LIBADD = \
2008 @SIM_ENABLE_ARCH_aarch64_TRUE@  $(patsubst %,aarch64/%,$(SIM_NEW_COMMON_OBJS)) \
2009 @SIM_ENABLE_ARCH_aarch64_TRUE@  $(patsubst %,aarch64/dv-%.o,$(SIM_HW_DEVICES)) \
2010 @SIM_ENABLE_ARCH_aarch64_TRUE@  aarch64/cpustate.o \
2011 @SIM_ENABLE_ARCH_aarch64_TRUE@  aarch64/interp.o \
2012 @SIM_ENABLE_ARCH_aarch64_TRUE@  aarch64/memory.o \
2013 @SIM_ENABLE_ARCH_aarch64_TRUE@  aarch64/sim-resume.o \
2014 @SIM_ENABLE_ARCH_aarch64_TRUE@  aarch64/simulator.o
2015
2016 @SIM_ENABLE_ARCH_aarch64_TRUE@aarch64_run_SOURCES =
2017 @SIM_ENABLE_ARCH_aarch64_TRUE@aarch64_run_LDADD = \
2018 @SIM_ENABLE_ARCH_aarch64_TRUE@  aarch64/nrun.o \
2019 @SIM_ENABLE_ARCH_aarch64_TRUE@  aarch64/libsim.a \
2020 @SIM_ENABLE_ARCH_aarch64_TRUE@  $(SIM_COMMON_LIBS)
2021
2022 @SIM_ENABLE_ARCH_arm_TRUE@AM_CPPFLAGS_arm = -DMODET
2023 @SIM_ENABLE_ARCH_arm_TRUE@nodist_arm_libsim_a_SOURCES = \
2024 @SIM_ENABLE_ARCH_arm_TRUE@      arm/modules.c
2025
2026 @SIM_ENABLE_ARCH_arm_TRUE@arm_libsim_a_SOURCES = \
2027 @SIM_ENABLE_ARCH_arm_TRUE@      $(common_libcommon_a_SOURCES)
2028
2029 @SIM_ENABLE_ARCH_arm_TRUE@arm_libsim_a_LIBADD = \
2030 @SIM_ENABLE_ARCH_arm_TRUE@      arm/wrapper.o \
2031 @SIM_ENABLE_ARCH_arm_TRUE@      $(patsubst %,arm/%,$(SIM_NEW_COMMON_OBJS)) \
2032 @SIM_ENABLE_ARCH_arm_TRUE@      $(patsubst %,arm/dv-%.o,$(SIM_HW_DEVICES)) \
2033 @SIM_ENABLE_ARCH_arm_TRUE@      arm/armemu.o \
2034 @SIM_ENABLE_ARCH_arm_TRUE@      arm/armemu32.o arm/arminit.o arm/armos.o arm/armsupp.o \
2035 @SIM_ENABLE_ARCH_arm_TRUE@      arm/armvirt.o arm/thumbemu.o \
2036 @SIM_ENABLE_ARCH_arm_TRUE@      arm/armcopro.o arm/maverick.o arm/iwmmxt.o
2037
2038 @SIM_ENABLE_ARCH_arm_TRUE@arm_run_SOURCES =
2039 @SIM_ENABLE_ARCH_arm_TRUE@arm_run_LDADD = \
2040 @SIM_ENABLE_ARCH_arm_TRUE@      arm/nrun.o \
2041 @SIM_ENABLE_ARCH_arm_TRUE@      arm/libsim.a \
2042 @SIM_ENABLE_ARCH_arm_TRUE@      $(SIM_COMMON_LIBS)
2043
2044 @SIM_ENABLE_ARCH_arm_TRUE@armdocdir = $(docdir)/arm
2045 @SIM_ENABLE_ARCH_arm_TRUE@armdoc_DATA = arm/README
2046 @SIM_ENABLE_ARCH_avr_TRUE@nodist_avr_libsim_a_SOURCES = \
2047 @SIM_ENABLE_ARCH_avr_TRUE@      avr/modules.c
2048
2049 @SIM_ENABLE_ARCH_avr_TRUE@avr_libsim_a_SOURCES = \
2050 @SIM_ENABLE_ARCH_avr_TRUE@      $(common_libcommon_a_SOURCES)
2051
2052 @SIM_ENABLE_ARCH_avr_TRUE@avr_libsim_a_LIBADD = \
2053 @SIM_ENABLE_ARCH_avr_TRUE@      avr/interp.o \
2054 @SIM_ENABLE_ARCH_avr_TRUE@      $(patsubst %,avr/%,$(SIM_NEW_COMMON_OBJS)) \
2055 @SIM_ENABLE_ARCH_avr_TRUE@      $(patsubst %,avr/dv-%.o,$(SIM_HW_DEVICES)) \
2056 @SIM_ENABLE_ARCH_avr_TRUE@      avr/sim-resume.o
2057
2058 @SIM_ENABLE_ARCH_avr_TRUE@avr_run_SOURCES =
2059 @SIM_ENABLE_ARCH_avr_TRUE@avr_run_LDADD = \
2060 @SIM_ENABLE_ARCH_avr_TRUE@      avr/nrun.o \
2061 @SIM_ENABLE_ARCH_avr_TRUE@      avr/libsim.a \
2062 @SIM_ENABLE_ARCH_avr_TRUE@      $(SIM_COMMON_LIBS)
2063
2064 @SIM_ENABLE_ARCH_bfin_TRUE@AM_CPPFLAGS_bfin = $(SDL_CFLAGS)
2065 @SIM_ENABLE_ARCH_bfin_TRUE@nodist_bfin_libsim_a_SOURCES = \
2066 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin/modules.c
2067
2068 @SIM_ENABLE_ARCH_bfin_TRUE@bfin_libsim_a_SOURCES = \
2069 @SIM_ENABLE_ARCH_bfin_TRUE@     $(common_libcommon_a_SOURCES)
2070
2071 @SIM_ENABLE_ARCH_bfin_TRUE@bfin_libsim_a_LIBADD = \
2072 @SIM_ENABLE_ARCH_bfin_TRUE@     $(patsubst %,bfin/%,$(SIM_NEW_COMMON_OBJS)) \
2073 @SIM_ENABLE_ARCH_bfin_TRUE@     $(patsubst %,bfin/dv-%.o,$(SIM_HW_DEVICES)) \
2074 @SIM_ENABLE_ARCH_bfin_TRUE@     $(patsubst %,bfin/dv-%.o,$(bfin_SIM_EXTRA_HW_DEVICES)) \
2075 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin/bfin-sim.o \
2076 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin/devices.o \
2077 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin/gui.o \
2078 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin/interp.o \
2079 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin/machs.o \
2080 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin/sim-resume.o
2081
2082 @SIM_ENABLE_ARCH_bfin_TRUE@bfin_run_SOURCES =
2083 @SIM_ENABLE_ARCH_bfin_TRUE@bfin_run_LDADD = \
2084 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin/nrun.o \
2085 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin/libsim.a \
2086 @SIM_ENABLE_ARCH_bfin_TRUE@     $(SIM_COMMON_LIBS)
2087
2088 @SIM_ENABLE_ARCH_bfin_TRUE@bfin_SIM_EXTRA_HW_DEVICES = \
2089 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin_cec \
2090 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin_ctimer \
2091 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin_dma \
2092 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin_dmac \
2093 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin_ebiu_amc \
2094 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin_ebiu_ddrc \
2095 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin_ebiu_sdc \
2096 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin_emac \
2097 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin_eppi \
2098 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin_evt \
2099 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin_gpio \
2100 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin_gpio2 \
2101 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin_gptimer \
2102 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin_jtag \
2103 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin_mmu \
2104 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin_nfc \
2105 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin_otp \
2106 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin_pfmon \
2107 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin_pint \
2108 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin_pll \
2109 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin_ppi \
2110 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin_rtc \
2111 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin_sic \
2112 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin_spi \
2113 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin_trace \
2114 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin_twi \
2115 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin_uart \
2116 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin_uart2 \
2117 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin_wdog \
2118 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin_wp \
2119 @SIM_ENABLE_ARCH_bfin_TRUE@     eth_phy
2120
2121 @SIM_ENABLE_ARCH_bpf_TRUE@AM_CPPFLAGS_bpf = -DWITH_TARGET_WORD_BITSIZE=64
2122 @SIM_ENABLE_ARCH_bpf_TRUE@AM_CPPFLAGS_bpf_mloop_le.o = -DWANT_ISA_EBPFLE
2123 @SIM_ENABLE_ARCH_bpf_TRUE@AM_CPPFLAGS_bpf_mloop_be.o = -DWANT_ISA_EBPFBE
2124 @SIM_ENABLE_ARCH_bpf_TRUE@AM_CPPFLAGS_bpf_decode_le.o = -DWANT_ISA_EBPFLE
2125 @SIM_ENABLE_ARCH_bpf_TRUE@AM_CPPFLAGS_bpf_decode_be.o = -DWANT_ISA_EBPFBE
2126 @SIM_ENABLE_ARCH_bpf_TRUE@AM_CPPFLAGS_bpf_sem_le.o = -DWANT_ISA_EBPFLE
2127 @SIM_ENABLE_ARCH_bpf_TRUE@AM_CPPFLAGS_bpf_sem_be.o = -DWANT_ISA_EBPFBE
2128 @SIM_ENABLE_ARCH_bpf_TRUE@nodist_bpf_libsim_a_SOURCES = \
2129 @SIM_ENABLE_ARCH_bpf_TRUE@      bpf/modules.c
2130
2131 @SIM_ENABLE_ARCH_bpf_TRUE@bpf_libsim_a_SOURCES = \
2132 @SIM_ENABLE_ARCH_bpf_TRUE@      $(common_libcommon_a_SOURCES)
2133
2134 @SIM_ENABLE_ARCH_bpf_TRUE@bpf_libsim_a_LIBADD = \
2135 @SIM_ENABLE_ARCH_bpf_TRUE@      $(patsubst %,bpf/%,$(SIM_NEW_COMMON_OBJS)) \
2136 @SIM_ENABLE_ARCH_bpf_TRUE@      $(patsubst %,bpf/dv-%.o,$(SIM_HW_DEVICES)) \
2137 @SIM_ENABLE_ARCH_bpf_TRUE@      \
2138 @SIM_ENABLE_ARCH_bpf_TRUE@      bpf/cgen-run.o \
2139 @SIM_ENABLE_ARCH_bpf_TRUE@      bpf/cgen-scache.o \
2140 @SIM_ENABLE_ARCH_bpf_TRUE@      bpf/cgen-trace.o \
2141 @SIM_ENABLE_ARCH_bpf_TRUE@      bpf/cgen-utils.o \
2142 @SIM_ENABLE_ARCH_bpf_TRUE@      \
2143 @SIM_ENABLE_ARCH_bpf_TRUE@      bpf/arch.o \
2144 @SIM_ENABLE_ARCH_bpf_TRUE@      bpf/cpu.o \
2145 @SIM_ENABLE_ARCH_bpf_TRUE@      bpf/decode-le.o \
2146 @SIM_ENABLE_ARCH_bpf_TRUE@      bpf/decode-be.o \
2147 @SIM_ENABLE_ARCH_bpf_TRUE@      bpf/sem-le.o \
2148 @SIM_ENABLE_ARCH_bpf_TRUE@      bpf/sem-be.o \
2149 @SIM_ENABLE_ARCH_bpf_TRUE@      bpf/mloop-le.o \
2150 @SIM_ENABLE_ARCH_bpf_TRUE@      bpf/mloop-be.o \
2151 @SIM_ENABLE_ARCH_bpf_TRUE@      \
2152 @SIM_ENABLE_ARCH_bpf_TRUE@      bpf/bpf.o \
2153 @SIM_ENABLE_ARCH_bpf_TRUE@      bpf/bpf-helpers.o \
2154 @SIM_ENABLE_ARCH_bpf_TRUE@      bpf/sim-if.o \
2155 @SIM_ENABLE_ARCH_bpf_TRUE@      bpf/traps.o
2156
2157 @SIM_ENABLE_ARCH_bpf_TRUE@bpf_run_SOURCES =
2158 @SIM_ENABLE_ARCH_bpf_TRUE@bpf_run_LDADD = \
2159 @SIM_ENABLE_ARCH_bpf_TRUE@      bpf/nrun.o \
2160 @SIM_ENABLE_ARCH_bpf_TRUE@      bpf/libsim.a \
2161 @SIM_ENABLE_ARCH_bpf_TRUE@      $(SIM_COMMON_LIBS)
2162
2163 @SIM_ENABLE_ARCH_bpf_TRUE@bpf_BUILD_OUTPUTS = \
2164 @SIM_ENABLE_ARCH_bpf_TRUE@      bpf/mloop-le.c \
2165 @SIM_ENABLE_ARCH_bpf_TRUE@      bpf/stamp-mloop-le \
2166 @SIM_ENABLE_ARCH_bpf_TRUE@      bpf/mloop-be.c \
2167 @SIM_ENABLE_ARCH_bpf_TRUE@      bpf/stamp-mloop-be
2168
2169 @SIM_ENABLE_ARCH_cr16_TRUE@nodist_cr16_libsim_a_SOURCES = \
2170 @SIM_ENABLE_ARCH_cr16_TRUE@     cr16/modules.c
2171
2172 @SIM_ENABLE_ARCH_cr16_TRUE@cr16_libsim_a_SOURCES = \
2173 @SIM_ENABLE_ARCH_cr16_TRUE@     $(common_libcommon_a_SOURCES)
2174
2175 @SIM_ENABLE_ARCH_cr16_TRUE@cr16_libsim_a_LIBADD = \
2176 @SIM_ENABLE_ARCH_cr16_TRUE@     $(patsubst %,cr16/%,$(SIM_NEW_COMMON_OBJS)) \
2177 @SIM_ENABLE_ARCH_cr16_TRUE@     $(patsubst %,cr16/dv-%.o,$(SIM_HW_DEVICES)) \
2178 @SIM_ENABLE_ARCH_cr16_TRUE@     cr16/interp.o \
2179 @SIM_ENABLE_ARCH_cr16_TRUE@     cr16/sim-resume.o \
2180 @SIM_ENABLE_ARCH_cr16_TRUE@     cr16/simops.o \
2181 @SIM_ENABLE_ARCH_cr16_TRUE@     cr16/table.o
2182
2183 @SIM_ENABLE_ARCH_cr16_TRUE@cr16_run_SOURCES =
2184 @SIM_ENABLE_ARCH_cr16_TRUE@cr16_run_LDADD = \
2185 @SIM_ENABLE_ARCH_cr16_TRUE@     cr16/nrun.o \
2186 @SIM_ENABLE_ARCH_cr16_TRUE@     cr16/libsim.a \
2187 @SIM_ENABLE_ARCH_cr16_TRUE@     $(SIM_COMMON_LIBS)
2188
2189 @SIM_ENABLE_ARCH_cr16_TRUE@cr16_BUILD_OUTPUTS = \
2190 @SIM_ENABLE_ARCH_cr16_TRUE@     cr16/gencode$(EXEEXT) \
2191 @SIM_ENABLE_ARCH_cr16_TRUE@     cr16/table.c
2192
2193 @SIM_ENABLE_ARCH_cr16_TRUE@cr16_gencode_SOURCES = cr16/gencode.c
2194 @SIM_ENABLE_ARCH_cr16_TRUE@cr16_gencode_LDADD = cr16/cr16-opc.o
2195 @SIM_ENABLE_ARCH_cris_TRUE@nodist_cris_libsim_a_SOURCES = \
2196 @SIM_ENABLE_ARCH_cris_TRUE@     cris/modules.c
2197
2198 @SIM_ENABLE_ARCH_cris_TRUE@cris_libsim_a_SOURCES = \
2199 @SIM_ENABLE_ARCH_cris_TRUE@     $(common_libcommon_a_SOURCES)
2200
2201 @SIM_ENABLE_ARCH_cris_TRUE@cris_libsim_a_LIBADD = \
2202 @SIM_ENABLE_ARCH_cris_TRUE@     $(patsubst %,cris/%,$(SIM_NEW_COMMON_OBJS)) \
2203 @SIM_ENABLE_ARCH_cris_TRUE@     $(patsubst %,cris/dv-%.o,$(SIM_HW_DEVICES)) \
2204 @SIM_ENABLE_ARCH_cris_TRUE@     $(patsubst %,cris/dv-%.o,$(cris_SIM_EXTRA_HW_DEVICES)) \
2205 @SIM_ENABLE_ARCH_cris_TRUE@     \
2206 @SIM_ENABLE_ARCH_cris_TRUE@     cris/cgen-run.o \
2207 @SIM_ENABLE_ARCH_cris_TRUE@     cris/cgen-scache.o \
2208 @SIM_ENABLE_ARCH_cris_TRUE@     cris/cgen-trace.o \
2209 @SIM_ENABLE_ARCH_cris_TRUE@     cris/cgen-utils.o \
2210 @SIM_ENABLE_ARCH_cris_TRUE@     \
2211 @SIM_ENABLE_ARCH_cris_TRUE@     cris/arch.o \
2212 @SIM_ENABLE_ARCH_cris_TRUE@     cris/crisv10f.o \
2213 @SIM_ENABLE_ARCH_cris_TRUE@     cris/cpuv10.o \
2214 @SIM_ENABLE_ARCH_cris_TRUE@     cris/decodev10.o \
2215 @SIM_ENABLE_ARCH_cris_TRUE@     cris/modelv10.o \
2216 @SIM_ENABLE_ARCH_cris_TRUE@     cris/mloopv10f.o \
2217 @SIM_ENABLE_ARCH_cris_TRUE@     cris/crisv32f.o \
2218 @SIM_ENABLE_ARCH_cris_TRUE@     cris/cpuv32.o \
2219 @SIM_ENABLE_ARCH_cris_TRUE@     cris/decodev32.o \
2220 @SIM_ENABLE_ARCH_cris_TRUE@     cris/modelv32.o \
2221 @SIM_ENABLE_ARCH_cris_TRUE@     cris/mloopv32f.o \
2222 @SIM_ENABLE_ARCH_cris_TRUE@     \
2223 @SIM_ENABLE_ARCH_cris_TRUE@     cris/sim-if.o \
2224 @SIM_ENABLE_ARCH_cris_TRUE@     cris/traps.o
2225
2226 @SIM_ENABLE_ARCH_cris_TRUE@cris_run_SOURCES =
2227 @SIM_ENABLE_ARCH_cris_TRUE@cris_run_LDADD = \
2228 @SIM_ENABLE_ARCH_cris_TRUE@     cris/nrun.o \
2229 @SIM_ENABLE_ARCH_cris_TRUE@     cris/libsim.a \
2230 @SIM_ENABLE_ARCH_cris_TRUE@     $(SIM_COMMON_LIBS)
2231
2232 @SIM_ENABLE_ARCH_cris_TRUE@cris_SIM_EXTRA_HW_DEVICES = rv cris cris_900000xx
2233 @SIM_ENABLE_ARCH_cris_TRUE@cris_rvdummy_SOURCES = cris/rvdummy.c
2234 @SIM_ENABLE_ARCH_cris_TRUE@cris_rvdummy_LDADD = $(LIBIBERTY_LIB)
2235 @SIM_ENABLE_ARCH_cris_TRUE@cris_BUILD_OUTPUTS = \
2236 @SIM_ENABLE_ARCH_cris_TRUE@     cris/mloopv10f.c \
2237 @SIM_ENABLE_ARCH_cris_TRUE@     cris/stamp-mloop-v10f \
2238 @SIM_ENABLE_ARCH_cris_TRUE@     cris/mloopv32f.c \
2239 @SIM_ENABLE_ARCH_cris_TRUE@     cris/stamp-mloop-v32f
2240
2241 @SIM_ENABLE_ARCH_d10v_TRUE@nodist_d10v_libsim_a_SOURCES = \
2242 @SIM_ENABLE_ARCH_d10v_TRUE@     d10v/modules.c
2243
2244 @SIM_ENABLE_ARCH_d10v_TRUE@d10v_libsim_a_SOURCES = \
2245 @SIM_ENABLE_ARCH_d10v_TRUE@     $(common_libcommon_a_SOURCES)
2246
2247 @SIM_ENABLE_ARCH_d10v_TRUE@d10v_libsim_a_LIBADD = \
2248 @SIM_ENABLE_ARCH_d10v_TRUE@     d10v/interp.o \
2249 @SIM_ENABLE_ARCH_d10v_TRUE@     $(patsubst %,d10v/%,$(SIM_NEW_COMMON_OBJS)) \
2250 @SIM_ENABLE_ARCH_d10v_TRUE@     $(patsubst %,d10v/dv-%.o,$(SIM_HW_DEVICES)) \
2251 @SIM_ENABLE_ARCH_d10v_TRUE@     d10v/endian.o \
2252 @SIM_ENABLE_ARCH_d10v_TRUE@     d10v/sim-resume.o \
2253 @SIM_ENABLE_ARCH_d10v_TRUE@     d10v/simops.o \
2254 @SIM_ENABLE_ARCH_d10v_TRUE@     d10v/table.o
2255
2256 @SIM_ENABLE_ARCH_d10v_TRUE@d10v_run_SOURCES =
2257 @SIM_ENABLE_ARCH_d10v_TRUE@d10v_run_LDADD = \
2258 @SIM_ENABLE_ARCH_d10v_TRUE@     d10v/nrun.o \
2259 @SIM_ENABLE_ARCH_d10v_TRUE@     d10v/libsim.a \
2260 @SIM_ENABLE_ARCH_d10v_TRUE@     $(SIM_COMMON_LIBS)
2261
2262 @SIM_ENABLE_ARCH_d10v_TRUE@d10v_BUILD_OUTPUTS = \
2263 @SIM_ENABLE_ARCH_d10v_TRUE@     d10v/gencode$(EXEEXT) \
2264 @SIM_ENABLE_ARCH_d10v_TRUE@     d10v/table.c
2265
2266 @SIM_ENABLE_ARCH_d10v_TRUE@d10v_gencode_SOURCES = d10v/gencode.c
2267 @SIM_ENABLE_ARCH_d10v_TRUE@d10v_gencode_LDADD = d10v/d10v-opc.o
2268 @SIM_ENABLE_ARCH_erc32_TRUE@READLINE_SRC = $(srcroot)/readline/readline
2269 @SIM_ENABLE_ARCH_erc32_TRUE@AM_CPPFLAGS_erc32 = $(READLINE_CFLAGS) \
2270 @SIM_ENABLE_ARCH_erc32_TRUE@    -DFAST_UART
2271 @SIM_ENABLE_ARCH_erc32_TRUE@nodist_erc32_libsim_a_SOURCES = \
2272 @SIM_ENABLE_ARCH_erc32_TRUE@    erc32/modules.c
2273
2274 @SIM_ENABLE_ARCH_erc32_TRUE@erc32_libsim_a_SOURCES = \
2275 @SIM_ENABLE_ARCH_erc32_TRUE@    $(common_libcommon_a_SOURCES)
2276
2277 @SIM_ENABLE_ARCH_erc32_TRUE@erc32_libsim_a_LIBADD = \
2278 @SIM_ENABLE_ARCH_erc32_TRUE@    erc32/erc32.o \
2279 @SIM_ENABLE_ARCH_erc32_TRUE@    erc32/exec.o \
2280 @SIM_ENABLE_ARCH_erc32_TRUE@    erc32/float.o \
2281 @SIM_ENABLE_ARCH_erc32_TRUE@    erc32/func.o \
2282 @SIM_ENABLE_ARCH_erc32_TRUE@    erc32/help.o \
2283 @SIM_ENABLE_ARCH_erc32_TRUE@    erc32/interf.o
2284
2285 @SIM_ENABLE_ARCH_erc32_TRUE@erc32_run_SOURCES =
2286 @SIM_ENABLE_ARCH_erc32_TRUE@erc32_run_LDADD = \
2287 @SIM_ENABLE_ARCH_erc32_TRUE@    erc32/sis.o \
2288 @SIM_ENABLE_ARCH_erc32_TRUE@    erc32/libsim.a \
2289 @SIM_ENABLE_ARCH_erc32_TRUE@    $(SIM_COMMON_LIBS) $(READLINE_LIB) $(TERMCAP_LIB)
2290
2291 @SIM_ENABLE_ARCH_erc32_TRUE@erc32docdir = $(docdir)/erc32
2292 @SIM_ENABLE_ARCH_erc32_TRUE@erc32doc_DATA = erc32/README.erc32 erc32/README.gdb erc32/README.sis
2293 @SIM_ENABLE_ARCH_examples_TRUE@nodist_example_synacor_libsim_a_SOURCES = \
2294 @SIM_ENABLE_ARCH_examples_TRUE@ example-synacor/modules.c
2295
2296 @SIM_ENABLE_ARCH_examples_TRUE@example_synacor_libsim_a_SOURCES = \
2297 @SIM_ENABLE_ARCH_examples_TRUE@ $(common_libcommon_a_SOURCES)
2298
2299 @SIM_ENABLE_ARCH_examples_TRUE@example_synacor_libsim_a_LIBADD = \
2300 @SIM_ENABLE_ARCH_examples_TRUE@ $(patsubst %,example-synacor/%,$(SIM_NEW_COMMON_OBJS)) \
2301 @SIM_ENABLE_ARCH_examples_TRUE@ $(patsubst %,example-synacor/dv-%.o,$(SIM_HW_DEVICES)) \
2302 @SIM_ENABLE_ARCH_examples_TRUE@ example-synacor/interp.o \
2303 @SIM_ENABLE_ARCH_examples_TRUE@ example-synacor/sim-main.o \
2304 @SIM_ENABLE_ARCH_examples_TRUE@ example-synacor/sim-resume.o
2305
2306 @SIM_ENABLE_ARCH_examples_TRUE@example_synacor_run_SOURCES =
2307 @SIM_ENABLE_ARCH_examples_TRUE@example_synacor_run_LDADD = \
2308 @SIM_ENABLE_ARCH_examples_TRUE@ example-synacor/nrun.o \
2309 @SIM_ENABLE_ARCH_examples_TRUE@ example-synacor/libsim.a \
2310 @SIM_ENABLE_ARCH_examples_TRUE@ $(SIM_COMMON_LIBS)
2311
2312 @SIM_ENABLE_ARCH_frv_TRUE@AM_CPPFLAGS_frv = $(SIM_FRV_TRAPDUMP_FLAGS)
2313 @SIM_ENABLE_ARCH_frv_TRUE@AM_CFLAGS_frv_memory.o = -Wno-error
2314 @SIM_ENABLE_ARCH_frv_TRUE@AM_CFLAGS_frv_sem.o = -Wno-error
2315 @SIM_ENABLE_ARCH_frv_TRUE@nodist_frv_libsim_a_SOURCES = \
2316 @SIM_ENABLE_ARCH_frv_TRUE@      frv/modules.c
2317
2318 @SIM_ENABLE_ARCH_frv_TRUE@frv_libsim_a_SOURCES = \
2319 @SIM_ENABLE_ARCH_frv_TRUE@      $(common_libcommon_a_SOURCES)
2320
2321 @SIM_ENABLE_ARCH_frv_TRUE@frv_libsim_a_LIBADD = \
2322 @SIM_ENABLE_ARCH_frv_TRUE@      $(patsubst %,frv/%,$(SIM_NEW_COMMON_OBJS)) \
2323 @SIM_ENABLE_ARCH_frv_TRUE@      $(patsubst %,frv/dv-%.o,$(SIM_HW_DEVICES)) \
2324 @SIM_ENABLE_ARCH_frv_TRUE@      \
2325 @SIM_ENABLE_ARCH_frv_TRUE@      frv/cgen-accfp.o \
2326 @SIM_ENABLE_ARCH_frv_TRUE@      frv/cgen-fpu.o \
2327 @SIM_ENABLE_ARCH_frv_TRUE@      frv/cgen-run.o \
2328 @SIM_ENABLE_ARCH_frv_TRUE@      frv/cgen-scache.o \
2329 @SIM_ENABLE_ARCH_frv_TRUE@      frv/cgen-trace.o \
2330 @SIM_ENABLE_ARCH_frv_TRUE@      frv/cgen-utils.o \
2331 @SIM_ENABLE_ARCH_frv_TRUE@      \
2332 @SIM_ENABLE_ARCH_frv_TRUE@      frv/arch.o \
2333 @SIM_ENABLE_ARCH_frv_TRUE@      frv/cgen-par.o \
2334 @SIM_ENABLE_ARCH_frv_TRUE@      frv/cpu.o \
2335 @SIM_ENABLE_ARCH_frv_TRUE@      frv/decode.o \
2336 @SIM_ENABLE_ARCH_frv_TRUE@      frv/frv.o \
2337 @SIM_ENABLE_ARCH_frv_TRUE@      frv/mloop.o \
2338 @SIM_ENABLE_ARCH_frv_TRUE@      frv/model.o \
2339 @SIM_ENABLE_ARCH_frv_TRUE@      frv/sem.o \
2340 @SIM_ENABLE_ARCH_frv_TRUE@      \
2341 @SIM_ENABLE_ARCH_frv_TRUE@      frv/cache.o \
2342 @SIM_ENABLE_ARCH_frv_TRUE@      frv/interrupts.o \
2343 @SIM_ENABLE_ARCH_frv_TRUE@      frv/memory.o \
2344 @SIM_ENABLE_ARCH_frv_TRUE@      frv/options.o \
2345 @SIM_ENABLE_ARCH_frv_TRUE@      frv/pipeline.o \
2346 @SIM_ENABLE_ARCH_frv_TRUE@      frv/profile.o \
2347 @SIM_ENABLE_ARCH_frv_TRUE@      frv/profile-fr400.o \
2348 @SIM_ENABLE_ARCH_frv_TRUE@      frv/profile-fr450.o \
2349 @SIM_ENABLE_ARCH_frv_TRUE@      frv/profile-fr500.o \
2350 @SIM_ENABLE_ARCH_frv_TRUE@      frv/profile-fr550.o \
2351 @SIM_ENABLE_ARCH_frv_TRUE@      frv/registers.o \
2352 @SIM_ENABLE_ARCH_frv_TRUE@      frv/reset.o \
2353 @SIM_ENABLE_ARCH_frv_TRUE@      frv/sim-if.o \
2354 @SIM_ENABLE_ARCH_frv_TRUE@      frv/traps.o
2355
2356 @SIM_ENABLE_ARCH_frv_TRUE@frv_run_SOURCES =
2357 @SIM_ENABLE_ARCH_frv_TRUE@frv_run_LDADD = \
2358 @SIM_ENABLE_ARCH_frv_TRUE@      frv/nrun.o \
2359 @SIM_ENABLE_ARCH_frv_TRUE@      frv/libsim.a \
2360 @SIM_ENABLE_ARCH_frv_TRUE@      $(SIM_COMMON_LIBS)
2361
2362 @SIM_ENABLE_ARCH_frv_TRUE@frvdocdir = $(docdir)/frv
2363 @SIM_ENABLE_ARCH_frv_TRUE@frvdoc_DATA = frv/README
2364 @SIM_ENABLE_ARCH_frv_TRUE@frv_BUILD_OUTPUTS = \
2365 @SIM_ENABLE_ARCH_frv_TRUE@      frv/mloop.c \
2366 @SIM_ENABLE_ARCH_frv_TRUE@      frv/stamp-mloop
2367
2368 @SIM_ENABLE_ARCH_ft32_TRUE@nodist_ft32_libsim_a_SOURCES = \
2369 @SIM_ENABLE_ARCH_ft32_TRUE@     ft32/modules.c
2370
2371 @SIM_ENABLE_ARCH_ft32_TRUE@ft32_libsim_a_SOURCES = \
2372 @SIM_ENABLE_ARCH_ft32_TRUE@     $(common_libcommon_a_SOURCES)
2373
2374 @SIM_ENABLE_ARCH_ft32_TRUE@ft32_libsim_a_LIBADD = \
2375 @SIM_ENABLE_ARCH_ft32_TRUE@     $(patsubst %,ft32/%,$(SIM_NEW_COMMON_OBJS)) \
2376 @SIM_ENABLE_ARCH_ft32_TRUE@     $(patsubst %,ft32/dv-%.o,$(SIM_HW_DEVICES)) \
2377 @SIM_ENABLE_ARCH_ft32_TRUE@     ft32/interp.o \
2378 @SIM_ENABLE_ARCH_ft32_TRUE@     ft32/sim-resume.o
2379
2380 @SIM_ENABLE_ARCH_ft32_TRUE@ft32_run_SOURCES =
2381 @SIM_ENABLE_ARCH_ft32_TRUE@ft32_run_LDADD = \
2382 @SIM_ENABLE_ARCH_ft32_TRUE@     ft32/nrun.o \
2383 @SIM_ENABLE_ARCH_ft32_TRUE@     ft32/libsim.a \
2384 @SIM_ENABLE_ARCH_ft32_TRUE@     $(SIM_COMMON_LIBS)
2385
2386 @SIM_ENABLE_ARCH_h8300_TRUE@nodist_h8300_libsim_a_SOURCES = \
2387 @SIM_ENABLE_ARCH_h8300_TRUE@    h8300/modules.c
2388
2389 @SIM_ENABLE_ARCH_h8300_TRUE@h8300_libsim_a_SOURCES = \
2390 @SIM_ENABLE_ARCH_h8300_TRUE@    $(common_libcommon_a_SOURCES)
2391
2392 @SIM_ENABLE_ARCH_h8300_TRUE@h8300_libsim_a_LIBADD = \
2393 @SIM_ENABLE_ARCH_h8300_TRUE@    h8300/compile.o \
2394 @SIM_ENABLE_ARCH_h8300_TRUE@    $(patsubst %,h8300/%,$(SIM_NEW_COMMON_OBJS)) \
2395 @SIM_ENABLE_ARCH_h8300_TRUE@    $(patsubst %,h8300/dv-%.o,$(SIM_HW_DEVICES)) \
2396 @SIM_ENABLE_ARCH_h8300_TRUE@    h8300/sim-resume.o
2397
2398 @SIM_ENABLE_ARCH_h8300_TRUE@h8300_run_SOURCES =
2399 @SIM_ENABLE_ARCH_h8300_TRUE@h8300_run_LDADD = \
2400 @SIM_ENABLE_ARCH_h8300_TRUE@    h8300/nrun.o \
2401 @SIM_ENABLE_ARCH_h8300_TRUE@    h8300/libsim.a \
2402 @SIM_ENABLE_ARCH_h8300_TRUE@    $(SIM_COMMON_LIBS)
2403
2404 @SIM_ENABLE_ARCH_iq2000_TRUE@nodist_iq2000_libsim_a_SOURCES = \
2405 @SIM_ENABLE_ARCH_iq2000_TRUE@   iq2000/modules.c
2406
2407 @SIM_ENABLE_ARCH_iq2000_TRUE@iq2000_libsim_a_SOURCES = \
2408 @SIM_ENABLE_ARCH_iq2000_TRUE@   $(common_libcommon_a_SOURCES)
2409
2410 @SIM_ENABLE_ARCH_iq2000_TRUE@iq2000_libsim_a_LIBADD = \
2411 @SIM_ENABLE_ARCH_iq2000_TRUE@   $(patsubst %,iq2000/%,$(SIM_NEW_COMMON_OBJS)) \
2412 @SIM_ENABLE_ARCH_iq2000_TRUE@   $(patsubst %,iq2000/dv-%.o,$(SIM_HW_DEVICES)) \
2413 @SIM_ENABLE_ARCH_iq2000_TRUE@   \
2414 @SIM_ENABLE_ARCH_iq2000_TRUE@   iq2000/cgen-run.o \
2415 @SIM_ENABLE_ARCH_iq2000_TRUE@   iq2000/cgen-scache.o \
2416 @SIM_ENABLE_ARCH_iq2000_TRUE@   iq2000/cgen-trace.o \
2417 @SIM_ENABLE_ARCH_iq2000_TRUE@   iq2000/cgen-utils.o \
2418 @SIM_ENABLE_ARCH_iq2000_TRUE@   \
2419 @SIM_ENABLE_ARCH_iq2000_TRUE@   iq2000/arch.o \
2420 @SIM_ENABLE_ARCH_iq2000_TRUE@   iq2000/cpu.o \
2421 @SIM_ENABLE_ARCH_iq2000_TRUE@   iq2000/decode.o \
2422 @SIM_ENABLE_ARCH_iq2000_TRUE@   iq2000/iq2000.o \
2423 @SIM_ENABLE_ARCH_iq2000_TRUE@   iq2000/sem.o \
2424 @SIM_ENABLE_ARCH_iq2000_TRUE@   iq2000/mloop.o \
2425 @SIM_ENABLE_ARCH_iq2000_TRUE@   iq2000/model.o \
2426 @SIM_ENABLE_ARCH_iq2000_TRUE@   \
2427 @SIM_ENABLE_ARCH_iq2000_TRUE@   iq2000/sim-if.o
2428
2429 @SIM_ENABLE_ARCH_iq2000_TRUE@iq2000_run_SOURCES =
2430 @SIM_ENABLE_ARCH_iq2000_TRUE@iq2000_run_LDADD = \
2431 @SIM_ENABLE_ARCH_iq2000_TRUE@   iq2000/nrun.o \
2432 @SIM_ENABLE_ARCH_iq2000_TRUE@   iq2000/libsim.a \
2433 @SIM_ENABLE_ARCH_iq2000_TRUE@   $(SIM_COMMON_LIBS)
2434
2435 @SIM_ENABLE_ARCH_iq2000_TRUE@iq2000_BUILD_OUTPUTS = \
2436 @SIM_ENABLE_ARCH_iq2000_TRUE@   iq2000/mloop.c \
2437 @SIM_ENABLE_ARCH_iq2000_TRUE@   iq2000/stamp-mloop
2438
2439 @SIM_ENABLE_ARCH_lm32_TRUE@nodist_lm32_libsim_a_SOURCES = \
2440 @SIM_ENABLE_ARCH_lm32_TRUE@     lm32/modules.c
2441
2442 @SIM_ENABLE_ARCH_lm32_TRUE@lm32_libsim_a_SOURCES = \
2443 @SIM_ENABLE_ARCH_lm32_TRUE@     $(common_libcommon_a_SOURCES)
2444
2445 @SIM_ENABLE_ARCH_lm32_TRUE@lm32_libsim_a_LIBADD = \
2446 @SIM_ENABLE_ARCH_lm32_TRUE@     $(patsubst %,lm32/%,$(SIM_NEW_COMMON_OBJS)) \
2447 @SIM_ENABLE_ARCH_lm32_TRUE@     $(patsubst %,lm32/dv-%.o,$(SIM_HW_DEVICES)) \
2448 @SIM_ENABLE_ARCH_lm32_TRUE@     $(patsubst %,lm32/dv-%.o,$(lm32_SIM_EXTRA_HW_DEVICES)) \
2449 @SIM_ENABLE_ARCH_lm32_TRUE@     \
2450 @SIM_ENABLE_ARCH_lm32_TRUE@     lm32/cgen-run.o \
2451 @SIM_ENABLE_ARCH_lm32_TRUE@     lm32/cgen-scache.o \
2452 @SIM_ENABLE_ARCH_lm32_TRUE@     lm32/cgen-trace.o \
2453 @SIM_ENABLE_ARCH_lm32_TRUE@     lm32/cgen-utils.o \
2454 @SIM_ENABLE_ARCH_lm32_TRUE@     \
2455 @SIM_ENABLE_ARCH_lm32_TRUE@     lm32/arch.o \
2456 @SIM_ENABLE_ARCH_lm32_TRUE@     lm32/cpu.o \
2457 @SIM_ENABLE_ARCH_lm32_TRUE@     lm32/decode.o \
2458 @SIM_ENABLE_ARCH_lm32_TRUE@     lm32/sem.o \
2459 @SIM_ENABLE_ARCH_lm32_TRUE@     lm32/mloop.o \
2460 @SIM_ENABLE_ARCH_lm32_TRUE@     lm32/model.o \
2461 @SIM_ENABLE_ARCH_lm32_TRUE@     \
2462 @SIM_ENABLE_ARCH_lm32_TRUE@     lm32/lm32.o \
2463 @SIM_ENABLE_ARCH_lm32_TRUE@     lm32/sim-if.o \
2464 @SIM_ENABLE_ARCH_lm32_TRUE@     lm32/traps.o \
2465 @SIM_ENABLE_ARCH_lm32_TRUE@     lm32/user.o
2466
2467 @SIM_ENABLE_ARCH_lm32_TRUE@lm32_run_SOURCES =
2468 @SIM_ENABLE_ARCH_lm32_TRUE@lm32_run_LDADD = \
2469 @SIM_ENABLE_ARCH_lm32_TRUE@     lm32/nrun.o \
2470 @SIM_ENABLE_ARCH_lm32_TRUE@     lm32/libsim.a \
2471 @SIM_ENABLE_ARCH_lm32_TRUE@     $(SIM_COMMON_LIBS)
2472
2473 @SIM_ENABLE_ARCH_lm32_TRUE@lm32_SIM_EXTRA_HW_DEVICES = lm32cpu lm32timer lm32uart
2474 @SIM_ENABLE_ARCH_lm32_TRUE@lm32_BUILD_OUTPUTS = \
2475 @SIM_ENABLE_ARCH_lm32_TRUE@     lm32/mloop.c \
2476 @SIM_ENABLE_ARCH_lm32_TRUE@     lm32/stamp-mloop
2477
2478 @SIM_ENABLE_ARCH_m32c_TRUE@AM_CPPFLAGS_m32c = -DTIMER_A
2479 @SIM_ENABLE_ARCH_m32c_TRUE@nodist_m32c_libsim_a_SOURCES = \
2480 @SIM_ENABLE_ARCH_m32c_TRUE@     m32c/modules.c
2481
2482 @SIM_ENABLE_ARCH_m32c_TRUE@m32c_libsim_a_SOURCES = \
2483 @SIM_ENABLE_ARCH_m32c_TRUE@     $(common_libcommon_a_SOURCES)
2484
2485 @SIM_ENABLE_ARCH_m32c_TRUE@m32c_libsim_a_LIBADD = \
2486 @SIM_ENABLE_ARCH_m32c_TRUE@     m32c/gdb-if.o \
2487 @SIM_ENABLE_ARCH_m32c_TRUE@     m32c/int.o \
2488 @SIM_ENABLE_ARCH_m32c_TRUE@     m32c/load.o \
2489 @SIM_ENABLE_ARCH_m32c_TRUE@     m32c/m32c.o \
2490 @SIM_ENABLE_ARCH_m32c_TRUE@     m32c/mem.o \
2491 @SIM_ENABLE_ARCH_m32c_TRUE@     m32c/misc.o \
2492 @SIM_ENABLE_ARCH_m32c_TRUE@     m32c/r8c.o \
2493 @SIM_ENABLE_ARCH_m32c_TRUE@     m32c/reg.o \
2494 @SIM_ENABLE_ARCH_m32c_TRUE@     m32c/srcdest.o \
2495 @SIM_ENABLE_ARCH_m32c_TRUE@     m32c/syscalls.o \
2496 @SIM_ENABLE_ARCH_m32c_TRUE@     m32c/trace.o
2497
2498 @SIM_ENABLE_ARCH_m32c_TRUE@m32c_run_SOURCES =
2499 @SIM_ENABLE_ARCH_m32c_TRUE@m32c_run_LDADD = \
2500 @SIM_ENABLE_ARCH_m32c_TRUE@     m32c/main.o \
2501 @SIM_ENABLE_ARCH_m32c_TRUE@     m32c/libsim.a \
2502 @SIM_ENABLE_ARCH_m32c_TRUE@     $(SIM_COMMON_LIBS)
2503
2504 @SIM_ENABLE_ARCH_m32c_TRUE@m32c_BUILD_OUTPUTS = \
2505 @SIM_ENABLE_ARCH_m32c_TRUE@     m32c/opc2c$(EXEEXT) \
2506 @SIM_ENABLE_ARCH_m32c_TRUE@     m32c/m32c.c \
2507 @SIM_ENABLE_ARCH_m32c_TRUE@     m32c/r8c.c
2508
2509 @SIM_ENABLE_ARCH_m32c_TRUE@m32c_opc2c_SOURCES = m32c/opc2c.c
2510
2511 # opc2c leaks memory, and therefore makes AddressSanitizer unhappy.  Disable
2512 # leak detection while running it.
2513 @SIM_ENABLE_ARCH_m32c_TRUE@m32c_OPC2C_RUN = ASAN_OPTIONS=detect_leaks=0 m32c/opc2c$(EXEEXT)
2514 @SIM_ENABLE_ARCH_m32r_TRUE@AM_CFLAGS_m32r_cpu.o = -Wno-error
2515 @SIM_ENABLE_ARCH_m32r_TRUE@AM_CFLAGS_m32r_cpu2.o = -Wno-error
2516 @SIM_ENABLE_ARCH_m32r_TRUE@AM_CFLAGS_m32r_cpux.o = -Wno-error
2517 @SIM_ENABLE_ARCH_m32r_TRUE@AM_CFLAGS_m32r_m32r.o = -Wno-error
2518 @SIM_ENABLE_ARCH_m32r_TRUE@AM_CFLAGS_m32r_m32r2.o = -Wno-error
2519 @SIM_ENABLE_ARCH_m32r_TRUE@AM_CFLAGS_m32r_m32rx.o = -Wno-error
2520 @SIM_ENABLE_ARCH_m32r_TRUE@AM_CFLAGS_m32r_mloop.o = -Wno-error
2521 @SIM_ENABLE_ARCH_m32r_TRUE@AM_CFLAGS_m32r_mloop2.o = -Wno-error
2522 @SIM_ENABLE_ARCH_m32r_TRUE@AM_CFLAGS_m32r_mloopx.o = -Wno-error
2523 @SIM_ENABLE_ARCH_m32r_TRUE@AM_CFLAGS_m32r_sem.o = -Wno-error
2524 @SIM_ENABLE_ARCH_m32r_TRUE@AM_CFLAGS_m32r_sim_if.o = -Wno-error
2525 @SIM_ENABLE_ARCH_m32r_TRUE@AM_CFLAGS_m32r_traps.o = -Wno-error
2526 @SIM_ENABLE_ARCH_m32r_TRUE@nodist_m32r_libsim_a_SOURCES = \
2527 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/modules.c
2528
2529 @SIM_ENABLE_ARCH_m32r_TRUE@m32r_libsim_a_SOURCES = \
2530 @SIM_ENABLE_ARCH_m32r_TRUE@     $(common_libcommon_a_SOURCES)
2531
2532 @SIM_ENABLE_ARCH_m32r_TRUE@m32r_libsim_a_LIBADD = \
2533 @SIM_ENABLE_ARCH_m32r_TRUE@     $(patsubst %,m32r/%,$(SIM_NEW_COMMON_OBJS)) \
2534 @SIM_ENABLE_ARCH_m32r_TRUE@     $(patsubst %,m32r/dv-%.o,$(SIM_HW_DEVICES)) \
2535 @SIM_ENABLE_ARCH_m32r_TRUE@     $(patsubst %,m32r/dv-%.o,$(m32r_SIM_EXTRA_HW_DEVICES)) \
2536 @SIM_ENABLE_ARCH_m32r_TRUE@     \
2537 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/cgen-run.o \
2538 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/cgen-scache.o \
2539 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/cgen-trace.o \
2540 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/cgen-utils.o \
2541 @SIM_ENABLE_ARCH_m32r_TRUE@     \
2542 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/arch.o \
2543 @SIM_ENABLE_ARCH_m32r_TRUE@     \
2544 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/m32r.o \
2545 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/cpu.o \
2546 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/decode.o \
2547 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/sem.o \
2548 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/model.o \
2549 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/mloop.o \
2550 @SIM_ENABLE_ARCH_m32r_TRUE@     \
2551 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/m32rx.o \
2552 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/cpux.o \
2553 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/decodex.o \
2554 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/modelx.o \
2555 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/mloopx.o \
2556 @SIM_ENABLE_ARCH_m32r_TRUE@     \
2557 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/m32r2.o \
2558 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/cpu2.o \
2559 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/decode2.o \
2560 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/model2.o \
2561 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/mloop2.o \
2562 @SIM_ENABLE_ARCH_m32r_TRUE@     \
2563 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/sim-if.o \
2564 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/traps.o
2565
2566 @SIM_ENABLE_ARCH_m32r_TRUE@m32r_run_SOURCES =
2567 @SIM_ENABLE_ARCH_m32r_TRUE@m32r_run_LDADD = \
2568 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/nrun.o \
2569 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/libsim.a \
2570 @SIM_ENABLE_ARCH_m32r_TRUE@     $(SIM_COMMON_LIBS)
2571
2572 @SIM_ENABLE_ARCH_m32r_TRUE@m32r_SIM_EXTRA_HW_DEVICES = m32r_cache m32r_uart
2573 @SIM_ENABLE_ARCH_m32r_TRUE@m32r_BUILD_OUTPUTS = \
2574 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/mloop.c \
2575 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/stamp-mloop \
2576 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/mloopx.c \
2577 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/stamp-mloop-x \
2578 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/mloop2.c \
2579 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/stamp-mloop-2
2580
2581 @SIM_ENABLE_ARCH_m68hc11_TRUE@AM_CPPFLAGS_m68hc11 = \
2582 @SIM_ENABLE_ARCH_m68hc11_TRUE@  -DWITH_TARGET_WORD_BITSIZE=32 \
2583 @SIM_ENABLE_ARCH_m68hc11_TRUE@  -DWITH_TARGET_CELL_BITSIZE=32 \
2584 @SIM_ENABLE_ARCH_m68hc11_TRUE@  -DWITH_TARGET_ADDRESS_BITSIZE=32 \
2585 @SIM_ENABLE_ARCH_m68hc11_TRUE@  -DWITH_TARGET_WORD_MSB=31
2586
2587 @SIM_ENABLE_ARCH_m68hc11_TRUE@nodist_m68hc11_libsim_a_SOURCES = \
2588 @SIM_ENABLE_ARCH_m68hc11_TRUE@  m68hc11/modules.c
2589
2590 @SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11_libsim_a_SOURCES = \
2591 @SIM_ENABLE_ARCH_m68hc11_TRUE@  $(common_libcommon_a_SOURCES)
2592
2593 @SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11_libsim_a_LIBADD = \
2594 @SIM_ENABLE_ARCH_m68hc11_TRUE@  m68hc11/interp.o \
2595 @SIM_ENABLE_ARCH_m68hc11_TRUE@  m68hc11/m68hc11int.o \
2596 @SIM_ENABLE_ARCH_m68hc11_TRUE@  m68hc11/m68hc12int.o \
2597 @SIM_ENABLE_ARCH_m68hc11_TRUE@  m68hc11/emulos.o \
2598 @SIM_ENABLE_ARCH_m68hc11_TRUE@  m68hc11/interrupts.o \
2599 @SIM_ENABLE_ARCH_m68hc11_TRUE@  m68hc11/m68hc11_sim.o \
2600 @SIM_ENABLE_ARCH_m68hc11_TRUE@  $(patsubst %,m68hc11/%,$(SIM_NEW_COMMON_OBJS)) \
2601 @SIM_ENABLE_ARCH_m68hc11_TRUE@  $(patsubst %,m68hc11/dv-%.o,$(SIM_HW_DEVICES)) \
2602 @SIM_ENABLE_ARCH_m68hc11_TRUE@  $(patsubst %,m68hc11/dv-%.o,$(m68hc11_SIM_EXTRA_HW_DEVICES)) \
2603 @SIM_ENABLE_ARCH_m68hc11_TRUE@  m68hc11/sim-resume.o
2604
2605 @SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11_run_SOURCES =
2606 @SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11_run_LDADD = \
2607 @SIM_ENABLE_ARCH_m68hc11_TRUE@  m68hc11/nrun.o \
2608 @SIM_ENABLE_ARCH_m68hc11_TRUE@  m68hc11/libsim.a \
2609 @SIM_ENABLE_ARCH_m68hc11_TRUE@  $(SIM_COMMON_LIBS)
2610
2611 @SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11_SIM_EXTRA_HW_DEVICES = m68hc11 m68hc11sio m68hc11eepr m68hc11tim m68hc11spi nvram
2612 @SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11_BUILD_OUTPUTS = \
2613 @SIM_ENABLE_ARCH_m68hc11_TRUE@  m68hc11/gencode$(EXEEXT) \
2614 @SIM_ENABLE_ARCH_m68hc11_TRUE@  m68hc11/m68hc11int.c \
2615 @SIM_ENABLE_ARCH_m68hc11_TRUE@  m68hc11/m68hc12int.c
2616
2617 @SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11_gencode_SOURCES = m68hc11/gencode.c
2618 @SIM_ENABLE_ARCH_mcore_TRUE@nodist_mcore_libsim_a_SOURCES = \
2619 @SIM_ENABLE_ARCH_mcore_TRUE@    mcore/modules.c
2620
2621 @SIM_ENABLE_ARCH_mcore_TRUE@mcore_libsim_a_SOURCES = \
2622 @SIM_ENABLE_ARCH_mcore_TRUE@    $(common_libcommon_a_SOURCES)
2623
2624 @SIM_ENABLE_ARCH_mcore_TRUE@mcore_libsim_a_LIBADD = \
2625 @SIM_ENABLE_ARCH_mcore_TRUE@    mcore/interp.o \
2626 @SIM_ENABLE_ARCH_mcore_TRUE@    $(patsubst %,mcore/%,$(SIM_NEW_COMMON_OBJS)) \
2627 @SIM_ENABLE_ARCH_mcore_TRUE@    $(patsubst %,mcore/dv-%.o,$(SIM_HW_DEVICES)) \
2628 @SIM_ENABLE_ARCH_mcore_TRUE@    mcore/sim-resume.o
2629
2630 @SIM_ENABLE_ARCH_mcore_TRUE@mcore_run_SOURCES =
2631 @SIM_ENABLE_ARCH_mcore_TRUE@mcore_run_LDADD = \
2632 @SIM_ENABLE_ARCH_mcore_TRUE@    mcore/nrun.o \
2633 @SIM_ENABLE_ARCH_mcore_TRUE@    mcore/libsim.a \
2634 @SIM_ENABLE_ARCH_mcore_TRUE@    $(SIM_COMMON_LIBS)
2635
2636 @SIM_ENABLE_ARCH_microblaze_TRUE@nodist_microblaze_libsim_a_SOURCES = \
2637 @SIM_ENABLE_ARCH_microblaze_TRUE@       microblaze/modules.c
2638
2639 @SIM_ENABLE_ARCH_microblaze_TRUE@microblaze_libsim_a_SOURCES = \
2640 @SIM_ENABLE_ARCH_microblaze_TRUE@       $(common_libcommon_a_SOURCES)
2641
2642 @SIM_ENABLE_ARCH_microblaze_TRUE@microblaze_libsim_a_LIBADD = \
2643 @SIM_ENABLE_ARCH_microblaze_TRUE@       microblaze/interp.o \
2644 @SIM_ENABLE_ARCH_microblaze_TRUE@       $(patsubst %,microblaze/%,$(SIM_NEW_COMMON_OBJS)) \
2645 @SIM_ENABLE_ARCH_microblaze_TRUE@       $(patsubst %,microblaze/dv-%.o,$(SIM_HW_DEVICES)) \
2646 @SIM_ENABLE_ARCH_microblaze_TRUE@       microblaze/sim-resume.o
2647
2648 @SIM_ENABLE_ARCH_microblaze_TRUE@microblaze_run_SOURCES =
2649 @SIM_ENABLE_ARCH_microblaze_TRUE@microblaze_run_LDADD = \
2650 @SIM_ENABLE_ARCH_microblaze_TRUE@       microblaze/nrun.o \
2651 @SIM_ENABLE_ARCH_microblaze_TRUE@       microblaze/libsim.a \
2652 @SIM_ENABLE_ARCH_microblaze_TRUE@       $(SIM_COMMON_LIBS)
2653
2654 @SIM_ENABLE_ARCH_mips_TRUE@AM_CPPFLAGS_mips = \
2655 @SIM_ENABLE_ARCH_mips_TRUE@     @SIM_MIPS_SUBTARGET@ \
2656 @SIM_ENABLE_ARCH_mips_TRUE@     -DWITH_TARGET_WORD_BITSIZE=@SIM_MIPS_BITSIZE@ -DWITH_TARGET_WORD_MSB=WITH_TARGET_WORD_BITSIZE-1 \
2657 @SIM_ENABLE_ARCH_mips_TRUE@     -DWITH_FLOATING_POINT=HARD_FLOATING_POINT -DWITH_TARGET_FLOATING_POINT_BITSIZE=@SIM_MIPS_FPU_BITSIZE@
2658
2659 @SIM_ENABLE_ARCH_mips_TRUE@mips_GEN_OBJ = $(am__append_68) \
2660 @SIM_ENABLE_ARCH_mips_TRUE@     $(am__append_69) $(am__append_70)
2661 @SIM_ENABLE_ARCH_mips_TRUE@nodist_mips_libsim_a_SOURCES = \
2662 @SIM_ENABLE_ARCH_mips_TRUE@     mips/modules.c
2663
2664 @SIM_ENABLE_ARCH_mips_TRUE@mips_libsim_a_SOURCES = \
2665 @SIM_ENABLE_ARCH_mips_TRUE@     $(common_libcommon_a_SOURCES)
2666
2667 @SIM_ENABLE_ARCH_mips_TRUE@mips_libsim_a_LIBADD = \
2668 @SIM_ENABLE_ARCH_mips_TRUE@     mips/interp.o \
2669 @SIM_ENABLE_ARCH_mips_TRUE@     $(mips_GEN_OBJ) \
2670 @SIM_ENABLE_ARCH_mips_TRUE@     $(patsubst %,mips/%,$(SIM_NEW_COMMON_OBJS)) \
2671 @SIM_ENABLE_ARCH_mips_TRUE@     $(patsubst %,mips/dv-%.o,$(SIM_HW_DEVICES)) \
2672 @SIM_ENABLE_ARCH_mips_TRUE@     $(patsubst %,mips/dv-%.o,$(mips_SIM_EXTRA_HW_DEVICES)) \
2673 @SIM_ENABLE_ARCH_mips_TRUE@     mips/cp1.o \
2674 @SIM_ENABLE_ARCH_mips_TRUE@     mips/dsp.o \
2675 @SIM_ENABLE_ARCH_mips_TRUE@     mips/mdmx.o \
2676 @SIM_ENABLE_ARCH_mips_TRUE@     mips/sim-main.o \
2677 @SIM_ENABLE_ARCH_mips_TRUE@     mips/sim-resume.o
2678
2679 @SIM_ENABLE_ARCH_mips_TRUE@EXTRA_mips_libsim_a_DEPENDENCIES = $(SIM_MIPS_MULTI_OBJ)
2680 @SIM_ENABLE_ARCH_mips_TRUE@mips_run_SOURCES =
2681 @SIM_ENABLE_ARCH_mips_TRUE@mips_run_LDADD = \
2682 @SIM_ENABLE_ARCH_mips_TRUE@     mips/nrun.o \
2683 @SIM_ENABLE_ARCH_mips_TRUE@     mips/libsim.a \
2684 @SIM_ENABLE_ARCH_mips_TRUE@     $(SIM_COMMON_LIBS)
2685
2686 @SIM_ENABLE_ARCH_mips_TRUE@mips_SIM_EXTRA_HW_DEVICES = tx3904cpu tx3904irc tx3904tmr tx3904sio
2687 @SIM_ENABLE_ARCH_mips_TRUE@mips_BUILT_SRC_FROM_IGEN_ITABLE = \
2688 @SIM_ENABLE_ARCH_mips_TRUE@     mips/itable.h \
2689 @SIM_ENABLE_ARCH_mips_TRUE@     mips/itable.c
2690
2691 @SIM_ENABLE_ARCH_mips_TRUE@mips_BUILT_SRC_FROM_GEN_MODE_SINGLE = \
2692 @SIM_ENABLE_ARCH_mips_TRUE@     mips/icache.h \
2693 @SIM_ENABLE_ARCH_mips_TRUE@     mips/icache.c \
2694 @SIM_ENABLE_ARCH_mips_TRUE@     mips/idecode.h \
2695 @SIM_ENABLE_ARCH_mips_TRUE@     mips/idecode.c \
2696 @SIM_ENABLE_ARCH_mips_TRUE@     mips/semantics.h \
2697 @SIM_ENABLE_ARCH_mips_TRUE@     mips/semantics.c \
2698 @SIM_ENABLE_ARCH_mips_TRUE@     mips/model.h \
2699 @SIM_ENABLE_ARCH_mips_TRUE@     mips/model.c \
2700 @SIM_ENABLE_ARCH_mips_TRUE@     mips/support.h \
2701 @SIM_ENABLE_ARCH_mips_TRUE@     mips/support.c \
2702 @SIM_ENABLE_ARCH_mips_TRUE@     mips/engine.h \
2703 @SIM_ENABLE_ARCH_mips_TRUE@     mips/engine.c \
2704 @SIM_ENABLE_ARCH_mips_TRUE@     mips/irun.c
2705
2706 @SIM_ENABLE_ARCH_mips_TRUE@mips_BUILT_SRC_FROM_GEN_MODE_M16_M16 = \
2707 @SIM_ENABLE_ARCH_mips_TRUE@     mips/m16_icache.h \
2708 @SIM_ENABLE_ARCH_mips_TRUE@     mips/m16_icache.c \
2709 @SIM_ENABLE_ARCH_mips_TRUE@     mips/m16_idecode.h \
2710 @SIM_ENABLE_ARCH_mips_TRUE@     mips/m16_idecode.c \
2711 @SIM_ENABLE_ARCH_mips_TRUE@     mips/m16_semantics.h \
2712 @SIM_ENABLE_ARCH_mips_TRUE@     mips/m16_semantics.c \
2713 @SIM_ENABLE_ARCH_mips_TRUE@     mips/m16_model.h \
2714 @SIM_ENABLE_ARCH_mips_TRUE@     mips/m16_model.c \
2715 @SIM_ENABLE_ARCH_mips_TRUE@     mips/m16_support.h \
2716 @SIM_ENABLE_ARCH_mips_TRUE@     mips/m16_support.c \
2717 @SIM_ENABLE_ARCH_mips_TRUE@mips_BUILT_SRC_FROM_GEN_MODE_M16_M32 = \
2718 @SIM_ENABLE_ARCH_mips_TRUE@     mips/m32_icache.h \
2719 @SIM_ENABLE_ARCH_mips_TRUE@     mips/m32_icache.c \
2720 @SIM_ENABLE_ARCH_mips_TRUE@     mips/m32_idecode.h \
2721 @SIM_ENABLE_ARCH_mips_TRUE@     mips/m32_idecode.c \
2722 @SIM_ENABLE_ARCH_mips_TRUE@     mips/m32_semantics.h \
2723 @SIM_ENABLE_ARCH_mips_TRUE@     mips/m32_semantics.c \
2724 @SIM_ENABLE_ARCH_mips_TRUE@     mips/m32_model.h \
2725 @SIM_ENABLE_ARCH_mips_TRUE@     mips/m32_model.c \
2726 @SIM_ENABLE_ARCH_mips_TRUE@     mips/m32_support.h \
2727 @SIM_ENABLE_ARCH_mips_TRUE@     mips/m32_support.c
2728
2729 @SIM_ENABLE_ARCH_mips_TRUE@mips_BUILD_OUTPUTS =  \
2730 @SIM_ENABLE_ARCH_mips_TRUE@     $(mips_BUILT_SRC_FROM_IGEN_ITABLE) \
2731 @SIM_ENABLE_ARCH_mips_TRUE@     mips/stamp-igen-itable \
2732 @SIM_ENABLE_ARCH_mips_TRUE@     $(am__append_74) $(am__append_75) \
2733 @SIM_ENABLE_ARCH_mips_TRUE@     $(am__append_76)
2734 @SIM_ENABLE_ARCH_mips_TRUE@mips_IGEN_TRACE = # -G omit-line-numbers # -G trace-rule-selection -G trace-rule-rejection -G trace-entries # -G trace-all
2735 @SIM_ENABLE_ARCH_mips_TRUE@mips_IGEN_INSN = $(srcdir)/mips/mips.igen
2736 @SIM_ENABLE_ARCH_mips_TRUE@mips_IGEN_INSN_INC = \
2737 @SIM_ENABLE_ARCH_mips_TRUE@     mips/dsp.igen \
2738 @SIM_ENABLE_ARCH_mips_TRUE@     mips/dsp2.igen \
2739 @SIM_ENABLE_ARCH_mips_TRUE@     mips/m16.igen \
2740 @SIM_ENABLE_ARCH_mips_TRUE@     mips/m16e.igen \
2741 @SIM_ENABLE_ARCH_mips_TRUE@     mips/mdmx.igen \
2742 @SIM_ENABLE_ARCH_mips_TRUE@     mips/micromipsdsp.igen \
2743 @SIM_ENABLE_ARCH_mips_TRUE@     mips/micromips.igen \
2744 @SIM_ENABLE_ARCH_mips_TRUE@     mips/mips3264r2.igen \
2745 @SIM_ENABLE_ARCH_mips_TRUE@     mips/mips3264r6.igen \
2746 @SIM_ENABLE_ARCH_mips_TRUE@     mips/mips3d.igen \
2747 @SIM_ENABLE_ARCH_mips_TRUE@     mips/sb1.igen \
2748 @SIM_ENABLE_ARCH_mips_TRUE@     mips/tx.igen \
2749 @SIM_ENABLE_ARCH_mips_TRUE@     mips/vr.igen
2750
2751 @SIM_ENABLE_ARCH_mips_TRUE@mips_IGEN_DC = $(srcdir)/mips/mips.dc
2752 @SIM_ENABLE_ARCH_mips_TRUE@mips_M16_DC = $(srcdir)/mips/m16.dc
2753 @SIM_ENABLE_ARCH_mips_TRUE@mips_MICROMIPS32_DC = $(srcdir)/mips/micromips.dc
2754 @SIM_ENABLE_ARCH_mips_TRUE@mips_MICROMIPS16_DC = $(srcdir)/mips/micromips16.dc
2755 @SIM_ENABLE_ARCH_mn10300_TRUE@AM_CPPFLAGS_mn10300 = \
2756 @SIM_ENABLE_ARCH_mn10300_TRUE@  -DPOLL_QUIT_INTERVAL=0x20 \
2757 @SIM_ENABLE_ARCH_mn10300_TRUE@  -DWITH_TARGET_WORD_BITSIZE=32 -DWITH_TARGET_WORD_MSB=31
2758
2759 @SIM_ENABLE_ARCH_mn10300_TRUE@nodist_mn10300_libsim_a_SOURCES = \
2760 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/modules.c
2761
2762 @SIM_ENABLE_ARCH_mn10300_TRUE@mn10300_libsim_a_SOURCES = \
2763 @SIM_ENABLE_ARCH_mn10300_TRUE@  $(common_libcommon_a_SOURCES)
2764
2765 @SIM_ENABLE_ARCH_mn10300_TRUE@mn10300_libsim_a_LIBADD = \
2766 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/itable.o \
2767 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/semantics.o \
2768 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/idecode.o \
2769 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/icache.o \
2770 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/engine.o \
2771 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/irun.o \
2772 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/support.o \
2773 @SIM_ENABLE_ARCH_mn10300_TRUE@  $(patsubst %,mn10300/%,$(SIM_NEW_COMMON_OBJS)) \
2774 @SIM_ENABLE_ARCH_mn10300_TRUE@  $(patsubst %,mn10300/dv-%.o,$(SIM_HW_DEVICES)) \
2775 @SIM_ENABLE_ARCH_mn10300_TRUE@  $(patsubst %,mn10300/dv-%.o,$(mn10300_SIM_EXTRA_HW_DEVICES)) \
2776 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/interp.o \
2777 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/op_utils.o \
2778 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/sim-resume.o
2779
2780 @SIM_ENABLE_ARCH_mn10300_TRUE@mn10300_run_SOURCES =
2781 @SIM_ENABLE_ARCH_mn10300_TRUE@mn10300_run_LDADD = \
2782 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/nrun.o \
2783 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/libsim.a \
2784 @SIM_ENABLE_ARCH_mn10300_TRUE@  $(SIM_COMMON_LIBS)
2785
2786 @SIM_ENABLE_ARCH_mn10300_TRUE@mn10300_SIM_EXTRA_HW_DEVICES = mn103cpu mn103int mn103tim mn103ser mn103iop
2787 @SIM_ENABLE_ARCH_mn10300_TRUE@mn10300_BUILT_SRC_FROM_IGEN = \
2788 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/icache.h \
2789 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/icache.c \
2790 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/idecode.h \
2791 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/idecode.c \
2792 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/semantics.h \
2793 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/semantics.c \
2794 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/model.h \
2795 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/model.c \
2796 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/support.h \
2797 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/support.c \
2798 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/itable.h \
2799 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/itable.c \
2800 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/engine.h \
2801 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/engine.c \
2802 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/irun.c
2803
2804 @SIM_ENABLE_ARCH_mn10300_TRUE@mn10300_BUILD_OUTPUTS = \
2805 @SIM_ENABLE_ARCH_mn10300_TRUE@  $(mn10300_BUILT_SRC_FROM_IGEN) \
2806 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/stamp-igen
2807
2808 @SIM_ENABLE_ARCH_mn10300_TRUE@mn10300_IGEN_TRACE = # -G omit-line-numbers # -G trace-rule-selection -G trace-rule-rejection -G trace-entries
2809 @SIM_ENABLE_ARCH_mn10300_TRUE@mn10300_IGEN_INSN = $(srcdir)/mn10300/mn10300.igen
2810 @SIM_ENABLE_ARCH_mn10300_TRUE@mn10300_IGEN_INSN_INC = mn10300/am33.igen mn10300/am33-2.igen
2811 @SIM_ENABLE_ARCH_mn10300_TRUE@mn10300_IGEN_DC = $(srcdir)/mn10300/mn10300.dc
2812 @SIM_ENABLE_ARCH_moxie_TRUE@AM_CPPFLAGS_moxie = -DDTB="\"$(dtbdir)/moxie-gdb.dtb\""
2813 @SIM_ENABLE_ARCH_moxie_TRUE@nodist_moxie_libsim_a_SOURCES = \
2814 @SIM_ENABLE_ARCH_moxie_TRUE@    moxie/modules.c
2815
2816 @SIM_ENABLE_ARCH_moxie_TRUE@moxie_libsim_a_SOURCES = \
2817 @SIM_ENABLE_ARCH_moxie_TRUE@    $(common_libcommon_a_SOURCES)
2818
2819 @SIM_ENABLE_ARCH_moxie_TRUE@moxie_libsim_a_LIBADD = \
2820 @SIM_ENABLE_ARCH_moxie_TRUE@    $(patsubst %,moxie/%,$(SIM_NEW_COMMON_OBJS)) \
2821 @SIM_ENABLE_ARCH_moxie_TRUE@    $(patsubst %,moxie/dv-%.o,$(SIM_HW_DEVICES)) \
2822 @SIM_ENABLE_ARCH_moxie_TRUE@    moxie/interp.o \
2823 @SIM_ENABLE_ARCH_moxie_TRUE@    moxie/sim-resume.o
2824
2825 @SIM_ENABLE_ARCH_moxie_TRUE@moxie_run_SOURCES =
2826 @SIM_ENABLE_ARCH_moxie_TRUE@moxie_run_LDADD = \
2827 @SIM_ENABLE_ARCH_moxie_TRUE@    moxie/nrun.o \
2828 @SIM_ENABLE_ARCH_moxie_TRUE@    moxie/libsim.a \
2829 @SIM_ENABLE_ARCH_moxie_TRUE@    $(SIM_COMMON_LIBS)
2830
2831 @SIM_ENABLE_ARCH_moxie_TRUE@dtbdir = $(datadir)/gdb/dtb
2832 @SIM_ENABLE_ARCH_moxie_TRUE@dtb_DATA = moxie/moxie-gdb.dtb
2833 @SIM_ENABLE_ARCH_msp430_TRUE@nodist_msp430_libsim_a_SOURCES = \
2834 @SIM_ENABLE_ARCH_msp430_TRUE@   msp430/modules.c
2835
2836 @SIM_ENABLE_ARCH_msp430_TRUE@msp430_libsim_a_SOURCES = \
2837 @SIM_ENABLE_ARCH_msp430_TRUE@   $(common_libcommon_a_SOURCES)
2838
2839 @SIM_ENABLE_ARCH_msp430_TRUE@msp430_libsim_a_LIBADD = \
2840 @SIM_ENABLE_ARCH_msp430_TRUE@   $(patsubst %,msp430/%,$(SIM_NEW_COMMON_OBJS)) \
2841 @SIM_ENABLE_ARCH_msp430_TRUE@   $(patsubst %,msp430/dv-%.o,$(SIM_HW_DEVICES)) \
2842 @SIM_ENABLE_ARCH_msp430_TRUE@   msp430/msp430-sim.o \
2843 @SIM_ENABLE_ARCH_msp430_TRUE@   msp430/sim-resume.o
2844
2845 @SIM_ENABLE_ARCH_msp430_TRUE@msp430_run_SOURCES =
2846 @SIM_ENABLE_ARCH_msp430_TRUE@msp430_run_LDADD = \
2847 @SIM_ENABLE_ARCH_msp430_TRUE@   msp430/nrun.o \
2848 @SIM_ENABLE_ARCH_msp430_TRUE@   msp430/libsim.a \
2849 @SIM_ENABLE_ARCH_msp430_TRUE@   $(SIM_COMMON_LIBS)
2850
2851 @SIM_ENABLE_ARCH_or1k_TRUE@AM_CPPFLAGS_or1k = -DWITH_TARGET_WORD_BITSIZE=32 -DWITH_TARGET_WORD_MSB=31
2852 @SIM_ENABLE_ARCH_or1k_TRUE@nodist_or1k_libsim_a_SOURCES = \
2853 @SIM_ENABLE_ARCH_or1k_TRUE@     or1k/modules.c
2854
2855 @SIM_ENABLE_ARCH_or1k_TRUE@or1k_libsim_a_SOURCES = \
2856 @SIM_ENABLE_ARCH_or1k_TRUE@     $(common_libcommon_a_SOURCES)
2857
2858 @SIM_ENABLE_ARCH_or1k_TRUE@or1k_libsim_a_LIBADD = \
2859 @SIM_ENABLE_ARCH_or1k_TRUE@     $(patsubst %,or1k/%,$(SIM_NEW_COMMON_OBJS)) \
2860 @SIM_ENABLE_ARCH_or1k_TRUE@     $(patsubst %,or1k/dv-%.o,$(SIM_HW_DEVICES)) \
2861 @SIM_ENABLE_ARCH_or1k_TRUE@     \
2862 @SIM_ENABLE_ARCH_or1k_TRUE@     or1k/cgen-accfp.o \
2863 @SIM_ENABLE_ARCH_or1k_TRUE@     or1k/cgen-fpu.o \
2864 @SIM_ENABLE_ARCH_or1k_TRUE@     or1k/cgen-run.o \
2865 @SIM_ENABLE_ARCH_or1k_TRUE@     or1k/cgen-scache.o \
2866 @SIM_ENABLE_ARCH_or1k_TRUE@     or1k/cgen-trace.o \
2867 @SIM_ENABLE_ARCH_or1k_TRUE@     or1k/cgen-utils.o \
2868 @SIM_ENABLE_ARCH_or1k_TRUE@     \
2869 @SIM_ENABLE_ARCH_or1k_TRUE@     or1k/arch.o \
2870 @SIM_ENABLE_ARCH_or1k_TRUE@     or1k/cpu.o \
2871 @SIM_ENABLE_ARCH_or1k_TRUE@     or1k/decode.o \
2872 @SIM_ENABLE_ARCH_or1k_TRUE@     or1k/mloop.o \
2873 @SIM_ENABLE_ARCH_or1k_TRUE@     or1k/model.o \
2874 @SIM_ENABLE_ARCH_or1k_TRUE@     or1k/sem.o \
2875 @SIM_ENABLE_ARCH_or1k_TRUE@     \
2876 @SIM_ENABLE_ARCH_or1k_TRUE@     or1k/or1k.o \
2877 @SIM_ENABLE_ARCH_or1k_TRUE@     or1k/sim-if.o \
2878 @SIM_ENABLE_ARCH_or1k_TRUE@     or1k/traps.o
2879
2880 @SIM_ENABLE_ARCH_or1k_TRUE@or1k_run_SOURCES =
2881 @SIM_ENABLE_ARCH_or1k_TRUE@or1k_run_LDADD = \
2882 @SIM_ENABLE_ARCH_or1k_TRUE@     or1k/nrun.o \
2883 @SIM_ENABLE_ARCH_or1k_TRUE@     or1k/libsim.a \
2884 @SIM_ENABLE_ARCH_or1k_TRUE@     $(SIM_COMMON_LIBS)
2885
2886 @SIM_ENABLE_ARCH_or1k_TRUE@or1kdocdir = $(docdir)/or1k
2887 @SIM_ENABLE_ARCH_or1k_TRUE@or1kdoc_DATA = or1k/README
2888 @SIM_ENABLE_ARCH_or1k_TRUE@or1k_BUILD_OUTPUTS = \
2889 @SIM_ENABLE_ARCH_or1k_TRUE@     or1k/mloop.c \
2890 @SIM_ENABLE_ARCH_or1k_TRUE@     or1k/stamp-mloop
2891
2892 @SIM_ENABLE_ARCH_ppc_TRUE@ppc_run_SOURCES =
2893 @SIM_ENABLE_ARCH_ppc_TRUE@ppc_run_LDADD = \
2894 @SIM_ENABLE_ARCH_ppc_TRUE@      ppc/main.o \
2895 @SIM_ENABLE_ARCH_ppc_TRUE@      ppc/libsim.a \
2896 @SIM_ENABLE_ARCH_ppc_TRUE@      $(SIM_COMMON_LIBS)
2897
2898 @SIM_ENABLE_ARCH_ppc_TRUE@ppcdocdir = $(docdir)/ppc
2899 @SIM_ENABLE_ARCH_ppc_TRUE@ppcdoc_DATA = ppc/BUGS ppc/INSTALL ppc/README ppc/RUN
2900 @SIM_ENABLE_ARCH_pru_TRUE@nodist_pru_libsim_a_SOURCES = \
2901 @SIM_ENABLE_ARCH_pru_TRUE@      pru/modules.c
2902
2903 @SIM_ENABLE_ARCH_pru_TRUE@pru_libsim_a_SOURCES = \
2904 @SIM_ENABLE_ARCH_pru_TRUE@      $(common_libcommon_a_SOURCES)
2905
2906 @SIM_ENABLE_ARCH_pru_TRUE@pru_libsim_a_LIBADD = \
2907 @SIM_ENABLE_ARCH_pru_TRUE@      $(patsubst %,pru/%,$(SIM_NEW_COMMON_OBJS)) \
2908 @SIM_ENABLE_ARCH_pru_TRUE@      $(patsubst %,pru/dv-%.o,$(SIM_HW_DEVICES)) \
2909 @SIM_ENABLE_ARCH_pru_TRUE@      pru/interp.o \
2910 @SIM_ENABLE_ARCH_pru_TRUE@      pru/sim-resume.o
2911
2912 @SIM_ENABLE_ARCH_pru_TRUE@pru_run_SOURCES =
2913 @SIM_ENABLE_ARCH_pru_TRUE@pru_run_LDADD = \
2914 @SIM_ENABLE_ARCH_pru_TRUE@      pru/nrun.o \
2915 @SIM_ENABLE_ARCH_pru_TRUE@      pru/libsim.a \
2916 @SIM_ENABLE_ARCH_pru_TRUE@      $(SIM_COMMON_LIBS)
2917
2918 @SIM_ENABLE_ARCH_riscv_TRUE@AM_CPPFLAGS_riscv = -DWITH_TARGET_WORD_BITSIZE=$(SIM_RISCV_BITSIZE)
2919 @SIM_ENABLE_ARCH_riscv_TRUE@nodist_riscv_libsim_a_SOURCES = \
2920 @SIM_ENABLE_ARCH_riscv_TRUE@    riscv/modules.c
2921
2922 @SIM_ENABLE_ARCH_riscv_TRUE@riscv_libsim_a_SOURCES = \
2923 @SIM_ENABLE_ARCH_riscv_TRUE@    $(common_libcommon_a_SOURCES)
2924
2925 @SIM_ENABLE_ARCH_riscv_TRUE@riscv_libsim_a_LIBADD = \
2926 @SIM_ENABLE_ARCH_riscv_TRUE@    $(patsubst %,riscv/%,$(SIM_NEW_COMMON_OBJS)) \
2927 @SIM_ENABLE_ARCH_riscv_TRUE@    $(patsubst %,riscv/dv-%.o,$(SIM_HW_DEVICES)) \
2928 @SIM_ENABLE_ARCH_riscv_TRUE@    riscv/interp.o \
2929 @SIM_ENABLE_ARCH_riscv_TRUE@    riscv/machs.o \
2930 @SIM_ENABLE_ARCH_riscv_TRUE@    riscv/sim-main.o \
2931 @SIM_ENABLE_ARCH_riscv_TRUE@    riscv/sim-resume.o
2932
2933 @SIM_ENABLE_ARCH_riscv_TRUE@riscv_run_SOURCES =
2934 @SIM_ENABLE_ARCH_riscv_TRUE@riscv_run_LDADD = \
2935 @SIM_ENABLE_ARCH_riscv_TRUE@    riscv/nrun.o \
2936 @SIM_ENABLE_ARCH_riscv_TRUE@    riscv/libsim.a \
2937 @SIM_ENABLE_ARCH_riscv_TRUE@    $(SIM_COMMON_LIBS)
2938
2939 @SIM_ENABLE_ARCH_rl78_TRUE@nodist_rl78_libsim_a_SOURCES = \
2940 @SIM_ENABLE_ARCH_rl78_TRUE@     rl78/modules.c
2941
2942 @SIM_ENABLE_ARCH_rl78_TRUE@rl78_libsim_a_SOURCES = \
2943 @SIM_ENABLE_ARCH_rl78_TRUE@     $(common_libcommon_a_SOURCES)
2944
2945 @SIM_ENABLE_ARCH_rl78_TRUE@rl78_libsim_a_LIBADD = \
2946 @SIM_ENABLE_ARCH_rl78_TRUE@     rl78/load.o \
2947 @SIM_ENABLE_ARCH_rl78_TRUE@     rl78/mem.o \
2948 @SIM_ENABLE_ARCH_rl78_TRUE@     rl78/cpu.o \
2949 @SIM_ENABLE_ARCH_rl78_TRUE@     rl78/rl78.o \
2950 @SIM_ENABLE_ARCH_rl78_TRUE@     rl78/gdb-if.o \
2951 @SIM_ENABLE_ARCH_rl78_TRUE@     rl78/trace.o
2952
2953 @SIM_ENABLE_ARCH_rl78_TRUE@rl78_run_SOURCES =
2954 @SIM_ENABLE_ARCH_rl78_TRUE@rl78_run_LDADD = \
2955 @SIM_ENABLE_ARCH_rl78_TRUE@     rl78/main.o \
2956 @SIM_ENABLE_ARCH_rl78_TRUE@     rl78/libsim.a \
2957 @SIM_ENABLE_ARCH_rl78_TRUE@     $(SIM_COMMON_LIBS)
2958
2959 @SIM_ENABLE_ARCH_rx_TRUE@AM_CPPFLAGS_rx = $(SIM_RX_CYCLE_ACCURATE_FLAGS)
2960 @SIM_ENABLE_ARCH_rx_TRUE@nodist_rx_libsim_a_SOURCES = \
2961 @SIM_ENABLE_ARCH_rx_TRUE@       rx/modules.c
2962
2963 @SIM_ENABLE_ARCH_rx_TRUE@rx_libsim_a_SOURCES = \
2964 @SIM_ENABLE_ARCH_rx_TRUE@       $(common_libcommon_a_SOURCES)
2965
2966 @SIM_ENABLE_ARCH_rx_TRUE@rx_libsim_a_LIBADD = \
2967 @SIM_ENABLE_ARCH_rx_TRUE@       rx/fpu.o \
2968 @SIM_ENABLE_ARCH_rx_TRUE@       rx/load.o \
2969 @SIM_ENABLE_ARCH_rx_TRUE@       rx/mem.o \
2970 @SIM_ENABLE_ARCH_rx_TRUE@       rx/misc.o \
2971 @SIM_ENABLE_ARCH_rx_TRUE@       rx/reg.o \
2972 @SIM_ENABLE_ARCH_rx_TRUE@       rx/rx.o \
2973 @SIM_ENABLE_ARCH_rx_TRUE@       rx/syscalls.o \
2974 @SIM_ENABLE_ARCH_rx_TRUE@       rx/trace.o \
2975 @SIM_ENABLE_ARCH_rx_TRUE@       rx/gdb-if.o \
2976 @SIM_ENABLE_ARCH_rx_TRUE@       rx/err.o
2977
2978 @SIM_ENABLE_ARCH_rx_TRUE@rx_run_SOURCES =
2979 @SIM_ENABLE_ARCH_rx_TRUE@rx_run_LDADD = \
2980 @SIM_ENABLE_ARCH_rx_TRUE@       rx/main.o \
2981 @SIM_ENABLE_ARCH_rx_TRUE@       rx/libsim.a \
2982 @SIM_ENABLE_ARCH_rx_TRUE@       $(SIM_COMMON_LIBS)
2983
2984 @SIM_ENABLE_ARCH_rx_TRUE@rxdocdir = $(docdir)/rx
2985 @SIM_ENABLE_ARCH_rx_TRUE@rxdoc_DATA = rx/README.txt
2986 @SIM_ENABLE_ARCH_sh_TRUE@nodist_sh_libsim_a_SOURCES = \
2987 @SIM_ENABLE_ARCH_sh_TRUE@       sh/modules.c
2988
2989 @SIM_ENABLE_ARCH_sh_TRUE@sh_libsim_a_SOURCES = \
2990 @SIM_ENABLE_ARCH_sh_TRUE@       $(common_libcommon_a_SOURCES)
2991
2992 @SIM_ENABLE_ARCH_sh_TRUE@sh_libsim_a_LIBADD = \
2993 @SIM_ENABLE_ARCH_sh_TRUE@       sh/interp.o \
2994 @SIM_ENABLE_ARCH_sh_TRUE@       $(patsubst %,sh/%,$(SIM_NEW_COMMON_OBJS)) \
2995 @SIM_ENABLE_ARCH_sh_TRUE@       $(patsubst %,sh/dv-%.o,$(SIM_HW_DEVICES)) \
2996 @SIM_ENABLE_ARCH_sh_TRUE@       sh/table.o
2997
2998 @SIM_ENABLE_ARCH_sh_TRUE@sh_run_SOURCES =
2999 @SIM_ENABLE_ARCH_sh_TRUE@sh_run_LDADD = \
3000 @SIM_ENABLE_ARCH_sh_TRUE@       sh/nrun.o \
3001 @SIM_ENABLE_ARCH_sh_TRUE@       sh/libsim.a \
3002 @SIM_ENABLE_ARCH_sh_TRUE@       $(SIM_COMMON_LIBS)
3003
3004 @SIM_ENABLE_ARCH_sh_TRUE@sh_BUILD_OUTPUTS = \
3005 @SIM_ENABLE_ARCH_sh_TRUE@       sh/gencode$(EXEEXT) \
3006 @SIM_ENABLE_ARCH_sh_TRUE@       sh/table.c
3007
3008 @SIM_ENABLE_ARCH_sh_TRUE@sh_gencode_SOURCES = sh/gencode.c
3009 @SIM_ENABLE_ARCH_v850_TRUE@AM_CPPFLAGS_v850 = -DWITH_TARGET_WORD_BITSIZE=32 -DWITH_TARGET_WORD_MSB=31
3010 @SIM_ENABLE_ARCH_v850_TRUE@nodist_v850_libsim_a_SOURCES = \
3011 @SIM_ENABLE_ARCH_v850_TRUE@     v850/modules.c
3012
3013 @SIM_ENABLE_ARCH_v850_TRUE@v850_libsim_a_SOURCES = \
3014 @SIM_ENABLE_ARCH_v850_TRUE@     $(common_libcommon_a_SOURCES)
3015
3016 @SIM_ENABLE_ARCH_v850_TRUE@v850_libsim_a_LIBADD = \
3017 @SIM_ENABLE_ARCH_v850_TRUE@     $(patsubst %,v850/%,$(SIM_NEW_COMMON_OBJS)) \
3018 @SIM_ENABLE_ARCH_v850_TRUE@     $(patsubst %,v850/dv-%.o,$(SIM_HW_DEVICES)) \
3019 @SIM_ENABLE_ARCH_v850_TRUE@     v850/simops.o \
3020 @SIM_ENABLE_ARCH_v850_TRUE@     v850/interp.o \
3021 @SIM_ENABLE_ARCH_v850_TRUE@     v850/itable.o \
3022 @SIM_ENABLE_ARCH_v850_TRUE@     v850/semantics.o \
3023 @SIM_ENABLE_ARCH_v850_TRUE@     v850/idecode.o \
3024 @SIM_ENABLE_ARCH_v850_TRUE@     v850/icache.o \
3025 @SIM_ENABLE_ARCH_v850_TRUE@     v850/engine.o \
3026 @SIM_ENABLE_ARCH_v850_TRUE@     v850/irun.o \
3027 @SIM_ENABLE_ARCH_v850_TRUE@     v850/support.o \
3028 @SIM_ENABLE_ARCH_v850_TRUE@     v850/sim-resume.o
3029
3030 @SIM_ENABLE_ARCH_v850_TRUE@v850_run_SOURCES =
3031 @SIM_ENABLE_ARCH_v850_TRUE@v850_run_LDADD = \
3032 @SIM_ENABLE_ARCH_v850_TRUE@     v850/nrun.o \
3033 @SIM_ENABLE_ARCH_v850_TRUE@     v850/libsim.a \
3034 @SIM_ENABLE_ARCH_v850_TRUE@     $(SIM_COMMON_LIBS)
3035
3036 @SIM_ENABLE_ARCH_v850_TRUE@v850_BUILT_SRC_FROM_IGEN = \
3037 @SIM_ENABLE_ARCH_v850_TRUE@     v850/icache.h \
3038 @SIM_ENABLE_ARCH_v850_TRUE@     v850/icache.c \
3039 @SIM_ENABLE_ARCH_v850_TRUE@     v850/idecode.h \
3040 @SIM_ENABLE_ARCH_v850_TRUE@     v850/idecode.c \
3041 @SIM_ENABLE_ARCH_v850_TRUE@     v850/semantics.h \
3042 @SIM_ENABLE_ARCH_v850_TRUE@     v850/semantics.c \
3043 @SIM_ENABLE_ARCH_v850_TRUE@     v850/model.h \
3044 @SIM_ENABLE_ARCH_v850_TRUE@     v850/model.c \
3045 @SIM_ENABLE_ARCH_v850_TRUE@     v850/support.h \
3046 @SIM_ENABLE_ARCH_v850_TRUE@     v850/support.c \
3047 @SIM_ENABLE_ARCH_v850_TRUE@     v850/itable.h \
3048 @SIM_ENABLE_ARCH_v850_TRUE@     v850/itable.c \
3049 @SIM_ENABLE_ARCH_v850_TRUE@     v850/engine.h \
3050 @SIM_ENABLE_ARCH_v850_TRUE@     v850/engine.c \
3051 @SIM_ENABLE_ARCH_v850_TRUE@     v850/irun.c
3052
3053 @SIM_ENABLE_ARCH_v850_TRUE@v850_BUILD_OUTPUTS = \
3054 @SIM_ENABLE_ARCH_v850_TRUE@     $(v850_BUILT_SRC_FROM_IGEN) \
3055 @SIM_ENABLE_ARCH_v850_TRUE@     v850/stamp-igen
3056
3057 @SIM_ENABLE_ARCH_v850_TRUE@v850_IGEN_TRACE = # -G omit-line-numbers # -G trace-rule-selection -G trace-rule-rejection -G trace-entries
3058 @SIM_ENABLE_ARCH_v850_TRUE@v850_IGEN_INSN = $(srcdir)/v850/v850.igen
3059 @SIM_ENABLE_ARCH_v850_TRUE@v850_IGEN_DC = $(srcdir)/v850/v850.dc
3060 all: $(BUILT_SOURCES) config.h
3061         $(MAKE) $(AM_MAKEFLAGS) all-recursive
3062
3063 .SUFFIXES:
3064 .SUFFIXES: .c .lo .log .o .obj .test .test$(EXEEXT) .trs
3065 am--refresh: Makefile
3066         @:
3067 $(srcdir)/Makefile.in: @MAINTAINER_MODE_TRUE@ $(srcdir)/Makefile.am $(srcdir)/common/local.mk $(srcdir)/igen/local.mk $(srcdir)/testsuite/local.mk $(srcdir)/testsuite/common/local.mk $(srcdir)/aarch64/local.mk $(srcdir)/arm/local.mk $(srcdir)/avr/local.mk $(srcdir)/bfin/local.mk $(srcdir)/bpf/local.mk $(srcdir)/cr16/local.mk $(srcdir)/cris/local.mk $(srcdir)/d10v/local.mk $(srcdir)/erc32/local.mk $(srcdir)/example-synacor/local.mk $(srcdir)/frv/local.mk $(srcdir)/ft32/local.mk $(srcdir)/h8300/local.mk $(srcdir)/iq2000/local.mk $(srcdir)/lm32/local.mk $(srcdir)/m32c/local.mk $(srcdir)/m32r/local.mk $(srcdir)/m68hc11/local.mk $(srcdir)/mcore/local.mk $(srcdir)/microblaze/local.mk $(srcdir)/mips/local.mk $(srcdir)/mn10300/local.mk $(srcdir)/moxie/local.mk $(srcdir)/msp430/local.mk $(srcdir)/or1k/local.mk $(srcdir)/ppc/local.mk $(srcdir)/pru/local.mk $(srcdir)/riscv/local.mk $(srcdir)/rl78/local.mk $(srcdir)/rx/local.mk $(srcdir)/sh/local.mk $(srcdir)/v850/local.mk $(am__configure_deps)
3068         @for dep in $?; do \
3069           case '$(am__configure_deps)' in \
3070             *$$dep*) \
3071               echo ' cd $(srcdir) && $(AUTOMAKE) --foreign'; \
3072               $(am__cd) $(srcdir) && $(AUTOMAKE) --foreign \
3073                 && exit 0; \
3074               exit 1;; \
3075           esac; \
3076         done; \
3077         echo ' cd $(top_srcdir) && $(AUTOMAKE) --foreign Makefile'; \
3078         $(am__cd) $(top_srcdir) && \
3079           $(AUTOMAKE) --foreign Makefile
3080 Makefile: $(srcdir)/Makefile.in $(top_builddir)/config.status
3081         @case '$?' in \
3082           *config.status*) \
3083             echo ' $(SHELL) ./config.status'; \
3084             $(SHELL) ./config.status;; \
3085           *) \
3086             echo ' cd $(top_builddir) && $(SHELL) ./config.status $@ $(am__depfiles_maybe)'; \
3087             cd $(top_builddir) && $(SHELL) ./config.status $@ $(am__depfiles_maybe);; \
3088         esac;
3089 $(srcdir)/common/local.mk $(srcdir)/igen/local.mk $(srcdir)/testsuite/local.mk $(srcdir)/testsuite/common/local.mk $(srcdir)/aarch64/local.mk $(srcdir)/arm/local.mk $(srcdir)/avr/local.mk $(srcdir)/bfin/local.mk $(srcdir)/bpf/local.mk $(srcdir)/cr16/local.mk $(srcdir)/cris/local.mk $(srcdir)/d10v/local.mk $(srcdir)/erc32/local.mk $(srcdir)/example-synacor/local.mk $(srcdir)/frv/local.mk $(srcdir)/ft32/local.mk $(srcdir)/h8300/local.mk $(srcdir)/iq2000/local.mk $(srcdir)/lm32/local.mk $(srcdir)/m32c/local.mk $(srcdir)/m32r/local.mk $(srcdir)/m68hc11/local.mk $(srcdir)/mcore/local.mk $(srcdir)/microblaze/local.mk $(srcdir)/mips/local.mk $(srcdir)/mn10300/local.mk $(srcdir)/moxie/local.mk $(srcdir)/msp430/local.mk $(srcdir)/or1k/local.mk $(srcdir)/ppc/local.mk $(srcdir)/pru/local.mk $(srcdir)/riscv/local.mk $(srcdir)/rl78/local.mk $(srcdir)/rx/local.mk $(srcdir)/sh/local.mk $(srcdir)/v850/local.mk $(am__empty):
3090
3091 $(top_builddir)/config.status: $(top_srcdir)/configure $(CONFIG_STATUS_DEPENDENCIES)
3092         $(SHELL) ./config.status --recheck
3093
3094 $(top_srcdir)/configure: @MAINTAINER_MODE_TRUE@ $(am__configure_deps)
3095         $(am__cd) $(srcdir) && $(AUTOCONF)
3096 $(ACLOCAL_M4): @MAINTAINER_MODE_TRUE@ $(am__aclocal_m4_deps)
3097         $(am__cd) $(srcdir) && $(ACLOCAL) $(ACLOCAL_AMFLAGS)
3098 $(am__aclocal_m4_deps):
3099
3100 config.h: stamp-h1
3101         @test -f $@ || rm -f stamp-h1
3102         @test -f $@ || $(MAKE) $(AM_MAKEFLAGS) stamp-h1
3103
3104 stamp-h1: $(srcdir)/config.h.in $(top_builddir)/config.status
3105         @rm -f stamp-h1
3106         cd $(top_builddir) && $(SHELL) ./config.status config.h
3107 $(srcdir)/config.h.in: @MAINTAINER_MODE_TRUE@ $(am__configure_deps)
3108         ($(am__cd) $(top_srcdir) && $(AUTOHEADER))
3109         rm -f stamp-h1
3110         touch $@
3111
3112 distclean-hdr:
3113         -rm -f config.h stamp-h1
3114 aarch64/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
3115         cd $(top_builddir) && $(SHELL) ./config.status $@
3116 arm/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
3117         cd $(top_builddir) && $(SHELL) ./config.status $@
3118 avr/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
3119         cd $(top_builddir) && $(SHELL) ./config.status $@
3120 bfin/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
3121         cd $(top_builddir) && $(SHELL) ./config.status $@
3122 bpf/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
3123         cd $(top_builddir) && $(SHELL) ./config.status $@
3124 cr16/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
3125         cd $(top_builddir) && $(SHELL) ./config.status $@
3126 cris/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
3127         cd $(top_builddir) && $(SHELL) ./config.status $@
3128 d10v/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
3129         cd $(top_builddir) && $(SHELL) ./config.status $@
3130 frv/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
3131         cd $(top_builddir) && $(SHELL) ./config.status $@
3132 ft32/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
3133         cd $(top_builddir) && $(SHELL) ./config.status $@
3134 h8300/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
3135         cd $(top_builddir) && $(SHELL) ./config.status $@
3136 iq2000/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
3137         cd $(top_builddir) && $(SHELL) ./config.status $@
3138 lm32/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
3139         cd $(top_builddir) && $(SHELL) ./config.status $@
3140 m32c/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
3141         cd $(top_builddir) && $(SHELL) ./config.status $@
3142 m32r/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
3143         cd $(top_builddir) && $(SHELL) ./config.status $@
3144 m68hc11/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
3145         cd $(top_builddir) && $(SHELL) ./config.status $@
3146 mcore/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
3147         cd $(top_builddir) && $(SHELL) ./config.status $@
3148 microblaze/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
3149         cd $(top_builddir) && $(SHELL) ./config.status $@
3150 mips/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
3151         cd $(top_builddir) && $(SHELL) ./config.status $@
3152 mn10300/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
3153         cd $(top_builddir) && $(SHELL) ./config.status $@
3154 moxie/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
3155         cd $(top_builddir) && $(SHELL) ./config.status $@
3156 msp430/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
3157         cd $(top_builddir) && $(SHELL) ./config.status $@
3158 or1k/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
3159         cd $(top_builddir) && $(SHELL) ./config.status $@
3160 ppc/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
3161         cd $(top_builddir) && $(SHELL) ./config.status $@
3162 pru/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
3163         cd $(top_builddir) && $(SHELL) ./config.status $@
3164 riscv/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
3165         cd $(top_builddir) && $(SHELL) ./config.status $@
3166 rl78/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
3167         cd $(top_builddir) && $(SHELL) ./config.status $@
3168 rx/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
3169         cd $(top_builddir) && $(SHELL) ./config.status $@
3170 sh/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
3171         cd $(top_builddir) && $(SHELL) ./config.status $@
3172 erc32/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
3173         cd $(top_builddir) && $(SHELL) ./config.status $@
3174 v850/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
3175         cd $(top_builddir) && $(SHELL) ./config.status $@
3176 example-synacor/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
3177         cd $(top_builddir) && $(SHELL) ./config.status $@
3178 arch-subdir.mk: $(top_builddir)/config.status $(srcdir)/arch-subdir.mk.in
3179         cd $(top_builddir) && $(SHELL) ./config.status $@
3180 .gdbinit: $(top_builddir)/config.status $(srcdir)/gdbinit.in
3181         cd $(top_builddir) && $(SHELL) ./config.status $@
3182
3183 clean-noinstLIBRARIES:
3184         -test -z "$(noinst_LIBRARIES)" || rm -f $(noinst_LIBRARIES)
3185 common/$(am__dirstamp):
3186         @$(MKDIR_P) common
3187         @: > common/$(am__dirstamp)
3188 common/$(DEPDIR)/$(am__dirstamp):
3189         @$(MKDIR_P) common/$(DEPDIR)
3190         @: > common/$(DEPDIR)/$(am__dirstamp)
3191 common/callback.$(OBJEXT): common/$(am__dirstamp) \
3192         common/$(DEPDIR)/$(am__dirstamp)
3193 common/portability.$(OBJEXT): common/$(am__dirstamp) \
3194         common/$(DEPDIR)/$(am__dirstamp)
3195 common/sim-load.$(OBJEXT): common/$(am__dirstamp) \
3196         common/$(DEPDIR)/$(am__dirstamp)
3197 common/syscall.$(OBJEXT): common/$(am__dirstamp) \
3198         common/$(DEPDIR)/$(am__dirstamp)
3199 common/target-newlib-errno.$(OBJEXT): common/$(am__dirstamp) \
3200         common/$(DEPDIR)/$(am__dirstamp)
3201 common/target-newlib-open.$(OBJEXT): common/$(am__dirstamp) \
3202         common/$(DEPDIR)/$(am__dirstamp)
3203 common/target-newlib-signal.$(OBJEXT): common/$(am__dirstamp) \
3204         common/$(DEPDIR)/$(am__dirstamp)
3205 common/target-newlib-syscall.$(OBJEXT): common/$(am__dirstamp) \
3206         common/$(DEPDIR)/$(am__dirstamp)
3207 common/version.$(OBJEXT): common/$(am__dirstamp) \
3208         common/$(DEPDIR)/$(am__dirstamp)
3209 aarch64/$(am__dirstamp):
3210         @$(MKDIR_P) aarch64
3211         @: > aarch64/$(am__dirstamp)
3212 aarch64/$(DEPDIR)/$(am__dirstamp):
3213         @$(MKDIR_P) aarch64/$(DEPDIR)
3214         @: > aarch64/$(DEPDIR)/$(am__dirstamp)
3215 aarch64/modules.$(OBJEXT): aarch64/$(am__dirstamp) \
3216         aarch64/$(DEPDIR)/$(am__dirstamp)
3217
3218 aarch64/libsim.a: $(aarch64_libsim_a_OBJECTS) $(aarch64_libsim_a_DEPENDENCIES) $(EXTRA_aarch64_libsim_a_DEPENDENCIES) aarch64/$(am__dirstamp)
3219         $(AM_V_at)-rm -f aarch64/libsim.a
3220         $(AM_V_AR)$(aarch64_libsim_a_AR) aarch64/libsim.a $(aarch64_libsim_a_OBJECTS) $(aarch64_libsim_a_LIBADD)
3221         $(AM_V_at)$(RANLIB) aarch64/libsim.a
3222 arm/$(am__dirstamp):
3223         @$(MKDIR_P) arm
3224         @: > arm/$(am__dirstamp)
3225 arm/$(DEPDIR)/$(am__dirstamp):
3226         @$(MKDIR_P) arm/$(DEPDIR)
3227         @: > arm/$(DEPDIR)/$(am__dirstamp)
3228 arm/modules.$(OBJEXT): arm/$(am__dirstamp) \
3229         arm/$(DEPDIR)/$(am__dirstamp)
3230
3231 arm/libsim.a: $(arm_libsim_a_OBJECTS) $(arm_libsim_a_DEPENDENCIES) $(EXTRA_arm_libsim_a_DEPENDENCIES) arm/$(am__dirstamp)
3232         $(AM_V_at)-rm -f arm/libsim.a
3233         $(AM_V_AR)$(arm_libsim_a_AR) arm/libsim.a $(arm_libsim_a_OBJECTS) $(arm_libsim_a_LIBADD)
3234         $(AM_V_at)$(RANLIB) arm/libsim.a
3235 avr/$(am__dirstamp):
3236         @$(MKDIR_P) avr
3237         @: > avr/$(am__dirstamp)
3238 avr/$(DEPDIR)/$(am__dirstamp):
3239         @$(MKDIR_P) avr/$(DEPDIR)
3240         @: > avr/$(DEPDIR)/$(am__dirstamp)
3241 avr/modules.$(OBJEXT): avr/$(am__dirstamp) \
3242         avr/$(DEPDIR)/$(am__dirstamp)
3243
3244 avr/libsim.a: $(avr_libsim_a_OBJECTS) $(avr_libsim_a_DEPENDENCIES) $(EXTRA_avr_libsim_a_DEPENDENCIES) avr/$(am__dirstamp)
3245         $(AM_V_at)-rm -f avr/libsim.a
3246         $(AM_V_AR)$(avr_libsim_a_AR) avr/libsim.a $(avr_libsim_a_OBJECTS) $(avr_libsim_a_LIBADD)
3247         $(AM_V_at)$(RANLIB) avr/libsim.a
3248 bfin/$(am__dirstamp):
3249         @$(MKDIR_P) bfin
3250         @: > bfin/$(am__dirstamp)
3251 bfin/$(DEPDIR)/$(am__dirstamp):
3252         @$(MKDIR_P) bfin/$(DEPDIR)
3253         @: > bfin/$(DEPDIR)/$(am__dirstamp)
3254 bfin/modules.$(OBJEXT): bfin/$(am__dirstamp) \
3255         bfin/$(DEPDIR)/$(am__dirstamp)
3256
3257 bfin/libsim.a: $(bfin_libsim_a_OBJECTS) $(bfin_libsim_a_DEPENDENCIES) $(EXTRA_bfin_libsim_a_DEPENDENCIES) bfin/$(am__dirstamp)
3258         $(AM_V_at)-rm -f bfin/libsim.a
3259         $(AM_V_AR)$(bfin_libsim_a_AR) bfin/libsim.a $(bfin_libsim_a_OBJECTS) $(bfin_libsim_a_LIBADD)
3260         $(AM_V_at)$(RANLIB) bfin/libsim.a
3261 bpf/$(am__dirstamp):
3262         @$(MKDIR_P) bpf
3263         @: > bpf/$(am__dirstamp)
3264 bpf/$(DEPDIR)/$(am__dirstamp):
3265         @$(MKDIR_P) bpf/$(DEPDIR)
3266         @: > bpf/$(DEPDIR)/$(am__dirstamp)
3267 bpf/modules.$(OBJEXT): bpf/$(am__dirstamp) \
3268         bpf/$(DEPDIR)/$(am__dirstamp)
3269
3270 bpf/libsim.a: $(bpf_libsim_a_OBJECTS) $(bpf_libsim_a_DEPENDENCIES) $(EXTRA_bpf_libsim_a_DEPENDENCIES) bpf/$(am__dirstamp)
3271         $(AM_V_at)-rm -f bpf/libsim.a
3272         $(AM_V_AR)$(bpf_libsim_a_AR) bpf/libsim.a $(bpf_libsim_a_OBJECTS) $(bpf_libsim_a_LIBADD)
3273         $(AM_V_at)$(RANLIB) bpf/libsim.a
3274
3275 common/libcommon.a: $(common_libcommon_a_OBJECTS) $(common_libcommon_a_DEPENDENCIES) $(EXTRA_common_libcommon_a_DEPENDENCIES) common/$(am__dirstamp)
3276         $(AM_V_at)-rm -f common/libcommon.a
3277         $(AM_V_AR)$(common_libcommon_a_AR) common/libcommon.a $(common_libcommon_a_OBJECTS) $(common_libcommon_a_LIBADD)
3278         $(AM_V_at)$(RANLIB) common/libcommon.a
3279 cr16/$(am__dirstamp):
3280         @$(MKDIR_P) cr16
3281         @: > cr16/$(am__dirstamp)
3282 cr16/$(DEPDIR)/$(am__dirstamp):
3283         @$(MKDIR_P) cr16/$(DEPDIR)
3284         @: > cr16/$(DEPDIR)/$(am__dirstamp)
3285 cr16/modules.$(OBJEXT): cr16/$(am__dirstamp) \
3286         cr16/$(DEPDIR)/$(am__dirstamp)
3287
3288 cr16/libsim.a: $(cr16_libsim_a_OBJECTS) $(cr16_libsim_a_DEPENDENCIES) $(EXTRA_cr16_libsim_a_DEPENDENCIES) cr16/$(am__dirstamp)
3289         $(AM_V_at)-rm -f cr16/libsim.a
3290         $(AM_V_AR)$(cr16_libsim_a_AR) cr16/libsim.a $(cr16_libsim_a_OBJECTS) $(cr16_libsim_a_LIBADD)
3291         $(AM_V_at)$(RANLIB) cr16/libsim.a
3292 cris/$(am__dirstamp):
3293         @$(MKDIR_P) cris
3294         @: > cris/$(am__dirstamp)
3295 cris/$(DEPDIR)/$(am__dirstamp):
3296         @$(MKDIR_P) cris/$(DEPDIR)
3297         @: > cris/$(DEPDIR)/$(am__dirstamp)
3298 cris/modules.$(OBJEXT): cris/$(am__dirstamp) \
3299         cris/$(DEPDIR)/$(am__dirstamp)
3300
3301 cris/libsim.a: $(cris_libsim_a_OBJECTS) $(cris_libsim_a_DEPENDENCIES) $(EXTRA_cris_libsim_a_DEPENDENCIES) cris/$(am__dirstamp)
3302         $(AM_V_at)-rm -f cris/libsim.a
3303         $(AM_V_AR)$(cris_libsim_a_AR) cris/libsim.a $(cris_libsim_a_OBJECTS) $(cris_libsim_a_LIBADD)
3304         $(AM_V_at)$(RANLIB) cris/libsim.a
3305 d10v/$(am__dirstamp):
3306         @$(MKDIR_P) d10v
3307         @: > d10v/$(am__dirstamp)
3308 d10v/$(DEPDIR)/$(am__dirstamp):
3309         @$(MKDIR_P) d10v/$(DEPDIR)
3310         @: > d10v/$(DEPDIR)/$(am__dirstamp)
3311 d10v/modules.$(OBJEXT): d10v/$(am__dirstamp) \
3312         d10v/$(DEPDIR)/$(am__dirstamp)
3313
3314 d10v/libsim.a: $(d10v_libsim_a_OBJECTS) $(d10v_libsim_a_DEPENDENCIES) $(EXTRA_d10v_libsim_a_DEPENDENCIES) d10v/$(am__dirstamp)
3315         $(AM_V_at)-rm -f d10v/libsim.a
3316         $(AM_V_AR)$(d10v_libsim_a_AR) d10v/libsim.a $(d10v_libsim_a_OBJECTS) $(d10v_libsim_a_LIBADD)
3317         $(AM_V_at)$(RANLIB) d10v/libsim.a
3318 erc32/$(am__dirstamp):
3319         @$(MKDIR_P) erc32
3320         @: > erc32/$(am__dirstamp)
3321 erc32/$(DEPDIR)/$(am__dirstamp):
3322         @$(MKDIR_P) erc32/$(DEPDIR)
3323         @: > erc32/$(DEPDIR)/$(am__dirstamp)
3324 erc32/modules.$(OBJEXT): erc32/$(am__dirstamp) \
3325         erc32/$(DEPDIR)/$(am__dirstamp)
3326
3327 erc32/libsim.a: $(erc32_libsim_a_OBJECTS) $(erc32_libsim_a_DEPENDENCIES) $(EXTRA_erc32_libsim_a_DEPENDENCIES) erc32/$(am__dirstamp)
3328         $(AM_V_at)-rm -f erc32/libsim.a
3329         $(AM_V_AR)$(erc32_libsim_a_AR) erc32/libsim.a $(erc32_libsim_a_OBJECTS) $(erc32_libsim_a_LIBADD)
3330         $(AM_V_at)$(RANLIB) erc32/libsim.a
3331 example-synacor/$(am__dirstamp):
3332         @$(MKDIR_P) example-synacor
3333         @: > example-synacor/$(am__dirstamp)
3334 example-synacor/$(DEPDIR)/$(am__dirstamp):
3335         @$(MKDIR_P) example-synacor/$(DEPDIR)
3336         @: > example-synacor/$(DEPDIR)/$(am__dirstamp)
3337 example-synacor/modules.$(OBJEXT): example-synacor/$(am__dirstamp) \
3338         example-synacor/$(DEPDIR)/$(am__dirstamp)
3339
3340 example-synacor/libsim.a: $(example_synacor_libsim_a_OBJECTS) $(example_synacor_libsim_a_DEPENDENCIES) $(EXTRA_example_synacor_libsim_a_DEPENDENCIES) example-synacor/$(am__dirstamp)
3341         $(AM_V_at)-rm -f example-synacor/libsim.a
3342         $(AM_V_AR)$(example_synacor_libsim_a_AR) example-synacor/libsim.a $(example_synacor_libsim_a_OBJECTS) $(example_synacor_libsim_a_LIBADD)
3343         $(AM_V_at)$(RANLIB) example-synacor/libsim.a
3344 frv/$(am__dirstamp):
3345         @$(MKDIR_P) frv
3346         @: > frv/$(am__dirstamp)
3347 frv/$(DEPDIR)/$(am__dirstamp):
3348         @$(MKDIR_P) frv/$(DEPDIR)
3349         @: > frv/$(DEPDIR)/$(am__dirstamp)
3350 frv/modules.$(OBJEXT): frv/$(am__dirstamp) \
3351         frv/$(DEPDIR)/$(am__dirstamp)
3352
3353 frv/libsim.a: $(frv_libsim_a_OBJECTS) $(frv_libsim_a_DEPENDENCIES) $(EXTRA_frv_libsim_a_DEPENDENCIES) frv/$(am__dirstamp)
3354         $(AM_V_at)-rm -f frv/libsim.a
3355         $(AM_V_AR)$(frv_libsim_a_AR) frv/libsim.a $(frv_libsim_a_OBJECTS) $(frv_libsim_a_LIBADD)
3356         $(AM_V_at)$(RANLIB) frv/libsim.a
3357 ft32/$(am__dirstamp):
3358         @$(MKDIR_P) ft32
3359         @: > ft32/$(am__dirstamp)
3360 ft32/$(DEPDIR)/$(am__dirstamp):
3361         @$(MKDIR_P) ft32/$(DEPDIR)
3362         @: > ft32/$(DEPDIR)/$(am__dirstamp)
3363 ft32/modules.$(OBJEXT): ft32/$(am__dirstamp) \
3364         ft32/$(DEPDIR)/$(am__dirstamp)
3365
3366 ft32/libsim.a: $(ft32_libsim_a_OBJECTS) $(ft32_libsim_a_DEPENDENCIES) $(EXTRA_ft32_libsim_a_DEPENDENCIES) ft32/$(am__dirstamp)
3367         $(AM_V_at)-rm -f ft32/libsim.a
3368         $(AM_V_AR)$(ft32_libsim_a_AR) ft32/libsim.a $(ft32_libsim_a_OBJECTS) $(ft32_libsim_a_LIBADD)
3369         $(AM_V_at)$(RANLIB) ft32/libsim.a
3370 h8300/$(am__dirstamp):
3371         @$(MKDIR_P) h8300
3372         @: > h8300/$(am__dirstamp)
3373 h8300/$(DEPDIR)/$(am__dirstamp):
3374         @$(MKDIR_P) h8300/$(DEPDIR)
3375         @: > h8300/$(DEPDIR)/$(am__dirstamp)
3376 h8300/modules.$(OBJEXT): h8300/$(am__dirstamp) \
3377         h8300/$(DEPDIR)/$(am__dirstamp)
3378
3379 h8300/libsim.a: $(h8300_libsim_a_OBJECTS) $(h8300_libsim_a_DEPENDENCIES) $(EXTRA_h8300_libsim_a_DEPENDENCIES) h8300/$(am__dirstamp)
3380         $(AM_V_at)-rm -f h8300/libsim.a
3381         $(AM_V_AR)$(h8300_libsim_a_AR) h8300/libsim.a $(h8300_libsim_a_OBJECTS) $(h8300_libsim_a_LIBADD)
3382         $(AM_V_at)$(RANLIB) h8300/libsim.a
3383 igen/$(am__dirstamp):
3384         @$(MKDIR_P) igen
3385         @: > igen/$(am__dirstamp)
3386 igen/$(DEPDIR)/$(am__dirstamp):
3387         @$(MKDIR_P) igen/$(DEPDIR)
3388         @: > igen/$(DEPDIR)/$(am__dirstamp)
3389 igen/table.$(OBJEXT): igen/$(am__dirstamp) \
3390         igen/$(DEPDIR)/$(am__dirstamp)
3391 igen/lf.$(OBJEXT): igen/$(am__dirstamp) igen/$(DEPDIR)/$(am__dirstamp)
3392 igen/misc.$(OBJEXT): igen/$(am__dirstamp) \
3393         igen/$(DEPDIR)/$(am__dirstamp)
3394 igen/filter_host.$(OBJEXT): igen/$(am__dirstamp) \
3395         igen/$(DEPDIR)/$(am__dirstamp)
3396 igen/ld-decode.$(OBJEXT): igen/$(am__dirstamp) \
3397         igen/$(DEPDIR)/$(am__dirstamp)
3398 igen/ld-cache.$(OBJEXT): igen/$(am__dirstamp) \
3399         igen/$(DEPDIR)/$(am__dirstamp)
3400 igen/filter.$(OBJEXT): igen/$(am__dirstamp) \
3401         igen/$(DEPDIR)/$(am__dirstamp)
3402 igen/ld-insn.$(OBJEXT): igen/$(am__dirstamp) \
3403         igen/$(DEPDIR)/$(am__dirstamp)
3404 igen/gen-model.$(OBJEXT): igen/$(am__dirstamp) \
3405         igen/$(DEPDIR)/$(am__dirstamp)
3406 igen/gen-itable.$(OBJEXT): igen/$(am__dirstamp) \
3407         igen/$(DEPDIR)/$(am__dirstamp)
3408 igen/gen-icache.$(OBJEXT): igen/$(am__dirstamp) \
3409         igen/$(DEPDIR)/$(am__dirstamp)
3410 igen/gen-semantics.$(OBJEXT): igen/$(am__dirstamp) \
3411         igen/$(DEPDIR)/$(am__dirstamp)
3412 igen/gen-idecode.$(OBJEXT): igen/$(am__dirstamp) \
3413         igen/$(DEPDIR)/$(am__dirstamp)
3414 igen/gen-support.$(OBJEXT): igen/$(am__dirstamp) \
3415         igen/$(DEPDIR)/$(am__dirstamp)
3416 igen/gen-engine.$(OBJEXT): igen/$(am__dirstamp) \
3417         igen/$(DEPDIR)/$(am__dirstamp)
3418 igen/gen.$(OBJEXT): igen/$(am__dirstamp) \
3419         igen/$(DEPDIR)/$(am__dirstamp)
3420 iq2000/$(am__dirstamp):
3421         @$(MKDIR_P) iq2000
3422         @: > iq2000/$(am__dirstamp)
3423 iq2000/$(DEPDIR)/$(am__dirstamp):
3424         @$(MKDIR_P) iq2000/$(DEPDIR)
3425         @: > iq2000/$(DEPDIR)/$(am__dirstamp)
3426 iq2000/modules.$(OBJEXT): iq2000/$(am__dirstamp) \
3427         iq2000/$(DEPDIR)/$(am__dirstamp)
3428
3429 iq2000/libsim.a: $(iq2000_libsim_a_OBJECTS) $(iq2000_libsim_a_DEPENDENCIES) $(EXTRA_iq2000_libsim_a_DEPENDENCIES) iq2000/$(am__dirstamp)
3430         $(AM_V_at)-rm -f iq2000/libsim.a
3431         $(AM_V_AR)$(iq2000_libsim_a_AR) iq2000/libsim.a $(iq2000_libsim_a_OBJECTS) $(iq2000_libsim_a_LIBADD)
3432         $(AM_V_at)$(RANLIB) iq2000/libsim.a
3433 lm32/$(am__dirstamp):
3434         @$(MKDIR_P) lm32
3435         @: > lm32/$(am__dirstamp)
3436 lm32/$(DEPDIR)/$(am__dirstamp):
3437         @$(MKDIR_P) lm32/$(DEPDIR)
3438         @: > lm32/$(DEPDIR)/$(am__dirstamp)
3439 lm32/modules.$(OBJEXT): lm32/$(am__dirstamp) \
3440         lm32/$(DEPDIR)/$(am__dirstamp)
3441
3442 lm32/libsim.a: $(lm32_libsim_a_OBJECTS) $(lm32_libsim_a_DEPENDENCIES) $(EXTRA_lm32_libsim_a_DEPENDENCIES) lm32/$(am__dirstamp)
3443         $(AM_V_at)-rm -f lm32/libsim.a
3444         $(AM_V_AR)$(lm32_libsim_a_AR) lm32/libsim.a $(lm32_libsim_a_OBJECTS) $(lm32_libsim_a_LIBADD)
3445         $(AM_V_at)$(RANLIB) lm32/libsim.a
3446 m32c/$(am__dirstamp):
3447         @$(MKDIR_P) m32c
3448         @: > m32c/$(am__dirstamp)
3449 m32c/$(DEPDIR)/$(am__dirstamp):
3450         @$(MKDIR_P) m32c/$(DEPDIR)
3451         @: > m32c/$(DEPDIR)/$(am__dirstamp)
3452 m32c/modules.$(OBJEXT): m32c/$(am__dirstamp) \
3453         m32c/$(DEPDIR)/$(am__dirstamp)
3454
3455 m32c/libsim.a: $(m32c_libsim_a_OBJECTS) $(m32c_libsim_a_DEPENDENCIES) $(EXTRA_m32c_libsim_a_DEPENDENCIES) m32c/$(am__dirstamp)
3456         $(AM_V_at)-rm -f m32c/libsim.a
3457         $(AM_V_AR)$(m32c_libsim_a_AR) m32c/libsim.a $(m32c_libsim_a_OBJECTS) $(m32c_libsim_a_LIBADD)
3458         $(AM_V_at)$(RANLIB) m32c/libsim.a
3459 m32r/$(am__dirstamp):
3460         @$(MKDIR_P) m32r
3461         @: > m32r/$(am__dirstamp)
3462 m32r/$(DEPDIR)/$(am__dirstamp):
3463         @$(MKDIR_P) m32r/$(DEPDIR)
3464         @: > m32r/$(DEPDIR)/$(am__dirstamp)
3465 m32r/modules.$(OBJEXT): m32r/$(am__dirstamp) \
3466         m32r/$(DEPDIR)/$(am__dirstamp)
3467
3468 m32r/libsim.a: $(m32r_libsim_a_OBJECTS) $(m32r_libsim_a_DEPENDENCIES) $(EXTRA_m32r_libsim_a_DEPENDENCIES) m32r/$(am__dirstamp)
3469         $(AM_V_at)-rm -f m32r/libsim.a
3470         $(AM_V_AR)$(m32r_libsim_a_AR) m32r/libsim.a $(m32r_libsim_a_OBJECTS) $(m32r_libsim_a_LIBADD)
3471         $(AM_V_at)$(RANLIB) m32r/libsim.a
3472 m68hc11/$(am__dirstamp):
3473         @$(MKDIR_P) m68hc11
3474         @: > m68hc11/$(am__dirstamp)
3475 m68hc11/$(DEPDIR)/$(am__dirstamp):
3476         @$(MKDIR_P) m68hc11/$(DEPDIR)
3477         @: > m68hc11/$(DEPDIR)/$(am__dirstamp)
3478 m68hc11/modules.$(OBJEXT): m68hc11/$(am__dirstamp) \
3479         m68hc11/$(DEPDIR)/$(am__dirstamp)
3480
3481 m68hc11/libsim.a: $(m68hc11_libsim_a_OBJECTS) $(m68hc11_libsim_a_DEPENDENCIES) $(EXTRA_m68hc11_libsim_a_DEPENDENCIES) m68hc11/$(am__dirstamp)
3482         $(AM_V_at)-rm -f m68hc11/libsim.a
3483         $(AM_V_AR)$(m68hc11_libsim_a_AR) m68hc11/libsim.a $(m68hc11_libsim_a_OBJECTS) $(m68hc11_libsim_a_LIBADD)
3484         $(AM_V_at)$(RANLIB) m68hc11/libsim.a
3485 mcore/$(am__dirstamp):
3486         @$(MKDIR_P) mcore
3487         @: > mcore/$(am__dirstamp)
3488 mcore/$(DEPDIR)/$(am__dirstamp):
3489         @$(MKDIR_P) mcore/$(DEPDIR)
3490         @: > mcore/$(DEPDIR)/$(am__dirstamp)
3491 mcore/modules.$(OBJEXT): mcore/$(am__dirstamp) \
3492         mcore/$(DEPDIR)/$(am__dirstamp)
3493
3494 mcore/libsim.a: $(mcore_libsim_a_OBJECTS) $(mcore_libsim_a_DEPENDENCIES) $(EXTRA_mcore_libsim_a_DEPENDENCIES) mcore/$(am__dirstamp)
3495         $(AM_V_at)-rm -f mcore/libsim.a
3496         $(AM_V_AR)$(mcore_libsim_a_AR) mcore/libsim.a $(mcore_libsim_a_OBJECTS) $(mcore_libsim_a_LIBADD)
3497         $(AM_V_at)$(RANLIB) mcore/libsim.a
3498 microblaze/$(am__dirstamp):
3499         @$(MKDIR_P) microblaze
3500         @: > microblaze/$(am__dirstamp)
3501 microblaze/$(DEPDIR)/$(am__dirstamp):
3502         @$(MKDIR_P) microblaze/$(DEPDIR)
3503         @: > microblaze/$(DEPDIR)/$(am__dirstamp)
3504 microblaze/modules.$(OBJEXT): microblaze/$(am__dirstamp) \
3505         microblaze/$(DEPDIR)/$(am__dirstamp)
3506
3507 microblaze/libsim.a: $(microblaze_libsim_a_OBJECTS) $(microblaze_libsim_a_DEPENDENCIES) $(EXTRA_microblaze_libsim_a_DEPENDENCIES) microblaze/$(am__dirstamp)
3508         $(AM_V_at)-rm -f microblaze/libsim.a
3509         $(AM_V_AR)$(microblaze_libsim_a_AR) microblaze/libsim.a $(microblaze_libsim_a_OBJECTS) $(microblaze_libsim_a_LIBADD)
3510         $(AM_V_at)$(RANLIB) microblaze/libsim.a
3511 mips/$(am__dirstamp):
3512         @$(MKDIR_P) mips
3513         @: > mips/$(am__dirstamp)
3514 mips/$(DEPDIR)/$(am__dirstamp):
3515         @$(MKDIR_P) mips/$(DEPDIR)
3516         @: > mips/$(DEPDIR)/$(am__dirstamp)
3517 mips/modules.$(OBJEXT): mips/$(am__dirstamp) \
3518         mips/$(DEPDIR)/$(am__dirstamp)
3519
3520 mips/libsim.a: $(mips_libsim_a_OBJECTS) $(mips_libsim_a_DEPENDENCIES) $(EXTRA_mips_libsim_a_DEPENDENCIES) mips/$(am__dirstamp)
3521         $(AM_V_at)-rm -f mips/libsim.a
3522         $(AM_V_AR)$(mips_libsim_a_AR) mips/libsim.a $(mips_libsim_a_OBJECTS) $(mips_libsim_a_LIBADD)
3523         $(AM_V_at)$(RANLIB) mips/libsim.a
3524 mn10300/$(am__dirstamp):
3525         @$(MKDIR_P) mn10300
3526         @: > mn10300/$(am__dirstamp)
3527 mn10300/$(DEPDIR)/$(am__dirstamp):
3528         @$(MKDIR_P) mn10300/$(DEPDIR)
3529         @: > mn10300/$(DEPDIR)/$(am__dirstamp)
3530 mn10300/modules.$(OBJEXT): mn10300/$(am__dirstamp) \
3531         mn10300/$(DEPDIR)/$(am__dirstamp)
3532
3533 mn10300/libsim.a: $(mn10300_libsim_a_OBJECTS) $(mn10300_libsim_a_DEPENDENCIES) $(EXTRA_mn10300_libsim_a_DEPENDENCIES) mn10300/$(am__dirstamp)
3534         $(AM_V_at)-rm -f mn10300/libsim.a
3535         $(AM_V_AR)$(mn10300_libsim_a_AR) mn10300/libsim.a $(mn10300_libsim_a_OBJECTS) $(mn10300_libsim_a_LIBADD)
3536         $(AM_V_at)$(RANLIB) mn10300/libsim.a
3537 moxie/$(am__dirstamp):
3538         @$(MKDIR_P) moxie
3539         @: > moxie/$(am__dirstamp)
3540 moxie/$(DEPDIR)/$(am__dirstamp):
3541         @$(MKDIR_P) moxie/$(DEPDIR)
3542         @: > moxie/$(DEPDIR)/$(am__dirstamp)
3543 moxie/modules.$(OBJEXT): moxie/$(am__dirstamp) \
3544         moxie/$(DEPDIR)/$(am__dirstamp)
3545
3546 moxie/libsim.a: $(moxie_libsim_a_OBJECTS) $(moxie_libsim_a_DEPENDENCIES) $(EXTRA_moxie_libsim_a_DEPENDENCIES) moxie/$(am__dirstamp)
3547         $(AM_V_at)-rm -f moxie/libsim.a
3548         $(AM_V_AR)$(moxie_libsim_a_AR) moxie/libsim.a $(moxie_libsim_a_OBJECTS) $(moxie_libsim_a_LIBADD)
3549         $(AM_V_at)$(RANLIB) moxie/libsim.a
3550 msp430/$(am__dirstamp):
3551         @$(MKDIR_P) msp430
3552         @: > msp430/$(am__dirstamp)
3553 msp430/$(DEPDIR)/$(am__dirstamp):
3554         @$(MKDIR_P) msp430/$(DEPDIR)
3555         @: > msp430/$(DEPDIR)/$(am__dirstamp)
3556 msp430/modules.$(OBJEXT): msp430/$(am__dirstamp) \
3557         msp430/$(DEPDIR)/$(am__dirstamp)
3558
3559 msp430/libsim.a: $(msp430_libsim_a_OBJECTS) $(msp430_libsim_a_DEPENDENCIES) $(EXTRA_msp430_libsim_a_DEPENDENCIES) msp430/$(am__dirstamp)
3560         $(AM_V_at)-rm -f msp430/libsim.a
3561         $(AM_V_AR)$(msp430_libsim_a_AR) msp430/libsim.a $(msp430_libsim_a_OBJECTS) $(msp430_libsim_a_LIBADD)
3562         $(AM_V_at)$(RANLIB) msp430/libsim.a
3563 or1k/$(am__dirstamp):
3564         @$(MKDIR_P) or1k
3565         @: > or1k/$(am__dirstamp)
3566 or1k/$(DEPDIR)/$(am__dirstamp):
3567         @$(MKDIR_P) or1k/$(DEPDIR)
3568         @: > or1k/$(DEPDIR)/$(am__dirstamp)
3569 or1k/modules.$(OBJEXT): or1k/$(am__dirstamp) \
3570         or1k/$(DEPDIR)/$(am__dirstamp)
3571
3572 or1k/libsim.a: $(or1k_libsim_a_OBJECTS) $(or1k_libsim_a_DEPENDENCIES) $(EXTRA_or1k_libsim_a_DEPENDENCIES) or1k/$(am__dirstamp)
3573         $(AM_V_at)-rm -f or1k/libsim.a
3574         $(AM_V_AR)$(or1k_libsim_a_AR) or1k/libsim.a $(or1k_libsim_a_OBJECTS) $(or1k_libsim_a_LIBADD)
3575         $(AM_V_at)$(RANLIB) or1k/libsim.a
3576 pru/$(am__dirstamp):
3577         @$(MKDIR_P) pru
3578         @: > pru/$(am__dirstamp)
3579 pru/$(DEPDIR)/$(am__dirstamp):
3580         @$(MKDIR_P) pru/$(DEPDIR)
3581         @: > pru/$(DEPDIR)/$(am__dirstamp)
3582 pru/modules.$(OBJEXT): pru/$(am__dirstamp) \
3583         pru/$(DEPDIR)/$(am__dirstamp)
3584
3585 pru/libsim.a: $(pru_libsim_a_OBJECTS) $(pru_libsim_a_DEPENDENCIES) $(EXTRA_pru_libsim_a_DEPENDENCIES) pru/$(am__dirstamp)
3586         $(AM_V_at)-rm -f pru/libsim.a
3587         $(AM_V_AR)$(pru_libsim_a_AR) pru/libsim.a $(pru_libsim_a_OBJECTS) $(pru_libsim_a_LIBADD)
3588         $(AM_V_at)$(RANLIB) pru/libsim.a
3589 riscv/$(am__dirstamp):
3590         @$(MKDIR_P) riscv
3591         @: > riscv/$(am__dirstamp)
3592 riscv/$(DEPDIR)/$(am__dirstamp):
3593         @$(MKDIR_P) riscv/$(DEPDIR)
3594         @: > riscv/$(DEPDIR)/$(am__dirstamp)
3595 riscv/modules.$(OBJEXT): riscv/$(am__dirstamp) \
3596         riscv/$(DEPDIR)/$(am__dirstamp)
3597
3598 riscv/libsim.a: $(riscv_libsim_a_OBJECTS) $(riscv_libsim_a_DEPENDENCIES) $(EXTRA_riscv_libsim_a_DEPENDENCIES) riscv/$(am__dirstamp)
3599         $(AM_V_at)-rm -f riscv/libsim.a
3600         $(AM_V_AR)$(riscv_libsim_a_AR) riscv/libsim.a $(riscv_libsim_a_OBJECTS) $(riscv_libsim_a_LIBADD)
3601         $(AM_V_at)$(RANLIB) riscv/libsim.a
3602 rl78/$(am__dirstamp):
3603         @$(MKDIR_P) rl78
3604         @: > rl78/$(am__dirstamp)
3605 rl78/$(DEPDIR)/$(am__dirstamp):
3606         @$(MKDIR_P) rl78/$(DEPDIR)
3607         @: > rl78/$(DEPDIR)/$(am__dirstamp)
3608 rl78/modules.$(OBJEXT): rl78/$(am__dirstamp) \
3609         rl78/$(DEPDIR)/$(am__dirstamp)
3610
3611 rl78/libsim.a: $(rl78_libsim_a_OBJECTS) $(rl78_libsim_a_DEPENDENCIES) $(EXTRA_rl78_libsim_a_DEPENDENCIES) rl78/$(am__dirstamp)
3612         $(AM_V_at)-rm -f rl78/libsim.a
3613         $(AM_V_AR)$(rl78_libsim_a_AR) rl78/libsim.a $(rl78_libsim_a_OBJECTS) $(rl78_libsim_a_LIBADD)
3614         $(AM_V_at)$(RANLIB) rl78/libsim.a
3615 rx/$(am__dirstamp):
3616         @$(MKDIR_P) rx
3617         @: > rx/$(am__dirstamp)
3618 rx/$(DEPDIR)/$(am__dirstamp):
3619         @$(MKDIR_P) rx/$(DEPDIR)
3620         @: > rx/$(DEPDIR)/$(am__dirstamp)
3621 rx/modules.$(OBJEXT): rx/$(am__dirstamp) rx/$(DEPDIR)/$(am__dirstamp)
3622
3623 rx/libsim.a: $(rx_libsim_a_OBJECTS) $(rx_libsim_a_DEPENDENCIES) $(EXTRA_rx_libsim_a_DEPENDENCIES) rx/$(am__dirstamp)
3624         $(AM_V_at)-rm -f rx/libsim.a
3625         $(AM_V_AR)$(rx_libsim_a_AR) rx/libsim.a $(rx_libsim_a_OBJECTS) $(rx_libsim_a_LIBADD)
3626         $(AM_V_at)$(RANLIB) rx/libsim.a
3627 sh/$(am__dirstamp):
3628         @$(MKDIR_P) sh
3629         @: > sh/$(am__dirstamp)
3630 sh/$(DEPDIR)/$(am__dirstamp):
3631         @$(MKDIR_P) sh/$(DEPDIR)
3632         @: > sh/$(DEPDIR)/$(am__dirstamp)
3633 sh/modules.$(OBJEXT): sh/$(am__dirstamp) sh/$(DEPDIR)/$(am__dirstamp)
3634
3635 sh/libsim.a: $(sh_libsim_a_OBJECTS) $(sh_libsim_a_DEPENDENCIES) $(EXTRA_sh_libsim_a_DEPENDENCIES) sh/$(am__dirstamp)
3636         $(AM_V_at)-rm -f sh/libsim.a
3637         $(AM_V_AR)$(sh_libsim_a_AR) sh/libsim.a $(sh_libsim_a_OBJECTS) $(sh_libsim_a_LIBADD)
3638         $(AM_V_at)$(RANLIB) sh/libsim.a
3639 v850/$(am__dirstamp):
3640         @$(MKDIR_P) v850
3641         @: > v850/$(am__dirstamp)
3642 v850/$(DEPDIR)/$(am__dirstamp):
3643         @$(MKDIR_P) v850/$(DEPDIR)
3644         @: > v850/$(DEPDIR)/$(am__dirstamp)
3645 v850/modules.$(OBJEXT): v850/$(am__dirstamp) \
3646         v850/$(DEPDIR)/$(am__dirstamp)
3647
3648 v850/libsim.a: $(v850_libsim_a_OBJECTS) $(v850_libsim_a_DEPENDENCIES) $(EXTRA_v850_libsim_a_DEPENDENCIES) v850/$(am__dirstamp)
3649         $(AM_V_at)-rm -f v850/libsim.a
3650         $(AM_V_AR)$(v850_libsim_a_AR) v850/libsim.a $(v850_libsim_a_OBJECTS) $(v850_libsim_a_LIBADD)
3651         $(AM_V_at)$(RANLIB) v850/libsim.a
3652
3653 clean-checkPROGRAMS:
3654         @list='$(check_PROGRAMS)'; test -n "$$list" || exit 0; \
3655         echo " rm -f" $$list; \
3656         rm -f $$list || exit $$?; \
3657         test -n "$(EXEEXT)" || exit 0; \
3658         list=`for p in $$list; do echo "$$p"; done | sed 's/$(EXEEXT)$$//'`; \
3659         echo " rm -f" $$list; \
3660         rm -f $$list
3661
3662 clean-noinstPROGRAMS:
3663         @list='$(noinst_PROGRAMS)'; test -n "$$list" || exit 0; \
3664         echo " rm -f" $$list; \
3665         rm -f $$list || exit $$?; \
3666         test -n "$(EXEEXT)" || exit 0; \
3667         list=`for p in $$list; do echo "$$p"; done | sed 's/$(EXEEXT)$$//'`; \
3668         echo " rm -f" $$list; \
3669         rm -f $$list
3670
3671 aarch64/run$(EXEEXT): $(aarch64_run_OBJECTS) $(aarch64_run_DEPENDENCIES) $(EXTRA_aarch64_run_DEPENDENCIES) aarch64/$(am__dirstamp)
3672         @rm -f aarch64/run$(EXEEXT)
3673         $(AM_V_CCLD)$(LINK) $(aarch64_run_OBJECTS) $(aarch64_run_LDADD) $(LIBS)
3674
3675 arm/run$(EXEEXT): $(arm_run_OBJECTS) $(arm_run_DEPENDENCIES) $(EXTRA_arm_run_DEPENDENCIES) arm/$(am__dirstamp)
3676         @rm -f arm/run$(EXEEXT)
3677         $(AM_V_CCLD)$(LINK) $(arm_run_OBJECTS) $(arm_run_LDADD) $(LIBS)
3678
3679 avr/run$(EXEEXT): $(avr_run_OBJECTS) $(avr_run_DEPENDENCIES) $(EXTRA_avr_run_DEPENDENCIES) avr/$(am__dirstamp)
3680         @rm -f avr/run$(EXEEXT)
3681         $(AM_V_CCLD)$(LINK) $(avr_run_OBJECTS) $(avr_run_LDADD) $(LIBS)
3682
3683 bfin/run$(EXEEXT): $(bfin_run_OBJECTS) $(bfin_run_DEPENDENCIES) $(EXTRA_bfin_run_DEPENDENCIES) bfin/$(am__dirstamp)
3684         @rm -f bfin/run$(EXEEXT)
3685         $(AM_V_CCLD)$(LINK) $(bfin_run_OBJECTS) $(bfin_run_LDADD) $(LIBS)
3686
3687 bpf/run$(EXEEXT): $(bpf_run_OBJECTS) $(bpf_run_DEPENDENCIES) $(EXTRA_bpf_run_DEPENDENCIES) bpf/$(am__dirstamp)
3688         @rm -f bpf/run$(EXEEXT)
3689         $(AM_V_CCLD)$(LINK) $(bpf_run_OBJECTS) $(bpf_run_LDADD) $(LIBS)
3690 cr16/gencode.$(OBJEXT): cr16/$(am__dirstamp) \
3691         cr16/$(DEPDIR)/$(am__dirstamp)
3692
3693 @SIM_ENABLE_ARCH_cr16_FALSE@cr16/gencode$(EXEEXT): $(cr16_gencode_OBJECTS) $(cr16_gencode_DEPENDENCIES) $(EXTRA_cr16_gencode_DEPENDENCIES) cr16/$(am__dirstamp)
3694 @SIM_ENABLE_ARCH_cr16_FALSE@    @rm -f cr16/gencode$(EXEEXT)
3695 @SIM_ENABLE_ARCH_cr16_FALSE@    $(AM_V_CCLD)$(LINK) $(cr16_gencode_OBJECTS) $(cr16_gencode_LDADD) $(LIBS)
3696
3697 cr16/run$(EXEEXT): $(cr16_run_OBJECTS) $(cr16_run_DEPENDENCIES) $(EXTRA_cr16_run_DEPENDENCIES) cr16/$(am__dirstamp)
3698         @rm -f cr16/run$(EXEEXT)
3699         $(AM_V_CCLD)$(LINK) $(cr16_run_OBJECTS) $(cr16_run_LDADD) $(LIBS)
3700
3701 cris/run$(EXEEXT): $(cris_run_OBJECTS) $(cris_run_DEPENDENCIES) $(EXTRA_cris_run_DEPENDENCIES) cris/$(am__dirstamp)
3702         @rm -f cris/run$(EXEEXT)
3703         $(AM_V_CCLD)$(LINK) $(cris_run_OBJECTS) $(cris_run_LDADD) $(LIBS)
3704 cris/rvdummy.$(OBJEXT): cris/$(am__dirstamp) \
3705         cris/$(DEPDIR)/$(am__dirstamp)
3706
3707 cris/rvdummy$(EXEEXT): $(cris_rvdummy_OBJECTS) $(cris_rvdummy_DEPENDENCIES) $(EXTRA_cris_rvdummy_DEPENDENCIES) cris/$(am__dirstamp)
3708         @rm -f cris/rvdummy$(EXEEXT)
3709         $(AM_V_CCLD)$(LINK) $(cris_rvdummy_OBJECTS) $(cris_rvdummy_LDADD) $(LIBS)
3710 d10v/gencode.$(OBJEXT): d10v/$(am__dirstamp) \
3711         d10v/$(DEPDIR)/$(am__dirstamp)
3712
3713 @SIM_ENABLE_ARCH_d10v_FALSE@d10v/gencode$(EXEEXT): $(d10v_gencode_OBJECTS) $(d10v_gencode_DEPENDENCIES) $(EXTRA_d10v_gencode_DEPENDENCIES) d10v/$(am__dirstamp)
3714 @SIM_ENABLE_ARCH_d10v_FALSE@    @rm -f d10v/gencode$(EXEEXT)
3715 @SIM_ENABLE_ARCH_d10v_FALSE@    $(AM_V_CCLD)$(LINK) $(d10v_gencode_OBJECTS) $(d10v_gencode_LDADD) $(LIBS)
3716
3717 d10v/run$(EXEEXT): $(d10v_run_OBJECTS) $(d10v_run_DEPENDENCIES) $(EXTRA_d10v_run_DEPENDENCIES) d10v/$(am__dirstamp)
3718         @rm -f d10v/run$(EXEEXT)
3719         $(AM_V_CCLD)$(LINK) $(d10v_run_OBJECTS) $(d10v_run_LDADD) $(LIBS)
3720
3721 erc32/run$(EXEEXT): $(erc32_run_OBJECTS) $(erc32_run_DEPENDENCIES) $(EXTRA_erc32_run_DEPENDENCIES) erc32/$(am__dirstamp)
3722         @rm -f erc32/run$(EXEEXT)
3723         $(AM_V_CCLD)$(LINK) $(erc32_run_OBJECTS) $(erc32_run_LDADD) $(LIBS)
3724 erc32/sis.$(OBJEXT): erc32/$(am__dirstamp) \
3725         erc32/$(DEPDIR)/$(am__dirstamp)
3726
3727 @SIM_ENABLE_ARCH_erc32_FALSE@erc32/sis$(EXEEXT): $(erc32_sis_OBJECTS) $(erc32_sis_DEPENDENCIES) $(EXTRA_erc32_sis_DEPENDENCIES) erc32/$(am__dirstamp)
3728 @SIM_ENABLE_ARCH_erc32_FALSE@   @rm -f erc32/sis$(EXEEXT)
3729 @SIM_ENABLE_ARCH_erc32_FALSE@   $(AM_V_CCLD)$(LINK) $(erc32_sis_OBJECTS) $(erc32_sis_LDADD) $(LIBS)
3730
3731 example-synacor/run$(EXEEXT): $(example_synacor_run_OBJECTS) $(example_synacor_run_DEPENDENCIES) $(EXTRA_example_synacor_run_DEPENDENCIES) example-synacor/$(am__dirstamp)
3732         @rm -f example-synacor/run$(EXEEXT)
3733         $(AM_V_CCLD)$(LINK) $(example_synacor_run_OBJECTS) $(example_synacor_run_LDADD) $(LIBS)
3734
3735 frv/run$(EXEEXT): $(frv_run_OBJECTS) $(frv_run_DEPENDENCIES) $(EXTRA_frv_run_DEPENDENCIES) frv/$(am__dirstamp)
3736         @rm -f frv/run$(EXEEXT)
3737         $(AM_V_CCLD)$(LINK) $(frv_run_OBJECTS) $(frv_run_LDADD) $(LIBS)
3738
3739 ft32/run$(EXEEXT): $(ft32_run_OBJECTS) $(ft32_run_DEPENDENCIES) $(EXTRA_ft32_run_DEPENDENCIES) ft32/$(am__dirstamp)
3740         @rm -f ft32/run$(EXEEXT)
3741         $(AM_V_CCLD)$(LINK) $(ft32_run_OBJECTS) $(ft32_run_LDADD) $(LIBS)
3742
3743 h8300/run$(EXEEXT): $(h8300_run_OBJECTS) $(h8300_run_DEPENDENCIES) $(EXTRA_h8300_run_DEPENDENCIES) h8300/$(am__dirstamp)
3744         @rm -f h8300/run$(EXEEXT)
3745         $(AM_V_CCLD)$(LINK) $(h8300_run_OBJECTS) $(h8300_run_LDADD) $(LIBS)
3746
3747 igen/filter$(EXEEXT): $(igen_filter_OBJECTS) $(igen_filter_DEPENDENCIES) $(EXTRA_igen_filter_DEPENDENCIES) igen/$(am__dirstamp)
3748         @rm -f igen/filter$(EXEEXT)
3749         $(AM_V_CCLD)$(LINK) $(igen_filter_OBJECTS) $(igen_filter_LDADD) $(LIBS)
3750
3751 igen/gen$(EXEEXT): $(igen_gen_OBJECTS) $(igen_gen_DEPENDENCIES) $(EXTRA_igen_gen_DEPENDENCIES) igen/$(am__dirstamp)
3752         @rm -f igen/gen$(EXEEXT)
3753         $(AM_V_CCLD)$(LINK) $(igen_gen_OBJECTS) $(igen_gen_LDADD) $(LIBS)
3754 igen/igen.$(OBJEXT): igen/$(am__dirstamp) \
3755         igen/$(DEPDIR)/$(am__dirstamp)
3756
3757 igen/ld-cache$(EXEEXT): $(igen_ld_cache_OBJECTS) $(igen_ld_cache_DEPENDENCIES) $(EXTRA_igen_ld_cache_DEPENDENCIES) igen/$(am__dirstamp)
3758         @rm -f igen/ld-cache$(EXEEXT)
3759         $(AM_V_CCLD)$(LINK) $(igen_ld_cache_OBJECTS) $(igen_ld_cache_LDADD) $(LIBS)
3760
3761 igen/ld-decode$(EXEEXT): $(igen_ld_decode_OBJECTS) $(igen_ld_decode_DEPENDENCIES) $(EXTRA_igen_ld_decode_DEPENDENCIES) igen/$(am__dirstamp)
3762         @rm -f igen/ld-decode$(EXEEXT)
3763         $(AM_V_CCLD)$(LINK) $(igen_ld_decode_OBJECTS) $(igen_ld_decode_LDADD) $(LIBS)
3764
3765 igen/ld-insn$(EXEEXT): $(igen_ld_insn_OBJECTS) $(igen_ld_insn_DEPENDENCIES) $(EXTRA_igen_ld_insn_DEPENDENCIES) igen/$(am__dirstamp)
3766         @rm -f igen/ld-insn$(EXEEXT)
3767         $(AM_V_CCLD)$(LINK) $(igen_ld_insn_OBJECTS) $(igen_ld_insn_LDADD) $(LIBS)
3768
3769 igen/table$(EXEEXT): $(igen_table_OBJECTS) $(igen_table_DEPENDENCIES) $(EXTRA_igen_table_DEPENDENCIES) igen/$(am__dirstamp)
3770         @rm -f igen/table$(EXEEXT)
3771         $(AM_V_CCLD)$(LINK) $(igen_table_OBJECTS) $(igen_table_LDADD) $(LIBS)
3772
3773 iq2000/run$(EXEEXT): $(iq2000_run_OBJECTS) $(iq2000_run_DEPENDENCIES) $(EXTRA_iq2000_run_DEPENDENCIES) iq2000/$(am__dirstamp)
3774         @rm -f iq2000/run$(EXEEXT)
3775         $(AM_V_CCLD)$(LINK) $(iq2000_run_OBJECTS) $(iq2000_run_LDADD) $(LIBS)
3776
3777 lm32/run$(EXEEXT): $(lm32_run_OBJECTS) $(lm32_run_DEPENDENCIES) $(EXTRA_lm32_run_DEPENDENCIES) lm32/$(am__dirstamp)
3778         @rm -f lm32/run$(EXEEXT)
3779         $(AM_V_CCLD)$(LINK) $(lm32_run_OBJECTS) $(lm32_run_LDADD) $(LIBS)
3780 m32c/opc2c.$(OBJEXT): m32c/$(am__dirstamp) \
3781         m32c/$(DEPDIR)/$(am__dirstamp)
3782
3783 @SIM_ENABLE_ARCH_m32c_FALSE@m32c/opc2c$(EXEEXT): $(m32c_opc2c_OBJECTS) $(m32c_opc2c_DEPENDENCIES) $(EXTRA_m32c_opc2c_DEPENDENCIES) m32c/$(am__dirstamp)
3784 @SIM_ENABLE_ARCH_m32c_FALSE@    @rm -f m32c/opc2c$(EXEEXT)
3785 @SIM_ENABLE_ARCH_m32c_FALSE@    $(AM_V_CCLD)$(LINK) $(m32c_opc2c_OBJECTS) $(m32c_opc2c_LDADD) $(LIBS)
3786
3787 m32c/run$(EXEEXT): $(m32c_run_OBJECTS) $(m32c_run_DEPENDENCIES) $(EXTRA_m32c_run_DEPENDENCIES) m32c/$(am__dirstamp)
3788         @rm -f m32c/run$(EXEEXT)
3789         $(AM_V_CCLD)$(LINK) $(m32c_run_OBJECTS) $(m32c_run_LDADD) $(LIBS)
3790
3791 m32r/run$(EXEEXT): $(m32r_run_OBJECTS) $(m32r_run_DEPENDENCIES) $(EXTRA_m32r_run_DEPENDENCIES) m32r/$(am__dirstamp)
3792         @rm -f m32r/run$(EXEEXT)
3793         $(AM_V_CCLD)$(LINK) $(m32r_run_OBJECTS) $(m32r_run_LDADD) $(LIBS)
3794 m68hc11/gencode.$(OBJEXT): m68hc11/$(am__dirstamp) \
3795         m68hc11/$(DEPDIR)/$(am__dirstamp)
3796
3797 @SIM_ENABLE_ARCH_m68hc11_FALSE@m68hc11/gencode$(EXEEXT): $(m68hc11_gencode_OBJECTS) $(m68hc11_gencode_DEPENDENCIES) $(EXTRA_m68hc11_gencode_DEPENDENCIES) m68hc11/$(am__dirstamp)
3798 @SIM_ENABLE_ARCH_m68hc11_FALSE@ @rm -f m68hc11/gencode$(EXEEXT)
3799 @SIM_ENABLE_ARCH_m68hc11_FALSE@ $(AM_V_CCLD)$(LINK) $(m68hc11_gencode_OBJECTS) $(m68hc11_gencode_LDADD) $(LIBS)
3800
3801 m68hc11/run$(EXEEXT): $(m68hc11_run_OBJECTS) $(m68hc11_run_DEPENDENCIES) $(EXTRA_m68hc11_run_DEPENDENCIES) m68hc11/$(am__dirstamp)
3802         @rm -f m68hc11/run$(EXEEXT)
3803         $(AM_V_CCLD)$(LINK) $(m68hc11_run_OBJECTS) $(m68hc11_run_LDADD) $(LIBS)
3804
3805 mcore/run$(EXEEXT): $(mcore_run_OBJECTS) $(mcore_run_DEPENDENCIES) $(EXTRA_mcore_run_DEPENDENCIES) mcore/$(am__dirstamp)
3806         @rm -f mcore/run$(EXEEXT)
3807         $(AM_V_CCLD)$(LINK) $(mcore_run_OBJECTS) $(mcore_run_LDADD) $(LIBS)
3808
3809 microblaze/run$(EXEEXT): $(microblaze_run_OBJECTS) $(microblaze_run_DEPENDENCIES) $(EXTRA_microblaze_run_DEPENDENCIES) microblaze/$(am__dirstamp)
3810         @rm -f microblaze/run$(EXEEXT)
3811         $(AM_V_CCLD)$(LINK) $(microblaze_run_OBJECTS) $(microblaze_run_LDADD) $(LIBS)
3812
3813 mips/run$(EXEEXT): $(mips_run_OBJECTS) $(mips_run_DEPENDENCIES) $(EXTRA_mips_run_DEPENDENCIES) mips/$(am__dirstamp)
3814         @rm -f mips/run$(EXEEXT)
3815         $(AM_V_CCLD)$(LINK) $(mips_run_OBJECTS) $(mips_run_LDADD) $(LIBS)
3816
3817 mn10300/run$(EXEEXT): $(mn10300_run_OBJECTS) $(mn10300_run_DEPENDENCIES) $(EXTRA_mn10300_run_DEPENDENCIES) mn10300/$(am__dirstamp)
3818         @rm -f mn10300/run$(EXEEXT)
3819         $(AM_V_CCLD)$(LINK) $(mn10300_run_OBJECTS) $(mn10300_run_LDADD) $(LIBS)
3820
3821 moxie/run$(EXEEXT): $(moxie_run_OBJECTS) $(moxie_run_DEPENDENCIES) $(EXTRA_moxie_run_DEPENDENCIES) moxie/$(am__dirstamp)
3822         @rm -f moxie/run$(EXEEXT)
3823         $(AM_V_CCLD)$(LINK) $(moxie_run_OBJECTS) $(moxie_run_LDADD) $(LIBS)
3824
3825 msp430/run$(EXEEXT): $(msp430_run_OBJECTS) $(msp430_run_DEPENDENCIES) $(EXTRA_msp430_run_DEPENDENCIES) msp430/$(am__dirstamp)
3826         @rm -f msp430/run$(EXEEXT)
3827         $(AM_V_CCLD)$(LINK) $(msp430_run_OBJECTS) $(msp430_run_LDADD) $(LIBS)
3828
3829 or1k/run$(EXEEXT): $(or1k_run_OBJECTS) $(or1k_run_DEPENDENCIES) $(EXTRA_or1k_run_DEPENDENCIES) or1k/$(am__dirstamp)
3830         @rm -f or1k/run$(EXEEXT)
3831         $(AM_V_CCLD)$(LINK) $(or1k_run_OBJECTS) $(or1k_run_LDADD) $(LIBS)
3832 ppc/$(am__dirstamp):
3833         @$(MKDIR_P) ppc
3834         @: > ppc/$(am__dirstamp)
3835
3836 ppc/run$(EXEEXT): $(ppc_run_OBJECTS) $(ppc_run_DEPENDENCIES) $(EXTRA_ppc_run_DEPENDENCIES) ppc/$(am__dirstamp)
3837         @rm -f ppc/run$(EXEEXT)
3838         $(AM_V_CCLD)$(LINK) $(ppc_run_OBJECTS) $(ppc_run_LDADD) $(LIBS)
3839
3840 pru/run$(EXEEXT): $(pru_run_OBJECTS) $(pru_run_DEPENDENCIES) $(EXTRA_pru_run_DEPENDENCIES) pru/$(am__dirstamp)
3841         @rm -f pru/run$(EXEEXT)
3842         $(AM_V_CCLD)$(LINK) $(pru_run_OBJECTS) $(pru_run_LDADD) $(LIBS)
3843
3844 riscv/run$(EXEEXT): $(riscv_run_OBJECTS) $(riscv_run_DEPENDENCIES) $(EXTRA_riscv_run_DEPENDENCIES) riscv/$(am__dirstamp)
3845         @rm -f riscv/run$(EXEEXT)
3846         $(AM_V_CCLD)$(LINK) $(riscv_run_OBJECTS) $(riscv_run_LDADD) $(LIBS)
3847
3848 rl78/run$(EXEEXT): $(rl78_run_OBJECTS) $(rl78_run_DEPENDENCIES) $(EXTRA_rl78_run_DEPENDENCIES) rl78/$(am__dirstamp)
3849         @rm -f rl78/run$(EXEEXT)
3850         $(AM_V_CCLD)$(LINK) $(rl78_run_OBJECTS) $(rl78_run_LDADD) $(LIBS)
3851
3852 rx/run$(EXEEXT): $(rx_run_OBJECTS) $(rx_run_DEPENDENCIES) $(EXTRA_rx_run_DEPENDENCIES) rx/$(am__dirstamp)
3853         @rm -f rx/run$(EXEEXT)
3854         $(AM_V_CCLD)$(LINK) $(rx_run_OBJECTS) $(rx_run_LDADD) $(LIBS)
3855 sh/gencode.$(OBJEXT): sh/$(am__dirstamp) sh/$(DEPDIR)/$(am__dirstamp)
3856
3857 @SIM_ENABLE_ARCH_sh_FALSE@sh/gencode$(EXEEXT): $(sh_gencode_OBJECTS) $(sh_gencode_DEPENDENCIES) $(EXTRA_sh_gencode_DEPENDENCIES) sh/$(am__dirstamp)
3858 @SIM_ENABLE_ARCH_sh_FALSE@      @rm -f sh/gencode$(EXEEXT)
3859 @SIM_ENABLE_ARCH_sh_FALSE@      $(AM_V_CCLD)$(LINK) $(sh_gencode_OBJECTS) $(sh_gencode_LDADD) $(LIBS)
3860
3861 sh/run$(EXEEXT): $(sh_run_OBJECTS) $(sh_run_DEPENDENCIES) $(EXTRA_sh_run_DEPENDENCIES) sh/$(am__dirstamp)
3862         @rm -f sh/run$(EXEEXT)
3863         $(AM_V_CCLD)$(LINK) $(sh_run_OBJECTS) $(sh_run_LDADD) $(LIBS)
3864 testsuite/common/$(am__dirstamp):
3865         @$(MKDIR_P) testsuite/common
3866         @: > testsuite/common/$(am__dirstamp)
3867 testsuite/common/$(DEPDIR)/$(am__dirstamp):
3868         @$(MKDIR_P) testsuite/common/$(DEPDIR)
3869         @: > testsuite/common/$(DEPDIR)/$(am__dirstamp)
3870 testsuite/common/alu-tst.$(OBJEXT): testsuite/common/$(am__dirstamp) \
3871         testsuite/common/$(DEPDIR)/$(am__dirstamp)
3872 testsuite/common/bits-gen.$(OBJEXT): testsuite/common/$(am__dirstamp) \
3873         testsuite/common/$(DEPDIR)/$(am__dirstamp)
3874 testsuite/common/bits32m0.$(OBJEXT): testsuite/common/$(am__dirstamp) \
3875         testsuite/common/$(DEPDIR)/$(am__dirstamp)
3876 testsuite/common/bits32m31.$(OBJEXT):  \
3877         testsuite/common/$(am__dirstamp) \
3878         testsuite/common/$(DEPDIR)/$(am__dirstamp)
3879 testsuite/common/bits64m0.$(OBJEXT): testsuite/common/$(am__dirstamp) \
3880         testsuite/common/$(DEPDIR)/$(am__dirstamp)
3881 testsuite/common/bits64m63.$(OBJEXT):  \
3882         testsuite/common/$(am__dirstamp) \
3883         testsuite/common/$(DEPDIR)/$(am__dirstamp)
3884 testsuite/common/fpu-tst.$(OBJEXT): testsuite/common/$(am__dirstamp) \
3885         testsuite/common/$(DEPDIR)/$(am__dirstamp)
3886
3887 v850/run$(EXEEXT): $(v850_run_OBJECTS) $(v850_run_DEPENDENCIES) $(EXTRA_v850_run_DEPENDENCIES) v850/$(am__dirstamp)
3888         @rm -f v850/run$(EXEEXT)
3889         $(AM_V_CCLD)$(LINK) $(v850_run_OBJECTS) $(v850_run_LDADD) $(LIBS)
3890
3891 mostlyclean-compile:
3892         -rm -f *.$(OBJEXT)
3893         -rm -f aarch64/*.$(OBJEXT)
3894         -rm -f arm/*.$(OBJEXT)
3895         -rm -f avr/*.$(OBJEXT)
3896         -rm -f bfin/*.$(OBJEXT)
3897         -rm -f bpf/*.$(OBJEXT)
3898         -rm -f common/*.$(OBJEXT)
3899         -rm -f cr16/*.$(OBJEXT)
3900         -rm -f cris/*.$(OBJEXT)
3901         -rm -f d10v/*.$(OBJEXT)
3902         -rm -f erc32/*.$(OBJEXT)
3903         -rm -f example-synacor/*.$(OBJEXT)
3904         -rm -f frv/*.$(OBJEXT)
3905         -rm -f ft32/*.$(OBJEXT)
3906         -rm -f h8300/*.$(OBJEXT)
3907         -rm -f igen/*.$(OBJEXT)
3908         -rm -f iq2000/*.$(OBJEXT)
3909         -rm -f lm32/*.$(OBJEXT)
3910         -rm -f m32c/*.$(OBJEXT)
3911         -rm -f m32r/*.$(OBJEXT)
3912         -rm -f m68hc11/*.$(OBJEXT)
3913         -rm -f mcore/*.$(OBJEXT)
3914         -rm -f microblaze/*.$(OBJEXT)
3915         -rm -f mips/*.$(OBJEXT)
3916         -rm -f mn10300/*.$(OBJEXT)
3917         -rm -f moxie/*.$(OBJEXT)
3918         -rm -f msp430/*.$(OBJEXT)
3919         -rm -f or1k/*.$(OBJEXT)
3920         -rm -f pru/*.$(OBJEXT)
3921         -rm -f riscv/*.$(OBJEXT)
3922         -rm -f rl78/*.$(OBJEXT)
3923         -rm -f rx/*.$(OBJEXT)
3924         -rm -f sh/*.$(OBJEXT)
3925         -rm -f testsuite/common/*.$(OBJEXT)
3926         -rm -f v850/*.$(OBJEXT)
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3928 distclean-compile:
3929         -rm -f *.tab.c
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3932 @AMDEP_TRUE@@am__include@ @am__quote@arm/$(DEPDIR)/modules.Po@am__quote@
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4356         @list='$(EXTRA_DEJAGNU_SITE_CONFIG)'; for f in $$list; do \
4357           echo "## Begin content included from file $$f.  Do not modify. ##" \
4358            && cat `test -f "$$f" || echo '$(srcdir)/'`$$f \
4359            && echo "## End content included from file $$f. ##" \
4360            || exit 1; \
4361          done >> site.tmp
4362         @echo "## End of auto-generated content; you can edit from here. ##" >> site.tmp
4363         @if test -f site.exp; then \
4364            sed -e '1,/^## End of auto-generated content.*##/d' site.exp >> site.tmp; \
4365          fi
4366         @-rm -f site.bak
4367         @test ! -f site.exp || mv site.exp site.bak
4368         @mv site.tmp site.exp
4369
4370 distclean-DEJAGNU:
4371         -rm -f site.exp site.bak
4372         -l='$(DEJATOOL)'; for tool in $$l; do \
4373           rm -f $$tool.sum $$tool.log; \
4374         done
4375
4376 # Recover from deleted '.trs' file; this should ensure that
4377 # "rm -f foo.log; make foo.trs" re-run 'foo.test', and re-create
4378 # both 'foo.log' and 'foo.trs'.  Break the recipe in two subshells
4379 # to avoid problems with "make -n".
4380 .log.trs:
4381         rm -f $< $@
4382         $(MAKE) $(AM_MAKEFLAGS) $<
4383
4384 # Leading 'am--fnord' is there to ensure the list of targets does not
4385 # expand to empty, as could happen e.g. with make check TESTS=''.
4386 am--fnord $(TEST_LOGS) $(TEST_LOGS:.log=.trs): $(am__force_recheck)
4387 am--force-recheck:
4388         @:
4389
4390 $(TEST_SUITE_LOG): $(TEST_LOGS)
4391         @$(am__set_TESTS_bases); \
4392         am__f_ok () { test -f "$$1" && test -r "$$1"; }; \
4393         redo_bases=`for i in $$bases; do \
4394                       am__f_ok $$i.trs && am__f_ok $$i.log || echo $$i; \
4395                     done`; \
4396         if test -n "$$redo_bases"; then \
4397           redo_logs=`for i in $$redo_bases; do echo $$i.log; done`; \
4398           redo_results=`for i in $$redo_bases; do echo $$i.trs; done`; \
4399           if $(am__make_dryrun); then :; else \
4400             rm -f $$redo_logs && rm -f $$redo_results || exit 1; \
4401           fi; \
4402         fi; \
4403         if test -n "$$am__remaking_logs"; then \
4404           echo "fatal: making $(TEST_SUITE_LOG): possible infinite" \
4405                "recursion detected" >&2; \
4406         elif test -n "$$redo_logs"; then \
4407           am__remaking_logs=yes $(MAKE) $(AM_MAKEFLAGS) $$redo_logs; \
4408         fi; \
4409         if $(am__make_dryrun); then :; else \
4410           st=0;  \
4411           errmsg="fatal: making $(TEST_SUITE_LOG): failed to create"; \
4412           for i in $$redo_bases; do \
4413             test -f $$i.trs && test -r $$i.trs \
4414               || { echo "$$errmsg $$i.trs" >&2; st=1; }; \
4415             test -f $$i.log && test -r $$i.log \
4416               || { echo "$$errmsg $$i.log" >&2; st=1; }; \
4417           done; \
4418           test $$st -eq 0 || exit 1; \
4419         fi
4420         @$(am__sh_e_setup); $(am__tty_colors); $(am__set_TESTS_bases); \
4421         ws='[   ]'; \
4422         results=`for b in $$bases; do echo $$b.trs; done`; \
4423         test -n "$$results" || results=/dev/null; \
4424         all=`  grep "^$$ws*:test-result:"           $$results | wc -l`; \
4425         pass=` grep "^$$ws*:test-result:$$ws*PASS"  $$results | wc -l`; \
4426         fail=` grep "^$$ws*:test-result:$$ws*FAIL"  $$results | wc -l`; \
4427         skip=` grep "^$$ws*:test-result:$$ws*SKIP"  $$results | wc -l`; \
4428         xfail=`grep "^$$ws*:test-result:$$ws*XFAIL" $$results | wc -l`; \
4429         xpass=`grep "^$$ws*:test-result:$$ws*XPASS" $$results | wc -l`; \
4430         error=`grep "^$$ws*:test-result:$$ws*ERROR" $$results | wc -l`; \
4431         if test `expr $$fail + $$xpass + $$error` -eq 0; then \
4432           success=true; \
4433         else \
4434           success=false; \
4435         fi; \
4436         br='==================='; br=$$br$$br$$br$$br; \
4437         result_count () \
4438         { \
4439             if test x"$$1" = x"--maybe-color"; then \
4440               maybe_colorize=yes; \
4441             elif test x"$$1" = x"--no-color"; then \
4442               maybe_colorize=no; \
4443             else \
4444               echo "$@: invalid 'result_count' usage" >&2; exit 4; \
4445             fi; \
4446             shift; \
4447             desc=$$1 count=$$2; \
4448             if test $$maybe_colorize = yes && test $$count -gt 0; then \
4449               color_start=$$3 color_end=$$std; \
4450             else \
4451               color_start= color_end=; \
4452             fi; \
4453             echo "$${color_start}# $$desc $$count$${color_end}"; \
4454         }; \
4455         create_testsuite_report () \
4456         { \
4457           result_count $$1 "TOTAL:" $$all   "$$brg"; \
4458           result_count $$1 "PASS: " $$pass  "$$grn"; \
4459           result_count $$1 "SKIP: " $$skip  "$$blu"; \
4460           result_count $$1 "XFAIL:" $$xfail "$$lgn"; \
4461           result_count $$1 "FAIL: " $$fail  "$$red"; \
4462           result_count $$1 "XPASS:" $$xpass "$$red"; \
4463           result_count $$1 "ERROR:" $$error "$$mgn"; \
4464         }; \
4465         {                                                               \
4466           echo "$(PACKAGE_STRING): $(subdir)/$(TEST_SUITE_LOG)" |       \
4467             $(am__rst_title);                                           \
4468           create_testsuite_report --no-color;                           \
4469           echo;                                                         \
4470           echo ".. contents:: :depth: 2";                               \
4471           echo;                                                         \
4472           for b in $$bases; do echo $$b; done                           \
4473             | $(am__create_global_log);                                 \
4474         } >$(TEST_SUITE_LOG).tmp || exit 1;                             \
4475         mv $(TEST_SUITE_LOG).tmp $(TEST_SUITE_LOG);                     \
4476         if $$success; then                                              \
4477           col="$$grn";                                                  \
4478          else                                                           \
4479           col="$$red";                                                  \
4480           test x"$$VERBOSE" = x || cat $(TEST_SUITE_LOG);               \
4481         fi;                                                             \
4482         echo "$${col}$$br$${std}";                                      \
4483         echo "$${col}Testsuite summary for $(PACKAGE_STRING)$${std}";   \
4484         echo "$${col}$$br$${std}";                                      \
4485         create_testsuite_report --maybe-color;                          \
4486         echo "$$col$$br$$std";                                          \
4487         if $$success; then :; else                                      \
4488           echo "$${col}See $(subdir)/$(TEST_SUITE_LOG)$${std}";         \
4489           if test -n "$(PACKAGE_BUGREPORT)"; then                       \
4490             echo "$${col}Please report to $(PACKAGE_BUGREPORT)$${std}"; \
4491           fi;                                                           \
4492           echo "$$col$$br$$std";                                        \
4493         fi;                                                             \
4494         $$success || exit 1
4495
4496 check-TESTS:
4497         @list='$(RECHECK_LOGS)';           test -z "$$list" || rm -f $$list
4498         @list='$(RECHECK_LOGS:.log=.trs)'; test -z "$$list" || rm -f $$list
4499         @test -z "$(TEST_SUITE_LOG)" || rm -f $(TEST_SUITE_LOG)
4500         @set +e; $(am__set_TESTS_bases); \
4501         log_list=`for i in $$bases; do echo $$i.log; done`; \
4502         trs_list=`for i in $$bases; do echo $$i.trs; done`; \
4503         log_list=`echo $$log_list`; trs_list=`echo $$trs_list`; \
4504         $(MAKE) $(AM_MAKEFLAGS) $(TEST_SUITE_LOG) TEST_LOGS="$$log_list"; \
4505         exit $$?;
4506 recheck: all $(check_PROGRAMS)
4507         @test -z "$(TEST_SUITE_LOG)" || rm -f $(TEST_SUITE_LOG)
4508         @set +e; $(am__set_TESTS_bases); \
4509         bases=`for i in $$bases; do echo $$i; done \
4510                  | $(am__list_recheck_tests)` || exit 1; \
4511         log_list=`for i in $$bases; do echo $$i.log; done`; \
4512         log_list=`echo $$log_list`; \
4513         $(MAKE) $(AM_MAKEFLAGS) $(TEST_SUITE_LOG) \
4514                 am__force_recheck=am--force-recheck \
4515                 TEST_LOGS="$$log_list"; \
4516         exit $$?
4517 testsuite/common/bits32m0.log: testsuite/common/bits32m0$(EXEEXT)
4518         @p='testsuite/common/bits32m0$(EXEEXT)'; \
4519         b='testsuite/common/bits32m0'; \
4520         $(am__check_pre) $(LOG_DRIVER) --test-name "$$f" \
4521         --log-file $$b.log --trs-file $$b.trs \
4522         $(am__common_driver_flags) $(AM_LOG_DRIVER_FLAGS) $(LOG_DRIVER_FLAGS) -- $(LOG_COMPILE) \
4523         "$$tst" $(AM_TESTS_FD_REDIRECT)
4524 testsuite/common/bits32m31.log: testsuite/common/bits32m31$(EXEEXT)
4525         @p='testsuite/common/bits32m31$(EXEEXT)'; \
4526         b='testsuite/common/bits32m31'; \
4527         $(am__check_pre) $(LOG_DRIVER) --test-name "$$f" \
4528         --log-file $$b.log --trs-file $$b.trs \
4529         $(am__common_driver_flags) $(AM_LOG_DRIVER_FLAGS) $(LOG_DRIVER_FLAGS) -- $(LOG_COMPILE) \
4530         "$$tst" $(AM_TESTS_FD_REDIRECT)
4531 testsuite/common/bits64m0.log: testsuite/common/bits64m0$(EXEEXT)
4532         @p='testsuite/common/bits64m0$(EXEEXT)'; \
4533         b='testsuite/common/bits64m0'; \
4534         $(am__check_pre) $(LOG_DRIVER) --test-name "$$f" \
4535         --log-file $$b.log --trs-file $$b.trs \
4536         $(am__common_driver_flags) $(AM_LOG_DRIVER_FLAGS) $(LOG_DRIVER_FLAGS) -- $(LOG_COMPILE) \
4537         "$$tst" $(AM_TESTS_FD_REDIRECT)
4538 testsuite/common/bits64m63.log: testsuite/common/bits64m63$(EXEEXT)
4539         @p='testsuite/common/bits64m63$(EXEEXT)'; \
4540         b='testsuite/common/bits64m63'; \
4541         $(am__check_pre) $(LOG_DRIVER) --test-name "$$f" \
4542         --log-file $$b.log --trs-file $$b.trs \
4543         $(am__common_driver_flags) $(AM_LOG_DRIVER_FLAGS) $(LOG_DRIVER_FLAGS) -- $(LOG_COMPILE) \
4544         "$$tst" $(AM_TESTS_FD_REDIRECT)
4545 testsuite/common/alu-tst.log: testsuite/common/alu-tst$(EXEEXT)
4546         @p='testsuite/common/alu-tst$(EXEEXT)'; \
4547         b='testsuite/common/alu-tst'; \
4548         $(am__check_pre) $(LOG_DRIVER) --test-name "$$f" \
4549         --log-file $$b.log --trs-file $$b.trs \
4550         $(am__common_driver_flags) $(AM_LOG_DRIVER_FLAGS) $(LOG_DRIVER_FLAGS) -- $(LOG_COMPILE) \
4551         "$$tst" $(AM_TESTS_FD_REDIRECT)
4552 .test.log:
4553         @p='$<'; \
4554         $(am__set_b); \
4555         $(am__check_pre) $(TEST_LOG_DRIVER) --test-name "$$f" \
4556         --log-file $$b.log --trs-file $$b.trs \
4557         $(am__common_driver_flags) $(AM_TEST_LOG_DRIVER_FLAGS) $(TEST_LOG_DRIVER_FLAGS) -- $(TEST_LOG_COMPILE) \
4558         "$$tst" $(AM_TESTS_FD_REDIRECT)
4559 @am__EXEEXT_TRUE@.test$(EXEEXT).log:
4560 @am__EXEEXT_TRUE@       @p='$<'; \
4561 @am__EXEEXT_TRUE@       $(am__set_b); \
4562 @am__EXEEXT_TRUE@       $(am__check_pre) $(TEST_LOG_DRIVER) --test-name "$$f" \
4563 @am__EXEEXT_TRUE@       --log-file $$b.log --trs-file $$b.trs \
4564 @am__EXEEXT_TRUE@       $(am__common_driver_flags) $(AM_TEST_LOG_DRIVER_FLAGS) $(TEST_LOG_DRIVER_FLAGS) -- $(TEST_LOG_COMPILE) \
4565 @am__EXEEXT_TRUE@       "$$tst" $(AM_TESTS_FD_REDIRECT)
4566 check-am: all-am
4567         $(MAKE) $(AM_MAKEFLAGS) $(check_PROGRAMS)
4568         $(MAKE) $(AM_MAKEFLAGS) check-DEJAGNU check-TESTS
4569 check: $(BUILT_SOURCES)
4570         $(MAKE) $(AM_MAKEFLAGS) check-recursive
4571 all-am: Makefile $(LIBRARIES) $(PROGRAMS) $(DATA) $(HEADERS) config.h
4572 installdirs: installdirs-recursive
4573 installdirs-am:
4574         for dir in "$(DESTDIR)$(armdocdir)" "$(DESTDIR)$(dtbdir)" "$(DESTDIR)$(erc32docdir)" "$(DESTDIR)$(frvdocdir)" "$(DESTDIR)$(or1kdocdir)" "$(DESTDIR)$(ppcdocdir)" "$(DESTDIR)$(rxdocdir)" "$(DESTDIR)$(pkgincludedir)"; do \
4575           test -z "$$dir" || $(MKDIR_P) "$$dir"; \
4576         done
4577 install: $(BUILT_SOURCES)
4578         $(MAKE) $(AM_MAKEFLAGS) install-recursive
4579 install-exec: install-exec-recursive
4580 install-data: install-data-recursive
4581 uninstall: uninstall-recursive
4582
4583 install-am: all-am
4584         @$(MAKE) $(AM_MAKEFLAGS) install-exec-am install-data-am
4585
4586 installcheck: installcheck-recursive
4587 install-strip:
4588         if test -z '$(STRIP)'; then \
4589           $(MAKE) $(AM_MAKEFLAGS) INSTALL_PROGRAM="$(INSTALL_STRIP_PROGRAM)" \
4590             install_sh_PROGRAM="$(INSTALL_STRIP_PROGRAM)" INSTALL_STRIP_FLAG=-s \
4591               install; \
4592         else \
4593           $(MAKE) $(AM_MAKEFLAGS) INSTALL_PROGRAM="$(INSTALL_STRIP_PROGRAM)" \
4594             install_sh_PROGRAM="$(INSTALL_STRIP_PROGRAM)" INSTALL_STRIP_FLAG=-s \
4595             "INSTALL_PROGRAM_ENV=STRIPPROG='$(STRIP)'" install; \
4596         fi
4597 mostlyclean-generic:
4598         -test -z "$(MOSTLYCLEANFILES)" || rm -f $(MOSTLYCLEANFILES)
4599         -test -z "$(TEST_LOGS)" || rm -f $(TEST_LOGS)
4600         -test -z "$(TEST_LOGS:.log=.trs)" || rm -f $(TEST_LOGS:.log=.trs)
4601         -test -z "$(TEST_SUITE_LOG)" || rm -f $(TEST_SUITE_LOG)
4602
4603 clean-generic:
4604         -test -z "$(CLEANFILES)" || rm -f $(CLEANFILES)
4605
4606 distclean-generic:
4607         -test -z "$(CONFIG_CLEAN_FILES)" || rm -f $(CONFIG_CLEAN_FILES)
4608         -test . = "$(srcdir)" || test -z "$(CONFIG_CLEAN_VPATH_FILES)" || rm -f $(CONFIG_CLEAN_VPATH_FILES)
4609         -rm -f aarch64/$(DEPDIR)/$(am__dirstamp)
4610         -rm -f aarch64/$(am__dirstamp)
4611         -rm -f arm/$(DEPDIR)/$(am__dirstamp)
4612         -rm -f arm/$(am__dirstamp)
4613         -rm -f avr/$(DEPDIR)/$(am__dirstamp)
4614         -rm -f avr/$(am__dirstamp)
4615         -rm -f bfin/$(DEPDIR)/$(am__dirstamp)
4616         -rm -f bfin/$(am__dirstamp)
4617         -rm -f bpf/$(DEPDIR)/$(am__dirstamp)
4618         -rm -f bpf/$(am__dirstamp)
4619         -rm -f common/$(DEPDIR)/$(am__dirstamp)
4620         -rm -f common/$(am__dirstamp)
4621         -rm -f cr16/$(DEPDIR)/$(am__dirstamp)
4622         -rm -f cr16/$(am__dirstamp)
4623         -rm -f cris/$(DEPDIR)/$(am__dirstamp)
4624         -rm -f cris/$(am__dirstamp)
4625         -rm -f d10v/$(DEPDIR)/$(am__dirstamp)
4626         -rm -f d10v/$(am__dirstamp)
4627         -rm -f erc32/$(DEPDIR)/$(am__dirstamp)
4628         -rm -f erc32/$(am__dirstamp)
4629         -rm -f example-synacor/$(DEPDIR)/$(am__dirstamp)
4630         -rm -f example-synacor/$(am__dirstamp)
4631         -rm -f frv/$(DEPDIR)/$(am__dirstamp)
4632         -rm -f frv/$(am__dirstamp)
4633         -rm -f ft32/$(DEPDIR)/$(am__dirstamp)
4634         -rm -f ft32/$(am__dirstamp)
4635         -rm -f h8300/$(DEPDIR)/$(am__dirstamp)
4636         -rm -f h8300/$(am__dirstamp)
4637         -rm -f igen/$(DEPDIR)/$(am__dirstamp)
4638         -rm -f igen/$(am__dirstamp)
4639         -rm -f iq2000/$(DEPDIR)/$(am__dirstamp)
4640         -rm -f iq2000/$(am__dirstamp)
4641         -rm -f lm32/$(DEPDIR)/$(am__dirstamp)
4642         -rm -f lm32/$(am__dirstamp)
4643         -rm -f m32c/$(DEPDIR)/$(am__dirstamp)
4644         -rm -f m32c/$(am__dirstamp)
4645         -rm -f m32r/$(DEPDIR)/$(am__dirstamp)
4646         -rm -f m32r/$(am__dirstamp)
4647         -rm -f m68hc11/$(DEPDIR)/$(am__dirstamp)
4648         -rm -f m68hc11/$(am__dirstamp)
4649         -rm -f mcore/$(DEPDIR)/$(am__dirstamp)
4650         -rm -f mcore/$(am__dirstamp)
4651         -rm -f microblaze/$(DEPDIR)/$(am__dirstamp)
4652         -rm -f microblaze/$(am__dirstamp)
4653         -rm -f mips/$(DEPDIR)/$(am__dirstamp)
4654         -rm -f mips/$(am__dirstamp)
4655         -rm -f mn10300/$(DEPDIR)/$(am__dirstamp)
4656         -rm -f mn10300/$(am__dirstamp)
4657         -rm -f moxie/$(DEPDIR)/$(am__dirstamp)
4658         -rm -f moxie/$(am__dirstamp)
4659         -rm -f msp430/$(DEPDIR)/$(am__dirstamp)
4660         -rm -f msp430/$(am__dirstamp)
4661         -rm -f or1k/$(DEPDIR)/$(am__dirstamp)
4662         -rm -f or1k/$(am__dirstamp)
4663         -rm -f ppc/$(am__dirstamp)
4664         -rm -f pru/$(DEPDIR)/$(am__dirstamp)
4665         -rm -f pru/$(am__dirstamp)
4666         -rm -f riscv/$(DEPDIR)/$(am__dirstamp)
4667         -rm -f riscv/$(am__dirstamp)
4668         -rm -f rl78/$(DEPDIR)/$(am__dirstamp)
4669         -rm -f rl78/$(am__dirstamp)
4670         -rm -f rx/$(DEPDIR)/$(am__dirstamp)
4671         -rm -f rx/$(am__dirstamp)
4672         -rm -f sh/$(DEPDIR)/$(am__dirstamp)
4673         -rm -f sh/$(am__dirstamp)
4674         -rm -f testsuite/common/$(DEPDIR)/$(am__dirstamp)
4675         -rm -f testsuite/common/$(am__dirstamp)
4676         -rm -f v850/$(DEPDIR)/$(am__dirstamp)
4677         -rm -f v850/$(am__dirstamp)
4678         -test -z "$(DISTCLEANFILES)" || rm -f $(DISTCLEANFILES)
4679
4680 maintainer-clean-generic:
4681         @echo "This command is intended for maintainers to use"
4682         @echo "it deletes files that may require special tools to rebuild."
4683         -test -z "$(BUILT_SOURCES)" || rm -f $(BUILT_SOURCES)
4684 clean: clean-recursive
4685
4686 clean-am: clean-checkPROGRAMS clean-generic clean-libtool \
4687         clean-noinstLIBRARIES clean-noinstPROGRAMS mostlyclean-am
4688
4689 distclean: distclean-recursive
4690         -rm -f $(am__CONFIG_DISTCLEAN_FILES)
4691         -rm -rf aarch64/$(DEPDIR) arm/$(DEPDIR) avr/$(DEPDIR) bfin/$(DEPDIR) bpf/$(DEPDIR) common/$(DEPDIR) cr16/$(DEPDIR) cris/$(DEPDIR) d10v/$(DEPDIR) erc32/$(DEPDIR) example-synacor/$(DEPDIR) frv/$(DEPDIR) ft32/$(DEPDIR) h8300/$(DEPDIR) igen/$(DEPDIR) iq2000/$(DEPDIR) lm32/$(DEPDIR) m32c/$(DEPDIR) m32r/$(DEPDIR) m68hc11/$(DEPDIR) mcore/$(DEPDIR) microblaze/$(DEPDIR) mips/$(DEPDIR) mn10300/$(DEPDIR) moxie/$(DEPDIR) msp430/$(DEPDIR) or1k/$(DEPDIR) pru/$(DEPDIR) riscv/$(DEPDIR) rl78/$(DEPDIR) rx/$(DEPDIR) sh/$(DEPDIR) testsuite/common/$(DEPDIR) v850/$(DEPDIR)
4692         -rm -f Makefile
4693 distclean-am: clean-am distclean-DEJAGNU distclean-compile \
4694         distclean-generic distclean-hdr distclean-libtool \
4695         distclean-tags
4696
4697 dvi: dvi-recursive
4698
4699 dvi-am:
4700
4701 html: html-recursive
4702
4703 html-am:
4704
4705 info: info-recursive
4706
4707 info-am:
4708
4709 install-data-am: install-armdocDATA install-data-local install-dtbDATA \
4710         install-erc32docDATA install-frvdocDATA install-or1kdocDATA \
4711         install-pkgincludeHEADERS install-ppcdocDATA install-rxdocDATA
4712
4713 install-dvi: install-dvi-recursive
4714
4715 install-dvi-am:
4716
4717 install-exec-am: install-exec-local
4718
4719 install-html: install-html-recursive
4720
4721 install-html-am:
4722
4723 install-info: install-info-recursive
4724
4725 install-info-am:
4726
4727 install-man:
4728
4729 install-pdf: install-pdf-recursive
4730
4731 install-pdf-am:
4732
4733 install-ps: install-ps-recursive
4734
4735 install-ps-am:
4736
4737 installcheck-am:
4738
4739 maintainer-clean: maintainer-clean-recursive
4740         -rm -f $(am__CONFIG_DISTCLEAN_FILES)
4741         -rm -rf $(top_srcdir)/autom4te.cache
4742         -rm -rf aarch64/$(DEPDIR) arm/$(DEPDIR) avr/$(DEPDIR) bfin/$(DEPDIR) bpf/$(DEPDIR) common/$(DEPDIR) cr16/$(DEPDIR) cris/$(DEPDIR) d10v/$(DEPDIR) erc32/$(DEPDIR) example-synacor/$(DEPDIR) frv/$(DEPDIR) ft32/$(DEPDIR) h8300/$(DEPDIR) igen/$(DEPDIR) iq2000/$(DEPDIR) lm32/$(DEPDIR) m32c/$(DEPDIR) m32r/$(DEPDIR) m68hc11/$(DEPDIR) mcore/$(DEPDIR) microblaze/$(DEPDIR) mips/$(DEPDIR) mn10300/$(DEPDIR) moxie/$(DEPDIR) msp430/$(DEPDIR) or1k/$(DEPDIR) pru/$(DEPDIR) riscv/$(DEPDIR) rl78/$(DEPDIR) rx/$(DEPDIR) sh/$(DEPDIR) testsuite/common/$(DEPDIR) v850/$(DEPDIR)
4743         -rm -f Makefile
4744 maintainer-clean-am: distclean-am maintainer-clean-generic
4745
4746 mostlyclean: mostlyclean-recursive
4747
4748 mostlyclean-am: mostlyclean-compile mostlyclean-generic \
4749         mostlyclean-libtool
4750
4751 pdf: pdf-recursive
4752
4753 pdf-am:
4754
4755 ps: ps-recursive
4756
4757 ps-am:
4758
4759 uninstall-am: uninstall-armdocDATA uninstall-dtbDATA \
4760         uninstall-erc32docDATA uninstall-frvdocDATA uninstall-local \
4761         uninstall-or1kdocDATA uninstall-pkgincludeHEADERS \
4762         uninstall-ppcdocDATA uninstall-rxdocDATA
4763
4764 .MAKE: $(am__recursive_targets) all check check-am install install-am \
4765         install-strip
4766
4767 .PHONY: $(am__recursive_targets) CTAGS GTAGS TAGS all all-am \
4768         am--refresh check check-DEJAGNU check-TESTS check-am clean \
4769         clean-checkPROGRAMS clean-cscope clean-generic clean-libtool \
4770         clean-noinstLIBRARIES clean-noinstPROGRAMS cscope \
4771         cscopelist-am ctags ctags-am distclean distclean-DEJAGNU \
4772         distclean-compile distclean-generic distclean-hdr \
4773         distclean-libtool distclean-tags dvi dvi-am html html-am info \
4774         info-am install install-am install-armdocDATA install-data \
4775         install-data-am install-data-local install-dtbDATA install-dvi \
4776         install-dvi-am install-erc32docDATA install-exec \
4777         install-exec-am install-exec-local install-frvdocDATA \
4778         install-html install-html-am install-info install-info-am \
4779         install-man install-or1kdocDATA install-pdf install-pdf-am \
4780         install-pkgincludeHEADERS install-ppcdocDATA install-ps \
4781         install-ps-am install-rxdocDATA install-strip installcheck \
4782         installcheck-am installdirs installdirs-am maintainer-clean \
4783         maintainer-clean-generic mostlyclean mostlyclean-compile \
4784         mostlyclean-generic mostlyclean-libtool pdf pdf-am ps ps-am \
4785         recheck tags tags-am uninstall uninstall-am \
4786         uninstall-armdocDATA uninstall-dtbDATA uninstall-erc32docDATA \
4787         uninstall-frvdocDATA uninstall-local uninstall-or1kdocDATA \
4788         uninstall-pkgincludeHEADERS uninstall-ppcdocDATA \
4789         uninstall-rxdocDATA
4790
4791 .PRECIOUS: Makefile
4792
4793 @am__include@ @am__quote@$(GNULIB_PARENT_DIR)/gnulib/Makefile.gnulib.inc@am__quote@
4794
4795 # Generate target constants for newlib/libgloss from its source tree.
4796 # This file is shipped with distributions so we build in the source dir.
4797 # Use `make nltvals' to rebuild.
4798 .PHONY: nltvals
4799 nltvals:
4800         $(srccom)/gennltvals.py --cpp "$(CPP)"
4801
4802 common/version.c: common/version.c-stamp ; @true
4803 common/version.c-stamp: $(srcroot)/gdb/version.in $(srcroot)/bfd/version.h $(srcdir)/common/create-version.sh
4804         $(AM_V_GEN)$(SHELL) $(srcdir)/common/create-version.sh $(srcroot)/gdb $@.tmp
4805         $(AM_V_at)$(SHELL) $(srcroot)/move-if-change $@.tmp $(@:-stamp=)
4806         $(AM_V_at)touch $@
4807
4808 .PRECIOUS: %/test-hw-events.o
4809 %/test-hw-events.o: common/hw-events.c
4810         $(AM_V_CC)$(COMPILE) -DMAIN -c -o $@ $<
4811 %/test-hw-events: %/test-hw-events.o %/libsim.a
4812         $(AM_V_CCLD)$(LINK) -o $@ $^ $(SIM_COMMON_LIBS) $(LIBS)
4813
4814 # FIXME This is one very simple-minded way of generating the file hw-config.h.
4815 %/hw-config.h: %/stamp-hw ; @true
4816 %/stamp-hw: Makefile
4817         $(AM_V_GEN)set -e; \
4818         ( \
4819         sim_hw="$(SIM_HW_DEVICES) $($(@D)_SIM_EXTRA_HW_DEVICES)" ; \
4820         echo "/* generated by Makefile */" ; \
4821         printf "extern const struct hw_descriptor dv_%s_descriptor[];\n" $$sim_hw ; \
4822         echo "const struct hw_descriptor * const hw_descriptors[] = {" ; \
4823         printf "  dv_%s_descriptor,\n" $$sim_hw ; \
4824         echo "  NULL," ; \
4825         echo "};" \
4826         ) > $@.tmp; \
4827         $(SHELL) $(srcroot)/move-if-change $@.tmp $(@D)/hw-config.h; \
4828         touch $@
4829 .PRECIOUS: %/stamp-hw
4830 %/modules.c: %/stamp-modules ; @true
4831 %/stamp-modules: Makefile
4832         $(AM_V_GEN)set -e; \
4833         LANG=C ; export LANG; \
4834         LC_ALL=C ; export LC_ALL; \
4835         sed -n -e '/^sim_install_/{s/^\(sim_install_[a-z_0-9A-Z]*\).*/\1/;p}' $(GEN_MODULES_C_SRCS) | sort >$@.l-tmp; \
4836         ( \
4837         echo '/* Do not modify this file.  */'; \
4838         echo '/* It is created automatically by the Makefile.  */'; \
4839         echo '#include "libiberty.h"'; \
4840         echo '#include "sim-module.h"'; \
4841         sed -e 's:\(.*\):extern MODULE_INIT_FN \1;:' $@.l-tmp; \
4842         echo 'MODULE_INSTALL_FN * const sim_modules_detected[] = {'; \
4843         sed -e 's:\(.*\):  \1,:' $@.l-tmp; \
4844         echo '};'; \
4845         echo 'const int sim_modules_detected_len = ARRAY_SIZE (sim_modules_detected);'; \
4846         ) >$@.tmp; \
4847         $(SHELL) $(srcroot)/move-if-change $@.tmp $(@D)/modules.c; \
4848         rm -f $@.l-tmp; \
4849         touch $@
4850 .PRECIOUS: %/stamp-modules
4851
4852 # Alias for developers.
4853 igen: $(IGEN)
4854
4855 # These rules are copied from automake, but tweaked to use FOR_BUILD variables.
4856 igen/libigen.a: $(igen_libigen_a_OBJECTS) $(igen_libigen_a_DEPENDENCIES) $(EXTRA_igen_libigen_a_DEPENDENCIES) igen/$(am__dirstamp)
4857         $(AM_V_at)-rm -f $@
4858         $(AM_V_AR)$(AR_FOR_BUILD) $(ARFLAGS) $@ $(igen_libigen_a_OBJECTS) $(igen_libigen_a_LIBADD)
4859         $(AM_V_at)$(RANLIB_FOR_BUILD) $@
4860
4861 igen/igen$(EXEEXT): $(igen_igen_OBJECTS) $(igen_igen_DEPENDENCIES) igen/$(am__dirstamp)
4862         $(AM_V_CCLD)$(LINK_FOR_BUILD) $(igen_igen_OBJECTS) $(igen_igen_LDADD)
4863
4864 # igen is a build-time only tool.  Override the default rules for it.
4865 igen/%.o: igen/%.c
4866         $(AM_V_CC)$(COMPILE_FOR_BUILD) -c $< -o $@
4867
4868 # Build some of the files in standalone mode for developers of igen itself.
4869 igen/%-main.o: igen/%.c
4870         $(AM_V_CC)$(COMPILE_FOR_BUILD) -DMAIN -c $< -o $@
4871
4872 site-sim-config.exp: Makefile
4873         $(AM_V_GEN)( \
4874         echo "set SIM_PRIMARY_TARGET \"$(SIM_PRIMARY_TARGET)\""; \
4875         echo "set builddir \"$(builddir)\""; \
4876         echo "set srcdir \"$(srcdir)/testsuite\""; \
4877         $(foreach V,$(SIM_TOOLCHAIN_VARS),echo "set $(V) \"$($(V))\"";) \
4878         ) > $@
4879
4880 # Ignore dirs that only contain configuration settings.
4881 check/./config/%.exp: ; @true
4882 check/config/%.exp: ; @true
4883 check/./lib/%.exp: ; @true
4884 check/lib/%.exp: ; @true
4885
4886 check/%.exp:
4887         $(AM_V_at)mkdir -p testsuite/$*
4888         $(AM_V_RUNTEST)$(DO_RUNTEST) --objdir testsuite/$* --outdir testsuite/$* $*.exp
4889
4890 check-DEJAGNU-parallel:
4891         $(AM_V_at)( \
4892         set -- `cd $(srcdir)/testsuite && find . -name '*.exp' -printf '%P\n' | sed 's:[.]exp$$::'`; \
4893         $(MAKE) -k `printf 'check/%s.exp ' $$@`; \
4894         ret=$$?; \
4895         set -- `printf 'testsuite/%s/ ' $$@`; \
4896         $(SHELL) $(srcroot)/contrib/dg-extract-results.sh \
4897           `find $$@ -maxdepth 1 -name testrun.sum 2>/dev/null | sort` > testrun.sum; \
4898         $(SHELL) $(srcroot)/contrib/dg-extract-results.sh -L \
4899           `find $$@ -maxdepth 1 -name testrun.log 2>/dev/null | sort` > testrun.log; \
4900         echo; \
4901         $(SED) -n '/^.*===.*Summary.*===/,$$p' testrun.sum; \
4902         exit $$ret)
4903
4904 check-DEJAGNU-single:
4905         $(AM_V_RUNTEST)$(DO_RUNTEST)
4906
4907 # If running a single job, invoking runtest once is faster & has nicer output.
4908 check-DEJAGNU: site.exp
4909         $(AM_V_at)(set -e; \
4910         EXPECT=${EXPECT} ; export EXPECT ; \
4911         runtest=$(RUNTEST); \
4912         if $(SHELL) -c "$$runtest --version" > /dev/null 2>&1; then \
4913           case "$(MAKEFLAGS)" in \
4914           *-j*) $(MAKE) check-DEJAGNU-parallel;; \
4915           *)    $(MAKE) check-DEJAGNU-single;; \
4916           esac; \
4917         else \
4918           echo "WARNING: could not find \`runtest'" 1>&2; :;\
4919         fi)
4920
4921 # These tests are build-time only tools.  Override the default rules for them.
4922 testsuite/common/%.o: testsuite/common/%.c
4923         $(AM_V_CC)$(COMPILE_FOR_BUILD) $(testsuite_common_CPPFLAGS) -c $< -o $@
4924
4925 testsuite/common/alu-tst$(EXEEXT): $(testsuite_common_alu_tst_OBJECTS) $(testsuite_common_alu_tst_DEPENDENCIES) testsuite/common/$(am__dirstamp)
4926         $(AM_V_CCLD)$(LINK_FOR_BUILD) $(testsuite_common_alu_tst_OBJECTS) $(testsuite_common_alu_tst_LDADD)
4927
4928 testsuite/common/fpu-tst$(EXEEXT): $(testsuite_common_fpu_tst_OBJECTS) $(testsuite_common_fpu_tst_DEPENDENCIES) testsuite/common/$(am__dirstamp)
4929         $(AM_V_CCLD)$(LINK_FOR_BUILD) $(testsuite_common_fpu_tst_OBJECTS) $(testsuite_common_fpu_tst_LDADD)
4930
4931 testsuite/common/bits-gen$(EXEEXT): $(testsuite_common_bits_gen_OBJECTS) $(testsuite_common_bits_gen_DEPENDENCIES) testsuite/common/$(am__dirstamp)
4932         $(AM_V_CCLD)$(LINK_FOR_BUILD) $(testsuite_common_bits_gen_OBJECTS) $(testsuite_common_bits_gen_LDADD)
4933
4934 testsuite/common/bits32m0$(EXEEXT): $(testsuite_common_bits32m0_OBJECTS) $(testsuite_common_bits32m0_DEPENDENCIES) testsuite/common/$(am__dirstamp)
4935         $(AM_V_CCLD)$(LINK_FOR_BUILD) $(testsuite_common_bits32m0_OBJECTS) $(testsuite_common_bits32m0_LDADD)
4936
4937 testsuite/common/bits32m0.c: testsuite/common/bits-gen$(EXEEXT) testsuite/common/bits-tst.c
4938         $(AM_V_GEN)$< 32 0 big > $@.tmp
4939         $(AM_V_at)cat $(srcdir)/testsuite/common/bits-tst.c >> $@.tmp
4940         $(AM_V_at)mv $@.tmp $@
4941
4942 testsuite/common/bits32m31$(EXEEXT): $(testsuite_common_bits32m31_OBJECTS) $(testsuite_common_bits32m31_DEPENDENCIES) testsuite/common/$(am__dirstamp)
4943         $(AM_V_CCLD)$(LINK_FOR_BUILD) $(testsuite_common_bits32m31_OBJECTS) $(testsuite_common_bits32m31_LDADD)
4944
4945 testsuite/common/bits32m31.c: testsuite/common/bits-gen$(EXEEXT) testsuite/common/bits-tst.c
4946         $(AM_V_GEN)$< 32 31 little > $@.tmp
4947         $(AM_V_at)cat $(srcdir)/testsuite/common/bits-tst.c >> $@.tmp
4948         $(AM_V_at)mv $@.tmp $@
4949
4950 testsuite/common/bits64m0$(EXEEXT): $(testsuite_common_bits64m0_OBJECTS) $(testsuite_common_bits64m0_DEPENDENCIES) testsuite/common/$(am__dirstamp)
4951         $(AM_V_CCLD)$(LINK_FOR_BUILD) $(testsuite_common_bits64m0_OBJECTS) $(testsuite_common_bits64m0_LDADD)
4952
4953 testsuite/common/bits64m0.c: testsuite/common/bits-gen$(EXEEXT) testsuite/common/bits-tst.c
4954         $(AM_V_GEN)$< 64 0 big > $@.tmp
4955         $(AM_V_at)cat $(srcdir)/testsuite/common/bits-tst.c >> $@.tmp
4956         $(AM_V_at)mv $@.tmp $@
4957
4958 testsuite/common/bits64m63$(EXEEXT): $(testsuite_common_bits64m63_OBJECTS) $(testsuite_common_bits64m63_DEPENDENCIES) testsuite/common/$(am__dirstamp)
4959         $(AM_V_CCLD)$(LINK_FOR_BUILD) $(testsuite_common_bits64m63_OBJECTS) $(testsuite_common_bits64m63_LDADD)
4960
4961 testsuite/common/bits64m63.c: testsuite/common/bits-gen$(EXEEXT) testsuite/common/bits-tst.c
4962         $(AM_V_GEN)$< 64 63 little > $@.tmp
4963         $(AM_V_at)cat $(srcdir)/testsuite/common/bits-tst.c >> $@.tmp
4964         $(AM_V_at)mv $@.tmp $@
4965 @SIM_ENABLE_ARCH_aarch64_TRUE@$(aarch64_libsim_a_OBJECTS) $(aarch64_libsim_a_LIBADD): aarch64/hw-config.h
4966
4967 @SIM_ENABLE_ARCH_aarch64_TRUE@aarch64/modules.o: aarch64/modules.c
4968
4969 @SIM_ENABLE_ARCH_aarch64_TRUE@aarch64/%.o: common/%.c ; $(SIM_COMPILE)
4970 @SIM_ENABLE_ARCH_aarch64_TRUE@-@am__include@ aarch64/$(DEPDIR)/*.Po
4971 @SIM_ENABLE_ARCH_arm_TRUE@$(arm_libsim_a_OBJECTS) $(arm_libsim_a_LIBADD): arm/hw-config.h
4972
4973 @SIM_ENABLE_ARCH_arm_TRUE@arm/modules.o: arm/modules.c
4974
4975 @SIM_ENABLE_ARCH_arm_TRUE@arm/%.o: common/%.c ; $(SIM_COMPILE)
4976 @SIM_ENABLE_ARCH_arm_TRUE@-@am__include@ arm/$(DEPDIR)/*.Po
4977 @SIM_ENABLE_ARCH_avr_TRUE@$(avr_libsim_a_OBJECTS) $(avr_libsim_a_LIBADD): avr/hw-config.h
4978
4979 @SIM_ENABLE_ARCH_avr_TRUE@avr/modules.o: avr/modules.c
4980
4981 @SIM_ENABLE_ARCH_avr_TRUE@avr/%.o: common/%.c ; $(SIM_COMPILE)
4982 @SIM_ENABLE_ARCH_avr_TRUE@-@am__include@ avr/$(DEPDIR)/*.Po
4983 @SIM_ENABLE_ARCH_bfin_TRUE@$(bfin_libsim_a_OBJECTS) $(bfin_libsim_a_LIBADD): bfin/hw-config.h
4984
4985 @SIM_ENABLE_ARCH_bfin_TRUE@bfin/modules.o: bfin/modules.c
4986
4987 @SIM_ENABLE_ARCH_bfin_TRUE@bfin/%.o: common/%.c ; $(SIM_COMPILE)
4988 @SIM_ENABLE_ARCH_bfin_TRUE@-@am__include@ bfin/$(DEPDIR)/*.Po
4989
4990 @SIM_ENABLE_ARCH_bfin_TRUE@bfin/linux-fixed-code.h: @MAINT@ $(srcdir)/bfin/linux-fixed-code.s bfin/local.mk bfin/$(am__dirstamp)
4991 @SIM_ENABLE_ARCH_bfin_TRUE@     $(AM_V_GEN)$(AS_FOR_TARGET_BFIN) $(srcdir)/bfin/linux-fixed-code.s -o bfin/linux-fixed-code.o
4992 @SIM_ENABLE_ARCH_bfin_TRUE@     $(AM_V_at)(\
4993 @SIM_ENABLE_ARCH_bfin_TRUE@             set -e; \
4994 @SIM_ENABLE_ARCH_bfin_TRUE@             echo "/* DO NOT EDIT: Autogenerated from linux-fixed-code.s.  */"; \
4995 @SIM_ENABLE_ARCH_bfin_TRUE@             echo "static const unsigned char bfin_linux_fixed_code[] ="; \
4996 @SIM_ENABLE_ARCH_bfin_TRUE@             echo "{"; \
4997 @SIM_ENABLE_ARCH_bfin_TRUE@             $(OBJDUMP_FOR_TARGET_BFIN) -d -z bfin/linux-fixed-code.o > $@.dis; \
4998 @SIM_ENABLE_ARCH_bfin_TRUE@             sed -n \
4999 @SIM_ENABLE_ARCH_bfin_TRUE@                     -e 's:^[^       ]*      :0x:' \
5000 @SIM_ENABLE_ARCH_bfin_TRUE@                     -e '/^0x/{s:    .*::;s: *$$:,:;s: :, 0x:g;p;}' \
5001 @SIM_ENABLE_ARCH_bfin_TRUE@                     $@.dis; \
5002 @SIM_ENABLE_ARCH_bfin_TRUE@             rm -f $@.dis; \
5003 @SIM_ENABLE_ARCH_bfin_TRUE@             echo "};" \
5004 @SIM_ENABLE_ARCH_bfin_TRUE@     ) > $@.tmp
5005 @SIM_ENABLE_ARCH_bfin_TRUE@     $(AM_V_at)$(SHELL) $(srcroot)/move-if-change $@.tmp $(srcdir)/bfin/linux-fixed-code.h
5006 @SIM_ENABLE_ARCH_bfin_TRUE@     $(AM_V_at)touch $(srcdir)/bfin/linux-fixed-code.h
5007 @SIM_ENABLE_ARCH_bpf_TRUE@$(bpf_libsim_a_OBJECTS) $(bpf_libsim_a_LIBADD): bpf/hw-config.h
5008
5009 @SIM_ENABLE_ARCH_bpf_TRUE@bpf/modules.o: bpf/modules.c
5010
5011 @SIM_ENABLE_ARCH_bpf_TRUE@bpf/%.o: common/%.c ; $(SIM_COMPILE)
5012 @SIM_ENABLE_ARCH_bpf_TRUE@-@am__include@ bpf/$(DEPDIR)/*.Po
5013
5014 @SIM_ENABLE_ARCH_bpf_TRUE@bpf/modules.c: | $(bpf_BUILD_OUTPUTS)
5015
5016 @SIM_ENABLE_ARCH_bpf_TRUE@bpf/mloop-le.c bpf/eng-le.h: bpf/stamp-mloop-le ; @true
5017 @SIM_ENABLE_ARCH_bpf_TRUE@bpf/stamp-mloop-le: $(srccom)/genmloop.sh bpf/mloop.in
5018 @SIM_ENABLE_ARCH_bpf_TRUE@      $(AM_V_GEN)$(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \
5019 @SIM_ENABLE_ARCH_bpf_TRUE@              -mono -scache -prefix bpfbf_ebpfle -cpu bpfbf \
5020 @SIM_ENABLE_ARCH_bpf_TRUE@              -infile $(srcdir)/bpf/mloop.in \
5021 @SIM_ENABLE_ARCH_bpf_TRUE@              -outfile-prefix bpf/ -outfile-suffix -le
5022 @SIM_ENABLE_ARCH_bpf_TRUE@      $(AM_V_at)$(SHELL) $(srcroot)/move-if-change bpf/eng-le.hin bpf/eng-le.h
5023 @SIM_ENABLE_ARCH_bpf_TRUE@      $(AM_V_at)$(SHELL) $(srcroot)/move-if-change bpf/mloop-le.cin bpf/mloop-le.c
5024 @SIM_ENABLE_ARCH_bpf_TRUE@      $(AM_V_at)touch $@
5025
5026 @SIM_ENABLE_ARCH_bpf_TRUE@bpf/mloop-be.c bpf/eng-be.h: bpf/stamp-mloop-be ; @true
5027 @SIM_ENABLE_ARCH_bpf_TRUE@bpf/stamp-mloop-be: $(srccom)/genmloop.sh bpf/mloop.in
5028 @SIM_ENABLE_ARCH_bpf_TRUE@      $(AM_V_GEN)$(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \
5029 @SIM_ENABLE_ARCH_bpf_TRUE@              -mono -scache -prefix bpfbf_ebpfbe -cpu bpfbf \
5030 @SIM_ENABLE_ARCH_bpf_TRUE@              -infile $(srcdir)/bpf/mloop.in \
5031 @SIM_ENABLE_ARCH_bpf_TRUE@              -outfile-prefix bpf/ -outfile-suffix -be
5032 @SIM_ENABLE_ARCH_bpf_TRUE@      $(AM_V_at)$(SHELL) $(srcroot)/move-if-change bpf/eng-be.hin bpf/eng-be.h
5033 @SIM_ENABLE_ARCH_bpf_TRUE@      $(AM_V_at)$(SHELL) $(srcroot)/move-if-change bpf/mloop-be.cin bpf/mloop-be.c
5034 @SIM_ENABLE_ARCH_bpf_TRUE@      $(AM_V_at)touch $@
5035
5036 @SIM_ENABLE_ARCH_bpf_TRUE@bpf/cgen: bpf/cgen-arch bpf/cgen-cpu bpf/cgen-defs-le bpf/cgen-defs-be bpf/cgen-decode-le bpf/cgen-decode-be
5037
5038 @SIM_ENABLE_ARCH_bpf_TRUE@bpf/cgen-arch:
5039 @SIM_ENABLE_ARCH_bpf_TRUE@      $(AM_V_GEN)mach=bpf cpu=bpfbf FLAGS="with-scache"; $(CGEN_GEN_ARCH)
5040 @SIM_ENABLE_ARCH_bpf_TRUE@bpf/arch.h bpf/arch.c bpf/cpuall.h: @CGEN_MAINT@ bpf/cgen-arch
5041
5042 @SIM_ENABLE_ARCH_bpf_TRUE@bpf/cgen-cpu:
5043 @SIM_ENABLE_ARCH_bpf_TRUE@      $(AM_V_GEN)isa=ebpfle,ebpfbe cpu=bpfbf mach=bpf FLAGS="with-multiple-isa with-scache"; $(CGEN_GEN_CPU)
5044 @SIM_ENABLE_ARCH_bpf_TRUE@      $(AM_V_at)rm -f $(srcdir)/bpf/model.c
5045 @SIM_ENABLE_ARCH_bpf_TRUE@bpf/cpu.h bpf/cpu.c bpf/model.c: @CGEN_MAINT@ bpf/cgen-cpu
5046
5047 @SIM_ENABLE_ARCH_bpf_TRUE@bpf/cgen-defs-le:
5048 @SIM_ENABLE_ARCH_bpf_TRUE@      $(AM_V_GEN)isa=ebpfle cpu=bpfbf mach=bpf FLAGS="with-scache" SUFFIX="-le"; $(CGEN_GEN_DEFS)
5049 @SIM_ENABLE_ARCH_bpf_TRUE@bpf/defs-le.h: @CGEN_MAINT@ bpf/cgen-defs-le
5050
5051 @SIM_ENABLE_ARCH_bpf_TRUE@bpf/cgen-defs-be:
5052 @SIM_ENABLE_ARCH_bpf_TRUE@      $(AM_V_GEN)isa=ebpfbe cpu=bpfbf mach=bpf FLAGS="with-scache" SUFFIX="-be"; $(CGEN_GEN_DEFS)
5053 @SIM_ENABLE_ARCH_bpf_TRUE@bpf/defs-be.h: @CGEN_MAINT@ bpf/cgen-defs-be
5054
5055 @SIM_ENABLE_ARCH_bpf_TRUE@bpf/cgen-decode-le:
5056 @SIM_ENABLE_ARCH_bpf_TRUE@      $(AM_V_GEN)isa=ebpfle cpu=bpfbf mach=bpf FLAGS="with-scache" SUFFIX="-le" EXTRAFILES="$(CGEN_CPU_SEM)"; $(CGEN_GEN_DECODE)
5057 @SIM_ENABLE_ARCH_bpf_TRUE@bpf/sem-le.c bpf/decode-le.c bpf/decode-le.h: @CGEN_MAINT@ bpf/cgen-decode-vle
5058
5059 @SIM_ENABLE_ARCH_bpf_TRUE@bpf/cgen-decode-be:
5060 @SIM_ENABLE_ARCH_bpf_TRUE@      $(AM_V_GEN)isa=ebpfbe cpu=bpfbf mach=bpf FLAGS="with-scache" SUFFIX="-be" EXTRAFILES="$(CGEN_CPU_SEM)"; $(CGEN_GEN_DECODE)
5061 @SIM_ENABLE_ARCH_bpf_TRUE@bpf/sem-be.c bpf/decode-be.c bpf/decode-be.h: @CGEN_MAINT@ bpf/cgen-decode-be
5062 @SIM_ENABLE_ARCH_cr16_TRUE@$(cr16_libsim_a_OBJECTS) $(cr16_libsim_a_LIBADD): cr16/hw-config.h
5063
5064 @SIM_ENABLE_ARCH_cr16_TRUE@cr16/modules.o: cr16/modules.c
5065
5066 @SIM_ENABLE_ARCH_cr16_TRUE@cr16/%.o: common/%.c ; $(SIM_COMPILE)
5067 @SIM_ENABLE_ARCH_cr16_TRUE@-@am__include@ cr16/$(DEPDIR)/*.Po
5068
5069 @SIM_ENABLE_ARCH_cr16_TRUE@cr16/modules.c: | $(cr16_BUILD_OUTPUTS)
5070
5071 # These rules are copied from automake, but tweaked to use FOR_BUILD variables.
5072 @SIM_ENABLE_ARCH_cr16_TRUE@cr16/gencode$(EXEEXT): $(cr16_gencode_OBJECTS) $(cr16_gencode_DEPENDENCIES) cr16/$(am__dirstamp)
5073 @SIM_ENABLE_ARCH_cr16_TRUE@     $(AM_V_CCLD)$(LINK_FOR_BUILD) $(cr16_gencode_OBJECTS) $(cr16_gencode_LDADD)
5074
5075 # gencode is a build-time only tool.  Override the default rules for it.
5076 @SIM_ENABLE_ARCH_cr16_TRUE@cr16/gencode.o: cr16/gencode.c
5077 @SIM_ENABLE_ARCH_cr16_TRUE@     $(AM_V_CC)$(COMPILE_FOR_BUILD) -c $< -o $@
5078 @SIM_ENABLE_ARCH_cr16_TRUE@cr16/cr16-opc.o: ../opcodes/cr16-opc.c
5079 @SIM_ENABLE_ARCH_cr16_TRUE@     $(AM_V_CC)$(COMPILE_FOR_BUILD) -c $< -o $@
5080
5081 @SIM_ENABLE_ARCH_cr16_TRUE@cr16/simops.h: cr16/gencode$(EXEEXT)
5082 @SIM_ENABLE_ARCH_cr16_TRUE@     $(AM_V_GEN)$< -h >$@
5083
5084 @SIM_ENABLE_ARCH_cr16_TRUE@cr16/table.c: cr16/gencode$(EXEEXT)
5085 @SIM_ENABLE_ARCH_cr16_TRUE@     $(AM_V_GEN)$< >$@
5086 @SIM_ENABLE_ARCH_cris_TRUE@$(cris_libsim_a_OBJECTS) $(cris_libsim_a_LIBADD): cris/hw-config.h
5087
5088 @SIM_ENABLE_ARCH_cris_TRUE@cris/modules.o: cris/modules.c
5089
5090 @SIM_ENABLE_ARCH_cris_TRUE@cris/%.o: common/%.c ; $(SIM_COMPILE)
5091 @SIM_ENABLE_ARCH_cris_TRUE@-@am__include@ cris/$(DEPDIR)/*.Po
5092
5093 @SIM_ENABLE_ARCH_cris_TRUE@cris/modules.c: | $(cris_BUILD_OUTPUTS)
5094
5095 @SIM_ENABLE_ARCH_cris_TRUE@cris/mloopv10f.c cris/engv10.h: cris/stamp-mloop-v10f ; @true
5096 @SIM_ENABLE_ARCH_cris_TRUE@cris/stamp-mloop-v10f: $(srccom)/genmloop.sh cris/mloop.in
5097 @SIM_ENABLE_ARCH_cris_TRUE@     $(AM_V_GEN)$(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \
5098 @SIM_ENABLE_ARCH_cris_TRUE@             -mono -no-fast -pbb -switch semcrisv10f-switch.c \
5099 @SIM_ENABLE_ARCH_cris_TRUE@             -cpu crisv10f \
5100 @SIM_ENABLE_ARCH_cris_TRUE@             -infile $(srcdir)/cris/mloop.in -outfile-prefix cris/ -outfile-suffix -v10f
5101 @SIM_ENABLE_ARCH_cris_TRUE@     $(AM_V_at)$(SHELL) $(srcroot)/move-if-change cris/eng-v10f.hin cris/engv10.h
5102 @SIM_ENABLE_ARCH_cris_TRUE@     $(AM_V_at)$(SHELL) $(srcroot)/move-if-change cris/mloop-v10f.cin cris/mloopv10f.c
5103 @SIM_ENABLE_ARCH_cris_TRUE@     $(AM_V_at)touch $@
5104
5105 @SIM_ENABLE_ARCH_cris_TRUE@cris/mloopv32f.c cris/engv32.h: cris/stamp-mloop-v32f ; @true
5106 @SIM_ENABLE_ARCH_cris_TRUE@cris/stamp-mloop-v32f: $(srccom)/genmloop.sh cris/mloop.in
5107 @SIM_ENABLE_ARCH_cris_TRUE@     $(AM_V_GEN)$(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \
5108 @SIM_ENABLE_ARCH_cris_TRUE@             -mono -no-fast -pbb -switch semcrisv32f-switch.c \
5109 @SIM_ENABLE_ARCH_cris_TRUE@             -cpu crisv32f \
5110 @SIM_ENABLE_ARCH_cris_TRUE@             -infile $(srcdir)/cris/mloop.in -outfile-prefix cris/ -outfile-suffix -v32f
5111 @SIM_ENABLE_ARCH_cris_TRUE@     $(AM_V_at)$(SHELL) $(srcroot)/move-if-change cris/eng-v32f.hin cris/engv32.h
5112 @SIM_ENABLE_ARCH_cris_TRUE@     $(AM_V_at)$(SHELL) $(srcroot)/move-if-change cris/mloop-v32f.cin cris/mloopv32f.c
5113 @SIM_ENABLE_ARCH_cris_TRUE@     $(AM_V_at)touch $@
5114
5115 @SIM_ENABLE_ARCH_cris_TRUE@cris/cgen: cris/cgen-arch cris/cgen-cpu-decode-v10f cris/cgen-cpu-decode-v32f
5116
5117 @SIM_ENABLE_ARCH_cris_TRUE@cris/cgen-arch:
5118 @SIM_ENABLE_ARCH_cris_TRUE@     $(AM_V_GEN)mach=crisv10,crisv32 FLAGS="with-scache with-profile=fn"; $(CGEN_GEN_ARCH)
5119 @SIM_ENABLE_ARCH_cris_TRUE@cris/arch.h cris/arch.c cris/cpuall.h: @CGEN_MAINT@ cris/cgen-arch
5120
5121 @SIM_ENABLE_ARCH_cris_TRUE@cris/cgen-cpu-decode-v10f:
5122 @SIM_ENABLE_ARCH_cris_TRUE@     $(AM_V_GEN)cpu=crisv10f mach=crisv10 SUFFIX=v10 FLAGS="with-scache with-profile=fn" EXTRAFILES="$(CGEN_CPU_SEMSW)"; $(CGEN_GEN_CPU_DECODE)
5123 @SIM_ENABLE_ARCH_cris_TRUE@     $(AM_V_at)$(SHELL) $(srcroot)/move-if-change $(srcdir)/cris/semv10-switch.c $(srcdir)/cris/semcrisv10f-switch.c
5124 @SIM_ENABLE_ARCH_cris_TRUE@cris/cpuv10.h cris/cpuv10.c cris/semcrisv10f-switch.c cris/modelv10.c cris/decodev10.c cris/decodev10.h: @CGEN_MAINT@ cris/cgen-cpu-decode-v10f
5125
5126 @SIM_ENABLE_ARCH_cris_TRUE@cris/cgen-cpu-decode-v32f:
5127 @SIM_ENABLE_ARCH_cris_TRUE@     $(AM_V_GEN)cpu=crisv32f mach=crisv32 SUFFIX=v32 FLAGS="with-scache with-profile=fn" EXTRAFILES="$(CGEN_CPU_SEMSW)"; $(CGEN_GEN_CPU_DECODE)
5128 @SIM_ENABLE_ARCH_cris_TRUE@     $(AM_V_at)$(SHELL) $(srcroot)/move-if-change $(srcdir)/cris/semv32-switch.c $(srcdir)/cris/semcrisv32f-switch.c
5129 @SIM_ENABLE_ARCH_cris_TRUE@cris/cpuv32.h cris/cpuv32.c cris/semcrisv32f-switch.c cris/modelv32.c cris/decodev32.c cris/decodev32.h: @CGEN_MAINT@ cris/cgen-cpu-decode-v32f
5130 @SIM_ENABLE_ARCH_d10v_TRUE@$(d10v_libsim_a_OBJECTS) $(d10v_libsim_a_LIBADD): d10v/hw-config.h
5131
5132 @SIM_ENABLE_ARCH_d10v_TRUE@d10v/modules.o: d10v/modules.c
5133
5134 @SIM_ENABLE_ARCH_d10v_TRUE@d10v/%.o: common/%.c ; $(SIM_COMPILE)
5135 @SIM_ENABLE_ARCH_d10v_TRUE@-@am__include@ d10v/$(DEPDIR)/*.Po
5136
5137 @SIM_ENABLE_ARCH_d10v_TRUE@d10v/modules.c: | $(d10v_BUILD_OUTPUTS)
5138
5139 # These rules are copied from automake, but tweaked to use FOR_BUILD variables.
5140 @SIM_ENABLE_ARCH_d10v_TRUE@d10v/gencode$(EXEEXT): $(d10v_gencode_OBJECTS) $(d10v_gencode_DEPENDENCIES) d10v/$(am__dirstamp)
5141 @SIM_ENABLE_ARCH_d10v_TRUE@     $(AM_V_CCLD)$(LINK_FOR_BUILD) $(d10v_gencode_OBJECTS) $(d10v_gencode_LDADD)
5142
5143 # gencode is a build-time only tool.  Override the default rules for it.
5144 @SIM_ENABLE_ARCH_d10v_TRUE@d10v/gencode.o: d10v/gencode.c
5145 @SIM_ENABLE_ARCH_d10v_TRUE@     $(AM_V_CC)$(COMPILE_FOR_BUILD) -c $< -o $@
5146 @SIM_ENABLE_ARCH_d10v_TRUE@d10v/d10v-opc.o: ../opcodes/d10v-opc.c
5147 @SIM_ENABLE_ARCH_d10v_TRUE@     $(AM_V_CC)$(COMPILE_FOR_BUILD) -c $< -o $@
5148
5149 @SIM_ENABLE_ARCH_d10v_TRUE@d10v/simops.h: d10v/gencode$(EXEEXT)
5150 @SIM_ENABLE_ARCH_d10v_TRUE@     $(AM_V_GEN)$< -h >$@
5151
5152 @SIM_ENABLE_ARCH_d10v_TRUE@d10v/table.c: d10v/gencode$(EXEEXT)
5153 @SIM_ENABLE_ARCH_d10v_TRUE@     $(AM_V_GEN)$< >$@
5154 @SIM_ENABLE_ARCH_erc32_TRUE@$(erc32_libsim_a_OBJECTS) $(erc32_libsim_a_LIBADD): erc32/hw-config.h
5155
5156 @SIM_ENABLE_ARCH_erc32_TRUE@erc32/modules.o: erc32/modules.c
5157
5158 @SIM_ENABLE_ARCH_erc32_TRUE@erc32/%.o: common/%.c ; $(SIM_COMPILE)
5159 @SIM_ENABLE_ARCH_erc32_TRUE@-@am__include@ erc32/$(DEPDIR)/*.Po
5160
5161 @SIM_ENABLE_ARCH_erc32_TRUE@erc32/sis$(EXEEXT): erc32/run$(EXEEXT)
5162 @SIM_ENABLE_ARCH_erc32_TRUE@    $(AM_V_GEN)ln $< $@ 2>/dev/null || $(LN_S) $< $@ 2>/dev/null || cp -p $< $@
5163 @SIM_ENABLE_ARCH_erc32_TRUE@sim-%D-install-exec-local: installdirs
5164 @SIM_ENABLE_ARCH_erc32_TRUE@    $(AM_V_at)$(MKDIR_P) $(DESTDIR)$(bindir)
5165 @SIM_ENABLE_ARCH_erc32_TRUE@    n=`echo sis | sed '$(program_transform_name)'`; \
5166 @SIM_ENABLE_ARCH_erc32_TRUE@    $(LIBTOOL) --mode=install $(INSTALL_PROGRAM) erc32/run$(EXEEXT) $(DESTDIR)$(bindir)/$$n$(EXEEXT)
5167 @SIM_ENABLE_ARCH_erc32_TRUE@sim-erc32-uninstall-local:
5168 @SIM_ENABLE_ARCH_erc32_TRUE@    rm -f $(DESTDIR)$(bindir)/sis
5169 @SIM_ENABLE_ARCH_examples_TRUE@$(example_synacor_libsim_a_OBJECTS) $(example_synacor_libsim_a_LIBADD): example-synacor/hw-config.h
5170
5171 @SIM_ENABLE_ARCH_examples_TRUE@example-synacor/modules.o: example-synacor/modules.c
5172
5173 @SIM_ENABLE_ARCH_examples_TRUE@example-synacor/%.o: common/%.c ; $(SIM_COMPILE)
5174 @SIM_ENABLE_ARCH_examples_TRUE@-@am__include@ example-synacor/$(DEPDIR)/*.Po
5175 @SIM_ENABLE_ARCH_frv_TRUE@$(frv_libsim_a_OBJECTS) $(frv_libsim_a_LIBADD): frv/hw-config.h
5176
5177 @SIM_ENABLE_ARCH_frv_TRUE@frv/modules.o: frv/modules.c
5178
5179 @SIM_ENABLE_ARCH_frv_TRUE@frv/%.o: common/%.c ; $(SIM_COMPILE)
5180 @SIM_ENABLE_ARCH_frv_TRUE@-@am__include@ frv/$(DEPDIR)/*.Po
5181
5182 @SIM_ENABLE_ARCH_frv_TRUE@frv/modules.c: | $(frv_BUILD_OUTPUTS)
5183
5184 @SIM_ENABLE_ARCH_frv_TRUE@frv/mloop.c frv/eng.h: frv/stamp-mloop ; @true
5185 @SIM_ENABLE_ARCH_frv_TRUE@frv/stamp-mloop: $(srccom)/genmloop.sh frv/mloop.in
5186 @SIM_ENABLE_ARCH_frv_TRUE@      $(AM_V_GEN)$(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \
5187 @SIM_ENABLE_ARCH_frv_TRUE@              -mono -scache -parallel-generic-write -parallel-only \
5188 @SIM_ENABLE_ARCH_frv_TRUE@              -cpu frvbf \
5189 @SIM_ENABLE_ARCH_frv_TRUE@              -infile $(srcdir)/frv/mloop.in -outfile-prefix frv/
5190 @SIM_ENABLE_ARCH_frv_TRUE@      $(AM_V_at)$(SHELL) $(srcroot)/move-if-change frv/eng.hin frv/eng.h
5191 @SIM_ENABLE_ARCH_frv_TRUE@      $(AM_V_at)$(SHELL) $(srcroot)/move-if-change frv/mloop.cin frv/mloop.c
5192 @SIM_ENABLE_ARCH_frv_TRUE@      $(AM_V_at)touch $@
5193
5194 @SIM_ENABLE_ARCH_frv_TRUE@frv/cgen: frv/cgen-arch frv/cgen-cpu-decode
5195
5196 @SIM_ENABLE_ARCH_frv_TRUE@frv/cgen-arch:
5197 @SIM_ENABLE_ARCH_frv_TRUE@      $(AM_V_GEN)mach=all FLAGS="with-scache"; $(CGEN_GEN_ARCH)
5198 @SIM_ENABLE_ARCH_frv_TRUE@frv/arch.h frv/arch.c frv/cpuall.h: @CGEN_MAINT@ frv/cgen-arch
5199
5200 @SIM_ENABLE_ARCH_frv_TRUE@frv/cgen-cpu-decode:
5201 @SIM_ENABLE_ARCH_frv_TRUE@      $(AM_V_GEN)cpu=frvbf mach=frv,fr550,fr500,fr450,fr400,tomcat,simple FLAGS="with-scache with-profile=fn with-generic-write with-parallel-only" EXTRAFILES="$(CGEN_CPU_SEM)"; $(CGEN_GEN_CPU_DECODE)
5202 @SIM_ENABLE_ARCH_frv_TRUE@frv/cpu.h frv/sem.c frv/model.c frv/decode.c frv/decode.h: @CGEN_MAINT@ frv/cgen-cpu-decode
5203 @SIM_ENABLE_ARCH_ft32_TRUE@$(ft32_libsim_a_OBJECTS) $(ft32_libsim_a_LIBADD): ft32/hw-config.h
5204
5205 @SIM_ENABLE_ARCH_ft32_TRUE@ft32/modules.o: ft32/modules.c
5206
5207 @SIM_ENABLE_ARCH_ft32_TRUE@ft32/%.o: common/%.c ; $(SIM_COMPILE)
5208 @SIM_ENABLE_ARCH_ft32_TRUE@-@am__include@ ft32/$(DEPDIR)/*.Po
5209 @SIM_ENABLE_ARCH_h8300_TRUE@$(h8300_libsim_a_OBJECTS) $(h8300_libsim_a_LIBADD): h8300/hw-config.h
5210
5211 @SIM_ENABLE_ARCH_h8300_TRUE@h8300/modules.o: h8300/modules.c
5212
5213 @SIM_ENABLE_ARCH_h8300_TRUE@h8300/%.o: common/%.c ; $(SIM_COMPILE)
5214 @SIM_ENABLE_ARCH_h8300_TRUE@-@am__include@ h8300/$(DEPDIR)/*.Po
5215 @SIM_ENABLE_ARCH_iq2000_TRUE@$(iq2000_libsim_a_OBJECTS) $(iq2000_libsim_a_LIBADD): iq2000/hw-config.h
5216
5217 @SIM_ENABLE_ARCH_iq2000_TRUE@iq2000/modules.o: iq2000/modules.c
5218
5219 @SIM_ENABLE_ARCH_iq2000_TRUE@iq2000/%.o: common/%.c ; $(SIM_COMPILE)
5220 @SIM_ENABLE_ARCH_iq2000_TRUE@-@am__include@ iq2000/$(DEPDIR)/*.Po
5221
5222 @SIM_ENABLE_ARCH_iq2000_TRUE@iq2000/modules.c: | $(iq2000_BUILD_OUTPUTS)
5223
5224 @SIM_ENABLE_ARCH_iq2000_TRUE@iq2000/mloop.c iq2000/eng.h: iq2000/stamp-mloop ; @true
5225 @SIM_ENABLE_ARCH_iq2000_TRUE@iq2000/stamp-mloop: $(srccom)/genmloop.sh iq2000/mloop.in
5226 @SIM_ENABLE_ARCH_iq2000_TRUE@   $(AM_V_GEN)$(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \
5227 @SIM_ENABLE_ARCH_iq2000_TRUE@           -mono -fast -pbb -switch sem-switch.c \
5228 @SIM_ENABLE_ARCH_iq2000_TRUE@           -cpu iq2000bf \
5229 @SIM_ENABLE_ARCH_iq2000_TRUE@           -infile $(srcdir)/iq2000/mloop.in -outfile-prefix iq2000/
5230 @SIM_ENABLE_ARCH_iq2000_TRUE@   $(AM_V_at)$(SHELL) $(srcroot)/move-if-change iq2000/eng.hin iq2000/eng.h
5231 @SIM_ENABLE_ARCH_iq2000_TRUE@   $(AM_V_at)$(SHELL) $(srcroot)/move-if-change iq2000/mloop.cin iq2000/mloop.c
5232 @SIM_ENABLE_ARCH_iq2000_TRUE@   $(AM_V_at)touch $@
5233
5234 @SIM_ENABLE_ARCH_iq2000_TRUE@iq2000/cgen: iq2000/cgen-arch iq2000/cgen-cpu-decode
5235
5236 @SIM_ENABLE_ARCH_iq2000_TRUE@iq2000/cgen-arch:
5237 @SIM_ENABLE_ARCH_iq2000_TRUE@   $(AM_V_GEN)mach=iq2000 FLAGS="with-scache with-profile=fn"; $(CGEN_GEN_ARCH)
5238 @SIM_ENABLE_ARCH_iq2000_TRUE@iq2000/arch.h iq2000/arch.c iq2000/cpuall.h: @CGEN_MAINT@ iq2000/cgen-arch
5239
5240 @SIM_ENABLE_ARCH_iq2000_TRUE@iq2000/cgen-cpu-decode:
5241 @SIM_ENABLE_ARCH_iq2000_TRUE@   $(AM_V_GEN)cpu=iq2000bf mach=iq2000 FLAGS="with-scache with-profile=fn" EXTRAFILES="$(CGEN_CPU_SEM) $(CGEN_CPU_SEMSW)"; $(CGEN_GEN_CPU_DECODE)
5242 @SIM_ENABLE_ARCH_iq2000_TRUE@iq2000/cpu.h iq2000/sem.c iq2000/sem-switch.c iq2000/model.c iq2000/decode.c iq2000/decode.h: @CGEN_MAINT@ iq2000/cgen-cpu-decode
5243 @SIM_ENABLE_ARCH_lm32_TRUE@$(lm32_libsim_a_OBJECTS) $(lm32_libsim_a_LIBADD): lm32/hw-config.h
5244
5245 @SIM_ENABLE_ARCH_lm32_TRUE@lm32/modules.o: lm32/modules.c
5246
5247 @SIM_ENABLE_ARCH_lm32_TRUE@lm32/%.o: common/%.c ; $(SIM_COMPILE)
5248 @SIM_ENABLE_ARCH_lm32_TRUE@-@am__include@ lm32/$(DEPDIR)/*.Po
5249
5250 @SIM_ENABLE_ARCH_lm32_TRUE@lm32/modules.c: | $(lm32_BUILD_OUTPUTS)
5251
5252 @SIM_ENABLE_ARCH_lm32_TRUE@lm32/mloop.c lm32/eng.h: lm32/stamp-mloop ; @true
5253 @SIM_ENABLE_ARCH_lm32_TRUE@lm32/stamp-mloop: $(srccom)/genmloop.sh lm32/mloop.in
5254 @SIM_ENABLE_ARCH_lm32_TRUE@     $(AM_V_GEN)$(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \
5255 @SIM_ENABLE_ARCH_lm32_TRUE@             -mono -fast -pbb -switch sem-switch.c \
5256 @SIM_ENABLE_ARCH_lm32_TRUE@             -cpu lm32bf \
5257 @SIM_ENABLE_ARCH_lm32_TRUE@             -infile $(srcdir)/lm32/mloop.in -outfile-prefix lm32/
5258 @SIM_ENABLE_ARCH_lm32_TRUE@     $(AM_V_at)$(SHELL) $(srcroot)/move-if-change lm32/eng.hin lm32/eng.h
5259 @SIM_ENABLE_ARCH_lm32_TRUE@     $(AM_V_at)$(SHELL) $(srcroot)/move-if-change lm32/mloop.cin lm32/mloop.c
5260 @SIM_ENABLE_ARCH_lm32_TRUE@     $(AM_V_at)touch $@
5261
5262 @SIM_ENABLE_ARCH_lm32_TRUE@lm32/cgen: lm32/cgen-arch lm32/cgen-cpu-decode
5263
5264 @SIM_ENABLE_ARCH_lm32_TRUE@lm32/cgen-arch:
5265 @SIM_ENABLE_ARCH_lm32_TRUE@     $(AM_V_GEN)mach=all FLAGS="with-scache with-profile=fn"; $(CGEN_GEN_ARCH)
5266 @SIM_ENABLE_ARCH_lm32_TRUE@lm32/arch.h lm32/arch.c lm32/cpuall.h: @CGEN_MAINT@ lm32/cgen-arch
5267
5268 @SIM_ENABLE_ARCH_lm32_TRUE@lm32/cgen-cpu-decode:
5269 @SIM_ENABLE_ARCH_lm32_TRUE@     $(AM_V_GEN)cpu=lm32bf mach=lm32 FLAGS="with-scache with-profile=fn" EXTRAFILES="$(CGEN_CPU_SEM) $(CGEN_CPU_SEMSW)"; $(CGEN_GEN_CPU_DECODE)
5270 @SIM_ENABLE_ARCH_lm32_TRUE@lm32/cpu.h lm32/sem.c lm32/sem-switch.c lm32/model.c lm32/decode.c lm32/decode.h: @CGEN_MAINT@ lm32/cgen-cpu-decode
5271 @SIM_ENABLE_ARCH_m32c_TRUE@$(m32c_libsim_a_OBJECTS) $(m32c_libsim_a_LIBADD): m32c/hw-config.h
5272
5273 @SIM_ENABLE_ARCH_m32c_TRUE@m32c/modules.o: m32c/modules.c
5274
5275 @SIM_ENABLE_ARCH_m32c_TRUE@m32c/%.o: common/%.c ; $(SIM_COMPILE)
5276 @SIM_ENABLE_ARCH_m32c_TRUE@-@am__include@ m32c/$(DEPDIR)/*.Po
5277
5278 @SIM_ENABLE_ARCH_m32c_TRUE@m32c/modules.c: | $(m32c_BUILD_OUTPUTS)
5279
5280 # These rules are copied from automake, but tweaked to use FOR_BUILD variables.
5281 @SIM_ENABLE_ARCH_m32c_TRUE@m32c/opc2c$(EXEEXT): $(m32c_opc2c_OBJECTS) $(m32c_opc2c_DEPENDENCIES) m32c/$(am__dirstamp)
5282 @SIM_ENABLE_ARCH_m32c_TRUE@     $(AM_V_CCLD)$(LINK_FOR_BUILD) $(m32c_opc2c_OBJECTS) $(m32c_opc2c_LDADD)
5283
5284 # opc2c is a build-time only tool.  Override the default rules for it.
5285 @SIM_ENABLE_ARCH_m32c_TRUE@m32c/opc2c.o: m32c/opc2c.c
5286 @SIM_ENABLE_ARCH_m32c_TRUE@     $(AM_V_CC)$(COMPILE_FOR_BUILD) -c $< -o $@
5287
5288 @SIM_ENABLE_ARCH_m32c_TRUE@m32c/m32c.c: m32c/m32c.opc m32c/opc2c$(EXEEXT)
5289 @SIM_ENABLE_ARCH_m32c_TRUE@     $(AM_V_GEN)$(m32c_OPC2C_RUN) -l $@.log $< > $@.tmp
5290 @SIM_ENABLE_ARCH_m32c_TRUE@     $(AM_V_at)mv $@.tmp $@
5291
5292 @SIM_ENABLE_ARCH_m32c_TRUE@m32c/r8c.c: m32c/r8c.opc m32c/opc2c$(EXEEXT)
5293 @SIM_ENABLE_ARCH_m32c_TRUE@     $(AM_V_GEN)$(m32c_OPC2C_RUN) -l $@.log $< > $@.tmp
5294 @SIM_ENABLE_ARCH_m32c_TRUE@     $(AM_V_at)mv $@.tmp $@
5295 @SIM_ENABLE_ARCH_m32r_TRUE@$(m32r_libsim_a_OBJECTS) $(m32r_libsim_a_LIBADD): m32r/hw-config.h
5296
5297 @SIM_ENABLE_ARCH_m32r_TRUE@m32r/modules.o: m32r/modules.c
5298
5299 @SIM_ENABLE_ARCH_m32r_TRUE@m32r/%.o: common/%.c ; $(SIM_COMPILE)
5300 @SIM_ENABLE_ARCH_m32r_TRUE@-@am__include@ m32r/$(DEPDIR)/*.Po
5301
5302 @SIM_ENABLE_ARCH_m32r_TRUE@m32r/modules.c: | $(m32r_BUILD_OUTPUTS)
5303
5304 @SIM_ENABLE_ARCH_m32r_TRUE@m32r/mloop.c m32r/eng.h: m32r/stamp-mloop ; @true
5305 @SIM_ENABLE_ARCH_m32r_TRUE@m32r/stamp-mloop: $(srccom)/genmloop.sh m32r/mloop.in
5306 @SIM_ENABLE_ARCH_m32r_TRUE@     $(AM_V_GEN)$(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \
5307 @SIM_ENABLE_ARCH_m32r_TRUE@             -mono -fast -pbb -switch sem-switch.c \
5308 @SIM_ENABLE_ARCH_m32r_TRUE@             -cpu m32rbf \
5309 @SIM_ENABLE_ARCH_m32r_TRUE@             -infile $(srcdir)/m32r/mloop.in -outfile-prefix m32r/
5310 @SIM_ENABLE_ARCH_m32r_TRUE@     $(AM_V_at)$(SHELL) $(srcroot)/move-if-change m32r/eng.hin m32r/eng.h
5311 @SIM_ENABLE_ARCH_m32r_TRUE@     $(AM_V_at)$(SHELL) $(srcroot)/move-if-change m32r/mloop.cin m32r/mloop.c
5312 @SIM_ENABLE_ARCH_m32r_TRUE@     $(AM_V_at)touch $@
5313
5314 @SIM_ENABLE_ARCH_m32r_TRUE@m32r/mloopx.c m32r/engx.h: m32r/stamp-mloop-x ; @true
5315 @SIM_ENABLE_ARCH_m32r_TRUE@m32r/stamp-mloop-x: $(srccom)/genmloop.sh m32r/mloop.in
5316 @SIM_ENABLE_ARCH_m32r_TRUE@     $(AM_V_GEN)$(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \
5317 @SIM_ENABLE_ARCH_m32r_TRUE@             -mono -no-fast -pbb -parallel-write -switch semx-switch.c \
5318 @SIM_ENABLE_ARCH_m32r_TRUE@             -cpu m32rxf \
5319 @SIM_ENABLE_ARCH_m32r_TRUE@             -infile $(srcdir)/m32r/mloopx.in -outfile-prefix m32r/ -outfile-suffix x
5320 @SIM_ENABLE_ARCH_m32r_TRUE@     $(AM_V_at)$(SHELL) $(srcroot)/move-if-change m32r/engx.hin m32r/engx.h
5321 @SIM_ENABLE_ARCH_m32r_TRUE@     $(AM_V_at)$(SHELL) $(srcroot)/move-if-change m32r/mloopx.cin m32r/mloopx.c
5322 @SIM_ENABLE_ARCH_m32r_TRUE@     $(AM_V_at)touch $@
5323
5324 @SIM_ENABLE_ARCH_m32r_TRUE@m32r/mloop2.c m32r/eng2.h: m32r/stamp-mloop-2 ; @true
5325 @SIM_ENABLE_ARCH_m32r_TRUE@m32r/stamp-mloop-2: $(srccom)/genmloop.sh m32r/mloop.in
5326 @SIM_ENABLE_ARCH_m32r_TRUE@     $(AM_V_GEN)$(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \
5327 @SIM_ENABLE_ARCH_m32r_TRUE@             -mono -no-fast -pbb -parallel-write -switch sem2-switch.c \
5328 @SIM_ENABLE_ARCH_m32r_TRUE@             -cpu m32r2f \
5329 @SIM_ENABLE_ARCH_m32r_TRUE@             -infile $(srcdir)/m32r/mloop2.in -outfile-prefix m32r/ -outfile-suffix 2
5330 @SIM_ENABLE_ARCH_m32r_TRUE@     $(AM_V_at)$(SHELL) $(srcroot)/move-if-change m32r/eng2.hin m32r/eng2.h
5331 @SIM_ENABLE_ARCH_m32r_TRUE@     $(AM_V_at)$(SHELL) $(srcroot)/move-if-change m32r/mloop2.cin m32r/mloop2.c
5332 @SIM_ENABLE_ARCH_m32r_TRUE@     $(AM_V_at)touch $@
5333
5334 @SIM_ENABLE_ARCH_m32r_TRUE@m32r/cgen: m32r/cgen-arch m32r/cgen-cpu-decode m32r/cgen-cpu-decode-x m32r/cgen-cpu-decode-2
5335
5336 @SIM_ENABLE_ARCH_m32r_TRUE@m32r/cgen-arch:
5337 @SIM_ENABLE_ARCH_m32r_TRUE@     $(AM_V_GEN)mach=all FLAGS="with-scache with-profile=fn"; $(CGEN_GEN_ARCH)
5338 @SIM_ENABLE_ARCH_m32r_TRUE@m32r/arch.h m32r/arch.c m32r/cpuall.h: @CGEN_MAINT@ m32r/cgen-arch
5339
5340 @SIM_ENABLE_ARCH_m32r_TRUE@m32r/cgen-cpu-decode:
5341 @SIM_ENABLE_ARCH_m32r_TRUE@     $(AM_V_GEN)cpu=m32rbf mach=m32r FLAGS="with-scache with-profile=fn" EXTRAFILES="$(CGEN_CPU_SEM) $(CGEN_CPU_SEMSW)"; $(CGEN_GEN_CPU_DECODE)
5342 @SIM_ENABLE_ARCH_m32r_TRUE@m32r/cpu.h m32r/sem.c m32r/sem-switch.c m32r/model.c m32r/decode.c m32r/decode.h: @CGEN_MAINT@ m32r/cgen-cpu-decode
5343
5344 @SIM_ENABLE_ARCH_m32r_TRUE@m32r/cgen-cpu-decode-x:
5345 @SIM_ENABLE_ARCH_m32r_TRUE@     $(AM_V_GEN)cpu=m32rxf mach=m32rx SUFFIX=x FLAGS="with-scache with-profile=fn" EXTRAFILES="$(CGEN_CPU_SEMSW)"; $(CGEN_GEN_CPU_DECODE)
5346 @SIM_ENABLE_ARCH_m32r_TRUE@m32r/cpux.h m32r/semx-switch.c m32r/modelx.c m32r/decodex.c m32r/decodex.h: @CGEN_MAINT@ m32r/cgen-cpu-decode-x
5347
5348 @SIM_ENABLE_ARCH_m32r_TRUE@m32r/cgen-cpu-decode-2:
5349 @SIM_ENABLE_ARCH_m32r_TRUE@     $(AM_V_GEN)cpu=m32r2f mach=m32r2 SUFFIX=2 FLAGS="with-scache with-profile=fn" EXTRAFILES="$(CGEN_CPU_SEMSW)"; $(CGEN_GEN_CPU_DECODE)
5350 @SIM_ENABLE_ARCH_m32r_TRUE@m32r/cpu2.h m32r/sem2-switch.c m32r/model2.c m32r/decode2.c m32r/decode2.h: @CGEN_MAINT@ m32r/cgen-cpu-decode-2
5351 @SIM_ENABLE_ARCH_m68hc11_TRUE@$(m68hc11_libsim_a_OBJECTS) $(m68hc11_libsim_a_LIBADD): m68hc11/hw-config.h
5352
5353 @SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11/modules.o: m68hc11/modules.c
5354
5355 @SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11/%.o: common/%.c ; $(SIM_COMPILE)
5356 @SIM_ENABLE_ARCH_m68hc11_TRUE@-@am__include@ m68hc11/$(DEPDIR)/*.Po
5357
5358 @SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11/modules.c: | $(m68hc11_BUILD_OUTPUTS)
5359
5360 # These rules are copied from automake, but tweaked to use FOR_BUILD variables.
5361 @SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11/gencode$(EXEEXT): $(m68hc11_gencode_OBJECTS) $(m68hc11_gencode_DEPENDENCIES) m68hc11/$(am__dirstamp)
5362 @SIM_ENABLE_ARCH_m68hc11_TRUE@  $(AM_V_CCLD)$(LINK_FOR_BUILD) $(m68hc11_gencode_OBJECTS) $(m68hc11_gencode_LDADD)
5363
5364 # gencode is a build-time only tool.  Override the default rules for it.
5365 @SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11/gencode.o: m68hc11/gencode.c
5366 @SIM_ENABLE_ARCH_m68hc11_TRUE@  $(AM_V_CC)$(COMPILE_FOR_BUILD) -c $< -o $@
5367
5368 @SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11/m68hc11int.c: m68hc11/gencode$(EXEEXT)
5369 @SIM_ENABLE_ARCH_m68hc11_TRUE@  $(AM_V_GEN)$< -m6811 >$@
5370
5371 @SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11/m68hc12int.c: m68hc11/gencode$(EXEEXT)
5372 @SIM_ENABLE_ARCH_m68hc11_TRUE@  $(AM_V_GEN)$< -m6812 >$@
5373 @SIM_ENABLE_ARCH_mcore_TRUE@$(mcore_libsim_a_OBJECTS) $(mcore_libsim_a_LIBADD): mcore/hw-config.h
5374
5375 @SIM_ENABLE_ARCH_mcore_TRUE@mcore/modules.o: mcore/modules.c
5376
5377 @SIM_ENABLE_ARCH_mcore_TRUE@mcore/%.o: common/%.c ; $(SIM_COMPILE)
5378 @SIM_ENABLE_ARCH_mcore_TRUE@-@am__include@ mcore/$(DEPDIR)/*.Po
5379 @SIM_ENABLE_ARCH_microblaze_TRUE@$(microblaze_libsim_a_OBJECTS) $(microblaze_libsim_a_LIBADD): microblaze/hw-config.h
5380
5381 @SIM_ENABLE_ARCH_microblaze_TRUE@microblaze/modules.o: microblaze/modules.c
5382
5383 @SIM_ENABLE_ARCH_microblaze_TRUE@microblaze/%.o: common/%.c ; $(SIM_COMPILE)
5384 @SIM_ENABLE_ARCH_microblaze_TRUE@-@am__include@ microblaze/$(DEPDIR)/*.Po
5385 @SIM_ENABLE_ARCH_mips_TRUE@$(mips_libsim_a_OBJECTS) $(mips_libsim_a_LIBADD): mips/hw-config.h
5386
5387 @SIM_ENABLE_ARCH_mips_TRUE@mips/modules.o: mips/modules.c
5388
5389 @SIM_ENABLE_ARCH_mips_TRUE@mips/%.o: common/%.c ; $(SIM_COMPILE)
5390 @SIM_ENABLE_ARCH_mips_TRUE@-@am__include@ mips/$(DEPDIR)/*.Po
5391
5392 @SIM_ENABLE_ARCH_mips_TRUE@mips/modules.c: | $(mips_BUILD_OUTPUTS)
5393
5394 @SIM_ENABLE_ARCH_mips_TRUE@$(mips_BUILT_SRC_FROM_IGEN_ITABLE): mips/stamp-igen-itable
5395 @SIM_ENABLE_ARCH_mips_TRUE@$(mips_BUILT_SRC_FROM_GEN_MODE_SINGLE): mips/stamp-gen-mode-single
5396 @SIM_ENABLE_ARCH_mips_TRUE@$(mips_BUILT_SRC_FROM_GEN_MODE_M16_M16): mips/stamp-gen-mode-m16-m16
5397 @SIM_ENABLE_ARCH_mips_TRUE@$(mips_BUILT_SRC_FROM_GEN_MODE_M16_M32): mips/stamp-gen-mode-m16-m32
5398 @SIM_ENABLE_ARCH_mips_TRUE@$(SIM_MIPS_MULTI_SRC): mips/stamp-gen-mode-multi-igen mips/stamp-gen-mode-multi-run
5399
5400 @SIM_ENABLE_ARCH_mips_TRUE@mips/stamp-igen-itable: $(mips_IGEN_INSN) $(mips_IGEN_INSN_INC) $(IGEN)
5401 @SIM_ENABLE_ARCH_mips_TRUE@     $(AM_V_GEN)$(IGEN_RUN) \
5402 @SIM_ENABLE_ARCH_mips_TRUE@             $(mips_IGEN_TRACE) \
5403 @SIM_ENABLE_ARCH_mips_TRUE@             -I $(srcdir)/mips \
5404 @SIM_ENABLE_ARCH_mips_TRUE@             -Werror \
5405 @SIM_ENABLE_ARCH_mips_TRUE@             -Wnodiscard \
5406 @SIM_ENABLE_ARCH_mips_TRUE@             -Wnowidth \
5407 @SIM_ENABLE_ARCH_mips_TRUE@             -Wnounimplemented \
5408 @SIM_ENABLE_ARCH_mips_TRUE@             $(SIM_MIPS_IGEN_ITABLE_FLAGS) \
5409 @SIM_ENABLE_ARCH_mips_TRUE@             -G gen-direct-access \
5410 @SIM_ENABLE_ARCH_mips_TRUE@             -G gen-zero-r0 \
5411 @SIM_ENABLE_ARCH_mips_TRUE@             -i $(mips_IGEN_INSN) \
5412 @SIM_ENABLE_ARCH_mips_TRUE@             -n itable.h    -ht mips/itable.h \
5413 @SIM_ENABLE_ARCH_mips_TRUE@             -n itable.c    -t  mips/itable.c
5414 @SIM_ENABLE_ARCH_mips_TRUE@     $(AM_V_at)touch $@
5415
5416 @SIM_ENABLE_ARCH_mips_TRUE@mips/stamp-gen-mode-single: $(mips_IGEN_INSN) $(mips_IGEN_INSN_INC) $(mips_IGEN_DC) $(IGEN)
5417 @SIM_ENABLE_ARCH_mips_TRUE@     $(AM_V_GEN)$(IGEN_RUN) \
5418 @SIM_ENABLE_ARCH_mips_TRUE@             $(mips_IGEN_TRACE) \
5419 @SIM_ENABLE_ARCH_mips_TRUE@             -I $(srcdir)/mips \
5420 @SIM_ENABLE_ARCH_mips_TRUE@             -Werror \
5421 @SIM_ENABLE_ARCH_mips_TRUE@             -Wnodiscard \
5422 @SIM_ENABLE_ARCH_mips_TRUE@             $(SIM_MIPS_SINGLE_FLAGS) \
5423 @SIM_ENABLE_ARCH_mips_TRUE@             -G gen-direct-access \
5424 @SIM_ENABLE_ARCH_mips_TRUE@             -G gen-zero-r0 \
5425 @SIM_ENABLE_ARCH_mips_TRUE@             -B 32 \
5426 @SIM_ENABLE_ARCH_mips_TRUE@             -H 31 \
5427 @SIM_ENABLE_ARCH_mips_TRUE@             -i $(mips_IGEN_INSN) \
5428 @SIM_ENABLE_ARCH_mips_TRUE@             -o $(mips_IGEN_DC) \
5429 @SIM_ENABLE_ARCH_mips_TRUE@             -x \
5430 @SIM_ENABLE_ARCH_mips_TRUE@             -n icache.h    -hc mips/icache.h \
5431 @SIM_ENABLE_ARCH_mips_TRUE@             -n icache.c    -c  mips/icache.c \
5432 @SIM_ENABLE_ARCH_mips_TRUE@             -n semantics.h -hs mips/semantics.h \
5433 @SIM_ENABLE_ARCH_mips_TRUE@             -n semantics.c -s  mips/semantics.c \
5434 @SIM_ENABLE_ARCH_mips_TRUE@             -n idecode.h   -hd mips/idecode.h \
5435 @SIM_ENABLE_ARCH_mips_TRUE@             -n idecode.c   -d  mips/idecode.c \
5436 @SIM_ENABLE_ARCH_mips_TRUE@             -n model.h     -hm mips/model.h \
5437 @SIM_ENABLE_ARCH_mips_TRUE@             -n model.c     -m  mips/model.c \
5438 @SIM_ENABLE_ARCH_mips_TRUE@             -n support.h   -hf mips/support.h \
5439 @SIM_ENABLE_ARCH_mips_TRUE@             -n support.c   -f  mips/support.c \
5440 @SIM_ENABLE_ARCH_mips_TRUE@             -n engine.h    -he mips/engine.h \
5441 @SIM_ENABLE_ARCH_mips_TRUE@             -n engine.c    -e  mips/engine.c \
5442 @SIM_ENABLE_ARCH_mips_TRUE@             -n irun.c      -r  mips/irun.c
5443 @SIM_ENABLE_ARCH_mips_TRUE@     $(AM_V_at)touch $@
5444
5445 @SIM_ENABLE_ARCH_mips_TRUE@mips/stamp-gen-mode-m16-m16: $(mips_IGEN_INSN) $(mips_IGEN_INSN_INC) $(mips_M16_DC) $(IGEN)
5446 @SIM_ENABLE_ARCH_mips_TRUE@     $(AM_V_GEN)$(IGEN_RUN) \
5447 @SIM_ENABLE_ARCH_mips_TRUE@             $(mips_IGEN_TRACE) \
5448 @SIM_ENABLE_ARCH_mips_TRUE@             -I $(srcdir)/mips \
5449 @SIM_ENABLE_ARCH_mips_TRUE@             -Werror \
5450 @SIM_ENABLE_ARCH_mips_TRUE@             -Wnodiscard \
5451 @SIM_ENABLE_ARCH_mips_TRUE@             $(SIM_MIPS_M16_FLAGS) \
5452 @SIM_ENABLE_ARCH_mips_TRUE@             -G gen-direct-access \
5453 @SIM_ENABLE_ARCH_mips_TRUE@             -G gen-zero-r0 \
5454 @SIM_ENABLE_ARCH_mips_TRUE@             -B 16 \
5455 @SIM_ENABLE_ARCH_mips_TRUE@             -H 15 \
5456 @SIM_ENABLE_ARCH_mips_TRUE@             -i $(mips_IGEN_INSN) \
5457 @SIM_ENABLE_ARCH_mips_TRUE@             -o $(mips_M16_DC) \
5458 @SIM_ENABLE_ARCH_mips_TRUE@             -P m16_ \
5459 @SIM_ENABLE_ARCH_mips_TRUE@             -x \
5460 @SIM_ENABLE_ARCH_mips_TRUE@             -n m16_icache.h    -hc mips/m16_icache.h \
5461 @SIM_ENABLE_ARCH_mips_TRUE@             -n m16_icache.c    -c  mips/m16_icache.c \
5462 @SIM_ENABLE_ARCH_mips_TRUE@             -n m16_semantics.h -hs mips/m16_semantics.h \
5463 @SIM_ENABLE_ARCH_mips_TRUE@             -n m16_semantics.c -s  mips/m16_semantics.c \
5464 @SIM_ENABLE_ARCH_mips_TRUE@             -n m16_idecode.h   -hd mips/m16_idecode.h \
5465 @SIM_ENABLE_ARCH_mips_TRUE@             -n m16_idecode.c   -d  mips/m16_idecode.c \
5466 @SIM_ENABLE_ARCH_mips_TRUE@             -n m16_model.h     -hm mips/m16_model.h \
5467 @SIM_ENABLE_ARCH_mips_TRUE@             -n m16_model.c     -m  mips/m16_model.c \
5468 @SIM_ENABLE_ARCH_mips_TRUE@             -n m16_support.h   -hf mips/m16_support.h \
5469 @SIM_ENABLE_ARCH_mips_TRUE@             -n m16_support.c   -f  mips/m16_support.c
5470 @SIM_ENABLE_ARCH_mips_TRUE@     $(AM_V_at)touch $@
5471
5472 @SIM_ENABLE_ARCH_mips_TRUE@mips/stamp-gen-mode-m16-m32: $(mips_IGEN_INSN) $(mips_IGEN_INSN_INC) $(mips_IGEN_DC) $(IGEN)
5473 @SIM_ENABLE_ARCH_mips_TRUE@     $(AM_V_GEN)$(IGEN_RUN) \
5474 @SIM_ENABLE_ARCH_mips_TRUE@             $(mips_IGEN_TRACE) \
5475 @SIM_ENABLE_ARCH_mips_TRUE@             -I $(srcdir)/mips \
5476 @SIM_ENABLE_ARCH_mips_TRUE@             -Werror \
5477 @SIM_ENABLE_ARCH_mips_TRUE@             -Wnodiscard \
5478 @SIM_ENABLE_ARCH_mips_TRUE@             $(SIM_MIPS_SINGLE_FLAGS) \
5479 @SIM_ENABLE_ARCH_mips_TRUE@             -G gen-direct-access \
5480 @SIM_ENABLE_ARCH_mips_TRUE@             -G gen-zero-r0 \
5481 @SIM_ENABLE_ARCH_mips_TRUE@             -B 32 \
5482 @SIM_ENABLE_ARCH_mips_TRUE@             -H 31 \
5483 @SIM_ENABLE_ARCH_mips_TRUE@             -i $(mips_IGEN_INSN) \
5484 @SIM_ENABLE_ARCH_mips_TRUE@             -o $(mips_IGEN_DC) \
5485 @SIM_ENABLE_ARCH_mips_TRUE@             -P m32_ \
5486 @SIM_ENABLE_ARCH_mips_TRUE@             -x \
5487 @SIM_ENABLE_ARCH_mips_TRUE@             -n m32_icache.h    -hc mips/m32_icache.h \
5488 @SIM_ENABLE_ARCH_mips_TRUE@             -n m32_icache.c    -c  mips/m32_icache.c \
5489 @SIM_ENABLE_ARCH_mips_TRUE@             -n m32_semantics.h -hs mips/m32_semantics.h \
5490 @SIM_ENABLE_ARCH_mips_TRUE@             -n m32_semantics.c -s  mips/m32_semantics.c \
5491 @SIM_ENABLE_ARCH_mips_TRUE@             -n m32_idecode.h   -hd mips/m32_idecode.h \
5492 @SIM_ENABLE_ARCH_mips_TRUE@             -n m32_idecode.c   -d  mips/m32_idecode.c \
5493 @SIM_ENABLE_ARCH_mips_TRUE@             -n m32_model.h     -hm mips/m32_model.h \
5494 @SIM_ENABLE_ARCH_mips_TRUE@             -n m32_model.c     -m  mips/m32_model.c \
5495 @SIM_ENABLE_ARCH_mips_TRUE@             -n m32_support.h   -hf mips/m32_support.h \
5496 @SIM_ENABLE_ARCH_mips_TRUE@             -n m32_support.c   -f  mips/m32_support.c
5497 @SIM_ENABLE_ARCH_mips_TRUE@     $(AM_V_at)touch $@
5498
5499 @SIM_ENABLE_ARCH_mips_TRUE@mips/stamp-gen-mode-multi-igen: $(mips_IGEN_INSN) $(mips_IGEN_INSN_INC) $(mips_IGEN_DC) $(mips_M16_DC) $(mips_MICROMIPS32_DC) $(mips_MICROMIPS16_DC) $(IGEN)
5500 @SIM_ENABLE_ARCH_mips_TRUE@     $(AM_V_GEN)\
5501 @SIM_ENABLE_ARCH_mips_TRUE@     for t in $(SIM_MIPS_MULTI_IGEN_CONFIGS); do \
5502 @SIM_ENABLE_ARCH_mips_TRUE@       p=`echo $${t} | sed -e 's/:.*//'` ; \
5503 @SIM_ENABLE_ARCH_mips_TRUE@       m=`echo $${t} | sed -e 's/.*:\(.*\):.*/\1/'` ; \
5504 @SIM_ENABLE_ARCH_mips_TRUE@       f=`echo $${t} | sed -e 's/.*://'` ; \
5505 @SIM_ENABLE_ARCH_mips_TRUE@       case $${p} in \
5506 @SIM_ENABLE_ARCH_mips_TRUE@         micromips16*) \
5507 @SIM_ENABLE_ARCH_mips_TRUE@           e="-B 16 -H 15 -o $(mips_MICROMIPS16_DC) -F 16" ;; \
5508 @SIM_ENABLE_ARCH_mips_TRUE@         micromips32* | micromips64*) \
5509 @SIM_ENABLE_ARCH_mips_TRUE@           e="-B 32 -H 31 -o $(mips_MICROMIPS32_DC) -F $${f}" ;; \
5510 @SIM_ENABLE_ARCH_mips_TRUE@         micromips_m32*) \
5511 @SIM_ENABLE_ARCH_mips_TRUE@           e="-B 32 -H 31 -o $(mips_IGEN_DC) -F $${f}"; \
5512 @SIM_ENABLE_ARCH_mips_TRUE@           m="mips32r2,mips3d,mdmx,dsp,dsp2,smartmips" ;; \
5513 @SIM_ENABLE_ARCH_mips_TRUE@         micromips_m64*) \
5514 @SIM_ENABLE_ARCH_mips_TRUE@           e="-B 32 -H 31 -o $(mips_IGEN_DC) -F $${f}"; \
5515 @SIM_ENABLE_ARCH_mips_TRUE@           m="mips64r2,mips3d,mdmx,dsp,dsp2,smartmips" ;; \
5516 @SIM_ENABLE_ARCH_mips_TRUE@         m16*) \
5517 @SIM_ENABLE_ARCH_mips_TRUE@           e="-B 16 -H 15 -o $(mips_M16_DC) -F 16" ;; \
5518 @SIM_ENABLE_ARCH_mips_TRUE@         *) \
5519 @SIM_ENABLE_ARCH_mips_TRUE@           e="-B 32 -H 31 -o $(mips_IGEN_DC) -F $${f}" ;; \
5520 @SIM_ENABLE_ARCH_mips_TRUE@       esac; \
5521 @SIM_ENABLE_ARCH_mips_TRUE@       $(IGEN_RUN) \
5522 @SIM_ENABLE_ARCH_mips_TRUE@             $(mips_IGEN_TRACE) \
5523 @SIM_ENABLE_ARCH_mips_TRUE@             $${e} \
5524 @SIM_ENABLE_ARCH_mips_TRUE@             -I $(srcdir)/mips \
5525 @SIM_ENABLE_ARCH_mips_TRUE@             -Werror \
5526 @SIM_ENABLE_ARCH_mips_TRUE@             -Wnodiscard \
5527 @SIM_ENABLE_ARCH_mips_TRUE@             -M $${m} \
5528 @SIM_ENABLE_ARCH_mips_TRUE@             -G gen-direct-access \
5529 @SIM_ENABLE_ARCH_mips_TRUE@             -G gen-zero-r0 \
5530 @SIM_ENABLE_ARCH_mips_TRUE@             -i $(mips_IGEN_INSN) \
5531 @SIM_ENABLE_ARCH_mips_TRUE@             -P $${p}_ \
5532 @SIM_ENABLE_ARCH_mips_TRUE@             -x \
5533 @SIM_ENABLE_ARCH_mips_TRUE@             -n $${p}_icache.h    -hc mips/$${p}_icache.h \
5534 @SIM_ENABLE_ARCH_mips_TRUE@             -n $${p}_icache.c    -c  mips/$${p}_icache.c \
5535 @SIM_ENABLE_ARCH_mips_TRUE@             -n $${p}_semantics.h -hs mips/$${p}_semantics.h \
5536 @SIM_ENABLE_ARCH_mips_TRUE@             -n $${p}_semantics.c -s  mips/$${p}_semantics.c \
5537 @SIM_ENABLE_ARCH_mips_TRUE@             -n $${p}_idecode.h   -hd mips/$${p}_idecode.h \
5538 @SIM_ENABLE_ARCH_mips_TRUE@             -n $${p}_idecode.c   -d  mips/$${p}_idecode.c \
5539 @SIM_ENABLE_ARCH_mips_TRUE@             -n $${p}_model.h     -hm mips/$${p}_model.h \
5540 @SIM_ENABLE_ARCH_mips_TRUE@             -n $${p}_model.c     -m  mips/$${p}_model.c \
5541 @SIM_ENABLE_ARCH_mips_TRUE@             -n $${p}_support.h   -hf mips/$${p}_support.h \
5542 @SIM_ENABLE_ARCH_mips_TRUE@             -n $${p}_support.c   -f  mips/$${p}_support.c \
5543 @SIM_ENABLE_ARCH_mips_TRUE@             -n $${p}_engine.h    -he mips/$${p}_engine.h \
5544 @SIM_ENABLE_ARCH_mips_TRUE@             -n $${p}_engine.c    -e  mips/$${p}_engine.c \
5545 @SIM_ENABLE_ARCH_mips_TRUE@         || exit; \
5546 @SIM_ENABLE_ARCH_mips_TRUE@     done
5547 @SIM_ENABLE_ARCH_mips_TRUE@     $(AM_V_at)touch $@
5548
5549 @SIM_ENABLE_ARCH_mips_TRUE@mips/stamp-gen-mode-multi-run: mips/m16run.c mips/micromipsrun.c
5550 @SIM_ENABLE_ARCH_mips_TRUE@     $(AM_V_GEN)\
5551 @SIM_ENABLE_ARCH_mips_TRUE@     for t in $(SIM_MIPS_MULTI_IGEN_CONFIGS); do \
5552 @SIM_ENABLE_ARCH_mips_TRUE@       case $${t} in \
5553 @SIM_ENABLE_ARCH_mips_TRUE@         m16*) \
5554 @SIM_ENABLE_ARCH_mips_TRUE@           m=`echo $${t} | sed -e 's/^m16//' -e 's/:.*//'`; \
5555 @SIM_ENABLE_ARCH_mips_TRUE@           o=mips/m16$${m}_run.c; \
5556 @SIM_ENABLE_ARCH_mips_TRUE@           sed < $(srcdir)/mips/m16run.c > $$o.tmp \
5557 @SIM_ENABLE_ARCH_mips_TRUE@                 -e "s/^sim_/m16$${m}_/" \
5558 @SIM_ENABLE_ARCH_mips_TRUE@                 -e "/include/s/sim-engine/m16$${m}_engine/" \
5559 @SIM_ENABLE_ARCH_mips_TRUE@                 -e "s/m16_/m16$${m}_/" \
5560 @SIM_ENABLE_ARCH_mips_TRUE@                 -e "s/m32_/m32$${m}_/" \
5561 @SIM_ENABLE_ARCH_mips_TRUE@                 || exit 1; \
5562 @SIM_ENABLE_ARCH_mips_TRUE@           $(SHELL) $(srcroot)/move-if-change $$o.tmp $$o; \
5563 @SIM_ENABLE_ARCH_mips_TRUE@           ;;\
5564 @SIM_ENABLE_ARCH_mips_TRUE@         micromips32*) \
5565 @SIM_ENABLE_ARCH_mips_TRUE@           m=`echo $${t} | sed -e 's/^micromips32//' -e 's/:.*//'`; \
5566 @SIM_ENABLE_ARCH_mips_TRUE@           o=mips/micromips$${m}_run.c; \
5567 @SIM_ENABLE_ARCH_mips_TRUE@           sed < $(srcdir)/mips/micromipsrun.c > $$o.tmp \
5568 @SIM_ENABLE_ARCH_mips_TRUE@                 -e "s/^sim_/micromips32$${m}_/" \
5569 @SIM_ENABLE_ARCH_mips_TRUE@                 -e "/include/s/sim-engine/micromips32$${m}_engine/" \
5570 @SIM_ENABLE_ARCH_mips_TRUE@                 -e "s/micromips16_/micromips16$${m}_/" \
5571 @SIM_ENABLE_ARCH_mips_TRUE@                 -e "s/micromips32_/micromips32$${m}_/" \
5572 @SIM_ENABLE_ARCH_mips_TRUE@                 -e "s/m32_/m32$${m}_/" \
5573 @SIM_ENABLE_ARCH_mips_TRUE@                 || exit 1; \
5574 @SIM_ENABLE_ARCH_mips_TRUE@           $(SHELL) $(srcroot)/move-if-change $$o.tmp $$o; \
5575 @SIM_ENABLE_ARCH_mips_TRUE@           ;;\
5576 @SIM_ENABLE_ARCH_mips_TRUE@         micromips64*) \
5577 @SIM_ENABLE_ARCH_mips_TRUE@           m=`echo $${t} | sed -e 's/^micromips64//' -e 's/:.*//'`; \
5578 @SIM_ENABLE_ARCH_mips_TRUE@           o=mips/micromips$${m}_run.c; \
5579 @SIM_ENABLE_ARCH_mips_TRUE@           sed < $(srcdir)/mips/micromipsrun.c > $$o.tmp \
5580 @SIM_ENABLE_ARCH_mips_TRUE@                 -e "s/^sim_/micromips64$${m}_/" \
5581 @SIM_ENABLE_ARCH_mips_TRUE@                 -e "/include/s/sim-engine/micromips64$${m}_engine/" \
5582 @SIM_ENABLE_ARCH_mips_TRUE@                 -e "s/micromips16_/micromips16$${m}_/" \
5583 @SIM_ENABLE_ARCH_mips_TRUE@                 -e "s/micromips32_/micromips64$${m}_/" \
5584 @SIM_ENABLE_ARCH_mips_TRUE@                 -e "s/m32_/m64$${m}_/" \
5585 @SIM_ENABLE_ARCH_mips_TRUE@                 || exit 1; \
5586 @SIM_ENABLE_ARCH_mips_TRUE@           $(SHELL) $(srcroot)/move-if-change $$o.tmp $$o; \
5587 @SIM_ENABLE_ARCH_mips_TRUE@           ;;\
5588 @SIM_ENABLE_ARCH_mips_TRUE@       esac \
5589 @SIM_ENABLE_ARCH_mips_TRUE@     done
5590 @SIM_ENABLE_ARCH_mips_TRUE@     $(AM_V_at)touch $@
5591 @SIM_ENABLE_ARCH_mn10300_TRUE@$(mn10300_libsim_a_OBJECTS) $(mn10300_libsim_a_LIBADD): mn10300/hw-config.h
5592
5593 @SIM_ENABLE_ARCH_mn10300_TRUE@mn10300/modules.o: mn10300/modules.c
5594
5595 @SIM_ENABLE_ARCH_mn10300_TRUE@mn10300/%.o: common/%.c ; $(SIM_COMPILE)
5596 @SIM_ENABLE_ARCH_mn10300_TRUE@-@am__include@ mn10300/$(DEPDIR)/*.Po
5597
5598 @SIM_ENABLE_ARCH_mn10300_TRUE@mn10300/modules.c: | $(mn10300_BUILD_OUTPUTS)
5599
5600 @SIM_ENABLE_ARCH_mn10300_TRUE@$(mn10300_BUILT_SRC_FROM_IGEN): mn10300/stamp-igen
5601 @SIM_ENABLE_ARCH_mn10300_TRUE@mn10300/stamp-igen: $(mn10300_IGEN_INSN) $(mn10300_IGEN_INSN_INC) $(mn10300_IGEN_DC) $(IGEN)
5602 @SIM_ENABLE_ARCH_mn10300_TRUE@  $(AM_V_GEN)$(IGEN_RUN) \
5603 @SIM_ENABLE_ARCH_mn10300_TRUE@          $(mn10300_IGEN_TRACE) \
5604 @SIM_ENABLE_ARCH_mn10300_TRUE@          -G gen-direct-access \
5605 @SIM_ENABLE_ARCH_mn10300_TRUE@          -M mn10300,am33 -G gen-multi-sim=am33 \
5606 @SIM_ENABLE_ARCH_mn10300_TRUE@          -M am33_2 \
5607 @SIM_ENABLE_ARCH_mn10300_TRUE@          -I $(srcdir)/mn10300 \
5608 @SIM_ENABLE_ARCH_mn10300_TRUE@          -i $(mn10300_IGEN_INSN) \
5609 @SIM_ENABLE_ARCH_mn10300_TRUE@          -o $(mn10300_IGEN_DC) \
5610 @SIM_ENABLE_ARCH_mn10300_TRUE@          -x \
5611 @SIM_ENABLE_ARCH_mn10300_TRUE@          -n icache.h    -hc mn10300/icache.h \
5612 @SIM_ENABLE_ARCH_mn10300_TRUE@          -n icache.c    -c  mn10300/icache.c \
5613 @SIM_ENABLE_ARCH_mn10300_TRUE@          -n semantics.h -hs mn10300/semantics.h \
5614 @SIM_ENABLE_ARCH_mn10300_TRUE@          -n semantics.c -s  mn10300/semantics.c \
5615 @SIM_ENABLE_ARCH_mn10300_TRUE@          -n idecode.h   -hd mn10300/idecode.h \
5616 @SIM_ENABLE_ARCH_mn10300_TRUE@          -n idecode.c   -d  mn10300/idecode.c \
5617 @SIM_ENABLE_ARCH_mn10300_TRUE@          -n model.h     -hm mn10300/model.h \
5618 @SIM_ENABLE_ARCH_mn10300_TRUE@          -n model.c     -m  mn10300/model.c \
5619 @SIM_ENABLE_ARCH_mn10300_TRUE@          -n support.h   -hf mn10300/support.h \
5620 @SIM_ENABLE_ARCH_mn10300_TRUE@          -n support.c   -f  mn10300/support.c \
5621 @SIM_ENABLE_ARCH_mn10300_TRUE@          -n itable.h    -ht mn10300/itable.h \
5622 @SIM_ENABLE_ARCH_mn10300_TRUE@          -n itable.c    -t  mn10300/itable.c \
5623 @SIM_ENABLE_ARCH_mn10300_TRUE@          -n engine.h    -he mn10300/engine.h \
5624 @SIM_ENABLE_ARCH_mn10300_TRUE@          -n engine.c    -e  mn10300/engine.c \
5625 @SIM_ENABLE_ARCH_mn10300_TRUE@          -n irun.c      -r  mn10300/irun.c
5626 @SIM_ENABLE_ARCH_mn10300_TRUE@  $(AM_V_at)touch $@
5627 @SIM_ENABLE_ARCH_moxie_TRUE@$(moxie_libsim_a_OBJECTS) $(moxie_libsim_a_LIBADD): moxie/hw-config.h
5628
5629 @SIM_ENABLE_ARCH_moxie_TRUE@moxie/modules.o: moxie/modules.c
5630
5631 @SIM_ENABLE_ARCH_moxie_TRUE@moxie/%.o: common/%.c ; $(SIM_COMPILE)
5632 @SIM_ENABLE_ARCH_moxie_TRUE@-@am__include@ moxie/$(DEPDIR)/*.Po
5633
5634 @SIM_ENABLE_ARCH_moxie_TRUE@moxie/moxie-gdb.dtb: @MAINT@ moxie/moxie-gdb.dts moxie/$(am__dirstamp)
5635 @SIM_ENABLE_ARCH_moxie_TRUE@    $(AM_V_GEN) \
5636 @SIM_ENABLE_ARCH_moxie_TRUE@    if test "x$(DTC)" != x; then \
5637 @SIM_ENABLE_ARCH_moxie_TRUE@      $(DTC) -O dtb -o $@.tmp ${srcdir}/moxie/moxie-gdb.dts || exit 1; \
5638 @SIM_ENABLE_ARCH_moxie_TRUE@      $(SHELL) $(srcroot)/move-if-change $@.tmp ${srcdir}/moxie/moxie-gdb.dtb || exit 1; \
5639 @SIM_ENABLE_ARCH_moxie_TRUE@      touch ${srcdir}/moxie/moxie-gdb.dtb; \
5640 @SIM_ENABLE_ARCH_moxie_TRUE@    else \
5641 @SIM_ENABLE_ARCH_moxie_TRUE@      echo "Could not update the moxie-gdb.dtb file because the device "; \
5642 @SIM_ENABLE_ARCH_moxie_TRUE@      echo "tree compiler tool (dtc) is missing.  Install the tool to "; \
5643 @SIM_ENABLE_ARCH_moxie_TRUE@      echo "update the device tree blob."; \
5644 @SIM_ENABLE_ARCH_moxie_TRUE@    fi
5645 @SIM_ENABLE_ARCH_msp430_TRUE@$(msp430_libsim_a_OBJECTS) $(msp430_libsim_a_LIBADD): msp430/hw-config.h
5646
5647 @SIM_ENABLE_ARCH_msp430_TRUE@msp430/modules.o: msp430/modules.c
5648
5649 @SIM_ENABLE_ARCH_msp430_TRUE@msp430/%.o: common/%.c ; $(SIM_COMPILE)
5650 @SIM_ENABLE_ARCH_msp430_TRUE@-@am__include@ msp430/$(DEPDIR)/*.Po
5651 @SIM_ENABLE_ARCH_or1k_TRUE@$(or1k_libsim_a_OBJECTS) $(or1k_libsim_a_LIBADD): or1k/hw-config.h
5652
5653 @SIM_ENABLE_ARCH_or1k_TRUE@or1k/modules.o: or1k/modules.c
5654
5655 @SIM_ENABLE_ARCH_or1k_TRUE@or1k/%.o: common/%.c ; $(SIM_COMPILE)
5656 @SIM_ENABLE_ARCH_or1k_TRUE@-@am__include@ or1k/$(DEPDIR)/*.Po
5657
5658 @SIM_ENABLE_ARCH_or1k_TRUE@or1k/modules.c: | $(or1k_BUILD_OUTPUTS)
5659
5660 @SIM_ENABLE_ARCH_or1k_TRUE@or1k/mloop.c or1k/eng.h: or1k/stamp-mloop ; @true
5661 @SIM_ENABLE_ARCH_or1k_TRUE@or1k/stamp-mloop: $(srccom)/genmloop.sh or1k/mloop.in
5662 @SIM_ENABLE_ARCH_or1k_TRUE@     $(AM_V_GEN)$(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \
5663 @SIM_ENABLE_ARCH_or1k_TRUE@             -mono -fast -pbb -switch sem-switch.c \
5664 @SIM_ENABLE_ARCH_or1k_TRUE@             -cpu or1k32bf \
5665 @SIM_ENABLE_ARCH_or1k_TRUE@             -infile $(srcdir)/or1k/mloop.in -outfile-prefix or1k/
5666 @SIM_ENABLE_ARCH_or1k_TRUE@     $(AM_V_at)$(SHELL) $(srcroot)/move-if-change or1k/eng.hin or1k/eng.h
5667 @SIM_ENABLE_ARCH_or1k_TRUE@     $(AM_V_at)$(SHELL) $(srcroot)/move-if-change or1k/mloop.cin or1k/mloop.c
5668 @SIM_ENABLE_ARCH_or1k_TRUE@     $(AM_V_at)touch $@
5669
5670 @SIM_ENABLE_ARCH_or1k_TRUE@or1k/cgen: or1k/cgen-arch or1k/cgen-cpu-decode
5671
5672 @SIM_ENABLE_ARCH_or1k_TRUE@or1k/cgen-arch:
5673 @SIM_ENABLE_ARCH_or1k_TRUE@     $(AM_V_GEN)mach=or32,or32nd FLAGS="with-scache"; $(CGEN_GEN_ARCH)
5674 @SIM_ENABLE_ARCH_or1k_TRUE@or1k/arch.h or1k/arch.c or1k/cpuall.h: @CGEN_MAINT@ or1k/cgen-arch
5675
5676 @SIM_ENABLE_ARCH_or1k_TRUE@or1k/cgen-cpu-decode:
5677 @SIM_ENABLE_ARCH_or1k_TRUE@     $(AM_V_GEN)cpu=or1k32bf mach=or32,or32nd FLAGS="with-scache" EXTRAFILES="$(CGEN_CPU_SEM) $(CGEN_CPU_SEMSW)"; $(CGEN_GEN_CPU_DECODE)
5678 @SIM_ENABLE_ARCH_or1k_TRUE@or1k/cpu.h or1k/cpu.c or1k/model.c or1k/sem.c or1k/sem-switch.c or1k/decode.c or1k/decode.h: @CGEN_MAINT@ or1k/cgen-cpu-decode
5679 @SIM_ENABLE_ARCH_ppc_TRUE@ppc/libsim.a: common/libcommon.a
5680 @SIM_ENABLE_ARCH_ppc_TRUE@      $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
5681
5682 @SIM_ENABLE_ARCH_ppc_TRUE@ppc/%.o: ppc/%.c | ppc/libsim.a $(SIM_ALL_RECURSIVE_DEPS)
5683 @SIM_ENABLE_ARCH_ppc_TRUE@      $(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
5684
5685 @SIM_ENABLE_ARCH_ppc_TRUE@ppc/spreg.c: @MAINT@ ppc/ppc-spr-table ppc/spreg-gen.py ppc/$(am__dirstamp)
5686 @SIM_ENABLE_ARCH_ppc_TRUE@      $(AM_V_GEN)$(srcdir)/ppc/spreg-gen.py --source $@.tmp
5687 @SIM_ENABLE_ARCH_ppc_TRUE@      $(AM_V_at)$(SHELL) $(srcroot)/move-if-change $@.tmp $(srcdir)/ppc/spreg.c
5688 @SIM_ENABLE_ARCH_ppc_TRUE@      $(AM_V_at)touch $(srcdir)/ppc/spreg.c
5689
5690 @SIM_ENABLE_ARCH_ppc_TRUE@ppc/spreg.h: @MAINT@ ppc/ppc-spr-table ppc/spreg-gen.py ppc/$(am__dirstamp)
5691 @SIM_ENABLE_ARCH_ppc_TRUE@      $(AM_V_GEN)$(srcdir)/ppc/spreg-gen.py --header $@.tmp
5692 @SIM_ENABLE_ARCH_ppc_TRUE@      $(AM_V_at)$(SHELL) $(srcroot)/move-if-change $@.tmp $(srcdir)/ppc/spreg.h
5693 @SIM_ENABLE_ARCH_ppc_TRUE@      $(AM_V_at)touch $(srcdir)/ppc/spreg.h
5694 @SIM_ENABLE_ARCH_pru_TRUE@$(pru_libsim_a_OBJECTS) $(pru_libsim_a_LIBADD): pru/hw-config.h
5695
5696 @SIM_ENABLE_ARCH_pru_TRUE@pru/modules.o: pru/modules.c
5697
5698 @SIM_ENABLE_ARCH_pru_TRUE@pru/%.o: common/%.c ; $(SIM_COMPILE)
5699 @SIM_ENABLE_ARCH_pru_TRUE@-@am__include@ pru/$(DEPDIR)/*.Po
5700 @SIM_ENABLE_ARCH_riscv_TRUE@$(riscv_libsim_a_OBJECTS) $(riscv_libsim_a_LIBADD): riscv/hw-config.h
5701
5702 @SIM_ENABLE_ARCH_riscv_TRUE@riscv/modules.o: riscv/modules.c
5703
5704 @SIM_ENABLE_ARCH_riscv_TRUE@riscv/%.o: common/%.c ; $(SIM_COMPILE)
5705 @SIM_ENABLE_ARCH_riscv_TRUE@-@am__include@ riscv/$(DEPDIR)/*.Po
5706 @SIM_ENABLE_ARCH_rl78_TRUE@$(rl78_libsim_a_OBJECTS) $(rl78_libsim_a_LIBADD): rl78/hw-config.h
5707
5708 @SIM_ENABLE_ARCH_rl78_TRUE@rl78/modules.o: rl78/modules.c
5709
5710 @SIM_ENABLE_ARCH_rl78_TRUE@rl78/%.o: common/%.c ; $(SIM_COMPILE)
5711 @SIM_ENABLE_ARCH_rl78_TRUE@-@am__include@ rl78/$(DEPDIR)/*.Po
5712 @SIM_ENABLE_ARCH_rx_TRUE@$(rx_libsim_a_OBJECTS) $(rx_libsim_a_LIBADD): rx/hw-config.h
5713
5714 @SIM_ENABLE_ARCH_rx_TRUE@rx/modules.o: rx/modules.c
5715
5716 @SIM_ENABLE_ARCH_rx_TRUE@rx/%.o: common/%.c ; $(SIM_COMPILE)
5717 @SIM_ENABLE_ARCH_rx_TRUE@-@am__include@ rx/$(DEPDIR)/*.Po
5718 @SIM_ENABLE_ARCH_sh_TRUE@$(sh_libsim_a_OBJECTS) $(sh_libsim_a_LIBADD): sh/hw-config.h
5719
5720 @SIM_ENABLE_ARCH_sh_TRUE@sh/modules.o: sh/modules.c
5721
5722 @SIM_ENABLE_ARCH_sh_TRUE@sh/%.o: common/%.c ; $(SIM_COMPILE)
5723 @SIM_ENABLE_ARCH_sh_TRUE@-@am__include@ sh/$(DEPDIR)/*.Po
5724
5725 @SIM_ENABLE_ARCH_sh_TRUE@sh/modules.c: | $(sh_BUILD_OUTPUTS)
5726
5727 # These rules are copied from automake, but tweaked to use FOR_BUILD variables.
5728 @SIM_ENABLE_ARCH_sh_TRUE@sh/gencode$(EXEEXT): $(sh_gencode_OBJECTS) $(sh_gencode_DEPENDENCIES) sh/$(am__dirstamp)
5729 @SIM_ENABLE_ARCH_sh_TRUE@       $(AM_V_CCLD)$(LINK_FOR_BUILD) $(sh_gencode_OBJECTS) $(sh_gencode_LDADD)
5730
5731 # gencode is a build-time only tool.  Override the default rules for it.
5732 @SIM_ENABLE_ARCH_sh_TRUE@sh/gencode.o: sh/gencode.c
5733 @SIM_ENABLE_ARCH_sh_TRUE@       $(AM_V_CC)$(COMPILE_FOR_BUILD) -c $< -o $@
5734
5735 @SIM_ENABLE_ARCH_sh_TRUE@sh/code.c: sh/gencode$(EXEEXT)
5736 @SIM_ENABLE_ARCH_sh_TRUE@       $(AM_V_GEN)$< -x >$@
5737
5738 @SIM_ENABLE_ARCH_sh_TRUE@sh/ppi.c: sh/gencode$(EXEEXT)
5739 @SIM_ENABLE_ARCH_sh_TRUE@       $(AM_V_GEN)$< -p >$@
5740
5741 @SIM_ENABLE_ARCH_sh_TRUE@sh/table.c: sh/gencode$(EXEEXT)
5742 @SIM_ENABLE_ARCH_sh_TRUE@       $(AM_V_GEN)$< -s >$@
5743 @SIM_ENABLE_ARCH_v850_TRUE@$(v850_libsim_a_OBJECTS) $(v850_libsim_a_LIBADD): v850/hw-config.h
5744
5745 @SIM_ENABLE_ARCH_v850_TRUE@v850/modules.o: v850/modules.c
5746
5747 @SIM_ENABLE_ARCH_v850_TRUE@v850/%.o: common/%.c ; $(SIM_COMPILE)
5748 @SIM_ENABLE_ARCH_v850_TRUE@-@am__include@ v850/$(DEPDIR)/*.Po
5749
5750 @SIM_ENABLE_ARCH_v850_TRUE@v850/modules.c: | $(v850_BUILD_OUTPUTS)
5751
5752 @SIM_ENABLE_ARCH_v850_TRUE@$(v850_BUILT_SRC_FROM_IGEN): v850/stamp-igen
5753 @SIM_ENABLE_ARCH_v850_TRUE@v850/stamp-igen: $(v850_IGEN_INSN) $(v850_IGEN_DC) $(IGEN)
5754 @SIM_ENABLE_ARCH_v850_TRUE@     $(AM_V_GEN)$(IGEN_RUN) \
5755 @SIM_ENABLE_ARCH_v850_TRUE@             $(v850_IGEN_TRACE) \
5756 @SIM_ENABLE_ARCH_v850_TRUE@             -G gen-direct-access \
5757 @SIM_ENABLE_ARCH_v850_TRUE@             -G gen-zero-r0 \
5758 @SIM_ENABLE_ARCH_v850_TRUE@             -i $(v850_IGEN_INSN) \
5759 @SIM_ENABLE_ARCH_v850_TRUE@             -o $(v850_IGEN_DC) \
5760 @SIM_ENABLE_ARCH_v850_TRUE@             -x \
5761 @SIM_ENABLE_ARCH_v850_TRUE@             -n icache.h    -hc v850/icache.h \
5762 @SIM_ENABLE_ARCH_v850_TRUE@             -n icache.c    -c  v850/icache.c \
5763 @SIM_ENABLE_ARCH_v850_TRUE@             -n semantics.h -hs v850/semantics.h \
5764 @SIM_ENABLE_ARCH_v850_TRUE@             -n semantics.c -s  v850/semantics.c \
5765 @SIM_ENABLE_ARCH_v850_TRUE@             -n idecode.h   -hd v850/idecode.h \
5766 @SIM_ENABLE_ARCH_v850_TRUE@             -n idecode.c   -d  v850/idecode.c \
5767 @SIM_ENABLE_ARCH_v850_TRUE@             -n model.h     -hm v850/model.h \
5768 @SIM_ENABLE_ARCH_v850_TRUE@             -n model.c     -m  v850/model.c \
5769 @SIM_ENABLE_ARCH_v850_TRUE@             -n support.h   -hf v850/support.h \
5770 @SIM_ENABLE_ARCH_v850_TRUE@             -n support.c   -f  v850/support.c \
5771 @SIM_ENABLE_ARCH_v850_TRUE@             -n itable.h    -ht v850/itable.h \
5772 @SIM_ENABLE_ARCH_v850_TRUE@             -n itable.c    -t  v850/itable.c \
5773 @SIM_ENABLE_ARCH_v850_TRUE@             -n engine.h    -he v850/engine.h \
5774 @SIM_ENABLE_ARCH_v850_TRUE@             -n engine.c    -e  v850/engine.c \
5775 @SIM_ENABLE_ARCH_v850_TRUE@             -n irun.c      -r  v850/irun.c
5776 @SIM_ENABLE_ARCH_v850_TRUE@     $(AM_V_at)touch $@
5777
5778 all-recursive: $(SIM_ALL_RECURSIVE_DEPS)
5779
5780 install-data-local: installdirs $(SIM_INSTALL_DATA_LOCAL_DEPS)
5781         $(AM_V_at)$(MKDIR_P) $(DESTDIR)$(libdir)
5782         lib=`echo sim | sed '$(program_transform_name)'`; \
5783         for d in $(SIM_ENABLED_ARCHES); do \
5784                 n="$$lib"; \
5785                 [ "$(SIM_PRIMARY_TARGET)" = "$$d" ] || n="$$n-$$d"; \
5786                 n="lib$$n.a"; \
5787                 $(INSTALL_DATA) $$d/libsim.a $(DESTDIR)$(libdir)/$$n || exit 1; \
5788         done
5789
5790 install-exec-local: installdirs $(SIM_INSTALL_EXEC_LOCAL_DEPS)
5791         $(AM_V_at)$(MKDIR_P) $(DESTDIR)$(bindir)
5792         run=`echo run | sed '$(program_transform_name)'`; \
5793         for d in $(SIM_ENABLED_ARCHES); do \
5794                 n="$$run"; \
5795                 [ "$(SIM_PRIMARY_TARGET)" = "$$d" ] || n="$$n-$$d"; \
5796                 $(LIBTOOL) --mode=install \
5797                         $(INSTALL_PROGRAM) $$d/run$(EXEEXT) $(DESTDIR)$(bindir)/$$n$(EXEEXT) || exit 1; \
5798         done
5799
5800 uninstall-local: $(SIM_UNINSTALL_LOCAL_DEPS)
5801         rm -f $(DESTDIR)$(bindir)/run $(DESTDIR)$(libdir)/libsim.a
5802         for d in $(SIM_ENABLED_ARCHES); do \
5803                 rm -f $(DESTDIR)$(bindir)/run-$$d $(DESTDIR)$(libdir)/libsim-$$d.a; \
5804         done
5805
5806 # Tell versions [3.59,3.63) of GNU make to not export all variables.
5807 # Otherwise a system limit (for SysV at least) may be exceeded.
5808 .NOEXPORT: