sim/Makefile.in

   1 # Makefile.in generated by automake 1.15.1 from Makefile.am.
   2 # @configure_input@
   3
   4 # Copyright (C) 1994-2017 Free Software Foundation, Inc.
   5
   6 # This Makefile.in is free software; the Free Software Foundation
   7 # gives unlimited permission to copy and/or distribute it,
   8 # with or without modifications, as long as this notice is preserved.
   9
  10 # This program is distributed in the hope that it will be useful,
  11 # but WITHOUT ANY WARRANTY, to the extent permitted by law; without
  12 # even the implied warranty of MERCHANTABILITY or FITNESS FOR A
  13 # PARTICULAR PURPOSE.
  14
  15 @SET_MAKE@
  16
  17 #   Copyright (C) 1993-2023 Free Software Foundation, Inc.
  18 #
  19 # This program is free software; you can redistribute it and/or modify
  20 # it under the terms of the GNU General Public License as published by
  21 # the Free Software Foundation; either version 3 of the License, or
  22 # (at your option) any later version.
  23 #
  24 # This program is distributed in the hope that it will be useful,
  25 # but WITHOUT ANY WARRANTY; without even the implied warranty of
  26 # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  27 # GNU General Public License for more details.
  28 #
  29 # You should have received a copy of the GNU General Public License
  30 # along with this program.  If not, see <http://www.gnu.org/licenses/>.
  31
  32
  33
  34
  35 VPATH = @srcdir@
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  89 am__make_dryrun = (target_option=n; $(am__make_running_with_option))
  90 am__make_keepgoing = (target_option=k; $(am__make_running_with_option))
  91 pkgdatadir = $(datadir)/@PACKAGE@
  92 pkgincludedir = $(includedir)/@PACKAGE@
  93 pkglibdir = $(libdir)/@PACKAGE@
  94 pkglibexecdir = $(libexecdir)/@PACKAGE@
  95 am__cd = CDPATH="$${ZSH_VERSION+.}$(PATH_SEPARATOR)" && cd
  96 install_sh_DATA = $(install_sh) -c -m 644
  97 install_sh_PROGRAM = $(install_sh) -c
  98 install_sh_SCRIPT = $(install_sh) -c
  99 INSTALL_HEADER = $(INSTALL_DATA)
 100 transform = $(program_transform_name)
 101 NORMAL_INSTALL = :
 102 PRE_INSTALL = :
 103 POST_INSTALL = :
 104 NORMAL_UNINSTALL = :
 105 PRE_UNINSTALL = :
 106 POST_UNINSTALL = :
 107 build_triplet = @build@
 108 host_triplet = @host@
 109 target_triplet = @target@
 110 check_PROGRAMS = $(am__EXEEXT_8) $(am__EXEEXT_9)
 111 noinst_PROGRAMS = $(am__EXEEXT_10) $(am__EXEEXT_11) $(am__EXEEXT_12) \
 112         $(am__EXEEXT_13) $(am__EXEEXT_14) $(am__EXEEXT_15) \
 113         $(am__EXEEXT_16) $(am__EXEEXT_17) $(am__EXEEXT_18) \
 114         $(am__EXEEXT_19) $(am__EXEEXT_20) $(am__EXEEXT_21) \
 115         $(am__EXEEXT_22) $(am__EXEEXT_23) $(am__EXEEXT_24) \
 116         $(am__EXEEXT_25) $(am__EXEEXT_26) $(am__EXEEXT_27) \
 117         $(am__EXEEXT_28) $(am__EXEEXT_29) $(am__EXEEXT_30) \
 118         $(am__EXEEXT_31) $(am__EXEEXT_32) $(am__EXEEXT_33) \
 119         $(am__EXEEXT_34) $(am__EXEEXT_35) $(am__EXEEXT_36) \
 120         $(am__EXEEXT_37) $(am__EXEEXT_38) $(am__EXEEXT_39) \
 121         $(am__EXEEXT_40) $(am__EXEEXT_41)
 122 EXTRA_PROGRAMS = $(am__EXEEXT_2) testsuite/common/bits-gen$(EXEEXT) \
 123         testsuite/common/fpu-tst$(EXEEXT) $(am__EXEEXT_3) \
 124         $(am__EXEEXT_4) $(am__EXEEXT_5) $(am__EXEEXT_6) \
 125         $(am__EXEEXT_7)
 126 @ENABLE_SIM_TRUE@am__append_1 = \
 127 @ENABLE_SIM_TRUE@       $(srcroot)/include/sim/callback.h \
 128 @ENABLE_SIM_TRUE@       $(srcroot)/include/sim/sim.h
 129
 130 @SIM_ENABLE_HW_TRUE@am__append_2 = \
 131 @SIM_ENABLE_HW_TRUE@    $(SIM_COMMON_HW_OBJS) \
 132 @SIM_ENABLE_HW_TRUE@    $(SIM_HW_SOCKSER)
 133
 134 @SIM_ENABLE_IGEN_TRUE@am__append_3 = igen/libigen.a
 135 @SIM_ENABLE_IGEN_TRUE@am__append_4 = $(igen_IGEN_TOOLS)
 136 @SIM_ENABLE_IGEN_TRUE@am__append_5 = $(igen_IGEN_TOOLS)
 137 TESTS = testsuite/common/bits32m0$(EXEEXT) \
 138         testsuite/common/bits32m31$(EXEEXT) \
 139         testsuite/common/bits64m0$(EXEEXT) \
 140         testsuite/common/bits64m63$(EXEEXT) \
 141         testsuite/common/alu-tst$(EXEEXT)
 142 @SIM_ENABLE_ARCH_aarch64_TRUE@am__append_6 = aarch64/libsim.a
 143 @SIM_ENABLE_ARCH_aarch64_TRUE@am__append_7 = aarch64/run
 144 @SIM_ENABLE_ARCH_arm_TRUE@am__append_8 = arm/libsim.a
 145 @SIM_ENABLE_ARCH_arm_TRUE@am__append_9 = arm/run
 146 @SIM_ENABLE_ARCH_avr_TRUE@am__append_10 = avr/libsim.a
 147 @SIM_ENABLE_ARCH_avr_TRUE@am__append_11 = avr/run
 148 @SIM_ENABLE_ARCH_bfin_TRUE@am__append_12 = bfin/libsim.a
 149 @SIM_ENABLE_ARCH_bfin_TRUE@am__append_13 = bfin/run
 150 @SIM_ENABLE_ARCH_bpf_TRUE@am__append_14 = bpf/libsim.a
 151 @SIM_ENABLE_ARCH_bpf_TRUE@am__append_15 = bpf/run
 152 @SIM_ENABLE_ARCH_bpf_TRUE@am__append_16 = \
 153 @SIM_ENABLE_ARCH_bpf_TRUE@      bpf/eng-le.h \
 154 @SIM_ENABLE_ARCH_bpf_TRUE@      bpf/eng-be.h
 155
 156 @SIM_ENABLE_ARCH_bpf_TRUE@am__append_17 = $(bpf_BUILD_OUTPUTS)
 157 @SIM_ENABLE_ARCH_cr16_TRUE@am__append_18 = cr16/libsim.a
 158 @SIM_ENABLE_ARCH_cr16_TRUE@am__append_19 = cr16/run
 159 @SIM_ENABLE_ARCH_cr16_TRUE@am__append_20 = cr16/simops.h
 160 @SIM_ENABLE_ARCH_cr16_TRUE@am__append_21 = cr16/gencode
 161 @SIM_ENABLE_ARCH_cr16_TRUE@am__append_22 = $(cr16_BUILD_OUTPUTS)
 162 @SIM_ENABLE_ARCH_cris_TRUE@am__append_23 = cris/libsim.a
 163 @SIM_ENABLE_ARCH_cris_TRUE@am__append_24 = cris/run
 164 @SIM_ENABLE_ARCH_cris_TRUE@am__append_25 = cris/rvdummy
 165 @SIM_ENABLE_ARCH_cris_TRUE@am__append_26 = \
 166 @SIM_ENABLE_ARCH_cris_TRUE@     cris/engv10.h \
 167 @SIM_ENABLE_ARCH_cris_TRUE@     cris/engv32.h
 168
 169 @SIM_ENABLE_ARCH_cris_TRUE@am__append_27 = $(cris_BUILD_OUTPUTS)
 170 @SIM_ENABLE_ARCH_d10v_TRUE@am__append_28 = d10v/libsim.a
 171 @SIM_ENABLE_ARCH_d10v_TRUE@am__append_29 = d10v/run
 172 @SIM_ENABLE_ARCH_d10v_TRUE@am__append_30 = d10v/simops.h
 173 @SIM_ENABLE_ARCH_d10v_TRUE@am__append_31 = d10v/gencode
 174 @SIM_ENABLE_ARCH_d10v_TRUE@am__append_32 = $(d10v_BUILD_OUTPUTS)
 175 @SIM_ENABLE_ARCH_erc32_TRUE@am__append_33 = erc32/libsim.a
 176 @SIM_ENABLE_ARCH_erc32_TRUE@am__append_34 = erc32/run erc32/sis
 177 @SIM_ENABLE_ARCH_erc32_TRUE@am__append_35 = sim-%D-install-exec-local
 178 @SIM_ENABLE_ARCH_erc32_TRUE@am__append_36 = sim-erc32-uninstall-local
 179 @SIM_ENABLE_ARCH_examples_TRUE@am__append_37 = example-synacor/libsim.a
 180 @SIM_ENABLE_ARCH_examples_TRUE@am__append_38 = example-synacor/run
 181 @SIM_ENABLE_ARCH_frv_TRUE@am__append_39 = frv/libsim.a
 182 @SIM_ENABLE_ARCH_frv_TRUE@am__append_40 = frv/run
 183 @SIM_ENABLE_ARCH_frv_TRUE@am__append_41 = frv/eng.h
 184 @SIM_ENABLE_ARCH_frv_TRUE@am__append_42 = $(frv_BUILD_OUTPUTS)
 185 @SIM_ENABLE_ARCH_ft32_TRUE@am__append_43 = ft32/libsim.a
 186 @SIM_ENABLE_ARCH_ft32_TRUE@am__append_44 = ft32/run
 187 @SIM_ENABLE_ARCH_h8300_TRUE@am__append_45 = h8300/libsim.a
 188 @SIM_ENABLE_ARCH_h8300_TRUE@am__append_46 = h8300/run
 189 @SIM_ENABLE_ARCH_iq2000_TRUE@am__append_47 = iq2000/libsim.a
 190 @SIM_ENABLE_ARCH_iq2000_TRUE@am__append_48 = iq2000/run
 191 @SIM_ENABLE_ARCH_iq2000_TRUE@am__append_49 = iq2000/eng.h
 192 @SIM_ENABLE_ARCH_iq2000_TRUE@am__append_50 = $(iq2000_BUILD_OUTPUTS)
 193 @SIM_ENABLE_ARCH_lm32_TRUE@am__append_51 = lm32/libsim.a
 194 @SIM_ENABLE_ARCH_lm32_TRUE@am__append_52 = lm32/run
 195 @SIM_ENABLE_ARCH_lm32_TRUE@am__append_53 = lm32/eng.h
 196 @SIM_ENABLE_ARCH_lm32_TRUE@am__append_54 = $(lm32_BUILD_OUTPUTS)
 197 @SIM_ENABLE_ARCH_m32c_TRUE@am__append_55 = m32c/libsim.a
 198 @SIM_ENABLE_ARCH_m32c_TRUE@am__append_56 = m32c/run
 199 @SIM_ENABLE_ARCH_m32c_TRUE@am__append_57 = m32c/opc2c
 200 @SIM_ENABLE_ARCH_m32c_TRUE@am__append_58 = \
 201 @SIM_ENABLE_ARCH_m32c_TRUE@     $(m32c_BUILD_OUTPUTS) \
 202 @SIM_ENABLE_ARCH_m32c_TRUE@     m32c/m32c.c.log \
 203 @SIM_ENABLE_ARCH_m32c_TRUE@     m32c/r8c.c.log
 204
 205 @SIM_ENABLE_ARCH_m32r_TRUE@am__append_59 = m32r/libsim.a
 206 @SIM_ENABLE_ARCH_m32r_TRUE@am__append_60 = m32r/run
 207 @SIM_ENABLE_ARCH_m32r_TRUE@am__append_61 = \
 208 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/eng.h \
 209 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/engx.h \
 210 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/eng2.h
 211
 212 @SIM_ENABLE_ARCH_m32r_TRUE@am__append_62 = $(m32r_BUILD_OUTPUTS)
 213 @SIM_ENABLE_ARCH_m68hc11_TRUE@am__append_63 = m68hc11/libsim.a
 214 @SIM_ENABLE_ARCH_m68hc11_TRUE@am__append_64 = m68hc11/run
 215 @SIM_ENABLE_ARCH_m68hc11_TRUE@am__append_65 = m68hc11/gencode
 216 @SIM_ENABLE_ARCH_m68hc11_TRUE@am__append_66 = $(m68hc11_BUILD_OUTPUTS)
 217 @SIM_ENABLE_ARCH_mcore_TRUE@am__append_67 = mcore/libsim.a
 218 @SIM_ENABLE_ARCH_mcore_TRUE@am__append_68 = mcore/run
 219 @SIM_ENABLE_ARCH_microblaze_TRUE@am__append_69 = microblaze/libsim.a
 220 @SIM_ENABLE_ARCH_microblaze_TRUE@am__append_70 = microblaze/run
 221 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_SINGLE_TRUE@am__append_71 = \
 222 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_SINGLE_TRUE@      mips/support.o \
 223 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_SINGLE_TRUE@      mips/itable.o \
 224 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_SINGLE_TRUE@      mips/semantics.o \
 225 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_SINGLE_TRUE@      mips/idecode.o \
 226 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_SINGLE_TRUE@      mips/icache.o \
 227 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_SINGLE_TRUE@      mips/engine.o \
 228 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_SINGLE_TRUE@      mips/irun.o
 229
 230 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@am__append_72 = \
 231 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@ mips/m16_support.o \
 232 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@ mips/m16_semantics.o \
 233 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@ mips/m16_idecode.o \
 234 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@ mips/m16_icache.o \
 235 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@ \
 236 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@ mips/m32_support.o \
 237 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@ mips/m32_semantics.o \
 238 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@ mips/m32_idecode.o \
 239 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@ mips/m32_icache.o \
 240 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@ \
 241 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@ mips/itable.o \
 242 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@ mips/m16run.o
 243
 244 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_MULTI_TRUE@am__append_73 = \
 245 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_MULTI_TRUE@       $(SIM_MIPS_MULTI_OBJ) \
 246 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_MULTI_TRUE@       mips/itable.o \
 247 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_MULTI_TRUE@       mips/multi-run.o
 248
 249 @SIM_ENABLE_ARCH_mips_TRUE@am__append_74 = mips/libsim.a
 250 @SIM_ENABLE_ARCH_mips_TRUE@am__append_75 = mips/run
 251 @SIM_ENABLE_ARCH_mips_TRUE@am__append_76 = mips/itable.h \
 252 @SIM_ENABLE_ARCH_mips_TRUE@     $(SIM_MIPS_MULTI_SRC)
 253 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_SINGLE_TRUE@am__append_77 = \
 254 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_SINGLE_TRUE@      $(mips_BUILT_SRC_FROM_GEN_MODE_SINGLE) \
 255 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_SINGLE_TRUE@      mips/stamp-gen-mode-single
 256
 257 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@am__append_78 = \
 258 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@ $(mips_BUILT_SRC_FROM_GEN_MODE_M16_M16) \
 259 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@ $(mips_BUILT_SRC_FROM_GEN_MODE_M16_M32) \
 260 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@ mips/stamp-gen-mode-m16-m16 \
 261 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@ mips/stamp-gen-mode-m16-m32
 262
 263 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_MULTI_TRUE@am__append_79 = \
 264 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_MULTI_TRUE@       $(SIM_MIPS_MULTI_SRC) \
 265 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_MULTI_TRUE@       mips/stamp-gen-mode-multi-igen \
 266 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_MULTI_TRUE@       mips/stamp-gen-mode-multi-run
 267
 268 @SIM_ENABLE_ARCH_mips_TRUE@am__append_80 = $(mips_BUILD_OUTPUTS)
 269 @SIM_ENABLE_ARCH_mips_TRUE@am__append_81 = mips/multi-include.h mips/multi-run.c
 270 @SIM_ENABLE_ARCH_mn10300_TRUE@am__append_82 = mn10300/libsim.a
 271 @SIM_ENABLE_ARCH_mn10300_TRUE@am__append_83 = mn10300/run
 272 @SIM_ENABLE_ARCH_mn10300_TRUE@am__append_84 = \
 273 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/icache.h \
 274 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/idecode.h \
 275 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/semantics.h \
 276 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/model.h \
 277 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/support.h \
 278 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/itable.h \
 279 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/engine.h
 280
 281 @SIM_ENABLE_ARCH_mn10300_TRUE@am__append_85 = $(mn10300_BUILD_OUTPUTS)
 282 @SIM_ENABLE_ARCH_moxie_TRUE@am__append_86 = moxie/libsim.a
 283 @SIM_ENABLE_ARCH_moxie_TRUE@am__append_87 = moxie/run
 284 @SIM_ENABLE_ARCH_msp430_TRUE@am__append_88 = msp430/libsim.a
 285 @SIM_ENABLE_ARCH_msp430_TRUE@am__append_89 = msp430/run
 286 @SIM_ENABLE_ARCH_or1k_TRUE@am__append_90 = or1k/libsim.a
 287 @SIM_ENABLE_ARCH_or1k_TRUE@am__append_91 = or1k/run
 288 @SIM_ENABLE_ARCH_or1k_TRUE@am__append_92 = or1k/eng.h
 289 @SIM_ENABLE_ARCH_or1k_TRUE@am__append_93 = $(or1k_BUILD_OUTPUTS)
 290 @SIM_ENABLE_ARCH_ppc_TRUE@am__append_94 = common/libcommon.a
 291 @SIM_ENABLE_ARCH_ppc_TRUE@am__append_95 = ppc/run ppc/psim
 292 @SIM_ENABLE_ARCH_pru_TRUE@am__append_96 = pru/libsim.a
 293 @SIM_ENABLE_ARCH_pru_TRUE@am__append_97 = pru/run
 294 @SIM_ENABLE_ARCH_riscv_TRUE@am__append_98 = riscv/libsim.a
 295 @SIM_ENABLE_ARCH_riscv_TRUE@am__append_99 = riscv/run
 296 @SIM_ENABLE_ARCH_rl78_TRUE@am__append_100 = rl78/libsim.a
 297 @SIM_ENABLE_ARCH_rl78_TRUE@am__append_101 = rl78/run
 298 @SIM_ENABLE_ARCH_rx_TRUE@am__append_102 = rx/libsim.a
 299 @SIM_ENABLE_ARCH_rx_TRUE@am__append_103 = rx/run
 300 @SIM_ENABLE_ARCH_sh_TRUE@am__append_104 = sh/libsim.a
 301 @SIM_ENABLE_ARCH_sh_TRUE@am__append_105 = sh/run
 302 @SIM_ENABLE_ARCH_sh_TRUE@am__append_106 = \
 303 @SIM_ENABLE_ARCH_sh_TRUE@       sh/code.c \
 304 @SIM_ENABLE_ARCH_sh_TRUE@       sh/ppi.c
 305
 306 @SIM_ENABLE_ARCH_sh_TRUE@am__append_107 = sh/gencode
 307 @SIM_ENABLE_ARCH_sh_TRUE@am__append_108 = $(sh_BUILD_OUTPUTS)
 308 @SIM_ENABLE_ARCH_v850_TRUE@am__append_109 = v850/libsim.a
 309 @SIM_ENABLE_ARCH_v850_TRUE@am__append_110 = v850/run
 310 @SIM_ENABLE_ARCH_v850_TRUE@am__append_111 = \
 311 @SIM_ENABLE_ARCH_v850_TRUE@     v850/icache.h \
 312 @SIM_ENABLE_ARCH_v850_TRUE@     v850/idecode.h \
 313 @SIM_ENABLE_ARCH_v850_TRUE@     v850/semantics.h \
 314 @SIM_ENABLE_ARCH_v850_TRUE@     v850/model.h \
 315 @SIM_ENABLE_ARCH_v850_TRUE@     v850/support.h \
 316 @SIM_ENABLE_ARCH_v850_TRUE@     v850/itable.h \
 317 @SIM_ENABLE_ARCH_v850_TRUE@     v850/engine.h
 318
 319 @SIM_ENABLE_ARCH_v850_TRUE@am__append_112 = $(v850_BUILD_OUTPUTS)
 320 subdir = .
 321 ACLOCAL_M4 = $(top_srcdir)/aclocal.m4
 322 am__aclocal_m4_deps = $(top_srcdir)/../config/acx.m4 \
 323         $(top_srcdir)/../config/depstand.m4 \
 324         $(top_srcdir)/../config/lead-dot.m4 \
 325         $(top_srcdir)/../config/override.m4 \
 326         $(top_srcdir)/../config/pkg.m4 $(top_srcdir)/../libtool.m4 \
 327         $(top_srcdir)/../ltoptions.m4 $(top_srcdir)/../ltsugar.m4 \
 328         $(top_srcdir)/../ltversion.m4 $(top_srcdir)/../lt~obsolete.m4 \
 329         $(top_srcdir)/m4/sim_ac_option_alignment.m4 \
 330         $(top_srcdir)/m4/sim_ac_option_assert.m4 \
 331         $(top_srcdir)/m4/sim_ac_option_cgen_maint.m4 \
 332         $(top_srcdir)/m4/sim_ac_option_debug.m4 \
 333         $(top_srcdir)/m4/sim_ac_option_endian.m4 \
 334         $(top_srcdir)/m4/sim_ac_option_environment.m4 \
 335         $(top_srcdir)/m4/sim_ac_option_hardware.m4 \
 336         $(top_srcdir)/m4/sim_ac_option_inline.m4 \
 337         $(top_srcdir)/m4/sim_ac_option_profile.m4 \
 338         $(top_srcdir)/m4/sim_ac_option_reserved_bits.m4 \
 339         $(top_srcdir)/m4/sim_ac_option_scache.m4 \
 340         $(top_srcdir)/m4/sim_ac_option_smp.m4 \
 341         $(top_srcdir)/m4/sim_ac_option_stdio.m4 \
 342         $(top_srcdir)/m4/sim_ac_option_trace.m4 \
 343         $(top_srcdir)/m4/sim_ac_option_warnings.m4 \
 344         $(top_srcdir)/m4/sim_ac_platform.m4 \
 345         $(top_srcdir)/m4/sim_ac_toolchain.m4 \
 346         $(top_srcdir)/frv/acinclude.m4 $(top_srcdir)/mips/acinclude.m4 \
 347         $(top_srcdir)/riscv/acinclude.m4 $(top_srcdir)/rx/acinclude.m4 \
 348         $(top_srcdir)/configure.ac
 349 am__configure_deps = $(am__aclocal_m4_deps) $(CONFIGURE_DEPENDENCIES) \
 350         $(ACLOCAL_M4)
 351 DIST_COMMON = $(srcdir)/Makefile.am $(top_srcdir)/configure \
 352         $(am__configure_deps) $(am__pkginclude_HEADERS_DIST)
 353 am__CONFIG_DISTCLEAN_FILES = config.status config.cache config.log \
 354  configure.lineno config.status.lineno
 355 mkinstalldirs = $(SHELL) $(top_srcdir)/../mkinstalldirs
 356 CONFIG_HEADER = config.h
 357 CONFIG_CLEAN_FILES = aarch64/.gdbinit arm/.gdbinit avr/.gdbinit \
 358         bfin/.gdbinit bpf/.gdbinit cr16/.gdbinit cris/.gdbinit \
 359         d10v/.gdbinit frv/.gdbinit ft32/.gdbinit h8300/.gdbinit \
 360         iq2000/.gdbinit lm32/.gdbinit m32c/.gdbinit m32r/.gdbinit \
 361         m68hc11/.gdbinit mcore/.gdbinit microblaze/.gdbinit \
 362         mips/.gdbinit mn10300/.gdbinit moxie/.gdbinit msp430/.gdbinit \
 363         or1k/.gdbinit ppc/.gdbinit pru/.gdbinit riscv/.gdbinit \
 364         rl78/.gdbinit rx/.gdbinit sh/.gdbinit erc32/.gdbinit \
 365         v850/.gdbinit example-synacor/.gdbinit arch-subdir.mk .gdbinit
 366 CONFIG_CLEAN_VPATH_FILES =
 367 LIBRARIES = $(noinst_LIBRARIES)
 368 ARFLAGS = cru
 369 AM_V_AR = $(am__v_AR_@AM_V@)
 370 am__v_AR_ = $(am__v_AR_@AM_DEFAULT_V@)
 371 am__v_AR_0 = @echo "  AR      " $@;
 372 am__v_AR_1 =
 373 aarch64_libsim_a_AR = $(AR) $(ARFLAGS)
 374 @SIM_ENABLE_ARCH_aarch64_TRUE@aarch64_libsim_a_DEPENDENCIES =  \
 375 @SIM_ENABLE_ARCH_aarch64_TRUE@  $(patsubst \
 376 @SIM_ENABLE_ARCH_aarch64_TRUE@  %,aarch64/%,$(SIM_NEW_COMMON_OBJS)) \
 377 @SIM_ENABLE_ARCH_aarch64_TRUE@  $(patsubst \
 378 @SIM_ENABLE_ARCH_aarch64_TRUE@  %,aarch64/dv-%.o,$(SIM_HW_DEVICES)) \
 379 @SIM_ENABLE_ARCH_aarch64_TRUE@  aarch64/cpustate.o \
 380 @SIM_ENABLE_ARCH_aarch64_TRUE@  aarch64/interp.o \
 381 @SIM_ENABLE_ARCH_aarch64_TRUE@  aarch64/memory.o \
 382 @SIM_ENABLE_ARCH_aarch64_TRUE@  aarch64/modules.o \
 383 @SIM_ENABLE_ARCH_aarch64_TRUE@  aarch64/sim-resume.o \
 384 @SIM_ENABLE_ARCH_aarch64_TRUE@  aarch64/simulator.o
 385 am__dirstamp = $(am__leading_dot)dirstamp
 386 am__objects_1 = common/callback.$(OBJEXT) common/portability.$(OBJEXT) \
 387         common/sim-load.$(OBJEXT) common/syscall.$(OBJEXT) \
 388         common/target-newlib-errno.$(OBJEXT) \
 389         common/target-newlib-open.$(OBJEXT) \
 390         common/target-newlib-signal.$(OBJEXT) \
 391         common/target-newlib-syscall.$(OBJEXT) \
 392         common/version.$(OBJEXT)
 393 @SIM_ENABLE_ARCH_aarch64_TRUE@am_aarch64_libsim_a_OBJECTS =  \
 394 @SIM_ENABLE_ARCH_aarch64_TRUE@  $(am__objects_1)
 395 aarch64_libsim_a_OBJECTS = $(am_aarch64_libsim_a_OBJECTS)
 396 arm_libsim_a_AR = $(AR) $(ARFLAGS)
 397 @SIM_ENABLE_ARCH_arm_TRUE@arm_libsim_a_DEPENDENCIES = arm/wrapper.o \
 398 @SIM_ENABLE_ARCH_arm_TRUE@      $(patsubst \
 399 @SIM_ENABLE_ARCH_arm_TRUE@      %,arm/%,$(SIM_NEW_COMMON_OBJS)) \
 400 @SIM_ENABLE_ARCH_arm_TRUE@      $(patsubst \
 401 @SIM_ENABLE_ARCH_arm_TRUE@      %,arm/dv-%.o,$(SIM_HW_DEVICES)) \
 402 @SIM_ENABLE_ARCH_arm_TRUE@      arm/armemu.o arm/armemu32.o \
 403 @SIM_ENABLE_ARCH_arm_TRUE@      arm/arminit.o arm/armos.o \
 404 @SIM_ENABLE_ARCH_arm_TRUE@      arm/armsupp.o arm/armvirt.o \
 405 @SIM_ENABLE_ARCH_arm_TRUE@      arm/thumbemu.o arm/armcopro.o \
 406 @SIM_ENABLE_ARCH_arm_TRUE@      arm/maverick.o arm/iwmmxt.o \
 407 @SIM_ENABLE_ARCH_arm_TRUE@      arm/modules.o
 408 @SIM_ENABLE_ARCH_arm_TRUE@am_arm_libsim_a_OBJECTS = $(am__objects_1)
 409 arm_libsim_a_OBJECTS = $(am_arm_libsim_a_OBJECTS)
 410 avr_libsim_a_AR = $(AR) $(ARFLAGS)
 411 @SIM_ENABLE_ARCH_avr_TRUE@avr_libsim_a_DEPENDENCIES = avr/interp.o \
 412 @SIM_ENABLE_ARCH_avr_TRUE@      $(patsubst \
 413 @SIM_ENABLE_ARCH_avr_TRUE@      %,avr/%,$(SIM_NEW_COMMON_OBJS)) \
 414 @SIM_ENABLE_ARCH_avr_TRUE@      $(patsubst \
 415 @SIM_ENABLE_ARCH_avr_TRUE@      %,avr/dv-%.o,$(SIM_HW_DEVICES)) \
 416 @SIM_ENABLE_ARCH_avr_TRUE@      avr/modules.o avr/sim-resume.o
 417 @SIM_ENABLE_ARCH_avr_TRUE@am_avr_libsim_a_OBJECTS = $(am__objects_1)
 418 avr_libsim_a_OBJECTS = $(am_avr_libsim_a_OBJECTS)
 419 bfin_libsim_a_AR = $(AR) $(ARFLAGS)
 420 @SIM_ENABLE_ARCH_bfin_TRUE@bfin_libsim_a_DEPENDENCIES = $(patsubst \
 421 @SIM_ENABLE_ARCH_bfin_TRUE@     %,bfin/%,$(SIM_NEW_COMMON_OBJS)) \
 422 @SIM_ENABLE_ARCH_bfin_TRUE@     $(patsubst \
 423 @SIM_ENABLE_ARCH_bfin_TRUE@     %,bfin/dv-%.o,$(SIM_HW_DEVICES)) \
 424 @SIM_ENABLE_ARCH_bfin_TRUE@     $(patsubst \
 425 @SIM_ENABLE_ARCH_bfin_TRUE@     %,bfin/dv-%.o,$(bfin_SIM_EXTRA_HW_DEVICES)) \
 426 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin/bfin-sim.o bfin/devices.o \
 427 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin/gui.o bfin/interp.o \
 428 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin/machs.o bfin/modules.o \
 429 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin/sim-resume.o
 430 @SIM_ENABLE_ARCH_bfin_TRUE@am_bfin_libsim_a_OBJECTS =  \
 431 @SIM_ENABLE_ARCH_bfin_TRUE@     $(am__objects_1)
 432 bfin_libsim_a_OBJECTS = $(am_bfin_libsim_a_OBJECTS)
 433 bpf_libsim_a_AR = $(AR) $(ARFLAGS)
 434 @SIM_ENABLE_ARCH_bpf_TRUE@bpf_libsim_a_DEPENDENCIES = $(patsubst \
 435 @SIM_ENABLE_ARCH_bpf_TRUE@      %,bpf/%,$(SIM_NEW_COMMON_OBJS)) \
 436 @SIM_ENABLE_ARCH_bpf_TRUE@      $(patsubst \
 437 @SIM_ENABLE_ARCH_bpf_TRUE@      %,bpf/dv-%.o,$(SIM_HW_DEVICES)) \
 438 @SIM_ENABLE_ARCH_bpf_TRUE@      bpf/modules.o bpf/cgen-run.o \
 439 @SIM_ENABLE_ARCH_bpf_TRUE@      bpf/cgen-scache.o bpf/cgen-trace.o \
 440 @SIM_ENABLE_ARCH_bpf_TRUE@      bpf/cgen-utils.o bpf/arch.o \
 441 @SIM_ENABLE_ARCH_bpf_TRUE@      bpf/cpu.o bpf/decode-le.o \
 442 @SIM_ENABLE_ARCH_bpf_TRUE@      bpf/decode-be.o bpf/sem-le.o \
 443 @SIM_ENABLE_ARCH_bpf_TRUE@      bpf/sem-be.o bpf/mloop-le.o \
 444 @SIM_ENABLE_ARCH_bpf_TRUE@      bpf/mloop-be.o bpf/bpf.o \
 445 @SIM_ENABLE_ARCH_bpf_TRUE@      bpf/bpf-helpers.o bpf/sim-if.o \
 446 @SIM_ENABLE_ARCH_bpf_TRUE@      bpf/traps.o
 447 @SIM_ENABLE_ARCH_bpf_TRUE@am_bpf_libsim_a_OBJECTS = $(am__objects_1)
 448 bpf_libsim_a_OBJECTS = $(am_bpf_libsim_a_OBJECTS)
 449 common_libcommon_a_AR = $(AR) $(ARFLAGS)
 450 common_libcommon_a_LIBADD =
 451 am_common_libcommon_a_OBJECTS = common/callback.$(OBJEXT) \
 452         common/portability.$(OBJEXT) common/sim-load.$(OBJEXT) \
 453         common/syscall.$(OBJEXT) common/target-newlib-errno.$(OBJEXT) \
 454         common/target-newlib-open.$(OBJEXT) \
 455         common/target-newlib-signal.$(OBJEXT) \
 456         common/target-newlib-syscall.$(OBJEXT) \
 457         common/version.$(OBJEXT)
 458 common_libcommon_a_OBJECTS = $(am_common_libcommon_a_OBJECTS)
 459 cr16_libsim_a_AR = $(AR) $(ARFLAGS)
 460 @SIM_ENABLE_ARCH_cr16_TRUE@cr16_libsim_a_DEPENDENCIES = $(patsubst \
 461 @SIM_ENABLE_ARCH_cr16_TRUE@     %,cr16/%,$(SIM_NEW_COMMON_OBJS)) \
 462 @SIM_ENABLE_ARCH_cr16_TRUE@     $(patsubst \
 463 @SIM_ENABLE_ARCH_cr16_TRUE@     %,cr16/dv-%.o,$(SIM_HW_DEVICES)) \
 464 @SIM_ENABLE_ARCH_cr16_TRUE@     cr16/interp.o cr16/modules.o \
 465 @SIM_ENABLE_ARCH_cr16_TRUE@     cr16/sim-resume.o cr16/simops.o \
 466 @SIM_ENABLE_ARCH_cr16_TRUE@     cr16/table.o
 467 @SIM_ENABLE_ARCH_cr16_TRUE@am_cr16_libsim_a_OBJECTS =  \
 468 @SIM_ENABLE_ARCH_cr16_TRUE@     $(am__objects_1)
 469 cr16_libsim_a_OBJECTS = $(am_cr16_libsim_a_OBJECTS)
 470 cris_libsim_a_AR = $(AR) $(ARFLAGS)
 471 @SIM_ENABLE_ARCH_cris_TRUE@cris_libsim_a_DEPENDENCIES = $(patsubst \
 472 @SIM_ENABLE_ARCH_cris_TRUE@     %,cris/%,$(SIM_NEW_COMMON_OBJS)) \
 473 @SIM_ENABLE_ARCH_cris_TRUE@     $(patsubst \
 474 @SIM_ENABLE_ARCH_cris_TRUE@     %,cris/dv-%.o,$(SIM_HW_DEVICES)) \
 475 @SIM_ENABLE_ARCH_cris_TRUE@     $(patsubst \
 476 @SIM_ENABLE_ARCH_cris_TRUE@     %,cris/dv-%.o,$(cris_SIM_EXTRA_HW_DEVICES)) \
 477 @SIM_ENABLE_ARCH_cris_TRUE@     cris/modules.o cris/cgen-run.o \
 478 @SIM_ENABLE_ARCH_cris_TRUE@     cris/cgen-scache.o \
 479 @SIM_ENABLE_ARCH_cris_TRUE@     cris/cgen-trace.o cris/cgen-utils.o \
 480 @SIM_ENABLE_ARCH_cris_TRUE@     cris/arch.o cris/crisv10f.o \
 481 @SIM_ENABLE_ARCH_cris_TRUE@     cris/cpuv10.o cris/decodev10.o \
 482 @SIM_ENABLE_ARCH_cris_TRUE@     cris/modelv10.o cris/mloopv10f.o \
 483 @SIM_ENABLE_ARCH_cris_TRUE@     cris/crisv32f.o cris/cpuv32.o \
 484 @SIM_ENABLE_ARCH_cris_TRUE@     cris/decodev32.o cris/modelv32.o \
 485 @SIM_ENABLE_ARCH_cris_TRUE@     cris/mloopv32f.o cris/sim-if.o \
 486 @SIM_ENABLE_ARCH_cris_TRUE@     cris/traps.o
 487 @SIM_ENABLE_ARCH_cris_TRUE@am_cris_libsim_a_OBJECTS =  \
 488 @SIM_ENABLE_ARCH_cris_TRUE@     $(am__objects_1)
 489 cris_libsim_a_OBJECTS = $(am_cris_libsim_a_OBJECTS)
 490 d10v_libsim_a_AR = $(AR) $(ARFLAGS)
 491 @SIM_ENABLE_ARCH_d10v_TRUE@d10v_libsim_a_DEPENDENCIES = d10v/interp.o \
 492 @SIM_ENABLE_ARCH_d10v_TRUE@     $(patsubst \
 493 @SIM_ENABLE_ARCH_d10v_TRUE@     %,d10v/%,$(SIM_NEW_COMMON_OBJS)) \
 494 @SIM_ENABLE_ARCH_d10v_TRUE@     $(patsubst \
 495 @SIM_ENABLE_ARCH_d10v_TRUE@     %,d10v/dv-%.o,$(SIM_HW_DEVICES)) \
 496 @SIM_ENABLE_ARCH_d10v_TRUE@     d10v/endian.o d10v/modules.o \
 497 @SIM_ENABLE_ARCH_d10v_TRUE@     d10v/sim-resume.o d10v/simops.o \
 498 @SIM_ENABLE_ARCH_d10v_TRUE@     d10v/table.o
 499 @SIM_ENABLE_ARCH_d10v_TRUE@am_d10v_libsim_a_OBJECTS =  \
 500 @SIM_ENABLE_ARCH_d10v_TRUE@     $(am__objects_1)
 501 d10v_libsim_a_OBJECTS = $(am_d10v_libsim_a_OBJECTS)
 502 erc32_libsim_a_AR = $(AR) $(ARFLAGS)
 503 @SIM_ENABLE_ARCH_erc32_TRUE@erc32_libsim_a_DEPENDENCIES =  \
 504 @SIM_ENABLE_ARCH_erc32_TRUE@    erc32/erc32.o erc32/exec.o \
 505 @SIM_ENABLE_ARCH_erc32_TRUE@    erc32/float.o erc32/func.o \
 506 @SIM_ENABLE_ARCH_erc32_TRUE@    erc32/help.o erc32/interf.o \
 507 @SIM_ENABLE_ARCH_erc32_TRUE@    erc32/modules.o
 508 @SIM_ENABLE_ARCH_erc32_TRUE@am_erc32_libsim_a_OBJECTS =  \
 509 @SIM_ENABLE_ARCH_erc32_TRUE@    $(am__objects_1)
 510 erc32_libsim_a_OBJECTS = $(am_erc32_libsim_a_OBJECTS)
 511 example_synacor_libsim_a_AR = $(AR) $(ARFLAGS)
 512 @SIM_ENABLE_ARCH_examples_TRUE@example_synacor_libsim_a_DEPENDENCIES =  \
 513 @SIM_ENABLE_ARCH_examples_TRUE@ $(patsubst \
 514 @SIM_ENABLE_ARCH_examples_TRUE@ %,example-synacor/%,$(SIM_NEW_COMMON_OBJS)) \
 515 @SIM_ENABLE_ARCH_examples_TRUE@ $(patsubst \
 516 @SIM_ENABLE_ARCH_examples_TRUE@ %,example-synacor/dv-%.o,$(SIM_HW_DEVICES)) \
 517 @SIM_ENABLE_ARCH_examples_TRUE@ example-synacor/interp.o \
 518 @SIM_ENABLE_ARCH_examples_TRUE@ example-synacor/modules.o \
 519 @SIM_ENABLE_ARCH_examples_TRUE@ example-synacor/sim-main.o \
 520 @SIM_ENABLE_ARCH_examples_TRUE@ example-synacor/sim-resume.o
 521 @SIM_ENABLE_ARCH_examples_TRUE@am_example_synacor_libsim_a_OBJECTS =  \
 522 @SIM_ENABLE_ARCH_examples_TRUE@ $(am__objects_1)
 523 example_synacor_libsim_a_OBJECTS =  \
 524         $(am_example_synacor_libsim_a_OBJECTS)
 525 frv_libsim_a_AR = $(AR) $(ARFLAGS)
 526 @SIM_ENABLE_ARCH_frv_TRUE@frv_libsim_a_DEPENDENCIES = $(patsubst \
 527 @SIM_ENABLE_ARCH_frv_TRUE@      %,frv/%,$(SIM_NEW_COMMON_OBJS)) \
 528 @SIM_ENABLE_ARCH_frv_TRUE@      $(patsubst \
 529 @SIM_ENABLE_ARCH_frv_TRUE@      %,frv/dv-%.o,$(SIM_HW_DEVICES)) \
 530 @SIM_ENABLE_ARCH_frv_TRUE@      frv/modules.o frv/cgen-accfp.o \
 531 @SIM_ENABLE_ARCH_frv_TRUE@      frv/cgen-fpu.o frv/cgen-run.o \
 532 @SIM_ENABLE_ARCH_frv_TRUE@      frv/cgen-scache.o frv/cgen-trace.o \
 533 @SIM_ENABLE_ARCH_frv_TRUE@      frv/cgen-utils.o frv/arch.o \
 534 @SIM_ENABLE_ARCH_frv_TRUE@      frv/cgen-par.o frv/cpu.o \
 535 @SIM_ENABLE_ARCH_frv_TRUE@      frv/decode.o frv/frv.o frv/mloop.o \
 536 @SIM_ENABLE_ARCH_frv_TRUE@      frv/model.o frv/sem.o frv/cache.o \
 537 @SIM_ENABLE_ARCH_frv_TRUE@      frv/interrupts.o frv/memory.o \
 538 @SIM_ENABLE_ARCH_frv_TRUE@      frv/options.o frv/pipeline.o \
 539 @SIM_ENABLE_ARCH_frv_TRUE@      frv/profile.o frv/profile-fr400.o \
 540 @SIM_ENABLE_ARCH_frv_TRUE@      frv/profile-fr450.o \
 541 @SIM_ENABLE_ARCH_frv_TRUE@      frv/profile-fr500.o \
 542 @SIM_ENABLE_ARCH_frv_TRUE@      frv/profile-fr550.o frv/registers.o \
 543 @SIM_ENABLE_ARCH_frv_TRUE@      frv/reset.o frv/sim-if.o frv/traps.o
 544 @SIM_ENABLE_ARCH_frv_TRUE@am_frv_libsim_a_OBJECTS = $(am__objects_1)
 545 frv_libsim_a_OBJECTS = $(am_frv_libsim_a_OBJECTS)
 546 ft32_libsim_a_AR = $(AR) $(ARFLAGS)
 547 @SIM_ENABLE_ARCH_ft32_TRUE@ft32_libsim_a_DEPENDENCIES = $(patsubst \
 548 @SIM_ENABLE_ARCH_ft32_TRUE@     %,ft32/%,$(SIM_NEW_COMMON_OBJS)) \
 549 @SIM_ENABLE_ARCH_ft32_TRUE@     $(patsubst \
 550 @SIM_ENABLE_ARCH_ft32_TRUE@     %,ft32/dv-%.o,$(SIM_HW_DEVICES)) \
 551 @SIM_ENABLE_ARCH_ft32_TRUE@     ft32/interp.o ft32/modules.o \
 552 @SIM_ENABLE_ARCH_ft32_TRUE@     ft32/sim-resume.o
 553 @SIM_ENABLE_ARCH_ft32_TRUE@am_ft32_libsim_a_OBJECTS =  \
 554 @SIM_ENABLE_ARCH_ft32_TRUE@     $(am__objects_1)
 555 ft32_libsim_a_OBJECTS = $(am_ft32_libsim_a_OBJECTS)
 556 h8300_libsim_a_AR = $(AR) $(ARFLAGS)
 557 @SIM_ENABLE_ARCH_h8300_TRUE@h8300_libsim_a_DEPENDENCIES =  \
 558 @SIM_ENABLE_ARCH_h8300_TRUE@    h8300/compile.o $(patsubst \
 559 @SIM_ENABLE_ARCH_h8300_TRUE@    %,h8300/%,$(SIM_NEW_COMMON_OBJS)) \
 560 @SIM_ENABLE_ARCH_h8300_TRUE@    $(patsubst \
 561 @SIM_ENABLE_ARCH_h8300_TRUE@    %,h8300/dv-%.o,$(SIM_HW_DEVICES)) \
 562 @SIM_ENABLE_ARCH_h8300_TRUE@    h8300/modules.o h8300/sim-resume.o
 563 @SIM_ENABLE_ARCH_h8300_TRUE@am_h8300_libsim_a_OBJECTS =  \
 564 @SIM_ENABLE_ARCH_h8300_TRUE@    $(am__objects_1)
 565 h8300_libsim_a_OBJECTS = $(am_h8300_libsim_a_OBJECTS)
 566 igen_libigen_a_AR = $(AR) $(ARFLAGS)
 567 igen_libigen_a_LIBADD =
 568 @SIM_ENABLE_IGEN_TRUE@am_igen_libigen_a_OBJECTS =  \
 569 @SIM_ENABLE_IGEN_TRUE@  igen/table.$(OBJEXT) igen/lf.$(OBJEXT) \
 570 @SIM_ENABLE_IGEN_TRUE@  igen/misc.$(OBJEXT) \
 571 @SIM_ENABLE_IGEN_TRUE@  igen/filter_host.$(OBJEXT) \
 572 @SIM_ENABLE_IGEN_TRUE@  igen/ld-decode.$(OBJEXT) \
 573 @SIM_ENABLE_IGEN_TRUE@  igen/ld-cache.$(OBJEXT) \
 574 @SIM_ENABLE_IGEN_TRUE@  igen/filter.$(OBJEXT) \
 575 @SIM_ENABLE_IGEN_TRUE@  igen/ld-insn.$(OBJEXT) \
 576 @SIM_ENABLE_IGEN_TRUE@  igen/gen-model.$(OBJEXT) \
 577 @SIM_ENABLE_IGEN_TRUE@  igen/gen-itable.$(OBJEXT) \
 578 @SIM_ENABLE_IGEN_TRUE@  igen/gen-icache.$(OBJEXT) \
 579 @SIM_ENABLE_IGEN_TRUE@  igen/gen-semantics.$(OBJEXT) \
 580 @SIM_ENABLE_IGEN_TRUE@  igen/gen-idecode.$(OBJEXT) \
 581 @SIM_ENABLE_IGEN_TRUE@  igen/gen-support.$(OBJEXT) \
 582 @SIM_ENABLE_IGEN_TRUE@  igen/gen-engine.$(OBJEXT) \
 583 @SIM_ENABLE_IGEN_TRUE@  igen/gen.$(OBJEXT)
 584 igen_libigen_a_OBJECTS = $(am_igen_libigen_a_OBJECTS)
 585 iq2000_libsim_a_AR = $(AR) $(ARFLAGS)
 586 @SIM_ENABLE_ARCH_iq2000_TRUE@iq2000_libsim_a_DEPENDENCIES =  \
 587 @SIM_ENABLE_ARCH_iq2000_TRUE@   $(patsubst \
 588 @SIM_ENABLE_ARCH_iq2000_TRUE@   %,iq2000/%,$(SIM_NEW_COMMON_OBJS)) \
 589 @SIM_ENABLE_ARCH_iq2000_TRUE@   $(patsubst \
 590 @SIM_ENABLE_ARCH_iq2000_TRUE@   %,iq2000/dv-%.o,$(SIM_HW_DEVICES)) \
 591 @SIM_ENABLE_ARCH_iq2000_TRUE@   iq2000/modules.o \
 592 @SIM_ENABLE_ARCH_iq2000_TRUE@   iq2000/cgen-run.o \
 593 @SIM_ENABLE_ARCH_iq2000_TRUE@   iq2000/cgen-scache.o \
 594 @SIM_ENABLE_ARCH_iq2000_TRUE@   iq2000/cgen-trace.o \
 595 @SIM_ENABLE_ARCH_iq2000_TRUE@   iq2000/cgen-utils.o iq2000/arch.o \
 596 @SIM_ENABLE_ARCH_iq2000_TRUE@   iq2000/cpu.o iq2000/decode.o \
 597 @SIM_ENABLE_ARCH_iq2000_TRUE@   iq2000/iq2000.o iq2000/sem.o \
 598 @SIM_ENABLE_ARCH_iq2000_TRUE@   iq2000/mloop.o iq2000/model.o \
 599 @SIM_ENABLE_ARCH_iq2000_TRUE@   iq2000/sim-if.o
 600 @SIM_ENABLE_ARCH_iq2000_TRUE@am_iq2000_libsim_a_OBJECTS =  \
 601 @SIM_ENABLE_ARCH_iq2000_TRUE@   $(am__objects_1)
 602 iq2000_libsim_a_OBJECTS = $(am_iq2000_libsim_a_OBJECTS)
 603 lm32_libsim_a_AR = $(AR) $(ARFLAGS)
 604 @SIM_ENABLE_ARCH_lm32_TRUE@lm32_libsim_a_DEPENDENCIES = $(patsubst \
 605 @SIM_ENABLE_ARCH_lm32_TRUE@     %,lm32/%,$(SIM_NEW_COMMON_OBJS)) \
 606 @SIM_ENABLE_ARCH_lm32_TRUE@     $(patsubst \
 607 @SIM_ENABLE_ARCH_lm32_TRUE@     %,lm32/dv-%.o,$(SIM_HW_DEVICES)) \
 608 @SIM_ENABLE_ARCH_lm32_TRUE@     $(patsubst \
 609 @SIM_ENABLE_ARCH_lm32_TRUE@     %,lm32/dv-%.o,$(lm32_SIM_EXTRA_HW_DEVICES)) \
 610 @SIM_ENABLE_ARCH_lm32_TRUE@     lm32/modules.o lm32/cgen-run.o \
 611 @SIM_ENABLE_ARCH_lm32_TRUE@     lm32/cgen-scache.o \
 612 @SIM_ENABLE_ARCH_lm32_TRUE@     lm32/cgen-trace.o lm32/cgen-utils.o \
 613 @SIM_ENABLE_ARCH_lm32_TRUE@     lm32/arch.o lm32/cpu.o \
 614 @SIM_ENABLE_ARCH_lm32_TRUE@     lm32/decode.o lm32/sem.o \
 615 @SIM_ENABLE_ARCH_lm32_TRUE@     lm32/mloop.o lm32/model.o \
 616 @SIM_ENABLE_ARCH_lm32_TRUE@     lm32/lm32.o lm32/sim-if.o \
 617 @SIM_ENABLE_ARCH_lm32_TRUE@     lm32/traps.o lm32/user.o
 618 @SIM_ENABLE_ARCH_lm32_TRUE@am_lm32_libsim_a_OBJECTS =  \
 619 @SIM_ENABLE_ARCH_lm32_TRUE@     $(am__objects_1)
 620 lm32_libsim_a_OBJECTS = $(am_lm32_libsim_a_OBJECTS)
 621 m32c_libsim_a_AR = $(AR) $(ARFLAGS)
 622 @SIM_ENABLE_ARCH_m32c_TRUE@m32c_libsim_a_DEPENDENCIES = m32c/gdb-if.o \
 623 @SIM_ENABLE_ARCH_m32c_TRUE@     m32c/int.o m32c/load.o m32c/m32c.o \
 624 @SIM_ENABLE_ARCH_m32c_TRUE@     m32c/mem.o m32c/misc.o \
 625 @SIM_ENABLE_ARCH_m32c_TRUE@     m32c/modules.o m32c/r8c.o \
 626 @SIM_ENABLE_ARCH_m32c_TRUE@     m32c/reg.o m32c/srcdest.o \
 627 @SIM_ENABLE_ARCH_m32c_TRUE@     m32c/syscalls.o m32c/trace.o
 628 @SIM_ENABLE_ARCH_m32c_TRUE@am_m32c_libsim_a_OBJECTS =  \
 629 @SIM_ENABLE_ARCH_m32c_TRUE@     $(am__objects_1)
 630 m32c_libsim_a_OBJECTS = $(am_m32c_libsim_a_OBJECTS)
 631 m32r_libsim_a_AR = $(AR) $(ARFLAGS)
 632 @SIM_ENABLE_ARCH_m32r_TRUE@m32r_libsim_a_DEPENDENCIES = $(patsubst \
 633 @SIM_ENABLE_ARCH_m32r_TRUE@     %,m32r/%,$(SIM_NEW_COMMON_OBJS)) \
 634 @SIM_ENABLE_ARCH_m32r_TRUE@     $(patsubst \
 635 @SIM_ENABLE_ARCH_m32r_TRUE@     %,m32r/dv-%.o,$(SIM_HW_DEVICES)) \
 636 @SIM_ENABLE_ARCH_m32r_TRUE@     $(patsubst \
 637 @SIM_ENABLE_ARCH_m32r_TRUE@     %,m32r/dv-%.o,$(m32r_SIM_EXTRA_HW_DEVICES)) \
 638 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/modules.o m32r/cgen-run.o \
 639 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/cgen-scache.o \
 640 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/cgen-trace.o m32r/cgen-utils.o \
 641 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/arch.o m32r/m32r.o m32r/cpu.o \
 642 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/decode.o m32r/sem.o \
 643 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/model.o m32r/mloop.o \
 644 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/m32rx.o m32r/cpux.o \
 645 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/decodex.o m32r/modelx.o \
 646 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/mloopx.o m32r/m32r2.o \
 647 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/cpu2.o m32r/decode2.o \
 648 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/model2.o m32r/mloop2.o \
 649 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/sim-if.o m32r/traps.o
 650 @SIM_ENABLE_ARCH_m32r_TRUE@am_m32r_libsim_a_OBJECTS =  \
 651 @SIM_ENABLE_ARCH_m32r_TRUE@     $(am__objects_1)
 652 m32r_libsim_a_OBJECTS = $(am_m32r_libsim_a_OBJECTS)
 653 m68hc11_libsim_a_AR = $(AR) $(ARFLAGS)
 654 @SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11_libsim_a_DEPENDENCIES =  \
 655 @SIM_ENABLE_ARCH_m68hc11_TRUE@  m68hc11/interp.o \
 656 @SIM_ENABLE_ARCH_m68hc11_TRUE@  m68hc11/m68hc11int.o \
 657 @SIM_ENABLE_ARCH_m68hc11_TRUE@  m68hc11/m68hc12int.o \
 658 @SIM_ENABLE_ARCH_m68hc11_TRUE@  m68hc11/emulos.o \
 659 @SIM_ENABLE_ARCH_m68hc11_TRUE@  m68hc11/interrupts.o \
 660 @SIM_ENABLE_ARCH_m68hc11_TRUE@  m68hc11/m68hc11_sim.o $(patsubst \
 661 @SIM_ENABLE_ARCH_m68hc11_TRUE@  %,m68hc11/%,$(SIM_NEW_COMMON_OBJS)) \
 662 @SIM_ENABLE_ARCH_m68hc11_TRUE@  $(patsubst \
 663 @SIM_ENABLE_ARCH_m68hc11_TRUE@  %,m68hc11/dv-%.o,$(SIM_HW_DEVICES)) \
 664 @SIM_ENABLE_ARCH_m68hc11_TRUE@  $(patsubst \
 665 @SIM_ENABLE_ARCH_m68hc11_TRUE@  %,m68hc11/dv-%.o,$(m68hc11_SIM_EXTRA_HW_DEVICES)) \
 666 @SIM_ENABLE_ARCH_m68hc11_TRUE@  m68hc11/modules.o \
 667 @SIM_ENABLE_ARCH_m68hc11_TRUE@  m68hc11/sim-resume.o
 668 @SIM_ENABLE_ARCH_m68hc11_TRUE@am_m68hc11_libsim_a_OBJECTS =  \
 669 @SIM_ENABLE_ARCH_m68hc11_TRUE@  $(am__objects_1)
 670 m68hc11_libsim_a_OBJECTS = $(am_m68hc11_libsim_a_OBJECTS)
 671 mcore_libsim_a_AR = $(AR) $(ARFLAGS)
 672 @SIM_ENABLE_ARCH_mcore_TRUE@mcore_libsim_a_DEPENDENCIES =  \
 673 @SIM_ENABLE_ARCH_mcore_TRUE@    mcore/interp.o $(patsubst \
 674 @SIM_ENABLE_ARCH_mcore_TRUE@    %,mcore/%,$(SIM_NEW_COMMON_OBJS)) \
 675 @SIM_ENABLE_ARCH_mcore_TRUE@    $(patsubst \
 676 @SIM_ENABLE_ARCH_mcore_TRUE@    %,mcore/dv-%.o,$(SIM_HW_DEVICES)) \
 677 @SIM_ENABLE_ARCH_mcore_TRUE@    mcore/modules.o mcore/sim-resume.o
 678 @SIM_ENABLE_ARCH_mcore_TRUE@am_mcore_libsim_a_OBJECTS =  \
 679 @SIM_ENABLE_ARCH_mcore_TRUE@    $(am__objects_1)
 680 mcore_libsim_a_OBJECTS = $(am_mcore_libsim_a_OBJECTS)
 681 microblaze_libsim_a_AR = $(AR) $(ARFLAGS)
 682 @SIM_ENABLE_ARCH_microblaze_TRUE@microblaze_libsim_a_DEPENDENCIES =  \
 683 @SIM_ENABLE_ARCH_microblaze_TRUE@       microblaze/interp.o \
 684 @SIM_ENABLE_ARCH_microblaze_TRUE@       $(patsubst \
 685 @SIM_ENABLE_ARCH_microblaze_TRUE@       %,microblaze/%,$(SIM_NEW_COMMON_OBJS)) \
 686 @SIM_ENABLE_ARCH_microblaze_TRUE@       $(patsubst \
 687 @SIM_ENABLE_ARCH_microblaze_TRUE@       %,microblaze/dv-%.o,$(SIM_HW_DEVICES)) \
 688 @SIM_ENABLE_ARCH_microblaze_TRUE@       microblaze/modules.o \
 689 @SIM_ENABLE_ARCH_microblaze_TRUE@       microblaze/sim-resume.o
 690 @SIM_ENABLE_ARCH_microblaze_TRUE@am_microblaze_libsim_a_OBJECTS =  \
 691 @SIM_ENABLE_ARCH_microblaze_TRUE@       $(am__objects_1)
 692 microblaze_libsim_a_OBJECTS = $(am_microblaze_libsim_a_OBJECTS)
 693 mips_libsim_a_AR = $(AR) $(ARFLAGS)
 694 am__DEPENDENCIES_1 =
 695 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_MULTI_TRUE@am__DEPENDENCIES_2 = $(am__DEPENDENCIES_1) \
 696 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_MULTI_TRUE@       mips/itable.o \
 697 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_MULTI_TRUE@       mips/multi-run.o
 698 @SIM_ENABLE_ARCH_mips_TRUE@am__DEPENDENCIES_3 = $(am__append_71) \
 699 @SIM_ENABLE_ARCH_mips_TRUE@     $(am__append_72) \
 700 @SIM_ENABLE_ARCH_mips_TRUE@     $(am__DEPENDENCIES_2)
 701 @SIM_ENABLE_ARCH_mips_TRUE@mips_libsim_a_DEPENDENCIES = mips/interp.o \
 702 @SIM_ENABLE_ARCH_mips_TRUE@     $(am__DEPENDENCIES_3) $(patsubst \
 703 @SIM_ENABLE_ARCH_mips_TRUE@     %,mips/%,$(SIM_NEW_COMMON_OBJS)) \
 704 @SIM_ENABLE_ARCH_mips_TRUE@     $(patsubst \
 705 @SIM_ENABLE_ARCH_mips_TRUE@     %,mips/dv-%.o,$(SIM_HW_DEVICES)) \
 706 @SIM_ENABLE_ARCH_mips_TRUE@     $(patsubst \
 707 @SIM_ENABLE_ARCH_mips_TRUE@     %,mips/dv-%.o,$(mips_SIM_EXTRA_HW_DEVICES)) \
 708 @SIM_ENABLE_ARCH_mips_TRUE@     mips/cp1.o mips/dsp.o mips/mdmx.o \
 709 @SIM_ENABLE_ARCH_mips_TRUE@     mips/modules.o mips/sim-main.o \
 710 @SIM_ENABLE_ARCH_mips_TRUE@     mips/sim-resume.o
 711 @SIM_ENABLE_ARCH_mips_TRUE@am_mips_libsim_a_OBJECTS =  \
 712 @SIM_ENABLE_ARCH_mips_TRUE@     $(am__objects_1)
 713 mips_libsim_a_OBJECTS = $(am_mips_libsim_a_OBJECTS)
 714 mn10300_libsim_a_AR = $(AR) $(ARFLAGS)
 715 @SIM_ENABLE_ARCH_mn10300_TRUE@mn10300_libsim_a_DEPENDENCIES =  \
 716 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/itable.o \
 717 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/semantics.o \
 718 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/idecode.o \
 719 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/icache.o \
 720 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/engine.o mn10300/irun.o \
 721 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/support.o $(patsubst \
 722 @SIM_ENABLE_ARCH_mn10300_TRUE@  %,mn10300/%,$(SIM_NEW_COMMON_OBJS)) \
 723 @SIM_ENABLE_ARCH_mn10300_TRUE@  $(patsubst \
 724 @SIM_ENABLE_ARCH_mn10300_TRUE@  %,mn10300/dv-%.o,$(SIM_HW_DEVICES)) \
 725 @SIM_ENABLE_ARCH_mn10300_TRUE@  $(patsubst \
 726 @SIM_ENABLE_ARCH_mn10300_TRUE@  %,mn10300/dv-%.o,$(mn10300_SIM_EXTRA_HW_DEVICES)) \
 727 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/interp.o \
 728 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/modules.o \
 729 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/op_utils.o \
 730 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/sim-resume.o
 731 @SIM_ENABLE_ARCH_mn10300_TRUE@am_mn10300_libsim_a_OBJECTS =  \
 732 @SIM_ENABLE_ARCH_mn10300_TRUE@  $(am__objects_1)
 733 mn10300_libsim_a_OBJECTS = $(am_mn10300_libsim_a_OBJECTS)
 734 moxie_libsim_a_AR = $(AR) $(ARFLAGS)
 735 @SIM_ENABLE_ARCH_moxie_TRUE@moxie_libsim_a_DEPENDENCIES = $(patsubst \
 736 @SIM_ENABLE_ARCH_moxie_TRUE@    %,moxie/%,$(SIM_NEW_COMMON_OBJS)) \
 737 @SIM_ENABLE_ARCH_moxie_TRUE@    $(patsubst \
 738 @SIM_ENABLE_ARCH_moxie_TRUE@    %,moxie/dv-%.o,$(SIM_HW_DEVICES)) \
 739 @SIM_ENABLE_ARCH_moxie_TRUE@    moxie/interp.o moxie/modules.o \
 740 @SIM_ENABLE_ARCH_moxie_TRUE@    moxie/sim-resume.o
 741 @SIM_ENABLE_ARCH_moxie_TRUE@am_moxie_libsim_a_OBJECTS =  \
 742 @SIM_ENABLE_ARCH_moxie_TRUE@    $(am__objects_1)
 743 moxie_libsim_a_OBJECTS = $(am_moxie_libsim_a_OBJECTS)
 744 msp430_libsim_a_AR = $(AR) $(ARFLAGS)
 745 @SIM_ENABLE_ARCH_msp430_TRUE@msp430_libsim_a_DEPENDENCIES =  \
 746 @SIM_ENABLE_ARCH_msp430_TRUE@   $(patsubst \
 747 @SIM_ENABLE_ARCH_msp430_TRUE@   %,msp430/%,$(SIM_NEW_COMMON_OBJS)) \
 748 @SIM_ENABLE_ARCH_msp430_TRUE@   $(patsubst \
 749 @SIM_ENABLE_ARCH_msp430_TRUE@   %,msp430/dv-%.o,$(SIM_HW_DEVICES)) \
 750 @SIM_ENABLE_ARCH_msp430_TRUE@   msp430/msp430-sim.o \
 751 @SIM_ENABLE_ARCH_msp430_TRUE@   msp430/modules.o \
 752 @SIM_ENABLE_ARCH_msp430_TRUE@   msp430/sim-resume.o
 753 @SIM_ENABLE_ARCH_msp430_TRUE@am_msp430_libsim_a_OBJECTS =  \
 754 @SIM_ENABLE_ARCH_msp430_TRUE@   $(am__objects_1)
 755 msp430_libsim_a_OBJECTS = $(am_msp430_libsim_a_OBJECTS)
 756 or1k_libsim_a_AR = $(AR) $(ARFLAGS)
 757 @SIM_ENABLE_ARCH_or1k_TRUE@or1k_libsim_a_DEPENDENCIES = $(patsubst \
 758 @SIM_ENABLE_ARCH_or1k_TRUE@     %,or1k/%,$(SIM_NEW_COMMON_OBJS)) \
 759 @SIM_ENABLE_ARCH_or1k_TRUE@     $(patsubst \
 760 @SIM_ENABLE_ARCH_or1k_TRUE@     %,or1k/dv-%.o,$(SIM_HW_DEVICES)) \
 761 @SIM_ENABLE_ARCH_or1k_TRUE@     or1k/modules.o or1k/cgen-accfp.o \
 762 @SIM_ENABLE_ARCH_or1k_TRUE@     or1k/cgen-fpu.o or1k/cgen-run.o \
 763 @SIM_ENABLE_ARCH_or1k_TRUE@     or1k/cgen-scache.o \
 764 @SIM_ENABLE_ARCH_or1k_TRUE@     or1k/cgen-trace.o or1k/cgen-utils.o \
 765 @SIM_ENABLE_ARCH_or1k_TRUE@     or1k/arch.o or1k/cpu.o \
 766 @SIM_ENABLE_ARCH_or1k_TRUE@     or1k/decode.o or1k/mloop.o \
 767 @SIM_ENABLE_ARCH_or1k_TRUE@     or1k/model.o or1k/sem.o or1k/or1k.o \
 768 @SIM_ENABLE_ARCH_or1k_TRUE@     or1k/sim-if.o or1k/traps.o
 769 @SIM_ENABLE_ARCH_or1k_TRUE@am_or1k_libsim_a_OBJECTS =  \
 770 @SIM_ENABLE_ARCH_or1k_TRUE@     $(am__objects_1)
 771 or1k_libsim_a_OBJECTS = $(am_or1k_libsim_a_OBJECTS)
 772 pru_libsim_a_AR = $(AR) $(ARFLAGS)
 773 @SIM_ENABLE_ARCH_pru_TRUE@pru_libsim_a_DEPENDENCIES = $(patsubst \
 774 @SIM_ENABLE_ARCH_pru_TRUE@      %,pru/%,$(SIM_NEW_COMMON_OBJS)) \
 775 @SIM_ENABLE_ARCH_pru_TRUE@      $(patsubst \
 776 @SIM_ENABLE_ARCH_pru_TRUE@      %,pru/dv-%.o,$(SIM_HW_DEVICES)) \
 777 @SIM_ENABLE_ARCH_pru_TRUE@      pru/interp.o pru/modules.o \
 778 @SIM_ENABLE_ARCH_pru_TRUE@      pru/sim-resume.o
 779 @SIM_ENABLE_ARCH_pru_TRUE@am_pru_libsim_a_OBJECTS = $(am__objects_1)
 780 pru_libsim_a_OBJECTS = $(am_pru_libsim_a_OBJECTS)
 781 riscv_libsim_a_AR = $(AR) $(ARFLAGS)
 782 @SIM_ENABLE_ARCH_riscv_TRUE@riscv_libsim_a_DEPENDENCIES = $(patsubst \
 783 @SIM_ENABLE_ARCH_riscv_TRUE@    %,riscv/%,$(SIM_NEW_COMMON_OBJS)) \
 784 @SIM_ENABLE_ARCH_riscv_TRUE@    $(patsubst \
 785 @SIM_ENABLE_ARCH_riscv_TRUE@    %,riscv/dv-%.o,$(SIM_HW_DEVICES)) \
 786 @SIM_ENABLE_ARCH_riscv_TRUE@    riscv/interp.o riscv/machs.o \
 787 @SIM_ENABLE_ARCH_riscv_TRUE@    riscv/modules.o riscv/sim-main.o \
 788 @SIM_ENABLE_ARCH_riscv_TRUE@    riscv/sim-resume.o
 789 @SIM_ENABLE_ARCH_riscv_TRUE@am_riscv_libsim_a_OBJECTS =  \
 790 @SIM_ENABLE_ARCH_riscv_TRUE@    $(am__objects_1)
 791 riscv_libsim_a_OBJECTS = $(am_riscv_libsim_a_OBJECTS)
 792 rl78_libsim_a_AR = $(AR) $(ARFLAGS)
 793 @SIM_ENABLE_ARCH_rl78_TRUE@rl78_libsim_a_DEPENDENCIES = rl78/load.o \
 794 @SIM_ENABLE_ARCH_rl78_TRUE@     rl78/mem.o rl78/cpu.o rl78/rl78.o \
 795 @SIM_ENABLE_ARCH_rl78_TRUE@     rl78/gdb-if.o rl78/modules.o \
 796 @SIM_ENABLE_ARCH_rl78_TRUE@     rl78/trace.o
 797 @SIM_ENABLE_ARCH_rl78_TRUE@am_rl78_libsim_a_OBJECTS =  \
 798 @SIM_ENABLE_ARCH_rl78_TRUE@     $(am__objects_1)
 799 rl78_libsim_a_OBJECTS = $(am_rl78_libsim_a_OBJECTS)
 800 rx_libsim_a_AR = $(AR) $(ARFLAGS)
 801 @SIM_ENABLE_ARCH_rx_TRUE@rx_libsim_a_DEPENDENCIES = rx/fpu.o rx/load.o \
 802 @SIM_ENABLE_ARCH_rx_TRUE@       rx/mem.o rx/misc.o rx/reg.o rx/rx.o \
 803 @SIM_ENABLE_ARCH_rx_TRUE@       rx/syscalls.o rx/trace.o rx/gdb-if.o \
 804 @SIM_ENABLE_ARCH_rx_TRUE@       rx/err.o rx/modules.o
 805 @SIM_ENABLE_ARCH_rx_TRUE@am_rx_libsim_a_OBJECTS = $(am__objects_1)
 806 rx_libsim_a_OBJECTS = $(am_rx_libsim_a_OBJECTS)
 807 sh_libsim_a_AR = $(AR) $(ARFLAGS)
 808 @SIM_ENABLE_ARCH_sh_TRUE@sh_libsim_a_DEPENDENCIES = sh/interp.o \
 809 @SIM_ENABLE_ARCH_sh_TRUE@       $(patsubst \
 810 @SIM_ENABLE_ARCH_sh_TRUE@       %,sh/%,$(SIM_NEW_COMMON_OBJS)) \
 811 @SIM_ENABLE_ARCH_sh_TRUE@       $(patsubst \
 812 @SIM_ENABLE_ARCH_sh_TRUE@       %,sh/dv-%.o,$(SIM_HW_DEVICES)) \
 813 @SIM_ENABLE_ARCH_sh_TRUE@       sh/modules.o sh/table.o
 814 @SIM_ENABLE_ARCH_sh_TRUE@am_sh_libsim_a_OBJECTS = $(am__objects_1)
 815 sh_libsim_a_OBJECTS = $(am_sh_libsim_a_OBJECTS)
 816 v850_libsim_a_AR = $(AR) $(ARFLAGS)
 817 @SIM_ENABLE_ARCH_v850_TRUE@v850_libsim_a_DEPENDENCIES = $(patsubst \
 818 @SIM_ENABLE_ARCH_v850_TRUE@     %,v850/%,$(SIM_NEW_COMMON_OBJS)) \
 819 @SIM_ENABLE_ARCH_v850_TRUE@     $(patsubst \
 820 @SIM_ENABLE_ARCH_v850_TRUE@     %,v850/dv-%.o,$(SIM_HW_DEVICES)) \
 821 @SIM_ENABLE_ARCH_v850_TRUE@     v850/simops.o v850/interp.o \
 822 @SIM_ENABLE_ARCH_v850_TRUE@     v850/itable.o v850/semantics.o \
 823 @SIM_ENABLE_ARCH_v850_TRUE@     v850/idecode.o v850/icache.o \
 824 @SIM_ENABLE_ARCH_v850_TRUE@     v850/engine.o v850/irun.o \
 825 @SIM_ENABLE_ARCH_v850_TRUE@     v850/support.o v850/modules.o \
 826 @SIM_ENABLE_ARCH_v850_TRUE@     v850/sim-resume.o
 827 @SIM_ENABLE_ARCH_v850_TRUE@am_v850_libsim_a_OBJECTS =  \
 828 @SIM_ENABLE_ARCH_v850_TRUE@     $(am__objects_1)
 829 v850_libsim_a_OBJECTS = $(am_v850_libsim_a_OBJECTS)
 830 @SIM_ENABLE_IGEN_TRUE@am__EXEEXT_1 = $(IGEN) igen/filter$(EXEEXT) \
 831 @SIM_ENABLE_IGEN_TRUE@  igen/gen$(EXEEXT) igen/ld-cache$(EXEEXT) \
 832 @SIM_ENABLE_IGEN_TRUE@  igen/ld-decode$(EXEEXT) \
 833 @SIM_ENABLE_IGEN_TRUE@  igen/ld-insn$(EXEEXT) \
 834 @SIM_ENABLE_IGEN_TRUE@  igen/table$(EXEEXT)
 835 @SIM_ENABLE_IGEN_TRUE@am__EXEEXT_2 = $(am__EXEEXT_1)
 836 @SIM_ENABLE_ARCH_cr16_TRUE@am__EXEEXT_3 = cr16/gencode$(EXEEXT)
 837 @SIM_ENABLE_ARCH_d10v_TRUE@am__EXEEXT_4 = d10v/gencode$(EXEEXT)
 838 @SIM_ENABLE_ARCH_m32c_TRUE@am__EXEEXT_5 = m32c/opc2c$(EXEEXT)
 839 @SIM_ENABLE_ARCH_m68hc11_TRUE@am__EXEEXT_6 = m68hc11/gencode$(EXEEXT)
 840 @SIM_ENABLE_ARCH_sh_TRUE@am__EXEEXT_7 = sh/gencode$(EXEEXT)
 841 am__EXEEXT_8 = testsuite/common/bits32m0$(EXEEXT) \
 842         testsuite/common/bits32m31$(EXEEXT) \
 843         testsuite/common/bits64m0$(EXEEXT) \
 844         testsuite/common/bits64m63$(EXEEXT) \
 845         testsuite/common/alu-tst$(EXEEXT)
 846 @SIM_ENABLE_ARCH_cris_TRUE@am__EXEEXT_9 = cris/rvdummy$(EXEEXT)
 847 @SIM_ENABLE_ARCH_aarch64_TRUE@am__EXEEXT_10 = aarch64/run$(EXEEXT)
 848 @SIM_ENABLE_ARCH_arm_TRUE@am__EXEEXT_11 = arm/run$(EXEEXT)
 849 @SIM_ENABLE_ARCH_avr_TRUE@am__EXEEXT_12 = avr/run$(EXEEXT)
 850 @SIM_ENABLE_ARCH_bfin_TRUE@am__EXEEXT_13 = bfin/run$(EXEEXT)
 851 @SIM_ENABLE_ARCH_bpf_TRUE@am__EXEEXT_14 = bpf/run$(EXEEXT)
 852 @SIM_ENABLE_ARCH_cr16_TRUE@am__EXEEXT_15 = cr16/run$(EXEEXT)
 853 @SIM_ENABLE_ARCH_cris_TRUE@am__EXEEXT_16 = cris/run$(EXEEXT)
 854 @SIM_ENABLE_ARCH_d10v_TRUE@am__EXEEXT_17 = d10v/run$(EXEEXT)
 855 @SIM_ENABLE_ARCH_erc32_TRUE@am__EXEEXT_18 = erc32/run$(EXEEXT) \
 856 @SIM_ENABLE_ARCH_erc32_TRUE@    erc32/sis$(EXEEXT)
 857 @SIM_ENABLE_ARCH_examples_TRUE@am__EXEEXT_19 =  \
 858 @SIM_ENABLE_ARCH_examples_TRUE@ example-synacor/run$(EXEEXT)
 859 @SIM_ENABLE_ARCH_frv_TRUE@am__EXEEXT_20 = frv/run$(EXEEXT)
 860 @SIM_ENABLE_ARCH_ft32_TRUE@am__EXEEXT_21 = ft32/run$(EXEEXT)
 861 @SIM_ENABLE_ARCH_h8300_TRUE@am__EXEEXT_22 = h8300/run$(EXEEXT)
 862 @SIM_ENABLE_ARCH_iq2000_TRUE@am__EXEEXT_23 = iq2000/run$(EXEEXT)
 863 @SIM_ENABLE_ARCH_lm32_TRUE@am__EXEEXT_24 = lm32/run$(EXEEXT)
 864 @SIM_ENABLE_ARCH_m32c_TRUE@am__EXEEXT_25 = m32c/run$(EXEEXT)
 865 @SIM_ENABLE_ARCH_m32r_TRUE@am__EXEEXT_26 = m32r/run$(EXEEXT)
 866 @SIM_ENABLE_ARCH_m68hc11_TRUE@am__EXEEXT_27 = m68hc11/run$(EXEEXT)
 867 @SIM_ENABLE_ARCH_mcore_TRUE@am__EXEEXT_28 = mcore/run$(EXEEXT)
 868 @SIM_ENABLE_ARCH_microblaze_TRUE@am__EXEEXT_29 =  \
 869 @SIM_ENABLE_ARCH_microblaze_TRUE@       microblaze/run$(EXEEXT)
 870 @SIM_ENABLE_ARCH_mips_TRUE@am__EXEEXT_30 = mips/run$(EXEEXT)
 871 @SIM_ENABLE_ARCH_mn10300_TRUE@am__EXEEXT_31 = mn10300/run$(EXEEXT)
 872 @SIM_ENABLE_ARCH_moxie_TRUE@am__EXEEXT_32 = moxie/run$(EXEEXT)
 873 @SIM_ENABLE_ARCH_msp430_TRUE@am__EXEEXT_33 = msp430/run$(EXEEXT)
 874 @SIM_ENABLE_ARCH_or1k_TRUE@am__EXEEXT_34 = or1k/run$(EXEEXT)
 875 @SIM_ENABLE_ARCH_ppc_TRUE@am__EXEEXT_35 = ppc/run$(EXEEXT) \
 876 @SIM_ENABLE_ARCH_ppc_TRUE@      ppc/psim$(EXEEXT)
 877 @SIM_ENABLE_ARCH_pru_TRUE@am__EXEEXT_36 = pru/run$(EXEEXT)
 878 @SIM_ENABLE_ARCH_riscv_TRUE@am__EXEEXT_37 = riscv/run$(EXEEXT)
 879 @SIM_ENABLE_ARCH_rl78_TRUE@am__EXEEXT_38 = rl78/run$(EXEEXT)
 880 @SIM_ENABLE_ARCH_rx_TRUE@am__EXEEXT_39 = rx/run$(EXEEXT)
 881 @SIM_ENABLE_ARCH_sh_TRUE@am__EXEEXT_40 = sh/run$(EXEEXT)
 882 @SIM_ENABLE_ARCH_v850_TRUE@am__EXEEXT_41 = v850/run$(EXEEXT)
 883 PROGRAMS = $(noinst_PROGRAMS)
 884 am_aarch64_run_OBJECTS =
 885 aarch64_run_OBJECTS = $(am_aarch64_run_OBJECTS)
 886 am__DEPENDENCIES_4 = $(BFD_LIB) $(OPCODES_LIB) $(LIBIBERTY_LIB)
 887 @SIM_ENABLE_ARCH_aarch64_TRUE@aarch64_run_DEPENDENCIES =  \
 888 @SIM_ENABLE_ARCH_aarch64_TRUE@  aarch64/nrun.o aarch64/libsim.a \
 889 @SIM_ENABLE_ARCH_aarch64_TRUE@  $(am__DEPENDENCIES_4)
 890 AM_V_lt = $(am__v_lt_@AM_V@)
 891 am__v_lt_ = $(am__v_lt_@AM_DEFAULT_V@)
 892 am__v_lt_0 = --silent
 893 am__v_lt_1 =
 894 am_arm_run_OBJECTS =
 895 arm_run_OBJECTS = $(am_arm_run_OBJECTS)
 896 @SIM_ENABLE_ARCH_arm_TRUE@arm_run_DEPENDENCIES = arm/nrun.o \
 897 @SIM_ENABLE_ARCH_arm_TRUE@      arm/libsim.a $(am__DEPENDENCIES_4)
 898 am_avr_run_OBJECTS =
 899 avr_run_OBJECTS = $(am_avr_run_OBJECTS)
 900 @SIM_ENABLE_ARCH_avr_TRUE@avr_run_DEPENDENCIES = avr/nrun.o \
 901 @SIM_ENABLE_ARCH_avr_TRUE@      avr/libsim.a $(am__DEPENDENCIES_4)
 902 am_bfin_run_OBJECTS =
 903 bfin_run_OBJECTS = $(am_bfin_run_OBJECTS)
 904 @SIM_ENABLE_ARCH_bfin_TRUE@bfin_run_DEPENDENCIES = bfin/nrun.o \
 905 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin/libsim.a $(am__DEPENDENCIES_4)
 906 am_bpf_run_OBJECTS =
 907 bpf_run_OBJECTS = $(am_bpf_run_OBJECTS)
 908 @SIM_ENABLE_ARCH_bpf_TRUE@bpf_run_DEPENDENCIES = bpf/nrun.o \
 909 @SIM_ENABLE_ARCH_bpf_TRUE@      bpf/libsim.a $(am__DEPENDENCIES_4)
 910 @SIM_ENABLE_ARCH_cr16_TRUE@am_cr16_gencode_OBJECTS =  \
 911 @SIM_ENABLE_ARCH_cr16_TRUE@     cr16/gencode.$(OBJEXT)
 912 cr16_gencode_OBJECTS = $(am_cr16_gencode_OBJECTS)
 913 @SIM_ENABLE_ARCH_cr16_TRUE@cr16_gencode_DEPENDENCIES =  \
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1237 DATA = $(armdoc_DATA) $(dtb_DATA) $(erc32doc_DATA) $(frvdoc_DATA) \
1238         $(or1kdoc_DATA) $(ppcdoc_DATA) $(rxdoc_DATA)
1239 am__pkginclude_HEADERS_DIST = $(srcroot)/include/sim/callback.h \
1240         $(srcroot)/include/sim/sim.h
1241 HEADERS = $(pkginclude_HEADERS)
1242 RECURSIVE_CLEAN_TARGETS = mostlyclean-recursive clean-recursive \
1243   distclean-recursive maintainer-clean-recursive
1244 am__recursive_targets = \
1245   $(RECURSIVE_TARGETS) \
1246   $(RECURSIVE_CLEAN_TARGETS) \
1247   $(am__extra_recursive_targets)
1248 AM_RECURSIVE_TARGETS = $(am__recursive_targets:-recursive=) TAGS CTAGS \
1249         cscope check recheck
1250 am__tagged_files = $(HEADERS) $(SOURCES) $(TAGS_FILES) \
1251         $(LISP)config.h.in
1252 # Read a list of newline-separated strings from the standard input,
1253 # and print each of them once, without duplicates.  Input order is
1254 # *not* preserved.
1255 am__uniquify_input = $(AWK) '\
1256   BEGIN { nonempty = 0; } \
1257   { items[$$0] = 1; nonempty = 1; } \
1258   END { if (nonempty) { for (i in items) print i; }; } \
1259 '
1260 # Make sure the list of sources is unique.  This is necessary because,
1261 # e.g., the same source file might be shared among _SOURCES variables
1262 # for different programs/libraries.
1263 am__define_uniq_tagged_files = \
1264   list='$(am__tagged_files)'; \
1265   unique=`for i in $$list; do \
1266     if test -f "$$i"; then echo $$i; else echo $(srcdir)/$$i; fi; \
1267   done | $(am__uniquify_input)`
1268 ETAGS = etags
1269 CTAGS = ctags
1270 CSCOPE = cscope
1271 DEJATOOL = $(PACKAGE)
1272 RUNTESTDEFAULTFLAGS = --tool $$tool --srcdir $$srcdir
1273 EXPECT = expect
1274 RUNTEST = runtest
1275 am__tty_colors_dummy = \
1276   mgn= red= grn= lgn= blu= brg= std=; \
1277   am__color_tests=no
1278 am__tty_colors = { \
1279   $(am__tty_colors_dummy); \
1280   if test "X$(AM_COLOR_TESTS)" = Xno; then \
1281     am__color_tests=no; \
1282   elif test "X$(AM_COLOR_TESTS)" = Xalways; then \
1283     am__color_tests=yes; \
1284   elif test "X$$TERM" != Xdumb && { test -t 1; } 2>/dev/null; then \
1285     am__color_tests=yes; \
1286   fi; \
1287   if test $$am__color_tests = yes; then \
1288     red='\e[0;31m'; \
1289     grn='\e[0;32m'; \
1290     lgn='\e[1;32m'; \
1291     blu='\e[1;34m'; \
1292     mgn='\e[0;35m'; \
1293     brg='\e[1m'; \
1294     std='\e[m'; \
1295   fi; \
1296 }
1297 am__recheck_rx = ^[     ]*:recheck:[    ]*
1298 am__global_test_result_rx = ^[  ]*:global-test-result:[         ]*
1299 am__copy_in_global_log_rx = ^[  ]*:copy-in-global-log:[         ]*
1300 # A command that, given a newline-separated list of test names on the
1301 # standard input, print the name of the tests that are to be re-run
1302 # upon "make recheck".
1303 am__list_recheck_tests = $(AWK) '{ \
1304   recheck = 1; \
1305   while ((rc = (getline line < ($$0 ".trs"))) != 0) \
1306     { \
1307       if (rc < 0) \
1308         { \
1309           if ((getline line2 < ($$0 ".log")) < 0) \
1310             recheck = 0; \
1311           break; \
1312         } \
1313       else if (line ~ /$(am__recheck_rx)[nN][Oo]/) \
1314         { \
1315           recheck = 0; \
1316           break; \
1317         } \
1318       else if (line ~ /$(am__recheck_rx)[yY][eE][sS]/) \
1319         { \
1320           break; \
1321         } \
1322     }; \
1323   if (recheck) \
1324     print $$0; \
1325   close ($$0 ".trs"); \
1326   close ($$0 ".log"); \
1327 }'
1328 # A command that, given a newline-separated list of test names on the
1329 # standard input, create the global log from their .trs and .log files.
1330 am__create_global_log = $(AWK) ' \
1331 function fatal(msg) \
1332 { \
1333   print "fatal: making $@: " msg | "cat >&2"; \
1334   exit 1; \
1335 } \
1336 function rst_section(header) \
1337 { \
1338   print header; \
1339   len = length(header); \
1340   for (i = 1; i <= len; i = i + 1) \
1341     printf "="; \
1342   printf "\n\n"; \
1343 } \
1344 { \
1345   copy_in_global_log = 1; \
1346   global_test_result = "RUN"; \
1347   while ((rc = (getline line < ($$0 ".trs"))) != 0) \
1348     { \
1349       if (rc < 0) \
1350          fatal("failed to read from " $$0 ".trs"); \
1351       if (line ~ /$(am__global_test_result_rx)/) \
1352         { \
1353           sub("$(am__global_test_result_rx)", "", line); \
1354           sub("[        ]*$$", "", line); \
1355           global_test_result = line; \
1356         } \
1357       else if (line ~ /$(am__copy_in_global_log_rx)[nN][oO]/) \
1358         copy_in_global_log = 0; \
1359     }; \
1360   if (copy_in_global_log) \
1361     { \
1362       rst_section(global_test_result ": " $$0); \
1363       while ((rc = (getline line < ($$0 ".log"))) != 0) \
1364       { \
1365         if (rc < 0) \
1366           fatal("failed to read from " $$0 ".log"); \
1367         print line; \
1368       }; \
1369       printf "\n"; \
1370     }; \
1371   close ($$0 ".trs"); \
1372   close ($$0 ".log"); \
1373 }'
1374 # Restructured Text title.
1375 am__rst_title = { sed 's/.*/   &   /;h;s/./=/g;p;x;s/ *$$//;p;g' && echo; }
1376 # Solaris 10 'make', and several other traditional 'make' implementations,
1377 # pass "-e" to $(SHELL), and POSIX 2008 even requires this.  Work around it
1378 # by disabling -e (using the XSI extension "set +e") if it's set.
1379 am__sh_e_setup = case $$- in *e*) set +e;; esac
1380 # Default flags passed to test drivers.
1381 am__common_driver_flags = \
1382   --color-tests "$$am__color_tests" \
1383   --enable-hard-errors "$$am__enable_hard_errors" \
1384   --expect-failure "$$am__expect_failure"
1385 # To be inserted before the command running the test.  Creates the
1386 # directory for the log if needed.  Stores in $dir the directory
1387 # containing $f, in $tst the test, in $log the log.  Executes the
1388 # developer- defined test setup AM_TESTS_ENVIRONMENT (if any), and
1389 # passes TESTS_ENVIRONMENT.  Set up options for the wrapper that
1390 # will run the test scripts (or their associated LOG_COMPILER, if
1391 # thy have one).
1392 am__check_pre = \
1393 $(am__sh_e_setup);                                      \
1394 $(am__vpath_adj_setup) $(am__vpath_adj)                 \
1395 $(am__tty_colors);                                      \
1396 srcdir=$(srcdir); export srcdir;                        \
1397 case "$@" in                                            \
1398   */*) am__odir=`echo "./$@" | sed 's|/[^/]*$$||'`;;    \
1399     *) am__odir=.;;                                     \
1400 esac;                                                   \
1401 test "x$$am__odir" = x"." || test -d "$$am__odir"       \
1402   || $(MKDIR_P) "$$am__odir" || exit $$?;               \
1403 if test -f "./$$f"; then dir=./;                        \
1404 elif test -f "$$f"; then dir=;                          \
1405 else dir="$(srcdir)/"; fi;                              \
1406 tst=$$dir$$f; log='$@';                                 \
1407 if test -n '$(DISABLE_HARD_ERRORS)'; then               \
1408   am__enable_hard_errors=no;                            \
1409 else                                                    \
1410   am__enable_hard_errors=yes;                           \
1411 fi;                                                     \
1412 case " $(XFAIL_TESTS) " in                              \
1413   *[\ \ ]$$f[\ \        ]* | *[\ \      ]$$dir$$f[\ \   ]*) \
1414     am__expect_failure=yes;;                            \
1415   *)                                                    \
1416     am__expect_failure=no;;                             \
1417 esac;                                                   \
1418 $(AM_TESTS_ENVIRONMENT) $(TESTS_ENVIRONMENT)
1419 # A shell command to get the names of the tests scripts with any registered
1420 # extension removed (i.e., equivalently, the names of the test logs, with
1421 # the '.log' extension removed).  The result is saved in the shell variable
1422 # '$bases'.  This honors runtime overriding of TESTS and TEST_LOGS.  Sadly,
1423 # we cannot use something simpler, involving e.g., "$(TEST_LOGS:.log=)",
1424 # since that might cause problem with VPATH rewrites for suffix-less tests.
1425 # See also 'test-harness-vpath-rewrite.sh' and 'test-trs-basic.sh'.
1426 am__set_TESTS_bases = \
1427   bases='$(TEST_LOGS)'; \
1428   bases=`for i in $$bases; do echo $$i; done | sed 's/\.log$$//'`; \
1429   bases=`echo $$bases`
1430 RECHECK_LOGS = $(TEST_LOGS)
1431 TEST_SUITE_LOG = test-suite.log
1432 TEST_EXTENSIONS = @EXEEXT@ .test
1433 LOG_DRIVER = $(SHELL) $(top_srcdir)/../test-driver
1434 LOG_COMPILE = $(LOG_COMPILER) $(AM_LOG_FLAGS) $(LOG_FLAGS)
1435 am__set_b = \
1436   case '$@' in \
1437     */*) \
1438       case '$*' in \
1439         */*) b='$*';; \
1440           *) b=`echo '$@' | sed 's/\.log$$//'`; \
1441        esac;; \
1442     *) \
1443       b='$*';; \
1444   esac
1445 am__test_logs1 = $(TESTS:=.log)
1446 am__test_logs2 = $(am__test_logs1:@EXEEXT@.log=.log)
1447 TEST_LOGS = $(am__test_logs2:.test.log=.log)
1448 TEST_LOG_DRIVER = $(SHELL) $(top_srcdir)/../test-driver
1449 TEST_LOG_COMPILE = $(TEST_LOG_COMPILER) $(AM_TEST_LOG_FLAGS) \
1450         $(TEST_LOG_FLAGS)
1451 DIST_SUBDIRS = $(SUBDIRS)
1452 ACLOCAL = @ACLOCAL@
1453 AMTAR = @AMTAR@
1454 AM_DEFAULT_VERBOSITY = @AM_DEFAULT_VERBOSITY@
1455 AR = @AR@
1456 AR_FOR_BUILD = @AR_FOR_BUILD@
1457 AS_FOR_TARGET = @AS_FOR_TARGET@
1458 AS_FOR_TARGET_AARCH64 = @AS_FOR_TARGET_AARCH64@
1459 AS_FOR_TARGET_ARM = @AS_FOR_TARGET_ARM@
1460 AS_FOR_TARGET_AVR = @AS_FOR_TARGET_AVR@
1461 AS_FOR_TARGET_BFIN = @AS_FOR_TARGET_BFIN@
1462 AS_FOR_TARGET_BPF = @AS_FOR_TARGET_BPF@
1463 AS_FOR_TARGET_CR16 = @AS_FOR_TARGET_CR16@
1464 AS_FOR_TARGET_CRIS = @AS_FOR_TARGET_CRIS@
1465 AS_FOR_TARGET_D10V = @AS_FOR_TARGET_D10V@
1466 AS_FOR_TARGET_ERC32 = @AS_FOR_TARGET_ERC32@
1467 AS_FOR_TARGET_EXAMPLE_SYNACOR = @AS_FOR_TARGET_EXAMPLE_SYNACOR@
1468 AS_FOR_TARGET_FRV = @AS_FOR_TARGET_FRV@
1469 AS_FOR_TARGET_FT32 = @AS_FOR_TARGET_FT32@
1470 AS_FOR_TARGET_H8300 = @AS_FOR_TARGET_H8300@
1471 AS_FOR_TARGET_IQ2000 = @AS_FOR_TARGET_IQ2000@
1472 AS_FOR_TARGET_LM32 = @AS_FOR_TARGET_LM32@
1473 AS_FOR_TARGET_M32C = @AS_FOR_TARGET_M32C@
1474 AS_FOR_TARGET_M32R = @AS_FOR_TARGET_M32R@
1475 AS_FOR_TARGET_M68HC11 = @AS_FOR_TARGET_M68HC11@
1476 AS_FOR_TARGET_MCORE = @AS_FOR_TARGET_MCORE@
1477 AS_FOR_TARGET_MICROBLAZE = @AS_FOR_TARGET_MICROBLAZE@
1478 AS_FOR_TARGET_MIPS = @AS_FOR_TARGET_MIPS@
1479 AS_FOR_TARGET_MN10300 = @AS_FOR_TARGET_MN10300@
1480 AS_FOR_TARGET_MOXIE = @AS_FOR_TARGET_MOXIE@
1481 AS_FOR_TARGET_MSP430 = @AS_FOR_TARGET_MSP430@
1482 AS_FOR_TARGET_OR1K = @AS_FOR_TARGET_OR1K@
1483 AS_FOR_TARGET_PPC = @AS_FOR_TARGET_PPC@
1484 AS_FOR_TARGET_PRU = @AS_FOR_TARGET_PRU@
1485 AS_FOR_TARGET_RISCV = @AS_FOR_TARGET_RISCV@
1486 AS_FOR_TARGET_RL78 = @AS_FOR_TARGET_RL78@
1487 AS_FOR_TARGET_RX = @AS_FOR_TARGET_RX@
1488 AS_FOR_TARGET_SH = @AS_FOR_TARGET_SH@
1489 AS_FOR_TARGET_V850 = @AS_FOR_TARGET_V850@
1490 AUTOCONF = @AUTOCONF@
1491 AUTOHEADER = @AUTOHEADER@
1492 AUTOMAKE = @AUTOMAKE@
1493 AWK = @AWK@
1494 CC = @CC@
1495 CCDEPMODE = @CCDEPMODE@
1496 CC_FOR_BUILD = @CC_FOR_BUILD@
1497 CC_FOR_TARGET = @CC_FOR_TARGET@
1498 CC_FOR_TARGET_AARCH64 = @CC_FOR_TARGET_AARCH64@
1499 CC_FOR_TARGET_ARM = @CC_FOR_TARGET_ARM@
1500 CC_FOR_TARGET_AVR = @CC_FOR_TARGET_AVR@
1501 CC_FOR_TARGET_BFIN = @CC_FOR_TARGET_BFIN@
1502 CC_FOR_TARGET_BPF = @CC_FOR_TARGET_BPF@
1503 CC_FOR_TARGET_CR16 = @CC_FOR_TARGET_CR16@
1504 CC_FOR_TARGET_CRIS = @CC_FOR_TARGET_CRIS@
1505 CC_FOR_TARGET_D10V = @CC_FOR_TARGET_D10V@
1506 CC_FOR_TARGET_ERC32 = @CC_FOR_TARGET_ERC32@
1507 CC_FOR_TARGET_EXAMPLE_SYNACOR = @CC_FOR_TARGET_EXAMPLE_SYNACOR@
1508 CC_FOR_TARGET_FRV = @CC_FOR_TARGET_FRV@
1509 CC_FOR_TARGET_FT32 = @CC_FOR_TARGET_FT32@
1510 CC_FOR_TARGET_H8300 = @CC_FOR_TARGET_H8300@
1511 CC_FOR_TARGET_IQ2000 = @CC_FOR_TARGET_IQ2000@
1512 CC_FOR_TARGET_LM32 = @CC_FOR_TARGET_LM32@
1513 CC_FOR_TARGET_M32C = @CC_FOR_TARGET_M32C@
1514 CC_FOR_TARGET_M32R = @CC_FOR_TARGET_M32R@
1515 CC_FOR_TARGET_M68HC11 = @CC_FOR_TARGET_M68HC11@
1516 CC_FOR_TARGET_MCORE = @CC_FOR_TARGET_MCORE@
1517 CC_FOR_TARGET_MICROBLAZE = @CC_FOR_TARGET_MICROBLAZE@
1518 CC_FOR_TARGET_MIPS = @CC_FOR_TARGET_MIPS@
1519 CC_FOR_TARGET_MN10300 = @CC_FOR_TARGET_MN10300@
1520 CC_FOR_TARGET_MOXIE = @CC_FOR_TARGET_MOXIE@
1521 CC_FOR_TARGET_MSP430 = @CC_FOR_TARGET_MSP430@
1522 CC_FOR_TARGET_OR1K = @CC_FOR_TARGET_OR1K@
1523 CC_FOR_TARGET_PPC = @CC_FOR_TARGET_PPC@
1524 CC_FOR_TARGET_PRU = @CC_FOR_TARGET_PRU@
1525 CC_FOR_TARGET_RISCV = @CC_FOR_TARGET_RISCV@
1526 CC_FOR_TARGET_RL78 = @CC_FOR_TARGET_RL78@
1527 CC_FOR_TARGET_RX = @CC_FOR_TARGET_RX@
1528 CC_FOR_TARGET_SH = @CC_FOR_TARGET_SH@
1529 CC_FOR_TARGET_V850 = @CC_FOR_TARGET_V850@
1530 CFLAGS = @CFLAGS@
1531 CFLAGS_FOR_BUILD = @CFLAGS_FOR_BUILD@
1532 CGEN_MAINT = @CGEN_MAINT@
1533 CPP = @CPP@
1534 CPPFLAGS = @CPPFLAGS@
1535 CPPFLAGS_FOR_BUILD = @CPPFLAGS_FOR_BUILD@
1536 CYGPATH_W = @CYGPATH_W@
1537 C_DIALECT = @C_DIALECT@
1538 DEFS = @DEFS@
1539 DEPDIR = @DEPDIR@
1540 DSYMUTIL = @DSYMUTIL@
1541 DTC = @DTC@
1542 DUMPBIN = @DUMPBIN@
1543 ECHO_C = @ECHO_C@
1544 ECHO_N = @ECHO_N@
1545 ECHO_T = @ECHO_T@
1546 EGREP = @EGREP@
1547 EXEEXT = @EXEEXT@
1548 FGREP = @FGREP@
1549 GREP = @GREP@
1550 IGEN_FLAGS_SMP = @IGEN_FLAGS_SMP@
1551 INSTALL = @INSTALL@
1552 INSTALL_DATA = @INSTALL_DATA@
1553 INSTALL_PROGRAM = @INSTALL_PROGRAM@
1554 INSTALL_SCRIPT = @INSTALL_SCRIPT@
1555 INSTALL_STRIP_PROGRAM = @INSTALL_STRIP_PROGRAM@
1556 LD = @LD@
1557 LDFLAGS = @LDFLAGS@
1558 LDFLAGS_FOR_BUILD = @LDFLAGS_FOR_BUILD@
1559 LD_FOR_TARGET = @LD_FOR_TARGET@
1560 LD_FOR_TARGET_AARCH64 = @LD_FOR_TARGET_AARCH64@
1561 LD_FOR_TARGET_ARM = @LD_FOR_TARGET_ARM@
1562 LD_FOR_TARGET_AVR = @LD_FOR_TARGET_AVR@
1563 LD_FOR_TARGET_BFIN = @LD_FOR_TARGET_BFIN@
1564 LD_FOR_TARGET_BPF = @LD_FOR_TARGET_BPF@
1565 LD_FOR_TARGET_CR16 = @LD_FOR_TARGET_CR16@
1566 LD_FOR_TARGET_CRIS = @LD_FOR_TARGET_CRIS@
1567 LD_FOR_TARGET_D10V = @LD_FOR_TARGET_D10V@
1568 LD_FOR_TARGET_ERC32 = @LD_FOR_TARGET_ERC32@
1569 LD_FOR_TARGET_EXAMPLE_SYNACOR = @LD_FOR_TARGET_EXAMPLE_SYNACOR@
1570 LD_FOR_TARGET_FRV = @LD_FOR_TARGET_FRV@
1571 LD_FOR_TARGET_FT32 = @LD_FOR_TARGET_FT32@
1572 LD_FOR_TARGET_H8300 = @LD_FOR_TARGET_H8300@
1573 LD_FOR_TARGET_IQ2000 = @LD_FOR_TARGET_IQ2000@
1574 LD_FOR_TARGET_LM32 = @LD_FOR_TARGET_LM32@
1575 LD_FOR_TARGET_M32C = @LD_FOR_TARGET_M32C@
1576 LD_FOR_TARGET_M32R = @LD_FOR_TARGET_M32R@
1577 LD_FOR_TARGET_M68HC11 = @LD_FOR_TARGET_M68HC11@
1578 LD_FOR_TARGET_MCORE = @LD_FOR_TARGET_MCORE@
1579 LD_FOR_TARGET_MICROBLAZE = @LD_FOR_TARGET_MICROBLAZE@
1580 LD_FOR_TARGET_MIPS = @LD_FOR_TARGET_MIPS@
1581 LD_FOR_TARGET_MN10300 = @LD_FOR_TARGET_MN10300@
1582 LD_FOR_TARGET_MOXIE = @LD_FOR_TARGET_MOXIE@
1583 LD_FOR_TARGET_MSP430 = @LD_FOR_TARGET_MSP430@
1584 LD_FOR_TARGET_OR1K = @LD_FOR_TARGET_OR1K@
1585 LD_FOR_TARGET_PPC = @LD_FOR_TARGET_PPC@
1586 LD_FOR_TARGET_PRU = @LD_FOR_TARGET_PRU@
1587 LD_FOR_TARGET_RISCV = @LD_FOR_TARGET_RISCV@
1588 LD_FOR_TARGET_RL78 = @LD_FOR_TARGET_RL78@
1589 LD_FOR_TARGET_RX = @LD_FOR_TARGET_RX@
1590 LD_FOR_TARGET_SH = @LD_FOR_TARGET_SH@
1591 LD_FOR_TARGET_V850 = @LD_FOR_TARGET_V850@
1592 LIBOBJS = @LIBOBJS@
1593 LIBS = @LIBS@
1594 LIBTOOL = @LIBTOOL@
1595 LIPO = @LIPO@
1596 LN_S = @LN_S@
1597 LTLIBOBJS = @LTLIBOBJS@
1598 MAINT = @MAINT@
1599 MAKEINFO = @MAKEINFO@
1600 MKDIR_P = @MKDIR_P@
1601 NM = @NM@
1602 NMEDIT = @NMEDIT@
1603 OBJDUMP = @OBJDUMP@
1604 OBJEXT = @OBJEXT@
1605 OTOOL = @OTOOL@
1606 OTOOL64 = @OTOOL64@
1607 PACKAGE = @PACKAGE@
1608 PACKAGE_BUGREPORT = @PACKAGE_BUGREPORT@
1609 PACKAGE_NAME = @PACKAGE_NAME@
1610 PACKAGE_STRING = @PACKAGE_STRING@
1611 PACKAGE_TARNAME = @PACKAGE_TARNAME@
1612 PACKAGE_URL = @PACKAGE_URL@
1613 PACKAGE_VERSION = @PACKAGE_VERSION@
1614 PATH_SEPARATOR = @PATH_SEPARATOR@
1615 PKGVERSION = @PKGVERSION@
1616 PKG_CONFIG = @PKG_CONFIG@
1617 PKG_CONFIG_LIBDIR = @PKG_CONFIG_LIBDIR@
1618 PKG_CONFIG_PATH = @PKG_CONFIG_PATH@
1619 RANLIB = @RANLIB@
1620 RANLIB_FOR_BUILD = @RANLIB_FOR_BUILD@
1621 READLINE_CFLAGS = @READLINE_CFLAGS@
1622 READLINE_LIB = @READLINE_LIB@
1623 REPORT_BUGS_TEXI = @REPORT_BUGS_TEXI@
1624 REPORT_BUGS_TO = @REPORT_BUGS_TO@
1625 SDL_CFLAGS = @SDL_CFLAGS@
1626 SDL_LIBS = @SDL_LIBS@
1627 SED = @SED@
1628 SET_MAKE = @SET_MAKE@
1629 SHELL = @SHELL@
1630 SIM_ENABLED_ARCHES = @SIM_ENABLED_ARCHES@
1631 SIM_FRV_TRAPDUMP_FLAGS = @SIM_FRV_TRAPDUMP_FLAGS@
1632 SIM_HW_CFLAGS = @SIM_HW_CFLAGS@
1633 SIM_HW_SOCKSER = @SIM_HW_SOCKSER@
1634 SIM_INLINE = @SIM_INLINE@
1635 SIM_MIPS_BITSIZE = @SIM_MIPS_BITSIZE@
1636 SIM_MIPS_FPU_BITSIZE = @SIM_MIPS_FPU_BITSIZE@
1637 SIM_MIPS_GEN = @SIM_MIPS_GEN@
1638 SIM_MIPS_IGEN_ITABLE_FLAGS = @SIM_MIPS_IGEN_ITABLE_FLAGS@
1639 SIM_MIPS_M16_FLAGS = @SIM_MIPS_M16_FLAGS@
1640 SIM_MIPS_MULTI_IGEN_CONFIGS = @SIM_MIPS_MULTI_IGEN_CONFIGS@
1641 SIM_MIPS_MULTI_OBJ = @SIM_MIPS_MULTI_OBJ@
1642 SIM_MIPS_MULTI_SRC = @SIM_MIPS_MULTI_SRC@
1643 SIM_MIPS_SINGLE_FLAGS = @SIM_MIPS_SINGLE_FLAGS@
1644 SIM_MIPS_SUBTARGET = @SIM_MIPS_SUBTARGET@
1645 SIM_PRIMARY_TARGET = @SIM_PRIMARY_TARGET@
1646 SIM_RISCV_BITSIZE = @SIM_RISCV_BITSIZE@
1647 SIM_RX_CYCLE_ACCURATE_FLAGS = @SIM_RX_CYCLE_ACCURATE_FLAGS@
1648 SIM_TOOLCHAIN_VARS = @SIM_TOOLCHAIN_VARS@
1649 STRIP = @STRIP@
1650 TERMCAP_LIB = @TERMCAP_LIB@
1651 VERSION = @VERSION@
1652 WARN_CFLAGS = @WARN_CFLAGS@
1653 WERROR_CFLAGS = @WERROR_CFLAGS@
1654 abs_builddir = @abs_builddir@
1655 abs_srcdir = @abs_srcdir@
1656 abs_top_builddir = @abs_top_builddir@
1657 abs_top_srcdir = @abs_top_srcdir@
1658 ac_ct_CC = @ac_ct_CC@
1659 ac_ct_DUMPBIN = @ac_ct_DUMPBIN@
1660 am__include = @am__include@
1661 am__leading_dot = @am__leading_dot@
1662 am__quote = @am__quote@
1663 am__tar = @am__tar@
1664 am__untar = @am__untar@
1665 bindir = @bindir@
1666 build = @build@
1667 build_alias = @build_alias@
1668 build_cpu = @build_cpu@
1669 build_os = @build_os@
1670 build_vendor = @build_vendor@
1671 builddir = @builddir@
1672 cgen = @cgen@
1673 cgendir = @cgendir@
1674 datadir = @datadir@
1675 datarootdir = @datarootdir@
1676 docdir = @docdir@
1677 dvidir = @dvidir@
1678 exec_prefix = @exec_prefix@
1679 host = @host@
1680 host_alias = @host_alias@
1681 host_cpu = @host_cpu@
1682 host_os = @host_os@
1683 host_vendor = @host_vendor@
1684 htmldir = @htmldir@
1685 includedir = @includedir@
1686 infodir = @infodir@
1687 install_sh = @install_sh@
1688 libdir = @libdir@
1689 libexecdir = @libexecdir@
1690 localedir = @localedir@
1691 localstatedir = @localstatedir@
1692 mandir = @mandir@
1693 mkdir_p = @mkdir_p@
1694 oldincludedir = @oldincludedir@
1695 pdfdir = @pdfdir@
1696 prefix = @prefix@
1697 program_transform_name = @program_transform_name@
1698 psdir = @psdir@
1699 sbindir = @sbindir@
1700 sharedstatedir = @sharedstatedir@
1701 srcdir = @srcdir@
1702 subdirs = @subdirs@
1703 sysconfdir = @sysconfdir@
1704 target = @target@
1705 target_alias = @target_alias@
1706 target_cpu = @target_cpu@
1707 target_os = @target_os@
1708 target_vendor = @target_vendor@
1709 top_build_prefix = @top_build_prefix@
1710 top_builddir = @top_builddir@
1711 top_srcdir = @top_srcdir@
1712 AUTOMAKE_OPTIONS = dejagnu foreign no-dist subdir-objects
1713 ACLOCAL_AMFLAGS = -Im4 -I.. -I../config
1714 GNULIB_PARENT_DIR = ..
1715 srccom = $(srcdir)/common
1716 srcroot = $(srcdir)/..
1717 SUBDIRS = @subdirs@
1718 pkginclude_HEADERS = $(am__append_1)
1719 noinst_LIBRARIES = common/libcommon.a $(am__append_3) $(am__append_6) \
1720         $(am__append_8) $(am__append_10) $(am__append_12) \
1721         $(am__append_14) $(am__append_18) $(am__append_23) \
1722         $(am__append_28) $(am__append_33) $(am__append_37) \
1723         $(am__append_39) $(am__append_43) $(am__append_45) \
1724         $(am__append_47) $(am__append_51) $(am__append_55) \
1725         $(am__append_59) $(am__append_63) $(am__append_67) \
1726         $(am__append_69) $(am__append_74) $(am__append_82) \
1727         $(am__append_86) $(am__append_88) $(am__append_90) \
1728         $(am__append_96) $(am__append_98) $(am__append_100) \
1729         $(am__append_102) $(am__append_104) $(am__append_109)
1730 BUILT_SOURCES = $(am__append_16) $(am__append_20) $(am__append_26) \
1731         $(am__append_30) $(am__append_41) $(am__append_49) \
1732         $(am__append_53) $(am__append_61) $(am__append_76) \
1733         $(am__append_84) $(am__append_92) $(am__append_106) \
1734         $(am__append_111)
1735 CLEANFILES = common/version.c common/version.c-stamp \
1736         testsuite/common/bits-gen testsuite/common/bits32m0.c \
1737         testsuite/common/bits32m31.c testsuite/common/bits64m0.c \
1738         testsuite/common/bits64m63.c
1739 DISTCLEANFILES = $(am__append_81)
1740 MOSTLYCLEANFILES = core $(SIM_ENABLED_ARCHES:%=%/*.o) \
1741         $(SIM_ENABLED_ARCHES:%=%/hw-config.h) \
1742         $(SIM_ENABLED_ARCHES:%=%/stamp-hw) \
1743         $(common_GEN_MODULES_C_TARGETS) $(patsubst \
1744         %,%/stamp-modules,$(SIM_ENABLED_ARCHES)) $(am__append_5) \
1745         site-sim-config.exp testrun.log testrun.sum $(am__append_17) \
1746         $(am__append_22) $(am__append_27) $(am__append_32) \
1747         $(am__append_42) $(am__append_50) $(am__append_54) \
1748         $(am__append_58) $(am__append_62) $(am__append_66) \
1749         $(am__append_80) $(am__append_85) $(am__append_93) \
1750         $(am__append_108) $(am__append_112)
1751 AM_CFLAGS = \
1752         $(WERROR_CFLAGS) \
1753         $(WARN_CFLAGS) \
1754         $(AM_CFLAGS_$(subst -,_,$(@D))) \
1755         $(AM_CFLAGS_$(subst -,_,$(@D)_$(@F)))
1756
1757 AM_CPPFLAGS = $(INCGNU) -I$(srcroot) -I$(srcroot)/include -I../bfd \
1758         -I.. -I$(@D) -I$(srcdir)/$(@D) $(SIM_HW_CFLAGS) $(SIM_INLINE) \
1759         $(AM_CPPFLAGS_$(subst -,_,$(@D))) $(AM_CPPFLAGS_$(subst \
1760         -,_,$(@D)_$(@F))) -I$(srcdir)/common -DSIM_TOPDIR_BUILD
1761 AM_CPPFLAGS_FOR_BUILD = -I$(srcroot)/include $(SIM_HW_CFLAGS) \
1762         $(SIM_INLINE) -I$(srcdir)/common
1763 COMPILE_FOR_BUILD = $(CC_FOR_BUILD) $(AM_CPPFLAGS_FOR_BUILD) $(CPPFLAGS_FOR_BUILD) $(CFLAGS_FOR_BUILD)
1764 LINK_FOR_BUILD = $(CC_FOR_BUILD) $(CFLAGS_FOR_BUILD) $(LDFLAGS_FOR_BUILD) -o $@
1765 SIM_ALL_RECURSIVE_DEPS = $(common_GEN_MODULES_C_TARGETS) \
1766         $(am__append_94)
1767 SIM_INSTALL_DATA_LOCAL_DEPS =
1768 SIM_INSTALL_EXEC_LOCAL_DEPS = $(am__append_35)
1769 SIM_UNINSTALL_LOCAL_DEPS = $(am__append_36)
1770 SIM_DEPBASE = $(@D)/$(DEPDIR)/$(@F:.o=)
1771 SIM_COMPILE = \
1772         $(AM_V_CC)$(COMPILE) -MT $@ -MD -MP -MF $(SIM_DEPBASE).Tpo -c -o $@ $< && \
1773         $(am__mv) $(SIM_DEPBASE).Tpo $(SIM_DEPBASE).Po
1774
1775 AM_CPPFLAGS_common = -DSIM_COMMON_BUILD
1776 common_libcommon_a_SOURCES = \
1777         common/callback.c \
1778         common/portability.c \
1779         common/sim-load.c \
1780         common/syscall.c \
1781         common/target-newlib-errno.c \
1782         common/target-newlib-open.c \
1783         common/target-newlib-signal.c \
1784         common/target-newlib-syscall.c \
1785         common/version.c
1786
1787 SIM_COMMON_HW_OBJS = \
1788         hw-alloc.o \
1789         hw-base.o \
1790         hw-device.o \
1791         hw-events.o \
1792         hw-handles.o \
1793         hw-instances.o \
1794         hw-ports.o \
1795         hw-properties.o \
1796         hw-tree.o \
1797         sim-hw.o
1798
1799 SIM_NEW_COMMON_OBJS = sim-arange.o sim-bits.o sim-close.o \
1800         sim-command.o sim-config.o sim-core.o sim-cpu.o sim-endian.o \
1801         sim-engine.o sim-events.o sim-fpu.o sim-hload.o sim-hrw.o \
1802         sim-io.o sim-info.o sim-memopt.o sim-model.o sim-module.o \
1803         sim-options.o sim-profile.o sim-reason.o sim-reg.o \
1804         sim-signal.o sim-stop.o sim-syscall.o sim-trace.o sim-utils.o \
1805         sim-watch.o $(am__append_2)
1806 SIM_HW_DEVICES = cfi core pal glue
1807 am_arch_d = $(subst -,_,$(@D))
1808 GEN_MODULES_C_SRCS = \
1809         $(wildcard \
1810                 $(patsubst %,$(srcdir)/%,$($(am_arch_d)_libsim_a_SOURCES)) \
1811                 $(patsubst %.o,$(srcdir)/%.c,$($(am_arch_d)_libsim_a_OBJECTS) $($(am_arch_d)_libsim_a_LIBADD)) \
1812                 $(filter-out %.o,$(patsubst $(@D)/%.o,$(srcdir)/common/%.c,$($(am_arch_d)_libsim_a_LIBADD))))
1813
1814 common_GEN_MODULES_C_TARGETS = $(patsubst %,%/modules.c,$(filter-out ppc,$(SIM_ENABLED_ARCHES)))
1815 LIBIBERTY_LIB = ../libiberty/libiberty.a
1816 BFD_LIB = ../bfd/libbfd.la
1817 OPCODES_LIB = ../opcodes/libopcodes.la
1818 SIM_COMMON_LIBS = \
1819         $(BFD_LIB) \
1820         $(OPCODES_LIB) \
1821         $(LIBIBERTY_LIB) \
1822         $(LIBGNU) \
1823         $(LIBGNU_EXTRA_LIBS)
1824
1825 GUILE = $(or $(wildcard ../guile/libguile/guile),guile)
1826 CGEN = "$(GUILE) -l $(cgendir)/guile.scm -s"
1827 CGENFLAGS = -v
1828 CGEN_CPU_DIR = $(cgendir)/cpu
1829 CPU_DIR = $(srcroot)/cpu
1830 CGEN_ARCHFILE = $(CPU_DIR)/$(@D).cpu
1831 CGEN_READ_SCM = $(cgendir)/sim.scm
1832 CGEN_ARCH_SCM = $(cgendir)/sim-arch.scm
1833 CGEN_CPU_SCM = $(cgendir)/sim-cpu.scm $(cgendir)/sim-model.scm
1834 CGEN_DECODE_SCM = $(cgendir)/sim-decode.scm
1835 CGEN_DESC_SCM = $(cgendir)/desc.scm $(cgendir)/desc-cpu.scm
1836 CGEN_CPU_EXTR = /extr/
1837 CGEN_CPU_READ = /read/
1838 CGEN_CPU_WRITE = /write/
1839 CGEN_CPU_SEM = /sem/
1840 CGEN_CPU_SEMSW = /semsw/
1841 CGEN_WRAPPER = $(srccom)/cgen.sh
1842 CGEN_GEN_ARCH = \
1843         $(SHELL) $(CGEN_WRAPPER) arch $(srcdir)/$(@D) \
1844                 $(CGEN) $(cgendir) "$(CGENFLAGS)" \
1845                 $(@D) "$$FLAGS" ignored "$$isa" $$mach ignored \
1846                 $(CGEN_ARCHFILE) ignored
1847
1848 CGEN_GEN_CPU = \
1849         $(SHELL) $(CGEN_WRAPPER) cpu $(srcdir)/$(@D) \
1850                 $(CGEN) $(cgendir) "$(CGENFLAGS)" \
1851                 $(@D) "$$FLAGS" $$cpu "$$isa" $$mach "$$SUFFIX" \
1852                 $(CGEN_ARCHFILE) "$$EXTRAFILES"
1853
1854 CGEN_GEN_DEFS = \
1855         $(SHELL) $(CGEN_WRAPPER) defs $(srcdir)/$(@D) \
1856                 $(CGEN) $(cgendir) "$(CGENFLAGS)" \
1857                 $(@D) "$$FLAGS" $$cpu "$$isa" $$mach "$$SUFFIX" \
1858                 $(CGEN_ARCHFILE) ignored
1859
1860 CGEN_GEN_DECODE = \
1861         $(SHELL) $(CGEN_WRAPPER) decode $(srcdir)/$(@D) \
1862                 $(CGEN) $(cgendir) "$(CGENFLAGS)" \
1863                 $(@D) "$$FLAGS" $$cpu "$$isa" $$mach "$$SUFFIX" \
1864                 $(CGEN_ARCHFILE) "$$EXTRAFILES"
1865
1866 CGEN_GEN_CPU_DECODE = \
1867         $(SHELL) $(CGEN_WRAPPER) cpu-decode $(srcdir)/$(@D) \
1868                 $(CGEN) $(cgendir) "$(CGENFLAGS)" \
1869                 $(@D) "$$FLAGS" $$cpu "$$isa" $$mach "$$SUFFIX" \
1870                 $(CGEN_ARCHFILE) "$$EXTRAFILES"
1871
1872 CGEN_GEN_CPU_DESC = \
1873         $(SHELL) $(CGEN_WRAPPER) desc $(srcdir)/$(@D) \
1874                 $(CGEN) $(cgendir) "$(CGENFLAGS)" \
1875                 $(@D) "$$FLAGS" $$cpu "$$isa" $$mach "$$SUFFIX" \
1876                 $(CGEN_ARCHFILE) ignored $$opcfile
1877
1878
1879 # igen leaks memory, and therefore makes AddressSanitizer unhappy.  Disable
1880 # leak detection while running it.
1881 @SIM_ENABLE_IGEN_TRUE@IGEN = igen/igen$(EXEEXT)
1882 @SIM_ENABLE_IGEN_TRUE@IGEN_RUN = ASAN_OPTIONS=detect_leaks=0 $(IGEN) $(IGEN_FLAGS_SMP)
1883 @SIM_ENABLE_IGEN_TRUE@igen_libigen_a_SOURCES = \
1884 @SIM_ENABLE_IGEN_TRUE@  igen/table.c \
1885 @SIM_ENABLE_IGEN_TRUE@  igen/lf.c \
1886 @SIM_ENABLE_IGEN_TRUE@  igen/misc.c \
1887 @SIM_ENABLE_IGEN_TRUE@  igen/filter_host.c \
1888 @SIM_ENABLE_IGEN_TRUE@  igen/ld-decode.c \
1889 @SIM_ENABLE_IGEN_TRUE@  igen/ld-cache.c \
1890 @SIM_ENABLE_IGEN_TRUE@  igen/filter.c \
1891 @SIM_ENABLE_IGEN_TRUE@  igen/ld-insn.c \
1892 @SIM_ENABLE_IGEN_TRUE@  igen/gen-model.c \
1893 @SIM_ENABLE_IGEN_TRUE@  igen/gen-itable.c \
1894 @SIM_ENABLE_IGEN_TRUE@  igen/gen-icache.c \
1895 @SIM_ENABLE_IGEN_TRUE@  igen/gen-semantics.c \
1896 @SIM_ENABLE_IGEN_TRUE@  igen/gen-idecode.c \
1897 @SIM_ENABLE_IGEN_TRUE@  igen/gen-support.c \
1898 @SIM_ENABLE_IGEN_TRUE@  igen/gen-engine.c \
1899 @SIM_ENABLE_IGEN_TRUE@  igen/gen.c
1900
1901 @SIM_ENABLE_IGEN_TRUE@igen_igen_SOURCES = igen/igen.c
1902 @SIM_ENABLE_IGEN_TRUE@igen_igen_LDADD = igen/libigen.a
1903 @SIM_ENABLE_IGEN_TRUE@igen_filter_SOURCES =
1904 @SIM_ENABLE_IGEN_TRUE@igen_filter_LDADD = igen/filter-main.o igen/libigen.a
1905 @SIM_ENABLE_IGEN_TRUE@igen_gen_SOURCES =
1906 @SIM_ENABLE_IGEN_TRUE@igen_gen_LDADD = igen/gen-main.o igen/libigen.a
1907 @SIM_ENABLE_IGEN_TRUE@igen_ld_cache_SOURCES =
1908 @SIM_ENABLE_IGEN_TRUE@igen_ld_cache_LDADD = igen/ld-cache-main.o igen/libigen.a
1909 @SIM_ENABLE_IGEN_TRUE@igen_ld_decode_SOURCES =
1910 @SIM_ENABLE_IGEN_TRUE@igen_ld_decode_LDADD = igen/ld-decode-main.o igen/libigen.a
1911 @SIM_ENABLE_IGEN_TRUE@igen_ld_insn_SOURCES =
1912 @SIM_ENABLE_IGEN_TRUE@igen_ld_insn_LDADD = igen/ld-insn-main.o igen/libigen.a
1913 @SIM_ENABLE_IGEN_TRUE@igen_table_SOURCES =
1914 @SIM_ENABLE_IGEN_TRUE@igen_table_LDADD = igen/table-main.o igen/libigen.a
1915 @SIM_ENABLE_IGEN_TRUE@igen_IGEN_TOOLS = \
1916 @SIM_ENABLE_IGEN_TRUE@  $(IGEN) \
1917 @SIM_ENABLE_IGEN_TRUE@  igen/filter \
1918 @SIM_ENABLE_IGEN_TRUE@  igen/gen \
1919 @SIM_ENABLE_IGEN_TRUE@  igen/ld-cache \
1920 @SIM_ENABLE_IGEN_TRUE@  igen/ld-decode \
1921 @SIM_ENABLE_IGEN_TRUE@  igen/ld-insn \
1922 @SIM_ENABLE_IGEN_TRUE@  igen/table
1923
1924 EXTRA_DEJAGNU_SITE_CONFIG = site-sim-config.exp
1925
1926 # Custom verbose test variables that automake doesn't provide (yet?).
1927 AM_V_RUNTEST = $(AM_V_RUNTEST_@AM_V@)
1928 AM_V_RUNTEST_ = $(AM_V_RUNTEST_@AM_DEFAULT_V@)
1929 AM_V_RUNTEST_0 = @echo "  RUNTEST  $(RUNTESTFLAGS) $*";
1930 AM_V_RUNTEST_1 =
1931 DO_RUNTEST = \
1932         LC_ALL=C; export LC_ALL; \
1933         EXPECT=${EXPECT} ; export EXPECT ; \
1934         runtest=$(RUNTEST); \
1935         $$runtest $(RUNTESTFLAGS)
1936
1937 testsuite_common_CPPFLAGS = \
1938         -I$(srcdir)/common \
1939         -I$(srcroot)/include \
1940         -I../bfd
1941
1942 @SIM_ENABLE_ARCH_aarch64_TRUE@aarch64_libsim_a_SOURCES = \
1943 @SIM_ENABLE_ARCH_aarch64_TRUE@  $(common_libcommon_a_SOURCES)
1944
1945 @SIM_ENABLE_ARCH_aarch64_TRUE@aarch64_libsim_a_LIBADD = \
1946 @SIM_ENABLE_ARCH_aarch64_TRUE@  $(patsubst %,aarch64/%,$(SIM_NEW_COMMON_OBJS)) \
1947 @SIM_ENABLE_ARCH_aarch64_TRUE@  $(patsubst %,aarch64/dv-%.o,$(SIM_HW_DEVICES)) \
1948 @SIM_ENABLE_ARCH_aarch64_TRUE@  aarch64/cpustate.o \
1949 @SIM_ENABLE_ARCH_aarch64_TRUE@  aarch64/interp.o \
1950 @SIM_ENABLE_ARCH_aarch64_TRUE@  aarch64/memory.o \
1951 @SIM_ENABLE_ARCH_aarch64_TRUE@  aarch64/modules.o \
1952 @SIM_ENABLE_ARCH_aarch64_TRUE@  aarch64/sim-resume.o \
1953 @SIM_ENABLE_ARCH_aarch64_TRUE@  aarch64/simulator.o
1954
1955 @SIM_ENABLE_ARCH_aarch64_TRUE@aarch64_run_SOURCES =
1956 @SIM_ENABLE_ARCH_aarch64_TRUE@aarch64_run_LDADD = \
1957 @SIM_ENABLE_ARCH_aarch64_TRUE@  aarch64/nrun.o \
1958 @SIM_ENABLE_ARCH_aarch64_TRUE@  aarch64/libsim.a \
1959 @SIM_ENABLE_ARCH_aarch64_TRUE@  $(SIM_COMMON_LIBS)
1960
1961 @SIM_ENABLE_ARCH_arm_TRUE@AM_CPPFLAGS_arm = -DMODET
1962 @SIM_ENABLE_ARCH_arm_TRUE@arm_libsim_a_SOURCES = \
1963 @SIM_ENABLE_ARCH_arm_TRUE@      $(common_libcommon_a_SOURCES)
1964
1965 @SIM_ENABLE_ARCH_arm_TRUE@arm_libsim_a_LIBADD = \
1966 @SIM_ENABLE_ARCH_arm_TRUE@      arm/wrapper.o \
1967 @SIM_ENABLE_ARCH_arm_TRUE@      $(patsubst %,arm/%,$(SIM_NEW_COMMON_OBJS)) \
1968 @SIM_ENABLE_ARCH_arm_TRUE@      $(patsubst %,arm/dv-%.o,$(SIM_HW_DEVICES)) \
1969 @SIM_ENABLE_ARCH_arm_TRUE@      arm/armemu.o \
1970 @SIM_ENABLE_ARCH_arm_TRUE@      arm/armemu32.o arm/arminit.o arm/armos.o arm/armsupp.o \
1971 @SIM_ENABLE_ARCH_arm_TRUE@      arm/armvirt.o arm/thumbemu.o \
1972 @SIM_ENABLE_ARCH_arm_TRUE@      arm/armcopro.o arm/maverick.o arm/iwmmxt.o \
1973 @SIM_ENABLE_ARCH_arm_TRUE@      arm/modules.o
1974
1975 @SIM_ENABLE_ARCH_arm_TRUE@arm_run_SOURCES =
1976 @SIM_ENABLE_ARCH_arm_TRUE@arm_run_LDADD = \
1977 @SIM_ENABLE_ARCH_arm_TRUE@      arm/nrun.o \
1978 @SIM_ENABLE_ARCH_arm_TRUE@      arm/libsim.a \
1979 @SIM_ENABLE_ARCH_arm_TRUE@      $(SIM_COMMON_LIBS)
1980
1981 @SIM_ENABLE_ARCH_arm_TRUE@armdocdir = $(docdir)/arm
1982 @SIM_ENABLE_ARCH_arm_TRUE@armdoc_DATA = arm/README
1983 @SIM_ENABLE_ARCH_avr_TRUE@avr_libsim_a_SOURCES = \
1984 @SIM_ENABLE_ARCH_avr_TRUE@      $(common_libcommon_a_SOURCES)
1985
1986 @SIM_ENABLE_ARCH_avr_TRUE@avr_libsim_a_LIBADD = \
1987 @SIM_ENABLE_ARCH_avr_TRUE@      avr/interp.o \
1988 @SIM_ENABLE_ARCH_avr_TRUE@      $(patsubst %,avr/%,$(SIM_NEW_COMMON_OBJS)) \
1989 @SIM_ENABLE_ARCH_avr_TRUE@      $(patsubst %,avr/dv-%.o,$(SIM_HW_DEVICES)) \
1990 @SIM_ENABLE_ARCH_avr_TRUE@      avr/modules.o \
1991 @SIM_ENABLE_ARCH_avr_TRUE@      avr/sim-resume.o
1992
1993 @SIM_ENABLE_ARCH_avr_TRUE@avr_run_SOURCES =
1994 @SIM_ENABLE_ARCH_avr_TRUE@avr_run_LDADD = \
1995 @SIM_ENABLE_ARCH_avr_TRUE@      avr/nrun.o \
1996 @SIM_ENABLE_ARCH_avr_TRUE@      avr/libsim.a \
1997 @SIM_ENABLE_ARCH_avr_TRUE@      $(SIM_COMMON_LIBS)
1998
1999 @SIM_ENABLE_ARCH_bfin_TRUE@AM_CPPFLAGS_bfin = $(SDL_CFLAGS)
2000 @SIM_ENABLE_ARCH_bfin_TRUE@bfin_libsim_a_SOURCES = \
2001 @SIM_ENABLE_ARCH_bfin_TRUE@     $(common_libcommon_a_SOURCES)
2002
2003 @SIM_ENABLE_ARCH_bfin_TRUE@bfin_libsim_a_LIBADD = \
2004 @SIM_ENABLE_ARCH_bfin_TRUE@     $(patsubst %,bfin/%,$(SIM_NEW_COMMON_OBJS)) \
2005 @SIM_ENABLE_ARCH_bfin_TRUE@     $(patsubst %,bfin/dv-%.o,$(SIM_HW_DEVICES)) \
2006 @SIM_ENABLE_ARCH_bfin_TRUE@     $(patsubst %,bfin/dv-%.o,$(bfin_SIM_EXTRA_HW_DEVICES)) \
2007 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin/bfin-sim.o \
2008 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin/devices.o \
2009 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin/gui.o \
2010 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin/interp.o \
2011 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin/machs.o \
2012 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin/modules.o \
2013 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin/sim-resume.o
2014
2015 @SIM_ENABLE_ARCH_bfin_TRUE@bfin_run_SOURCES =
2016 @SIM_ENABLE_ARCH_bfin_TRUE@bfin_run_LDADD = \
2017 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin/nrun.o \
2018 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin/libsim.a \
2019 @SIM_ENABLE_ARCH_bfin_TRUE@     $(SIM_COMMON_LIBS)
2020
2021 @SIM_ENABLE_ARCH_bfin_TRUE@bfin_SIM_EXTRA_HW_DEVICES = \
2022 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin_cec \
2023 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin_ctimer \
2024 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin_dma \
2025 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin_dmac \
2026 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin_ebiu_amc \
2027 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin_ebiu_ddrc \
2028 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin_ebiu_sdc \
2029 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin_emac \
2030 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin_eppi \
2031 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin_evt \
2032 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin_gpio \
2033 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin_gpio2 \
2034 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin_gptimer \
2035 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin_jtag \
2036 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin_mmu \
2037 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin_nfc \
2038 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin_otp \
2039 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin_pfmon \
2040 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin_pint \
2041 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin_pll \
2042 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin_ppi \
2043 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin_rtc \
2044 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin_sic \
2045 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin_spi \
2046 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin_trace \
2047 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin_twi \
2048 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin_uart \
2049 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin_uart2 \
2050 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin_wdog \
2051 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin_wp \
2052 @SIM_ENABLE_ARCH_bfin_TRUE@     eth_phy
2053
2054 @SIM_ENABLE_ARCH_bpf_TRUE@AM_CPPFLAGS_bpf = -DWITH_TARGET_WORD_BITSIZE=64
2055 @SIM_ENABLE_ARCH_bpf_TRUE@AM_CPPFLAGS_bpf_mloop_le.o = -DWANT_ISA_EBPFLE
2056 @SIM_ENABLE_ARCH_bpf_TRUE@AM_CPPFLAGS_bpf_mloop_be.o = -DWANT_ISA_EBPFBE
2057 @SIM_ENABLE_ARCH_bpf_TRUE@AM_CPPFLAGS_bpf_decode_le.o = -DWANT_ISA_EBPFLE
2058 @SIM_ENABLE_ARCH_bpf_TRUE@AM_CPPFLAGS_bpf_decode_be.o = -DWANT_ISA_EBPFBE
2059 @SIM_ENABLE_ARCH_bpf_TRUE@AM_CPPFLAGS_bpf_sem_le.o = -DWANT_ISA_EBPFLE
2060 @SIM_ENABLE_ARCH_bpf_TRUE@AM_CPPFLAGS_bpf_sem_be.o = -DWANT_ISA_EBPFBE
2061 @SIM_ENABLE_ARCH_bpf_TRUE@bpf_libsim_a_SOURCES = \
2062 @SIM_ENABLE_ARCH_bpf_TRUE@      $(common_libcommon_a_SOURCES)
2063
2064 @SIM_ENABLE_ARCH_bpf_TRUE@bpf_libsim_a_LIBADD = \
2065 @SIM_ENABLE_ARCH_bpf_TRUE@      $(patsubst %,bpf/%,$(SIM_NEW_COMMON_OBJS)) \
2066 @SIM_ENABLE_ARCH_bpf_TRUE@      $(patsubst %,bpf/dv-%.o,$(SIM_HW_DEVICES)) \
2067 @SIM_ENABLE_ARCH_bpf_TRUE@      bpf/modules.o \
2068 @SIM_ENABLE_ARCH_bpf_TRUE@      \
2069 @SIM_ENABLE_ARCH_bpf_TRUE@      bpf/cgen-run.o \
2070 @SIM_ENABLE_ARCH_bpf_TRUE@      bpf/cgen-scache.o \
2071 @SIM_ENABLE_ARCH_bpf_TRUE@      bpf/cgen-trace.o \
2072 @SIM_ENABLE_ARCH_bpf_TRUE@      bpf/cgen-utils.o \
2073 @SIM_ENABLE_ARCH_bpf_TRUE@      \
2074 @SIM_ENABLE_ARCH_bpf_TRUE@      bpf/arch.o \
2075 @SIM_ENABLE_ARCH_bpf_TRUE@      bpf/cpu.o \
2076 @SIM_ENABLE_ARCH_bpf_TRUE@      bpf/decode-le.o \
2077 @SIM_ENABLE_ARCH_bpf_TRUE@      bpf/decode-be.o \
2078 @SIM_ENABLE_ARCH_bpf_TRUE@      bpf/sem-le.o \
2079 @SIM_ENABLE_ARCH_bpf_TRUE@      bpf/sem-be.o \
2080 @SIM_ENABLE_ARCH_bpf_TRUE@      bpf/mloop-le.o \
2081 @SIM_ENABLE_ARCH_bpf_TRUE@      bpf/mloop-be.o \
2082 @SIM_ENABLE_ARCH_bpf_TRUE@      \
2083 @SIM_ENABLE_ARCH_bpf_TRUE@      bpf/bpf.o \
2084 @SIM_ENABLE_ARCH_bpf_TRUE@      bpf/bpf-helpers.o \
2085 @SIM_ENABLE_ARCH_bpf_TRUE@      bpf/sim-if.o \
2086 @SIM_ENABLE_ARCH_bpf_TRUE@      bpf/traps.o
2087
2088 @SIM_ENABLE_ARCH_bpf_TRUE@bpf_run_SOURCES =
2089 @SIM_ENABLE_ARCH_bpf_TRUE@bpf_run_LDADD = \
2090 @SIM_ENABLE_ARCH_bpf_TRUE@      bpf/nrun.o \
2091 @SIM_ENABLE_ARCH_bpf_TRUE@      bpf/libsim.a \
2092 @SIM_ENABLE_ARCH_bpf_TRUE@      $(SIM_COMMON_LIBS)
2093
2094 @SIM_ENABLE_ARCH_bpf_TRUE@bpf_BUILD_OUTPUTS = \
2095 @SIM_ENABLE_ARCH_bpf_TRUE@      bpf/mloop-le.c \
2096 @SIM_ENABLE_ARCH_bpf_TRUE@      bpf/stamp-mloop-le \
2097 @SIM_ENABLE_ARCH_bpf_TRUE@      bpf/mloop-be.c \
2098 @SIM_ENABLE_ARCH_bpf_TRUE@      bpf/stamp-mloop-be
2099
2100 @SIM_ENABLE_ARCH_cr16_TRUE@cr16_libsim_a_SOURCES = \
2101 @SIM_ENABLE_ARCH_cr16_TRUE@     $(common_libcommon_a_SOURCES)
2102
2103 @SIM_ENABLE_ARCH_cr16_TRUE@cr16_libsim_a_LIBADD = \
2104 @SIM_ENABLE_ARCH_cr16_TRUE@     $(patsubst %,cr16/%,$(SIM_NEW_COMMON_OBJS)) \
2105 @SIM_ENABLE_ARCH_cr16_TRUE@     $(patsubst %,cr16/dv-%.o,$(SIM_HW_DEVICES)) \
2106 @SIM_ENABLE_ARCH_cr16_TRUE@     cr16/interp.o \
2107 @SIM_ENABLE_ARCH_cr16_TRUE@     cr16/modules.o \
2108 @SIM_ENABLE_ARCH_cr16_TRUE@     cr16/sim-resume.o \
2109 @SIM_ENABLE_ARCH_cr16_TRUE@     cr16/simops.o \
2110 @SIM_ENABLE_ARCH_cr16_TRUE@     cr16/table.o
2111
2112 @SIM_ENABLE_ARCH_cr16_TRUE@cr16_run_SOURCES =
2113 @SIM_ENABLE_ARCH_cr16_TRUE@cr16_run_LDADD = \
2114 @SIM_ENABLE_ARCH_cr16_TRUE@     cr16/nrun.o \
2115 @SIM_ENABLE_ARCH_cr16_TRUE@     cr16/libsim.a \
2116 @SIM_ENABLE_ARCH_cr16_TRUE@     $(SIM_COMMON_LIBS)
2117
2118 @SIM_ENABLE_ARCH_cr16_TRUE@cr16_BUILD_OUTPUTS = \
2119 @SIM_ENABLE_ARCH_cr16_TRUE@     cr16/gencode$(EXEEXT) \
2120 @SIM_ENABLE_ARCH_cr16_TRUE@     cr16/table.c
2121
2122 @SIM_ENABLE_ARCH_cr16_TRUE@cr16_gencode_SOURCES = cr16/gencode.c
2123 @SIM_ENABLE_ARCH_cr16_TRUE@cr16_gencode_LDADD = cr16/cr16-opc.o
2124 @SIM_ENABLE_ARCH_cris_TRUE@cris_libsim_a_SOURCES = \
2125 @SIM_ENABLE_ARCH_cris_TRUE@     $(common_libcommon_a_SOURCES)
2126
2127 @SIM_ENABLE_ARCH_cris_TRUE@cris_libsim_a_LIBADD = \
2128 @SIM_ENABLE_ARCH_cris_TRUE@     $(patsubst %,cris/%,$(SIM_NEW_COMMON_OBJS)) \
2129 @SIM_ENABLE_ARCH_cris_TRUE@     $(patsubst %,cris/dv-%.o,$(SIM_HW_DEVICES)) \
2130 @SIM_ENABLE_ARCH_cris_TRUE@     $(patsubst %,cris/dv-%.o,$(cris_SIM_EXTRA_HW_DEVICES)) \
2131 @SIM_ENABLE_ARCH_cris_TRUE@     cris/modules.o \
2132 @SIM_ENABLE_ARCH_cris_TRUE@     \
2133 @SIM_ENABLE_ARCH_cris_TRUE@     cris/cgen-run.o \
2134 @SIM_ENABLE_ARCH_cris_TRUE@     cris/cgen-scache.o \
2135 @SIM_ENABLE_ARCH_cris_TRUE@     cris/cgen-trace.o \
2136 @SIM_ENABLE_ARCH_cris_TRUE@     cris/cgen-utils.o \
2137 @SIM_ENABLE_ARCH_cris_TRUE@     \
2138 @SIM_ENABLE_ARCH_cris_TRUE@     cris/arch.o \
2139 @SIM_ENABLE_ARCH_cris_TRUE@     cris/crisv10f.o \
2140 @SIM_ENABLE_ARCH_cris_TRUE@     cris/cpuv10.o \
2141 @SIM_ENABLE_ARCH_cris_TRUE@     cris/decodev10.o \
2142 @SIM_ENABLE_ARCH_cris_TRUE@     cris/modelv10.o \
2143 @SIM_ENABLE_ARCH_cris_TRUE@     cris/mloopv10f.o \
2144 @SIM_ENABLE_ARCH_cris_TRUE@     cris/crisv32f.o \
2145 @SIM_ENABLE_ARCH_cris_TRUE@     cris/cpuv32.o \
2146 @SIM_ENABLE_ARCH_cris_TRUE@     cris/decodev32.o \
2147 @SIM_ENABLE_ARCH_cris_TRUE@     cris/modelv32.o \
2148 @SIM_ENABLE_ARCH_cris_TRUE@     cris/mloopv32f.o \
2149 @SIM_ENABLE_ARCH_cris_TRUE@     \
2150 @SIM_ENABLE_ARCH_cris_TRUE@     cris/sim-if.o \
2151 @SIM_ENABLE_ARCH_cris_TRUE@     cris/traps.o
2152
2153 @SIM_ENABLE_ARCH_cris_TRUE@cris_run_SOURCES =
2154 @SIM_ENABLE_ARCH_cris_TRUE@cris_run_LDADD = \
2155 @SIM_ENABLE_ARCH_cris_TRUE@     cris/nrun.o \
2156 @SIM_ENABLE_ARCH_cris_TRUE@     cris/libsim.a \
2157 @SIM_ENABLE_ARCH_cris_TRUE@     $(SIM_COMMON_LIBS)
2158
2159 @SIM_ENABLE_ARCH_cris_TRUE@cris_SIM_EXTRA_HW_DEVICES = rv cris cris_900000xx
2160 @SIM_ENABLE_ARCH_cris_TRUE@cris_rvdummy_SOURCES = cris/rvdummy.c
2161 @SIM_ENABLE_ARCH_cris_TRUE@cris_rvdummy_LDADD = $(LIBIBERTY_LIB)
2162 @SIM_ENABLE_ARCH_cris_TRUE@cris_BUILD_OUTPUTS = \
2163 @SIM_ENABLE_ARCH_cris_TRUE@     cris/mloopv10f.c \
2164 @SIM_ENABLE_ARCH_cris_TRUE@     cris/stamp-mloop-v10f \
2165 @SIM_ENABLE_ARCH_cris_TRUE@     cris/mloopv32f.c \
2166 @SIM_ENABLE_ARCH_cris_TRUE@     cris/stamp-mloop-v32f
2167
2168 @SIM_ENABLE_ARCH_d10v_TRUE@d10v_libsim_a_SOURCES = \
2169 @SIM_ENABLE_ARCH_d10v_TRUE@     $(common_libcommon_a_SOURCES)
2170
2171 @SIM_ENABLE_ARCH_d10v_TRUE@d10v_libsim_a_LIBADD = \
2172 @SIM_ENABLE_ARCH_d10v_TRUE@     d10v/interp.o \
2173 @SIM_ENABLE_ARCH_d10v_TRUE@     $(patsubst %,d10v/%,$(SIM_NEW_COMMON_OBJS)) \
2174 @SIM_ENABLE_ARCH_d10v_TRUE@     $(patsubst %,d10v/dv-%.o,$(SIM_HW_DEVICES)) \
2175 @SIM_ENABLE_ARCH_d10v_TRUE@     d10v/endian.o \
2176 @SIM_ENABLE_ARCH_d10v_TRUE@     d10v/modules.o \
2177 @SIM_ENABLE_ARCH_d10v_TRUE@     d10v/sim-resume.o \
2178 @SIM_ENABLE_ARCH_d10v_TRUE@     d10v/simops.o \
2179 @SIM_ENABLE_ARCH_d10v_TRUE@     d10v/table.o
2180
2181 @SIM_ENABLE_ARCH_d10v_TRUE@d10v_run_SOURCES =
2182 @SIM_ENABLE_ARCH_d10v_TRUE@d10v_run_LDADD = \
2183 @SIM_ENABLE_ARCH_d10v_TRUE@     d10v/nrun.o \
2184 @SIM_ENABLE_ARCH_d10v_TRUE@     d10v/libsim.a \
2185 @SIM_ENABLE_ARCH_d10v_TRUE@     $(SIM_COMMON_LIBS)
2186
2187 @SIM_ENABLE_ARCH_d10v_TRUE@d10v_BUILD_OUTPUTS = \
2188 @SIM_ENABLE_ARCH_d10v_TRUE@     d10v/gencode$(EXEEXT) \
2189 @SIM_ENABLE_ARCH_d10v_TRUE@     d10v/table.c
2190
2191 @SIM_ENABLE_ARCH_d10v_TRUE@d10v_gencode_SOURCES = d10v/gencode.c
2192 @SIM_ENABLE_ARCH_d10v_TRUE@d10v_gencode_LDADD = d10v/d10v-opc.o
2193 @SIM_ENABLE_ARCH_erc32_TRUE@READLINE_SRC = $(srcroot)/readline/readline
2194 @SIM_ENABLE_ARCH_erc32_TRUE@AM_CPPFLAGS_erc32 = $(READLINE_CFLAGS) \
2195 @SIM_ENABLE_ARCH_erc32_TRUE@    -DFAST_UART
2196 @SIM_ENABLE_ARCH_erc32_TRUE@erc32_libsim_a_SOURCES = \
2197 @SIM_ENABLE_ARCH_erc32_TRUE@    $(common_libcommon_a_SOURCES)
2198
2199 @SIM_ENABLE_ARCH_erc32_TRUE@erc32_libsim_a_LIBADD = \
2200 @SIM_ENABLE_ARCH_erc32_TRUE@    erc32/erc32.o \
2201 @SIM_ENABLE_ARCH_erc32_TRUE@    erc32/exec.o \
2202 @SIM_ENABLE_ARCH_erc32_TRUE@    erc32/float.o \
2203 @SIM_ENABLE_ARCH_erc32_TRUE@    erc32/func.o \
2204 @SIM_ENABLE_ARCH_erc32_TRUE@    erc32/help.o \
2205 @SIM_ENABLE_ARCH_erc32_TRUE@    erc32/interf.o \
2206 @SIM_ENABLE_ARCH_erc32_TRUE@    erc32/modules.o
2207
2208 @SIM_ENABLE_ARCH_erc32_TRUE@erc32_run_SOURCES =
2209 @SIM_ENABLE_ARCH_erc32_TRUE@erc32_run_LDADD = \
2210 @SIM_ENABLE_ARCH_erc32_TRUE@    erc32/sis.o \
2211 @SIM_ENABLE_ARCH_erc32_TRUE@    erc32/libsim.a \
2212 @SIM_ENABLE_ARCH_erc32_TRUE@    $(SIM_COMMON_LIBS) $(READLINE_LIB) $(TERMCAP_LIB)
2213
2214 @SIM_ENABLE_ARCH_erc32_TRUE@erc32docdir = $(docdir)/erc32
2215 @SIM_ENABLE_ARCH_erc32_TRUE@erc32doc_DATA = erc32/README.erc32 erc32/README.gdb erc32/README.sis
2216 @SIM_ENABLE_ARCH_examples_TRUE@example_synacor_libsim_a_SOURCES = \
2217 @SIM_ENABLE_ARCH_examples_TRUE@ $(common_libcommon_a_SOURCES)
2218
2219 @SIM_ENABLE_ARCH_examples_TRUE@example_synacor_libsim_a_LIBADD = \
2220 @SIM_ENABLE_ARCH_examples_TRUE@ $(patsubst %,example-synacor/%,$(SIM_NEW_COMMON_OBJS)) \
2221 @SIM_ENABLE_ARCH_examples_TRUE@ $(patsubst %,example-synacor/dv-%.o,$(SIM_HW_DEVICES)) \
2222 @SIM_ENABLE_ARCH_examples_TRUE@ example-synacor/interp.o \
2223 @SIM_ENABLE_ARCH_examples_TRUE@ example-synacor/modules.o \
2224 @SIM_ENABLE_ARCH_examples_TRUE@ example-synacor/sim-main.o \
2225 @SIM_ENABLE_ARCH_examples_TRUE@ example-synacor/sim-resume.o
2226
2227 @SIM_ENABLE_ARCH_examples_TRUE@example_synacor_run_SOURCES =
2228 @SIM_ENABLE_ARCH_examples_TRUE@example_synacor_run_LDADD = \
2229 @SIM_ENABLE_ARCH_examples_TRUE@ example-synacor/nrun.o \
2230 @SIM_ENABLE_ARCH_examples_TRUE@ example-synacor/libsim.a \
2231 @SIM_ENABLE_ARCH_examples_TRUE@ $(SIM_COMMON_LIBS)
2232
2233 @SIM_ENABLE_ARCH_frv_TRUE@AM_CPPFLAGS_frv = $(SIM_FRV_TRAPDUMP_FLAGS)
2234 @SIM_ENABLE_ARCH_frv_TRUE@AM_CFLAGS_frv_memory.o = -Wno-error
2235 @SIM_ENABLE_ARCH_frv_TRUE@AM_CFLAGS_frv_sem.o = -Wno-error
2236 @SIM_ENABLE_ARCH_frv_TRUE@frv_libsim_a_SOURCES = \
2237 @SIM_ENABLE_ARCH_frv_TRUE@      $(common_libcommon_a_SOURCES)
2238
2239 @SIM_ENABLE_ARCH_frv_TRUE@frv_libsim_a_LIBADD = \
2240 @SIM_ENABLE_ARCH_frv_TRUE@      $(patsubst %,frv/%,$(SIM_NEW_COMMON_OBJS)) \
2241 @SIM_ENABLE_ARCH_frv_TRUE@      $(patsubst %,frv/dv-%.o,$(SIM_HW_DEVICES)) \
2242 @SIM_ENABLE_ARCH_frv_TRUE@      frv/modules.o \
2243 @SIM_ENABLE_ARCH_frv_TRUE@      \
2244 @SIM_ENABLE_ARCH_frv_TRUE@      frv/cgen-accfp.o \
2245 @SIM_ENABLE_ARCH_frv_TRUE@      frv/cgen-fpu.o \
2246 @SIM_ENABLE_ARCH_frv_TRUE@      frv/cgen-run.o \
2247 @SIM_ENABLE_ARCH_frv_TRUE@      frv/cgen-scache.o \
2248 @SIM_ENABLE_ARCH_frv_TRUE@      frv/cgen-trace.o \
2249 @SIM_ENABLE_ARCH_frv_TRUE@      frv/cgen-utils.o \
2250 @SIM_ENABLE_ARCH_frv_TRUE@      \
2251 @SIM_ENABLE_ARCH_frv_TRUE@      frv/arch.o \
2252 @SIM_ENABLE_ARCH_frv_TRUE@      frv/cgen-par.o \
2253 @SIM_ENABLE_ARCH_frv_TRUE@      frv/cpu.o \
2254 @SIM_ENABLE_ARCH_frv_TRUE@      frv/decode.o \
2255 @SIM_ENABLE_ARCH_frv_TRUE@      frv/frv.o \
2256 @SIM_ENABLE_ARCH_frv_TRUE@      frv/mloop.o \
2257 @SIM_ENABLE_ARCH_frv_TRUE@      frv/model.o \
2258 @SIM_ENABLE_ARCH_frv_TRUE@      frv/sem.o \
2259 @SIM_ENABLE_ARCH_frv_TRUE@      \
2260 @SIM_ENABLE_ARCH_frv_TRUE@      frv/cache.o \
2261 @SIM_ENABLE_ARCH_frv_TRUE@      frv/interrupts.o \
2262 @SIM_ENABLE_ARCH_frv_TRUE@      frv/memory.o \
2263 @SIM_ENABLE_ARCH_frv_TRUE@      frv/options.o \
2264 @SIM_ENABLE_ARCH_frv_TRUE@      frv/pipeline.o \
2265 @SIM_ENABLE_ARCH_frv_TRUE@      frv/profile.o \
2266 @SIM_ENABLE_ARCH_frv_TRUE@      frv/profile-fr400.o \
2267 @SIM_ENABLE_ARCH_frv_TRUE@      frv/profile-fr450.o \
2268 @SIM_ENABLE_ARCH_frv_TRUE@      frv/profile-fr500.o \
2269 @SIM_ENABLE_ARCH_frv_TRUE@      frv/profile-fr550.o \
2270 @SIM_ENABLE_ARCH_frv_TRUE@      frv/registers.o \
2271 @SIM_ENABLE_ARCH_frv_TRUE@      frv/reset.o \
2272 @SIM_ENABLE_ARCH_frv_TRUE@      frv/sim-if.o \
2273 @SIM_ENABLE_ARCH_frv_TRUE@      frv/traps.o
2274
2275 @SIM_ENABLE_ARCH_frv_TRUE@frv_run_SOURCES =
2276 @SIM_ENABLE_ARCH_frv_TRUE@frv_run_LDADD = \
2277 @SIM_ENABLE_ARCH_frv_TRUE@      frv/nrun.o \
2278 @SIM_ENABLE_ARCH_frv_TRUE@      frv/libsim.a \
2279 @SIM_ENABLE_ARCH_frv_TRUE@      $(SIM_COMMON_LIBS)
2280
2281 @SIM_ENABLE_ARCH_frv_TRUE@frvdocdir = $(docdir)/frv
2282 @SIM_ENABLE_ARCH_frv_TRUE@frvdoc_DATA = frv/README
2283 @SIM_ENABLE_ARCH_frv_TRUE@frv_BUILD_OUTPUTS = \
2284 @SIM_ENABLE_ARCH_frv_TRUE@      frv/mloop.c \
2285 @SIM_ENABLE_ARCH_frv_TRUE@      frv/stamp-mloop
2286
2287 @SIM_ENABLE_ARCH_ft32_TRUE@ft32_libsim_a_SOURCES = \
2288 @SIM_ENABLE_ARCH_ft32_TRUE@     $(common_libcommon_a_SOURCES)
2289
2290 @SIM_ENABLE_ARCH_ft32_TRUE@ft32_libsim_a_LIBADD = \
2291 @SIM_ENABLE_ARCH_ft32_TRUE@     $(patsubst %,ft32/%,$(SIM_NEW_COMMON_OBJS)) \
2292 @SIM_ENABLE_ARCH_ft32_TRUE@     $(patsubst %,ft32/dv-%.o,$(SIM_HW_DEVICES)) \
2293 @SIM_ENABLE_ARCH_ft32_TRUE@     ft32/interp.o \
2294 @SIM_ENABLE_ARCH_ft32_TRUE@     ft32/modules.o \
2295 @SIM_ENABLE_ARCH_ft32_TRUE@     ft32/sim-resume.o
2296
2297 @SIM_ENABLE_ARCH_ft32_TRUE@ft32_run_SOURCES =
2298 @SIM_ENABLE_ARCH_ft32_TRUE@ft32_run_LDADD = \
2299 @SIM_ENABLE_ARCH_ft32_TRUE@     ft32/nrun.o \
2300 @SIM_ENABLE_ARCH_ft32_TRUE@     ft32/libsim.a \
2301 @SIM_ENABLE_ARCH_ft32_TRUE@     $(SIM_COMMON_LIBS)
2302
2303 @SIM_ENABLE_ARCH_h8300_TRUE@h8300_libsim_a_SOURCES = \
2304 @SIM_ENABLE_ARCH_h8300_TRUE@    $(common_libcommon_a_SOURCES)
2305
2306 @SIM_ENABLE_ARCH_h8300_TRUE@h8300_libsim_a_LIBADD = \
2307 @SIM_ENABLE_ARCH_h8300_TRUE@    h8300/compile.o \
2308 @SIM_ENABLE_ARCH_h8300_TRUE@    $(patsubst %,h8300/%,$(SIM_NEW_COMMON_OBJS)) \
2309 @SIM_ENABLE_ARCH_h8300_TRUE@    $(patsubst %,h8300/dv-%.o,$(SIM_HW_DEVICES)) \
2310 @SIM_ENABLE_ARCH_h8300_TRUE@    h8300/modules.o \
2311 @SIM_ENABLE_ARCH_h8300_TRUE@    h8300/sim-resume.o
2312
2313 @SIM_ENABLE_ARCH_h8300_TRUE@h8300_run_SOURCES =
2314 @SIM_ENABLE_ARCH_h8300_TRUE@h8300_run_LDADD = \
2315 @SIM_ENABLE_ARCH_h8300_TRUE@    h8300/nrun.o \
2316 @SIM_ENABLE_ARCH_h8300_TRUE@    h8300/libsim.a \
2317 @SIM_ENABLE_ARCH_h8300_TRUE@    $(SIM_COMMON_LIBS)
2318
2319 @SIM_ENABLE_ARCH_iq2000_TRUE@iq2000_libsim_a_SOURCES = \
2320 @SIM_ENABLE_ARCH_iq2000_TRUE@   $(common_libcommon_a_SOURCES)
2321
2322 @SIM_ENABLE_ARCH_iq2000_TRUE@iq2000_libsim_a_LIBADD = \
2323 @SIM_ENABLE_ARCH_iq2000_TRUE@   $(patsubst %,iq2000/%,$(SIM_NEW_COMMON_OBJS)) \
2324 @SIM_ENABLE_ARCH_iq2000_TRUE@   $(patsubst %,iq2000/dv-%.o,$(SIM_HW_DEVICES)) \
2325 @SIM_ENABLE_ARCH_iq2000_TRUE@   iq2000/modules.o \
2326 @SIM_ENABLE_ARCH_iq2000_TRUE@   \
2327 @SIM_ENABLE_ARCH_iq2000_TRUE@   iq2000/cgen-run.o \
2328 @SIM_ENABLE_ARCH_iq2000_TRUE@   iq2000/cgen-scache.o \
2329 @SIM_ENABLE_ARCH_iq2000_TRUE@   iq2000/cgen-trace.o \
2330 @SIM_ENABLE_ARCH_iq2000_TRUE@   iq2000/cgen-utils.o \
2331 @SIM_ENABLE_ARCH_iq2000_TRUE@   \
2332 @SIM_ENABLE_ARCH_iq2000_TRUE@   iq2000/arch.o \
2333 @SIM_ENABLE_ARCH_iq2000_TRUE@   iq2000/cpu.o \
2334 @SIM_ENABLE_ARCH_iq2000_TRUE@   iq2000/decode.o \
2335 @SIM_ENABLE_ARCH_iq2000_TRUE@   iq2000/iq2000.o \
2336 @SIM_ENABLE_ARCH_iq2000_TRUE@   iq2000/sem.o \
2337 @SIM_ENABLE_ARCH_iq2000_TRUE@   iq2000/mloop.o \
2338 @SIM_ENABLE_ARCH_iq2000_TRUE@   iq2000/model.o \
2339 @SIM_ENABLE_ARCH_iq2000_TRUE@   \
2340 @SIM_ENABLE_ARCH_iq2000_TRUE@   iq2000/sim-if.o
2341
2342 @SIM_ENABLE_ARCH_iq2000_TRUE@iq2000_run_SOURCES =
2343 @SIM_ENABLE_ARCH_iq2000_TRUE@iq2000_run_LDADD = \
2344 @SIM_ENABLE_ARCH_iq2000_TRUE@   iq2000/nrun.o \
2345 @SIM_ENABLE_ARCH_iq2000_TRUE@   iq2000/libsim.a \
2346 @SIM_ENABLE_ARCH_iq2000_TRUE@   $(SIM_COMMON_LIBS)
2347
2348 @SIM_ENABLE_ARCH_iq2000_TRUE@iq2000_BUILD_OUTPUTS = \
2349 @SIM_ENABLE_ARCH_iq2000_TRUE@   iq2000/mloop.c \
2350 @SIM_ENABLE_ARCH_iq2000_TRUE@   iq2000/stamp-mloop
2351
2352 @SIM_ENABLE_ARCH_lm32_TRUE@lm32_libsim_a_SOURCES = \
2353 @SIM_ENABLE_ARCH_lm32_TRUE@     $(common_libcommon_a_SOURCES)
2354
2355 @SIM_ENABLE_ARCH_lm32_TRUE@lm32_libsim_a_LIBADD = \
2356 @SIM_ENABLE_ARCH_lm32_TRUE@     $(patsubst %,lm32/%,$(SIM_NEW_COMMON_OBJS)) \
2357 @SIM_ENABLE_ARCH_lm32_TRUE@     $(patsubst %,lm32/dv-%.o,$(SIM_HW_DEVICES)) \
2358 @SIM_ENABLE_ARCH_lm32_TRUE@     $(patsubst %,lm32/dv-%.o,$(lm32_SIM_EXTRA_HW_DEVICES)) \
2359 @SIM_ENABLE_ARCH_lm32_TRUE@     lm32/modules.o \
2360 @SIM_ENABLE_ARCH_lm32_TRUE@     \
2361 @SIM_ENABLE_ARCH_lm32_TRUE@     lm32/cgen-run.o \
2362 @SIM_ENABLE_ARCH_lm32_TRUE@     lm32/cgen-scache.o \
2363 @SIM_ENABLE_ARCH_lm32_TRUE@     lm32/cgen-trace.o \
2364 @SIM_ENABLE_ARCH_lm32_TRUE@     lm32/cgen-utils.o \
2365 @SIM_ENABLE_ARCH_lm32_TRUE@     \
2366 @SIM_ENABLE_ARCH_lm32_TRUE@     lm32/arch.o \
2367 @SIM_ENABLE_ARCH_lm32_TRUE@     lm32/cpu.o \
2368 @SIM_ENABLE_ARCH_lm32_TRUE@     lm32/decode.o \
2369 @SIM_ENABLE_ARCH_lm32_TRUE@     lm32/sem.o \
2370 @SIM_ENABLE_ARCH_lm32_TRUE@     lm32/mloop.o \
2371 @SIM_ENABLE_ARCH_lm32_TRUE@     lm32/model.o \
2372 @SIM_ENABLE_ARCH_lm32_TRUE@     \
2373 @SIM_ENABLE_ARCH_lm32_TRUE@     lm32/lm32.o \
2374 @SIM_ENABLE_ARCH_lm32_TRUE@     lm32/sim-if.o \
2375 @SIM_ENABLE_ARCH_lm32_TRUE@     lm32/traps.o \
2376 @SIM_ENABLE_ARCH_lm32_TRUE@     lm32/user.o
2377
2378 @SIM_ENABLE_ARCH_lm32_TRUE@lm32_run_SOURCES =
2379 @SIM_ENABLE_ARCH_lm32_TRUE@lm32_run_LDADD = \
2380 @SIM_ENABLE_ARCH_lm32_TRUE@     lm32/nrun.o \
2381 @SIM_ENABLE_ARCH_lm32_TRUE@     lm32/libsim.a \
2382 @SIM_ENABLE_ARCH_lm32_TRUE@     $(SIM_COMMON_LIBS)
2383
2384 @SIM_ENABLE_ARCH_lm32_TRUE@lm32_SIM_EXTRA_HW_DEVICES = lm32cpu lm32timer lm32uart
2385 @SIM_ENABLE_ARCH_lm32_TRUE@lm32_BUILD_OUTPUTS = \
2386 @SIM_ENABLE_ARCH_lm32_TRUE@     lm32/mloop.c \
2387 @SIM_ENABLE_ARCH_lm32_TRUE@     lm32/stamp-mloop
2388
2389 @SIM_ENABLE_ARCH_m32c_TRUE@AM_CPPFLAGS_m32c = -DTIMER_A
2390 @SIM_ENABLE_ARCH_m32c_TRUE@m32c_libsim_a_SOURCES = \
2391 @SIM_ENABLE_ARCH_m32c_TRUE@     $(common_libcommon_a_SOURCES)
2392
2393 @SIM_ENABLE_ARCH_m32c_TRUE@m32c_libsim_a_LIBADD = \
2394 @SIM_ENABLE_ARCH_m32c_TRUE@     m32c/gdb-if.o \
2395 @SIM_ENABLE_ARCH_m32c_TRUE@     m32c/int.o \
2396 @SIM_ENABLE_ARCH_m32c_TRUE@     m32c/load.o \
2397 @SIM_ENABLE_ARCH_m32c_TRUE@     m32c/m32c.o \
2398 @SIM_ENABLE_ARCH_m32c_TRUE@     m32c/mem.o \
2399 @SIM_ENABLE_ARCH_m32c_TRUE@     m32c/misc.o \
2400 @SIM_ENABLE_ARCH_m32c_TRUE@     m32c/modules.o \
2401 @SIM_ENABLE_ARCH_m32c_TRUE@     m32c/r8c.o \
2402 @SIM_ENABLE_ARCH_m32c_TRUE@     m32c/reg.o \
2403 @SIM_ENABLE_ARCH_m32c_TRUE@     m32c/srcdest.o \
2404 @SIM_ENABLE_ARCH_m32c_TRUE@     m32c/syscalls.o \
2405 @SIM_ENABLE_ARCH_m32c_TRUE@     m32c/trace.o
2406
2407 @SIM_ENABLE_ARCH_m32c_TRUE@m32c_run_SOURCES =
2408 @SIM_ENABLE_ARCH_m32c_TRUE@m32c_run_LDADD = \
2409 @SIM_ENABLE_ARCH_m32c_TRUE@     m32c/main.o \
2410 @SIM_ENABLE_ARCH_m32c_TRUE@     m32c/libsim.a \
2411 @SIM_ENABLE_ARCH_m32c_TRUE@     $(SIM_COMMON_LIBS)
2412
2413 @SIM_ENABLE_ARCH_m32c_TRUE@m32c_BUILD_OUTPUTS = \
2414 @SIM_ENABLE_ARCH_m32c_TRUE@     m32c/opc2c$(EXEEXT) \
2415 @SIM_ENABLE_ARCH_m32c_TRUE@     m32c/m32c.c \
2416 @SIM_ENABLE_ARCH_m32c_TRUE@     m32c/r8c.c
2417
2418 @SIM_ENABLE_ARCH_m32c_TRUE@m32c_opc2c_SOURCES = m32c/opc2c.c
2419
2420 # opc2c leaks memory, and therefore makes AddressSanitizer unhappy.  Disable
2421 # leak detection while running it.
2422 @SIM_ENABLE_ARCH_m32c_TRUE@m32c_OPC2C_RUN = ASAN_OPTIONS=detect_leaks=0 m32c/opc2c$(EXEEXT)
2423 @SIM_ENABLE_ARCH_m32r_TRUE@AM_CFLAGS_m32r_cpu.o = -Wno-error
2424 @SIM_ENABLE_ARCH_m32r_TRUE@AM_CFLAGS_m32r_cpu2.o = -Wno-error
2425 @SIM_ENABLE_ARCH_m32r_TRUE@AM_CFLAGS_m32r_cpux.o = -Wno-error
2426 @SIM_ENABLE_ARCH_m32r_TRUE@AM_CFLAGS_m32r_m32r.o = -Wno-error
2427 @SIM_ENABLE_ARCH_m32r_TRUE@AM_CFLAGS_m32r_m32r2.o = -Wno-error
2428 @SIM_ENABLE_ARCH_m32r_TRUE@AM_CFLAGS_m32r_m32rx.o = -Wno-error
2429 @SIM_ENABLE_ARCH_m32r_TRUE@AM_CFLAGS_m32r_mloop.o = -Wno-error
2430 @SIM_ENABLE_ARCH_m32r_TRUE@AM_CFLAGS_m32r_mloop2.o = -Wno-error
2431 @SIM_ENABLE_ARCH_m32r_TRUE@AM_CFLAGS_m32r_mloopx.o = -Wno-error
2432 @SIM_ENABLE_ARCH_m32r_TRUE@AM_CFLAGS_m32r_sem.o = -Wno-error
2433 @SIM_ENABLE_ARCH_m32r_TRUE@AM_CFLAGS_m32r_sim_if.o = -Wno-error
2434 @SIM_ENABLE_ARCH_m32r_TRUE@AM_CFLAGS_m32r_traps.o = -Wno-error
2435 @SIM_ENABLE_ARCH_m32r_TRUE@m32r_libsim_a_SOURCES = \
2436 @SIM_ENABLE_ARCH_m32r_TRUE@     $(common_libcommon_a_SOURCES)
2437
2438 @SIM_ENABLE_ARCH_m32r_TRUE@m32r_libsim_a_LIBADD = \
2439 @SIM_ENABLE_ARCH_m32r_TRUE@     $(patsubst %,m32r/%,$(SIM_NEW_COMMON_OBJS)) \
2440 @SIM_ENABLE_ARCH_m32r_TRUE@     $(patsubst %,m32r/dv-%.o,$(SIM_HW_DEVICES)) \
2441 @SIM_ENABLE_ARCH_m32r_TRUE@     $(patsubst %,m32r/dv-%.o,$(m32r_SIM_EXTRA_HW_DEVICES)) \
2442 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/modules.o \
2443 @SIM_ENABLE_ARCH_m32r_TRUE@     \
2444 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/cgen-run.o \
2445 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/cgen-scache.o \
2446 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/cgen-trace.o \
2447 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/cgen-utils.o \
2448 @SIM_ENABLE_ARCH_m32r_TRUE@     \
2449 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/arch.o \
2450 @SIM_ENABLE_ARCH_m32r_TRUE@     \
2451 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/m32r.o \
2452 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/cpu.o \
2453 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/decode.o \
2454 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/sem.o \
2455 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/model.o \
2456 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/mloop.o \
2457 @SIM_ENABLE_ARCH_m32r_TRUE@     \
2458 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/m32rx.o \
2459 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/cpux.o \
2460 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/decodex.o \
2461 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/modelx.o \
2462 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/mloopx.o \
2463 @SIM_ENABLE_ARCH_m32r_TRUE@     \
2464 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/m32r2.o \
2465 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/cpu2.o \
2466 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/decode2.o \
2467 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/model2.o \
2468 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/mloop2.o \
2469 @SIM_ENABLE_ARCH_m32r_TRUE@     \
2470 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/sim-if.o \
2471 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/traps.o
2472
2473 @SIM_ENABLE_ARCH_m32r_TRUE@m32r_run_SOURCES =
2474 @SIM_ENABLE_ARCH_m32r_TRUE@m32r_run_LDADD = \
2475 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/nrun.o \
2476 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/libsim.a \
2477 @SIM_ENABLE_ARCH_m32r_TRUE@     $(SIM_COMMON_LIBS)
2478
2479 @SIM_ENABLE_ARCH_m32r_TRUE@m32r_SIM_EXTRA_HW_DEVICES = m32r_cache m32r_uart
2480 @SIM_ENABLE_ARCH_m32r_TRUE@m32r_BUILD_OUTPUTS = \
2481 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/mloop.c \
2482 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/stamp-mloop \
2483 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/mloopx.c \
2484 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/stamp-mloop-x \
2485 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/mloop2.c \
2486 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/stamp-mloop-2
2487
2488 @SIM_ENABLE_ARCH_m68hc11_TRUE@AM_CPPFLAGS_m68hc11 = \
2489 @SIM_ENABLE_ARCH_m68hc11_TRUE@  -DWITH_TARGET_WORD_BITSIZE=32 \
2490 @SIM_ENABLE_ARCH_m68hc11_TRUE@  -DWITH_TARGET_CELL_BITSIZE=32 \
2491 @SIM_ENABLE_ARCH_m68hc11_TRUE@  -DWITH_TARGET_ADDRESS_BITSIZE=32 \
2492 @SIM_ENABLE_ARCH_m68hc11_TRUE@  -DWITH_TARGET_WORD_MSB=31
2493
2494 @SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11_libsim_a_SOURCES = \
2495 @SIM_ENABLE_ARCH_m68hc11_TRUE@  $(common_libcommon_a_SOURCES)
2496
2497 @SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11_libsim_a_LIBADD = \
2498 @SIM_ENABLE_ARCH_m68hc11_TRUE@  m68hc11/interp.o \
2499 @SIM_ENABLE_ARCH_m68hc11_TRUE@  m68hc11/m68hc11int.o \
2500 @SIM_ENABLE_ARCH_m68hc11_TRUE@  m68hc11/m68hc12int.o \
2501 @SIM_ENABLE_ARCH_m68hc11_TRUE@  m68hc11/emulos.o \
2502 @SIM_ENABLE_ARCH_m68hc11_TRUE@  m68hc11/interrupts.o \
2503 @SIM_ENABLE_ARCH_m68hc11_TRUE@  m68hc11/m68hc11_sim.o \
2504 @SIM_ENABLE_ARCH_m68hc11_TRUE@  $(patsubst %,m68hc11/%,$(SIM_NEW_COMMON_OBJS)) \
2505 @SIM_ENABLE_ARCH_m68hc11_TRUE@  $(patsubst %,m68hc11/dv-%.o,$(SIM_HW_DEVICES)) \
2506 @SIM_ENABLE_ARCH_m68hc11_TRUE@  $(patsubst %,m68hc11/dv-%.o,$(m68hc11_SIM_EXTRA_HW_DEVICES)) \
2507 @SIM_ENABLE_ARCH_m68hc11_TRUE@  m68hc11/modules.o \
2508 @SIM_ENABLE_ARCH_m68hc11_TRUE@  m68hc11/sim-resume.o
2509
2510 @SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11_run_SOURCES =
2511 @SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11_run_LDADD = \
2512 @SIM_ENABLE_ARCH_m68hc11_TRUE@  m68hc11/nrun.o \
2513 @SIM_ENABLE_ARCH_m68hc11_TRUE@  m68hc11/libsim.a \
2514 @SIM_ENABLE_ARCH_m68hc11_TRUE@  $(SIM_COMMON_LIBS)
2515
2516 @SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11_SIM_EXTRA_HW_DEVICES = m68hc11 m68hc11sio m68hc11eepr m68hc11tim m68hc11spi nvram
2517 @SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11_BUILD_OUTPUTS = \
2518 @SIM_ENABLE_ARCH_m68hc11_TRUE@  m68hc11/gencode$(EXEEXT) \
2519 @SIM_ENABLE_ARCH_m68hc11_TRUE@  m68hc11/m68hc11int.c \
2520 @SIM_ENABLE_ARCH_m68hc11_TRUE@  m68hc11/m68hc12int.c
2521
2522 @SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11_gencode_SOURCES = m68hc11/gencode.c
2523 @SIM_ENABLE_ARCH_mcore_TRUE@mcore_libsim_a_SOURCES = \
2524 @SIM_ENABLE_ARCH_mcore_TRUE@    $(common_libcommon_a_SOURCES)
2525
2526 @SIM_ENABLE_ARCH_mcore_TRUE@mcore_libsim_a_LIBADD = \
2527 @SIM_ENABLE_ARCH_mcore_TRUE@    mcore/interp.o \
2528 @SIM_ENABLE_ARCH_mcore_TRUE@    $(patsubst %,mcore/%,$(SIM_NEW_COMMON_OBJS)) \
2529 @SIM_ENABLE_ARCH_mcore_TRUE@    $(patsubst %,mcore/dv-%.o,$(SIM_HW_DEVICES)) \
2530 @SIM_ENABLE_ARCH_mcore_TRUE@    mcore/modules.o \
2531 @SIM_ENABLE_ARCH_mcore_TRUE@    mcore/sim-resume.o
2532
2533 @SIM_ENABLE_ARCH_mcore_TRUE@mcore_run_SOURCES =
2534 @SIM_ENABLE_ARCH_mcore_TRUE@mcore_run_LDADD = \
2535 @SIM_ENABLE_ARCH_mcore_TRUE@    mcore/nrun.o \
2536 @SIM_ENABLE_ARCH_mcore_TRUE@    mcore/libsim.a \
2537 @SIM_ENABLE_ARCH_mcore_TRUE@    $(SIM_COMMON_LIBS)
2538
2539 @SIM_ENABLE_ARCH_microblaze_TRUE@microblaze_libsim_a_SOURCES = \
2540 @SIM_ENABLE_ARCH_microblaze_TRUE@       $(common_libcommon_a_SOURCES)
2541
2542 @SIM_ENABLE_ARCH_microblaze_TRUE@microblaze_libsim_a_LIBADD = \
2543 @SIM_ENABLE_ARCH_microblaze_TRUE@       microblaze/interp.o \
2544 @SIM_ENABLE_ARCH_microblaze_TRUE@       $(patsubst %,microblaze/%,$(SIM_NEW_COMMON_OBJS)) \
2545 @SIM_ENABLE_ARCH_microblaze_TRUE@       $(patsubst %,microblaze/dv-%.o,$(SIM_HW_DEVICES)) \
2546 @SIM_ENABLE_ARCH_microblaze_TRUE@       microblaze/modules.o \
2547 @SIM_ENABLE_ARCH_microblaze_TRUE@       microblaze/sim-resume.o
2548
2549 @SIM_ENABLE_ARCH_microblaze_TRUE@microblaze_run_SOURCES =
2550 @SIM_ENABLE_ARCH_microblaze_TRUE@microblaze_run_LDADD = \
2551 @SIM_ENABLE_ARCH_microblaze_TRUE@       microblaze/nrun.o \
2552 @SIM_ENABLE_ARCH_microblaze_TRUE@       microblaze/libsim.a \
2553 @SIM_ENABLE_ARCH_microblaze_TRUE@       $(SIM_COMMON_LIBS)
2554
2555 @SIM_ENABLE_ARCH_mips_TRUE@AM_CPPFLAGS_mips = \
2556 @SIM_ENABLE_ARCH_mips_TRUE@     @SIM_MIPS_SUBTARGET@ \
2557 @SIM_ENABLE_ARCH_mips_TRUE@     -DWITH_TARGET_WORD_BITSIZE=@SIM_MIPS_BITSIZE@ -DWITH_TARGET_WORD_MSB=WITH_TARGET_WORD_BITSIZE-1 \
2558 @SIM_ENABLE_ARCH_mips_TRUE@     -DWITH_FLOATING_POINT=HARD_FLOATING_POINT -DWITH_TARGET_FLOATING_POINT_BITSIZE=@SIM_MIPS_FPU_BITSIZE@
2559
2560 @SIM_ENABLE_ARCH_mips_TRUE@mips_GEN_OBJ = $(am__append_71) \
2561 @SIM_ENABLE_ARCH_mips_TRUE@     $(am__append_72) $(am__append_73)
2562 @SIM_ENABLE_ARCH_mips_TRUE@mips_libsim_a_SOURCES = \
2563 @SIM_ENABLE_ARCH_mips_TRUE@     $(common_libcommon_a_SOURCES)
2564
2565 @SIM_ENABLE_ARCH_mips_TRUE@mips_libsim_a_LIBADD = \
2566 @SIM_ENABLE_ARCH_mips_TRUE@     mips/interp.o \
2567 @SIM_ENABLE_ARCH_mips_TRUE@     $(mips_GEN_OBJ) \
2568 @SIM_ENABLE_ARCH_mips_TRUE@     $(patsubst %,mips/%,$(SIM_NEW_COMMON_OBJS)) \
2569 @SIM_ENABLE_ARCH_mips_TRUE@     $(patsubst %,mips/dv-%.o,$(SIM_HW_DEVICES)) \
2570 @SIM_ENABLE_ARCH_mips_TRUE@     $(patsubst %,mips/dv-%.o,$(mips_SIM_EXTRA_HW_DEVICES)) \
2571 @SIM_ENABLE_ARCH_mips_TRUE@     mips/cp1.o \
2572 @SIM_ENABLE_ARCH_mips_TRUE@     mips/dsp.o \
2573 @SIM_ENABLE_ARCH_mips_TRUE@     mips/mdmx.o \
2574 @SIM_ENABLE_ARCH_mips_TRUE@     mips/modules.o \
2575 @SIM_ENABLE_ARCH_mips_TRUE@     mips/sim-main.o \
2576 @SIM_ENABLE_ARCH_mips_TRUE@     mips/sim-resume.o
2577
2578 @SIM_ENABLE_ARCH_mips_TRUE@EXTRA_mips_libsim_a_DEPENDENCIES = $(SIM_MIPS_MULTI_OBJ)
2579 @SIM_ENABLE_ARCH_mips_TRUE@mips_run_SOURCES =
2580 @SIM_ENABLE_ARCH_mips_TRUE@mips_run_LDADD = \
2581 @SIM_ENABLE_ARCH_mips_TRUE@     mips/nrun.o \
2582 @SIM_ENABLE_ARCH_mips_TRUE@     mips/libsim.a \
2583 @SIM_ENABLE_ARCH_mips_TRUE@     $(SIM_COMMON_LIBS)
2584
2585 @SIM_ENABLE_ARCH_mips_TRUE@mips_SIM_EXTRA_HW_DEVICES = tx3904cpu tx3904irc tx3904tmr tx3904sio
2586 @SIM_ENABLE_ARCH_mips_TRUE@mips_BUILT_SRC_FROM_IGEN_ITABLE = \
2587 @SIM_ENABLE_ARCH_mips_TRUE@     mips/itable.h \
2588 @SIM_ENABLE_ARCH_mips_TRUE@     mips/itable.c
2589
2590 @SIM_ENABLE_ARCH_mips_TRUE@mips_BUILT_SRC_FROM_GEN_MODE_SINGLE = \
2591 @SIM_ENABLE_ARCH_mips_TRUE@     mips/icache.h \
2592 @SIM_ENABLE_ARCH_mips_TRUE@     mips/icache.c \
2593 @SIM_ENABLE_ARCH_mips_TRUE@     mips/idecode.h \
2594 @SIM_ENABLE_ARCH_mips_TRUE@     mips/idecode.c \
2595 @SIM_ENABLE_ARCH_mips_TRUE@     mips/semantics.h \
2596 @SIM_ENABLE_ARCH_mips_TRUE@     mips/semantics.c \
2597 @SIM_ENABLE_ARCH_mips_TRUE@     mips/model.h \
2598 @SIM_ENABLE_ARCH_mips_TRUE@     mips/model.c \
2599 @SIM_ENABLE_ARCH_mips_TRUE@     mips/support.h \
2600 @SIM_ENABLE_ARCH_mips_TRUE@     mips/support.c \
2601 @SIM_ENABLE_ARCH_mips_TRUE@     mips/engine.h \
2602 @SIM_ENABLE_ARCH_mips_TRUE@     mips/engine.c \
2603 @SIM_ENABLE_ARCH_mips_TRUE@     mips/irun.c
2604
2605 @SIM_ENABLE_ARCH_mips_TRUE@mips_BUILT_SRC_FROM_GEN_MODE_M16_M16 = \
2606 @SIM_ENABLE_ARCH_mips_TRUE@     mips/m16_icache.h \
2607 @SIM_ENABLE_ARCH_mips_TRUE@     mips/m16_icache.c \
2608 @SIM_ENABLE_ARCH_mips_TRUE@     mips/m16_idecode.h \
2609 @SIM_ENABLE_ARCH_mips_TRUE@     mips/m16_idecode.c \
2610 @SIM_ENABLE_ARCH_mips_TRUE@     mips/m16_semantics.h \
2611 @SIM_ENABLE_ARCH_mips_TRUE@     mips/m16_semantics.c \
2612 @SIM_ENABLE_ARCH_mips_TRUE@     mips/m16_model.h \
2613 @SIM_ENABLE_ARCH_mips_TRUE@     mips/m16_model.c \
2614 @SIM_ENABLE_ARCH_mips_TRUE@     mips/m16_support.h \
2615 @SIM_ENABLE_ARCH_mips_TRUE@     mips/m16_support.c \
2616 @SIM_ENABLE_ARCH_mips_TRUE@mips_BUILT_SRC_FROM_GEN_MODE_M16_M32 = \
2617 @SIM_ENABLE_ARCH_mips_TRUE@     mips/m32_icache.h \
2618 @SIM_ENABLE_ARCH_mips_TRUE@     mips/m32_icache.c \
2619 @SIM_ENABLE_ARCH_mips_TRUE@     mips/m32_idecode.h \
2620 @SIM_ENABLE_ARCH_mips_TRUE@     mips/m32_idecode.c \
2621 @SIM_ENABLE_ARCH_mips_TRUE@     mips/m32_semantics.h \
2622 @SIM_ENABLE_ARCH_mips_TRUE@     mips/m32_semantics.c \
2623 @SIM_ENABLE_ARCH_mips_TRUE@     mips/m32_model.h \
2624 @SIM_ENABLE_ARCH_mips_TRUE@     mips/m32_model.c \
2625 @SIM_ENABLE_ARCH_mips_TRUE@     mips/m32_support.h \
2626 @SIM_ENABLE_ARCH_mips_TRUE@     mips/m32_support.c
2627
2628 @SIM_ENABLE_ARCH_mips_TRUE@mips_BUILD_OUTPUTS =  \
2629 @SIM_ENABLE_ARCH_mips_TRUE@     $(mips_BUILT_SRC_FROM_IGEN_ITABLE) \
2630 @SIM_ENABLE_ARCH_mips_TRUE@     mips/stamp-igen-itable \
2631 @SIM_ENABLE_ARCH_mips_TRUE@     $(am__append_77) $(am__append_78) \
2632 @SIM_ENABLE_ARCH_mips_TRUE@     $(am__append_79)
2633 @SIM_ENABLE_ARCH_mips_TRUE@mips_IGEN_TRACE = # -G omit-line-numbers # -G trace-rule-selection -G trace-rule-rejection -G trace-entries # -G trace-all
2634 @SIM_ENABLE_ARCH_mips_TRUE@mips_IGEN_INSN = $(srcdir)/mips/mips.igen
2635 @SIM_ENABLE_ARCH_mips_TRUE@mips_IGEN_INSN_INC = \
2636 @SIM_ENABLE_ARCH_mips_TRUE@     mips/dsp.igen \
2637 @SIM_ENABLE_ARCH_mips_TRUE@     mips/dsp2.igen \
2638 @SIM_ENABLE_ARCH_mips_TRUE@     mips/m16.igen \
2639 @SIM_ENABLE_ARCH_mips_TRUE@     mips/m16e.igen \
2640 @SIM_ENABLE_ARCH_mips_TRUE@     mips/mdmx.igen \
2641 @SIM_ENABLE_ARCH_mips_TRUE@     mips/micromipsdsp.igen \
2642 @SIM_ENABLE_ARCH_mips_TRUE@     mips/micromips.igen \
2643 @SIM_ENABLE_ARCH_mips_TRUE@     mips/mips3264r2.igen \
2644 @SIM_ENABLE_ARCH_mips_TRUE@     mips/mips3264r6.igen \
2645 @SIM_ENABLE_ARCH_mips_TRUE@     mips/mips3d.igen \
2646 @SIM_ENABLE_ARCH_mips_TRUE@     mips/sb1.igen \
2647 @SIM_ENABLE_ARCH_mips_TRUE@     mips/tx.igen \
2648 @SIM_ENABLE_ARCH_mips_TRUE@     mips/vr.igen
2649
2650 @SIM_ENABLE_ARCH_mips_TRUE@mips_IGEN_DC = $(srcdir)/mips/mips.dc
2651 @SIM_ENABLE_ARCH_mips_TRUE@mips_M16_DC = $(srcdir)/mips/m16.dc
2652 @SIM_ENABLE_ARCH_mips_TRUE@mips_MICROMIPS32_DC = $(srcdir)/mips/micromips.dc
2653 @SIM_ENABLE_ARCH_mips_TRUE@mips_MICROMIPS16_DC = $(srcdir)/mips/micromips16.dc
2654 @SIM_ENABLE_ARCH_mn10300_TRUE@AM_CPPFLAGS_mn10300 = \
2655 @SIM_ENABLE_ARCH_mn10300_TRUE@  -DPOLL_QUIT_INTERVAL=0x20 \
2656 @SIM_ENABLE_ARCH_mn10300_TRUE@  -DWITH_TARGET_WORD_BITSIZE=32 -DWITH_TARGET_WORD_MSB=31
2657
2658 @SIM_ENABLE_ARCH_mn10300_TRUE@mn10300_libsim_a_SOURCES = \
2659 @SIM_ENABLE_ARCH_mn10300_TRUE@  $(common_libcommon_a_SOURCES)
2660
2661 @SIM_ENABLE_ARCH_mn10300_TRUE@mn10300_libsim_a_LIBADD = \
2662 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/itable.o \
2663 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/semantics.o \
2664 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/idecode.o \
2665 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/icache.o \
2666 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/engine.o \
2667 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/irun.o \
2668 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/support.o \
2669 @SIM_ENABLE_ARCH_mn10300_TRUE@  $(patsubst %,mn10300/%,$(SIM_NEW_COMMON_OBJS)) \
2670 @SIM_ENABLE_ARCH_mn10300_TRUE@  $(patsubst %,mn10300/dv-%.o,$(SIM_HW_DEVICES)) \
2671 @SIM_ENABLE_ARCH_mn10300_TRUE@  $(patsubst %,mn10300/dv-%.o,$(mn10300_SIM_EXTRA_HW_DEVICES)) \
2672 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/interp.o \
2673 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/modules.o \
2674 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/op_utils.o \
2675 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/sim-resume.o
2676
2677 @SIM_ENABLE_ARCH_mn10300_TRUE@mn10300_run_SOURCES =
2678 @SIM_ENABLE_ARCH_mn10300_TRUE@mn10300_run_LDADD = \
2679 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/nrun.o \
2680 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/libsim.a \
2681 @SIM_ENABLE_ARCH_mn10300_TRUE@  $(SIM_COMMON_LIBS)
2682
2683 @SIM_ENABLE_ARCH_mn10300_TRUE@mn10300_SIM_EXTRA_HW_DEVICES = mn103cpu mn103int mn103tim mn103ser mn103iop
2684 @SIM_ENABLE_ARCH_mn10300_TRUE@mn10300_BUILT_SRC_FROM_IGEN = \
2685 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/icache.h \
2686 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/icache.c \
2687 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/idecode.h \
2688 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/idecode.c \
2689 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/semantics.h \
2690 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/semantics.c \
2691 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/model.h \
2692 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/model.c \
2693 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/support.h \
2694 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/support.c \
2695 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/itable.h \
2696 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/itable.c \
2697 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/engine.h \
2698 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/engine.c \
2699 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/irun.c
2700
2701 @SIM_ENABLE_ARCH_mn10300_TRUE@mn10300_BUILD_OUTPUTS = \
2702 @SIM_ENABLE_ARCH_mn10300_TRUE@  $(mn10300_BUILT_SRC_FROM_IGEN) \
2703 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/stamp-igen
2704
2705 @SIM_ENABLE_ARCH_mn10300_TRUE@mn10300_IGEN_TRACE = # -G omit-line-numbers # -G trace-rule-selection -G trace-rule-rejection -G trace-entries
2706 @SIM_ENABLE_ARCH_mn10300_TRUE@mn10300_IGEN_INSN = $(srcdir)/mn10300/mn10300.igen
2707 @SIM_ENABLE_ARCH_mn10300_TRUE@mn10300_IGEN_INSN_INC = mn10300/am33.igen mn10300/am33-2.igen
2708 @SIM_ENABLE_ARCH_mn10300_TRUE@mn10300_IGEN_DC = $(srcdir)/mn10300/mn10300.dc
2709 @SIM_ENABLE_ARCH_moxie_TRUE@AM_CPPFLAGS_moxie = -DDTB="\"$(dtbdir)/moxie-gdb.dtb\""
2710 @SIM_ENABLE_ARCH_moxie_TRUE@moxie_libsim_a_SOURCES = \
2711 @SIM_ENABLE_ARCH_moxie_TRUE@    $(common_libcommon_a_SOURCES)
2712
2713 @SIM_ENABLE_ARCH_moxie_TRUE@moxie_libsim_a_LIBADD = \
2714 @SIM_ENABLE_ARCH_moxie_TRUE@    $(patsubst %,moxie/%,$(SIM_NEW_COMMON_OBJS)) \
2715 @SIM_ENABLE_ARCH_moxie_TRUE@    $(patsubst %,moxie/dv-%.o,$(SIM_HW_DEVICES)) \
2716 @SIM_ENABLE_ARCH_moxie_TRUE@    moxie/interp.o \
2717 @SIM_ENABLE_ARCH_moxie_TRUE@    moxie/modules.o \
2718 @SIM_ENABLE_ARCH_moxie_TRUE@    moxie/sim-resume.o
2719
2720 @SIM_ENABLE_ARCH_moxie_TRUE@moxie_run_SOURCES =
2721 @SIM_ENABLE_ARCH_moxie_TRUE@moxie_run_LDADD = \
2722 @SIM_ENABLE_ARCH_moxie_TRUE@    moxie/nrun.o \
2723 @SIM_ENABLE_ARCH_moxie_TRUE@    moxie/libsim.a \
2724 @SIM_ENABLE_ARCH_moxie_TRUE@    $(SIM_COMMON_LIBS)
2725
2726 @SIM_ENABLE_ARCH_moxie_TRUE@dtbdir = $(datadir)/gdb/dtb
2727 @SIM_ENABLE_ARCH_moxie_TRUE@dtb_DATA = moxie/moxie-gdb.dtb
2728 @SIM_ENABLE_ARCH_msp430_TRUE@msp430_libsim_a_SOURCES = \
2729 @SIM_ENABLE_ARCH_msp430_TRUE@   $(common_libcommon_a_SOURCES)
2730
2731 @SIM_ENABLE_ARCH_msp430_TRUE@msp430_libsim_a_LIBADD = \
2732 @SIM_ENABLE_ARCH_msp430_TRUE@   $(patsubst %,msp430/%,$(SIM_NEW_COMMON_OBJS)) \
2733 @SIM_ENABLE_ARCH_msp430_TRUE@   $(patsubst %,msp430/dv-%.o,$(SIM_HW_DEVICES)) \
2734 @SIM_ENABLE_ARCH_msp430_TRUE@   msp430/msp430-sim.o \
2735 @SIM_ENABLE_ARCH_msp430_TRUE@   msp430/modules.o \
2736 @SIM_ENABLE_ARCH_msp430_TRUE@   msp430/sim-resume.o
2737
2738 @SIM_ENABLE_ARCH_msp430_TRUE@msp430_run_SOURCES =
2739 @SIM_ENABLE_ARCH_msp430_TRUE@msp430_run_LDADD = \
2740 @SIM_ENABLE_ARCH_msp430_TRUE@   msp430/nrun.o \
2741 @SIM_ENABLE_ARCH_msp430_TRUE@   msp430/libsim.a \
2742 @SIM_ENABLE_ARCH_msp430_TRUE@   $(SIM_COMMON_LIBS)
2743
2744 @SIM_ENABLE_ARCH_or1k_TRUE@AM_CPPFLAGS_or1k = -DWITH_TARGET_WORD_BITSIZE=32 -DWITH_TARGET_WORD_MSB=31
2745 @SIM_ENABLE_ARCH_or1k_TRUE@or1k_libsim_a_SOURCES = \
2746 @SIM_ENABLE_ARCH_or1k_TRUE@     $(common_libcommon_a_SOURCES)
2747
2748 @SIM_ENABLE_ARCH_or1k_TRUE@or1k_libsim_a_LIBADD = \
2749 @SIM_ENABLE_ARCH_or1k_TRUE@     $(patsubst %,or1k/%,$(SIM_NEW_COMMON_OBJS)) \
2750 @SIM_ENABLE_ARCH_or1k_TRUE@     $(patsubst %,or1k/dv-%.o,$(SIM_HW_DEVICES)) \
2751 @SIM_ENABLE_ARCH_or1k_TRUE@     or1k/modules.o \
2752 @SIM_ENABLE_ARCH_or1k_TRUE@     \
2753 @SIM_ENABLE_ARCH_or1k_TRUE@     or1k/cgen-accfp.o \
2754 @SIM_ENABLE_ARCH_or1k_TRUE@     or1k/cgen-fpu.o \
2755 @SIM_ENABLE_ARCH_or1k_TRUE@     or1k/cgen-run.o \
2756 @SIM_ENABLE_ARCH_or1k_TRUE@     or1k/cgen-scache.o \
2757 @SIM_ENABLE_ARCH_or1k_TRUE@     or1k/cgen-trace.o \
2758 @SIM_ENABLE_ARCH_or1k_TRUE@     or1k/cgen-utils.o \
2759 @SIM_ENABLE_ARCH_or1k_TRUE@     \
2760 @SIM_ENABLE_ARCH_or1k_TRUE@     or1k/arch.o \
2761 @SIM_ENABLE_ARCH_or1k_TRUE@     or1k/cpu.o \
2762 @SIM_ENABLE_ARCH_or1k_TRUE@     or1k/decode.o \
2763 @SIM_ENABLE_ARCH_or1k_TRUE@     or1k/mloop.o \
2764 @SIM_ENABLE_ARCH_or1k_TRUE@     or1k/model.o \
2765 @SIM_ENABLE_ARCH_or1k_TRUE@     or1k/sem.o \
2766 @SIM_ENABLE_ARCH_or1k_TRUE@     \
2767 @SIM_ENABLE_ARCH_or1k_TRUE@     or1k/or1k.o \
2768 @SIM_ENABLE_ARCH_or1k_TRUE@     or1k/sim-if.o \
2769 @SIM_ENABLE_ARCH_or1k_TRUE@     or1k/traps.o
2770
2771 @SIM_ENABLE_ARCH_or1k_TRUE@or1k_run_SOURCES =
2772 @SIM_ENABLE_ARCH_or1k_TRUE@or1k_run_LDADD = \
2773 @SIM_ENABLE_ARCH_or1k_TRUE@     or1k/nrun.o \
2774 @SIM_ENABLE_ARCH_or1k_TRUE@     or1k/libsim.a \
2775 @SIM_ENABLE_ARCH_or1k_TRUE@     $(SIM_COMMON_LIBS)
2776
2777 @SIM_ENABLE_ARCH_or1k_TRUE@or1kdocdir = $(docdir)/or1k
2778 @SIM_ENABLE_ARCH_or1k_TRUE@or1kdoc_DATA = or1k/README
2779 @SIM_ENABLE_ARCH_or1k_TRUE@or1k_BUILD_OUTPUTS = \
2780 @SIM_ENABLE_ARCH_or1k_TRUE@     or1k/mloop.c \
2781 @SIM_ENABLE_ARCH_or1k_TRUE@     or1k/stamp-mloop
2782
2783 @SIM_ENABLE_ARCH_ppc_TRUE@ppc_run_SOURCES =
2784 @SIM_ENABLE_ARCH_ppc_TRUE@ppc_run_LDADD = \
2785 @SIM_ENABLE_ARCH_ppc_TRUE@      ppc/main.o \
2786 @SIM_ENABLE_ARCH_ppc_TRUE@      ppc/libsim.a \
2787 @SIM_ENABLE_ARCH_ppc_TRUE@      $(SIM_COMMON_LIBS)
2788
2789 @SIM_ENABLE_ARCH_ppc_TRUE@ppcdocdir = $(docdir)/ppc
2790 @SIM_ENABLE_ARCH_ppc_TRUE@ppcdoc_DATA = ppc/BUGS ppc/INSTALL ppc/README ppc/RUN
2791 @SIM_ENABLE_ARCH_pru_TRUE@pru_libsim_a_SOURCES = \
2792 @SIM_ENABLE_ARCH_pru_TRUE@      $(common_libcommon_a_SOURCES)
2793
2794 @SIM_ENABLE_ARCH_pru_TRUE@pru_libsim_a_LIBADD = \
2795 @SIM_ENABLE_ARCH_pru_TRUE@      $(patsubst %,pru/%,$(SIM_NEW_COMMON_OBJS)) \
2796 @SIM_ENABLE_ARCH_pru_TRUE@      $(patsubst %,pru/dv-%.o,$(SIM_HW_DEVICES)) \
2797 @SIM_ENABLE_ARCH_pru_TRUE@      pru/interp.o \
2798 @SIM_ENABLE_ARCH_pru_TRUE@      pru/modules.o \
2799 @SIM_ENABLE_ARCH_pru_TRUE@      pru/sim-resume.o
2800
2801 @SIM_ENABLE_ARCH_pru_TRUE@pru_run_SOURCES =
2802 @SIM_ENABLE_ARCH_pru_TRUE@pru_run_LDADD = \
2803 @SIM_ENABLE_ARCH_pru_TRUE@      pru/nrun.o \
2804 @SIM_ENABLE_ARCH_pru_TRUE@      pru/libsim.a \
2805 @SIM_ENABLE_ARCH_pru_TRUE@      $(SIM_COMMON_LIBS)
2806
2807 @SIM_ENABLE_ARCH_riscv_TRUE@AM_CPPFLAGS_riscv = -DWITH_TARGET_WORD_BITSIZE=$(SIM_RISCV_BITSIZE)
2808 @SIM_ENABLE_ARCH_riscv_TRUE@riscv_libsim_a_SOURCES = \
2809 @SIM_ENABLE_ARCH_riscv_TRUE@    $(common_libcommon_a_SOURCES)
2810
2811 @SIM_ENABLE_ARCH_riscv_TRUE@riscv_libsim_a_LIBADD = \
2812 @SIM_ENABLE_ARCH_riscv_TRUE@    $(patsubst %,riscv/%,$(SIM_NEW_COMMON_OBJS)) \
2813 @SIM_ENABLE_ARCH_riscv_TRUE@    $(patsubst %,riscv/dv-%.o,$(SIM_HW_DEVICES)) \
2814 @SIM_ENABLE_ARCH_riscv_TRUE@    riscv/interp.o \
2815 @SIM_ENABLE_ARCH_riscv_TRUE@    riscv/machs.o \
2816 @SIM_ENABLE_ARCH_riscv_TRUE@    riscv/modules.o \
2817 @SIM_ENABLE_ARCH_riscv_TRUE@    riscv/sim-main.o \
2818 @SIM_ENABLE_ARCH_riscv_TRUE@    riscv/sim-resume.o
2819
2820 @SIM_ENABLE_ARCH_riscv_TRUE@riscv_run_SOURCES =
2821 @SIM_ENABLE_ARCH_riscv_TRUE@riscv_run_LDADD = \
2822 @SIM_ENABLE_ARCH_riscv_TRUE@    riscv/nrun.o \
2823 @SIM_ENABLE_ARCH_riscv_TRUE@    riscv/libsim.a \
2824 @SIM_ENABLE_ARCH_riscv_TRUE@    $(SIM_COMMON_LIBS)
2825
2826 @SIM_ENABLE_ARCH_rl78_TRUE@rl78_libsim_a_SOURCES = \
2827 @SIM_ENABLE_ARCH_rl78_TRUE@     $(common_libcommon_a_SOURCES)
2828
2829 @SIM_ENABLE_ARCH_rl78_TRUE@rl78_libsim_a_LIBADD = \
2830 @SIM_ENABLE_ARCH_rl78_TRUE@     rl78/load.o \
2831 @SIM_ENABLE_ARCH_rl78_TRUE@     rl78/mem.o \
2832 @SIM_ENABLE_ARCH_rl78_TRUE@     rl78/cpu.o \
2833 @SIM_ENABLE_ARCH_rl78_TRUE@     rl78/rl78.o \
2834 @SIM_ENABLE_ARCH_rl78_TRUE@     rl78/gdb-if.o \
2835 @SIM_ENABLE_ARCH_rl78_TRUE@     rl78/modules.o \
2836 @SIM_ENABLE_ARCH_rl78_TRUE@     rl78/trace.o
2837
2838 @SIM_ENABLE_ARCH_rl78_TRUE@rl78_run_SOURCES =
2839 @SIM_ENABLE_ARCH_rl78_TRUE@rl78_run_LDADD = \
2840 @SIM_ENABLE_ARCH_rl78_TRUE@     rl78/main.o \
2841 @SIM_ENABLE_ARCH_rl78_TRUE@     rl78/libsim.a \
2842 @SIM_ENABLE_ARCH_rl78_TRUE@     $(SIM_COMMON_LIBS)
2843
2844 @SIM_ENABLE_ARCH_rx_TRUE@AM_CPPFLAGS_rx = $(SIM_RX_CYCLE_ACCURATE_FLAGS)
2845 @SIM_ENABLE_ARCH_rx_TRUE@rx_libsim_a_SOURCES = \
2846 @SIM_ENABLE_ARCH_rx_TRUE@       $(common_libcommon_a_SOURCES)
2847
2848 @SIM_ENABLE_ARCH_rx_TRUE@rx_libsim_a_LIBADD = \
2849 @SIM_ENABLE_ARCH_rx_TRUE@       rx/fpu.o \
2850 @SIM_ENABLE_ARCH_rx_TRUE@       rx/load.o \
2851 @SIM_ENABLE_ARCH_rx_TRUE@       rx/mem.o \
2852 @SIM_ENABLE_ARCH_rx_TRUE@       rx/misc.o \
2853 @SIM_ENABLE_ARCH_rx_TRUE@       rx/reg.o \
2854 @SIM_ENABLE_ARCH_rx_TRUE@       rx/rx.o \
2855 @SIM_ENABLE_ARCH_rx_TRUE@       rx/syscalls.o \
2856 @SIM_ENABLE_ARCH_rx_TRUE@       rx/trace.o \
2857 @SIM_ENABLE_ARCH_rx_TRUE@       rx/gdb-if.o \
2858 @SIM_ENABLE_ARCH_rx_TRUE@       rx/err.o \
2859 @SIM_ENABLE_ARCH_rx_TRUE@       rx/modules.o
2860
2861 @SIM_ENABLE_ARCH_rx_TRUE@rx_run_SOURCES =
2862 @SIM_ENABLE_ARCH_rx_TRUE@rx_run_LDADD = \
2863 @SIM_ENABLE_ARCH_rx_TRUE@       rx/main.o \
2864 @SIM_ENABLE_ARCH_rx_TRUE@       rx/libsim.a \
2865 @SIM_ENABLE_ARCH_rx_TRUE@       $(SIM_COMMON_LIBS)
2866
2867 @SIM_ENABLE_ARCH_rx_TRUE@rxdocdir = $(docdir)/rx
2868 @SIM_ENABLE_ARCH_rx_TRUE@rxdoc_DATA = rx/README.txt
2869 @SIM_ENABLE_ARCH_sh_TRUE@sh_libsim_a_SOURCES = \
2870 @SIM_ENABLE_ARCH_sh_TRUE@       $(common_libcommon_a_SOURCES)
2871
2872 @SIM_ENABLE_ARCH_sh_TRUE@sh_libsim_a_LIBADD = \
2873 @SIM_ENABLE_ARCH_sh_TRUE@       sh/interp.o \
2874 @SIM_ENABLE_ARCH_sh_TRUE@       $(patsubst %,sh/%,$(SIM_NEW_COMMON_OBJS)) \
2875 @SIM_ENABLE_ARCH_sh_TRUE@       $(patsubst %,sh/dv-%.o,$(SIM_HW_DEVICES)) \
2876 @SIM_ENABLE_ARCH_sh_TRUE@       sh/modules.o \
2877 @SIM_ENABLE_ARCH_sh_TRUE@       sh/table.o
2878
2879 @SIM_ENABLE_ARCH_sh_TRUE@sh_run_SOURCES =
2880 @SIM_ENABLE_ARCH_sh_TRUE@sh_run_LDADD = \
2881 @SIM_ENABLE_ARCH_sh_TRUE@       sh/nrun.o \
2882 @SIM_ENABLE_ARCH_sh_TRUE@       sh/libsim.a \
2883 @SIM_ENABLE_ARCH_sh_TRUE@       $(SIM_COMMON_LIBS)
2884
2885 @SIM_ENABLE_ARCH_sh_TRUE@sh_BUILD_OUTPUTS = \
2886 @SIM_ENABLE_ARCH_sh_TRUE@       sh/gencode$(EXEEXT) \
2887 @SIM_ENABLE_ARCH_sh_TRUE@       sh/table.c
2888
2889 @SIM_ENABLE_ARCH_sh_TRUE@sh_gencode_SOURCES = sh/gencode.c
2890 @SIM_ENABLE_ARCH_v850_TRUE@AM_CPPFLAGS_v850 = -DWITH_TARGET_WORD_BITSIZE=32 -DWITH_TARGET_WORD_MSB=31
2891 @SIM_ENABLE_ARCH_v850_TRUE@v850_libsim_a_SOURCES = \
2892 @SIM_ENABLE_ARCH_v850_TRUE@     $(common_libcommon_a_SOURCES)
2893
2894 @SIM_ENABLE_ARCH_v850_TRUE@v850_libsim_a_LIBADD = \
2895 @SIM_ENABLE_ARCH_v850_TRUE@     $(patsubst %,v850/%,$(SIM_NEW_COMMON_OBJS)) \
2896 @SIM_ENABLE_ARCH_v850_TRUE@     $(patsubst %,v850/dv-%.o,$(SIM_HW_DEVICES)) \
2897 @SIM_ENABLE_ARCH_v850_TRUE@     v850/simops.o \
2898 @SIM_ENABLE_ARCH_v850_TRUE@     v850/interp.o \
2899 @SIM_ENABLE_ARCH_v850_TRUE@     v850/itable.o \
2900 @SIM_ENABLE_ARCH_v850_TRUE@     v850/semantics.o \
2901 @SIM_ENABLE_ARCH_v850_TRUE@     v850/idecode.o \
2902 @SIM_ENABLE_ARCH_v850_TRUE@     v850/icache.o \
2903 @SIM_ENABLE_ARCH_v850_TRUE@     v850/engine.o \
2904 @SIM_ENABLE_ARCH_v850_TRUE@     v850/irun.o \
2905 @SIM_ENABLE_ARCH_v850_TRUE@     v850/support.o \
2906 @SIM_ENABLE_ARCH_v850_TRUE@     v850/modules.o \
2907 @SIM_ENABLE_ARCH_v850_TRUE@     v850/sim-resume.o
2908
2909 @SIM_ENABLE_ARCH_v850_TRUE@v850_run_SOURCES =
2910 @SIM_ENABLE_ARCH_v850_TRUE@v850_run_LDADD = \
2911 @SIM_ENABLE_ARCH_v850_TRUE@     v850/nrun.o \
2912 @SIM_ENABLE_ARCH_v850_TRUE@     v850/libsim.a \
2913 @SIM_ENABLE_ARCH_v850_TRUE@     $(SIM_COMMON_LIBS)
2914
2915 @SIM_ENABLE_ARCH_v850_TRUE@v850_BUILT_SRC_FROM_IGEN = \
2916 @SIM_ENABLE_ARCH_v850_TRUE@     v850/icache.h \
2917 @SIM_ENABLE_ARCH_v850_TRUE@     v850/icache.c \
2918 @SIM_ENABLE_ARCH_v850_TRUE@     v850/idecode.h \
2919 @SIM_ENABLE_ARCH_v850_TRUE@     v850/idecode.c \
2920 @SIM_ENABLE_ARCH_v850_TRUE@     v850/semantics.h \
2921 @SIM_ENABLE_ARCH_v850_TRUE@     v850/semantics.c \
2922 @SIM_ENABLE_ARCH_v850_TRUE@     v850/model.h \
2923 @SIM_ENABLE_ARCH_v850_TRUE@     v850/model.c \
2924 @SIM_ENABLE_ARCH_v850_TRUE@     v850/support.h \
2925 @SIM_ENABLE_ARCH_v850_TRUE@     v850/support.c \
2926 @SIM_ENABLE_ARCH_v850_TRUE@     v850/itable.h \
2927 @SIM_ENABLE_ARCH_v850_TRUE@     v850/itable.c \
2928 @SIM_ENABLE_ARCH_v850_TRUE@     v850/engine.h \
2929 @SIM_ENABLE_ARCH_v850_TRUE@     v850/engine.c \
2930 @SIM_ENABLE_ARCH_v850_TRUE@     v850/irun.c
2931
2932 @SIM_ENABLE_ARCH_v850_TRUE@v850_BUILD_OUTPUTS = \
2933 @SIM_ENABLE_ARCH_v850_TRUE@     $(v850_BUILT_SRC_FROM_IGEN) \
2934 @SIM_ENABLE_ARCH_v850_TRUE@     v850/stamp-igen
2935
2936 @SIM_ENABLE_ARCH_v850_TRUE@v850_IGEN_TRACE = # -G omit-line-numbers # -G trace-rule-selection -G trace-rule-rejection -G trace-entries
2937 @SIM_ENABLE_ARCH_v850_TRUE@v850_IGEN_INSN = $(srcdir)/v850/v850.igen
2938 @SIM_ENABLE_ARCH_v850_TRUE@v850_IGEN_DC = $(srcdir)/v850/v850.dc
2939 all: $(BUILT_SOURCES) config.h
2940         $(MAKE) $(AM_MAKEFLAGS) all-recursive
2941
2942 .SUFFIXES:
2943 .SUFFIXES: .c .lo .log .o .obj .test .test$(EXEEXT) .trs
2944 am--refresh: Makefile
2945         @:
2946 $(srcdir)/Makefile.in: @MAINTAINER_MODE_TRUE@ $(srcdir)/Makefile.am $(srcdir)/common/local.mk $(srcdir)/igen/local.mk $(srcdir)/testsuite/local.mk $(srcdir)/testsuite/common/local.mk $(srcdir)/aarch64/local.mk $(srcdir)/arm/local.mk $(srcdir)/avr/local.mk $(srcdir)/bfin/local.mk $(srcdir)/bpf/local.mk $(srcdir)/cr16/local.mk $(srcdir)/cris/local.mk $(srcdir)/d10v/local.mk $(srcdir)/erc32/local.mk $(srcdir)/example-synacor/local.mk $(srcdir)/frv/local.mk $(srcdir)/ft32/local.mk $(srcdir)/h8300/local.mk $(srcdir)/iq2000/local.mk $(srcdir)/lm32/local.mk $(srcdir)/m32c/local.mk $(srcdir)/m32r/local.mk $(srcdir)/m68hc11/local.mk $(srcdir)/mcore/local.mk $(srcdir)/microblaze/local.mk $(srcdir)/mips/local.mk $(srcdir)/mn10300/local.mk $(srcdir)/moxie/local.mk $(srcdir)/msp430/local.mk $(srcdir)/or1k/local.mk $(srcdir)/ppc/local.mk $(srcdir)/pru/local.mk $(srcdir)/riscv/local.mk $(srcdir)/rl78/local.mk $(srcdir)/rx/local.mk $(srcdir)/sh/local.mk $(srcdir)/v850/local.mk $(am__configure_deps)
2947         @for dep in $?; do \
2948           case '$(am__configure_deps)' in \
2949             *$$dep*) \
2950               echo ' cd $(srcdir) && $(AUTOMAKE) --foreign'; \
2951               $(am__cd) $(srcdir) && $(AUTOMAKE) --foreign \
2952                 && exit 0; \
2953               exit 1;; \
2954           esac; \
2955         done; \
2956         echo ' cd $(top_srcdir) && $(AUTOMAKE) --foreign Makefile'; \
2957         $(am__cd) $(top_srcdir) && \
2958           $(AUTOMAKE) --foreign Makefile
2959 Makefile: $(srcdir)/Makefile.in $(top_builddir)/config.status
2960         @case '$?' in \
2961           *config.status*) \
2962             echo ' $(SHELL) ./config.status'; \
2963             $(SHELL) ./config.status;; \
2964           *) \
2965             echo ' cd $(top_builddir) && $(SHELL) ./config.status $@ $(am__depfiles_maybe)'; \
2966             cd $(top_builddir) && $(SHELL) ./config.status $@ $(am__depfiles_maybe);; \
2967         esac;
2968 $(srcdir)/common/local.mk $(srcdir)/igen/local.mk $(srcdir)/testsuite/local.mk $(srcdir)/testsuite/common/local.mk $(srcdir)/aarch64/local.mk $(srcdir)/arm/local.mk $(srcdir)/avr/local.mk $(srcdir)/bfin/local.mk $(srcdir)/bpf/local.mk $(srcdir)/cr16/local.mk $(srcdir)/cris/local.mk $(srcdir)/d10v/local.mk $(srcdir)/erc32/local.mk $(srcdir)/example-synacor/local.mk $(srcdir)/frv/local.mk $(srcdir)/ft32/local.mk $(srcdir)/h8300/local.mk $(srcdir)/iq2000/local.mk $(srcdir)/lm32/local.mk $(srcdir)/m32c/local.mk $(srcdir)/m32r/local.mk $(srcdir)/m68hc11/local.mk $(srcdir)/mcore/local.mk $(srcdir)/microblaze/local.mk $(srcdir)/mips/local.mk $(srcdir)/mn10300/local.mk $(srcdir)/moxie/local.mk $(srcdir)/msp430/local.mk $(srcdir)/or1k/local.mk $(srcdir)/ppc/local.mk $(srcdir)/pru/local.mk $(srcdir)/riscv/local.mk $(srcdir)/rl78/local.mk $(srcdir)/rx/local.mk $(srcdir)/sh/local.mk $(srcdir)/v850/local.mk $(am__empty):
2969
2970 $(top_builddir)/config.status: $(top_srcdir)/configure $(CONFIG_STATUS_DEPENDENCIES)
2971         $(SHELL) ./config.status --recheck
2972
2973 $(top_srcdir)/configure: @MAINTAINER_MODE_TRUE@ $(am__configure_deps)
2974         $(am__cd) $(srcdir) && $(AUTOCONF)
2975 $(ACLOCAL_M4): @MAINTAINER_MODE_TRUE@ $(am__aclocal_m4_deps)
2976         $(am__cd) $(srcdir) && $(ACLOCAL) $(ACLOCAL_AMFLAGS)
2977 $(am__aclocal_m4_deps):
2978
2979 config.h: stamp-h1
2980         @test -f $@ || rm -f stamp-h1
2981         @test -f $@ || $(MAKE) $(AM_MAKEFLAGS) stamp-h1
2982
2983 stamp-h1: $(srcdir)/config.h.in $(top_builddir)/config.status
2984         @rm -f stamp-h1
2985         cd $(top_builddir) && $(SHELL) ./config.status config.h
2986 $(srcdir)/config.h.in: @MAINTAINER_MODE_TRUE@ $(am__configure_deps)
2987         ($(am__cd) $(top_srcdir) && $(AUTOHEADER))
2988         rm -f stamp-h1
2989         touch $@
2990
2991 distclean-hdr:
2992         -rm -f config.h stamp-h1
2993 aarch64/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
2994         cd $(top_builddir) && $(SHELL) ./config.status $@
2995 arm/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
2996         cd $(top_builddir) && $(SHELL) ./config.status $@
2997 avr/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
2998         cd $(top_builddir) && $(SHELL) ./config.status $@
2999 bfin/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
3000         cd $(top_builddir) && $(SHELL) ./config.status $@
3001 bpf/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
3002         cd $(top_builddir) && $(SHELL) ./config.status $@
3003 cr16/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
3004         cd $(top_builddir) && $(SHELL) ./config.status $@
3005 cris/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
3006         cd $(top_builddir) && $(SHELL) ./config.status $@
3007 d10v/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
3008         cd $(top_builddir) && $(SHELL) ./config.status $@
3009 frv/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
3010         cd $(top_builddir) && $(SHELL) ./config.status $@
3011 ft32/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
3012         cd $(top_builddir) && $(SHELL) ./config.status $@
3013 h8300/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
3014         cd $(top_builddir) && $(SHELL) ./config.status $@
3015 iq2000/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
3016         cd $(top_builddir) && $(SHELL) ./config.status $@
3017 lm32/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
3018         cd $(top_builddir) && $(SHELL) ./config.status $@
3019 m32c/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
3020         cd $(top_builddir) && $(SHELL) ./config.status $@
3021 m32r/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
3022         cd $(top_builddir) && $(SHELL) ./config.status $@
3023 m68hc11/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
3024         cd $(top_builddir) && $(SHELL) ./config.status $@
3025 mcore/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
3026         cd $(top_builddir) && $(SHELL) ./config.status $@
3027 microblaze/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
3028         cd $(top_builddir) && $(SHELL) ./config.status $@
3029 mips/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
3030         cd $(top_builddir) && $(SHELL) ./config.status $@
3031 mn10300/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
3032         cd $(top_builddir) && $(SHELL) ./config.status $@
3033 moxie/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
3034         cd $(top_builddir) && $(SHELL) ./config.status $@
3035 msp430/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
3036         cd $(top_builddir) && $(SHELL) ./config.status $@
3037 or1k/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
3038         cd $(top_builddir) && $(SHELL) ./config.status $@
3039 ppc/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
3040         cd $(top_builddir) && $(SHELL) ./config.status $@
3041 pru/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
3042         cd $(top_builddir) && $(SHELL) ./config.status $@
3043 riscv/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
3044         cd $(top_builddir) && $(SHELL) ./config.status $@
3045 rl78/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
3046         cd $(top_builddir) && $(SHELL) ./config.status $@
3047 rx/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
3048         cd $(top_builddir) && $(SHELL) ./config.status $@
3049 sh/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
3050         cd $(top_builddir) && $(SHELL) ./config.status $@
3051 erc32/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
3052         cd $(top_builddir) && $(SHELL) ./config.status $@
3053 v850/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
3054         cd $(top_builddir) && $(SHELL) ./config.status $@
3055 example-synacor/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
3056         cd $(top_builddir) && $(SHELL) ./config.status $@
3057 arch-subdir.mk: $(top_builddir)/config.status $(srcdir)/arch-subdir.mk.in
3058         cd $(top_builddir) && $(SHELL) ./config.status $@
3059 .gdbinit: $(top_builddir)/config.status $(srcdir)/gdbinit.in
3060         cd $(top_builddir) && $(SHELL) ./config.status $@
3061
3062 clean-noinstLIBRARIES:
3063         -test -z "$(noinst_LIBRARIES)" || rm -f $(noinst_LIBRARIES)
3064 common/$(am__dirstamp):
3065         @$(MKDIR_P) common
3066         @: > common/$(am__dirstamp)
3067 common/$(DEPDIR)/$(am__dirstamp):
3068         @$(MKDIR_P) common/$(DEPDIR)
3069         @: > common/$(DEPDIR)/$(am__dirstamp)
3070 common/callback.$(OBJEXT): common/$(am__dirstamp) \
3071         common/$(DEPDIR)/$(am__dirstamp)
3072 common/portability.$(OBJEXT): common/$(am__dirstamp) \
3073         common/$(DEPDIR)/$(am__dirstamp)
3074 common/sim-load.$(OBJEXT): common/$(am__dirstamp) \
3075         common/$(DEPDIR)/$(am__dirstamp)
3076 common/syscall.$(OBJEXT): common/$(am__dirstamp) \
3077         common/$(DEPDIR)/$(am__dirstamp)
3078 common/target-newlib-errno.$(OBJEXT): common/$(am__dirstamp) \
3079         common/$(DEPDIR)/$(am__dirstamp)
3080 common/target-newlib-open.$(OBJEXT): common/$(am__dirstamp) \
3081         common/$(DEPDIR)/$(am__dirstamp)
3082 common/target-newlib-signal.$(OBJEXT): common/$(am__dirstamp) \
3083         common/$(DEPDIR)/$(am__dirstamp)
3084 common/target-newlib-syscall.$(OBJEXT): common/$(am__dirstamp) \
3085         common/$(DEPDIR)/$(am__dirstamp)
3086 common/version.$(OBJEXT): common/$(am__dirstamp) \
3087         common/$(DEPDIR)/$(am__dirstamp)
3088 aarch64/$(am__dirstamp):
3089         @$(MKDIR_P) aarch64
3090         @: > aarch64/$(am__dirstamp)
3091
3092 aarch64/libsim.a: $(aarch64_libsim_a_OBJECTS) $(aarch64_libsim_a_DEPENDENCIES) $(EXTRA_aarch64_libsim_a_DEPENDENCIES) aarch64/$(am__dirstamp)
3093         $(AM_V_at)-rm -f aarch64/libsim.a
3094         $(AM_V_AR)$(aarch64_libsim_a_AR) aarch64/libsim.a $(aarch64_libsim_a_OBJECTS) $(aarch64_libsim_a_LIBADD)
3095         $(AM_V_at)$(RANLIB) aarch64/libsim.a
3096 arm/$(am__dirstamp):
3097         @$(MKDIR_P) arm
3098         @: > arm/$(am__dirstamp)
3099
3100 arm/libsim.a: $(arm_libsim_a_OBJECTS) $(arm_libsim_a_DEPENDENCIES) $(EXTRA_arm_libsim_a_DEPENDENCIES) arm/$(am__dirstamp)
3101         $(AM_V_at)-rm -f arm/libsim.a
3102         $(AM_V_AR)$(arm_libsim_a_AR) arm/libsim.a $(arm_libsim_a_OBJECTS) $(arm_libsim_a_LIBADD)
3103         $(AM_V_at)$(RANLIB) arm/libsim.a
3104 avr/$(am__dirstamp):
3105         @$(MKDIR_P) avr
3106         @: > avr/$(am__dirstamp)
3107
3108 avr/libsim.a: $(avr_libsim_a_OBJECTS) $(avr_libsim_a_DEPENDENCIES) $(EXTRA_avr_libsim_a_DEPENDENCIES) avr/$(am__dirstamp)
3109         $(AM_V_at)-rm -f avr/libsim.a
3110         $(AM_V_AR)$(avr_libsim_a_AR) avr/libsim.a $(avr_libsim_a_OBJECTS) $(avr_libsim_a_LIBADD)
3111         $(AM_V_at)$(RANLIB) avr/libsim.a
3112 bfin/$(am__dirstamp):
3113         @$(MKDIR_P) bfin
3114         @: > bfin/$(am__dirstamp)
3115
3116 bfin/libsim.a: $(bfin_libsim_a_OBJECTS) $(bfin_libsim_a_DEPENDENCIES) $(EXTRA_bfin_libsim_a_DEPENDENCIES) bfin/$(am__dirstamp)
3117         $(AM_V_at)-rm -f bfin/libsim.a
3118         $(AM_V_AR)$(bfin_libsim_a_AR) bfin/libsim.a $(bfin_libsim_a_OBJECTS) $(bfin_libsim_a_LIBADD)
3119         $(AM_V_at)$(RANLIB) bfin/libsim.a
3120 bpf/$(am__dirstamp):
3121         @$(MKDIR_P) bpf
3122         @: > bpf/$(am__dirstamp)
3123
3124 bpf/libsim.a: $(bpf_libsim_a_OBJECTS) $(bpf_libsim_a_DEPENDENCIES) $(EXTRA_bpf_libsim_a_DEPENDENCIES) bpf/$(am__dirstamp)
3125         $(AM_V_at)-rm -f bpf/libsim.a
3126         $(AM_V_AR)$(bpf_libsim_a_AR) bpf/libsim.a $(bpf_libsim_a_OBJECTS) $(bpf_libsim_a_LIBADD)
3127         $(AM_V_at)$(RANLIB) bpf/libsim.a
3128
3129 common/libcommon.a: $(common_libcommon_a_OBJECTS) $(common_libcommon_a_DEPENDENCIES) $(EXTRA_common_libcommon_a_DEPENDENCIES) common/$(am__dirstamp)
3130         $(AM_V_at)-rm -f common/libcommon.a
3131         $(AM_V_AR)$(common_libcommon_a_AR) common/libcommon.a $(common_libcommon_a_OBJECTS) $(common_libcommon_a_LIBADD)
3132         $(AM_V_at)$(RANLIB) common/libcommon.a
3133 cr16/$(am__dirstamp):
3134         @$(MKDIR_P) cr16
3135         @: > cr16/$(am__dirstamp)
3136
3137 cr16/libsim.a: $(cr16_libsim_a_OBJECTS) $(cr16_libsim_a_DEPENDENCIES) $(EXTRA_cr16_libsim_a_DEPENDENCIES) cr16/$(am__dirstamp)
3138         $(AM_V_at)-rm -f cr16/libsim.a
3139         $(AM_V_AR)$(cr16_libsim_a_AR) cr16/libsim.a $(cr16_libsim_a_OBJECTS) $(cr16_libsim_a_LIBADD)
3140         $(AM_V_at)$(RANLIB) cr16/libsim.a
3141 cris/$(am__dirstamp):
3142         @$(MKDIR_P) cris
3143         @: > cris/$(am__dirstamp)
3144
3145 cris/libsim.a: $(cris_libsim_a_OBJECTS) $(cris_libsim_a_DEPENDENCIES) $(EXTRA_cris_libsim_a_DEPENDENCIES) cris/$(am__dirstamp)
3146         $(AM_V_at)-rm -f cris/libsim.a
3147         $(AM_V_AR)$(cris_libsim_a_AR) cris/libsim.a $(cris_libsim_a_OBJECTS) $(cris_libsim_a_LIBADD)
3148         $(AM_V_at)$(RANLIB) cris/libsim.a
3149 d10v/$(am__dirstamp):
3150         @$(MKDIR_P) d10v
3151         @: > d10v/$(am__dirstamp)
3152
3153 d10v/libsim.a: $(d10v_libsim_a_OBJECTS) $(d10v_libsim_a_DEPENDENCIES) $(EXTRA_d10v_libsim_a_DEPENDENCIES) d10v/$(am__dirstamp)
3154         $(AM_V_at)-rm -f d10v/libsim.a
3155         $(AM_V_AR)$(d10v_libsim_a_AR) d10v/libsim.a $(d10v_libsim_a_OBJECTS) $(d10v_libsim_a_LIBADD)
3156         $(AM_V_at)$(RANLIB) d10v/libsim.a
3157 erc32/$(am__dirstamp):
3158         @$(MKDIR_P) erc32
3159         @: > erc32/$(am__dirstamp)
3160
3161 erc32/libsim.a: $(erc32_libsim_a_OBJECTS) $(erc32_libsim_a_DEPENDENCIES) $(EXTRA_erc32_libsim_a_DEPENDENCIES) erc32/$(am__dirstamp)
3162         $(AM_V_at)-rm -f erc32/libsim.a
3163         $(AM_V_AR)$(erc32_libsim_a_AR) erc32/libsim.a $(erc32_libsim_a_OBJECTS) $(erc32_libsim_a_LIBADD)
3164         $(AM_V_at)$(RANLIB) erc32/libsim.a
3165 example-synacor/$(am__dirstamp):
3166         @$(MKDIR_P) example-synacor
3167         @: > example-synacor/$(am__dirstamp)
3168
3169 example-synacor/libsim.a: $(example_synacor_libsim_a_OBJECTS) $(example_synacor_libsim_a_DEPENDENCIES) $(EXTRA_example_synacor_libsim_a_DEPENDENCIES) example-synacor/$(am__dirstamp)
3170         $(AM_V_at)-rm -f example-synacor/libsim.a
3171         $(AM_V_AR)$(example_synacor_libsim_a_AR) example-synacor/libsim.a $(example_synacor_libsim_a_OBJECTS) $(example_synacor_libsim_a_LIBADD)
3172         $(AM_V_at)$(RANLIB) example-synacor/libsim.a
3173 frv/$(am__dirstamp):
3174         @$(MKDIR_P) frv
3175         @: > frv/$(am__dirstamp)
3176
3177 frv/libsim.a: $(frv_libsim_a_OBJECTS) $(frv_libsim_a_DEPENDENCIES) $(EXTRA_frv_libsim_a_DEPENDENCIES) frv/$(am__dirstamp)
3178         $(AM_V_at)-rm -f frv/libsim.a
3179         $(AM_V_AR)$(frv_libsim_a_AR) frv/libsim.a $(frv_libsim_a_OBJECTS) $(frv_libsim_a_LIBADD)
3180         $(AM_V_at)$(RANLIB) frv/libsim.a
3181 ft32/$(am__dirstamp):
3182         @$(MKDIR_P) ft32
3183         @: > ft32/$(am__dirstamp)
3184
3185 ft32/libsim.a: $(ft32_libsim_a_OBJECTS) $(ft32_libsim_a_DEPENDENCIES) $(EXTRA_ft32_libsim_a_DEPENDENCIES) ft32/$(am__dirstamp)
3186         $(AM_V_at)-rm -f ft32/libsim.a
3187         $(AM_V_AR)$(ft32_libsim_a_AR) ft32/libsim.a $(ft32_libsim_a_OBJECTS) $(ft32_libsim_a_LIBADD)
3188         $(AM_V_at)$(RANLIB) ft32/libsim.a
3189 h8300/$(am__dirstamp):
3190         @$(MKDIR_P) h8300
3191         @: > h8300/$(am__dirstamp)
3192
3193 h8300/libsim.a: $(h8300_libsim_a_OBJECTS) $(h8300_libsim_a_DEPENDENCIES) $(EXTRA_h8300_libsim_a_DEPENDENCIES) h8300/$(am__dirstamp)
3194         $(AM_V_at)-rm -f h8300/libsim.a
3195         $(AM_V_AR)$(h8300_libsim_a_AR) h8300/libsim.a $(h8300_libsim_a_OBJECTS) $(h8300_libsim_a_LIBADD)
3196         $(AM_V_at)$(RANLIB) h8300/libsim.a
3197 igen/$(am__dirstamp):
3198         @$(MKDIR_P) igen
3199         @: > igen/$(am__dirstamp)
3200 igen/$(DEPDIR)/$(am__dirstamp):
3201         @$(MKDIR_P) igen/$(DEPDIR)
3202         @: > igen/$(DEPDIR)/$(am__dirstamp)
3203 igen/table.$(OBJEXT): igen/$(am__dirstamp) \
3204         igen/$(DEPDIR)/$(am__dirstamp)
3205 igen/lf.$(OBJEXT): igen/$(am__dirstamp) igen/$(DEPDIR)/$(am__dirstamp)
3206 igen/misc.$(OBJEXT): igen/$(am__dirstamp) \
3207         igen/$(DEPDIR)/$(am__dirstamp)
3208 igen/filter_host.$(OBJEXT): igen/$(am__dirstamp) \
3209         igen/$(DEPDIR)/$(am__dirstamp)
3210 igen/ld-decode.$(OBJEXT): igen/$(am__dirstamp) \
3211         igen/$(DEPDIR)/$(am__dirstamp)
3212 igen/ld-cache.$(OBJEXT): igen/$(am__dirstamp) \
3213         igen/$(DEPDIR)/$(am__dirstamp)
3214 igen/filter.$(OBJEXT): igen/$(am__dirstamp) \
3215         igen/$(DEPDIR)/$(am__dirstamp)
3216 igen/ld-insn.$(OBJEXT): igen/$(am__dirstamp) \
3217         igen/$(DEPDIR)/$(am__dirstamp)
3218 igen/gen-model.$(OBJEXT): igen/$(am__dirstamp) \
3219         igen/$(DEPDIR)/$(am__dirstamp)
3220 igen/gen-itable.$(OBJEXT): igen/$(am__dirstamp) \
3221         igen/$(DEPDIR)/$(am__dirstamp)
3222 igen/gen-icache.$(OBJEXT): igen/$(am__dirstamp) \
3223         igen/$(DEPDIR)/$(am__dirstamp)
3224 igen/gen-semantics.$(OBJEXT): igen/$(am__dirstamp) \
3225         igen/$(DEPDIR)/$(am__dirstamp)
3226 igen/gen-idecode.$(OBJEXT): igen/$(am__dirstamp) \
3227         igen/$(DEPDIR)/$(am__dirstamp)
3228 igen/gen-support.$(OBJEXT): igen/$(am__dirstamp) \
3229         igen/$(DEPDIR)/$(am__dirstamp)
3230 igen/gen-engine.$(OBJEXT): igen/$(am__dirstamp) \
3231         igen/$(DEPDIR)/$(am__dirstamp)
3232 igen/gen.$(OBJEXT): igen/$(am__dirstamp) \
3233         igen/$(DEPDIR)/$(am__dirstamp)
3234
3235 @SIM_ENABLE_IGEN_FALSE@igen/libigen.a: $(igen_libigen_a_OBJECTS) $(igen_libigen_a_DEPENDENCIES) $(EXTRA_igen_libigen_a_DEPENDENCIES) igen/$(am__dirstamp)
3236 @SIM_ENABLE_IGEN_FALSE@ $(AM_V_at)-rm -f igen/libigen.a
3237 @SIM_ENABLE_IGEN_FALSE@ $(AM_V_AR)$(igen_libigen_a_AR) igen/libigen.a $(igen_libigen_a_OBJECTS) $(igen_libigen_a_LIBADD)
3238 @SIM_ENABLE_IGEN_FALSE@ $(AM_V_at)$(RANLIB) igen/libigen.a
3239 iq2000/$(am__dirstamp):
3240         @$(MKDIR_P) iq2000
3241         @: > iq2000/$(am__dirstamp)
3242
3243 iq2000/libsim.a: $(iq2000_libsim_a_OBJECTS) $(iq2000_libsim_a_DEPENDENCIES) $(EXTRA_iq2000_libsim_a_DEPENDENCIES) iq2000/$(am__dirstamp)
3244         $(AM_V_at)-rm -f iq2000/libsim.a
3245         $(AM_V_AR)$(iq2000_libsim_a_AR) iq2000/libsim.a $(iq2000_libsim_a_OBJECTS) $(iq2000_libsim_a_LIBADD)
3246         $(AM_V_at)$(RANLIB) iq2000/libsim.a
3247 lm32/$(am__dirstamp):
3248         @$(MKDIR_P) lm32
3249         @: > lm32/$(am__dirstamp)
3250
3251 lm32/libsim.a: $(lm32_libsim_a_OBJECTS) $(lm32_libsim_a_DEPENDENCIES) $(EXTRA_lm32_libsim_a_DEPENDENCIES) lm32/$(am__dirstamp)
3252         $(AM_V_at)-rm -f lm32/libsim.a
3253         $(AM_V_AR)$(lm32_libsim_a_AR) lm32/libsim.a $(lm32_libsim_a_OBJECTS) $(lm32_libsim_a_LIBADD)
3254         $(AM_V_at)$(RANLIB) lm32/libsim.a
3255 m32c/$(am__dirstamp):
3256         @$(MKDIR_P) m32c
3257         @: > m32c/$(am__dirstamp)
3258
3259 m32c/libsim.a: $(m32c_libsim_a_OBJECTS) $(m32c_libsim_a_DEPENDENCIES) $(EXTRA_m32c_libsim_a_DEPENDENCIES) m32c/$(am__dirstamp)
3260         $(AM_V_at)-rm -f m32c/libsim.a
3261         $(AM_V_AR)$(m32c_libsim_a_AR) m32c/libsim.a $(m32c_libsim_a_OBJECTS) $(m32c_libsim_a_LIBADD)
3262         $(AM_V_at)$(RANLIB) m32c/libsim.a
3263 m32r/$(am__dirstamp):
3264         @$(MKDIR_P) m32r
3265         @: > m32r/$(am__dirstamp)
3266
3267 m32r/libsim.a: $(m32r_libsim_a_OBJECTS) $(m32r_libsim_a_DEPENDENCIES) $(EXTRA_m32r_libsim_a_DEPENDENCIES) m32r/$(am__dirstamp)
3268         $(AM_V_at)-rm -f m32r/libsim.a
3269         $(AM_V_AR)$(m32r_libsim_a_AR) m32r/libsim.a $(m32r_libsim_a_OBJECTS) $(m32r_libsim_a_LIBADD)
3270         $(AM_V_at)$(RANLIB) m32r/libsim.a
3271 m68hc11/$(am__dirstamp):
3272         @$(MKDIR_P) m68hc11
3273         @: > m68hc11/$(am__dirstamp)
3274
3275 m68hc11/libsim.a: $(m68hc11_libsim_a_OBJECTS) $(m68hc11_libsim_a_DEPENDENCIES) $(EXTRA_m68hc11_libsim_a_DEPENDENCIES) m68hc11/$(am__dirstamp)
3276         $(AM_V_at)-rm -f m68hc11/libsim.a
3277         $(AM_V_AR)$(m68hc11_libsim_a_AR) m68hc11/libsim.a $(m68hc11_libsim_a_OBJECTS) $(m68hc11_libsim_a_LIBADD)
3278         $(AM_V_at)$(RANLIB) m68hc11/libsim.a
3279 mcore/$(am__dirstamp):
3280         @$(MKDIR_P) mcore
3281         @: > mcore/$(am__dirstamp)
3282
3283 mcore/libsim.a: $(mcore_libsim_a_OBJECTS) $(mcore_libsim_a_DEPENDENCIES) $(EXTRA_mcore_libsim_a_DEPENDENCIES) mcore/$(am__dirstamp)
3284         $(AM_V_at)-rm -f mcore/libsim.a
3285         $(AM_V_AR)$(mcore_libsim_a_AR) mcore/libsim.a $(mcore_libsim_a_OBJECTS) $(mcore_libsim_a_LIBADD)
3286         $(AM_V_at)$(RANLIB) mcore/libsim.a
3287 microblaze/$(am__dirstamp):
3288         @$(MKDIR_P) microblaze
3289         @: > microblaze/$(am__dirstamp)
3290
3291 microblaze/libsim.a: $(microblaze_libsim_a_OBJECTS) $(microblaze_libsim_a_DEPENDENCIES) $(EXTRA_microblaze_libsim_a_DEPENDENCIES) microblaze/$(am__dirstamp)
3292         $(AM_V_at)-rm -f microblaze/libsim.a
3293         $(AM_V_AR)$(microblaze_libsim_a_AR) microblaze/libsim.a $(microblaze_libsim_a_OBJECTS) $(microblaze_libsim_a_LIBADD)
3294         $(AM_V_at)$(RANLIB) microblaze/libsim.a
3295 mips/$(am__dirstamp):
3296         @$(MKDIR_P) mips
3297         @: > mips/$(am__dirstamp)
3298
3299 mips/libsim.a: $(mips_libsim_a_OBJECTS) $(mips_libsim_a_DEPENDENCIES) $(EXTRA_mips_libsim_a_DEPENDENCIES) mips/$(am__dirstamp)
3300         $(AM_V_at)-rm -f mips/libsim.a
3301         $(AM_V_AR)$(mips_libsim_a_AR) mips/libsim.a $(mips_libsim_a_OBJECTS) $(mips_libsim_a_LIBADD)
3302         $(AM_V_at)$(RANLIB) mips/libsim.a
3303 mn10300/$(am__dirstamp):
3304         @$(MKDIR_P) mn10300
3305         @: > mn10300/$(am__dirstamp)
3306
3307 mn10300/libsim.a: $(mn10300_libsim_a_OBJECTS) $(mn10300_libsim_a_DEPENDENCIES) $(EXTRA_mn10300_libsim_a_DEPENDENCIES) mn10300/$(am__dirstamp)
3308         $(AM_V_at)-rm -f mn10300/libsim.a
3309         $(AM_V_AR)$(mn10300_libsim_a_AR) mn10300/libsim.a $(mn10300_libsim_a_OBJECTS) $(mn10300_libsim_a_LIBADD)
3310         $(AM_V_at)$(RANLIB) mn10300/libsim.a
3311 moxie/$(am__dirstamp):
3312         @$(MKDIR_P) moxie
3313         @: > moxie/$(am__dirstamp)
3314
3315 moxie/libsim.a: $(moxie_libsim_a_OBJECTS) $(moxie_libsim_a_DEPENDENCIES) $(EXTRA_moxie_libsim_a_DEPENDENCIES) moxie/$(am__dirstamp)
3316         $(AM_V_at)-rm -f moxie/libsim.a
3317         $(AM_V_AR)$(moxie_libsim_a_AR) moxie/libsim.a $(moxie_libsim_a_OBJECTS) $(moxie_libsim_a_LIBADD)
3318         $(AM_V_at)$(RANLIB) moxie/libsim.a
3319 msp430/$(am__dirstamp):
3320         @$(MKDIR_P) msp430
3321         @: > msp430/$(am__dirstamp)
3322
3323 msp430/libsim.a: $(msp430_libsim_a_OBJECTS) $(msp430_libsim_a_DEPENDENCIES) $(EXTRA_msp430_libsim_a_DEPENDENCIES) msp430/$(am__dirstamp)
3324         $(AM_V_at)-rm -f msp430/libsim.a
3325         $(AM_V_AR)$(msp430_libsim_a_AR) msp430/libsim.a $(msp430_libsim_a_OBJECTS) $(msp430_libsim_a_LIBADD)
3326         $(AM_V_at)$(RANLIB) msp430/libsim.a
3327 or1k/$(am__dirstamp):
3328         @$(MKDIR_P) or1k
3329         @: > or1k/$(am__dirstamp)
3330
3331 or1k/libsim.a: $(or1k_libsim_a_OBJECTS) $(or1k_libsim_a_DEPENDENCIES) $(EXTRA_or1k_libsim_a_DEPENDENCIES) or1k/$(am__dirstamp)
3332         $(AM_V_at)-rm -f or1k/libsim.a
3333         $(AM_V_AR)$(or1k_libsim_a_AR) or1k/libsim.a $(or1k_libsim_a_OBJECTS) $(or1k_libsim_a_LIBADD)
3334         $(AM_V_at)$(RANLIB) or1k/libsim.a
3335 pru/$(am__dirstamp):
3336         @$(MKDIR_P) pru
3337         @: > pru/$(am__dirstamp)
3338
3339 pru/libsim.a: $(pru_libsim_a_OBJECTS) $(pru_libsim_a_DEPENDENCIES) $(EXTRA_pru_libsim_a_DEPENDENCIES) pru/$(am__dirstamp)
3340         $(AM_V_at)-rm -f pru/libsim.a
3341         $(AM_V_AR)$(pru_libsim_a_AR) pru/libsim.a $(pru_libsim_a_OBJECTS) $(pru_libsim_a_LIBADD)
3342         $(AM_V_at)$(RANLIB) pru/libsim.a
3343 riscv/$(am__dirstamp):
3344         @$(MKDIR_P) riscv
3345         @: > riscv/$(am__dirstamp)
3346
3347 riscv/libsim.a: $(riscv_libsim_a_OBJECTS) $(riscv_libsim_a_DEPENDENCIES) $(EXTRA_riscv_libsim_a_DEPENDENCIES) riscv/$(am__dirstamp)
3348         $(AM_V_at)-rm -f riscv/libsim.a
3349         $(AM_V_AR)$(riscv_libsim_a_AR) riscv/libsim.a $(riscv_libsim_a_OBJECTS) $(riscv_libsim_a_LIBADD)
3350         $(AM_V_at)$(RANLIB) riscv/libsim.a
3351 rl78/$(am__dirstamp):
3352         @$(MKDIR_P) rl78
3353         @: > rl78/$(am__dirstamp)
3354
3355 rl78/libsim.a: $(rl78_libsim_a_OBJECTS) $(rl78_libsim_a_DEPENDENCIES) $(EXTRA_rl78_libsim_a_DEPENDENCIES) rl78/$(am__dirstamp)
3356         $(AM_V_at)-rm -f rl78/libsim.a
3357         $(AM_V_AR)$(rl78_libsim_a_AR) rl78/libsim.a $(rl78_libsim_a_OBJECTS) $(rl78_libsim_a_LIBADD)
3358         $(AM_V_at)$(RANLIB) rl78/libsim.a
3359 rx/$(am__dirstamp):
3360         @$(MKDIR_P) rx
3361         @: > rx/$(am__dirstamp)
3362
3363 rx/libsim.a: $(rx_libsim_a_OBJECTS) $(rx_libsim_a_DEPENDENCIES) $(EXTRA_rx_libsim_a_DEPENDENCIES) rx/$(am__dirstamp)
3364         $(AM_V_at)-rm -f rx/libsim.a
3365         $(AM_V_AR)$(rx_libsim_a_AR) rx/libsim.a $(rx_libsim_a_OBJECTS) $(rx_libsim_a_LIBADD)
3366         $(AM_V_at)$(RANLIB) rx/libsim.a
3367 sh/$(am__dirstamp):
3368         @$(MKDIR_P) sh
3369         @: > sh/$(am__dirstamp)
3370
3371 sh/libsim.a: $(sh_libsim_a_OBJECTS) $(sh_libsim_a_DEPENDENCIES) $(EXTRA_sh_libsim_a_DEPENDENCIES) sh/$(am__dirstamp)
3372         $(AM_V_at)-rm -f sh/libsim.a
3373         $(AM_V_AR)$(sh_libsim_a_AR) sh/libsim.a $(sh_libsim_a_OBJECTS) $(sh_libsim_a_LIBADD)
3374         $(AM_V_at)$(RANLIB) sh/libsim.a
3375 v850/$(am__dirstamp):
3376         @$(MKDIR_P) v850
3377         @: > v850/$(am__dirstamp)
3378
3379 v850/libsim.a: $(v850_libsim_a_OBJECTS) $(v850_libsim_a_DEPENDENCIES) $(EXTRA_v850_libsim_a_DEPENDENCIES) v850/$(am__dirstamp)
3380         $(AM_V_at)-rm -f v850/libsim.a
3381         $(AM_V_AR)$(v850_libsim_a_AR) v850/libsim.a $(v850_libsim_a_OBJECTS) $(v850_libsim_a_LIBADD)
3382         $(AM_V_at)$(RANLIB) v850/libsim.a
3383
3384 clean-checkPROGRAMS:
3385         @list='$(check_PROGRAMS)'; test -n "$$list" || exit 0; \
3386         echo " rm -f" $$list; \
3387         rm -f $$list || exit $$?; \
3388         test -n "$(EXEEXT)" || exit 0; \
3389         list=`for p in $$list; do echo "$$p"; done | sed 's/$(EXEEXT)$$//'`; \
3390         echo " rm -f" $$list; \
3391         rm -f $$list
3392
3393 clean-noinstPROGRAMS:
3394         @list='$(noinst_PROGRAMS)'; test -n "$$list" || exit 0; \
3395         echo " rm -f" $$list; \
3396         rm -f $$list || exit $$?; \
3397         test -n "$(EXEEXT)" || exit 0; \
3398         list=`for p in $$list; do echo "$$p"; done | sed 's/$(EXEEXT)$$//'`; \
3399         echo " rm -f" $$list; \
3400         rm -f $$list
3401
3402 aarch64/run$(EXEEXT): $(aarch64_run_OBJECTS) $(aarch64_run_DEPENDENCIES) $(EXTRA_aarch64_run_DEPENDENCIES) aarch64/$(am__dirstamp)
3403         @rm -f aarch64/run$(EXEEXT)
3404         $(AM_V_CCLD)$(LINK) $(aarch64_run_OBJECTS) $(aarch64_run_LDADD) $(LIBS)
3405
3406 arm/run$(EXEEXT): $(arm_run_OBJECTS) $(arm_run_DEPENDENCIES) $(EXTRA_arm_run_DEPENDENCIES) arm/$(am__dirstamp)
3407         @rm -f arm/run$(EXEEXT)
3408         $(AM_V_CCLD)$(LINK) $(arm_run_OBJECTS) $(arm_run_LDADD) $(LIBS)
3409
3410 avr/run$(EXEEXT): $(avr_run_OBJECTS) $(avr_run_DEPENDENCIES) $(EXTRA_avr_run_DEPENDENCIES) avr/$(am__dirstamp)
3411         @rm -f avr/run$(EXEEXT)
3412         $(AM_V_CCLD)$(LINK) $(avr_run_OBJECTS) $(avr_run_LDADD) $(LIBS)
3413
3414 bfin/run$(EXEEXT): $(bfin_run_OBJECTS) $(bfin_run_DEPENDENCIES) $(EXTRA_bfin_run_DEPENDENCIES) bfin/$(am__dirstamp)
3415         @rm -f bfin/run$(EXEEXT)
3416         $(AM_V_CCLD)$(LINK) $(bfin_run_OBJECTS) $(bfin_run_LDADD) $(LIBS)
3417
3418 bpf/run$(EXEEXT): $(bpf_run_OBJECTS) $(bpf_run_DEPENDENCIES) $(EXTRA_bpf_run_DEPENDENCIES) bpf/$(am__dirstamp)
3419         @rm -f bpf/run$(EXEEXT)
3420         $(AM_V_CCLD)$(LINK) $(bpf_run_OBJECTS) $(bpf_run_LDADD) $(LIBS)
3421 cr16/$(DEPDIR)/$(am__dirstamp):
3422         @$(MKDIR_P) cr16/$(DEPDIR)
3423         @: > cr16/$(DEPDIR)/$(am__dirstamp)
3424 cr16/gencode.$(OBJEXT): cr16/$(am__dirstamp) \
3425         cr16/$(DEPDIR)/$(am__dirstamp)
3426
3427 @SIM_ENABLE_ARCH_cr16_FALSE@cr16/gencode$(EXEEXT): $(cr16_gencode_OBJECTS) $(cr16_gencode_DEPENDENCIES) $(EXTRA_cr16_gencode_DEPENDENCIES) cr16/$(am__dirstamp)
3428 @SIM_ENABLE_ARCH_cr16_FALSE@    @rm -f cr16/gencode$(EXEEXT)
3429 @SIM_ENABLE_ARCH_cr16_FALSE@    $(AM_V_CCLD)$(LINK) $(cr16_gencode_OBJECTS) $(cr16_gencode_LDADD) $(LIBS)
3430
3431 cr16/run$(EXEEXT): $(cr16_run_OBJECTS) $(cr16_run_DEPENDENCIES) $(EXTRA_cr16_run_DEPENDENCIES) cr16/$(am__dirstamp)
3432         @rm -f cr16/run$(EXEEXT)
3433         $(AM_V_CCLD)$(LINK) $(cr16_run_OBJECTS) $(cr16_run_LDADD) $(LIBS)
3434
3435 cris/run$(EXEEXT): $(cris_run_OBJECTS) $(cris_run_DEPENDENCIES) $(EXTRA_cris_run_DEPENDENCIES) cris/$(am__dirstamp)
3436         @rm -f cris/run$(EXEEXT)
3437         $(AM_V_CCLD)$(LINK) $(cris_run_OBJECTS) $(cris_run_LDADD) $(LIBS)
3438 cris/$(DEPDIR)/$(am__dirstamp):
3439         @$(MKDIR_P) cris/$(DEPDIR)
3440         @: > cris/$(DEPDIR)/$(am__dirstamp)
3441 cris/rvdummy.$(OBJEXT): cris/$(am__dirstamp) \
3442         cris/$(DEPDIR)/$(am__dirstamp)
3443
3444 cris/rvdummy$(EXEEXT): $(cris_rvdummy_OBJECTS) $(cris_rvdummy_DEPENDENCIES) $(EXTRA_cris_rvdummy_DEPENDENCIES) cris/$(am__dirstamp)
3445         @rm -f cris/rvdummy$(EXEEXT)
3446         $(AM_V_CCLD)$(LINK) $(cris_rvdummy_OBJECTS) $(cris_rvdummy_LDADD) $(LIBS)
3447 d10v/$(DEPDIR)/$(am__dirstamp):
3448         @$(MKDIR_P) d10v/$(DEPDIR)
3449         @: > d10v/$(DEPDIR)/$(am__dirstamp)
3450 d10v/gencode.$(OBJEXT): d10v/$(am__dirstamp) \
3451         d10v/$(DEPDIR)/$(am__dirstamp)
3452
3453 @SIM_ENABLE_ARCH_d10v_FALSE@d10v/gencode$(EXEEXT): $(d10v_gencode_OBJECTS) $(d10v_gencode_DEPENDENCIES) $(EXTRA_d10v_gencode_DEPENDENCIES) d10v/$(am__dirstamp)
3454 @SIM_ENABLE_ARCH_d10v_FALSE@    @rm -f d10v/gencode$(EXEEXT)
3455 @SIM_ENABLE_ARCH_d10v_FALSE@    $(AM_V_CCLD)$(LINK) $(d10v_gencode_OBJECTS) $(d10v_gencode_LDADD) $(LIBS)
3456
3457 d10v/run$(EXEEXT): $(d10v_run_OBJECTS) $(d10v_run_DEPENDENCIES) $(EXTRA_d10v_run_DEPENDENCIES) d10v/$(am__dirstamp)
3458         @rm -f d10v/run$(EXEEXT)
3459         $(AM_V_CCLD)$(LINK) $(d10v_run_OBJECTS) $(d10v_run_LDADD) $(LIBS)
3460
3461 erc32/run$(EXEEXT): $(erc32_run_OBJECTS) $(erc32_run_DEPENDENCIES) $(EXTRA_erc32_run_DEPENDENCIES) erc32/$(am__dirstamp)
3462         @rm -f erc32/run$(EXEEXT)
3463         $(AM_V_CCLD)$(LINK) $(erc32_run_OBJECTS) $(erc32_run_LDADD) $(LIBS)
3464 erc32/$(DEPDIR)/$(am__dirstamp):
3465         @$(MKDIR_P) erc32/$(DEPDIR)
3466         @: > erc32/$(DEPDIR)/$(am__dirstamp)
3467 erc32/sis.$(OBJEXT): erc32/$(am__dirstamp) \
3468         erc32/$(DEPDIR)/$(am__dirstamp)
3469
3470 @SIM_ENABLE_ARCH_erc32_FALSE@erc32/sis$(EXEEXT): $(erc32_sis_OBJECTS) $(erc32_sis_DEPENDENCIES) $(EXTRA_erc32_sis_DEPENDENCIES) erc32/$(am__dirstamp)
3471 @SIM_ENABLE_ARCH_erc32_FALSE@   @rm -f erc32/sis$(EXEEXT)
3472 @SIM_ENABLE_ARCH_erc32_FALSE@   $(AM_V_CCLD)$(LINK) $(erc32_sis_OBJECTS) $(erc32_sis_LDADD) $(LIBS)
3473
3474 example-synacor/run$(EXEEXT): $(example_synacor_run_OBJECTS) $(example_synacor_run_DEPENDENCIES) $(EXTRA_example_synacor_run_DEPENDENCIES) example-synacor/$(am__dirstamp)
3475         @rm -f example-synacor/run$(EXEEXT)
3476         $(AM_V_CCLD)$(LINK) $(example_synacor_run_OBJECTS) $(example_synacor_run_LDADD) $(LIBS)
3477
3478 frv/run$(EXEEXT): $(frv_run_OBJECTS) $(frv_run_DEPENDENCIES) $(EXTRA_frv_run_DEPENDENCIES) frv/$(am__dirstamp)
3479         @rm -f frv/run$(EXEEXT)
3480         $(AM_V_CCLD)$(LINK) $(frv_run_OBJECTS) $(frv_run_LDADD) $(LIBS)
3481
3482 ft32/run$(EXEEXT): $(ft32_run_OBJECTS) $(ft32_run_DEPENDENCIES) $(EXTRA_ft32_run_DEPENDENCIES) ft32/$(am__dirstamp)
3483         @rm -f ft32/run$(EXEEXT)
3484         $(AM_V_CCLD)$(LINK) $(ft32_run_OBJECTS) $(ft32_run_LDADD) $(LIBS)
3485
3486 h8300/run$(EXEEXT): $(h8300_run_OBJECTS) $(h8300_run_DEPENDENCIES) $(EXTRA_h8300_run_DEPENDENCIES) h8300/$(am__dirstamp)
3487         @rm -f h8300/run$(EXEEXT)
3488         $(AM_V_CCLD)$(LINK) $(h8300_run_OBJECTS) $(h8300_run_LDADD) $(LIBS)
3489
3490 igen/filter$(EXEEXT): $(igen_filter_OBJECTS) $(igen_filter_DEPENDENCIES) $(EXTRA_igen_filter_DEPENDENCIES) igen/$(am__dirstamp)
3491         @rm -f igen/filter$(EXEEXT)
3492         $(AM_V_CCLD)$(LINK) $(igen_filter_OBJECTS) $(igen_filter_LDADD) $(LIBS)
3493
3494 igen/gen$(EXEEXT): $(igen_gen_OBJECTS) $(igen_gen_DEPENDENCIES) $(EXTRA_igen_gen_DEPENDENCIES) igen/$(am__dirstamp)
3495         @rm -f igen/gen$(EXEEXT)
3496         $(AM_V_CCLD)$(LINK) $(igen_gen_OBJECTS) $(igen_gen_LDADD) $(LIBS)
3497 igen/igen.$(OBJEXT): igen/$(am__dirstamp) \
3498         igen/$(DEPDIR)/$(am__dirstamp)
3499
3500 @SIM_ENABLE_IGEN_FALSE@igen/igen$(EXEEXT): $(igen_igen_OBJECTS) $(igen_igen_DEPENDENCIES) $(EXTRA_igen_igen_DEPENDENCIES) igen/$(am__dirstamp)
3501 @SIM_ENABLE_IGEN_FALSE@ @rm -f igen/igen$(EXEEXT)
3502 @SIM_ENABLE_IGEN_FALSE@ $(AM_V_CCLD)$(LINK) $(igen_igen_OBJECTS) $(igen_igen_LDADD) $(LIBS)
3503
3504 igen/ld-cache$(EXEEXT): $(igen_ld_cache_OBJECTS) $(igen_ld_cache_DEPENDENCIES) $(EXTRA_igen_ld_cache_DEPENDENCIES) igen/$(am__dirstamp)
3505         @rm -f igen/ld-cache$(EXEEXT)
3506         $(AM_V_CCLD)$(LINK) $(igen_ld_cache_OBJECTS) $(igen_ld_cache_LDADD) $(LIBS)
3507
3508 igen/ld-decode$(EXEEXT): $(igen_ld_decode_OBJECTS) $(igen_ld_decode_DEPENDENCIES) $(EXTRA_igen_ld_decode_DEPENDENCIES) igen/$(am__dirstamp)
3509         @rm -f igen/ld-decode$(EXEEXT)
3510         $(AM_V_CCLD)$(LINK) $(igen_ld_decode_OBJECTS) $(igen_ld_decode_LDADD) $(LIBS)
3511
3512 igen/ld-insn$(EXEEXT): $(igen_ld_insn_OBJECTS) $(igen_ld_insn_DEPENDENCIES) $(EXTRA_igen_ld_insn_DEPENDENCIES) igen/$(am__dirstamp)
3513         @rm -f igen/ld-insn$(EXEEXT)
3514         $(AM_V_CCLD)$(LINK) $(igen_ld_insn_OBJECTS) $(igen_ld_insn_LDADD) $(LIBS)
3515
3516 igen/table$(EXEEXT): $(igen_table_OBJECTS) $(igen_table_DEPENDENCIES) $(EXTRA_igen_table_DEPENDENCIES) igen/$(am__dirstamp)
3517         @rm -f igen/table$(EXEEXT)
3518         $(AM_V_CCLD)$(LINK) $(igen_table_OBJECTS) $(igen_table_LDADD) $(LIBS)
3519
3520 iq2000/run$(EXEEXT): $(iq2000_run_OBJECTS) $(iq2000_run_DEPENDENCIES) $(EXTRA_iq2000_run_DEPENDENCIES) iq2000/$(am__dirstamp)
3521         @rm -f iq2000/run$(EXEEXT)
3522         $(AM_V_CCLD)$(LINK) $(iq2000_run_OBJECTS) $(iq2000_run_LDADD) $(LIBS)
3523
3524 lm32/run$(EXEEXT): $(lm32_run_OBJECTS) $(lm32_run_DEPENDENCIES) $(EXTRA_lm32_run_DEPENDENCIES) lm32/$(am__dirstamp)
3525         @rm -f lm32/run$(EXEEXT)
3526         $(AM_V_CCLD)$(LINK) $(lm32_run_OBJECTS) $(lm32_run_LDADD) $(LIBS)
3527 m32c/$(DEPDIR)/$(am__dirstamp):
3528         @$(MKDIR_P) m32c/$(DEPDIR)
3529         @: > m32c/$(DEPDIR)/$(am__dirstamp)
3530 m32c/opc2c.$(OBJEXT): m32c/$(am__dirstamp) \
3531         m32c/$(DEPDIR)/$(am__dirstamp)
3532
3533 @SIM_ENABLE_ARCH_m32c_FALSE@m32c/opc2c$(EXEEXT): $(m32c_opc2c_OBJECTS) $(m32c_opc2c_DEPENDENCIES) $(EXTRA_m32c_opc2c_DEPENDENCIES) m32c/$(am__dirstamp)
3534 @SIM_ENABLE_ARCH_m32c_FALSE@    @rm -f m32c/opc2c$(EXEEXT)
3535 @SIM_ENABLE_ARCH_m32c_FALSE@    $(AM_V_CCLD)$(LINK) $(m32c_opc2c_OBJECTS) $(m32c_opc2c_LDADD) $(LIBS)
3536
3537 m32c/run$(EXEEXT): $(m32c_run_OBJECTS) $(m32c_run_DEPENDENCIES) $(EXTRA_m32c_run_DEPENDENCIES) m32c/$(am__dirstamp)
3538         @rm -f m32c/run$(EXEEXT)
3539         $(AM_V_CCLD)$(LINK) $(m32c_run_OBJECTS) $(m32c_run_LDADD) $(LIBS)
3540
3541 m32r/run$(EXEEXT): $(m32r_run_OBJECTS) $(m32r_run_DEPENDENCIES) $(EXTRA_m32r_run_DEPENDENCIES) m32r/$(am__dirstamp)
3542         @rm -f m32r/run$(EXEEXT)
3543         $(AM_V_CCLD)$(LINK) $(m32r_run_OBJECTS) $(m32r_run_LDADD) $(LIBS)
3544 m68hc11/$(DEPDIR)/$(am__dirstamp):
3545         @$(MKDIR_P) m68hc11/$(DEPDIR)
3546         @: > m68hc11/$(DEPDIR)/$(am__dirstamp)
3547 m68hc11/gencode.$(OBJEXT): m68hc11/$(am__dirstamp) \
3548         m68hc11/$(DEPDIR)/$(am__dirstamp)
3549
3550 @SIM_ENABLE_ARCH_m68hc11_FALSE@m68hc11/gencode$(EXEEXT): $(m68hc11_gencode_OBJECTS) $(m68hc11_gencode_DEPENDENCIES) $(EXTRA_m68hc11_gencode_DEPENDENCIES) m68hc11/$(am__dirstamp)
3551 @SIM_ENABLE_ARCH_m68hc11_FALSE@ @rm -f m68hc11/gencode$(EXEEXT)
3552 @SIM_ENABLE_ARCH_m68hc11_FALSE@ $(AM_V_CCLD)$(LINK) $(m68hc11_gencode_OBJECTS) $(m68hc11_gencode_LDADD) $(LIBS)
3553
3554 m68hc11/run$(EXEEXT): $(m68hc11_run_OBJECTS) $(m68hc11_run_DEPENDENCIES) $(EXTRA_m68hc11_run_DEPENDENCIES) m68hc11/$(am__dirstamp)
3555         @rm -f m68hc11/run$(EXEEXT)
3556         $(AM_V_CCLD)$(LINK) $(m68hc11_run_OBJECTS) $(m68hc11_run_LDADD) $(LIBS)
3557
3558 mcore/run$(EXEEXT): $(mcore_run_OBJECTS) $(mcore_run_DEPENDENCIES) $(EXTRA_mcore_run_DEPENDENCIES) mcore/$(am__dirstamp)
3559         @rm -f mcore/run$(EXEEXT)
3560         $(AM_V_CCLD)$(LINK) $(mcore_run_OBJECTS) $(mcore_run_LDADD) $(LIBS)
3561
3562 microblaze/run$(EXEEXT): $(microblaze_run_OBJECTS) $(microblaze_run_DEPENDENCIES) $(EXTRA_microblaze_run_DEPENDENCIES) microblaze/$(am__dirstamp)
3563         @rm -f microblaze/run$(EXEEXT)
3564         $(AM_V_CCLD)$(LINK) $(microblaze_run_OBJECTS) $(microblaze_run_LDADD) $(LIBS)
3565
3566 mips/run$(EXEEXT): $(mips_run_OBJECTS) $(mips_run_DEPENDENCIES) $(EXTRA_mips_run_DEPENDENCIES) mips/$(am__dirstamp)
3567         @rm -f mips/run$(EXEEXT)
3568         $(AM_V_CCLD)$(LINK) $(mips_run_OBJECTS) $(mips_run_LDADD) $(LIBS)
3569
3570 mn10300/run$(EXEEXT): $(mn10300_run_OBJECTS) $(mn10300_run_DEPENDENCIES) $(EXTRA_mn10300_run_DEPENDENCIES) mn10300/$(am__dirstamp)
3571         @rm -f mn10300/run$(EXEEXT)
3572         $(AM_V_CCLD)$(LINK) $(mn10300_run_OBJECTS) $(mn10300_run_LDADD) $(LIBS)
3573
3574 moxie/run$(EXEEXT): $(moxie_run_OBJECTS) $(moxie_run_DEPENDENCIES) $(EXTRA_moxie_run_DEPENDENCIES) moxie/$(am__dirstamp)
3575         @rm -f moxie/run$(EXEEXT)
3576         $(AM_V_CCLD)$(LINK) $(moxie_run_OBJECTS) $(moxie_run_LDADD) $(LIBS)
3577
3578 msp430/run$(EXEEXT): $(msp430_run_OBJECTS) $(msp430_run_DEPENDENCIES) $(EXTRA_msp430_run_DEPENDENCIES) msp430/$(am__dirstamp)
3579         @rm -f msp430/run$(EXEEXT)
3580         $(AM_V_CCLD)$(LINK) $(msp430_run_OBJECTS) $(msp430_run_LDADD) $(LIBS)
3581
3582 or1k/run$(EXEEXT): $(or1k_run_OBJECTS) $(or1k_run_DEPENDENCIES) $(EXTRA_or1k_run_DEPENDENCIES) or1k/$(am__dirstamp)
3583         @rm -f or1k/run$(EXEEXT)
3584         $(AM_V_CCLD)$(LINK) $(or1k_run_OBJECTS) $(or1k_run_LDADD) $(LIBS)
3585 ppc/$(am__dirstamp):
3586         @$(MKDIR_P) ppc
3587         @: > ppc/$(am__dirstamp)
3588 ppc/$(DEPDIR)/$(am__dirstamp):
3589         @$(MKDIR_P) ppc/$(DEPDIR)
3590         @: > ppc/$(DEPDIR)/$(am__dirstamp)
3591 ppc/psim.$(OBJEXT): ppc/$(am__dirstamp) ppc/$(DEPDIR)/$(am__dirstamp)
3592
3593 @SIM_ENABLE_ARCH_ppc_FALSE@ppc/psim$(EXEEXT): $(ppc_psim_OBJECTS) $(ppc_psim_DEPENDENCIES) $(EXTRA_ppc_psim_DEPENDENCIES) ppc/$(am__dirstamp)
3594 @SIM_ENABLE_ARCH_ppc_FALSE@     @rm -f ppc/psim$(EXEEXT)
3595 @SIM_ENABLE_ARCH_ppc_FALSE@     $(AM_V_CCLD)$(LINK) $(ppc_psim_OBJECTS) $(ppc_psim_LDADD) $(LIBS)
3596
3597 ppc/run$(EXEEXT): $(ppc_run_OBJECTS) $(ppc_run_DEPENDENCIES) $(EXTRA_ppc_run_DEPENDENCIES) ppc/$(am__dirstamp)
3598         @rm -f ppc/run$(EXEEXT)
3599         $(AM_V_CCLD)$(LINK) $(ppc_run_OBJECTS) $(ppc_run_LDADD) $(LIBS)
3600
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3962         dot_seen=no; \
3963         target=`echo $@ | sed s/-recursive//`; \
3964         case "$@" in \
3965           distclean-* | maintainer-clean-*) list='$(DIST_SUBDIRS)' ;; \
3966           *) list='$(SUBDIRS)' ;; \
3967         esac; \
3968         for subdir in $$list; do \
3969           echo "Making $$target in $$subdir"; \
3970           if test "$$subdir" = "."; then \
3971             dot_seen=yes; \
3972             local_target="$$target-am"; \
3973           else \
3974             local_target="$$target"; \
3975           fi; \
3976           ($(am__cd) $$subdir && $(MAKE) $(AM_MAKEFLAGS) $$local_target) \
3977           || eval $$failcom; \
3978         done; \
3979         if test "$$dot_seen" = "no"; then \
3980           $(MAKE) $(AM_MAKEFLAGS) "$$target-am" || exit 1; \
3981         fi; test -z "$$fail"
3982
3983 ID: $(am__tagged_files)
3984         $(am__define_uniq_tagged_files); mkid -fID $$unique
3985 tags: tags-recursive
3986 TAGS: tags
3987
3988 tags-am: $(TAGS_DEPENDENCIES) $(am__tagged_files)
3989         set x; \
3990         here=`pwd`; \
3991         if ($(ETAGS) --etags-include --version) >/dev/null 2>&1; then \
3992           include_option=--etags-include; \
3993           empty_fix=.; \
3994         else \
3995           include_option=--include; \
3996           empty_fix=; \
3997         fi; \
3998         list='$(SUBDIRS)'; for subdir in $$list; do \
3999           if test "$$subdir" = .; then :; else \
4000             test ! -f $$subdir/TAGS || \
4001               set "$$@" "$$include_option=$$here/$$subdir/TAGS"; \
4002           fi; \
4003         done; \
4004         $(am__define_uniq_tagged_files); \
4005         shift; \
4006         if test -z "$(ETAGS_ARGS)$$*$$unique"; then :; else \
4007           test -n "$$unique" || unique=$$empty_fix; \
4008           if test $$# -gt 0; then \
4009             $(ETAGS) $(ETAGSFLAGS) $(AM_ETAGSFLAGS) $(ETAGS_ARGS) \
4010               "$$@" $$unique; \
4011           else \
4012             $(ETAGS) $(ETAGSFLAGS) $(AM_ETAGSFLAGS) $(ETAGS_ARGS) \
4013               $$unique; \
4014           fi; \
4015         fi
4016 ctags: ctags-recursive
4017
4018 CTAGS: ctags
4019 ctags-am: $(TAGS_DEPENDENCIES) $(am__tagged_files)
4020         $(am__define_uniq_tagged_files); \
4021         test -z "$(CTAGS_ARGS)$$unique" \
4022           || $(CTAGS) $(CTAGSFLAGS) $(AM_CTAGSFLAGS) $(CTAGS_ARGS) \
4023              $$unique
4024
4025 GTAGS:
4026         here=`$(am__cd) $(top_builddir) && pwd` \
4027           && $(am__cd) $(top_srcdir) \
4028           && gtags -i $(GTAGS_ARGS) "$$here"
4029 cscope: cscope.files
4030         test ! -s cscope.files \
4031           || $(CSCOPE) -b -q $(AM_CSCOPEFLAGS) $(CSCOPEFLAGS) -i cscope.files $(CSCOPE_ARGS)
4032 clean-cscope:
4033         -rm -f cscope.files
4034 cscope.files: clean-cscope cscopelist
4035 cscopelist: cscopelist-recursive
4036
4037 cscopelist-am: $(am__tagged_files)
4038         list='$(am__tagged_files)'; \
4039         case "$(srcdir)" in \
4040           [\\/]* | ?:[\\/]*) sdir="$(srcdir)" ;; \
4041           *) sdir=$(subdir)/$(srcdir) ;; \
4042         esac; \
4043         for i in $$list; do \
4044           if test -f "$$i"; then \
4045             echo "$(subdir)/$$i"; \
4046           else \
4047             echo "$$sdir/$$i"; \
4048           fi; \
4049         done >> $(top_builddir)/cscope.files
4050
4051 distclean-tags:
4052         -rm -f TAGS ID GTAGS GRTAGS GSYMS GPATH tags
4053         -rm -f cscope.out cscope.in.out cscope.po.out cscope.files
4054 site.exp: Makefile $(EXTRA_DEJAGNU_SITE_CONFIG)
4055         @echo 'Making a new site.exp file ...'
4056         @echo '## these variables are automatically generated by make ##' >site.tmp
4057         @echo '# Do not edit here.  If you wish to override these values' >>site.tmp
4058         @echo '# edit the last section' >>site.tmp
4059         @echo 'set srcdir "$(srcdir)"' >>site.tmp
4060         @echo "set objdir `pwd`" >>site.tmp
4061         @echo 'set build_alias "$(build_alias)"' >>site.tmp
4062         @echo 'set build_triplet $(build_triplet)' >>site.tmp
4063         @echo 'set host_alias "$(host_alias)"' >>site.tmp
4064         @echo 'set host_triplet $(host_triplet)' >>site.tmp
4065         @echo 'set target_alias "$(target_alias)"' >>site.tmp
4066         @echo 'set target_triplet $(target_triplet)' >>site.tmp
4067         @list='$(EXTRA_DEJAGNU_SITE_CONFIG)'; for f in $$list; do \
4068           echo "## Begin content included from file $$f.  Do not modify. ##" \
4069            && cat `test -f "$$f" || echo '$(srcdir)/'`$$f \
4070            && echo "## End content included from file $$f. ##" \
4071            || exit 1; \
4072          done >> site.tmp
4073         @echo "## End of auto-generated content; you can edit from here. ##" >> site.tmp
4074         @if test -f site.exp; then \
4075            sed -e '1,/^## End of auto-generated content.*##/d' site.exp >> site.tmp; \
4076          fi
4077         @-rm -f site.bak
4078         @test ! -f site.exp || mv site.exp site.bak
4079         @mv site.tmp site.exp
4080
4081 distclean-DEJAGNU:
4082         -rm -f site.exp site.bak
4083         -l='$(DEJATOOL)'; for tool in $$l; do \
4084           rm -f $$tool.sum $$tool.log; \
4085         done
4086
4087 # Recover from deleted '.trs' file; this should ensure that
4088 # "rm -f foo.log; make foo.trs" re-run 'foo.test', and re-create
4089 # both 'foo.log' and 'foo.trs'.  Break the recipe in two subshells
4090 # to avoid problems with "make -n".
4091 .log.trs:
4092         rm -f $< $@
4093         $(MAKE) $(AM_MAKEFLAGS) $<
4094
4095 # Leading 'am--fnord' is there to ensure the list of targets does not
4096 # expand to empty, as could happen e.g. with make check TESTS=''.
4097 am--fnord $(TEST_LOGS) $(TEST_LOGS:.log=.trs): $(am__force_recheck)
4098 am--force-recheck:
4099         @:
4100
4101 $(TEST_SUITE_LOG): $(TEST_LOGS)
4102         @$(am__set_TESTS_bases); \
4103         am__f_ok () { test -f "$$1" && test -r "$$1"; }; \
4104         redo_bases=`for i in $$bases; do \
4105                       am__f_ok $$i.trs && am__f_ok $$i.log || echo $$i; \
4106                     done`; \
4107         if test -n "$$redo_bases"; then \
4108           redo_logs=`for i in $$redo_bases; do echo $$i.log; done`; \
4109           redo_results=`for i in $$redo_bases; do echo $$i.trs; done`; \
4110           if $(am__make_dryrun); then :; else \
4111             rm -f $$redo_logs && rm -f $$redo_results || exit 1; \
4112           fi; \
4113         fi; \
4114         if test -n "$$am__remaking_logs"; then \
4115           echo "fatal: making $(TEST_SUITE_LOG): possible infinite" \
4116                "recursion detected" >&2; \
4117         elif test -n "$$redo_logs"; then \
4118           am__remaking_logs=yes $(MAKE) $(AM_MAKEFLAGS) $$redo_logs; \
4119         fi; \
4120         if $(am__make_dryrun); then :; else \
4121           st=0;  \
4122           errmsg="fatal: making $(TEST_SUITE_LOG): failed to create"; \
4123           for i in $$redo_bases; do \
4124             test -f $$i.trs && test -r $$i.trs \
4125               || { echo "$$errmsg $$i.trs" >&2; st=1; }; \
4126             test -f $$i.log && test -r $$i.log \
4127               || { echo "$$errmsg $$i.log" >&2; st=1; }; \
4128           done; \
4129           test $$st -eq 0 || exit 1; \
4130         fi
4131         @$(am__sh_e_setup); $(am__tty_colors); $(am__set_TESTS_bases); \
4132         ws='[   ]'; \
4133         results=`for b in $$bases; do echo $$b.trs; done`; \
4134         test -n "$$results" || results=/dev/null; \
4135         all=`  grep "^$$ws*:test-result:"           $$results | wc -l`; \
4136         pass=` grep "^$$ws*:test-result:$$ws*PASS"  $$results | wc -l`; \
4137         fail=` grep "^$$ws*:test-result:$$ws*FAIL"  $$results | wc -l`; \
4138         skip=` grep "^$$ws*:test-result:$$ws*SKIP"  $$results | wc -l`; \
4139         xfail=`grep "^$$ws*:test-result:$$ws*XFAIL" $$results | wc -l`; \
4140         xpass=`grep "^$$ws*:test-result:$$ws*XPASS" $$results | wc -l`; \
4141         error=`grep "^$$ws*:test-result:$$ws*ERROR" $$results | wc -l`; \
4142         if test `expr $$fail + $$xpass + $$error` -eq 0; then \
4143           success=true; \
4144         else \
4145           success=false; \
4146         fi; \
4147         br='==================='; br=$$br$$br$$br$$br; \
4148         result_count () \
4149         { \
4150             if test x"$$1" = x"--maybe-color"; then \
4151               maybe_colorize=yes; \
4152             elif test x"$$1" = x"--no-color"; then \
4153               maybe_colorize=no; \
4154             else \
4155               echo "$@: invalid 'result_count' usage" >&2; exit 4; \
4156             fi; \
4157             shift; \
4158             desc=$$1 count=$$2; \
4159             if test $$maybe_colorize = yes && test $$count -gt 0; then \
4160               color_start=$$3 color_end=$$std; \
4161             else \
4162               color_start= color_end=; \
4163             fi; \
4164             echo "$${color_start}# $$desc $$count$${color_end}"; \
4165         }; \
4166         create_testsuite_report () \
4167         { \
4168           result_count $$1 "TOTAL:" $$all   "$$brg"; \
4169           result_count $$1 "PASS: " $$pass  "$$grn"; \
4170           result_count $$1 "SKIP: " $$skip  "$$blu"; \
4171           result_count $$1 "XFAIL:" $$xfail "$$lgn"; \
4172           result_count $$1 "FAIL: " $$fail  "$$red"; \
4173           result_count $$1 "XPASS:" $$xpass "$$red"; \
4174           result_count $$1 "ERROR:" $$error "$$mgn"; \
4175         }; \
4176         {                                                               \
4177           echo "$(PACKAGE_STRING): $(subdir)/$(TEST_SUITE_LOG)" |       \
4178             $(am__rst_title);                                           \
4179           create_testsuite_report --no-color;                           \
4180           echo;                                                         \
4181           echo ".. contents:: :depth: 2";                               \
4182           echo;                                                         \
4183           for b in $$bases; do echo $$b; done                           \
4184             | $(am__create_global_log);                                 \
4185         } >$(TEST_SUITE_LOG).tmp || exit 1;                             \
4186         mv $(TEST_SUITE_LOG).tmp $(TEST_SUITE_LOG);                     \
4187         if $$success; then                                              \
4188           col="$$grn";                                                  \
4189          else                                                           \
4190           col="$$red";                                                  \
4191           test x"$$VERBOSE" = x || cat $(TEST_SUITE_LOG);               \
4192         fi;                                                             \
4193         echo "$${col}$$br$${std}";                                      \
4194         echo "$${col}Testsuite summary for $(PACKAGE_STRING)$${std}";   \
4195         echo "$${col}$$br$${std}";                                      \
4196         create_testsuite_report --maybe-color;                          \
4197         echo "$$col$$br$$std";                                          \
4198         if $$success; then :; else                                      \
4199           echo "$${col}See $(subdir)/$(TEST_SUITE_LOG)$${std}";         \
4200           if test -n "$(PACKAGE_BUGREPORT)"; then                       \
4201             echo "$${col}Please report to $(PACKAGE_BUGREPORT)$${std}"; \
4202           fi;                                                           \
4203           echo "$$col$$br$$std";                                        \
4204         fi;                                                             \
4205         $$success || exit 1
4206
4207 check-TESTS:
4208         @list='$(RECHECK_LOGS)';           test -z "$$list" || rm -f $$list
4209         @list='$(RECHECK_LOGS:.log=.trs)'; test -z "$$list" || rm -f $$list
4210         @test -z "$(TEST_SUITE_LOG)" || rm -f $(TEST_SUITE_LOG)
4211         @set +e; $(am__set_TESTS_bases); \
4212         log_list=`for i in $$bases; do echo $$i.log; done`; \
4213         trs_list=`for i in $$bases; do echo $$i.trs; done`; \
4214         log_list=`echo $$log_list`; trs_list=`echo $$trs_list`; \
4215         $(MAKE) $(AM_MAKEFLAGS) $(TEST_SUITE_LOG) TEST_LOGS="$$log_list"; \
4216         exit $$?;
4217 recheck: all $(check_PROGRAMS)
4218         @test -z "$(TEST_SUITE_LOG)" || rm -f $(TEST_SUITE_LOG)
4219         @set +e; $(am__set_TESTS_bases); \
4220         bases=`for i in $$bases; do echo $$i; done \
4221                  | $(am__list_recheck_tests)` || exit 1; \
4222         log_list=`for i in $$bases; do echo $$i.log; done`; \
4223         log_list=`echo $$log_list`; \
4224         $(MAKE) $(AM_MAKEFLAGS) $(TEST_SUITE_LOG) \
4225                 am__force_recheck=am--force-recheck \
4226                 TEST_LOGS="$$log_list"; \
4227         exit $$?
4228 testsuite/common/bits32m0.log: testsuite/common/bits32m0$(EXEEXT)
4229         @p='testsuite/common/bits32m0$(EXEEXT)'; \
4230         b='testsuite/common/bits32m0'; \
4231         $(am__check_pre) $(LOG_DRIVER) --test-name "$$f" \
4232         --log-file $$b.log --trs-file $$b.trs \
4233         $(am__common_driver_flags) $(AM_LOG_DRIVER_FLAGS) $(LOG_DRIVER_FLAGS) -- $(LOG_COMPILE) \
4234         "$$tst" $(AM_TESTS_FD_REDIRECT)
4235 testsuite/common/bits32m31.log: testsuite/common/bits32m31$(EXEEXT)
4236         @p='testsuite/common/bits32m31$(EXEEXT)'; \
4237         b='testsuite/common/bits32m31'; \
4238         $(am__check_pre) $(LOG_DRIVER) --test-name "$$f" \
4239         --log-file $$b.log --trs-file $$b.trs \
4240         $(am__common_driver_flags) $(AM_LOG_DRIVER_FLAGS) $(LOG_DRIVER_FLAGS) -- $(LOG_COMPILE) \
4241         "$$tst" $(AM_TESTS_FD_REDIRECT)
4242 testsuite/common/bits64m0.log: testsuite/common/bits64m0$(EXEEXT)
4243         @p='testsuite/common/bits64m0$(EXEEXT)'; \
4244         b='testsuite/common/bits64m0'; \
4245         $(am__check_pre) $(LOG_DRIVER) --test-name "$$f" \
4246         --log-file $$b.log --trs-file $$b.trs \
4247         $(am__common_driver_flags) $(AM_LOG_DRIVER_FLAGS) $(LOG_DRIVER_FLAGS) -- $(LOG_COMPILE) \
4248         "$$tst" $(AM_TESTS_FD_REDIRECT)
4249 testsuite/common/bits64m63.log: testsuite/common/bits64m63$(EXEEXT)
4250         @p='testsuite/common/bits64m63$(EXEEXT)'; \
4251         b='testsuite/common/bits64m63'; \
4252         $(am__check_pre) $(LOG_DRIVER) --test-name "$$f" \
4253         --log-file $$b.log --trs-file $$b.trs \
4254         $(am__common_driver_flags) $(AM_LOG_DRIVER_FLAGS) $(LOG_DRIVER_FLAGS) -- $(LOG_COMPILE) \
4255         "$$tst" $(AM_TESTS_FD_REDIRECT)
4256 testsuite/common/alu-tst.log: testsuite/common/alu-tst$(EXEEXT)
4257         @p='testsuite/common/alu-tst$(EXEEXT)'; \
4258         b='testsuite/common/alu-tst'; \
4259         $(am__check_pre) $(LOG_DRIVER) --test-name "$$f" \
4260         --log-file $$b.log --trs-file $$b.trs \
4261         $(am__common_driver_flags) $(AM_LOG_DRIVER_FLAGS) $(LOG_DRIVER_FLAGS) -- $(LOG_COMPILE) \
4262         "$$tst" $(AM_TESTS_FD_REDIRECT)
4263 .test.log:
4264         @p='$<'; \
4265         $(am__set_b); \
4266         $(am__check_pre) $(TEST_LOG_DRIVER) --test-name "$$f" \
4267         --log-file $$b.log --trs-file $$b.trs \
4268         $(am__common_driver_flags) $(AM_TEST_LOG_DRIVER_FLAGS) $(TEST_LOG_DRIVER_FLAGS) -- $(TEST_LOG_COMPILE) \
4269         "$$tst" $(AM_TESTS_FD_REDIRECT)
4270 @am__EXEEXT_TRUE@.test$(EXEEXT).log:
4271 @am__EXEEXT_TRUE@       @p='$<'; \
4272 @am__EXEEXT_TRUE@       $(am__set_b); \
4273 @am__EXEEXT_TRUE@       $(am__check_pre) $(TEST_LOG_DRIVER) --test-name "$$f" \
4274 @am__EXEEXT_TRUE@       --log-file $$b.log --trs-file $$b.trs \
4275 @am__EXEEXT_TRUE@       $(am__common_driver_flags) $(AM_TEST_LOG_DRIVER_FLAGS) $(TEST_LOG_DRIVER_FLAGS) -- $(TEST_LOG_COMPILE) \
4276 @am__EXEEXT_TRUE@       "$$tst" $(AM_TESTS_FD_REDIRECT)
4277 check-am: all-am
4278         $(MAKE) $(AM_MAKEFLAGS) $(check_PROGRAMS)
4279         $(MAKE) $(AM_MAKEFLAGS) check-DEJAGNU check-TESTS
4280 check: $(BUILT_SOURCES)
4281         $(MAKE) $(AM_MAKEFLAGS) check-recursive
4282 all-am: Makefile $(LIBRARIES) $(PROGRAMS) $(DATA) $(HEADERS) config.h
4283 installdirs: installdirs-recursive
4284 installdirs-am:
4285         for dir in "$(DESTDIR)$(armdocdir)" "$(DESTDIR)$(dtbdir)" "$(DESTDIR)$(erc32docdir)" "$(DESTDIR)$(frvdocdir)" "$(DESTDIR)$(or1kdocdir)" "$(DESTDIR)$(ppcdocdir)" "$(DESTDIR)$(rxdocdir)" "$(DESTDIR)$(pkgincludedir)"; do \
4286           test -z "$$dir" || $(MKDIR_P) "$$dir"; \
4287         done
4288 install: $(BUILT_SOURCES)
4289         $(MAKE) $(AM_MAKEFLAGS) install-recursive
4290 install-exec: install-exec-recursive
4291 install-data: install-data-recursive
4292 uninstall: uninstall-recursive
4293
4294 install-am: all-am
4295         @$(MAKE) $(AM_MAKEFLAGS) install-exec-am install-data-am
4296
4297 installcheck: installcheck-recursive
4298 install-strip:
4299         if test -z '$(STRIP)'; then \
4300           $(MAKE) $(AM_MAKEFLAGS) INSTALL_PROGRAM="$(INSTALL_STRIP_PROGRAM)" \
4301             install_sh_PROGRAM="$(INSTALL_STRIP_PROGRAM)" INSTALL_STRIP_FLAG=-s \
4302               install; \
4303         else \
4304           $(MAKE) $(AM_MAKEFLAGS) INSTALL_PROGRAM="$(INSTALL_STRIP_PROGRAM)" \
4305             install_sh_PROGRAM="$(INSTALL_STRIP_PROGRAM)" INSTALL_STRIP_FLAG=-s \
4306             "INSTALL_PROGRAM_ENV=STRIPPROG='$(STRIP)'" install; \
4307         fi
4308 mostlyclean-generic:
4309         -test -z "$(MOSTLYCLEANFILES)" || rm -f $(MOSTLYCLEANFILES)
4310         -test -z "$(TEST_LOGS)" || rm -f $(TEST_LOGS)
4311         -test -z "$(TEST_LOGS:.log=.trs)" || rm -f $(TEST_LOGS:.log=.trs)
4312         -test -z "$(TEST_SUITE_LOG)" || rm -f $(TEST_SUITE_LOG)
4313
4314 clean-generic:
4315         -test -z "$(CLEANFILES)" || rm -f $(CLEANFILES)
4316
4317 distclean-generic:
4318         -test -z "$(CONFIG_CLEAN_FILES)" || rm -f $(CONFIG_CLEAN_FILES)
4319         -test . = "$(srcdir)" || test -z "$(CONFIG_CLEAN_VPATH_FILES)" || rm -f $(CONFIG_CLEAN_VPATH_FILES)
4320         -rm -f aarch64/$(am__dirstamp)
4321         -rm -f arm/$(am__dirstamp)
4322         -rm -f avr/$(am__dirstamp)
4323         -rm -f bfin/$(am__dirstamp)
4324         -rm -f bpf/$(am__dirstamp)
4325         -rm -f common/$(DEPDIR)/$(am__dirstamp)
4326         -rm -f common/$(am__dirstamp)
4327         -rm -f cr16/$(DEPDIR)/$(am__dirstamp)
4328         -rm -f cr16/$(am__dirstamp)
4329         -rm -f cris/$(DEPDIR)/$(am__dirstamp)
4330         -rm -f cris/$(am__dirstamp)
4331         -rm -f d10v/$(DEPDIR)/$(am__dirstamp)
4332         -rm -f d10v/$(am__dirstamp)
4333         -rm -f erc32/$(DEPDIR)/$(am__dirstamp)
4334         -rm -f erc32/$(am__dirstamp)
4335         -rm -f example-synacor/$(am__dirstamp)
4336         -rm -f frv/$(am__dirstamp)
4337         -rm -f ft32/$(am__dirstamp)
4338         -rm -f h8300/$(am__dirstamp)
4339         -rm -f igen/$(DEPDIR)/$(am__dirstamp)
4340         -rm -f igen/$(am__dirstamp)
4341         -rm -f iq2000/$(am__dirstamp)
4342         -rm -f lm32/$(am__dirstamp)
4343         -rm -f m32c/$(DEPDIR)/$(am__dirstamp)
4344         -rm -f m32c/$(am__dirstamp)
4345         -rm -f m32r/$(am__dirstamp)
4346         -rm -f m68hc11/$(DEPDIR)/$(am__dirstamp)
4347         -rm -f m68hc11/$(am__dirstamp)
4348         -rm -f mcore/$(am__dirstamp)
4349         -rm -f microblaze/$(am__dirstamp)
4350         -rm -f mips/$(am__dirstamp)
4351         -rm -f mn10300/$(am__dirstamp)
4352         -rm -f moxie/$(am__dirstamp)
4353         -rm -f msp430/$(am__dirstamp)
4354         -rm -f or1k/$(am__dirstamp)
4355         -rm -f ppc/$(DEPDIR)/$(am__dirstamp)
4356         -rm -f ppc/$(am__dirstamp)
4357         -rm -f pru/$(am__dirstamp)
4358         -rm -f riscv/$(am__dirstamp)
4359         -rm -f rl78/$(am__dirstamp)
4360         -rm -f rx/$(am__dirstamp)
4361         -rm -f sh/$(DEPDIR)/$(am__dirstamp)
4362         -rm -f sh/$(am__dirstamp)
4363         -rm -f testsuite/common/$(DEPDIR)/$(am__dirstamp)
4364         -rm -f testsuite/common/$(am__dirstamp)
4365         -rm -f v850/$(am__dirstamp)
4366         -test -z "$(DISTCLEANFILES)" || rm -f $(DISTCLEANFILES)
4367
4368 maintainer-clean-generic:
4369         @echo "This command is intended for maintainers to use"
4370         @echo "it deletes files that may require special tools to rebuild."
4371         -test -z "$(BUILT_SOURCES)" || rm -f $(BUILT_SOURCES)
4372 clean: clean-recursive
4373
4374 clean-am: clean-checkPROGRAMS clean-generic clean-libtool \
4375         clean-noinstLIBRARIES clean-noinstPROGRAMS mostlyclean-am
4376
4377 distclean: distclean-recursive
4378         -rm -f $(am__CONFIG_DISTCLEAN_FILES)
4379         -rm -rf common/$(DEPDIR) cr16/$(DEPDIR) cris/$(DEPDIR) d10v/$(DEPDIR) erc32/$(DEPDIR) igen/$(DEPDIR) m32c/$(DEPDIR) m68hc11/$(DEPDIR) ppc/$(DEPDIR) sh/$(DEPDIR) testsuite/common/$(DEPDIR)
4380         -rm -f Makefile
4381 distclean-am: clean-am distclean-DEJAGNU distclean-compile \
4382         distclean-generic distclean-hdr distclean-libtool \
4383         distclean-tags
4384
4385 dvi: dvi-recursive
4386
4387 dvi-am:
4388
4389 html: html-recursive
4390
4391 html-am:
4392
4393 info: info-recursive
4394
4395 info-am:
4396
4397 install-data-am: install-armdocDATA install-data-local install-dtbDATA \
4398         install-erc32docDATA install-frvdocDATA install-or1kdocDATA \
4399         install-pkgincludeHEADERS install-ppcdocDATA install-rxdocDATA
4400
4401 install-dvi: install-dvi-recursive
4402
4403 install-dvi-am:
4404
4405 install-exec-am: install-exec-local
4406
4407 install-html: install-html-recursive
4408
4409 install-html-am:
4410
4411 install-info: install-info-recursive
4412
4413 install-info-am:
4414
4415 install-man:
4416
4417 install-pdf: install-pdf-recursive
4418
4419 install-pdf-am:
4420
4421 install-ps: install-ps-recursive
4422
4423 install-ps-am:
4424
4425 installcheck-am:
4426
4427 maintainer-clean: maintainer-clean-recursive
4428         -rm -f $(am__CONFIG_DISTCLEAN_FILES)
4429         -rm -rf $(top_srcdir)/autom4te.cache
4430         -rm -rf common/$(DEPDIR) cr16/$(DEPDIR) cris/$(DEPDIR) d10v/$(DEPDIR) erc32/$(DEPDIR) igen/$(DEPDIR) m32c/$(DEPDIR) m68hc11/$(DEPDIR) ppc/$(DEPDIR) sh/$(DEPDIR) testsuite/common/$(DEPDIR)
4431         -rm -f Makefile
4432 maintainer-clean-am: distclean-am maintainer-clean-generic
4433
4434 mostlyclean: mostlyclean-recursive
4435
4436 mostlyclean-am: mostlyclean-compile mostlyclean-generic \
4437         mostlyclean-libtool
4438
4439 pdf: pdf-recursive
4440
4441 pdf-am:
4442
4443 ps: ps-recursive
4444
4445 ps-am:
4446
4447 uninstall-am: uninstall-armdocDATA uninstall-dtbDATA \
4448         uninstall-erc32docDATA uninstall-frvdocDATA uninstall-local \
4449         uninstall-or1kdocDATA uninstall-pkgincludeHEADERS \
4450         uninstall-ppcdocDATA uninstall-rxdocDATA
4451
4452 .MAKE: $(am__recursive_targets) all check check-am install install-am \
4453         install-strip
4454
4455 .PHONY: $(am__recursive_targets) CTAGS GTAGS TAGS all all-am \
4456         am--refresh check check-DEJAGNU check-TESTS check-am clean \
4457         clean-checkPROGRAMS clean-cscope clean-generic clean-libtool \
4458         clean-noinstLIBRARIES clean-noinstPROGRAMS cscope \
4459         cscopelist-am ctags ctags-am distclean distclean-DEJAGNU \
4460         distclean-compile distclean-generic distclean-hdr \
4461         distclean-libtool distclean-tags dvi dvi-am html html-am info \
4462         info-am install install-am install-armdocDATA install-data \
4463         install-data-am install-data-local install-dtbDATA install-dvi \
4464         install-dvi-am install-erc32docDATA install-exec \
4465         install-exec-am install-exec-local install-frvdocDATA \
4466         install-html install-html-am install-info install-info-am \
4467         install-man install-or1kdocDATA install-pdf install-pdf-am \
4468         install-pkgincludeHEADERS install-ppcdocDATA install-ps \
4469         install-ps-am install-rxdocDATA install-strip installcheck \
4470         installcheck-am installdirs installdirs-am maintainer-clean \
4471         maintainer-clean-generic mostlyclean mostlyclean-compile \
4472         mostlyclean-generic mostlyclean-libtool pdf pdf-am ps ps-am \
4473         recheck tags tags-am uninstall uninstall-am \
4474         uninstall-armdocDATA uninstall-dtbDATA uninstall-erc32docDATA \
4475         uninstall-frvdocDATA uninstall-local uninstall-or1kdocDATA \
4476         uninstall-pkgincludeHEADERS uninstall-ppcdocDATA \
4477         uninstall-rxdocDATA
4478
4479 .PRECIOUS: Makefile
4480
4481 @am__include@ @am__quote@$(GNULIB_PARENT_DIR)/gnulib/Makefile.gnulib.inc@am__quote@
4482
4483 # Generate target constants for newlib/libgloss from its source tree.
4484 # This file is shipped with distributions so we build in the source dir.
4485 # Use `make nltvals' to rebuild.
4486 .PHONY: nltvals
4487 nltvals:
4488         $(srccom)/gennltvals.py --cpp "$(CPP)"
4489
4490 common/version.c: common/version.c-stamp ; @true
4491 common/version.c-stamp: $(srcroot)/gdb/version.in $(srcroot)/bfd/version.h $(srcdir)/common/create-version.sh
4492         $(AM_V_GEN)$(SHELL) $(srcdir)/common/create-version.sh $(srcroot)/gdb $@.tmp
4493         $(AM_V_at)$(SHELL) $(srcroot)/move-if-change $@.tmp $(@:-stamp=)
4494         $(AM_V_at)touch $@
4495
4496 .PRECIOUS: %/test-hw-events.o
4497 %/test-hw-events.o: common/hw-events.c
4498         $(AM_V_CC)$(COMPILE) -DMAIN -c -o $@ $<
4499 %/test-hw-events: %/test-hw-events.o %/libsim.a
4500         $(AM_V_CCLD)$(LINK) -o $@ $^ $(SIM_COMMON_LIBS) $(LIBS)
4501
4502 # FIXME This is one very simple-minded way of generating the file hw-config.h.
4503 %/hw-config.h: %/stamp-hw ; @true
4504 %/stamp-hw: Makefile
4505         $(AM_V_GEN)set -e; \
4506         ( \
4507         sim_hw="$(SIM_HW_DEVICES) $($(@D)_SIM_EXTRA_HW_DEVICES)" ; \
4508         echo "/* generated by Makefile */" ; \
4509         printf "extern const struct hw_descriptor dv_%s_descriptor[];\n" $$sim_hw ; \
4510         echo "const struct hw_descriptor * const hw_descriptors[] = {" ; \
4511         printf "  dv_%s_descriptor,\n" $$sim_hw ; \
4512         echo "  NULL," ; \
4513         echo "};" \
4514         ) > $@.tmp; \
4515         $(SHELL) $(srcroot)/move-if-change $@.tmp $(@D)/hw-config.h; \
4516         touch $@
4517 .PRECIOUS: %/stamp-hw
4518 %/modules.c: %/stamp-modules ; @true
4519 %/stamp-modules: Makefile
4520         $(AM_V_GEN)set -e; \
4521         LANG=C ; export LANG; \
4522         LC_ALL=C ; export LC_ALL; \
4523         sed -n -e '/^sim_install_/{s/^\(sim_install_[a-z_0-9A-Z]*\).*/\1/;p}' $(GEN_MODULES_C_SRCS) | sort >$@.l-tmp; \
4524         ( \
4525         echo '/* Do not modify this file.  */'; \
4526         echo '/* It is created automatically by the Makefile.  */'; \
4527         echo '#include "libiberty.h"'; \
4528         echo '#include "sim-module.h"'; \
4529         sed -e 's:\(.*\):extern MODULE_INIT_FN \1;:' $@.l-tmp; \
4530         echo 'MODULE_INSTALL_FN * const sim_modules_detected[] = {'; \
4531         sed -e 's:\(.*\):  \1,:' $@.l-tmp; \
4532         echo '};'; \
4533         echo 'const int sim_modules_detected_len = ARRAY_SIZE (sim_modules_detected);'; \
4534         ) >$@.tmp; \
4535         $(SHELL) $(srcroot)/move-if-change $@.tmp $(@D)/modules.c; \
4536         rm -f $@.l-tmp; \
4537         touch $@
4538 .PRECIOUS: %/stamp-modules
4539
4540 # Alias for developers.
4541 @SIM_ENABLE_IGEN_TRUE@igen: $(IGEN)
4542
4543 # These rules are copied from automake, but tweaked to use FOR_BUILD variables.
4544 @SIM_ENABLE_IGEN_TRUE@igen/libigen.a: $(igen_libigen_a_OBJECTS) $(igen_libigen_a_DEPENDENCIES) $(EXTRA_igen_libigen_a_DEPENDENCIES) igen/$(am__dirstamp)
4545 @SIM_ENABLE_IGEN_TRUE@  $(AM_V_at)-rm -f $@
4546 @SIM_ENABLE_IGEN_TRUE@  $(AM_V_AR)$(AR_FOR_BUILD) $(ARFLAGS) $@ $(igen_libigen_a_OBJECTS) $(igen_libigen_a_LIBADD)
4547 @SIM_ENABLE_IGEN_TRUE@  $(AM_V_at)$(RANLIB_FOR_BUILD) $@
4548
4549 @SIM_ENABLE_IGEN_TRUE@igen/igen$(EXEEXT): $(igen_igen_OBJECTS) $(igen_igen_DEPENDENCIES) igen/$(am__dirstamp)
4550 @SIM_ENABLE_IGEN_TRUE@  $(AM_V_CCLD)$(LINK_FOR_BUILD) $(igen_igen_OBJECTS) $(igen_igen_LDADD)
4551
4552 # igen is a build-time only tool.  Override the default rules for it.
4553 @SIM_ENABLE_IGEN_TRUE@igen/%.o: igen/%.c
4554 @SIM_ENABLE_IGEN_TRUE@  $(AM_V_CC)$(COMPILE_FOR_BUILD) -c $< -o $@
4555
4556 # Build some of the files in standalone mode for developers of igen itself.
4557 @SIM_ENABLE_IGEN_TRUE@igen/%-main.o: igen/%.c
4558 @SIM_ENABLE_IGEN_TRUE@  $(AM_V_CC)$(COMPILE_FOR_BUILD) -DMAIN -c $< -o $@
4559
4560 site-sim-config.exp: Makefile
4561         $(AM_V_GEN)( \
4562         echo "set SIM_PRIMARY_TARGET \"$(SIM_PRIMARY_TARGET)\""; \
4563         echo "set builddir \"$(builddir)\""; \
4564         echo "set srcdir \"$(srcdir)/testsuite\""; \
4565         $(foreach V,$(SIM_TOOLCHAIN_VARS),echo "set $(V) \"$($(V))\"";) \
4566         ) > $@
4567
4568 # Ignore dirs that only contain configuration settings.
4569 check/./config/%.exp: ; @true
4570 check/config/%.exp: ; @true
4571 check/./lib/%.exp: ; @true
4572 check/lib/%.exp: ; @true
4573
4574 check/%.exp:
4575         $(AM_V_at)mkdir -p testsuite/$*
4576         $(AM_V_RUNTEST)$(DO_RUNTEST) --objdir testsuite/$* --outdir testsuite/$* $*.exp
4577
4578 check-DEJAGNU-parallel:
4579         $(AM_V_at)( \
4580         set -- `cd $(srcdir)/testsuite && find . -name '*.exp' -printf '%P\n' | sed 's:[.]exp$$::'`; \
4581         $(MAKE) -k `printf 'check/%s.exp ' $$@`; \
4582         ret=$$?; \
4583         set -- `printf 'testsuite/%s/ ' $$@`; \
4584         $(SHELL) $(srcroot)/contrib/dg-extract-results.sh \
4585           `find $$@ -maxdepth 1 -name testrun.sum 2>/dev/null | sort` > testrun.sum; \
4586         $(SHELL) $(srcroot)/contrib/dg-extract-results.sh -L \
4587           `find $$@ -maxdepth 1 -name testrun.log 2>/dev/null | sort` > testrun.log; \
4588         echo; \
4589         $(SED) -n '/^.*===.*Summary.*===/,$$p' testrun.sum; \
4590         exit $$ret)
4591
4592 check-DEJAGNU-single:
4593         $(AM_V_RUNTEST)$(DO_RUNTEST)
4594
4595 # If running a single job, invoking runtest once is faster & has nicer output.
4596 check-DEJAGNU: site.exp
4597         $(AM_V_at)(set -e; \
4598         EXPECT=${EXPECT} ; export EXPECT ; \
4599         runtest=$(RUNTEST); \
4600         if $(SHELL) -c "$$runtest --version" > /dev/null 2>&1; then \
4601           case "$(MAKEFLAGS)" in \
4602           *-j*) $(MAKE) check-DEJAGNU-parallel;; \
4603           *)    $(MAKE) check-DEJAGNU-single;; \
4604           esac; \
4605         else \
4606           echo "WARNING: could not find \`runtest'" 1>&2; :;\
4607         fi)
4608
4609 # These tests are build-time only tools.  Override the default rules for them.
4610 testsuite/common/%.o: testsuite/common/%.c
4611         $(AM_V_CC)$(COMPILE_FOR_BUILD) $(testsuite_common_CPPFLAGS) -c $< -o $@
4612
4613 testsuite/common/alu-tst$(EXEEXT): $(testsuite_common_alu_tst_OBJECTS) $(testsuite_common_alu_tst_DEPENDENCIES) testsuite/common/$(am__dirstamp)
4614         $(AM_V_CCLD)$(LINK_FOR_BUILD) $(testsuite_common_alu_tst_OBJECTS) $(testsuite_common_alu_tst_LDADD)
4615
4616 testsuite/common/fpu-tst$(EXEEXT): $(testsuite_common_fpu_tst_OBJECTS) $(testsuite_common_fpu_tst_DEPENDENCIES) testsuite/common/$(am__dirstamp)
4617         $(AM_V_CCLD)$(LINK_FOR_BUILD) $(testsuite_common_fpu_tst_OBJECTS) $(testsuite_common_fpu_tst_LDADD)
4618
4619 testsuite/common/bits-gen$(EXEEXT): $(testsuite_common_bits_gen_OBJECTS) $(testsuite_common_bits_gen_DEPENDENCIES) testsuite/common/$(am__dirstamp)
4620         $(AM_V_CCLD)$(LINK_FOR_BUILD) $(testsuite_common_bits_gen_OBJECTS) $(testsuite_common_bits_gen_LDADD)
4621
4622 testsuite/common/bits32m0$(EXEEXT): $(testsuite_common_bits32m0_OBJECTS) $(testsuite_common_bits32m0_DEPENDENCIES) testsuite/common/$(am__dirstamp)
4623         $(AM_V_CCLD)$(LINK_FOR_BUILD) $(testsuite_common_bits32m0_OBJECTS) $(testsuite_common_bits32m0_LDADD)
4624
4625 testsuite/common/bits32m0.c: testsuite/common/bits-gen$(EXEEXT) testsuite/common/bits-tst.c
4626         $(AM_V_GEN)$< 32 0 big > $@.tmp
4627         $(AM_V_at)cat $(srcdir)/testsuite/common/bits-tst.c >> $@.tmp
4628         $(AM_V_at)mv $@.tmp $@
4629
4630 testsuite/common/bits32m31$(EXEEXT): $(testsuite_common_bits32m31_OBJECTS) $(testsuite_common_bits32m31_DEPENDENCIES) testsuite/common/$(am__dirstamp)
4631         $(AM_V_CCLD)$(LINK_FOR_BUILD) $(testsuite_common_bits32m31_OBJECTS) $(testsuite_common_bits32m31_LDADD)
4632
4633 testsuite/common/bits32m31.c: testsuite/common/bits-gen$(EXEEXT) testsuite/common/bits-tst.c
4634         $(AM_V_GEN)$< 32 31 little > $@.tmp
4635         $(AM_V_at)cat $(srcdir)/testsuite/common/bits-tst.c >> $@.tmp
4636         $(AM_V_at)mv $@.tmp $@
4637
4638 testsuite/common/bits64m0$(EXEEXT): $(testsuite_common_bits64m0_OBJECTS) $(testsuite_common_bits64m0_DEPENDENCIES) testsuite/common/$(am__dirstamp)
4639         $(AM_V_CCLD)$(LINK_FOR_BUILD) $(testsuite_common_bits64m0_OBJECTS) $(testsuite_common_bits64m0_LDADD)
4640
4641 testsuite/common/bits64m0.c: testsuite/common/bits-gen$(EXEEXT) testsuite/common/bits-tst.c
4642         $(AM_V_GEN)$< 64 0 big > $@.tmp
4643         $(AM_V_at)cat $(srcdir)/testsuite/common/bits-tst.c >> $@.tmp
4644         $(AM_V_at)mv $@.tmp $@
4645
4646 testsuite/common/bits64m63$(EXEEXT): $(testsuite_common_bits64m63_OBJECTS) $(testsuite_common_bits64m63_DEPENDENCIES) testsuite/common/$(am__dirstamp)
4647         $(AM_V_CCLD)$(LINK_FOR_BUILD) $(testsuite_common_bits64m63_OBJECTS) $(testsuite_common_bits64m63_LDADD)
4648
4649 testsuite/common/bits64m63.c: testsuite/common/bits-gen$(EXEEXT) testsuite/common/bits-tst.c
4650         $(AM_V_GEN)$< 64 63 little > $@.tmp
4651         $(AM_V_at)cat $(srcdir)/testsuite/common/bits-tst.c >> $@.tmp
4652         $(AM_V_at)mv $@.tmp $@
4653 @SIM_ENABLE_ARCH_aarch64_TRUE@$(aarch64_libsim_a_OBJECTS) $(aarch64_libsim_a_LIBADD): aarch64/hw-config.h
4654
4655 @SIM_ENABLE_ARCH_aarch64_TRUE@aarch64/%.o: common/%.c ; $(SIM_COMPILE)
4656 @SIM_ENABLE_ARCH_aarch64_TRUE@-@am__include@ aarch64/$(DEPDIR)/*.Po
4657 @SIM_ENABLE_ARCH_arm_TRUE@$(arm_libsim_a_OBJECTS) $(arm_libsim_a_LIBADD): arm/hw-config.h
4658
4659 @SIM_ENABLE_ARCH_arm_TRUE@arm/%.o: common/%.c ; $(SIM_COMPILE)
4660 @SIM_ENABLE_ARCH_arm_TRUE@-@am__include@ arm/$(DEPDIR)/*.Po
4661 @SIM_ENABLE_ARCH_avr_TRUE@$(avr_libsim_a_OBJECTS) $(avr_libsim_a_LIBADD): avr/hw-config.h
4662
4663 @SIM_ENABLE_ARCH_avr_TRUE@avr/%.o: common/%.c ; $(SIM_COMPILE)
4664 @SIM_ENABLE_ARCH_avr_TRUE@-@am__include@ avr/$(DEPDIR)/*.Po
4665 @SIM_ENABLE_ARCH_bfin_TRUE@$(bfin_libsim_a_OBJECTS) $(bfin_libsim_a_LIBADD): bfin/hw-config.h
4666
4667 @SIM_ENABLE_ARCH_bfin_TRUE@bfin/%.o: common/%.c ; $(SIM_COMPILE)
4668 @SIM_ENABLE_ARCH_bfin_TRUE@-@am__include@ bfin/$(DEPDIR)/*.Po
4669
4670 @SIM_ENABLE_ARCH_bfin_TRUE@bfin/linux-fixed-code.h: @MAINT@ $(srcdir)/bfin/linux-fixed-code.s bfin/local.mk bfin/$(am__dirstamp)
4671 @SIM_ENABLE_ARCH_bfin_TRUE@     $(AM_V_GEN)$(AS_FOR_TARGET_BFIN) $(srcdir)/bfin/linux-fixed-code.s -o bfin/linux-fixed-code.o
4672 @SIM_ENABLE_ARCH_bfin_TRUE@     $(AM_V_at)(\
4673 @SIM_ENABLE_ARCH_bfin_TRUE@             set -e; \
4674 @SIM_ENABLE_ARCH_bfin_TRUE@             echo "/* DO NOT EDIT: Autogenerated from linux-fixed-code.s.  */"; \
4675 @SIM_ENABLE_ARCH_bfin_TRUE@             echo "static const unsigned char bfin_linux_fixed_code[] ="; \
4676 @SIM_ENABLE_ARCH_bfin_TRUE@             echo "{"; \
4677 @SIM_ENABLE_ARCH_bfin_TRUE@             $(OBJDUMP_FOR_TARGET_BFIN) -d -z bfin/linux-fixed-code.o > $@.dis; \
4678 @SIM_ENABLE_ARCH_bfin_TRUE@             sed -n \
4679 @SIM_ENABLE_ARCH_bfin_TRUE@                     -e 's:^[^       ]*      :0x:' \
4680 @SIM_ENABLE_ARCH_bfin_TRUE@                     -e '/^0x/{s:    .*::;s: *$$:,:;s: :, 0x:g;p;}' \
4681 @SIM_ENABLE_ARCH_bfin_TRUE@                     $@.dis; \
4682 @SIM_ENABLE_ARCH_bfin_TRUE@             rm -f $@.dis; \
4683 @SIM_ENABLE_ARCH_bfin_TRUE@             echo "};" \
4684 @SIM_ENABLE_ARCH_bfin_TRUE@     ) > $@.tmp
4685 @SIM_ENABLE_ARCH_bfin_TRUE@     $(AM_V_at)$(SHELL) $(srcroot)/move-if-change $@.tmp $(srcdir)/bfin/linux-fixed-code.h
4686 @SIM_ENABLE_ARCH_bfin_TRUE@     $(AM_V_at)touch $(srcdir)/bfin/linux-fixed-code.h
4687 @SIM_ENABLE_ARCH_bpf_TRUE@$(bpf_libsim_a_OBJECTS) $(bpf_libsim_a_LIBADD): bpf/hw-config.h
4688
4689 @SIM_ENABLE_ARCH_bpf_TRUE@bpf/%.o: common/%.c ; $(SIM_COMPILE)
4690 @SIM_ENABLE_ARCH_bpf_TRUE@-@am__include@ bpf/$(DEPDIR)/*.Po
4691
4692 @SIM_ENABLE_ARCH_bpf_TRUE@bpf/modules.c: | $(bpf_BUILD_OUTPUTS)
4693
4694 @SIM_ENABLE_ARCH_bpf_TRUE@bpf/mloop-le.c bpf/eng-le.h: bpf/stamp-mloop-le ; @true
4695 @SIM_ENABLE_ARCH_bpf_TRUE@bpf/stamp-mloop-le: $(srccom)/genmloop.sh bpf/mloop.in
4696 @SIM_ENABLE_ARCH_bpf_TRUE@      $(AM_V_GEN)$(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \
4697 @SIM_ENABLE_ARCH_bpf_TRUE@              -mono -scache -prefix bpfbf_ebpfle -cpu bpfbf \
4698 @SIM_ENABLE_ARCH_bpf_TRUE@              -infile $(srcdir)/bpf/mloop.in \
4699 @SIM_ENABLE_ARCH_bpf_TRUE@              -outfile-prefix bpf/ -outfile-suffix -le
4700 @SIM_ENABLE_ARCH_bpf_TRUE@      $(AM_V_at)$(SHELL) $(srcroot)/move-if-change bpf/eng-le.hin bpf/eng-le.h
4701 @SIM_ENABLE_ARCH_bpf_TRUE@      $(AM_V_at)$(SHELL) $(srcroot)/move-if-change bpf/mloop-le.cin bpf/mloop-le.c
4702 @SIM_ENABLE_ARCH_bpf_TRUE@      $(AM_V_at)touch $@
4703
4704 @SIM_ENABLE_ARCH_bpf_TRUE@bpf/mloop-be.c bpf/eng-be.h: bpf/stamp-mloop-be ; @true
4705 @SIM_ENABLE_ARCH_bpf_TRUE@bpf/stamp-mloop-be: $(srccom)/genmloop.sh bpf/mloop.in
4706 @SIM_ENABLE_ARCH_bpf_TRUE@      $(AM_V_GEN)$(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \
4707 @SIM_ENABLE_ARCH_bpf_TRUE@              -mono -scache -prefix bpfbf_ebpfbe -cpu bpfbf \
4708 @SIM_ENABLE_ARCH_bpf_TRUE@              -infile $(srcdir)/bpf/mloop.in \
4709 @SIM_ENABLE_ARCH_bpf_TRUE@              -outfile-prefix bpf/ -outfile-suffix -be
4710 @SIM_ENABLE_ARCH_bpf_TRUE@      $(AM_V_at)$(SHELL) $(srcroot)/move-if-change bpf/eng-be.hin bpf/eng-be.h
4711 @SIM_ENABLE_ARCH_bpf_TRUE@      $(AM_V_at)$(SHELL) $(srcroot)/move-if-change bpf/mloop-be.cin bpf/mloop-be.c
4712 @SIM_ENABLE_ARCH_bpf_TRUE@      $(AM_V_at)touch $@
4713
4714 @SIM_ENABLE_ARCH_bpf_TRUE@bpf/cgen: bpf/cgen-arch bpf/cgen-cpu bpf/cgen-defs-le bpf/cgen-defs-be bpf/cgen-decode-le bpf/cgen-decode-be
4715
4716 @SIM_ENABLE_ARCH_bpf_TRUE@bpf/cgen-arch:
4717 @SIM_ENABLE_ARCH_bpf_TRUE@      $(AM_V_GEN)mach=bpf cpu=bpfbf FLAGS="with-scache"; $(CGEN_GEN_ARCH)
4718 @SIM_ENABLE_ARCH_bpf_TRUE@bpf/arch.h bpf/arch.c bpf/cpuall.h: @CGEN_MAINT@ bpf/cgen-arch
4719
4720 @SIM_ENABLE_ARCH_bpf_TRUE@bpf/cgen-cpu:
4721 @SIM_ENABLE_ARCH_bpf_TRUE@      $(AM_V_GEN)isa=ebpfle,ebpfbe cpu=bpfbf mach=bpf FLAGS="with-multiple-isa with-scache"; $(CGEN_GEN_CPU)
4722 @SIM_ENABLE_ARCH_bpf_TRUE@      $(AM_V_at)rm -f $(srcdir)/bpf/model.c
4723 @SIM_ENABLE_ARCH_bpf_TRUE@bpf/cpu.h bpf/cpu.c bpf/model.c: @CGEN_MAINT@ bpf/cgen-cpu
4724
4725 @SIM_ENABLE_ARCH_bpf_TRUE@bpf/cgen-defs-le:
4726 @SIM_ENABLE_ARCH_bpf_TRUE@      $(AM_V_GEN)isa=ebpfle cpu=bpfbf mach=bpf FLAGS="with-scache" SUFFIX="-le"; $(CGEN_GEN_DEFS)
4727 @SIM_ENABLE_ARCH_bpf_TRUE@bpf/defs-le.h: @CGEN_MAINT@ bpf/cgen-defs-le
4728
4729 @SIM_ENABLE_ARCH_bpf_TRUE@bpf/cgen-defs-be:
4730 @SIM_ENABLE_ARCH_bpf_TRUE@      $(AM_V_GEN)isa=ebpfbe cpu=bpfbf mach=bpf FLAGS="with-scache" SUFFIX="-be"; $(CGEN_GEN_DEFS)
4731 @SIM_ENABLE_ARCH_bpf_TRUE@bpf/defs-be.h: @CGEN_MAINT@ bpf/cgen-defs-be
4732
4733 @SIM_ENABLE_ARCH_bpf_TRUE@bpf/cgen-decode-le:
4734 @SIM_ENABLE_ARCH_bpf_TRUE@      $(AM_V_GEN)isa=ebpfle cpu=bpfbf mach=bpf FLAGS="with-scache" SUFFIX="-le" EXTRAFILES="$(CGEN_CPU_SEM)"; $(CGEN_GEN_DECODE)
4735 @SIM_ENABLE_ARCH_bpf_TRUE@bpf/sem-le.c bpf/decode-le.c bpf/decode-le.h: @CGEN_MAINT@ bpf/cgen-decode-vle
4736
4737 @SIM_ENABLE_ARCH_bpf_TRUE@bpf/cgen-decode-be:
4738 @SIM_ENABLE_ARCH_bpf_TRUE@      $(AM_V_GEN)isa=ebpfbe cpu=bpfbf mach=bpf FLAGS="with-scache" SUFFIX="-be" EXTRAFILES="$(CGEN_CPU_SEM)"; $(CGEN_GEN_DECODE)
4739 @SIM_ENABLE_ARCH_bpf_TRUE@bpf/sem-be.c bpf/decode-be.c bpf/decode-be.h: @CGEN_MAINT@ bpf/cgen-decode-be
4740 @SIM_ENABLE_ARCH_cr16_TRUE@$(cr16_libsim_a_OBJECTS) $(cr16_libsim_a_LIBADD): cr16/hw-config.h
4741
4742 @SIM_ENABLE_ARCH_cr16_TRUE@cr16/%.o: common/%.c ; $(SIM_COMPILE)
4743 @SIM_ENABLE_ARCH_cr16_TRUE@-@am__include@ cr16/$(DEPDIR)/*.Po
4744
4745 @SIM_ENABLE_ARCH_cr16_TRUE@cr16/modules.c: | $(cr16_BUILD_OUTPUTS)
4746
4747 # These rules are copied from automake, but tweaked to use FOR_BUILD variables.
4748 @SIM_ENABLE_ARCH_cr16_TRUE@cr16/gencode$(EXEEXT): $(cr16_gencode_OBJECTS) $(cr16_gencode_DEPENDENCIES) cr16/$(am__dirstamp)
4749 @SIM_ENABLE_ARCH_cr16_TRUE@     $(AM_V_CCLD)$(LINK_FOR_BUILD) $(cr16_gencode_OBJECTS) $(cr16_gencode_LDADD)
4750
4751 # gencode is a build-time only tool.  Override the default rules for it.
4752 @SIM_ENABLE_ARCH_cr16_TRUE@cr16/gencode.o: cr16/gencode.c
4753 @SIM_ENABLE_ARCH_cr16_TRUE@     $(AM_V_CC)$(COMPILE_FOR_BUILD) -c $< -o $@
4754 @SIM_ENABLE_ARCH_cr16_TRUE@cr16/cr16-opc.o: ../opcodes/cr16-opc.c
4755 @SIM_ENABLE_ARCH_cr16_TRUE@     $(AM_V_CC)$(COMPILE_FOR_BUILD) -c $< -o $@
4756
4757 @SIM_ENABLE_ARCH_cr16_TRUE@cr16/simops.h: cr16/gencode$(EXEEXT)
4758 @SIM_ENABLE_ARCH_cr16_TRUE@     $(AM_V_GEN)$< -h >$@
4759
4760 @SIM_ENABLE_ARCH_cr16_TRUE@cr16/table.c: cr16/gencode$(EXEEXT)
4761 @SIM_ENABLE_ARCH_cr16_TRUE@     $(AM_V_GEN)$< >$@
4762 @SIM_ENABLE_ARCH_cris_TRUE@$(cris_libsim_a_OBJECTS) $(cris_libsim_a_LIBADD): cris/hw-config.h
4763
4764 @SIM_ENABLE_ARCH_cris_TRUE@cris/%.o: common/%.c ; $(SIM_COMPILE)
4765 @SIM_ENABLE_ARCH_cris_TRUE@-@am__include@ cris/$(DEPDIR)/*.Po
4766
4767 @SIM_ENABLE_ARCH_cris_TRUE@cris/modules.c: | $(cris_BUILD_OUTPUTS)
4768
4769 @SIM_ENABLE_ARCH_cris_TRUE@cris/mloopv10f.c cris/engv10.h: cris/stamp-mloop-v10f ; @true
4770 @SIM_ENABLE_ARCH_cris_TRUE@cris/stamp-mloop-v10f: $(srccom)/genmloop.sh cris/mloop.in
4771 @SIM_ENABLE_ARCH_cris_TRUE@     $(AM_V_GEN)$(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \
4772 @SIM_ENABLE_ARCH_cris_TRUE@             -mono -no-fast -pbb -switch semcrisv10f-switch.c \
4773 @SIM_ENABLE_ARCH_cris_TRUE@             -cpu crisv10f \
4774 @SIM_ENABLE_ARCH_cris_TRUE@             -infile $(srcdir)/cris/mloop.in -outfile-prefix cris/ -outfile-suffix -v10f
4775 @SIM_ENABLE_ARCH_cris_TRUE@     $(AM_V_at)$(SHELL) $(srcroot)/move-if-change cris/eng-v10f.hin cris/engv10.h
4776 @SIM_ENABLE_ARCH_cris_TRUE@     $(AM_V_at)$(SHELL) $(srcroot)/move-if-change cris/mloop-v10f.cin cris/mloopv10f.c
4777 @SIM_ENABLE_ARCH_cris_TRUE@     $(AM_V_at)touch $@
4778
4779 @SIM_ENABLE_ARCH_cris_TRUE@cris/mloopv32f.c cris/engv32.h: cris/stamp-mloop-v32f ; @true
4780 @SIM_ENABLE_ARCH_cris_TRUE@cris/stamp-mloop-v32f: $(srccom)/genmloop.sh cris/mloop.in
4781 @SIM_ENABLE_ARCH_cris_TRUE@     $(AM_V_GEN)$(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \
4782 @SIM_ENABLE_ARCH_cris_TRUE@             -mono -no-fast -pbb -switch semcrisv32f-switch.c \
4783 @SIM_ENABLE_ARCH_cris_TRUE@             -cpu crisv32f \
4784 @SIM_ENABLE_ARCH_cris_TRUE@             -infile $(srcdir)/cris/mloop.in -outfile-prefix cris/ -outfile-suffix -v32f
4785 @SIM_ENABLE_ARCH_cris_TRUE@     $(AM_V_at)$(SHELL) $(srcroot)/move-if-change cris/eng-v32f.hin cris/engv32.h
4786 @SIM_ENABLE_ARCH_cris_TRUE@     $(AM_V_at)$(SHELL) $(srcroot)/move-if-change cris/mloop-v32f.cin cris/mloopv32f.c
4787 @SIM_ENABLE_ARCH_cris_TRUE@     $(AM_V_at)touch $@
4788
4789 @SIM_ENABLE_ARCH_cris_TRUE@cris/cgen: cris/cgen-arch cris/cgen-cpu-decode-v10f cris/cgen-cpu-decode-v32f
4790
4791 @SIM_ENABLE_ARCH_cris_TRUE@cris/cgen-arch:
4792 @SIM_ENABLE_ARCH_cris_TRUE@     $(AM_V_GEN)mach=crisv10,crisv32 FLAGS="with-scache with-profile=fn"; $(CGEN_GEN_ARCH)
4793 @SIM_ENABLE_ARCH_cris_TRUE@cris/arch.h cris/arch.c cris/cpuall.h: @CGEN_MAINT@ cris/cgen-arch
4794
4795 @SIM_ENABLE_ARCH_cris_TRUE@cris/cgen-cpu-decode-v10f:
4796 @SIM_ENABLE_ARCH_cris_TRUE@     $(AM_V_GEN)cpu=crisv10f mach=crisv10 SUFFIX=v10 FLAGS="with-scache with-profile=fn" EXTRAFILES="$(CGEN_CPU_SEMSW)"; $(CGEN_GEN_CPU_DECODE)
4797 @SIM_ENABLE_ARCH_cris_TRUE@     $(AM_V_at)$(SHELL) $(srcroot)/move-if-change $(srcdir)/cris/semv10-switch.c $(srcdir)/cris/semcrisv10f-switch.c
4798 @SIM_ENABLE_ARCH_cris_TRUE@cris/cpuv10.h cris/cpuv10.c cris/semcrisv10f-switch.c cris/modelv10.c cris/decodev10.c cris/decodev10.h: @CGEN_MAINT@ cris/cgen-cpu-decode-v10f
4799
4800 @SIM_ENABLE_ARCH_cris_TRUE@cris/cgen-cpu-decode-v32f:
4801 @SIM_ENABLE_ARCH_cris_TRUE@     $(AM_V_GEN)cpu=crisv32f mach=crisv32 SUFFIX=v32 FLAGS="with-scache with-profile=fn" EXTRAFILES="$(CGEN_CPU_SEMSW)"; $(CGEN_GEN_CPU_DECODE)
4802 @SIM_ENABLE_ARCH_cris_TRUE@     $(AM_V_at)$(SHELL) $(srcroot)/move-if-change $(srcdir)/cris/semv32-switch.c $(srcdir)/cris/semcrisv32f-switch.c
4803 @SIM_ENABLE_ARCH_cris_TRUE@cris/cpuv32.h cris/cpuv32.c cris/semcrisv32f-switch.c cris/modelv32.c cris/decodev32.c cris/decodev32.h: @CGEN_MAINT@ cris/cgen-cpu-decode-v32f
4804 @SIM_ENABLE_ARCH_d10v_TRUE@$(d10v_libsim_a_OBJECTS) $(d10v_libsim_a_LIBADD): d10v/hw-config.h
4805
4806 @SIM_ENABLE_ARCH_d10v_TRUE@d10v/%.o: common/%.c ; $(SIM_COMPILE)
4807 @SIM_ENABLE_ARCH_d10v_TRUE@-@am__include@ d10v/$(DEPDIR)/*.Po
4808
4809 @SIM_ENABLE_ARCH_d10v_TRUE@d10v/modules.c: | $(d10v_BUILD_OUTPUTS)
4810
4811 # These rules are copied from automake, but tweaked to use FOR_BUILD variables.
4812 @SIM_ENABLE_ARCH_d10v_TRUE@d10v/gencode$(EXEEXT): $(d10v_gencode_OBJECTS) $(d10v_gencode_DEPENDENCIES) d10v/$(am__dirstamp)
4813 @SIM_ENABLE_ARCH_d10v_TRUE@     $(AM_V_CCLD)$(LINK_FOR_BUILD) $(d10v_gencode_OBJECTS) $(d10v_gencode_LDADD)
4814
4815 # gencode is a build-time only tool.  Override the default rules for it.
4816 @SIM_ENABLE_ARCH_d10v_TRUE@d10v/gencode.o: d10v/gencode.c
4817 @SIM_ENABLE_ARCH_d10v_TRUE@     $(AM_V_CC)$(COMPILE_FOR_BUILD) -c $< -o $@
4818 @SIM_ENABLE_ARCH_d10v_TRUE@d10v/d10v-opc.o: ../opcodes/d10v-opc.c
4819 @SIM_ENABLE_ARCH_d10v_TRUE@     $(AM_V_CC)$(COMPILE_FOR_BUILD) -c $< -o $@
4820
4821 @SIM_ENABLE_ARCH_d10v_TRUE@d10v/simops.h: d10v/gencode$(EXEEXT)
4822 @SIM_ENABLE_ARCH_d10v_TRUE@     $(AM_V_GEN)$< -h >$@
4823
4824 @SIM_ENABLE_ARCH_d10v_TRUE@d10v/table.c: d10v/gencode$(EXEEXT)
4825 @SIM_ENABLE_ARCH_d10v_TRUE@     $(AM_V_GEN)$< >$@
4826 @SIM_ENABLE_ARCH_erc32_TRUE@$(erc32_libsim_a_OBJECTS) $(erc32_libsim_a_LIBADD): erc32/hw-config.h
4827
4828 @SIM_ENABLE_ARCH_erc32_TRUE@erc32/%.o: common/%.c ; $(SIM_COMPILE)
4829 @SIM_ENABLE_ARCH_erc32_TRUE@-@am__include@ erc32/$(DEPDIR)/*.Po
4830
4831 @SIM_ENABLE_ARCH_erc32_TRUE@erc32/sis$(EXEEXT): erc32/run$(EXEEXT)
4832 @SIM_ENABLE_ARCH_erc32_TRUE@    $(AM_V_GEN)ln $< $@ 2>/dev/null || $(LN_S) $< $@ 2>/dev/null || cp -p $< $@
4833 @SIM_ENABLE_ARCH_erc32_TRUE@sim-%D-install-exec-local: installdirs
4834 @SIM_ENABLE_ARCH_erc32_TRUE@    $(AM_V_at)$(MKDIR_P) $(DESTDIR)$(bindir)
4835 @SIM_ENABLE_ARCH_erc32_TRUE@    n=`echo sis | sed '$(program_transform_name)'`; \
4836 @SIM_ENABLE_ARCH_erc32_TRUE@    $(LIBTOOL) --mode=install $(INSTALL_PROGRAM) erc32/run$(EXEEXT) $(DESTDIR)$(bindir)/$$n$(EXEEXT)
4837 @SIM_ENABLE_ARCH_erc32_TRUE@sim-erc32-uninstall-local:
4838 @SIM_ENABLE_ARCH_erc32_TRUE@    rm -f $(DESTDIR)$(bindir)/sis
4839 @SIM_ENABLE_ARCH_examples_TRUE@$(example_synacor_libsim_a_OBJECTS) $(example_synacor_libsim_a_LIBADD): example-synacor/hw-config.h
4840
4841 @SIM_ENABLE_ARCH_examples_TRUE@example-synacor/%.o: common/%.c ; $(SIM_COMPILE)
4842 @SIM_ENABLE_ARCH_examples_TRUE@-@am__include@ example-synacor/$(DEPDIR)/*.Po
4843 @SIM_ENABLE_ARCH_frv_TRUE@$(frv_libsim_a_OBJECTS) $(frv_libsim_a_LIBADD): frv/hw-config.h
4844
4845 @SIM_ENABLE_ARCH_frv_TRUE@frv/%.o: common/%.c ; $(SIM_COMPILE)
4846 @SIM_ENABLE_ARCH_frv_TRUE@-@am__include@ frv/$(DEPDIR)/*.Po
4847
4848 @SIM_ENABLE_ARCH_frv_TRUE@frv/modules.c: | $(frv_BUILD_OUTPUTS)
4849
4850 @SIM_ENABLE_ARCH_frv_TRUE@frv/mloop.c frv/eng.h: frv/stamp-mloop ; @true
4851 @SIM_ENABLE_ARCH_frv_TRUE@frv/stamp-mloop: $(srccom)/genmloop.sh frv/mloop.in
4852 @SIM_ENABLE_ARCH_frv_TRUE@      $(AM_V_GEN)$(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \
4853 @SIM_ENABLE_ARCH_frv_TRUE@              -mono -scache -parallel-generic-write -parallel-only \
4854 @SIM_ENABLE_ARCH_frv_TRUE@              -cpu frvbf \
4855 @SIM_ENABLE_ARCH_frv_TRUE@              -infile $(srcdir)/frv/mloop.in -outfile-prefix frv/
4856 @SIM_ENABLE_ARCH_frv_TRUE@      $(AM_V_at)$(SHELL) $(srcroot)/move-if-change frv/eng.hin frv/eng.h
4857 @SIM_ENABLE_ARCH_frv_TRUE@      $(AM_V_at)$(SHELL) $(srcroot)/move-if-change frv/mloop.cin frv/mloop.c
4858 @SIM_ENABLE_ARCH_frv_TRUE@      $(AM_V_at)touch $@
4859
4860 @SIM_ENABLE_ARCH_frv_TRUE@frv/cgen: frv/cgen-arch frv/cgen-cpu-decode
4861
4862 @SIM_ENABLE_ARCH_frv_TRUE@frv/cgen-arch:
4863 @SIM_ENABLE_ARCH_frv_TRUE@      $(AM_V_GEN)mach=all FLAGS="with-scache"; $(CGEN_GEN_ARCH)
4864 @SIM_ENABLE_ARCH_frv_TRUE@frv/arch.h frv/arch.c frv/cpuall.h: @CGEN_MAINT@ frv/cgen-arch
4865
4866 @SIM_ENABLE_ARCH_frv_TRUE@frv/cgen-cpu-decode:
4867 @SIM_ENABLE_ARCH_frv_TRUE@      $(AM_V_GEN)cpu=frvbf mach=frv,fr550,fr500,fr450,fr400,tomcat,simple FLAGS="with-scache with-profile=fn with-generic-write with-parallel-only" EXTRAFILES="$(CGEN_CPU_SEM)"; $(CGEN_GEN_CPU_DECODE)
4868 @SIM_ENABLE_ARCH_frv_TRUE@frv/cpu.h frv/sem.c frv/model.c frv/decode.c frv/decode.h: @CGEN_MAINT@ frv/cgen-cpu-decode
4869 @SIM_ENABLE_ARCH_ft32_TRUE@$(ft32_libsim_a_OBJECTS) $(ft32_libsim_a_LIBADD): ft32/hw-config.h
4870
4871 @SIM_ENABLE_ARCH_ft32_TRUE@ft32/%.o: common/%.c ; $(SIM_COMPILE)
4872 @SIM_ENABLE_ARCH_ft32_TRUE@-@am__include@ ft32/$(DEPDIR)/*.Po
4873 @SIM_ENABLE_ARCH_h8300_TRUE@$(h8300_libsim_a_OBJECTS) $(h8300_libsim_a_LIBADD): h8300/hw-config.h
4874
4875 @SIM_ENABLE_ARCH_h8300_TRUE@h8300/%.o: common/%.c ; $(SIM_COMPILE)
4876 @SIM_ENABLE_ARCH_h8300_TRUE@-@am__include@ h8300/$(DEPDIR)/*.Po
4877 @SIM_ENABLE_ARCH_iq2000_TRUE@$(iq2000_libsim_a_OBJECTS) $(iq2000_libsim_a_LIBADD): iq2000/hw-config.h
4878
4879 @SIM_ENABLE_ARCH_iq2000_TRUE@iq2000/%.o: common/%.c ; $(SIM_COMPILE)
4880 @SIM_ENABLE_ARCH_iq2000_TRUE@-@am__include@ iq2000/$(DEPDIR)/*.Po
4881
4882 @SIM_ENABLE_ARCH_iq2000_TRUE@iq2000/modules.c: | $(iq2000_BUILD_OUTPUTS)
4883
4884 @SIM_ENABLE_ARCH_iq2000_TRUE@iq2000/mloop.c iq2000/eng.h: iq2000/stamp-mloop ; @true
4885 @SIM_ENABLE_ARCH_iq2000_TRUE@iq2000/stamp-mloop: $(srccom)/genmloop.sh iq2000/mloop.in
4886 @SIM_ENABLE_ARCH_iq2000_TRUE@   $(AM_V_GEN)$(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \
4887 @SIM_ENABLE_ARCH_iq2000_TRUE@           -mono -fast -pbb -switch sem-switch.c \
4888 @SIM_ENABLE_ARCH_iq2000_TRUE@           -cpu iq2000bf \
4889 @SIM_ENABLE_ARCH_iq2000_TRUE@           -infile $(srcdir)/iq2000/mloop.in -outfile-prefix iq2000/
4890 @SIM_ENABLE_ARCH_iq2000_TRUE@   $(AM_V_at)$(SHELL) $(srcroot)/move-if-change iq2000/eng.hin iq2000/eng.h
4891 @SIM_ENABLE_ARCH_iq2000_TRUE@   $(AM_V_at)$(SHELL) $(srcroot)/move-if-change iq2000/mloop.cin iq2000/mloop.c
4892 @SIM_ENABLE_ARCH_iq2000_TRUE@   $(AM_V_at)touch $@
4893
4894 @SIM_ENABLE_ARCH_iq2000_TRUE@iq2000/cgen: iq2000/cgen-arch iq2000/cgen-cpu-decode
4895
4896 @SIM_ENABLE_ARCH_iq2000_TRUE@iq2000/cgen-arch:
4897 @SIM_ENABLE_ARCH_iq2000_TRUE@   $(AM_V_GEN)mach=iq2000 FLAGS="with-scache with-profile=fn"; $(CGEN_GEN_ARCH)
4898 @SIM_ENABLE_ARCH_iq2000_TRUE@iq2000/arch.h iq2000/arch.c iq2000/cpuall.h: @CGEN_MAINT@ iq2000/cgen-arch
4899
4900 @SIM_ENABLE_ARCH_iq2000_TRUE@iq2000/cgen-cpu-decode:
4901 @SIM_ENABLE_ARCH_iq2000_TRUE@   $(AM_V_GEN)cpu=iq2000bf mach=iq2000 FLAGS="with-scache with-profile=fn" EXTRAFILES="$(CGEN_CPU_SEM) $(CGEN_CPU_SEMSW)"; $(CGEN_GEN_CPU_DECODE)
4902 @SIM_ENABLE_ARCH_iq2000_TRUE@iq2000/cpu.h iq2000/sem.c iq2000/sem-switch.c iq2000/model.c iq2000/decode.c iq2000/decode.h: @CGEN_MAINT@ iq2000/cgen-cpu-decode
4903 @SIM_ENABLE_ARCH_lm32_TRUE@$(lm32_libsim_a_OBJECTS) $(lm32_libsim_a_LIBADD): lm32/hw-config.h
4904
4905 @SIM_ENABLE_ARCH_lm32_TRUE@lm32/%.o: common/%.c ; $(SIM_COMPILE)
4906 @SIM_ENABLE_ARCH_lm32_TRUE@-@am__include@ lm32/$(DEPDIR)/*.Po
4907
4908 @SIM_ENABLE_ARCH_lm32_TRUE@lm32/modules.c: | $(lm32_BUILD_OUTPUTS)
4909
4910 @SIM_ENABLE_ARCH_lm32_TRUE@lm32/mloop.c lm32/eng.h: lm32/stamp-mloop ; @true
4911 @SIM_ENABLE_ARCH_lm32_TRUE@lm32/stamp-mloop: $(srccom)/genmloop.sh lm32/mloop.in
4912 @SIM_ENABLE_ARCH_lm32_TRUE@     $(AM_V_GEN)$(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \
4913 @SIM_ENABLE_ARCH_lm32_TRUE@             -mono -fast -pbb -switch sem-switch.c \
4914 @SIM_ENABLE_ARCH_lm32_TRUE@             -cpu lm32bf \
4915 @SIM_ENABLE_ARCH_lm32_TRUE@             -infile $(srcdir)/lm32/mloop.in -outfile-prefix lm32/
4916 @SIM_ENABLE_ARCH_lm32_TRUE@     $(AM_V_at)$(SHELL) $(srcroot)/move-if-change lm32/eng.hin lm32/eng.h
4917 @SIM_ENABLE_ARCH_lm32_TRUE@     $(AM_V_at)$(SHELL) $(srcroot)/move-if-change lm32/mloop.cin lm32/mloop.c
4918 @SIM_ENABLE_ARCH_lm32_TRUE@     $(AM_V_at)touch $@
4919
4920 @SIM_ENABLE_ARCH_lm32_TRUE@lm32/cgen: lm32/cgen-arch lm32/cgen-cpu-decode
4921
4922 @SIM_ENABLE_ARCH_lm32_TRUE@lm32/cgen-arch:
4923 @SIM_ENABLE_ARCH_lm32_TRUE@     $(AM_V_GEN)mach=all FLAGS="with-scache with-profile=fn"; $(CGEN_GEN_ARCH)
4924 @SIM_ENABLE_ARCH_lm32_TRUE@lm32/arch.h lm32/arch.c lm32/cpuall.h: @CGEN_MAINT@ lm32/cgen-arch
4925
4926 @SIM_ENABLE_ARCH_lm32_TRUE@lm32/cgen-cpu-decode:
4927 @SIM_ENABLE_ARCH_lm32_TRUE@     $(AM_V_GEN)cpu=lm32bf mach=lm32 FLAGS="with-scache with-profile=fn" EXTRAFILES="$(CGEN_CPU_SEM) $(CGEN_CPU_SEMSW)"; $(CGEN_GEN_CPU_DECODE)
4928 @SIM_ENABLE_ARCH_lm32_TRUE@lm32/cpu.h lm32/sem.c lm32/sem-switch.c lm32/model.c lm32/decode.c lm32/decode.h: @CGEN_MAINT@ lm32/cgen-cpu-decode
4929 @SIM_ENABLE_ARCH_m32c_TRUE@$(m32c_libsim_a_OBJECTS) $(m32c_libsim_a_LIBADD): m32c/hw-config.h
4930
4931 @SIM_ENABLE_ARCH_m32c_TRUE@m32c/%.o: common/%.c ; $(SIM_COMPILE)
4932 @SIM_ENABLE_ARCH_m32c_TRUE@-@am__include@ m32c/$(DEPDIR)/*.Po
4933
4934 @SIM_ENABLE_ARCH_m32c_TRUE@m32c/modules.c: | $(m32c_BUILD_OUTPUTS)
4935
4936 # These rules are copied from automake, but tweaked to use FOR_BUILD variables.
4937 @SIM_ENABLE_ARCH_m32c_TRUE@m32c/opc2c$(EXEEXT): $(m32c_opc2c_OBJECTS) $(m32c_opc2c_DEPENDENCIES) m32c/$(am__dirstamp)
4938 @SIM_ENABLE_ARCH_m32c_TRUE@     $(AM_V_CCLD)$(LINK_FOR_BUILD) $(m32c_opc2c_OBJECTS) $(m32c_opc2c_LDADD)
4939
4940 # opc2c is a build-time only tool.  Override the default rules for it.
4941 @SIM_ENABLE_ARCH_m32c_TRUE@m32c/opc2c.o: m32c/opc2c.c
4942 @SIM_ENABLE_ARCH_m32c_TRUE@     $(AM_V_CC)$(COMPILE_FOR_BUILD) -c $< -o $@
4943
4944 @SIM_ENABLE_ARCH_m32c_TRUE@m32c/m32c.c: m32c/m32c.opc m32c/opc2c$(EXEEXT)
4945 @SIM_ENABLE_ARCH_m32c_TRUE@     $(AM_V_GEN)$(m32c_OPC2C_RUN) -l $@.log $< > $@.tmp
4946 @SIM_ENABLE_ARCH_m32c_TRUE@     $(AM_V_at)mv $@.tmp $@
4947
4948 @SIM_ENABLE_ARCH_m32c_TRUE@m32c/r8c.c: m32c/r8c.opc m32c/opc2c$(EXEEXT)
4949 @SIM_ENABLE_ARCH_m32c_TRUE@     $(AM_V_GEN)$(m32c_OPC2C_RUN) -l $@.log $< > $@.tmp
4950 @SIM_ENABLE_ARCH_m32c_TRUE@     $(AM_V_at)mv $@.tmp $@
4951 @SIM_ENABLE_ARCH_m32r_TRUE@$(m32r_libsim_a_OBJECTS) $(m32r_libsim_a_LIBADD): m32r/hw-config.h
4952
4953 @SIM_ENABLE_ARCH_m32r_TRUE@m32r/%.o: common/%.c ; $(SIM_COMPILE)
4954 @SIM_ENABLE_ARCH_m32r_TRUE@-@am__include@ m32r/$(DEPDIR)/*.Po
4955
4956 @SIM_ENABLE_ARCH_m32r_TRUE@m32r/modules.c: | $(m32r_BUILD_OUTPUTS)
4957
4958 @SIM_ENABLE_ARCH_m32r_TRUE@m32r/mloop.c m32r/eng.h: m32r/stamp-mloop ; @true
4959 @SIM_ENABLE_ARCH_m32r_TRUE@m32r/stamp-mloop: $(srccom)/genmloop.sh m32r/mloop.in
4960 @SIM_ENABLE_ARCH_m32r_TRUE@     $(AM_V_GEN)$(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \
4961 @SIM_ENABLE_ARCH_m32r_TRUE@             -mono -fast -pbb -switch sem-switch.c \
4962 @SIM_ENABLE_ARCH_m32r_TRUE@             -cpu m32rbf \
4963 @SIM_ENABLE_ARCH_m32r_TRUE@             -infile $(srcdir)/m32r/mloop.in -outfile-prefix m32r/
4964 @SIM_ENABLE_ARCH_m32r_TRUE@     $(AM_V_at)$(SHELL) $(srcroot)/move-if-change m32r/eng.hin m32r/eng.h
4965 @SIM_ENABLE_ARCH_m32r_TRUE@     $(AM_V_at)$(SHELL) $(srcroot)/move-if-change m32r/mloop.cin m32r/mloop.c
4966 @SIM_ENABLE_ARCH_m32r_TRUE@     $(AM_V_at)touch $@
4967
4968 @SIM_ENABLE_ARCH_m32r_TRUE@m32r/mloopx.c m32r/engx.h: m32r/stamp-mloop ; @true
4969 @SIM_ENABLE_ARCH_m32r_TRUE@m32r/stamp-mloop-x: $(srccom)/genmloop.sh m32r/mloop.in
4970 @SIM_ENABLE_ARCH_m32r_TRUE@     $(AM_V_GEN)$(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \
4971 @SIM_ENABLE_ARCH_m32r_TRUE@             -mono -no-fast -pbb -parallel-write -switch semx-switch.c \
4972 @SIM_ENABLE_ARCH_m32r_TRUE@             -cpu m32rxf \
4973 @SIM_ENABLE_ARCH_m32r_TRUE@             -infile $(srcdir)/m32r/mloopx.in -outfile-prefix m32r/ -outfile-suffix x
4974 @SIM_ENABLE_ARCH_m32r_TRUE@     $(AM_V_at)$(SHELL) $(srcroot)/move-if-change m32r/engx.hin m32r/engx.h
4975 @SIM_ENABLE_ARCH_m32r_TRUE@     $(AM_V_at)$(SHELL) $(srcroot)/move-if-change m32r/mloopx.cin m32r/mloopx.c
4976 @SIM_ENABLE_ARCH_m32r_TRUE@     $(AM_V_at)touch $@
4977
4978 @SIM_ENABLE_ARCH_m32r_TRUE@m32r/mloop2.c m32r/eng2.h: m32r/stamp-mloop ; @true
4979 @SIM_ENABLE_ARCH_m32r_TRUE@m32r/stamp-mloop-2: $(srccom)/genmloop.sh m32r/mloop.in
4980 @SIM_ENABLE_ARCH_m32r_TRUE@     $(AM_V_GEN)$(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \
4981 @SIM_ENABLE_ARCH_m32r_TRUE@             -mono -no-fast -pbb -parallel-write -switch sem2-switch.c \
4982 @SIM_ENABLE_ARCH_m32r_TRUE@             -cpu m32r2f \
4983 @SIM_ENABLE_ARCH_m32r_TRUE@             -infile $(srcdir)/m32r/mloop2.in -outfile-prefix m32r/ -outfile-suffix 2
4984 @SIM_ENABLE_ARCH_m32r_TRUE@     $(AM_V_at)$(SHELL) $(srcroot)/move-if-change m32r/eng2.hin m32r/eng2.h
4985 @SIM_ENABLE_ARCH_m32r_TRUE@     $(AM_V_at)$(SHELL) $(srcroot)/move-if-change m32r/mloop2.cin m32r/mloop2.c
4986 @SIM_ENABLE_ARCH_m32r_TRUE@     $(AM_V_at)touch $@
4987
4988 @SIM_ENABLE_ARCH_m32r_TRUE@m32r/cgen: m32r/cgen-arch m32r/cgen-cpu-decode m32r/cgen-cpu-decode-x m32r/cgen-cpu-decode-2
4989
4990 @SIM_ENABLE_ARCH_m32r_TRUE@m32r/cgen-arch:
4991 @SIM_ENABLE_ARCH_m32r_TRUE@     $(AM_V_GEN)mach=all FLAGS="with-scache with-profile=fn"; $(CGEN_GEN_ARCH)
4992 @SIM_ENABLE_ARCH_m32r_TRUE@m32r/arch.h m32r/arch.c m32r/cpuall.h: @CGEN_MAINT@ m32r/cgen-arch
4993
4994 @SIM_ENABLE_ARCH_m32r_TRUE@m32r/cgen-cpu-decode:
4995 @SIM_ENABLE_ARCH_m32r_TRUE@     $(AM_V_GEN)cpu=m32rbf mach=m32r FLAGS="with-scache with-profile=fn" EXTRAFILES="$(CGEN_CPU_SEM) $(CGEN_CPU_SEMSW)"; $(CGEN_GEN_CPU_DECODE)
4996 @SIM_ENABLE_ARCH_m32r_TRUE@m32r/cpu.h m32r/sem.c m32r/sem-switch.c m32r/model.c m32r/decode.c m32r/decode.h: @CGEN_MAINT@ m32r/cgen-cpu-decode
4997
4998 @SIM_ENABLE_ARCH_m32r_TRUE@m32r/cgen-cpu-decode-x:
4999 @SIM_ENABLE_ARCH_m32r_TRUE@     $(AM_V_GEN)cpu=m32rxf mach=m32rx SUFFIX=x FLAGS="with-scache with-profile=fn" EXTRAFILES="$(CGEN_CPU_SEMSW)"; $(CGEN_GEN_CPU_DECODE)
5000 @SIM_ENABLE_ARCH_m32r_TRUE@m32r/cpux.h m32r/semx-switch.c m32r/modelx.c m32r/decodex.c m32r/decodex.h: @CGEN_MAINT@ m32r/cgen-cpu-decode-x
5001
5002 @SIM_ENABLE_ARCH_m32r_TRUE@m32r/cgen-cpu-decode-2:
5003 @SIM_ENABLE_ARCH_m32r_TRUE@     $(AM_V_GEN)cpu=m32r2f mach=m32r2 SUFFIX=2 FLAGS="with-scache with-profile=fn" EXTRAFILES="$(CGEN_CPU_SEMSW)"; $(CGEN_GEN_CPU_DECODE)
5004 @SIM_ENABLE_ARCH_m32r_TRUE@m32r/cpu2.h m32r/sem2-switch.c m32r/model2.c m32r/decode2.c m32r/decode2.h: @CGEN_MAINT@ m32r/cgen-cpu-decode-2
5005 @SIM_ENABLE_ARCH_m68hc11_TRUE@$(m68hc11_libsim_a_OBJECTS) $(m68hc11_libsim_a_LIBADD): m68hc11/hw-config.h
5006
5007 @SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11/%.o: common/%.c ; $(SIM_COMPILE)
5008 @SIM_ENABLE_ARCH_m68hc11_TRUE@-@am__include@ m68hc11/$(DEPDIR)/*.Po
5009
5010 @SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11/modules.c: | $(m68hc11_BUILD_OUTPUTS)
5011
5012 # These rules are copied from automake, but tweaked to use FOR_BUILD variables.
5013 @SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11/gencode$(EXEEXT): $(m68hc11_gencode_OBJECTS) $(m68hc11_gencode_DEPENDENCIES) m68hc11/$(am__dirstamp)
5014 @SIM_ENABLE_ARCH_m68hc11_TRUE@  $(AM_V_CCLD)$(LINK_FOR_BUILD) $(m68hc11_gencode_OBJECTS) $(m68hc11_gencode_LDADD)
5015
5016 # gencode is a build-time only tool.  Override the default rules for it.
5017 @SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11/gencode.o: m68hc11/gencode.c
5018 @SIM_ENABLE_ARCH_m68hc11_TRUE@  $(AM_V_CC)$(COMPILE_FOR_BUILD) -c $< -o $@
5019
5020 @SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11/m68hc11int.c: m68hc11/gencode$(EXEEXT)
5021 @SIM_ENABLE_ARCH_m68hc11_TRUE@  $(AM_V_GEN)$< -m6811 >$@
5022
5023 @SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11/m68hc12int.c: m68hc11/gencode$(EXEEXT)
5024 @SIM_ENABLE_ARCH_m68hc11_TRUE@  $(AM_V_GEN)$< -m6812 >$@
5025 @SIM_ENABLE_ARCH_mcore_TRUE@$(mcore_libsim_a_OBJECTS) $(mcore_libsim_a_LIBADD): mcore/hw-config.h
5026
5027 @SIM_ENABLE_ARCH_mcore_TRUE@mcore/%.o: common/%.c ; $(SIM_COMPILE)
5028 @SIM_ENABLE_ARCH_mcore_TRUE@-@am__include@ mcore/$(DEPDIR)/*.Po
5029 @SIM_ENABLE_ARCH_microblaze_TRUE@$(microblaze_libsim_a_OBJECTS) $(microblaze_libsim_a_LIBADD): microblaze/hw-config.h
5030
5031 @SIM_ENABLE_ARCH_microblaze_TRUE@microblaze/%.o: common/%.c ; $(SIM_COMPILE)
5032 @SIM_ENABLE_ARCH_microblaze_TRUE@-@am__include@ microblaze/$(DEPDIR)/*.Po
5033 @SIM_ENABLE_ARCH_mips_TRUE@$(mips_libsim_a_OBJECTS) $(mips_libsim_a_LIBADD): mips/hw-config.h
5034
5035 @SIM_ENABLE_ARCH_mips_TRUE@mips/%.o: common/%.c ; $(SIM_COMPILE)
5036 @SIM_ENABLE_ARCH_mips_TRUE@-@am__include@ mips/$(DEPDIR)/*.Po
5037
5038 @SIM_ENABLE_ARCH_mips_TRUE@mips/modules.c: | $(mips_BUILD_OUTPUTS)
5039
5040 @SIM_ENABLE_ARCH_mips_TRUE@$(mips_BUILT_SRC_FROM_IGEN_ITABLE): mips/stamp-igen-itable
5041 @SIM_ENABLE_ARCH_mips_TRUE@$(mips_BUILT_SRC_FROM_GEN_MODE_SINGLE): mips/stamp-gen-mode-single
5042 @SIM_ENABLE_ARCH_mips_TRUE@$(mips_BUILT_SRC_FROM_GEN_MODE_M16_M16): mips/stamp-gen-mode-m16-m16
5043 @SIM_ENABLE_ARCH_mips_TRUE@$(mips_BUILT_SRC_FROM_GEN_MODE_M16_M32): mips/stamp-gen-mode-m16-m32
5044 @SIM_ENABLE_ARCH_mips_TRUE@$(SIM_MIPS_MULTI_SRC): mips/stamp-gen-mode-multi-igen mips/stamp-gen-mode-multi-run
5045
5046 @SIM_ENABLE_ARCH_mips_TRUE@mips/stamp-igen-itable: $(mips_IGEN_INSN) $(mips_IGEN_INSN_INC) $(IGEN)
5047 @SIM_ENABLE_ARCH_mips_TRUE@     $(AM_V_GEN)$(IGEN_RUN) \
5048 @SIM_ENABLE_ARCH_mips_TRUE@             $(mips_IGEN_TRACE) \
5049 @SIM_ENABLE_ARCH_mips_TRUE@             -I $(srcdir)/mips \
5050 @SIM_ENABLE_ARCH_mips_TRUE@             -Werror \
5051 @SIM_ENABLE_ARCH_mips_TRUE@             -Wnodiscard \
5052 @SIM_ENABLE_ARCH_mips_TRUE@             -Wnowidth \
5053 @SIM_ENABLE_ARCH_mips_TRUE@             -Wnounimplemented \
5054 @SIM_ENABLE_ARCH_mips_TRUE@             $(SIM_MIPS_IGEN_ITABLE_FLAGS) \
5055 @SIM_ENABLE_ARCH_mips_TRUE@             -G gen-direct-access \
5056 @SIM_ENABLE_ARCH_mips_TRUE@             -G gen-zero-r0 \
5057 @SIM_ENABLE_ARCH_mips_TRUE@             -i $(mips_IGEN_INSN) \
5058 @SIM_ENABLE_ARCH_mips_TRUE@             -n itable.h    -ht mips/itable.h \
5059 @SIM_ENABLE_ARCH_mips_TRUE@             -n itable.c    -t  mips/itable.c
5060 @SIM_ENABLE_ARCH_mips_TRUE@     $(AM_V_at)touch $@
5061
5062 @SIM_ENABLE_ARCH_mips_TRUE@mips/stamp-gen-mode-single: $(mips_IGEN_INSN) $(mips_IGEN_INSN_INC) $(mips_IGEN_DC) $(IGEN)
5063 @SIM_ENABLE_ARCH_mips_TRUE@     $(AM_V_GEN)$(IGEN_RUN) \
5064 @SIM_ENABLE_ARCH_mips_TRUE@             $(mips_IGEN_TRACE) \
5065 @SIM_ENABLE_ARCH_mips_TRUE@             -I $(srcdir)/mips \
5066 @SIM_ENABLE_ARCH_mips_TRUE@             -Werror \
5067 @SIM_ENABLE_ARCH_mips_TRUE@             -Wnodiscard \
5068 @SIM_ENABLE_ARCH_mips_TRUE@             $(SIM_MIPS_SINGLE_FLAGS) \
5069 @SIM_ENABLE_ARCH_mips_TRUE@             -G gen-direct-access \
5070 @SIM_ENABLE_ARCH_mips_TRUE@             -G gen-zero-r0 \
5071 @SIM_ENABLE_ARCH_mips_TRUE@             -B 32 \
5072 @SIM_ENABLE_ARCH_mips_TRUE@             -H 31 \
5073 @SIM_ENABLE_ARCH_mips_TRUE@             -i $(mips_IGEN_INSN) \
5074 @SIM_ENABLE_ARCH_mips_TRUE@             -o $(mips_IGEN_DC) \
5075 @SIM_ENABLE_ARCH_mips_TRUE@             -x \
5076 @SIM_ENABLE_ARCH_mips_TRUE@             -n icache.h    -hc mips/icache.h \
5077 @SIM_ENABLE_ARCH_mips_TRUE@             -n icache.c    -c  mips/icache.c \
5078 @SIM_ENABLE_ARCH_mips_TRUE@             -n semantics.h -hs mips/semantics.h \
5079 @SIM_ENABLE_ARCH_mips_TRUE@             -n semantics.c -s  mips/semantics.c \
5080 @SIM_ENABLE_ARCH_mips_TRUE@             -n idecode.h   -hd mips/idecode.h \
5081 @SIM_ENABLE_ARCH_mips_TRUE@             -n idecode.c   -d  mips/idecode.c \
5082 @SIM_ENABLE_ARCH_mips_TRUE@             -n model.h     -hm mips/model.h \
5083 @SIM_ENABLE_ARCH_mips_TRUE@             -n model.c     -m  mips/model.c \
5084 @SIM_ENABLE_ARCH_mips_TRUE@             -n support.h   -hf mips/support.h \
5085 @SIM_ENABLE_ARCH_mips_TRUE@             -n support.c   -f  mips/support.c \
5086 @SIM_ENABLE_ARCH_mips_TRUE@             -n engine.h    -he mips/engine.h \
5087 @SIM_ENABLE_ARCH_mips_TRUE@             -n engine.c    -e  mips/engine.c \
5088 @SIM_ENABLE_ARCH_mips_TRUE@             -n irun.c      -r  mips/irun.c
5089 @SIM_ENABLE_ARCH_mips_TRUE@     $(AM_V_at)touch $@
5090
5091 @SIM_ENABLE_ARCH_mips_TRUE@mips/stamp-gen-mode-m16-m16: $(mips_IGEN_INSN) $(mips_IGEN_INSN_INC) $(mips_M16_DC) $(IGEN)
5092 @SIM_ENABLE_ARCH_mips_TRUE@     $(AM_V_GEN)$(IGEN_RUN) \
5093 @SIM_ENABLE_ARCH_mips_TRUE@             $(mips_IGEN_TRACE) \
5094 @SIM_ENABLE_ARCH_mips_TRUE@             -I $(srcdir)/mips \
5095 @SIM_ENABLE_ARCH_mips_TRUE@             -Werror \
5096 @SIM_ENABLE_ARCH_mips_TRUE@             -Wnodiscard \
5097 @SIM_ENABLE_ARCH_mips_TRUE@             $(SIM_MIPS_M16_FLAGS) \
5098 @SIM_ENABLE_ARCH_mips_TRUE@             -G gen-direct-access \
5099 @SIM_ENABLE_ARCH_mips_TRUE@             -G gen-zero-r0 \
5100 @SIM_ENABLE_ARCH_mips_TRUE@             -B 16 \
5101 @SIM_ENABLE_ARCH_mips_TRUE@             -H 15 \
5102 @SIM_ENABLE_ARCH_mips_TRUE@             -i $(mips_IGEN_INSN) \
5103 @SIM_ENABLE_ARCH_mips_TRUE@             -o $(mips_M16_DC) \
5104 @SIM_ENABLE_ARCH_mips_TRUE@             -P m16_ \
5105 @SIM_ENABLE_ARCH_mips_TRUE@             -x \
5106 @SIM_ENABLE_ARCH_mips_TRUE@             -n m16_icache.h    -hc mips/m16_icache.h \
5107 @SIM_ENABLE_ARCH_mips_TRUE@             -n m16_icache.c    -c  mips/m16_icache.c \
5108 @SIM_ENABLE_ARCH_mips_TRUE@             -n m16_semantics.h -hs mips/m16_semantics.h \
5109 @SIM_ENABLE_ARCH_mips_TRUE@             -n m16_semantics.c -s  mips/m16_semantics.c \
5110 @SIM_ENABLE_ARCH_mips_TRUE@             -n m16_idecode.h   -hd mips/m16_idecode.h \
5111 @SIM_ENABLE_ARCH_mips_TRUE@             -n m16_idecode.c   -d  mips/m16_idecode.c \
5112 @SIM_ENABLE_ARCH_mips_TRUE@             -n m16_model.h     -hm mips/m16_model.h \
5113 @SIM_ENABLE_ARCH_mips_TRUE@             -n m16_model.c     -m  mips/m16_model.c \
5114 @SIM_ENABLE_ARCH_mips_TRUE@             -n m16_support.h   -hf mips/m16_support.h \
5115 @SIM_ENABLE_ARCH_mips_TRUE@             -n m16_support.c   -f  mips/m16_support.c
5116 @SIM_ENABLE_ARCH_mips_TRUE@     $(AM_V_at)touch $@
5117
5118 @SIM_ENABLE_ARCH_mips_TRUE@mips/stamp-gen-mode-m16-m32: $(mips_IGEN_INSN) $(mips_IGEN_INSN_INC) $(mips_IGEN_DC) $(IGEN)
5119 @SIM_ENABLE_ARCH_mips_TRUE@     $(AM_V_GEN)$(IGEN_RUN) \
5120 @SIM_ENABLE_ARCH_mips_TRUE@             $(mips_IGEN_TRACE) \
5121 @SIM_ENABLE_ARCH_mips_TRUE@             -I $(srcdir)/mips \
5122 @SIM_ENABLE_ARCH_mips_TRUE@             -Werror \
5123 @SIM_ENABLE_ARCH_mips_TRUE@             -Wnodiscard \
5124 @SIM_ENABLE_ARCH_mips_TRUE@             $(SIM_MIPS_SINGLE_FLAGS) \
5125 @SIM_ENABLE_ARCH_mips_TRUE@             -G gen-direct-access \
5126 @SIM_ENABLE_ARCH_mips_TRUE@             -G gen-zero-r0 \
5127 @SIM_ENABLE_ARCH_mips_TRUE@             -B 32 \
5128 @SIM_ENABLE_ARCH_mips_TRUE@             -H 31 \
5129 @SIM_ENABLE_ARCH_mips_TRUE@             -i $(mips_IGEN_INSN) \
5130 @SIM_ENABLE_ARCH_mips_TRUE@             -o $(mips_IGEN_DC) \
5131 @SIM_ENABLE_ARCH_mips_TRUE@             -P m32_ \
5132 @SIM_ENABLE_ARCH_mips_TRUE@             -x \
5133 @SIM_ENABLE_ARCH_mips_TRUE@             -n m32_icache.h    -hc mips/m32_icache.h \
5134 @SIM_ENABLE_ARCH_mips_TRUE@             -n m32_icache.c    -c  mips/m32_icache.c \
5135 @SIM_ENABLE_ARCH_mips_TRUE@             -n m32_semantics.h -hs mips/m32_semantics.h \
5136 @SIM_ENABLE_ARCH_mips_TRUE@             -n m32_semantics.c -s  mips/m32_semantics.c \
5137 @SIM_ENABLE_ARCH_mips_TRUE@             -n m32_idecode.h   -hd mips/m32_idecode.h \
5138 @SIM_ENABLE_ARCH_mips_TRUE@             -n m32_idecode.c   -d  mips/m32_idecode.c \
5139 @SIM_ENABLE_ARCH_mips_TRUE@             -n m32_model.h     -hm mips/m32_model.h \
5140 @SIM_ENABLE_ARCH_mips_TRUE@             -n m32_model.c     -m  mips/m32_model.c \
5141 @SIM_ENABLE_ARCH_mips_TRUE@             -n m32_support.h   -hf mips/m32_support.h \
5142 @SIM_ENABLE_ARCH_mips_TRUE@             -n m32_support.c   -f  mips/m32_support.c
5143 @SIM_ENABLE_ARCH_mips_TRUE@     $(AM_V_at)touch $@
5144
5145 @SIM_ENABLE_ARCH_mips_TRUE@mips/stamp-gen-mode-multi-igen: $(mips_IGEN_INSN) $(mips_IGEN_INSN_INC) $(mips_IGEN_DC) $(mips_M16_DC) $(mips_MICROMIPS32_DC) $(mips_MICROMIPS16_DC) $(IGEN)
5146 @SIM_ENABLE_ARCH_mips_TRUE@     $(AM_V_GEN)\
5147 @SIM_ENABLE_ARCH_mips_TRUE@     for t in $(SIM_MIPS_MULTI_IGEN_CONFIGS); do \
5148 @SIM_ENABLE_ARCH_mips_TRUE@       p=`echo $${t} | sed -e 's/:.*//'` ; \
5149 @SIM_ENABLE_ARCH_mips_TRUE@       m=`echo $${t} | sed -e 's/.*:\(.*\):.*/\1/'` ; \
5150 @SIM_ENABLE_ARCH_mips_TRUE@       f=`echo $${t} | sed -e 's/.*://'` ; \
5151 @SIM_ENABLE_ARCH_mips_TRUE@       case $${p} in \
5152 @SIM_ENABLE_ARCH_mips_TRUE@         micromips16*) \
5153 @SIM_ENABLE_ARCH_mips_TRUE@           e="-B 16 -H 15 -o $(mips_MICROMIPS16_DC) -F 16" ;; \
5154 @SIM_ENABLE_ARCH_mips_TRUE@         micromips32* | micromips64*) \
5155 @SIM_ENABLE_ARCH_mips_TRUE@           e="-B 32 -H 31 -o $(mips_MICROMIPS32_DC) -F $${f}" ;; \
5156 @SIM_ENABLE_ARCH_mips_TRUE@         micromips_m32*) \
5157 @SIM_ENABLE_ARCH_mips_TRUE@           e="-B 32 -H 31 -o $(mips_IGEN_DC) -F $${f}"; \
5158 @SIM_ENABLE_ARCH_mips_TRUE@           m="mips32r2,mips3d,mdmx,dsp,dsp2,smartmips" ;; \
5159 @SIM_ENABLE_ARCH_mips_TRUE@         micromips_m64*) \
5160 @SIM_ENABLE_ARCH_mips_TRUE@           e="-B 32 -H 31 -o $(mips_IGEN_DC) -F $${f}"; \
5161 @SIM_ENABLE_ARCH_mips_TRUE@           m="mips64r2,mips3d,mdmx,dsp,dsp2,smartmips" ;; \
5162 @SIM_ENABLE_ARCH_mips_TRUE@         m16*) \
5163 @SIM_ENABLE_ARCH_mips_TRUE@           e="-B 16 -H 15 -o $(mips_M16_DC) -F 16" ;; \
5164 @SIM_ENABLE_ARCH_mips_TRUE@         *) \
5165 @SIM_ENABLE_ARCH_mips_TRUE@           e="-B 32 -H 31 -o $(mips_IGEN_DC) -F $${f}" ;; \
5166 @SIM_ENABLE_ARCH_mips_TRUE@       esac; \
5167 @SIM_ENABLE_ARCH_mips_TRUE@       $(IGEN_RUN) \
5168 @SIM_ENABLE_ARCH_mips_TRUE@             $(mips_IGEN_TRACE) \
5169 @SIM_ENABLE_ARCH_mips_TRUE@             $${e} \
5170 @SIM_ENABLE_ARCH_mips_TRUE@             -I $(srcdir)/mips \
5171 @SIM_ENABLE_ARCH_mips_TRUE@             -Werror \
5172 @SIM_ENABLE_ARCH_mips_TRUE@             -Wnodiscard \
5173 @SIM_ENABLE_ARCH_mips_TRUE@             -M $${m} \
5174 @SIM_ENABLE_ARCH_mips_TRUE@             -G gen-direct-access \
5175 @SIM_ENABLE_ARCH_mips_TRUE@             -G gen-zero-r0 \
5176 @SIM_ENABLE_ARCH_mips_TRUE@             -i $(mips_IGEN_INSN) \
5177 @SIM_ENABLE_ARCH_mips_TRUE@             -P $${p}_ \
5178 @SIM_ENABLE_ARCH_mips_TRUE@             -x \
5179 @SIM_ENABLE_ARCH_mips_TRUE@             -n $${p}_icache.h    -hc mips/$${p}_icache.h \
5180 @SIM_ENABLE_ARCH_mips_TRUE@             -n $${p}_icache.c    -c  mips/$${p}_icache.c \
5181 @SIM_ENABLE_ARCH_mips_TRUE@             -n $${p}_semantics.h -hs mips/$${p}_semantics.h \
5182 @SIM_ENABLE_ARCH_mips_TRUE@             -n $${p}_semantics.c -s  mips/$${p}_semantics.c \
5183 @SIM_ENABLE_ARCH_mips_TRUE@             -n $${p}_idecode.h   -hd mips/$${p}_idecode.h \
5184 @SIM_ENABLE_ARCH_mips_TRUE@             -n $${p}_idecode.c   -d  mips/$${p}_idecode.c \
5185 @SIM_ENABLE_ARCH_mips_TRUE@             -n $${p}_model.h     -hm mips/$${p}_model.h \
5186 @SIM_ENABLE_ARCH_mips_TRUE@             -n $${p}_model.c     -m  mips/$${p}_model.c \
5187 @SIM_ENABLE_ARCH_mips_TRUE@             -n $${p}_support.h   -hf mips/$${p}_support.h \
5188 @SIM_ENABLE_ARCH_mips_TRUE@             -n $${p}_support.c   -f  mips/$${p}_support.c \
5189 @SIM_ENABLE_ARCH_mips_TRUE@             -n $${p}_engine.h    -he mips/$${p}_engine.h \
5190 @SIM_ENABLE_ARCH_mips_TRUE@             -n $${p}_engine.c    -e  mips/$${p}_engine.c \
5191 @SIM_ENABLE_ARCH_mips_TRUE@         || exit; \
5192 @SIM_ENABLE_ARCH_mips_TRUE@     done
5193 @SIM_ENABLE_ARCH_mips_TRUE@     $(AM_V_at)touch $@
5194
5195 @SIM_ENABLE_ARCH_mips_TRUE@mips/stamp-gen-mode-multi-run: mips/m16run.c mips/micromipsrun.c
5196 @SIM_ENABLE_ARCH_mips_TRUE@     $(AM_V_GEN)\
5197 @SIM_ENABLE_ARCH_mips_TRUE@     for t in $(SIM_MIPS_MULTI_IGEN_CONFIGS); do \
5198 @SIM_ENABLE_ARCH_mips_TRUE@       case $${t} in \
5199 @SIM_ENABLE_ARCH_mips_TRUE@         m16*) \
5200 @SIM_ENABLE_ARCH_mips_TRUE@           m=`echo $${t} | sed -e 's/^m16//' -e 's/:.*//'`; \
5201 @SIM_ENABLE_ARCH_mips_TRUE@           o=mips/m16$${m}_run.c; \
5202 @SIM_ENABLE_ARCH_mips_TRUE@           sed < $(srcdir)/mips/m16run.c > $$o.tmp \
5203 @SIM_ENABLE_ARCH_mips_TRUE@                 -e "s/^sim_/m16$${m}_/" \
5204 @SIM_ENABLE_ARCH_mips_TRUE@                 -e "/include/s/sim-engine/m16$${m}_engine/" \
5205 @SIM_ENABLE_ARCH_mips_TRUE@                 -e "s/m16_/m16$${m}_/" \
5206 @SIM_ENABLE_ARCH_mips_TRUE@                 -e "s/m32_/m32$${m}_/" \
5207 @SIM_ENABLE_ARCH_mips_TRUE@                 || exit 1; \
5208 @SIM_ENABLE_ARCH_mips_TRUE@           $(SHELL) $(srcroot)/move-if-change $$o.tmp $$o; \
5209 @SIM_ENABLE_ARCH_mips_TRUE@           ;;\
5210 @SIM_ENABLE_ARCH_mips_TRUE@         micromips32*) \
5211 @SIM_ENABLE_ARCH_mips_TRUE@           m=`echo $${t} | sed -e 's/^micromips32//' -e 's/:.*//'`; \
5212 @SIM_ENABLE_ARCH_mips_TRUE@           o=mips/micromips$${m}_run.c; \
5213 @SIM_ENABLE_ARCH_mips_TRUE@           sed < $(srcdir)/mips/micromipsrun.c > $$o.tmp \
5214 @SIM_ENABLE_ARCH_mips_TRUE@                 -e "s/^sim_/micromips32$${m}_/" \
5215 @SIM_ENABLE_ARCH_mips_TRUE@                 -e "/include/s/sim-engine/micromips32$${m}_engine/" \
5216 @SIM_ENABLE_ARCH_mips_TRUE@                 -e "s/micromips16_/micromips16$${m}_/" \
5217 @SIM_ENABLE_ARCH_mips_TRUE@                 -e "s/micromips32_/micromips32$${m}_/" \
5218 @SIM_ENABLE_ARCH_mips_TRUE@                 -e "s/m32_/m32$${m}_/" \
5219 @SIM_ENABLE_ARCH_mips_TRUE@                 || exit 1; \
5220 @SIM_ENABLE_ARCH_mips_TRUE@           $(SHELL) $(srcroot)/move-if-change $$o.tmp $$o; \
5221 @SIM_ENABLE_ARCH_mips_TRUE@           ;;\
5222 @SIM_ENABLE_ARCH_mips_TRUE@         micromips64*) \
5223 @SIM_ENABLE_ARCH_mips_TRUE@           m=`echo $${t} | sed -e 's/^micromips64//' -e 's/:.*//'`; \
5224 @SIM_ENABLE_ARCH_mips_TRUE@           o=mips/micromips$${m}_run.c; \
5225 @SIM_ENABLE_ARCH_mips_TRUE@           sed < $(srcdir)/mips/micromipsrun.c > $$o.tmp \
5226 @SIM_ENABLE_ARCH_mips_TRUE@                 -e "s/^sim_/micromips64$${m}_/" \
5227 @SIM_ENABLE_ARCH_mips_TRUE@                 -e "/include/s/sim-engine/micromips64$${m}_engine/" \
5228 @SIM_ENABLE_ARCH_mips_TRUE@                 -e "s/micromips16_/micromips16$${m}_/" \
5229 @SIM_ENABLE_ARCH_mips_TRUE@                 -e "s/micromips32_/micromips64$${m}_/" \
5230 @SIM_ENABLE_ARCH_mips_TRUE@                 -e "s/m32_/m64$${m}_/" \
5231 @SIM_ENABLE_ARCH_mips_TRUE@                 || exit 1; \
5232 @SIM_ENABLE_ARCH_mips_TRUE@           $(SHELL) $(srcroot)/move-if-change $$o.tmp $$o; \
5233 @SIM_ENABLE_ARCH_mips_TRUE@           ;;\
5234 @SIM_ENABLE_ARCH_mips_TRUE@       esac \
5235 @SIM_ENABLE_ARCH_mips_TRUE@     done
5236 @SIM_ENABLE_ARCH_mips_TRUE@     $(AM_V_at)touch $@
5237 @SIM_ENABLE_ARCH_mn10300_TRUE@$(mn10300_libsim_a_OBJECTS) $(mn10300_libsim_a_LIBADD): mn10300/hw-config.h
5238
5239 @SIM_ENABLE_ARCH_mn10300_TRUE@mn10300/%.o: common/%.c ; $(SIM_COMPILE)
5240 @SIM_ENABLE_ARCH_mn10300_TRUE@-@am__include@ mn10300/$(DEPDIR)/*.Po
5241
5242 @SIM_ENABLE_ARCH_mn10300_TRUE@mn10300/modules.c: | $(mn10300_BUILD_OUTPUTS)
5243
5244 @SIM_ENABLE_ARCH_mn10300_TRUE@$(mn10300_BUILT_SRC_FROM_IGEN): mn10300/stamp-igen
5245 @SIM_ENABLE_ARCH_mn10300_TRUE@mn10300/stamp-igen: $(mn10300_IGEN_INSN) $(mn10300_IGEN_INSN_INC) $(mn10300_IGEN_DC) $(IGEN)
5246 @SIM_ENABLE_ARCH_mn10300_TRUE@  $(AM_V_GEN)$(IGEN_RUN) \
5247 @SIM_ENABLE_ARCH_mn10300_TRUE@          $(mn10300_IGEN_TRACE) \
5248 @SIM_ENABLE_ARCH_mn10300_TRUE@          -G gen-direct-access \
5249 @SIM_ENABLE_ARCH_mn10300_TRUE@          -M mn10300,am33 -G gen-multi-sim=am33 \
5250 @SIM_ENABLE_ARCH_mn10300_TRUE@          -M am33_2 \
5251 @SIM_ENABLE_ARCH_mn10300_TRUE@          -I $(srcdir)/mn10300 \
5252 @SIM_ENABLE_ARCH_mn10300_TRUE@          -i $(mn10300_IGEN_INSN) \
5253 @SIM_ENABLE_ARCH_mn10300_TRUE@          -o $(mn10300_IGEN_DC) \
5254 @SIM_ENABLE_ARCH_mn10300_TRUE@          -x \
5255 @SIM_ENABLE_ARCH_mn10300_TRUE@          -n icache.h    -hc mn10300/icache.h \
5256 @SIM_ENABLE_ARCH_mn10300_TRUE@          -n icache.c    -c  mn10300/icache.c \
5257 @SIM_ENABLE_ARCH_mn10300_TRUE@          -n semantics.h -hs mn10300/semantics.h \
5258 @SIM_ENABLE_ARCH_mn10300_TRUE@          -n semantics.c -s  mn10300/semantics.c \
5259 @SIM_ENABLE_ARCH_mn10300_TRUE@          -n idecode.h   -hd mn10300/idecode.h \
5260 @SIM_ENABLE_ARCH_mn10300_TRUE@          -n idecode.c   -d  mn10300/idecode.c \
5261 @SIM_ENABLE_ARCH_mn10300_TRUE@          -n model.h     -hm mn10300/model.h \
5262 @SIM_ENABLE_ARCH_mn10300_TRUE@          -n model.c     -m  mn10300/model.c \
5263 @SIM_ENABLE_ARCH_mn10300_TRUE@          -n support.h   -hf mn10300/support.h \
5264 @SIM_ENABLE_ARCH_mn10300_TRUE@          -n support.c   -f  mn10300/support.c \
5265 @SIM_ENABLE_ARCH_mn10300_TRUE@          -n itable.h    -ht mn10300/itable.h \
5266 @SIM_ENABLE_ARCH_mn10300_TRUE@          -n itable.c    -t  mn10300/itable.c \
5267 @SIM_ENABLE_ARCH_mn10300_TRUE@          -n engine.h    -he mn10300/engine.h \
5268 @SIM_ENABLE_ARCH_mn10300_TRUE@          -n engine.c    -e  mn10300/engine.c \
5269 @SIM_ENABLE_ARCH_mn10300_TRUE@          -n irun.c      -r  mn10300/irun.c
5270 @SIM_ENABLE_ARCH_mn10300_TRUE@  $(AM_V_at)touch $@
5271 @SIM_ENABLE_ARCH_moxie_TRUE@$(moxie_libsim_a_OBJECTS) $(moxie_libsim_a_LIBADD): moxie/hw-config.h
5272
5273 @SIM_ENABLE_ARCH_moxie_TRUE@moxie/%.o: common/%.c ; $(SIM_COMPILE)
5274 @SIM_ENABLE_ARCH_moxie_TRUE@-@am__include@ moxie/$(DEPDIR)/*.Po
5275
5276 @SIM_ENABLE_ARCH_moxie_TRUE@moxie/moxie-gdb.dtb: @MAINT@ moxie/moxie-gdb.dts moxie/$(am__dirstamp)
5277 @SIM_ENABLE_ARCH_moxie_TRUE@    $(AM_V_GEN) \
5278 @SIM_ENABLE_ARCH_moxie_TRUE@    if test "x$(DTC)" != x; then \
5279 @SIM_ENABLE_ARCH_moxie_TRUE@      $(DTC) -O dtb -o $@.tmp ${srcdir}/moxie/moxie-gdb.dts || exit 1; \
5280 @SIM_ENABLE_ARCH_moxie_TRUE@      $(SHELL) $(srcroot)/move-if-change $@.tmp ${srcdir}/moxie/moxie-gdb.dtb || exit 1; \
5281 @SIM_ENABLE_ARCH_moxie_TRUE@      touch ${srcdir}/moxie/moxie-gdb.dtb; \
5282 @SIM_ENABLE_ARCH_moxie_TRUE@    else \
5283 @SIM_ENABLE_ARCH_moxie_TRUE@      echo "Could not update the moxie-gdb.dtb file because the device "; \
5284 @SIM_ENABLE_ARCH_moxie_TRUE@      echo "tree compiler tool (dtc) is missing.  Install the tool to "; \
5285 @SIM_ENABLE_ARCH_moxie_TRUE@      echo "update the device tree blob."; \
5286 @SIM_ENABLE_ARCH_moxie_TRUE@    fi
5287 @SIM_ENABLE_ARCH_msp430_TRUE@$(msp430_libsim_a_OBJECTS) $(msp430_libsim_a_LIBADD): msp430/hw-config.h
5288
5289 @SIM_ENABLE_ARCH_msp430_TRUE@msp430/%.o: common/%.c ; $(SIM_COMPILE)
5290 @SIM_ENABLE_ARCH_msp430_TRUE@-@am__include@ msp430/$(DEPDIR)/*.Po
5291 @SIM_ENABLE_ARCH_or1k_TRUE@$(or1k_libsim_a_OBJECTS) $(or1k_libsim_a_LIBADD): or1k/hw-config.h
5292
5293 @SIM_ENABLE_ARCH_or1k_TRUE@or1k/%.o: common/%.c ; $(SIM_COMPILE)
5294 @SIM_ENABLE_ARCH_or1k_TRUE@-@am__include@ or1k/$(DEPDIR)/*.Po
5295
5296 @SIM_ENABLE_ARCH_or1k_TRUE@or1k/modules.c: | $(or1k_BUILD_OUTPUTS)
5297
5298 @SIM_ENABLE_ARCH_or1k_TRUE@or1k/mloop.c or1k/eng.h: or1k/stamp-mloop ; @true
5299 @SIM_ENABLE_ARCH_or1k_TRUE@or1k/stamp-mloop: $(srccom)/genmloop.sh or1k/mloop.in
5300 @SIM_ENABLE_ARCH_or1k_TRUE@     $(AM_V_GEN)$(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \
5301 @SIM_ENABLE_ARCH_or1k_TRUE@             -mono -fast -pbb -switch sem-switch.c \
5302 @SIM_ENABLE_ARCH_or1k_TRUE@             -cpu or1k32bf \
5303 @SIM_ENABLE_ARCH_or1k_TRUE@             -infile $(srcdir)/or1k/mloop.in -outfile-prefix or1k/
5304 @SIM_ENABLE_ARCH_or1k_TRUE@     $(AM_V_at)$(SHELL) $(srcroot)/move-if-change or1k/eng.hin or1k/eng.h
5305 @SIM_ENABLE_ARCH_or1k_TRUE@     $(AM_V_at)$(SHELL) $(srcroot)/move-if-change or1k/mloop.cin or1k/mloop.c
5306 @SIM_ENABLE_ARCH_or1k_TRUE@     $(AM_V_at)touch $@
5307
5308 @SIM_ENABLE_ARCH_or1k_TRUE@or1k/cgen: or1k/cgen-arch or1k/cgen-cpu-decode
5309
5310 @SIM_ENABLE_ARCH_or1k_TRUE@or1k/cgen-arch:
5311 @SIM_ENABLE_ARCH_or1k_TRUE@     $(AM_V_GEN)mach=or32,or32nd FLAGS="with-scache"; $(CGEN_GEN_ARCH)
5312 @SIM_ENABLE_ARCH_or1k_TRUE@or1k/arch.h or1k/arch.c or1k/cpuall.h: @CGEN_MAINT@ or1k/cgen-arch
5313
5314 @SIM_ENABLE_ARCH_or1k_TRUE@or1k/cgen-cpu-decode:
5315 @SIM_ENABLE_ARCH_or1k_TRUE@     $(AM_V_GEN)cpu=or1k32bf mach=or32,or32nd FLAGS="with-scache" EXTRAFILES="$(CGEN_CPU_SEM) $(CGEN_CPU_SEMSW)"; $(CGEN_GEN_CPU_DECODE)
5316 @SIM_ENABLE_ARCH_or1k_TRUE@or1k/cpu.h or1k/cpu.c or1k/model.c or1k/sem.c or1k/sem-switch.c or1k/decode.c or1k/decode.h: @CGEN_MAINT@ or1k/cgen-cpu-decode
5317
5318 @SIM_ENABLE_ARCH_ppc_TRUE@ppc/psim$(EXEEXT): ppc/run$(EXEEXT)
5319 @SIM_ENABLE_ARCH_ppc_TRUE@      $(AM_V_GEN)ln $< $@ 2>/dev/null || $(LN_S) $< $@ 2>/dev/null || cp -p $< $@
5320 @SIM_ENABLE_ARCH_ppc_TRUE@ppc/libsim.a: common/libcommon.a
5321 @SIM_ENABLE_ARCH_ppc_TRUE@      $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
5322
5323 @SIM_ENABLE_ARCH_ppc_TRUE@ppc/%.o: ppc/%.c | ppc/libsim.a $(SIM_ALL_RECURSIVE_DEPS)
5324 @SIM_ENABLE_ARCH_ppc_TRUE@      $(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
5325
5326 @SIM_ENABLE_ARCH_ppc_TRUE@ppc/spreg.c: @MAINT@ ppc/ppc-spr-table ppc/spreg-gen.py ppc/$(am__dirstamp)
5327 @SIM_ENABLE_ARCH_ppc_TRUE@      $(AM_V_GEN)$(srcdir)/ppc/spreg-gen.py --source $@.tmp
5328 @SIM_ENABLE_ARCH_ppc_TRUE@      $(AM_V_at)$(SHELL) $(srcroot)/move-if-change $@.tmp $(srcdir)/ppc/spreg.c
5329 @SIM_ENABLE_ARCH_ppc_TRUE@      $(AM_V_at)touch $(srcdir)/ppc/spreg.c
5330
5331 @SIM_ENABLE_ARCH_ppc_TRUE@ppc/spreg.h: @MAINT@ ppc/ppc-spr-table ppc/spreg-gen.py ppc/$(am__dirstamp)
5332 @SIM_ENABLE_ARCH_ppc_TRUE@      $(AM_V_GEN)$(srcdir)/ppc/spreg-gen.py --header $@.tmp
5333 @SIM_ENABLE_ARCH_ppc_TRUE@      $(AM_V_at)$(SHELL) $(srcroot)/move-if-change $@.tmp $(srcdir)/ppc/spreg.h
5334 @SIM_ENABLE_ARCH_ppc_TRUE@      $(AM_V_at)touch $(srcdir)/ppc/spreg.h
5335 @SIM_ENABLE_ARCH_pru_TRUE@$(pru_libsim_a_OBJECTS) $(pru_libsim_a_LIBADD): pru/hw-config.h
5336
5337 @SIM_ENABLE_ARCH_pru_TRUE@pru/%.o: common/%.c ; $(SIM_COMPILE)
5338 @SIM_ENABLE_ARCH_pru_TRUE@-@am__include@ pru/$(DEPDIR)/*.Po
5339 @SIM_ENABLE_ARCH_riscv_TRUE@$(riscv_libsim_a_OBJECTS) $(riscv_libsim_a_LIBADD): riscv/hw-config.h
5340
5341 @SIM_ENABLE_ARCH_riscv_TRUE@riscv/%.o: common/%.c ; $(SIM_COMPILE)
5342 @SIM_ENABLE_ARCH_riscv_TRUE@-@am__include@ riscv/$(DEPDIR)/*.Po
5343 @SIM_ENABLE_ARCH_rl78_TRUE@$(rl78_libsim_a_OBJECTS) $(rl78_libsim_a_LIBADD): rl78/hw-config.h
5344
5345 @SIM_ENABLE_ARCH_rl78_TRUE@rl78/%.o: common/%.c ; $(SIM_COMPILE)
5346 @SIM_ENABLE_ARCH_rl78_TRUE@-@am__include@ rl78/$(DEPDIR)/*.Po
5347 @SIM_ENABLE_ARCH_rx_TRUE@$(rx_libsim_a_OBJECTS) $(rx_libsim_a_LIBADD): rx/hw-config.h
5348
5349 @SIM_ENABLE_ARCH_rx_TRUE@rx/%.o: common/%.c ; $(SIM_COMPILE)
5350 @SIM_ENABLE_ARCH_rx_TRUE@-@am__include@ rx/$(DEPDIR)/*.Po
5351 @SIM_ENABLE_ARCH_sh_TRUE@$(sh_libsim_a_OBJECTS) $(sh_libsim_a_LIBADD): sh/hw-config.h
5352
5353 @SIM_ENABLE_ARCH_sh_TRUE@sh/%.o: common/%.c ; $(SIM_COMPILE)
5354 @SIM_ENABLE_ARCH_sh_TRUE@-@am__include@ sh/$(DEPDIR)/*.Po
5355
5356 @SIM_ENABLE_ARCH_sh_TRUE@sh/modules.c: | $(sh_BUILD_OUTPUTS)
5357
5358 # These rules are copied from automake, but tweaked to use FOR_BUILD variables.
5359 @SIM_ENABLE_ARCH_sh_TRUE@sh/gencode$(EXEEXT): $(sh_gencode_OBJECTS) $(sh_gencode_DEPENDENCIES) sh/$(am__dirstamp)
5360 @SIM_ENABLE_ARCH_sh_TRUE@       $(AM_V_CCLD)$(LINK_FOR_BUILD) $(sh_gencode_OBJECTS) $(sh_gencode_LDADD)
5361
5362 # gencode is a build-time only tool.  Override the default rules for it.
5363 @SIM_ENABLE_ARCH_sh_TRUE@sh/gencode.o: sh/gencode.c
5364 @SIM_ENABLE_ARCH_sh_TRUE@       $(AM_V_CC)$(COMPILE_FOR_BUILD) -c $< -o $@
5365
5366 @SIM_ENABLE_ARCH_sh_TRUE@sh/code.c: sh/gencode$(EXEEXT)
5367 @SIM_ENABLE_ARCH_sh_TRUE@       $(AM_V_GEN)$< -x >$@
5368
5369 @SIM_ENABLE_ARCH_sh_TRUE@sh/ppi.c: sh/gencode$(EXEEXT)
5370 @SIM_ENABLE_ARCH_sh_TRUE@       $(AM_V_GEN)$< -p >$@
5371
5372 @SIM_ENABLE_ARCH_sh_TRUE@sh/table.c: sh/gencode$(EXEEXT)
5373 @SIM_ENABLE_ARCH_sh_TRUE@       $(AM_V_GEN)$< -s >$@
5374 @SIM_ENABLE_ARCH_v850_TRUE@$(v850_libsim_a_OBJECTS) $(v850_libsim_a_LIBADD): v850/hw-config.h
5375
5376 @SIM_ENABLE_ARCH_v850_TRUE@v850/%.o: common/%.c ; $(SIM_COMPILE)
5377 @SIM_ENABLE_ARCH_v850_TRUE@-@am__include@ v850/$(DEPDIR)/*.Po
5378
5379 @SIM_ENABLE_ARCH_v850_TRUE@v850/modules.c: | $(v850_BUILD_OUTPUTS)
5380
5381 @SIM_ENABLE_ARCH_v850_TRUE@$(v850_BUILT_SRC_FROM_IGEN): v850/stamp-igen
5382 @SIM_ENABLE_ARCH_v850_TRUE@v850/stamp-igen: $(v850_IGEN_INSN) $(v850_IGEN_DC) $(IGEN)
5383 @SIM_ENABLE_ARCH_v850_TRUE@     $(AM_V_GEN)$(IGEN_RUN) \
5384 @SIM_ENABLE_ARCH_v850_TRUE@             $(v850_IGEN_TRACE) \
5385 @SIM_ENABLE_ARCH_v850_TRUE@             -G gen-direct-access \
5386 @SIM_ENABLE_ARCH_v850_TRUE@             -G gen-zero-r0 \
5387 @SIM_ENABLE_ARCH_v850_TRUE@             -i $(v850_IGEN_INSN) \
5388 @SIM_ENABLE_ARCH_v850_TRUE@             -o $(v850_IGEN_DC) \
5389 @SIM_ENABLE_ARCH_v850_TRUE@             -x \
5390 @SIM_ENABLE_ARCH_v850_TRUE@             -n icache.h    -hc v850/icache.h \
5391 @SIM_ENABLE_ARCH_v850_TRUE@             -n icache.c    -c  v850/icache.c \
5392 @SIM_ENABLE_ARCH_v850_TRUE@             -n semantics.h -hs v850/semantics.h \
5393 @SIM_ENABLE_ARCH_v850_TRUE@             -n semantics.c -s  v850/semantics.c \
5394 @SIM_ENABLE_ARCH_v850_TRUE@             -n idecode.h   -hd v850/idecode.h \
5395 @SIM_ENABLE_ARCH_v850_TRUE@             -n idecode.c   -d  v850/idecode.c \
5396 @SIM_ENABLE_ARCH_v850_TRUE@             -n model.h     -hm v850/model.h \
5397 @SIM_ENABLE_ARCH_v850_TRUE@             -n model.c     -m  v850/model.c \
5398 @SIM_ENABLE_ARCH_v850_TRUE@             -n support.h   -hf v850/support.h \
5399 @SIM_ENABLE_ARCH_v850_TRUE@             -n support.c   -f  v850/support.c \
5400 @SIM_ENABLE_ARCH_v850_TRUE@             -n itable.h    -ht v850/itable.h \
5401 @SIM_ENABLE_ARCH_v850_TRUE@             -n itable.c    -t  v850/itable.c \
5402 @SIM_ENABLE_ARCH_v850_TRUE@             -n engine.h    -he v850/engine.h \
5403 @SIM_ENABLE_ARCH_v850_TRUE@             -n engine.c    -e  v850/engine.c \
5404 @SIM_ENABLE_ARCH_v850_TRUE@             -n irun.c      -r  v850/irun.c
5405 @SIM_ENABLE_ARCH_v850_TRUE@     $(AM_V_at)touch $@
5406
5407 all-recursive: $(SIM_ALL_RECURSIVE_DEPS)
5408
5409 install-data-local: installdirs $(SIM_INSTALL_DATA_LOCAL_DEPS)
5410         $(AM_V_at)$(MKDIR_P) $(DESTDIR)$(libdir)
5411         lib=`echo sim | sed '$(program_transform_name)'`; \
5412         for d in $(SIM_ENABLED_ARCHES); do \
5413                 n="$$lib"; \
5414                 [ "$(SIM_PRIMARY_TARGET)" = "$$d" ] || n="$$n-$$d"; \
5415                 n="lib$$n.a"; \
5416                 $(INSTALL_DATA) $$d/libsim.a $(DESTDIR)$(libdir)/$$n || exit 1; \
5417         done
5418
5419 install-exec-local: installdirs $(SIM_INSTALL_EXEC_LOCAL_DEPS)
5420         $(AM_V_at)$(MKDIR_P) $(DESTDIR)$(bindir)
5421         run=`echo run | sed '$(program_transform_name)'`; \
5422         for d in $(SIM_ENABLED_ARCHES); do \
5423                 n="$$run"; \
5424                 [ "$(SIM_PRIMARY_TARGET)" = "$$d" ] || n="$$n-$$d"; \
5425                 $(LIBTOOL) --mode=install \
5426                         $(INSTALL_PROGRAM) $$d/run$(EXEEXT) $(DESTDIR)$(bindir)/$$n$(EXEEXT) || exit 1; \
5427         done
5428
5429 uninstall-local: $(SIM_UNINSTALL_LOCAL_DEPS)
5430         rm -f $(DESTDIR)$(bindir)/run $(DESTDIR)$(libdir)/libsim.a
5431         for d in $(SIM_ENABLED_ARCHES); do \
5432                 rm -f $(DESTDIR)$(bindir)/run-$$d $(DESTDIR)$(libdir)/libsim-$$d.a; \
5433         done
5434
5435 # Tell versions [3.59,3.63) of GNU make to not export all variables.
5436 # Otherwise a system limit (for SysV at least) may be exceeded.
5437 .NOEXPORT: