sim/Makefile.in

   1 # Makefile.in generated by automake 1.15.1 from Makefile.am.
   2 # @configure_input@
   3
   4 # Copyright (C) 1994-2017 Free Software Foundation, Inc.
   5
   6 # This Makefile.in is free software; the Free Software Foundation
   7 # gives unlimited permission to copy and/or distribute it,
   8 # with or without modifications, as long as this notice is preserved.
   9
  10 # This program is distributed in the hope that it will be useful,
  11 # but WITHOUT ANY WARRANTY, to the extent permitted by law; without
  12 # even the implied warranty of MERCHANTABILITY or FITNESS FOR A
  13 # PARTICULAR PURPOSE.
  14
  15 @SET_MAKE@
  16
  17 #   Copyright (C) 1993-2023 Free Software Foundation, Inc.
  18 #
  19 # This program is free software; you can redistribute it and/or modify
  20 # it under the terms of the GNU General Public License as published by
  21 # the Free Software Foundation; either version 3 of the License, or
  22 # (at your option) any later version.
  23 #
  24 # This program is distributed in the hope that it will be useful,
  25 # but WITHOUT ANY WARRANTY; without even the implied warranty of
  26 # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  27 # GNU General Public License for more details.
  28 #
  29 # You should have received a copy of the GNU General Public License
  30 # along with this program.  If not, see <http://www.gnu.org/licenses/>.
  31
  32
  33
  34
  35 VPATH = @srcdir@
  36 am__is_gnu_make = { \
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  47 am__make_running_with_option = \
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  54   has_opt=no; \
  55   sane_makeflags=$$MAKEFLAGS; \
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  64     esac; \
  65   fi; \
  66   skip_next=no; \
  67   strip_trailopt () \
  68   { \
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  89 am__make_dryrun = (target_option=n; $(am__make_running_with_option))
  90 am__make_keepgoing = (target_option=k; $(am__make_running_with_option))
  91 pkgdatadir = $(datadir)/@PACKAGE@
  92 pkgincludedir = $(includedir)/@PACKAGE@
  93 pkglibdir = $(libdir)/@PACKAGE@
  94 pkglibexecdir = $(libexecdir)/@PACKAGE@
  95 am__cd = CDPATH="$${ZSH_VERSION+.}$(PATH_SEPARATOR)" && cd
  96 install_sh_DATA = $(install_sh) -c -m 644
  97 install_sh_PROGRAM = $(install_sh) -c
  98 install_sh_SCRIPT = $(install_sh) -c
  99 INSTALL_HEADER = $(INSTALL_DATA)
 100 transform = $(program_transform_name)
 101 NORMAL_INSTALL = :
 102 PRE_INSTALL = :
 103 POST_INSTALL = :
 104 NORMAL_UNINSTALL = :
 105 PRE_UNINSTALL = :
 106 POST_UNINSTALL = :
 107 build_triplet = @build@
 108 host_triplet = @host@
 109 target_triplet = @target@
 110 check_PROGRAMS = $(am__EXEEXT_8) $(am__EXEEXT_9)
 111 noinst_PROGRAMS = $(am__EXEEXT_10) $(am__EXEEXT_11) $(am__EXEEXT_12) \
 112         $(am__EXEEXT_13) $(am__EXEEXT_14) $(am__EXEEXT_15) \
 113         $(am__EXEEXT_16) $(am__EXEEXT_17) $(am__EXEEXT_18) \
 114         $(am__EXEEXT_19) $(am__EXEEXT_20) $(am__EXEEXT_21) \
 115         $(am__EXEEXT_22) $(am__EXEEXT_23) $(am__EXEEXT_24) \
 116         $(am__EXEEXT_25) $(am__EXEEXT_26) $(am__EXEEXT_27) \
 117         $(am__EXEEXT_28) $(am__EXEEXT_29) $(am__EXEEXT_30) \
 118         $(am__EXEEXT_31) $(am__EXEEXT_32) $(am__EXEEXT_33) \
 119         $(am__EXEEXT_34) $(am__EXEEXT_35) $(am__EXEEXT_36) \
 120         $(am__EXEEXT_37) $(am__EXEEXT_38) $(am__EXEEXT_39) \
 121         $(am__EXEEXT_40) $(am__EXEEXT_41)
 122 EXTRA_PROGRAMS = $(am__EXEEXT_2) testsuite/common/bits-gen$(EXEEXT) \
 123         testsuite/common/fpu-tst$(EXEEXT) $(am__EXEEXT_3) \
 124         $(am__EXEEXT_4) $(am__EXEEXT_5) $(am__EXEEXT_6) \
 125         $(am__EXEEXT_7)
 126 @ENABLE_SIM_TRUE@am__append_1 = \
 127 @ENABLE_SIM_TRUE@       $(srcroot)/include/sim/callback.h \
 128 @ENABLE_SIM_TRUE@       $(srcroot)/include/sim/sim.h
 129
 130 @SIM_ENABLE_HW_TRUE@am__append_2 = \
 131 @SIM_ENABLE_HW_TRUE@    $(SIM_COMMON_HW_OBJS) \
 132 @SIM_ENABLE_HW_TRUE@    $(SIM_HW_SOCKSER)
 133
 134 @SIM_ENABLE_HW_TRUE@am__append_3 = SIM_HW_DEVICES_="$(SIM_HW_DEVICES)"
 135 @SIM_ENABLE_IGEN_TRUE@am__append_4 = $(IGEN)
 136 @SIM_ENABLE_IGEN_TRUE@am__append_5 = igen/libigen.a
 137 @SIM_ENABLE_IGEN_TRUE@am__append_6 = $(igen_IGEN_TOOLS)
 138 @SIM_ENABLE_IGEN_TRUE@am__append_7 = $(igen_IGEN_TOOLS)
 139 TESTS = testsuite/common/bits32m0$(EXEEXT) \
 140         testsuite/common/bits32m31$(EXEEXT) \
 141         testsuite/common/bits64m0$(EXEEXT) \
 142         testsuite/common/bits64m63$(EXEEXT) \
 143         testsuite/common/alu-tst$(EXEEXT)
 144 @SIM_ENABLE_ARCH_aarch64_TRUE@am__append_8 = aarch64/libsim.a
 145 @SIM_ENABLE_ARCH_aarch64_TRUE@am__append_9 = aarch64/run
 146 @SIM_ENABLE_ARCH_arm_TRUE@am__append_10 = arm/libsim.a
 147 @SIM_ENABLE_ARCH_arm_TRUE@am__append_11 = arm/run
 148 @SIM_ENABLE_ARCH_avr_TRUE@am__append_12 = avr/libsim.a
 149 @SIM_ENABLE_ARCH_avr_TRUE@am__append_13 = avr/run
 150 @SIM_ENABLE_ARCH_bfin_TRUE@am__append_14 = bfin/libsim.a
 151 @SIM_ENABLE_ARCH_bfin_TRUE@am__append_15 = bfin/run
 152 @SIM_ENABLE_ARCH_bfin_TRUE@am__append_16 = bfin_SIM_EXTRA_HW_DEVICES="$(bfin_SIM_EXTRA_HW_DEVICES)"
 153 @SIM_ENABLE_ARCH_bpf_TRUE@am__append_17 = bpf/libsim.a
 154 @SIM_ENABLE_ARCH_bpf_TRUE@am__append_18 = bpf/run
 155 @SIM_ENABLE_ARCH_bpf_TRUE@am__append_19 = \
 156 @SIM_ENABLE_ARCH_bpf_TRUE@      bpf/eng-le.h \
 157 @SIM_ENABLE_ARCH_bpf_TRUE@      bpf/eng-be.h
 158
 159 @SIM_ENABLE_ARCH_bpf_TRUE@am__append_20 = $(bpf_BUILD_OUTPUTS)
 160 @SIM_ENABLE_ARCH_bpf_TRUE@am__append_21 = $(bpf_BUILD_OUTPUTS)
 161 @SIM_ENABLE_ARCH_cr16_TRUE@am__append_22 = cr16/libsim.a
 162 @SIM_ENABLE_ARCH_cr16_TRUE@am__append_23 = cr16/run
 163 @SIM_ENABLE_ARCH_cr16_TRUE@am__append_24 = cr16/simops.h
 164 @SIM_ENABLE_ARCH_cr16_TRUE@am__append_25 = $(cr16_BUILD_OUTPUTS)
 165 @SIM_ENABLE_ARCH_cr16_TRUE@am__append_26 = cr16/gencode
 166 @SIM_ENABLE_ARCH_cr16_TRUE@am__append_27 = $(cr16_BUILD_OUTPUTS)
 167 @SIM_ENABLE_ARCH_cris_TRUE@am__append_28 = cris/libsim.a
 168 @SIM_ENABLE_ARCH_cris_TRUE@am__append_29 = cris/run
 169 @SIM_ENABLE_ARCH_cris_TRUE@am__append_30 = cris_SIM_EXTRA_HW_DEVICES="$(cris_SIM_EXTRA_HW_DEVICES)"
 170 @SIM_ENABLE_ARCH_cris_TRUE@am__append_31 = cris/rvdummy
 171 @SIM_ENABLE_ARCH_cris_TRUE@am__append_32 = \
 172 @SIM_ENABLE_ARCH_cris_TRUE@     cris/engv10.h \
 173 @SIM_ENABLE_ARCH_cris_TRUE@     cris/engv32.h
 174
 175 @SIM_ENABLE_ARCH_cris_TRUE@am__append_33 = $(cris_BUILD_OUTPUTS)
 176 @SIM_ENABLE_ARCH_cris_TRUE@am__append_34 = $(cris_BUILD_OUTPUTS)
 177 @SIM_ENABLE_ARCH_d10v_TRUE@am__append_35 = d10v/libsim.a
 178 @SIM_ENABLE_ARCH_d10v_TRUE@am__append_36 = d10v/run
 179 @SIM_ENABLE_ARCH_d10v_TRUE@am__append_37 = d10v/simops.h
 180 @SIM_ENABLE_ARCH_d10v_TRUE@am__append_38 = $(d10v_BUILD_OUTPUTS)
 181 @SIM_ENABLE_ARCH_d10v_TRUE@am__append_39 = d10v/gencode
 182 @SIM_ENABLE_ARCH_d10v_TRUE@am__append_40 = $(d10v_BUILD_OUTPUTS)
 183 @SIM_ENABLE_ARCH_erc32_TRUE@am__append_41 = erc32/libsim.a
 184 @SIM_ENABLE_ARCH_erc32_TRUE@am__append_42 = erc32/run erc32/sis
 185 @SIM_ENABLE_ARCH_erc32_TRUE@am__append_43 = sim-%D-install-exec-local
 186 @SIM_ENABLE_ARCH_erc32_TRUE@am__append_44 = sim-erc32-uninstall-local
 187 @SIM_ENABLE_ARCH_examples_TRUE@am__append_45 = example-synacor/libsim.a
 188 @SIM_ENABLE_ARCH_examples_TRUE@am__append_46 = example-synacor/run
 189 @SIM_ENABLE_ARCH_frv_TRUE@am__append_47 = frv/libsim.a
 190 @SIM_ENABLE_ARCH_frv_TRUE@am__append_48 = frv/run
 191 @SIM_ENABLE_ARCH_frv_TRUE@am__append_49 = frv/eng.h
 192 @SIM_ENABLE_ARCH_frv_TRUE@am__append_50 = $(frv_BUILD_OUTPUTS)
 193 @SIM_ENABLE_ARCH_frv_TRUE@am__append_51 = $(frv_BUILD_OUTPUTS)
 194 @SIM_ENABLE_ARCH_ft32_TRUE@am__append_52 = ft32/libsim.a
 195 @SIM_ENABLE_ARCH_ft32_TRUE@am__append_53 = ft32/run
 196 @SIM_ENABLE_ARCH_h8300_TRUE@am__append_54 = h8300/libsim.a
 197 @SIM_ENABLE_ARCH_h8300_TRUE@am__append_55 = h8300/run
 198 @SIM_ENABLE_ARCH_iq2000_TRUE@am__append_56 = iq2000/libsim.a
 199 @SIM_ENABLE_ARCH_iq2000_TRUE@am__append_57 = iq2000/run
 200 @SIM_ENABLE_ARCH_iq2000_TRUE@am__append_58 = iq2000/eng.h
 201 @SIM_ENABLE_ARCH_iq2000_TRUE@am__append_59 = $(iq2000_BUILD_OUTPUTS)
 202 @SIM_ENABLE_ARCH_iq2000_TRUE@am__append_60 = $(iq2000_BUILD_OUTPUTS)
 203 @SIM_ENABLE_ARCH_lm32_TRUE@am__append_61 = lm32/libsim.a
 204 @SIM_ENABLE_ARCH_lm32_TRUE@am__append_62 = lm32/run
 205 @SIM_ENABLE_ARCH_lm32_TRUE@am__append_63 = lm32_SIM_EXTRA_HW_DEVICES="$(lm32_SIM_EXTRA_HW_DEVICES)"
 206 @SIM_ENABLE_ARCH_lm32_TRUE@am__append_64 = lm32/eng.h
 207 @SIM_ENABLE_ARCH_lm32_TRUE@am__append_65 = $(lm32_BUILD_OUTPUTS)
 208 @SIM_ENABLE_ARCH_lm32_TRUE@am__append_66 = $(lm32_BUILD_OUTPUTS)
 209 @SIM_ENABLE_ARCH_m32c_TRUE@am__append_67 = m32c/libsim.a
 210 @SIM_ENABLE_ARCH_m32c_TRUE@am__append_68 = m32c/run
 211 @SIM_ENABLE_ARCH_m32c_TRUE@am__append_69 = $(m32c_BUILD_OUTPUTS)
 212 @SIM_ENABLE_ARCH_m32c_TRUE@am__append_70 = m32c/opc2c
 213 @SIM_ENABLE_ARCH_m32c_TRUE@am__append_71 = \
 214 @SIM_ENABLE_ARCH_m32c_TRUE@     $(m32c_BUILD_OUTPUTS) \
 215 @SIM_ENABLE_ARCH_m32c_TRUE@     m32c/m32c.c.log \
 216 @SIM_ENABLE_ARCH_m32c_TRUE@     m32c/r8c.c.log
 217
 218 @SIM_ENABLE_ARCH_m32r_TRUE@am__append_72 = m32r/libsim.a
 219 @SIM_ENABLE_ARCH_m32r_TRUE@am__append_73 = m32r/run
 220 @SIM_ENABLE_ARCH_m32r_TRUE@am__append_74 = m32r_SIM_EXTRA_HW_DEVICES="$(m32r_SIM_EXTRA_HW_DEVICES)"
 221 @SIM_ENABLE_ARCH_m32r_TRUE@am__append_75 = \
 222 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/eng.h \
 223 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/engx.h \
 224 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/eng2.h
 225
 226 @SIM_ENABLE_ARCH_m32r_TRUE@am__append_76 = $(m32r_BUILD_OUTPUTS)
 227 @SIM_ENABLE_ARCH_m32r_TRUE@am__append_77 = $(m32r_BUILD_OUTPUTS)
 228 @SIM_ENABLE_ARCH_m68hc11_TRUE@am__append_78 = m68hc11/libsim.a
 229 @SIM_ENABLE_ARCH_m68hc11_TRUE@am__append_79 = m68hc11/run
 230 @SIM_ENABLE_ARCH_m68hc11_TRUE@am__append_80 = m68hc11_SIM_EXTRA_HW_DEVICES="$(m68hc11_SIM_EXTRA_HW_DEVICES)"
 231 @SIM_ENABLE_ARCH_m68hc11_TRUE@am__append_81 = $(m68hc11_BUILD_OUTPUTS)
 232 @SIM_ENABLE_ARCH_m68hc11_TRUE@am__append_82 = m68hc11/gencode
 233 @SIM_ENABLE_ARCH_m68hc11_TRUE@am__append_83 = $(m68hc11_BUILD_OUTPUTS)
 234 @SIM_ENABLE_ARCH_mcore_TRUE@am__append_84 = mcore/libsim.a
 235 @SIM_ENABLE_ARCH_mcore_TRUE@am__append_85 = mcore/run
 236 @SIM_ENABLE_ARCH_microblaze_TRUE@am__append_86 = microblaze/libsim.a
 237 @SIM_ENABLE_ARCH_microblaze_TRUE@am__append_87 = microblaze/run
 238 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_SINGLE_TRUE@am__append_88 = \
 239 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_SINGLE_TRUE@      mips/support.o \
 240 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_SINGLE_TRUE@      mips/itable.o \
 241 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_SINGLE_TRUE@      mips/semantics.o \
 242 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_SINGLE_TRUE@      mips/idecode.o \
 243 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_SINGLE_TRUE@      mips/icache.o \
 244 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_SINGLE_TRUE@      mips/engine.o \
 245 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_SINGLE_TRUE@      mips/irun.o
 246
 247 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@am__append_89 = \
 248 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@ mips/m16_support.o \
 249 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@ mips/m16_semantics.o \
 250 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@ mips/m16_idecode.o \
 251 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@ mips/m16_icache.o \
 252 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@ \
 253 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@ mips/m32_support.o \
 254 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@ mips/m32_semantics.o \
 255 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@ mips/m32_idecode.o \
 256 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@ mips/m32_icache.o \
 257 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@ \
 258 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@ mips/itable.o \
 259 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@ mips/m16run.o
 260
 261 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_MULTI_TRUE@am__append_90 = \
 262 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_MULTI_TRUE@       $(SIM_MIPS_MULTI_OBJ) \
 263 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_MULTI_TRUE@       mips/itable.o \
 264 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_MULTI_TRUE@       mips/multi-run.o
 265
 266 @SIM_ENABLE_ARCH_mips_TRUE@am__append_91 = mips/libsim.a
 267 @SIM_ENABLE_ARCH_mips_TRUE@am__append_92 = mips/run
 268 @SIM_ENABLE_ARCH_mips_TRUE@am__append_93 = mips_SIM_EXTRA_HW_DEVICES="$(mips_SIM_EXTRA_HW_DEVICES)"
 269 @SIM_ENABLE_ARCH_mips_TRUE@am__append_94 = mips/itable.h \
 270 @SIM_ENABLE_ARCH_mips_TRUE@     $(SIM_MIPS_MULTI_SRC)
 271 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_SINGLE_TRUE@am__append_95 = \
 272 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_SINGLE_TRUE@      $(mips_BUILT_SRC_FROM_GEN_MODE_SINGLE) \
 273 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_SINGLE_TRUE@      mips/stamp-gen-mode-single
 274
 275 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@am__append_96 = \
 276 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@ $(mips_BUILT_SRC_FROM_GEN_MODE_M16_M16) \
 277 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@ $(mips_BUILT_SRC_FROM_GEN_MODE_M16_M32) \
 278 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@ mips/stamp-gen-mode-m16-m16 \
 279 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@ mips/stamp-gen-mode-m16-m32
 280
 281 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_MULTI_TRUE@am__append_97 = \
 282 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_MULTI_TRUE@       $(SIM_MIPS_MULTI_SRC) \
 283 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_MULTI_TRUE@       mips/stamp-gen-mode-multi-igen \
 284 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_MULTI_TRUE@       mips/stamp-gen-mode-multi-run
 285
 286 @SIM_ENABLE_ARCH_mips_TRUE@am__append_98 = $(mips_BUILD_OUTPUTS)
 287 @SIM_ENABLE_ARCH_mips_TRUE@am__append_99 = $(mips_BUILD_OUTPUTS)
 288 @SIM_ENABLE_ARCH_mips_TRUE@am__append_100 = mips/multi-include.h mips/multi-run.c
 289 @SIM_ENABLE_ARCH_mn10300_TRUE@am__append_101 = mn10300/libsim.a
 290 @SIM_ENABLE_ARCH_mn10300_TRUE@am__append_102 = mn10300/run
 291 @SIM_ENABLE_ARCH_mn10300_TRUE@am__append_103 = mn10300_SIM_EXTRA_HW_DEVICES="$(mn10300_SIM_EXTRA_HW_DEVICES)"
 292 @SIM_ENABLE_ARCH_mn10300_TRUE@am__append_104 = \
 293 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/icache.h \
 294 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/idecode.h \
 295 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/semantics.h \
 296 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/model.h \
 297 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/support.h \
 298 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/itable.h \
 299 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/engine.h
 300
 301 @SIM_ENABLE_ARCH_mn10300_TRUE@am__append_105 = $(mn10300_BUILD_OUTPUTS)
 302 @SIM_ENABLE_ARCH_mn10300_TRUE@am__append_106 = $(mn10300_BUILD_OUTPUTS)
 303 @SIM_ENABLE_ARCH_moxie_TRUE@am__append_107 = moxie/libsim.a
 304 @SIM_ENABLE_ARCH_moxie_TRUE@am__append_108 = moxie/run
 305 @SIM_ENABLE_ARCH_msp430_TRUE@am__append_109 = msp430/libsim.a
 306 @SIM_ENABLE_ARCH_msp430_TRUE@am__append_110 = msp430/run
 307 @SIM_ENABLE_ARCH_or1k_TRUE@am__append_111 = or1k/libsim.a
 308 @SIM_ENABLE_ARCH_or1k_TRUE@am__append_112 = or1k/run
 309 @SIM_ENABLE_ARCH_or1k_TRUE@am__append_113 = or1k/eng.h
 310 @SIM_ENABLE_ARCH_or1k_TRUE@am__append_114 = $(or1k_BUILD_OUTPUTS)
 311 @SIM_ENABLE_ARCH_or1k_TRUE@am__append_115 = $(or1k_BUILD_OUTPUTS)
 312 @SIM_ENABLE_ARCH_ppc_TRUE@am__append_116 = ppc/run ppc/psim
 313 @SIM_ENABLE_ARCH_pru_TRUE@am__append_117 = pru/libsim.a
 314 @SIM_ENABLE_ARCH_pru_TRUE@am__append_118 = pru/run
 315 @SIM_ENABLE_ARCH_riscv_TRUE@am__append_119 = riscv/libsim.a
 316 @SIM_ENABLE_ARCH_riscv_TRUE@am__append_120 = riscv/run
 317 @SIM_ENABLE_ARCH_rl78_TRUE@am__append_121 = rl78/libsim.a
 318 @SIM_ENABLE_ARCH_rl78_TRUE@am__append_122 = rl78/run
 319 @SIM_ENABLE_ARCH_rx_TRUE@am__append_123 = rx/libsim.a
 320 @SIM_ENABLE_ARCH_rx_TRUE@am__append_124 = rx/run
 321 @SIM_ENABLE_ARCH_sh_TRUE@am__append_125 = sh/libsim.a
 322 @SIM_ENABLE_ARCH_sh_TRUE@am__append_126 = sh/run
 323 @SIM_ENABLE_ARCH_sh_TRUE@am__append_127 = \
 324 @SIM_ENABLE_ARCH_sh_TRUE@       sh/code.c \
 325 @SIM_ENABLE_ARCH_sh_TRUE@       sh/ppi.c
 326
 327 @SIM_ENABLE_ARCH_sh_TRUE@am__append_128 = $(sh_BUILD_OUTPUTS)
 328 @SIM_ENABLE_ARCH_sh_TRUE@am__append_129 = sh/gencode
 329 @SIM_ENABLE_ARCH_sh_TRUE@am__append_130 = $(sh_BUILD_OUTPUTS)
 330 @SIM_ENABLE_ARCH_v850_TRUE@am__append_131 = v850/libsim.a
 331 @SIM_ENABLE_ARCH_v850_TRUE@am__append_132 = v850/run
 332 @SIM_ENABLE_ARCH_v850_TRUE@am__append_133 = \
 333 @SIM_ENABLE_ARCH_v850_TRUE@     v850/icache.h \
 334 @SIM_ENABLE_ARCH_v850_TRUE@     v850/idecode.h \
 335 @SIM_ENABLE_ARCH_v850_TRUE@     v850/semantics.h \
 336 @SIM_ENABLE_ARCH_v850_TRUE@     v850/model.h \
 337 @SIM_ENABLE_ARCH_v850_TRUE@     v850/support.h \
 338 @SIM_ENABLE_ARCH_v850_TRUE@     v850/itable.h \
 339 @SIM_ENABLE_ARCH_v850_TRUE@     v850/engine.h
 340
 341 @SIM_ENABLE_ARCH_v850_TRUE@am__append_134 = $(v850_BUILD_OUTPUTS)
 342 @SIM_ENABLE_ARCH_v850_TRUE@am__append_135 = $(v850_BUILD_OUTPUTS)
 343 subdir = .
 344 ACLOCAL_M4 = $(top_srcdir)/aclocal.m4
 345 am__aclocal_m4_deps = $(top_srcdir)/../config/acx.m4 \
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 399         example-synacor/Makefile.sim example-synacor/.gdbinit \
 400         arch-subdir.mk .gdbinit
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 403 ARFLAGS = cru
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 405 am__v_AR_ = $(am__v_AR_@AM_DEFAULT_V@)
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 485 cr16_libsim_a_AR = $(AR) $(ARFLAGS)
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 497 cris_libsim_a_AR = $(AR) $(ARFLAGS)
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 513 @SIM_ENABLE_ARCH_cris_TRUE@     cris/decodev32.o cris/modelv32.o \
 514 @SIM_ENABLE_ARCH_cris_TRUE@     cris/mloopv32f.o cris/sim-if.o \
 515 @SIM_ENABLE_ARCH_cris_TRUE@     cris/traps.o
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 518 d10v_libsim_a_AR = $(AR) $(ARFLAGS)
 519 @SIM_ENABLE_ARCH_d10v_TRUE@d10v_libsim_a_DEPENDENCIES =  \
 520 @SIM_ENABLE_ARCH_d10v_TRUE@     $(common_libcommon_a_OBJECTS) \
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 530 erc32_libsim_a_AR = $(AR) $(ARFLAGS)
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 616 iq2000_libsim_a_AR = $(AR) $(ARFLAGS)
 617 @SIM_ENABLE_ARCH_iq2000_TRUE@iq2000_libsim_a_DEPENDENCIES =  \
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 634 lm32_libsim_a_AR = $(AR) $(ARFLAGS)
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 647 @SIM_ENABLE_ARCH_lm32_TRUE@     lm32/decode.o lm32/sem.o \
 648 @SIM_ENABLE_ARCH_lm32_TRUE@     lm32/mloop.o lm32/model.o \
 649 @SIM_ENABLE_ARCH_lm32_TRUE@     lm32/lm32.o lm32/sim-if.o \
 650 @SIM_ENABLE_ARCH_lm32_TRUE@     lm32/traps.o lm32/user.o
 651 am_lm32_libsim_a_OBJECTS =
 652 lm32_libsim_a_OBJECTS = $(am_lm32_libsim_a_OBJECTS)
 653 m32c_libsim_a_AR = $(AR) $(ARFLAGS)
 654 @SIM_ENABLE_ARCH_m32c_TRUE@m32c_libsim_a_DEPENDENCIES =  \
 655 @SIM_ENABLE_ARCH_m32c_TRUE@     $(common_libcommon_a_OBJECTS) \
 656 @SIM_ENABLE_ARCH_m32c_TRUE@     m32c/gdb-if.o m32c/int.o \
 657 @SIM_ENABLE_ARCH_m32c_TRUE@     m32c/load.o m32c/m32c.o m32c/mem.o \
 658 @SIM_ENABLE_ARCH_m32c_TRUE@     m32c/misc.o m32c/modules.o \
 659 @SIM_ENABLE_ARCH_m32c_TRUE@     m32c/r8c.o m32c/reg.o \
 660 @SIM_ENABLE_ARCH_m32c_TRUE@     m32c/srcdest.o m32c/syscalls.o \
 661 @SIM_ENABLE_ARCH_m32c_TRUE@     m32c/trace.o
 662 am_m32c_libsim_a_OBJECTS =
 663 m32c_libsim_a_OBJECTS = $(am_m32c_libsim_a_OBJECTS)
 664 m32r_libsim_a_AR = $(AR) $(ARFLAGS)
 665 @SIM_ENABLE_ARCH_m32r_TRUE@m32r_libsim_a_DEPENDENCIES =  \
 666 @SIM_ENABLE_ARCH_m32r_TRUE@     $(common_libcommon_a_OBJECTS) \
 667 @SIM_ENABLE_ARCH_m32r_TRUE@     $(patsubst \
 668 @SIM_ENABLE_ARCH_m32r_TRUE@     %,m32r/%,$(SIM_NEW_COMMON_OBJS)) \
 669 @SIM_ENABLE_ARCH_m32r_TRUE@     $(patsubst \
 670 @SIM_ENABLE_ARCH_m32r_TRUE@     %,m32r/dv-%.o,$(SIM_HW_DEVICES)) \
 671 @SIM_ENABLE_ARCH_m32r_TRUE@     $(patsubst \
 672 @SIM_ENABLE_ARCH_m32r_TRUE@     %,m32r/dv-%.o,$(m32r_SIM_EXTRA_HW_DEVICES)) \
 673 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/modules.o m32r/cgen-run.o \
 674 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/cgen-scache.o \
 675 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/cgen-trace.o m32r/cgen-utils.o \
 676 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/arch.o m32r/m32r.o m32r/cpu.o \
 677 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/decode.o m32r/sem.o \
 678 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/model.o m32r/mloop.o \
 679 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/m32rx.o m32r/cpux.o \
 680 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/decodex.o m32r/modelx.o \
 681 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/mloopx.o m32r/m32r2.o \
 682 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/cpu2.o m32r/decode2.o \
 683 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/model2.o m32r/mloop2.o \
 684 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/sim-if.o m32r/traps.o
 685 am_m32r_libsim_a_OBJECTS =
 686 m32r_libsim_a_OBJECTS = $(am_m32r_libsim_a_OBJECTS)
 687 m68hc11_libsim_a_AR = $(AR) $(ARFLAGS)
 688 @SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11_libsim_a_DEPENDENCIES =  \
 689 @SIM_ENABLE_ARCH_m68hc11_TRUE@  $(common_libcommon_a_OBJECTS) \
 690 @SIM_ENABLE_ARCH_m68hc11_TRUE@  m68hc11/interp.o \
 691 @SIM_ENABLE_ARCH_m68hc11_TRUE@  m68hc11/m68hc11int.o \
 692 @SIM_ENABLE_ARCH_m68hc11_TRUE@  m68hc11/m68hc12int.o \
 693 @SIM_ENABLE_ARCH_m68hc11_TRUE@  m68hc11/emulos.o \
 694 @SIM_ENABLE_ARCH_m68hc11_TRUE@  m68hc11/interrupts.o \
 695 @SIM_ENABLE_ARCH_m68hc11_TRUE@  m68hc11/m68hc11_sim.o $(patsubst \
 696 @SIM_ENABLE_ARCH_m68hc11_TRUE@  %,m68hc11/%,$(SIM_NEW_COMMON_OBJS)) \
 697 @SIM_ENABLE_ARCH_m68hc11_TRUE@  $(patsubst \
 698 @SIM_ENABLE_ARCH_m68hc11_TRUE@  %,m68hc11/dv-%.o,$(SIM_HW_DEVICES)) \
 699 @SIM_ENABLE_ARCH_m68hc11_TRUE@  $(patsubst \
 700 @SIM_ENABLE_ARCH_m68hc11_TRUE@  %,m68hc11/dv-%.o,$(m68hc11_SIM_EXTRA_HW_DEVICES)) \
 701 @SIM_ENABLE_ARCH_m68hc11_TRUE@  m68hc11/modules.o \
 702 @SIM_ENABLE_ARCH_m68hc11_TRUE@  m68hc11/sim-resume.o
 703 am_m68hc11_libsim_a_OBJECTS =
 704 m68hc11_libsim_a_OBJECTS = $(am_m68hc11_libsim_a_OBJECTS)
 705 mcore_libsim_a_AR = $(AR) $(ARFLAGS)
 706 @SIM_ENABLE_ARCH_mcore_TRUE@mcore_libsim_a_DEPENDENCIES =  \
 707 @SIM_ENABLE_ARCH_mcore_TRUE@    $(common_libcommon_a_OBJECTS) \
 708 @SIM_ENABLE_ARCH_mcore_TRUE@    mcore/interp.o $(patsubst \
 709 @SIM_ENABLE_ARCH_mcore_TRUE@    %,mcore/%,$(SIM_NEW_COMMON_OBJS)) \
 710 @SIM_ENABLE_ARCH_mcore_TRUE@    $(patsubst \
 711 @SIM_ENABLE_ARCH_mcore_TRUE@    %,mcore/dv-%.o,$(SIM_HW_DEVICES)) \
 712 @SIM_ENABLE_ARCH_mcore_TRUE@    mcore/modules.o mcore/sim-resume.o
 713 am_mcore_libsim_a_OBJECTS =
 714 mcore_libsim_a_OBJECTS = $(am_mcore_libsim_a_OBJECTS)
 715 microblaze_libsim_a_AR = $(AR) $(ARFLAGS)
 716 @SIM_ENABLE_ARCH_microblaze_TRUE@microblaze_libsim_a_DEPENDENCIES = $(common_libcommon_a_OBJECTS) \
 717 @SIM_ENABLE_ARCH_microblaze_TRUE@       microblaze/interp.o \
 718 @SIM_ENABLE_ARCH_microblaze_TRUE@       $(patsubst \
 719 @SIM_ENABLE_ARCH_microblaze_TRUE@       %,microblaze/%,$(SIM_NEW_COMMON_OBJS)) \
 720 @SIM_ENABLE_ARCH_microblaze_TRUE@       $(patsubst \
 721 @SIM_ENABLE_ARCH_microblaze_TRUE@       %,microblaze/dv-%.o,$(SIM_HW_DEVICES)) \
 722 @SIM_ENABLE_ARCH_microblaze_TRUE@       microblaze/modules.o \
 723 @SIM_ENABLE_ARCH_microblaze_TRUE@       microblaze/sim-resume.o
 724 am_microblaze_libsim_a_OBJECTS =
 725 microblaze_libsim_a_OBJECTS = $(am_microblaze_libsim_a_OBJECTS)
 726 mips_libsim_a_AR = $(AR) $(ARFLAGS)
 727 am__DEPENDENCIES_1 =
 728 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_MULTI_TRUE@am__DEPENDENCIES_2 = $(am__DEPENDENCIES_1) \
 729 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_MULTI_TRUE@       mips/itable.o \
 730 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_MULTI_TRUE@       mips/multi-run.o
 731 @SIM_ENABLE_ARCH_mips_TRUE@am__DEPENDENCIES_3 = $(am__append_88) \
 732 @SIM_ENABLE_ARCH_mips_TRUE@     $(am__append_89) \
 733 @SIM_ENABLE_ARCH_mips_TRUE@     $(am__DEPENDENCIES_2)
 734 @SIM_ENABLE_ARCH_mips_TRUE@mips_libsim_a_DEPENDENCIES =  \
 735 @SIM_ENABLE_ARCH_mips_TRUE@     $(common_libcommon_a_OBJECTS) \
 736 @SIM_ENABLE_ARCH_mips_TRUE@     mips/interp.o $(am__DEPENDENCIES_3) \
 737 @SIM_ENABLE_ARCH_mips_TRUE@     $(patsubst \
 738 @SIM_ENABLE_ARCH_mips_TRUE@     %,mips/%,$(SIM_NEW_COMMON_OBJS)) \
 739 @SIM_ENABLE_ARCH_mips_TRUE@     $(patsubst \
 740 @SIM_ENABLE_ARCH_mips_TRUE@     %,mips/dv-%.o,$(SIM_HW_DEVICES)) \
 741 @SIM_ENABLE_ARCH_mips_TRUE@     $(patsubst \
 742 @SIM_ENABLE_ARCH_mips_TRUE@     %,mips/dv-%.o,$(mips_SIM_EXTRA_HW_DEVICES)) \
 743 @SIM_ENABLE_ARCH_mips_TRUE@     mips/cp1.o mips/dsp.o mips/mdmx.o \
 744 @SIM_ENABLE_ARCH_mips_TRUE@     mips/modules.o mips/sim-main.o \
 745 @SIM_ENABLE_ARCH_mips_TRUE@     mips/sim-resume.o
 746 am_mips_libsim_a_OBJECTS =
 747 mips_libsim_a_OBJECTS = $(am_mips_libsim_a_OBJECTS)
 748 mn10300_libsim_a_AR = $(AR) $(ARFLAGS)
 749 @SIM_ENABLE_ARCH_mn10300_TRUE@mn10300_libsim_a_DEPENDENCIES =  \
 750 @SIM_ENABLE_ARCH_mn10300_TRUE@  $(common_libcommon_a_OBJECTS) \
 751 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/itable.o \
 752 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/semantics.o \
 753 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/idecode.o \
 754 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/icache.o \
 755 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/engine.o mn10300/irun.o \
 756 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/support.o $(patsubst \
 757 @SIM_ENABLE_ARCH_mn10300_TRUE@  %,mn10300/%,$(SIM_NEW_COMMON_OBJS)) \
 758 @SIM_ENABLE_ARCH_mn10300_TRUE@  $(patsubst \
 759 @SIM_ENABLE_ARCH_mn10300_TRUE@  %,mn10300/dv-%.o,$(SIM_HW_DEVICES)) \
 760 @SIM_ENABLE_ARCH_mn10300_TRUE@  $(patsubst \
 761 @SIM_ENABLE_ARCH_mn10300_TRUE@  %,mn10300/dv-%.o,$(mn10300_SIM_EXTRA_HW_DEVICES)) \
 762 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/interp.o \
 763 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/modules.o \
 764 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/op_utils.o \
 765 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/sim-resume.o
 766 am_mn10300_libsim_a_OBJECTS =
 767 mn10300_libsim_a_OBJECTS = $(am_mn10300_libsim_a_OBJECTS)
 768 moxie_libsim_a_AR = $(AR) $(ARFLAGS)
 769 @SIM_ENABLE_ARCH_moxie_TRUE@moxie_libsim_a_DEPENDENCIES =  \
 770 @SIM_ENABLE_ARCH_moxie_TRUE@    $(common_libcommon_a_OBJECTS) \
 771 @SIM_ENABLE_ARCH_moxie_TRUE@    $(patsubst \
 772 @SIM_ENABLE_ARCH_moxie_TRUE@    %,moxie/%,$(SIM_NEW_COMMON_OBJS)) \
 773 @SIM_ENABLE_ARCH_moxie_TRUE@    $(patsubst \
 774 @SIM_ENABLE_ARCH_moxie_TRUE@    %,moxie/dv-%.o,$(SIM_HW_DEVICES)) \
 775 @SIM_ENABLE_ARCH_moxie_TRUE@    moxie/interp.o moxie/modules.o \
 776 @SIM_ENABLE_ARCH_moxie_TRUE@    moxie/sim-resume.o
 777 am_moxie_libsim_a_OBJECTS =
 778 moxie_libsim_a_OBJECTS = $(am_moxie_libsim_a_OBJECTS)
 779 msp430_libsim_a_AR = $(AR) $(ARFLAGS)
 780 @SIM_ENABLE_ARCH_msp430_TRUE@msp430_libsim_a_DEPENDENCIES =  \
 781 @SIM_ENABLE_ARCH_msp430_TRUE@   $(common_libcommon_a_OBJECTS) \
 782 @SIM_ENABLE_ARCH_msp430_TRUE@   $(patsubst \
 783 @SIM_ENABLE_ARCH_msp430_TRUE@   %,msp430/%,$(SIM_NEW_COMMON_OBJS)) \
 784 @SIM_ENABLE_ARCH_msp430_TRUE@   $(patsubst \
 785 @SIM_ENABLE_ARCH_msp430_TRUE@   %,msp430/dv-%.o,$(SIM_HW_DEVICES)) \
 786 @SIM_ENABLE_ARCH_msp430_TRUE@   msp430/msp430-sim.o \
 787 @SIM_ENABLE_ARCH_msp430_TRUE@   msp430/modules.o \
 788 @SIM_ENABLE_ARCH_msp430_TRUE@   msp430/sim-resume.o
 789 am_msp430_libsim_a_OBJECTS =
 790 msp430_libsim_a_OBJECTS = $(am_msp430_libsim_a_OBJECTS)
 791 or1k_libsim_a_AR = $(AR) $(ARFLAGS)
 792 @SIM_ENABLE_ARCH_or1k_TRUE@or1k_libsim_a_DEPENDENCIES =  \
 793 @SIM_ENABLE_ARCH_or1k_TRUE@     $(common_libcommon_a_OBJECTS) \
 794 @SIM_ENABLE_ARCH_or1k_TRUE@     $(patsubst \
 795 @SIM_ENABLE_ARCH_or1k_TRUE@     %,or1k/%,$(SIM_NEW_COMMON_OBJS)) \
 796 @SIM_ENABLE_ARCH_or1k_TRUE@     $(patsubst \
 797 @SIM_ENABLE_ARCH_or1k_TRUE@     %,or1k/dv-%.o,$(SIM_HW_DEVICES)) \
 798 @SIM_ENABLE_ARCH_or1k_TRUE@     or1k/modules.o or1k/cgen-accfp.o \
 799 @SIM_ENABLE_ARCH_or1k_TRUE@     or1k/cgen-fpu.o or1k/cgen-run.o \
 800 @SIM_ENABLE_ARCH_or1k_TRUE@     or1k/cgen-scache.o \
 801 @SIM_ENABLE_ARCH_or1k_TRUE@     or1k/cgen-trace.o or1k/cgen-utils.o \
 802 @SIM_ENABLE_ARCH_or1k_TRUE@     or1k/arch.o or1k/cpu.o \
 803 @SIM_ENABLE_ARCH_or1k_TRUE@     or1k/decode.o or1k/mloop.o \
 804 @SIM_ENABLE_ARCH_or1k_TRUE@     or1k/model.o or1k/sem.o or1k/or1k.o \
 805 @SIM_ENABLE_ARCH_or1k_TRUE@     or1k/sim-if.o or1k/traps.o
 806 am_or1k_libsim_a_OBJECTS =
 807 or1k_libsim_a_OBJECTS = $(am_or1k_libsim_a_OBJECTS)
 808 pru_libsim_a_AR = $(AR) $(ARFLAGS)
 809 @SIM_ENABLE_ARCH_pru_TRUE@pru_libsim_a_DEPENDENCIES =  \
 810 @SIM_ENABLE_ARCH_pru_TRUE@      $(common_libcommon_a_OBJECTS) \
 811 @SIM_ENABLE_ARCH_pru_TRUE@      $(patsubst \
 812 @SIM_ENABLE_ARCH_pru_TRUE@      %,pru/%,$(SIM_NEW_COMMON_OBJS)) \
 813 @SIM_ENABLE_ARCH_pru_TRUE@      $(patsubst \
 814 @SIM_ENABLE_ARCH_pru_TRUE@      %,pru/dv-%.o,$(SIM_HW_DEVICES)) \
 815 @SIM_ENABLE_ARCH_pru_TRUE@      pru/interp.o pru/modules.o \
 816 @SIM_ENABLE_ARCH_pru_TRUE@      pru/sim-resume.o
 817 am_pru_libsim_a_OBJECTS =
 818 pru_libsim_a_OBJECTS = $(am_pru_libsim_a_OBJECTS)
 819 riscv_libsim_a_AR = $(AR) $(ARFLAGS)
 820 @SIM_ENABLE_ARCH_riscv_TRUE@riscv_libsim_a_DEPENDENCIES =  \
 821 @SIM_ENABLE_ARCH_riscv_TRUE@    $(common_libcommon_a_OBJECTS) \
 822 @SIM_ENABLE_ARCH_riscv_TRUE@    $(patsubst \
 823 @SIM_ENABLE_ARCH_riscv_TRUE@    %,riscv/%,$(SIM_NEW_COMMON_OBJS)) \
 824 @SIM_ENABLE_ARCH_riscv_TRUE@    $(patsubst \
 825 @SIM_ENABLE_ARCH_riscv_TRUE@    %,riscv/dv-%.o,$(SIM_HW_DEVICES)) \
 826 @SIM_ENABLE_ARCH_riscv_TRUE@    riscv/interp.o riscv/machs.o \
 827 @SIM_ENABLE_ARCH_riscv_TRUE@    riscv/modules.o riscv/sim-main.o \
 828 @SIM_ENABLE_ARCH_riscv_TRUE@    riscv/sim-resume.o
 829 am_riscv_libsim_a_OBJECTS =
 830 riscv_libsim_a_OBJECTS = $(am_riscv_libsim_a_OBJECTS)
 831 rl78_libsim_a_AR = $(AR) $(ARFLAGS)
 832 @SIM_ENABLE_ARCH_rl78_TRUE@rl78_libsim_a_DEPENDENCIES =  \
 833 @SIM_ENABLE_ARCH_rl78_TRUE@     $(common_libcommon_a_OBJECTS) \
 834 @SIM_ENABLE_ARCH_rl78_TRUE@     rl78/load.o rl78/mem.o rl78/cpu.o \
 835 @SIM_ENABLE_ARCH_rl78_TRUE@     rl78/rl78.o rl78/gdb-if.o \
 836 @SIM_ENABLE_ARCH_rl78_TRUE@     rl78/modules.o rl78/trace.o
 837 am_rl78_libsim_a_OBJECTS =
 838 rl78_libsim_a_OBJECTS = $(am_rl78_libsim_a_OBJECTS)
 839 rx_libsim_a_AR = $(AR) $(ARFLAGS)
 840 @SIM_ENABLE_ARCH_rx_TRUE@rx_libsim_a_DEPENDENCIES =  \
 841 @SIM_ENABLE_ARCH_rx_TRUE@       $(common_libcommon_a_OBJECTS) \
 842 @SIM_ENABLE_ARCH_rx_TRUE@       rx/fpu.o rx/load.o rx/mem.o rx/misc.o \
 843 @SIM_ENABLE_ARCH_rx_TRUE@       rx/reg.o rx/rx.o rx/syscalls.o \
 844 @SIM_ENABLE_ARCH_rx_TRUE@       rx/trace.o rx/gdb-if.o rx/err.o \
 845 @SIM_ENABLE_ARCH_rx_TRUE@       rx/modules.o
 846 am_rx_libsim_a_OBJECTS =
 847 rx_libsim_a_OBJECTS = $(am_rx_libsim_a_OBJECTS)
 848 sh_libsim_a_AR = $(AR) $(ARFLAGS)
 849 @SIM_ENABLE_ARCH_sh_TRUE@sh_libsim_a_DEPENDENCIES =  \
 850 @SIM_ENABLE_ARCH_sh_TRUE@       $(common_libcommon_a_OBJECTS) \
 851 @SIM_ENABLE_ARCH_sh_TRUE@       sh/interp.o $(patsubst \
 852 @SIM_ENABLE_ARCH_sh_TRUE@       %,sh/%,$(SIM_NEW_COMMON_OBJS)) \
 853 @SIM_ENABLE_ARCH_sh_TRUE@       $(patsubst \
 854 @SIM_ENABLE_ARCH_sh_TRUE@       %,sh/dv-%.o,$(SIM_HW_DEVICES)) \
 855 @SIM_ENABLE_ARCH_sh_TRUE@       sh/modules.o sh/table.o
 856 am_sh_libsim_a_OBJECTS =
 857 sh_libsim_a_OBJECTS = $(am_sh_libsim_a_OBJECTS)
 858 v850_libsim_a_AR = $(AR) $(ARFLAGS)
 859 @SIM_ENABLE_ARCH_v850_TRUE@v850_libsim_a_DEPENDENCIES =  \
 860 @SIM_ENABLE_ARCH_v850_TRUE@     $(common_libcommon_a_OBJECTS) \
 861 @SIM_ENABLE_ARCH_v850_TRUE@     $(patsubst \
 862 @SIM_ENABLE_ARCH_v850_TRUE@     %,v850/%,$(SIM_NEW_COMMON_OBJS)) \
 863 @SIM_ENABLE_ARCH_v850_TRUE@     $(patsubst \
 864 @SIM_ENABLE_ARCH_v850_TRUE@     %,v850/dv-%.o,$(SIM_HW_DEVICES)) \
 865 @SIM_ENABLE_ARCH_v850_TRUE@     v850/simops.o v850/interp.o \
 866 @SIM_ENABLE_ARCH_v850_TRUE@     v850/itable.o v850/semantics.o \
 867 @SIM_ENABLE_ARCH_v850_TRUE@     v850/idecode.o v850/icache.o \
 868 @SIM_ENABLE_ARCH_v850_TRUE@     v850/engine.o v850/irun.o \
 869 @SIM_ENABLE_ARCH_v850_TRUE@     v850/support.o v850/modules.o \
 870 @SIM_ENABLE_ARCH_v850_TRUE@     v850/sim-resume.o
 871 am_v850_libsim_a_OBJECTS =
 872 v850_libsim_a_OBJECTS = $(am_v850_libsim_a_OBJECTS)
 873 @SIM_ENABLE_IGEN_TRUE@am__EXEEXT_1 = $(IGEN) igen/filter$(EXEEXT) \
 874 @SIM_ENABLE_IGEN_TRUE@  igen/gen$(EXEEXT) igen/ld-cache$(EXEEXT) \
 875 @SIM_ENABLE_IGEN_TRUE@  igen/ld-decode$(EXEEXT) \
 876 @SIM_ENABLE_IGEN_TRUE@  igen/ld-insn$(EXEEXT) \
 877 @SIM_ENABLE_IGEN_TRUE@  igen/table$(EXEEXT)
 878 @SIM_ENABLE_IGEN_TRUE@am__EXEEXT_2 = $(am__EXEEXT_1)
 879 @SIM_ENABLE_ARCH_cr16_TRUE@am__EXEEXT_3 = cr16/gencode$(EXEEXT)
 880 @SIM_ENABLE_ARCH_d10v_TRUE@am__EXEEXT_4 = d10v/gencode$(EXEEXT)
 881 @SIM_ENABLE_ARCH_m32c_TRUE@am__EXEEXT_5 = m32c/opc2c$(EXEEXT)
 882 @SIM_ENABLE_ARCH_m68hc11_TRUE@am__EXEEXT_6 = m68hc11/gencode$(EXEEXT)
 883 @SIM_ENABLE_ARCH_sh_TRUE@am__EXEEXT_7 = sh/gencode$(EXEEXT)
 884 am__EXEEXT_8 = testsuite/common/bits32m0$(EXEEXT) \
 885         testsuite/common/bits32m31$(EXEEXT) \
 886         testsuite/common/bits64m0$(EXEEXT) \
 887         testsuite/common/bits64m63$(EXEEXT) \
 888         testsuite/common/alu-tst$(EXEEXT)
 889 @SIM_ENABLE_ARCH_cris_TRUE@am__EXEEXT_9 = cris/rvdummy$(EXEEXT)
 890 @SIM_ENABLE_ARCH_aarch64_TRUE@am__EXEEXT_10 = aarch64/run$(EXEEXT)
 891 @SIM_ENABLE_ARCH_arm_TRUE@am__EXEEXT_11 = arm/run$(EXEEXT)
 892 @SIM_ENABLE_ARCH_avr_TRUE@am__EXEEXT_12 = avr/run$(EXEEXT)
 893 @SIM_ENABLE_ARCH_bfin_TRUE@am__EXEEXT_13 = bfin/run$(EXEEXT)
 894 @SIM_ENABLE_ARCH_bpf_TRUE@am__EXEEXT_14 = bpf/run$(EXEEXT)
 895 @SIM_ENABLE_ARCH_cr16_TRUE@am__EXEEXT_15 = cr16/run$(EXEEXT)
 896 @SIM_ENABLE_ARCH_cris_TRUE@am__EXEEXT_16 = cris/run$(EXEEXT)
 897 @SIM_ENABLE_ARCH_d10v_TRUE@am__EXEEXT_17 = d10v/run$(EXEEXT)
 898 @SIM_ENABLE_ARCH_erc32_TRUE@am__EXEEXT_18 = erc32/run$(EXEEXT) \
 899 @SIM_ENABLE_ARCH_erc32_TRUE@    erc32/sis$(EXEEXT)
 900 @SIM_ENABLE_ARCH_examples_TRUE@am__EXEEXT_19 =  \
 901 @SIM_ENABLE_ARCH_examples_TRUE@ example-synacor/run$(EXEEXT)
 902 @SIM_ENABLE_ARCH_frv_TRUE@am__EXEEXT_20 = frv/run$(EXEEXT)
 903 @SIM_ENABLE_ARCH_ft32_TRUE@am__EXEEXT_21 = ft32/run$(EXEEXT)
 904 @SIM_ENABLE_ARCH_h8300_TRUE@am__EXEEXT_22 = h8300/run$(EXEEXT)
 905 @SIM_ENABLE_ARCH_iq2000_TRUE@am__EXEEXT_23 = iq2000/run$(EXEEXT)
 906 @SIM_ENABLE_ARCH_lm32_TRUE@am__EXEEXT_24 = lm32/run$(EXEEXT)
 907 @SIM_ENABLE_ARCH_m32c_TRUE@am__EXEEXT_25 = m32c/run$(EXEEXT)
 908 @SIM_ENABLE_ARCH_m32r_TRUE@am__EXEEXT_26 = m32r/run$(EXEEXT)
 909 @SIM_ENABLE_ARCH_m68hc11_TRUE@am__EXEEXT_27 = m68hc11/run$(EXEEXT)
 910 @SIM_ENABLE_ARCH_mcore_TRUE@am__EXEEXT_28 = mcore/run$(EXEEXT)
 911 @SIM_ENABLE_ARCH_microblaze_TRUE@am__EXEEXT_29 =  \
 912 @SIM_ENABLE_ARCH_microblaze_TRUE@       microblaze/run$(EXEEXT)
 913 @SIM_ENABLE_ARCH_mips_TRUE@am__EXEEXT_30 = mips/run$(EXEEXT)
 914 @SIM_ENABLE_ARCH_mn10300_TRUE@am__EXEEXT_31 = mn10300/run$(EXEEXT)
 915 @SIM_ENABLE_ARCH_moxie_TRUE@am__EXEEXT_32 = moxie/run$(EXEEXT)
 916 @SIM_ENABLE_ARCH_msp430_TRUE@am__EXEEXT_33 = msp430/run$(EXEEXT)
 917 @SIM_ENABLE_ARCH_or1k_TRUE@am__EXEEXT_34 = or1k/run$(EXEEXT)
 918 @SIM_ENABLE_ARCH_ppc_TRUE@am__EXEEXT_35 = ppc/run$(EXEEXT) \
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1235         $(v850_run_SOURCES)
1236 RECURSIVE_TARGETS = all-recursive check-recursive cscopelist-recursive \
1237         ctags-recursive dvi-recursive html-recursive info-recursive \
1238         install-data-recursive install-dvi-recursive \
1239         install-exec-recursive install-html-recursive \
1240         install-info-recursive install-pdf-recursive \
1241         install-ps-recursive install-recursive installcheck-recursive \
1242         installdirs-recursive pdf-recursive ps-recursive \
1243         tags-recursive uninstall-recursive
1244 am__can_run_installinfo = \
1245   case $$AM_UPDATE_INFO_DIR in \
1246     n|no|NO) false;; \
1247     *) (install-info --version) >/dev/null 2>&1;; \
1248   esac
1249 am__vpath_adj_setup = srcdirstrip=`echo "$(srcdir)" | sed 's|.|.|g'`;
1250 am__vpath_adj = case $$p in \
1251     $(srcdir)/*) f=`echo "$$p" | sed "s|^$$srcdirstrip/||"`;; \
1252     *) f=$$p;; \
1253   esac;
1254 am__strip_dir = f=`echo $$p | sed -e 's|^.*/||'`;
1255 am__install_max = 40
1256 am__nobase_strip_setup = \
1257   srcdirstrip=`echo "$(srcdir)" | sed 's/[].[^$$\\*|]/\\\\&/g'`
1258 am__nobase_strip = \
1259   for p in $$list; do echo "$$p"; done | sed -e "s|$$srcdirstrip/||"
1260 am__nobase_list = $(am__nobase_strip_setup); \
1261   for p in $$list; do echo "$$p $$p"; done | \
1262   sed "s| $$srcdirstrip/| |;"' / .*\//!s/ .*/ ./; s,\( .*\)/[^/]*$$,\1,' | \
1263   $(AWK) 'BEGIN { files["."] = "" } { files[$$2] = files[$$2] " " $$1; \
1264     if (++n[$$2] == $(am__install_max)) \
1265       { print $$2, files[$$2]; n[$$2] = 0; files[$$2] = "" } } \
1266     END { for (dir in files) print dir, files[dir] }'
1267 am__base_list = \
1268   sed '$$!N;$$!N;$$!N;$$!N;$$!N;$$!N;$$!N;s/\n/ /g' | \
1269   sed '$$!N;$$!N;$$!N;$$!N;s/\n/ /g'
1270 am__uninstall_files_from_dir = { \
1271   test -z "$$files" \
1272     || { test ! -d "$$dir" && test ! -f "$$dir" && test ! -r "$$dir"; } \
1273     || { echo " ( cd '$$dir' && rm -f" $$files ")"; \
1274          $(am__cd) "$$dir" && rm -f $$files; }; \
1275   }
1276 am__installdirs = "$(DESTDIR)$(armdocdir)" "$(DESTDIR)$(dtbdir)" \
1277         "$(DESTDIR)$(erc32docdir)" "$(DESTDIR)$(frvdocdir)" \
1278         "$(DESTDIR)$(or1kdocdir)" "$(DESTDIR)$(ppcdocdir)" \
1279         "$(DESTDIR)$(rxdocdir)" "$(DESTDIR)$(pkgincludedir)"
1280 DATA = $(armdoc_DATA) $(dtb_DATA) $(erc32doc_DATA) $(frvdoc_DATA) \
1281         $(or1kdoc_DATA) $(ppcdoc_DATA) $(rxdoc_DATA)
1282 am__pkginclude_HEADERS_DIST = $(srcroot)/include/sim/callback.h \
1283         $(srcroot)/include/sim/sim.h
1284 HEADERS = $(pkginclude_HEADERS)
1285 RECURSIVE_CLEAN_TARGETS = mostlyclean-recursive clean-recursive \
1286   distclean-recursive maintainer-clean-recursive
1287 am__recursive_targets = \
1288   $(RECURSIVE_TARGETS) \
1289   $(RECURSIVE_CLEAN_TARGETS) \
1290   $(am__extra_recursive_targets)
1291 AM_RECURSIVE_TARGETS = $(am__recursive_targets:-recursive=) TAGS CTAGS \
1292         cscope check recheck
1293 am__tagged_files = $(HEADERS) $(SOURCES) $(TAGS_FILES) \
1294         $(LISP)config.h.in
1295 # Read a list of newline-separated strings from the standard input,
1296 # and print each of them once, without duplicates.  Input order is
1297 # *not* preserved.
1298 am__uniquify_input = $(AWK) '\
1299   BEGIN { nonempty = 0; } \
1300   { items[$$0] = 1; nonempty = 1; } \
1301   END { if (nonempty) { for (i in items) print i; }; } \
1302 '
1303 # Make sure the list of sources is unique.  This is necessary because,
1304 # e.g., the same source file might be shared among _SOURCES variables
1305 # for different programs/libraries.
1306 am__define_uniq_tagged_files = \
1307   list='$(am__tagged_files)'; \
1308   unique=`for i in $$list; do \
1309     if test -f "$$i"; then echo $$i; else echo $(srcdir)/$$i; fi; \
1310   done | $(am__uniquify_input)`
1311 ETAGS = etags
1312 CTAGS = ctags
1313 CSCOPE = cscope
1314 DEJATOOL = $(PACKAGE)
1315 RUNTESTDEFAULTFLAGS = --tool $$tool --srcdir $$srcdir
1316 EXPECT = expect
1317 RUNTEST = runtest
1318 am__tty_colors_dummy = \
1319   mgn= red= grn= lgn= blu= brg= std=; \
1320   am__color_tests=no
1321 am__tty_colors = { \
1322   $(am__tty_colors_dummy); \
1323   if test "X$(AM_COLOR_TESTS)" = Xno; then \
1324     am__color_tests=no; \
1325   elif test "X$(AM_COLOR_TESTS)" = Xalways; then \
1326     am__color_tests=yes; \
1327   elif test "X$$TERM" != Xdumb && { test -t 1; } 2>/dev/null; then \
1328     am__color_tests=yes; \
1329   fi; \
1330   if test $$am__color_tests = yes; then \
1331     red='\e[0;31m'; \
1332     grn='\e[0;32m'; \
1333     lgn='\e[1;32m'; \
1334     blu='\e[1;34m'; \
1335     mgn='\e[0;35m'; \
1336     brg='\e[1m'; \
1337     std='\e[m'; \
1338   fi; \
1339 }
1340 am__recheck_rx = ^[     ]*:recheck:[    ]*
1341 am__global_test_result_rx = ^[  ]*:global-test-result:[         ]*
1342 am__copy_in_global_log_rx = ^[  ]*:copy-in-global-log:[         ]*
1343 # A command that, given a newline-separated list of test names on the
1344 # standard input, print the name of the tests that are to be re-run
1345 # upon "make recheck".
1346 am__list_recheck_tests = $(AWK) '{ \
1347   recheck = 1; \
1348   while ((rc = (getline line < ($$0 ".trs"))) != 0) \
1349     { \
1350       if (rc < 0) \
1351         { \
1352           if ((getline line2 < ($$0 ".log")) < 0) \
1353             recheck = 0; \
1354           break; \
1355         } \
1356       else if (line ~ /$(am__recheck_rx)[nN][Oo]/) \
1357         { \
1358           recheck = 0; \
1359           break; \
1360         } \
1361       else if (line ~ /$(am__recheck_rx)[yY][eE][sS]/) \
1362         { \
1363           break; \
1364         } \
1365     }; \
1366   if (recheck) \
1367     print $$0; \
1368   close ($$0 ".trs"); \
1369   close ($$0 ".log"); \
1370 }'
1371 # A command that, given a newline-separated list of test names on the
1372 # standard input, create the global log from their .trs and .log files.
1373 am__create_global_log = $(AWK) ' \
1374 function fatal(msg) \
1375 { \
1376   print "fatal: making $@: " msg | "cat >&2"; \
1377   exit 1; \
1378 } \
1379 function rst_section(header) \
1380 { \
1381   print header; \
1382   len = length(header); \
1383   for (i = 1; i <= len; i = i + 1) \
1384     printf "="; \
1385   printf "\n\n"; \
1386 } \
1387 { \
1388   copy_in_global_log = 1; \
1389   global_test_result = "RUN"; \
1390   while ((rc = (getline line < ($$0 ".trs"))) != 0) \
1391     { \
1392       if (rc < 0) \
1393          fatal("failed to read from " $$0 ".trs"); \
1394       if (line ~ /$(am__global_test_result_rx)/) \
1395         { \
1396           sub("$(am__global_test_result_rx)", "", line); \
1397           sub("[        ]*$$", "", line); \
1398           global_test_result = line; \
1399         } \
1400       else if (line ~ /$(am__copy_in_global_log_rx)[nN][oO]/) \
1401         copy_in_global_log = 0; \
1402     }; \
1403   if (copy_in_global_log) \
1404     { \
1405       rst_section(global_test_result ": " $$0); \
1406       while ((rc = (getline line < ($$0 ".log"))) != 0) \
1407       { \
1408         if (rc < 0) \
1409           fatal("failed to read from " $$0 ".log"); \
1410         print line; \
1411       }; \
1412       printf "\n"; \
1413     }; \
1414   close ($$0 ".trs"); \
1415   close ($$0 ".log"); \
1416 }'
1417 # Restructured Text title.
1418 am__rst_title = { sed 's/.*/   &   /;h;s/./=/g;p;x;s/ *$$//;p;g' && echo; }
1419 # Solaris 10 'make', and several other traditional 'make' implementations,
1420 # pass "-e" to $(SHELL), and POSIX 2008 even requires this.  Work around it
1421 # by disabling -e (using the XSI extension "set +e") if it's set.
1422 am__sh_e_setup = case $$- in *e*) set +e;; esac
1423 # Default flags passed to test drivers.
1424 am__common_driver_flags = \
1425   --color-tests "$$am__color_tests" \
1426   --enable-hard-errors "$$am__enable_hard_errors" \
1427   --expect-failure "$$am__expect_failure"
1428 # To be inserted before the command running the test.  Creates the
1429 # directory for the log if needed.  Stores in $dir the directory
1430 # containing $f, in $tst the test, in $log the log.  Executes the
1431 # developer- defined test setup AM_TESTS_ENVIRONMENT (if any), and
1432 # passes TESTS_ENVIRONMENT.  Set up options for the wrapper that
1433 # will run the test scripts (or their associated LOG_COMPILER, if
1434 # thy have one).
1435 am__check_pre = \
1436 $(am__sh_e_setup);                                      \
1437 $(am__vpath_adj_setup) $(am__vpath_adj)                 \
1438 $(am__tty_colors);                                      \
1439 srcdir=$(srcdir); export srcdir;                        \
1440 case "$@" in                                            \
1441   */*) am__odir=`echo "./$@" | sed 's|/[^/]*$$||'`;;    \
1442     *) am__odir=.;;                                     \
1443 esac;                                                   \
1444 test "x$$am__odir" = x"." || test -d "$$am__odir"       \
1445   || $(MKDIR_P) "$$am__odir" || exit $$?;               \
1446 if test -f "./$$f"; then dir=./;                        \
1447 elif test -f "$$f"; then dir=;                          \
1448 else dir="$(srcdir)/"; fi;                              \
1449 tst=$$dir$$f; log='$@';                                 \
1450 if test -n '$(DISABLE_HARD_ERRORS)'; then               \
1451   am__enable_hard_errors=no;                            \
1452 else                                                    \
1453   am__enable_hard_errors=yes;                           \
1454 fi;                                                     \
1455 case " $(XFAIL_TESTS) " in                              \
1456   *[\ \ ]$$f[\ \        ]* | *[\ \      ]$$dir$$f[\ \   ]*) \
1457     am__expect_failure=yes;;                            \
1458   *)                                                    \
1459     am__expect_failure=no;;                             \
1460 esac;                                                   \
1461 $(AM_TESTS_ENVIRONMENT) $(TESTS_ENVIRONMENT)
1462 # A shell command to get the names of the tests scripts with any registered
1463 # extension removed (i.e., equivalently, the names of the test logs, with
1464 # the '.log' extension removed).  The result is saved in the shell variable
1465 # '$bases'.  This honors runtime overriding of TESTS and TEST_LOGS.  Sadly,
1466 # we cannot use something simpler, involving e.g., "$(TEST_LOGS:.log=)",
1467 # since that might cause problem with VPATH rewrites for suffix-less tests.
1468 # See also 'test-harness-vpath-rewrite.sh' and 'test-trs-basic.sh'.
1469 am__set_TESTS_bases = \
1470   bases='$(TEST_LOGS)'; \
1471   bases=`for i in $$bases; do echo $$i; done | sed 's/\.log$$//'`; \
1472   bases=`echo $$bases`
1473 RECHECK_LOGS = $(TEST_LOGS)
1474 TEST_SUITE_LOG = test-suite.log
1475 TEST_EXTENSIONS = @EXEEXT@ .test
1476 LOG_DRIVER = $(SHELL) $(top_srcdir)/../test-driver
1477 LOG_COMPILE = $(LOG_COMPILER) $(AM_LOG_FLAGS) $(LOG_FLAGS)
1478 am__set_b = \
1479   case '$@' in \
1480     */*) \
1481       case '$*' in \
1482         */*) b='$*';; \
1483           *) b=`echo '$@' | sed 's/\.log$$//'`; \
1484        esac;; \
1485     *) \
1486       b='$*';; \
1487   esac
1488 am__test_logs1 = $(TESTS:=.log)
1489 am__test_logs2 = $(am__test_logs1:@EXEEXT@.log=.log)
1490 TEST_LOGS = $(am__test_logs2:.test.log=.log)
1491 TEST_LOG_DRIVER = $(SHELL) $(top_srcdir)/../test-driver
1492 TEST_LOG_COMPILE = $(TEST_LOG_COMPILER) $(AM_TEST_LOG_FLAGS) \
1493         $(TEST_LOG_FLAGS)
1494 DIST_SUBDIRS = $(SUBDIRS)
1495 ACLOCAL = @ACLOCAL@
1496 AMTAR = @AMTAR@
1497 AM_DEFAULT_VERBOSITY = @AM_DEFAULT_VERBOSITY@
1498 AR = @AR@
1499 AR_FOR_BUILD = @AR_FOR_BUILD@
1500 AS_FOR_TARGET = @AS_FOR_TARGET@
1501 AS_FOR_TARGET_AARCH64 = @AS_FOR_TARGET_AARCH64@
1502 AS_FOR_TARGET_ARM = @AS_FOR_TARGET_ARM@
1503 AS_FOR_TARGET_AVR = @AS_FOR_TARGET_AVR@
1504 AS_FOR_TARGET_BFIN = @AS_FOR_TARGET_BFIN@
1505 AS_FOR_TARGET_BPF = @AS_FOR_TARGET_BPF@
1506 AS_FOR_TARGET_CR16 = @AS_FOR_TARGET_CR16@
1507 AS_FOR_TARGET_CRIS = @AS_FOR_TARGET_CRIS@
1508 AS_FOR_TARGET_D10V = @AS_FOR_TARGET_D10V@
1509 AS_FOR_TARGET_ERC32 = @AS_FOR_TARGET_ERC32@
1510 AS_FOR_TARGET_EXAMPLE_SYNACOR = @AS_FOR_TARGET_EXAMPLE_SYNACOR@
1511 AS_FOR_TARGET_FRV = @AS_FOR_TARGET_FRV@
1512 AS_FOR_TARGET_FT32 = @AS_FOR_TARGET_FT32@
1513 AS_FOR_TARGET_H8300 = @AS_FOR_TARGET_H8300@
1514 AS_FOR_TARGET_IQ2000 = @AS_FOR_TARGET_IQ2000@
1515 AS_FOR_TARGET_LM32 = @AS_FOR_TARGET_LM32@
1516 AS_FOR_TARGET_M32C = @AS_FOR_TARGET_M32C@
1517 AS_FOR_TARGET_M32R = @AS_FOR_TARGET_M32R@
1518 AS_FOR_TARGET_M68HC11 = @AS_FOR_TARGET_M68HC11@
1519 AS_FOR_TARGET_MCORE = @AS_FOR_TARGET_MCORE@
1520 AS_FOR_TARGET_MICROBLAZE = @AS_FOR_TARGET_MICROBLAZE@
1521 AS_FOR_TARGET_MIPS = @AS_FOR_TARGET_MIPS@
1522 AS_FOR_TARGET_MN10300 = @AS_FOR_TARGET_MN10300@
1523 AS_FOR_TARGET_MOXIE = @AS_FOR_TARGET_MOXIE@
1524 AS_FOR_TARGET_MSP430 = @AS_FOR_TARGET_MSP430@
1525 AS_FOR_TARGET_OR1K = @AS_FOR_TARGET_OR1K@
1526 AS_FOR_TARGET_PPC = @AS_FOR_TARGET_PPC@
1527 AS_FOR_TARGET_PRU = @AS_FOR_TARGET_PRU@
1528 AS_FOR_TARGET_RISCV = @AS_FOR_TARGET_RISCV@
1529 AS_FOR_TARGET_RL78 = @AS_FOR_TARGET_RL78@
1530 AS_FOR_TARGET_RX = @AS_FOR_TARGET_RX@
1531 AS_FOR_TARGET_SH = @AS_FOR_TARGET_SH@
1532 AS_FOR_TARGET_V850 = @AS_FOR_TARGET_V850@
1533 AUTOCONF = @AUTOCONF@
1534 AUTOHEADER = @AUTOHEADER@
1535 AUTOMAKE = @AUTOMAKE@
1536 AWK = @AWK@
1537 CC = @CC@
1538 CCDEPMODE = @CCDEPMODE@
1539 CC_FOR_BUILD = @CC_FOR_BUILD@
1540 CC_FOR_TARGET = @CC_FOR_TARGET@
1541 CC_FOR_TARGET_AARCH64 = @CC_FOR_TARGET_AARCH64@
1542 CC_FOR_TARGET_ARM = @CC_FOR_TARGET_ARM@
1543 CC_FOR_TARGET_AVR = @CC_FOR_TARGET_AVR@
1544 CC_FOR_TARGET_BFIN = @CC_FOR_TARGET_BFIN@
1545 CC_FOR_TARGET_BPF = @CC_FOR_TARGET_BPF@
1546 CC_FOR_TARGET_CR16 = @CC_FOR_TARGET_CR16@
1547 CC_FOR_TARGET_CRIS = @CC_FOR_TARGET_CRIS@
1548 CC_FOR_TARGET_D10V = @CC_FOR_TARGET_D10V@
1549 CC_FOR_TARGET_ERC32 = @CC_FOR_TARGET_ERC32@
1550 CC_FOR_TARGET_EXAMPLE_SYNACOR = @CC_FOR_TARGET_EXAMPLE_SYNACOR@
1551 CC_FOR_TARGET_FRV = @CC_FOR_TARGET_FRV@
1552 CC_FOR_TARGET_FT32 = @CC_FOR_TARGET_FT32@
1553 CC_FOR_TARGET_H8300 = @CC_FOR_TARGET_H8300@
1554 CC_FOR_TARGET_IQ2000 = @CC_FOR_TARGET_IQ2000@
1555 CC_FOR_TARGET_LM32 = @CC_FOR_TARGET_LM32@
1556 CC_FOR_TARGET_M32C = @CC_FOR_TARGET_M32C@
1557 CC_FOR_TARGET_M32R = @CC_FOR_TARGET_M32R@
1558 CC_FOR_TARGET_M68HC11 = @CC_FOR_TARGET_M68HC11@
1559 CC_FOR_TARGET_MCORE = @CC_FOR_TARGET_MCORE@
1560 CC_FOR_TARGET_MICROBLAZE = @CC_FOR_TARGET_MICROBLAZE@
1561 CC_FOR_TARGET_MIPS = @CC_FOR_TARGET_MIPS@
1562 CC_FOR_TARGET_MN10300 = @CC_FOR_TARGET_MN10300@
1563 CC_FOR_TARGET_MOXIE = @CC_FOR_TARGET_MOXIE@
1564 CC_FOR_TARGET_MSP430 = @CC_FOR_TARGET_MSP430@
1565 CC_FOR_TARGET_OR1K = @CC_FOR_TARGET_OR1K@
1566 CC_FOR_TARGET_PPC = @CC_FOR_TARGET_PPC@
1567 CC_FOR_TARGET_PRU = @CC_FOR_TARGET_PRU@
1568 CC_FOR_TARGET_RISCV = @CC_FOR_TARGET_RISCV@
1569 CC_FOR_TARGET_RL78 = @CC_FOR_TARGET_RL78@
1570 CC_FOR_TARGET_RX = @CC_FOR_TARGET_RX@
1571 CC_FOR_TARGET_SH = @CC_FOR_TARGET_SH@
1572 CC_FOR_TARGET_V850 = @CC_FOR_TARGET_V850@
1573 CFLAGS = @CFLAGS@
1574 CFLAGS_FOR_BUILD = @CFLAGS_FOR_BUILD@
1575 CGEN_MAINT = @CGEN_MAINT@
1576 CPP = @CPP@
1577 CPPFLAGS = @CPPFLAGS@
1578 CPPFLAGS_FOR_BUILD = @CPPFLAGS_FOR_BUILD@
1579 CYGPATH_W = @CYGPATH_W@
1580 C_DIALECT = @C_DIALECT@
1581 DEFS = @DEFS@
1582 DEPDIR = @DEPDIR@
1583 DSYMUTIL = @DSYMUTIL@
1584 DTC = @DTC@
1585 DUMPBIN = @DUMPBIN@
1586 ECHO_C = @ECHO_C@
1587 ECHO_N = @ECHO_N@
1588 ECHO_T = @ECHO_T@
1589 EGREP = @EGREP@
1590 EXEEXT = @EXEEXT@
1591 FGREP = @FGREP@
1592 GREP = @GREP@
1593 IGEN_FLAGS_SMP = @IGEN_FLAGS_SMP@
1594 INSTALL = @INSTALL@
1595 INSTALL_DATA = @INSTALL_DATA@
1596 INSTALL_PROGRAM = @INSTALL_PROGRAM@
1597 INSTALL_SCRIPT = @INSTALL_SCRIPT@
1598 INSTALL_STRIP_PROGRAM = @INSTALL_STRIP_PROGRAM@
1599 LD = @LD@
1600 LDFLAGS = @LDFLAGS@
1601 LDFLAGS_FOR_BUILD = @LDFLAGS_FOR_BUILD@
1602 LD_FOR_TARGET = @LD_FOR_TARGET@
1603 LD_FOR_TARGET_AARCH64 = @LD_FOR_TARGET_AARCH64@
1604 LD_FOR_TARGET_ARM = @LD_FOR_TARGET_ARM@
1605 LD_FOR_TARGET_AVR = @LD_FOR_TARGET_AVR@
1606 LD_FOR_TARGET_BFIN = @LD_FOR_TARGET_BFIN@
1607 LD_FOR_TARGET_BPF = @LD_FOR_TARGET_BPF@
1608 LD_FOR_TARGET_CR16 = @LD_FOR_TARGET_CR16@
1609 LD_FOR_TARGET_CRIS = @LD_FOR_TARGET_CRIS@
1610 LD_FOR_TARGET_D10V = @LD_FOR_TARGET_D10V@
1611 LD_FOR_TARGET_ERC32 = @LD_FOR_TARGET_ERC32@
1612 LD_FOR_TARGET_EXAMPLE_SYNACOR = @LD_FOR_TARGET_EXAMPLE_SYNACOR@
1613 LD_FOR_TARGET_FRV = @LD_FOR_TARGET_FRV@
1614 LD_FOR_TARGET_FT32 = @LD_FOR_TARGET_FT32@
1615 LD_FOR_TARGET_H8300 = @LD_FOR_TARGET_H8300@
1616 LD_FOR_TARGET_IQ2000 = @LD_FOR_TARGET_IQ2000@
1617 LD_FOR_TARGET_LM32 = @LD_FOR_TARGET_LM32@
1618 LD_FOR_TARGET_M32C = @LD_FOR_TARGET_M32C@
1619 LD_FOR_TARGET_M32R = @LD_FOR_TARGET_M32R@
1620 LD_FOR_TARGET_M68HC11 = @LD_FOR_TARGET_M68HC11@
1621 LD_FOR_TARGET_MCORE = @LD_FOR_TARGET_MCORE@
1622 LD_FOR_TARGET_MICROBLAZE = @LD_FOR_TARGET_MICROBLAZE@
1623 LD_FOR_TARGET_MIPS = @LD_FOR_TARGET_MIPS@
1624 LD_FOR_TARGET_MN10300 = @LD_FOR_TARGET_MN10300@
1625 LD_FOR_TARGET_MOXIE = @LD_FOR_TARGET_MOXIE@
1626 LD_FOR_TARGET_MSP430 = @LD_FOR_TARGET_MSP430@
1627 LD_FOR_TARGET_OR1K = @LD_FOR_TARGET_OR1K@
1628 LD_FOR_TARGET_PPC = @LD_FOR_TARGET_PPC@
1629 LD_FOR_TARGET_PRU = @LD_FOR_TARGET_PRU@
1630 LD_FOR_TARGET_RISCV = @LD_FOR_TARGET_RISCV@
1631 LD_FOR_TARGET_RL78 = @LD_FOR_TARGET_RL78@
1632 LD_FOR_TARGET_RX = @LD_FOR_TARGET_RX@
1633 LD_FOR_TARGET_SH = @LD_FOR_TARGET_SH@
1634 LD_FOR_TARGET_V850 = @LD_FOR_TARGET_V850@
1635 LIBOBJS = @LIBOBJS@
1636 LIBS = @LIBS@
1637 LIBTOOL = @LIBTOOL@
1638 LIPO = @LIPO@
1639 LN_S = @LN_S@
1640 LTLIBOBJS = @LTLIBOBJS@
1641 MAINT = @MAINT@
1642 MAKEINFO = @MAKEINFO@
1643 MKDIR_P = @MKDIR_P@
1644 NM = @NM@
1645 NMEDIT = @NMEDIT@
1646 OBJDUMP = @OBJDUMP@
1647 OBJEXT = @OBJEXT@
1648 OTOOL = @OTOOL@
1649 OTOOL64 = @OTOOL64@
1650 PACKAGE = @PACKAGE@
1651 PACKAGE_BUGREPORT = @PACKAGE_BUGREPORT@
1652 PACKAGE_NAME = @PACKAGE_NAME@
1653 PACKAGE_STRING = @PACKAGE_STRING@
1654 PACKAGE_TARNAME = @PACKAGE_TARNAME@
1655 PACKAGE_URL = @PACKAGE_URL@
1656 PACKAGE_VERSION = @PACKAGE_VERSION@
1657 PATH_SEPARATOR = @PATH_SEPARATOR@
1658 PKGVERSION = @PKGVERSION@
1659 PKG_CONFIG = @PKG_CONFIG@
1660 PKG_CONFIG_LIBDIR = @PKG_CONFIG_LIBDIR@
1661 PKG_CONFIG_PATH = @PKG_CONFIG_PATH@
1662 RANLIB = @RANLIB@
1663 RANLIB_FOR_BUILD = @RANLIB_FOR_BUILD@
1664 READLINE_CFLAGS = @READLINE_CFLAGS@
1665 READLINE_LIB = @READLINE_LIB@
1666 REPORT_BUGS_TEXI = @REPORT_BUGS_TEXI@
1667 REPORT_BUGS_TO = @REPORT_BUGS_TO@
1668 SDL_CFLAGS = @SDL_CFLAGS@
1669 SDL_LIBS = @SDL_LIBS@
1670 SED = @SED@
1671 SET_MAKE = @SET_MAKE@
1672 SHELL = @SHELL@
1673 SIM_COMMON_BUILD_FALSE = @SIM_COMMON_BUILD_FALSE@
1674 SIM_COMMON_BUILD_TRUE = @SIM_COMMON_BUILD_TRUE@
1675 SIM_ENABLED_ARCHES = @SIM_ENABLED_ARCHES@
1676 SIM_FRV_TRAPDUMP_FLAGS = @SIM_FRV_TRAPDUMP_FLAGS@
1677 SIM_HW_CFLAGS = @SIM_HW_CFLAGS@
1678 SIM_HW_SOCKSER = @SIM_HW_SOCKSER@
1679 SIM_INLINE = @SIM_INLINE@
1680 SIM_MIPS_BITSIZE = @SIM_MIPS_BITSIZE@
1681 SIM_MIPS_FPU_BITSIZE = @SIM_MIPS_FPU_BITSIZE@
1682 SIM_MIPS_GEN = @SIM_MIPS_GEN@
1683 SIM_MIPS_IGEN_ITABLE_FLAGS = @SIM_MIPS_IGEN_ITABLE_FLAGS@
1684 SIM_MIPS_M16_FLAGS = @SIM_MIPS_M16_FLAGS@
1685 SIM_MIPS_MULTI_IGEN_CONFIGS = @SIM_MIPS_MULTI_IGEN_CONFIGS@
1686 SIM_MIPS_MULTI_OBJ = @SIM_MIPS_MULTI_OBJ@
1687 SIM_MIPS_MULTI_SRC = @SIM_MIPS_MULTI_SRC@
1688 SIM_MIPS_SINGLE_FLAGS = @SIM_MIPS_SINGLE_FLAGS@
1689 SIM_MIPS_SUBTARGET = @SIM_MIPS_SUBTARGET@
1690 SIM_PRIMARY_TARGET = @SIM_PRIMARY_TARGET@
1691 SIM_RISCV_BITSIZE = @SIM_RISCV_BITSIZE@
1692 SIM_RX_CYCLE_ACCURATE_FLAGS = @SIM_RX_CYCLE_ACCURATE_FLAGS@
1693 SIM_SUBDIRS = @SIM_SUBDIRS@
1694 SIM_TOOLCHAIN_VARS = @SIM_TOOLCHAIN_VARS@
1695 STRIP = @STRIP@
1696 TERMCAP_LIB = @TERMCAP_LIB@
1697 VERSION = @VERSION@
1698 WARN_CFLAGS = @WARN_CFLAGS@
1699 WERROR_CFLAGS = @WERROR_CFLAGS@
1700 abs_builddir = @abs_builddir@
1701 abs_srcdir = @abs_srcdir@
1702 abs_top_builddir = @abs_top_builddir@
1703 abs_top_srcdir = @abs_top_srcdir@
1704 ac_ct_CC = @ac_ct_CC@
1705 ac_ct_DUMPBIN = @ac_ct_DUMPBIN@
1706 am__include = @am__include@
1707 am__leading_dot = @am__leading_dot@
1708 am__quote = @am__quote@
1709 am__tar = @am__tar@
1710 am__untar = @am__untar@
1711 bindir = @bindir@
1712 build = @build@
1713 build_alias = @build_alias@
1714 build_cpu = @build_cpu@
1715 build_os = @build_os@
1716 build_vendor = @build_vendor@
1717 builddir = @builddir@
1718 cgen = @cgen@
1719 cgendir = @cgendir@
1720 datadir = @datadir@
1721 datarootdir = @datarootdir@
1722 docdir = @docdir@
1723 dvidir = @dvidir@
1724 exec_prefix = @exec_prefix@
1725 host = @host@
1726 host_alias = @host_alias@
1727 host_cpu = @host_cpu@
1728 host_os = @host_os@
1729 host_vendor = @host_vendor@
1730 htmldir = @htmldir@
1731 includedir = @includedir@
1732 infodir = @infodir@
1733 install_sh = @install_sh@
1734 libdir = @libdir@
1735 libexecdir = @libexecdir@
1736 localedir = @localedir@
1737 localstatedir = @localstatedir@
1738 mandir = @mandir@
1739 mkdir_p = @mkdir_p@
1740 oldincludedir = @oldincludedir@
1741 pdfdir = @pdfdir@
1742 prefix = @prefix@
1743 program_transform_name = @program_transform_name@
1744 psdir = @psdir@
1745 sbindir = @sbindir@
1746 sharedstatedir = @sharedstatedir@
1747 sim_bitsize = @sim_bitsize@
1748 sim_float = @sim_float@
1749 srcdir = @srcdir@
1750 subdirs = @subdirs@
1751 sysconfdir = @sysconfdir@
1752 target = @target@
1753 target_alias = @target_alias@
1754 target_cpu = @target_cpu@
1755 target_os = @target_os@
1756 target_vendor = @target_vendor@
1757 top_build_prefix = @top_build_prefix@
1758 top_builddir = @top_builddir@
1759 top_srcdir = @top_srcdir@
1760 AUTOMAKE_OPTIONS = dejagnu foreign no-dist subdir-objects
1761 ACLOCAL_AMFLAGS = -Im4 -I.. -I../config
1762 GNULIB_PARENT_DIR = ..
1763 srccom = $(srcdir)/common
1764 srcroot = $(srcdir)/..
1765 SUBDIRS = @subdirs@ $(SIM_SUBDIRS)
1766 AM_MAKEFLAGS = SIM_NEW_COMMON_OBJS_="$(SIM_NEW_COMMON_OBJS)" \
1767         $(am__append_3) $(am__append_16) $(am__append_30) \
1768         $(am__append_63) $(am__append_74) $(am__append_80) \
1769         $(am__append_93) $(am__append_103)
1770 pkginclude_HEADERS = $(am__append_1)
1771 noinst_LIBRARIES = common/libcommon.a $(am__append_5) $(am__append_8) \
1772         $(am__append_10) $(am__append_12) $(am__append_14) \
1773         $(am__append_17) $(am__append_22) $(am__append_28) \
1774         $(am__append_35) $(am__append_41) $(am__append_45) \
1775         $(am__append_47) $(am__append_52) $(am__append_54) \
1776         $(am__append_56) $(am__append_61) $(am__append_67) \
1777         $(am__append_72) $(am__append_78) $(am__append_84) \
1778         $(am__append_86) $(am__append_91) $(am__append_101) \
1779         $(am__append_107) $(am__append_109) $(am__append_111) \
1780         $(am__append_117) $(am__append_119) $(am__append_121) \
1781         $(am__append_123) $(am__append_125) $(am__append_131)
1782 BUILT_SOURCES = $(am__append_19) $(am__append_24) $(am__append_32) \
1783         $(am__append_37) $(am__append_49) $(am__append_58) \
1784         $(am__append_64) $(am__append_75) $(am__append_94) \
1785         $(am__append_104) $(am__append_113) $(am__append_127) \
1786         $(am__append_133)
1787 CLEANFILES = common/version.c common/version.c-stamp \
1788         testsuite/common/bits-gen testsuite/common/bits32m0.c \
1789         testsuite/common/bits32m31.c testsuite/common/bits64m0.c \
1790         testsuite/common/bits64m63.c
1791 DISTCLEANFILES = $(am__append_100)
1792 MOSTLYCLEANFILES = core $(common_HW_CONFIG_H_TARGETS) $(patsubst \
1793         %,%/stamp-hw,$(SIM_ENABLED_ARCHES)) \
1794         $(common_GEN_MODULES_C_TARGETS) $(patsubst \
1795         %,%/stamp-modules,$(SIM_ENABLED_ARCHES)) $(am__append_7) \
1796         site-sim-config.exp testrun.log testrun.sum $(am__append_21) \
1797         $(am__append_27) $(am__append_34) $(am__append_40) \
1798         $(am__append_51) $(am__append_60) $(am__append_66) \
1799         $(am__append_71) $(am__append_77) $(am__append_83) \
1800         $(am__append_99) $(am__append_106) $(am__append_115) \
1801         $(am__append_130) $(am__append_135)
1802 AM_CFLAGS = $(WERROR_CFLAGS) $(WARN_CFLAGS)
1803 AM_CPPFLAGS = $(INCGNU) -I$(srcroot)/include -I../bfd -I.. \
1804         $(SIM_HW_CFLAGS) $(SIM_INLINE) -I$(srcdir)/common \
1805         -DSIM_COMMON_BUILD
1806 AM_CPPFLAGS_FOR_BUILD = -I$(srcroot)/include $(SIM_HW_CFLAGS) \
1807         $(SIM_INLINE) -I$(srcdir)/common
1808 COMPILE_FOR_BUILD = $(CC_FOR_BUILD) $(AM_CPPFLAGS_FOR_BUILD) $(CPPFLAGS_FOR_BUILD) $(CFLAGS_FOR_BUILD)
1809 LINK_FOR_BUILD = $(CC_FOR_BUILD) $(CFLAGS_FOR_BUILD) $(LDFLAGS_FOR_BUILD) -o $@
1810 SIM_ALL_RECURSIVE_DEPS = common/libcommon.a \
1811         $(common_HW_CONFIG_H_TARGETS) $(common_GEN_MODULES_C_TARGETS) \
1812         $(am__append_4) $(am__append_20) $(am__append_25) \
1813         $(am__append_33) $(am__append_38) $(am__append_50) \
1814         $(am__append_59) $(am__append_65) $(am__append_69) \
1815         $(am__append_76) $(am__append_81) $(am__append_98) \
1816         $(am__append_105) $(am__append_114) $(am__append_128) \
1817         $(am__append_134)
1818 SIM_INSTALL_DATA_LOCAL_DEPS =
1819 SIM_INSTALL_EXEC_LOCAL_DEPS = $(am__append_43)
1820 SIM_UNINSTALL_LOCAL_DEPS = $(am__append_44)
1821 common_libcommon_a_SOURCES = \
1822         common/callback.c \
1823         common/portability.c \
1824         common/sim-load.c \
1825         common/syscall.c \
1826         common/target-newlib-errno.c \
1827         common/target-newlib-open.c \
1828         common/target-newlib-signal.c \
1829         common/target-newlib-syscall.c \
1830         common/version.c
1831
1832 SIM_COMMON_HW_OBJS = \
1833         hw-alloc.o \
1834         hw-base.o \
1835         hw-device.o \
1836         hw-events.o \
1837         hw-handles.o \
1838         hw-instances.o \
1839         hw-ports.o \
1840         hw-properties.o \
1841         hw-tree.o \
1842         sim-hw.o
1843
1844 SIM_NEW_COMMON_OBJS = sim-arange.o sim-bits.o sim-close.o \
1845         sim-command.o sim-config.o sim-core.o sim-cpu.o sim-endian.o \
1846         sim-engine.o sim-events.o sim-fpu.o sim-hload.o sim-hrw.o \
1847         sim-io.o sim-info.o sim-memopt.o sim-model.o sim-module.o \
1848         sim-options.o sim-profile.o sim-reason.o sim-reg.o \
1849         sim-signal.o sim-stop.o sim-syscall.o sim-trace.o sim-utils.o \
1850         sim-watch.o $(am__append_2)
1851 SIM_HW_DEVICES = cfi core pal glue
1852 common_HW_CONFIG_H_TARGETS = $(patsubst %,%/hw-config.h,$(SIM_ENABLED_ARCHES))
1853 am_arch_d = $(subst -,_,$(@D))
1854 GEN_MODULES_C_SRCS = \
1855         $(wildcard \
1856                 $(patsubst %.o,$(abs_srcdir)/%.c,$($(am_arch_d)_libsim_a_OBJECTS) $($(am_arch_d)_libsim_a_LIBADD)) \
1857                 $(filter-out %.o,$(patsubst $(@D)/%.o,$(abs_srcdir)/common/%.c,$($(am_arch_d)_libsim_a_LIBADD))))
1858
1859 common_GEN_MODULES_C_TARGETS = $(patsubst %,%/modules.c,$(filter-out ppc,$(SIM_ENABLED_ARCHES)))
1860 LIBIBERTY_LIB = ../libiberty/libiberty.a
1861 BFD_LIB = ../bfd/libbfd.la
1862 OPCODES_LIB = ../opcodes/libopcodes.la
1863 SIM_COMMON_LIBS = \
1864         $(BFD_LIB) \
1865         $(OPCODES_LIB) \
1866         $(LIBIBERTY_LIB) \
1867         $(LIBGNU) \
1868         $(LIBGNU_EXTRA_LIBS)
1869
1870 GUILE = $(or $(wildcard ../guile/libguile/guile),guile)
1871 CGEN = "$(GUILE) -l $(cgendir)/guile.scm -s"
1872 CGENFLAGS = -v
1873 CGEN_CPU_DIR = $(cgendir)/cpu
1874 CPU_DIR = $(srcroot)/cpu
1875 CGEN_ARCHFILE = $(CPU_DIR)/$(@D).cpu
1876 CGEN_READ_SCM = $(cgendir)/sim.scm
1877 CGEN_ARCH_SCM = $(cgendir)/sim-arch.scm
1878 CGEN_CPU_SCM = $(cgendir)/sim-cpu.scm $(cgendir)/sim-model.scm
1879 CGEN_DECODE_SCM = $(cgendir)/sim-decode.scm
1880 CGEN_DESC_SCM = $(cgendir)/desc.scm $(cgendir)/desc-cpu.scm
1881 CGEN_CPU_EXTR = /extr/
1882 CGEN_CPU_READ = /read/
1883 CGEN_CPU_WRITE = /write/
1884 CGEN_CPU_SEM = /sem/
1885 CGEN_CPU_SEMSW = /semsw/
1886 CGEN_WRAPPER = $(srccom)/cgen.sh
1887 CGEN_GEN_ARCH = \
1888         $(SHELL) $(CGEN_WRAPPER) arch $(srcdir)/$(@D) \
1889                 $(CGEN) $(cgendir) "$(CGENFLAGS)" \
1890                 $(@D) "$$FLAGS" ignored "$$isa" $$mach ignored \
1891                 $(CGEN_ARCHFILE) ignored
1892
1893 CGEN_GEN_CPU = \
1894         $(SHELL) $(CGEN_WRAPPER) cpu $(srcdir)/$(@D) \
1895                 $(CGEN) $(cgendir) "$(CGENFLAGS)" \
1896                 $(@D) "$$FLAGS" $$cpu "$$isa" $$mach "$$SUFFIX" \
1897                 $(CGEN_ARCHFILE) "$$EXTRAFILES"
1898
1899 CGEN_GEN_DEFS = \
1900         $(SHELL) $(CGEN_WRAPPER) defs $(srcdir)/$(@D) \
1901                 $(CGEN) $(cgendir) "$(CGENFLAGS)" \
1902                 $(@D) "$$FLAGS" $$cpu "$$isa" $$mach "$$SUFFIX" \
1903                 $(CGEN_ARCHFILE) ignored
1904
1905 CGEN_GEN_DECODE = \
1906         $(SHELL) $(CGEN_WRAPPER) decode $(srcdir)/$(@D) \
1907                 $(CGEN) $(cgendir) "$(CGENFLAGS)" \
1908                 $(@D) "$$FLAGS" $$cpu "$$isa" $$mach "$$SUFFIX" \
1909                 $(CGEN_ARCHFILE) "$$EXTRAFILES"
1910
1911 CGEN_GEN_CPU_DECODE = \
1912         $(SHELL) $(CGEN_WRAPPER) cpu-decode $(srcdir)/$(@D) \
1913                 $(CGEN) $(cgendir) "$(CGENFLAGS)" \
1914                 $(@D) "$$FLAGS" $$cpu "$$isa" $$mach "$$SUFFIX" \
1915                 $(CGEN_ARCHFILE) "$$EXTRAFILES"
1916
1917 CGEN_GEN_CPU_DESC = \
1918         $(SHELL) $(CGEN_WRAPPER) desc $(srcdir)/$(@D) \
1919                 $(CGEN) $(cgendir) "$(CGENFLAGS)" \
1920                 $(@D) "$$FLAGS" $$cpu "$$isa" $$mach "$$SUFFIX" \
1921                 $(CGEN_ARCHFILE) ignored $$opcfile
1922
1923
1924 # igen leaks memory, and therefore makes AddressSanitizer unhappy.  Disable
1925 # leak detection while running it.
1926 @SIM_ENABLE_IGEN_TRUE@IGEN = igen/igen$(EXEEXT)
1927 @SIM_ENABLE_IGEN_TRUE@IGEN_RUN = ASAN_OPTIONS=detect_leaks=0 $(IGEN) $(IGEN_FLAGS_SMP)
1928 @SIM_ENABLE_IGEN_TRUE@igen_libigen_a_SOURCES = \
1929 @SIM_ENABLE_IGEN_TRUE@  igen/table.c \
1930 @SIM_ENABLE_IGEN_TRUE@  igen/lf.c \
1931 @SIM_ENABLE_IGEN_TRUE@  igen/misc.c \
1932 @SIM_ENABLE_IGEN_TRUE@  igen/filter_host.c \
1933 @SIM_ENABLE_IGEN_TRUE@  igen/ld-decode.c \
1934 @SIM_ENABLE_IGEN_TRUE@  igen/ld-cache.c \
1935 @SIM_ENABLE_IGEN_TRUE@  igen/filter.c \
1936 @SIM_ENABLE_IGEN_TRUE@  igen/ld-insn.c \
1937 @SIM_ENABLE_IGEN_TRUE@  igen/gen-model.c \
1938 @SIM_ENABLE_IGEN_TRUE@  igen/gen-itable.c \
1939 @SIM_ENABLE_IGEN_TRUE@  igen/gen-icache.c \
1940 @SIM_ENABLE_IGEN_TRUE@  igen/gen-semantics.c \
1941 @SIM_ENABLE_IGEN_TRUE@  igen/gen-idecode.c \
1942 @SIM_ENABLE_IGEN_TRUE@  igen/gen-support.c \
1943 @SIM_ENABLE_IGEN_TRUE@  igen/gen-engine.c \
1944 @SIM_ENABLE_IGEN_TRUE@  igen/gen.c
1945
1946 @SIM_ENABLE_IGEN_TRUE@igen_igen_SOURCES = igen/igen.c
1947 @SIM_ENABLE_IGEN_TRUE@igen_igen_LDADD = igen/libigen.a
1948 @SIM_ENABLE_IGEN_TRUE@igen_filter_SOURCES =
1949 @SIM_ENABLE_IGEN_TRUE@igen_filter_LDADD = igen/filter-main.o igen/libigen.a
1950 @SIM_ENABLE_IGEN_TRUE@igen_gen_SOURCES =
1951 @SIM_ENABLE_IGEN_TRUE@igen_gen_LDADD = igen/gen-main.o igen/libigen.a
1952 @SIM_ENABLE_IGEN_TRUE@igen_ld_cache_SOURCES =
1953 @SIM_ENABLE_IGEN_TRUE@igen_ld_cache_LDADD = igen/ld-cache-main.o igen/libigen.a
1954 @SIM_ENABLE_IGEN_TRUE@igen_ld_decode_SOURCES =
1955 @SIM_ENABLE_IGEN_TRUE@igen_ld_decode_LDADD = igen/ld-decode-main.o igen/libigen.a
1956 @SIM_ENABLE_IGEN_TRUE@igen_ld_insn_SOURCES =
1957 @SIM_ENABLE_IGEN_TRUE@igen_ld_insn_LDADD = igen/ld-insn-main.o igen/libigen.a
1958 @SIM_ENABLE_IGEN_TRUE@igen_table_SOURCES =
1959 @SIM_ENABLE_IGEN_TRUE@igen_table_LDADD = igen/table-main.o igen/libigen.a
1960 @SIM_ENABLE_IGEN_TRUE@igen_IGEN_TOOLS = \
1961 @SIM_ENABLE_IGEN_TRUE@  $(IGEN) \
1962 @SIM_ENABLE_IGEN_TRUE@  igen/filter \
1963 @SIM_ENABLE_IGEN_TRUE@  igen/gen \
1964 @SIM_ENABLE_IGEN_TRUE@  igen/ld-cache \
1965 @SIM_ENABLE_IGEN_TRUE@  igen/ld-decode \
1966 @SIM_ENABLE_IGEN_TRUE@  igen/ld-insn \
1967 @SIM_ENABLE_IGEN_TRUE@  igen/table
1968
1969 EXTRA_DEJAGNU_SITE_CONFIG = site-sim-config.exp
1970
1971 # Custom verbose test variables that automake doesn't provide (yet?).
1972 AM_V_RUNTEST = $(AM_V_RUNTEST_@AM_V@)
1973 AM_V_RUNTEST_ = $(AM_V_RUNTEST_@AM_DEFAULT_V@)
1974 AM_V_RUNTEST_0 = @echo "  RUNTEST  $(RUNTESTFLAGS) $*";
1975 AM_V_RUNTEST_1 =
1976 DO_RUNTEST = \
1977         LC_ALL=C; export LC_ALL; \
1978         EXPECT=${EXPECT} ; export EXPECT ; \
1979         runtest=$(RUNTEST); \
1980         $$runtest $(RUNTESTFLAGS)
1981
1982 testsuite_common_CPPFLAGS = \
1983         -I$(srcdir)/common \
1984         -I$(srcroot)/include \
1985         -I../bfd
1986
1987 @SIM_ENABLE_ARCH_aarch64_TRUE@aarch64_libsim_a_SOURCES =
1988 @SIM_ENABLE_ARCH_aarch64_TRUE@aarch64_libsim_a_LIBADD = \
1989 @SIM_ENABLE_ARCH_aarch64_TRUE@  $(common_libcommon_a_OBJECTS) \
1990 @SIM_ENABLE_ARCH_aarch64_TRUE@  $(patsubst %,aarch64/%,$(SIM_NEW_COMMON_OBJS)) \
1991 @SIM_ENABLE_ARCH_aarch64_TRUE@  $(patsubst %,aarch64/dv-%.o,$(SIM_HW_DEVICES)) \
1992 @SIM_ENABLE_ARCH_aarch64_TRUE@  aarch64/cpustate.o \
1993 @SIM_ENABLE_ARCH_aarch64_TRUE@  aarch64/interp.o \
1994 @SIM_ENABLE_ARCH_aarch64_TRUE@  aarch64/memory.o \
1995 @SIM_ENABLE_ARCH_aarch64_TRUE@  aarch64/modules.o \
1996 @SIM_ENABLE_ARCH_aarch64_TRUE@  aarch64/sim-resume.o \
1997 @SIM_ENABLE_ARCH_aarch64_TRUE@  aarch64/simulator.o
1998
1999 @SIM_ENABLE_ARCH_aarch64_TRUE@aarch64_run_SOURCES =
2000 @SIM_ENABLE_ARCH_aarch64_TRUE@aarch64_run_LDADD = \
2001 @SIM_ENABLE_ARCH_aarch64_TRUE@  aarch64/nrun.o \
2002 @SIM_ENABLE_ARCH_aarch64_TRUE@  aarch64/libsim.a \
2003 @SIM_ENABLE_ARCH_aarch64_TRUE@  $(SIM_COMMON_LIBS)
2004
2005 @SIM_ENABLE_ARCH_arm_TRUE@arm_libsim_a_SOURCES =
2006 @SIM_ENABLE_ARCH_arm_TRUE@arm_libsim_a_LIBADD = \
2007 @SIM_ENABLE_ARCH_arm_TRUE@      $(common_libcommon_a_OBJECTS) \
2008 @SIM_ENABLE_ARCH_arm_TRUE@      arm/wrapper.o \
2009 @SIM_ENABLE_ARCH_arm_TRUE@      $(patsubst %,arm/%,$(SIM_NEW_COMMON_OBJS)) \
2010 @SIM_ENABLE_ARCH_arm_TRUE@      $(patsubst %,arm/dv-%.o,$(SIM_HW_DEVICES)) \
2011 @SIM_ENABLE_ARCH_arm_TRUE@      arm/armemu.o \
2012 @SIM_ENABLE_ARCH_arm_TRUE@      arm/armemu32.o arm/arminit.o arm/armos.o arm/armsupp.o \
2013 @SIM_ENABLE_ARCH_arm_TRUE@      arm/armvirt.o arm/thumbemu.o \
2014 @SIM_ENABLE_ARCH_arm_TRUE@      arm/armcopro.o arm/maverick.o arm/iwmmxt.o \
2015 @SIM_ENABLE_ARCH_arm_TRUE@      arm/modules.o
2016
2017 @SIM_ENABLE_ARCH_arm_TRUE@arm_run_SOURCES =
2018 @SIM_ENABLE_ARCH_arm_TRUE@arm_run_LDADD = \
2019 @SIM_ENABLE_ARCH_arm_TRUE@      arm/nrun.o \
2020 @SIM_ENABLE_ARCH_arm_TRUE@      arm/libsim.a \
2021 @SIM_ENABLE_ARCH_arm_TRUE@      $(SIM_COMMON_LIBS)
2022
2023 @SIM_ENABLE_ARCH_arm_TRUE@armdocdir = $(docdir)/arm
2024 @SIM_ENABLE_ARCH_arm_TRUE@armdoc_DATA = arm/README
2025 @SIM_ENABLE_ARCH_avr_TRUE@avr_libsim_a_SOURCES =
2026 @SIM_ENABLE_ARCH_avr_TRUE@avr_libsim_a_LIBADD = \
2027 @SIM_ENABLE_ARCH_avr_TRUE@      $(common_libcommon_a_OBJECTS) \
2028 @SIM_ENABLE_ARCH_avr_TRUE@      avr/interp.o \
2029 @SIM_ENABLE_ARCH_avr_TRUE@      $(patsubst %,avr/%,$(SIM_NEW_COMMON_OBJS)) \
2030 @SIM_ENABLE_ARCH_avr_TRUE@      $(patsubst %,avr/dv-%.o,$(SIM_HW_DEVICES)) \
2031 @SIM_ENABLE_ARCH_avr_TRUE@      avr/modules.o \
2032 @SIM_ENABLE_ARCH_avr_TRUE@      avr/sim-resume.o
2033
2034 @SIM_ENABLE_ARCH_avr_TRUE@avr_run_SOURCES =
2035 @SIM_ENABLE_ARCH_avr_TRUE@avr_run_LDADD = \
2036 @SIM_ENABLE_ARCH_avr_TRUE@      avr/nrun.o \
2037 @SIM_ENABLE_ARCH_avr_TRUE@      avr/libsim.a \
2038 @SIM_ENABLE_ARCH_avr_TRUE@      $(SIM_COMMON_LIBS)
2039
2040 @SIM_ENABLE_ARCH_bfin_TRUE@bfin_libsim_a_SOURCES =
2041 @SIM_ENABLE_ARCH_bfin_TRUE@bfin_libsim_a_LIBADD = \
2042 @SIM_ENABLE_ARCH_bfin_TRUE@     $(common_libcommon_a_OBJECTS) \
2043 @SIM_ENABLE_ARCH_bfin_TRUE@     $(patsubst %,bfin/%,$(SIM_NEW_COMMON_OBJS)) \
2044 @SIM_ENABLE_ARCH_bfin_TRUE@     $(patsubst %,bfin/dv-%.o,$(SIM_HW_DEVICES)) \
2045 @SIM_ENABLE_ARCH_bfin_TRUE@     $(patsubst %,bfin/dv-%.o,$(bfin_SIM_EXTRA_HW_DEVICES)) \
2046 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin/bfin-sim.o \
2047 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin/devices.o \
2048 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin/gui.o \
2049 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin/interp.o \
2050 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin/machs.o \
2051 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin/modules.o \
2052 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin/sim-resume.o
2053
2054 @SIM_ENABLE_ARCH_bfin_TRUE@bfin_run_SOURCES =
2055 @SIM_ENABLE_ARCH_bfin_TRUE@bfin_run_LDADD = \
2056 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin/nrun.o \
2057 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin/libsim.a \
2058 @SIM_ENABLE_ARCH_bfin_TRUE@     $(SIM_COMMON_LIBS)
2059
2060 @SIM_ENABLE_ARCH_bfin_TRUE@bfin_SIM_EXTRA_HW_DEVICES = \
2061 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin_cec \
2062 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin_ctimer \
2063 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin_dma \
2064 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin_dmac \
2065 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin_ebiu_amc \
2066 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin_ebiu_ddrc \
2067 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin_ebiu_sdc \
2068 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin_emac \
2069 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin_eppi \
2070 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin_evt \
2071 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin_gpio \
2072 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin_gpio2 \
2073 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin_gptimer \
2074 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin_jtag \
2075 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin_mmu \
2076 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin_nfc \
2077 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin_otp \
2078 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin_pfmon \
2079 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin_pint \
2080 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin_pll \
2081 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin_ppi \
2082 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin_rtc \
2083 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin_sic \
2084 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin_spi \
2085 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin_trace \
2086 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin_twi \
2087 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin_uart \
2088 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin_uart2 \
2089 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin_wdog \
2090 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin_wp \
2091 @SIM_ENABLE_ARCH_bfin_TRUE@     eth_phy
2092
2093 @SIM_ENABLE_ARCH_bpf_TRUE@bpf_libsim_a_SOURCES =
2094 @SIM_ENABLE_ARCH_bpf_TRUE@bpf_libsim_a_LIBADD = \
2095 @SIM_ENABLE_ARCH_bpf_TRUE@      $(common_libcommon_a_OBJECTS) \
2096 @SIM_ENABLE_ARCH_bpf_TRUE@      $(patsubst %,bpf/%,$(SIM_NEW_COMMON_OBJS)) \
2097 @SIM_ENABLE_ARCH_bpf_TRUE@      $(patsubst %,bpf/dv-%.o,$(SIM_HW_DEVICES)) \
2098 @SIM_ENABLE_ARCH_bpf_TRUE@      bpf/modules.o \
2099 @SIM_ENABLE_ARCH_bpf_TRUE@      \
2100 @SIM_ENABLE_ARCH_bpf_TRUE@      bpf/cgen-run.o \
2101 @SIM_ENABLE_ARCH_bpf_TRUE@      bpf/cgen-scache.o \
2102 @SIM_ENABLE_ARCH_bpf_TRUE@      bpf/cgen-trace.o \
2103 @SIM_ENABLE_ARCH_bpf_TRUE@      bpf/cgen-utils.o \
2104 @SIM_ENABLE_ARCH_bpf_TRUE@      \
2105 @SIM_ENABLE_ARCH_bpf_TRUE@      bpf/arch.o \
2106 @SIM_ENABLE_ARCH_bpf_TRUE@      bpf/cpu.o \
2107 @SIM_ENABLE_ARCH_bpf_TRUE@      bpf/decode-le.o \
2108 @SIM_ENABLE_ARCH_bpf_TRUE@      bpf/decode-be.o \
2109 @SIM_ENABLE_ARCH_bpf_TRUE@      bpf/sem-le.o \
2110 @SIM_ENABLE_ARCH_bpf_TRUE@      bpf/sem-be.o \
2111 @SIM_ENABLE_ARCH_bpf_TRUE@      bpf/mloop-le.o \
2112 @SIM_ENABLE_ARCH_bpf_TRUE@      bpf/mloop-be.o \
2113 @SIM_ENABLE_ARCH_bpf_TRUE@      \
2114 @SIM_ENABLE_ARCH_bpf_TRUE@      bpf/bpf.o \
2115 @SIM_ENABLE_ARCH_bpf_TRUE@      bpf/bpf-helpers.o \
2116 @SIM_ENABLE_ARCH_bpf_TRUE@      bpf/sim-if.o \
2117 @SIM_ENABLE_ARCH_bpf_TRUE@      bpf/traps.o
2118
2119 @SIM_ENABLE_ARCH_bpf_TRUE@bpf_run_SOURCES =
2120 @SIM_ENABLE_ARCH_bpf_TRUE@bpf_run_LDADD = \
2121 @SIM_ENABLE_ARCH_bpf_TRUE@      bpf/nrun.o \
2122 @SIM_ENABLE_ARCH_bpf_TRUE@      bpf/libsim.a \
2123 @SIM_ENABLE_ARCH_bpf_TRUE@      $(SIM_COMMON_LIBS)
2124
2125 @SIM_ENABLE_ARCH_bpf_TRUE@bpf_BUILD_OUTPUTS = \
2126 @SIM_ENABLE_ARCH_bpf_TRUE@      bpf/mloop-le.c \
2127 @SIM_ENABLE_ARCH_bpf_TRUE@      bpf/stamp-mloop-le \
2128 @SIM_ENABLE_ARCH_bpf_TRUE@      bpf/mloop-be.c \
2129 @SIM_ENABLE_ARCH_bpf_TRUE@      bpf/stamp-mloop-be
2130
2131 @SIM_ENABLE_ARCH_cr16_TRUE@cr16_libsim_a_SOURCES =
2132 @SIM_ENABLE_ARCH_cr16_TRUE@cr16_libsim_a_LIBADD = \
2133 @SIM_ENABLE_ARCH_cr16_TRUE@     $(common_libcommon_a_OBJECTS) \
2134 @SIM_ENABLE_ARCH_cr16_TRUE@     $(patsubst %,cr16/%,$(SIM_NEW_COMMON_OBJS)) \
2135 @SIM_ENABLE_ARCH_cr16_TRUE@     $(patsubst %,cr16/dv-%.o,$(SIM_HW_DEVICES)) \
2136 @SIM_ENABLE_ARCH_cr16_TRUE@     cr16/interp.o \
2137 @SIM_ENABLE_ARCH_cr16_TRUE@     cr16/modules.o \
2138 @SIM_ENABLE_ARCH_cr16_TRUE@     cr16/sim-resume.o \
2139 @SIM_ENABLE_ARCH_cr16_TRUE@     cr16/simops.o \
2140 @SIM_ENABLE_ARCH_cr16_TRUE@     cr16/table.o
2141
2142 @SIM_ENABLE_ARCH_cr16_TRUE@cr16_run_SOURCES =
2143 @SIM_ENABLE_ARCH_cr16_TRUE@cr16_run_LDADD = \
2144 @SIM_ENABLE_ARCH_cr16_TRUE@     cr16/nrun.o \
2145 @SIM_ENABLE_ARCH_cr16_TRUE@     cr16/libsim.a \
2146 @SIM_ENABLE_ARCH_cr16_TRUE@     $(SIM_COMMON_LIBS)
2147
2148 @SIM_ENABLE_ARCH_cr16_TRUE@cr16_BUILD_OUTPUTS = \
2149 @SIM_ENABLE_ARCH_cr16_TRUE@     cr16/gencode$(EXEEXT) \
2150 @SIM_ENABLE_ARCH_cr16_TRUE@     cr16/table.c
2151
2152 @SIM_ENABLE_ARCH_cr16_TRUE@cr16_gencode_SOURCES = cr16/gencode.c
2153 @SIM_ENABLE_ARCH_cr16_TRUE@cr16_gencode_LDADD = cr16/cr16-opc.o
2154 @SIM_ENABLE_ARCH_cris_TRUE@cris_libsim_a_SOURCES =
2155 @SIM_ENABLE_ARCH_cris_TRUE@cris_libsim_a_LIBADD = \
2156 @SIM_ENABLE_ARCH_cris_TRUE@     $(common_libcommon_a_OBJECTS) \
2157 @SIM_ENABLE_ARCH_cris_TRUE@     $(patsubst %,cris/%,$(SIM_NEW_COMMON_OBJS)) \
2158 @SIM_ENABLE_ARCH_cris_TRUE@     $(patsubst %,cris/dv-%.o,$(SIM_HW_DEVICES)) \
2159 @SIM_ENABLE_ARCH_cris_TRUE@     $(patsubst %,cris/dv-%.o,$(cris_SIM_EXTRA_HW_DEVICES)) \
2160 @SIM_ENABLE_ARCH_cris_TRUE@     cris/modules.o \
2161 @SIM_ENABLE_ARCH_cris_TRUE@     \
2162 @SIM_ENABLE_ARCH_cris_TRUE@     cris/cgen-run.o \
2163 @SIM_ENABLE_ARCH_cris_TRUE@     cris/cgen-scache.o \
2164 @SIM_ENABLE_ARCH_cris_TRUE@     cris/cgen-trace.o \
2165 @SIM_ENABLE_ARCH_cris_TRUE@     cris/cgen-utils.o \
2166 @SIM_ENABLE_ARCH_cris_TRUE@     \
2167 @SIM_ENABLE_ARCH_cris_TRUE@     cris/arch.o \
2168 @SIM_ENABLE_ARCH_cris_TRUE@     cris/crisv10f.o \
2169 @SIM_ENABLE_ARCH_cris_TRUE@     cris/cpuv10.o \
2170 @SIM_ENABLE_ARCH_cris_TRUE@     cris/decodev10.o \
2171 @SIM_ENABLE_ARCH_cris_TRUE@     cris/modelv10.o \
2172 @SIM_ENABLE_ARCH_cris_TRUE@     cris/mloopv10f.o \
2173 @SIM_ENABLE_ARCH_cris_TRUE@     cris/crisv32f.o \
2174 @SIM_ENABLE_ARCH_cris_TRUE@     cris/cpuv32.o \
2175 @SIM_ENABLE_ARCH_cris_TRUE@     cris/decodev32.o \
2176 @SIM_ENABLE_ARCH_cris_TRUE@     cris/modelv32.o \
2177 @SIM_ENABLE_ARCH_cris_TRUE@     cris/mloopv32f.o \
2178 @SIM_ENABLE_ARCH_cris_TRUE@     \
2179 @SIM_ENABLE_ARCH_cris_TRUE@     cris/sim-if.o \
2180 @SIM_ENABLE_ARCH_cris_TRUE@     cris/traps.o
2181
2182 @SIM_ENABLE_ARCH_cris_TRUE@cris_run_SOURCES =
2183 @SIM_ENABLE_ARCH_cris_TRUE@cris_run_LDADD = \
2184 @SIM_ENABLE_ARCH_cris_TRUE@     cris/nrun.o \
2185 @SIM_ENABLE_ARCH_cris_TRUE@     cris/libsim.a \
2186 @SIM_ENABLE_ARCH_cris_TRUE@     $(SIM_COMMON_LIBS)
2187
2188 @SIM_ENABLE_ARCH_cris_TRUE@cris_SIM_EXTRA_HW_DEVICES = rv cris cris_900000xx
2189 @SIM_ENABLE_ARCH_cris_TRUE@cris_rvdummy_SOURCES = cris/rvdummy.c
2190 @SIM_ENABLE_ARCH_cris_TRUE@cris_rvdummy_LDADD = $(LIBIBERTY_LIB)
2191 @SIM_ENABLE_ARCH_cris_TRUE@cris_BUILD_OUTPUTS = \
2192 @SIM_ENABLE_ARCH_cris_TRUE@     cris/mloopv10f.c \
2193 @SIM_ENABLE_ARCH_cris_TRUE@     cris/stamp-mloop-v10f \
2194 @SIM_ENABLE_ARCH_cris_TRUE@     cris/mloopv32f.c \
2195 @SIM_ENABLE_ARCH_cris_TRUE@     cris/stamp-mloop-v32f
2196
2197 @SIM_ENABLE_ARCH_d10v_TRUE@d10v_libsim_a_SOURCES =
2198 @SIM_ENABLE_ARCH_d10v_TRUE@d10v_libsim_a_LIBADD = \
2199 @SIM_ENABLE_ARCH_d10v_TRUE@     $(common_libcommon_a_OBJECTS) \
2200 @SIM_ENABLE_ARCH_d10v_TRUE@     d10v/interp.o \
2201 @SIM_ENABLE_ARCH_d10v_TRUE@     $(patsubst %,d10v/%,$(SIM_NEW_COMMON_OBJS)) \
2202 @SIM_ENABLE_ARCH_d10v_TRUE@     $(patsubst %,d10v/dv-%.o,$(SIM_HW_DEVICES)) \
2203 @SIM_ENABLE_ARCH_d10v_TRUE@     d10v/endian.o \
2204 @SIM_ENABLE_ARCH_d10v_TRUE@     d10v/modules.o \
2205 @SIM_ENABLE_ARCH_d10v_TRUE@     d10v/sim-resume.o \
2206 @SIM_ENABLE_ARCH_d10v_TRUE@     d10v/simops.o \
2207 @SIM_ENABLE_ARCH_d10v_TRUE@     d10v/table.o
2208
2209 @SIM_ENABLE_ARCH_d10v_TRUE@d10v_run_SOURCES =
2210 @SIM_ENABLE_ARCH_d10v_TRUE@d10v_run_LDADD = \
2211 @SIM_ENABLE_ARCH_d10v_TRUE@     d10v/nrun.o \
2212 @SIM_ENABLE_ARCH_d10v_TRUE@     d10v/libsim.a \
2213 @SIM_ENABLE_ARCH_d10v_TRUE@     $(SIM_COMMON_LIBS)
2214
2215 @SIM_ENABLE_ARCH_d10v_TRUE@d10v_BUILD_OUTPUTS = \
2216 @SIM_ENABLE_ARCH_d10v_TRUE@     d10v/gencode$(EXEEXT) \
2217 @SIM_ENABLE_ARCH_d10v_TRUE@     d10v/table.c
2218
2219 @SIM_ENABLE_ARCH_d10v_TRUE@d10v_gencode_SOURCES = d10v/gencode.c
2220 @SIM_ENABLE_ARCH_d10v_TRUE@d10v_gencode_LDADD = d10v/d10v-opc.o
2221 @SIM_ENABLE_ARCH_erc32_TRUE@erc32_libsim_a_SOURCES =
2222 @SIM_ENABLE_ARCH_erc32_TRUE@erc32_libsim_a_LIBADD = \
2223 @SIM_ENABLE_ARCH_erc32_TRUE@    $(common_libcommon_a_OBJECTS) \
2224 @SIM_ENABLE_ARCH_erc32_TRUE@    erc32/erc32.o \
2225 @SIM_ENABLE_ARCH_erc32_TRUE@    erc32/exec.o \
2226 @SIM_ENABLE_ARCH_erc32_TRUE@    erc32/float.o \
2227 @SIM_ENABLE_ARCH_erc32_TRUE@    erc32/func.o \
2228 @SIM_ENABLE_ARCH_erc32_TRUE@    erc32/help.o \
2229 @SIM_ENABLE_ARCH_erc32_TRUE@    erc32/interf.o \
2230 @SIM_ENABLE_ARCH_erc32_TRUE@    erc32/modules.o
2231
2232 @SIM_ENABLE_ARCH_erc32_TRUE@erc32_run_SOURCES =
2233 @SIM_ENABLE_ARCH_erc32_TRUE@erc32_run_LDADD = \
2234 @SIM_ENABLE_ARCH_erc32_TRUE@    erc32/sis.o \
2235 @SIM_ENABLE_ARCH_erc32_TRUE@    erc32/libsim.a \
2236 @SIM_ENABLE_ARCH_erc32_TRUE@    $(SIM_COMMON_LIBS) $(READLINE_LIB) $(TERMCAP_LIB)
2237
2238 @SIM_ENABLE_ARCH_erc32_TRUE@erc32docdir = $(docdir)/erc32
2239 @SIM_ENABLE_ARCH_erc32_TRUE@erc32doc_DATA = erc32/README.erc32 erc32/README.gdb erc32/README.sis
2240 @SIM_ENABLE_ARCH_examples_TRUE@example_synacor_libsim_a_SOURCES =
2241 @SIM_ENABLE_ARCH_examples_TRUE@example_synacor_libsim_a_LIBADD = \
2242 @SIM_ENABLE_ARCH_examples_TRUE@ $(common_libcommon_a_OBJECTS) \
2243 @SIM_ENABLE_ARCH_examples_TRUE@ $(patsubst %,example-synacor/%,$(SIM_NEW_COMMON_OBJS)) \
2244 @SIM_ENABLE_ARCH_examples_TRUE@ $(patsubst %,example-synacor/dv-%.o,$(SIM_HW_DEVICES)) \
2245 @SIM_ENABLE_ARCH_examples_TRUE@ example-synacor/interp.o \
2246 @SIM_ENABLE_ARCH_examples_TRUE@ example-synacor/modules.o \
2247 @SIM_ENABLE_ARCH_examples_TRUE@ example-synacor/sim-main.o \
2248 @SIM_ENABLE_ARCH_examples_TRUE@ example-synacor/sim-resume.o
2249
2250 @SIM_ENABLE_ARCH_examples_TRUE@example_synacor_run_SOURCES =
2251 @SIM_ENABLE_ARCH_examples_TRUE@example_synacor_run_LDADD = \
2252 @SIM_ENABLE_ARCH_examples_TRUE@ example-synacor/nrun.o \
2253 @SIM_ENABLE_ARCH_examples_TRUE@ example-synacor/libsim.a \
2254 @SIM_ENABLE_ARCH_examples_TRUE@ $(SIM_COMMON_LIBS)
2255
2256 @SIM_ENABLE_ARCH_frv_TRUE@frv_libsim_a_SOURCES =
2257 @SIM_ENABLE_ARCH_frv_TRUE@frv_libsim_a_LIBADD = \
2258 @SIM_ENABLE_ARCH_frv_TRUE@      $(common_libcommon_a_OBJECTS) \
2259 @SIM_ENABLE_ARCH_frv_TRUE@      $(patsubst %,frv/%,$(SIM_NEW_COMMON_OBJS)) \
2260 @SIM_ENABLE_ARCH_frv_TRUE@      $(patsubst %,frv/dv-%.o,$(SIM_HW_DEVICES)) \
2261 @SIM_ENABLE_ARCH_frv_TRUE@      frv/modules.o \
2262 @SIM_ENABLE_ARCH_frv_TRUE@      \
2263 @SIM_ENABLE_ARCH_frv_TRUE@      frv/cgen-accfp.o \
2264 @SIM_ENABLE_ARCH_frv_TRUE@      frv/cgen-fpu.o \
2265 @SIM_ENABLE_ARCH_frv_TRUE@      frv/cgen-run.o \
2266 @SIM_ENABLE_ARCH_frv_TRUE@      frv/cgen-scache.o \
2267 @SIM_ENABLE_ARCH_frv_TRUE@      frv/cgen-trace.o \
2268 @SIM_ENABLE_ARCH_frv_TRUE@      frv/cgen-utils.o \
2269 @SIM_ENABLE_ARCH_frv_TRUE@      \
2270 @SIM_ENABLE_ARCH_frv_TRUE@      frv/arch.o \
2271 @SIM_ENABLE_ARCH_frv_TRUE@      frv/cgen-par.o \
2272 @SIM_ENABLE_ARCH_frv_TRUE@      frv/cpu.o \
2273 @SIM_ENABLE_ARCH_frv_TRUE@      frv/decode.o \
2274 @SIM_ENABLE_ARCH_frv_TRUE@      frv/frv.o \
2275 @SIM_ENABLE_ARCH_frv_TRUE@      frv/mloop.o \
2276 @SIM_ENABLE_ARCH_frv_TRUE@      frv/model.o \
2277 @SIM_ENABLE_ARCH_frv_TRUE@      frv/sem.o \
2278 @SIM_ENABLE_ARCH_frv_TRUE@      \
2279 @SIM_ENABLE_ARCH_frv_TRUE@      frv/cache.o \
2280 @SIM_ENABLE_ARCH_frv_TRUE@      frv/interrupts.o \
2281 @SIM_ENABLE_ARCH_frv_TRUE@      frv/memory.o \
2282 @SIM_ENABLE_ARCH_frv_TRUE@      frv/options.o \
2283 @SIM_ENABLE_ARCH_frv_TRUE@      frv/pipeline.o \
2284 @SIM_ENABLE_ARCH_frv_TRUE@      frv/profile.o \
2285 @SIM_ENABLE_ARCH_frv_TRUE@      frv/profile-fr400.o \
2286 @SIM_ENABLE_ARCH_frv_TRUE@      frv/profile-fr450.o \
2287 @SIM_ENABLE_ARCH_frv_TRUE@      frv/profile-fr500.o \
2288 @SIM_ENABLE_ARCH_frv_TRUE@      frv/profile-fr550.o \
2289 @SIM_ENABLE_ARCH_frv_TRUE@      frv/registers.o \
2290 @SIM_ENABLE_ARCH_frv_TRUE@      frv/reset.o \
2291 @SIM_ENABLE_ARCH_frv_TRUE@      frv/sim-if.o \
2292 @SIM_ENABLE_ARCH_frv_TRUE@      frv/traps.o
2293
2294 @SIM_ENABLE_ARCH_frv_TRUE@frv_run_SOURCES =
2295 @SIM_ENABLE_ARCH_frv_TRUE@frv_run_LDADD = \
2296 @SIM_ENABLE_ARCH_frv_TRUE@      frv/nrun.o \
2297 @SIM_ENABLE_ARCH_frv_TRUE@      frv/libsim.a \
2298 @SIM_ENABLE_ARCH_frv_TRUE@      $(SIM_COMMON_LIBS)
2299
2300 @SIM_ENABLE_ARCH_frv_TRUE@frvdocdir = $(docdir)/frv
2301 @SIM_ENABLE_ARCH_frv_TRUE@frvdoc_DATA = frv/README
2302 @SIM_ENABLE_ARCH_frv_TRUE@frv_BUILD_OUTPUTS = \
2303 @SIM_ENABLE_ARCH_frv_TRUE@      frv/mloop.c \
2304 @SIM_ENABLE_ARCH_frv_TRUE@      frv/stamp-mloop
2305
2306 @SIM_ENABLE_ARCH_ft32_TRUE@ft32_libsim_a_SOURCES =
2307 @SIM_ENABLE_ARCH_ft32_TRUE@ft32_libsim_a_LIBADD = \
2308 @SIM_ENABLE_ARCH_ft32_TRUE@     $(common_libcommon_a_OBJECTS) \
2309 @SIM_ENABLE_ARCH_ft32_TRUE@     $(patsubst %,ft32/%,$(SIM_NEW_COMMON_OBJS)) \
2310 @SIM_ENABLE_ARCH_ft32_TRUE@     $(patsubst %,ft32/dv-%.o,$(SIM_HW_DEVICES)) \
2311 @SIM_ENABLE_ARCH_ft32_TRUE@     ft32/interp.o \
2312 @SIM_ENABLE_ARCH_ft32_TRUE@     ft32/modules.o \
2313 @SIM_ENABLE_ARCH_ft32_TRUE@     ft32/sim-resume.o
2314
2315 @SIM_ENABLE_ARCH_ft32_TRUE@ft32_run_SOURCES =
2316 @SIM_ENABLE_ARCH_ft32_TRUE@ft32_run_LDADD = \
2317 @SIM_ENABLE_ARCH_ft32_TRUE@     ft32/nrun.o \
2318 @SIM_ENABLE_ARCH_ft32_TRUE@     ft32/libsim.a \
2319 @SIM_ENABLE_ARCH_ft32_TRUE@     $(SIM_COMMON_LIBS)
2320
2321 @SIM_ENABLE_ARCH_h8300_TRUE@h8300_libsim_a_SOURCES =
2322 @SIM_ENABLE_ARCH_h8300_TRUE@h8300_libsim_a_LIBADD = \
2323 @SIM_ENABLE_ARCH_h8300_TRUE@    $(common_libcommon_a_OBJECTS) \
2324 @SIM_ENABLE_ARCH_h8300_TRUE@    h8300/compile.o \
2325 @SIM_ENABLE_ARCH_h8300_TRUE@    $(patsubst %,h8300/%,$(SIM_NEW_COMMON_OBJS)) \
2326 @SIM_ENABLE_ARCH_h8300_TRUE@    $(patsubst %,h8300/dv-%.o,$(SIM_HW_DEVICES)) \
2327 @SIM_ENABLE_ARCH_h8300_TRUE@    h8300/modules.o \
2328 @SIM_ENABLE_ARCH_h8300_TRUE@    h8300/sim-resume.o
2329
2330 @SIM_ENABLE_ARCH_h8300_TRUE@h8300_run_SOURCES =
2331 @SIM_ENABLE_ARCH_h8300_TRUE@h8300_run_LDADD = \
2332 @SIM_ENABLE_ARCH_h8300_TRUE@    h8300/nrun.o \
2333 @SIM_ENABLE_ARCH_h8300_TRUE@    h8300/libsim.a \
2334 @SIM_ENABLE_ARCH_h8300_TRUE@    $(SIM_COMMON_LIBS)
2335
2336 @SIM_ENABLE_ARCH_iq2000_TRUE@iq2000_libsim_a_SOURCES =
2337 @SIM_ENABLE_ARCH_iq2000_TRUE@iq2000_libsim_a_LIBADD = \
2338 @SIM_ENABLE_ARCH_iq2000_TRUE@   $(common_libcommon_a_OBJECTS) \
2339 @SIM_ENABLE_ARCH_iq2000_TRUE@   $(patsubst %,iq2000/%,$(SIM_NEW_COMMON_OBJS)) \
2340 @SIM_ENABLE_ARCH_iq2000_TRUE@   $(patsubst %,iq2000/dv-%.o,$(SIM_HW_DEVICES)) \
2341 @SIM_ENABLE_ARCH_iq2000_TRUE@   iq2000/modules.o \
2342 @SIM_ENABLE_ARCH_iq2000_TRUE@   \
2343 @SIM_ENABLE_ARCH_iq2000_TRUE@   iq2000/cgen-run.o \
2344 @SIM_ENABLE_ARCH_iq2000_TRUE@   iq2000/cgen-scache.o \
2345 @SIM_ENABLE_ARCH_iq2000_TRUE@   iq2000/cgen-trace.o \
2346 @SIM_ENABLE_ARCH_iq2000_TRUE@   iq2000/cgen-utils.o \
2347 @SIM_ENABLE_ARCH_iq2000_TRUE@   \
2348 @SIM_ENABLE_ARCH_iq2000_TRUE@   iq2000/arch.o \
2349 @SIM_ENABLE_ARCH_iq2000_TRUE@   iq2000/cpu.o \
2350 @SIM_ENABLE_ARCH_iq2000_TRUE@   iq2000/decode.o \
2351 @SIM_ENABLE_ARCH_iq2000_TRUE@   iq2000/iq2000.o \
2352 @SIM_ENABLE_ARCH_iq2000_TRUE@   iq2000/sem.o \
2353 @SIM_ENABLE_ARCH_iq2000_TRUE@   iq2000/mloop.o \
2354 @SIM_ENABLE_ARCH_iq2000_TRUE@   iq2000/model.o \
2355 @SIM_ENABLE_ARCH_iq2000_TRUE@   \
2356 @SIM_ENABLE_ARCH_iq2000_TRUE@   iq2000/sim-if.o
2357
2358 @SIM_ENABLE_ARCH_iq2000_TRUE@iq2000_run_SOURCES =
2359 @SIM_ENABLE_ARCH_iq2000_TRUE@iq2000_run_LDADD = \
2360 @SIM_ENABLE_ARCH_iq2000_TRUE@   iq2000/nrun.o \
2361 @SIM_ENABLE_ARCH_iq2000_TRUE@   iq2000/libsim.a \
2362 @SIM_ENABLE_ARCH_iq2000_TRUE@   $(SIM_COMMON_LIBS)
2363
2364 @SIM_ENABLE_ARCH_iq2000_TRUE@iq2000_BUILD_OUTPUTS = \
2365 @SIM_ENABLE_ARCH_iq2000_TRUE@   iq2000/mloop.c \
2366 @SIM_ENABLE_ARCH_iq2000_TRUE@   iq2000/stamp-mloop
2367
2368 @SIM_ENABLE_ARCH_lm32_TRUE@lm32_libsim_a_SOURCES =
2369 @SIM_ENABLE_ARCH_lm32_TRUE@lm32_libsim_a_LIBADD = \
2370 @SIM_ENABLE_ARCH_lm32_TRUE@     $(common_libcommon_a_OBJECTS) \
2371 @SIM_ENABLE_ARCH_lm32_TRUE@     $(patsubst %,lm32/%,$(SIM_NEW_COMMON_OBJS)) \
2372 @SIM_ENABLE_ARCH_lm32_TRUE@     $(patsubst %,lm32/dv-%.o,$(SIM_HW_DEVICES)) \
2373 @SIM_ENABLE_ARCH_lm32_TRUE@     $(patsubst %,lm32/dv-%.o,$(lm32_SIM_EXTRA_HW_DEVICES)) \
2374 @SIM_ENABLE_ARCH_lm32_TRUE@     lm32/modules.o \
2375 @SIM_ENABLE_ARCH_lm32_TRUE@     \
2376 @SIM_ENABLE_ARCH_lm32_TRUE@     lm32/cgen-run.o \
2377 @SIM_ENABLE_ARCH_lm32_TRUE@     lm32/cgen-scache.o \
2378 @SIM_ENABLE_ARCH_lm32_TRUE@     lm32/cgen-trace.o \
2379 @SIM_ENABLE_ARCH_lm32_TRUE@     lm32/cgen-utils.o \
2380 @SIM_ENABLE_ARCH_lm32_TRUE@     \
2381 @SIM_ENABLE_ARCH_lm32_TRUE@     lm32/arch.o \
2382 @SIM_ENABLE_ARCH_lm32_TRUE@     lm32/cpu.o \
2383 @SIM_ENABLE_ARCH_lm32_TRUE@     lm32/decode.o \
2384 @SIM_ENABLE_ARCH_lm32_TRUE@     lm32/sem.o \
2385 @SIM_ENABLE_ARCH_lm32_TRUE@     lm32/mloop.o \
2386 @SIM_ENABLE_ARCH_lm32_TRUE@     lm32/model.o \
2387 @SIM_ENABLE_ARCH_lm32_TRUE@     \
2388 @SIM_ENABLE_ARCH_lm32_TRUE@     lm32/lm32.o \
2389 @SIM_ENABLE_ARCH_lm32_TRUE@     lm32/sim-if.o \
2390 @SIM_ENABLE_ARCH_lm32_TRUE@     lm32/traps.o \
2391 @SIM_ENABLE_ARCH_lm32_TRUE@     lm32/user.o
2392
2393 @SIM_ENABLE_ARCH_lm32_TRUE@lm32_run_SOURCES =
2394 @SIM_ENABLE_ARCH_lm32_TRUE@lm32_run_LDADD = \
2395 @SIM_ENABLE_ARCH_lm32_TRUE@     lm32/nrun.o \
2396 @SIM_ENABLE_ARCH_lm32_TRUE@     lm32/libsim.a \
2397 @SIM_ENABLE_ARCH_lm32_TRUE@     $(SIM_COMMON_LIBS)
2398
2399 @SIM_ENABLE_ARCH_lm32_TRUE@lm32_SIM_EXTRA_HW_DEVICES = lm32cpu lm32timer lm32uart
2400 @SIM_ENABLE_ARCH_lm32_TRUE@lm32_BUILD_OUTPUTS = \
2401 @SIM_ENABLE_ARCH_lm32_TRUE@     lm32/mloop.c \
2402 @SIM_ENABLE_ARCH_lm32_TRUE@     lm32/stamp-mloop
2403
2404 @SIM_ENABLE_ARCH_m32c_TRUE@m32c_libsim_a_SOURCES =
2405 @SIM_ENABLE_ARCH_m32c_TRUE@m32c_libsim_a_LIBADD = \
2406 @SIM_ENABLE_ARCH_m32c_TRUE@     $(common_libcommon_a_OBJECTS) \
2407 @SIM_ENABLE_ARCH_m32c_TRUE@     m32c/gdb-if.o \
2408 @SIM_ENABLE_ARCH_m32c_TRUE@     m32c/int.o \
2409 @SIM_ENABLE_ARCH_m32c_TRUE@     m32c/load.o \
2410 @SIM_ENABLE_ARCH_m32c_TRUE@     m32c/m32c.o \
2411 @SIM_ENABLE_ARCH_m32c_TRUE@     m32c/mem.o \
2412 @SIM_ENABLE_ARCH_m32c_TRUE@     m32c/misc.o \
2413 @SIM_ENABLE_ARCH_m32c_TRUE@     m32c/modules.o \
2414 @SIM_ENABLE_ARCH_m32c_TRUE@     m32c/r8c.o \
2415 @SIM_ENABLE_ARCH_m32c_TRUE@     m32c/reg.o \
2416 @SIM_ENABLE_ARCH_m32c_TRUE@     m32c/srcdest.o \
2417 @SIM_ENABLE_ARCH_m32c_TRUE@     m32c/syscalls.o \
2418 @SIM_ENABLE_ARCH_m32c_TRUE@     m32c/trace.o
2419
2420 @SIM_ENABLE_ARCH_m32c_TRUE@m32c_run_SOURCES =
2421 @SIM_ENABLE_ARCH_m32c_TRUE@m32c_run_LDADD = \
2422 @SIM_ENABLE_ARCH_m32c_TRUE@     m32c/main.o \
2423 @SIM_ENABLE_ARCH_m32c_TRUE@     m32c/libsim.a \
2424 @SIM_ENABLE_ARCH_m32c_TRUE@     $(SIM_COMMON_LIBS)
2425
2426 @SIM_ENABLE_ARCH_m32c_TRUE@m32c_BUILD_OUTPUTS = \
2427 @SIM_ENABLE_ARCH_m32c_TRUE@     m32c/opc2c$(EXEEXT) \
2428 @SIM_ENABLE_ARCH_m32c_TRUE@     m32c/m32c.c \
2429 @SIM_ENABLE_ARCH_m32c_TRUE@     m32c/r8c.c
2430
2431 @SIM_ENABLE_ARCH_m32c_TRUE@m32c_opc2c_SOURCES = m32c/opc2c.c
2432
2433 # opc2c leaks memory, and therefore makes AddressSanitizer unhappy.  Disable
2434 # leak detection while running it.
2435 @SIM_ENABLE_ARCH_m32c_TRUE@m32c_OPC2C_RUN = ASAN_OPTIONS=detect_leaks=0 m32c/opc2c$(EXEEXT)
2436 @SIM_ENABLE_ARCH_m32r_TRUE@m32r_libsim_a_SOURCES =
2437 @SIM_ENABLE_ARCH_m32r_TRUE@m32r_libsim_a_LIBADD = \
2438 @SIM_ENABLE_ARCH_m32r_TRUE@     $(common_libcommon_a_OBJECTS) \
2439 @SIM_ENABLE_ARCH_m32r_TRUE@     $(patsubst %,m32r/%,$(SIM_NEW_COMMON_OBJS)) \
2440 @SIM_ENABLE_ARCH_m32r_TRUE@     $(patsubst %,m32r/dv-%.o,$(SIM_HW_DEVICES)) \
2441 @SIM_ENABLE_ARCH_m32r_TRUE@     $(patsubst %,m32r/dv-%.o,$(m32r_SIM_EXTRA_HW_DEVICES)) \
2442 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/modules.o \
2443 @SIM_ENABLE_ARCH_m32r_TRUE@     \
2444 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/cgen-run.o \
2445 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/cgen-scache.o \
2446 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/cgen-trace.o \
2447 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/cgen-utils.o \
2448 @SIM_ENABLE_ARCH_m32r_TRUE@     \
2449 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/arch.o \
2450 @SIM_ENABLE_ARCH_m32r_TRUE@     \
2451 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/m32r.o \
2452 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/cpu.o \
2453 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/decode.o \
2454 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/sem.o \
2455 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/model.o \
2456 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/mloop.o \
2457 @SIM_ENABLE_ARCH_m32r_TRUE@     \
2458 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/m32rx.o \
2459 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/cpux.o \
2460 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/decodex.o \
2461 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/modelx.o \
2462 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/mloopx.o \
2463 @SIM_ENABLE_ARCH_m32r_TRUE@     \
2464 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/m32r2.o \
2465 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/cpu2.o \
2466 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/decode2.o \
2467 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/model2.o \
2468 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/mloop2.o \
2469 @SIM_ENABLE_ARCH_m32r_TRUE@     \
2470 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/sim-if.o \
2471 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/traps.o
2472
2473 @SIM_ENABLE_ARCH_m32r_TRUE@m32r_run_SOURCES =
2474 @SIM_ENABLE_ARCH_m32r_TRUE@m32r_run_LDADD = \
2475 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/nrun.o \
2476 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/libsim.a \
2477 @SIM_ENABLE_ARCH_m32r_TRUE@     $(SIM_COMMON_LIBS)
2478
2479 @SIM_ENABLE_ARCH_m32r_TRUE@m32r_SIM_EXTRA_HW_DEVICES = m32r_cache m32r_uart
2480 @SIM_ENABLE_ARCH_m32r_TRUE@m32r_BUILD_OUTPUTS = \
2481 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/mloop.c \
2482 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/stamp-mloop \
2483 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/mloopx.c \
2484 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/stamp-mloop-x \
2485 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/mloop2.c \
2486 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/stamp-mloop-2
2487
2488 @SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11_libsim_a_SOURCES =
2489 @SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11_libsim_a_LIBADD = \
2490 @SIM_ENABLE_ARCH_m68hc11_TRUE@  $(common_libcommon_a_OBJECTS) \
2491 @SIM_ENABLE_ARCH_m68hc11_TRUE@  m68hc11/interp.o \
2492 @SIM_ENABLE_ARCH_m68hc11_TRUE@  m68hc11/m68hc11int.o \
2493 @SIM_ENABLE_ARCH_m68hc11_TRUE@  m68hc11/m68hc12int.o \
2494 @SIM_ENABLE_ARCH_m68hc11_TRUE@  m68hc11/emulos.o \
2495 @SIM_ENABLE_ARCH_m68hc11_TRUE@  m68hc11/interrupts.o \
2496 @SIM_ENABLE_ARCH_m68hc11_TRUE@  m68hc11/m68hc11_sim.o \
2497 @SIM_ENABLE_ARCH_m68hc11_TRUE@  $(patsubst %,m68hc11/%,$(SIM_NEW_COMMON_OBJS)) \
2498 @SIM_ENABLE_ARCH_m68hc11_TRUE@  $(patsubst %,m68hc11/dv-%.o,$(SIM_HW_DEVICES)) \
2499 @SIM_ENABLE_ARCH_m68hc11_TRUE@  $(patsubst %,m68hc11/dv-%.o,$(m68hc11_SIM_EXTRA_HW_DEVICES)) \
2500 @SIM_ENABLE_ARCH_m68hc11_TRUE@  m68hc11/modules.o \
2501 @SIM_ENABLE_ARCH_m68hc11_TRUE@  m68hc11/sim-resume.o
2502
2503 @SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11_run_SOURCES =
2504 @SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11_run_LDADD = \
2505 @SIM_ENABLE_ARCH_m68hc11_TRUE@  m68hc11/nrun.o \
2506 @SIM_ENABLE_ARCH_m68hc11_TRUE@  m68hc11/libsim.a \
2507 @SIM_ENABLE_ARCH_m68hc11_TRUE@  $(SIM_COMMON_LIBS)
2508
2509 @SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11_SIM_EXTRA_HW_DEVICES = m68hc11 m68hc11sio m68hc11eepr m68hc11tim m68hc11spi nvram
2510 @SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11_BUILD_OUTPUTS = \
2511 @SIM_ENABLE_ARCH_m68hc11_TRUE@  m68hc11/gencode$(EXEEXT) \
2512 @SIM_ENABLE_ARCH_m68hc11_TRUE@  m68hc11/m68hc11int.c \
2513 @SIM_ENABLE_ARCH_m68hc11_TRUE@  m68hc11/m68hc12int.c
2514
2515 @SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11_gencode_SOURCES = m68hc11/gencode.c
2516 @SIM_ENABLE_ARCH_mcore_TRUE@mcore_libsim_a_SOURCES =
2517 @SIM_ENABLE_ARCH_mcore_TRUE@mcore_libsim_a_LIBADD = \
2518 @SIM_ENABLE_ARCH_mcore_TRUE@    $(common_libcommon_a_OBJECTS) \
2519 @SIM_ENABLE_ARCH_mcore_TRUE@    mcore/interp.o \
2520 @SIM_ENABLE_ARCH_mcore_TRUE@    $(patsubst %,mcore/%,$(SIM_NEW_COMMON_OBJS)) \
2521 @SIM_ENABLE_ARCH_mcore_TRUE@    $(patsubst %,mcore/dv-%.o,$(SIM_HW_DEVICES)) \
2522 @SIM_ENABLE_ARCH_mcore_TRUE@    mcore/modules.o \
2523 @SIM_ENABLE_ARCH_mcore_TRUE@    mcore/sim-resume.o
2524
2525 @SIM_ENABLE_ARCH_mcore_TRUE@mcore_run_SOURCES =
2526 @SIM_ENABLE_ARCH_mcore_TRUE@mcore_run_LDADD = \
2527 @SIM_ENABLE_ARCH_mcore_TRUE@    mcore/nrun.o \
2528 @SIM_ENABLE_ARCH_mcore_TRUE@    mcore/libsim.a \
2529 @SIM_ENABLE_ARCH_mcore_TRUE@    $(SIM_COMMON_LIBS)
2530
2531 @SIM_ENABLE_ARCH_microblaze_TRUE@microblaze_libsim_a_SOURCES =
2532 @SIM_ENABLE_ARCH_microblaze_TRUE@microblaze_libsim_a_LIBADD = \
2533 @SIM_ENABLE_ARCH_microblaze_TRUE@       $(common_libcommon_a_OBJECTS) \
2534 @SIM_ENABLE_ARCH_microblaze_TRUE@       microblaze/interp.o \
2535 @SIM_ENABLE_ARCH_microblaze_TRUE@       $(patsubst %,microblaze/%,$(SIM_NEW_COMMON_OBJS)) \
2536 @SIM_ENABLE_ARCH_microblaze_TRUE@       $(patsubst %,microblaze/dv-%.o,$(SIM_HW_DEVICES)) \
2537 @SIM_ENABLE_ARCH_microblaze_TRUE@       microblaze/modules.o \
2538 @SIM_ENABLE_ARCH_microblaze_TRUE@       microblaze/sim-resume.o
2539
2540 @SIM_ENABLE_ARCH_microblaze_TRUE@microblaze_run_SOURCES =
2541 @SIM_ENABLE_ARCH_microblaze_TRUE@microblaze_run_LDADD = \
2542 @SIM_ENABLE_ARCH_microblaze_TRUE@       microblaze/nrun.o \
2543 @SIM_ENABLE_ARCH_microblaze_TRUE@       microblaze/libsim.a \
2544 @SIM_ENABLE_ARCH_microblaze_TRUE@       $(SIM_COMMON_LIBS)
2545
2546 @SIM_ENABLE_ARCH_mips_TRUE@mips_GEN_OBJ = $(am__append_88) \
2547 @SIM_ENABLE_ARCH_mips_TRUE@     $(am__append_89) $(am__append_90)
2548 @SIM_ENABLE_ARCH_mips_TRUE@mips_libsim_a_SOURCES =
2549 @SIM_ENABLE_ARCH_mips_TRUE@mips_libsim_a_LIBADD = \
2550 @SIM_ENABLE_ARCH_mips_TRUE@     $(common_libcommon_a_OBJECTS) \
2551 @SIM_ENABLE_ARCH_mips_TRUE@     mips/interp.o \
2552 @SIM_ENABLE_ARCH_mips_TRUE@     $(mips_GEN_OBJ) \
2553 @SIM_ENABLE_ARCH_mips_TRUE@     $(patsubst %,mips/%,$(SIM_NEW_COMMON_OBJS)) \
2554 @SIM_ENABLE_ARCH_mips_TRUE@     $(patsubst %,mips/dv-%.o,$(SIM_HW_DEVICES)) \
2555 @SIM_ENABLE_ARCH_mips_TRUE@     $(patsubst %,mips/dv-%.o,$(mips_SIM_EXTRA_HW_DEVICES)) \
2556 @SIM_ENABLE_ARCH_mips_TRUE@     mips/cp1.o \
2557 @SIM_ENABLE_ARCH_mips_TRUE@     mips/dsp.o \
2558 @SIM_ENABLE_ARCH_mips_TRUE@     mips/mdmx.o \
2559 @SIM_ENABLE_ARCH_mips_TRUE@     mips/modules.o \
2560 @SIM_ENABLE_ARCH_mips_TRUE@     mips/sim-main.o \
2561 @SIM_ENABLE_ARCH_mips_TRUE@     mips/sim-resume.o
2562
2563 @SIM_ENABLE_ARCH_mips_TRUE@EXTRA_mips_libsim_a_DEPENDENCIES = $(SIM_MIPS_MULTI_OBJ)
2564 @SIM_ENABLE_ARCH_mips_TRUE@mips_run_SOURCES =
2565 @SIM_ENABLE_ARCH_mips_TRUE@mips_run_LDADD = \
2566 @SIM_ENABLE_ARCH_mips_TRUE@     mips/nrun.o \
2567 @SIM_ENABLE_ARCH_mips_TRUE@     mips/libsim.a \
2568 @SIM_ENABLE_ARCH_mips_TRUE@     $(SIM_COMMON_LIBS)
2569
2570 @SIM_ENABLE_ARCH_mips_TRUE@mips_SIM_EXTRA_HW_DEVICES = tx3904cpu tx3904irc tx3904tmr tx3904sio
2571 @SIM_ENABLE_ARCH_mips_TRUE@mips_BUILT_SRC_FROM_IGEN_ITABLE = \
2572 @SIM_ENABLE_ARCH_mips_TRUE@     mips/itable.h \
2573 @SIM_ENABLE_ARCH_mips_TRUE@     mips/itable.c
2574
2575 @SIM_ENABLE_ARCH_mips_TRUE@mips_BUILT_SRC_FROM_GEN_MODE_SINGLE = \
2576 @SIM_ENABLE_ARCH_mips_TRUE@     mips/icache.h \
2577 @SIM_ENABLE_ARCH_mips_TRUE@     mips/icache.c \
2578 @SIM_ENABLE_ARCH_mips_TRUE@     mips/idecode.h \
2579 @SIM_ENABLE_ARCH_mips_TRUE@     mips/idecode.c \
2580 @SIM_ENABLE_ARCH_mips_TRUE@     mips/semantics.h \
2581 @SIM_ENABLE_ARCH_mips_TRUE@     mips/semantics.c \
2582 @SIM_ENABLE_ARCH_mips_TRUE@     mips/model.h \
2583 @SIM_ENABLE_ARCH_mips_TRUE@     mips/model.c \
2584 @SIM_ENABLE_ARCH_mips_TRUE@     mips/support.h \
2585 @SIM_ENABLE_ARCH_mips_TRUE@     mips/support.c \
2586 @SIM_ENABLE_ARCH_mips_TRUE@     mips/engine.h \
2587 @SIM_ENABLE_ARCH_mips_TRUE@     mips/engine.c \
2588 @SIM_ENABLE_ARCH_mips_TRUE@     mips/irun.c
2589
2590 @SIM_ENABLE_ARCH_mips_TRUE@mips_BUILT_SRC_FROM_GEN_MODE_M16_M16 = \
2591 @SIM_ENABLE_ARCH_mips_TRUE@     mips/m16_icache.h \
2592 @SIM_ENABLE_ARCH_mips_TRUE@     mips/m16_icache.c \
2593 @SIM_ENABLE_ARCH_mips_TRUE@     mips/m16_idecode.h \
2594 @SIM_ENABLE_ARCH_mips_TRUE@     mips/m16_idecode.c \
2595 @SIM_ENABLE_ARCH_mips_TRUE@     mips/m16_semantics.h \
2596 @SIM_ENABLE_ARCH_mips_TRUE@     mips/m16_semantics.c \
2597 @SIM_ENABLE_ARCH_mips_TRUE@     mips/m16_model.h \
2598 @SIM_ENABLE_ARCH_mips_TRUE@     mips/m16_model.c \
2599 @SIM_ENABLE_ARCH_mips_TRUE@     mips/m16_support.h \
2600 @SIM_ENABLE_ARCH_mips_TRUE@     mips/m16_support.c \
2601 @SIM_ENABLE_ARCH_mips_TRUE@mips_BUILT_SRC_FROM_GEN_MODE_M16_M32 = \
2602 @SIM_ENABLE_ARCH_mips_TRUE@     mips/m32_icache.h \
2603 @SIM_ENABLE_ARCH_mips_TRUE@     mips/m32_icache.c \
2604 @SIM_ENABLE_ARCH_mips_TRUE@     mips/m32_idecode.h \
2605 @SIM_ENABLE_ARCH_mips_TRUE@     mips/m32_idecode.c \
2606 @SIM_ENABLE_ARCH_mips_TRUE@     mips/m32_semantics.h \
2607 @SIM_ENABLE_ARCH_mips_TRUE@     mips/m32_semantics.c \
2608 @SIM_ENABLE_ARCH_mips_TRUE@     mips/m32_model.h \
2609 @SIM_ENABLE_ARCH_mips_TRUE@     mips/m32_model.c \
2610 @SIM_ENABLE_ARCH_mips_TRUE@     mips/m32_support.h \
2611 @SIM_ENABLE_ARCH_mips_TRUE@     mips/m32_support.c
2612
2613 @SIM_ENABLE_ARCH_mips_TRUE@mips_BUILD_OUTPUTS =  \
2614 @SIM_ENABLE_ARCH_mips_TRUE@     $(mips_BUILT_SRC_FROM_IGEN_ITABLE) \
2615 @SIM_ENABLE_ARCH_mips_TRUE@     mips/stamp-igen-itable \
2616 @SIM_ENABLE_ARCH_mips_TRUE@     $(am__append_95) $(am__append_96) \
2617 @SIM_ENABLE_ARCH_mips_TRUE@     $(am__append_97)
2618 @SIM_ENABLE_ARCH_mips_TRUE@mips_IGEN_TRACE = # -G omit-line-numbers # -G trace-rule-selection -G trace-rule-rejection -G trace-entries # -G trace-all
2619 @SIM_ENABLE_ARCH_mips_TRUE@mips_IGEN_INSN = $(srcdir)/mips/mips.igen
2620 @SIM_ENABLE_ARCH_mips_TRUE@mips_IGEN_INSN_INC = \
2621 @SIM_ENABLE_ARCH_mips_TRUE@     mips/dsp.igen \
2622 @SIM_ENABLE_ARCH_mips_TRUE@     mips/dsp2.igen \
2623 @SIM_ENABLE_ARCH_mips_TRUE@     mips/m16.igen \
2624 @SIM_ENABLE_ARCH_mips_TRUE@     mips/m16e.igen \
2625 @SIM_ENABLE_ARCH_mips_TRUE@     mips/mdmx.igen \
2626 @SIM_ENABLE_ARCH_mips_TRUE@     mips/micromipsdsp.igen \
2627 @SIM_ENABLE_ARCH_mips_TRUE@     mips/micromips.igen \
2628 @SIM_ENABLE_ARCH_mips_TRUE@     mips/mips3264r2.igen \
2629 @SIM_ENABLE_ARCH_mips_TRUE@     mips/mips3264r6.igen \
2630 @SIM_ENABLE_ARCH_mips_TRUE@     mips/mips3d.igen \
2631 @SIM_ENABLE_ARCH_mips_TRUE@     mips/sb1.igen \
2632 @SIM_ENABLE_ARCH_mips_TRUE@     mips/tx.igen \
2633 @SIM_ENABLE_ARCH_mips_TRUE@     mips/vr.igen
2634
2635 @SIM_ENABLE_ARCH_mips_TRUE@mips_IGEN_DC = $(srcdir)/mips/mips.dc
2636 @SIM_ENABLE_ARCH_mips_TRUE@mips_M16_DC = $(srcdir)/mips/m16.dc
2637 @SIM_ENABLE_ARCH_mips_TRUE@mips_MICROMIPS32_DC = $(srcdir)/mips/micromips.dc
2638 @SIM_ENABLE_ARCH_mips_TRUE@mips_MICROMIPS16_DC = $(srcdir)/mips/micromips16.dc
2639 @SIM_ENABLE_ARCH_mn10300_TRUE@mn10300_libsim_a_SOURCES =
2640 @SIM_ENABLE_ARCH_mn10300_TRUE@mn10300_libsim_a_LIBADD = \
2641 @SIM_ENABLE_ARCH_mn10300_TRUE@  $(common_libcommon_a_OBJECTS) \
2642 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/itable.o \
2643 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/semantics.o \
2644 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/idecode.o \
2645 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/icache.o \
2646 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/engine.o \
2647 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/irun.o \
2648 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/support.o \
2649 @SIM_ENABLE_ARCH_mn10300_TRUE@  $(patsubst %,mn10300/%,$(SIM_NEW_COMMON_OBJS)) \
2650 @SIM_ENABLE_ARCH_mn10300_TRUE@  $(patsubst %,mn10300/dv-%.o,$(SIM_HW_DEVICES)) \
2651 @SIM_ENABLE_ARCH_mn10300_TRUE@  $(patsubst %,mn10300/dv-%.o,$(mn10300_SIM_EXTRA_HW_DEVICES)) \
2652 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/interp.o \
2653 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/modules.o \
2654 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/op_utils.o \
2655 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/sim-resume.o
2656
2657 @SIM_ENABLE_ARCH_mn10300_TRUE@mn10300_run_SOURCES =
2658 @SIM_ENABLE_ARCH_mn10300_TRUE@mn10300_run_LDADD = \
2659 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/nrun.o \
2660 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/libsim.a \
2661 @SIM_ENABLE_ARCH_mn10300_TRUE@  $(SIM_COMMON_LIBS)
2662
2663 @SIM_ENABLE_ARCH_mn10300_TRUE@mn10300_SIM_EXTRA_HW_DEVICES = mn103cpu mn103int mn103tim mn103ser mn103iop
2664 @SIM_ENABLE_ARCH_mn10300_TRUE@mn10300_BUILT_SRC_FROM_IGEN = \
2665 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/icache.h \
2666 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/icache.c \
2667 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/idecode.h \
2668 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/idecode.c \
2669 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/semantics.h \
2670 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/semantics.c \
2671 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/model.h \
2672 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/model.c \
2673 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/support.h \
2674 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/support.c \
2675 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/itable.h \
2676 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/itable.c \
2677 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/engine.h \
2678 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/engine.c \
2679 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/irun.c
2680
2681 @SIM_ENABLE_ARCH_mn10300_TRUE@mn10300_BUILD_OUTPUTS = \
2682 @SIM_ENABLE_ARCH_mn10300_TRUE@  $(mn10300_BUILT_SRC_FROM_IGEN) \
2683 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/stamp-igen
2684
2685 @SIM_ENABLE_ARCH_mn10300_TRUE@mn10300_IGEN_TRACE = # -G omit-line-numbers # -G trace-rule-selection -G trace-rule-rejection -G trace-entries
2686 @SIM_ENABLE_ARCH_mn10300_TRUE@mn10300_IGEN_INSN = $(srcdir)/mn10300/mn10300.igen
2687 @SIM_ENABLE_ARCH_mn10300_TRUE@mn10300_IGEN_INSN_INC = mn10300/am33.igen mn10300/am33-2.igen
2688 @SIM_ENABLE_ARCH_mn10300_TRUE@mn10300_IGEN_DC = $(srcdir)/mn10300/mn10300.dc
2689 @SIM_ENABLE_ARCH_moxie_TRUE@moxie_libsim_a_SOURCES =
2690 @SIM_ENABLE_ARCH_moxie_TRUE@moxie_libsim_a_LIBADD = \
2691 @SIM_ENABLE_ARCH_moxie_TRUE@    $(common_libcommon_a_OBJECTS) \
2692 @SIM_ENABLE_ARCH_moxie_TRUE@    $(patsubst %,moxie/%,$(SIM_NEW_COMMON_OBJS)) \
2693 @SIM_ENABLE_ARCH_moxie_TRUE@    $(patsubst %,moxie/dv-%.o,$(SIM_HW_DEVICES)) \
2694 @SIM_ENABLE_ARCH_moxie_TRUE@    moxie/interp.o \
2695 @SIM_ENABLE_ARCH_moxie_TRUE@    moxie/modules.o \
2696 @SIM_ENABLE_ARCH_moxie_TRUE@    moxie/sim-resume.o
2697
2698 @SIM_ENABLE_ARCH_moxie_TRUE@moxie_run_SOURCES =
2699 @SIM_ENABLE_ARCH_moxie_TRUE@moxie_run_LDADD = \
2700 @SIM_ENABLE_ARCH_moxie_TRUE@    moxie/nrun.o \
2701 @SIM_ENABLE_ARCH_moxie_TRUE@    moxie/libsim.a \
2702 @SIM_ENABLE_ARCH_moxie_TRUE@    $(SIM_COMMON_LIBS)
2703
2704 @SIM_ENABLE_ARCH_moxie_TRUE@dtbdir = $(datadir)/gdb/dtb
2705 @SIM_ENABLE_ARCH_moxie_TRUE@dtb_DATA = moxie/moxie-gdb.dtb
2706 @SIM_ENABLE_ARCH_msp430_TRUE@msp430_libsim_a_SOURCES =
2707 @SIM_ENABLE_ARCH_msp430_TRUE@msp430_libsim_a_LIBADD = \
2708 @SIM_ENABLE_ARCH_msp430_TRUE@   $(common_libcommon_a_OBJECTS) \
2709 @SIM_ENABLE_ARCH_msp430_TRUE@   $(patsubst %,msp430/%,$(SIM_NEW_COMMON_OBJS)) \
2710 @SIM_ENABLE_ARCH_msp430_TRUE@   $(patsubst %,msp430/dv-%.o,$(SIM_HW_DEVICES)) \
2711 @SIM_ENABLE_ARCH_msp430_TRUE@   msp430/msp430-sim.o \
2712 @SIM_ENABLE_ARCH_msp430_TRUE@   msp430/modules.o \
2713 @SIM_ENABLE_ARCH_msp430_TRUE@   msp430/sim-resume.o
2714
2715 @SIM_ENABLE_ARCH_msp430_TRUE@msp430_run_SOURCES =
2716 @SIM_ENABLE_ARCH_msp430_TRUE@msp430_run_LDADD = \
2717 @SIM_ENABLE_ARCH_msp430_TRUE@   msp430/nrun.o \
2718 @SIM_ENABLE_ARCH_msp430_TRUE@   msp430/libsim.a \
2719 @SIM_ENABLE_ARCH_msp430_TRUE@   $(SIM_COMMON_LIBS)
2720
2721 @SIM_ENABLE_ARCH_or1k_TRUE@or1k_libsim_a_SOURCES =
2722 @SIM_ENABLE_ARCH_or1k_TRUE@or1k_libsim_a_LIBADD = \
2723 @SIM_ENABLE_ARCH_or1k_TRUE@     $(common_libcommon_a_OBJECTS) \
2724 @SIM_ENABLE_ARCH_or1k_TRUE@     $(patsubst %,or1k/%,$(SIM_NEW_COMMON_OBJS)) \
2725 @SIM_ENABLE_ARCH_or1k_TRUE@     $(patsubst %,or1k/dv-%.o,$(SIM_HW_DEVICES)) \
2726 @SIM_ENABLE_ARCH_or1k_TRUE@     or1k/modules.o \
2727 @SIM_ENABLE_ARCH_or1k_TRUE@     \
2728 @SIM_ENABLE_ARCH_or1k_TRUE@     or1k/cgen-accfp.o \
2729 @SIM_ENABLE_ARCH_or1k_TRUE@     or1k/cgen-fpu.o \
2730 @SIM_ENABLE_ARCH_or1k_TRUE@     or1k/cgen-run.o \
2731 @SIM_ENABLE_ARCH_or1k_TRUE@     or1k/cgen-scache.o \
2732 @SIM_ENABLE_ARCH_or1k_TRUE@     or1k/cgen-trace.o \
2733 @SIM_ENABLE_ARCH_or1k_TRUE@     or1k/cgen-utils.o \
2734 @SIM_ENABLE_ARCH_or1k_TRUE@     \
2735 @SIM_ENABLE_ARCH_or1k_TRUE@     or1k/arch.o \
2736 @SIM_ENABLE_ARCH_or1k_TRUE@     or1k/cpu.o \
2737 @SIM_ENABLE_ARCH_or1k_TRUE@     or1k/decode.o \
2738 @SIM_ENABLE_ARCH_or1k_TRUE@     or1k/mloop.o \
2739 @SIM_ENABLE_ARCH_or1k_TRUE@     or1k/model.o \
2740 @SIM_ENABLE_ARCH_or1k_TRUE@     or1k/sem.o \
2741 @SIM_ENABLE_ARCH_or1k_TRUE@     \
2742 @SIM_ENABLE_ARCH_or1k_TRUE@     or1k/or1k.o \
2743 @SIM_ENABLE_ARCH_or1k_TRUE@     or1k/sim-if.o \
2744 @SIM_ENABLE_ARCH_or1k_TRUE@     or1k/traps.o
2745
2746 @SIM_ENABLE_ARCH_or1k_TRUE@or1k_run_SOURCES =
2747 @SIM_ENABLE_ARCH_or1k_TRUE@or1k_run_LDADD = \
2748 @SIM_ENABLE_ARCH_or1k_TRUE@     or1k/nrun.o \
2749 @SIM_ENABLE_ARCH_or1k_TRUE@     or1k/libsim.a \
2750 @SIM_ENABLE_ARCH_or1k_TRUE@     $(SIM_COMMON_LIBS)
2751
2752 @SIM_ENABLE_ARCH_or1k_TRUE@or1kdocdir = $(docdir)/or1k
2753 @SIM_ENABLE_ARCH_or1k_TRUE@or1kdoc_DATA = or1k/README
2754 @SIM_ENABLE_ARCH_or1k_TRUE@or1k_BUILD_OUTPUTS = \
2755 @SIM_ENABLE_ARCH_or1k_TRUE@     or1k/mloop.c \
2756 @SIM_ENABLE_ARCH_or1k_TRUE@     or1k/stamp-mloop
2757
2758 @SIM_ENABLE_ARCH_ppc_TRUE@ppc_run_SOURCES =
2759 @SIM_ENABLE_ARCH_ppc_TRUE@ppc_run_LDADD = \
2760 @SIM_ENABLE_ARCH_ppc_TRUE@      ppc/main.o \
2761 @SIM_ENABLE_ARCH_ppc_TRUE@      ppc/libsim.a \
2762 @SIM_ENABLE_ARCH_ppc_TRUE@      $(SIM_COMMON_LIBS)
2763
2764 @SIM_ENABLE_ARCH_ppc_TRUE@ppcdocdir = $(docdir)/ppc
2765 @SIM_ENABLE_ARCH_ppc_TRUE@ppcdoc_DATA = ppc/BUGS ppc/INSTALL ppc/README ppc/RUN
2766 @SIM_ENABLE_ARCH_pru_TRUE@pru_libsim_a_SOURCES =
2767 @SIM_ENABLE_ARCH_pru_TRUE@pru_libsim_a_LIBADD = \
2768 @SIM_ENABLE_ARCH_pru_TRUE@      $(common_libcommon_a_OBJECTS) \
2769 @SIM_ENABLE_ARCH_pru_TRUE@      $(patsubst %,pru/%,$(SIM_NEW_COMMON_OBJS)) \
2770 @SIM_ENABLE_ARCH_pru_TRUE@      $(patsubst %,pru/dv-%.o,$(SIM_HW_DEVICES)) \
2771 @SIM_ENABLE_ARCH_pru_TRUE@      pru/interp.o \
2772 @SIM_ENABLE_ARCH_pru_TRUE@      pru/modules.o \
2773 @SIM_ENABLE_ARCH_pru_TRUE@      pru/sim-resume.o
2774
2775 @SIM_ENABLE_ARCH_pru_TRUE@pru_run_SOURCES =
2776 @SIM_ENABLE_ARCH_pru_TRUE@pru_run_LDADD = \
2777 @SIM_ENABLE_ARCH_pru_TRUE@      pru/nrun.o \
2778 @SIM_ENABLE_ARCH_pru_TRUE@      pru/libsim.a \
2779 @SIM_ENABLE_ARCH_pru_TRUE@      $(SIM_COMMON_LIBS)
2780
2781 @SIM_ENABLE_ARCH_riscv_TRUE@riscv_libsim_a_SOURCES =
2782 @SIM_ENABLE_ARCH_riscv_TRUE@riscv_libsim_a_LIBADD = \
2783 @SIM_ENABLE_ARCH_riscv_TRUE@    $(common_libcommon_a_OBJECTS) \
2784 @SIM_ENABLE_ARCH_riscv_TRUE@    $(patsubst %,riscv/%,$(SIM_NEW_COMMON_OBJS)) \
2785 @SIM_ENABLE_ARCH_riscv_TRUE@    $(patsubst %,riscv/dv-%.o,$(SIM_HW_DEVICES)) \
2786 @SIM_ENABLE_ARCH_riscv_TRUE@    riscv/interp.o \
2787 @SIM_ENABLE_ARCH_riscv_TRUE@    riscv/machs.o \
2788 @SIM_ENABLE_ARCH_riscv_TRUE@    riscv/modules.o \
2789 @SIM_ENABLE_ARCH_riscv_TRUE@    riscv/sim-main.o \
2790 @SIM_ENABLE_ARCH_riscv_TRUE@    riscv/sim-resume.o
2791
2792 @SIM_ENABLE_ARCH_riscv_TRUE@riscv_run_SOURCES =
2793 @SIM_ENABLE_ARCH_riscv_TRUE@riscv_run_LDADD = \
2794 @SIM_ENABLE_ARCH_riscv_TRUE@    riscv/nrun.o \
2795 @SIM_ENABLE_ARCH_riscv_TRUE@    riscv/libsim.a \
2796 @SIM_ENABLE_ARCH_riscv_TRUE@    $(SIM_COMMON_LIBS)
2797
2798 @SIM_ENABLE_ARCH_rl78_TRUE@rl78_libsim_a_SOURCES =
2799 @SIM_ENABLE_ARCH_rl78_TRUE@rl78_libsim_a_LIBADD = \
2800 @SIM_ENABLE_ARCH_rl78_TRUE@     $(common_libcommon_a_OBJECTS) \
2801 @SIM_ENABLE_ARCH_rl78_TRUE@     rl78/load.o \
2802 @SIM_ENABLE_ARCH_rl78_TRUE@     rl78/mem.o \
2803 @SIM_ENABLE_ARCH_rl78_TRUE@     rl78/cpu.o \
2804 @SIM_ENABLE_ARCH_rl78_TRUE@     rl78/rl78.o \
2805 @SIM_ENABLE_ARCH_rl78_TRUE@     rl78/gdb-if.o \
2806 @SIM_ENABLE_ARCH_rl78_TRUE@     rl78/modules.o \
2807 @SIM_ENABLE_ARCH_rl78_TRUE@     rl78/trace.o
2808
2809 @SIM_ENABLE_ARCH_rl78_TRUE@rl78_run_SOURCES =
2810 @SIM_ENABLE_ARCH_rl78_TRUE@rl78_run_LDADD = \
2811 @SIM_ENABLE_ARCH_rl78_TRUE@     rl78/main.o \
2812 @SIM_ENABLE_ARCH_rl78_TRUE@     rl78/libsim.a \
2813 @SIM_ENABLE_ARCH_rl78_TRUE@     $(SIM_COMMON_LIBS)
2814
2815 @SIM_ENABLE_ARCH_rx_TRUE@rx_libsim_a_SOURCES =
2816 @SIM_ENABLE_ARCH_rx_TRUE@rx_libsim_a_LIBADD = \
2817 @SIM_ENABLE_ARCH_rx_TRUE@       $(common_libcommon_a_OBJECTS) \
2818 @SIM_ENABLE_ARCH_rx_TRUE@       rx/fpu.o \
2819 @SIM_ENABLE_ARCH_rx_TRUE@       rx/load.o \
2820 @SIM_ENABLE_ARCH_rx_TRUE@       rx/mem.o \
2821 @SIM_ENABLE_ARCH_rx_TRUE@       rx/misc.o \
2822 @SIM_ENABLE_ARCH_rx_TRUE@       rx/reg.o \
2823 @SIM_ENABLE_ARCH_rx_TRUE@       rx/rx.o \
2824 @SIM_ENABLE_ARCH_rx_TRUE@       rx/syscalls.o \
2825 @SIM_ENABLE_ARCH_rx_TRUE@       rx/trace.o \
2826 @SIM_ENABLE_ARCH_rx_TRUE@       rx/gdb-if.o \
2827 @SIM_ENABLE_ARCH_rx_TRUE@       rx/err.o \
2828 @SIM_ENABLE_ARCH_rx_TRUE@       rx/modules.o
2829
2830 @SIM_ENABLE_ARCH_rx_TRUE@rx_run_SOURCES =
2831 @SIM_ENABLE_ARCH_rx_TRUE@rx_run_LDADD = \
2832 @SIM_ENABLE_ARCH_rx_TRUE@       rx/main.o \
2833 @SIM_ENABLE_ARCH_rx_TRUE@       rx/libsim.a \
2834 @SIM_ENABLE_ARCH_rx_TRUE@       $(SIM_COMMON_LIBS)
2835
2836 @SIM_ENABLE_ARCH_rx_TRUE@rxdocdir = $(docdir)/rx
2837 @SIM_ENABLE_ARCH_rx_TRUE@rxdoc_DATA = rx/README.txt
2838 @SIM_ENABLE_ARCH_sh_TRUE@sh_libsim_a_SOURCES =
2839 @SIM_ENABLE_ARCH_sh_TRUE@sh_libsim_a_LIBADD = \
2840 @SIM_ENABLE_ARCH_sh_TRUE@       $(common_libcommon_a_OBJECTS) \
2841 @SIM_ENABLE_ARCH_sh_TRUE@       sh/interp.o \
2842 @SIM_ENABLE_ARCH_sh_TRUE@       $(patsubst %,sh/%,$(SIM_NEW_COMMON_OBJS)) \
2843 @SIM_ENABLE_ARCH_sh_TRUE@       $(patsubst %,sh/dv-%.o,$(SIM_HW_DEVICES)) \
2844 @SIM_ENABLE_ARCH_sh_TRUE@       sh/modules.o \
2845 @SIM_ENABLE_ARCH_sh_TRUE@       sh/table.o
2846
2847 @SIM_ENABLE_ARCH_sh_TRUE@sh_run_SOURCES =
2848 @SIM_ENABLE_ARCH_sh_TRUE@sh_run_LDADD = \
2849 @SIM_ENABLE_ARCH_sh_TRUE@       sh/nrun.o \
2850 @SIM_ENABLE_ARCH_sh_TRUE@       sh/libsim.a \
2851 @SIM_ENABLE_ARCH_sh_TRUE@       $(SIM_COMMON_LIBS)
2852
2853 @SIM_ENABLE_ARCH_sh_TRUE@sh_BUILD_OUTPUTS = \
2854 @SIM_ENABLE_ARCH_sh_TRUE@       sh/gencode$(EXEEXT) \
2855 @SIM_ENABLE_ARCH_sh_TRUE@       sh/table.c
2856
2857 @SIM_ENABLE_ARCH_sh_TRUE@sh_gencode_SOURCES = sh/gencode.c
2858 @SIM_ENABLE_ARCH_v850_TRUE@v850_libsim_a_SOURCES =
2859 @SIM_ENABLE_ARCH_v850_TRUE@v850_libsim_a_LIBADD = \
2860 @SIM_ENABLE_ARCH_v850_TRUE@     $(common_libcommon_a_OBJECTS) \
2861 @SIM_ENABLE_ARCH_v850_TRUE@     $(patsubst %,v850/%,$(SIM_NEW_COMMON_OBJS)) \
2862 @SIM_ENABLE_ARCH_v850_TRUE@     $(patsubst %,v850/dv-%.o,$(SIM_HW_DEVICES)) \
2863 @SIM_ENABLE_ARCH_v850_TRUE@     v850/simops.o \
2864 @SIM_ENABLE_ARCH_v850_TRUE@     v850/interp.o \
2865 @SIM_ENABLE_ARCH_v850_TRUE@     v850/itable.o \
2866 @SIM_ENABLE_ARCH_v850_TRUE@     v850/semantics.o \
2867 @SIM_ENABLE_ARCH_v850_TRUE@     v850/idecode.o \
2868 @SIM_ENABLE_ARCH_v850_TRUE@     v850/icache.o \
2869 @SIM_ENABLE_ARCH_v850_TRUE@     v850/engine.o \
2870 @SIM_ENABLE_ARCH_v850_TRUE@     v850/irun.o \
2871 @SIM_ENABLE_ARCH_v850_TRUE@     v850/support.o \
2872 @SIM_ENABLE_ARCH_v850_TRUE@     v850/modules.o \
2873 @SIM_ENABLE_ARCH_v850_TRUE@     v850/sim-resume.o
2874
2875 @SIM_ENABLE_ARCH_v850_TRUE@v850_run_SOURCES =
2876 @SIM_ENABLE_ARCH_v850_TRUE@v850_run_LDADD = \
2877 @SIM_ENABLE_ARCH_v850_TRUE@     v850/nrun.o \
2878 @SIM_ENABLE_ARCH_v850_TRUE@     v850/libsim.a \
2879 @SIM_ENABLE_ARCH_v850_TRUE@     $(SIM_COMMON_LIBS)
2880
2881 @SIM_ENABLE_ARCH_v850_TRUE@v850_BUILT_SRC_FROM_IGEN = \
2882 @SIM_ENABLE_ARCH_v850_TRUE@     v850/icache.h \
2883 @SIM_ENABLE_ARCH_v850_TRUE@     v850/icache.c \
2884 @SIM_ENABLE_ARCH_v850_TRUE@     v850/idecode.h \
2885 @SIM_ENABLE_ARCH_v850_TRUE@     v850/idecode.c \
2886 @SIM_ENABLE_ARCH_v850_TRUE@     v850/semantics.h \
2887 @SIM_ENABLE_ARCH_v850_TRUE@     v850/semantics.c \
2888 @SIM_ENABLE_ARCH_v850_TRUE@     v850/model.h \
2889 @SIM_ENABLE_ARCH_v850_TRUE@     v850/model.c \
2890 @SIM_ENABLE_ARCH_v850_TRUE@     v850/support.h \
2891 @SIM_ENABLE_ARCH_v850_TRUE@     v850/support.c \
2892 @SIM_ENABLE_ARCH_v850_TRUE@     v850/itable.h \
2893 @SIM_ENABLE_ARCH_v850_TRUE@     v850/itable.c \
2894 @SIM_ENABLE_ARCH_v850_TRUE@     v850/engine.h \
2895 @SIM_ENABLE_ARCH_v850_TRUE@     v850/engine.c \
2896 @SIM_ENABLE_ARCH_v850_TRUE@     v850/irun.c
2897
2898 @SIM_ENABLE_ARCH_v850_TRUE@v850_BUILD_OUTPUTS = \
2899 @SIM_ENABLE_ARCH_v850_TRUE@     $(v850_BUILT_SRC_FROM_IGEN) \
2900 @SIM_ENABLE_ARCH_v850_TRUE@     v850/stamp-igen
2901
2902 @SIM_ENABLE_ARCH_v850_TRUE@v850_IGEN_TRACE = # -G omit-line-numbers # -G trace-rule-selection -G trace-rule-rejection -G trace-entries
2903 @SIM_ENABLE_ARCH_v850_TRUE@v850_IGEN_INSN = $(srcdir)/v850/v850.igen
2904 @SIM_ENABLE_ARCH_v850_TRUE@v850_IGEN_DC = $(srcdir)/v850/v850.dc
2905 all: $(BUILT_SOURCES) config.h
2906         $(MAKE) $(AM_MAKEFLAGS) all-recursive
2907
2908 .SUFFIXES:
2909 .SUFFIXES: .c .lo .log .o .obj .test .test$(EXEEXT) .trs
2910 am--refresh: Makefile
2911         @:
2912 $(srcdir)/Makefile.in: @MAINTAINER_MODE_TRUE@ $(srcdir)/Makefile.am $(srcdir)/common/local.mk $(srcdir)/igen/local.mk $(srcdir)/testsuite/local.mk $(srcdir)/testsuite/common/local.mk $(srcdir)/aarch64/local.mk $(srcdir)/arm/local.mk $(srcdir)/avr/local.mk $(srcdir)/bfin/local.mk $(srcdir)/bpf/local.mk $(srcdir)/cr16/local.mk $(srcdir)/cris/local.mk $(srcdir)/d10v/local.mk $(srcdir)/erc32/local.mk $(srcdir)/example-synacor/local.mk $(srcdir)/frv/local.mk $(srcdir)/ft32/local.mk $(srcdir)/h8300/local.mk $(srcdir)/iq2000/local.mk $(srcdir)/lm32/local.mk $(srcdir)/m32c/local.mk $(srcdir)/m32r/local.mk $(srcdir)/m68hc11/local.mk $(srcdir)/mcore/local.mk $(srcdir)/microblaze/local.mk $(srcdir)/mips/local.mk $(srcdir)/mn10300/local.mk $(srcdir)/moxie/local.mk $(srcdir)/msp430/local.mk $(srcdir)/or1k/local.mk $(srcdir)/ppc/local.mk $(srcdir)/pru/local.mk $(srcdir)/riscv/local.mk $(srcdir)/rl78/local.mk $(srcdir)/rx/local.mk $(srcdir)/sh/local.mk $(srcdir)/v850/local.mk $(am__configure_deps)
2913         @for dep in $?; do \
2914           case '$(am__configure_deps)' in \
2915             *$$dep*) \
2916               echo ' cd $(srcdir) && $(AUTOMAKE) --foreign'; \
2917               $(am__cd) $(srcdir) && $(AUTOMAKE) --foreign \
2918                 && exit 0; \
2919               exit 1;; \
2920           esac; \
2921         done; \
2922         echo ' cd $(top_srcdir) && $(AUTOMAKE) --foreign Makefile'; \
2923         $(am__cd) $(top_srcdir) && \
2924           $(AUTOMAKE) --foreign Makefile
2925 Makefile: $(srcdir)/Makefile.in $(top_builddir)/config.status
2926         @case '$?' in \
2927           *config.status*) \
2928             echo ' $(SHELL) ./config.status'; \
2929             $(SHELL) ./config.status;; \
2930           *) \
2931             echo ' cd $(top_builddir) && $(SHELL) ./config.status $@ $(am__depfiles_maybe)'; \
2932             cd $(top_builddir) && $(SHELL) ./config.status $@ $(am__depfiles_maybe);; \
2933         esac;
2934 $(srcdir)/common/local.mk $(srcdir)/igen/local.mk $(srcdir)/testsuite/local.mk $(srcdir)/testsuite/common/local.mk $(srcdir)/aarch64/local.mk $(srcdir)/arm/local.mk $(srcdir)/avr/local.mk $(srcdir)/bfin/local.mk $(srcdir)/bpf/local.mk $(srcdir)/cr16/local.mk $(srcdir)/cris/local.mk $(srcdir)/d10v/local.mk $(srcdir)/erc32/local.mk $(srcdir)/example-synacor/local.mk $(srcdir)/frv/local.mk $(srcdir)/ft32/local.mk $(srcdir)/h8300/local.mk $(srcdir)/iq2000/local.mk $(srcdir)/lm32/local.mk $(srcdir)/m32c/local.mk $(srcdir)/m32r/local.mk $(srcdir)/m68hc11/local.mk $(srcdir)/mcore/local.mk $(srcdir)/microblaze/local.mk $(srcdir)/mips/local.mk $(srcdir)/mn10300/local.mk $(srcdir)/moxie/local.mk $(srcdir)/msp430/local.mk $(srcdir)/or1k/local.mk $(srcdir)/ppc/local.mk $(srcdir)/pru/local.mk $(srcdir)/riscv/local.mk $(srcdir)/rl78/local.mk $(srcdir)/rx/local.mk $(srcdir)/sh/local.mk $(srcdir)/v850/local.mk $(am__empty):
2935
2936 $(top_builddir)/config.status: $(top_srcdir)/configure $(CONFIG_STATUS_DEPENDENCIES)
2937         $(SHELL) ./config.status --recheck
2938
2939 $(top_srcdir)/configure: @MAINTAINER_MODE_TRUE@ $(am__configure_deps)
2940         $(am__cd) $(srcdir) && $(AUTOCONF)
2941 $(ACLOCAL_M4): @MAINTAINER_MODE_TRUE@ $(am__aclocal_m4_deps)
2942         $(am__cd) $(srcdir) && $(ACLOCAL) $(ACLOCAL_AMFLAGS)
2943 $(am__aclocal_m4_deps):
2944
2945 config.h: stamp-h1
2946         @test -f $@ || rm -f stamp-h1
2947         @test -f $@ || $(MAKE) $(AM_MAKEFLAGS) stamp-h1
2948
2949 stamp-h1: $(srcdir)/config.h.in $(top_builddir)/config.status
2950         @rm -f stamp-h1
2951         cd $(top_builddir) && $(SHELL) ./config.status config.h
2952 $(srcdir)/config.h.in: @MAINTAINER_MODE_TRUE@ $(am__configure_deps)
2953         ($(am__cd) $(top_srcdir) && $(AUTOHEADER))
2954         rm -f stamp-h1
2955         touch $@
2956
2957 distclean-hdr:
2958         -rm -f config.h stamp-h1
2959 Make-common.sim: $(top_builddir)/config.status $(top_srcdir)/common/Make-common.in
2960         cd $(top_builddir) && $(SHELL) ./config.status $@
2961 aarch64/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/aarch64/Makefile.in
2962         cd $(top_builddir) && $(SHELL) ./config.status $@
2963 aarch64/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
2964         cd $(top_builddir) && $(SHELL) ./config.status $@
2965 arm/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/arm/Makefile.in
2966         cd $(top_builddir) && $(SHELL) ./config.status $@
2967 arm/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
2968         cd $(top_builddir) && $(SHELL) ./config.status $@
2969 avr/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/avr/Makefile.in
2970         cd $(top_builddir) && $(SHELL) ./config.status $@
2971 avr/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
2972         cd $(top_builddir) && $(SHELL) ./config.status $@
2973 bfin/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/bfin/Makefile.in
2974         cd $(top_builddir) && $(SHELL) ./config.status $@
2975 bfin/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
2976         cd $(top_builddir) && $(SHELL) ./config.status $@
2977 bpf/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/bpf/Makefile.in
2978         cd $(top_builddir) && $(SHELL) ./config.status $@
2979 bpf/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
2980         cd $(top_builddir) && $(SHELL) ./config.status $@
2981 cr16/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/cr16/Makefile.in
2982         cd $(top_builddir) && $(SHELL) ./config.status $@
2983 cr16/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
2984         cd $(top_builddir) && $(SHELL) ./config.status $@
2985 cris/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/cris/Makefile.in
2986         cd $(top_builddir) && $(SHELL) ./config.status $@
2987 cris/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
2988         cd $(top_builddir) && $(SHELL) ./config.status $@
2989 d10v/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/d10v/Makefile.in
2990         cd $(top_builddir) && $(SHELL) ./config.status $@
2991 d10v/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
2992         cd $(top_builddir) && $(SHELL) ./config.status $@
2993 frv/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/frv/Makefile.in
2994         cd $(top_builddir) && $(SHELL) ./config.status $@
2995 frv/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
2996         cd $(top_builddir) && $(SHELL) ./config.status $@
2997 ft32/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/ft32/Makefile.in
2998         cd $(top_builddir) && $(SHELL) ./config.status $@
2999 ft32/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
3000         cd $(top_builddir) && $(SHELL) ./config.status $@
3001 h8300/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/h8300/Makefile.in
3002         cd $(top_builddir) && $(SHELL) ./config.status $@
3003 h8300/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
3004         cd $(top_builddir) && $(SHELL) ./config.status $@
3005 iq2000/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/iq2000/Makefile.in
3006         cd $(top_builddir) && $(SHELL) ./config.status $@
3007 iq2000/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
3008         cd $(top_builddir) && $(SHELL) ./config.status $@
3009 lm32/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/lm32/Makefile.in
3010         cd $(top_builddir) && $(SHELL) ./config.status $@
3011 lm32/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
3012         cd $(top_builddir) && $(SHELL) ./config.status $@
3013 m32c/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/m32c/Makefile.in
3014         cd $(top_builddir) && $(SHELL) ./config.status $@
3015 m32c/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
3016         cd $(top_builddir) && $(SHELL) ./config.status $@
3017 m32r/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/m32r/Makefile.in
3018         cd $(top_builddir) && $(SHELL) ./config.status $@
3019 m32r/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
3020         cd $(top_builddir) && $(SHELL) ./config.status $@
3021 m68hc11/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/m68hc11/Makefile.in
3022         cd $(top_builddir) && $(SHELL) ./config.status $@
3023 m68hc11/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
3024         cd $(top_builddir) && $(SHELL) ./config.status $@
3025 mcore/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/mcore/Makefile.in
3026         cd $(top_builddir) && $(SHELL) ./config.status $@
3027 mcore/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
3028         cd $(top_builddir) && $(SHELL) ./config.status $@
3029 microblaze/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/microblaze/Makefile.in
3030         cd $(top_builddir) && $(SHELL) ./config.status $@
3031 microblaze/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
3032         cd $(top_builddir) && $(SHELL) ./config.status $@
3033 mips/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/mips/Makefile.in
3034         cd $(top_builddir) && $(SHELL) ./config.status $@
3035 mips/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
3036         cd $(top_builddir) && $(SHELL) ./config.status $@
3037 mn10300/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/mn10300/Makefile.in
3038         cd $(top_builddir) && $(SHELL) ./config.status $@
3039 mn10300/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
3040         cd $(top_builddir) && $(SHELL) ./config.status $@
3041 moxie/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/moxie/Makefile.in
3042         cd $(top_builddir) && $(SHELL) ./config.status $@
3043 moxie/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
3044         cd $(top_builddir) && $(SHELL) ./config.status $@
3045 msp430/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/msp430/Makefile.in
3046         cd $(top_builddir) && $(SHELL) ./config.status $@
3047 msp430/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
3048         cd $(top_builddir) && $(SHELL) ./config.status $@
3049 or1k/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/or1k/Makefile.in
3050         cd $(top_builddir) && $(SHELL) ./config.status $@
3051 or1k/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
3052         cd $(top_builddir) && $(SHELL) ./config.status $@
3053 ppc/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
3054         cd $(top_builddir) && $(SHELL) ./config.status $@
3055 pru/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/pru/Makefile.in
3056         cd $(top_builddir) && $(SHELL) ./config.status $@
3057 pru/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
3058         cd $(top_builddir) && $(SHELL) ./config.status $@
3059 riscv/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/riscv/Makefile.in
3060         cd $(top_builddir) && $(SHELL) ./config.status $@
3061 riscv/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
3062         cd $(top_builddir) && $(SHELL) ./config.status $@
3063 rl78/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/rl78/Makefile.in
3064         cd $(top_builddir) && $(SHELL) ./config.status $@
3065 rl78/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
3066         cd $(top_builddir) && $(SHELL) ./config.status $@
3067 rx/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/rx/Makefile.in
3068         cd $(top_builddir) && $(SHELL) ./config.status $@
3069 rx/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
3070         cd $(top_builddir) && $(SHELL) ./config.status $@
3071 sh/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/sh/Makefile.in
3072         cd $(top_builddir) && $(SHELL) ./config.status $@
3073 sh/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
3074         cd $(top_builddir) && $(SHELL) ./config.status $@
3075 erc32/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/erc32/Makefile.in
3076         cd $(top_builddir) && $(SHELL) ./config.status $@
3077 erc32/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
3078         cd $(top_builddir) && $(SHELL) ./config.status $@
3079 v850/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/v850/Makefile.in
3080         cd $(top_builddir) && $(SHELL) ./config.status $@
3081 v850/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
3082         cd $(top_builddir) && $(SHELL) ./config.status $@
3083 example-synacor/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/example-synacor/Makefile.in
3084         cd $(top_builddir) && $(SHELL) ./config.status $@
3085 example-synacor/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
3086         cd $(top_builddir) && $(SHELL) ./config.status $@
3087 arch-subdir.mk: $(top_builddir)/config.status $(srcdir)/arch-subdir.mk.in
3088         cd $(top_builddir) && $(SHELL) ./config.status $@
3089 .gdbinit: $(top_builddir)/config.status $(srcdir)/gdbinit.in
3090         cd $(top_builddir) && $(SHELL) ./config.status $@
3091
3092 clean-noinstLIBRARIES:
3093         -test -z "$(noinst_LIBRARIES)" || rm -f $(noinst_LIBRARIES)
3094 aarch64/$(am__dirstamp):
3095         @$(MKDIR_P) aarch64
3096         @: > aarch64/$(am__dirstamp)
3097
3098 aarch64/libsim.a: $(aarch64_libsim_a_OBJECTS) $(aarch64_libsim_a_DEPENDENCIES) $(EXTRA_aarch64_libsim_a_DEPENDENCIES) aarch64/$(am__dirstamp)
3099         $(AM_V_at)-rm -f aarch64/libsim.a
3100         $(AM_V_AR)$(aarch64_libsim_a_AR) aarch64/libsim.a $(aarch64_libsim_a_OBJECTS) $(aarch64_libsim_a_LIBADD)
3101         $(AM_V_at)$(RANLIB) aarch64/libsim.a
3102 arm/$(am__dirstamp):
3103         @$(MKDIR_P) arm
3104         @: > arm/$(am__dirstamp)
3105
3106 arm/libsim.a: $(arm_libsim_a_OBJECTS) $(arm_libsim_a_DEPENDENCIES) $(EXTRA_arm_libsim_a_DEPENDENCIES) arm/$(am__dirstamp)
3107         $(AM_V_at)-rm -f arm/libsim.a
3108         $(AM_V_AR)$(arm_libsim_a_AR) arm/libsim.a $(arm_libsim_a_OBJECTS) $(arm_libsim_a_LIBADD)
3109         $(AM_V_at)$(RANLIB) arm/libsim.a
3110 avr/$(am__dirstamp):
3111         @$(MKDIR_P) avr
3112         @: > avr/$(am__dirstamp)
3113
3114 avr/libsim.a: $(avr_libsim_a_OBJECTS) $(avr_libsim_a_DEPENDENCIES) $(EXTRA_avr_libsim_a_DEPENDENCIES) avr/$(am__dirstamp)
3115         $(AM_V_at)-rm -f avr/libsim.a
3116         $(AM_V_AR)$(avr_libsim_a_AR) avr/libsim.a $(avr_libsim_a_OBJECTS) $(avr_libsim_a_LIBADD)
3117         $(AM_V_at)$(RANLIB) avr/libsim.a
3118 bfin/$(am__dirstamp):
3119         @$(MKDIR_P) bfin
3120         @: > bfin/$(am__dirstamp)
3121
3122 bfin/libsim.a: $(bfin_libsim_a_OBJECTS) $(bfin_libsim_a_DEPENDENCIES) $(EXTRA_bfin_libsim_a_DEPENDENCIES) bfin/$(am__dirstamp)
3123         $(AM_V_at)-rm -f bfin/libsim.a
3124         $(AM_V_AR)$(bfin_libsim_a_AR) bfin/libsim.a $(bfin_libsim_a_OBJECTS) $(bfin_libsim_a_LIBADD)
3125         $(AM_V_at)$(RANLIB) bfin/libsim.a
3126 bpf/$(am__dirstamp):
3127         @$(MKDIR_P) bpf
3128         @: > bpf/$(am__dirstamp)
3129
3130 bpf/libsim.a: $(bpf_libsim_a_OBJECTS) $(bpf_libsim_a_DEPENDENCIES) $(EXTRA_bpf_libsim_a_DEPENDENCIES) bpf/$(am__dirstamp)
3131         $(AM_V_at)-rm -f bpf/libsim.a
3132         $(AM_V_AR)$(bpf_libsim_a_AR) bpf/libsim.a $(bpf_libsim_a_OBJECTS) $(bpf_libsim_a_LIBADD)
3133         $(AM_V_at)$(RANLIB) bpf/libsim.a
3134 common/$(am__dirstamp):
3135         @$(MKDIR_P) common
3136         @: > common/$(am__dirstamp)
3137 common/$(DEPDIR)/$(am__dirstamp):
3138         @$(MKDIR_P) common/$(DEPDIR)
3139         @: > common/$(DEPDIR)/$(am__dirstamp)
3140 common/callback.$(OBJEXT): common/$(am__dirstamp) \
3141         common/$(DEPDIR)/$(am__dirstamp)
3142 common/portability.$(OBJEXT): common/$(am__dirstamp) \
3143         common/$(DEPDIR)/$(am__dirstamp)
3144 common/sim-load.$(OBJEXT): common/$(am__dirstamp) \
3145         common/$(DEPDIR)/$(am__dirstamp)
3146 common/syscall.$(OBJEXT): common/$(am__dirstamp) \
3147         common/$(DEPDIR)/$(am__dirstamp)
3148 common/target-newlib-errno.$(OBJEXT): common/$(am__dirstamp) \
3149         common/$(DEPDIR)/$(am__dirstamp)
3150 common/target-newlib-open.$(OBJEXT): common/$(am__dirstamp) \
3151         common/$(DEPDIR)/$(am__dirstamp)
3152 common/target-newlib-signal.$(OBJEXT): common/$(am__dirstamp) \
3153         common/$(DEPDIR)/$(am__dirstamp)
3154 common/target-newlib-syscall.$(OBJEXT): common/$(am__dirstamp) \
3155         common/$(DEPDIR)/$(am__dirstamp)
3156 common/version.$(OBJEXT): common/$(am__dirstamp) \
3157         common/$(DEPDIR)/$(am__dirstamp)
3158
3159 common/libcommon.a: $(common_libcommon_a_OBJECTS) $(common_libcommon_a_DEPENDENCIES) $(EXTRA_common_libcommon_a_DEPENDENCIES) common/$(am__dirstamp)
3160         $(AM_V_at)-rm -f common/libcommon.a
3161         $(AM_V_AR)$(common_libcommon_a_AR) common/libcommon.a $(common_libcommon_a_OBJECTS) $(common_libcommon_a_LIBADD)
3162         $(AM_V_at)$(RANLIB) common/libcommon.a
3163 cr16/$(am__dirstamp):
3164         @$(MKDIR_P) cr16
3165         @: > cr16/$(am__dirstamp)
3166
3167 cr16/libsim.a: $(cr16_libsim_a_OBJECTS) $(cr16_libsim_a_DEPENDENCIES) $(EXTRA_cr16_libsim_a_DEPENDENCIES) cr16/$(am__dirstamp)
3168         $(AM_V_at)-rm -f cr16/libsim.a
3169         $(AM_V_AR)$(cr16_libsim_a_AR) cr16/libsim.a $(cr16_libsim_a_OBJECTS) $(cr16_libsim_a_LIBADD)
3170         $(AM_V_at)$(RANLIB) cr16/libsim.a
3171 cris/$(am__dirstamp):
3172         @$(MKDIR_P) cris
3173         @: > cris/$(am__dirstamp)
3174
3175 cris/libsim.a: $(cris_libsim_a_OBJECTS) $(cris_libsim_a_DEPENDENCIES) $(EXTRA_cris_libsim_a_DEPENDENCIES) cris/$(am__dirstamp)
3176         $(AM_V_at)-rm -f cris/libsim.a
3177         $(AM_V_AR)$(cris_libsim_a_AR) cris/libsim.a $(cris_libsim_a_OBJECTS) $(cris_libsim_a_LIBADD)
3178         $(AM_V_at)$(RANLIB) cris/libsim.a
3179 d10v/$(am__dirstamp):
3180         @$(MKDIR_P) d10v
3181         @: > d10v/$(am__dirstamp)
3182
3183 d10v/libsim.a: $(d10v_libsim_a_OBJECTS) $(d10v_libsim_a_DEPENDENCIES) $(EXTRA_d10v_libsim_a_DEPENDENCIES) d10v/$(am__dirstamp)
3184         $(AM_V_at)-rm -f d10v/libsim.a
3185         $(AM_V_AR)$(d10v_libsim_a_AR) d10v/libsim.a $(d10v_libsim_a_OBJECTS) $(d10v_libsim_a_LIBADD)
3186         $(AM_V_at)$(RANLIB) d10v/libsim.a
3187 erc32/$(am__dirstamp):
3188         @$(MKDIR_P) erc32
3189         @: > erc32/$(am__dirstamp)
3190
3191 erc32/libsim.a: $(erc32_libsim_a_OBJECTS) $(erc32_libsim_a_DEPENDENCIES) $(EXTRA_erc32_libsim_a_DEPENDENCIES) erc32/$(am__dirstamp)
3192         $(AM_V_at)-rm -f erc32/libsim.a
3193         $(AM_V_AR)$(erc32_libsim_a_AR) erc32/libsim.a $(erc32_libsim_a_OBJECTS) $(erc32_libsim_a_LIBADD)
3194         $(AM_V_at)$(RANLIB) erc32/libsim.a
3195 example-synacor/$(am__dirstamp):
3196         @$(MKDIR_P) example-synacor
3197         @: > example-synacor/$(am__dirstamp)
3198
3199 example-synacor/libsim.a: $(example_synacor_libsim_a_OBJECTS) $(example_synacor_libsim_a_DEPENDENCIES) $(EXTRA_example_synacor_libsim_a_DEPENDENCIES) example-synacor/$(am__dirstamp)
3200         $(AM_V_at)-rm -f example-synacor/libsim.a
3201         $(AM_V_AR)$(example_synacor_libsim_a_AR) example-synacor/libsim.a $(example_synacor_libsim_a_OBJECTS) $(example_synacor_libsim_a_LIBADD)
3202         $(AM_V_at)$(RANLIB) example-synacor/libsim.a
3203 frv/$(am__dirstamp):
3204         @$(MKDIR_P) frv
3205         @: > frv/$(am__dirstamp)
3206
3207 frv/libsim.a: $(frv_libsim_a_OBJECTS) $(frv_libsim_a_DEPENDENCIES) $(EXTRA_frv_libsim_a_DEPENDENCIES) frv/$(am__dirstamp)
3208         $(AM_V_at)-rm -f frv/libsim.a
3209         $(AM_V_AR)$(frv_libsim_a_AR) frv/libsim.a $(frv_libsim_a_OBJECTS) $(frv_libsim_a_LIBADD)
3210         $(AM_V_at)$(RANLIB) frv/libsim.a
3211 ft32/$(am__dirstamp):
3212         @$(MKDIR_P) ft32
3213         @: > ft32/$(am__dirstamp)
3214
3215 ft32/libsim.a: $(ft32_libsim_a_OBJECTS) $(ft32_libsim_a_DEPENDENCIES) $(EXTRA_ft32_libsim_a_DEPENDENCIES) ft32/$(am__dirstamp)
3216         $(AM_V_at)-rm -f ft32/libsim.a
3217         $(AM_V_AR)$(ft32_libsim_a_AR) ft32/libsim.a $(ft32_libsim_a_OBJECTS) $(ft32_libsim_a_LIBADD)
3218         $(AM_V_at)$(RANLIB) ft32/libsim.a
3219 h8300/$(am__dirstamp):
3220         @$(MKDIR_P) h8300
3221         @: > h8300/$(am__dirstamp)
3222
3223 h8300/libsim.a: $(h8300_libsim_a_OBJECTS) $(h8300_libsim_a_DEPENDENCIES) $(EXTRA_h8300_libsim_a_DEPENDENCIES) h8300/$(am__dirstamp)
3224         $(AM_V_at)-rm -f h8300/libsim.a
3225         $(AM_V_AR)$(h8300_libsim_a_AR) h8300/libsim.a $(h8300_libsim_a_OBJECTS) $(h8300_libsim_a_LIBADD)
3226         $(AM_V_at)$(RANLIB) h8300/libsim.a
3227 igen/$(am__dirstamp):
3228         @$(MKDIR_P) igen
3229         @: > igen/$(am__dirstamp)
3230 igen/$(DEPDIR)/$(am__dirstamp):
3231         @$(MKDIR_P) igen/$(DEPDIR)
3232         @: > igen/$(DEPDIR)/$(am__dirstamp)
3233 igen/table.$(OBJEXT): igen/$(am__dirstamp) \
3234         igen/$(DEPDIR)/$(am__dirstamp)
3235 igen/lf.$(OBJEXT): igen/$(am__dirstamp) igen/$(DEPDIR)/$(am__dirstamp)
3236 igen/misc.$(OBJEXT): igen/$(am__dirstamp) \
3237         igen/$(DEPDIR)/$(am__dirstamp)
3238 igen/filter_host.$(OBJEXT): igen/$(am__dirstamp) \
3239         igen/$(DEPDIR)/$(am__dirstamp)
3240 igen/ld-decode.$(OBJEXT): igen/$(am__dirstamp) \
3241         igen/$(DEPDIR)/$(am__dirstamp)
3242 igen/ld-cache.$(OBJEXT): igen/$(am__dirstamp) \
3243         igen/$(DEPDIR)/$(am__dirstamp)
3244 igen/filter.$(OBJEXT): igen/$(am__dirstamp) \
3245         igen/$(DEPDIR)/$(am__dirstamp)
3246 igen/ld-insn.$(OBJEXT): igen/$(am__dirstamp) \
3247         igen/$(DEPDIR)/$(am__dirstamp)
3248 igen/gen-model.$(OBJEXT): igen/$(am__dirstamp) \
3249         igen/$(DEPDIR)/$(am__dirstamp)
3250 igen/gen-itable.$(OBJEXT): igen/$(am__dirstamp) \
3251         igen/$(DEPDIR)/$(am__dirstamp)
3252 igen/gen-icache.$(OBJEXT): igen/$(am__dirstamp) \
3253         igen/$(DEPDIR)/$(am__dirstamp)
3254 igen/gen-semantics.$(OBJEXT): igen/$(am__dirstamp) \
3255         igen/$(DEPDIR)/$(am__dirstamp)
3256 igen/gen-idecode.$(OBJEXT): igen/$(am__dirstamp) \
3257         igen/$(DEPDIR)/$(am__dirstamp)
3258 igen/gen-support.$(OBJEXT): igen/$(am__dirstamp) \
3259         igen/$(DEPDIR)/$(am__dirstamp)
3260 igen/gen-engine.$(OBJEXT): igen/$(am__dirstamp) \
3261         igen/$(DEPDIR)/$(am__dirstamp)
3262 igen/gen.$(OBJEXT): igen/$(am__dirstamp) \
3263         igen/$(DEPDIR)/$(am__dirstamp)
3264
3265 @SIM_ENABLE_IGEN_FALSE@igen/libigen.a: $(igen_libigen_a_OBJECTS) $(igen_libigen_a_DEPENDENCIES) $(EXTRA_igen_libigen_a_DEPENDENCIES) igen/$(am__dirstamp)
3266 @SIM_ENABLE_IGEN_FALSE@ $(AM_V_at)-rm -f igen/libigen.a
3267 @SIM_ENABLE_IGEN_FALSE@ $(AM_V_AR)$(igen_libigen_a_AR) igen/libigen.a $(igen_libigen_a_OBJECTS) $(igen_libigen_a_LIBADD)
3268 @SIM_ENABLE_IGEN_FALSE@ $(AM_V_at)$(RANLIB) igen/libigen.a
3269 iq2000/$(am__dirstamp):
3270         @$(MKDIR_P) iq2000
3271         @: > iq2000/$(am__dirstamp)
3272
3273 iq2000/libsim.a: $(iq2000_libsim_a_OBJECTS) $(iq2000_libsim_a_DEPENDENCIES) $(EXTRA_iq2000_libsim_a_DEPENDENCIES) iq2000/$(am__dirstamp)
3274         $(AM_V_at)-rm -f iq2000/libsim.a
3275         $(AM_V_AR)$(iq2000_libsim_a_AR) iq2000/libsim.a $(iq2000_libsim_a_OBJECTS) $(iq2000_libsim_a_LIBADD)
3276         $(AM_V_at)$(RANLIB) iq2000/libsim.a
3277 lm32/$(am__dirstamp):
3278         @$(MKDIR_P) lm32
3279         @: > lm32/$(am__dirstamp)
3280
3281 lm32/libsim.a: $(lm32_libsim_a_OBJECTS) $(lm32_libsim_a_DEPENDENCIES) $(EXTRA_lm32_libsim_a_DEPENDENCIES) lm32/$(am__dirstamp)
3282         $(AM_V_at)-rm -f lm32/libsim.a
3283         $(AM_V_AR)$(lm32_libsim_a_AR) lm32/libsim.a $(lm32_libsim_a_OBJECTS) $(lm32_libsim_a_LIBADD)
3284         $(AM_V_at)$(RANLIB) lm32/libsim.a
3285 m32c/$(am__dirstamp):
3286         @$(MKDIR_P) m32c
3287         @: > m32c/$(am__dirstamp)
3288
3289 m32c/libsim.a: $(m32c_libsim_a_OBJECTS) $(m32c_libsim_a_DEPENDENCIES) $(EXTRA_m32c_libsim_a_DEPENDENCIES) m32c/$(am__dirstamp)
3290         $(AM_V_at)-rm -f m32c/libsim.a
3291         $(AM_V_AR)$(m32c_libsim_a_AR) m32c/libsim.a $(m32c_libsim_a_OBJECTS) $(m32c_libsim_a_LIBADD)
3292         $(AM_V_at)$(RANLIB) m32c/libsim.a
3293 m32r/$(am__dirstamp):
3294         @$(MKDIR_P) m32r
3295         @: > m32r/$(am__dirstamp)
3296
3297 m32r/libsim.a: $(m32r_libsim_a_OBJECTS) $(m32r_libsim_a_DEPENDENCIES) $(EXTRA_m32r_libsim_a_DEPENDENCIES) m32r/$(am__dirstamp)
3298         $(AM_V_at)-rm -f m32r/libsim.a
3299         $(AM_V_AR)$(m32r_libsim_a_AR) m32r/libsim.a $(m32r_libsim_a_OBJECTS) $(m32r_libsim_a_LIBADD)
3300         $(AM_V_at)$(RANLIB) m32r/libsim.a
3301 m68hc11/$(am__dirstamp):
3302         @$(MKDIR_P) m68hc11
3303         @: > m68hc11/$(am__dirstamp)
3304
3305 m68hc11/libsim.a: $(m68hc11_libsim_a_OBJECTS) $(m68hc11_libsim_a_DEPENDENCIES) $(EXTRA_m68hc11_libsim_a_DEPENDENCIES) m68hc11/$(am__dirstamp)
3306         $(AM_V_at)-rm -f m68hc11/libsim.a
3307         $(AM_V_AR)$(m68hc11_libsim_a_AR) m68hc11/libsim.a $(m68hc11_libsim_a_OBJECTS) $(m68hc11_libsim_a_LIBADD)
3308         $(AM_V_at)$(RANLIB) m68hc11/libsim.a
3309 mcore/$(am__dirstamp):
3310         @$(MKDIR_P) mcore
3311         @: > mcore/$(am__dirstamp)
3312
3313 mcore/libsim.a: $(mcore_libsim_a_OBJECTS) $(mcore_libsim_a_DEPENDENCIES) $(EXTRA_mcore_libsim_a_DEPENDENCIES) mcore/$(am__dirstamp)
3314         $(AM_V_at)-rm -f mcore/libsim.a
3315         $(AM_V_AR)$(mcore_libsim_a_AR) mcore/libsim.a $(mcore_libsim_a_OBJECTS) $(mcore_libsim_a_LIBADD)
3316         $(AM_V_at)$(RANLIB) mcore/libsim.a
3317 microblaze/$(am__dirstamp):
3318         @$(MKDIR_P) microblaze
3319         @: > microblaze/$(am__dirstamp)
3320
3321 microblaze/libsim.a: $(microblaze_libsim_a_OBJECTS) $(microblaze_libsim_a_DEPENDENCIES) $(EXTRA_microblaze_libsim_a_DEPENDENCIES) microblaze/$(am__dirstamp)
3322         $(AM_V_at)-rm -f microblaze/libsim.a
3323         $(AM_V_AR)$(microblaze_libsim_a_AR) microblaze/libsim.a $(microblaze_libsim_a_OBJECTS) $(microblaze_libsim_a_LIBADD)
3324         $(AM_V_at)$(RANLIB) microblaze/libsim.a
3325 mips/$(am__dirstamp):
3326         @$(MKDIR_P) mips
3327         @: > mips/$(am__dirstamp)
3328
3329 mips/libsim.a: $(mips_libsim_a_OBJECTS) $(mips_libsim_a_DEPENDENCIES) $(EXTRA_mips_libsim_a_DEPENDENCIES) mips/$(am__dirstamp)
3330         $(AM_V_at)-rm -f mips/libsim.a
3331         $(AM_V_AR)$(mips_libsim_a_AR) mips/libsim.a $(mips_libsim_a_OBJECTS) $(mips_libsim_a_LIBADD)
3332         $(AM_V_at)$(RANLIB) mips/libsim.a
3333 mn10300/$(am__dirstamp):
3334         @$(MKDIR_P) mn10300
3335         @: > mn10300/$(am__dirstamp)
3336
3337 mn10300/libsim.a: $(mn10300_libsim_a_OBJECTS) $(mn10300_libsim_a_DEPENDENCIES) $(EXTRA_mn10300_libsim_a_DEPENDENCIES) mn10300/$(am__dirstamp)
3338         $(AM_V_at)-rm -f mn10300/libsim.a
3339         $(AM_V_AR)$(mn10300_libsim_a_AR) mn10300/libsim.a $(mn10300_libsim_a_OBJECTS) $(mn10300_libsim_a_LIBADD)
3340         $(AM_V_at)$(RANLIB) mn10300/libsim.a
3341 moxie/$(am__dirstamp):
3342         @$(MKDIR_P) moxie
3343         @: > moxie/$(am__dirstamp)
3344
3345 moxie/libsim.a: $(moxie_libsim_a_OBJECTS) $(moxie_libsim_a_DEPENDENCIES) $(EXTRA_moxie_libsim_a_DEPENDENCIES) moxie/$(am__dirstamp)
3346         $(AM_V_at)-rm -f moxie/libsim.a
3347         $(AM_V_AR)$(moxie_libsim_a_AR) moxie/libsim.a $(moxie_libsim_a_OBJECTS) $(moxie_libsim_a_LIBADD)
3348         $(AM_V_at)$(RANLIB) moxie/libsim.a
3349 msp430/$(am__dirstamp):
3350         @$(MKDIR_P) msp430
3351         @: > msp430/$(am__dirstamp)
3352
3353 msp430/libsim.a: $(msp430_libsim_a_OBJECTS) $(msp430_libsim_a_DEPENDENCIES) $(EXTRA_msp430_libsim_a_DEPENDENCIES) msp430/$(am__dirstamp)
3354         $(AM_V_at)-rm -f msp430/libsim.a
3355         $(AM_V_AR)$(msp430_libsim_a_AR) msp430/libsim.a $(msp430_libsim_a_OBJECTS) $(msp430_libsim_a_LIBADD)
3356         $(AM_V_at)$(RANLIB) msp430/libsim.a
3357 or1k/$(am__dirstamp):
3358         @$(MKDIR_P) or1k
3359         @: > or1k/$(am__dirstamp)
3360
3361 or1k/libsim.a: $(or1k_libsim_a_OBJECTS) $(or1k_libsim_a_DEPENDENCIES) $(EXTRA_or1k_libsim_a_DEPENDENCIES) or1k/$(am__dirstamp)
3362         $(AM_V_at)-rm -f or1k/libsim.a
3363         $(AM_V_AR)$(or1k_libsim_a_AR) or1k/libsim.a $(or1k_libsim_a_OBJECTS) $(or1k_libsim_a_LIBADD)
3364         $(AM_V_at)$(RANLIB) or1k/libsim.a
3365 pru/$(am__dirstamp):
3366         @$(MKDIR_P) pru
3367         @: > pru/$(am__dirstamp)
3368
3369 pru/libsim.a: $(pru_libsim_a_OBJECTS) $(pru_libsim_a_DEPENDENCIES) $(EXTRA_pru_libsim_a_DEPENDENCIES) pru/$(am__dirstamp)
3370         $(AM_V_at)-rm -f pru/libsim.a
3371         $(AM_V_AR)$(pru_libsim_a_AR) pru/libsim.a $(pru_libsim_a_OBJECTS) $(pru_libsim_a_LIBADD)
3372         $(AM_V_at)$(RANLIB) pru/libsim.a
3373 riscv/$(am__dirstamp):
3374         @$(MKDIR_P) riscv
3375         @: > riscv/$(am__dirstamp)
3376
3377 riscv/libsim.a: $(riscv_libsim_a_OBJECTS) $(riscv_libsim_a_DEPENDENCIES) $(EXTRA_riscv_libsim_a_DEPENDENCIES) riscv/$(am__dirstamp)
3378         $(AM_V_at)-rm -f riscv/libsim.a
3379         $(AM_V_AR)$(riscv_libsim_a_AR) riscv/libsim.a $(riscv_libsim_a_OBJECTS) $(riscv_libsim_a_LIBADD)
3380         $(AM_V_at)$(RANLIB) riscv/libsim.a
3381 rl78/$(am__dirstamp):
3382         @$(MKDIR_P) rl78
3383         @: > rl78/$(am__dirstamp)
3384
3385 rl78/libsim.a: $(rl78_libsim_a_OBJECTS) $(rl78_libsim_a_DEPENDENCIES) $(EXTRA_rl78_libsim_a_DEPENDENCIES) rl78/$(am__dirstamp)
3386         $(AM_V_at)-rm -f rl78/libsim.a
3387         $(AM_V_AR)$(rl78_libsim_a_AR) rl78/libsim.a $(rl78_libsim_a_OBJECTS) $(rl78_libsim_a_LIBADD)
3388         $(AM_V_at)$(RANLIB) rl78/libsim.a
3389 rx/$(am__dirstamp):
3390         @$(MKDIR_P) rx
3391         @: > rx/$(am__dirstamp)
3392
3393 rx/libsim.a: $(rx_libsim_a_OBJECTS) $(rx_libsim_a_DEPENDENCIES) $(EXTRA_rx_libsim_a_DEPENDENCIES) rx/$(am__dirstamp)
3394         $(AM_V_at)-rm -f rx/libsim.a
3395         $(AM_V_AR)$(rx_libsim_a_AR) rx/libsim.a $(rx_libsim_a_OBJECTS) $(rx_libsim_a_LIBADD)
3396         $(AM_V_at)$(RANLIB) rx/libsim.a
3397 sh/$(am__dirstamp):
3398         @$(MKDIR_P) sh
3399         @: > sh/$(am__dirstamp)
3400
3401 sh/libsim.a: $(sh_libsim_a_OBJECTS) $(sh_libsim_a_DEPENDENCIES) $(EXTRA_sh_libsim_a_DEPENDENCIES) sh/$(am__dirstamp)
3402         $(AM_V_at)-rm -f sh/libsim.a
3403         $(AM_V_AR)$(sh_libsim_a_AR) sh/libsim.a $(sh_libsim_a_OBJECTS) $(sh_libsim_a_LIBADD)
3404         $(AM_V_at)$(RANLIB) sh/libsim.a
3405 v850/$(am__dirstamp):
3406         @$(MKDIR_P) v850
3407         @: > v850/$(am__dirstamp)
3408
3409 v850/libsim.a: $(v850_libsim_a_OBJECTS) $(v850_libsim_a_DEPENDENCIES) $(EXTRA_v850_libsim_a_DEPENDENCIES) v850/$(am__dirstamp)
3410         $(AM_V_at)-rm -f v850/libsim.a
3411         $(AM_V_AR)$(v850_libsim_a_AR) v850/libsim.a $(v850_libsim_a_OBJECTS) $(v850_libsim_a_LIBADD)
3412         $(AM_V_at)$(RANLIB) v850/libsim.a
3413
3414 clean-checkPROGRAMS:
3415         @list='$(check_PROGRAMS)'; test -n "$$list" || exit 0; \
3416         echo " rm -f" $$list; \
3417         rm -f $$list || exit $$?; \
3418         test -n "$(EXEEXT)" || exit 0; \
3419         list=`for p in $$list; do echo "$$p"; done | sed 's/$(EXEEXT)$$//'`; \
3420         echo " rm -f" $$list; \
3421         rm -f $$list
3422
3423 clean-noinstPROGRAMS:
3424         @list='$(noinst_PROGRAMS)'; test -n "$$list" || exit 0; \
3425         echo " rm -f" $$list; \
3426         rm -f $$list || exit $$?; \
3427         test -n "$(EXEEXT)" || exit 0; \
3428         list=`for p in $$list; do echo "$$p"; done | sed 's/$(EXEEXT)$$//'`; \
3429         echo " rm -f" $$list; \
3430         rm -f $$list
3431
3432 aarch64/run$(EXEEXT): $(aarch64_run_OBJECTS) $(aarch64_run_DEPENDENCIES) $(EXTRA_aarch64_run_DEPENDENCIES) aarch64/$(am__dirstamp)
3433         @rm -f aarch64/run$(EXEEXT)
3434         $(AM_V_CCLD)$(LINK) $(aarch64_run_OBJECTS) $(aarch64_run_LDADD) $(LIBS)
3435
3436 arm/run$(EXEEXT): $(arm_run_OBJECTS) $(arm_run_DEPENDENCIES) $(EXTRA_arm_run_DEPENDENCIES) arm/$(am__dirstamp)
3437         @rm -f arm/run$(EXEEXT)
3438         $(AM_V_CCLD)$(LINK) $(arm_run_OBJECTS) $(arm_run_LDADD) $(LIBS)
3439
3440 avr/run$(EXEEXT): $(avr_run_OBJECTS) $(avr_run_DEPENDENCIES) $(EXTRA_avr_run_DEPENDENCIES) avr/$(am__dirstamp)
3441         @rm -f avr/run$(EXEEXT)
3442         $(AM_V_CCLD)$(LINK) $(avr_run_OBJECTS) $(avr_run_LDADD) $(LIBS)
3443
3444 bfin/run$(EXEEXT): $(bfin_run_OBJECTS) $(bfin_run_DEPENDENCIES) $(EXTRA_bfin_run_DEPENDENCIES) bfin/$(am__dirstamp)
3445         @rm -f bfin/run$(EXEEXT)
3446         $(AM_V_CCLD)$(LINK) $(bfin_run_OBJECTS) $(bfin_run_LDADD) $(LIBS)
3447
3448 bpf/run$(EXEEXT): $(bpf_run_OBJECTS) $(bpf_run_DEPENDENCIES) $(EXTRA_bpf_run_DEPENDENCIES) bpf/$(am__dirstamp)
3449         @rm -f bpf/run$(EXEEXT)
3450         $(AM_V_CCLD)$(LINK) $(bpf_run_OBJECTS) $(bpf_run_LDADD) $(LIBS)
3451 cr16/$(DEPDIR)/$(am__dirstamp):
3452         @$(MKDIR_P) cr16/$(DEPDIR)
3453         @: > cr16/$(DEPDIR)/$(am__dirstamp)
3454 cr16/gencode.$(OBJEXT): cr16/$(am__dirstamp) \
3455         cr16/$(DEPDIR)/$(am__dirstamp)
3456
3457 @SIM_ENABLE_ARCH_cr16_FALSE@cr16/gencode$(EXEEXT): $(cr16_gencode_OBJECTS) $(cr16_gencode_DEPENDENCIES) $(EXTRA_cr16_gencode_DEPENDENCIES) cr16/$(am__dirstamp)
3458 @SIM_ENABLE_ARCH_cr16_FALSE@    @rm -f cr16/gencode$(EXEEXT)
3459 @SIM_ENABLE_ARCH_cr16_FALSE@    $(AM_V_CCLD)$(LINK) $(cr16_gencode_OBJECTS) $(cr16_gencode_LDADD) $(LIBS)
3460
3461 cr16/run$(EXEEXT): $(cr16_run_OBJECTS) $(cr16_run_DEPENDENCIES) $(EXTRA_cr16_run_DEPENDENCIES) cr16/$(am__dirstamp)
3462         @rm -f cr16/run$(EXEEXT)
3463         $(AM_V_CCLD)$(LINK) $(cr16_run_OBJECTS) $(cr16_run_LDADD) $(LIBS)
3464
3465 cris/run$(EXEEXT): $(cris_run_OBJECTS) $(cris_run_DEPENDENCIES) $(EXTRA_cris_run_DEPENDENCIES) cris/$(am__dirstamp)
3466         @rm -f cris/run$(EXEEXT)
3467         $(AM_V_CCLD)$(LINK) $(cris_run_OBJECTS) $(cris_run_LDADD) $(LIBS)
3468 cris/$(DEPDIR)/$(am__dirstamp):
3469         @$(MKDIR_P) cris/$(DEPDIR)
3470         @: > cris/$(DEPDIR)/$(am__dirstamp)
3471 cris/rvdummy.$(OBJEXT): cris/$(am__dirstamp) \
3472         cris/$(DEPDIR)/$(am__dirstamp)
3473
3474 cris/rvdummy$(EXEEXT): $(cris_rvdummy_OBJECTS) $(cris_rvdummy_DEPENDENCIES) $(EXTRA_cris_rvdummy_DEPENDENCIES) cris/$(am__dirstamp)
3475         @rm -f cris/rvdummy$(EXEEXT)
3476         $(AM_V_CCLD)$(LINK) $(cris_rvdummy_OBJECTS) $(cris_rvdummy_LDADD) $(LIBS)
3477 d10v/$(DEPDIR)/$(am__dirstamp):
3478         @$(MKDIR_P) d10v/$(DEPDIR)
3479         @: > d10v/$(DEPDIR)/$(am__dirstamp)
3480 d10v/gencode.$(OBJEXT): d10v/$(am__dirstamp) \
3481         d10v/$(DEPDIR)/$(am__dirstamp)
3482
3483 @SIM_ENABLE_ARCH_d10v_FALSE@d10v/gencode$(EXEEXT): $(d10v_gencode_OBJECTS) $(d10v_gencode_DEPENDENCIES) $(EXTRA_d10v_gencode_DEPENDENCIES) d10v/$(am__dirstamp)
3484 @SIM_ENABLE_ARCH_d10v_FALSE@    @rm -f d10v/gencode$(EXEEXT)
3485 @SIM_ENABLE_ARCH_d10v_FALSE@    $(AM_V_CCLD)$(LINK) $(d10v_gencode_OBJECTS) $(d10v_gencode_LDADD) $(LIBS)
3486
3487 d10v/run$(EXEEXT): $(d10v_run_OBJECTS) $(d10v_run_DEPENDENCIES) $(EXTRA_d10v_run_DEPENDENCIES) d10v/$(am__dirstamp)
3488         @rm -f d10v/run$(EXEEXT)
3489         $(AM_V_CCLD)$(LINK) $(d10v_run_OBJECTS) $(d10v_run_LDADD) $(LIBS)
3490
3491 erc32/run$(EXEEXT): $(erc32_run_OBJECTS) $(erc32_run_DEPENDENCIES) $(EXTRA_erc32_run_DEPENDENCIES) erc32/$(am__dirstamp)
3492         @rm -f erc32/run$(EXEEXT)
3493         $(AM_V_CCLD)$(LINK) $(erc32_run_OBJECTS) $(erc32_run_LDADD) $(LIBS)
3494 erc32/$(DEPDIR)/$(am__dirstamp):
3495         @$(MKDIR_P) erc32/$(DEPDIR)
3496         @: > erc32/$(DEPDIR)/$(am__dirstamp)
3497 erc32/sis.$(OBJEXT): erc32/$(am__dirstamp) \
3498         erc32/$(DEPDIR)/$(am__dirstamp)
3499
3500 @SIM_ENABLE_ARCH_erc32_FALSE@erc32/sis$(EXEEXT): $(erc32_sis_OBJECTS) $(erc32_sis_DEPENDENCIES) $(EXTRA_erc32_sis_DEPENDENCIES) erc32/$(am__dirstamp)
3501 @SIM_ENABLE_ARCH_erc32_FALSE@   @rm -f erc32/sis$(EXEEXT)
3502 @SIM_ENABLE_ARCH_erc32_FALSE@   $(AM_V_CCLD)$(LINK) $(erc32_sis_OBJECTS) $(erc32_sis_LDADD) $(LIBS)
3503
3504 example-synacor/run$(EXEEXT): $(example_synacor_run_OBJECTS) $(example_synacor_run_DEPENDENCIES) $(EXTRA_example_synacor_run_DEPENDENCIES) example-synacor/$(am__dirstamp)
3505         @rm -f example-synacor/run$(EXEEXT)
3506         $(AM_V_CCLD)$(LINK) $(example_synacor_run_OBJECTS) $(example_synacor_run_LDADD) $(LIBS)
3507
3508 frv/run$(EXEEXT): $(frv_run_OBJECTS) $(frv_run_DEPENDENCIES) $(EXTRA_frv_run_DEPENDENCIES) frv/$(am__dirstamp)
3509         @rm -f frv/run$(EXEEXT)
3510         $(AM_V_CCLD)$(LINK) $(frv_run_OBJECTS) $(frv_run_LDADD) $(LIBS)
3511
3512 ft32/run$(EXEEXT): $(ft32_run_OBJECTS) $(ft32_run_DEPENDENCIES) $(EXTRA_ft32_run_DEPENDENCIES) ft32/$(am__dirstamp)
3513         @rm -f ft32/run$(EXEEXT)
3514         $(AM_V_CCLD)$(LINK) $(ft32_run_OBJECTS) $(ft32_run_LDADD) $(LIBS)
3515
3516 h8300/run$(EXEEXT): $(h8300_run_OBJECTS) $(h8300_run_DEPENDENCIES) $(EXTRA_h8300_run_DEPENDENCIES) h8300/$(am__dirstamp)
3517         @rm -f h8300/run$(EXEEXT)
3518         $(AM_V_CCLD)$(LINK) $(h8300_run_OBJECTS) $(h8300_run_LDADD) $(LIBS)
3519
3520 igen/filter$(EXEEXT): $(igen_filter_OBJECTS) $(igen_filter_DEPENDENCIES) $(EXTRA_igen_filter_DEPENDENCIES) igen/$(am__dirstamp)
3521         @rm -f igen/filter$(EXEEXT)
3522         $(AM_V_CCLD)$(LINK) $(igen_filter_OBJECTS) $(igen_filter_LDADD) $(LIBS)
3523
3524 igen/gen$(EXEEXT): $(igen_gen_OBJECTS) $(igen_gen_DEPENDENCIES) $(EXTRA_igen_gen_DEPENDENCIES) igen/$(am__dirstamp)
3525         @rm -f igen/gen$(EXEEXT)
3526         $(AM_V_CCLD)$(LINK) $(igen_gen_OBJECTS) $(igen_gen_LDADD) $(LIBS)
3527 igen/igen.$(OBJEXT): igen/$(am__dirstamp) \
3528         igen/$(DEPDIR)/$(am__dirstamp)
3529
3530 @SIM_ENABLE_IGEN_FALSE@igen/igen$(EXEEXT): $(igen_igen_OBJECTS) $(igen_igen_DEPENDENCIES) $(EXTRA_igen_igen_DEPENDENCIES) igen/$(am__dirstamp)
3531 @SIM_ENABLE_IGEN_FALSE@ @rm -f igen/igen$(EXEEXT)
3532 @SIM_ENABLE_IGEN_FALSE@ $(AM_V_CCLD)$(LINK) $(igen_igen_OBJECTS) $(igen_igen_LDADD) $(LIBS)
3533
3534 igen/ld-cache$(EXEEXT): $(igen_ld_cache_OBJECTS) $(igen_ld_cache_DEPENDENCIES) $(EXTRA_igen_ld_cache_DEPENDENCIES) igen/$(am__dirstamp)
3535         @rm -f igen/ld-cache$(EXEEXT)
3536         $(AM_V_CCLD)$(LINK) $(igen_ld_cache_OBJECTS) $(igen_ld_cache_LDADD) $(LIBS)
3537
3538 igen/ld-decode$(EXEEXT): $(igen_ld_decode_OBJECTS) $(igen_ld_decode_DEPENDENCIES) $(EXTRA_igen_ld_decode_DEPENDENCIES) igen/$(am__dirstamp)
3539         @rm -f igen/ld-decode$(EXEEXT)
3540         $(AM_V_CCLD)$(LINK) $(igen_ld_decode_OBJECTS) $(igen_ld_decode_LDADD) $(LIBS)
3541
3542 igen/ld-insn$(EXEEXT): $(igen_ld_insn_OBJECTS) $(igen_ld_insn_DEPENDENCIES) $(EXTRA_igen_ld_insn_DEPENDENCIES) igen/$(am__dirstamp)
3543         @rm -f igen/ld-insn$(EXEEXT)
3544         $(AM_V_CCLD)$(LINK) $(igen_ld_insn_OBJECTS) $(igen_ld_insn_LDADD) $(LIBS)
3545
3546 igen/table$(EXEEXT): $(igen_table_OBJECTS) $(igen_table_DEPENDENCIES) $(EXTRA_igen_table_DEPENDENCIES) igen/$(am__dirstamp)
3547         @rm -f igen/table$(EXEEXT)
3548         $(AM_V_CCLD)$(LINK) $(igen_table_OBJECTS) $(igen_table_LDADD) $(LIBS)
3549
3550 iq2000/run$(EXEEXT): $(iq2000_run_OBJECTS) $(iq2000_run_DEPENDENCIES) $(EXTRA_iq2000_run_DEPENDENCIES) iq2000/$(am__dirstamp)
3551         @rm -f iq2000/run$(EXEEXT)
3552         $(AM_V_CCLD)$(LINK) $(iq2000_run_OBJECTS) $(iq2000_run_LDADD) $(LIBS)
3553
3554 lm32/run$(EXEEXT): $(lm32_run_OBJECTS) $(lm32_run_DEPENDENCIES) $(EXTRA_lm32_run_DEPENDENCIES) lm32/$(am__dirstamp)
3555         @rm -f lm32/run$(EXEEXT)
3556         $(AM_V_CCLD)$(LINK) $(lm32_run_OBJECTS) $(lm32_run_LDADD) $(LIBS)
3557 m32c/$(DEPDIR)/$(am__dirstamp):
3558         @$(MKDIR_P) m32c/$(DEPDIR)
3559         @: > m32c/$(DEPDIR)/$(am__dirstamp)
3560 m32c/opc2c.$(OBJEXT): m32c/$(am__dirstamp) \
3561         m32c/$(DEPDIR)/$(am__dirstamp)
3562
3563 @SIM_ENABLE_ARCH_m32c_FALSE@m32c/opc2c$(EXEEXT): $(m32c_opc2c_OBJECTS) $(m32c_opc2c_DEPENDENCIES) $(EXTRA_m32c_opc2c_DEPENDENCIES) m32c/$(am__dirstamp)
3564 @SIM_ENABLE_ARCH_m32c_FALSE@    @rm -f m32c/opc2c$(EXEEXT)
3565 @SIM_ENABLE_ARCH_m32c_FALSE@    $(AM_V_CCLD)$(LINK) $(m32c_opc2c_OBJECTS) $(m32c_opc2c_LDADD) $(LIBS)
3566
3567 m32c/run$(EXEEXT): $(m32c_run_OBJECTS) $(m32c_run_DEPENDENCIES) $(EXTRA_m32c_run_DEPENDENCIES) m32c/$(am__dirstamp)
3568         @rm -f m32c/run$(EXEEXT)
3569         $(AM_V_CCLD)$(LINK) $(m32c_run_OBJECTS) $(m32c_run_LDADD) $(LIBS)
3570
3571 m32r/run$(EXEEXT): $(m32r_run_OBJECTS) $(m32r_run_DEPENDENCIES) $(EXTRA_m32r_run_DEPENDENCIES) m32r/$(am__dirstamp)
3572         @rm -f m32r/run$(EXEEXT)
3573         $(AM_V_CCLD)$(LINK) $(m32r_run_OBJECTS) $(m32r_run_LDADD) $(LIBS)
3574 m68hc11/$(DEPDIR)/$(am__dirstamp):
3575         @$(MKDIR_P) m68hc11/$(DEPDIR)
3576         @: > m68hc11/$(DEPDIR)/$(am__dirstamp)
3577 m68hc11/gencode.$(OBJEXT): m68hc11/$(am__dirstamp) \
3578         m68hc11/$(DEPDIR)/$(am__dirstamp)
3579
3580 @SIM_ENABLE_ARCH_m68hc11_FALSE@m68hc11/gencode$(EXEEXT): $(m68hc11_gencode_OBJECTS) $(m68hc11_gencode_DEPENDENCIES) $(EXTRA_m68hc11_gencode_DEPENDENCIES) m68hc11/$(am__dirstamp)
3581 @SIM_ENABLE_ARCH_m68hc11_FALSE@ @rm -f m68hc11/gencode$(EXEEXT)
3582 @SIM_ENABLE_ARCH_m68hc11_FALSE@ $(AM_V_CCLD)$(LINK) $(m68hc11_gencode_OBJECTS) $(m68hc11_gencode_LDADD) $(LIBS)
3583
3584 m68hc11/run$(EXEEXT): $(m68hc11_run_OBJECTS) $(m68hc11_run_DEPENDENCIES) $(EXTRA_m68hc11_run_DEPENDENCIES) m68hc11/$(am__dirstamp)
3585         @rm -f m68hc11/run$(EXEEXT)
3586         $(AM_V_CCLD)$(LINK) $(m68hc11_run_OBJECTS) $(m68hc11_run_LDADD) $(LIBS)
3587
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3917         @list='$(ppcdoc_DATA)'; test -n "$(ppcdocdir)" || list=; \
3918         if test -n "$$list"; then \
3919           echo " $(MKDIR_P) '$(DESTDIR)$(ppcdocdir)'"; \
3920           $(MKDIR_P) "$(DESTDIR)$(ppcdocdir)" || exit 1; \
3921         fi; \
3922         for p in $$list; do \
3923           if test -f "$$p"; then d=; else d="$(srcdir)/"; fi; \
3924           echo "$$d$$p"; \
3925         done | $(am__base_list) | \
3926         while read files; do \
3927           echo " $(INSTALL_DATA) $$files '$(DESTDIR)$(ppcdocdir)'"; \
3928           $(INSTALL_DATA) $$files "$(DESTDIR)$(ppcdocdir)" || exit $$?; \
3929         done
3930
3931 uninstall-ppcdocDATA:
3932         @$(NORMAL_UNINSTALL)
3933         @list='$(ppcdoc_DATA)'; test -n "$(ppcdocdir)" || list=; \
3934         files=`for p in $$list; do echo $$p; done | sed -e 's|^.*/||'`; \
3935         dir='$(DESTDIR)$(ppcdocdir)'; $(am__uninstall_files_from_dir)
3936 install-rxdocDATA: $(rxdoc_DATA)
3937         @$(NORMAL_INSTALL)
3938         @list='$(rxdoc_DATA)'; test -n "$(rxdocdir)" || list=; \
3939         if test -n "$$list"; then \
3940           echo " $(MKDIR_P) '$(DESTDIR)$(rxdocdir)'"; \
3941           $(MKDIR_P) "$(DESTDIR)$(rxdocdir)" || exit 1; \
3942         fi; \
3943         for p in $$list; do \
3944           if test -f "$$p"; then d=; else d="$(srcdir)/"; fi; \
3945           echo "$$d$$p"; \
3946         done | $(am__base_list) | \
3947         while read files; do \
3948           echo " $(INSTALL_DATA) $$files '$(DESTDIR)$(rxdocdir)'"; \
3949           $(INSTALL_DATA) $$files "$(DESTDIR)$(rxdocdir)" || exit $$?; \
3950         done
3951
3952 uninstall-rxdocDATA:
3953         @$(NORMAL_UNINSTALL)
3954         @list='$(rxdoc_DATA)'; test -n "$(rxdocdir)" || list=; \
3955         files=`for p in $$list; do echo $$p; done | sed -e 's|^.*/||'`; \
3956         dir='$(DESTDIR)$(rxdocdir)'; $(am__uninstall_files_from_dir)
3957 install-pkgincludeHEADERS: $(pkginclude_HEADERS)
3958         @$(NORMAL_INSTALL)
3959         @list='$(pkginclude_HEADERS)'; test -n "$(pkgincludedir)" || list=; \
3960         if test -n "$$list"; then \
3961           echo " $(MKDIR_P) '$(DESTDIR)$(pkgincludedir)'"; \
3962           $(MKDIR_P) "$(DESTDIR)$(pkgincludedir)" || exit 1; \
3963         fi; \
3964         for p in $$list; do \
3965           if test -f "$$p"; then d=; else d="$(srcdir)/"; fi; \
3966           echo "$$d$$p"; \
3967         done | $(am__base_list) | \
3968         while read files; do \
3969           echo " $(INSTALL_HEADER) $$files '$(DESTDIR)$(pkgincludedir)'"; \
3970           $(INSTALL_HEADER) $$files "$(DESTDIR)$(pkgincludedir)" || exit $$?; \
3971         done
3972
3973 uninstall-pkgincludeHEADERS:
3974         @$(NORMAL_UNINSTALL)
3975         @list='$(pkginclude_HEADERS)'; test -n "$(pkgincludedir)" || list=; \
3976         files=`for p in $$list; do echo $$p; done | sed -e 's|^.*/||'`; \
3977         dir='$(DESTDIR)$(pkgincludedir)'; $(am__uninstall_files_from_dir)
3978
3979 # This directory's subdirectories are mostly independent; you can cd
3980 # into them and run 'make' without going through this Makefile.
3981 # To change the values of 'make' variables: instead of editing Makefiles,
3982 # (1) if the variable is set in 'config.status', edit 'config.status'
3983 #     (which will cause the Makefiles to be regenerated when you run 'make');
3984 # (2) otherwise, pass the desired values on the 'make' command line.
3985 $(am__recursive_targets):
3986         @fail=; \
3987         if $(am__make_keepgoing); then \
3988           failcom='fail=yes'; \
3989         else \
3990           failcom='exit 1'; \
3991         fi; \
3992         dot_seen=no; \
3993         target=`echo $@ | sed s/-recursive//`; \
3994         case "$@" in \
3995           distclean-* | maintainer-clean-*) list='$(DIST_SUBDIRS)' ;; \
3996           *) list='$(SUBDIRS)' ;; \
3997         esac; \
3998         for subdir in $$list; do \
3999           echo "Making $$target in $$subdir"; \
4000           if test "$$subdir" = "."; then \
4001             dot_seen=yes; \
4002             local_target="$$target-am"; \
4003           else \
4004             local_target="$$target"; \
4005           fi; \
4006           ($(am__cd) $$subdir && $(MAKE) $(AM_MAKEFLAGS) $$local_target) \
4007           || eval $$failcom; \
4008         done; \
4009         if test "$$dot_seen" = "no"; then \
4010           $(MAKE) $(AM_MAKEFLAGS) "$$target-am" || exit 1; \
4011         fi; test -z "$$fail"
4012
4013 ID: $(am__tagged_files)
4014         $(am__define_uniq_tagged_files); mkid -fID $$unique
4015 tags: tags-recursive
4016 TAGS: tags
4017
4018 tags-am: $(TAGS_DEPENDENCIES) $(am__tagged_files)
4019         set x; \
4020         here=`pwd`; \
4021         if ($(ETAGS) --etags-include --version) >/dev/null 2>&1; then \
4022           include_option=--etags-include; \
4023           empty_fix=.; \
4024         else \
4025           include_option=--include; \
4026           empty_fix=; \
4027         fi; \
4028         list='$(SUBDIRS)'; for subdir in $$list; do \
4029           if test "$$subdir" = .; then :; else \
4030             test ! -f $$subdir/TAGS || \
4031               set "$$@" "$$include_option=$$here/$$subdir/TAGS"; \
4032           fi; \
4033         done; \
4034         $(am__define_uniq_tagged_files); \
4035         shift; \
4036         if test -z "$(ETAGS_ARGS)$$*$$unique"; then :; else \
4037           test -n "$$unique" || unique=$$empty_fix; \
4038           if test $$# -gt 0; then \
4039             $(ETAGS) $(ETAGSFLAGS) $(AM_ETAGSFLAGS) $(ETAGS_ARGS) \
4040               "$$@" $$unique; \
4041           else \
4042             $(ETAGS) $(ETAGSFLAGS) $(AM_ETAGSFLAGS) $(ETAGS_ARGS) \
4043               $$unique; \
4044           fi; \
4045         fi
4046 ctags: ctags-recursive
4047
4048 CTAGS: ctags
4049 ctags-am: $(TAGS_DEPENDENCIES) $(am__tagged_files)
4050         $(am__define_uniq_tagged_files); \
4051         test -z "$(CTAGS_ARGS)$$unique" \
4052           || $(CTAGS) $(CTAGSFLAGS) $(AM_CTAGSFLAGS) $(CTAGS_ARGS) \
4053              $$unique
4054
4055 GTAGS:
4056         here=`$(am__cd) $(top_builddir) && pwd` \
4057           && $(am__cd) $(top_srcdir) \
4058           && gtags -i $(GTAGS_ARGS) "$$here"
4059 cscope: cscope.files
4060         test ! -s cscope.files \
4061           || $(CSCOPE) -b -q $(AM_CSCOPEFLAGS) $(CSCOPEFLAGS) -i cscope.files $(CSCOPE_ARGS)
4062 clean-cscope:
4063         -rm -f cscope.files
4064 cscope.files: clean-cscope cscopelist
4065 cscopelist: cscopelist-recursive
4066
4067 cscopelist-am: $(am__tagged_files)
4068         list='$(am__tagged_files)'; \
4069         case "$(srcdir)" in \
4070           [\\/]* | ?:[\\/]*) sdir="$(srcdir)" ;; \
4071           *) sdir=$(subdir)/$(srcdir) ;; \
4072         esac; \
4073         for i in $$list; do \
4074           if test -f "$$i"; then \
4075             echo "$(subdir)/$$i"; \
4076           else \
4077             echo "$$sdir/$$i"; \
4078           fi; \
4079         done >> $(top_builddir)/cscope.files
4080
4081 distclean-tags:
4082         -rm -f TAGS ID GTAGS GRTAGS GSYMS GPATH tags
4083         -rm -f cscope.out cscope.in.out cscope.po.out cscope.files
4084 site.exp: Makefile $(EXTRA_DEJAGNU_SITE_CONFIG)
4085         @echo 'Making a new site.exp file ...'
4086         @echo '## these variables are automatically generated by make ##' >site.tmp
4087         @echo '# Do not edit here.  If you wish to override these values' >>site.tmp
4088         @echo '# edit the last section' >>site.tmp
4089         @echo 'set srcdir "$(srcdir)"' >>site.tmp
4090         @echo "set objdir `pwd`" >>site.tmp
4091         @echo 'set build_alias "$(build_alias)"' >>site.tmp
4092         @echo 'set build_triplet $(build_triplet)' >>site.tmp
4093         @echo 'set host_alias "$(host_alias)"' >>site.tmp
4094         @echo 'set host_triplet $(host_triplet)' >>site.tmp
4095         @echo 'set target_alias "$(target_alias)"' >>site.tmp
4096         @echo 'set target_triplet $(target_triplet)' >>site.tmp
4097         @list='$(EXTRA_DEJAGNU_SITE_CONFIG)'; for f in $$list; do \
4098           echo "## Begin content included from file $$f.  Do not modify. ##" \
4099            && cat `test -f "$$f" || echo '$(srcdir)/'`$$f \
4100            && echo "## End content included from file $$f. ##" \
4101            || exit 1; \
4102          done >> site.tmp
4103         @echo "## End of auto-generated content; you can edit from here. ##" >> site.tmp
4104         @if test -f site.exp; then \
4105            sed -e '1,/^## End of auto-generated content.*##/d' site.exp >> site.tmp; \
4106          fi
4107         @-rm -f site.bak
4108         @test ! -f site.exp || mv site.exp site.bak
4109         @mv site.tmp site.exp
4110
4111 distclean-DEJAGNU:
4112         -rm -f site.exp site.bak
4113         -l='$(DEJATOOL)'; for tool in $$l; do \
4114           rm -f $$tool.sum $$tool.log; \
4115         done
4116
4117 # Recover from deleted '.trs' file; this should ensure that
4118 # "rm -f foo.log; make foo.trs" re-run 'foo.test', and re-create
4119 # both 'foo.log' and 'foo.trs'.  Break the recipe in two subshells
4120 # to avoid problems with "make -n".
4121 .log.trs:
4122         rm -f $< $@
4123         $(MAKE) $(AM_MAKEFLAGS) $<
4124
4125 # Leading 'am--fnord' is there to ensure the list of targets does not
4126 # expand to empty, as could happen e.g. with make check TESTS=''.
4127 am--fnord $(TEST_LOGS) $(TEST_LOGS:.log=.trs): $(am__force_recheck)
4128 am--force-recheck:
4129         @:
4130
4131 $(TEST_SUITE_LOG): $(TEST_LOGS)
4132         @$(am__set_TESTS_bases); \
4133         am__f_ok () { test -f "$$1" && test -r "$$1"; }; \
4134         redo_bases=`for i in $$bases; do \
4135                       am__f_ok $$i.trs && am__f_ok $$i.log || echo $$i; \
4136                     done`; \
4137         if test -n "$$redo_bases"; then \
4138           redo_logs=`for i in $$redo_bases; do echo $$i.log; done`; \
4139           redo_results=`for i in $$redo_bases; do echo $$i.trs; done`; \
4140           if $(am__make_dryrun); then :; else \
4141             rm -f $$redo_logs && rm -f $$redo_results || exit 1; \
4142           fi; \
4143         fi; \
4144         if test -n "$$am__remaking_logs"; then \
4145           echo "fatal: making $(TEST_SUITE_LOG): possible infinite" \
4146                "recursion detected" >&2; \
4147         elif test -n "$$redo_logs"; then \
4148           am__remaking_logs=yes $(MAKE) $(AM_MAKEFLAGS) $$redo_logs; \
4149         fi; \
4150         if $(am__make_dryrun); then :; else \
4151           st=0;  \
4152           errmsg="fatal: making $(TEST_SUITE_LOG): failed to create"; \
4153           for i in $$redo_bases; do \
4154             test -f $$i.trs && test -r $$i.trs \
4155               || { echo "$$errmsg $$i.trs" >&2; st=1; }; \
4156             test -f $$i.log && test -r $$i.log \
4157               || { echo "$$errmsg $$i.log" >&2; st=1; }; \
4158           done; \
4159           test $$st -eq 0 || exit 1; \
4160         fi
4161         @$(am__sh_e_setup); $(am__tty_colors); $(am__set_TESTS_bases); \
4162         ws='[   ]'; \
4163         results=`for b in $$bases; do echo $$b.trs; done`; \
4164         test -n "$$results" || results=/dev/null; \
4165         all=`  grep "^$$ws*:test-result:"           $$results | wc -l`; \
4166         pass=` grep "^$$ws*:test-result:$$ws*PASS"  $$results | wc -l`; \
4167         fail=` grep "^$$ws*:test-result:$$ws*FAIL"  $$results | wc -l`; \
4168         skip=` grep "^$$ws*:test-result:$$ws*SKIP"  $$results | wc -l`; \
4169         xfail=`grep "^$$ws*:test-result:$$ws*XFAIL" $$results | wc -l`; \
4170         xpass=`grep "^$$ws*:test-result:$$ws*XPASS" $$results | wc -l`; \
4171         error=`grep "^$$ws*:test-result:$$ws*ERROR" $$results | wc -l`; \
4172         if test `expr $$fail + $$xpass + $$error` -eq 0; then \
4173           success=true; \
4174         else \
4175           success=false; \
4176         fi; \
4177         br='==================='; br=$$br$$br$$br$$br; \
4178         result_count () \
4179         { \
4180             if test x"$$1" = x"--maybe-color"; then \
4181               maybe_colorize=yes; \
4182             elif test x"$$1" = x"--no-color"; then \
4183               maybe_colorize=no; \
4184             else \
4185               echo "$@: invalid 'result_count' usage" >&2; exit 4; \
4186             fi; \
4187             shift; \
4188             desc=$$1 count=$$2; \
4189             if test $$maybe_colorize = yes && test $$count -gt 0; then \
4190               color_start=$$3 color_end=$$std; \
4191             else \
4192               color_start= color_end=; \
4193             fi; \
4194             echo "$${color_start}# $$desc $$count$${color_end}"; \
4195         }; \
4196         create_testsuite_report () \
4197         { \
4198           result_count $$1 "TOTAL:" $$all   "$$brg"; \
4199           result_count $$1 "PASS: " $$pass  "$$grn"; \
4200           result_count $$1 "SKIP: " $$skip  "$$blu"; \
4201           result_count $$1 "XFAIL:" $$xfail "$$lgn"; \
4202           result_count $$1 "FAIL: " $$fail  "$$red"; \
4203           result_count $$1 "XPASS:" $$xpass "$$red"; \
4204           result_count $$1 "ERROR:" $$error "$$mgn"; \
4205         }; \
4206         {                                                               \
4207           echo "$(PACKAGE_STRING): $(subdir)/$(TEST_SUITE_LOG)" |       \
4208             $(am__rst_title);                                           \
4209           create_testsuite_report --no-color;                           \
4210           echo;                                                         \
4211           echo ".. contents:: :depth: 2";                               \
4212           echo;                                                         \
4213           for b in $$bases; do echo $$b; done                           \
4214             | $(am__create_global_log);                                 \
4215         } >$(TEST_SUITE_LOG).tmp || exit 1;                             \
4216         mv $(TEST_SUITE_LOG).tmp $(TEST_SUITE_LOG);                     \
4217         if $$success; then                                              \
4218           col="$$grn";                                                  \
4219          else                                                           \
4220           col="$$red";                                                  \
4221           test x"$$VERBOSE" = x || cat $(TEST_SUITE_LOG);               \
4222         fi;                                                             \
4223         echo "$${col}$$br$${std}";                                      \
4224         echo "$${col}Testsuite summary for $(PACKAGE_STRING)$${std}";   \
4225         echo "$${col}$$br$${std}";                                      \
4226         create_testsuite_report --maybe-color;                          \
4227         echo "$$col$$br$$std";                                          \
4228         if $$success; then :; else                                      \
4229           echo "$${col}See $(subdir)/$(TEST_SUITE_LOG)$${std}";         \
4230           if test -n "$(PACKAGE_BUGREPORT)"; then                       \
4231             echo "$${col}Please report to $(PACKAGE_BUGREPORT)$${std}"; \
4232           fi;                                                           \
4233           echo "$$col$$br$$std";                                        \
4234         fi;                                                             \
4235         $$success || exit 1
4236
4237 check-TESTS:
4238         @list='$(RECHECK_LOGS)';           test -z "$$list" || rm -f $$list
4239         @list='$(RECHECK_LOGS:.log=.trs)'; test -z "$$list" || rm -f $$list
4240         @test -z "$(TEST_SUITE_LOG)" || rm -f $(TEST_SUITE_LOG)
4241         @set +e; $(am__set_TESTS_bases); \
4242         log_list=`for i in $$bases; do echo $$i.log; done`; \
4243         trs_list=`for i in $$bases; do echo $$i.trs; done`; \
4244         log_list=`echo $$log_list`; trs_list=`echo $$trs_list`; \
4245         $(MAKE) $(AM_MAKEFLAGS) $(TEST_SUITE_LOG) TEST_LOGS="$$log_list"; \
4246         exit $$?;
4247 recheck: all $(check_PROGRAMS)
4248         @test -z "$(TEST_SUITE_LOG)" || rm -f $(TEST_SUITE_LOG)
4249         @set +e; $(am__set_TESTS_bases); \
4250         bases=`for i in $$bases; do echo $$i; done \
4251                  | $(am__list_recheck_tests)` || exit 1; \
4252         log_list=`for i in $$bases; do echo $$i.log; done`; \
4253         log_list=`echo $$log_list`; \
4254         $(MAKE) $(AM_MAKEFLAGS) $(TEST_SUITE_LOG) \
4255                 am__force_recheck=am--force-recheck \
4256                 TEST_LOGS="$$log_list"; \
4257         exit $$?
4258 testsuite/common/bits32m0.log: testsuite/common/bits32m0$(EXEEXT)
4259         @p='testsuite/common/bits32m0$(EXEEXT)'; \
4260         b='testsuite/common/bits32m0'; \
4261         $(am__check_pre) $(LOG_DRIVER) --test-name "$$f" \
4262         --log-file $$b.log --trs-file $$b.trs \
4263         $(am__common_driver_flags) $(AM_LOG_DRIVER_FLAGS) $(LOG_DRIVER_FLAGS) -- $(LOG_COMPILE) \
4264         "$$tst" $(AM_TESTS_FD_REDIRECT)
4265 testsuite/common/bits32m31.log: testsuite/common/bits32m31$(EXEEXT)
4266         @p='testsuite/common/bits32m31$(EXEEXT)'; \
4267         b='testsuite/common/bits32m31'; \
4268         $(am__check_pre) $(LOG_DRIVER) --test-name "$$f" \
4269         --log-file $$b.log --trs-file $$b.trs \
4270         $(am__common_driver_flags) $(AM_LOG_DRIVER_FLAGS) $(LOG_DRIVER_FLAGS) -- $(LOG_COMPILE) \
4271         "$$tst" $(AM_TESTS_FD_REDIRECT)
4272 testsuite/common/bits64m0.log: testsuite/common/bits64m0$(EXEEXT)
4273         @p='testsuite/common/bits64m0$(EXEEXT)'; \
4274         b='testsuite/common/bits64m0'; \
4275         $(am__check_pre) $(LOG_DRIVER) --test-name "$$f" \
4276         --log-file $$b.log --trs-file $$b.trs \
4277         $(am__common_driver_flags) $(AM_LOG_DRIVER_FLAGS) $(LOG_DRIVER_FLAGS) -- $(LOG_COMPILE) \
4278         "$$tst" $(AM_TESTS_FD_REDIRECT)
4279 testsuite/common/bits64m63.log: testsuite/common/bits64m63$(EXEEXT)
4280         @p='testsuite/common/bits64m63$(EXEEXT)'; \
4281         b='testsuite/common/bits64m63'; \
4282         $(am__check_pre) $(LOG_DRIVER) --test-name "$$f" \
4283         --log-file $$b.log --trs-file $$b.trs \
4284         $(am__common_driver_flags) $(AM_LOG_DRIVER_FLAGS) $(LOG_DRIVER_FLAGS) -- $(LOG_COMPILE) \
4285         "$$tst" $(AM_TESTS_FD_REDIRECT)
4286 testsuite/common/alu-tst.log: testsuite/common/alu-tst$(EXEEXT)
4287         @p='testsuite/common/alu-tst$(EXEEXT)'; \
4288         b='testsuite/common/alu-tst'; \
4289         $(am__check_pre) $(LOG_DRIVER) --test-name "$$f" \
4290         --log-file $$b.log --trs-file $$b.trs \
4291         $(am__common_driver_flags) $(AM_LOG_DRIVER_FLAGS) $(LOG_DRIVER_FLAGS) -- $(LOG_COMPILE) \
4292         "$$tst" $(AM_TESTS_FD_REDIRECT)
4293 .test.log:
4294         @p='$<'; \
4295         $(am__set_b); \
4296         $(am__check_pre) $(TEST_LOG_DRIVER) --test-name "$$f" \
4297         --log-file $$b.log --trs-file $$b.trs \
4298         $(am__common_driver_flags) $(AM_TEST_LOG_DRIVER_FLAGS) $(TEST_LOG_DRIVER_FLAGS) -- $(TEST_LOG_COMPILE) \
4299         "$$tst" $(AM_TESTS_FD_REDIRECT)
4300 @am__EXEEXT_TRUE@.test$(EXEEXT).log:
4301 @am__EXEEXT_TRUE@       @p='$<'; \
4302 @am__EXEEXT_TRUE@       $(am__set_b); \
4303 @am__EXEEXT_TRUE@       $(am__check_pre) $(TEST_LOG_DRIVER) --test-name "$$f" \
4304 @am__EXEEXT_TRUE@       --log-file $$b.log --trs-file $$b.trs \
4305 @am__EXEEXT_TRUE@       $(am__common_driver_flags) $(AM_TEST_LOG_DRIVER_FLAGS) $(TEST_LOG_DRIVER_FLAGS) -- $(TEST_LOG_COMPILE) \
4306 @am__EXEEXT_TRUE@       "$$tst" $(AM_TESTS_FD_REDIRECT)
4307 check-am: all-am
4308         $(MAKE) $(AM_MAKEFLAGS) $(check_PROGRAMS)
4309         $(MAKE) $(AM_MAKEFLAGS) check-DEJAGNU check-TESTS
4310 check: $(BUILT_SOURCES)
4311         $(MAKE) $(AM_MAKEFLAGS) check-recursive
4312 all-am: Makefile $(LIBRARIES) $(PROGRAMS) $(DATA) $(HEADERS) config.h
4313 installdirs: installdirs-recursive
4314 installdirs-am:
4315         for dir in "$(DESTDIR)$(armdocdir)" "$(DESTDIR)$(dtbdir)" "$(DESTDIR)$(erc32docdir)" "$(DESTDIR)$(frvdocdir)" "$(DESTDIR)$(or1kdocdir)" "$(DESTDIR)$(ppcdocdir)" "$(DESTDIR)$(rxdocdir)" "$(DESTDIR)$(pkgincludedir)"; do \
4316           test -z "$$dir" || $(MKDIR_P) "$$dir"; \
4317         done
4318 install: $(BUILT_SOURCES)
4319         $(MAKE) $(AM_MAKEFLAGS) install-recursive
4320 install-exec: install-exec-recursive
4321 install-data: install-data-recursive
4322 uninstall: uninstall-recursive
4323
4324 install-am: all-am
4325         @$(MAKE) $(AM_MAKEFLAGS) install-exec-am install-data-am
4326
4327 installcheck: installcheck-recursive
4328 install-strip:
4329         if test -z '$(STRIP)'; then \
4330           $(MAKE) $(AM_MAKEFLAGS) INSTALL_PROGRAM="$(INSTALL_STRIP_PROGRAM)" \
4331             install_sh_PROGRAM="$(INSTALL_STRIP_PROGRAM)" INSTALL_STRIP_FLAG=-s \
4332               install; \
4333         else \
4334           $(MAKE) $(AM_MAKEFLAGS) INSTALL_PROGRAM="$(INSTALL_STRIP_PROGRAM)" \
4335             install_sh_PROGRAM="$(INSTALL_STRIP_PROGRAM)" INSTALL_STRIP_FLAG=-s \
4336             "INSTALL_PROGRAM_ENV=STRIPPROG='$(STRIP)'" install; \
4337         fi
4338 mostlyclean-generic:
4339         -test -z "$(MOSTLYCLEANFILES)" || rm -f $(MOSTLYCLEANFILES)
4340         -test -z "$(TEST_LOGS)" || rm -f $(TEST_LOGS)
4341         -test -z "$(TEST_LOGS:.log=.trs)" || rm -f $(TEST_LOGS:.log=.trs)
4342         -test -z "$(TEST_SUITE_LOG)" || rm -f $(TEST_SUITE_LOG)
4343
4344 clean-generic:
4345         -test -z "$(CLEANFILES)" || rm -f $(CLEANFILES)
4346
4347 distclean-generic:
4348         -test -z "$(CONFIG_CLEAN_FILES)" || rm -f $(CONFIG_CLEAN_FILES)
4349         -test . = "$(srcdir)" || test -z "$(CONFIG_CLEAN_VPATH_FILES)" || rm -f $(CONFIG_CLEAN_VPATH_FILES)
4350         -rm -f aarch64/$(am__dirstamp)
4351         -rm -f arm/$(am__dirstamp)
4352         -rm -f avr/$(am__dirstamp)
4353         -rm -f bfin/$(am__dirstamp)
4354         -rm -f bpf/$(am__dirstamp)
4355         -rm -f common/$(DEPDIR)/$(am__dirstamp)
4356         -rm -f common/$(am__dirstamp)
4357         -rm -f cr16/$(DEPDIR)/$(am__dirstamp)
4358         -rm -f cr16/$(am__dirstamp)
4359         -rm -f cris/$(DEPDIR)/$(am__dirstamp)
4360         -rm -f cris/$(am__dirstamp)
4361         -rm -f d10v/$(DEPDIR)/$(am__dirstamp)
4362         -rm -f d10v/$(am__dirstamp)
4363         -rm -f erc32/$(DEPDIR)/$(am__dirstamp)
4364         -rm -f erc32/$(am__dirstamp)
4365         -rm -f example-synacor/$(am__dirstamp)
4366         -rm -f frv/$(am__dirstamp)
4367         -rm -f ft32/$(am__dirstamp)
4368         -rm -f h8300/$(am__dirstamp)
4369         -rm -f igen/$(DEPDIR)/$(am__dirstamp)
4370         -rm -f igen/$(am__dirstamp)
4371         -rm -f iq2000/$(am__dirstamp)
4372         -rm -f lm32/$(am__dirstamp)
4373         -rm -f m32c/$(DEPDIR)/$(am__dirstamp)
4374         -rm -f m32c/$(am__dirstamp)
4375         -rm -f m32r/$(am__dirstamp)
4376         -rm -f m68hc11/$(DEPDIR)/$(am__dirstamp)
4377         -rm -f m68hc11/$(am__dirstamp)
4378         -rm -f mcore/$(am__dirstamp)
4379         -rm -f microblaze/$(am__dirstamp)
4380         -rm -f mips/$(am__dirstamp)
4381         -rm -f mn10300/$(am__dirstamp)
4382         -rm -f moxie/$(am__dirstamp)
4383         -rm -f msp430/$(am__dirstamp)
4384         -rm -f or1k/$(am__dirstamp)
4385         -rm -f ppc/$(DEPDIR)/$(am__dirstamp)
4386         -rm -f ppc/$(am__dirstamp)
4387         -rm -f pru/$(am__dirstamp)
4388         -rm -f riscv/$(am__dirstamp)
4389         -rm -f rl78/$(am__dirstamp)
4390         -rm -f rx/$(am__dirstamp)
4391         -rm -f sh/$(DEPDIR)/$(am__dirstamp)
4392         -rm -f sh/$(am__dirstamp)
4393         -rm -f testsuite/common/$(DEPDIR)/$(am__dirstamp)
4394         -rm -f testsuite/common/$(am__dirstamp)
4395         -rm -f v850/$(am__dirstamp)
4396         -test -z "$(DISTCLEANFILES)" || rm -f $(DISTCLEANFILES)
4397
4398 maintainer-clean-generic:
4399         @echo "This command is intended for maintainers to use"
4400         @echo "it deletes files that may require special tools to rebuild."
4401         -test -z "$(BUILT_SOURCES)" || rm -f $(BUILT_SOURCES)
4402 clean: clean-recursive
4403
4404 clean-am: clean-checkPROGRAMS clean-generic clean-libtool \
4405         clean-noinstLIBRARIES clean-noinstPROGRAMS mostlyclean-am
4406
4407 distclean: distclean-recursive
4408         -rm -f $(am__CONFIG_DISTCLEAN_FILES)
4409         -rm -rf common/$(DEPDIR) cr16/$(DEPDIR) cris/$(DEPDIR) d10v/$(DEPDIR) erc32/$(DEPDIR) igen/$(DEPDIR) m32c/$(DEPDIR) m68hc11/$(DEPDIR) ppc/$(DEPDIR) sh/$(DEPDIR) testsuite/common/$(DEPDIR)
4410         -rm -f Makefile
4411 distclean-am: clean-am distclean-DEJAGNU distclean-compile \
4412         distclean-generic distclean-hdr distclean-libtool \
4413         distclean-tags
4414
4415 dvi: dvi-recursive
4416
4417 dvi-am:
4418
4419 html: html-recursive
4420
4421 html-am:
4422
4423 info: info-recursive
4424
4425 info-am:
4426
4427 install-data-am: install-armdocDATA install-data-local install-dtbDATA \
4428         install-erc32docDATA install-frvdocDATA install-or1kdocDATA \
4429         install-pkgincludeHEADERS install-ppcdocDATA install-rxdocDATA
4430
4431 install-dvi: install-dvi-recursive
4432
4433 install-dvi-am:
4434
4435 install-exec-am: install-exec-local
4436
4437 install-html: install-html-recursive
4438
4439 install-html-am:
4440
4441 install-info: install-info-recursive
4442
4443 install-info-am:
4444
4445 install-man:
4446
4447 install-pdf: install-pdf-recursive
4448
4449 install-pdf-am:
4450
4451 install-ps: install-ps-recursive
4452
4453 install-ps-am:
4454
4455 installcheck-am:
4456
4457 maintainer-clean: maintainer-clean-recursive
4458         -rm -f $(am__CONFIG_DISTCLEAN_FILES)
4459         -rm -rf $(top_srcdir)/autom4te.cache
4460         -rm -rf common/$(DEPDIR) cr16/$(DEPDIR) cris/$(DEPDIR) d10v/$(DEPDIR) erc32/$(DEPDIR) igen/$(DEPDIR) m32c/$(DEPDIR) m68hc11/$(DEPDIR) ppc/$(DEPDIR) sh/$(DEPDIR) testsuite/common/$(DEPDIR)
4461         -rm -f Makefile
4462 maintainer-clean-am: distclean-am maintainer-clean-generic
4463
4464 mostlyclean: mostlyclean-recursive
4465
4466 mostlyclean-am: mostlyclean-compile mostlyclean-generic \
4467         mostlyclean-libtool
4468
4469 pdf: pdf-recursive
4470
4471 pdf-am:
4472
4473 ps: ps-recursive
4474
4475 ps-am:
4476
4477 uninstall-am: uninstall-armdocDATA uninstall-dtbDATA \
4478         uninstall-erc32docDATA uninstall-frvdocDATA uninstall-local \
4479         uninstall-or1kdocDATA uninstall-pkgincludeHEADERS \
4480         uninstall-ppcdocDATA uninstall-rxdocDATA
4481
4482 .MAKE: $(am__recursive_targets) all check check-am install install-am \
4483         install-strip
4484
4485 .PHONY: $(am__recursive_targets) CTAGS GTAGS TAGS all all-am \
4486         am--refresh check check-DEJAGNU check-TESTS check-am clean \
4487         clean-checkPROGRAMS clean-cscope clean-generic clean-libtool \
4488         clean-noinstLIBRARIES clean-noinstPROGRAMS cscope \
4489         cscopelist-am ctags ctags-am distclean distclean-DEJAGNU \
4490         distclean-compile distclean-generic distclean-hdr \
4491         distclean-libtool distclean-tags dvi dvi-am html html-am info \
4492         info-am install install-am install-armdocDATA install-data \
4493         install-data-am install-data-local install-dtbDATA install-dvi \
4494         install-dvi-am install-erc32docDATA install-exec \
4495         install-exec-am install-exec-local install-frvdocDATA \
4496         install-html install-html-am install-info install-info-am \
4497         install-man install-or1kdocDATA install-pdf install-pdf-am \
4498         install-pkgincludeHEADERS install-ppcdocDATA install-ps \
4499         install-ps-am install-rxdocDATA install-strip installcheck \
4500         installcheck-am installdirs installdirs-am maintainer-clean \
4501         maintainer-clean-generic mostlyclean mostlyclean-compile \
4502         mostlyclean-generic mostlyclean-libtool pdf pdf-am ps ps-am \
4503         recheck tags tags-am uninstall uninstall-am \
4504         uninstall-armdocDATA uninstall-dtbDATA uninstall-erc32docDATA \
4505         uninstall-frvdocDATA uninstall-local uninstall-or1kdocDATA \
4506         uninstall-pkgincludeHEADERS uninstall-ppcdocDATA \
4507         uninstall-rxdocDATA
4508
4509 .PRECIOUS: Makefile
4510
4511 @am__include@ @am__quote@$(GNULIB_PARENT_DIR)/gnulib/Makefile.gnulib.inc@am__quote@
4512
4513 # Generate target constants for newlib/libgloss from its source tree.
4514 # This file is shipped with distributions so we build in the source dir.
4515 # Use `make nltvals' to rebuild.
4516 .PHONY: nltvals
4517 nltvals:
4518         $(srccom)/gennltvals.py --cpp "$(CPP)"
4519
4520 common/version.c: common/version.c-stamp ; @true
4521 common/version.c-stamp: $(srcroot)/gdb/version.in $(srcroot)/bfd/version.h $(srcdir)/common/create-version.sh
4522         $(AM_V_GEN)$(SHELL) $(srcdir)/common/create-version.sh $(srcroot)/gdb $@.tmp
4523         $(AM_V_at)$(SHELL) $(srcroot)/move-if-change $@.tmp $(@:-stamp=)
4524         $(AM_V_at)touch $@
4525
4526 # FIXME This is one very simple-minded way of generating the file hw-config.h.
4527 %/hw-config.h: %/stamp-hw ; @true
4528 %/stamp-hw: Makefile
4529         $(AM_V_GEN)set -e; \
4530         ( \
4531         sim_hw="$(SIM_HW_DEVICES) $($(@D)_SIM_EXTRA_HW_DEVICES)" ; \
4532         echo "/* generated by Makefile */" ; \
4533         printf "extern const struct hw_descriptor dv_%s_descriptor[];\n" $$sim_hw ; \
4534         echo "const struct hw_descriptor * const hw_descriptors[] = {" ; \
4535         printf "  dv_%s_descriptor,\n" $$sim_hw ; \
4536         echo "  NULL," ; \
4537         echo "};" \
4538         ) > $@.tmp; \
4539         $(SHELL) $(srcroot)/move-if-change $@.tmp $(@D)/hw-config.h; \
4540         touch $@
4541 .PRECIOUS: %/stamp-hw
4542 %/modules.c:
4543         $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) GEN_MODULES_C_SRCS="$(GEN_MODULES_C_SRCS)" -C $(@D) $(@F)
4544
4545 # Alias for developers.
4546 @SIM_ENABLE_IGEN_TRUE@igen: $(IGEN)
4547
4548 # These rules are copied from automake, but tweaked to use FOR_BUILD variables.
4549 @SIM_ENABLE_IGEN_TRUE@igen/libigen.a: $(igen_libigen_a_OBJECTS) $(igen_libigen_a_DEPENDENCIES) $(EXTRA_igen_libigen_a_DEPENDENCIES) igen/$(am__dirstamp)
4550 @SIM_ENABLE_IGEN_TRUE@  $(AM_V_at)-rm -f $@
4551 @SIM_ENABLE_IGEN_TRUE@  $(AM_V_AR)$(AR_FOR_BUILD) $(ARFLAGS) $@ $(igen_libigen_a_OBJECTS) $(igen_libigen_a_LIBADD)
4552 @SIM_ENABLE_IGEN_TRUE@  $(AM_V_at)$(RANLIB_FOR_BUILD) $@
4553
4554 @SIM_ENABLE_IGEN_TRUE@igen/igen$(EXEEXT): $(igen_igen_OBJECTS) $(igen_igen_DEPENDENCIES) igen/$(am__dirstamp)
4555 @SIM_ENABLE_IGEN_TRUE@  $(AM_V_CCLD)$(LINK_FOR_BUILD) $(igen_igen_OBJECTS) $(igen_igen_LDADD)
4556
4557 # igen is a build-time only tool.  Override the default rules for it.
4558 @SIM_ENABLE_IGEN_TRUE@igen/%.o: igen/%.c
4559 @SIM_ENABLE_IGEN_TRUE@  $(AM_V_CC)$(COMPILE_FOR_BUILD) -c $< -o $@
4560
4561 # Build some of the files in standalone mode for developers of igen itself.
4562 @SIM_ENABLE_IGEN_TRUE@igen/%-main.o: igen/%.c
4563 @SIM_ENABLE_IGEN_TRUE@  $(AM_V_CC)$(COMPILE_FOR_BUILD) -DMAIN -c $< -o $@
4564
4565 site-sim-config.exp: Makefile
4566         $(AM_V_GEN)( \
4567         echo "set SIM_PRIMARY_TARGET \"$(SIM_PRIMARY_TARGET)\""; \
4568         echo "set builddir \"$(builddir)\""; \
4569         echo "set srcdir \"$(srcdir)/testsuite\""; \
4570         $(foreach V,$(SIM_TOOLCHAIN_VARS),echo "set $(V) \"$($(V))\"";) \
4571         ) > $@
4572
4573 # Ignore dirs that only contain configuration settings.
4574 check/./config/%.exp: ; @true
4575 check/config/%.exp: ; @true
4576 check/./lib/%.exp: ; @true
4577 check/lib/%.exp: ; @true
4578
4579 check/%.exp:
4580         $(AM_V_at)mkdir -p testsuite/$*
4581         $(AM_V_RUNTEST)$(DO_RUNTEST) --objdir testsuite/$* --outdir testsuite/$* $*.exp
4582
4583 check-DEJAGNU-parallel:
4584         $(AM_V_at)( \
4585         set -- `cd $(srcdir)/testsuite && find . -name '*.exp' -printf '%P\n' | sed 's:[.]exp$$::'`; \
4586         $(MAKE) -k `printf 'check/%s.exp ' $$@`; \
4587         ret=$$?; \
4588         set -- `printf 'testsuite/%s/ ' $$@`; \
4589         $(SHELL) $(srcroot)/contrib/dg-extract-results.sh \
4590           `find $$@ -maxdepth 1 -name testrun.sum 2>/dev/null | sort` > testrun.sum; \
4591         $(SHELL) $(srcroot)/contrib/dg-extract-results.sh -L \
4592           `find $$@ -maxdepth 1 -name testrun.log 2>/dev/null | sort` > testrun.log; \
4593         echo; \
4594         $(SED) -n '/^.*===.*Summary.*===/,$$p' testrun.sum; \
4595         exit $$ret)
4596
4597 check-DEJAGNU-single:
4598         $(AM_V_RUNTEST)$(DO_RUNTEST)
4599
4600 # If running a single job, invoking runtest once is faster & has nicer output.
4601 check-DEJAGNU: site.exp
4602         $(AM_V_at)(set -e; \
4603         EXPECT=${EXPECT} ; export EXPECT ; \
4604         runtest=$(RUNTEST); \
4605         if $(SHELL) -c "$$runtest --version" > /dev/null 2>&1; then \
4606           case "$(MAKEFLAGS)" in \
4607           *-j*) $(MAKE) check-DEJAGNU-parallel;; \
4608           *)    $(MAKE) check-DEJAGNU-single;; \
4609           esac; \
4610         else \
4611           echo "WARNING: could not find \`runtest'" 1>&2; :;\
4612         fi)
4613
4614 # These tests are build-time only tools.  Override the default rules for them.
4615 testsuite/common/%.o: testsuite/common/%.c
4616         $(AM_V_CC)$(COMPILE_FOR_BUILD) $(testsuite_common_CPPFLAGS) -c $< -o $@
4617
4618 testsuite/common/alu-tst$(EXEEXT): $(testsuite_common_alu_tst_OBJECTS) $(testsuite_common_alu_tst_DEPENDENCIES) testsuite/common/$(am__dirstamp)
4619         $(AM_V_CCLD)$(LINK_FOR_BUILD) $(testsuite_common_alu_tst_OBJECTS) $(testsuite_common_alu_tst_LDADD)
4620
4621 testsuite/common/fpu-tst$(EXEEXT): $(testsuite_common_fpu_tst_OBJECTS) $(testsuite_common_fpu_tst_DEPENDENCIES) testsuite/common/$(am__dirstamp)
4622         $(AM_V_CCLD)$(LINK_FOR_BUILD) $(testsuite_common_fpu_tst_OBJECTS) $(testsuite_common_fpu_tst_LDADD)
4623
4624 testsuite/common/bits-gen$(EXEEXT): $(testsuite_common_bits_gen_OBJECTS) $(testsuite_common_bits_gen_DEPENDENCIES) testsuite/common/$(am__dirstamp)
4625         $(AM_V_CCLD)$(LINK_FOR_BUILD) $(testsuite_common_bits_gen_OBJECTS) $(testsuite_common_bits_gen_LDADD)
4626
4627 testsuite/common/bits32m0$(EXEEXT): $(testsuite_common_bits32m0_OBJECTS) $(testsuite_common_bits32m0_DEPENDENCIES) testsuite/common/$(am__dirstamp)
4628         $(AM_V_CCLD)$(LINK_FOR_BUILD) $(testsuite_common_bits32m0_OBJECTS) $(testsuite_common_bits32m0_LDADD)
4629
4630 testsuite/common/bits32m0.c: testsuite/common/bits-gen$(EXEEXT) testsuite/common/bits-tst.c
4631         $(AM_V_GEN)$< 32 0 big > $@.tmp
4632         $(AM_V_at)cat $(srcdir)/testsuite/common/bits-tst.c >> $@.tmp
4633         $(AM_V_at)mv $@.tmp $@
4634
4635 testsuite/common/bits32m31$(EXEEXT): $(testsuite_common_bits32m31_OBJECTS) $(testsuite_common_bits32m31_DEPENDENCIES) testsuite/common/$(am__dirstamp)
4636         $(AM_V_CCLD)$(LINK_FOR_BUILD) $(testsuite_common_bits32m31_OBJECTS) $(testsuite_common_bits32m31_LDADD)
4637
4638 testsuite/common/bits32m31.c: testsuite/common/bits-gen$(EXEEXT) testsuite/common/bits-tst.c
4639         $(AM_V_GEN)$< 32 31 little > $@.tmp
4640         $(AM_V_at)cat $(srcdir)/testsuite/common/bits-tst.c >> $@.tmp
4641         $(AM_V_at)mv $@.tmp $@
4642
4643 testsuite/common/bits64m0$(EXEEXT): $(testsuite_common_bits64m0_OBJECTS) $(testsuite_common_bits64m0_DEPENDENCIES) testsuite/common/$(am__dirstamp)
4644         $(AM_V_CCLD)$(LINK_FOR_BUILD) $(testsuite_common_bits64m0_OBJECTS) $(testsuite_common_bits64m0_LDADD)
4645
4646 testsuite/common/bits64m0.c: testsuite/common/bits-gen$(EXEEXT) testsuite/common/bits-tst.c
4647         $(AM_V_GEN)$< 64 0 big > $@.tmp
4648         $(AM_V_at)cat $(srcdir)/testsuite/common/bits-tst.c >> $@.tmp
4649         $(AM_V_at)mv $@.tmp $@
4650
4651 testsuite/common/bits64m63$(EXEEXT): $(testsuite_common_bits64m63_OBJECTS) $(testsuite_common_bits64m63_DEPENDENCIES) testsuite/common/$(am__dirstamp)
4652         $(AM_V_CCLD)$(LINK_FOR_BUILD) $(testsuite_common_bits64m63_OBJECTS) $(testsuite_common_bits64m63_LDADD)
4653
4654 testsuite/common/bits64m63.c: testsuite/common/bits-gen$(EXEEXT) testsuite/common/bits-tst.c
4655         $(AM_V_GEN)$< 64 63 little > $@.tmp
4656         $(AM_V_at)cat $(srcdir)/testsuite/common/bits-tst.c >> $@.tmp
4657         $(AM_V_at)mv $@.tmp $@
4658 @SIM_ENABLE_ARCH_aarch64_TRUE@$(aarch64_libsim_a_OBJECTS) $(aarch64_libsim_a_LIBADD): aarch64/hw-config.h
4659
4660 @SIM_ENABLE_ARCH_aarch64_TRUE@aarch64/%.o: aarch64/%.c
4661 @SIM_ENABLE_ARCH_aarch64_TRUE@  $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
4662
4663 @SIM_ENABLE_ARCH_aarch64_TRUE@aarch64/%.o: common/%.c
4664 @SIM_ENABLE_ARCH_aarch64_TRUE@  $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
4665 @SIM_ENABLE_ARCH_arm_TRUE@$(arm_libsim_a_OBJECTS) $(arm_libsim_a_LIBADD): arm/hw-config.h
4666
4667 @SIM_ENABLE_ARCH_arm_TRUE@arm/%.o: arm/%.c
4668 @SIM_ENABLE_ARCH_arm_TRUE@      $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
4669
4670 @SIM_ENABLE_ARCH_arm_TRUE@arm/%.o: common/%.c
4671 @SIM_ENABLE_ARCH_arm_TRUE@      $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
4672 @SIM_ENABLE_ARCH_avr_TRUE@$(avr_libsim_a_OBJECTS) $(avr_libsim_a_LIBADD): avr/hw-config.h
4673
4674 @SIM_ENABLE_ARCH_avr_TRUE@avr/%.o: avr/%.c
4675 @SIM_ENABLE_ARCH_avr_TRUE@      $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
4676
4677 @SIM_ENABLE_ARCH_avr_TRUE@avr/%.o: common/%.c
4678 @SIM_ENABLE_ARCH_avr_TRUE@      $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
4679 @SIM_ENABLE_ARCH_bfin_TRUE@$(bfin_libsim_a_OBJECTS) $(bfin_libsim_a_LIBADD): bfin/hw-config.h
4680
4681 @SIM_ENABLE_ARCH_bfin_TRUE@bfin/%.o: bfin/%.c
4682 @SIM_ENABLE_ARCH_bfin_TRUE@     $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
4683
4684 @SIM_ENABLE_ARCH_bfin_TRUE@bfin/%.o: common/%.c
4685 @SIM_ENABLE_ARCH_bfin_TRUE@     $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
4686
4687 @SIM_ENABLE_ARCH_bfin_TRUE@bfin/linux-fixed-code.h: @MAINT@ $(srcdir)/bfin/linux-fixed-code.s bfin/local.mk bfin/$(am__dirstamp)
4688 @SIM_ENABLE_ARCH_bfin_TRUE@     $(AM_V_GEN)$(AS_FOR_TARGET_BFIN) $(srcdir)/bfin/linux-fixed-code.s -o bfin/linux-fixed-code.o
4689 @SIM_ENABLE_ARCH_bfin_TRUE@     $(AM_V_at)(\
4690 @SIM_ENABLE_ARCH_bfin_TRUE@             set -e; \
4691 @SIM_ENABLE_ARCH_bfin_TRUE@             echo "/* DO NOT EDIT: Autogenerated from linux-fixed-code.s.  */"; \
4692 @SIM_ENABLE_ARCH_bfin_TRUE@             echo "static const unsigned char bfin_linux_fixed_code[] ="; \
4693 @SIM_ENABLE_ARCH_bfin_TRUE@             echo "{"; \
4694 @SIM_ENABLE_ARCH_bfin_TRUE@             $(OBJDUMP_FOR_TARGET_BFIN) -d -z bfin/linux-fixed-code.o > $@.dis; \
4695 @SIM_ENABLE_ARCH_bfin_TRUE@             sed -n \
4696 @SIM_ENABLE_ARCH_bfin_TRUE@                     -e 's:^[^       ]*      :0x:' \
4697 @SIM_ENABLE_ARCH_bfin_TRUE@                     -e '/^0x/{s:    .*::;s: *$$:,:;s: :, 0x:g;p;}' \
4698 @SIM_ENABLE_ARCH_bfin_TRUE@                     $@.dis; \
4699 @SIM_ENABLE_ARCH_bfin_TRUE@             rm -f $@.dis; \
4700 @SIM_ENABLE_ARCH_bfin_TRUE@             echo "};" \
4701 @SIM_ENABLE_ARCH_bfin_TRUE@     ) > $@.tmp
4702 @SIM_ENABLE_ARCH_bfin_TRUE@     $(AM_V_at)$(SHELL) $(srcroot)/move-if-change $@.tmp $(srcdir)/bfin/linux-fixed-code.h
4703 @SIM_ENABLE_ARCH_bfin_TRUE@     $(AM_V_at)touch $(srcdir)/bfin/linux-fixed-code.h
4704 @SIM_ENABLE_ARCH_bpf_TRUE@$(bpf_libsim_a_OBJECTS) $(bpf_libsim_a_LIBADD): bpf/hw-config.h
4705
4706 @SIM_ENABLE_ARCH_bpf_TRUE@bpf/%.o: bpf/%.c
4707 @SIM_ENABLE_ARCH_bpf_TRUE@      $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
4708
4709 @SIM_ENABLE_ARCH_bpf_TRUE@bpf/%.o: common/%.c
4710 @SIM_ENABLE_ARCH_bpf_TRUE@      $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
4711 @SIM_ENABLE_ARCH_bpf_TRUE@bpf/modules.c: | $(bpf_BUILD_OUTPUTS)
4712
4713 @SIM_ENABLE_ARCH_bpf_TRUE@bpf/mloop-le.c bpf/eng-le.h: bpf/stamp-mloop-le ; @true
4714 @SIM_ENABLE_ARCH_bpf_TRUE@bpf/stamp-mloop-le: $(srccom)/genmloop.sh bpf/mloop.in
4715 @SIM_ENABLE_ARCH_bpf_TRUE@      $(AM_V_GEN)$(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \
4716 @SIM_ENABLE_ARCH_bpf_TRUE@              -mono -scache -prefix bpfbf_ebpfle -cpu bpfbf \
4717 @SIM_ENABLE_ARCH_bpf_TRUE@              -infile $(srcdir)/bpf/mloop.in \
4718 @SIM_ENABLE_ARCH_bpf_TRUE@              -outfile-prefix bpf/ -outfile-suffix -le
4719 @SIM_ENABLE_ARCH_bpf_TRUE@      $(AM_V_at)$(SHELL) $(srcroot)/move-if-change bpf/eng-le.hin bpf/eng-le.h
4720 @SIM_ENABLE_ARCH_bpf_TRUE@      $(AM_V_at)$(SHELL) $(srcroot)/move-if-change bpf/mloop-le.cin bpf/mloop-le.c
4721 @SIM_ENABLE_ARCH_bpf_TRUE@      $(AM_V_at)touch $@
4722
4723 @SIM_ENABLE_ARCH_bpf_TRUE@bpf/mloop-be.c bpf/eng-be.h: bpf/stamp-mloop-be ; @true
4724 @SIM_ENABLE_ARCH_bpf_TRUE@bpf/stamp-mloop-be: $(srccom)/genmloop.sh bpf/mloop.in
4725 @SIM_ENABLE_ARCH_bpf_TRUE@      $(AM_V_GEN)$(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \
4726 @SIM_ENABLE_ARCH_bpf_TRUE@              -mono -scache -prefix bpfbf_ebpfbe -cpu bpfbf \
4727 @SIM_ENABLE_ARCH_bpf_TRUE@              -infile $(srcdir)/bpf/mloop.in \
4728 @SIM_ENABLE_ARCH_bpf_TRUE@              -outfile-prefix bpf/ -outfile-suffix -be
4729 @SIM_ENABLE_ARCH_bpf_TRUE@      $(AM_V_at)$(SHELL) $(srcroot)/move-if-change bpf/eng-be.hin bpf/eng-be.h
4730 @SIM_ENABLE_ARCH_bpf_TRUE@      $(AM_V_at)$(SHELL) $(srcroot)/move-if-change bpf/mloop-be.cin bpf/mloop-be.c
4731 @SIM_ENABLE_ARCH_bpf_TRUE@      $(AM_V_at)touch $@
4732
4733 @SIM_ENABLE_ARCH_bpf_TRUE@bpf/cgen: bpf/cgen-arch bpf/cgen-cpu bpf/cgen-defs-le bpf/cgen-defs-be bpf/cgen-decode-le bpf/cgen-decode-be
4734
4735 @SIM_ENABLE_ARCH_bpf_TRUE@bpf/cgen-arch:
4736 @SIM_ENABLE_ARCH_bpf_TRUE@      $(AM_V_GEN)mach=bpf cpu=bpfbf FLAGS="with-scache"; $(CGEN_GEN_ARCH)
4737 @SIM_ENABLE_ARCH_bpf_TRUE@bpf/arch.h bpf/arch.c bpf/cpuall.h: @CGEN_MAINT@ bpf/cgen-arch
4738
4739 @SIM_ENABLE_ARCH_bpf_TRUE@bpf/cgen-cpu:
4740 @SIM_ENABLE_ARCH_bpf_TRUE@      $(AM_V_GEN)isa=ebpfle,ebpfbe cpu=bpfbf mach=bpf FLAGS="with-multiple-isa with-scache"; $(CGEN_GEN_CPU)
4741 @SIM_ENABLE_ARCH_bpf_TRUE@      $(AM_V_at)rm -f $(srcdir)/bpf/model.c
4742 @SIM_ENABLE_ARCH_bpf_TRUE@bpf/cpu.h bpf/cpu.c bpf/model.c: @CGEN_MAINT@ bpf/cgen-cpu
4743
4744 @SIM_ENABLE_ARCH_bpf_TRUE@bpf/cgen-defs-le:
4745 @SIM_ENABLE_ARCH_bpf_TRUE@      $(AM_V_GEN)isa=ebpfle cpu=bpfbf mach=bpf FLAGS="with-scache" SUFFIX="-le"; $(CGEN_GEN_DEFS)
4746 @SIM_ENABLE_ARCH_bpf_TRUE@bpf/defs-le.h: @CGEN_MAINT@ bpf/cgen-defs-le
4747
4748 @SIM_ENABLE_ARCH_bpf_TRUE@bpf/cgen-defs-be:
4749 @SIM_ENABLE_ARCH_bpf_TRUE@      $(AM_V_GEN)isa=ebpfbe cpu=bpfbf mach=bpf FLAGS="with-scache" SUFFIX="-be"; $(CGEN_GEN_DEFS)
4750 @SIM_ENABLE_ARCH_bpf_TRUE@bpf/defs-be.h: @CGEN_MAINT@ bpf/cgen-defs-be
4751
4752 @SIM_ENABLE_ARCH_bpf_TRUE@bpf/cgen-decode-le:
4753 @SIM_ENABLE_ARCH_bpf_TRUE@      $(AM_V_GEN)isa=ebpfle cpu=bpfbf mach=bpf FLAGS="with-scache" SUFFIX="-le" EXTRAFILES="$(CGEN_CPU_SEM)"; $(CGEN_GEN_DECODE)
4754 @SIM_ENABLE_ARCH_bpf_TRUE@bpf/sem-le.c bpf/decode-le.c bpf/decode-le.h: @CGEN_MAINT@ bpf/cgen-decode-vle
4755
4756 @SIM_ENABLE_ARCH_bpf_TRUE@bpf/cgen-decode-be:
4757 @SIM_ENABLE_ARCH_bpf_TRUE@      $(AM_V_GEN)isa=ebpfbe cpu=bpfbf mach=bpf FLAGS="with-scache" SUFFIX="-be" EXTRAFILES="$(CGEN_CPU_SEM)"; $(CGEN_GEN_DECODE)
4758 @SIM_ENABLE_ARCH_bpf_TRUE@bpf/sem-be.c bpf/decode-be.c bpf/decode-be.h: @CGEN_MAINT@ bpf/cgen-decode-be
4759 @SIM_ENABLE_ARCH_cr16_TRUE@$(cr16_libsim_a_OBJECTS) $(cr16_libsim_a_LIBADD): cr16/hw-config.h
4760
4761 @SIM_ENABLE_ARCH_cr16_TRUE@cr16/%.o: cr16/%.c
4762 @SIM_ENABLE_ARCH_cr16_TRUE@     $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
4763
4764 @SIM_ENABLE_ARCH_cr16_TRUE@cr16/%.o: common/%.c
4765 @SIM_ENABLE_ARCH_cr16_TRUE@     $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
4766 @SIM_ENABLE_ARCH_cr16_TRUE@cr16/modules.c: | $(cr16_BUILD_OUTPUTS)
4767
4768 # These rules are copied from automake, but tweaked to use FOR_BUILD variables.
4769 @SIM_ENABLE_ARCH_cr16_TRUE@cr16/gencode$(EXEEXT): $(cr16_gencode_OBJECTS) $(cr16_gencode_DEPENDENCIES) cr16/$(am__dirstamp)
4770 @SIM_ENABLE_ARCH_cr16_TRUE@     $(AM_V_CCLD)$(LINK_FOR_BUILD) $(cr16_gencode_OBJECTS) $(cr16_gencode_LDADD)
4771
4772 # gencode is a build-time only tool.  Override the default rules for it.
4773 @SIM_ENABLE_ARCH_cr16_TRUE@cr16/gencode.o: cr16/gencode.c
4774 @SIM_ENABLE_ARCH_cr16_TRUE@     $(AM_V_CC)$(COMPILE_FOR_BUILD) -c $< -o $@
4775 @SIM_ENABLE_ARCH_cr16_TRUE@cr16/cr16-opc.o: ../opcodes/cr16-opc.c
4776 @SIM_ENABLE_ARCH_cr16_TRUE@     $(AM_V_CC)$(COMPILE_FOR_BUILD) -c $< -o $@
4777
4778 @SIM_ENABLE_ARCH_cr16_TRUE@cr16/simops.h: cr16/gencode$(EXEEXT)
4779 @SIM_ENABLE_ARCH_cr16_TRUE@     $(AM_V_GEN)$< -h >$@
4780
4781 @SIM_ENABLE_ARCH_cr16_TRUE@cr16/table.c: cr16/gencode$(EXEEXT)
4782 @SIM_ENABLE_ARCH_cr16_TRUE@     $(AM_V_GEN)$< >$@
4783 @SIM_ENABLE_ARCH_cris_TRUE@$(cris_libsim_a_OBJECTS) $(cris_libsim_a_LIBADD): cris/hw-config.h
4784
4785 @SIM_ENABLE_ARCH_cris_TRUE@cris/%.o: cris/%.c
4786 @SIM_ENABLE_ARCH_cris_TRUE@     $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
4787
4788 @SIM_ENABLE_ARCH_cris_TRUE@cris/%.o: common/%.c
4789 @SIM_ENABLE_ARCH_cris_TRUE@     $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
4790 @SIM_ENABLE_ARCH_cris_TRUE@cris/modules.c: | $(cris_BUILD_OUTPUTS)
4791
4792 @SIM_ENABLE_ARCH_cris_TRUE@cris/mloopv10f.c cris/engv10.h: cris/stamp-mloop-v10f ; @true
4793 @SIM_ENABLE_ARCH_cris_TRUE@cris/stamp-mloop-v10f: $(srccom)/genmloop.sh cris/mloop.in
4794 @SIM_ENABLE_ARCH_cris_TRUE@     $(AM_V_GEN)$(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \
4795 @SIM_ENABLE_ARCH_cris_TRUE@             -mono -no-fast -pbb -switch semcrisv10f-switch.c \
4796 @SIM_ENABLE_ARCH_cris_TRUE@             -cpu crisv10f \
4797 @SIM_ENABLE_ARCH_cris_TRUE@             -infile $(srcdir)/cris/mloop.in -outfile-prefix cris/ -outfile-suffix -v10f
4798 @SIM_ENABLE_ARCH_cris_TRUE@     $(AM_V_at)$(SHELL) $(srcroot)/move-if-change cris/eng-v10f.hin cris/engv10.h
4799 @SIM_ENABLE_ARCH_cris_TRUE@     $(AM_V_at)$(SHELL) $(srcroot)/move-if-change cris/mloop-v10f.cin cris/mloopv10f.c
4800 @SIM_ENABLE_ARCH_cris_TRUE@     $(AM_V_at)touch $@
4801
4802 @SIM_ENABLE_ARCH_cris_TRUE@cris/mloopv32f.c cris/engv32.h: cris/stamp-mloop-v32f ; @true
4803 @SIM_ENABLE_ARCH_cris_TRUE@cris/stamp-mloop-v32f: $(srccom)/genmloop.sh cris/mloop.in
4804 @SIM_ENABLE_ARCH_cris_TRUE@     $(AM_V_GEN)$(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \
4805 @SIM_ENABLE_ARCH_cris_TRUE@             -mono -no-fast -pbb -switch semcrisv32f-switch.c \
4806 @SIM_ENABLE_ARCH_cris_TRUE@             -cpu crisv32f \
4807 @SIM_ENABLE_ARCH_cris_TRUE@             -infile $(srcdir)/cris/mloop.in -outfile-prefix cris/ -outfile-suffix -v32f
4808 @SIM_ENABLE_ARCH_cris_TRUE@     $(AM_V_at)$(SHELL) $(srcroot)/move-if-change cris/eng-v32f.hin cris/engv32.h
4809 @SIM_ENABLE_ARCH_cris_TRUE@     $(AM_V_at)$(SHELL) $(srcroot)/move-if-change cris/mloop-v32f.cin cris/mloopv32f.c
4810 @SIM_ENABLE_ARCH_cris_TRUE@     $(AM_V_at)touch $@
4811
4812 @SIM_ENABLE_ARCH_cris_TRUE@cris/cgen: cris/cgen-arch cris/cgen-cpu-decode-v10f cris/cgen-cpu-decode-v32f
4813
4814 @SIM_ENABLE_ARCH_cris_TRUE@cris/cgen-arch:
4815 @SIM_ENABLE_ARCH_cris_TRUE@     $(AM_V_GEN)mach=crisv10,crisv32 FLAGS="with-scache with-profile=fn"; $(CGEN_GEN_ARCH)
4816 @SIM_ENABLE_ARCH_cris_TRUE@cris/arch.h cris/arch.c cris/cpuall.h: @CGEN_MAINT@ cris/cgen-arch
4817
4818 @SIM_ENABLE_ARCH_cris_TRUE@cris/cgen-cpu-decode-v10f:
4819 @SIM_ENABLE_ARCH_cris_TRUE@     $(AM_V_GEN)cpu=crisv10f mach=crisv10 SUFFIX=v10 FLAGS="with-scache with-profile=fn" EXTRAFILES="$(CGEN_CPU_SEMSW)"; $(CGEN_GEN_CPU_DECODE)
4820 @SIM_ENABLE_ARCH_cris_TRUE@     $(AM_V_at)$(SHELL) $(srcroot)/move-if-change $(srcdir)/cris/semv10-switch.c $(srcdir)/cris/semcrisv10f-switch.c
4821 @SIM_ENABLE_ARCH_cris_TRUE@cris/cpuv10.h cris/cpuv10.c cris/semcrisv10f-switch.c cris/modelv10.c cris/decodev10.c cris/decodev10.h: @CGEN_MAINT@ cris/cgen-cpu-decode-v10f
4822
4823 @SIM_ENABLE_ARCH_cris_TRUE@cris/cgen-cpu-decode-v32f:
4824 @SIM_ENABLE_ARCH_cris_TRUE@     $(AM_V_GEN)cpu=crisv32f mach=crisv32 SUFFIX=v32 FLAGS="with-scache with-profile=fn" EXTRAFILES="$(CGEN_CPU_SEMSW)"; $(CGEN_GEN_CPU_DECODE)
4825 @SIM_ENABLE_ARCH_cris_TRUE@     $(AM_V_at)$(SHELL) $(srcroot)/move-if-change $(srcdir)/cris/semv32-switch.c $(srcdir)/cris/semcrisv32f-switch.c
4826 @SIM_ENABLE_ARCH_cris_TRUE@cris/cpuv32.h cris/cpuv32.c cris/semcrisv32f-switch.c cris/modelv32.c cris/decodev32.c cris/decodev32.h: @CGEN_MAINT@ cris/cgen-cpu-decode-v32f
4827 @SIM_ENABLE_ARCH_d10v_TRUE@$(d10v_libsim_a_OBJECTS) $(d10v_libsim_a_LIBADD): d10v/hw-config.h
4828
4829 @SIM_ENABLE_ARCH_d10v_TRUE@d10v/%.o: d10v/%.c
4830 @SIM_ENABLE_ARCH_d10v_TRUE@     $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
4831
4832 @SIM_ENABLE_ARCH_d10v_TRUE@d10v/%.o: common/%.c
4833 @SIM_ENABLE_ARCH_d10v_TRUE@     $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
4834 @SIM_ENABLE_ARCH_d10v_TRUE@d10v/modules.c: | $(d10v_BUILD_OUTPUTS)
4835
4836 # These rules are copied from automake, but tweaked to use FOR_BUILD variables.
4837 @SIM_ENABLE_ARCH_d10v_TRUE@d10v/gencode$(EXEEXT): $(d10v_gencode_OBJECTS) $(d10v_gencode_DEPENDENCIES) d10v/$(am__dirstamp)
4838 @SIM_ENABLE_ARCH_d10v_TRUE@     $(AM_V_CCLD)$(LINK_FOR_BUILD) $(d10v_gencode_OBJECTS) $(d10v_gencode_LDADD)
4839
4840 # gencode is a build-time only tool.  Override the default rules for it.
4841 @SIM_ENABLE_ARCH_d10v_TRUE@d10v/gencode.o: d10v/gencode.c
4842 @SIM_ENABLE_ARCH_d10v_TRUE@     $(AM_V_CC)$(COMPILE_FOR_BUILD) -c $< -o $@
4843 @SIM_ENABLE_ARCH_d10v_TRUE@d10v/d10v-opc.o: ../opcodes/d10v-opc.c
4844 @SIM_ENABLE_ARCH_d10v_TRUE@     $(AM_V_CC)$(COMPILE_FOR_BUILD) -c $< -o $@
4845
4846 @SIM_ENABLE_ARCH_d10v_TRUE@d10v/simops.h: d10v/gencode$(EXEEXT)
4847 @SIM_ENABLE_ARCH_d10v_TRUE@     $(AM_V_GEN)$< -h >$@
4848
4849 @SIM_ENABLE_ARCH_d10v_TRUE@d10v/table.c: d10v/gencode$(EXEEXT)
4850 @SIM_ENABLE_ARCH_d10v_TRUE@     $(AM_V_GEN)$< >$@
4851 @SIM_ENABLE_ARCH_erc32_TRUE@$(erc32_libsim_a_OBJECTS) $(erc32_libsim_a_LIBADD): erc32/hw-config.h
4852
4853 @SIM_ENABLE_ARCH_erc32_TRUE@erc32/%.o: erc32/%.c
4854 @SIM_ENABLE_ARCH_erc32_TRUE@    $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
4855
4856 @SIM_ENABLE_ARCH_erc32_TRUE@erc32/%.o: common/%.c
4857 @SIM_ENABLE_ARCH_erc32_TRUE@    $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
4858
4859 @SIM_ENABLE_ARCH_erc32_TRUE@erc32/sis$(EXEEXT): erc32/run$(EXEEXT)
4860 @SIM_ENABLE_ARCH_erc32_TRUE@    $(AM_V_GEN)ln $< $@ 2>/dev/null || $(LN_S) $< $@ 2>/dev/null || cp -p $< $@
4861 @SIM_ENABLE_ARCH_erc32_TRUE@sim-%D-install-exec-local: installdirs
4862 @SIM_ENABLE_ARCH_erc32_TRUE@    $(AM_V_at)$(MKDIR_P) $(DESTDIR)$(bindir)
4863 @SIM_ENABLE_ARCH_erc32_TRUE@    n=`echo sis | sed '$(program_transform_name)'`; \
4864 @SIM_ENABLE_ARCH_erc32_TRUE@    $(LIBTOOL) --mode=install $(INSTALL_PROGRAM) erc32/run$(EXEEXT) $(DESTDIR)$(bindir)/$$n$(EXEEXT)
4865 @SIM_ENABLE_ARCH_erc32_TRUE@sim-erc32-uninstall-local:
4866 @SIM_ENABLE_ARCH_erc32_TRUE@    rm -f $(DESTDIR)$(bindir)/sis
4867 @SIM_ENABLE_ARCH_examples_TRUE@$(example_synacor_libsim_a_OBJECTS) $(example_synacor_libsim_a_LIBADD): example-synacor/hw-config.h
4868
4869 @SIM_ENABLE_ARCH_examples_TRUE@example-synacor/%.o: example-synacor/%.c
4870 @SIM_ENABLE_ARCH_examples_TRUE@ $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
4871
4872 @SIM_ENABLE_ARCH_examples_TRUE@example-synacor/%.o: common/%.c
4873 @SIM_ENABLE_ARCH_examples_TRUE@ $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
4874 @SIM_ENABLE_ARCH_frv_TRUE@$(frv_libsim_a_OBJECTS) $(frv_libsim_a_LIBADD): frv/hw-config.h
4875
4876 @SIM_ENABLE_ARCH_frv_TRUE@frv/%.o: frv/%.c
4877 @SIM_ENABLE_ARCH_frv_TRUE@      $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
4878
4879 @SIM_ENABLE_ARCH_frv_TRUE@frv/%.o: common/%.c
4880 @SIM_ENABLE_ARCH_frv_TRUE@      $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
4881 @SIM_ENABLE_ARCH_frv_TRUE@frv/modules.c: | $(frv_BUILD_OUTPUTS)
4882
4883 @SIM_ENABLE_ARCH_frv_TRUE@frv/mloop.c frv/eng.h: frv/stamp-mloop ; @true
4884 @SIM_ENABLE_ARCH_frv_TRUE@frv/stamp-mloop: $(srccom)/genmloop.sh frv/mloop.in
4885 @SIM_ENABLE_ARCH_frv_TRUE@      $(AM_V_GEN)$(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \
4886 @SIM_ENABLE_ARCH_frv_TRUE@              -mono -scache -parallel-generic-write -parallel-only \
4887 @SIM_ENABLE_ARCH_frv_TRUE@              -cpu frvbf \
4888 @SIM_ENABLE_ARCH_frv_TRUE@              -infile $(srcdir)/frv/mloop.in -outfile-prefix frv/
4889 @SIM_ENABLE_ARCH_frv_TRUE@      $(AM_V_at)$(SHELL) $(srcroot)/move-if-change frv/eng.hin frv/eng.h
4890 @SIM_ENABLE_ARCH_frv_TRUE@      $(AM_V_at)$(SHELL) $(srcroot)/move-if-change frv/mloop.cin frv/mloop.c
4891 @SIM_ENABLE_ARCH_frv_TRUE@      $(AM_V_at)touch $@
4892
4893 @SIM_ENABLE_ARCH_frv_TRUE@frv/cgen: frv/cgen-arch frv/cgen-cpu-decode
4894
4895 @SIM_ENABLE_ARCH_frv_TRUE@frv/cgen-arch:
4896 @SIM_ENABLE_ARCH_frv_TRUE@      $(AM_V_GEN)mach=all FLAGS="with-scache"; $(CGEN_GEN_ARCH)
4897 @SIM_ENABLE_ARCH_frv_TRUE@frv/arch.h frv/arch.c frv/cpuall.h: @CGEN_MAINT@ frv/cgen-arch
4898
4899 @SIM_ENABLE_ARCH_frv_TRUE@frv/cgen-cpu-decode:
4900 @SIM_ENABLE_ARCH_frv_TRUE@      $(AM_V_GEN)cpu=frvbf mach=frv,fr550,fr500,fr450,fr400,tomcat,simple FLAGS="with-scache with-profile=fn with-generic-write with-parallel-only" EXTRAFILES="$(CGEN_CPU_SEM)"; $(CGEN_GEN_CPU_DECODE)
4901 @SIM_ENABLE_ARCH_frv_TRUE@frv/cpu.h frv/sem.c frv/model.c frv/decode.c frv/decode.h: @CGEN_MAINT@ frv/cgen-cpu-decode
4902 @SIM_ENABLE_ARCH_ft32_TRUE@$(ft32_libsim_a_OBJECTS) $(ft32_libsim_a_LIBADD): ft32/hw-config.h
4903
4904 @SIM_ENABLE_ARCH_ft32_TRUE@ft32/%.o: ft32/%.c
4905 @SIM_ENABLE_ARCH_ft32_TRUE@     $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
4906
4907 @SIM_ENABLE_ARCH_ft32_TRUE@ft32/%.o: common/%.c
4908 @SIM_ENABLE_ARCH_ft32_TRUE@     $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
4909 @SIM_ENABLE_ARCH_h8300_TRUE@$(h8300_libsim_a_OBJECTS) $(h8300_libsim_a_LIBADD): h8300/hw-config.h
4910
4911 @SIM_ENABLE_ARCH_h8300_TRUE@h8300/%.o: h8300/%.c
4912 @SIM_ENABLE_ARCH_h8300_TRUE@    $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
4913
4914 @SIM_ENABLE_ARCH_h8300_TRUE@h8300/%.o: common/%.c
4915 @SIM_ENABLE_ARCH_h8300_TRUE@    $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
4916 @SIM_ENABLE_ARCH_iq2000_TRUE@$(iq2000_libsim_a_OBJECTS) $(iq2000_libsim_a_LIBADD): iq2000/hw-config.h
4917
4918 @SIM_ENABLE_ARCH_iq2000_TRUE@iq2000/%.o: iq2000/%.c
4919 @SIM_ENABLE_ARCH_iq2000_TRUE@   $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
4920
4921 @SIM_ENABLE_ARCH_iq2000_TRUE@iq2000/%.o: common/%.c
4922 @SIM_ENABLE_ARCH_iq2000_TRUE@   $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
4923 @SIM_ENABLE_ARCH_iq2000_TRUE@iq2000/modules.c: | $(iq2000_BUILD_OUTPUTS)
4924
4925 @SIM_ENABLE_ARCH_iq2000_TRUE@iq2000/mloop.c iq2000/eng.h: iq2000/stamp-mloop ; @true
4926 @SIM_ENABLE_ARCH_iq2000_TRUE@iq2000/stamp-mloop: $(srccom)/genmloop.sh iq2000/mloop.in
4927 @SIM_ENABLE_ARCH_iq2000_TRUE@   $(AM_V_GEN)$(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \
4928 @SIM_ENABLE_ARCH_iq2000_TRUE@           -mono -fast -pbb -switch sem-switch.c \
4929 @SIM_ENABLE_ARCH_iq2000_TRUE@           -cpu iq2000bf \
4930 @SIM_ENABLE_ARCH_iq2000_TRUE@           -infile $(srcdir)/iq2000/mloop.in -outfile-prefix iq2000/
4931 @SIM_ENABLE_ARCH_iq2000_TRUE@   $(AM_V_at)$(SHELL) $(srcroot)/move-if-change iq2000/eng.hin iq2000/eng.h
4932 @SIM_ENABLE_ARCH_iq2000_TRUE@   $(AM_V_at)$(SHELL) $(srcroot)/move-if-change iq2000/mloop.cin iq2000/mloop.c
4933 @SIM_ENABLE_ARCH_iq2000_TRUE@   $(AM_V_at)touch $@
4934
4935 @SIM_ENABLE_ARCH_iq2000_TRUE@iq2000/cgen: iq2000/cgen-arch iq2000/cgen-cpu-decode
4936
4937 @SIM_ENABLE_ARCH_iq2000_TRUE@iq2000/cgen-arch:
4938 @SIM_ENABLE_ARCH_iq2000_TRUE@   $(AM_V_GEN)mach=iq2000 FLAGS="with-scache with-profile=fn"; $(CGEN_GEN_ARCH)
4939 @SIM_ENABLE_ARCH_iq2000_TRUE@iq2000/arch.h iq2000/arch.c iq2000/cpuall.h: @CGEN_MAINT@ iq2000/cgen-arch
4940
4941 @SIM_ENABLE_ARCH_iq2000_TRUE@iq2000/cgen-cpu-decode:
4942 @SIM_ENABLE_ARCH_iq2000_TRUE@   $(AM_V_GEN)cpu=iq2000bf mach=iq2000 FLAGS="with-scache with-profile=fn" EXTRAFILES="$(CGEN_CPU_SEM) $(CGEN_CPU_SEMSW)"; $(CGEN_GEN_CPU_DECODE)
4943 @SIM_ENABLE_ARCH_iq2000_TRUE@iq2000/cpu.h iq2000/sem.c iq2000/sem-switch.c iq2000/model.c iq2000/decode.c iq2000/decode.h: @CGEN_MAINT@ iq2000/cgen-cpu-decode
4944 @SIM_ENABLE_ARCH_lm32_TRUE@$(lm32_libsim_a_OBJECTS) $(lm32_libsim_a_LIBADD): lm32/hw-config.h
4945
4946 @SIM_ENABLE_ARCH_lm32_TRUE@lm32/%.o: lm32/%.c
4947 @SIM_ENABLE_ARCH_lm32_TRUE@     $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
4948
4949 @SIM_ENABLE_ARCH_lm32_TRUE@lm32/%.o: common/%.c
4950 @SIM_ENABLE_ARCH_lm32_TRUE@     $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
4951 @SIM_ENABLE_ARCH_lm32_TRUE@lm32/modules.c: | $(lm32_BUILD_OUTPUTS)
4952
4953 @SIM_ENABLE_ARCH_lm32_TRUE@lm32/mloop.c lm32/eng.h: lm32/stamp-mloop ; @true
4954 @SIM_ENABLE_ARCH_lm32_TRUE@lm32/stamp-mloop: $(srccom)/genmloop.sh lm32/mloop.in
4955 @SIM_ENABLE_ARCH_lm32_TRUE@     $(AM_V_GEN)$(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \
4956 @SIM_ENABLE_ARCH_lm32_TRUE@             -mono -fast -pbb -switch sem-switch.c \
4957 @SIM_ENABLE_ARCH_lm32_TRUE@             -cpu lm32bf \
4958 @SIM_ENABLE_ARCH_lm32_TRUE@             -infile $(srcdir)/lm32/mloop.in -outfile-prefix lm32/
4959 @SIM_ENABLE_ARCH_lm32_TRUE@     $(AM_V_at)$(SHELL) $(srcroot)/move-if-change lm32/eng.hin lm32/eng.h
4960 @SIM_ENABLE_ARCH_lm32_TRUE@     $(AM_V_at)$(SHELL) $(srcroot)/move-if-change lm32/mloop.cin lm32/mloop.c
4961 @SIM_ENABLE_ARCH_lm32_TRUE@     $(AM_V_at)touch $@
4962
4963 @SIM_ENABLE_ARCH_lm32_TRUE@lm32/cgen: lm32/cgen-arch lm32/cgen-cpu-decode
4964
4965 @SIM_ENABLE_ARCH_lm32_TRUE@lm32/cgen-arch:
4966 @SIM_ENABLE_ARCH_lm32_TRUE@     $(AM_V_GEN)mach=all FLAGS="with-scache with-profile=fn"; $(CGEN_GEN_ARCH)
4967 @SIM_ENABLE_ARCH_lm32_TRUE@lm32/arch.h lm32/arch.c lm32/cpuall.h: @CGEN_MAINT@ lm32/cgen-arch
4968
4969 @SIM_ENABLE_ARCH_lm32_TRUE@lm32/cgen-cpu-decode:
4970 @SIM_ENABLE_ARCH_lm32_TRUE@     $(AM_V_GEN)cpu=lm32bf mach=lm32 FLAGS="with-scache with-profile=fn" EXTRAFILES="$(CGEN_CPU_SEM) $(CGEN_CPU_SEMSW)"; $(CGEN_GEN_CPU_DECODE)
4971 @SIM_ENABLE_ARCH_lm32_TRUE@lm32/cpu.h lm32/sem.c lm32/sem-switch.c lm32/model.c lm32/decode.c lm32/decode.h: @CGEN_MAINT@ lm32/cgen-cpu-decode
4972 @SIM_ENABLE_ARCH_m32c_TRUE@$(m32c_libsim_a_OBJECTS) $(m32c_libsim_a_LIBADD): m32c/hw-config.h
4973
4974 @SIM_ENABLE_ARCH_m32c_TRUE@m32c/%.o: m32c/%.c
4975 @SIM_ENABLE_ARCH_m32c_TRUE@     $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
4976
4977 @SIM_ENABLE_ARCH_m32c_TRUE@m32c/%.o: common/%.c
4978 @SIM_ENABLE_ARCH_m32c_TRUE@     $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
4979 @SIM_ENABLE_ARCH_m32c_TRUE@m32c/modules.c: | $(m32c_BUILD_OUTPUTS)
4980
4981 # These rules are copied from automake, but tweaked to use FOR_BUILD variables.
4982 @SIM_ENABLE_ARCH_m32c_TRUE@m32c/opc2c$(EXEEXT): $(m32c_opc2c_OBJECTS) $(m32c_opc2c_DEPENDENCIES) m32c/$(am__dirstamp)
4983 @SIM_ENABLE_ARCH_m32c_TRUE@     $(AM_V_CCLD)$(LINK_FOR_BUILD) $(m32c_opc2c_OBJECTS) $(m32c_opc2c_LDADD)
4984
4985 # opc2c is a build-time only tool.  Override the default rules for it.
4986 @SIM_ENABLE_ARCH_m32c_TRUE@m32c/opc2c.o: m32c/opc2c.c
4987 @SIM_ENABLE_ARCH_m32c_TRUE@     $(AM_V_CC)$(COMPILE_FOR_BUILD) -c $< -o $@
4988
4989 @SIM_ENABLE_ARCH_m32c_TRUE@m32c/m32c.c: m32c/m32c.opc m32c/opc2c$(EXEEXT)
4990 @SIM_ENABLE_ARCH_m32c_TRUE@     $(AM_V_GEN)$(m32c_OPC2C_RUN) -l $@.log $< > $@.tmp
4991 @SIM_ENABLE_ARCH_m32c_TRUE@     $(AM_V_at)mv $@.tmp $@
4992
4993 @SIM_ENABLE_ARCH_m32c_TRUE@m32c/r8c.c: m32c/r8c.opc m32c/opc2c$(EXEEXT)
4994 @SIM_ENABLE_ARCH_m32c_TRUE@     $(AM_V_GEN)$(m32c_OPC2C_RUN) -l $@.log $< > $@.tmp
4995 @SIM_ENABLE_ARCH_m32c_TRUE@     $(AM_V_at)mv $@.tmp $@
4996 @SIM_ENABLE_ARCH_m32r_TRUE@$(m32r_libsim_a_OBJECTS) $(m32r_libsim_a_LIBADD): m32r/hw-config.h
4997
4998 @SIM_ENABLE_ARCH_m32r_TRUE@m32r/%.o: m32r/%.c
4999 @SIM_ENABLE_ARCH_m32r_TRUE@     $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
5000
5001 @SIM_ENABLE_ARCH_m32r_TRUE@m32r/%.o: common/%.c
5002 @SIM_ENABLE_ARCH_m32r_TRUE@     $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
5003 @SIM_ENABLE_ARCH_m32r_TRUE@m32r/modules.c: | $(m32r_BUILD_OUTPUTS)
5004
5005 @SIM_ENABLE_ARCH_m32r_TRUE@m32r/mloop.c m32r/eng.h: m32r/stamp-mloop ; @true
5006 @SIM_ENABLE_ARCH_m32r_TRUE@m32r/stamp-mloop: $(srccom)/genmloop.sh m32r/mloop.in
5007 @SIM_ENABLE_ARCH_m32r_TRUE@     $(AM_V_GEN)$(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \
5008 @SIM_ENABLE_ARCH_m32r_TRUE@             -mono -fast -pbb -switch sem-switch.c \
5009 @SIM_ENABLE_ARCH_m32r_TRUE@             -cpu m32rbf \
5010 @SIM_ENABLE_ARCH_m32r_TRUE@             -infile $(srcdir)/m32r/mloop.in -outfile-prefix m32r/
5011 @SIM_ENABLE_ARCH_m32r_TRUE@     $(AM_V_at)$(SHELL) $(srcroot)/move-if-change m32r/eng.hin m32r/eng.h
5012 @SIM_ENABLE_ARCH_m32r_TRUE@     $(AM_V_at)$(SHELL) $(srcroot)/move-if-change m32r/mloop.cin m32r/mloop.c
5013 @SIM_ENABLE_ARCH_m32r_TRUE@     $(AM_V_at)touch $@
5014
5015 @SIM_ENABLE_ARCH_m32r_TRUE@m32r/mloopx.c m32r/engx.h: m32r/stamp-mloop ; @true
5016 @SIM_ENABLE_ARCH_m32r_TRUE@m32r/stamp-mloop-x: $(srccom)/genmloop.sh m32r/mloop.in
5017 @SIM_ENABLE_ARCH_m32r_TRUE@     $(AM_V_GEN)$(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \
5018 @SIM_ENABLE_ARCH_m32r_TRUE@             -mono -no-fast -pbb -parallel-write -switch semx-switch.c \
5019 @SIM_ENABLE_ARCH_m32r_TRUE@             -cpu m32rxf \
5020 @SIM_ENABLE_ARCH_m32r_TRUE@             -infile $(srcdir)/m32r/mloopx.in -outfile-prefix m32r/ -outfile-suffix x
5021 @SIM_ENABLE_ARCH_m32r_TRUE@     $(AM_V_at)$(SHELL) $(srcroot)/move-if-change m32r/engx.hin m32r/engx.h
5022 @SIM_ENABLE_ARCH_m32r_TRUE@     $(AM_V_at)$(SHELL) $(srcroot)/move-if-change m32r/mloopx.cin m32r/mloopx.c
5023 @SIM_ENABLE_ARCH_m32r_TRUE@     $(AM_V_at)touch $@
5024
5025 @SIM_ENABLE_ARCH_m32r_TRUE@m32r/mloop2.c m32r/eng2.h: m32r/stamp-mloop ; @true
5026 @SIM_ENABLE_ARCH_m32r_TRUE@m32r/stamp-mloop-2: $(srccom)/genmloop.sh m32r/mloop.in
5027 @SIM_ENABLE_ARCH_m32r_TRUE@     $(AM_V_GEN)$(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \
5028 @SIM_ENABLE_ARCH_m32r_TRUE@             -mono -no-fast -pbb -parallel-write -switch sem2-switch.c \
5029 @SIM_ENABLE_ARCH_m32r_TRUE@             -cpu m32r2f \
5030 @SIM_ENABLE_ARCH_m32r_TRUE@             -infile $(srcdir)/m32r/mloop2.in -outfile-prefix m32r/ -outfile-suffix 2
5031 @SIM_ENABLE_ARCH_m32r_TRUE@     $(AM_V_at)$(SHELL) $(srcroot)/move-if-change m32r/eng2.hin m32r/eng2.h
5032 @SIM_ENABLE_ARCH_m32r_TRUE@     $(AM_V_at)$(SHELL) $(srcroot)/move-if-change m32r/mloop2.cin m32r/mloop2.c
5033 @SIM_ENABLE_ARCH_m32r_TRUE@     $(AM_V_at)touch $@
5034
5035 @SIM_ENABLE_ARCH_m32r_TRUE@m32r/cgen: m32r/cgen-arch m32r/cgen-cpu-decode m32r/cgen-cpu-decode-x m32r/cgen-cpu-decode-2
5036
5037 @SIM_ENABLE_ARCH_m32r_TRUE@m32r/cgen-arch:
5038 @SIM_ENABLE_ARCH_m32r_TRUE@     $(AM_V_GEN)mach=all FLAGS="with-scache with-profile=fn"; $(CGEN_GEN_ARCH)
5039 @SIM_ENABLE_ARCH_m32r_TRUE@m32r/arch.h m32r/arch.c m32r/cpuall.h: @CGEN_MAINT@ m32r/cgen-arch
5040
5041 @SIM_ENABLE_ARCH_m32r_TRUE@m32r/cgen-cpu-decode:
5042 @SIM_ENABLE_ARCH_m32r_TRUE@     $(AM_V_GEN)cpu=m32rbf mach=m32r FLAGS="with-scache with-profile=fn" EXTRAFILES="$(CGEN_CPU_SEM) $(CGEN_CPU_SEMSW)"; $(CGEN_GEN_CPU_DECODE)
5043 @SIM_ENABLE_ARCH_m32r_TRUE@m32r/cpu.h m32r/sem.c m32r/sem-switch.c m32r/model.c m32r/decode.c m32r/decode.h: @CGEN_MAINT@ m32r/cgen-cpu-decode
5044
5045 @SIM_ENABLE_ARCH_m32r_TRUE@m32r/cgen-cpu-decode-x:
5046 @SIM_ENABLE_ARCH_m32r_TRUE@     $(AM_V_GEN)cpu=m32rxf mach=m32rx SUFFIX=x FLAGS="with-scache with-profile=fn" EXTRAFILES="$(CGEN_CPU_SEMSW)"; $(CGEN_GEN_CPU_DECODE)
5047 @SIM_ENABLE_ARCH_m32r_TRUE@m32r/cpux.h m32r/semx-switch.c m32r/modelx.c m32r/decodex.c m32r/decodex.h: @CGEN_MAINT@ m32r/cgen-cpu-decode-x
5048
5049 @SIM_ENABLE_ARCH_m32r_TRUE@m32r/cgen-cpu-decode-2:
5050 @SIM_ENABLE_ARCH_m32r_TRUE@     $(AM_V_GEN)cpu=m32r2f mach=m32r2 SUFFIX=2 FLAGS="with-scache with-profile=fn" EXTRAFILES="$(CGEN_CPU_SEMSW)"; $(CGEN_GEN_CPU_DECODE)
5051 @SIM_ENABLE_ARCH_m32r_TRUE@m32r/cpu2.h m32r/sem2-switch.c m32r/model2.c m32r/decode2.c m32r/decode2.h: @CGEN_MAINT@ m32r/cgen-cpu-decode-2
5052 @SIM_ENABLE_ARCH_m68hc11_TRUE@$(m68hc11_libsim_a_OBJECTS) $(m68hc11_libsim_a_LIBADD): m68hc11/hw-config.h
5053
5054 @SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11/%.o: m68hc11/%.c
5055 @SIM_ENABLE_ARCH_m68hc11_TRUE@  $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
5056
5057 @SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11/%.o: common/%.c
5058 @SIM_ENABLE_ARCH_m68hc11_TRUE@  $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
5059 @SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11/modules.c: | $(m68hc11_BUILD_OUTPUTS)
5060
5061 # These rules are copied from automake, but tweaked to use FOR_BUILD variables.
5062 @SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11/gencode$(EXEEXT): $(m68hc11_gencode_OBJECTS) $(m68hc11_gencode_DEPENDENCIES) m68hc11/$(am__dirstamp)
5063 @SIM_ENABLE_ARCH_m68hc11_TRUE@  $(AM_V_CCLD)$(LINK_FOR_BUILD) $(m68hc11_gencode_OBJECTS) $(m68hc11_gencode_LDADD)
5064
5065 # gencode is a build-time only tool.  Override the default rules for it.
5066 @SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11/gencode.o: m68hc11/gencode.c
5067 @SIM_ENABLE_ARCH_m68hc11_TRUE@  $(AM_V_CC)$(COMPILE_FOR_BUILD) -c $< -o $@
5068
5069 @SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11/m68hc11int.c: m68hc11/gencode$(EXEEXT)
5070 @SIM_ENABLE_ARCH_m68hc11_TRUE@  $(AM_V_GEN)$< -m6811 >$@
5071
5072 @SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11/m68hc12int.c: m68hc11/gencode$(EXEEXT)
5073 @SIM_ENABLE_ARCH_m68hc11_TRUE@  $(AM_V_GEN)$< -m6812 >$@
5074 @SIM_ENABLE_ARCH_mcore_TRUE@$(mcore_libsim_a_OBJECTS) $(mcore_libsim_a_LIBADD): mcore/hw-config.h
5075
5076 @SIM_ENABLE_ARCH_mcore_TRUE@mcore/%.o: mcore/%.c
5077 @SIM_ENABLE_ARCH_mcore_TRUE@    $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
5078
5079 @SIM_ENABLE_ARCH_mcore_TRUE@mcore/%.o: common/%.c
5080 @SIM_ENABLE_ARCH_mcore_TRUE@    $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
5081 @SIM_ENABLE_ARCH_microblaze_TRUE@$(microblaze_libsim_a_OBJECTS) $(microblaze_libsim_a_LIBADD): microblaze/hw-config.h
5082
5083 @SIM_ENABLE_ARCH_microblaze_TRUE@microblaze/%.o: microblaze/%.c
5084 @SIM_ENABLE_ARCH_microblaze_TRUE@       $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
5085
5086 @SIM_ENABLE_ARCH_microblaze_TRUE@microblaze/%.o: common/%.c
5087 @SIM_ENABLE_ARCH_microblaze_TRUE@       $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
5088 @SIM_ENABLE_ARCH_mips_TRUE@$(mips_libsim_a_OBJECTS) $(mips_libsim_a_LIBADD): mips/hw-config.h
5089
5090 @SIM_ENABLE_ARCH_mips_TRUE@mips/%.o: mips/%.c
5091 @SIM_ENABLE_ARCH_mips_TRUE@     $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
5092
5093 @SIM_ENABLE_ARCH_mips_TRUE@mips/%.o: common/%.c
5094 @SIM_ENABLE_ARCH_mips_TRUE@     $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
5095 @SIM_ENABLE_ARCH_mips_TRUE@mips/modules.c: | $(mips_BUILD_OUTPUTS)
5096
5097 @SIM_ENABLE_ARCH_mips_TRUE@$(mips_BUILT_SRC_FROM_IGEN_ITABLE): mips/stamp-igen-itable
5098 @SIM_ENABLE_ARCH_mips_TRUE@$(mips_BUILT_SRC_FROM_GEN_MODE_SINGLE): mips/stamp-gen-mode-single
5099 @SIM_ENABLE_ARCH_mips_TRUE@$(mips_BUILT_SRC_FROM_GEN_MODE_M16_M16): mips/stamp-gen-mode-m16-m16
5100 @SIM_ENABLE_ARCH_mips_TRUE@$(mips_BUILT_SRC_FROM_GEN_MODE_M16_M32): mips/stamp-gen-mode-m16-m32
5101 @SIM_ENABLE_ARCH_mips_TRUE@$(SIM_MIPS_MULTI_SRC): mips/stamp-gen-mode-multi-igen mips/stamp-gen-mode-multi-run
5102
5103 @SIM_ENABLE_ARCH_mips_TRUE@mips/stamp-igen-itable: $(mips_IGEN_INSN) $(mips_IGEN_INSN_INC) $(IGEN)
5104 @SIM_ENABLE_ARCH_mips_TRUE@     $(AM_V_GEN)$(IGEN_RUN) \
5105 @SIM_ENABLE_ARCH_mips_TRUE@             $(mips_IGEN_TRACE) \
5106 @SIM_ENABLE_ARCH_mips_TRUE@             -I $(srcdir)/mips \
5107 @SIM_ENABLE_ARCH_mips_TRUE@             -Werror \
5108 @SIM_ENABLE_ARCH_mips_TRUE@             -Wnodiscard \
5109 @SIM_ENABLE_ARCH_mips_TRUE@             -Wnowidth \
5110 @SIM_ENABLE_ARCH_mips_TRUE@             -Wnounimplemented \
5111 @SIM_ENABLE_ARCH_mips_TRUE@             $(SIM_MIPS_IGEN_ITABLE_FLAGS) \
5112 @SIM_ENABLE_ARCH_mips_TRUE@             -G gen-direct-access \
5113 @SIM_ENABLE_ARCH_mips_TRUE@             -G gen-zero-r0 \
5114 @SIM_ENABLE_ARCH_mips_TRUE@             -i $(mips_IGEN_INSN) \
5115 @SIM_ENABLE_ARCH_mips_TRUE@             -n itable.h    -ht mips/itable.h \
5116 @SIM_ENABLE_ARCH_mips_TRUE@             -n itable.c    -t  mips/itable.c
5117 @SIM_ENABLE_ARCH_mips_TRUE@     $(AM_V_at)touch $@
5118
5119 @SIM_ENABLE_ARCH_mips_TRUE@mips/stamp-gen-mode-single: $(mips_IGEN_INSN) $(mips_IGEN_INSN_INC) $(mips_IGEN_DC) $(IGEN)
5120 @SIM_ENABLE_ARCH_mips_TRUE@     $(AM_V_GEN)$(IGEN_RUN) \
5121 @SIM_ENABLE_ARCH_mips_TRUE@             $(mips_IGEN_TRACE) \
5122 @SIM_ENABLE_ARCH_mips_TRUE@             -I $(srcdir)/mips \
5123 @SIM_ENABLE_ARCH_mips_TRUE@             -Werror \
5124 @SIM_ENABLE_ARCH_mips_TRUE@             -Wnodiscard \
5125 @SIM_ENABLE_ARCH_mips_TRUE@             $(SIM_MIPS_SINGLE_FLAGS) \
5126 @SIM_ENABLE_ARCH_mips_TRUE@             -G gen-direct-access \
5127 @SIM_ENABLE_ARCH_mips_TRUE@             -G gen-zero-r0 \
5128 @SIM_ENABLE_ARCH_mips_TRUE@             -B 32 \
5129 @SIM_ENABLE_ARCH_mips_TRUE@             -H 31 \
5130 @SIM_ENABLE_ARCH_mips_TRUE@             -i $(mips_IGEN_INSN) \
5131 @SIM_ENABLE_ARCH_mips_TRUE@             -o $(mips_IGEN_DC) \
5132 @SIM_ENABLE_ARCH_mips_TRUE@             -x \
5133 @SIM_ENABLE_ARCH_mips_TRUE@             -n icache.h    -hc mips/icache.h \
5134 @SIM_ENABLE_ARCH_mips_TRUE@             -n icache.c    -c  mips/icache.c \
5135 @SIM_ENABLE_ARCH_mips_TRUE@             -n semantics.h -hs mips/semantics.h \
5136 @SIM_ENABLE_ARCH_mips_TRUE@             -n semantics.c -s  mips/semantics.c \
5137 @SIM_ENABLE_ARCH_mips_TRUE@             -n idecode.h   -hd mips/idecode.h \
5138 @SIM_ENABLE_ARCH_mips_TRUE@             -n idecode.c   -d  mips/idecode.c \
5139 @SIM_ENABLE_ARCH_mips_TRUE@             -n model.h     -hm mips/model.h \
5140 @SIM_ENABLE_ARCH_mips_TRUE@             -n model.c     -m  mips/model.c \
5141 @SIM_ENABLE_ARCH_mips_TRUE@             -n support.h   -hf mips/support.h \
5142 @SIM_ENABLE_ARCH_mips_TRUE@             -n support.c   -f  mips/support.c \
5143 @SIM_ENABLE_ARCH_mips_TRUE@             -n engine.h    -he mips/engine.h \
5144 @SIM_ENABLE_ARCH_mips_TRUE@             -n engine.c    -e  mips/engine.c \
5145 @SIM_ENABLE_ARCH_mips_TRUE@             -n irun.c      -r  mips/irun.c
5146 @SIM_ENABLE_ARCH_mips_TRUE@     $(AM_V_at)touch $@
5147
5148 @SIM_ENABLE_ARCH_mips_TRUE@mips/stamp-gen-mode-m16-m16: $(mips_IGEN_INSN) $(mips_IGEN_INSN_INC) $(mips_M16_DC) $(IGEN)
5149 @SIM_ENABLE_ARCH_mips_TRUE@     $(AM_V_GEN)$(IGEN_RUN) \
5150 @SIM_ENABLE_ARCH_mips_TRUE@             $(mips_IGEN_TRACE) \
5151 @SIM_ENABLE_ARCH_mips_TRUE@             -I $(srcdir)/mips \
5152 @SIM_ENABLE_ARCH_mips_TRUE@             -Werror \
5153 @SIM_ENABLE_ARCH_mips_TRUE@             -Wnodiscard \
5154 @SIM_ENABLE_ARCH_mips_TRUE@             $(SIM_MIPS_M16_FLAGS) \
5155 @SIM_ENABLE_ARCH_mips_TRUE@             -G gen-direct-access \
5156 @SIM_ENABLE_ARCH_mips_TRUE@             -G gen-zero-r0 \
5157 @SIM_ENABLE_ARCH_mips_TRUE@             -B 16 \
5158 @SIM_ENABLE_ARCH_mips_TRUE@             -H 15 \
5159 @SIM_ENABLE_ARCH_mips_TRUE@             -i $(mips_IGEN_INSN) \
5160 @SIM_ENABLE_ARCH_mips_TRUE@             -o $(mips_M16_DC) \
5161 @SIM_ENABLE_ARCH_mips_TRUE@             -P m16_ \
5162 @SIM_ENABLE_ARCH_mips_TRUE@             -x \
5163 @SIM_ENABLE_ARCH_mips_TRUE@             -n m16_icache.h    -hc mips/m16_icache.h \
5164 @SIM_ENABLE_ARCH_mips_TRUE@             -n m16_icache.c    -c  mips/m16_icache.c \
5165 @SIM_ENABLE_ARCH_mips_TRUE@             -n m16_semantics.h -hs mips/m16_semantics.h \
5166 @SIM_ENABLE_ARCH_mips_TRUE@             -n m16_semantics.c -s  mips/m16_semantics.c \
5167 @SIM_ENABLE_ARCH_mips_TRUE@             -n m16_idecode.h   -hd mips/m16_idecode.h \
5168 @SIM_ENABLE_ARCH_mips_TRUE@             -n m16_idecode.c   -d  mips/m16_idecode.c \
5169 @SIM_ENABLE_ARCH_mips_TRUE@             -n m16_model.h     -hm mips/m16_model.h \
5170 @SIM_ENABLE_ARCH_mips_TRUE@             -n m16_model.c     -m  mips/m16_model.c \
5171 @SIM_ENABLE_ARCH_mips_TRUE@             -n m16_support.h   -hf mips/m16_support.h \
5172 @SIM_ENABLE_ARCH_mips_TRUE@             -n m16_support.c   -f  mips/m16_support.c
5173 @SIM_ENABLE_ARCH_mips_TRUE@     $(AM_V_at)touch $@
5174
5175 @SIM_ENABLE_ARCH_mips_TRUE@mips/stamp-gen-mode-m16-m32: $(mips_IGEN_INSN) $(mips_IGEN_INSN_INC) $(mips_IGEN_DC) $(IGEN)
5176 @SIM_ENABLE_ARCH_mips_TRUE@     $(AM_V_GEN)$(IGEN_RUN) \
5177 @SIM_ENABLE_ARCH_mips_TRUE@             $(mips_IGEN_TRACE) \
5178 @SIM_ENABLE_ARCH_mips_TRUE@             -I $(srcdir)/mips \
5179 @SIM_ENABLE_ARCH_mips_TRUE@             -Werror \
5180 @SIM_ENABLE_ARCH_mips_TRUE@             -Wnodiscard \
5181 @SIM_ENABLE_ARCH_mips_TRUE@             $(SIM_MIPS_SINGLE_FLAGS) \
5182 @SIM_ENABLE_ARCH_mips_TRUE@             -G gen-direct-access \
5183 @SIM_ENABLE_ARCH_mips_TRUE@             -G gen-zero-r0 \
5184 @SIM_ENABLE_ARCH_mips_TRUE@             -B 32 \
5185 @SIM_ENABLE_ARCH_mips_TRUE@             -H 31 \
5186 @SIM_ENABLE_ARCH_mips_TRUE@             -i $(mips_IGEN_INSN) \
5187 @SIM_ENABLE_ARCH_mips_TRUE@             -o $(mips_IGEN_DC) \
5188 @SIM_ENABLE_ARCH_mips_TRUE@             -P m32_ \
5189 @SIM_ENABLE_ARCH_mips_TRUE@             -x \
5190 @SIM_ENABLE_ARCH_mips_TRUE@             -n m32_icache.h    -hc mips/m32_icache.h \
5191 @SIM_ENABLE_ARCH_mips_TRUE@             -n m32_icache.c    -c  mips/m32_icache.c \
5192 @SIM_ENABLE_ARCH_mips_TRUE@             -n m32_semantics.h -hs mips/m32_semantics.h \
5193 @SIM_ENABLE_ARCH_mips_TRUE@             -n m32_semantics.c -s  mips/m32_semantics.c \
5194 @SIM_ENABLE_ARCH_mips_TRUE@             -n m32_idecode.h   -hd mips/m32_idecode.h \
5195 @SIM_ENABLE_ARCH_mips_TRUE@             -n m32_idecode.c   -d  mips/m32_idecode.c \
5196 @SIM_ENABLE_ARCH_mips_TRUE@             -n m32_model.h     -hm mips/m32_model.h \
5197 @SIM_ENABLE_ARCH_mips_TRUE@             -n m32_model.c     -m  mips/m32_model.c \
5198 @SIM_ENABLE_ARCH_mips_TRUE@             -n m32_support.h   -hf mips/m32_support.h \
5199 @SIM_ENABLE_ARCH_mips_TRUE@             -n m32_support.c   -f  mips/m32_support.c
5200 @SIM_ENABLE_ARCH_mips_TRUE@     $(AM_V_at)touch $@
5201
5202 @SIM_ENABLE_ARCH_mips_TRUE@mips/stamp-gen-mode-multi-igen: $(mips_IGEN_INSN) $(mips_IGEN_INSN_INC) $(mips_IGEN_DC) $(mips_M16_DC) $(mips_MICROMIPS32_DC) $(mips_MICROMIPS16_DC) $(IGEN)
5203 @SIM_ENABLE_ARCH_mips_TRUE@     $(AM_V_GEN)\
5204 @SIM_ENABLE_ARCH_mips_TRUE@     for t in $(SIM_MIPS_MULTI_IGEN_CONFIGS); do \
5205 @SIM_ENABLE_ARCH_mips_TRUE@       p=`echo $${t} | sed -e 's/:.*//'` ; \
5206 @SIM_ENABLE_ARCH_mips_TRUE@       m=`echo $${t} | sed -e 's/.*:\(.*\):.*/\1/'` ; \
5207 @SIM_ENABLE_ARCH_mips_TRUE@       f=`echo $${t} | sed -e 's/.*://'` ; \
5208 @SIM_ENABLE_ARCH_mips_TRUE@       case $${p} in \
5209 @SIM_ENABLE_ARCH_mips_TRUE@         micromips16*) \
5210 @SIM_ENABLE_ARCH_mips_TRUE@           e="-B 16 -H 15 -o $(mips_MICROMIPS16_DC) -F 16" ;; \
5211 @SIM_ENABLE_ARCH_mips_TRUE@         micromips32* | micromips64*) \
5212 @SIM_ENABLE_ARCH_mips_TRUE@           e="-B 32 -H 31 -o $(mips_MICROMIPS32_DC) -F $${f}" ;; \
5213 @SIM_ENABLE_ARCH_mips_TRUE@         micromips_m32*) \
5214 @SIM_ENABLE_ARCH_mips_TRUE@           e="-B 32 -H 31 -o $(mips_IGEN_DC) -F $${f}"; \
5215 @SIM_ENABLE_ARCH_mips_TRUE@           m="mips32r2,mips3d,mdmx,dsp,dsp2,smartmips" ;; \
5216 @SIM_ENABLE_ARCH_mips_TRUE@         micromips_m64*) \
5217 @SIM_ENABLE_ARCH_mips_TRUE@           e="-B 32 -H 31 -o $(mips_IGEN_DC) -F $${f}"; \
5218 @SIM_ENABLE_ARCH_mips_TRUE@           m="mips64r2,mips3d,mdmx,dsp,dsp2,smartmips" ;; \
5219 @SIM_ENABLE_ARCH_mips_TRUE@         m16*) \
5220 @SIM_ENABLE_ARCH_mips_TRUE@           e="-B 16 -H 15 -o $(mips_M16_DC) -F 16" ;; \
5221 @SIM_ENABLE_ARCH_mips_TRUE@         *) \
5222 @SIM_ENABLE_ARCH_mips_TRUE@           e="-B 32 -H 31 -o $(mips_IGEN_DC) -F $${f}" ;; \
5223 @SIM_ENABLE_ARCH_mips_TRUE@       esac; \
5224 @SIM_ENABLE_ARCH_mips_TRUE@       $(IGEN_RUN) \
5225 @SIM_ENABLE_ARCH_mips_TRUE@             $(mips_IGEN_TRACE) \
5226 @SIM_ENABLE_ARCH_mips_TRUE@             $${e} \
5227 @SIM_ENABLE_ARCH_mips_TRUE@             -I $(srcdir)/mips \
5228 @SIM_ENABLE_ARCH_mips_TRUE@             -Werror \
5229 @SIM_ENABLE_ARCH_mips_TRUE@             -Wnodiscard \
5230 @SIM_ENABLE_ARCH_mips_TRUE@             -M $${m} \
5231 @SIM_ENABLE_ARCH_mips_TRUE@             -G gen-direct-access \
5232 @SIM_ENABLE_ARCH_mips_TRUE@             -G gen-zero-r0 \
5233 @SIM_ENABLE_ARCH_mips_TRUE@             -i $(mips_IGEN_INSN) \
5234 @SIM_ENABLE_ARCH_mips_TRUE@             -P $${p}_ \
5235 @SIM_ENABLE_ARCH_mips_TRUE@             -x \
5236 @SIM_ENABLE_ARCH_mips_TRUE@             -n $${p}_icache.h    -hc mips/$${p}_icache.h \
5237 @SIM_ENABLE_ARCH_mips_TRUE@             -n $${p}_icache.c    -c  mips/$${p}_icache.c \
5238 @SIM_ENABLE_ARCH_mips_TRUE@             -n $${p}_semantics.h -hs mips/$${p}_semantics.h \
5239 @SIM_ENABLE_ARCH_mips_TRUE@             -n $${p}_semantics.c -s  mips/$${p}_semantics.c \
5240 @SIM_ENABLE_ARCH_mips_TRUE@             -n $${p}_idecode.h   -hd mips/$${p}_idecode.h \
5241 @SIM_ENABLE_ARCH_mips_TRUE@             -n $${p}_idecode.c   -d  mips/$${p}_idecode.c \
5242 @SIM_ENABLE_ARCH_mips_TRUE@             -n $${p}_model.h     -hm mips/$${p}_model.h \
5243 @SIM_ENABLE_ARCH_mips_TRUE@             -n $${p}_model.c     -m  mips/$${p}_model.c \
5244 @SIM_ENABLE_ARCH_mips_TRUE@             -n $${p}_support.h   -hf mips/$${p}_support.h \
5245 @SIM_ENABLE_ARCH_mips_TRUE@             -n $${p}_support.c   -f  mips/$${p}_support.c \
5246 @SIM_ENABLE_ARCH_mips_TRUE@             -n $${p}_engine.h    -he mips/$${p}_engine.h \
5247 @SIM_ENABLE_ARCH_mips_TRUE@             -n $${p}_engine.c    -e  mips/$${p}_engine.c \
5248 @SIM_ENABLE_ARCH_mips_TRUE@         || exit; \
5249 @SIM_ENABLE_ARCH_mips_TRUE@     done
5250 @SIM_ENABLE_ARCH_mips_TRUE@     $(AM_V_at)touch $@
5251
5252 @SIM_ENABLE_ARCH_mips_TRUE@mips/stamp-gen-mode-multi-run: mips/m16run.c mips/micromipsrun.c
5253 @SIM_ENABLE_ARCH_mips_TRUE@     $(AM_V_GEN)\
5254 @SIM_ENABLE_ARCH_mips_TRUE@     for t in $(SIM_MIPS_MULTI_IGEN_CONFIGS); do \
5255 @SIM_ENABLE_ARCH_mips_TRUE@       case $${t} in \
5256 @SIM_ENABLE_ARCH_mips_TRUE@         m16*) \
5257 @SIM_ENABLE_ARCH_mips_TRUE@           m=`echo $${t} | sed -e 's/^m16//' -e 's/:.*//'`; \
5258 @SIM_ENABLE_ARCH_mips_TRUE@           o=mips/m16$${m}_run.c; \
5259 @SIM_ENABLE_ARCH_mips_TRUE@           sed < $(srcdir)/mips/m16run.c > $$o.tmp \
5260 @SIM_ENABLE_ARCH_mips_TRUE@                 -e "s/^sim_/m16$${m}_/" \
5261 @SIM_ENABLE_ARCH_mips_TRUE@                 -e "/include/s/sim-engine/m16$${m}_engine/" \
5262 @SIM_ENABLE_ARCH_mips_TRUE@                 -e "s/m16_/m16$${m}_/" \
5263 @SIM_ENABLE_ARCH_mips_TRUE@                 -e "s/m32_/m32$${m}_/" \
5264 @SIM_ENABLE_ARCH_mips_TRUE@                 || exit 1; \
5265 @SIM_ENABLE_ARCH_mips_TRUE@           $(SHELL) $(srcroot)/move-if-change $$o.tmp $$o; \
5266 @SIM_ENABLE_ARCH_mips_TRUE@           ;;\
5267 @SIM_ENABLE_ARCH_mips_TRUE@         micromips32*) \
5268 @SIM_ENABLE_ARCH_mips_TRUE@           m=`echo $${t} | sed -e 's/^micromips32//' -e 's/:.*//'`; \
5269 @SIM_ENABLE_ARCH_mips_TRUE@           o=mips/micromips$${m}_run.c; \
5270 @SIM_ENABLE_ARCH_mips_TRUE@           sed < $(srcdir)/mips/micromipsrun.c > $$o.tmp \
5271 @SIM_ENABLE_ARCH_mips_TRUE@                 -e "s/^sim_/micromips32$${m}_/" \
5272 @SIM_ENABLE_ARCH_mips_TRUE@                 -e "/include/s/sim-engine/micromips32$${m}_engine/" \
5273 @SIM_ENABLE_ARCH_mips_TRUE@                 -e "s/micromips16_/micromips16$${m}_/" \
5274 @SIM_ENABLE_ARCH_mips_TRUE@                 -e "s/micromips32_/micromips32$${m}_/" \
5275 @SIM_ENABLE_ARCH_mips_TRUE@                 -e "s/m32_/m32$${m}_/" \
5276 @SIM_ENABLE_ARCH_mips_TRUE@                 || exit 1; \
5277 @SIM_ENABLE_ARCH_mips_TRUE@           $(SHELL) $(srcroot)/move-if-change $$o.tmp $$o; \
5278 @SIM_ENABLE_ARCH_mips_TRUE@           ;;\
5279 @SIM_ENABLE_ARCH_mips_TRUE@         micromips64*) \
5280 @SIM_ENABLE_ARCH_mips_TRUE@           m=`echo $${t} | sed -e 's/^micromips64//' -e 's/:.*//'`; \
5281 @SIM_ENABLE_ARCH_mips_TRUE@           o=mips/micromips$${m}_run.c; \
5282 @SIM_ENABLE_ARCH_mips_TRUE@           sed < $(srcdir)/mips/micromipsrun.c > $$o.tmp \
5283 @SIM_ENABLE_ARCH_mips_TRUE@                 -e "s/^sim_/micromips64$${m}_/" \
5284 @SIM_ENABLE_ARCH_mips_TRUE@                 -e "/include/s/sim-engine/micromips64$${m}_engine/" \
5285 @SIM_ENABLE_ARCH_mips_TRUE@                 -e "s/micromips16_/micromips16$${m}_/" \
5286 @SIM_ENABLE_ARCH_mips_TRUE@                 -e "s/micromips32_/micromips64$${m}_/" \
5287 @SIM_ENABLE_ARCH_mips_TRUE@                 -e "s/m32_/m64$${m}_/" \
5288 @SIM_ENABLE_ARCH_mips_TRUE@                 || exit 1; \
5289 @SIM_ENABLE_ARCH_mips_TRUE@           $(SHELL) $(srcroot)/move-if-change $$o.tmp $$o; \
5290 @SIM_ENABLE_ARCH_mips_TRUE@           ;;\
5291 @SIM_ENABLE_ARCH_mips_TRUE@       esac \
5292 @SIM_ENABLE_ARCH_mips_TRUE@     done
5293 @SIM_ENABLE_ARCH_mips_TRUE@     $(AM_V_at)touch $@
5294 @SIM_ENABLE_ARCH_mn10300_TRUE@$(mn10300_libsim_a_OBJECTS) $(mn10300_libsim_a_LIBADD): mn10300/hw-config.h
5295
5296 @SIM_ENABLE_ARCH_mn10300_TRUE@mn10300/%.o: mn10300/%.c
5297 @SIM_ENABLE_ARCH_mn10300_TRUE@  $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
5298
5299 @SIM_ENABLE_ARCH_mn10300_TRUE@mn10300/%.o: common/%.c
5300 @SIM_ENABLE_ARCH_mn10300_TRUE@  $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
5301 @SIM_ENABLE_ARCH_mn10300_TRUE@mn10300/modules.c: | $(mn10300_BUILD_OUTPUTS)
5302
5303 @SIM_ENABLE_ARCH_mn10300_TRUE@$(mn10300_BUILT_SRC_FROM_IGEN): mn10300/stamp-igen
5304 @SIM_ENABLE_ARCH_mn10300_TRUE@mn10300/stamp-igen: $(mn10300_IGEN_INSN) $(mn10300_IGEN_INSN_INC) $(mn10300_IGEN_DC) $(IGEN)
5305 @SIM_ENABLE_ARCH_mn10300_TRUE@  $(AM_V_GEN)$(IGEN_RUN) \
5306 @SIM_ENABLE_ARCH_mn10300_TRUE@          $(mn10300_IGEN_TRACE) \
5307 @SIM_ENABLE_ARCH_mn10300_TRUE@          -G gen-direct-access \
5308 @SIM_ENABLE_ARCH_mn10300_TRUE@          -M mn10300,am33 -G gen-multi-sim=am33 \
5309 @SIM_ENABLE_ARCH_mn10300_TRUE@          -M am33_2 \
5310 @SIM_ENABLE_ARCH_mn10300_TRUE@          -I $(srcdir)/mn10300 \
5311 @SIM_ENABLE_ARCH_mn10300_TRUE@          -i $(mn10300_IGEN_INSN) \
5312 @SIM_ENABLE_ARCH_mn10300_TRUE@          -o $(mn10300_IGEN_DC) \
5313 @SIM_ENABLE_ARCH_mn10300_TRUE@          -x \
5314 @SIM_ENABLE_ARCH_mn10300_TRUE@          -n icache.h    -hc mn10300/icache.h \
5315 @SIM_ENABLE_ARCH_mn10300_TRUE@          -n icache.c    -c  mn10300/icache.c \
5316 @SIM_ENABLE_ARCH_mn10300_TRUE@          -n semantics.h -hs mn10300/semantics.h \
5317 @SIM_ENABLE_ARCH_mn10300_TRUE@          -n semantics.c -s  mn10300/semantics.c \
5318 @SIM_ENABLE_ARCH_mn10300_TRUE@          -n idecode.h   -hd mn10300/idecode.h \
5319 @SIM_ENABLE_ARCH_mn10300_TRUE@          -n idecode.c   -d  mn10300/idecode.c \
5320 @SIM_ENABLE_ARCH_mn10300_TRUE@          -n model.h     -hm mn10300/model.h \
5321 @SIM_ENABLE_ARCH_mn10300_TRUE@          -n model.c     -m  mn10300/model.c \
5322 @SIM_ENABLE_ARCH_mn10300_TRUE@          -n support.h   -hf mn10300/support.h \
5323 @SIM_ENABLE_ARCH_mn10300_TRUE@          -n support.c   -f  mn10300/support.c \
5324 @SIM_ENABLE_ARCH_mn10300_TRUE@          -n itable.h    -ht mn10300/itable.h \
5325 @SIM_ENABLE_ARCH_mn10300_TRUE@          -n itable.c    -t  mn10300/itable.c \
5326 @SIM_ENABLE_ARCH_mn10300_TRUE@          -n engine.h    -he mn10300/engine.h \
5327 @SIM_ENABLE_ARCH_mn10300_TRUE@          -n engine.c    -e  mn10300/engine.c \
5328 @SIM_ENABLE_ARCH_mn10300_TRUE@          -n irun.c      -r  mn10300/irun.c
5329 @SIM_ENABLE_ARCH_mn10300_TRUE@  $(AM_V_at)touch $@
5330 @SIM_ENABLE_ARCH_moxie_TRUE@$(moxie_libsim_a_OBJECTS) $(moxie_libsim_a_LIBADD): moxie/hw-config.h
5331
5332 @SIM_ENABLE_ARCH_moxie_TRUE@moxie/%.o: moxie/%.c
5333 @SIM_ENABLE_ARCH_moxie_TRUE@    $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
5334
5335 @SIM_ENABLE_ARCH_moxie_TRUE@moxie/%.o: common/%.c
5336 @SIM_ENABLE_ARCH_moxie_TRUE@    $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
5337
5338 @SIM_ENABLE_ARCH_moxie_TRUE@moxie/moxie-gdb.dtb: @MAINT@ moxie/moxie-gdb.dts moxie/$(am__dirstamp)
5339 @SIM_ENABLE_ARCH_moxie_TRUE@    $(AM_V_GEN) \
5340 @SIM_ENABLE_ARCH_moxie_TRUE@    if test "x$(DTC)" != x; then \
5341 @SIM_ENABLE_ARCH_moxie_TRUE@      $(DTC) -O dtb -o $@.tmp ${srcdir}/moxie/moxie-gdb.dts || exit 1; \
5342 @SIM_ENABLE_ARCH_moxie_TRUE@      $(SHELL) $(srcroot)/move-if-change $@.tmp ${srcdir}/moxie/moxie-gdb.dtb || exit 1; \
5343 @SIM_ENABLE_ARCH_moxie_TRUE@      touch ${srcdir}/moxie/moxie-gdb.dtb; \
5344 @SIM_ENABLE_ARCH_moxie_TRUE@    else \
5345 @SIM_ENABLE_ARCH_moxie_TRUE@      echo "Could not update the moxie-gdb.dtb file because the device "; \
5346 @SIM_ENABLE_ARCH_moxie_TRUE@      echo "tree compiler tool (dtc) is missing.  Install the tool to "; \
5347 @SIM_ENABLE_ARCH_moxie_TRUE@      echo "update the device tree blob."; \
5348 @SIM_ENABLE_ARCH_moxie_TRUE@    fi
5349 @SIM_ENABLE_ARCH_msp430_TRUE@$(msp430_libsim_a_OBJECTS) $(msp430_libsim_a_LIBADD): msp430/hw-config.h
5350
5351 @SIM_ENABLE_ARCH_msp430_TRUE@msp430/%.o: msp430/%.c
5352 @SIM_ENABLE_ARCH_msp430_TRUE@   $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
5353
5354 @SIM_ENABLE_ARCH_msp430_TRUE@msp430/%.o: common/%.c
5355 @SIM_ENABLE_ARCH_msp430_TRUE@   $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
5356 @SIM_ENABLE_ARCH_or1k_TRUE@$(or1k_libsim_a_OBJECTS) $(or1k_libsim_a_LIBADD): or1k/hw-config.h
5357
5358 @SIM_ENABLE_ARCH_or1k_TRUE@or1k/%.o: or1k/%.c
5359 @SIM_ENABLE_ARCH_or1k_TRUE@     $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
5360
5361 @SIM_ENABLE_ARCH_or1k_TRUE@or1k/%.o: common/%.c
5362 @SIM_ENABLE_ARCH_or1k_TRUE@     $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
5363 @SIM_ENABLE_ARCH_or1k_TRUE@or1k/modules.c: | $(or1k_BUILD_OUTPUTS)
5364
5365 @SIM_ENABLE_ARCH_or1k_TRUE@or1k/mloop.c or1k/eng.h: or1k/stamp-mloop ; @true
5366 @SIM_ENABLE_ARCH_or1k_TRUE@or1k/stamp-mloop: $(srccom)/genmloop.sh or1k/mloop.in
5367 @SIM_ENABLE_ARCH_or1k_TRUE@     $(AM_V_GEN)$(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \
5368 @SIM_ENABLE_ARCH_or1k_TRUE@             -mono -fast -pbb -switch sem-switch.c \
5369 @SIM_ENABLE_ARCH_or1k_TRUE@             -cpu or1k32bf \
5370 @SIM_ENABLE_ARCH_or1k_TRUE@             -infile $(srcdir)/or1k/mloop.in -outfile-prefix or1k/
5371 @SIM_ENABLE_ARCH_or1k_TRUE@     $(AM_V_at)$(SHELL) $(srcroot)/move-if-change or1k/eng.hin or1k/eng.h
5372 @SIM_ENABLE_ARCH_or1k_TRUE@     $(AM_V_at)$(SHELL) $(srcroot)/move-if-change or1k/mloop.cin or1k/mloop.c
5373 @SIM_ENABLE_ARCH_or1k_TRUE@     $(AM_V_at)touch $@
5374
5375 @SIM_ENABLE_ARCH_or1k_TRUE@or1k/cgen: or1k/cgen-arch or1k/cgen-cpu-decode
5376
5377 @SIM_ENABLE_ARCH_or1k_TRUE@or1k/cgen-arch:
5378 @SIM_ENABLE_ARCH_or1k_TRUE@     $(AM_V_GEN)mach=or32,or32nd FLAGS="with-scache"; $(CGEN_GEN_ARCH)
5379 @SIM_ENABLE_ARCH_or1k_TRUE@or1k/arch.h or1k/arch.c or1k/cpuall.h: @CGEN_MAINT@ or1k/cgen-arch
5380
5381 @SIM_ENABLE_ARCH_or1k_TRUE@or1k/cgen-cpu-decode:
5382 @SIM_ENABLE_ARCH_or1k_TRUE@     $(AM_V_GEN)cpu=or1k32bf mach=or32,or32nd FLAGS="with-scache" EXTRAFILES="$(CGEN_CPU_SEM) $(CGEN_CPU_SEMSW)"; $(CGEN_GEN_CPU_DECODE)
5383 @SIM_ENABLE_ARCH_or1k_TRUE@or1k/cpu.h or1k/cpu.c or1k/model.c or1k/sem.c or1k/sem-switch.c or1k/decode.c or1k/decode.h: @CGEN_MAINT@ or1k/cgen-cpu-decode
5384
5385 @SIM_ENABLE_ARCH_ppc_TRUE@ppc/psim$(EXEEXT): ppc/run$(EXEEXT)
5386 @SIM_ENABLE_ARCH_ppc_TRUE@      $(AM_V_GEN)ln $< $@ 2>/dev/null || $(LN_S) $< $@ 2>/dev/null || cp -p $< $@
5387
5388 @SIM_ENABLE_ARCH_ppc_TRUE@ppc/%.o: ppc/%.c | ppc/libsim.a $(SIM_ALL_RECURSIVE_DEPS)
5389 @SIM_ENABLE_ARCH_ppc_TRUE@      $(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
5390
5391 @SIM_ENABLE_ARCH_ppc_TRUE@ppc/spreg.c: @MAINT@ ppc/ppc-spr-table ppc/spreg-gen.py ppc/$(am__dirstamp)
5392 @SIM_ENABLE_ARCH_ppc_TRUE@      $(AM_V_GEN)$(srcdir)/ppc/spreg-gen.py --source $@.tmp
5393 @SIM_ENABLE_ARCH_ppc_TRUE@      $(AM_V_at)$(SHELL) $(srcroot)/move-if-change $@.tmp $(srcdir)/ppc/spreg.c
5394 @SIM_ENABLE_ARCH_ppc_TRUE@      $(AM_V_at)touch $(srcdir)/ppc/spreg.c
5395
5396 @SIM_ENABLE_ARCH_ppc_TRUE@ppc/spreg.h: @MAINT@ ppc/ppc-spr-table ppc/spreg-gen.py ppc/$(am__dirstamp)
5397 @SIM_ENABLE_ARCH_ppc_TRUE@      $(AM_V_GEN)$(srcdir)/ppc/spreg-gen.py --header $@.tmp
5398 @SIM_ENABLE_ARCH_ppc_TRUE@      $(AM_V_at)$(SHELL) $(srcroot)/move-if-change $@.tmp $(srcdir)/ppc/spreg.h
5399 @SIM_ENABLE_ARCH_ppc_TRUE@      $(AM_V_at)touch $(srcdir)/ppc/spreg.h
5400 @SIM_ENABLE_ARCH_pru_TRUE@$(pru_libsim_a_OBJECTS) $(pru_libsim_a_LIBADD): pru/hw-config.h
5401
5402 @SIM_ENABLE_ARCH_pru_TRUE@pru/%.o: pru/%.c
5403 @SIM_ENABLE_ARCH_pru_TRUE@      $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
5404
5405 @SIM_ENABLE_ARCH_pru_TRUE@pru/%.o: common/%.c
5406 @SIM_ENABLE_ARCH_pru_TRUE@      $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
5407 @SIM_ENABLE_ARCH_riscv_TRUE@$(riscv_libsim_a_OBJECTS) $(riscv_libsim_a_LIBADD): riscv/hw-config.h
5408
5409 @SIM_ENABLE_ARCH_riscv_TRUE@riscv/%.o: riscv/%.c
5410 @SIM_ENABLE_ARCH_riscv_TRUE@    $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
5411
5412 @SIM_ENABLE_ARCH_riscv_TRUE@riscv/%.o: common/%.c
5413 @SIM_ENABLE_ARCH_riscv_TRUE@    $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
5414 @SIM_ENABLE_ARCH_rl78_TRUE@$(rl78_libsim_a_OBJECTS) $(rl78_libsim_a_LIBADD): rl78/hw-config.h
5415
5416 @SIM_ENABLE_ARCH_rl78_TRUE@rl78/%.o: rl78/%.c
5417 @SIM_ENABLE_ARCH_rl78_TRUE@     $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
5418
5419 @SIM_ENABLE_ARCH_rl78_TRUE@rl78/%.o: common/%.c
5420 @SIM_ENABLE_ARCH_rl78_TRUE@     $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
5421 @SIM_ENABLE_ARCH_rx_TRUE@$(rx_libsim_a_OBJECTS) $(rx_libsim_a_LIBADD): rx/hw-config.h
5422
5423 @SIM_ENABLE_ARCH_rx_TRUE@rx/%.o: rx/%.c
5424 @SIM_ENABLE_ARCH_rx_TRUE@       $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
5425
5426 @SIM_ENABLE_ARCH_rx_TRUE@rx/%.o: common/%.c
5427 @SIM_ENABLE_ARCH_rx_TRUE@       $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
5428 @SIM_ENABLE_ARCH_sh_TRUE@$(sh_libsim_a_OBJECTS) $(sh_libsim_a_LIBADD): sh/hw-config.h
5429
5430 @SIM_ENABLE_ARCH_sh_TRUE@sh/%.o: sh/%.c
5431 @SIM_ENABLE_ARCH_sh_TRUE@       $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
5432
5433 @SIM_ENABLE_ARCH_sh_TRUE@sh/%.o: common/%.c
5434 @SIM_ENABLE_ARCH_sh_TRUE@       $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
5435 @SIM_ENABLE_ARCH_sh_TRUE@sh/modules.c: | $(sh_BUILD_OUTPUTS)
5436
5437 # These rules are copied from automake, but tweaked to use FOR_BUILD variables.
5438 @SIM_ENABLE_ARCH_sh_TRUE@sh/gencode$(EXEEXT): $(sh_gencode_OBJECTS) $(sh_gencode_DEPENDENCIES) sh/$(am__dirstamp)
5439 @SIM_ENABLE_ARCH_sh_TRUE@       $(AM_V_CCLD)$(LINK_FOR_BUILD) $(sh_gencode_OBJECTS) $(sh_gencode_LDADD)
5440
5441 # gencode is a build-time only tool.  Override the default rules for it.
5442 @SIM_ENABLE_ARCH_sh_TRUE@sh/gencode.o: sh/gencode.c
5443 @SIM_ENABLE_ARCH_sh_TRUE@       $(AM_V_CC)$(COMPILE_FOR_BUILD) -c $< -o $@
5444
5445 @SIM_ENABLE_ARCH_sh_TRUE@sh/code.c: sh/gencode$(EXEEXT)
5446 @SIM_ENABLE_ARCH_sh_TRUE@       $(AM_V_GEN)$< -x >$@
5447
5448 @SIM_ENABLE_ARCH_sh_TRUE@sh/ppi.c: sh/gencode$(EXEEXT)
5449 @SIM_ENABLE_ARCH_sh_TRUE@       $(AM_V_GEN)$< -p >$@
5450
5451 @SIM_ENABLE_ARCH_sh_TRUE@sh/table.c: sh/gencode$(EXEEXT)
5452 @SIM_ENABLE_ARCH_sh_TRUE@       $(AM_V_GEN)$< -s >$@
5453 @SIM_ENABLE_ARCH_v850_TRUE@$(v850_libsim_a_OBJECTS) $(v850_libsim_a_LIBADD): v850/hw-config.h
5454
5455 @SIM_ENABLE_ARCH_v850_TRUE@v850/%.o: v850/%.c
5456 @SIM_ENABLE_ARCH_v850_TRUE@     $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
5457
5458 @SIM_ENABLE_ARCH_v850_TRUE@v850/%.o: common/%.c
5459 @SIM_ENABLE_ARCH_v850_TRUE@     $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
5460 @SIM_ENABLE_ARCH_v850_TRUE@v850/modules.c: | $(v850_BUILD_OUTPUTS)
5461
5462 @SIM_ENABLE_ARCH_v850_TRUE@$(v850_BUILT_SRC_FROM_IGEN): v850/stamp-igen
5463 @SIM_ENABLE_ARCH_v850_TRUE@v850/stamp-igen: $(v850_IGEN_INSN) $(v850_IGEN_DC) $(IGEN)
5464 @SIM_ENABLE_ARCH_v850_TRUE@     $(AM_V_GEN)$(IGEN_RUN) \
5465 @SIM_ENABLE_ARCH_v850_TRUE@             $(v850_IGEN_TRACE) \
5466 @SIM_ENABLE_ARCH_v850_TRUE@             -G gen-direct-access \
5467 @SIM_ENABLE_ARCH_v850_TRUE@             -G gen-zero-r0 \
5468 @SIM_ENABLE_ARCH_v850_TRUE@             -i $(v850_IGEN_INSN) \
5469 @SIM_ENABLE_ARCH_v850_TRUE@             -o $(v850_IGEN_DC) \
5470 @SIM_ENABLE_ARCH_v850_TRUE@             -x \
5471 @SIM_ENABLE_ARCH_v850_TRUE@             -n icache.h    -hc v850/icache.h \
5472 @SIM_ENABLE_ARCH_v850_TRUE@             -n icache.c    -c  v850/icache.c \
5473 @SIM_ENABLE_ARCH_v850_TRUE@             -n semantics.h -hs v850/semantics.h \
5474 @SIM_ENABLE_ARCH_v850_TRUE@             -n semantics.c -s  v850/semantics.c \
5475 @SIM_ENABLE_ARCH_v850_TRUE@             -n idecode.h   -hd v850/idecode.h \
5476 @SIM_ENABLE_ARCH_v850_TRUE@             -n idecode.c   -d  v850/idecode.c \
5477 @SIM_ENABLE_ARCH_v850_TRUE@             -n model.h     -hm v850/model.h \
5478 @SIM_ENABLE_ARCH_v850_TRUE@             -n model.c     -m  v850/model.c \
5479 @SIM_ENABLE_ARCH_v850_TRUE@             -n support.h   -hf v850/support.h \
5480 @SIM_ENABLE_ARCH_v850_TRUE@             -n support.c   -f  v850/support.c \
5481 @SIM_ENABLE_ARCH_v850_TRUE@             -n itable.h    -ht v850/itable.h \
5482 @SIM_ENABLE_ARCH_v850_TRUE@             -n itable.c    -t  v850/itable.c \
5483 @SIM_ENABLE_ARCH_v850_TRUE@             -n engine.h    -he v850/engine.h \
5484 @SIM_ENABLE_ARCH_v850_TRUE@             -n engine.c    -e  v850/engine.c \
5485 @SIM_ENABLE_ARCH_v850_TRUE@             -n irun.c      -r  v850/irun.c
5486 @SIM_ENABLE_ARCH_v850_TRUE@     $(AM_V_at)touch $@
5487
5488 %/libsim.a: | $(SIM_ALL_RECURSIVE_DEPS)
5489         $(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
5490
5491 %/nrun.o: common/nrun.c | %/libsim.a $(SIM_ALL_RECURSIVE_DEPS)
5492         $(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
5493
5494 all-recursive: $(SIM_ALL_RECURSIVE_DEPS)
5495
5496 install-data-local: installdirs $(SIM_INSTALL_DATA_LOCAL_DEPS)
5497         $(AM_V_at)$(MKDIR_P) $(DESTDIR)$(libdir)
5498         lib=`echo sim | sed '$(program_transform_name)'`; \
5499         for d in $(SIM_ENABLED_ARCHES); do \
5500                 n="$$lib"; \
5501                 [ "$(SIM_PRIMARY_TARGET)" = "$$d" ] || n="$$n-$$d"; \
5502                 n="lib$$n.a"; \
5503                 $(INSTALL_DATA) $$d/libsim.a $(DESTDIR)$(libdir)/$$n || exit 1; \
5504         done
5505
5506 install-exec-local: installdirs $(SIM_INSTALL_EXEC_LOCAL_DEPS)
5507         $(AM_V_at)$(MKDIR_P) $(DESTDIR)$(bindir)
5508         run=`echo run | sed '$(program_transform_name)'`; \
5509         for d in $(SIM_ENABLED_ARCHES); do \
5510                 n="$$run"; \
5511                 [ "$(SIM_PRIMARY_TARGET)" = "$$d" ] || n="$$n-$$d"; \
5512                 $(LIBTOOL) --mode=install \
5513                         $(INSTALL_PROGRAM) $$d/run$(EXEEXT) $(DESTDIR)$(bindir)/$$n$(EXEEXT) || exit 1; \
5514         done
5515
5516 uninstall-local: $(SIM_UNINSTALL_LOCAL_DEPS)
5517         rm -f $(DESTDIR)$(bindir)/run $(DESTDIR)$(libdir)/libsim.a
5518         for d in $(SIM_ENABLED_ARCHES); do \
5519                 rm -f $(DESTDIR)$(bindir)/run-$$d $(DESTDIR)$(libdir)/libsim-$$d.a; \
5520         done
5521
5522 # Tell versions [3.59,3.63) of GNU make to not export all variables.
5523 # Otherwise a system limit (for SysV at least) may be exceeded.
5524 .NOEXPORT: