sim/Makefile.in

   1 # Makefile.in generated by automake 1.15.1 from Makefile.am.
   2 # @configure_input@
   3
   4 # Copyright (C) 1994-2017 Free Software Foundation, Inc.
   5
   6 # This Makefile.in is free software; the Free Software Foundation
   7 # gives unlimited permission to copy and/or distribute it,
   8 # with or without modifications, as long as this notice is preserved.
   9
  10 # This program is distributed in the hope that it will be useful,
  11 # but WITHOUT ANY WARRANTY, to the extent permitted by law; without
  12 # even the implied warranty of MERCHANTABILITY or FITNESS FOR A
  13 # PARTICULAR PURPOSE.
  14
  15 @SET_MAKE@
  16
  17 #   Copyright (C) 1993-2023 Free Software Foundation, Inc.
  18 #
  19 # This program is free software; you can redistribute it and/or modify
  20 # it under the terms of the GNU General Public License as published by
  21 # the Free Software Foundation; either version 3 of the License, or
  22 # (at your option) any later version.
  23 #
  24 # This program is distributed in the hope that it will be useful,
  25 # but WITHOUT ANY WARRANTY; without even the implied warranty of
  26 # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  27 # GNU General Public License for more details.
  28 #
  29 # You should have received a copy of the GNU General Public License
  30 # along with this program.  If not, see <http://www.gnu.org/licenses/>.
  31
  32
  33
  34
  35 VPATH = @srcdir@
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  89 am__make_dryrun = (target_option=n; $(am__make_running_with_option))
  90 am__make_keepgoing = (target_option=k; $(am__make_running_with_option))
  91 pkgdatadir = $(datadir)/@PACKAGE@
  92 pkgincludedir = $(includedir)/@PACKAGE@
  93 pkglibdir = $(libdir)/@PACKAGE@
  94 pkglibexecdir = $(libexecdir)/@PACKAGE@
  95 am__cd = CDPATH="$${ZSH_VERSION+.}$(PATH_SEPARATOR)" && cd
  96 install_sh_DATA = $(install_sh) -c -m 644
  97 install_sh_PROGRAM = $(install_sh) -c
  98 install_sh_SCRIPT = $(install_sh) -c
  99 INSTALL_HEADER = $(INSTALL_DATA)
 100 transform = $(program_transform_name)
 101 NORMAL_INSTALL = :
 102 PRE_INSTALL = :
 103 POST_INSTALL = :
 104 NORMAL_UNINSTALL = :
 105 PRE_UNINSTALL = :
 106 POST_UNINSTALL = :
 107 build_triplet = @build@
 108 host_triplet = @host@
 109 target_triplet = @target@
 110 check_PROGRAMS = $(am__EXEEXT_7) $(am__EXEEXT_8)
 111 noinst_PROGRAMS = $(am__EXEEXT_9) $(am__EXEEXT_10) $(am__EXEEXT_11) \
 112         $(am__EXEEXT_12) $(am__EXEEXT_13) $(am__EXEEXT_14) \
 113         $(am__EXEEXT_15) $(am__EXEEXT_16) $(am__EXEEXT_17) \
 114         $(am__EXEEXT_18) $(am__EXEEXT_19) $(am__EXEEXT_20) \
 115         $(am__EXEEXT_21) $(am__EXEEXT_22) $(am__EXEEXT_23) \
 116         $(am__EXEEXT_24) $(am__EXEEXT_25) $(am__EXEEXT_26) \
 117         $(am__EXEEXT_27) $(am__EXEEXT_28) $(am__EXEEXT_29) \
 118         $(am__EXEEXT_30) $(am__EXEEXT_31) $(am__EXEEXT_32) \
 119         $(am__EXEEXT_33) $(am__EXEEXT_34) $(am__EXEEXT_35) \
 120         $(am__EXEEXT_36) $(am__EXEEXT_37) $(am__EXEEXT_38) \
 121         $(am__EXEEXT_39) $(am__EXEEXT_40)
 122 EXTRA_PROGRAMS = $(am__EXEEXT_1) testsuite/common/bits-gen$(EXEEXT) \
 123         testsuite/common/fpu-tst$(EXEEXT) $(am__EXEEXT_2) \
 124         $(am__EXEEXT_3) $(am__EXEEXT_4) $(am__EXEEXT_5) \
 125         $(am__EXEEXT_6)
 126 @ENABLE_SIM_TRUE@am__append_1 = \
 127 @ENABLE_SIM_TRUE@       $(srcroot)/include/sim/callback.h \
 128 @ENABLE_SIM_TRUE@       $(srcroot)/include/sim/sim.h
 129
 130 @SIM_ENABLE_HW_TRUE@am__append_2 = \
 131 @SIM_ENABLE_HW_TRUE@    $(SIM_COMMON_HW_OBJS) \
 132 @SIM_ENABLE_HW_TRUE@    $(SIM_HW_SOCKSER)
 133
 134 TESTS = testsuite/common/bits32m0$(EXEEXT) \
 135         testsuite/common/bits32m31$(EXEEXT) \
 136         testsuite/common/bits64m0$(EXEEXT) \
 137         testsuite/common/bits64m63$(EXEEXT) \
 138         testsuite/common/alu-tst$(EXEEXT)
 139 @SIM_ENABLE_ARCH_aarch64_TRUE@am__append_3 = aarch64/libsim.a
 140 @SIM_ENABLE_ARCH_aarch64_TRUE@am__append_4 = aarch64/run
 141 @SIM_ENABLE_ARCH_arm_TRUE@am__append_5 = arm/libsim.a
 142 @SIM_ENABLE_ARCH_arm_TRUE@am__append_6 = arm/run
 143 @SIM_ENABLE_ARCH_avr_TRUE@am__append_7 = avr/libsim.a
 144 @SIM_ENABLE_ARCH_avr_TRUE@am__append_8 = avr/run
 145 @SIM_ENABLE_ARCH_bfin_TRUE@am__append_9 = bfin/libsim.a
 146 @SIM_ENABLE_ARCH_bfin_TRUE@am__append_10 = bfin/run
 147 @SIM_ENABLE_ARCH_bpf_TRUE@am__append_11 = bpf/libsim.a
 148 @SIM_ENABLE_ARCH_bpf_TRUE@am__append_12 = bpf/run
 149 @SIM_ENABLE_ARCH_bpf_TRUE@am__append_13 = \
 150 @SIM_ENABLE_ARCH_bpf_TRUE@      bpf/eng-le.h \
 151 @SIM_ENABLE_ARCH_bpf_TRUE@      bpf/eng-be.h
 152
 153 @SIM_ENABLE_ARCH_bpf_TRUE@am__append_14 = $(bpf_BUILD_OUTPUTS)
 154 @SIM_ENABLE_ARCH_cr16_TRUE@am__append_15 = cr16/libsim.a
 155 @SIM_ENABLE_ARCH_cr16_TRUE@am__append_16 = cr16/run
 156 @SIM_ENABLE_ARCH_cr16_TRUE@am__append_17 = cr16/simops.h
 157 @SIM_ENABLE_ARCH_cr16_TRUE@am__append_18 = cr16/gencode
 158 @SIM_ENABLE_ARCH_cr16_TRUE@am__append_19 = $(cr16_BUILD_OUTPUTS)
 159 @SIM_ENABLE_ARCH_cris_TRUE@am__append_20 = cris/libsim.a
 160 @SIM_ENABLE_ARCH_cris_TRUE@am__append_21 = cris/run
 161 @SIM_ENABLE_ARCH_cris_TRUE@am__append_22 = cris/rvdummy
 162 @SIM_ENABLE_ARCH_cris_TRUE@am__append_23 = \
 163 @SIM_ENABLE_ARCH_cris_TRUE@     cris/engv10.h \
 164 @SIM_ENABLE_ARCH_cris_TRUE@     cris/engv32.h
 165
 166 @SIM_ENABLE_ARCH_cris_TRUE@am__append_24 = $(cris_BUILD_OUTPUTS)
 167 @SIM_ENABLE_ARCH_d10v_TRUE@am__append_25 = d10v/libsim.a
 168 @SIM_ENABLE_ARCH_d10v_TRUE@am__append_26 = d10v/run
 169 @SIM_ENABLE_ARCH_d10v_TRUE@am__append_27 = d10v/simops.h
 170 @SIM_ENABLE_ARCH_d10v_TRUE@am__append_28 = d10v/gencode
 171 @SIM_ENABLE_ARCH_d10v_TRUE@am__append_29 = $(d10v_BUILD_OUTPUTS)
 172 @SIM_ENABLE_ARCH_erc32_TRUE@am__append_30 = erc32/libsim.a
 173 @SIM_ENABLE_ARCH_erc32_TRUE@am__append_31 = erc32/run erc32/sis
 174 @SIM_ENABLE_ARCH_erc32_TRUE@am__append_32 = sim-%D-install-exec-local
 175 @SIM_ENABLE_ARCH_erc32_TRUE@am__append_33 = sim-erc32-uninstall-local
 176 @SIM_ENABLE_ARCH_examples_TRUE@am__append_34 = example-synacor/libsim.a
 177 @SIM_ENABLE_ARCH_examples_TRUE@am__append_35 = example-synacor/run
 178 @SIM_ENABLE_ARCH_frv_TRUE@am__append_36 = frv/libsim.a
 179 @SIM_ENABLE_ARCH_frv_TRUE@am__append_37 = frv/run
 180 @SIM_ENABLE_ARCH_frv_TRUE@am__append_38 = frv/eng.h
 181 @SIM_ENABLE_ARCH_frv_TRUE@am__append_39 = $(frv_BUILD_OUTPUTS)
 182 @SIM_ENABLE_ARCH_ft32_TRUE@am__append_40 = ft32/libsim.a
 183 @SIM_ENABLE_ARCH_ft32_TRUE@am__append_41 = ft32/run
 184 @SIM_ENABLE_ARCH_h8300_TRUE@am__append_42 = h8300/libsim.a
 185 @SIM_ENABLE_ARCH_h8300_TRUE@am__append_43 = h8300/run
 186 @SIM_ENABLE_ARCH_iq2000_TRUE@am__append_44 = iq2000/libsim.a
 187 @SIM_ENABLE_ARCH_iq2000_TRUE@am__append_45 = iq2000/run
 188 @SIM_ENABLE_ARCH_iq2000_TRUE@am__append_46 = iq2000/eng.h
 189 @SIM_ENABLE_ARCH_iq2000_TRUE@am__append_47 = $(iq2000_BUILD_OUTPUTS)
 190 @SIM_ENABLE_ARCH_lm32_TRUE@am__append_48 = lm32/libsim.a
 191 @SIM_ENABLE_ARCH_lm32_TRUE@am__append_49 = lm32/run
 192 @SIM_ENABLE_ARCH_lm32_TRUE@am__append_50 = lm32/eng.h
 193 @SIM_ENABLE_ARCH_lm32_TRUE@am__append_51 = $(lm32_BUILD_OUTPUTS)
 194 @SIM_ENABLE_ARCH_m32c_TRUE@am__append_52 = m32c/libsim.a
 195 @SIM_ENABLE_ARCH_m32c_TRUE@am__append_53 = m32c/run
 196 @SIM_ENABLE_ARCH_m32c_TRUE@am__append_54 = m32c/opc2c
 197 @SIM_ENABLE_ARCH_m32c_TRUE@am__append_55 = \
 198 @SIM_ENABLE_ARCH_m32c_TRUE@     $(m32c_BUILD_OUTPUTS) \
 199 @SIM_ENABLE_ARCH_m32c_TRUE@     m32c/m32c.c.log \
 200 @SIM_ENABLE_ARCH_m32c_TRUE@     m32c/r8c.c.log
 201
 202 @SIM_ENABLE_ARCH_m32r_TRUE@am__append_56 = m32r/libsim.a
 203 @SIM_ENABLE_ARCH_m32r_TRUE@am__append_57 = m32r/run
 204 @SIM_ENABLE_ARCH_m32r_TRUE@am__append_58 = \
 205 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/eng.h \
 206 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/engx.h \
 207 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/eng2.h
 208
 209 @SIM_ENABLE_ARCH_m32r_TRUE@am__append_59 = $(m32r_BUILD_OUTPUTS)
 210 @SIM_ENABLE_ARCH_m68hc11_TRUE@am__append_60 = m68hc11/libsim.a
 211 @SIM_ENABLE_ARCH_m68hc11_TRUE@am__append_61 = m68hc11/run
 212 @SIM_ENABLE_ARCH_m68hc11_TRUE@am__append_62 = m68hc11/gencode
 213 @SIM_ENABLE_ARCH_m68hc11_TRUE@am__append_63 = $(m68hc11_BUILD_OUTPUTS)
 214 @SIM_ENABLE_ARCH_mcore_TRUE@am__append_64 = mcore/libsim.a
 215 @SIM_ENABLE_ARCH_mcore_TRUE@am__append_65 = mcore/run
 216 @SIM_ENABLE_ARCH_microblaze_TRUE@am__append_66 = microblaze/libsim.a
 217 @SIM_ENABLE_ARCH_microblaze_TRUE@am__append_67 = microblaze/run
 218 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_SINGLE_TRUE@am__append_68 = \
 219 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_SINGLE_TRUE@      mips/support.o \
 220 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_SINGLE_TRUE@      mips/itable.o \
 221 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_SINGLE_TRUE@      mips/semantics.o \
 222 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_SINGLE_TRUE@      mips/idecode.o \
 223 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_SINGLE_TRUE@      mips/icache.o \
 224 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_SINGLE_TRUE@      mips/engine.o \
 225 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_SINGLE_TRUE@      mips/irun.o
 226
 227 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@am__append_69 = \
 228 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@ mips/m16_support.o \
 229 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@ mips/m16_semantics.o \
 230 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@ mips/m16_idecode.o \
 231 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@ mips/m16_icache.o \
 232 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@ \
 233 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@ mips/m32_support.o \
 234 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@ mips/m32_semantics.o \
 235 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@ mips/m32_idecode.o \
 236 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@ mips/m32_icache.o \
 237 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@ \
 238 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@ mips/itable.o \
 239 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@ mips/m16run.o
 240
 241 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_MULTI_TRUE@am__append_70 = \
 242 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_MULTI_TRUE@       $(SIM_MIPS_MULTI_OBJ) \
 243 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_MULTI_TRUE@       mips/itable.o \
 244 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_MULTI_TRUE@       mips/multi-run.o
 245
 246 @SIM_ENABLE_ARCH_mips_TRUE@am__append_71 = mips/libsim.a
 247 @SIM_ENABLE_ARCH_mips_TRUE@am__append_72 = mips/run
 248 @SIM_ENABLE_ARCH_mips_TRUE@am__append_73 = mips/itable.h \
 249 @SIM_ENABLE_ARCH_mips_TRUE@     $(SIM_MIPS_MULTI_SRC)
 250 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_SINGLE_TRUE@am__append_74 = \
 251 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_SINGLE_TRUE@      $(mips_BUILT_SRC_FROM_GEN_MODE_SINGLE) \
 252 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_SINGLE_TRUE@      mips/stamp-gen-mode-single
 253
 254 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@am__append_75 = \
 255 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@ $(mips_BUILT_SRC_FROM_GEN_MODE_M16_M16) \
 256 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@ $(mips_BUILT_SRC_FROM_GEN_MODE_M16_M32) \
 257 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@ mips/stamp-gen-mode-m16-m16 \
 258 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@ mips/stamp-gen-mode-m16-m32
 259
 260 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_MULTI_TRUE@am__append_76 = \
 261 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_MULTI_TRUE@       $(SIM_MIPS_MULTI_SRC) \
 262 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_MULTI_TRUE@       mips/stamp-gen-mode-multi-igen \
 263 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_MULTI_TRUE@       mips/stamp-gen-mode-multi-run
 264
 265 @SIM_ENABLE_ARCH_mips_TRUE@am__append_77 = $(mips_BUILD_OUTPUTS)
 266 @SIM_ENABLE_ARCH_mips_TRUE@am__append_78 = mips/multi-include.h mips/multi-run.c
 267 @SIM_ENABLE_ARCH_mn10300_TRUE@am__append_79 = mn10300/libsim.a
 268 @SIM_ENABLE_ARCH_mn10300_TRUE@am__append_80 = mn10300/run
 269 @SIM_ENABLE_ARCH_mn10300_TRUE@am__append_81 = \
 270 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/icache.h \
 271 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/idecode.h \
 272 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/semantics.h \
 273 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/model.h \
 274 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/support.h \
 275 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/itable.h \
 276 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/engine.h
 277
 278 @SIM_ENABLE_ARCH_mn10300_TRUE@am__append_82 = $(mn10300_BUILD_OUTPUTS)
 279 @SIM_ENABLE_ARCH_moxie_TRUE@am__append_83 = moxie/libsim.a
 280 @SIM_ENABLE_ARCH_moxie_TRUE@am__append_84 = moxie/run
 281 @SIM_ENABLE_ARCH_msp430_TRUE@am__append_85 = msp430/libsim.a
 282 @SIM_ENABLE_ARCH_msp430_TRUE@am__append_86 = msp430/run
 283 @SIM_ENABLE_ARCH_or1k_TRUE@am__append_87 = or1k/libsim.a
 284 @SIM_ENABLE_ARCH_or1k_TRUE@am__append_88 = or1k/run
 285 @SIM_ENABLE_ARCH_or1k_TRUE@am__append_89 = or1k/eng.h
 286 @SIM_ENABLE_ARCH_or1k_TRUE@am__append_90 = $(or1k_BUILD_OUTPUTS)
 287 @SIM_ENABLE_ARCH_ppc_TRUE@am__append_91 = common/libcommon.a
 288 @SIM_ENABLE_ARCH_ppc_TRUE@am__append_92 = ppc/run
 289 @SIM_ENABLE_ARCH_pru_TRUE@am__append_93 = pru/libsim.a
 290 @SIM_ENABLE_ARCH_pru_TRUE@am__append_94 = pru/run
 291 @SIM_ENABLE_ARCH_riscv_TRUE@am__append_95 = riscv/libsim.a
 292 @SIM_ENABLE_ARCH_riscv_TRUE@am__append_96 = riscv/run
 293 @SIM_ENABLE_ARCH_rl78_TRUE@am__append_97 = rl78/libsim.a
 294 @SIM_ENABLE_ARCH_rl78_TRUE@am__append_98 = rl78/run
 295 @SIM_ENABLE_ARCH_rx_TRUE@am__append_99 = rx/libsim.a
 296 @SIM_ENABLE_ARCH_rx_TRUE@am__append_100 = rx/run
 297 @SIM_ENABLE_ARCH_sh_TRUE@am__append_101 = sh/libsim.a
 298 @SIM_ENABLE_ARCH_sh_TRUE@am__append_102 = sh/run
 299 @SIM_ENABLE_ARCH_sh_TRUE@am__append_103 = \
 300 @SIM_ENABLE_ARCH_sh_TRUE@       sh/code.c \
 301 @SIM_ENABLE_ARCH_sh_TRUE@       sh/ppi.c
 302
 303 @SIM_ENABLE_ARCH_sh_TRUE@am__append_104 = sh/gencode
 304 @SIM_ENABLE_ARCH_sh_TRUE@am__append_105 = $(sh_BUILD_OUTPUTS)
 305 @SIM_ENABLE_ARCH_v850_TRUE@am__append_106 = v850/libsim.a
 306 @SIM_ENABLE_ARCH_v850_TRUE@am__append_107 = v850/run
 307 @SIM_ENABLE_ARCH_v850_TRUE@am__append_108 = \
 308 @SIM_ENABLE_ARCH_v850_TRUE@     v850/icache.h \
 309 @SIM_ENABLE_ARCH_v850_TRUE@     v850/idecode.h \
 310 @SIM_ENABLE_ARCH_v850_TRUE@     v850/semantics.h \
 311 @SIM_ENABLE_ARCH_v850_TRUE@     v850/model.h \
 312 @SIM_ENABLE_ARCH_v850_TRUE@     v850/support.h \
 313 @SIM_ENABLE_ARCH_v850_TRUE@     v850/itable.h \
 314 @SIM_ENABLE_ARCH_v850_TRUE@     v850/engine.h
 315
 316 @SIM_ENABLE_ARCH_v850_TRUE@am__append_109 = $(v850_BUILD_OUTPUTS)
 317 subdir = .
 318 ACLOCAL_M4 = $(top_srcdir)/aclocal.m4
 319 am__aclocal_m4_deps = $(top_srcdir)/../config/acx.m4 \
 320         $(top_srcdir)/../config/depstand.m4 \
 321         $(top_srcdir)/../config/lead-dot.m4 \
 322         $(top_srcdir)/../config/override.m4 \
 323         $(top_srcdir)/../config/pkg.m4 $(top_srcdir)/../libtool.m4 \
 324         $(top_srcdir)/../ltoptions.m4 $(top_srcdir)/../ltsugar.m4 \
 325         $(top_srcdir)/../ltversion.m4 $(top_srcdir)/../lt~obsolete.m4 \
 326         $(top_srcdir)/m4/sim_ac_option_alignment.m4 \
 327         $(top_srcdir)/m4/sim_ac_option_assert.m4 \
 328         $(top_srcdir)/m4/sim_ac_option_cgen_maint.m4 \
 329         $(top_srcdir)/m4/sim_ac_option_debug.m4 \
 330         $(top_srcdir)/m4/sim_ac_option_endian.m4 \
 331         $(top_srcdir)/m4/sim_ac_option_environment.m4 \
 332         $(top_srcdir)/m4/sim_ac_option_hardware.m4 \
 333         $(top_srcdir)/m4/sim_ac_option_inline.m4 \
 334         $(top_srcdir)/m4/sim_ac_option_profile.m4 \
 335         $(top_srcdir)/m4/sim_ac_option_reserved_bits.m4 \
 336         $(top_srcdir)/m4/sim_ac_option_scache.m4 \
 337         $(top_srcdir)/m4/sim_ac_option_smp.m4 \
 338         $(top_srcdir)/m4/sim_ac_option_stdio.m4 \
 339         $(top_srcdir)/m4/sim_ac_option_trace.m4 \
 340         $(top_srcdir)/m4/sim_ac_option_warnings.m4 \
 341         $(top_srcdir)/m4/sim_ac_platform.m4 \
 342         $(top_srcdir)/m4/sim_ac_toolchain.m4 \
 343         $(top_srcdir)/frv/acinclude.m4 $(top_srcdir)/mips/acinclude.m4 \
 344         $(top_srcdir)/riscv/acinclude.m4 $(top_srcdir)/rx/acinclude.m4 \
 345         $(top_srcdir)/configure.ac
 346 am__configure_deps = $(am__aclocal_m4_deps) $(CONFIGURE_DEPENDENCIES) \
 347         $(ACLOCAL_M4)
 348 DIST_COMMON = $(srcdir)/Makefile.am $(top_srcdir)/configure \
 349         $(am__configure_deps) $(am__pkginclude_HEADERS_DIST)
 350 am__CONFIG_DISTCLEAN_FILES = config.status config.cache config.log \
 351  configure.lineno config.status.lineno
 352 mkinstalldirs = $(SHELL) $(top_srcdir)/../mkinstalldirs
 353 CONFIG_HEADER = config.h
 354 CONFIG_CLEAN_FILES = aarch64/.gdbinit arm/.gdbinit avr/.gdbinit \
 355         bfin/.gdbinit bpf/.gdbinit cr16/.gdbinit cris/.gdbinit \
 356         d10v/.gdbinit frv/.gdbinit ft32/.gdbinit h8300/.gdbinit \
 357         iq2000/.gdbinit lm32/.gdbinit m32c/.gdbinit m32r/.gdbinit \
 358         m68hc11/.gdbinit mcore/.gdbinit microblaze/.gdbinit \
 359         mips/.gdbinit mn10300/.gdbinit moxie/.gdbinit msp430/.gdbinit \
 360         or1k/.gdbinit ppc/.gdbinit pru/.gdbinit riscv/.gdbinit \
 361         rl78/.gdbinit rx/.gdbinit sh/.gdbinit erc32/.gdbinit \
 362         v850/.gdbinit example-synacor/.gdbinit arch-subdir.mk .gdbinit
 363 CONFIG_CLEAN_VPATH_FILES =
 364 LIBRARIES = $(noinst_LIBRARIES)
 365 ARFLAGS = cru
 366 AM_V_AR = $(am__v_AR_@AM_V@)
 367 am__v_AR_ = $(am__v_AR_@AM_DEFAULT_V@)
 368 am__v_AR_0 = @echo "  AR      " $@;
 369 am__v_AR_1 =
 370 aarch64_libsim_a_AR = $(AR) $(ARFLAGS)
 371 @SIM_ENABLE_ARCH_aarch64_TRUE@aarch64_libsim_a_DEPENDENCIES =  \
 372 @SIM_ENABLE_ARCH_aarch64_TRUE@  $(patsubst \
 373 @SIM_ENABLE_ARCH_aarch64_TRUE@  %,aarch64/%,$(SIM_NEW_COMMON_OBJS)) \
 374 @SIM_ENABLE_ARCH_aarch64_TRUE@  $(patsubst \
 375 @SIM_ENABLE_ARCH_aarch64_TRUE@  %,aarch64/dv-%.o,$(SIM_HW_DEVICES)) \
 376 @SIM_ENABLE_ARCH_aarch64_TRUE@  aarch64/cpustate.o \
 377 @SIM_ENABLE_ARCH_aarch64_TRUE@  aarch64/interp.o \
 378 @SIM_ENABLE_ARCH_aarch64_TRUE@  aarch64/memory.o \
 379 @SIM_ENABLE_ARCH_aarch64_TRUE@  aarch64/sim-resume.o \
 380 @SIM_ENABLE_ARCH_aarch64_TRUE@  aarch64/simulator.o
 381 am__dirstamp = $(am__leading_dot)dirstamp
 382 am__objects_1 = common/callback.$(OBJEXT) common/portability.$(OBJEXT) \
 383         common/sim-load.$(OBJEXT) common/sim-signal.$(OBJEXT) \
 384         common/syscall.$(OBJEXT) common/target-newlib-errno.$(OBJEXT) \
 385         common/target-newlib-open.$(OBJEXT) \
 386         common/target-newlib-signal.$(OBJEXT) \
 387         common/target-newlib-syscall.$(OBJEXT) \
 388         common/version.$(OBJEXT)
 389 @SIM_ENABLE_ARCH_aarch64_TRUE@am_aarch64_libsim_a_OBJECTS =  \
 390 @SIM_ENABLE_ARCH_aarch64_TRUE@  $(am__objects_1)
 391 @SIM_ENABLE_ARCH_aarch64_TRUE@nodist_aarch64_libsim_a_OBJECTS =  \
 392 @SIM_ENABLE_ARCH_aarch64_TRUE@  aarch64/modules.$(OBJEXT)
 393 aarch64_libsim_a_OBJECTS = $(am_aarch64_libsim_a_OBJECTS) \
 394         $(nodist_aarch64_libsim_a_OBJECTS)
 395 arm_libsim_a_AR = $(AR) $(ARFLAGS)
 396 @SIM_ENABLE_ARCH_arm_TRUE@arm_libsim_a_DEPENDENCIES = arm/wrapper.o \
 397 @SIM_ENABLE_ARCH_arm_TRUE@      $(patsubst \
 398 @SIM_ENABLE_ARCH_arm_TRUE@      %,arm/%,$(SIM_NEW_COMMON_OBJS)) \
 399 @SIM_ENABLE_ARCH_arm_TRUE@      $(patsubst \
 400 @SIM_ENABLE_ARCH_arm_TRUE@      %,arm/dv-%.o,$(SIM_HW_DEVICES)) \
 401 @SIM_ENABLE_ARCH_arm_TRUE@      arm/armemu.o arm/armemu32.o \
 402 @SIM_ENABLE_ARCH_arm_TRUE@      arm/arminit.o arm/armos.o \
 403 @SIM_ENABLE_ARCH_arm_TRUE@      arm/armsupp.o arm/armvirt.o \
 404 @SIM_ENABLE_ARCH_arm_TRUE@      arm/thumbemu.o arm/armcopro.o \
 405 @SIM_ENABLE_ARCH_arm_TRUE@      arm/maverick.o arm/iwmmxt.o
 406 @SIM_ENABLE_ARCH_arm_TRUE@am_arm_libsim_a_OBJECTS = $(am__objects_1)
 407 @SIM_ENABLE_ARCH_arm_TRUE@nodist_arm_libsim_a_OBJECTS =  \
 408 @SIM_ENABLE_ARCH_arm_TRUE@      arm/modules.$(OBJEXT)
 409 arm_libsim_a_OBJECTS = $(am_arm_libsim_a_OBJECTS) \
 410         $(nodist_arm_libsim_a_OBJECTS)
 411 avr_libsim_a_AR = $(AR) $(ARFLAGS)
 412 @SIM_ENABLE_ARCH_avr_TRUE@avr_libsim_a_DEPENDENCIES = avr/interp.o \
 413 @SIM_ENABLE_ARCH_avr_TRUE@      $(patsubst \
 414 @SIM_ENABLE_ARCH_avr_TRUE@      %,avr/%,$(SIM_NEW_COMMON_OBJS)) \
 415 @SIM_ENABLE_ARCH_avr_TRUE@      $(patsubst \
 416 @SIM_ENABLE_ARCH_avr_TRUE@      %,avr/dv-%.o,$(SIM_HW_DEVICES)) \
 417 @SIM_ENABLE_ARCH_avr_TRUE@      avr/sim-resume.o
 418 @SIM_ENABLE_ARCH_avr_TRUE@am_avr_libsim_a_OBJECTS = $(am__objects_1)
 419 @SIM_ENABLE_ARCH_avr_TRUE@nodist_avr_libsim_a_OBJECTS =  \
 420 @SIM_ENABLE_ARCH_avr_TRUE@      avr/modules.$(OBJEXT)
 421 avr_libsim_a_OBJECTS = $(am_avr_libsim_a_OBJECTS) \
 422         $(nodist_avr_libsim_a_OBJECTS)
 423 bfin_libsim_a_AR = $(AR) $(ARFLAGS)
 424 @SIM_ENABLE_ARCH_bfin_TRUE@bfin_libsim_a_DEPENDENCIES = $(patsubst \
 425 @SIM_ENABLE_ARCH_bfin_TRUE@     %,bfin/%,$(SIM_NEW_COMMON_OBJS)) \
 426 @SIM_ENABLE_ARCH_bfin_TRUE@     $(patsubst \
 427 @SIM_ENABLE_ARCH_bfin_TRUE@     %,bfin/dv-%.o,$(SIM_HW_DEVICES)) \
 428 @SIM_ENABLE_ARCH_bfin_TRUE@     $(patsubst \
 429 @SIM_ENABLE_ARCH_bfin_TRUE@     %,bfin/dv-%.o,$(bfin_SIM_EXTRA_HW_DEVICES)) \
 430 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin/bfin-sim.o bfin/devices.o \
 431 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin/gui.o bfin/interp.o \
 432 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin/machs.o bfin/sim-resume.o
 433 @SIM_ENABLE_ARCH_bfin_TRUE@am_bfin_libsim_a_OBJECTS =  \
 434 @SIM_ENABLE_ARCH_bfin_TRUE@     $(am__objects_1)
 435 @SIM_ENABLE_ARCH_bfin_TRUE@nodist_bfin_libsim_a_OBJECTS =  \
 436 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin/modules.$(OBJEXT)
 437 bfin_libsim_a_OBJECTS = $(am_bfin_libsim_a_OBJECTS) \
 438         $(nodist_bfin_libsim_a_OBJECTS)
 439 bpf_libsim_a_AR = $(AR) $(ARFLAGS)
 440 @SIM_ENABLE_ARCH_bpf_TRUE@bpf_libsim_a_DEPENDENCIES = $(patsubst \
 441 @SIM_ENABLE_ARCH_bpf_TRUE@      %,bpf/%,$(SIM_NEW_COMMON_OBJS)) \
 442 @SIM_ENABLE_ARCH_bpf_TRUE@      $(patsubst \
 443 @SIM_ENABLE_ARCH_bpf_TRUE@      %,bpf/dv-%.o,$(SIM_HW_DEVICES)) \
 444 @SIM_ENABLE_ARCH_bpf_TRUE@      bpf/cgen-run.o bpf/cgen-scache.o \
 445 @SIM_ENABLE_ARCH_bpf_TRUE@      bpf/cgen-trace.o bpf/cgen-utils.o \
 446 @SIM_ENABLE_ARCH_bpf_TRUE@      bpf/arch.o bpf/cpu.o bpf/decode-le.o \
 447 @SIM_ENABLE_ARCH_bpf_TRUE@      bpf/decode-be.o bpf/sem-le.o \
 448 @SIM_ENABLE_ARCH_bpf_TRUE@      bpf/sem-be.o bpf/mloop-le.o \
 449 @SIM_ENABLE_ARCH_bpf_TRUE@      bpf/mloop-be.o bpf/bpf.o \
 450 @SIM_ENABLE_ARCH_bpf_TRUE@      bpf/bpf-helpers.o bpf/sim-if.o \
 451 @SIM_ENABLE_ARCH_bpf_TRUE@      bpf/traps.o
 452 @SIM_ENABLE_ARCH_bpf_TRUE@am_bpf_libsim_a_OBJECTS = $(am__objects_1)
 453 @SIM_ENABLE_ARCH_bpf_TRUE@nodist_bpf_libsim_a_OBJECTS =  \
 454 @SIM_ENABLE_ARCH_bpf_TRUE@      bpf/modules.$(OBJEXT)
 455 bpf_libsim_a_OBJECTS = $(am_bpf_libsim_a_OBJECTS) \
 456         $(nodist_bpf_libsim_a_OBJECTS)
 457 common_libcommon_a_AR = $(AR) $(ARFLAGS)
 458 common_libcommon_a_LIBADD =
 459 am_common_libcommon_a_OBJECTS = common/callback.$(OBJEXT) \
 460         common/portability.$(OBJEXT) common/sim-load.$(OBJEXT) \
 461         common/sim-signal.$(OBJEXT) common/syscall.$(OBJEXT) \
 462         common/target-newlib-errno.$(OBJEXT) \
 463         common/target-newlib-open.$(OBJEXT) \
 464         common/target-newlib-signal.$(OBJEXT) \
 465         common/target-newlib-syscall.$(OBJEXT) \
 466         common/version.$(OBJEXT)
 467 common_libcommon_a_OBJECTS = $(am_common_libcommon_a_OBJECTS)
 468 cr16_libsim_a_AR = $(AR) $(ARFLAGS)
 469 @SIM_ENABLE_ARCH_cr16_TRUE@cr16_libsim_a_DEPENDENCIES = $(patsubst \
 470 @SIM_ENABLE_ARCH_cr16_TRUE@     %,cr16/%,$(SIM_NEW_COMMON_OBJS)) \
 471 @SIM_ENABLE_ARCH_cr16_TRUE@     $(patsubst \
 472 @SIM_ENABLE_ARCH_cr16_TRUE@     %,cr16/dv-%.o,$(SIM_HW_DEVICES)) \
 473 @SIM_ENABLE_ARCH_cr16_TRUE@     cr16/interp.o cr16/sim-resume.o \
 474 @SIM_ENABLE_ARCH_cr16_TRUE@     cr16/simops.o cr16/table.o
 475 @SIM_ENABLE_ARCH_cr16_TRUE@am_cr16_libsim_a_OBJECTS =  \
 476 @SIM_ENABLE_ARCH_cr16_TRUE@     $(am__objects_1)
 477 @SIM_ENABLE_ARCH_cr16_TRUE@nodist_cr16_libsim_a_OBJECTS =  \
 478 @SIM_ENABLE_ARCH_cr16_TRUE@     cr16/modules.$(OBJEXT)
 479 cr16_libsim_a_OBJECTS = $(am_cr16_libsim_a_OBJECTS) \
 480         $(nodist_cr16_libsim_a_OBJECTS)
 481 cris_libsim_a_AR = $(AR) $(ARFLAGS)
 482 @SIM_ENABLE_ARCH_cris_TRUE@cris_libsim_a_DEPENDENCIES = $(patsubst \
 483 @SIM_ENABLE_ARCH_cris_TRUE@     %,cris/%,$(SIM_NEW_COMMON_OBJS)) \
 484 @SIM_ENABLE_ARCH_cris_TRUE@     $(patsubst \
 485 @SIM_ENABLE_ARCH_cris_TRUE@     %,cris/dv-%.o,$(SIM_HW_DEVICES)) \
 486 @SIM_ENABLE_ARCH_cris_TRUE@     $(patsubst \
 487 @SIM_ENABLE_ARCH_cris_TRUE@     %,cris/dv-%.o,$(cris_SIM_EXTRA_HW_DEVICES)) \
 488 @SIM_ENABLE_ARCH_cris_TRUE@     cris/cgen-run.o cris/cgen-scache.o \
 489 @SIM_ENABLE_ARCH_cris_TRUE@     cris/cgen-trace.o cris/cgen-utils.o \
 490 @SIM_ENABLE_ARCH_cris_TRUE@     cris/arch.o cris/crisv10f.o \
 491 @SIM_ENABLE_ARCH_cris_TRUE@     cris/cpuv10.o cris/decodev10.o \
 492 @SIM_ENABLE_ARCH_cris_TRUE@     cris/modelv10.o cris/mloopv10f.o \
 493 @SIM_ENABLE_ARCH_cris_TRUE@     cris/crisv32f.o cris/cpuv32.o \
 494 @SIM_ENABLE_ARCH_cris_TRUE@     cris/decodev32.o cris/modelv32.o \
 495 @SIM_ENABLE_ARCH_cris_TRUE@     cris/mloopv32f.o cris/sim-if.o \
 496 @SIM_ENABLE_ARCH_cris_TRUE@     cris/traps.o
 497 @SIM_ENABLE_ARCH_cris_TRUE@am_cris_libsim_a_OBJECTS =  \
 498 @SIM_ENABLE_ARCH_cris_TRUE@     $(am__objects_1)
 499 @SIM_ENABLE_ARCH_cris_TRUE@nodist_cris_libsim_a_OBJECTS =  \
 500 @SIM_ENABLE_ARCH_cris_TRUE@     cris/modules.$(OBJEXT)
 501 cris_libsim_a_OBJECTS = $(am_cris_libsim_a_OBJECTS) \
 502         $(nodist_cris_libsim_a_OBJECTS)
 503 d10v_libsim_a_AR = $(AR) $(ARFLAGS)
 504 @SIM_ENABLE_ARCH_d10v_TRUE@d10v_libsim_a_DEPENDENCIES = d10v/interp.o \
 505 @SIM_ENABLE_ARCH_d10v_TRUE@     $(patsubst \
 506 @SIM_ENABLE_ARCH_d10v_TRUE@     %,d10v/%,$(SIM_NEW_COMMON_OBJS)) \
 507 @SIM_ENABLE_ARCH_d10v_TRUE@     $(patsubst \
 508 @SIM_ENABLE_ARCH_d10v_TRUE@     %,d10v/dv-%.o,$(SIM_HW_DEVICES)) \
 509 @SIM_ENABLE_ARCH_d10v_TRUE@     d10v/endian.o d10v/sim-resume.o \
 510 @SIM_ENABLE_ARCH_d10v_TRUE@     d10v/simops.o d10v/table.o
 511 @SIM_ENABLE_ARCH_d10v_TRUE@am_d10v_libsim_a_OBJECTS =  \
 512 @SIM_ENABLE_ARCH_d10v_TRUE@     $(am__objects_1)
 513 @SIM_ENABLE_ARCH_d10v_TRUE@nodist_d10v_libsim_a_OBJECTS =  \
 514 @SIM_ENABLE_ARCH_d10v_TRUE@     d10v/modules.$(OBJEXT)
 515 d10v_libsim_a_OBJECTS = $(am_d10v_libsim_a_OBJECTS) \
 516         $(nodist_d10v_libsim_a_OBJECTS)
 517 erc32_libsim_a_AR = $(AR) $(ARFLAGS)
 518 @SIM_ENABLE_ARCH_erc32_TRUE@erc32_libsim_a_DEPENDENCIES =  \
 519 @SIM_ENABLE_ARCH_erc32_TRUE@    erc32/erc32.o erc32/exec.o \
 520 @SIM_ENABLE_ARCH_erc32_TRUE@    erc32/float.o erc32/func.o \
 521 @SIM_ENABLE_ARCH_erc32_TRUE@    erc32/help.o erc32/interf.o
 522 @SIM_ENABLE_ARCH_erc32_TRUE@am_erc32_libsim_a_OBJECTS =  \
 523 @SIM_ENABLE_ARCH_erc32_TRUE@    $(am__objects_1)
 524 @SIM_ENABLE_ARCH_erc32_TRUE@nodist_erc32_libsim_a_OBJECTS =  \
 525 @SIM_ENABLE_ARCH_erc32_TRUE@    erc32/modules.$(OBJEXT)
 526 erc32_libsim_a_OBJECTS = $(am_erc32_libsim_a_OBJECTS) \
 527         $(nodist_erc32_libsim_a_OBJECTS)
 528 example_synacor_libsim_a_AR = $(AR) $(ARFLAGS)
 529 @SIM_ENABLE_ARCH_examples_TRUE@example_synacor_libsim_a_DEPENDENCIES =  \
 530 @SIM_ENABLE_ARCH_examples_TRUE@ $(patsubst \
 531 @SIM_ENABLE_ARCH_examples_TRUE@ %,example-synacor/%,$(SIM_NEW_COMMON_OBJS)) \
 532 @SIM_ENABLE_ARCH_examples_TRUE@ $(patsubst \
 533 @SIM_ENABLE_ARCH_examples_TRUE@ %,example-synacor/dv-%.o,$(SIM_HW_DEVICES)) \
 534 @SIM_ENABLE_ARCH_examples_TRUE@ example-synacor/interp.o \
 535 @SIM_ENABLE_ARCH_examples_TRUE@ example-synacor/sim-main.o \
 536 @SIM_ENABLE_ARCH_examples_TRUE@ example-synacor/sim-resume.o
 537 @SIM_ENABLE_ARCH_examples_TRUE@am_example_synacor_libsim_a_OBJECTS =  \
 538 @SIM_ENABLE_ARCH_examples_TRUE@ $(am__objects_1)
 539 @SIM_ENABLE_ARCH_examples_TRUE@nodist_example_synacor_libsim_a_OBJECTS = example-synacor/modules.$(OBJEXT)
 540 example_synacor_libsim_a_OBJECTS =  \
 541         $(am_example_synacor_libsim_a_OBJECTS) \
 542         $(nodist_example_synacor_libsim_a_OBJECTS)
 543 frv_libsim_a_AR = $(AR) $(ARFLAGS)
 544 @SIM_ENABLE_ARCH_frv_TRUE@frv_libsim_a_DEPENDENCIES = $(patsubst \
 545 @SIM_ENABLE_ARCH_frv_TRUE@      %,frv/%,$(SIM_NEW_COMMON_OBJS)) \
 546 @SIM_ENABLE_ARCH_frv_TRUE@      $(patsubst \
 547 @SIM_ENABLE_ARCH_frv_TRUE@      %,frv/dv-%.o,$(SIM_HW_DEVICES)) \
 548 @SIM_ENABLE_ARCH_frv_TRUE@      frv/cgen-accfp.o frv/cgen-fpu.o \
 549 @SIM_ENABLE_ARCH_frv_TRUE@      frv/cgen-run.o frv/cgen-scache.o \
 550 @SIM_ENABLE_ARCH_frv_TRUE@      frv/cgen-trace.o frv/cgen-utils.o \
 551 @SIM_ENABLE_ARCH_frv_TRUE@      frv/arch.o frv/cgen-par.o frv/cpu.o \
 552 @SIM_ENABLE_ARCH_frv_TRUE@      frv/decode.o frv/frv.o frv/mloop.o \
 553 @SIM_ENABLE_ARCH_frv_TRUE@      frv/model.o frv/sem.o frv/cache.o \
 554 @SIM_ENABLE_ARCH_frv_TRUE@      frv/interrupts.o frv/memory.o \
 555 @SIM_ENABLE_ARCH_frv_TRUE@      frv/options.o frv/pipeline.o \
 556 @SIM_ENABLE_ARCH_frv_TRUE@      frv/profile.o frv/profile-fr400.o \
 557 @SIM_ENABLE_ARCH_frv_TRUE@      frv/profile-fr450.o \
 558 @SIM_ENABLE_ARCH_frv_TRUE@      frv/profile-fr500.o \
 559 @SIM_ENABLE_ARCH_frv_TRUE@      frv/profile-fr550.o frv/registers.o \
 560 @SIM_ENABLE_ARCH_frv_TRUE@      frv/reset.o frv/sim-if.o frv/traps.o
 561 @SIM_ENABLE_ARCH_frv_TRUE@am_frv_libsim_a_OBJECTS = $(am__objects_1)
 562 @SIM_ENABLE_ARCH_frv_TRUE@nodist_frv_libsim_a_OBJECTS =  \
 563 @SIM_ENABLE_ARCH_frv_TRUE@      frv/modules.$(OBJEXT)
 564 frv_libsim_a_OBJECTS = $(am_frv_libsim_a_OBJECTS) \
 565         $(nodist_frv_libsim_a_OBJECTS)
 566 ft32_libsim_a_AR = $(AR) $(ARFLAGS)
 567 @SIM_ENABLE_ARCH_ft32_TRUE@ft32_libsim_a_DEPENDENCIES = $(patsubst \
 568 @SIM_ENABLE_ARCH_ft32_TRUE@     %,ft32/%,$(SIM_NEW_COMMON_OBJS)) \
 569 @SIM_ENABLE_ARCH_ft32_TRUE@     $(patsubst \
 570 @SIM_ENABLE_ARCH_ft32_TRUE@     %,ft32/dv-%.o,$(SIM_HW_DEVICES)) \
 571 @SIM_ENABLE_ARCH_ft32_TRUE@     ft32/interp.o ft32/sim-resume.o
 572 @SIM_ENABLE_ARCH_ft32_TRUE@am_ft32_libsim_a_OBJECTS =  \
 573 @SIM_ENABLE_ARCH_ft32_TRUE@     $(am__objects_1)
 574 @SIM_ENABLE_ARCH_ft32_TRUE@nodist_ft32_libsim_a_OBJECTS =  \
 575 @SIM_ENABLE_ARCH_ft32_TRUE@     ft32/modules.$(OBJEXT)
 576 ft32_libsim_a_OBJECTS = $(am_ft32_libsim_a_OBJECTS) \
 577         $(nodist_ft32_libsim_a_OBJECTS)
 578 h8300_libsim_a_AR = $(AR) $(ARFLAGS)
 579 @SIM_ENABLE_ARCH_h8300_TRUE@h8300_libsim_a_DEPENDENCIES =  \
 580 @SIM_ENABLE_ARCH_h8300_TRUE@    h8300/compile.o $(patsubst \
 581 @SIM_ENABLE_ARCH_h8300_TRUE@    %,h8300/%,$(SIM_NEW_COMMON_OBJS)) \
 582 @SIM_ENABLE_ARCH_h8300_TRUE@    $(patsubst \
 583 @SIM_ENABLE_ARCH_h8300_TRUE@    %,h8300/dv-%.o,$(SIM_HW_DEVICES)) \
 584 @SIM_ENABLE_ARCH_h8300_TRUE@    h8300/sim-resume.o
 585 @SIM_ENABLE_ARCH_h8300_TRUE@am_h8300_libsim_a_OBJECTS =  \
 586 @SIM_ENABLE_ARCH_h8300_TRUE@    $(am__objects_1)
 587 @SIM_ENABLE_ARCH_h8300_TRUE@nodist_h8300_libsim_a_OBJECTS =  \
 588 @SIM_ENABLE_ARCH_h8300_TRUE@    h8300/modules.$(OBJEXT)
 589 h8300_libsim_a_OBJECTS = $(am_h8300_libsim_a_OBJECTS) \
 590         $(nodist_h8300_libsim_a_OBJECTS)
 591 igen_libigen_a_AR = $(AR) $(ARFLAGS)
 592 igen_libigen_a_LIBADD =
 593 am_igen_libigen_a_OBJECTS = igen/table.$(OBJEXT) igen/lf.$(OBJEXT) \
 594         igen/misc.$(OBJEXT) igen/filter_host.$(OBJEXT) \
 595         igen/ld-decode.$(OBJEXT) igen/ld-cache.$(OBJEXT) \
 596         igen/filter.$(OBJEXT) igen/ld-insn.$(OBJEXT) \
 597         igen/gen-model.$(OBJEXT) igen/gen-itable.$(OBJEXT) \
 598         igen/gen-icache.$(OBJEXT) igen/gen-semantics.$(OBJEXT) \
 599         igen/gen-idecode.$(OBJEXT) igen/gen-support.$(OBJEXT) \
 600         igen/gen-engine.$(OBJEXT) igen/gen.$(OBJEXT)
 601 igen_libigen_a_OBJECTS = $(am_igen_libigen_a_OBJECTS)
 602 iq2000_libsim_a_AR = $(AR) $(ARFLAGS)
 603 @SIM_ENABLE_ARCH_iq2000_TRUE@iq2000_libsim_a_DEPENDENCIES =  \
 604 @SIM_ENABLE_ARCH_iq2000_TRUE@   $(patsubst \
 605 @SIM_ENABLE_ARCH_iq2000_TRUE@   %,iq2000/%,$(SIM_NEW_COMMON_OBJS)) \
 606 @SIM_ENABLE_ARCH_iq2000_TRUE@   $(patsubst \
 607 @SIM_ENABLE_ARCH_iq2000_TRUE@   %,iq2000/dv-%.o,$(SIM_HW_DEVICES)) \
 608 @SIM_ENABLE_ARCH_iq2000_TRUE@   iq2000/cgen-run.o \
 609 @SIM_ENABLE_ARCH_iq2000_TRUE@   iq2000/cgen-scache.o \
 610 @SIM_ENABLE_ARCH_iq2000_TRUE@   iq2000/cgen-trace.o \
 611 @SIM_ENABLE_ARCH_iq2000_TRUE@   iq2000/cgen-utils.o iq2000/arch.o \
 612 @SIM_ENABLE_ARCH_iq2000_TRUE@   iq2000/cpu.o iq2000/decode.o \
 613 @SIM_ENABLE_ARCH_iq2000_TRUE@   iq2000/iq2000.o iq2000/sem.o \
 614 @SIM_ENABLE_ARCH_iq2000_TRUE@   iq2000/mloop.o iq2000/model.o \
 615 @SIM_ENABLE_ARCH_iq2000_TRUE@   iq2000/sim-if.o
 616 @SIM_ENABLE_ARCH_iq2000_TRUE@am_iq2000_libsim_a_OBJECTS =  \
 617 @SIM_ENABLE_ARCH_iq2000_TRUE@   $(am__objects_1)
 618 @SIM_ENABLE_ARCH_iq2000_TRUE@nodist_iq2000_libsim_a_OBJECTS =  \
 619 @SIM_ENABLE_ARCH_iq2000_TRUE@   iq2000/modules.$(OBJEXT)
 620 iq2000_libsim_a_OBJECTS = $(am_iq2000_libsim_a_OBJECTS) \
 621         $(nodist_iq2000_libsim_a_OBJECTS)
 622 lm32_libsim_a_AR = $(AR) $(ARFLAGS)
 623 @SIM_ENABLE_ARCH_lm32_TRUE@lm32_libsim_a_DEPENDENCIES = $(patsubst \
 624 @SIM_ENABLE_ARCH_lm32_TRUE@     %,lm32/%,$(SIM_NEW_COMMON_OBJS)) \
 625 @SIM_ENABLE_ARCH_lm32_TRUE@     $(patsubst \
 626 @SIM_ENABLE_ARCH_lm32_TRUE@     %,lm32/dv-%.o,$(SIM_HW_DEVICES)) \
 627 @SIM_ENABLE_ARCH_lm32_TRUE@     $(patsubst \
 628 @SIM_ENABLE_ARCH_lm32_TRUE@     %,lm32/dv-%.o,$(lm32_SIM_EXTRA_HW_DEVICES)) \
 629 @SIM_ENABLE_ARCH_lm32_TRUE@     lm32/cgen-run.o lm32/cgen-scache.o \
 630 @SIM_ENABLE_ARCH_lm32_TRUE@     lm32/cgen-trace.o lm32/cgen-utils.o \
 631 @SIM_ENABLE_ARCH_lm32_TRUE@     lm32/arch.o lm32/cpu.o \
 632 @SIM_ENABLE_ARCH_lm32_TRUE@     lm32/decode.o lm32/sem.o \
 633 @SIM_ENABLE_ARCH_lm32_TRUE@     lm32/mloop.o lm32/model.o \
 634 @SIM_ENABLE_ARCH_lm32_TRUE@     lm32/lm32.o lm32/sim-if.o \
 635 @SIM_ENABLE_ARCH_lm32_TRUE@     lm32/traps.o lm32/user.o
 636 @SIM_ENABLE_ARCH_lm32_TRUE@am_lm32_libsim_a_OBJECTS =  \
 637 @SIM_ENABLE_ARCH_lm32_TRUE@     $(am__objects_1)
 638 @SIM_ENABLE_ARCH_lm32_TRUE@nodist_lm32_libsim_a_OBJECTS =  \
 639 @SIM_ENABLE_ARCH_lm32_TRUE@     lm32/modules.$(OBJEXT)
 640 lm32_libsim_a_OBJECTS = $(am_lm32_libsim_a_OBJECTS) \
 641         $(nodist_lm32_libsim_a_OBJECTS)
 642 m32c_libsim_a_AR = $(AR) $(ARFLAGS)
 643 @SIM_ENABLE_ARCH_m32c_TRUE@m32c_libsim_a_DEPENDENCIES = m32c/gdb-if.o \
 644 @SIM_ENABLE_ARCH_m32c_TRUE@     m32c/int.o m32c/load.o m32c/m32c.o \
 645 @SIM_ENABLE_ARCH_m32c_TRUE@     m32c/mem.o m32c/misc.o m32c/r8c.o \
 646 @SIM_ENABLE_ARCH_m32c_TRUE@     m32c/reg.o m32c/srcdest.o \
 647 @SIM_ENABLE_ARCH_m32c_TRUE@     m32c/syscalls.o m32c/trace.o
 648 @SIM_ENABLE_ARCH_m32c_TRUE@am_m32c_libsim_a_OBJECTS =  \
 649 @SIM_ENABLE_ARCH_m32c_TRUE@     $(am__objects_1)
 650 @SIM_ENABLE_ARCH_m32c_TRUE@nodist_m32c_libsim_a_OBJECTS =  \
 651 @SIM_ENABLE_ARCH_m32c_TRUE@     m32c/modules.$(OBJEXT)
 652 m32c_libsim_a_OBJECTS = $(am_m32c_libsim_a_OBJECTS) \
 653         $(nodist_m32c_libsim_a_OBJECTS)
 654 m32r_libsim_a_AR = $(AR) $(ARFLAGS)
 655 @SIM_ENABLE_ARCH_m32r_TRUE@m32r_libsim_a_DEPENDENCIES = $(patsubst \
 656 @SIM_ENABLE_ARCH_m32r_TRUE@     %,m32r/%,$(SIM_NEW_COMMON_OBJS)) \
 657 @SIM_ENABLE_ARCH_m32r_TRUE@     $(patsubst \
 658 @SIM_ENABLE_ARCH_m32r_TRUE@     %,m32r/dv-%.o,$(SIM_HW_DEVICES)) \
 659 @SIM_ENABLE_ARCH_m32r_TRUE@     $(patsubst \
 660 @SIM_ENABLE_ARCH_m32r_TRUE@     %,m32r/dv-%.o,$(m32r_SIM_EXTRA_HW_DEVICES)) \
 661 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/cgen-run.o m32r/cgen-scache.o \
 662 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/cgen-trace.o m32r/cgen-utils.o \
 663 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/arch.o m32r/m32r.o m32r/cpu.o \
 664 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/decode.o m32r/sem.o \
 665 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/model.o m32r/mloop.o \
 666 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/m32rx.o m32r/cpux.o \
 667 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/decodex.o m32r/modelx.o \
 668 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/mloopx.o m32r/m32r2.o \
 669 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/cpu2.o m32r/decode2.o \
 670 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/model2.o m32r/mloop2.o \
 671 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/sim-if.o m32r/traps.o
 672 @SIM_ENABLE_ARCH_m32r_TRUE@am_m32r_libsim_a_OBJECTS =  \
 673 @SIM_ENABLE_ARCH_m32r_TRUE@     $(am__objects_1)
 674 @SIM_ENABLE_ARCH_m32r_TRUE@nodist_m32r_libsim_a_OBJECTS =  \
 675 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/modules.$(OBJEXT)
 676 m32r_libsim_a_OBJECTS = $(am_m32r_libsim_a_OBJECTS) \
 677         $(nodist_m32r_libsim_a_OBJECTS)
 678 m68hc11_libsim_a_AR = $(AR) $(ARFLAGS)
 679 @SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11_libsim_a_DEPENDENCIES =  \
 680 @SIM_ENABLE_ARCH_m68hc11_TRUE@  m68hc11/interp.o \
 681 @SIM_ENABLE_ARCH_m68hc11_TRUE@  m68hc11/m68hc11int.o \
 682 @SIM_ENABLE_ARCH_m68hc11_TRUE@  m68hc11/m68hc12int.o \
 683 @SIM_ENABLE_ARCH_m68hc11_TRUE@  m68hc11/emulos.o \
 684 @SIM_ENABLE_ARCH_m68hc11_TRUE@  m68hc11/interrupts.o \
 685 @SIM_ENABLE_ARCH_m68hc11_TRUE@  m68hc11/m68hc11_sim.o $(patsubst \
 686 @SIM_ENABLE_ARCH_m68hc11_TRUE@  %,m68hc11/%,$(SIM_NEW_COMMON_OBJS)) \
 687 @SIM_ENABLE_ARCH_m68hc11_TRUE@  $(patsubst \
 688 @SIM_ENABLE_ARCH_m68hc11_TRUE@  %,m68hc11/dv-%.o,$(SIM_HW_DEVICES)) \
 689 @SIM_ENABLE_ARCH_m68hc11_TRUE@  $(patsubst \
 690 @SIM_ENABLE_ARCH_m68hc11_TRUE@  %,m68hc11/dv-%.o,$(m68hc11_SIM_EXTRA_HW_DEVICES)) \
 691 @SIM_ENABLE_ARCH_m68hc11_TRUE@  m68hc11/sim-resume.o
 692 @SIM_ENABLE_ARCH_m68hc11_TRUE@am_m68hc11_libsim_a_OBJECTS =  \
 693 @SIM_ENABLE_ARCH_m68hc11_TRUE@  $(am__objects_1)
 694 @SIM_ENABLE_ARCH_m68hc11_TRUE@nodist_m68hc11_libsim_a_OBJECTS =  \
 695 @SIM_ENABLE_ARCH_m68hc11_TRUE@  m68hc11/modules.$(OBJEXT)
 696 m68hc11_libsim_a_OBJECTS = $(am_m68hc11_libsim_a_OBJECTS) \
 697         $(nodist_m68hc11_libsim_a_OBJECTS)
 698 mcore_libsim_a_AR = $(AR) $(ARFLAGS)
 699 @SIM_ENABLE_ARCH_mcore_TRUE@mcore_libsim_a_DEPENDENCIES =  \
 700 @SIM_ENABLE_ARCH_mcore_TRUE@    mcore/interp.o $(patsubst \
 701 @SIM_ENABLE_ARCH_mcore_TRUE@    %,mcore/%,$(SIM_NEW_COMMON_OBJS)) \
 702 @SIM_ENABLE_ARCH_mcore_TRUE@    $(patsubst \
 703 @SIM_ENABLE_ARCH_mcore_TRUE@    %,mcore/dv-%.o,$(SIM_HW_DEVICES)) \
 704 @SIM_ENABLE_ARCH_mcore_TRUE@    mcore/sim-resume.o
 705 @SIM_ENABLE_ARCH_mcore_TRUE@am_mcore_libsim_a_OBJECTS =  \
 706 @SIM_ENABLE_ARCH_mcore_TRUE@    $(am__objects_1)
 707 @SIM_ENABLE_ARCH_mcore_TRUE@nodist_mcore_libsim_a_OBJECTS =  \
 708 @SIM_ENABLE_ARCH_mcore_TRUE@    mcore/modules.$(OBJEXT)
 709 mcore_libsim_a_OBJECTS = $(am_mcore_libsim_a_OBJECTS) \
 710         $(nodist_mcore_libsim_a_OBJECTS)
 711 microblaze_libsim_a_AR = $(AR) $(ARFLAGS)
 712 @SIM_ENABLE_ARCH_microblaze_TRUE@microblaze_libsim_a_DEPENDENCIES =  \
 713 @SIM_ENABLE_ARCH_microblaze_TRUE@       microblaze/interp.o \
 714 @SIM_ENABLE_ARCH_microblaze_TRUE@       $(patsubst \
 715 @SIM_ENABLE_ARCH_microblaze_TRUE@       %,microblaze/%,$(SIM_NEW_COMMON_OBJS)) \
 716 @SIM_ENABLE_ARCH_microblaze_TRUE@       $(patsubst \
 717 @SIM_ENABLE_ARCH_microblaze_TRUE@       %,microblaze/dv-%.o,$(SIM_HW_DEVICES)) \
 718 @SIM_ENABLE_ARCH_microblaze_TRUE@       microblaze/sim-resume.o
 719 @SIM_ENABLE_ARCH_microblaze_TRUE@am_microblaze_libsim_a_OBJECTS =  \
 720 @SIM_ENABLE_ARCH_microblaze_TRUE@       $(am__objects_1)
 721 @SIM_ENABLE_ARCH_microblaze_TRUE@nodist_microblaze_libsim_a_OBJECTS =  \
 722 @SIM_ENABLE_ARCH_microblaze_TRUE@       microblaze/modules.$(OBJEXT)
 723 microblaze_libsim_a_OBJECTS = $(am_microblaze_libsim_a_OBJECTS) \
 724         $(nodist_microblaze_libsim_a_OBJECTS)
 725 mips_libsim_a_AR = $(AR) $(ARFLAGS)
 726 am__DEPENDENCIES_1 =
 727 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_MULTI_TRUE@am__DEPENDENCIES_2 = $(am__DEPENDENCIES_1) \
 728 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_MULTI_TRUE@       mips/itable.o \
 729 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_MULTI_TRUE@       mips/multi-run.o
 730 @SIM_ENABLE_ARCH_mips_TRUE@am__DEPENDENCIES_3 = $(am__append_68) \
 731 @SIM_ENABLE_ARCH_mips_TRUE@     $(am__append_69) \
 732 @SIM_ENABLE_ARCH_mips_TRUE@     $(am__DEPENDENCIES_2)
 733 @SIM_ENABLE_ARCH_mips_TRUE@mips_libsim_a_DEPENDENCIES = mips/interp.o \
 734 @SIM_ENABLE_ARCH_mips_TRUE@     $(am__DEPENDENCIES_3) $(patsubst \
 735 @SIM_ENABLE_ARCH_mips_TRUE@     %,mips/%,$(SIM_NEW_COMMON_OBJS)) \
 736 @SIM_ENABLE_ARCH_mips_TRUE@     $(patsubst \
 737 @SIM_ENABLE_ARCH_mips_TRUE@     %,mips/dv-%.o,$(SIM_HW_DEVICES)) \
 738 @SIM_ENABLE_ARCH_mips_TRUE@     $(patsubst \
 739 @SIM_ENABLE_ARCH_mips_TRUE@     %,mips/dv-%.o,$(mips_SIM_EXTRA_HW_DEVICES)) \
 740 @SIM_ENABLE_ARCH_mips_TRUE@     mips/cp1.o mips/dsp.o mips/mdmx.o \
 741 @SIM_ENABLE_ARCH_mips_TRUE@     mips/sim-main.o mips/sim-resume.o
 742 @SIM_ENABLE_ARCH_mips_TRUE@am_mips_libsim_a_OBJECTS =  \
 743 @SIM_ENABLE_ARCH_mips_TRUE@     $(am__objects_1)
 744 @SIM_ENABLE_ARCH_mips_TRUE@nodist_mips_libsim_a_OBJECTS =  \
 745 @SIM_ENABLE_ARCH_mips_TRUE@     mips/modules.$(OBJEXT)
 746 mips_libsim_a_OBJECTS = $(am_mips_libsim_a_OBJECTS) \
 747         $(nodist_mips_libsim_a_OBJECTS)
 748 mn10300_libsim_a_AR = $(AR) $(ARFLAGS)
 749 @SIM_ENABLE_ARCH_mn10300_TRUE@mn10300_libsim_a_DEPENDENCIES =  \
 750 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/itable.o \
 751 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/semantics.o \
 752 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/idecode.o \
 753 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/icache.o \
 754 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/engine.o mn10300/irun.o \
 755 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/support.o $(patsubst \
 756 @SIM_ENABLE_ARCH_mn10300_TRUE@  %,mn10300/%,$(SIM_NEW_COMMON_OBJS)) \
 757 @SIM_ENABLE_ARCH_mn10300_TRUE@  $(patsubst \
 758 @SIM_ENABLE_ARCH_mn10300_TRUE@  %,mn10300/dv-%.o,$(SIM_HW_DEVICES)) \
 759 @SIM_ENABLE_ARCH_mn10300_TRUE@  $(patsubst \
 760 @SIM_ENABLE_ARCH_mn10300_TRUE@  %,mn10300/dv-%.o,$(mn10300_SIM_EXTRA_HW_DEVICES)) \
 761 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/interp.o \
 762 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/op_utils.o \
 763 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/sim-resume.o
 764 @SIM_ENABLE_ARCH_mn10300_TRUE@am_mn10300_libsim_a_OBJECTS =  \
 765 @SIM_ENABLE_ARCH_mn10300_TRUE@  $(am__objects_1)
 766 @SIM_ENABLE_ARCH_mn10300_TRUE@nodist_mn10300_libsim_a_OBJECTS =  \
 767 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/modules.$(OBJEXT)
 768 mn10300_libsim_a_OBJECTS = $(am_mn10300_libsim_a_OBJECTS) \
 769         $(nodist_mn10300_libsim_a_OBJECTS)
 770 moxie_libsim_a_AR = $(AR) $(ARFLAGS)
 771 @SIM_ENABLE_ARCH_moxie_TRUE@moxie_libsim_a_DEPENDENCIES = $(patsubst \
 772 @SIM_ENABLE_ARCH_moxie_TRUE@    %,moxie/%,$(SIM_NEW_COMMON_OBJS)) \
 773 @SIM_ENABLE_ARCH_moxie_TRUE@    $(patsubst \
 774 @SIM_ENABLE_ARCH_moxie_TRUE@    %,moxie/dv-%.o,$(SIM_HW_DEVICES)) \
 775 @SIM_ENABLE_ARCH_moxie_TRUE@    moxie/interp.o moxie/sim-resume.o
 776 @SIM_ENABLE_ARCH_moxie_TRUE@am_moxie_libsim_a_OBJECTS =  \
 777 @SIM_ENABLE_ARCH_moxie_TRUE@    $(am__objects_1)
 778 @SIM_ENABLE_ARCH_moxie_TRUE@nodist_moxie_libsim_a_OBJECTS =  \
 779 @SIM_ENABLE_ARCH_moxie_TRUE@    moxie/modules.$(OBJEXT)
 780 moxie_libsim_a_OBJECTS = $(am_moxie_libsim_a_OBJECTS) \
 781         $(nodist_moxie_libsim_a_OBJECTS)
 782 msp430_libsim_a_AR = $(AR) $(ARFLAGS)
 783 @SIM_ENABLE_ARCH_msp430_TRUE@msp430_libsim_a_DEPENDENCIES =  \
 784 @SIM_ENABLE_ARCH_msp430_TRUE@   $(patsubst \
 785 @SIM_ENABLE_ARCH_msp430_TRUE@   %,msp430/%,$(SIM_NEW_COMMON_OBJS)) \
 786 @SIM_ENABLE_ARCH_msp430_TRUE@   $(patsubst \
 787 @SIM_ENABLE_ARCH_msp430_TRUE@   %,msp430/dv-%.o,$(SIM_HW_DEVICES)) \
 788 @SIM_ENABLE_ARCH_msp430_TRUE@   msp430/msp430-sim.o \
 789 @SIM_ENABLE_ARCH_msp430_TRUE@   msp430/sim-resume.o
 790 @SIM_ENABLE_ARCH_msp430_TRUE@am_msp430_libsim_a_OBJECTS =  \
 791 @SIM_ENABLE_ARCH_msp430_TRUE@   $(am__objects_1)
 792 @SIM_ENABLE_ARCH_msp430_TRUE@nodist_msp430_libsim_a_OBJECTS =  \
 793 @SIM_ENABLE_ARCH_msp430_TRUE@   msp430/modules.$(OBJEXT)
 794 msp430_libsim_a_OBJECTS = $(am_msp430_libsim_a_OBJECTS) \
 795         $(nodist_msp430_libsim_a_OBJECTS)
 796 or1k_libsim_a_AR = $(AR) $(ARFLAGS)
 797 @SIM_ENABLE_ARCH_or1k_TRUE@or1k_libsim_a_DEPENDENCIES = $(patsubst \
 798 @SIM_ENABLE_ARCH_or1k_TRUE@     %,or1k/%,$(SIM_NEW_COMMON_OBJS)) \
 799 @SIM_ENABLE_ARCH_or1k_TRUE@     $(patsubst \
 800 @SIM_ENABLE_ARCH_or1k_TRUE@     %,or1k/dv-%.o,$(SIM_HW_DEVICES)) \
 801 @SIM_ENABLE_ARCH_or1k_TRUE@     or1k/cgen-accfp.o or1k/cgen-fpu.o \
 802 @SIM_ENABLE_ARCH_or1k_TRUE@     or1k/cgen-run.o or1k/cgen-scache.o \
 803 @SIM_ENABLE_ARCH_or1k_TRUE@     or1k/cgen-trace.o or1k/cgen-utils.o \
 804 @SIM_ENABLE_ARCH_or1k_TRUE@     or1k/arch.o or1k/cpu.o \
 805 @SIM_ENABLE_ARCH_or1k_TRUE@     or1k/decode.o or1k/mloop.o \
 806 @SIM_ENABLE_ARCH_or1k_TRUE@     or1k/model.o or1k/sem.o or1k/or1k.o \
 807 @SIM_ENABLE_ARCH_or1k_TRUE@     or1k/sim-if.o or1k/traps.o
 808 @SIM_ENABLE_ARCH_or1k_TRUE@am_or1k_libsim_a_OBJECTS =  \
 809 @SIM_ENABLE_ARCH_or1k_TRUE@     $(am__objects_1)
 810 @SIM_ENABLE_ARCH_or1k_TRUE@nodist_or1k_libsim_a_OBJECTS =  \
 811 @SIM_ENABLE_ARCH_or1k_TRUE@     or1k/modules.$(OBJEXT)
 812 or1k_libsim_a_OBJECTS = $(am_or1k_libsim_a_OBJECTS) \
 813         $(nodist_or1k_libsim_a_OBJECTS)
 814 pru_libsim_a_AR = $(AR) $(ARFLAGS)
 815 @SIM_ENABLE_ARCH_pru_TRUE@pru_libsim_a_DEPENDENCIES = $(patsubst \
 816 @SIM_ENABLE_ARCH_pru_TRUE@      %,pru/%,$(SIM_NEW_COMMON_OBJS)) \
 817 @SIM_ENABLE_ARCH_pru_TRUE@      $(patsubst \
 818 @SIM_ENABLE_ARCH_pru_TRUE@      %,pru/dv-%.o,$(SIM_HW_DEVICES)) \
 819 @SIM_ENABLE_ARCH_pru_TRUE@      pru/interp.o pru/sim-resume.o
 820 @SIM_ENABLE_ARCH_pru_TRUE@am_pru_libsim_a_OBJECTS = $(am__objects_1)
 821 @SIM_ENABLE_ARCH_pru_TRUE@nodist_pru_libsim_a_OBJECTS =  \
 822 @SIM_ENABLE_ARCH_pru_TRUE@      pru/modules.$(OBJEXT)
 823 pru_libsim_a_OBJECTS = $(am_pru_libsim_a_OBJECTS) \
 824         $(nodist_pru_libsim_a_OBJECTS)
 825 riscv_libsim_a_AR = $(AR) $(ARFLAGS)
 826 @SIM_ENABLE_ARCH_riscv_TRUE@riscv_libsim_a_DEPENDENCIES = $(patsubst \
 827 @SIM_ENABLE_ARCH_riscv_TRUE@    %,riscv/%,$(SIM_NEW_COMMON_OBJS)) \
 828 @SIM_ENABLE_ARCH_riscv_TRUE@    $(patsubst \
 829 @SIM_ENABLE_ARCH_riscv_TRUE@    %,riscv/dv-%.o,$(SIM_HW_DEVICES)) \
 830 @SIM_ENABLE_ARCH_riscv_TRUE@    riscv/interp.o riscv/machs.o \
 831 @SIM_ENABLE_ARCH_riscv_TRUE@    riscv/sim-main.o \
 832 @SIM_ENABLE_ARCH_riscv_TRUE@    riscv/sim-resume.o
 833 @SIM_ENABLE_ARCH_riscv_TRUE@am_riscv_libsim_a_OBJECTS =  \
 834 @SIM_ENABLE_ARCH_riscv_TRUE@    $(am__objects_1)
 835 @SIM_ENABLE_ARCH_riscv_TRUE@nodist_riscv_libsim_a_OBJECTS =  \
 836 @SIM_ENABLE_ARCH_riscv_TRUE@    riscv/modules.$(OBJEXT)
 837 riscv_libsim_a_OBJECTS = $(am_riscv_libsim_a_OBJECTS) \
 838         $(nodist_riscv_libsim_a_OBJECTS)
 839 rl78_libsim_a_AR = $(AR) $(ARFLAGS)
 840 @SIM_ENABLE_ARCH_rl78_TRUE@rl78_libsim_a_DEPENDENCIES = rl78/load.o \
 841 @SIM_ENABLE_ARCH_rl78_TRUE@     rl78/mem.o rl78/cpu.o rl78/rl78.o \
 842 @SIM_ENABLE_ARCH_rl78_TRUE@     rl78/gdb-if.o rl78/trace.o
 843 @SIM_ENABLE_ARCH_rl78_TRUE@am_rl78_libsim_a_OBJECTS =  \
 844 @SIM_ENABLE_ARCH_rl78_TRUE@     $(am__objects_1)
 845 @SIM_ENABLE_ARCH_rl78_TRUE@nodist_rl78_libsim_a_OBJECTS =  \
 846 @SIM_ENABLE_ARCH_rl78_TRUE@     rl78/modules.$(OBJEXT)
 847 rl78_libsim_a_OBJECTS = $(am_rl78_libsim_a_OBJECTS) \
 848         $(nodist_rl78_libsim_a_OBJECTS)
 849 rx_libsim_a_AR = $(AR) $(ARFLAGS)
 850 @SIM_ENABLE_ARCH_rx_TRUE@rx_libsim_a_DEPENDENCIES = rx/fpu.o rx/load.o \
 851 @SIM_ENABLE_ARCH_rx_TRUE@       rx/mem.o rx/misc.o rx/reg.o rx/rx.o \
 852 @SIM_ENABLE_ARCH_rx_TRUE@       rx/syscalls.o rx/trace.o rx/gdb-if.o \
 853 @SIM_ENABLE_ARCH_rx_TRUE@       rx/err.o
 854 @SIM_ENABLE_ARCH_rx_TRUE@am_rx_libsim_a_OBJECTS = $(am__objects_1)
 855 @SIM_ENABLE_ARCH_rx_TRUE@nodist_rx_libsim_a_OBJECTS =  \
 856 @SIM_ENABLE_ARCH_rx_TRUE@       rx/modules.$(OBJEXT)
 857 rx_libsim_a_OBJECTS = $(am_rx_libsim_a_OBJECTS) \
 858         $(nodist_rx_libsim_a_OBJECTS)
 859 sh_libsim_a_AR = $(AR) $(ARFLAGS)
 860 @SIM_ENABLE_ARCH_sh_TRUE@sh_libsim_a_DEPENDENCIES = sh/interp.o \
 861 @SIM_ENABLE_ARCH_sh_TRUE@       $(patsubst \
 862 @SIM_ENABLE_ARCH_sh_TRUE@       %,sh/%,$(SIM_NEW_COMMON_OBJS)) \
 863 @SIM_ENABLE_ARCH_sh_TRUE@       $(patsubst \
 864 @SIM_ENABLE_ARCH_sh_TRUE@       %,sh/dv-%.o,$(SIM_HW_DEVICES)) \
 865 @SIM_ENABLE_ARCH_sh_TRUE@       sh/table.o
 866 @SIM_ENABLE_ARCH_sh_TRUE@am_sh_libsim_a_OBJECTS = $(am__objects_1)
 867 @SIM_ENABLE_ARCH_sh_TRUE@nodist_sh_libsim_a_OBJECTS =  \
 868 @SIM_ENABLE_ARCH_sh_TRUE@       sh/modules.$(OBJEXT)
 869 sh_libsim_a_OBJECTS = $(am_sh_libsim_a_OBJECTS) \
 870         $(nodist_sh_libsim_a_OBJECTS)
 871 v850_libsim_a_AR = $(AR) $(ARFLAGS)
 872 @SIM_ENABLE_ARCH_v850_TRUE@v850_libsim_a_DEPENDENCIES = $(patsubst \
 873 @SIM_ENABLE_ARCH_v850_TRUE@     %,v850/%,$(SIM_NEW_COMMON_OBJS)) \
 874 @SIM_ENABLE_ARCH_v850_TRUE@     $(patsubst \
 875 @SIM_ENABLE_ARCH_v850_TRUE@     %,v850/dv-%.o,$(SIM_HW_DEVICES)) \
 876 @SIM_ENABLE_ARCH_v850_TRUE@     v850/simops.o v850/interp.o \
 877 @SIM_ENABLE_ARCH_v850_TRUE@     v850/itable.o v850/semantics.o \
 878 @SIM_ENABLE_ARCH_v850_TRUE@     v850/idecode.o v850/icache.o \
 879 @SIM_ENABLE_ARCH_v850_TRUE@     v850/engine.o v850/irun.o \
 880 @SIM_ENABLE_ARCH_v850_TRUE@     v850/support.o v850/sim-resume.o
 881 @SIM_ENABLE_ARCH_v850_TRUE@am_v850_libsim_a_OBJECTS =  \
 882 @SIM_ENABLE_ARCH_v850_TRUE@     $(am__objects_1)
 883 @SIM_ENABLE_ARCH_v850_TRUE@nodist_v850_libsim_a_OBJECTS =  \
 884 @SIM_ENABLE_ARCH_v850_TRUE@     v850/modules.$(OBJEXT)
 885 v850_libsim_a_OBJECTS = $(am_v850_libsim_a_OBJECTS) \
 886         $(nodist_v850_libsim_a_OBJECTS)
 887 am__EXEEXT_1 = $(IGEN) igen/filter$(EXEEXT) igen/gen$(EXEEXT) \
 888         igen/ld-cache$(EXEEXT) igen/ld-decode$(EXEEXT) \
 889         igen/ld-insn$(EXEEXT) igen/table$(EXEEXT)
 890 @SIM_ENABLE_ARCH_cr16_TRUE@am__EXEEXT_2 = cr16/gencode$(EXEEXT)
 891 @SIM_ENABLE_ARCH_d10v_TRUE@am__EXEEXT_3 = d10v/gencode$(EXEEXT)
 892 @SIM_ENABLE_ARCH_m32c_TRUE@am__EXEEXT_4 = m32c/opc2c$(EXEEXT)
 893 @SIM_ENABLE_ARCH_m68hc11_TRUE@am__EXEEXT_5 = m68hc11/gencode$(EXEEXT)
 894 @SIM_ENABLE_ARCH_sh_TRUE@am__EXEEXT_6 = sh/gencode$(EXEEXT)
 895 am__EXEEXT_7 = testsuite/common/bits32m0$(EXEEXT) \
 896         testsuite/common/bits32m31$(EXEEXT) \
 897         testsuite/common/bits64m0$(EXEEXT) \
 898         testsuite/common/bits64m63$(EXEEXT) \
 899         testsuite/common/alu-tst$(EXEEXT)
 900 @SIM_ENABLE_ARCH_cris_TRUE@am__EXEEXT_8 = cris/rvdummy$(EXEEXT)
 901 @SIM_ENABLE_ARCH_aarch64_TRUE@am__EXEEXT_9 = aarch64/run$(EXEEXT)
 902 @SIM_ENABLE_ARCH_arm_TRUE@am__EXEEXT_10 = arm/run$(EXEEXT)
 903 @SIM_ENABLE_ARCH_avr_TRUE@am__EXEEXT_11 = avr/run$(EXEEXT)
 904 @SIM_ENABLE_ARCH_bfin_TRUE@am__EXEEXT_12 = bfin/run$(EXEEXT)
 905 @SIM_ENABLE_ARCH_bpf_TRUE@am__EXEEXT_13 = bpf/run$(EXEEXT)
 906 @SIM_ENABLE_ARCH_cr16_TRUE@am__EXEEXT_14 = cr16/run$(EXEEXT)
 907 @SIM_ENABLE_ARCH_cris_TRUE@am__EXEEXT_15 = cris/run$(EXEEXT)
 908 @SIM_ENABLE_ARCH_d10v_TRUE@am__EXEEXT_16 = d10v/run$(EXEEXT)
 909 @SIM_ENABLE_ARCH_erc32_TRUE@am__EXEEXT_17 = erc32/run$(EXEEXT) \
 910 @SIM_ENABLE_ARCH_erc32_TRUE@    erc32/sis$(EXEEXT)
 911 @SIM_ENABLE_ARCH_examples_TRUE@am__EXEEXT_18 =  \
 912 @SIM_ENABLE_ARCH_examples_TRUE@ example-synacor/run$(EXEEXT)
 913 @SIM_ENABLE_ARCH_frv_TRUE@am__EXEEXT_19 = frv/run$(EXEEXT)
 914 @SIM_ENABLE_ARCH_ft32_TRUE@am__EXEEXT_20 = ft32/run$(EXEEXT)
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1222         $(nodist_moxie_libsim_a_SOURCES) $(msp430_libsim_a_SOURCES) \
1223         $(nodist_msp430_libsim_a_SOURCES) $(or1k_libsim_a_SOURCES) \
1224         $(nodist_or1k_libsim_a_SOURCES) $(pru_libsim_a_SOURCES) \
1225         $(nodist_pru_libsim_a_SOURCES) $(riscv_libsim_a_SOURCES) \
1226         $(nodist_riscv_libsim_a_SOURCES) $(rl78_libsim_a_SOURCES) \
1227         $(nodist_rl78_libsim_a_SOURCES) $(rx_libsim_a_SOURCES) \
1228         $(nodist_rx_libsim_a_SOURCES) $(sh_libsim_a_SOURCES) \
1229         $(nodist_sh_libsim_a_SOURCES) $(v850_libsim_a_SOURCES) \
1230         $(nodist_v850_libsim_a_SOURCES) $(aarch64_run_SOURCES) \
1231         $(arm_run_SOURCES) $(avr_run_SOURCES) $(bfin_run_SOURCES) \
1232         $(bpf_run_SOURCES) $(cr16_gencode_SOURCES) $(cr16_run_SOURCES) \
1233         $(cris_run_SOURCES) $(cris_rvdummy_SOURCES) \
1234         $(d10v_gencode_SOURCES) $(d10v_run_SOURCES) \
1235         $(erc32_run_SOURCES) erc32/sis.c \
1236         $(example_synacor_run_SOURCES) $(frv_run_SOURCES) \
1237         $(ft32_run_SOURCES) $(h8300_run_SOURCES) \
1238         $(igen_filter_SOURCES) $(igen_gen_SOURCES) \
1239         $(igen_igen_SOURCES) $(igen_ld_cache_SOURCES) \
1240         $(igen_ld_decode_SOURCES) $(igen_ld_insn_SOURCES) \
1241         $(igen_table_SOURCES) $(iq2000_run_SOURCES) \
1242         $(lm32_run_SOURCES) $(m32c_opc2c_SOURCES) $(m32c_run_SOURCES) \
1243         $(m32r_run_SOURCES) $(m68hc11_gencode_SOURCES) \
1244         $(m68hc11_run_SOURCES) $(mcore_run_SOURCES) \
1245         $(microblaze_run_SOURCES) $(mips_run_SOURCES) \
1246         $(mn10300_run_SOURCES) $(moxie_run_SOURCES) \
1247         $(msp430_run_SOURCES) $(or1k_run_SOURCES) $(ppc_run_SOURCES) \
1248         $(pru_run_SOURCES) $(riscv_run_SOURCES) $(rl78_run_SOURCES) \
1249         $(rx_run_SOURCES) $(sh_gencode_SOURCES) $(sh_run_SOURCES) \
1250         testsuite/common/alu-tst.c testsuite/common/bits-gen.c \
1251         testsuite/common/bits32m0.c testsuite/common/bits32m31.c \
1252         testsuite/common/bits64m0.c testsuite/common/bits64m63.c \
1253         testsuite/common/fpu-tst.c $(v850_run_SOURCES)
1254 RECURSIVE_TARGETS = all-recursive check-recursive cscopelist-recursive \
1255         ctags-recursive dvi-recursive html-recursive info-recursive \
1256         install-data-recursive install-dvi-recursive \
1257         install-exec-recursive install-html-recursive \
1258         install-info-recursive install-pdf-recursive \
1259         install-ps-recursive install-recursive installcheck-recursive \
1260         installdirs-recursive pdf-recursive ps-recursive \
1261         tags-recursive uninstall-recursive
1262 am__can_run_installinfo = \
1263   case $$AM_UPDATE_INFO_DIR in \
1264     n|no|NO) false;; \
1265     *) (install-info --version) >/dev/null 2>&1;; \
1266   esac
1267 am__vpath_adj_setup = srcdirstrip=`echo "$(srcdir)" | sed 's|.|.|g'`;
1268 am__vpath_adj = case $$p in \
1269     $(srcdir)/*) f=`echo "$$p" | sed "s|^$$srcdirstrip/||"`;; \
1270     *) f=$$p;; \
1271   esac;
1272 am__strip_dir = f=`echo $$p | sed -e 's|^.*/||'`;
1273 am__install_max = 40
1274 am__nobase_strip_setup = \
1275   srcdirstrip=`echo "$(srcdir)" | sed 's/[].[^$$\\*|]/\\\\&/g'`
1276 am__nobase_strip = \
1277   for p in $$list; do echo "$$p"; done | sed -e "s|$$srcdirstrip/||"
1278 am__nobase_list = $(am__nobase_strip_setup); \
1279   for p in $$list; do echo "$$p $$p"; done | \
1280   sed "s| $$srcdirstrip/| |;"' / .*\//!s/ .*/ ./; s,\( .*\)/[^/]*$$,\1,' | \
1281   $(AWK) 'BEGIN { files["."] = "" } { files[$$2] = files[$$2] " " $$1; \
1282     if (++n[$$2] == $(am__install_max)) \
1283       { print $$2, files[$$2]; n[$$2] = 0; files[$$2] = "" } } \
1284     END { for (dir in files) print dir, files[dir] }'
1285 am__base_list = \
1286   sed '$$!N;$$!N;$$!N;$$!N;$$!N;$$!N;$$!N;s/\n/ /g' | \
1287   sed '$$!N;$$!N;$$!N;$$!N;s/\n/ /g'
1288 am__uninstall_files_from_dir = { \
1289   test -z "$$files" \
1290     || { test ! -d "$$dir" && test ! -f "$$dir" && test ! -r "$$dir"; } \
1291     || { echo " ( cd '$$dir' && rm -f" $$files ")"; \
1292          $(am__cd) "$$dir" && rm -f $$files; }; \
1293   }
1294 am__installdirs = "$(DESTDIR)$(armdocdir)" "$(DESTDIR)$(dtbdir)" \
1295         "$(DESTDIR)$(erc32docdir)" "$(DESTDIR)$(frvdocdir)" \
1296         "$(DESTDIR)$(or1kdocdir)" "$(DESTDIR)$(ppcdocdir)" \
1297         "$(DESTDIR)$(rxdocdir)" "$(DESTDIR)$(pkgincludedir)"
1298 DATA = $(armdoc_DATA) $(dtb_DATA) $(erc32doc_DATA) $(frvdoc_DATA) \
1299         $(or1kdoc_DATA) $(ppcdoc_DATA) $(rxdoc_DATA)
1300 am__pkginclude_HEADERS_DIST = $(srcroot)/include/sim/callback.h \
1301         $(srcroot)/include/sim/sim.h
1302 HEADERS = $(pkginclude_HEADERS)
1303 RECURSIVE_CLEAN_TARGETS = mostlyclean-recursive clean-recursive \
1304   distclean-recursive maintainer-clean-recursive
1305 am__recursive_targets = \
1306   $(RECURSIVE_TARGETS) \
1307   $(RECURSIVE_CLEAN_TARGETS) \
1308   $(am__extra_recursive_targets)
1309 AM_RECURSIVE_TARGETS = $(am__recursive_targets:-recursive=) TAGS CTAGS \
1310         cscope check recheck
1311 am__tagged_files = $(HEADERS) $(SOURCES) $(TAGS_FILES) \
1312         $(LISP)config.h.in
1313 # Read a list of newline-separated strings from the standard input,
1314 # and print each of them once, without duplicates.  Input order is
1315 # *not* preserved.
1316 am__uniquify_input = $(AWK) '\
1317   BEGIN { nonempty = 0; } \
1318   { items[$$0] = 1; nonempty = 1; } \
1319   END { if (nonempty) { for (i in items) print i; }; } \
1320 '
1321 # Make sure the list of sources is unique.  This is necessary because,
1322 # e.g., the same source file might be shared among _SOURCES variables
1323 # for different programs/libraries.
1324 am__define_uniq_tagged_files = \
1325   list='$(am__tagged_files)'; \
1326   unique=`for i in $$list; do \
1327     if test -f "$$i"; then echo $$i; else echo $(srcdir)/$$i; fi; \
1328   done | $(am__uniquify_input)`
1329 ETAGS = etags
1330 CTAGS = ctags
1331 CSCOPE = cscope
1332 DEJATOOL = $(PACKAGE)
1333 RUNTESTDEFAULTFLAGS = --tool $$tool --srcdir $$srcdir
1334 EXPECT = expect
1335 RUNTEST = runtest
1336 am__tty_colors_dummy = \
1337   mgn= red= grn= lgn= blu= brg= std=; \
1338   am__color_tests=no
1339 am__tty_colors = { \
1340   $(am__tty_colors_dummy); \
1341   if test "X$(AM_COLOR_TESTS)" = Xno; then \
1342     am__color_tests=no; \
1343   elif test "X$(AM_COLOR_TESTS)" = Xalways; then \
1344     am__color_tests=yes; \
1345   elif test "X$$TERM" != Xdumb && { test -t 1; } 2>/dev/null; then \
1346     am__color_tests=yes; \
1347   fi; \
1348   if test $$am__color_tests = yes; then \
1349     red='\e[0;31m'; \
1350     grn='\e[0;32m'; \
1351     lgn='\e[1;32m'; \
1352     blu='\e[1;34m'; \
1353     mgn='\e[0;35m'; \
1354     brg='\e[1m'; \
1355     std='\e[m'; \
1356   fi; \
1357 }
1358 am__recheck_rx = ^[     ]*:recheck:[    ]*
1359 am__global_test_result_rx = ^[  ]*:global-test-result:[         ]*
1360 am__copy_in_global_log_rx = ^[  ]*:copy-in-global-log:[         ]*
1361 # A command that, given a newline-separated list of test names on the
1362 # standard input, print the name of the tests that are to be re-run
1363 # upon "make recheck".
1364 am__list_recheck_tests = $(AWK) '{ \
1365   recheck = 1; \
1366   while ((rc = (getline line < ($$0 ".trs"))) != 0) \
1367     { \
1368       if (rc < 0) \
1369         { \
1370           if ((getline line2 < ($$0 ".log")) < 0) \
1371             recheck = 0; \
1372           break; \
1373         } \
1374       else if (line ~ /$(am__recheck_rx)[nN][Oo]/) \
1375         { \
1376           recheck = 0; \
1377           break; \
1378         } \
1379       else if (line ~ /$(am__recheck_rx)[yY][eE][sS]/) \
1380         { \
1381           break; \
1382         } \
1383     }; \
1384   if (recheck) \
1385     print $$0; \
1386   close ($$0 ".trs"); \
1387   close ($$0 ".log"); \
1388 }'
1389 # A command that, given a newline-separated list of test names on the
1390 # standard input, create the global log from their .trs and .log files.
1391 am__create_global_log = $(AWK) ' \
1392 function fatal(msg) \
1393 { \
1394   print "fatal: making $@: " msg | "cat >&2"; \
1395   exit 1; \
1396 } \
1397 function rst_section(header) \
1398 { \
1399   print header; \
1400   len = length(header); \
1401   for (i = 1; i <= len; i = i + 1) \
1402     printf "="; \
1403   printf "\n\n"; \
1404 } \
1405 { \
1406   copy_in_global_log = 1; \
1407   global_test_result = "RUN"; \
1408   while ((rc = (getline line < ($$0 ".trs"))) != 0) \
1409     { \
1410       if (rc < 0) \
1411          fatal("failed to read from " $$0 ".trs"); \
1412       if (line ~ /$(am__global_test_result_rx)/) \
1413         { \
1414           sub("$(am__global_test_result_rx)", "", line); \
1415           sub("[        ]*$$", "", line); \
1416           global_test_result = line; \
1417         } \
1418       else if (line ~ /$(am__copy_in_global_log_rx)[nN][oO]/) \
1419         copy_in_global_log = 0; \
1420     }; \
1421   if (copy_in_global_log) \
1422     { \
1423       rst_section(global_test_result ": " $$0); \
1424       while ((rc = (getline line < ($$0 ".log"))) != 0) \
1425       { \
1426         if (rc < 0) \
1427           fatal("failed to read from " $$0 ".log"); \
1428         print line; \
1429       }; \
1430       printf "\n"; \
1431     }; \
1432   close ($$0 ".trs"); \
1433   close ($$0 ".log"); \
1434 }'
1435 # Restructured Text title.
1436 am__rst_title = { sed 's/.*/   &   /;h;s/./=/g;p;x;s/ *$$//;p;g' && echo; }
1437 # Solaris 10 'make', and several other traditional 'make' implementations,
1438 # pass "-e" to $(SHELL), and POSIX 2008 even requires this.  Work around it
1439 # by disabling -e (using the XSI extension "set +e") if it's set.
1440 am__sh_e_setup = case $$- in *e*) set +e;; esac
1441 # Default flags passed to test drivers.
1442 am__common_driver_flags = \
1443   --color-tests "$$am__color_tests" \
1444   --enable-hard-errors "$$am__enable_hard_errors" \
1445   --expect-failure "$$am__expect_failure"
1446 # To be inserted before the command running the test.  Creates the
1447 # directory for the log if needed.  Stores in $dir the directory
1448 # containing $f, in $tst the test, in $log the log.  Executes the
1449 # developer- defined test setup AM_TESTS_ENVIRONMENT (if any), and
1450 # passes TESTS_ENVIRONMENT.  Set up options for the wrapper that
1451 # will run the test scripts (or their associated LOG_COMPILER, if
1452 # thy have one).
1453 am__check_pre = \
1454 $(am__sh_e_setup);                                      \
1455 $(am__vpath_adj_setup) $(am__vpath_adj)                 \
1456 $(am__tty_colors);                                      \
1457 srcdir=$(srcdir); export srcdir;                        \
1458 case "$@" in                                            \
1459   */*) am__odir=`echo "./$@" | sed 's|/[^/]*$$||'`;;    \
1460     *) am__odir=.;;                                     \
1461 esac;                                                   \
1462 test "x$$am__odir" = x"." || test -d "$$am__odir"       \
1463   || $(MKDIR_P) "$$am__odir" || exit $$?;               \
1464 if test -f "./$$f"; then dir=./;                        \
1465 elif test -f "$$f"; then dir=;                          \
1466 else dir="$(srcdir)/"; fi;                              \
1467 tst=$$dir$$f; log='$@';                                 \
1468 if test -n '$(DISABLE_HARD_ERRORS)'; then               \
1469   am__enable_hard_errors=no;                            \
1470 else                                                    \
1471   am__enable_hard_errors=yes;                           \
1472 fi;                                                     \
1473 case " $(XFAIL_TESTS) " in                              \
1474   *[\ \ ]$$f[\ \        ]* | *[\ \      ]$$dir$$f[\ \   ]*) \
1475     am__expect_failure=yes;;                            \
1476   *)                                                    \
1477     am__expect_failure=no;;                             \
1478 esac;                                                   \
1479 $(AM_TESTS_ENVIRONMENT) $(TESTS_ENVIRONMENT)
1480 # A shell command to get the names of the tests scripts with any registered
1481 # extension removed (i.e., equivalently, the names of the test logs, with
1482 # the '.log' extension removed).  The result is saved in the shell variable
1483 # '$bases'.  This honors runtime overriding of TESTS and TEST_LOGS.  Sadly,
1484 # we cannot use something simpler, involving e.g., "$(TEST_LOGS:.log=)",
1485 # since that might cause problem with VPATH rewrites for suffix-less tests.
1486 # See also 'test-harness-vpath-rewrite.sh' and 'test-trs-basic.sh'.
1487 am__set_TESTS_bases = \
1488   bases='$(TEST_LOGS)'; \
1489   bases=`for i in $$bases; do echo $$i; done | sed 's/\.log$$//'`; \
1490   bases=`echo $$bases`
1491 RECHECK_LOGS = $(TEST_LOGS)
1492 TEST_SUITE_LOG = test-suite.log
1493 TEST_EXTENSIONS = @EXEEXT@ .test
1494 LOG_DRIVER = $(SHELL) $(top_srcdir)/../test-driver
1495 LOG_COMPILE = $(LOG_COMPILER) $(AM_LOG_FLAGS) $(LOG_FLAGS)
1496 am__set_b = \
1497   case '$@' in \
1498     */*) \
1499       case '$*' in \
1500         */*) b='$*';; \
1501           *) b=`echo '$@' | sed 's/\.log$$//'`; \
1502        esac;; \
1503     *) \
1504       b='$*';; \
1505   esac
1506 am__test_logs1 = $(TESTS:=.log)
1507 am__test_logs2 = $(am__test_logs1:@EXEEXT@.log=.log)
1508 TEST_LOGS = $(am__test_logs2:.test.log=.log)
1509 TEST_LOG_DRIVER = $(SHELL) $(top_srcdir)/../test-driver
1510 TEST_LOG_COMPILE = $(TEST_LOG_COMPILER) $(AM_TEST_LOG_FLAGS) \
1511         $(TEST_LOG_FLAGS)
1512 DIST_SUBDIRS = $(SUBDIRS)
1513 ACLOCAL = @ACLOCAL@
1514 AMTAR = @AMTAR@
1515 AM_DEFAULT_VERBOSITY = @AM_DEFAULT_VERBOSITY@
1516 AR = @AR@
1517 AR_FOR_BUILD = @AR_FOR_BUILD@
1518 AS_FOR_TARGET = @AS_FOR_TARGET@
1519 AS_FOR_TARGET_AARCH64 = @AS_FOR_TARGET_AARCH64@
1520 AS_FOR_TARGET_ARM = @AS_FOR_TARGET_ARM@
1521 AS_FOR_TARGET_AVR = @AS_FOR_TARGET_AVR@
1522 AS_FOR_TARGET_BFIN = @AS_FOR_TARGET_BFIN@
1523 AS_FOR_TARGET_BPF = @AS_FOR_TARGET_BPF@
1524 AS_FOR_TARGET_CR16 = @AS_FOR_TARGET_CR16@
1525 AS_FOR_TARGET_CRIS = @AS_FOR_TARGET_CRIS@
1526 AS_FOR_TARGET_D10V = @AS_FOR_TARGET_D10V@
1527 AS_FOR_TARGET_ERC32 = @AS_FOR_TARGET_ERC32@
1528 AS_FOR_TARGET_EXAMPLE_SYNACOR = @AS_FOR_TARGET_EXAMPLE_SYNACOR@
1529 AS_FOR_TARGET_FRV = @AS_FOR_TARGET_FRV@
1530 AS_FOR_TARGET_FT32 = @AS_FOR_TARGET_FT32@
1531 AS_FOR_TARGET_H8300 = @AS_FOR_TARGET_H8300@
1532 AS_FOR_TARGET_IQ2000 = @AS_FOR_TARGET_IQ2000@
1533 AS_FOR_TARGET_LM32 = @AS_FOR_TARGET_LM32@
1534 AS_FOR_TARGET_M32C = @AS_FOR_TARGET_M32C@
1535 AS_FOR_TARGET_M32R = @AS_FOR_TARGET_M32R@
1536 AS_FOR_TARGET_M68HC11 = @AS_FOR_TARGET_M68HC11@
1537 AS_FOR_TARGET_MCORE = @AS_FOR_TARGET_MCORE@
1538 AS_FOR_TARGET_MICROBLAZE = @AS_FOR_TARGET_MICROBLAZE@
1539 AS_FOR_TARGET_MIPS = @AS_FOR_TARGET_MIPS@
1540 AS_FOR_TARGET_MN10300 = @AS_FOR_TARGET_MN10300@
1541 AS_FOR_TARGET_MOXIE = @AS_FOR_TARGET_MOXIE@
1542 AS_FOR_TARGET_MSP430 = @AS_FOR_TARGET_MSP430@
1543 AS_FOR_TARGET_OR1K = @AS_FOR_TARGET_OR1K@
1544 AS_FOR_TARGET_PPC = @AS_FOR_TARGET_PPC@
1545 AS_FOR_TARGET_PRU = @AS_FOR_TARGET_PRU@
1546 AS_FOR_TARGET_RISCV = @AS_FOR_TARGET_RISCV@
1547 AS_FOR_TARGET_RL78 = @AS_FOR_TARGET_RL78@
1548 AS_FOR_TARGET_RX = @AS_FOR_TARGET_RX@
1549 AS_FOR_TARGET_SH = @AS_FOR_TARGET_SH@
1550 AS_FOR_TARGET_V850 = @AS_FOR_TARGET_V850@
1551 AUTOCONF = @AUTOCONF@
1552 AUTOHEADER = @AUTOHEADER@
1553 AUTOMAKE = @AUTOMAKE@
1554 AWK = @AWK@
1555 CC = @CC@
1556 CCDEPMODE = @CCDEPMODE@
1557 CC_FOR_BUILD = @CC_FOR_BUILD@
1558 CC_FOR_TARGET = @CC_FOR_TARGET@
1559 CC_FOR_TARGET_AARCH64 = @CC_FOR_TARGET_AARCH64@
1560 CC_FOR_TARGET_ARM = @CC_FOR_TARGET_ARM@
1561 CC_FOR_TARGET_AVR = @CC_FOR_TARGET_AVR@
1562 CC_FOR_TARGET_BFIN = @CC_FOR_TARGET_BFIN@
1563 CC_FOR_TARGET_BPF = @CC_FOR_TARGET_BPF@
1564 CC_FOR_TARGET_CR16 = @CC_FOR_TARGET_CR16@
1565 CC_FOR_TARGET_CRIS = @CC_FOR_TARGET_CRIS@
1566 CC_FOR_TARGET_D10V = @CC_FOR_TARGET_D10V@
1567 CC_FOR_TARGET_ERC32 = @CC_FOR_TARGET_ERC32@
1568 CC_FOR_TARGET_EXAMPLE_SYNACOR = @CC_FOR_TARGET_EXAMPLE_SYNACOR@
1569 CC_FOR_TARGET_FRV = @CC_FOR_TARGET_FRV@
1570 CC_FOR_TARGET_FT32 = @CC_FOR_TARGET_FT32@
1571 CC_FOR_TARGET_H8300 = @CC_FOR_TARGET_H8300@
1572 CC_FOR_TARGET_IQ2000 = @CC_FOR_TARGET_IQ2000@
1573 CC_FOR_TARGET_LM32 = @CC_FOR_TARGET_LM32@
1574 CC_FOR_TARGET_M32C = @CC_FOR_TARGET_M32C@
1575 CC_FOR_TARGET_M32R = @CC_FOR_TARGET_M32R@
1576 CC_FOR_TARGET_M68HC11 = @CC_FOR_TARGET_M68HC11@
1577 CC_FOR_TARGET_MCORE = @CC_FOR_TARGET_MCORE@
1578 CC_FOR_TARGET_MICROBLAZE = @CC_FOR_TARGET_MICROBLAZE@
1579 CC_FOR_TARGET_MIPS = @CC_FOR_TARGET_MIPS@
1580 CC_FOR_TARGET_MN10300 = @CC_FOR_TARGET_MN10300@
1581 CC_FOR_TARGET_MOXIE = @CC_FOR_TARGET_MOXIE@
1582 CC_FOR_TARGET_MSP430 = @CC_FOR_TARGET_MSP430@
1583 CC_FOR_TARGET_OR1K = @CC_FOR_TARGET_OR1K@
1584 CC_FOR_TARGET_PPC = @CC_FOR_TARGET_PPC@
1585 CC_FOR_TARGET_PRU = @CC_FOR_TARGET_PRU@
1586 CC_FOR_TARGET_RISCV = @CC_FOR_TARGET_RISCV@
1587 CC_FOR_TARGET_RL78 = @CC_FOR_TARGET_RL78@
1588 CC_FOR_TARGET_RX = @CC_FOR_TARGET_RX@
1589 CC_FOR_TARGET_SH = @CC_FOR_TARGET_SH@
1590 CC_FOR_TARGET_V850 = @CC_FOR_TARGET_V850@
1591 CFLAGS = @CFLAGS@
1592 CFLAGS_FOR_BUILD = @CFLAGS_FOR_BUILD@
1593 CGEN_MAINT = @CGEN_MAINT@
1594 CPP = @CPP@
1595 CPPFLAGS = @CPPFLAGS@
1596 CPPFLAGS_FOR_BUILD = @CPPFLAGS_FOR_BUILD@
1597 CYGPATH_W = @CYGPATH_W@
1598 C_DIALECT = @C_DIALECT@
1599 DEFS = @DEFS@
1600 DEPDIR = @DEPDIR@
1601 DSYMUTIL = @DSYMUTIL@
1602 DTC = @DTC@
1603 DUMPBIN = @DUMPBIN@
1604 ECHO_C = @ECHO_C@
1605 ECHO_N = @ECHO_N@
1606 ECHO_T = @ECHO_T@
1607 EGREP = @EGREP@
1608 EXEEXT = @EXEEXT@
1609 FGREP = @FGREP@
1610 GREP = @GREP@
1611 IGEN_FLAGS_SMP = @IGEN_FLAGS_SMP@
1612 INSTALL = @INSTALL@
1613 INSTALL_DATA = @INSTALL_DATA@
1614 INSTALL_PROGRAM = @INSTALL_PROGRAM@
1615 INSTALL_SCRIPT = @INSTALL_SCRIPT@
1616 INSTALL_STRIP_PROGRAM = @INSTALL_STRIP_PROGRAM@
1617 LD = @LD@
1618 LDFLAGS = @LDFLAGS@
1619 LDFLAGS_FOR_BUILD = @LDFLAGS_FOR_BUILD@
1620 LD_FOR_TARGET = @LD_FOR_TARGET@
1621 LD_FOR_TARGET_AARCH64 = @LD_FOR_TARGET_AARCH64@
1622 LD_FOR_TARGET_ARM = @LD_FOR_TARGET_ARM@
1623 LD_FOR_TARGET_AVR = @LD_FOR_TARGET_AVR@
1624 LD_FOR_TARGET_BFIN = @LD_FOR_TARGET_BFIN@
1625 LD_FOR_TARGET_BPF = @LD_FOR_TARGET_BPF@
1626 LD_FOR_TARGET_CR16 = @LD_FOR_TARGET_CR16@
1627 LD_FOR_TARGET_CRIS = @LD_FOR_TARGET_CRIS@
1628 LD_FOR_TARGET_D10V = @LD_FOR_TARGET_D10V@
1629 LD_FOR_TARGET_ERC32 = @LD_FOR_TARGET_ERC32@
1630 LD_FOR_TARGET_EXAMPLE_SYNACOR = @LD_FOR_TARGET_EXAMPLE_SYNACOR@
1631 LD_FOR_TARGET_FRV = @LD_FOR_TARGET_FRV@
1632 LD_FOR_TARGET_FT32 = @LD_FOR_TARGET_FT32@
1633 LD_FOR_TARGET_H8300 = @LD_FOR_TARGET_H8300@
1634 LD_FOR_TARGET_IQ2000 = @LD_FOR_TARGET_IQ2000@
1635 LD_FOR_TARGET_LM32 = @LD_FOR_TARGET_LM32@
1636 LD_FOR_TARGET_M32C = @LD_FOR_TARGET_M32C@
1637 LD_FOR_TARGET_M32R = @LD_FOR_TARGET_M32R@
1638 LD_FOR_TARGET_M68HC11 = @LD_FOR_TARGET_M68HC11@
1639 LD_FOR_TARGET_MCORE = @LD_FOR_TARGET_MCORE@
1640 LD_FOR_TARGET_MICROBLAZE = @LD_FOR_TARGET_MICROBLAZE@
1641 LD_FOR_TARGET_MIPS = @LD_FOR_TARGET_MIPS@
1642 LD_FOR_TARGET_MN10300 = @LD_FOR_TARGET_MN10300@
1643 LD_FOR_TARGET_MOXIE = @LD_FOR_TARGET_MOXIE@
1644 LD_FOR_TARGET_MSP430 = @LD_FOR_TARGET_MSP430@
1645 LD_FOR_TARGET_OR1K = @LD_FOR_TARGET_OR1K@
1646 LD_FOR_TARGET_PPC = @LD_FOR_TARGET_PPC@
1647 LD_FOR_TARGET_PRU = @LD_FOR_TARGET_PRU@
1648 LD_FOR_TARGET_RISCV = @LD_FOR_TARGET_RISCV@
1649 LD_FOR_TARGET_RL78 = @LD_FOR_TARGET_RL78@
1650 LD_FOR_TARGET_RX = @LD_FOR_TARGET_RX@
1651 LD_FOR_TARGET_SH = @LD_FOR_TARGET_SH@
1652 LD_FOR_TARGET_V850 = @LD_FOR_TARGET_V850@
1653 LIBOBJS = @LIBOBJS@
1654 LIBS = @LIBS@
1655 LIBTOOL = @LIBTOOL@
1656 LIPO = @LIPO@
1657 LN_S = @LN_S@
1658 LTLIBOBJS = @LTLIBOBJS@
1659 MAINT = @MAINT@
1660 MAKEINFO = @MAKEINFO@
1661 MKDIR_P = @MKDIR_P@
1662 NM = @NM@
1663 NMEDIT = @NMEDIT@
1664 OBJDUMP = @OBJDUMP@
1665 OBJEXT = @OBJEXT@
1666 OTOOL = @OTOOL@
1667 OTOOL64 = @OTOOL64@
1668 PACKAGE = @PACKAGE@
1669 PACKAGE_BUGREPORT = @PACKAGE_BUGREPORT@
1670 PACKAGE_NAME = @PACKAGE_NAME@
1671 PACKAGE_STRING = @PACKAGE_STRING@
1672 PACKAGE_TARNAME = @PACKAGE_TARNAME@
1673 PACKAGE_URL = @PACKAGE_URL@
1674 PACKAGE_VERSION = @PACKAGE_VERSION@
1675 PATH_SEPARATOR = @PATH_SEPARATOR@
1676 PKGVERSION = @PKGVERSION@
1677 PKG_CONFIG = @PKG_CONFIG@
1678 PKG_CONFIG_LIBDIR = @PKG_CONFIG_LIBDIR@
1679 PKG_CONFIG_PATH = @PKG_CONFIG_PATH@
1680 RANLIB = @RANLIB@
1681 RANLIB_FOR_BUILD = @RANLIB_FOR_BUILD@
1682 READLINE_CFLAGS = @READLINE_CFLAGS@
1683 READLINE_LIB = @READLINE_LIB@
1684 REPORT_BUGS_TEXI = @REPORT_BUGS_TEXI@
1685 REPORT_BUGS_TO = @REPORT_BUGS_TO@
1686 SDL_CFLAGS = @SDL_CFLAGS@
1687 SDL_LIBS = @SDL_LIBS@
1688 SED = @SED@
1689 SET_MAKE = @SET_MAKE@
1690 SHELL = @SHELL@
1691 SIM_ENABLED_ARCHES = @SIM_ENABLED_ARCHES@
1692 SIM_FRV_TRAPDUMP_FLAGS = @SIM_FRV_TRAPDUMP_FLAGS@
1693 SIM_HW_CFLAGS = @SIM_HW_CFLAGS@
1694 SIM_HW_SOCKSER = @SIM_HW_SOCKSER@
1695 SIM_INLINE = @SIM_INLINE@
1696 SIM_MIPS_BITSIZE = @SIM_MIPS_BITSIZE@
1697 SIM_MIPS_FPU_BITSIZE = @SIM_MIPS_FPU_BITSIZE@
1698 SIM_MIPS_GEN = @SIM_MIPS_GEN@
1699 SIM_MIPS_IGEN_ITABLE_FLAGS = @SIM_MIPS_IGEN_ITABLE_FLAGS@
1700 SIM_MIPS_M16_FLAGS = @SIM_MIPS_M16_FLAGS@
1701 SIM_MIPS_MULTI_IGEN_CONFIGS = @SIM_MIPS_MULTI_IGEN_CONFIGS@
1702 SIM_MIPS_MULTI_OBJ = @SIM_MIPS_MULTI_OBJ@
1703 SIM_MIPS_MULTI_SRC = @SIM_MIPS_MULTI_SRC@
1704 SIM_MIPS_SINGLE_FLAGS = @SIM_MIPS_SINGLE_FLAGS@
1705 SIM_MIPS_SUBTARGET = @SIM_MIPS_SUBTARGET@
1706 SIM_PRIMARY_TARGET = @SIM_PRIMARY_TARGET@
1707 SIM_RISCV_BITSIZE = @SIM_RISCV_BITSIZE@
1708 SIM_RX_CYCLE_ACCURATE_FLAGS = @SIM_RX_CYCLE_ACCURATE_FLAGS@
1709 SIM_TOOLCHAIN_VARS = @SIM_TOOLCHAIN_VARS@
1710 STRIP = @STRIP@
1711 TERMCAP_LIB = @TERMCAP_LIB@
1712 VERSION = @VERSION@
1713 WARN_CFLAGS = @WARN_CFLAGS@
1714 WERROR_CFLAGS = @WERROR_CFLAGS@
1715 abs_builddir = @abs_builddir@
1716 abs_srcdir = @abs_srcdir@
1717 abs_top_builddir = @abs_top_builddir@
1718 abs_top_srcdir = @abs_top_srcdir@
1719 ac_ct_CC = @ac_ct_CC@
1720 ac_ct_DUMPBIN = @ac_ct_DUMPBIN@
1721 am__include = @am__include@
1722 am__leading_dot = @am__leading_dot@
1723 am__quote = @am__quote@
1724 am__tar = @am__tar@
1725 am__untar = @am__untar@
1726 bindir = @bindir@
1727 build = @build@
1728 build_alias = @build_alias@
1729 build_cpu = @build_cpu@
1730 build_os = @build_os@
1731 build_vendor = @build_vendor@
1732 builddir = @builddir@
1733 cgen = @cgen@
1734 cgendir = @cgendir@
1735 datadir = @datadir@
1736 datarootdir = @datarootdir@
1737 docdir = @docdir@
1738 dvidir = @dvidir@
1739 exec_prefix = @exec_prefix@
1740 host = @host@
1741 host_alias = @host_alias@
1742 host_cpu = @host_cpu@
1743 host_os = @host_os@
1744 host_vendor = @host_vendor@
1745 htmldir = @htmldir@
1746 includedir = @includedir@
1747 infodir = @infodir@
1748 install_sh = @install_sh@
1749 libdir = @libdir@
1750 libexecdir = @libexecdir@
1751 localedir = @localedir@
1752 localstatedir = @localstatedir@
1753 mandir = @mandir@
1754 mkdir_p = @mkdir_p@
1755 oldincludedir = @oldincludedir@
1756 pdfdir = @pdfdir@
1757 prefix = @prefix@
1758 program_transform_name = @program_transform_name@
1759 psdir = @psdir@
1760 sbindir = @sbindir@
1761 sharedstatedir = @sharedstatedir@
1762 srcdir = @srcdir@
1763 subdirs = @subdirs@
1764 sysconfdir = @sysconfdir@
1765 target = @target@
1766 target_alias = @target_alias@
1767 target_cpu = @target_cpu@
1768 target_os = @target_os@
1769 target_vendor = @target_vendor@
1770 top_build_prefix = @top_build_prefix@
1771 top_builddir = @top_builddir@
1772 top_srcdir = @top_srcdir@
1773 AUTOMAKE_OPTIONS = dejagnu foreign no-dist subdir-objects
1774 ACLOCAL_AMFLAGS = -Im4 -I.. -I../config
1775 GNULIB_PARENT_DIR = ..
1776 srccom = $(srcdir)/common
1777 srcroot = $(srcdir)/..
1778 SUBDIRS = @subdirs@
1779 pkginclude_HEADERS = $(am__append_1)
1780 EXTRA_LIBRARIES = igen/libigen.a
1781 noinst_LIBRARIES = common/libcommon.a $(am__append_3) $(am__append_5) \
1782         $(am__append_7) $(am__append_9) $(am__append_11) \
1783         $(am__append_15) $(am__append_20) $(am__append_25) \
1784         $(am__append_30) $(am__append_34) $(am__append_36) \
1785         $(am__append_40) $(am__append_42) $(am__append_44) \
1786         $(am__append_48) $(am__append_52) $(am__append_56) \
1787         $(am__append_60) $(am__append_64) $(am__append_66) \
1788         $(am__append_71) $(am__append_79) $(am__append_83) \
1789         $(am__append_85) $(am__append_87) $(am__append_93) \
1790         $(am__append_95) $(am__append_97) $(am__append_99) \
1791         $(am__append_101) $(am__append_106)
1792 BUILT_SOURCES = $(am__append_13) $(am__append_17) $(am__append_23) \
1793         $(am__append_27) $(am__append_38) $(am__append_46) \
1794         $(am__append_50) $(am__append_58) $(am__append_73) \
1795         $(am__append_81) $(am__append_89) $(am__append_103) \
1796         $(am__append_108)
1797 CLEANFILES = common/version.c common/version.c-stamp \
1798         testsuite/common/bits-gen testsuite/common/bits32m0.c \
1799         testsuite/common/bits32m31.c testsuite/common/bits64m0.c \
1800         testsuite/common/bits64m63.c
1801 DISTCLEANFILES = $(am__append_78)
1802 MOSTLYCLEANFILES = core $(SIM_ENABLED_ARCHES:%=%/*.o) \
1803         $(SIM_ENABLED_ARCHES:%=%/hw-config.h) \
1804         $(SIM_ENABLED_ARCHES:%=%/stamp-hw) \
1805         $(SIM_ENABLED_ARCHES:%=%/modules.c) \
1806         $(SIM_ENABLED_ARCHES:%=%/stamp-modules) $(igen_IGEN_TOOLS) \
1807         site-sim-config.exp testrun.log testrun.sum $(am__append_14) \
1808         $(am__append_19) $(am__append_24) $(am__append_29) \
1809         $(am__append_39) $(am__append_47) $(am__append_51) \
1810         $(am__append_55) $(am__append_59) $(am__append_63) \
1811         $(am__append_77) $(am__append_82) $(am__append_90) \
1812         $(am__append_105) $(am__append_109)
1813 AM_CFLAGS = \
1814         $(WERROR_CFLAGS) \
1815         $(WARN_CFLAGS) \
1816         $(AM_CFLAGS_$(subst -,_,$(@D))) \
1817         $(AM_CFLAGS_$(subst -,_,$(@D)_$(@F)))
1818
1819 AM_CPPFLAGS = $(INCGNU) -I$(srcroot) -I$(srcroot)/include -I../bfd \
1820         -I.. -I$(@D) -I$(srcdir)/$(@D) $(SIM_HW_CFLAGS) $(SIM_INLINE) \
1821         $(AM_CPPFLAGS_$(subst -,_,$(@D))) $(AM_CPPFLAGS_$(subst \
1822         -,_,$(@D)_$(@F))) -I$(srcdir)/common -DSIM_TOPDIR_BUILD
1823 AM_CPPFLAGS_FOR_BUILD = -I$(srcroot)/include $(SIM_HW_CFLAGS) \
1824         $(SIM_INLINE) -I$(srcdir)/common
1825 COMPILE_FOR_BUILD = $(CC_FOR_BUILD) $(AM_CPPFLAGS_FOR_BUILD) $(CPPFLAGS_FOR_BUILD) $(CFLAGS_FOR_BUILD)
1826 LINK_FOR_BUILD = $(CC_FOR_BUILD) $(CFLAGS_FOR_BUILD) $(LDFLAGS_FOR_BUILD) -o $@
1827 SIM_ALL_RECURSIVE_DEPS = $(am__append_91)
1828 SIM_INSTALL_DATA_LOCAL_DEPS =
1829 SIM_INSTALL_EXEC_LOCAL_DEPS = $(am__append_32)
1830 SIM_UNINSTALL_LOCAL_DEPS = $(am__append_33)
1831 SIM_DEPBASE = $(@D)/$(DEPDIR)/$(@F:.o=)
1832 SIM_COMPILE = \
1833         $(AM_V_CC)$(COMPILE) -MT $@ -MD -MP -MF $(SIM_DEPBASE).Tpo -c -o $@ $< && \
1834         $(am__mv) $(SIM_DEPBASE).Tpo $(SIM_DEPBASE).Po
1835
1836 AM_CPPFLAGS_common = -DSIM_COMMON_BUILD
1837 common_libcommon_a_SOURCES = \
1838         common/callback.c \
1839         common/portability.c \
1840         common/sim-load.c \
1841         common/sim-signal.c \
1842         common/syscall.c \
1843         common/target-newlib-errno.c \
1844         common/target-newlib-open.c \
1845         common/target-newlib-signal.c \
1846         common/target-newlib-syscall.c \
1847         common/version.c
1848
1849 SIM_COMMON_HW_OBJS = \
1850         hw-alloc.o \
1851         hw-base.o \
1852         hw-device.o \
1853         hw-events.o \
1854         hw-handles.o \
1855         hw-instances.o \
1856         hw-ports.o \
1857         hw-properties.o \
1858         hw-tree.o \
1859         sim-hw.o
1860
1861 SIM_NEW_COMMON_OBJS = sim-arange.o sim-bits.o sim-close.o \
1862         sim-command.o sim-config.o sim-core.o sim-cpu.o sim-endian.o \
1863         sim-engine.o sim-events.o sim-fpu.o sim-hload.o sim-hrw.o \
1864         sim-io.o sim-info.o sim-memopt.o sim-model.o sim-module.o \
1865         sim-options.o sim-profile.o sim-reason.o sim-reg.o sim-stop.o \
1866         sim-syscall.o sim-trace.o sim-utils.o sim-watch.o \
1867         $(am__append_2)
1868 SIM_HW_DEVICES = cfi core pal glue
1869 am_arch_d = $(subst -,_,$(@D))
1870 GEN_MODULES_C_SRCS = \
1871         $(wildcard \
1872                 $(patsubst %,$(srcdir)/%,$($(am_arch_d)_libsim_a_SOURCES)) \
1873                 $(patsubst %.o,$(srcdir)/%.c,$($(am_arch_d)_libsim_a_OBJECTS) $($(am_arch_d)_libsim_a_LIBADD)) \
1874                 $(filter-out %.o,$(patsubst $(@D)/%.o,$(srcdir)/common/%.c,$($(am_arch_d)_libsim_a_LIBADD))))
1875
1876 LIBIBERTY_LIB = ../libiberty/libiberty.a
1877 BFD_LIB = ../bfd/libbfd.la
1878 OPCODES_LIB = ../opcodes/libopcodes.la
1879 SIM_COMMON_LIBS = \
1880         $(BFD_LIB) \
1881         $(OPCODES_LIB) \
1882         $(LIBIBERTY_LIB) \
1883         $(LIBGNU) \
1884         $(LIBGNU_EXTRA_LIBS)
1885
1886 GUILE = $(or $(wildcard ../guile/libguile/guile),guile)
1887 CGEN = "$(GUILE) -l $(cgendir)/guile.scm -s"
1888 CGENFLAGS = -v
1889 CGEN_CPU_DIR = $(cgendir)/cpu
1890 CPU_DIR = $(srcroot)/cpu
1891 CGEN_ARCHFILE = $(CPU_DIR)/$(@D).cpu
1892 CGEN_READ_SCM = $(cgendir)/sim.scm
1893 CGEN_ARCH_SCM = $(cgendir)/sim-arch.scm
1894 CGEN_CPU_SCM = $(cgendir)/sim-cpu.scm $(cgendir)/sim-model.scm
1895 CGEN_DECODE_SCM = $(cgendir)/sim-decode.scm
1896 CGEN_DESC_SCM = $(cgendir)/desc.scm $(cgendir)/desc-cpu.scm
1897 CGEN_CPU_EXTR = /extr/
1898 CGEN_CPU_READ = /read/
1899 CGEN_CPU_WRITE = /write/
1900 CGEN_CPU_SEM = /sem/
1901 CGEN_CPU_SEMSW = /semsw/
1902 CGEN_WRAPPER = $(srccom)/cgen.sh
1903 CGEN_GEN_ARCH = \
1904         $(SHELL) $(CGEN_WRAPPER) arch $(srcdir)/$(@D) \
1905                 $(CGEN) $(cgendir) "$(CGENFLAGS)" \
1906                 $(@D) "$$FLAGS" ignored "$$isa" $$mach ignored \
1907                 $(CGEN_ARCHFILE) ignored
1908
1909 CGEN_GEN_CPU = \
1910         $(SHELL) $(CGEN_WRAPPER) cpu $(srcdir)/$(@D) \
1911                 $(CGEN) $(cgendir) "$(CGENFLAGS)" \
1912                 $(@D) "$$FLAGS" $$cpu "$$isa" $$mach "$$SUFFIX" \
1913                 $(CGEN_ARCHFILE) "$$EXTRAFILES"
1914
1915 CGEN_GEN_DEFS = \
1916         $(SHELL) $(CGEN_WRAPPER) defs $(srcdir)/$(@D) \
1917                 $(CGEN) $(cgendir) "$(CGENFLAGS)" \
1918                 $(@D) "$$FLAGS" $$cpu "$$isa" $$mach "$$SUFFIX" \
1919                 $(CGEN_ARCHFILE) ignored
1920
1921 CGEN_GEN_DECODE = \
1922         $(SHELL) $(CGEN_WRAPPER) decode $(srcdir)/$(@D) \
1923                 $(CGEN) $(cgendir) "$(CGENFLAGS)" \
1924                 $(@D) "$$FLAGS" $$cpu "$$isa" $$mach "$$SUFFIX" \
1925                 $(CGEN_ARCHFILE) "$$EXTRAFILES"
1926
1927 CGEN_GEN_CPU_DECODE = \
1928         $(SHELL) $(CGEN_WRAPPER) cpu-decode $(srcdir)/$(@D) \
1929                 $(CGEN) $(cgendir) "$(CGENFLAGS)" \
1930                 $(@D) "$$FLAGS" $$cpu "$$isa" $$mach "$$SUFFIX" \
1931                 $(CGEN_ARCHFILE) "$$EXTRAFILES"
1932
1933 CGEN_GEN_CPU_DESC = \
1934         $(SHELL) $(CGEN_WRAPPER) desc $(srcdir)/$(@D) \
1935                 $(CGEN) $(cgendir) "$(CGENFLAGS)" \
1936                 $(@D) "$$FLAGS" $$cpu "$$isa" $$mach "$$SUFFIX" \
1937                 $(CGEN_ARCHFILE) ignored $$opcfile
1938
1939
1940 # igen leaks memory, and therefore makes AddressSanitizer unhappy.  Disable
1941 # leak detection while running it.
1942 IGEN = igen/igen$(EXEEXT)
1943 IGEN_RUN = ASAN_OPTIONS=detect_leaks=0 $(IGEN) $(IGEN_FLAGS_SMP)
1944 igen_libigen_a_SOURCES = \
1945         igen/table.c \
1946         igen/lf.c \
1947         igen/misc.c \
1948         igen/filter_host.c \
1949         igen/ld-decode.c \
1950         igen/ld-cache.c \
1951         igen/filter.c \
1952         igen/ld-insn.c \
1953         igen/gen-model.c \
1954         igen/gen-itable.c \
1955         igen/gen-icache.c \
1956         igen/gen-semantics.c \
1957         igen/gen-idecode.c \
1958         igen/gen-support.c \
1959         igen/gen-engine.c \
1960         igen/gen.c
1961
1962 igen_igen_SOURCES = igen/igen.c
1963 igen_igen_LDADD = igen/libigen.a
1964 igen_filter_SOURCES =
1965 igen_filter_LDADD = igen/filter-main.o igen/libigen.a
1966 igen_gen_SOURCES =
1967 igen_gen_LDADD = igen/gen-main.o igen/libigen.a
1968 igen_ld_cache_SOURCES =
1969 igen_ld_cache_LDADD = igen/ld-cache-main.o igen/libigen.a
1970 igen_ld_decode_SOURCES =
1971 igen_ld_decode_LDADD = igen/ld-decode-main.o igen/libigen.a
1972 igen_ld_insn_SOURCES =
1973 igen_ld_insn_LDADD = igen/ld-insn-main.o igen/libigen.a
1974 igen_table_SOURCES =
1975 igen_table_LDADD = igen/table-main.o igen/libigen.a
1976 igen_IGEN_TOOLS = \
1977         $(IGEN) \
1978         igen/filter \
1979         igen/gen \
1980         igen/ld-cache \
1981         igen/ld-decode \
1982         igen/ld-insn \
1983         igen/table
1984
1985 EXTRA_DEJAGNU_SITE_CONFIG = site-sim-config.exp
1986
1987 # Custom verbose test variables that automake doesn't provide (yet?).
1988 AM_V_RUNTEST = $(AM_V_RUNTEST_@AM_V@)
1989 AM_V_RUNTEST_ = $(AM_V_RUNTEST_@AM_DEFAULT_V@)
1990 AM_V_RUNTEST_0 = @echo "  RUNTEST  $(RUNTESTFLAGS) $*";
1991 AM_V_RUNTEST_1 =
1992 DO_RUNTEST = \
1993         LC_ALL=C; export LC_ALL; \
1994         EXPECT=${EXPECT} ; export EXPECT ; \
1995         runtest=$(RUNTEST); \
1996         $$runtest $(RUNTESTFLAGS)
1997
1998 testsuite_common_CPPFLAGS = \
1999         -I$(srcdir)/common \
2000         -I$(srcroot)/include \
2001         -I../bfd
2002
2003 @SIM_ENABLE_ARCH_aarch64_TRUE@nodist_aarch64_libsim_a_SOURCES = \
2004 @SIM_ENABLE_ARCH_aarch64_TRUE@  aarch64/modules.c
2005
2006 @SIM_ENABLE_ARCH_aarch64_TRUE@aarch64_libsim_a_SOURCES = \
2007 @SIM_ENABLE_ARCH_aarch64_TRUE@  $(common_libcommon_a_SOURCES)
2008
2009 @SIM_ENABLE_ARCH_aarch64_TRUE@aarch64_libsim_a_LIBADD = \
2010 @SIM_ENABLE_ARCH_aarch64_TRUE@  $(patsubst %,aarch64/%,$(SIM_NEW_COMMON_OBJS)) \
2011 @SIM_ENABLE_ARCH_aarch64_TRUE@  $(patsubst %,aarch64/dv-%.o,$(SIM_HW_DEVICES)) \
2012 @SIM_ENABLE_ARCH_aarch64_TRUE@  aarch64/cpustate.o \
2013 @SIM_ENABLE_ARCH_aarch64_TRUE@  aarch64/interp.o \
2014 @SIM_ENABLE_ARCH_aarch64_TRUE@  aarch64/memory.o \
2015 @SIM_ENABLE_ARCH_aarch64_TRUE@  aarch64/sim-resume.o \
2016 @SIM_ENABLE_ARCH_aarch64_TRUE@  aarch64/simulator.o
2017
2018 @SIM_ENABLE_ARCH_aarch64_TRUE@aarch64_run_SOURCES =
2019 @SIM_ENABLE_ARCH_aarch64_TRUE@aarch64_run_LDADD = \
2020 @SIM_ENABLE_ARCH_aarch64_TRUE@  aarch64/nrun.o \
2021 @SIM_ENABLE_ARCH_aarch64_TRUE@  aarch64/libsim.a \
2022 @SIM_ENABLE_ARCH_aarch64_TRUE@  $(SIM_COMMON_LIBS)
2023
2024 @SIM_ENABLE_ARCH_arm_TRUE@AM_CPPFLAGS_arm = -DMODET
2025 @SIM_ENABLE_ARCH_arm_TRUE@nodist_arm_libsim_a_SOURCES = \
2026 @SIM_ENABLE_ARCH_arm_TRUE@      arm/modules.c
2027
2028 @SIM_ENABLE_ARCH_arm_TRUE@arm_libsim_a_SOURCES = \
2029 @SIM_ENABLE_ARCH_arm_TRUE@      $(common_libcommon_a_SOURCES)
2030
2031 @SIM_ENABLE_ARCH_arm_TRUE@arm_libsim_a_LIBADD = \
2032 @SIM_ENABLE_ARCH_arm_TRUE@      arm/wrapper.o \
2033 @SIM_ENABLE_ARCH_arm_TRUE@      $(patsubst %,arm/%,$(SIM_NEW_COMMON_OBJS)) \
2034 @SIM_ENABLE_ARCH_arm_TRUE@      $(patsubst %,arm/dv-%.o,$(SIM_HW_DEVICES)) \
2035 @SIM_ENABLE_ARCH_arm_TRUE@      arm/armemu.o \
2036 @SIM_ENABLE_ARCH_arm_TRUE@      arm/armemu32.o arm/arminit.o arm/armos.o arm/armsupp.o \
2037 @SIM_ENABLE_ARCH_arm_TRUE@      arm/armvirt.o arm/thumbemu.o \
2038 @SIM_ENABLE_ARCH_arm_TRUE@      arm/armcopro.o arm/maverick.o arm/iwmmxt.o
2039
2040 @SIM_ENABLE_ARCH_arm_TRUE@arm_run_SOURCES =
2041 @SIM_ENABLE_ARCH_arm_TRUE@arm_run_LDADD = \
2042 @SIM_ENABLE_ARCH_arm_TRUE@      arm/nrun.o \
2043 @SIM_ENABLE_ARCH_arm_TRUE@      arm/libsim.a \
2044 @SIM_ENABLE_ARCH_arm_TRUE@      $(SIM_COMMON_LIBS)
2045
2046 @SIM_ENABLE_ARCH_arm_TRUE@armdocdir = $(docdir)/arm
2047 @SIM_ENABLE_ARCH_arm_TRUE@armdoc_DATA = arm/README
2048 @SIM_ENABLE_ARCH_avr_TRUE@nodist_avr_libsim_a_SOURCES = \
2049 @SIM_ENABLE_ARCH_avr_TRUE@      avr/modules.c
2050
2051 @SIM_ENABLE_ARCH_avr_TRUE@avr_libsim_a_SOURCES = \
2052 @SIM_ENABLE_ARCH_avr_TRUE@      $(common_libcommon_a_SOURCES)
2053
2054 @SIM_ENABLE_ARCH_avr_TRUE@avr_libsim_a_LIBADD = \
2055 @SIM_ENABLE_ARCH_avr_TRUE@      avr/interp.o \
2056 @SIM_ENABLE_ARCH_avr_TRUE@      $(patsubst %,avr/%,$(SIM_NEW_COMMON_OBJS)) \
2057 @SIM_ENABLE_ARCH_avr_TRUE@      $(patsubst %,avr/dv-%.o,$(SIM_HW_DEVICES)) \
2058 @SIM_ENABLE_ARCH_avr_TRUE@      avr/sim-resume.o
2059
2060 @SIM_ENABLE_ARCH_avr_TRUE@avr_run_SOURCES =
2061 @SIM_ENABLE_ARCH_avr_TRUE@avr_run_LDADD = \
2062 @SIM_ENABLE_ARCH_avr_TRUE@      avr/nrun.o \
2063 @SIM_ENABLE_ARCH_avr_TRUE@      avr/libsim.a \
2064 @SIM_ENABLE_ARCH_avr_TRUE@      $(SIM_COMMON_LIBS)
2065
2066 @SIM_ENABLE_ARCH_bfin_TRUE@AM_CPPFLAGS_bfin = $(SDL_CFLAGS)
2067 @SIM_ENABLE_ARCH_bfin_TRUE@nodist_bfin_libsim_a_SOURCES = \
2068 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin/modules.c
2069
2070 @SIM_ENABLE_ARCH_bfin_TRUE@bfin_libsim_a_SOURCES = \
2071 @SIM_ENABLE_ARCH_bfin_TRUE@     $(common_libcommon_a_SOURCES)
2072
2073 @SIM_ENABLE_ARCH_bfin_TRUE@bfin_libsim_a_LIBADD = \
2074 @SIM_ENABLE_ARCH_bfin_TRUE@     $(patsubst %,bfin/%,$(SIM_NEW_COMMON_OBJS)) \
2075 @SIM_ENABLE_ARCH_bfin_TRUE@     $(patsubst %,bfin/dv-%.o,$(SIM_HW_DEVICES)) \
2076 @SIM_ENABLE_ARCH_bfin_TRUE@     $(patsubst %,bfin/dv-%.o,$(bfin_SIM_EXTRA_HW_DEVICES)) \
2077 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin/bfin-sim.o \
2078 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin/devices.o \
2079 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin/gui.o \
2080 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin/interp.o \
2081 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin/machs.o \
2082 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin/sim-resume.o
2083
2084 @SIM_ENABLE_ARCH_bfin_TRUE@bfin_run_SOURCES =
2085 @SIM_ENABLE_ARCH_bfin_TRUE@bfin_run_LDADD = \
2086 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin/nrun.o \
2087 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin/libsim.a \
2088 @SIM_ENABLE_ARCH_bfin_TRUE@     $(SIM_COMMON_LIBS)
2089
2090 @SIM_ENABLE_ARCH_bfin_TRUE@bfin_SIM_EXTRA_HW_DEVICES = \
2091 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin_cec \
2092 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin_ctimer \
2093 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin_dma \
2094 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin_dmac \
2095 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin_ebiu_amc \
2096 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin_ebiu_ddrc \
2097 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin_ebiu_sdc \
2098 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin_emac \
2099 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin_eppi \
2100 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin_evt \
2101 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin_gpio \
2102 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin_gpio2 \
2103 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin_gptimer \
2104 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin_jtag \
2105 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin_mmu \
2106 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin_nfc \
2107 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin_otp \
2108 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin_pfmon \
2109 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin_pint \
2110 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin_pll \
2111 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin_ppi \
2112 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin_rtc \
2113 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin_sic \
2114 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin_spi \
2115 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin_trace \
2116 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin_twi \
2117 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin_uart \
2118 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin_uart2 \
2119 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin_wdog \
2120 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin_wp \
2121 @SIM_ENABLE_ARCH_bfin_TRUE@     eth_phy
2122
2123 @SIM_ENABLE_ARCH_bpf_TRUE@AM_CPPFLAGS_bpf = -DWITH_TARGET_WORD_BITSIZE=64
2124 @SIM_ENABLE_ARCH_bpf_TRUE@AM_CPPFLAGS_bpf_mloop_le.o = -DWANT_ISA_EBPFLE
2125 @SIM_ENABLE_ARCH_bpf_TRUE@AM_CPPFLAGS_bpf_mloop_be.o = -DWANT_ISA_EBPFBE
2126 @SIM_ENABLE_ARCH_bpf_TRUE@AM_CPPFLAGS_bpf_decode_le.o = -DWANT_ISA_EBPFLE
2127 @SIM_ENABLE_ARCH_bpf_TRUE@AM_CPPFLAGS_bpf_decode_be.o = -DWANT_ISA_EBPFBE
2128 @SIM_ENABLE_ARCH_bpf_TRUE@AM_CPPFLAGS_bpf_sem_le.o = -DWANT_ISA_EBPFLE
2129 @SIM_ENABLE_ARCH_bpf_TRUE@AM_CPPFLAGS_bpf_sem_be.o = -DWANT_ISA_EBPFBE
2130 @SIM_ENABLE_ARCH_bpf_TRUE@nodist_bpf_libsim_a_SOURCES = \
2131 @SIM_ENABLE_ARCH_bpf_TRUE@      bpf/modules.c
2132
2133 @SIM_ENABLE_ARCH_bpf_TRUE@bpf_libsim_a_SOURCES = \
2134 @SIM_ENABLE_ARCH_bpf_TRUE@      $(common_libcommon_a_SOURCES)
2135
2136 @SIM_ENABLE_ARCH_bpf_TRUE@bpf_libsim_a_LIBADD = \
2137 @SIM_ENABLE_ARCH_bpf_TRUE@      $(patsubst %,bpf/%,$(SIM_NEW_COMMON_OBJS)) \
2138 @SIM_ENABLE_ARCH_bpf_TRUE@      $(patsubst %,bpf/dv-%.o,$(SIM_HW_DEVICES)) \
2139 @SIM_ENABLE_ARCH_bpf_TRUE@      \
2140 @SIM_ENABLE_ARCH_bpf_TRUE@      bpf/cgen-run.o \
2141 @SIM_ENABLE_ARCH_bpf_TRUE@      bpf/cgen-scache.o \
2142 @SIM_ENABLE_ARCH_bpf_TRUE@      bpf/cgen-trace.o \
2143 @SIM_ENABLE_ARCH_bpf_TRUE@      bpf/cgen-utils.o \
2144 @SIM_ENABLE_ARCH_bpf_TRUE@      \
2145 @SIM_ENABLE_ARCH_bpf_TRUE@      bpf/arch.o \
2146 @SIM_ENABLE_ARCH_bpf_TRUE@      bpf/cpu.o \
2147 @SIM_ENABLE_ARCH_bpf_TRUE@      bpf/decode-le.o \
2148 @SIM_ENABLE_ARCH_bpf_TRUE@      bpf/decode-be.o \
2149 @SIM_ENABLE_ARCH_bpf_TRUE@      bpf/sem-le.o \
2150 @SIM_ENABLE_ARCH_bpf_TRUE@      bpf/sem-be.o \
2151 @SIM_ENABLE_ARCH_bpf_TRUE@      bpf/mloop-le.o \
2152 @SIM_ENABLE_ARCH_bpf_TRUE@      bpf/mloop-be.o \
2153 @SIM_ENABLE_ARCH_bpf_TRUE@      \
2154 @SIM_ENABLE_ARCH_bpf_TRUE@      bpf/bpf.o \
2155 @SIM_ENABLE_ARCH_bpf_TRUE@      bpf/bpf-helpers.o \
2156 @SIM_ENABLE_ARCH_bpf_TRUE@      bpf/sim-if.o \
2157 @SIM_ENABLE_ARCH_bpf_TRUE@      bpf/traps.o
2158
2159 @SIM_ENABLE_ARCH_bpf_TRUE@bpf_run_SOURCES =
2160 @SIM_ENABLE_ARCH_bpf_TRUE@bpf_run_LDADD = \
2161 @SIM_ENABLE_ARCH_bpf_TRUE@      bpf/nrun.o \
2162 @SIM_ENABLE_ARCH_bpf_TRUE@      bpf/libsim.a \
2163 @SIM_ENABLE_ARCH_bpf_TRUE@      $(SIM_COMMON_LIBS)
2164
2165 @SIM_ENABLE_ARCH_bpf_TRUE@bpf_BUILD_OUTPUTS = \
2166 @SIM_ENABLE_ARCH_bpf_TRUE@      bpf/mloop-le.c \
2167 @SIM_ENABLE_ARCH_bpf_TRUE@      bpf/stamp-mloop-le \
2168 @SIM_ENABLE_ARCH_bpf_TRUE@      bpf/mloop-be.c \
2169 @SIM_ENABLE_ARCH_bpf_TRUE@      bpf/stamp-mloop-be
2170
2171 @SIM_ENABLE_ARCH_cr16_TRUE@nodist_cr16_libsim_a_SOURCES = \
2172 @SIM_ENABLE_ARCH_cr16_TRUE@     cr16/modules.c
2173
2174 @SIM_ENABLE_ARCH_cr16_TRUE@cr16_libsim_a_SOURCES = \
2175 @SIM_ENABLE_ARCH_cr16_TRUE@     $(common_libcommon_a_SOURCES)
2176
2177 @SIM_ENABLE_ARCH_cr16_TRUE@cr16_libsim_a_LIBADD = \
2178 @SIM_ENABLE_ARCH_cr16_TRUE@     $(patsubst %,cr16/%,$(SIM_NEW_COMMON_OBJS)) \
2179 @SIM_ENABLE_ARCH_cr16_TRUE@     $(patsubst %,cr16/dv-%.o,$(SIM_HW_DEVICES)) \
2180 @SIM_ENABLE_ARCH_cr16_TRUE@     cr16/interp.o \
2181 @SIM_ENABLE_ARCH_cr16_TRUE@     cr16/sim-resume.o \
2182 @SIM_ENABLE_ARCH_cr16_TRUE@     cr16/simops.o \
2183 @SIM_ENABLE_ARCH_cr16_TRUE@     cr16/table.o
2184
2185 @SIM_ENABLE_ARCH_cr16_TRUE@cr16_run_SOURCES =
2186 @SIM_ENABLE_ARCH_cr16_TRUE@cr16_run_LDADD = \
2187 @SIM_ENABLE_ARCH_cr16_TRUE@     cr16/nrun.o \
2188 @SIM_ENABLE_ARCH_cr16_TRUE@     cr16/libsim.a \
2189 @SIM_ENABLE_ARCH_cr16_TRUE@     $(SIM_COMMON_LIBS)
2190
2191 @SIM_ENABLE_ARCH_cr16_TRUE@cr16_BUILD_OUTPUTS = \
2192 @SIM_ENABLE_ARCH_cr16_TRUE@     cr16/gencode$(EXEEXT) \
2193 @SIM_ENABLE_ARCH_cr16_TRUE@     cr16/table.c
2194
2195 @SIM_ENABLE_ARCH_cr16_TRUE@cr16_gencode_SOURCES = cr16/gencode.c
2196 @SIM_ENABLE_ARCH_cr16_TRUE@cr16_gencode_LDADD = cr16/cr16-opc.o
2197 @SIM_ENABLE_ARCH_cris_TRUE@nodist_cris_libsim_a_SOURCES = \
2198 @SIM_ENABLE_ARCH_cris_TRUE@     cris/modules.c
2199
2200 @SIM_ENABLE_ARCH_cris_TRUE@cris_libsim_a_SOURCES = \
2201 @SIM_ENABLE_ARCH_cris_TRUE@     $(common_libcommon_a_SOURCES)
2202
2203 @SIM_ENABLE_ARCH_cris_TRUE@cris_libsim_a_LIBADD = \
2204 @SIM_ENABLE_ARCH_cris_TRUE@     $(patsubst %,cris/%,$(SIM_NEW_COMMON_OBJS)) \
2205 @SIM_ENABLE_ARCH_cris_TRUE@     $(patsubst %,cris/dv-%.o,$(SIM_HW_DEVICES)) \
2206 @SIM_ENABLE_ARCH_cris_TRUE@     $(patsubst %,cris/dv-%.o,$(cris_SIM_EXTRA_HW_DEVICES)) \
2207 @SIM_ENABLE_ARCH_cris_TRUE@     \
2208 @SIM_ENABLE_ARCH_cris_TRUE@     cris/cgen-run.o \
2209 @SIM_ENABLE_ARCH_cris_TRUE@     cris/cgen-scache.o \
2210 @SIM_ENABLE_ARCH_cris_TRUE@     cris/cgen-trace.o \
2211 @SIM_ENABLE_ARCH_cris_TRUE@     cris/cgen-utils.o \
2212 @SIM_ENABLE_ARCH_cris_TRUE@     \
2213 @SIM_ENABLE_ARCH_cris_TRUE@     cris/arch.o \
2214 @SIM_ENABLE_ARCH_cris_TRUE@     cris/crisv10f.o \
2215 @SIM_ENABLE_ARCH_cris_TRUE@     cris/cpuv10.o \
2216 @SIM_ENABLE_ARCH_cris_TRUE@     cris/decodev10.o \
2217 @SIM_ENABLE_ARCH_cris_TRUE@     cris/modelv10.o \
2218 @SIM_ENABLE_ARCH_cris_TRUE@     cris/mloopv10f.o \
2219 @SIM_ENABLE_ARCH_cris_TRUE@     cris/crisv32f.o \
2220 @SIM_ENABLE_ARCH_cris_TRUE@     cris/cpuv32.o \
2221 @SIM_ENABLE_ARCH_cris_TRUE@     cris/decodev32.o \
2222 @SIM_ENABLE_ARCH_cris_TRUE@     cris/modelv32.o \
2223 @SIM_ENABLE_ARCH_cris_TRUE@     cris/mloopv32f.o \
2224 @SIM_ENABLE_ARCH_cris_TRUE@     \
2225 @SIM_ENABLE_ARCH_cris_TRUE@     cris/sim-if.o \
2226 @SIM_ENABLE_ARCH_cris_TRUE@     cris/traps.o
2227
2228 @SIM_ENABLE_ARCH_cris_TRUE@cris_run_SOURCES =
2229 @SIM_ENABLE_ARCH_cris_TRUE@cris_run_LDADD = \
2230 @SIM_ENABLE_ARCH_cris_TRUE@     cris/nrun.o \
2231 @SIM_ENABLE_ARCH_cris_TRUE@     cris/libsim.a \
2232 @SIM_ENABLE_ARCH_cris_TRUE@     $(SIM_COMMON_LIBS)
2233
2234 @SIM_ENABLE_ARCH_cris_TRUE@cris_SIM_EXTRA_HW_DEVICES = rv cris cris_900000xx
2235 @SIM_ENABLE_ARCH_cris_TRUE@cris_rvdummy_SOURCES = cris/rvdummy.c
2236 @SIM_ENABLE_ARCH_cris_TRUE@cris_rvdummy_LDADD = $(LIBIBERTY_LIB)
2237 @SIM_ENABLE_ARCH_cris_TRUE@cris_BUILD_OUTPUTS = \
2238 @SIM_ENABLE_ARCH_cris_TRUE@     cris/mloopv10f.c \
2239 @SIM_ENABLE_ARCH_cris_TRUE@     cris/stamp-mloop-v10f \
2240 @SIM_ENABLE_ARCH_cris_TRUE@     cris/mloopv32f.c \
2241 @SIM_ENABLE_ARCH_cris_TRUE@     cris/stamp-mloop-v32f
2242
2243 @SIM_ENABLE_ARCH_d10v_TRUE@nodist_d10v_libsim_a_SOURCES = \
2244 @SIM_ENABLE_ARCH_d10v_TRUE@     d10v/modules.c
2245
2246 @SIM_ENABLE_ARCH_d10v_TRUE@d10v_libsim_a_SOURCES = \
2247 @SIM_ENABLE_ARCH_d10v_TRUE@     $(common_libcommon_a_SOURCES)
2248
2249 @SIM_ENABLE_ARCH_d10v_TRUE@d10v_libsim_a_LIBADD = \
2250 @SIM_ENABLE_ARCH_d10v_TRUE@     d10v/interp.o \
2251 @SIM_ENABLE_ARCH_d10v_TRUE@     $(patsubst %,d10v/%,$(SIM_NEW_COMMON_OBJS)) \
2252 @SIM_ENABLE_ARCH_d10v_TRUE@     $(patsubst %,d10v/dv-%.o,$(SIM_HW_DEVICES)) \
2253 @SIM_ENABLE_ARCH_d10v_TRUE@     d10v/endian.o \
2254 @SIM_ENABLE_ARCH_d10v_TRUE@     d10v/sim-resume.o \
2255 @SIM_ENABLE_ARCH_d10v_TRUE@     d10v/simops.o \
2256 @SIM_ENABLE_ARCH_d10v_TRUE@     d10v/table.o
2257
2258 @SIM_ENABLE_ARCH_d10v_TRUE@d10v_run_SOURCES =
2259 @SIM_ENABLE_ARCH_d10v_TRUE@d10v_run_LDADD = \
2260 @SIM_ENABLE_ARCH_d10v_TRUE@     d10v/nrun.o \
2261 @SIM_ENABLE_ARCH_d10v_TRUE@     d10v/libsim.a \
2262 @SIM_ENABLE_ARCH_d10v_TRUE@     $(SIM_COMMON_LIBS)
2263
2264 @SIM_ENABLE_ARCH_d10v_TRUE@d10v_BUILD_OUTPUTS = \
2265 @SIM_ENABLE_ARCH_d10v_TRUE@     d10v/gencode$(EXEEXT) \
2266 @SIM_ENABLE_ARCH_d10v_TRUE@     d10v/table.c
2267
2268 @SIM_ENABLE_ARCH_d10v_TRUE@d10v_gencode_SOURCES = d10v/gencode.c
2269 @SIM_ENABLE_ARCH_d10v_TRUE@d10v_gencode_LDADD = d10v/d10v-opc.o
2270 @SIM_ENABLE_ARCH_erc32_TRUE@READLINE_SRC = $(srcroot)/readline/readline
2271 @SIM_ENABLE_ARCH_erc32_TRUE@AM_CPPFLAGS_erc32 = $(READLINE_CFLAGS) \
2272 @SIM_ENABLE_ARCH_erc32_TRUE@    -DFAST_UART
2273 @SIM_ENABLE_ARCH_erc32_TRUE@nodist_erc32_libsim_a_SOURCES = \
2274 @SIM_ENABLE_ARCH_erc32_TRUE@    erc32/modules.c
2275
2276 @SIM_ENABLE_ARCH_erc32_TRUE@erc32_libsim_a_SOURCES = \
2277 @SIM_ENABLE_ARCH_erc32_TRUE@    $(common_libcommon_a_SOURCES)
2278
2279 @SIM_ENABLE_ARCH_erc32_TRUE@erc32_libsim_a_LIBADD = \
2280 @SIM_ENABLE_ARCH_erc32_TRUE@    erc32/erc32.o \
2281 @SIM_ENABLE_ARCH_erc32_TRUE@    erc32/exec.o \
2282 @SIM_ENABLE_ARCH_erc32_TRUE@    erc32/float.o \
2283 @SIM_ENABLE_ARCH_erc32_TRUE@    erc32/func.o \
2284 @SIM_ENABLE_ARCH_erc32_TRUE@    erc32/help.o \
2285 @SIM_ENABLE_ARCH_erc32_TRUE@    erc32/interf.o
2286
2287 @SIM_ENABLE_ARCH_erc32_TRUE@erc32_run_SOURCES =
2288 @SIM_ENABLE_ARCH_erc32_TRUE@erc32_run_LDADD = \
2289 @SIM_ENABLE_ARCH_erc32_TRUE@    erc32/sis.o \
2290 @SIM_ENABLE_ARCH_erc32_TRUE@    erc32/libsim.a \
2291 @SIM_ENABLE_ARCH_erc32_TRUE@    $(SIM_COMMON_LIBS) $(READLINE_LIB) $(TERMCAP_LIB)
2292
2293 @SIM_ENABLE_ARCH_erc32_TRUE@erc32docdir = $(docdir)/erc32
2294 @SIM_ENABLE_ARCH_erc32_TRUE@erc32doc_DATA = erc32/README.erc32 erc32/README.gdb erc32/README.sis
2295 @SIM_ENABLE_ARCH_examples_TRUE@nodist_example_synacor_libsim_a_SOURCES = \
2296 @SIM_ENABLE_ARCH_examples_TRUE@ example-synacor/modules.c
2297
2298 @SIM_ENABLE_ARCH_examples_TRUE@example_synacor_libsim_a_SOURCES = \
2299 @SIM_ENABLE_ARCH_examples_TRUE@ $(common_libcommon_a_SOURCES)
2300
2301 @SIM_ENABLE_ARCH_examples_TRUE@example_synacor_libsim_a_LIBADD = \
2302 @SIM_ENABLE_ARCH_examples_TRUE@ $(patsubst %,example-synacor/%,$(SIM_NEW_COMMON_OBJS)) \
2303 @SIM_ENABLE_ARCH_examples_TRUE@ $(patsubst %,example-synacor/dv-%.o,$(SIM_HW_DEVICES)) \
2304 @SIM_ENABLE_ARCH_examples_TRUE@ example-synacor/interp.o \
2305 @SIM_ENABLE_ARCH_examples_TRUE@ example-synacor/sim-main.o \
2306 @SIM_ENABLE_ARCH_examples_TRUE@ example-synacor/sim-resume.o
2307
2308 @SIM_ENABLE_ARCH_examples_TRUE@example_synacor_run_SOURCES =
2309 @SIM_ENABLE_ARCH_examples_TRUE@example_synacor_run_LDADD = \
2310 @SIM_ENABLE_ARCH_examples_TRUE@ example-synacor/nrun.o \
2311 @SIM_ENABLE_ARCH_examples_TRUE@ example-synacor/libsim.a \
2312 @SIM_ENABLE_ARCH_examples_TRUE@ $(SIM_COMMON_LIBS)
2313
2314 @SIM_ENABLE_ARCH_frv_TRUE@AM_CPPFLAGS_frv = $(SIM_FRV_TRAPDUMP_FLAGS)
2315 @SIM_ENABLE_ARCH_frv_TRUE@AM_CFLAGS_frv_memory.o = -Wno-error
2316 @SIM_ENABLE_ARCH_frv_TRUE@AM_CFLAGS_frv_sem.o = -Wno-error
2317 @SIM_ENABLE_ARCH_frv_TRUE@nodist_frv_libsim_a_SOURCES = \
2318 @SIM_ENABLE_ARCH_frv_TRUE@      frv/modules.c
2319
2320 @SIM_ENABLE_ARCH_frv_TRUE@frv_libsim_a_SOURCES = \
2321 @SIM_ENABLE_ARCH_frv_TRUE@      $(common_libcommon_a_SOURCES)
2322
2323 @SIM_ENABLE_ARCH_frv_TRUE@frv_libsim_a_LIBADD = \
2324 @SIM_ENABLE_ARCH_frv_TRUE@      $(patsubst %,frv/%,$(SIM_NEW_COMMON_OBJS)) \
2325 @SIM_ENABLE_ARCH_frv_TRUE@      $(patsubst %,frv/dv-%.o,$(SIM_HW_DEVICES)) \
2326 @SIM_ENABLE_ARCH_frv_TRUE@      \
2327 @SIM_ENABLE_ARCH_frv_TRUE@      frv/cgen-accfp.o \
2328 @SIM_ENABLE_ARCH_frv_TRUE@      frv/cgen-fpu.o \
2329 @SIM_ENABLE_ARCH_frv_TRUE@      frv/cgen-run.o \
2330 @SIM_ENABLE_ARCH_frv_TRUE@      frv/cgen-scache.o \
2331 @SIM_ENABLE_ARCH_frv_TRUE@      frv/cgen-trace.o \
2332 @SIM_ENABLE_ARCH_frv_TRUE@      frv/cgen-utils.o \
2333 @SIM_ENABLE_ARCH_frv_TRUE@      \
2334 @SIM_ENABLE_ARCH_frv_TRUE@      frv/arch.o \
2335 @SIM_ENABLE_ARCH_frv_TRUE@      frv/cgen-par.o \
2336 @SIM_ENABLE_ARCH_frv_TRUE@      frv/cpu.o \
2337 @SIM_ENABLE_ARCH_frv_TRUE@      frv/decode.o \
2338 @SIM_ENABLE_ARCH_frv_TRUE@      frv/frv.o \
2339 @SIM_ENABLE_ARCH_frv_TRUE@      frv/mloop.o \
2340 @SIM_ENABLE_ARCH_frv_TRUE@      frv/model.o \
2341 @SIM_ENABLE_ARCH_frv_TRUE@      frv/sem.o \
2342 @SIM_ENABLE_ARCH_frv_TRUE@      \
2343 @SIM_ENABLE_ARCH_frv_TRUE@      frv/cache.o \
2344 @SIM_ENABLE_ARCH_frv_TRUE@      frv/interrupts.o \
2345 @SIM_ENABLE_ARCH_frv_TRUE@      frv/memory.o \
2346 @SIM_ENABLE_ARCH_frv_TRUE@      frv/options.o \
2347 @SIM_ENABLE_ARCH_frv_TRUE@      frv/pipeline.o \
2348 @SIM_ENABLE_ARCH_frv_TRUE@      frv/profile.o \
2349 @SIM_ENABLE_ARCH_frv_TRUE@      frv/profile-fr400.o \
2350 @SIM_ENABLE_ARCH_frv_TRUE@      frv/profile-fr450.o \
2351 @SIM_ENABLE_ARCH_frv_TRUE@      frv/profile-fr500.o \
2352 @SIM_ENABLE_ARCH_frv_TRUE@      frv/profile-fr550.o \
2353 @SIM_ENABLE_ARCH_frv_TRUE@      frv/registers.o \
2354 @SIM_ENABLE_ARCH_frv_TRUE@      frv/reset.o \
2355 @SIM_ENABLE_ARCH_frv_TRUE@      frv/sim-if.o \
2356 @SIM_ENABLE_ARCH_frv_TRUE@      frv/traps.o
2357
2358 @SIM_ENABLE_ARCH_frv_TRUE@frv_run_SOURCES =
2359 @SIM_ENABLE_ARCH_frv_TRUE@frv_run_LDADD = \
2360 @SIM_ENABLE_ARCH_frv_TRUE@      frv/nrun.o \
2361 @SIM_ENABLE_ARCH_frv_TRUE@      frv/libsim.a \
2362 @SIM_ENABLE_ARCH_frv_TRUE@      $(SIM_COMMON_LIBS)
2363
2364 @SIM_ENABLE_ARCH_frv_TRUE@frvdocdir = $(docdir)/frv
2365 @SIM_ENABLE_ARCH_frv_TRUE@frvdoc_DATA = frv/README
2366 @SIM_ENABLE_ARCH_frv_TRUE@frv_BUILD_OUTPUTS = \
2367 @SIM_ENABLE_ARCH_frv_TRUE@      frv/mloop.c \
2368 @SIM_ENABLE_ARCH_frv_TRUE@      frv/stamp-mloop
2369
2370 @SIM_ENABLE_ARCH_ft32_TRUE@nodist_ft32_libsim_a_SOURCES = \
2371 @SIM_ENABLE_ARCH_ft32_TRUE@     ft32/modules.c
2372
2373 @SIM_ENABLE_ARCH_ft32_TRUE@ft32_libsim_a_SOURCES = \
2374 @SIM_ENABLE_ARCH_ft32_TRUE@     $(common_libcommon_a_SOURCES)
2375
2376 @SIM_ENABLE_ARCH_ft32_TRUE@ft32_libsim_a_LIBADD = \
2377 @SIM_ENABLE_ARCH_ft32_TRUE@     $(patsubst %,ft32/%,$(SIM_NEW_COMMON_OBJS)) \
2378 @SIM_ENABLE_ARCH_ft32_TRUE@     $(patsubst %,ft32/dv-%.o,$(SIM_HW_DEVICES)) \
2379 @SIM_ENABLE_ARCH_ft32_TRUE@     ft32/interp.o \
2380 @SIM_ENABLE_ARCH_ft32_TRUE@     ft32/sim-resume.o
2381
2382 @SIM_ENABLE_ARCH_ft32_TRUE@ft32_run_SOURCES =
2383 @SIM_ENABLE_ARCH_ft32_TRUE@ft32_run_LDADD = \
2384 @SIM_ENABLE_ARCH_ft32_TRUE@     ft32/nrun.o \
2385 @SIM_ENABLE_ARCH_ft32_TRUE@     ft32/libsim.a \
2386 @SIM_ENABLE_ARCH_ft32_TRUE@     $(SIM_COMMON_LIBS)
2387
2388 @SIM_ENABLE_ARCH_h8300_TRUE@nodist_h8300_libsim_a_SOURCES = \
2389 @SIM_ENABLE_ARCH_h8300_TRUE@    h8300/modules.c
2390
2391 @SIM_ENABLE_ARCH_h8300_TRUE@h8300_libsim_a_SOURCES = \
2392 @SIM_ENABLE_ARCH_h8300_TRUE@    $(common_libcommon_a_SOURCES)
2393
2394 @SIM_ENABLE_ARCH_h8300_TRUE@h8300_libsim_a_LIBADD = \
2395 @SIM_ENABLE_ARCH_h8300_TRUE@    h8300/compile.o \
2396 @SIM_ENABLE_ARCH_h8300_TRUE@    $(patsubst %,h8300/%,$(SIM_NEW_COMMON_OBJS)) \
2397 @SIM_ENABLE_ARCH_h8300_TRUE@    $(patsubst %,h8300/dv-%.o,$(SIM_HW_DEVICES)) \
2398 @SIM_ENABLE_ARCH_h8300_TRUE@    h8300/sim-resume.o
2399
2400 @SIM_ENABLE_ARCH_h8300_TRUE@h8300_run_SOURCES =
2401 @SIM_ENABLE_ARCH_h8300_TRUE@h8300_run_LDADD = \
2402 @SIM_ENABLE_ARCH_h8300_TRUE@    h8300/nrun.o \
2403 @SIM_ENABLE_ARCH_h8300_TRUE@    h8300/libsim.a \
2404 @SIM_ENABLE_ARCH_h8300_TRUE@    $(SIM_COMMON_LIBS)
2405
2406 @SIM_ENABLE_ARCH_iq2000_TRUE@nodist_iq2000_libsim_a_SOURCES = \
2407 @SIM_ENABLE_ARCH_iq2000_TRUE@   iq2000/modules.c
2408
2409 @SIM_ENABLE_ARCH_iq2000_TRUE@iq2000_libsim_a_SOURCES = \
2410 @SIM_ENABLE_ARCH_iq2000_TRUE@   $(common_libcommon_a_SOURCES)
2411
2412 @SIM_ENABLE_ARCH_iq2000_TRUE@iq2000_libsim_a_LIBADD = \
2413 @SIM_ENABLE_ARCH_iq2000_TRUE@   $(patsubst %,iq2000/%,$(SIM_NEW_COMMON_OBJS)) \
2414 @SIM_ENABLE_ARCH_iq2000_TRUE@   $(patsubst %,iq2000/dv-%.o,$(SIM_HW_DEVICES)) \
2415 @SIM_ENABLE_ARCH_iq2000_TRUE@   \
2416 @SIM_ENABLE_ARCH_iq2000_TRUE@   iq2000/cgen-run.o \
2417 @SIM_ENABLE_ARCH_iq2000_TRUE@   iq2000/cgen-scache.o \
2418 @SIM_ENABLE_ARCH_iq2000_TRUE@   iq2000/cgen-trace.o \
2419 @SIM_ENABLE_ARCH_iq2000_TRUE@   iq2000/cgen-utils.o \
2420 @SIM_ENABLE_ARCH_iq2000_TRUE@   \
2421 @SIM_ENABLE_ARCH_iq2000_TRUE@   iq2000/arch.o \
2422 @SIM_ENABLE_ARCH_iq2000_TRUE@   iq2000/cpu.o \
2423 @SIM_ENABLE_ARCH_iq2000_TRUE@   iq2000/decode.o \
2424 @SIM_ENABLE_ARCH_iq2000_TRUE@   iq2000/iq2000.o \
2425 @SIM_ENABLE_ARCH_iq2000_TRUE@   iq2000/sem.o \
2426 @SIM_ENABLE_ARCH_iq2000_TRUE@   iq2000/mloop.o \
2427 @SIM_ENABLE_ARCH_iq2000_TRUE@   iq2000/model.o \
2428 @SIM_ENABLE_ARCH_iq2000_TRUE@   \
2429 @SIM_ENABLE_ARCH_iq2000_TRUE@   iq2000/sim-if.o
2430
2431 @SIM_ENABLE_ARCH_iq2000_TRUE@iq2000_run_SOURCES =
2432 @SIM_ENABLE_ARCH_iq2000_TRUE@iq2000_run_LDADD = \
2433 @SIM_ENABLE_ARCH_iq2000_TRUE@   iq2000/nrun.o \
2434 @SIM_ENABLE_ARCH_iq2000_TRUE@   iq2000/libsim.a \
2435 @SIM_ENABLE_ARCH_iq2000_TRUE@   $(SIM_COMMON_LIBS)
2436
2437 @SIM_ENABLE_ARCH_iq2000_TRUE@iq2000_BUILD_OUTPUTS = \
2438 @SIM_ENABLE_ARCH_iq2000_TRUE@   iq2000/mloop.c \
2439 @SIM_ENABLE_ARCH_iq2000_TRUE@   iq2000/stamp-mloop
2440
2441 @SIM_ENABLE_ARCH_lm32_TRUE@nodist_lm32_libsim_a_SOURCES = \
2442 @SIM_ENABLE_ARCH_lm32_TRUE@     lm32/modules.c
2443
2444 @SIM_ENABLE_ARCH_lm32_TRUE@lm32_libsim_a_SOURCES = \
2445 @SIM_ENABLE_ARCH_lm32_TRUE@     $(common_libcommon_a_SOURCES)
2446
2447 @SIM_ENABLE_ARCH_lm32_TRUE@lm32_libsim_a_LIBADD = \
2448 @SIM_ENABLE_ARCH_lm32_TRUE@     $(patsubst %,lm32/%,$(SIM_NEW_COMMON_OBJS)) \
2449 @SIM_ENABLE_ARCH_lm32_TRUE@     $(patsubst %,lm32/dv-%.o,$(SIM_HW_DEVICES)) \
2450 @SIM_ENABLE_ARCH_lm32_TRUE@     $(patsubst %,lm32/dv-%.o,$(lm32_SIM_EXTRA_HW_DEVICES)) \
2451 @SIM_ENABLE_ARCH_lm32_TRUE@     \
2452 @SIM_ENABLE_ARCH_lm32_TRUE@     lm32/cgen-run.o \
2453 @SIM_ENABLE_ARCH_lm32_TRUE@     lm32/cgen-scache.o \
2454 @SIM_ENABLE_ARCH_lm32_TRUE@     lm32/cgen-trace.o \
2455 @SIM_ENABLE_ARCH_lm32_TRUE@     lm32/cgen-utils.o \
2456 @SIM_ENABLE_ARCH_lm32_TRUE@     \
2457 @SIM_ENABLE_ARCH_lm32_TRUE@     lm32/arch.o \
2458 @SIM_ENABLE_ARCH_lm32_TRUE@     lm32/cpu.o \
2459 @SIM_ENABLE_ARCH_lm32_TRUE@     lm32/decode.o \
2460 @SIM_ENABLE_ARCH_lm32_TRUE@     lm32/sem.o \
2461 @SIM_ENABLE_ARCH_lm32_TRUE@     lm32/mloop.o \
2462 @SIM_ENABLE_ARCH_lm32_TRUE@     lm32/model.o \
2463 @SIM_ENABLE_ARCH_lm32_TRUE@     \
2464 @SIM_ENABLE_ARCH_lm32_TRUE@     lm32/lm32.o \
2465 @SIM_ENABLE_ARCH_lm32_TRUE@     lm32/sim-if.o \
2466 @SIM_ENABLE_ARCH_lm32_TRUE@     lm32/traps.o \
2467 @SIM_ENABLE_ARCH_lm32_TRUE@     lm32/user.o
2468
2469 @SIM_ENABLE_ARCH_lm32_TRUE@lm32_run_SOURCES =
2470 @SIM_ENABLE_ARCH_lm32_TRUE@lm32_run_LDADD = \
2471 @SIM_ENABLE_ARCH_lm32_TRUE@     lm32/nrun.o \
2472 @SIM_ENABLE_ARCH_lm32_TRUE@     lm32/libsim.a \
2473 @SIM_ENABLE_ARCH_lm32_TRUE@     $(SIM_COMMON_LIBS)
2474
2475 @SIM_ENABLE_ARCH_lm32_TRUE@lm32_SIM_EXTRA_HW_DEVICES = lm32cpu lm32timer lm32uart
2476 @SIM_ENABLE_ARCH_lm32_TRUE@lm32_BUILD_OUTPUTS = \
2477 @SIM_ENABLE_ARCH_lm32_TRUE@     lm32/mloop.c \
2478 @SIM_ENABLE_ARCH_lm32_TRUE@     lm32/stamp-mloop
2479
2480 @SIM_ENABLE_ARCH_m32c_TRUE@AM_CPPFLAGS_m32c = -DTIMER_A
2481 @SIM_ENABLE_ARCH_m32c_TRUE@nodist_m32c_libsim_a_SOURCES = \
2482 @SIM_ENABLE_ARCH_m32c_TRUE@     m32c/modules.c
2483
2484 @SIM_ENABLE_ARCH_m32c_TRUE@m32c_libsim_a_SOURCES = \
2485 @SIM_ENABLE_ARCH_m32c_TRUE@     $(common_libcommon_a_SOURCES)
2486
2487 @SIM_ENABLE_ARCH_m32c_TRUE@m32c_libsim_a_LIBADD = \
2488 @SIM_ENABLE_ARCH_m32c_TRUE@     m32c/gdb-if.o \
2489 @SIM_ENABLE_ARCH_m32c_TRUE@     m32c/int.o \
2490 @SIM_ENABLE_ARCH_m32c_TRUE@     m32c/load.o \
2491 @SIM_ENABLE_ARCH_m32c_TRUE@     m32c/m32c.o \
2492 @SIM_ENABLE_ARCH_m32c_TRUE@     m32c/mem.o \
2493 @SIM_ENABLE_ARCH_m32c_TRUE@     m32c/misc.o \
2494 @SIM_ENABLE_ARCH_m32c_TRUE@     m32c/r8c.o \
2495 @SIM_ENABLE_ARCH_m32c_TRUE@     m32c/reg.o \
2496 @SIM_ENABLE_ARCH_m32c_TRUE@     m32c/srcdest.o \
2497 @SIM_ENABLE_ARCH_m32c_TRUE@     m32c/syscalls.o \
2498 @SIM_ENABLE_ARCH_m32c_TRUE@     m32c/trace.o
2499
2500 @SIM_ENABLE_ARCH_m32c_TRUE@m32c_run_SOURCES =
2501 @SIM_ENABLE_ARCH_m32c_TRUE@m32c_run_LDADD = \
2502 @SIM_ENABLE_ARCH_m32c_TRUE@     m32c/main.o \
2503 @SIM_ENABLE_ARCH_m32c_TRUE@     m32c/libsim.a \
2504 @SIM_ENABLE_ARCH_m32c_TRUE@     $(SIM_COMMON_LIBS)
2505
2506 @SIM_ENABLE_ARCH_m32c_TRUE@m32c_BUILD_OUTPUTS = \
2507 @SIM_ENABLE_ARCH_m32c_TRUE@     m32c/opc2c$(EXEEXT) \
2508 @SIM_ENABLE_ARCH_m32c_TRUE@     m32c/m32c.c \
2509 @SIM_ENABLE_ARCH_m32c_TRUE@     m32c/r8c.c
2510
2511 @SIM_ENABLE_ARCH_m32c_TRUE@m32c_opc2c_SOURCES = m32c/opc2c.c
2512
2513 # opc2c leaks memory, and therefore makes AddressSanitizer unhappy.  Disable
2514 # leak detection while running it.
2515 @SIM_ENABLE_ARCH_m32c_TRUE@m32c_OPC2C_RUN = ASAN_OPTIONS=detect_leaks=0 m32c/opc2c$(EXEEXT)
2516 @SIM_ENABLE_ARCH_m32r_TRUE@AM_CFLAGS_m32r_cpu.o = -Wno-error
2517 @SIM_ENABLE_ARCH_m32r_TRUE@AM_CFLAGS_m32r_cpu2.o = -Wno-error
2518 @SIM_ENABLE_ARCH_m32r_TRUE@AM_CFLAGS_m32r_cpux.o = -Wno-error
2519 @SIM_ENABLE_ARCH_m32r_TRUE@AM_CFLAGS_m32r_m32r.o = -Wno-error
2520 @SIM_ENABLE_ARCH_m32r_TRUE@AM_CFLAGS_m32r_m32r2.o = -Wno-error
2521 @SIM_ENABLE_ARCH_m32r_TRUE@AM_CFLAGS_m32r_m32rx.o = -Wno-error
2522 @SIM_ENABLE_ARCH_m32r_TRUE@AM_CFLAGS_m32r_mloop.o = -Wno-error
2523 @SIM_ENABLE_ARCH_m32r_TRUE@AM_CFLAGS_m32r_mloop2.o = -Wno-error
2524 @SIM_ENABLE_ARCH_m32r_TRUE@AM_CFLAGS_m32r_mloopx.o = -Wno-error
2525 @SIM_ENABLE_ARCH_m32r_TRUE@AM_CFLAGS_m32r_sem.o = -Wno-error
2526 @SIM_ENABLE_ARCH_m32r_TRUE@AM_CFLAGS_m32r_sim_if.o = -Wno-error
2527 @SIM_ENABLE_ARCH_m32r_TRUE@AM_CFLAGS_m32r_traps.o = -Wno-error
2528 @SIM_ENABLE_ARCH_m32r_TRUE@nodist_m32r_libsim_a_SOURCES = \
2529 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/modules.c
2530
2531 @SIM_ENABLE_ARCH_m32r_TRUE@m32r_libsim_a_SOURCES = \
2532 @SIM_ENABLE_ARCH_m32r_TRUE@     $(common_libcommon_a_SOURCES)
2533
2534 @SIM_ENABLE_ARCH_m32r_TRUE@m32r_libsim_a_LIBADD = \
2535 @SIM_ENABLE_ARCH_m32r_TRUE@     $(patsubst %,m32r/%,$(SIM_NEW_COMMON_OBJS)) \
2536 @SIM_ENABLE_ARCH_m32r_TRUE@     $(patsubst %,m32r/dv-%.o,$(SIM_HW_DEVICES)) \
2537 @SIM_ENABLE_ARCH_m32r_TRUE@     $(patsubst %,m32r/dv-%.o,$(m32r_SIM_EXTRA_HW_DEVICES)) \
2538 @SIM_ENABLE_ARCH_m32r_TRUE@     \
2539 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/cgen-run.o \
2540 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/cgen-scache.o \
2541 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/cgen-trace.o \
2542 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/cgen-utils.o \
2543 @SIM_ENABLE_ARCH_m32r_TRUE@     \
2544 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/arch.o \
2545 @SIM_ENABLE_ARCH_m32r_TRUE@     \
2546 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/m32r.o \
2547 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/cpu.o \
2548 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/decode.o \
2549 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/sem.o \
2550 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/model.o \
2551 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/mloop.o \
2552 @SIM_ENABLE_ARCH_m32r_TRUE@     \
2553 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/m32rx.o \
2554 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/cpux.o \
2555 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/decodex.o \
2556 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/modelx.o \
2557 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/mloopx.o \
2558 @SIM_ENABLE_ARCH_m32r_TRUE@     \
2559 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/m32r2.o \
2560 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/cpu2.o \
2561 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/decode2.o \
2562 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/model2.o \
2563 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/mloop2.o \
2564 @SIM_ENABLE_ARCH_m32r_TRUE@     \
2565 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/sim-if.o \
2566 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/traps.o
2567
2568 @SIM_ENABLE_ARCH_m32r_TRUE@m32r_run_SOURCES =
2569 @SIM_ENABLE_ARCH_m32r_TRUE@m32r_run_LDADD = \
2570 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/nrun.o \
2571 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/libsim.a \
2572 @SIM_ENABLE_ARCH_m32r_TRUE@     $(SIM_COMMON_LIBS)
2573
2574 @SIM_ENABLE_ARCH_m32r_TRUE@m32r_SIM_EXTRA_HW_DEVICES = m32r_cache m32r_uart
2575 @SIM_ENABLE_ARCH_m32r_TRUE@m32r_BUILD_OUTPUTS = \
2576 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/mloop.c \
2577 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/stamp-mloop \
2578 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/mloopx.c \
2579 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/stamp-mloop-x \
2580 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/mloop2.c \
2581 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/stamp-mloop-2
2582
2583 @SIM_ENABLE_ARCH_m68hc11_TRUE@AM_CPPFLAGS_m68hc11 = \
2584 @SIM_ENABLE_ARCH_m68hc11_TRUE@  -DWITH_TARGET_WORD_BITSIZE=32 \
2585 @SIM_ENABLE_ARCH_m68hc11_TRUE@  -DWITH_TARGET_CELL_BITSIZE=32 \
2586 @SIM_ENABLE_ARCH_m68hc11_TRUE@  -DWITH_TARGET_ADDRESS_BITSIZE=32 \
2587 @SIM_ENABLE_ARCH_m68hc11_TRUE@  -DWITH_TARGET_WORD_MSB=31
2588
2589 @SIM_ENABLE_ARCH_m68hc11_TRUE@nodist_m68hc11_libsim_a_SOURCES = \
2590 @SIM_ENABLE_ARCH_m68hc11_TRUE@  m68hc11/modules.c
2591
2592 @SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11_libsim_a_SOURCES = \
2593 @SIM_ENABLE_ARCH_m68hc11_TRUE@  $(common_libcommon_a_SOURCES)
2594
2595 @SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11_libsim_a_LIBADD = \
2596 @SIM_ENABLE_ARCH_m68hc11_TRUE@  m68hc11/interp.o \
2597 @SIM_ENABLE_ARCH_m68hc11_TRUE@  m68hc11/m68hc11int.o \
2598 @SIM_ENABLE_ARCH_m68hc11_TRUE@  m68hc11/m68hc12int.o \
2599 @SIM_ENABLE_ARCH_m68hc11_TRUE@  m68hc11/emulos.o \
2600 @SIM_ENABLE_ARCH_m68hc11_TRUE@  m68hc11/interrupts.o \
2601 @SIM_ENABLE_ARCH_m68hc11_TRUE@  m68hc11/m68hc11_sim.o \
2602 @SIM_ENABLE_ARCH_m68hc11_TRUE@  $(patsubst %,m68hc11/%,$(SIM_NEW_COMMON_OBJS)) \
2603 @SIM_ENABLE_ARCH_m68hc11_TRUE@  $(patsubst %,m68hc11/dv-%.o,$(SIM_HW_DEVICES)) \
2604 @SIM_ENABLE_ARCH_m68hc11_TRUE@  $(patsubst %,m68hc11/dv-%.o,$(m68hc11_SIM_EXTRA_HW_DEVICES)) \
2605 @SIM_ENABLE_ARCH_m68hc11_TRUE@  m68hc11/sim-resume.o
2606
2607 @SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11_run_SOURCES =
2608 @SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11_run_LDADD = \
2609 @SIM_ENABLE_ARCH_m68hc11_TRUE@  m68hc11/nrun.o \
2610 @SIM_ENABLE_ARCH_m68hc11_TRUE@  m68hc11/libsim.a \
2611 @SIM_ENABLE_ARCH_m68hc11_TRUE@  $(SIM_COMMON_LIBS)
2612
2613 @SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11_SIM_EXTRA_HW_DEVICES = m68hc11 m68hc11sio m68hc11eepr m68hc11tim m68hc11spi nvram
2614 @SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11_BUILD_OUTPUTS = \
2615 @SIM_ENABLE_ARCH_m68hc11_TRUE@  m68hc11/gencode$(EXEEXT) \
2616 @SIM_ENABLE_ARCH_m68hc11_TRUE@  m68hc11/m68hc11int.c \
2617 @SIM_ENABLE_ARCH_m68hc11_TRUE@  m68hc11/m68hc12int.c
2618
2619 @SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11_gencode_SOURCES = m68hc11/gencode.c
2620 @SIM_ENABLE_ARCH_mcore_TRUE@nodist_mcore_libsim_a_SOURCES = \
2621 @SIM_ENABLE_ARCH_mcore_TRUE@    mcore/modules.c
2622
2623 @SIM_ENABLE_ARCH_mcore_TRUE@mcore_libsim_a_SOURCES = \
2624 @SIM_ENABLE_ARCH_mcore_TRUE@    $(common_libcommon_a_SOURCES)
2625
2626 @SIM_ENABLE_ARCH_mcore_TRUE@mcore_libsim_a_LIBADD = \
2627 @SIM_ENABLE_ARCH_mcore_TRUE@    mcore/interp.o \
2628 @SIM_ENABLE_ARCH_mcore_TRUE@    $(patsubst %,mcore/%,$(SIM_NEW_COMMON_OBJS)) \
2629 @SIM_ENABLE_ARCH_mcore_TRUE@    $(patsubst %,mcore/dv-%.o,$(SIM_HW_DEVICES)) \
2630 @SIM_ENABLE_ARCH_mcore_TRUE@    mcore/sim-resume.o
2631
2632 @SIM_ENABLE_ARCH_mcore_TRUE@mcore_run_SOURCES =
2633 @SIM_ENABLE_ARCH_mcore_TRUE@mcore_run_LDADD = \
2634 @SIM_ENABLE_ARCH_mcore_TRUE@    mcore/nrun.o \
2635 @SIM_ENABLE_ARCH_mcore_TRUE@    mcore/libsim.a \
2636 @SIM_ENABLE_ARCH_mcore_TRUE@    $(SIM_COMMON_LIBS)
2637
2638 @SIM_ENABLE_ARCH_microblaze_TRUE@nodist_microblaze_libsim_a_SOURCES = \
2639 @SIM_ENABLE_ARCH_microblaze_TRUE@       microblaze/modules.c
2640
2641 @SIM_ENABLE_ARCH_microblaze_TRUE@microblaze_libsim_a_SOURCES = \
2642 @SIM_ENABLE_ARCH_microblaze_TRUE@       $(common_libcommon_a_SOURCES)
2643
2644 @SIM_ENABLE_ARCH_microblaze_TRUE@microblaze_libsim_a_LIBADD = \
2645 @SIM_ENABLE_ARCH_microblaze_TRUE@       microblaze/interp.o \
2646 @SIM_ENABLE_ARCH_microblaze_TRUE@       $(patsubst %,microblaze/%,$(SIM_NEW_COMMON_OBJS)) \
2647 @SIM_ENABLE_ARCH_microblaze_TRUE@       $(patsubst %,microblaze/dv-%.o,$(SIM_HW_DEVICES)) \
2648 @SIM_ENABLE_ARCH_microblaze_TRUE@       microblaze/sim-resume.o
2649
2650 @SIM_ENABLE_ARCH_microblaze_TRUE@microblaze_run_SOURCES =
2651 @SIM_ENABLE_ARCH_microblaze_TRUE@microblaze_run_LDADD = \
2652 @SIM_ENABLE_ARCH_microblaze_TRUE@       microblaze/nrun.o \
2653 @SIM_ENABLE_ARCH_microblaze_TRUE@       microblaze/libsim.a \
2654 @SIM_ENABLE_ARCH_microblaze_TRUE@       $(SIM_COMMON_LIBS)
2655
2656 @SIM_ENABLE_ARCH_mips_TRUE@AM_CPPFLAGS_mips = \
2657 @SIM_ENABLE_ARCH_mips_TRUE@     @SIM_MIPS_SUBTARGET@ \
2658 @SIM_ENABLE_ARCH_mips_TRUE@     -DWITH_TARGET_WORD_BITSIZE=@SIM_MIPS_BITSIZE@ -DWITH_TARGET_WORD_MSB=WITH_TARGET_WORD_BITSIZE-1 \
2659 @SIM_ENABLE_ARCH_mips_TRUE@     -DWITH_FLOATING_POINT=HARD_FLOATING_POINT -DWITH_TARGET_FLOATING_POINT_BITSIZE=@SIM_MIPS_FPU_BITSIZE@
2660
2661 @SIM_ENABLE_ARCH_mips_TRUE@mips_GEN_OBJ = $(am__append_68) \
2662 @SIM_ENABLE_ARCH_mips_TRUE@     $(am__append_69) $(am__append_70)
2663 @SIM_ENABLE_ARCH_mips_TRUE@nodist_mips_libsim_a_SOURCES = \
2664 @SIM_ENABLE_ARCH_mips_TRUE@     mips/modules.c
2665
2666 @SIM_ENABLE_ARCH_mips_TRUE@mips_libsim_a_SOURCES = \
2667 @SIM_ENABLE_ARCH_mips_TRUE@     $(common_libcommon_a_SOURCES)
2668
2669 @SIM_ENABLE_ARCH_mips_TRUE@mips_libsim_a_LIBADD = \
2670 @SIM_ENABLE_ARCH_mips_TRUE@     mips/interp.o \
2671 @SIM_ENABLE_ARCH_mips_TRUE@     $(mips_GEN_OBJ) \
2672 @SIM_ENABLE_ARCH_mips_TRUE@     $(patsubst %,mips/%,$(SIM_NEW_COMMON_OBJS)) \
2673 @SIM_ENABLE_ARCH_mips_TRUE@     $(patsubst %,mips/dv-%.o,$(SIM_HW_DEVICES)) \
2674 @SIM_ENABLE_ARCH_mips_TRUE@     $(patsubst %,mips/dv-%.o,$(mips_SIM_EXTRA_HW_DEVICES)) \
2675 @SIM_ENABLE_ARCH_mips_TRUE@     mips/cp1.o \
2676 @SIM_ENABLE_ARCH_mips_TRUE@     mips/dsp.o \
2677 @SIM_ENABLE_ARCH_mips_TRUE@     mips/mdmx.o \
2678 @SIM_ENABLE_ARCH_mips_TRUE@     mips/sim-main.o \
2679 @SIM_ENABLE_ARCH_mips_TRUE@     mips/sim-resume.o
2680
2681 @SIM_ENABLE_ARCH_mips_TRUE@EXTRA_mips_libsim_a_DEPENDENCIES = $(SIM_MIPS_MULTI_OBJ)
2682 @SIM_ENABLE_ARCH_mips_TRUE@mips_run_SOURCES =
2683 @SIM_ENABLE_ARCH_mips_TRUE@mips_run_LDADD = \
2684 @SIM_ENABLE_ARCH_mips_TRUE@     mips/nrun.o \
2685 @SIM_ENABLE_ARCH_mips_TRUE@     mips/libsim.a \
2686 @SIM_ENABLE_ARCH_mips_TRUE@     $(SIM_COMMON_LIBS)
2687
2688 @SIM_ENABLE_ARCH_mips_TRUE@mips_SIM_EXTRA_HW_DEVICES = tx3904cpu tx3904irc tx3904tmr tx3904sio
2689 @SIM_ENABLE_ARCH_mips_TRUE@mips_BUILT_SRC_FROM_IGEN_ITABLE = \
2690 @SIM_ENABLE_ARCH_mips_TRUE@     mips/itable.h \
2691 @SIM_ENABLE_ARCH_mips_TRUE@     mips/itable.c
2692
2693 @SIM_ENABLE_ARCH_mips_TRUE@mips_BUILT_SRC_FROM_GEN_MODE_SINGLE = \
2694 @SIM_ENABLE_ARCH_mips_TRUE@     mips/icache.h \
2695 @SIM_ENABLE_ARCH_mips_TRUE@     mips/icache.c \
2696 @SIM_ENABLE_ARCH_mips_TRUE@     mips/idecode.h \
2697 @SIM_ENABLE_ARCH_mips_TRUE@     mips/idecode.c \
2698 @SIM_ENABLE_ARCH_mips_TRUE@     mips/semantics.h \
2699 @SIM_ENABLE_ARCH_mips_TRUE@     mips/semantics.c \
2700 @SIM_ENABLE_ARCH_mips_TRUE@     mips/model.h \
2701 @SIM_ENABLE_ARCH_mips_TRUE@     mips/model.c \
2702 @SIM_ENABLE_ARCH_mips_TRUE@     mips/support.h \
2703 @SIM_ENABLE_ARCH_mips_TRUE@     mips/support.c \
2704 @SIM_ENABLE_ARCH_mips_TRUE@     mips/engine.h \
2705 @SIM_ENABLE_ARCH_mips_TRUE@     mips/engine.c \
2706 @SIM_ENABLE_ARCH_mips_TRUE@     mips/irun.c
2707
2708 @SIM_ENABLE_ARCH_mips_TRUE@mips_BUILT_SRC_FROM_GEN_MODE_M16_M16 = \
2709 @SIM_ENABLE_ARCH_mips_TRUE@     mips/m16_icache.h \
2710 @SIM_ENABLE_ARCH_mips_TRUE@     mips/m16_icache.c \
2711 @SIM_ENABLE_ARCH_mips_TRUE@     mips/m16_idecode.h \
2712 @SIM_ENABLE_ARCH_mips_TRUE@     mips/m16_idecode.c \
2713 @SIM_ENABLE_ARCH_mips_TRUE@     mips/m16_semantics.h \
2714 @SIM_ENABLE_ARCH_mips_TRUE@     mips/m16_semantics.c \
2715 @SIM_ENABLE_ARCH_mips_TRUE@     mips/m16_model.h \
2716 @SIM_ENABLE_ARCH_mips_TRUE@     mips/m16_model.c \
2717 @SIM_ENABLE_ARCH_mips_TRUE@     mips/m16_support.h \
2718 @SIM_ENABLE_ARCH_mips_TRUE@     mips/m16_support.c \
2719 @SIM_ENABLE_ARCH_mips_TRUE@mips_BUILT_SRC_FROM_GEN_MODE_M16_M32 = \
2720 @SIM_ENABLE_ARCH_mips_TRUE@     mips/m32_icache.h \
2721 @SIM_ENABLE_ARCH_mips_TRUE@     mips/m32_icache.c \
2722 @SIM_ENABLE_ARCH_mips_TRUE@     mips/m32_idecode.h \
2723 @SIM_ENABLE_ARCH_mips_TRUE@     mips/m32_idecode.c \
2724 @SIM_ENABLE_ARCH_mips_TRUE@     mips/m32_semantics.h \
2725 @SIM_ENABLE_ARCH_mips_TRUE@     mips/m32_semantics.c \
2726 @SIM_ENABLE_ARCH_mips_TRUE@     mips/m32_model.h \
2727 @SIM_ENABLE_ARCH_mips_TRUE@     mips/m32_model.c \
2728 @SIM_ENABLE_ARCH_mips_TRUE@     mips/m32_support.h \
2729 @SIM_ENABLE_ARCH_mips_TRUE@     mips/m32_support.c
2730
2731 @SIM_ENABLE_ARCH_mips_TRUE@mips_BUILD_OUTPUTS =  \
2732 @SIM_ENABLE_ARCH_mips_TRUE@     $(mips_BUILT_SRC_FROM_IGEN_ITABLE) \
2733 @SIM_ENABLE_ARCH_mips_TRUE@     mips/stamp-igen-itable \
2734 @SIM_ENABLE_ARCH_mips_TRUE@     $(am__append_74) $(am__append_75) \
2735 @SIM_ENABLE_ARCH_mips_TRUE@     $(am__append_76)
2736 @SIM_ENABLE_ARCH_mips_TRUE@mips_IGEN_TRACE = # -G omit-line-numbers # -G trace-rule-selection -G trace-rule-rejection -G trace-entries # -G trace-all
2737 @SIM_ENABLE_ARCH_mips_TRUE@mips_IGEN_INSN = $(srcdir)/mips/mips.igen
2738 @SIM_ENABLE_ARCH_mips_TRUE@mips_IGEN_INSN_INC = \
2739 @SIM_ENABLE_ARCH_mips_TRUE@     mips/dsp.igen \
2740 @SIM_ENABLE_ARCH_mips_TRUE@     mips/dsp2.igen \
2741 @SIM_ENABLE_ARCH_mips_TRUE@     mips/m16.igen \
2742 @SIM_ENABLE_ARCH_mips_TRUE@     mips/m16e.igen \
2743 @SIM_ENABLE_ARCH_mips_TRUE@     mips/mdmx.igen \
2744 @SIM_ENABLE_ARCH_mips_TRUE@     mips/micromipsdsp.igen \
2745 @SIM_ENABLE_ARCH_mips_TRUE@     mips/micromips.igen \
2746 @SIM_ENABLE_ARCH_mips_TRUE@     mips/mips3264r2.igen \
2747 @SIM_ENABLE_ARCH_mips_TRUE@     mips/mips3264r6.igen \
2748 @SIM_ENABLE_ARCH_mips_TRUE@     mips/mips3d.igen \
2749 @SIM_ENABLE_ARCH_mips_TRUE@     mips/sb1.igen \
2750 @SIM_ENABLE_ARCH_mips_TRUE@     mips/tx.igen \
2751 @SIM_ENABLE_ARCH_mips_TRUE@     mips/vr.igen
2752
2753 @SIM_ENABLE_ARCH_mips_TRUE@mips_IGEN_DC = $(srcdir)/mips/mips.dc
2754 @SIM_ENABLE_ARCH_mips_TRUE@mips_M16_DC = $(srcdir)/mips/m16.dc
2755 @SIM_ENABLE_ARCH_mips_TRUE@mips_MICROMIPS32_DC = $(srcdir)/mips/micromips.dc
2756 @SIM_ENABLE_ARCH_mips_TRUE@mips_MICROMIPS16_DC = $(srcdir)/mips/micromips16.dc
2757 @SIM_ENABLE_ARCH_mn10300_TRUE@AM_CPPFLAGS_mn10300 = \
2758 @SIM_ENABLE_ARCH_mn10300_TRUE@  -DPOLL_QUIT_INTERVAL=0x20 \
2759 @SIM_ENABLE_ARCH_mn10300_TRUE@  -DWITH_TARGET_WORD_BITSIZE=32 -DWITH_TARGET_WORD_MSB=31
2760
2761 @SIM_ENABLE_ARCH_mn10300_TRUE@nodist_mn10300_libsim_a_SOURCES = \
2762 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/modules.c
2763
2764 @SIM_ENABLE_ARCH_mn10300_TRUE@mn10300_libsim_a_SOURCES = \
2765 @SIM_ENABLE_ARCH_mn10300_TRUE@  $(common_libcommon_a_SOURCES)
2766
2767 @SIM_ENABLE_ARCH_mn10300_TRUE@mn10300_libsim_a_LIBADD = \
2768 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/itable.o \
2769 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/semantics.o \
2770 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/idecode.o \
2771 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/icache.o \
2772 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/engine.o \
2773 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/irun.o \
2774 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/support.o \
2775 @SIM_ENABLE_ARCH_mn10300_TRUE@  $(patsubst %,mn10300/%,$(SIM_NEW_COMMON_OBJS)) \
2776 @SIM_ENABLE_ARCH_mn10300_TRUE@  $(patsubst %,mn10300/dv-%.o,$(SIM_HW_DEVICES)) \
2777 @SIM_ENABLE_ARCH_mn10300_TRUE@  $(patsubst %,mn10300/dv-%.o,$(mn10300_SIM_EXTRA_HW_DEVICES)) \
2778 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/interp.o \
2779 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/op_utils.o \
2780 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/sim-resume.o
2781
2782 @SIM_ENABLE_ARCH_mn10300_TRUE@mn10300_run_SOURCES =
2783 @SIM_ENABLE_ARCH_mn10300_TRUE@mn10300_run_LDADD = \
2784 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/nrun.o \
2785 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/libsim.a \
2786 @SIM_ENABLE_ARCH_mn10300_TRUE@  $(SIM_COMMON_LIBS)
2787
2788 @SIM_ENABLE_ARCH_mn10300_TRUE@mn10300_SIM_EXTRA_HW_DEVICES = mn103cpu mn103int mn103tim mn103ser mn103iop
2789 @SIM_ENABLE_ARCH_mn10300_TRUE@mn10300_BUILT_SRC_FROM_IGEN = \
2790 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/icache.h \
2791 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/icache.c \
2792 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/idecode.h \
2793 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/idecode.c \
2794 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/semantics.h \
2795 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/semantics.c \
2796 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/model.h \
2797 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/model.c \
2798 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/support.h \
2799 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/support.c \
2800 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/itable.h \
2801 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/itable.c \
2802 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/engine.h \
2803 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/engine.c \
2804 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/irun.c
2805
2806 @SIM_ENABLE_ARCH_mn10300_TRUE@mn10300_BUILD_OUTPUTS = \
2807 @SIM_ENABLE_ARCH_mn10300_TRUE@  $(mn10300_BUILT_SRC_FROM_IGEN) \
2808 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/stamp-igen
2809
2810 @SIM_ENABLE_ARCH_mn10300_TRUE@mn10300_IGEN_TRACE = # -G omit-line-numbers # -G trace-rule-selection -G trace-rule-rejection -G trace-entries
2811 @SIM_ENABLE_ARCH_mn10300_TRUE@mn10300_IGEN_INSN = $(srcdir)/mn10300/mn10300.igen
2812 @SIM_ENABLE_ARCH_mn10300_TRUE@mn10300_IGEN_INSN_INC = mn10300/am33.igen mn10300/am33-2.igen
2813 @SIM_ENABLE_ARCH_mn10300_TRUE@mn10300_IGEN_DC = $(srcdir)/mn10300/mn10300.dc
2814 @SIM_ENABLE_ARCH_moxie_TRUE@AM_CPPFLAGS_moxie = -DDTB="\"$(dtbdir)/moxie-gdb.dtb\""
2815 @SIM_ENABLE_ARCH_moxie_TRUE@nodist_moxie_libsim_a_SOURCES = \
2816 @SIM_ENABLE_ARCH_moxie_TRUE@    moxie/modules.c
2817
2818 @SIM_ENABLE_ARCH_moxie_TRUE@moxie_libsim_a_SOURCES = \
2819 @SIM_ENABLE_ARCH_moxie_TRUE@    $(common_libcommon_a_SOURCES)
2820
2821 @SIM_ENABLE_ARCH_moxie_TRUE@moxie_libsim_a_LIBADD = \
2822 @SIM_ENABLE_ARCH_moxie_TRUE@    $(patsubst %,moxie/%,$(SIM_NEW_COMMON_OBJS)) \
2823 @SIM_ENABLE_ARCH_moxie_TRUE@    $(patsubst %,moxie/dv-%.o,$(SIM_HW_DEVICES)) \
2824 @SIM_ENABLE_ARCH_moxie_TRUE@    moxie/interp.o \
2825 @SIM_ENABLE_ARCH_moxie_TRUE@    moxie/sim-resume.o
2826
2827 @SIM_ENABLE_ARCH_moxie_TRUE@moxie_run_SOURCES =
2828 @SIM_ENABLE_ARCH_moxie_TRUE@moxie_run_LDADD = \
2829 @SIM_ENABLE_ARCH_moxie_TRUE@    moxie/nrun.o \
2830 @SIM_ENABLE_ARCH_moxie_TRUE@    moxie/libsim.a \
2831 @SIM_ENABLE_ARCH_moxie_TRUE@    $(SIM_COMMON_LIBS)
2832
2833 @SIM_ENABLE_ARCH_moxie_TRUE@dtbdir = $(datadir)/gdb/dtb
2834 @SIM_ENABLE_ARCH_moxie_TRUE@dtb_DATA = moxie/moxie-gdb.dtb
2835 @SIM_ENABLE_ARCH_msp430_TRUE@nodist_msp430_libsim_a_SOURCES = \
2836 @SIM_ENABLE_ARCH_msp430_TRUE@   msp430/modules.c
2837
2838 @SIM_ENABLE_ARCH_msp430_TRUE@msp430_libsim_a_SOURCES = \
2839 @SIM_ENABLE_ARCH_msp430_TRUE@   $(common_libcommon_a_SOURCES)
2840
2841 @SIM_ENABLE_ARCH_msp430_TRUE@msp430_libsim_a_LIBADD = \
2842 @SIM_ENABLE_ARCH_msp430_TRUE@   $(patsubst %,msp430/%,$(SIM_NEW_COMMON_OBJS)) \
2843 @SIM_ENABLE_ARCH_msp430_TRUE@   $(patsubst %,msp430/dv-%.o,$(SIM_HW_DEVICES)) \
2844 @SIM_ENABLE_ARCH_msp430_TRUE@   msp430/msp430-sim.o \
2845 @SIM_ENABLE_ARCH_msp430_TRUE@   msp430/sim-resume.o
2846
2847 @SIM_ENABLE_ARCH_msp430_TRUE@msp430_run_SOURCES =
2848 @SIM_ENABLE_ARCH_msp430_TRUE@msp430_run_LDADD = \
2849 @SIM_ENABLE_ARCH_msp430_TRUE@   msp430/nrun.o \
2850 @SIM_ENABLE_ARCH_msp430_TRUE@   msp430/libsim.a \
2851 @SIM_ENABLE_ARCH_msp430_TRUE@   $(SIM_COMMON_LIBS)
2852
2853 @SIM_ENABLE_ARCH_or1k_TRUE@AM_CPPFLAGS_or1k = -DWITH_TARGET_WORD_BITSIZE=32 -DWITH_TARGET_WORD_MSB=31
2854 @SIM_ENABLE_ARCH_or1k_TRUE@nodist_or1k_libsim_a_SOURCES = \
2855 @SIM_ENABLE_ARCH_or1k_TRUE@     or1k/modules.c
2856
2857 @SIM_ENABLE_ARCH_or1k_TRUE@or1k_libsim_a_SOURCES = \
2858 @SIM_ENABLE_ARCH_or1k_TRUE@     $(common_libcommon_a_SOURCES)
2859
2860 @SIM_ENABLE_ARCH_or1k_TRUE@or1k_libsim_a_LIBADD = \
2861 @SIM_ENABLE_ARCH_or1k_TRUE@     $(patsubst %,or1k/%,$(SIM_NEW_COMMON_OBJS)) \
2862 @SIM_ENABLE_ARCH_or1k_TRUE@     $(patsubst %,or1k/dv-%.o,$(SIM_HW_DEVICES)) \
2863 @SIM_ENABLE_ARCH_or1k_TRUE@     \
2864 @SIM_ENABLE_ARCH_or1k_TRUE@     or1k/cgen-accfp.o \
2865 @SIM_ENABLE_ARCH_or1k_TRUE@     or1k/cgen-fpu.o \
2866 @SIM_ENABLE_ARCH_or1k_TRUE@     or1k/cgen-run.o \
2867 @SIM_ENABLE_ARCH_or1k_TRUE@     or1k/cgen-scache.o \
2868 @SIM_ENABLE_ARCH_or1k_TRUE@     or1k/cgen-trace.o \
2869 @SIM_ENABLE_ARCH_or1k_TRUE@     or1k/cgen-utils.o \
2870 @SIM_ENABLE_ARCH_or1k_TRUE@     \
2871 @SIM_ENABLE_ARCH_or1k_TRUE@     or1k/arch.o \
2872 @SIM_ENABLE_ARCH_or1k_TRUE@     or1k/cpu.o \
2873 @SIM_ENABLE_ARCH_or1k_TRUE@     or1k/decode.o \
2874 @SIM_ENABLE_ARCH_or1k_TRUE@     or1k/mloop.o \
2875 @SIM_ENABLE_ARCH_or1k_TRUE@     or1k/model.o \
2876 @SIM_ENABLE_ARCH_or1k_TRUE@     or1k/sem.o \
2877 @SIM_ENABLE_ARCH_or1k_TRUE@     \
2878 @SIM_ENABLE_ARCH_or1k_TRUE@     or1k/or1k.o \
2879 @SIM_ENABLE_ARCH_or1k_TRUE@     or1k/sim-if.o \
2880 @SIM_ENABLE_ARCH_or1k_TRUE@     or1k/traps.o
2881
2882 @SIM_ENABLE_ARCH_or1k_TRUE@or1k_run_SOURCES =
2883 @SIM_ENABLE_ARCH_or1k_TRUE@or1k_run_LDADD = \
2884 @SIM_ENABLE_ARCH_or1k_TRUE@     or1k/nrun.o \
2885 @SIM_ENABLE_ARCH_or1k_TRUE@     or1k/libsim.a \
2886 @SIM_ENABLE_ARCH_or1k_TRUE@     $(SIM_COMMON_LIBS)
2887
2888 @SIM_ENABLE_ARCH_or1k_TRUE@or1kdocdir = $(docdir)/or1k
2889 @SIM_ENABLE_ARCH_or1k_TRUE@or1kdoc_DATA = or1k/README
2890 @SIM_ENABLE_ARCH_or1k_TRUE@or1k_BUILD_OUTPUTS = \
2891 @SIM_ENABLE_ARCH_or1k_TRUE@     or1k/mloop.c \
2892 @SIM_ENABLE_ARCH_or1k_TRUE@     or1k/stamp-mloop
2893
2894 @SIM_ENABLE_ARCH_ppc_TRUE@ppc_run_SOURCES =
2895 @SIM_ENABLE_ARCH_ppc_TRUE@ppc_run_LDADD = \
2896 @SIM_ENABLE_ARCH_ppc_TRUE@      ppc/main.o \
2897 @SIM_ENABLE_ARCH_ppc_TRUE@      ppc/libsim.a \
2898 @SIM_ENABLE_ARCH_ppc_TRUE@      $(SIM_COMMON_LIBS)
2899
2900 @SIM_ENABLE_ARCH_ppc_TRUE@ppcdocdir = $(docdir)/ppc
2901 @SIM_ENABLE_ARCH_ppc_TRUE@ppcdoc_DATA = ppc/BUGS ppc/INSTALL ppc/README ppc/RUN
2902 @SIM_ENABLE_ARCH_pru_TRUE@nodist_pru_libsim_a_SOURCES = \
2903 @SIM_ENABLE_ARCH_pru_TRUE@      pru/modules.c
2904
2905 @SIM_ENABLE_ARCH_pru_TRUE@pru_libsim_a_SOURCES = \
2906 @SIM_ENABLE_ARCH_pru_TRUE@      $(common_libcommon_a_SOURCES)
2907
2908 @SIM_ENABLE_ARCH_pru_TRUE@pru_libsim_a_LIBADD = \
2909 @SIM_ENABLE_ARCH_pru_TRUE@      $(patsubst %,pru/%,$(SIM_NEW_COMMON_OBJS)) \
2910 @SIM_ENABLE_ARCH_pru_TRUE@      $(patsubst %,pru/dv-%.o,$(SIM_HW_DEVICES)) \
2911 @SIM_ENABLE_ARCH_pru_TRUE@      pru/interp.o \
2912 @SIM_ENABLE_ARCH_pru_TRUE@      pru/sim-resume.o
2913
2914 @SIM_ENABLE_ARCH_pru_TRUE@pru_run_SOURCES =
2915 @SIM_ENABLE_ARCH_pru_TRUE@pru_run_LDADD = \
2916 @SIM_ENABLE_ARCH_pru_TRUE@      pru/nrun.o \
2917 @SIM_ENABLE_ARCH_pru_TRUE@      pru/libsim.a \
2918 @SIM_ENABLE_ARCH_pru_TRUE@      $(SIM_COMMON_LIBS)
2919
2920 @SIM_ENABLE_ARCH_riscv_TRUE@AM_CPPFLAGS_riscv = -DWITH_TARGET_WORD_BITSIZE=$(SIM_RISCV_BITSIZE)
2921 @SIM_ENABLE_ARCH_riscv_TRUE@nodist_riscv_libsim_a_SOURCES = \
2922 @SIM_ENABLE_ARCH_riscv_TRUE@    riscv/modules.c
2923
2924 @SIM_ENABLE_ARCH_riscv_TRUE@riscv_libsim_a_SOURCES = \
2925 @SIM_ENABLE_ARCH_riscv_TRUE@    $(common_libcommon_a_SOURCES)
2926
2927 @SIM_ENABLE_ARCH_riscv_TRUE@riscv_libsim_a_LIBADD = \
2928 @SIM_ENABLE_ARCH_riscv_TRUE@    $(patsubst %,riscv/%,$(SIM_NEW_COMMON_OBJS)) \
2929 @SIM_ENABLE_ARCH_riscv_TRUE@    $(patsubst %,riscv/dv-%.o,$(SIM_HW_DEVICES)) \
2930 @SIM_ENABLE_ARCH_riscv_TRUE@    riscv/interp.o \
2931 @SIM_ENABLE_ARCH_riscv_TRUE@    riscv/machs.o \
2932 @SIM_ENABLE_ARCH_riscv_TRUE@    riscv/sim-main.o \
2933 @SIM_ENABLE_ARCH_riscv_TRUE@    riscv/sim-resume.o
2934
2935 @SIM_ENABLE_ARCH_riscv_TRUE@riscv_run_SOURCES =
2936 @SIM_ENABLE_ARCH_riscv_TRUE@riscv_run_LDADD = \
2937 @SIM_ENABLE_ARCH_riscv_TRUE@    riscv/nrun.o \
2938 @SIM_ENABLE_ARCH_riscv_TRUE@    riscv/libsim.a \
2939 @SIM_ENABLE_ARCH_riscv_TRUE@    $(SIM_COMMON_LIBS)
2940
2941 @SIM_ENABLE_ARCH_rl78_TRUE@nodist_rl78_libsim_a_SOURCES = \
2942 @SIM_ENABLE_ARCH_rl78_TRUE@     rl78/modules.c
2943
2944 @SIM_ENABLE_ARCH_rl78_TRUE@rl78_libsim_a_SOURCES = \
2945 @SIM_ENABLE_ARCH_rl78_TRUE@     $(common_libcommon_a_SOURCES)
2946
2947 @SIM_ENABLE_ARCH_rl78_TRUE@rl78_libsim_a_LIBADD = \
2948 @SIM_ENABLE_ARCH_rl78_TRUE@     rl78/load.o \
2949 @SIM_ENABLE_ARCH_rl78_TRUE@     rl78/mem.o \
2950 @SIM_ENABLE_ARCH_rl78_TRUE@     rl78/cpu.o \
2951 @SIM_ENABLE_ARCH_rl78_TRUE@     rl78/rl78.o \
2952 @SIM_ENABLE_ARCH_rl78_TRUE@     rl78/gdb-if.o \
2953 @SIM_ENABLE_ARCH_rl78_TRUE@     rl78/trace.o
2954
2955 @SIM_ENABLE_ARCH_rl78_TRUE@rl78_run_SOURCES =
2956 @SIM_ENABLE_ARCH_rl78_TRUE@rl78_run_LDADD = \
2957 @SIM_ENABLE_ARCH_rl78_TRUE@     rl78/main.o \
2958 @SIM_ENABLE_ARCH_rl78_TRUE@     rl78/libsim.a \
2959 @SIM_ENABLE_ARCH_rl78_TRUE@     $(SIM_COMMON_LIBS)
2960
2961 @SIM_ENABLE_ARCH_rx_TRUE@AM_CPPFLAGS_rx = $(SIM_RX_CYCLE_ACCURATE_FLAGS)
2962 @SIM_ENABLE_ARCH_rx_TRUE@nodist_rx_libsim_a_SOURCES = \
2963 @SIM_ENABLE_ARCH_rx_TRUE@       rx/modules.c
2964
2965 @SIM_ENABLE_ARCH_rx_TRUE@rx_libsim_a_SOURCES = \
2966 @SIM_ENABLE_ARCH_rx_TRUE@       $(common_libcommon_a_SOURCES)
2967
2968 @SIM_ENABLE_ARCH_rx_TRUE@rx_libsim_a_LIBADD = \
2969 @SIM_ENABLE_ARCH_rx_TRUE@       rx/fpu.o \
2970 @SIM_ENABLE_ARCH_rx_TRUE@       rx/load.o \
2971 @SIM_ENABLE_ARCH_rx_TRUE@       rx/mem.o \
2972 @SIM_ENABLE_ARCH_rx_TRUE@       rx/misc.o \
2973 @SIM_ENABLE_ARCH_rx_TRUE@       rx/reg.o \
2974 @SIM_ENABLE_ARCH_rx_TRUE@       rx/rx.o \
2975 @SIM_ENABLE_ARCH_rx_TRUE@       rx/syscalls.o \
2976 @SIM_ENABLE_ARCH_rx_TRUE@       rx/trace.o \
2977 @SIM_ENABLE_ARCH_rx_TRUE@       rx/gdb-if.o \
2978 @SIM_ENABLE_ARCH_rx_TRUE@       rx/err.o
2979
2980 @SIM_ENABLE_ARCH_rx_TRUE@rx_run_SOURCES =
2981 @SIM_ENABLE_ARCH_rx_TRUE@rx_run_LDADD = \
2982 @SIM_ENABLE_ARCH_rx_TRUE@       rx/main.o \
2983 @SIM_ENABLE_ARCH_rx_TRUE@       rx/libsim.a \
2984 @SIM_ENABLE_ARCH_rx_TRUE@       $(SIM_COMMON_LIBS)
2985
2986 @SIM_ENABLE_ARCH_rx_TRUE@rxdocdir = $(docdir)/rx
2987 @SIM_ENABLE_ARCH_rx_TRUE@rxdoc_DATA = rx/README.txt
2988 @SIM_ENABLE_ARCH_sh_TRUE@nodist_sh_libsim_a_SOURCES = \
2989 @SIM_ENABLE_ARCH_sh_TRUE@       sh/modules.c
2990
2991 @SIM_ENABLE_ARCH_sh_TRUE@sh_libsim_a_SOURCES = \
2992 @SIM_ENABLE_ARCH_sh_TRUE@       $(common_libcommon_a_SOURCES)
2993
2994 @SIM_ENABLE_ARCH_sh_TRUE@sh_libsim_a_LIBADD = \
2995 @SIM_ENABLE_ARCH_sh_TRUE@       sh/interp.o \
2996 @SIM_ENABLE_ARCH_sh_TRUE@       $(patsubst %,sh/%,$(SIM_NEW_COMMON_OBJS)) \
2997 @SIM_ENABLE_ARCH_sh_TRUE@       $(patsubst %,sh/dv-%.o,$(SIM_HW_DEVICES)) \
2998 @SIM_ENABLE_ARCH_sh_TRUE@       sh/table.o
2999
3000 @SIM_ENABLE_ARCH_sh_TRUE@sh_run_SOURCES =
3001 @SIM_ENABLE_ARCH_sh_TRUE@sh_run_LDADD = \
3002 @SIM_ENABLE_ARCH_sh_TRUE@       sh/nrun.o \
3003 @SIM_ENABLE_ARCH_sh_TRUE@       sh/libsim.a \
3004 @SIM_ENABLE_ARCH_sh_TRUE@       $(SIM_COMMON_LIBS)
3005
3006 @SIM_ENABLE_ARCH_sh_TRUE@sh_BUILD_OUTPUTS = \
3007 @SIM_ENABLE_ARCH_sh_TRUE@       sh/gencode$(EXEEXT) \
3008 @SIM_ENABLE_ARCH_sh_TRUE@       sh/table.c
3009
3010 @SIM_ENABLE_ARCH_sh_TRUE@sh_gencode_SOURCES = sh/gencode.c
3011 @SIM_ENABLE_ARCH_v850_TRUE@AM_CPPFLAGS_v850 = -DWITH_TARGET_WORD_BITSIZE=32 -DWITH_TARGET_WORD_MSB=31
3012 @SIM_ENABLE_ARCH_v850_TRUE@nodist_v850_libsim_a_SOURCES = \
3013 @SIM_ENABLE_ARCH_v850_TRUE@     v850/modules.c
3014
3015 @SIM_ENABLE_ARCH_v850_TRUE@v850_libsim_a_SOURCES = \
3016 @SIM_ENABLE_ARCH_v850_TRUE@     $(common_libcommon_a_SOURCES)
3017
3018 @SIM_ENABLE_ARCH_v850_TRUE@v850_libsim_a_LIBADD = \
3019 @SIM_ENABLE_ARCH_v850_TRUE@     $(patsubst %,v850/%,$(SIM_NEW_COMMON_OBJS)) \
3020 @SIM_ENABLE_ARCH_v850_TRUE@     $(patsubst %,v850/dv-%.o,$(SIM_HW_DEVICES)) \
3021 @SIM_ENABLE_ARCH_v850_TRUE@     v850/simops.o \
3022 @SIM_ENABLE_ARCH_v850_TRUE@     v850/interp.o \
3023 @SIM_ENABLE_ARCH_v850_TRUE@     v850/itable.o \
3024 @SIM_ENABLE_ARCH_v850_TRUE@     v850/semantics.o \
3025 @SIM_ENABLE_ARCH_v850_TRUE@     v850/idecode.o \
3026 @SIM_ENABLE_ARCH_v850_TRUE@     v850/icache.o \
3027 @SIM_ENABLE_ARCH_v850_TRUE@     v850/engine.o \
3028 @SIM_ENABLE_ARCH_v850_TRUE@     v850/irun.o \
3029 @SIM_ENABLE_ARCH_v850_TRUE@     v850/support.o \
3030 @SIM_ENABLE_ARCH_v850_TRUE@     v850/sim-resume.o
3031
3032 @SIM_ENABLE_ARCH_v850_TRUE@v850_run_SOURCES =
3033 @SIM_ENABLE_ARCH_v850_TRUE@v850_run_LDADD = \
3034 @SIM_ENABLE_ARCH_v850_TRUE@     v850/nrun.o \
3035 @SIM_ENABLE_ARCH_v850_TRUE@     v850/libsim.a \
3036 @SIM_ENABLE_ARCH_v850_TRUE@     $(SIM_COMMON_LIBS)
3037
3038 @SIM_ENABLE_ARCH_v850_TRUE@v850_BUILT_SRC_FROM_IGEN = \
3039 @SIM_ENABLE_ARCH_v850_TRUE@     v850/icache.h \
3040 @SIM_ENABLE_ARCH_v850_TRUE@     v850/icache.c \
3041 @SIM_ENABLE_ARCH_v850_TRUE@     v850/idecode.h \
3042 @SIM_ENABLE_ARCH_v850_TRUE@     v850/idecode.c \
3043 @SIM_ENABLE_ARCH_v850_TRUE@     v850/semantics.h \
3044 @SIM_ENABLE_ARCH_v850_TRUE@     v850/semantics.c \
3045 @SIM_ENABLE_ARCH_v850_TRUE@     v850/model.h \
3046 @SIM_ENABLE_ARCH_v850_TRUE@     v850/model.c \
3047 @SIM_ENABLE_ARCH_v850_TRUE@     v850/support.h \
3048 @SIM_ENABLE_ARCH_v850_TRUE@     v850/support.c \
3049 @SIM_ENABLE_ARCH_v850_TRUE@     v850/itable.h \
3050 @SIM_ENABLE_ARCH_v850_TRUE@     v850/itable.c \
3051 @SIM_ENABLE_ARCH_v850_TRUE@     v850/engine.h \
3052 @SIM_ENABLE_ARCH_v850_TRUE@     v850/engine.c \
3053 @SIM_ENABLE_ARCH_v850_TRUE@     v850/irun.c
3054
3055 @SIM_ENABLE_ARCH_v850_TRUE@v850_BUILD_OUTPUTS = \
3056 @SIM_ENABLE_ARCH_v850_TRUE@     $(v850_BUILT_SRC_FROM_IGEN) \
3057 @SIM_ENABLE_ARCH_v850_TRUE@     v850/stamp-igen
3058
3059 @SIM_ENABLE_ARCH_v850_TRUE@v850_IGEN_TRACE = # -G omit-line-numbers # -G trace-rule-selection -G trace-rule-rejection -G trace-entries
3060 @SIM_ENABLE_ARCH_v850_TRUE@v850_IGEN_INSN = $(srcdir)/v850/v850.igen
3061 @SIM_ENABLE_ARCH_v850_TRUE@v850_IGEN_DC = $(srcdir)/v850/v850.dc
3062 all: $(BUILT_SOURCES) config.h
3063         $(MAKE) $(AM_MAKEFLAGS) all-recursive
3064
3065 .SUFFIXES:
3066 .SUFFIXES: .c .lo .log .o .obj .test .test$(EXEEXT) .trs
3067 am--refresh: Makefile
3068         @:
3069 $(srcdir)/Makefile.in: @MAINTAINER_MODE_TRUE@ $(srcdir)/Makefile.am $(srcdir)/common/local.mk $(srcdir)/igen/local.mk $(srcdir)/testsuite/local.mk $(srcdir)/testsuite/common/local.mk $(srcdir)/aarch64/local.mk $(srcdir)/arm/local.mk $(srcdir)/avr/local.mk $(srcdir)/bfin/local.mk $(srcdir)/bpf/local.mk $(srcdir)/cr16/local.mk $(srcdir)/cris/local.mk $(srcdir)/d10v/local.mk $(srcdir)/erc32/local.mk $(srcdir)/example-synacor/local.mk $(srcdir)/frv/local.mk $(srcdir)/ft32/local.mk $(srcdir)/h8300/local.mk $(srcdir)/iq2000/local.mk $(srcdir)/lm32/local.mk $(srcdir)/m32c/local.mk $(srcdir)/m32r/local.mk $(srcdir)/m68hc11/local.mk $(srcdir)/mcore/local.mk $(srcdir)/microblaze/local.mk $(srcdir)/mips/local.mk $(srcdir)/mn10300/local.mk $(srcdir)/moxie/local.mk $(srcdir)/msp430/local.mk $(srcdir)/or1k/local.mk $(srcdir)/ppc/local.mk $(srcdir)/pru/local.mk $(srcdir)/riscv/local.mk $(srcdir)/rl78/local.mk $(srcdir)/rx/local.mk $(srcdir)/sh/local.mk $(srcdir)/v850/local.mk $(am__configure_deps)
3070         @for dep in $?; do \
3071           case '$(am__configure_deps)' in \
3072             *$$dep*) \
3073               echo ' cd $(srcdir) && $(AUTOMAKE) --foreign'; \
3074               $(am__cd) $(srcdir) && $(AUTOMAKE) --foreign \
3075                 && exit 0; \
3076               exit 1;; \
3077           esac; \
3078         done; \
3079         echo ' cd $(top_srcdir) && $(AUTOMAKE) --foreign Makefile'; \
3080         $(am__cd) $(top_srcdir) && \
3081           $(AUTOMAKE) --foreign Makefile
3082 Makefile: $(srcdir)/Makefile.in $(top_builddir)/config.status
3083         @case '$?' in \
3084           *config.status*) \
3085             echo ' $(SHELL) ./config.status'; \
3086             $(SHELL) ./config.status;; \
3087           *) \
3088             echo ' cd $(top_builddir) && $(SHELL) ./config.status $@ $(am__depfiles_maybe)'; \
3089             cd $(top_builddir) && $(SHELL) ./config.status $@ $(am__depfiles_maybe);; \
3090         esac;
3091 $(srcdir)/common/local.mk $(srcdir)/igen/local.mk $(srcdir)/testsuite/local.mk $(srcdir)/testsuite/common/local.mk $(srcdir)/aarch64/local.mk $(srcdir)/arm/local.mk $(srcdir)/avr/local.mk $(srcdir)/bfin/local.mk $(srcdir)/bpf/local.mk $(srcdir)/cr16/local.mk $(srcdir)/cris/local.mk $(srcdir)/d10v/local.mk $(srcdir)/erc32/local.mk $(srcdir)/example-synacor/local.mk $(srcdir)/frv/local.mk $(srcdir)/ft32/local.mk $(srcdir)/h8300/local.mk $(srcdir)/iq2000/local.mk $(srcdir)/lm32/local.mk $(srcdir)/m32c/local.mk $(srcdir)/m32r/local.mk $(srcdir)/m68hc11/local.mk $(srcdir)/mcore/local.mk $(srcdir)/microblaze/local.mk $(srcdir)/mips/local.mk $(srcdir)/mn10300/local.mk $(srcdir)/moxie/local.mk $(srcdir)/msp430/local.mk $(srcdir)/or1k/local.mk $(srcdir)/ppc/local.mk $(srcdir)/pru/local.mk $(srcdir)/riscv/local.mk $(srcdir)/rl78/local.mk $(srcdir)/rx/local.mk $(srcdir)/sh/local.mk $(srcdir)/v850/local.mk $(am__empty):
3092
3093 $(top_builddir)/config.status: $(top_srcdir)/configure $(CONFIG_STATUS_DEPENDENCIES)
3094         $(SHELL) ./config.status --recheck
3095
3096 $(top_srcdir)/configure: @MAINTAINER_MODE_TRUE@ $(am__configure_deps)
3097         $(am__cd) $(srcdir) && $(AUTOCONF)
3098 $(ACLOCAL_M4): @MAINTAINER_MODE_TRUE@ $(am__aclocal_m4_deps)
3099         $(am__cd) $(srcdir) && $(ACLOCAL) $(ACLOCAL_AMFLAGS)
3100 $(am__aclocal_m4_deps):
3101
3102 config.h: stamp-h1
3103         @test -f $@ || rm -f stamp-h1
3104         @test -f $@ || $(MAKE) $(AM_MAKEFLAGS) stamp-h1
3105
3106 stamp-h1: $(srcdir)/config.h.in $(top_builddir)/config.status
3107         @rm -f stamp-h1
3108         cd $(top_builddir) && $(SHELL) ./config.status config.h
3109 $(srcdir)/config.h.in: @MAINTAINER_MODE_TRUE@ $(am__configure_deps)
3110         ($(am__cd) $(top_srcdir) && $(AUTOHEADER))
3111         rm -f stamp-h1
3112         touch $@
3113
3114 distclean-hdr:
3115         -rm -f config.h stamp-h1
3116 aarch64/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
3117         cd $(top_builddir) && $(SHELL) ./config.status $@
3118 arm/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
3119         cd $(top_builddir) && $(SHELL) ./config.status $@
3120 avr/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
3121         cd $(top_builddir) && $(SHELL) ./config.status $@
3122 bfin/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
3123         cd $(top_builddir) && $(SHELL) ./config.status $@
3124 bpf/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
3125         cd $(top_builddir) && $(SHELL) ./config.status $@
3126 cr16/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
3127         cd $(top_builddir) && $(SHELL) ./config.status $@
3128 cris/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
3129         cd $(top_builddir) && $(SHELL) ./config.status $@
3130 d10v/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
3131         cd $(top_builddir) && $(SHELL) ./config.status $@
3132 frv/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
3133         cd $(top_builddir) && $(SHELL) ./config.status $@
3134 ft32/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
3135         cd $(top_builddir) && $(SHELL) ./config.status $@
3136 h8300/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
3137         cd $(top_builddir) && $(SHELL) ./config.status $@
3138 iq2000/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
3139         cd $(top_builddir) && $(SHELL) ./config.status $@
3140 lm32/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
3141         cd $(top_builddir) && $(SHELL) ./config.status $@
3142 m32c/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
3143         cd $(top_builddir) && $(SHELL) ./config.status $@
3144 m32r/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
3145         cd $(top_builddir) && $(SHELL) ./config.status $@
3146 m68hc11/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
3147         cd $(top_builddir) && $(SHELL) ./config.status $@
3148 mcore/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
3149         cd $(top_builddir) && $(SHELL) ./config.status $@
3150 microblaze/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
3151         cd $(top_builddir) && $(SHELL) ./config.status $@
3152 mips/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
3153         cd $(top_builddir) && $(SHELL) ./config.status $@
3154 mn10300/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
3155         cd $(top_builddir) && $(SHELL) ./config.status $@
3156 moxie/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
3157         cd $(top_builddir) && $(SHELL) ./config.status $@
3158 msp430/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
3159         cd $(top_builddir) && $(SHELL) ./config.status $@
3160 or1k/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
3161         cd $(top_builddir) && $(SHELL) ./config.status $@
3162 ppc/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
3163         cd $(top_builddir) && $(SHELL) ./config.status $@
3164 pru/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
3165         cd $(top_builddir) && $(SHELL) ./config.status $@
3166 riscv/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
3167         cd $(top_builddir) && $(SHELL) ./config.status $@
3168 rl78/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
3169         cd $(top_builddir) && $(SHELL) ./config.status $@
3170 rx/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
3171         cd $(top_builddir) && $(SHELL) ./config.status $@
3172 sh/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
3173         cd $(top_builddir) && $(SHELL) ./config.status $@
3174 erc32/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
3175         cd $(top_builddir) && $(SHELL) ./config.status $@
3176 v850/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
3177         cd $(top_builddir) && $(SHELL) ./config.status $@
3178 example-synacor/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
3179         cd $(top_builddir) && $(SHELL) ./config.status $@
3180 arch-subdir.mk: $(top_builddir)/config.status $(srcdir)/arch-subdir.mk.in
3181         cd $(top_builddir) && $(SHELL) ./config.status $@
3182 .gdbinit: $(top_builddir)/config.status $(srcdir)/gdbinit.in
3183         cd $(top_builddir) && $(SHELL) ./config.status $@
3184
3185 clean-noinstLIBRARIES:
3186         -test -z "$(noinst_LIBRARIES)" || rm -f $(noinst_LIBRARIES)
3187 common/$(am__dirstamp):
3188         @$(MKDIR_P) common
3189         @: > common/$(am__dirstamp)
3190 common/$(DEPDIR)/$(am__dirstamp):
3191         @$(MKDIR_P) common/$(DEPDIR)
3192         @: > common/$(DEPDIR)/$(am__dirstamp)
3193 common/callback.$(OBJEXT): common/$(am__dirstamp) \
3194         common/$(DEPDIR)/$(am__dirstamp)
3195 common/portability.$(OBJEXT): common/$(am__dirstamp) \
3196         common/$(DEPDIR)/$(am__dirstamp)
3197 common/sim-load.$(OBJEXT): common/$(am__dirstamp) \
3198         common/$(DEPDIR)/$(am__dirstamp)
3199 common/sim-signal.$(OBJEXT): common/$(am__dirstamp) \
3200         common/$(DEPDIR)/$(am__dirstamp)
3201 common/syscall.$(OBJEXT): common/$(am__dirstamp) \
3202         common/$(DEPDIR)/$(am__dirstamp)
3203 common/target-newlib-errno.$(OBJEXT): common/$(am__dirstamp) \
3204         common/$(DEPDIR)/$(am__dirstamp)
3205 common/target-newlib-open.$(OBJEXT): common/$(am__dirstamp) \
3206         common/$(DEPDIR)/$(am__dirstamp)
3207 common/target-newlib-signal.$(OBJEXT): common/$(am__dirstamp) \
3208         common/$(DEPDIR)/$(am__dirstamp)
3209 common/target-newlib-syscall.$(OBJEXT): common/$(am__dirstamp) \
3210         common/$(DEPDIR)/$(am__dirstamp)
3211 common/version.$(OBJEXT): common/$(am__dirstamp) \
3212         common/$(DEPDIR)/$(am__dirstamp)
3213 aarch64/$(am__dirstamp):
3214         @$(MKDIR_P) aarch64
3215         @: > aarch64/$(am__dirstamp)
3216 aarch64/$(DEPDIR)/$(am__dirstamp):
3217         @$(MKDIR_P) aarch64/$(DEPDIR)
3218         @: > aarch64/$(DEPDIR)/$(am__dirstamp)
3219 aarch64/modules.$(OBJEXT): aarch64/$(am__dirstamp) \
3220         aarch64/$(DEPDIR)/$(am__dirstamp)
3221
3222 aarch64/libsim.a: $(aarch64_libsim_a_OBJECTS) $(aarch64_libsim_a_DEPENDENCIES) $(EXTRA_aarch64_libsim_a_DEPENDENCIES) aarch64/$(am__dirstamp)
3223         $(AM_V_at)-rm -f aarch64/libsim.a
3224         $(AM_V_AR)$(aarch64_libsim_a_AR) aarch64/libsim.a $(aarch64_libsim_a_OBJECTS) $(aarch64_libsim_a_LIBADD)
3225         $(AM_V_at)$(RANLIB) aarch64/libsim.a
3226 arm/$(am__dirstamp):
3227         @$(MKDIR_P) arm
3228         @: > arm/$(am__dirstamp)
3229 arm/$(DEPDIR)/$(am__dirstamp):
3230         @$(MKDIR_P) arm/$(DEPDIR)
3231         @: > arm/$(DEPDIR)/$(am__dirstamp)
3232 arm/modules.$(OBJEXT): arm/$(am__dirstamp) \
3233         arm/$(DEPDIR)/$(am__dirstamp)
3234
3235 arm/libsim.a: $(arm_libsim_a_OBJECTS) $(arm_libsim_a_DEPENDENCIES) $(EXTRA_arm_libsim_a_DEPENDENCIES) arm/$(am__dirstamp)
3236         $(AM_V_at)-rm -f arm/libsim.a
3237         $(AM_V_AR)$(arm_libsim_a_AR) arm/libsim.a $(arm_libsim_a_OBJECTS) $(arm_libsim_a_LIBADD)
3238         $(AM_V_at)$(RANLIB) arm/libsim.a
3239 avr/$(am__dirstamp):
3240         @$(MKDIR_P) avr
3241         @: > avr/$(am__dirstamp)
3242 avr/$(DEPDIR)/$(am__dirstamp):
3243         @$(MKDIR_P) avr/$(DEPDIR)
3244         @: > avr/$(DEPDIR)/$(am__dirstamp)
3245 avr/modules.$(OBJEXT): avr/$(am__dirstamp) \
3246         avr/$(DEPDIR)/$(am__dirstamp)
3247
3248 avr/libsim.a: $(avr_libsim_a_OBJECTS) $(avr_libsim_a_DEPENDENCIES) $(EXTRA_avr_libsim_a_DEPENDENCIES) avr/$(am__dirstamp)
3249         $(AM_V_at)-rm -f avr/libsim.a
3250         $(AM_V_AR)$(avr_libsim_a_AR) avr/libsim.a $(avr_libsim_a_OBJECTS) $(avr_libsim_a_LIBADD)
3251         $(AM_V_at)$(RANLIB) avr/libsim.a
3252 bfin/$(am__dirstamp):
3253         @$(MKDIR_P) bfin
3254         @: > bfin/$(am__dirstamp)
3255 bfin/$(DEPDIR)/$(am__dirstamp):
3256         @$(MKDIR_P) bfin/$(DEPDIR)
3257         @: > bfin/$(DEPDIR)/$(am__dirstamp)
3258 bfin/modules.$(OBJEXT): bfin/$(am__dirstamp) \
3259         bfin/$(DEPDIR)/$(am__dirstamp)
3260
3261 bfin/libsim.a: $(bfin_libsim_a_OBJECTS) $(bfin_libsim_a_DEPENDENCIES) $(EXTRA_bfin_libsim_a_DEPENDENCIES) bfin/$(am__dirstamp)
3262         $(AM_V_at)-rm -f bfin/libsim.a
3263         $(AM_V_AR)$(bfin_libsim_a_AR) bfin/libsim.a $(bfin_libsim_a_OBJECTS) $(bfin_libsim_a_LIBADD)
3264         $(AM_V_at)$(RANLIB) bfin/libsim.a
3265 bpf/$(am__dirstamp):
3266         @$(MKDIR_P) bpf
3267         @: > bpf/$(am__dirstamp)
3268 bpf/$(DEPDIR)/$(am__dirstamp):
3269         @$(MKDIR_P) bpf/$(DEPDIR)
3270         @: > bpf/$(DEPDIR)/$(am__dirstamp)
3271 bpf/modules.$(OBJEXT): bpf/$(am__dirstamp) \
3272         bpf/$(DEPDIR)/$(am__dirstamp)
3273
3274 bpf/libsim.a: $(bpf_libsim_a_OBJECTS) $(bpf_libsim_a_DEPENDENCIES) $(EXTRA_bpf_libsim_a_DEPENDENCIES) bpf/$(am__dirstamp)
3275         $(AM_V_at)-rm -f bpf/libsim.a
3276         $(AM_V_AR)$(bpf_libsim_a_AR) bpf/libsim.a $(bpf_libsim_a_OBJECTS) $(bpf_libsim_a_LIBADD)
3277         $(AM_V_at)$(RANLIB) bpf/libsim.a
3278
3279 common/libcommon.a: $(common_libcommon_a_OBJECTS) $(common_libcommon_a_DEPENDENCIES) $(EXTRA_common_libcommon_a_DEPENDENCIES) common/$(am__dirstamp)
3280         $(AM_V_at)-rm -f common/libcommon.a
3281         $(AM_V_AR)$(common_libcommon_a_AR) common/libcommon.a $(common_libcommon_a_OBJECTS) $(common_libcommon_a_LIBADD)
3282         $(AM_V_at)$(RANLIB) common/libcommon.a
3283 cr16/$(am__dirstamp):
3284         @$(MKDIR_P) cr16
3285         @: > cr16/$(am__dirstamp)
3286 cr16/$(DEPDIR)/$(am__dirstamp):
3287         @$(MKDIR_P) cr16/$(DEPDIR)
3288         @: > cr16/$(DEPDIR)/$(am__dirstamp)
3289 cr16/modules.$(OBJEXT): cr16/$(am__dirstamp) \
3290         cr16/$(DEPDIR)/$(am__dirstamp)
3291
3292 cr16/libsim.a: $(cr16_libsim_a_OBJECTS) $(cr16_libsim_a_DEPENDENCIES) $(EXTRA_cr16_libsim_a_DEPENDENCIES) cr16/$(am__dirstamp)
3293         $(AM_V_at)-rm -f cr16/libsim.a
3294         $(AM_V_AR)$(cr16_libsim_a_AR) cr16/libsim.a $(cr16_libsim_a_OBJECTS) $(cr16_libsim_a_LIBADD)
3295         $(AM_V_at)$(RANLIB) cr16/libsim.a
3296 cris/$(am__dirstamp):
3297         @$(MKDIR_P) cris
3298         @: > cris/$(am__dirstamp)
3299 cris/$(DEPDIR)/$(am__dirstamp):
3300         @$(MKDIR_P) cris/$(DEPDIR)
3301         @: > cris/$(DEPDIR)/$(am__dirstamp)
3302 cris/modules.$(OBJEXT): cris/$(am__dirstamp) \
3303         cris/$(DEPDIR)/$(am__dirstamp)
3304
3305 cris/libsim.a: $(cris_libsim_a_OBJECTS) $(cris_libsim_a_DEPENDENCIES) $(EXTRA_cris_libsim_a_DEPENDENCIES) cris/$(am__dirstamp)
3306         $(AM_V_at)-rm -f cris/libsim.a
3307         $(AM_V_AR)$(cris_libsim_a_AR) cris/libsim.a $(cris_libsim_a_OBJECTS) $(cris_libsim_a_LIBADD)
3308         $(AM_V_at)$(RANLIB) cris/libsim.a
3309 d10v/$(am__dirstamp):
3310         @$(MKDIR_P) d10v
3311         @: > d10v/$(am__dirstamp)
3312 d10v/$(DEPDIR)/$(am__dirstamp):
3313         @$(MKDIR_P) d10v/$(DEPDIR)
3314         @: > d10v/$(DEPDIR)/$(am__dirstamp)
3315 d10v/modules.$(OBJEXT): d10v/$(am__dirstamp) \
3316         d10v/$(DEPDIR)/$(am__dirstamp)
3317
3318 d10v/libsim.a: $(d10v_libsim_a_OBJECTS) $(d10v_libsim_a_DEPENDENCIES) $(EXTRA_d10v_libsim_a_DEPENDENCIES) d10v/$(am__dirstamp)
3319         $(AM_V_at)-rm -f d10v/libsim.a
3320         $(AM_V_AR)$(d10v_libsim_a_AR) d10v/libsim.a $(d10v_libsim_a_OBJECTS) $(d10v_libsim_a_LIBADD)
3321         $(AM_V_at)$(RANLIB) d10v/libsim.a
3322 erc32/$(am__dirstamp):
3323         @$(MKDIR_P) erc32
3324         @: > erc32/$(am__dirstamp)
3325 erc32/$(DEPDIR)/$(am__dirstamp):
3326         @$(MKDIR_P) erc32/$(DEPDIR)
3327         @: > erc32/$(DEPDIR)/$(am__dirstamp)
3328 erc32/modules.$(OBJEXT): erc32/$(am__dirstamp) \
3329         erc32/$(DEPDIR)/$(am__dirstamp)
3330
3331 erc32/libsim.a: $(erc32_libsim_a_OBJECTS) $(erc32_libsim_a_DEPENDENCIES) $(EXTRA_erc32_libsim_a_DEPENDENCIES) erc32/$(am__dirstamp)
3332         $(AM_V_at)-rm -f erc32/libsim.a
3333         $(AM_V_AR)$(erc32_libsim_a_AR) erc32/libsim.a $(erc32_libsim_a_OBJECTS) $(erc32_libsim_a_LIBADD)
3334         $(AM_V_at)$(RANLIB) erc32/libsim.a
3335 example-synacor/$(am__dirstamp):
3336         @$(MKDIR_P) example-synacor
3337         @: > example-synacor/$(am__dirstamp)
3338 example-synacor/$(DEPDIR)/$(am__dirstamp):
3339         @$(MKDIR_P) example-synacor/$(DEPDIR)
3340         @: > example-synacor/$(DEPDIR)/$(am__dirstamp)
3341 example-synacor/modules.$(OBJEXT): example-synacor/$(am__dirstamp) \
3342         example-synacor/$(DEPDIR)/$(am__dirstamp)
3343
3344 example-synacor/libsim.a: $(example_synacor_libsim_a_OBJECTS) $(example_synacor_libsim_a_DEPENDENCIES) $(EXTRA_example_synacor_libsim_a_DEPENDENCIES) example-synacor/$(am__dirstamp)
3345         $(AM_V_at)-rm -f example-synacor/libsim.a
3346         $(AM_V_AR)$(example_synacor_libsim_a_AR) example-synacor/libsim.a $(example_synacor_libsim_a_OBJECTS) $(example_synacor_libsim_a_LIBADD)
3347         $(AM_V_at)$(RANLIB) example-synacor/libsim.a
3348 frv/$(am__dirstamp):
3349         @$(MKDIR_P) frv
3350         @: > frv/$(am__dirstamp)
3351 frv/$(DEPDIR)/$(am__dirstamp):
3352         @$(MKDIR_P) frv/$(DEPDIR)
3353         @: > frv/$(DEPDIR)/$(am__dirstamp)
3354 frv/modules.$(OBJEXT): frv/$(am__dirstamp) \
3355         frv/$(DEPDIR)/$(am__dirstamp)
3356
3357 frv/libsim.a: $(frv_libsim_a_OBJECTS) $(frv_libsim_a_DEPENDENCIES) $(EXTRA_frv_libsim_a_DEPENDENCIES) frv/$(am__dirstamp)
3358         $(AM_V_at)-rm -f frv/libsim.a
3359         $(AM_V_AR)$(frv_libsim_a_AR) frv/libsim.a $(frv_libsim_a_OBJECTS) $(frv_libsim_a_LIBADD)
3360         $(AM_V_at)$(RANLIB) frv/libsim.a
3361 ft32/$(am__dirstamp):
3362         @$(MKDIR_P) ft32
3363         @: > ft32/$(am__dirstamp)
3364 ft32/$(DEPDIR)/$(am__dirstamp):
3365         @$(MKDIR_P) ft32/$(DEPDIR)
3366         @: > ft32/$(DEPDIR)/$(am__dirstamp)
3367 ft32/modules.$(OBJEXT): ft32/$(am__dirstamp) \
3368         ft32/$(DEPDIR)/$(am__dirstamp)
3369
3370 ft32/libsim.a: $(ft32_libsim_a_OBJECTS) $(ft32_libsim_a_DEPENDENCIES) $(EXTRA_ft32_libsim_a_DEPENDENCIES) ft32/$(am__dirstamp)
3371         $(AM_V_at)-rm -f ft32/libsim.a
3372         $(AM_V_AR)$(ft32_libsim_a_AR) ft32/libsim.a $(ft32_libsim_a_OBJECTS) $(ft32_libsim_a_LIBADD)
3373         $(AM_V_at)$(RANLIB) ft32/libsim.a
3374 h8300/$(am__dirstamp):
3375         @$(MKDIR_P) h8300
3376         @: > h8300/$(am__dirstamp)
3377 h8300/$(DEPDIR)/$(am__dirstamp):
3378         @$(MKDIR_P) h8300/$(DEPDIR)
3379         @: > h8300/$(DEPDIR)/$(am__dirstamp)
3380 h8300/modules.$(OBJEXT): h8300/$(am__dirstamp) \
3381         h8300/$(DEPDIR)/$(am__dirstamp)
3382
3383 h8300/libsim.a: $(h8300_libsim_a_OBJECTS) $(h8300_libsim_a_DEPENDENCIES) $(EXTRA_h8300_libsim_a_DEPENDENCIES) h8300/$(am__dirstamp)
3384         $(AM_V_at)-rm -f h8300/libsim.a
3385         $(AM_V_AR)$(h8300_libsim_a_AR) h8300/libsim.a $(h8300_libsim_a_OBJECTS) $(h8300_libsim_a_LIBADD)
3386         $(AM_V_at)$(RANLIB) h8300/libsim.a
3387 igen/$(am__dirstamp):
3388         @$(MKDIR_P) igen
3389         @: > igen/$(am__dirstamp)
3390 igen/$(DEPDIR)/$(am__dirstamp):
3391         @$(MKDIR_P) igen/$(DEPDIR)
3392         @: > igen/$(DEPDIR)/$(am__dirstamp)
3393 igen/table.$(OBJEXT): igen/$(am__dirstamp) \
3394         igen/$(DEPDIR)/$(am__dirstamp)
3395 igen/lf.$(OBJEXT): igen/$(am__dirstamp) igen/$(DEPDIR)/$(am__dirstamp)
3396 igen/misc.$(OBJEXT): igen/$(am__dirstamp) \
3397         igen/$(DEPDIR)/$(am__dirstamp)
3398 igen/filter_host.$(OBJEXT): igen/$(am__dirstamp) \
3399         igen/$(DEPDIR)/$(am__dirstamp)
3400 igen/ld-decode.$(OBJEXT): igen/$(am__dirstamp) \
3401         igen/$(DEPDIR)/$(am__dirstamp)
3402 igen/ld-cache.$(OBJEXT): igen/$(am__dirstamp) \
3403         igen/$(DEPDIR)/$(am__dirstamp)
3404 igen/filter.$(OBJEXT): igen/$(am__dirstamp) \
3405         igen/$(DEPDIR)/$(am__dirstamp)
3406 igen/ld-insn.$(OBJEXT): igen/$(am__dirstamp) \
3407         igen/$(DEPDIR)/$(am__dirstamp)
3408 igen/gen-model.$(OBJEXT): igen/$(am__dirstamp) \
3409         igen/$(DEPDIR)/$(am__dirstamp)
3410 igen/gen-itable.$(OBJEXT): igen/$(am__dirstamp) \
3411         igen/$(DEPDIR)/$(am__dirstamp)
3412 igen/gen-icache.$(OBJEXT): igen/$(am__dirstamp) \
3413         igen/$(DEPDIR)/$(am__dirstamp)
3414 igen/gen-semantics.$(OBJEXT): igen/$(am__dirstamp) \
3415         igen/$(DEPDIR)/$(am__dirstamp)
3416 igen/gen-idecode.$(OBJEXT): igen/$(am__dirstamp) \
3417         igen/$(DEPDIR)/$(am__dirstamp)
3418 igen/gen-support.$(OBJEXT): igen/$(am__dirstamp) \
3419         igen/$(DEPDIR)/$(am__dirstamp)
3420 igen/gen-engine.$(OBJEXT): igen/$(am__dirstamp) \
3421         igen/$(DEPDIR)/$(am__dirstamp)
3422 igen/gen.$(OBJEXT): igen/$(am__dirstamp) \
3423         igen/$(DEPDIR)/$(am__dirstamp)
3424 iq2000/$(am__dirstamp):
3425         @$(MKDIR_P) iq2000
3426         @: > iq2000/$(am__dirstamp)
3427 iq2000/$(DEPDIR)/$(am__dirstamp):
3428         @$(MKDIR_P) iq2000/$(DEPDIR)
3429         @: > iq2000/$(DEPDIR)/$(am__dirstamp)
3430 iq2000/modules.$(OBJEXT): iq2000/$(am__dirstamp) \
3431         iq2000/$(DEPDIR)/$(am__dirstamp)
3432
3433 iq2000/libsim.a: $(iq2000_libsim_a_OBJECTS) $(iq2000_libsim_a_DEPENDENCIES) $(EXTRA_iq2000_libsim_a_DEPENDENCIES) iq2000/$(am__dirstamp)
3434         $(AM_V_at)-rm -f iq2000/libsim.a
3435         $(AM_V_AR)$(iq2000_libsim_a_AR) iq2000/libsim.a $(iq2000_libsim_a_OBJECTS) $(iq2000_libsim_a_LIBADD)
3436         $(AM_V_at)$(RANLIB) iq2000/libsim.a
3437 lm32/$(am__dirstamp):
3438         @$(MKDIR_P) lm32
3439         @: > lm32/$(am__dirstamp)
3440 lm32/$(DEPDIR)/$(am__dirstamp):
3441         @$(MKDIR_P) lm32/$(DEPDIR)
3442         @: > lm32/$(DEPDIR)/$(am__dirstamp)
3443 lm32/modules.$(OBJEXT): lm32/$(am__dirstamp) \
3444         lm32/$(DEPDIR)/$(am__dirstamp)
3445
3446 lm32/libsim.a: $(lm32_libsim_a_OBJECTS) $(lm32_libsim_a_DEPENDENCIES) $(EXTRA_lm32_libsim_a_DEPENDENCIES) lm32/$(am__dirstamp)
3447         $(AM_V_at)-rm -f lm32/libsim.a
3448         $(AM_V_AR)$(lm32_libsim_a_AR) lm32/libsim.a $(lm32_libsim_a_OBJECTS) $(lm32_libsim_a_LIBADD)
3449         $(AM_V_at)$(RANLIB) lm32/libsim.a
3450 m32c/$(am__dirstamp):
3451         @$(MKDIR_P) m32c
3452         @: > m32c/$(am__dirstamp)
3453 m32c/$(DEPDIR)/$(am__dirstamp):
3454         @$(MKDIR_P) m32c/$(DEPDIR)
3455         @: > m32c/$(DEPDIR)/$(am__dirstamp)
3456 m32c/modules.$(OBJEXT): m32c/$(am__dirstamp) \
3457         m32c/$(DEPDIR)/$(am__dirstamp)
3458
3459 m32c/libsim.a: $(m32c_libsim_a_OBJECTS) $(m32c_libsim_a_DEPENDENCIES) $(EXTRA_m32c_libsim_a_DEPENDENCIES) m32c/$(am__dirstamp)
3460         $(AM_V_at)-rm -f m32c/libsim.a
3461         $(AM_V_AR)$(m32c_libsim_a_AR) m32c/libsim.a $(m32c_libsim_a_OBJECTS) $(m32c_libsim_a_LIBADD)
3462         $(AM_V_at)$(RANLIB) m32c/libsim.a
3463 m32r/$(am__dirstamp):
3464         @$(MKDIR_P) m32r
3465         @: > m32r/$(am__dirstamp)
3466 m32r/$(DEPDIR)/$(am__dirstamp):
3467         @$(MKDIR_P) m32r/$(DEPDIR)
3468         @: > m32r/$(DEPDIR)/$(am__dirstamp)
3469 m32r/modules.$(OBJEXT): m32r/$(am__dirstamp) \
3470         m32r/$(DEPDIR)/$(am__dirstamp)
3471
3472 m32r/libsim.a: $(m32r_libsim_a_OBJECTS) $(m32r_libsim_a_DEPENDENCIES) $(EXTRA_m32r_libsim_a_DEPENDENCIES) m32r/$(am__dirstamp)
3473         $(AM_V_at)-rm -f m32r/libsim.a
3474         $(AM_V_AR)$(m32r_libsim_a_AR) m32r/libsim.a $(m32r_libsim_a_OBJECTS) $(m32r_libsim_a_LIBADD)
3475         $(AM_V_at)$(RANLIB) m32r/libsim.a
3476 m68hc11/$(am__dirstamp):
3477         @$(MKDIR_P) m68hc11
3478         @: > m68hc11/$(am__dirstamp)
3479 m68hc11/$(DEPDIR)/$(am__dirstamp):
3480         @$(MKDIR_P) m68hc11/$(DEPDIR)
3481         @: > m68hc11/$(DEPDIR)/$(am__dirstamp)
3482 m68hc11/modules.$(OBJEXT): m68hc11/$(am__dirstamp) \
3483         m68hc11/$(DEPDIR)/$(am__dirstamp)
3484
3485 m68hc11/libsim.a: $(m68hc11_libsim_a_OBJECTS) $(m68hc11_libsim_a_DEPENDENCIES) $(EXTRA_m68hc11_libsim_a_DEPENDENCIES) m68hc11/$(am__dirstamp)
3486         $(AM_V_at)-rm -f m68hc11/libsim.a
3487         $(AM_V_AR)$(m68hc11_libsim_a_AR) m68hc11/libsim.a $(m68hc11_libsim_a_OBJECTS) $(m68hc11_libsim_a_LIBADD)
3488         $(AM_V_at)$(RANLIB) m68hc11/libsim.a
3489 mcore/$(am__dirstamp):
3490         @$(MKDIR_P) mcore
3491         @: > mcore/$(am__dirstamp)
3492 mcore/$(DEPDIR)/$(am__dirstamp):
3493         @$(MKDIR_P) mcore/$(DEPDIR)
3494         @: > mcore/$(DEPDIR)/$(am__dirstamp)
3495 mcore/modules.$(OBJEXT): mcore/$(am__dirstamp) \
3496         mcore/$(DEPDIR)/$(am__dirstamp)
3497
3498 mcore/libsim.a: $(mcore_libsim_a_OBJECTS) $(mcore_libsim_a_DEPENDENCIES) $(EXTRA_mcore_libsim_a_DEPENDENCIES) mcore/$(am__dirstamp)
3499         $(AM_V_at)-rm -f mcore/libsim.a
3500         $(AM_V_AR)$(mcore_libsim_a_AR) mcore/libsim.a $(mcore_libsim_a_OBJECTS) $(mcore_libsim_a_LIBADD)
3501         $(AM_V_at)$(RANLIB) mcore/libsim.a
3502 microblaze/$(am__dirstamp):
3503         @$(MKDIR_P) microblaze
3504         @: > microblaze/$(am__dirstamp)
3505 microblaze/$(DEPDIR)/$(am__dirstamp):
3506         @$(MKDIR_P) microblaze/$(DEPDIR)
3507         @: > microblaze/$(DEPDIR)/$(am__dirstamp)
3508 microblaze/modules.$(OBJEXT): microblaze/$(am__dirstamp) \
3509         microblaze/$(DEPDIR)/$(am__dirstamp)
3510
3511 microblaze/libsim.a: $(microblaze_libsim_a_OBJECTS) $(microblaze_libsim_a_DEPENDENCIES) $(EXTRA_microblaze_libsim_a_DEPENDENCIES) microblaze/$(am__dirstamp)
3512         $(AM_V_at)-rm -f microblaze/libsim.a
3513         $(AM_V_AR)$(microblaze_libsim_a_AR) microblaze/libsim.a $(microblaze_libsim_a_OBJECTS) $(microblaze_libsim_a_LIBADD)
3514         $(AM_V_at)$(RANLIB) microblaze/libsim.a
3515 mips/$(am__dirstamp):
3516         @$(MKDIR_P) mips
3517         @: > mips/$(am__dirstamp)
3518 mips/$(DEPDIR)/$(am__dirstamp):
3519         @$(MKDIR_P) mips/$(DEPDIR)
3520         @: > mips/$(DEPDIR)/$(am__dirstamp)
3521 mips/modules.$(OBJEXT): mips/$(am__dirstamp) \
3522         mips/$(DEPDIR)/$(am__dirstamp)
3523
3524 mips/libsim.a: $(mips_libsim_a_OBJECTS) $(mips_libsim_a_DEPENDENCIES) $(EXTRA_mips_libsim_a_DEPENDENCIES) mips/$(am__dirstamp)
3525         $(AM_V_at)-rm -f mips/libsim.a
3526         $(AM_V_AR)$(mips_libsim_a_AR) mips/libsim.a $(mips_libsim_a_OBJECTS) $(mips_libsim_a_LIBADD)
3527         $(AM_V_at)$(RANLIB) mips/libsim.a
3528 mn10300/$(am__dirstamp):
3529         @$(MKDIR_P) mn10300
3530         @: > mn10300/$(am__dirstamp)
3531 mn10300/$(DEPDIR)/$(am__dirstamp):
3532         @$(MKDIR_P) mn10300/$(DEPDIR)
3533         @: > mn10300/$(DEPDIR)/$(am__dirstamp)
3534 mn10300/modules.$(OBJEXT): mn10300/$(am__dirstamp) \
3535         mn10300/$(DEPDIR)/$(am__dirstamp)
3536
3537 mn10300/libsim.a: $(mn10300_libsim_a_OBJECTS) $(mn10300_libsim_a_DEPENDENCIES) $(EXTRA_mn10300_libsim_a_DEPENDENCIES) mn10300/$(am__dirstamp)
3538         $(AM_V_at)-rm -f mn10300/libsim.a
3539         $(AM_V_AR)$(mn10300_libsim_a_AR) mn10300/libsim.a $(mn10300_libsim_a_OBJECTS) $(mn10300_libsim_a_LIBADD)
3540         $(AM_V_at)$(RANLIB) mn10300/libsim.a
3541 moxie/$(am__dirstamp):
3542         @$(MKDIR_P) moxie
3543         @: > moxie/$(am__dirstamp)
3544 moxie/$(DEPDIR)/$(am__dirstamp):
3545         @$(MKDIR_P) moxie/$(DEPDIR)
3546         @: > moxie/$(DEPDIR)/$(am__dirstamp)
3547 moxie/modules.$(OBJEXT): moxie/$(am__dirstamp) \
3548         moxie/$(DEPDIR)/$(am__dirstamp)
3549
3550 moxie/libsim.a: $(moxie_libsim_a_OBJECTS) $(moxie_libsim_a_DEPENDENCIES) $(EXTRA_moxie_libsim_a_DEPENDENCIES) moxie/$(am__dirstamp)
3551         $(AM_V_at)-rm -f moxie/libsim.a
3552         $(AM_V_AR)$(moxie_libsim_a_AR) moxie/libsim.a $(moxie_libsim_a_OBJECTS) $(moxie_libsim_a_LIBADD)
3553         $(AM_V_at)$(RANLIB) moxie/libsim.a
3554 msp430/$(am__dirstamp):
3555         @$(MKDIR_P) msp430
3556         @: > msp430/$(am__dirstamp)
3557 msp430/$(DEPDIR)/$(am__dirstamp):
3558         @$(MKDIR_P) msp430/$(DEPDIR)
3559         @: > msp430/$(DEPDIR)/$(am__dirstamp)
3560 msp430/modules.$(OBJEXT): msp430/$(am__dirstamp) \
3561         msp430/$(DEPDIR)/$(am__dirstamp)
3562
3563 msp430/libsim.a: $(msp430_libsim_a_OBJECTS) $(msp430_libsim_a_DEPENDENCIES) $(EXTRA_msp430_libsim_a_DEPENDENCIES) msp430/$(am__dirstamp)
3564         $(AM_V_at)-rm -f msp430/libsim.a
3565         $(AM_V_AR)$(msp430_libsim_a_AR) msp430/libsim.a $(msp430_libsim_a_OBJECTS) $(msp430_libsim_a_LIBADD)
3566         $(AM_V_at)$(RANLIB) msp430/libsim.a
3567 or1k/$(am__dirstamp):
3568         @$(MKDIR_P) or1k
3569         @: > or1k/$(am__dirstamp)
3570 or1k/$(DEPDIR)/$(am__dirstamp):
3571         @$(MKDIR_P) or1k/$(DEPDIR)
3572         @: > or1k/$(DEPDIR)/$(am__dirstamp)
3573 or1k/modules.$(OBJEXT): or1k/$(am__dirstamp) \
3574         or1k/$(DEPDIR)/$(am__dirstamp)
3575
3576 or1k/libsim.a: $(or1k_libsim_a_OBJECTS) $(or1k_libsim_a_DEPENDENCIES) $(EXTRA_or1k_libsim_a_DEPENDENCIES) or1k/$(am__dirstamp)
3577         $(AM_V_at)-rm -f or1k/libsim.a
3578         $(AM_V_AR)$(or1k_libsim_a_AR) or1k/libsim.a $(or1k_libsim_a_OBJECTS) $(or1k_libsim_a_LIBADD)
3579         $(AM_V_at)$(RANLIB) or1k/libsim.a
3580 pru/$(am__dirstamp):
3581         @$(MKDIR_P) pru
3582         @: > pru/$(am__dirstamp)
3583 pru/$(DEPDIR)/$(am__dirstamp):
3584         @$(MKDIR_P) pru/$(DEPDIR)
3585         @: > pru/$(DEPDIR)/$(am__dirstamp)
3586 pru/modules.$(OBJEXT): pru/$(am__dirstamp) \
3587         pru/$(DEPDIR)/$(am__dirstamp)
3588
3589 pru/libsim.a: $(pru_libsim_a_OBJECTS) $(pru_libsim_a_DEPENDENCIES) $(EXTRA_pru_libsim_a_DEPENDENCIES) pru/$(am__dirstamp)
3590         $(AM_V_at)-rm -f pru/libsim.a
3591         $(AM_V_AR)$(pru_libsim_a_AR) pru/libsim.a $(pru_libsim_a_OBJECTS) $(pru_libsim_a_LIBADD)
3592         $(AM_V_at)$(RANLIB) pru/libsim.a
3593 riscv/$(am__dirstamp):
3594         @$(MKDIR_P) riscv
3595         @: > riscv/$(am__dirstamp)
3596 riscv/$(DEPDIR)/$(am__dirstamp):
3597         @$(MKDIR_P) riscv/$(DEPDIR)
3598         @: > riscv/$(DEPDIR)/$(am__dirstamp)
3599 riscv/modules.$(OBJEXT): riscv/$(am__dirstamp) \
3600         riscv/$(DEPDIR)/$(am__dirstamp)
3601
3602 riscv/libsim.a: $(riscv_libsim_a_OBJECTS) $(riscv_libsim_a_DEPENDENCIES) $(EXTRA_riscv_libsim_a_DEPENDENCIES) riscv/$(am__dirstamp)
3603         $(AM_V_at)-rm -f riscv/libsim.a
3604         $(AM_V_AR)$(riscv_libsim_a_AR) riscv/libsim.a $(riscv_libsim_a_OBJECTS) $(riscv_libsim_a_LIBADD)
3605         $(AM_V_at)$(RANLIB) riscv/libsim.a
3606 rl78/$(am__dirstamp):
3607         @$(MKDIR_P) rl78
3608         @: > rl78/$(am__dirstamp)
3609 rl78/$(DEPDIR)/$(am__dirstamp):
3610         @$(MKDIR_P) rl78/$(DEPDIR)
3611         @: > rl78/$(DEPDIR)/$(am__dirstamp)
3612 rl78/modules.$(OBJEXT): rl78/$(am__dirstamp) \
3613         rl78/$(DEPDIR)/$(am__dirstamp)
3614
3615 rl78/libsim.a: $(rl78_libsim_a_OBJECTS) $(rl78_libsim_a_DEPENDENCIES) $(EXTRA_rl78_libsim_a_DEPENDENCIES) rl78/$(am__dirstamp)
3616         $(AM_V_at)-rm -f rl78/libsim.a
3617         $(AM_V_AR)$(rl78_libsim_a_AR) rl78/libsim.a $(rl78_libsim_a_OBJECTS) $(rl78_libsim_a_LIBADD)
3618         $(AM_V_at)$(RANLIB) rl78/libsim.a
3619 rx/$(am__dirstamp):
3620         @$(MKDIR_P) rx
3621         @: > rx/$(am__dirstamp)
3622 rx/$(DEPDIR)/$(am__dirstamp):
3623         @$(MKDIR_P) rx/$(DEPDIR)
3624         @: > rx/$(DEPDIR)/$(am__dirstamp)
3625 rx/modules.$(OBJEXT): rx/$(am__dirstamp) rx/$(DEPDIR)/$(am__dirstamp)
3626
3627 rx/libsim.a: $(rx_libsim_a_OBJECTS) $(rx_libsim_a_DEPENDENCIES) $(EXTRA_rx_libsim_a_DEPENDENCIES) rx/$(am__dirstamp)
3628         $(AM_V_at)-rm -f rx/libsim.a
3629         $(AM_V_AR)$(rx_libsim_a_AR) rx/libsim.a $(rx_libsim_a_OBJECTS) $(rx_libsim_a_LIBADD)
3630         $(AM_V_at)$(RANLIB) rx/libsim.a
3631 sh/$(am__dirstamp):
3632         @$(MKDIR_P) sh
3633         @: > sh/$(am__dirstamp)
3634 sh/$(DEPDIR)/$(am__dirstamp):
3635         @$(MKDIR_P) sh/$(DEPDIR)
3636         @: > sh/$(DEPDIR)/$(am__dirstamp)
3637 sh/modules.$(OBJEXT): sh/$(am__dirstamp) sh/$(DEPDIR)/$(am__dirstamp)
3638
3639 sh/libsim.a: $(sh_libsim_a_OBJECTS) $(sh_libsim_a_DEPENDENCIES) $(EXTRA_sh_libsim_a_DEPENDENCIES) sh/$(am__dirstamp)
3640         $(AM_V_at)-rm -f sh/libsim.a
3641         $(AM_V_AR)$(sh_libsim_a_AR) sh/libsim.a $(sh_libsim_a_OBJECTS) $(sh_libsim_a_LIBADD)
3642         $(AM_V_at)$(RANLIB) sh/libsim.a
3643 v850/$(am__dirstamp):
3644         @$(MKDIR_P) v850
3645         @: > v850/$(am__dirstamp)
3646 v850/$(DEPDIR)/$(am__dirstamp):
3647         @$(MKDIR_P) v850/$(DEPDIR)
3648         @: > v850/$(DEPDIR)/$(am__dirstamp)
3649 v850/modules.$(OBJEXT): v850/$(am__dirstamp) \
3650         v850/$(DEPDIR)/$(am__dirstamp)
3651
3652 v850/libsim.a: $(v850_libsim_a_OBJECTS) $(v850_libsim_a_DEPENDENCIES) $(EXTRA_v850_libsim_a_DEPENDENCIES) v850/$(am__dirstamp)
3653         $(AM_V_at)-rm -f v850/libsim.a
3654         $(AM_V_AR)$(v850_libsim_a_AR) v850/libsim.a $(v850_libsim_a_OBJECTS) $(v850_libsim_a_LIBADD)
3655         $(AM_V_at)$(RANLIB) v850/libsim.a
3656
3657 clean-checkPROGRAMS:
3658         @list='$(check_PROGRAMS)'; test -n "$$list" || exit 0; \
3659         echo " rm -f" $$list; \
3660         rm -f $$list || exit $$?; \
3661         test -n "$(EXEEXT)" || exit 0; \
3662         list=`for p in $$list; do echo "$$p"; done | sed 's/$(EXEEXT)$$//'`; \
3663         echo " rm -f" $$list; \
3664         rm -f $$list
3665
3666 clean-noinstPROGRAMS:
3667         @list='$(noinst_PROGRAMS)'; test -n "$$list" || exit 0; \
3668         echo " rm -f" $$list; \
3669         rm -f $$list || exit $$?; \
3670         test -n "$(EXEEXT)" || exit 0; \
3671         list=`for p in $$list; do echo "$$p"; done | sed 's/$(EXEEXT)$$//'`; \
3672         echo " rm -f" $$list; \
3673         rm -f $$list
3674
3675 aarch64/run$(EXEEXT): $(aarch64_run_OBJECTS) $(aarch64_run_DEPENDENCIES) $(EXTRA_aarch64_run_DEPENDENCIES) aarch64/$(am__dirstamp)
3676         @rm -f aarch64/run$(EXEEXT)
3677         $(AM_V_CCLD)$(LINK) $(aarch64_run_OBJECTS) $(aarch64_run_LDADD) $(LIBS)
3678
3679 arm/run$(EXEEXT): $(arm_run_OBJECTS) $(arm_run_DEPENDENCIES) $(EXTRA_arm_run_DEPENDENCIES) arm/$(am__dirstamp)
3680         @rm -f arm/run$(EXEEXT)
3681         $(AM_V_CCLD)$(LINK) $(arm_run_OBJECTS) $(arm_run_LDADD) $(LIBS)
3682
3683 avr/run$(EXEEXT): $(avr_run_OBJECTS) $(avr_run_DEPENDENCIES) $(EXTRA_avr_run_DEPENDENCIES) avr/$(am__dirstamp)
3684         @rm -f avr/run$(EXEEXT)
3685         $(AM_V_CCLD)$(LINK) $(avr_run_OBJECTS) $(avr_run_LDADD) $(LIBS)
3686
3687 bfin/run$(EXEEXT): $(bfin_run_OBJECTS) $(bfin_run_DEPENDENCIES) $(EXTRA_bfin_run_DEPENDENCIES) bfin/$(am__dirstamp)
3688         @rm -f bfin/run$(EXEEXT)
3689         $(AM_V_CCLD)$(LINK) $(bfin_run_OBJECTS) $(bfin_run_LDADD) $(LIBS)
3690
3691 bpf/run$(EXEEXT): $(bpf_run_OBJECTS) $(bpf_run_DEPENDENCIES) $(EXTRA_bpf_run_DEPENDENCIES) bpf/$(am__dirstamp)
3692         @rm -f bpf/run$(EXEEXT)
3693         $(AM_V_CCLD)$(LINK) $(bpf_run_OBJECTS) $(bpf_run_LDADD) $(LIBS)
3694 cr16/gencode.$(OBJEXT): cr16/$(am__dirstamp) \
3695         cr16/$(DEPDIR)/$(am__dirstamp)
3696
3697 @SIM_ENABLE_ARCH_cr16_FALSE@cr16/gencode$(EXEEXT): $(cr16_gencode_OBJECTS) $(cr16_gencode_DEPENDENCIES) $(EXTRA_cr16_gencode_DEPENDENCIES) cr16/$(am__dirstamp)
3698 @SIM_ENABLE_ARCH_cr16_FALSE@    @rm -f cr16/gencode$(EXEEXT)
3699 @SIM_ENABLE_ARCH_cr16_FALSE@    $(AM_V_CCLD)$(LINK) $(cr16_gencode_OBJECTS) $(cr16_gencode_LDADD) $(LIBS)
3700
3701 cr16/run$(EXEEXT): $(cr16_run_OBJECTS) $(cr16_run_DEPENDENCIES) $(EXTRA_cr16_run_DEPENDENCIES) cr16/$(am__dirstamp)
3702         @rm -f cr16/run$(EXEEXT)
3703         $(AM_V_CCLD)$(LINK) $(cr16_run_OBJECTS) $(cr16_run_LDADD) $(LIBS)
3704
3705 cris/run$(EXEEXT): $(cris_run_OBJECTS) $(cris_run_DEPENDENCIES) $(EXTRA_cris_run_DEPENDENCIES) cris/$(am__dirstamp)
3706         @rm -f cris/run$(EXEEXT)
3707         $(AM_V_CCLD)$(LINK) $(cris_run_OBJECTS) $(cris_run_LDADD) $(LIBS)
3708 cris/rvdummy.$(OBJEXT): cris/$(am__dirstamp) \
3709         cris/$(DEPDIR)/$(am__dirstamp)
3710
3711 cris/rvdummy$(EXEEXT): $(cris_rvdummy_OBJECTS) $(cris_rvdummy_DEPENDENCIES) $(EXTRA_cris_rvdummy_DEPENDENCIES) cris/$(am__dirstamp)
3712         @rm -f cris/rvdummy$(EXEEXT)
3713         $(AM_V_CCLD)$(LINK) $(cris_rvdummy_OBJECTS) $(cris_rvdummy_LDADD) $(LIBS)
3714 d10v/gencode.$(OBJEXT): d10v/$(am__dirstamp) \
3715         d10v/$(DEPDIR)/$(am__dirstamp)
3716
3717 @SIM_ENABLE_ARCH_d10v_FALSE@d10v/gencode$(EXEEXT): $(d10v_gencode_OBJECTS) $(d10v_gencode_DEPENDENCIES) $(EXTRA_d10v_gencode_DEPENDENCIES) d10v/$(am__dirstamp)
3718 @SIM_ENABLE_ARCH_d10v_FALSE@    @rm -f d10v/gencode$(EXEEXT)
3719 @SIM_ENABLE_ARCH_d10v_FALSE@    $(AM_V_CCLD)$(LINK) $(d10v_gencode_OBJECTS) $(d10v_gencode_LDADD) $(LIBS)
3720
3721 d10v/run$(EXEEXT): $(d10v_run_OBJECTS) $(d10v_run_DEPENDENCIES) $(EXTRA_d10v_run_DEPENDENCIES) d10v/$(am__dirstamp)
3722         @rm -f d10v/run$(EXEEXT)
3723         $(AM_V_CCLD)$(LINK) $(d10v_run_OBJECTS) $(d10v_run_LDADD) $(LIBS)
3724
3725 erc32/run$(EXEEXT): $(erc32_run_OBJECTS) $(erc32_run_DEPENDENCIES) $(EXTRA_erc32_run_DEPENDENCIES) erc32/$(am__dirstamp)
3726         @rm -f erc32/run$(EXEEXT)
3727         $(AM_V_CCLD)$(LINK) $(erc32_run_OBJECTS) $(erc32_run_LDADD) $(LIBS)
3728 erc32/sis.$(OBJEXT): erc32/$(am__dirstamp) \
3729         erc32/$(DEPDIR)/$(am__dirstamp)
3730
3731 @SIM_ENABLE_ARCH_erc32_FALSE@erc32/sis$(EXEEXT): $(erc32_sis_OBJECTS) $(erc32_sis_DEPENDENCIES) $(EXTRA_erc32_sis_DEPENDENCIES) erc32/$(am__dirstamp)
3732 @SIM_ENABLE_ARCH_erc32_FALSE@   @rm -f erc32/sis$(EXEEXT)
3733 @SIM_ENABLE_ARCH_erc32_FALSE@   $(AM_V_CCLD)$(LINK) $(erc32_sis_OBJECTS) $(erc32_sis_LDADD) $(LIBS)
3734
3735 example-synacor/run$(EXEEXT): $(example_synacor_run_OBJECTS) $(example_synacor_run_DEPENDENCIES) $(EXTRA_example_synacor_run_DEPENDENCIES) example-synacor/$(am__dirstamp)
3736         @rm -f example-synacor/run$(EXEEXT)
3737         $(AM_V_CCLD)$(LINK) $(example_synacor_run_OBJECTS) $(example_synacor_run_LDADD) $(LIBS)
3738
3739 frv/run$(EXEEXT): $(frv_run_OBJECTS) $(frv_run_DEPENDENCIES) $(EXTRA_frv_run_DEPENDENCIES) frv/$(am__dirstamp)
3740         @rm -f frv/run$(EXEEXT)
3741         $(AM_V_CCLD)$(LINK) $(frv_run_OBJECTS) $(frv_run_LDADD) $(LIBS)
3742
3743 ft32/run$(EXEEXT): $(ft32_run_OBJECTS) $(ft32_run_DEPENDENCIES) $(EXTRA_ft32_run_DEPENDENCIES) ft32/$(am__dirstamp)
3744         @rm -f ft32/run$(EXEEXT)
3745         $(AM_V_CCLD)$(LINK) $(ft32_run_OBJECTS) $(ft32_run_LDADD) $(LIBS)
3746
3747 h8300/run$(EXEEXT): $(h8300_run_OBJECTS) $(h8300_run_DEPENDENCIES) $(EXTRA_h8300_run_DEPENDENCIES) h8300/$(am__dirstamp)
3748         @rm -f h8300/run$(EXEEXT)
3749         $(AM_V_CCLD)$(LINK) $(h8300_run_OBJECTS) $(h8300_run_LDADD) $(LIBS)
3750
3751 igen/filter$(EXEEXT): $(igen_filter_OBJECTS) $(igen_filter_DEPENDENCIES) $(EXTRA_igen_filter_DEPENDENCIES) igen/$(am__dirstamp)
3752         @rm -f igen/filter$(EXEEXT)
3753         $(AM_V_CCLD)$(LINK) $(igen_filter_OBJECTS) $(igen_filter_LDADD) $(LIBS)
3754
3755 igen/gen$(EXEEXT): $(igen_gen_OBJECTS) $(igen_gen_DEPENDENCIES) $(EXTRA_igen_gen_DEPENDENCIES) igen/$(am__dirstamp)
3756         @rm -f igen/gen$(EXEEXT)
3757         $(AM_V_CCLD)$(LINK) $(igen_gen_OBJECTS) $(igen_gen_LDADD) $(LIBS)
3758 igen/igen.$(OBJEXT): igen/$(am__dirstamp) \
3759         igen/$(DEPDIR)/$(am__dirstamp)
3760
3761 igen/ld-cache$(EXEEXT): $(igen_ld_cache_OBJECTS) $(igen_ld_cache_DEPENDENCIES) $(EXTRA_igen_ld_cache_DEPENDENCIES) igen/$(am__dirstamp)
3762         @rm -f igen/ld-cache$(EXEEXT)
3763         $(AM_V_CCLD)$(LINK) $(igen_ld_cache_OBJECTS) $(igen_ld_cache_LDADD) $(LIBS)
3764
3765 igen/ld-decode$(EXEEXT): $(igen_ld_decode_OBJECTS) $(igen_ld_decode_DEPENDENCIES) $(EXTRA_igen_ld_decode_DEPENDENCIES) igen/$(am__dirstamp)
3766         @rm -f igen/ld-decode$(EXEEXT)
3767         $(AM_V_CCLD)$(LINK) $(igen_ld_decode_OBJECTS) $(igen_ld_decode_LDADD) $(LIBS)
3768
3769 igen/ld-insn$(EXEEXT): $(igen_ld_insn_OBJECTS) $(igen_ld_insn_DEPENDENCIES) $(EXTRA_igen_ld_insn_DEPENDENCIES) igen/$(am__dirstamp)
3770         @rm -f igen/ld-insn$(EXEEXT)
3771         $(AM_V_CCLD)$(LINK) $(igen_ld_insn_OBJECTS) $(igen_ld_insn_LDADD) $(LIBS)
3772
3773 igen/table$(EXEEXT): $(igen_table_OBJECTS) $(igen_table_DEPENDENCIES) $(EXTRA_igen_table_DEPENDENCIES) igen/$(am__dirstamp)
3774         @rm -f igen/table$(EXEEXT)
3775         $(AM_V_CCLD)$(LINK) $(igen_table_OBJECTS) $(igen_table_LDADD) $(LIBS)
3776
3777 iq2000/run$(EXEEXT): $(iq2000_run_OBJECTS) $(iq2000_run_DEPENDENCIES) $(EXTRA_iq2000_run_DEPENDENCIES) iq2000/$(am__dirstamp)
3778         @rm -f iq2000/run$(EXEEXT)
3779         $(AM_V_CCLD)$(LINK) $(iq2000_run_OBJECTS) $(iq2000_run_LDADD) $(LIBS)
3780
3781 lm32/run$(EXEEXT): $(lm32_run_OBJECTS) $(lm32_run_DEPENDENCIES) $(EXTRA_lm32_run_DEPENDENCIES) lm32/$(am__dirstamp)
3782         @rm -f lm32/run$(EXEEXT)
3783         $(AM_V_CCLD)$(LINK) $(lm32_run_OBJECTS) $(lm32_run_LDADD) $(LIBS)
3784 m32c/opc2c.$(OBJEXT): m32c/$(am__dirstamp) \
3785         m32c/$(DEPDIR)/$(am__dirstamp)
3786
3787 @SIM_ENABLE_ARCH_m32c_FALSE@m32c/opc2c$(EXEEXT): $(m32c_opc2c_OBJECTS) $(m32c_opc2c_DEPENDENCIES) $(EXTRA_m32c_opc2c_DEPENDENCIES) m32c/$(am__dirstamp)
3788 @SIM_ENABLE_ARCH_m32c_FALSE@    @rm -f m32c/opc2c$(EXEEXT)
3789 @SIM_ENABLE_ARCH_m32c_FALSE@    $(AM_V_CCLD)$(LINK) $(m32c_opc2c_OBJECTS) $(m32c_opc2c_LDADD) $(LIBS)
3790
3791 m32c/run$(EXEEXT): $(m32c_run_OBJECTS) $(m32c_run_DEPENDENCIES) $(EXTRA_m32c_run_DEPENDENCIES) m32c/$(am__dirstamp)
3792         @rm -f m32c/run$(EXEEXT)
3793         $(AM_V_CCLD)$(LINK) $(m32c_run_OBJECTS) $(m32c_run_LDADD) $(LIBS)
3794
3795 m32r/run$(EXEEXT): $(m32r_run_OBJECTS) $(m32r_run_DEPENDENCIES) $(EXTRA_m32r_run_DEPENDENCIES) m32r/$(am__dirstamp)
3796         @rm -f m32r/run$(EXEEXT)
3797         $(AM_V_CCLD)$(LINK) $(m32r_run_OBJECTS) $(m32r_run_LDADD) $(LIBS)
3798 m68hc11/gencode.$(OBJEXT): m68hc11/$(am__dirstamp) \
3799         m68hc11/$(DEPDIR)/$(am__dirstamp)
3800
3801 @SIM_ENABLE_ARCH_m68hc11_FALSE@m68hc11/gencode$(EXEEXT): $(m68hc11_gencode_OBJECTS) $(m68hc11_gencode_DEPENDENCIES) $(EXTRA_m68hc11_gencode_DEPENDENCIES) m68hc11/$(am__dirstamp)
3802 @SIM_ENABLE_ARCH_m68hc11_FALSE@ @rm -f m68hc11/gencode$(EXEEXT)
3803 @SIM_ENABLE_ARCH_m68hc11_FALSE@ $(AM_V_CCLD)$(LINK) $(m68hc11_gencode_OBJECTS) $(m68hc11_gencode_LDADD) $(LIBS)
3804
3805 m68hc11/run$(EXEEXT): $(m68hc11_run_OBJECTS) $(m68hc11_run_DEPENDENCIES) $(EXTRA_m68hc11_run_DEPENDENCIES) m68hc11/$(am__dirstamp)
3806         @rm -f m68hc11/run$(EXEEXT)
3807         $(AM_V_CCLD)$(LINK) $(m68hc11_run_OBJECTS) $(m68hc11_run_LDADD) $(LIBS)
3808
3809 mcore/run$(EXEEXT): $(mcore_run_OBJECTS) $(mcore_run_DEPENDENCIES) $(EXTRA_mcore_run_DEPENDENCIES) mcore/$(am__dirstamp)
3810         @rm -f mcore/run$(EXEEXT)
3811         $(AM_V_CCLD)$(LINK) $(mcore_run_OBJECTS) $(mcore_run_LDADD) $(LIBS)
3812
3813 microblaze/run$(EXEEXT): $(microblaze_run_OBJECTS) $(microblaze_run_DEPENDENCIES) $(EXTRA_microblaze_run_DEPENDENCIES) microblaze/$(am__dirstamp)
3814         @rm -f microblaze/run$(EXEEXT)
3815         $(AM_V_CCLD)$(LINK) $(microblaze_run_OBJECTS) $(microblaze_run_LDADD) $(LIBS)
3816
3817 mips/run$(EXEEXT): $(mips_run_OBJECTS) $(mips_run_DEPENDENCIES) $(EXTRA_mips_run_DEPENDENCIES) mips/$(am__dirstamp)
3818         @rm -f mips/run$(EXEEXT)
3819         $(AM_V_CCLD)$(LINK) $(mips_run_OBJECTS) $(mips_run_LDADD) $(LIBS)
3820
3821 mn10300/run$(EXEEXT): $(mn10300_run_OBJECTS) $(mn10300_run_DEPENDENCIES) $(EXTRA_mn10300_run_DEPENDENCIES) mn10300/$(am__dirstamp)
3822         @rm -f mn10300/run$(EXEEXT)
3823         $(AM_V_CCLD)$(LINK) $(mn10300_run_OBJECTS) $(mn10300_run_LDADD) $(LIBS)
3824
3825 moxie/run$(EXEEXT): $(moxie_run_OBJECTS) $(moxie_run_DEPENDENCIES) $(EXTRA_moxie_run_DEPENDENCIES) moxie/$(am__dirstamp)
3826         @rm -f moxie/run$(EXEEXT)
3827         $(AM_V_CCLD)$(LINK) $(moxie_run_OBJECTS) $(moxie_run_LDADD) $(LIBS)
3828
3829 msp430/run$(EXEEXT): $(msp430_run_OBJECTS) $(msp430_run_DEPENDENCIES) $(EXTRA_msp430_run_DEPENDENCIES) msp430/$(am__dirstamp)
3830         @rm -f msp430/run$(EXEEXT)
3831         $(AM_V_CCLD)$(LINK) $(msp430_run_OBJECTS) $(msp430_run_LDADD) $(LIBS)
3832
3833 or1k/run$(EXEEXT): $(or1k_run_OBJECTS) $(or1k_run_DEPENDENCIES) $(EXTRA_or1k_run_DEPENDENCIES) or1k/$(am__dirstamp)
3834         @rm -f or1k/run$(EXEEXT)
3835         $(AM_V_CCLD)$(LINK) $(or1k_run_OBJECTS) $(or1k_run_LDADD) $(LIBS)
3836 ppc/$(am__dirstamp):
3837         @$(MKDIR_P) ppc
3838         @: > ppc/$(am__dirstamp)
3839
3840 ppc/run$(EXEEXT): $(ppc_run_OBJECTS) $(ppc_run_DEPENDENCIES) $(EXTRA_ppc_run_DEPENDENCIES) ppc/$(am__dirstamp)
3841         @rm -f ppc/run$(EXEEXT)
3842         $(AM_V_CCLD)$(LINK) $(ppc_run_OBJECTS) $(ppc_run_LDADD) $(LIBS)
3843
3844 pru/run$(EXEEXT): $(pru_run_OBJECTS) $(pru_run_DEPENDENCIES) $(EXTRA_pru_run_DEPENDENCIES) pru/$(am__dirstamp)
3845         @rm -f pru/run$(EXEEXT)
3846         $(AM_V_CCLD)$(LINK) $(pru_run_OBJECTS) $(pru_run_LDADD) $(LIBS)
3847
3848 riscv/run$(EXEEXT): $(riscv_run_OBJECTS) $(riscv_run_DEPENDENCIES) $(EXTRA_riscv_run_DEPENDENCIES) riscv/$(am__dirstamp)
3849         @rm -f riscv/run$(EXEEXT)
3850         $(AM_V_CCLD)$(LINK) $(riscv_run_OBJECTS) $(riscv_run_LDADD) $(LIBS)
3851
3852 rl78/run$(EXEEXT): $(rl78_run_OBJECTS) $(rl78_run_DEPENDENCIES) $(EXTRA_rl78_run_DEPENDENCIES) rl78/$(am__dirstamp)
3853         @rm -f rl78/run$(EXEEXT)
3854         $(AM_V_CCLD)$(LINK) $(rl78_run_OBJECTS) $(rl78_run_LDADD) $(LIBS)
3855
3856 rx/run$(EXEEXT): $(rx_run_OBJECTS) $(rx_run_DEPENDENCIES) $(EXTRA_rx_run_DEPENDENCIES) rx/$(am__dirstamp)
3857         @rm -f rx/run$(EXEEXT)
3858         $(AM_V_CCLD)$(LINK) $(rx_run_OBJECTS) $(rx_run_LDADD) $(LIBS)
3859 sh/gencode.$(OBJEXT): sh/$(am__dirstamp) sh/$(DEPDIR)/$(am__dirstamp)
3860
3861 @SIM_ENABLE_ARCH_sh_FALSE@sh/gencode$(EXEEXT): $(sh_gencode_OBJECTS) $(sh_gencode_DEPENDENCIES) $(EXTRA_sh_gencode_DEPENDENCIES) sh/$(am__dirstamp)
3862 @SIM_ENABLE_ARCH_sh_FALSE@      @rm -f sh/gencode$(EXEEXT)
3863 @SIM_ENABLE_ARCH_sh_FALSE@      $(AM_V_CCLD)$(LINK) $(sh_gencode_OBJECTS) $(sh_gencode_LDADD) $(LIBS)
3864
3865 sh/run$(EXEEXT): $(sh_run_OBJECTS) $(sh_run_DEPENDENCIES) $(EXTRA_sh_run_DEPENDENCIES) sh/$(am__dirstamp)
3866         @rm -f sh/run$(EXEEXT)
3867         $(AM_V_CCLD)$(LINK) $(sh_run_OBJECTS) $(sh_run_LDADD) $(LIBS)
3868 testsuite/common/$(am__dirstamp):
3869         @$(MKDIR_P) testsuite/common
3870         @: > testsuite/common/$(am__dirstamp)
3871 testsuite/common/$(DEPDIR)/$(am__dirstamp):
3872         @$(MKDIR_P) testsuite/common/$(DEPDIR)
3873         @: > testsuite/common/$(DEPDIR)/$(am__dirstamp)
3874 testsuite/common/alu-tst.$(OBJEXT): testsuite/common/$(am__dirstamp) \
3875         testsuite/common/$(DEPDIR)/$(am__dirstamp)
3876 testsuite/common/bits-gen.$(OBJEXT): testsuite/common/$(am__dirstamp) \
3877         testsuite/common/$(DEPDIR)/$(am__dirstamp)
3878 testsuite/common/bits32m0.$(OBJEXT): testsuite/common/$(am__dirstamp) \
3879         testsuite/common/$(DEPDIR)/$(am__dirstamp)
3880 testsuite/common/bits32m31.$(OBJEXT):  \
3881         testsuite/common/$(am__dirstamp) \
3882         testsuite/common/$(DEPDIR)/$(am__dirstamp)
3883 testsuite/common/bits64m0.$(OBJEXT): testsuite/common/$(am__dirstamp) \
3884         testsuite/common/$(DEPDIR)/$(am__dirstamp)
3885 testsuite/common/bits64m63.$(OBJEXT):  \
3886         testsuite/common/$(am__dirstamp) \
3887         testsuite/common/$(DEPDIR)/$(am__dirstamp)
3888 testsuite/common/fpu-tst.$(OBJEXT): testsuite/common/$(am__dirstamp) \
3889         testsuite/common/$(DEPDIR)/$(am__dirstamp)
3890
3891 v850/run$(EXEEXT): $(v850_run_OBJECTS) $(v850_run_DEPENDENCIES) $(EXTRA_v850_run_DEPENDENCIES) v850/$(am__dirstamp)
3892         @rm -f v850/run$(EXEEXT)
3893         $(AM_V_CCLD)$(LINK) $(v850_run_OBJECTS) $(v850_run_LDADD) $(LIBS)
3894
3895 mostlyclean-compile:
3896         -rm -f *.$(OBJEXT)
3897         -rm -f aarch64/*.$(OBJEXT)
3898         -rm -f arm/*.$(OBJEXT)
3899         -rm -f avr/*.$(OBJEXT)
3900         -rm -f bfin/*.$(OBJEXT)
3901         -rm -f bpf/*.$(OBJEXT)
3902         -rm -f common/*.$(OBJEXT)
3903         -rm -f cr16/*.$(OBJEXT)
3904         -rm -f cris/*.$(OBJEXT)
3905         -rm -f d10v/*.$(OBJEXT)
3906         -rm -f erc32/*.$(OBJEXT)
3907         -rm -f example-synacor/*.$(OBJEXT)
3908         -rm -f frv/*.$(OBJEXT)
3909         -rm -f ft32/*.$(OBJEXT)
3910         -rm -f h8300/*.$(OBJEXT)
3911         -rm -f igen/*.$(OBJEXT)
3912         -rm -f iq2000/*.$(OBJEXT)
3913         -rm -f lm32/*.$(OBJEXT)
3914         -rm -f m32c/*.$(OBJEXT)
3915         -rm -f m32r/*.$(OBJEXT)
3916         -rm -f m68hc11/*.$(OBJEXT)
3917         -rm -f mcore/*.$(OBJEXT)
3918         -rm -f microblaze/*.$(OBJEXT)
3919         -rm -f mips/*.$(OBJEXT)
3920         -rm -f mn10300/*.$(OBJEXT)
3921         -rm -f moxie/*.$(OBJEXT)
3922         -rm -f msp430/*.$(OBJEXT)
3923         -rm -f or1k/*.$(OBJEXT)
3924         -rm -f pru/*.$(OBJEXT)
3925         -rm -f riscv/*.$(OBJEXT)
3926         -rm -f rl78/*.$(OBJEXT)
3927         -rm -f rx/*.$(OBJEXT)
3928         -rm -f sh/*.$(OBJEXT)
3929         -rm -f testsuite/common/*.$(OBJEXT)
3930         -rm -f v850/*.$(OBJEXT)
3931
3932 distclean-compile:
3933         -rm -f *.tab.c
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3936 @AMDEP_TRUE@@am__include@ @am__quote@arm/$(DEPDIR)/modules.Po@am__quote@
3937 @AMDEP_TRUE@@am__include@ @am__quote@avr/$(DEPDIR)/modules.Po@am__quote@
3938 @AMDEP_TRUE@@am__include@ @am__quote@bfin/$(DEPDIR)/modules.Po@am__quote@
3939 @AMDEP_TRUE@@am__include@ @am__quote@bpf/$(DEPDIR)/modules.Po@am__quote@
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3952 @AMDEP_TRUE@@am__include@ @am__quote@cris/$(DEPDIR)/modules.Po@am__quote@
3953 @AMDEP_TRUE@@am__include@ @am__quote@cris/$(DEPDIR)/rvdummy.Po@am__quote@
3954 @AMDEP_TRUE@@am__include@ @am__quote@d10v/$(DEPDIR)/gencode.Po@am__quote@
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3956 @AMDEP_TRUE@@am__include@ @am__quote@erc32/$(DEPDIR)/modules.Po@am__quote@
3957 @AMDEP_TRUE@@am__include@ @am__quote@erc32/$(DEPDIR)/sis.Po@am__quote@
3958 @AMDEP_TRUE@@am__include@ @am__quote@example-synacor/$(DEPDIR)/modules.Po@am__quote@
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4352         @echo '# edit the last section' >>site.tmp
4353         @echo 'set srcdir "$(srcdir)"' >>site.tmp
4354         @echo "set objdir `pwd`" >>site.tmp
4355         @echo 'set build_alias "$(build_alias)"' >>site.tmp
4356         @echo 'set build_triplet $(build_triplet)' >>site.tmp
4357         @echo 'set host_alias "$(host_alias)"' >>site.tmp
4358         @echo 'set host_triplet $(host_triplet)' >>site.tmp
4359         @echo 'set target_alias "$(target_alias)"' >>site.tmp
4360         @echo 'set target_triplet $(target_triplet)' >>site.tmp
4361         @list='$(EXTRA_DEJAGNU_SITE_CONFIG)'; for f in $$list; do \
4362           echo "## Begin content included from file $$f.  Do not modify. ##" \
4363            && cat `test -f "$$f" || echo '$(srcdir)/'`$$f \
4364            && echo "## End content included from file $$f. ##" \
4365            || exit 1; \
4366          done >> site.tmp
4367         @echo "## End of auto-generated content; you can edit from here. ##" >> site.tmp
4368         @if test -f site.exp; then \
4369            sed -e '1,/^## End of auto-generated content.*##/d' site.exp >> site.tmp; \
4370          fi
4371         @-rm -f site.bak
4372         @test ! -f site.exp || mv site.exp site.bak
4373         @mv site.tmp site.exp
4374
4375 distclean-DEJAGNU:
4376         -rm -f site.exp site.bak
4377         -l='$(DEJATOOL)'; for tool in $$l; do \
4378           rm -f $$tool.sum $$tool.log; \
4379         done
4380
4381 # Recover from deleted '.trs' file; this should ensure that
4382 # "rm -f foo.log; make foo.trs" re-run 'foo.test', and re-create
4383 # both 'foo.log' and 'foo.trs'.  Break the recipe in two subshells
4384 # to avoid problems with "make -n".
4385 .log.trs:
4386         rm -f $< $@
4387         $(MAKE) $(AM_MAKEFLAGS) $<
4388
4389 # Leading 'am--fnord' is there to ensure the list of targets does not
4390 # expand to empty, as could happen e.g. with make check TESTS=''.
4391 am--fnord $(TEST_LOGS) $(TEST_LOGS:.log=.trs): $(am__force_recheck)
4392 am--force-recheck:
4393         @:
4394
4395 $(TEST_SUITE_LOG): $(TEST_LOGS)
4396         @$(am__set_TESTS_bases); \
4397         am__f_ok () { test -f "$$1" && test -r "$$1"; }; \
4398         redo_bases=`for i in $$bases; do \
4399                       am__f_ok $$i.trs && am__f_ok $$i.log || echo $$i; \
4400                     done`; \
4401         if test -n "$$redo_bases"; then \
4402           redo_logs=`for i in $$redo_bases; do echo $$i.log; done`; \
4403           redo_results=`for i in $$redo_bases; do echo $$i.trs; done`; \
4404           if $(am__make_dryrun); then :; else \
4405             rm -f $$redo_logs && rm -f $$redo_results || exit 1; \
4406           fi; \
4407         fi; \
4408         if test -n "$$am__remaking_logs"; then \
4409           echo "fatal: making $(TEST_SUITE_LOG): possible infinite" \
4410                "recursion detected" >&2; \
4411         elif test -n "$$redo_logs"; then \
4412           am__remaking_logs=yes $(MAKE) $(AM_MAKEFLAGS) $$redo_logs; \
4413         fi; \
4414         if $(am__make_dryrun); then :; else \
4415           st=0;  \
4416           errmsg="fatal: making $(TEST_SUITE_LOG): failed to create"; \
4417           for i in $$redo_bases; do \
4418             test -f $$i.trs && test -r $$i.trs \
4419               || { echo "$$errmsg $$i.trs" >&2; st=1; }; \
4420             test -f $$i.log && test -r $$i.log \
4421               || { echo "$$errmsg $$i.log" >&2; st=1; }; \
4422           done; \
4423           test $$st -eq 0 || exit 1; \
4424         fi
4425         @$(am__sh_e_setup); $(am__tty_colors); $(am__set_TESTS_bases); \
4426         ws='[   ]'; \
4427         results=`for b in $$bases; do echo $$b.trs; done`; \
4428         test -n "$$results" || results=/dev/null; \
4429         all=`  grep "^$$ws*:test-result:"           $$results | wc -l`; \
4430         pass=` grep "^$$ws*:test-result:$$ws*PASS"  $$results | wc -l`; \
4431         fail=` grep "^$$ws*:test-result:$$ws*FAIL"  $$results | wc -l`; \
4432         skip=` grep "^$$ws*:test-result:$$ws*SKIP"  $$results | wc -l`; \
4433         xfail=`grep "^$$ws*:test-result:$$ws*XFAIL" $$results | wc -l`; \
4434         xpass=`grep "^$$ws*:test-result:$$ws*XPASS" $$results | wc -l`; \
4435         error=`grep "^$$ws*:test-result:$$ws*ERROR" $$results | wc -l`; \
4436         if test `expr $$fail + $$xpass + $$error` -eq 0; then \
4437           success=true; \
4438         else \
4439           success=false; \
4440         fi; \
4441         br='==================='; br=$$br$$br$$br$$br; \
4442         result_count () \
4443         { \
4444             if test x"$$1" = x"--maybe-color"; then \
4445               maybe_colorize=yes; \
4446             elif test x"$$1" = x"--no-color"; then \
4447               maybe_colorize=no; \
4448             else \
4449               echo "$@: invalid 'result_count' usage" >&2; exit 4; \
4450             fi; \
4451             shift; \
4452             desc=$$1 count=$$2; \
4453             if test $$maybe_colorize = yes && test $$count -gt 0; then \
4454               color_start=$$3 color_end=$$std; \
4455             else \
4456               color_start= color_end=; \
4457             fi; \
4458             echo "$${color_start}# $$desc $$count$${color_end}"; \
4459         }; \
4460         create_testsuite_report () \
4461         { \
4462           result_count $$1 "TOTAL:" $$all   "$$brg"; \
4463           result_count $$1 "PASS: " $$pass  "$$grn"; \
4464           result_count $$1 "SKIP: " $$skip  "$$blu"; \
4465           result_count $$1 "XFAIL:" $$xfail "$$lgn"; \
4466           result_count $$1 "FAIL: " $$fail  "$$red"; \
4467           result_count $$1 "XPASS:" $$xpass "$$red"; \
4468           result_count $$1 "ERROR:" $$error "$$mgn"; \
4469         }; \
4470         {                                                               \
4471           echo "$(PACKAGE_STRING): $(subdir)/$(TEST_SUITE_LOG)" |       \
4472             $(am__rst_title);                                           \
4473           create_testsuite_report --no-color;                           \
4474           echo;                                                         \
4475           echo ".. contents:: :depth: 2";                               \
4476           echo;                                                         \
4477           for b in $$bases; do echo $$b; done                           \
4478             | $(am__create_global_log);                                 \
4479         } >$(TEST_SUITE_LOG).tmp || exit 1;                             \
4480         mv $(TEST_SUITE_LOG).tmp $(TEST_SUITE_LOG);                     \
4481         if $$success; then                                              \
4482           col="$$grn";                                                  \
4483          else                                                           \
4484           col="$$red";                                                  \
4485           test x"$$VERBOSE" = x || cat $(TEST_SUITE_LOG);               \
4486         fi;                                                             \
4487         echo "$${col}$$br$${std}";                                      \
4488         echo "$${col}Testsuite summary for $(PACKAGE_STRING)$${std}";   \
4489         echo "$${col}$$br$${std}";                                      \
4490         create_testsuite_report --maybe-color;                          \
4491         echo "$$col$$br$$std";                                          \
4492         if $$success; then :; else                                      \
4493           echo "$${col}See $(subdir)/$(TEST_SUITE_LOG)$${std}";         \
4494           if test -n "$(PACKAGE_BUGREPORT)"; then                       \
4495             echo "$${col}Please report to $(PACKAGE_BUGREPORT)$${std}"; \
4496           fi;                                                           \
4497           echo "$$col$$br$$std";                                        \
4498         fi;                                                             \
4499         $$success || exit 1
4500
4501 check-TESTS:
4502         @list='$(RECHECK_LOGS)';           test -z "$$list" || rm -f $$list
4503         @list='$(RECHECK_LOGS:.log=.trs)'; test -z "$$list" || rm -f $$list
4504         @test -z "$(TEST_SUITE_LOG)" || rm -f $(TEST_SUITE_LOG)
4505         @set +e; $(am__set_TESTS_bases); \
4506         log_list=`for i in $$bases; do echo $$i.log; done`; \
4507         trs_list=`for i in $$bases; do echo $$i.trs; done`; \
4508         log_list=`echo $$log_list`; trs_list=`echo $$trs_list`; \
4509         $(MAKE) $(AM_MAKEFLAGS) $(TEST_SUITE_LOG) TEST_LOGS="$$log_list"; \
4510         exit $$?;
4511 recheck: all $(check_PROGRAMS)
4512         @test -z "$(TEST_SUITE_LOG)" || rm -f $(TEST_SUITE_LOG)
4513         @set +e; $(am__set_TESTS_bases); \
4514         bases=`for i in $$bases; do echo $$i; done \
4515                  | $(am__list_recheck_tests)` || exit 1; \
4516         log_list=`for i in $$bases; do echo $$i.log; done`; \
4517         log_list=`echo $$log_list`; \
4518         $(MAKE) $(AM_MAKEFLAGS) $(TEST_SUITE_LOG) \
4519                 am__force_recheck=am--force-recheck \
4520                 TEST_LOGS="$$log_list"; \
4521         exit $$?
4522 testsuite/common/bits32m0.log: testsuite/common/bits32m0$(EXEEXT)
4523         @p='testsuite/common/bits32m0$(EXEEXT)'; \
4524         b='testsuite/common/bits32m0'; \
4525         $(am__check_pre) $(LOG_DRIVER) --test-name "$$f" \
4526         --log-file $$b.log --trs-file $$b.trs \
4527         $(am__common_driver_flags) $(AM_LOG_DRIVER_FLAGS) $(LOG_DRIVER_FLAGS) -- $(LOG_COMPILE) \
4528         "$$tst" $(AM_TESTS_FD_REDIRECT)
4529 testsuite/common/bits32m31.log: testsuite/common/bits32m31$(EXEEXT)
4530         @p='testsuite/common/bits32m31$(EXEEXT)'; \
4531         b='testsuite/common/bits32m31'; \
4532         $(am__check_pre) $(LOG_DRIVER) --test-name "$$f" \
4533         --log-file $$b.log --trs-file $$b.trs \
4534         $(am__common_driver_flags) $(AM_LOG_DRIVER_FLAGS) $(LOG_DRIVER_FLAGS) -- $(LOG_COMPILE) \
4535         "$$tst" $(AM_TESTS_FD_REDIRECT)
4536 testsuite/common/bits64m0.log: testsuite/common/bits64m0$(EXEEXT)
4537         @p='testsuite/common/bits64m0$(EXEEXT)'; \
4538         b='testsuite/common/bits64m0'; \
4539         $(am__check_pre) $(LOG_DRIVER) --test-name "$$f" \
4540         --log-file $$b.log --trs-file $$b.trs \
4541         $(am__common_driver_flags) $(AM_LOG_DRIVER_FLAGS) $(LOG_DRIVER_FLAGS) -- $(LOG_COMPILE) \
4542         "$$tst" $(AM_TESTS_FD_REDIRECT)
4543 testsuite/common/bits64m63.log: testsuite/common/bits64m63$(EXEEXT)
4544         @p='testsuite/common/bits64m63$(EXEEXT)'; \
4545         b='testsuite/common/bits64m63'; \
4546         $(am__check_pre) $(LOG_DRIVER) --test-name "$$f" \
4547         --log-file $$b.log --trs-file $$b.trs \
4548         $(am__common_driver_flags) $(AM_LOG_DRIVER_FLAGS) $(LOG_DRIVER_FLAGS) -- $(LOG_COMPILE) \
4549         "$$tst" $(AM_TESTS_FD_REDIRECT)
4550 testsuite/common/alu-tst.log: testsuite/common/alu-tst$(EXEEXT)
4551         @p='testsuite/common/alu-tst$(EXEEXT)'; \
4552         b='testsuite/common/alu-tst'; \
4553         $(am__check_pre) $(LOG_DRIVER) --test-name "$$f" \
4554         --log-file $$b.log --trs-file $$b.trs \
4555         $(am__common_driver_flags) $(AM_LOG_DRIVER_FLAGS) $(LOG_DRIVER_FLAGS) -- $(LOG_COMPILE) \
4556         "$$tst" $(AM_TESTS_FD_REDIRECT)
4557 .test.log:
4558         @p='$<'; \
4559         $(am__set_b); \
4560         $(am__check_pre) $(TEST_LOG_DRIVER) --test-name "$$f" \
4561         --log-file $$b.log --trs-file $$b.trs \
4562         $(am__common_driver_flags) $(AM_TEST_LOG_DRIVER_FLAGS) $(TEST_LOG_DRIVER_FLAGS) -- $(TEST_LOG_COMPILE) \
4563         "$$tst" $(AM_TESTS_FD_REDIRECT)
4564 @am__EXEEXT_TRUE@.test$(EXEEXT).log:
4565 @am__EXEEXT_TRUE@       @p='$<'; \
4566 @am__EXEEXT_TRUE@       $(am__set_b); \
4567 @am__EXEEXT_TRUE@       $(am__check_pre) $(TEST_LOG_DRIVER) --test-name "$$f" \
4568 @am__EXEEXT_TRUE@       --log-file $$b.log --trs-file $$b.trs \
4569 @am__EXEEXT_TRUE@       $(am__common_driver_flags) $(AM_TEST_LOG_DRIVER_FLAGS) $(TEST_LOG_DRIVER_FLAGS) -- $(TEST_LOG_COMPILE) \
4570 @am__EXEEXT_TRUE@       "$$tst" $(AM_TESTS_FD_REDIRECT)
4571 check-am: all-am
4572         $(MAKE) $(AM_MAKEFLAGS) $(check_PROGRAMS)
4573         $(MAKE) $(AM_MAKEFLAGS) check-DEJAGNU check-TESTS
4574 check: $(BUILT_SOURCES)
4575         $(MAKE) $(AM_MAKEFLAGS) check-recursive
4576 all-am: Makefile $(LIBRARIES) $(PROGRAMS) $(DATA) $(HEADERS) config.h
4577 installdirs: installdirs-recursive
4578 installdirs-am:
4579         for dir in "$(DESTDIR)$(armdocdir)" "$(DESTDIR)$(dtbdir)" "$(DESTDIR)$(erc32docdir)" "$(DESTDIR)$(frvdocdir)" "$(DESTDIR)$(or1kdocdir)" "$(DESTDIR)$(ppcdocdir)" "$(DESTDIR)$(rxdocdir)" "$(DESTDIR)$(pkgincludedir)"; do \
4580           test -z "$$dir" || $(MKDIR_P) "$$dir"; \
4581         done
4582 install: $(BUILT_SOURCES)
4583         $(MAKE) $(AM_MAKEFLAGS) install-recursive
4584 install-exec: install-exec-recursive
4585 install-data: install-data-recursive
4586 uninstall: uninstall-recursive
4587
4588 install-am: all-am
4589         @$(MAKE) $(AM_MAKEFLAGS) install-exec-am install-data-am
4590
4591 installcheck: installcheck-recursive
4592 install-strip:
4593         if test -z '$(STRIP)'; then \
4594           $(MAKE) $(AM_MAKEFLAGS) INSTALL_PROGRAM="$(INSTALL_STRIP_PROGRAM)" \
4595             install_sh_PROGRAM="$(INSTALL_STRIP_PROGRAM)" INSTALL_STRIP_FLAG=-s \
4596               install; \
4597         else \
4598           $(MAKE) $(AM_MAKEFLAGS) INSTALL_PROGRAM="$(INSTALL_STRIP_PROGRAM)" \
4599             install_sh_PROGRAM="$(INSTALL_STRIP_PROGRAM)" INSTALL_STRIP_FLAG=-s \
4600             "INSTALL_PROGRAM_ENV=STRIPPROG='$(STRIP)'" install; \
4601         fi
4602 mostlyclean-generic:
4603         -test -z "$(MOSTLYCLEANFILES)" || rm -f $(MOSTLYCLEANFILES)
4604         -test -z "$(TEST_LOGS)" || rm -f $(TEST_LOGS)
4605         -test -z "$(TEST_LOGS:.log=.trs)" || rm -f $(TEST_LOGS:.log=.trs)
4606         -test -z "$(TEST_SUITE_LOG)" || rm -f $(TEST_SUITE_LOG)
4607
4608 clean-generic:
4609         -test -z "$(CLEANFILES)" || rm -f $(CLEANFILES)
4610
4611 distclean-generic:
4612         -test -z "$(CONFIG_CLEAN_FILES)" || rm -f $(CONFIG_CLEAN_FILES)
4613         -test . = "$(srcdir)" || test -z "$(CONFIG_CLEAN_VPATH_FILES)" || rm -f $(CONFIG_CLEAN_VPATH_FILES)
4614         -rm -f aarch64/$(DEPDIR)/$(am__dirstamp)
4615         -rm -f aarch64/$(am__dirstamp)
4616         -rm -f arm/$(DEPDIR)/$(am__dirstamp)
4617         -rm -f arm/$(am__dirstamp)
4618         -rm -f avr/$(DEPDIR)/$(am__dirstamp)
4619         -rm -f avr/$(am__dirstamp)
4620         -rm -f bfin/$(DEPDIR)/$(am__dirstamp)
4621         -rm -f bfin/$(am__dirstamp)
4622         -rm -f bpf/$(DEPDIR)/$(am__dirstamp)
4623         -rm -f bpf/$(am__dirstamp)
4624         -rm -f common/$(DEPDIR)/$(am__dirstamp)
4625         -rm -f common/$(am__dirstamp)
4626         -rm -f cr16/$(DEPDIR)/$(am__dirstamp)
4627         -rm -f cr16/$(am__dirstamp)
4628         -rm -f cris/$(DEPDIR)/$(am__dirstamp)
4629         -rm -f cris/$(am__dirstamp)
4630         -rm -f d10v/$(DEPDIR)/$(am__dirstamp)
4631         -rm -f d10v/$(am__dirstamp)
4632         -rm -f erc32/$(DEPDIR)/$(am__dirstamp)
4633         -rm -f erc32/$(am__dirstamp)
4634         -rm -f example-synacor/$(DEPDIR)/$(am__dirstamp)
4635         -rm -f example-synacor/$(am__dirstamp)
4636         -rm -f frv/$(DEPDIR)/$(am__dirstamp)
4637         -rm -f frv/$(am__dirstamp)
4638         -rm -f ft32/$(DEPDIR)/$(am__dirstamp)
4639         -rm -f ft32/$(am__dirstamp)
4640         -rm -f h8300/$(DEPDIR)/$(am__dirstamp)
4641         -rm -f h8300/$(am__dirstamp)
4642         -rm -f igen/$(DEPDIR)/$(am__dirstamp)
4643         -rm -f igen/$(am__dirstamp)
4644         -rm -f iq2000/$(DEPDIR)/$(am__dirstamp)
4645         -rm -f iq2000/$(am__dirstamp)
4646         -rm -f lm32/$(DEPDIR)/$(am__dirstamp)
4647         -rm -f lm32/$(am__dirstamp)
4648         -rm -f m32c/$(DEPDIR)/$(am__dirstamp)
4649         -rm -f m32c/$(am__dirstamp)
4650         -rm -f m32r/$(DEPDIR)/$(am__dirstamp)
4651         -rm -f m32r/$(am__dirstamp)
4652         -rm -f m68hc11/$(DEPDIR)/$(am__dirstamp)
4653         -rm -f m68hc11/$(am__dirstamp)
4654         -rm -f mcore/$(DEPDIR)/$(am__dirstamp)
4655         -rm -f mcore/$(am__dirstamp)
4656         -rm -f microblaze/$(DEPDIR)/$(am__dirstamp)
4657         -rm -f microblaze/$(am__dirstamp)
4658         -rm -f mips/$(DEPDIR)/$(am__dirstamp)
4659         -rm -f mips/$(am__dirstamp)
4660         -rm -f mn10300/$(DEPDIR)/$(am__dirstamp)
4661         -rm -f mn10300/$(am__dirstamp)
4662         -rm -f moxie/$(DEPDIR)/$(am__dirstamp)
4663         -rm -f moxie/$(am__dirstamp)
4664         -rm -f msp430/$(DEPDIR)/$(am__dirstamp)
4665         -rm -f msp430/$(am__dirstamp)
4666         -rm -f or1k/$(DEPDIR)/$(am__dirstamp)
4667         -rm -f or1k/$(am__dirstamp)
4668         -rm -f ppc/$(am__dirstamp)
4669         -rm -f pru/$(DEPDIR)/$(am__dirstamp)
4670         -rm -f pru/$(am__dirstamp)
4671         -rm -f riscv/$(DEPDIR)/$(am__dirstamp)
4672         -rm -f riscv/$(am__dirstamp)
4673         -rm -f rl78/$(DEPDIR)/$(am__dirstamp)
4674         -rm -f rl78/$(am__dirstamp)
4675         -rm -f rx/$(DEPDIR)/$(am__dirstamp)
4676         -rm -f rx/$(am__dirstamp)
4677         -rm -f sh/$(DEPDIR)/$(am__dirstamp)
4678         -rm -f sh/$(am__dirstamp)
4679         -rm -f testsuite/common/$(DEPDIR)/$(am__dirstamp)
4680         -rm -f testsuite/common/$(am__dirstamp)
4681         -rm -f v850/$(DEPDIR)/$(am__dirstamp)
4682         -rm -f v850/$(am__dirstamp)
4683         -test -z "$(DISTCLEANFILES)" || rm -f $(DISTCLEANFILES)
4684
4685 maintainer-clean-generic:
4686         @echo "This command is intended for maintainers to use"
4687         @echo "it deletes files that may require special tools to rebuild."
4688         -test -z "$(BUILT_SOURCES)" || rm -f $(BUILT_SOURCES)
4689 clean: clean-recursive
4690
4691 clean-am: clean-checkPROGRAMS clean-generic clean-libtool \
4692         clean-noinstLIBRARIES clean-noinstPROGRAMS mostlyclean-am
4693
4694 distclean: distclean-recursive
4695         -rm -f $(am__CONFIG_DISTCLEAN_FILES)
4696         -rm -rf aarch64/$(DEPDIR) arm/$(DEPDIR) avr/$(DEPDIR) bfin/$(DEPDIR) bpf/$(DEPDIR) common/$(DEPDIR) cr16/$(DEPDIR) cris/$(DEPDIR) d10v/$(DEPDIR) erc32/$(DEPDIR) example-synacor/$(DEPDIR) frv/$(DEPDIR) ft32/$(DEPDIR) h8300/$(DEPDIR) igen/$(DEPDIR) iq2000/$(DEPDIR) lm32/$(DEPDIR) m32c/$(DEPDIR) m32r/$(DEPDIR) m68hc11/$(DEPDIR) mcore/$(DEPDIR) microblaze/$(DEPDIR) mips/$(DEPDIR) mn10300/$(DEPDIR) moxie/$(DEPDIR) msp430/$(DEPDIR) or1k/$(DEPDIR) pru/$(DEPDIR) riscv/$(DEPDIR) rl78/$(DEPDIR) rx/$(DEPDIR) sh/$(DEPDIR) testsuite/common/$(DEPDIR) v850/$(DEPDIR)
4697         -rm -f Makefile
4698 distclean-am: clean-am distclean-DEJAGNU distclean-compile \
4699         distclean-generic distclean-hdr distclean-libtool \
4700         distclean-tags
4701
4702 dvi: dvi-recursive
4703
4704 dvi-am:
4705
4706 html: html-recursive
4707
4708 html-am:
4709
4710 info: info-recursive
4711
4712 info-am:
4713
4714 install-data-am: install-armdocDATA install-data-local install-dtbDATA \
4715         install-erc32docDATA install-frvdocDATA install-or1kdocDATA \
4716         install-pkgincludeHEADERS install-ppcdocDATA install-rxdocDATA
4717
4718 install-dvi: install-dvi-recursive
4719
4720 install-dvi-am:
4721
4722 install-exec-am: install-exec-local
4723
4724 install-html: install-html-recursive
4725
4726 install-html-am:
4727
4728 install-info: install-info-recursive
4729
4730 install-info-am:
4731
4732 install-man:
4733
4734 install-pdf: install-pdf-recursive
4735
4736 install-pdf-am:
4737
4738 install-ps: install-ps-recursive
4739
4740 install-ps-am:
4741
4742 installcheck-am:
4743
4744 maintainer-clean: maintainer-clean-recursive
4745         -rm -f $(am__CONFIG_DISTCLEAN_FILES)
4746         -rm -rf $(top_srcdir)/autom4te.cache
4747         -rm -rf aarch64/$(DEPDIR) arm/$(DEPDIR) avr/$(DEPDIR) bfin/$(DEPDIR) bpf/$(DEPDIR) common/$(DEPDIR) cr16/$(DEPDIR) cris/$(DEPDIR) d10v/$(DEPDIR) erc32/$(DEPDIR) example-synacor/$(DEPDIR) frv/$(DEPDIR) ft32/$(DEPDIR) h8300/$(DEPDIR) igen/$(DEPDIR) iq2000/$(DEPDIR) lm32/$(DEPDIR) m32c/$(DEPDIR) m32r/$(DEPDIR) m68hc11/$(DEPDIR) mcore/$(DEPDIR) microblaze/$(DEPDIR) mips/$(DEPDIR) mn10300/$(DEPDIR) moxie/$(DEPDIR) msp430/$(DEPDIR) or1k/$(DEPDIR) pru/$(DEPDIR) riscv/$(DEPDIR) rl78/$(DEPDIR) rx/$(DEPDIR) sh/$(DEPDIR) testsuite/common/$(DEPDIR) v850/$(DEPDIR)
4748         -rm -f Makefile
4749 maintainer-clean-am: distclean-am maintainer-clean-generic
4750
4751 mostlyclean: mostlyclean-recursive
4752
4753 mostlyclean-am: mostlyclean-compile mostlyclean-generic \
4754         mostlyclean-libtool
4755
4756 pdf: pdf-recursive
4757
4758 pdf-am:
4759
4760 ps: ps-recursive
4761
4762 ps-am:
4763
4764 uninstall-am: uninstall-armdocDATA uninstall-dtbDATA \
4765         uninstall-erc32docDATA uninstall-frvdocDATA uninstall-local \
4766         uninstall-or1kdocDATA uninstall-pkgincludeHEADERS \
4767         uninstall-ppcdocDATA uninstall-rxdocDATA
4768
4769 .MAKE: $(am__recursive_targets) all check check-am install install-am \
4770         install-strip
4771
4772 .PHONY: $(am__recursive_targets) CTAGS GTAGS TAGS all all-am \
4773         am--refresh check check-DEJAGNU check-TESTS check-am clean \
4774         clean-checkPROGRAMS clean-cscope clean-generic clean-libtool \
4775         clean-noinstLIBRARIES clean-noinstPROGRAMS cscope \
4776         cscopelist-am ctags ctags-am distclean distclean-DEJAGNU \
4777         distclean-compile distclean-generic distclean-hdr \
4778         distclean-libtool distclean-tags dvi dvi-am html html-am info \
4779         info-am install install-am install-armdocDATA install-data \
4780         install-data-am install-data-local install-dtbDATA install-dvi \
4781         install-dvi-am install-erc32docDATA install-exec \
4782         install-exec-am install-exec-local install-frvdocDATA \
4783         install-html install-html-am install-info install-info-am \
4784         install-man install-or1kdocDATA install-pdf install-pdf-am \
4785         install-pkgincludeHEADERS install-ppcdocDATA install-ps \
4786         install-ps-am install-rxdocDATA install-strip installcheck \
4787         installcheck-am installdirs installdirs-am maintainer-clean \
4788         maintainer-clean-generic mostlyclean mostlyclean-compile \
4789         mostlyclean-generic mostlyclean-libtool pdf pdf-am ps ps-am \
4790         recheck tags tags-am uninstall uninstall-am \
4791         uninstall-armdocDATA uninstall-dtbDATA uninstall-erc32docDATA \
4792         uninstall-frvdocDATA uninstall-local uninstall-or1kdocDATA \
4793         uninstall-pkgincludeHEADERS uninstall-ppcdocDATA \
4794         uninstall-rxdocDATA
4795
4796 .PRECIOUS: Makefile
4797
4798 @am__include@ @am__quote@$(GNULIB_PARENT_DIR)/gnulib/Makefile.gnulib.inc@am__quote@
4799
4800 # Generate target constants for newlib/libgloss from its source tree.
4801 # This file is shipped with distributions so we build in the source dir.
4802 # Use `make nltvals' to rebuild.
4803 .PHONY: nltvals
4804 nltvals:
4805         $(srccom)/gennltvals.py --cpp "$(CPP)"
4806
4807 common/version.c: common/version.c-stamp ; @true
4808 common/version.c-stamp: $(srcroot)/gdb/version.in $(srcroot)/bfd/version.h $(srcdir)/common/create-version.sh
4809         $(AM_V_GEN)$(SHELL) $(srcdir)/common/create-version.sh $(srcroot)/gdb $@.tmp
4810         $(AM_V_at)$(SHELL) $(srcroot)/move-if-change $@.tmp $(@:-stamp=)
4811         $(AM_V_at)touch $@
4812
4813 .PRECIOUS: %/test-hw-events.o
4814 %/test-hw-events.o: common/hw-events.c
4815         $(AM_V_CC)$(COMPILE) -DMAIN -c -o $@ $<
4816 %/test-hw-events: %/test-hw-events.o %/libsim.a
4817         $(AM_V_CCLD)$(LINK) -o $@ $^ $(SIM_COMMON_LIBS) $(LIBS)
4818
4819 # FIXME This is one very simple-minded way of generating the file hw-config.h.
4820 %/hw-config.h: %/stamp-hw ; @true
4821 %/stamp-hw: Makefile
4822         $(AM_V_GEN)set -e; \
4823         ( \
4824         sim_hw="$(SIM_HW_DEVICES) $($(@D)_SIM_EXTRA_HW_DEVICES)" ; \
4825         echo "/* generated by Makefile */" ; \
4826         printf "extern const struct hw_descriptor dv_%s_descriptor[];\n" $$sim_hw ; \
4827         echo "const struct hw_descriptor * const hw_descriptors[] = {" ; \
4828         printf "  dv_%s_descriptor,\n" $$sim_hw ; \
4829         echo "  NULL," ; \
4830         echo "};" \
4831         ) > $@.tmp; \
4832         $(SHELL) $(srcroot)/move-if-change $@.tmp $(@D)/hw-config.h; \
4833         touch $@
4834 .PRECIOUS: %/stamp-hw
4835 %/modules.c: %/stamp-modules ; @true
4836 %/stamp-modules: Makefile
4837         $(AM_V_GEN)set -e; \
4838         LANG=C ; export LANG; \
4839         LC_ALL=C ; export LC_ALL; \
4840         sed -n -e '/^sim_install_/{s/^\(sim_install_[a-z_0-9A-Z]*\).*/\1/;p}' $(GEN_MODULES_C_SRCS) | sort >$@.l-tmp; \
4841         ( \
4842         echo '/* Do not modify this file.  */'; \
4843         echo '/* It is created automatically by the Makefile.  */'; \
4844         echo '#include "libiberty.h"'; \
4845         echo '#include "sim-module.h"'; \
4846         sed -e 's:\(.*\):extern MODULE_INIT_FN \1;:' $@.l-tmp; \
4847         echo 'MODULE_INSTALL_FN * const sim_modules_detected[] = {'; \
4848         sed -e 's:\(.*\):  \1,:' $@.l-tmp; \
4849         echo '};'; \
4850         echo 'const int sim_modules_detected_len = ARRAY_SIZE (sim_modules_detected);'; \
4851         ) >$@.tmp; \
4852         $(SHELL) $(srcroot)/move-if-change $@.tmp $(@D)/modules.c; \
4853         rm -f $@.l-tmp; \
4854         touch $@
4855 .PRECIOUS: %/stamp-modules
4856
4857 # Alias for developers.
4858 igen: $(IGEN)
4859
4860 # These rules are copied from automake, but tweaked to use FOR_BUILD variables.
4861 igen/libigen.a: $(igen_libigen_a_OBJECTS) $(igen_libigen_a_DEPENDENCIES) $(EXTRA_igen_libigen_a_DEPENDENCIES) igen/$(am__dirstamp)
4862         $(AM_V_at)-rm -f $@
4863         $(AM_V_AR)$(AR_FOR_BUILD) $(ARFLAGS) $@ $(igen_libigen_a_OBJECTS) $(igen_libigen_a_LIBADD)
4864         $(AM_V_at)$(RANLIB_FOR_BUILD) $@
4865
4866 igen/igen$(EXEEXT): $(igen_igen_OBJECTS) $(igen_igen_DEPENDENCIES) igen/$(am__dirstamp)
4867         $(AM_V_CCLD)$(LINK_FOR_BUILD) $(igen_igen_OBJECTS) $(igen_igen_LDADD)
4868
4869 # igen is a build-time only tool.  Override the default rules for it.
4870 igen/%.o: igen/%.c
4871         $(AM_V_CC)$(COMPILE_FOR_BUILD) -c $< -o $@
4872
4873 # Build some of the files in standalone mode for developers of igen itself.
4874 igen/%-main.o: igen/%.c
4875         $(AM_V_CC)$(COMPILE_FOR_BUILD) -DMAIN -c $< -o $@
4876
4877 site-sim-config.exp: Makefile
4878         $(AM_V_GEN)( \
4879         echo "set SIM_PRIMARY_TARGET \"$(SIM_PRIMARY_TARGET)\""; \
4880         echo "set builddir \"$(builddir)\""; \
4881         echo "set srcdir \"$(srcdir)/testsuite\""; \
4882         $(foreach V,$(SIM_TOOLCHAIN_VARS),echo "set $(V) \"$($(V))\"";) \
4883         ) > $@
4884
4885 # Ignore dirs that only contain configuration settings.
4886 check/./config/%.exp: ; @true
4887 check/config/%.exp: ; @true
4888 check/./lib/%.exp: ; @true
4889 check/lib/%.exp: ; @true
4890
4891 check/%.exp:
4892         $(AM_V_at)mkdir -p testsuite/$*
4893         $(AM_V_RUNTEST)$(DO_RUNTEST) --objdir testsuite/$* --outdir testsuite/$* $*.exp
4894
4895 check-DEJAGNU-parallel:
4896         $(AM_V_at)( \
4897         set -- `cd $(srcdir)/testsuite && find . -name '*.exp' -printf '%P\n' | sed 's:[.]exp$$::'`; \
4898         $(MAKE) -k `printf 'check/%s.exp ' $$@`; \
4899         ret=$$?; \
4900         set -- `printf 'testsuite/%s/ ' $$@`; \
4901         $(SHELL) $(srcroot)/contrib/dg-extract-results.sh \
4902           `find $$@ -maxdepth 1 -name testrun.sum 2>/dev/null | sort` > testrun.sum; \
4903         $(SHELL) $(srcroot)/contrib/dg-extract-results.sh -L \
4904           `find $$@ -maxdepth 1 -name testrun.log 2>/dev/null | sort` > testrun.log; \
4905         echo; \
4906         $(SED) -n '/^.*===.*Summary.*===/,$$p' testrun.sum; \
4907         exit $$ret)
4908
4909 check-DEJAGNU-single:
4910         $(AM_V_RUNTEST)$(DO_RUNTEST)
4911
4912 # If running a single job, invoking runtest once is faster & has nicer output.
4913 check-DEJAGNU: site.exp
4914         $(AM_V_at)(set -e; \
4915         EXPECT=${EXPECT} ; export EXPECT ; \
4916         runtest=$(RUNTEST); \
4917         if $(SHELL) -c "$$runtest --version" > /dev/null 2>&1; then \
4918           case "$(MAKEFLAGS)" in \
4919           *-j*) $(MAKE) check-DEJAGNU-parallel;; \
4920           *)    $(MAKE) check-DEJAGNU-single;; \
4921           esac; \
4922         else \
4923           echo "WARNING: could not find \`runtest'" 1>&2; :;\
4924         fi)
4925
4926 # These tests are build-time only tools.  Override the default rules for them.
4927 testsuite/common/%.o: testsuite/common/%.c
4928         $(AM_V_CC)$(COMPILE_FOR_BUILD) $(testsuite_common_CPPFLAGS) -c $< -o $@
4929
4930 testsuite/common/alu-tst$(EXEEXT): $(testsuite_common_alu_tst_OBJECTS) $(testsuite_common_alu_tst_DEPENDENCIES) testsuite/common/$(am__dirstamp)
4931         $(AM_V_CCLD)$(LINK_FOR_BUILD) $(testsuite_common_alu_tst_OBJECTS) $(testsuite_common_alu_tst_LDADD)
4932
4933 testsuite/common/fpu-tst$(EXEEXT): $(testsuite_common_fpu_tst_OBJECTS) $(testsuite_common_fpu_tst_DEPENDENCIES) testsuite/common/$(am__dirstamp)
4934         $(AM_V_CCLD)$(LINK_FOR_BUILD) $(testsuite_common_fpu_tst_OBJECTS) $(testsuite_common_fpu_tst_LDADD)
4935
4936 testsuite/common/bits-gen$(EXEEXT): $(testsuite_common_bits_gen_OBJECTS) $(testsuite_common_bits_gen_DEPENDENCIES) testsuite/common/$(am__dirstamp)
4937         $(AM_V_CCLD)$(LINK_FOR_BUILD) $(testsuite_common_bits_gen_OBJECTS) $(testsuite_common_bits_gen_LDADD)
4938
4939 testsuite/common/bits32m0$(EXEEXT): $(testsuite_common_bits32m0_OBJECTS) $(testsuite_common_bits32m0_DEPENDENCIES) testsuite/common/$(am__dirstamp)
4940         $(AM_V_CCLD)$(LINK_FOR_BUILD) $(testsuite_common_bits32m0_OBJECTS) $(testsuite_common_bits32m0_LDADD)
4941
4942 testsuite/common/bits32m0.c: testsuite/common/bits-gen$(EXEEXT) testsuite/common/bits-tst.c
4943         $(AM_V_GEN)$< 32 0 big > $@.tmp
4944         $(AM_V_at)cat $(srcdir)/testsuite/common/bits-tst.c >> $@.tmp
4945         $(AM_V_at)mv $@.tmp $@
4946
4947 testsuite/common/bits32m31$(EXEEXT): $(testsuite_common_bits32m31_OBJECTS) $(testsuite_common_bits32m31_DEPENDENCIES) testsuite/common/$(am__dirstamp)
4948         $(AM_V_CCLD)$(LINK_FOR_BUILD) $(testsuite_common_bits32m31_OBJECTS) $(testsuite_common_bits32m31_LDADD)
4949
4950 testsuite/common/bits32m31.c: testsuite/common/bits-gen$(EXEEXT) testsuite/common/bits-tst.c
4951         $(AM_V_GEN)$< 32 31 little > $@.tmp
4952         $(AM_V_at)cat $(srcdir)/testsuite/common/bits-tst.c >> $@.tmp
4953         $(AM_V_at)mv $@.tmp $@
4954
4955 testsuite/common/bits64m0$(EXEEXT): $(testsuite_common_bits64m0_OBJECTS) $(testsuite_common_bits64m0_DEPENDENCIES) testsuite/common/$(am__dirstamp)
4956         $(AM_V_CCLD)$(LINK_FOR_BUILD) $(testsuite_common_bits64m0_OBJECTS) $(testsuite_common_bits64m0_LDADD)
4957
4958 testsuite/common/bits64m0.c: testsuite/common/bits-gen$(EXEEXT) testsuite/common/bits-tst.c
4959         $(AM_V_GEN)$< 64 0 big > $@.tmp
4960         $(AM_V_at)cat $(srcdir)/testsuite/common/bits-tst.c >> $@.tmp
4961         $(AM_V_at)mv $@.tmp $@
4962
4963 testsuite/common/bits64m63$(EXEEXT): $(testsuite_common_bits64m63_OBJECTS) $(testsuite_common_bits64m63_DEPENDENCIES) testsuite/common/$(am__dirstamp)
4964         $(AM_V_CCLD)$(LINK_FOR_BUILD) $(testsuite_common_bits64m63_OBJECTS) $(testsuite_common_bits64m63_LDADD)
4965
4966 testsuite/common/bits64m63.c: testsuite/common/bits-gen$(EXEEXT) testsuite/common/bits-tst.c
4967         $(AM_V_GEN)$< 64 63 little > $@.tmp
4968         $(AM_V_at)cat $(srcdir)/testsuite/common/bits-tst.c >> $@.tmp
4969         $(AM_V_at)mv $@.tmp $@
4970 @SIM_ENABLE_ARCH_aarch64_TRUE@$(aarch64_libsim_a_OBJECTS) $(aarch64_libsim_a_LIBADD): aarch64/hw-config.h
4971
4972 @SIM_ENABLE_ARCH_aarch64_TRUE@aarch64/modules.o: aarch64/modules.c
4973
4974 @SIM_ENABLE_ARCH_aarch64_TRUE@aarch64/%.o: common/%.c ; $(SIM_COMPILE)
4975 @SIM_ENABLE_ARCH_aarch64_TRUE@-@am__include@ aarch64/$(DEPDIR)/*.Po
4976 @SIM_ENABLE_ARCH_arm_TRUE@$(arm_libsim_a_OBJECTS) $(arm_libsim_a_LIBADD): arm/hw-config.h
4977
4978 @SIM_ENABLE_ARCH_arm_TRUE@arm/modules.o: arm/modules.c
4979
4980 @SIM_ENABLE_ARCH_arm_TRUE@arm/%.o: common/%.c ; $(SIM_COMPILE)
4981 @SIM_ENABLE_ARCH_arm_TRUE@-@am__include@ arm/$(DEPDIR)/*.Po
4982 @SIM_ENABLE_ARCH_avr_TRUE@$(avr_libsim_a_OBJECTS) $(avr_libsim_a_LIBADD): avr/hw-config.h
4983
4984 @SIM_ENABLE_ARCH_avr_TRUE@avr/modules.o: avr/modules.c
4985
4986 @SIM_ENABLE_ARCH_avr_TRUE@avr/%.o: common/%.c ; $(SIM_COMPILE)
4987 @SIM_ENABLE_ARCH_avr_TRUE@-@am__include@ avr/$(DEPDIR)/*.Po
4988 @SIM_ENABLE_ARCH_bfin_TRUE@$(bfin_libsim_a_OBJECTS) $(bfin_libsim_a_LIBADD): bfin/hw-config.h
4989
4990 @SIM_ENABLE_ARCH_bfin_TRUE@bfin/modules.o: bfin/modules.c
4991
4992 @SIM_ENABLE_ARCH_bfin_TRUE@bfin/%.o: common/%.c ; $(SIM_COMPILE)
4993 @SIM_ENABLE_ARCH_bfin_TRUE@-@am__include@ bfin/$(DEPDIR)/*.Po
4994
4995 @SIM_ENABLE_ARCH_bfin_TRUE@bfin/linux-fixed-code.h: @MAINT@ $(srcdir)/bfin/linux-fixed-code.s bfin/local.mk bfin/$(am__dirstamp)
4996 @SIM_ENABLE_ARCH_bfin_TRUE@     $(AM_V_GEN)$(AS_FOR_TARGET_BFIN) $(srcdir)/bfin/linux-fixed-code.s -o bfin/linux-fixed-code.o
4997 @SIM_ENABLE_ARCH_bfin_TRUE@     $(AM_V_at)(\
4998 @SIM_ENABLE_ARCH_bfin_TRUE@             set -e; \
4999 @SIM_ENABLE_ARCH_bfin_TRUE@             echo "/* DO NOT EDIT: Autogenerated from linux-fixed-code.s.  */"; \
5000 @SIM_ENABLE_ARCH_bfin_TRUE@             echo "static const unsigned char bfin_linux_fixed_code[] ="; \
5001 @SIM_ENABLE_ARCH_bfin_TRUE@             echo "{"; \
5002 @SIM_ENABLE_ARCH_bfin_TRUE@             $(OBJDUMP_FOR_TARGET_BFIN) -d -z bfin/linux-fixed-code.o > $@.dis; \
5003 @SIM_ENABLE_ARCH_bfin_TRUE@             sed -n \
5004 @SIM_ENABLE_ARCH_bfin_TRUE@                     -e 's:^[^       ]*      :0x:' \
5005 @SIM_ENABLE_ARCH_bfin_TRUE@                     -e '/^0x/{s:    .*::;s: *$$:,:;s: :, 0x:g;p;}' \
5006 @SIM_ENABLE_ARCH_bfin_TRUE@                     $@.dis; \
5007 @SIM_ENABLE_ARCH_bfin_TRUE@             rm -f $@.dis; \
5008 @SIM_ENABLE_ARCH_bfin_TRUE@             echo "};" \
5009 @SIM_ENABLE_ARCH_bfin_TRUE@     ) > $@.tmp
5010 @SIM_ENABLE_ARCH_bfin_TRUE@     $(AM_V_at)$(SHELL) $(srcroot)/move-if-change $@.tmp $(srcdir)/bfin/linux-fixed-code.h
5011 @SIM_ENABLE_ARCH_bfin_TRUE@     $(AM_V_at)touch $(srcdir)/bfin/linux-fixed-code.h
5012 @SIM_ENABLE_ARCH_bpf_TRUE@$(bpf_libsim_a_OBJECTS) $(bpf_libsim_a_LIBADD): bpf/hw-config.h
5013
5014 @SIM_ENABLE_ARCH_bpf_TRUE@bpf/modules.o: bpf/modules.c
5015
5016 @SIM_ENABLE_ARCH_bpf_TRUE@bpf/%.o: common/%.c ; $(SIM_COMPILE)
5017 @SIM_ENABLE_ARCH_bpf_TRUE@-@am__include@ bpf/$(DEPDIR)/*.Po
5018
5019 @SIM_ENABLE_ARCH_bpf_TRUE@bpf/modules.c: | $(bpf_BUILD_OUTPUTS)
5020
5021 @SIM_ENABLE_ARCH_bpf_TRUE@bpf/mloop-le.c bpf/eng-le.h: bpf/stamp-mloop-le ; @true
5022 @SIM_ENABLE_ARCH_bpf_TRUE@bpf/stamp-mloop-le: $(srccom)/genmloop.sh bpf/mloop.in
5023 @SIM_ENABLE_ARCH_bpf_TRUE@      $(AM_V_GEN)$(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \
5024 @SIM_ENABLE_ARCH_bpf_TRUE@              -mono -scache -prefix bpfbf_ebpfle -cpu bpfbf \
5025 @SIM_ENABLE_ARCH_bpf_TRUE@              -infile $(srcdir)/bpf/mloop.in \
5026 @SIM_ENABLE_ARCH_bpf_TRUE@              -outfile-prefix bpf/ -outfile-suffix -le
5027 @SIM_ENABLE_ARCH_bpf_TRUE@      $(AM_V_at)$(SHELL) $(srcroot)/move-if-change bpf/eng-le.hin bpf/eng-le.h
5028 @SIM_ENABLE_ARCH_bpf_TRUE@      $(AM_V_at)$(SHELL) $(srcroot)/move-if-change bpf/mloop-le.cin bpf/mloop-le.c
5029 @SIM_ENABLE_ARCH_bpf_TRUE@      $(AM_V_at)touch $@
5030
5031 @SIM_ENABLE_ARCH_bpf_TRUE@bpf/mloop-be.c bpf/eng-be.h: bpf/stamp-mloop-be ; @true
5032 @SIM_ENABLE_ARCH_bpf_TRUE@bpf/stamp-mloop-be: $(srccom)/genmloop.sh bpf/mloop.in
5033 @SIM_ENABLE_ARCH_bpf_TRUE@      $(AM_V_GEN)$(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \
5034 @SIM_ENABLE_ARCH_bpf_TRUE@              -mono -scache -prefix bpfbf_ebpfbe -cpu bpfbf \
5035 @SIM_ENABLE_ARCH_bpf_TRUE@              -infile $(srcdir)/bpf/mloop.in \
5036 @SIM_ENABLE_ARCH_bpf_TRUE@              -outfile-prefix bpf/ -outfile-suffix -be
5037 @SIM_ENABLE_ARCH_bpf_TRUE@      $(AM_V_at)$(SHELL) $(srcroot)/move-if-change bpf/eng-be.hin bpf/eng-be.h
5038 @SIM_ENABLE_ARCH_bpf_TRUE@      $(AM_V_at)$(SHELL) $(srcroot)/move-if-change bpf/mloop-be.cin bpf/mloop-be.c
5039 @SIM_ENABLE_ARCH_bpf_TRUE@      $(AM_V_at)touch $@
5040
5041 @SIM_ENABLE_ARCH_bpf_TRUE@bpf/cgen: bpf/cgen-arch bpf/cgen-cpu bpf/cgen-defs-le bpf/cgen-defs-be bpf/cgen-decode-le bpf/cgen-decode-be
5042
5043 @SIM_ENABLE_ARCH_bpf_TRUE@bpf/cgen-arch:
5044 @SIM_ENABLE_ARCH_bpf_TRUE@      $(AM_V_GEN)mach=bpf cpu=bpfbf FLAGS="with-scache"; $(CGEN_GEN_ARCH)
5045 @SIM_ENABLE_ARCH_bpf_TRUE@bpf/arch.h bpf/arch.c bpf/cpuall.h: @CGEN_MAINT@ bpf/cgen-arch
5046
5047 @SIM_ENABLE_ARCH_bpf_TRUE@bpf/cgen-cpu:
5048 @SIM_ENABLE_ARCH_bpf_TRUE@      $(AM_V_GEN)isa=ebpfle,ebpfbe cpu=bpfbf mach=bpf FLAGS="with-multiple-isa with-scache"; $(CGEN_GEN_CPU)
5049 @SIM_ENABLE_ARCH_bpf_TRUE@      $(AM_V_at)rm -f $(srcdir)/bpf/model.c
5050 @SIM_ENABLE_ARCH_bpf_TRUE@bpf/cpu.h bpf/cpu.c bpf/model.c: @CGEN_MAINT@ bpf/cgen-cpu
5051
5052 @SIM_ENABLE_ARCH_bpf_TRUE@bpf/cgen-defs-le:
5053 @SIM_ENABLE_ARCH_bpf_TRUE@      $(AM_V_GEN)isa=ebpfle cpu=bpfbf mach=bpf FLAGS="with-scache" SUFFIX="-le"; $(CGEN_GEN_DEFS)
5054 @SIM_ENABLE_ARCH_bpf_TRUE@bpf/defs-le.h: @CGEN_MAINT@ bpf/cgen-defs-le
5055
5056 @SIM_ENABLE_ARCH_bpf_TRUE@bpf/cgen-defs-be:
5057 @SIM_ENABLE_ARCH_bpf_TRUE@      $(AM_V_GEN)isa=ebpfbe cpu=bpfbf mach=bpf FLAGS="with-scache" SUFFIX="-be"; $(CGEN_GEN_DEFS)
5058 @SIM_ENABLE_ARCH_bpf_TRUE@bpf/defs-be.h: @CGEN_MAINT@ bpf/cgen-defs-be
5059
5060 @SIM_ENABLE_ARCH_bpf_TRUE@bpf/cgen-decode-le:
5061 @SIM_ENABLE_ARCH_bpf_TRUE@      $(AM_V_GEN)isa=ebpfle cpu=bpfbf mach=bpf FLAGS="with-scache" SUFFIX="-le" EXTRAFILES="$(CGEN_CPU_SEM)"; $(CGEN_GEN_DECODE)
5062 @SIM_ENABLE_ARCH_bpf_TRUE@bpf/sem-le.c bpf/decode-le.c bpf/decode-le.h: @CGEN_MAINT@ bpf/cgen-decode-vle
5063
5064 @SIM_ENABLE_ARCH_bpf_TRUE@bpf/cgen-decode-be:
5065 @SIM_ENABLE_ARCH_bpf_TRUE@      $(AM_V_GEN)isa=ebpfbe cpu=bpfbf mach=bpf FLAGS="with-scache" SUFFIX="-be" EXTRAFILES="$(CGEN_CPU_SEM)"; $(CGEN_GEN_DECODE)
5066 @SIM_ENABLE_ARCH_bpf_TRUE@bpf/sem-be.c bpf/decode-be.c bpf/decode-be.h: @CGEN_MAINT@ bpf/cgen-decode-be
5067 @SIM_ENABLE_ARCH_cr16_TRUE@$(cr16_libsim_a_OBJECTS) $(cr16_libsim_a_LIBADD): cr16/hw-config.h
5068
5069 @SIM_ENABLE_ARCH_cr16_TRUE@cr16/modules.o: cr16/modules.c
5070
5071 @SIM_ENABLE_ARCH_cr16_TRUE@cr16/%.o: common/%.c ; $(SIM_COMPILE)
5072 @SIM_ENABLE_ARCH_cr16_TRUE@-@am__include@ cr16/$(DEPDIR)/*.Po
5073
5074 @SIM_ENABLE_ARCH_cr16_TRUE@cr16/modules.c: | $(cr16_BUILD_OUTPUTS)
5075
5076 # These rules are copied from automake, but tweaked to use FOR_BUILD variables.
5077 @SIM_ENABLE_ARCH_cr16_TRUE@cr16/gencode$(EXEEXT): $(cr16_gencode_OBJECTS) $(cr16_gencode_DEPENDENCIES) cr16/$(am__dirstamp)
5078 @SIM_ENABLE_ARCH_cr16_TRUE@     $(AM_V_CCLD)$(LINK_FOR_BUILD) $(cr16_gencode_OBJECTS) $(cr16_gencode_LDADD)
5079
5080 # gencode is a build-time only tool.  Override the default rules for it.
5081 @SIM_ENABLE_ARCH_cr16_TRUE@cr16/gencode.o: cr16/gencode.c
5082 @SIM_ENABLE_ARCH_cr16_TRUE@     $(AM_V_CC)$(COMPILE_FOR_BUILD) -c $< -o $@
5083 @SIM_ENABLE_ARCH_cr16_TRUE@cr16/cr16-opc.o: ../opcodes/cr16-opc.c
5084 @SIM_ENABLE_ARCH_cr16_TRUE@     $(AM_V_CC)$(COMPILE_FOR_BUILD) -c $< -o $@
5085
5086 @SIM_ENABLE_ARCH_cr16_TRUE@cr16/simops.h: cr16/gencode$(EXEEXT)
5087 @SIM_ENABLE_ARCH_cr16_TRUE@     $(AM_V_GEN)$< -h >$@
5088
5089 @SIM_ENABLE_ARCH_cr16_TRUE@cr16/table.c: cr16/gencode$(EXEEXT)
5090 @SIM_ENABLE_ARCH_cr16_TRUE@     $(AM_V_GEN)$< >$@
5091 @SIM_ENABLE_ARCH_cris_TRUE@$(cris_libsim_a_OBJECTS) $(cris_libsim_a_LIBADD): cris/hw-config.h
5092
5093 @SIM_ENABLE_ARCH_cris_TRUE@cris/modules.o: cris/modules.c
5094
5095 @SIM_ENABLE_ARCH_cris_TRUE@cris/%.o: common/%.c ; $(SIM_COMPILE)
5096 @SIM_ENABLE_ARCH_cris_TRUE@-@am__include@ cris/$(DEPDIR)/*.Po
5097
5098 @SIM_ENABLE_ARCH_cris_TRUE@cris/modules.c: | $(cris_BUILD_OUTPUTS)
5099
5100 @SIM_ENABLE_ARCH_cris_TRUE@cris/mloopv10f.c cris/engv10.h: cris/stamp-mloop-v10f ; @true
5101 @SIM_ENABLE_ARCH_cris_TRUE@cris/stamp-mloop-v10f: $(srccom)/genmloop.sh cris/mloop.in
5102 @SIM_ENABLE_ARCH_cris_TRUE@     $(AM_V_GEN)$(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \
5103 @SIM_ENABLE_ARCH_cris_TRUE@             -mono -no-fast -pbb -switch semcrisv10f-switch.c \
5104 @SIM_ENABLE_ARCH_cris_TRUE@             -cpu crisv10f \
5105 @SIM_ENABLE_ARCH_cris_TRUE@             -infile $(srcdir)/cris/mloop.in -outfile-prefix cris/ -outfile-suffix -v10f
5106 @SIM_ENABLE_ARCH_cris_TRUE@     $(AM_V_at)$(SHELL) $(srcroot)/move-if-change cris/eng-v10f.hin cris/engv10.h
5107 @SIM_ENABLE_ARCH_cris_TRUE@     $(AM_V_at)$(SHELL) $(srcroot)/move-if-change cris/mloop-v10f.cin cris/mloopv10f.c
5108 @SIM_ENABLE_ARCH_cris_TRUE@     $(AM_V_at)touch $@
5109
5110 @SIM_ENABLE_ARCH_cris_TRUE@cris/mloopv32f.c cris/engv32.h: cris/stamp-mloop-v32f ; @true
5111 @SIM_ENABLE_ARCH_cris_TRUE@cris/stamp-mloop-v32f: $(srccom)/genmloop.sh cris/mloop.in
5112 @SIM_ENABLE_ARCH_cris_TRUE@     $(AM_V_GEN)$(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \
5113 @SIM_ENABLE_ARCH_cris_TRUE@             -mono -no-fast -pbb -switch semcrisv32f-switch.c \
5114 @SIM_ENABLE_ARCH_cris_TRUE@             -cpu crisv32f \
5115 @SIM_ENABLE_ARCH_cris_TRUE@             -infile $(srcdir)/cris/mloop.in -outfile-prefix cris/ -outfile-suffix -v32f
5116 @SIM_ENABLE_ARCH_cris_TRUE@     $(AM_V_at)$(SHELL) $(srcroot)/move-if-change cris/eng-v32f.hin cris/engv32.h
5117 @SIM_ENABLE_ARCH_cris_TRUE@     $(AM_V_at)$(SHELL) $(srcroot)/move-if-change cris/mloop-v32f.cin cris/mloopv32f.c
5118 @SIM_ENABLE_ARCH_cris_TRUE@     $(AM_V_at)touch $@
5119
5120 @SIM_ENABLE_ARCH_cris_TRUE@cris/cgen: cris/cgen-arch cris/cgen-cpu-decode-v10f cris/cgen-cpu-decode-v32f
5121
5122 @SIM_ENABLE_ARCH_cris_TRUE@cris/cgen-arch:
5123 @SIM_ENABLE_ARCH_cris_TRUE@     $(AM_V_GEN)mach=crisv10,crisv32 FLAGS="with-scache with-profile=fn"; $(CGEN_GEN_ARCH)
5124 @SIM_ENABLE_ARCH_cris_TRUE@cris/arch.h cris/arch.c cris/cpuall.h: @CGEN_MAINT@ cris/cgen-arch
5125
5126 @SIM_ENABLE_ARCH_cris_TRUE@cris/cgen-cpu-decode-v10f:
5127 @SIM_ENABLE_ARCH_cris_TRUE@     $(AM_V_GEN)cpu=crisv10f mach=crisv10 SUFFIX=v10 FLAGS="with-scache with-profile=fn" EXTRAFILES="$(CGEN_CPU_SEMSW)"; $(CGEN_GEN_CPU_DECODE)
5128 @SIM_ENABLE_ARCH_cris_TRUE@     $(AM_V_at)$(SHELL) $(srcroot)/move-if-change $(srcdir)/cris/semv10-switch.c $(srcdir)/cris/semcrisv10f-switch.c
5129 @SIM_ENABLE_ARCH_cris_TRUE@cris/cpuv10.h cris/cpuv10.c cris/semcrisv10f-switch.c cris/modelv10.c cris/decodev10.c cris/decodev10.h: @CGEN_MAINT@ cris/cgen-cpu-decode-v10f
5130
5131 @SIM_ENABLE_ARCH_cris_TRUE@cris/cgen-cpu-decode-v32f:
5132 @SIM_ENABLE_ARCH_cris_TRUE@     $(AM_V_GEN)cpu=crisv32f mach=crisv32 SUFFIX=v32 FLAGS="with-scache with-profile=fn" EXTRAFILES="$(CGEN_CPU_SEMSW)"; $(CGEN_GEN_CPU_DECODE)
5133 @SIM_ENABLE_ARCH_cris_TRUE@     $(AM_V_at)$(SHELL) $(srcroot)/move-if-change $(srcdir)/cris/semv32-switch.c $(srcdir)/cris/semcrisv32f-switch.c
5134 @SIM_ENABLE_ARCH_cris_TRUE@cris/cpuv32.h cris/cpuv32.c cris/semcrisv32f-switch.c cris/modelv32.c cris/decodev32.c cris/decodev32.h: @CGEN_MAINT@ cris/cgen-cpu-decode-v32f
5135 @SIM_ENABLE_ARCH_d10v_TRUE@$(d10v_libsim_a_OBJECTS) $(d10v_libsim_a_LIBADD): d10v/hw-config.h
5136
5137 @SIM_ENABLE_ARCH_d10v_TRUE@d10v/modules.o: d10v/modules.c
5138
5139 @SIM_ENABLE_ARCH_d10v_TRUE@d10v/%.o: common/%.c ; $(SIM_COMPILE)
5140 @SIM_ENABLE_ARCH_d10v_TRUE@-@am__include@ d10v/$(DEPDIR)/*.Po
5141
5142 @SIM_ENABLE_ARCH_d10v_TRUE@d10v/modules.c: | $(d10v_BUILD_OUTPUTS)
5143
5144 # These rules are copied from automake, but tweaked to use FOR_BUILD variables.
5145 @SIM_ENABLE_ARCH_d10v_TRUE@d10v/gencode$(EXEEXT): $(d10v_gencode_OBJECTS) $(d10v_gencode_DEPENDENCIES) d10v/$(am__dirstamp)
5146 @SIM_ENABLE_ARCH_d10v_TRUE@     $(AM_V_CCLD)$(LINK_FOR_BUILD) $(d10v_gencode_OBJECTS) $(d10v_gencode_LDADD)
5147
5148 # gencode is a build-time only tool.  Override the default rules for it.
5149 @SIM_ENABLE_ARCH_d10v_TRUE@d10v/gencode.o: d10v/gencode.c
5150 @SIM_ENABLE_ARCH_d10v_TRUE@     $(AM_V_CC)$(COMPILE_FOR_BUILD) -c $< -o $@
5151 @SIM_ENABLE_ARCH_d10v_TRUE@d10v/d10v-opc.o: ../opcodes/d10v-opc.c
5152 @SIM_ENABLE_ARCH_d10v_TRUE@     $(AM_V_CC)$(COMPILE_FOR_BUILD) -c $< -o $@
5153
5154 @SIM_ENABLE_ARCH_d10v_TRUE@d10v/simops.h: d10v/gencode$(EXEEXT)
5155 @SIM_ENABLE_ARCH_d10v_TRUE@     $(AM_V_GEN)$< -h >$@
5156
5157 @SIM_ENABLE_ARCH_d10v_TRUE@d10v/table.c: d10v/gencode$(EXEEXT)
5158 @SIM_ENABLE_ARCH_d10v_TRUE@     $(AM_V_GEN)$< >$@
5159 @SIM_ENABLE_ARCH_erc32_TRUE@$(erc32_libsim_a_OBJECTS) $(erc32_libsim_a_LIBADD): erc32/hw-config.h
5160
5161 @SIM_ENABLE_ARCH_erc32_TRUE@erc32/modules.o: erc32/modules.c
5162
5163 @SIM_ENABLE_ARCH_erc32_TRUE@erc32/%.o: common/%.c ; $(SIM_COMPILE)
5164 @SIM_ENABLE_ARCH_erc32_TRUE@-@am__include@ erc32/$(DEPDIR)/*.Po
5165
5166 @SIM_ENABLE_ARCH_erc32_TRUE@erc32/sis$(EXEEXT): erc32/run$(EXEEXT)
5167 @SIM_ENABLE_ARCH_erc32_TRUE@    $(AM_V_GEN)ln $< $@ 2>/dev/null || $(LN_S) $< $@ 2>/dev/null || cp -p $< $@
5168 @SIM_ENABLE_ARCH_erc32_TRUE@sim-%D-install-exec-local: installdirs
5169 @SIM_ENABLE_ARCH_erc32_TRUE@    $(AM_V_at)$(MKDIR_P) $(DESTDIR)$(bindir)
5170 @SIM_ENABLE_ARCH_erc32_TRUE@    n=`echo sis | sed '$(program_transform_name)'`; \
5171 @SIM_ENABLE_ARCH_erc32_TRUE@    $(LIBTOOL) --mode=install $(INSTALL_PROGRAM) erc32/run$(EXEEXT) $(DESTDIR)$(bindir)/$$n$(EXEEXT)
5172 @SIM_ENABLE_ARCH_erc32_TRUE@sim-erc32-uninstall-local:
5173 @SIM_ENABLE_ARCH_erc32_TRUE@    rm -f $(DESTDIR)$(bindir)/sis
5174 @SIM_ENABLE_ARCH_examples_TRUE@$(example_synacor_libsim_a_OBJECTS) $(example_synacor_libsim_a_LIBADD): example-synacor/hw-config.h
5175
5176 @SIM_ENABLE_ARCH_examples_TRUE@example-synacor/modules.o: example-synacor/modules.c
5177
5178 @SIM_ENABLE_ARCH_examples_TRUE@example-synacor/%.o: common/%.c ; $(SIM_COMPILE)
5179 @SIM_ENABLE_ARCH_examples_TRUE@-@am__include@ example-synacor/$(DEPDIR)/*.Po
5180 @SIM_ENABLE_ARCH_frv_TRUE@$(frv_libsim_a_OBJECTS) $(frv_libsim_a_LIBADD): frv/hw-config.h
5181
5182 @SIM_ENABLE_ARCH_frv_TRUE@frv/modules.o: frv/modules.c
5183
5184 @SIM_ENABLE_ARCH_frv_TRUE@frv/%.o: common/%.c ; $(SIM_COMPILE)
5185 @SIM_ENABLE_ARCH_frv_TRUE@-@am__include@ frv/$(DEPDIR)/*.Po
5186
5187 @SIM_ENABLE_ARCH_frv_TRUE@frv/modules.c: | $(frv_BUILD_OUTPUTS)
5188
5189 @SIM_ENABLE_ARCH_frv_TRUE@frv/mloop.c frv/eng.h: frv/stamp-mloop ; @true
5190 @SIM_ENABLE_ARCH_frv_TRUE@frv/stamp-mloop: $(srccom)/genmloop.sh frv/mloop.in
5191 @SIM_ENABLE_ARCH_frv_TRUE@      $(AM_V_GEN)$(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \
5192 @SIM_ENABLE_ARCH_frv_TRUE@              -mono -scache -parallel-generic-write -parallel-only \
5193 @SIM_ENABLE_ARCH_frv_TRUE@              -cpu frvbf \
5194 @SIM_ENABLE_ARCH_frv_TRUE@              -infile $(srcdir)/frv/mloop.in -outfile-prefix frv/
5195 @SIM_ENABLE_ARCH_frv_TRUE@      $(AM_V_at)$(SHELL) $(srcroot)/move-if-change frv/eng.hin frv/eng.h
5196 @SIM_ENABLE_ARCH_frv_TRUE@      $(AM_V_at)$(SHELL) $(srcroot)/move-if-change frv/mloop.cin frv/mloop.c
5197 @SIM_ENABLE_ARCH_frv_TRUE@      $(AM_V_at)touch $@
5198
5199 @SIM_ENABLE_ARCH_frv_TRUE@frv/cgen: frv/cgen-arch frv/cgen-cpu-decode
5200
5201 @SIM_ENABLE_ARCH_frv_TRUE@frv/cgen-arch:
5202 @SIM_ENABLE_ARCH_frv_TRUE@      $(AM_V_GEN)mach=all FLAGS="with-scache"; $(CGEN_GEN_ARCH)
5203 @SIM_ENABLE_ARCH_frv_TRUE@frv/arch.h frv/arch.c frv/cpuall.h: @CGEN_MAINT@ frv/cgen-arch
5204
5205 @SIM_ENABLE_ARCH_frv_TRUE@frv/cgen-cpu-decode:
5206 @SIM_ENABLE_ARCH_frv_TRUE@      $(AM_V_GEN)cpu=frvbf mach=frv,fr550,fr500,fr450,fr400,tomcat,simple FLAGS="with-scache with-profile=fn with-generic-write with-parallel-only" EXTRAFILES="$(CGEN_CPU_SEM)"; $(CGEN_GEN_CPU_DECODE)
5207 @SIM_ENABLE_ARCH_frv_TRUE@frv/cpu.h frv/sem.c frv/model.c frv/decode.c frv/decode.h: @CGEN_MAINT@ frv/cgen-cpu-decode
5208 @SIM_ENABLE_ARCH_ft32_TRUE@$(ft32_libsim_a_OBJECTS) $(ft32_libsim_a_LIBADD): ft32/hw-config.h
5209
5210 @SIM_ENABLE_ARCH_ft32_TRUE@ft32/modules.o: ft32/modules.c
5211
5212 @SIM_ENABLE_ARCH_ft32_TRUE@ft32/%.o: common/%.c ; $(SIM_COMPILE)
5213 @SIM_ENABLE_ARCH_ft32_TRUE@-@am__include@ ft32/$(DEPDIR)/*.Po
5214 @SIM_ENABLE_ARCH_h8300_TRUE@$(h8300_libsim_a_OBJECTS) $(h8300_libsim_a_LIBADD): h8300/hw-config.h
5215
5216 @SIM_ENABLE_ARCH_h8300_TRUE@h8300/modules.o: h8300/modules.c
5217
5218 @SIM_ENABLE_ARCH_h8300_TRUE@h8300/%.o: common/%.c ; $(SIM_COMPILE)
5219 @SIM_ENABLE_ARCH_h8300_TRUE@-@am__include@ h8300/$(DEPDIR)/*.Po
5220 @SIM_ENABLE_ARCH_iq2000_TRUE@$(iq2000_libsim_a_OBJECTS) $(iq2000_libsim_a_LIBADD): iq2000/hw-config.h
5221
5222 @SIM_ENABLE_ARCH_iq2000_TRUE@iq2000/modules.o: iq2000/modules.c
5223
5224 @SIM_ENABLE_ARCH_iq2000_TRUE@iq2000/%.o: common/%.c ; $(SIM_COMPILE)
5225 @SIM_ENABLE_ARCH_iq2000_TRUE@-@am__include@ iq2000/$(DEPDIR)/*.Po
5226
5227 @SIM_ENABLE_ARCH_iq2000_TRUE@iq2000/modules.c: | $(iq2000_BUILD_OUTPUTS)
5228
5229 @SIM_ENABLE_ARCH_iq2000_TRUE@iq2000/mloop.c iq2000/eng.h: iq2000/stamp-mloop ; @true
5230 @SIM_ENABLE_ARCH_iq2000_TRUE@iq2000/stamp-mloop: $(srccom)/genmloop.sh iq2000/mloop.in
5231 @SIM_ENABLE_ARCH_iq2000_TRUE@   $(AM_V_GEN)$(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \
5232 @SIM_ENABLE_ARCH_iq2000_TRUE@           -mono -fast -pbb -switch sem-switch.c \
5233 @SIM_ENABLE_ARCH_iq2000_TRUE@           -cpu iq2000bf \
5234 @SIM_ENABLE_ARCH_iq2000_TRUE@           -infile $(srcdir)/iq2000/mloop.in -outfile-prefix iq2000/
5235 @SIM_ENABLE_ARCH_iq2000_TRUE@   $(AM_V_at)$(SHELL) $(srcroot)/move-if-change iq2000/eng.hin iq2000/eng.h
5236 @SIM_ENABLE_ARCH_iq2000_TRUE@   $(AM_V_at)$(SHELL) $(srcroot)/move-if-change iq2000/mloop.cin iq2000/mloop.c
5237 @SIM_ENABLE_ARCH_iq2000_TRUE@   $(AM_V_at)touch $@
5238
5239 @SIM_ENABLE_ARCH_iq2000_TRUE@iq2000/cgen: iq2000/cgen-arch iq2000/cgen-cpu-decode
5240
5241 @SIM_ENABLE_ARCH_iq2000_TRUE@iq2000/cgen-arch:
5242 @SIM_ENABLE_ARCH_iq2000_TRUE@   $(AM_V_GEN)mach=iq2000 FLAGS="with-scache with-profile=fn"; $(CGEN_GEN_ARCH)
5243 @SIM_ENABLE_ARCH_iq2000_TRUE@iq2000/arch.h iq2000/arch.c iq2000/cpuall.h: @CGEN_MAINT@ iq2000/cgen-arch
5244
5245 @SIM_ENABLE_ARCH_iq2000_TRUE@iq2000/cgen-cpu-decode:
5246 @SIM_ENABLE_ARCH_iq2000_TRUE@   $(AM_V_GEN)cpu=iq2000bf mach=iq2000 FLAGS="with-scache with-profile=fn" EXTRAFILES="$(CGEN_CPU_SEM) $(CGEN_CPU_SEMSW)"; $(CGEN_GEN_CPU_DECODE)
5247 @SIM_ENABLE_ARCH_iq2000_TRUE@iq2000/cpu.h iq2000/sem.c iq2000/sem-switch.c iq2000/model.c iq2000/decode.c iq2000/decode.h: @CGEN_MAINT@ iq2000/cgen-cpu-decode
5248 @SIM_ENABLE_ARCH_lm32_TRUE@$(lm32_libsim_a_OBJECTS) $(lm32_libsim_a_LIBADD): lm32/hw-config.h
5249
5250 @SIM_ENABLE_ARCH_lm32_TRUE@lm32/modules.o: lm32/modules.c
5251
5252 @SIM_ENABLE_ARCH_lm32_TRUE@lm32/%.o: common/%.c ; $(SIM_COMPILE)
5253 @SIM_ENABLE_ARCH_lm32_TRUE@-@am__include@ lm32/$(DEPDIR)/*.Po
5254
5255 @SIM_ENABLE_ARCH_lm32_TRUE@lm32/modules.c: | $(lm32_BUILD_OUTPUTS)
5256
5257 @SIM_ENABLE_ARCH_lm32_TRUE@lm32/mloop.c lm32/eng.h: lm32/stamp-mloop ; @true
5258 @SIM_ENABLE_ARCH_lm32_TRUE@lm32/stamp-mloop: $(srccom)/genmloop.sh lm32/mloop.in
5259 @SIM_ENABLE_ARCH_lm32_TRUE@     $(AM_V_GEN)$(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \
5260 @SIM_ENABLE_ARCH_lm32_TRUE@             -mono -fast -pbb -switch sem-switch.c \
5261 @SIM_ENABLE_ARCH_lm32_TRUE@             -cpu lm32bf \
5262 @SIM_ENABLE_ARCH_lm32_TRUE@             -infile $(srcdir)/lm32/mloop.in -outfile-prefix lm32/
5263 @SIM_ENABLE_ARCH_lm32_TRUE@     $(AM_V_at)$(SHELL) $(srcroot)/move-if-change lm32/eng.hin lm32/eng.h
5264 @SIM_ENABLE_ARCH_lm32_TRUE@     $(AM_V_at)$(SHELL) $(srcroot)/move-if-change lm32/mloop.cin lm32/mloop.c
5265 @SIM_ENABLE_ARCH_lm32_TRUE@     $(AM_V_at)touch $@
5266
5267 @SIM_ENABLE_ARCH_lm32_TRUE@lm32/cgen: lm32/cgen-arch lm32/cgen-cpu-decode
5268
5269 @SIM_ENABLE_ARCH_lm32_TRUE@lm32/cgen-arch:
5270 @SIM_ENABLE_ARCH_lm32_TRUE@     $(AM_V_GEN)mach=all FLAGS="with-scache with-profile=fn"; $(CGEN_GEN_ARCH)
5271 @SIM_ENABLE_ARCH_lm32_TRUE@lm32/arch.h lm32/arch.c lm32/cpuall.h: @CGEN_MAINT@ lm32/cgen-arch
5272
5273 @SIM_ENABLE_ARCH_lm32_TRUE@lm32/cgen-cpu-decode:
5274 @SIM_ENABLE_ARCH_lm32_TRUE@     $(AM_V_GEN)cpu=lm32bf mach=lm32 FLAGS="with-scache with-profile=fn" EXTRAFILES="$(CGEN_CPU_SEM) $(CGEN_CPU_SEMSW)"; $(CGEN_GEN_CPU_DECODE)
5275 @SIM_ENABLE_ARCH_lm32_TRUE@lm32/cpu.h lm32/sem.c lm32/sem-switch.c lm32/model.c lm32/decode.c lm32/decode.h: @CGEN_MAINT@ lm32/cgen-cpu-decode
5276 @SIM_ENABLE_ARCH_m32c_TRUE@$(m32c_libsim_a_OBJECTS) $(m32c_libsim_a_LIBADD): m32c/hw-config.h
5277
5278 @SIM_ENABLE_ARCH_m32c_TRUE@m32c/modules.o: m32c/modules.c
5279
5280 @SIM_ENABLE_ARCH_m32c_TRUE@m32c/%.o: common/%.c ; $(SIM_COMPILE)
5281 @SIM_ENABLE_ARCH_m32c_TRUE@-@am__include@ m32c/$(DEPDIR)/*.Po
5282
5283 @SIM_ENABLE_ARCH_m32c_TRUE@m32c/modules.c: | $(m32c_BUILD_OUTPUTS)
5284
5285 # These rules are copied from automake, but tweaked to use FOR_BUILD variables.
5286 @SIM_ENABLE_ARCH_m32c_TRUE@m32c/opc2c$(EXEEXT): $(m32c_opc2c_OBJECTS) $(m32c_opc2c_DEPENDENCIES) m32c/$(am__dirstamp)
5287 @SIM_ENABLE_ARCH_m32c_TRUE@     $(AM_V_CCLD)$(LINK_FOR_BUILD) $(m32c_opc2c_OBJECTS) $(m32c_opc2c_LDADD)
5288
5289 # opc2c is a build-time only tool.  Override the default rules for it.
5290 @SIM_ENABLE_ARCH_m32c_TRUE@m32c/opc2c.o: m32c/opc2c.c
5291 @SIM_ENABLE_ARCH_m32c_TRUE@     $(AM_V_CC)$(COMPILE_FOR_BUILD) -c $< -o $@
5292
5293 @SIM_ENABLE_ARCH_m32c_TRUE@m32c/m32c.c: m32c/m32c.opc m32c/opc2c$(EXEEXT)
5294 @SIM_ENABLE_ARCH_m32c_TRUE@     $(AM_V_GEN)$(m32c_OPC2C_RUN) -l $@.log $< > $@.tmp
5295 @SIM_ENABLE_ARCH_m32c_TRUE@     $(AM_V_at)mv $@.tmp $@
5296
5297 @SIM_ENABLE_ARCH_m32c_TRUE@m32c/r8c.c: m32c/r8c.opc m32c/opc2c$(EXEEXT)
5298 @SIM_ENABLE_ARCH_m32c_TRUE@     $(AM_V_GEN)$(m32c_OPC2C_RUN) -l $@.log $< > $@.tmp
5299 @SIM_ENABLE_ARCH_m32c_TRUE@     $(AM_V_at)mv $@.tmp $@
5300 @SIM_ENABLE_ARCH_m32r_TRUE@$(m32r_libsim_a_OBJECTS) $(m32r_libsim_a_LIBADD): m32r/hw-config.h
5301
5302 @SIM_ENABLE_ARCH_m32r_TRUE@m32r/modules.o: m32r/modules.c
5303
5304 @SIM_ENABLE_ARCH_m32r_TRUE@m32r/%.o: common/%.c ; $(SIM_COMPILE)
5305 @SIM_ENABLE_ARCH_m32r_TRUE@-@am__include@ m32r/$(DEPDIR)/*.Po
5306
5307 @SIM_ENABLE_ARCH_m32r_TRUE@m32r/modules.c: | $(m32r_BUILD_OUTPUTS)
5308
5309 @SIM_ENABLE_ARCH_m32r_TRUE@m32r/mloop.c m32r/eng.h: m32r/stamp-mloop ; @true
5310 @SIM_ENABLE_ARCH_m32r_TRUE@m32r/stamp-mloop: $(srccom)/genmloop.sh m32r/mloop.in
5311 @SIM_ENABLE_ARCH_m32r_TRUE@     $(AM_V_GEN)$(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \
5312 @SIM_ENABLE_ARCH_m32r_TRUE@             -mono -fast -pbb -switch sem-switch.c \
5313 @SIM_ENABLE_ARCH_m32r_TRUE@             -cpu m32rbf \
5314 @SIM_ENABLE_ARCH_m32r_TRUE@             -infile $(srcdir)/m32r/mloop.in -outfile-prefix m32r/
5315 @SIM_ENABLE_ARCH_m32r_TRUE@     $(AM_V_at)$(SHELL) $(srcroot)/move-if-change m32r/eng.hin m32r/eng.h
5316 @SIM_ENABLE_ARCH_m32r_TRUE@     $(AM_V_at)$(SHELL) $(srcroot)/move-if-change m32r/mloop.cin m32r/mloop.c
5317 @SIM_ENABLE_ARCH_m32r_TRUE@     $(AM_V_at)touch $@
5318
5319 @SIM_ENABLE_ARCH_m32r_TRUE@m32r/mloopx.c m32r/engx.h: m32r/stamp-mloop-x ; @true
5320 @SIM_ENABLE_ARCH_m32r_TRUE@m32r/stamp-mloop-x: $(srccom)/genmloop.sh m32r/mloop.in
5321 @SIM_ENABLE_ARCH_m32r_TRUE@     $(AM_V_GEN)$(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \
5322 @SIM_ENABLE_ARCH_m32r_TRUE@             -mono -no-fast -pbb -parallel-write -switch semx-switch.c \
5323 @SIM_ENABLE_ARCH_m32r_TRUE@             -cpu m32rxf \
5324 @SIM_ENABLE_ARCH_m32r_TRUE@             -infile $(srcdir)/m32r/mloopx.in -outfile-prefix m32r/ -outfile-suffix x
5325 @SIM_ENABLE_ARCH_m32r_TRUE@     $(AM_V_at)$(SHELL) $(srcroot)/move-if-change m32r/engx.hin m32r/engx.h
5326 @SIM_ENABLE_ARCH_m32r_TRUE@     $(AM_V_at)$(SHELL) $(srcroot)/move-if-change m32r/mloopx.cin m32r/mloopx.c
5327 @SIM_ENABLE_ARCH_m32r_TRUE@     $(AM_V_at)touch $@
5328
5329 @SIM_ENABLE_ARCH_m32r_TRUE@m32r/mloop2.c m32r/eng2.h: m32r/stamp-mloop-2 ; @true
5330 @SIM_ENABLE_ARCH_m32r_TRUE@m32r/stamp-mloop-2: $(srccom)/genmloop.sh m32r/mloop.in
5331 @SIM_ENABLE_ARCH_m32r_TRUE@     $(AM_V_GEN)$(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \
5332 @SIM_ENABLE_ARCH_m32r_TRUE@             -mono -no-fast -pbb -parallel-write -switch sem2-switch.c \
5333 @SIM_ENABLE_ARCH_m32r_TRUE@             -cpu m32r2f \
5334 @SIM_ENABLE_ARCH_m32r_TRUE@             -infile $(srcdir)/m32r/mloop2.in -outfile-prefix m32r/ -outfile-suffix 2
5335 @SIM_ENABLE_ARCH_m32r_TRUE@     $(AM_V_at)$(SHELL) $(srcroot)/move-if-change m32r/eng2.hin m32r/eng2.h
5336 @SIM_ENABLE_ARCH_m32r_TRUE@     $(AM_V_at)$(SHELL) $(srcroot)/move-if-change m32r/mloop2.cin m32r/mloop2.c
5337 @SIM_ENABLE_ARCH_m32r_TRUE@     $(AM_V_at)touch $@
5338
5339 @SIM_ENABLE_ARCH_m32r_TRUE@m32r/cgen: m32r/cgen-arch m32r/cgen-cpu-decode m32r/cgen-cpu-decode-x m32r/cgen-cpu-decode-2
5340
5341 @SIM_ENABLE_ARCH_m32r_TRUE@m32r/cgen-arch:
5342 @SIM_ENABLE_ARCH_m32r_TRUE@     $(AM_V_GEN)mach=all FLAGS="with-scache with-profile=fn"; $(CGEN_GEN_ARCH)
5343 @SIM_ENABLE_ARCH_m32r_TRUE@m32r/arch.h m32r/arch.c m32r/cpuall.h: @CGEN_MAINT@ m32r/cgen-arch
5344
5345 @SIM_ENABLE_ARCH_m32r_TRUE@m32r/cgen-cpu-decode:
5346 @SIM_ENABLE_ARCH_m32r_TRUE@     $(AM_V_GEN)cpu=m32rbf mach=m32r FLAGS="with-scache with-profile=fn" EXTRAFILES="$(CGEN_CPU_SEM) $(CGEN_CPU_SEMSW)"; $(CGEN_GEN_CPU_DECODE)
5347 @SIM_ENABLE_ARCH_m32r_TRUE@m32r/cpu.h m32r/sem.c m32r/sem-switch.c m32r/model.c m32r/decode.c m32r/decode.h: @CGEN_MAINT@ m32r/cgen-cpu-decode
5348
5349 @SIM_ENABLE_ARCH_m32r_TRUE@m32r/cgen-cpu-decode-x:
5350 @SIM_ENABLE_ARCH_m32r_TRUE@     $(AM_V_GEN)cpu=m32rxf mach=m32rx SUFFIX=x FLAGS="with-scache with-profile=fn" EXTRAFILES="$(CGEN_CPU_SEMSW)"; $(CGEN_GEN_CPU_DECODE)
5351 @SIM_ENABLE_ARCH_m32r_TRUE@m32r/cpux.h m32r/semx-switch.c m32r/modelx.c m32r/decodex.c m32r/decodex.h: @CGEN_MAINT@ m32r/cgen-cpu-decode-x
5352
5353 @SIM_ENABLE_ARCH_m32r_TRUE@m32r/cgen-cpu-decode-2:
5354 @SIM_ENABLE_ARCH_m32r_TRUE@     $(AM_V_GEN)cpu=m32r2f mach=m32r2 SUFFIX=2 FLAGS="with-scache with-profile=fn" EXTRAFILES="$(CGEN_CPU_SEMSW)"; $(CGEN_GEN_CPU_DECODE)
5355 @SIM_ENABLE_ARCH_m32r_TRUE@m32r/cpu2.h m32r/sem2-switch.c m32r/model2.c m32r/decode2.c m32r/decode2.h: @CGEN_MAINT@ m32r/cgen-cpu-decode-2
5356 @SIM_ENABLE_ARCH_m68hc11_TRUE@$(m68hc11_libsim_a_OBJECTS) $(m68hc11_libsim_a_LIBADD): m68hc11/hw-config.h
5357
5358 @SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11/modules.o: m68hc11/modules.c
5359
5360 @SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11/%.o: common/%.c ; $(SIM_COMPILE)
5361 @SIM_ENABLE_ARCH_m68hc11_TRUE@-@am__include@ m68hc11/$(DEPDIR)/*.Po
5362
5363 @SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11/modules.c: | $(m68hc11_BUILD_OUTPUTS)
5364
5365 # These rules are copied from automake, but tweaked to use FOR_BUILD variables.
5366 @SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11/gencode$(EXEEXT): $(m68hc11_gencode_OBJECTS) $(m68hc11_gencode_DEPENDENCIES) m68hc11/$(am__dirstamp)
5367 @SIM_ENABLE_ARCH_m68hc11_TRUE@  $(AM_V_CCLD)$(LINK_FOR_BUILD) $(m68hc11_gencode_OBJECTS) $(m68hc11_gencode_LDADD)
5368
5369 # gencode is a build-time only tool.  Override the default rules for it.
5370 @SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11/gencode.o: m68hc11/gencode.c
5371 @SIM_ENABLE_ARCH_m68hc11_TRUE@  $(AM_V_CC)$(COMPILE_FOR_BUILD) -c $< -o $@
5372
5373 @SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11/m68hc11int.c: m68hc11/gencode$(EXEEXT)
5374 @SIM_ENABLE_ARCH_m68hc11_TRUE@  $(AM_V_GEN)$< -m6811 >$@
5375
5376 @SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11/m68hc12int.c: m68hc11/gencode$(EXEEXT)
5377 @SIM_ENABLE_ARCH_m68hc11_TRUE@  $(AM_V_GEN)$< -m6812 >$@
5378 @SIM_ENABLE_ARCH_mcore_TRUE@$(mcore_libsim_a_OBJECTS) $(mcore_libsim_a_LIBADD): mcore/hw-config.h
5379
5380 @SIM_ENABLE_ARCH_mcore_TRUE@mcore/modules.o: mcore/modules.c
5381
5382 @SIM_ENABLE_ARCH_mcore_TRUE@mcore/%.o: common/%.c ; $(SIM_COMPILE)
5383 @SIM_ENABLE_ARCH_mcore_TRUE@-@am__include@ mcore/$(DEPDIR)/*.Po
5384 @SIM_ENABLE_ARCH_microblaze_TRUE@$(microblaze_libsim_a_OBJECTS) $(microblaze_libsim_a_LIBADD): microblaze/hw-config.h
5385
5386 @SIM_ENABLE_ARCH_microblaze_TRUE@microblaze/modules.o: microblaze/modules.c
5387
5388 @SIM_ENABLE_ARCH_microblaze_TRUE@microblaze/%.o: common/%.c ; $(SIM_COMPILE)
5389 @SIM_ENABLE_ARCH_microblaze_TRUE@-@am__include@ microblaze/$(DEPDIR)/*.Po
5390 @SIM_ENABLE_ARCH_mips_TRUE@$(mips_libsim_a_OBJECTS) $(mips_libsim_a_LIBADD): mips/hw-config.h
5391
5392 @SIM_ENABLE_ARCH_mips_TRUE@mips/modules.o: mips/modules.c
5393
5394 @SIM_ENABLE_ARCH_mips_TRUE@mips/%.o: common/%.c ; $(SIM_COMPILE)
5395 @SIM_ENABLE_ARCH_mips_TRUE@-@am__include@ mips/$(DEPDIR)/*.Po
5396
5397 @SIM_ENABLE_ARCH_mips_TRUE@mips/modules.c: | $(mips_BUILD_OUTPUTS)
5398
5399 @SIM_ENABLE_ARCH_mips_TRUE@$(mips_BUILT_SRC_FROM_IGEN_ITABLE): mips/stamp-igen-itable
5400 @SIM_ENABLE_ARCH_mips_TRUE@$(mips_BUILT_SRC_FROM_GEN_MODE_SINGLE): mips/stamp-gen-mode-single
5401 @SIM_ENABLE_ARCH_mips_TRUE@$(mips_BUILT_SRC_FROM_GEN_MODE_M16_M16): mips/stamp-gen-mode-m16-m16
5402 @SIM_ENABLE_ARCH_mips_TRUE@$(mips_BUILT_SRC_FROM_GEN_MODE_M16_M32): mips/stamp-gen-mode-m16-m32
5403 @SIM_ENABLE_ARCH_mips_TRUE@$(SIM_MIPS_MULTI_SRC): mips/stamp-gen-mode-multi-igen mips/stamp-gen-mode-multi-run
5404
5405 @SIM_ENABLE_ARCH_mips_TRUE@mips/stamp-igen-itable: $(mips_IGEN_INSN) $(mips_IGEN_INSN_INC) $(IGEN)
5406 @SIM_ENABLE_ARCH_mips_TRUE@     $(AM_V_GEN)$(IGEN_RUN) \
5407 @SIM_ENABLE_ARCH_mips_TRUE@             $(mips_IGEN_TRACE) \
5408 @SIM_ENABLE_ARCH_mips_TRUE@             -I $(srcdir)/mips \
5409 @SIM_ENABLE_ARCH_mips_TRUE@             -Werror \
5410 @SIM_ENABLE_ARCH_mips_TRUE@             -Wnodiscard \
5411 @SIM_ENABLE_ARCH_mips_TRUE@             -Wnowidth \
5412 @SIM_ENABLE_ARCH_mips_TRUE@             -Wnounimplemented \
5413 @SIM_ENABLE_ARCH_mips_TRUE@             $(SIM_MIPS_IGEN_ITABLE_FLAGS) \
5414 @SIM_ENABLE_ARCH_mips_TRUE@             -G gen-direct-access \
5415 @SIM_ENABLE_ARCH_mips_TRUE@             -G gen-zero-r0 \
5416 @SIM_ENABLE_ARCH_mips_TRUE@             -i $(mips_IGEN_INSN) \
5417 @SIM_ENABLE_ARCH_mips_TRUE@             -n itable.h    -ht mips/itable.h \
5418 @SIM_ENABLE_ARCH_mips_TRUE@             -n itable.c    -t  mips/itable.c
5419 @SIM_ENABLE_ARCH_mips_TRUE@     $(AM_V_at)touch $@
5420
5421 @SIM_ENABLE_ARCH_mips_TRUE@mips/stamp-gen-mode-single: $(mips_IGEN_INSN) $(mips_IGEN_INSN_INC) $(mips_IGEN_DC) $(IGEN)
5422 @SIM_ENABLE_ARCH_mips_TRUE@     $(AM_V_GEN)$(IGEN_RUN) \
5423 @SIM_ENABLE_ARCH_mips_TRUE@             $(mips_IGEN_TRACE) \
5424 @SIM_ENABLE_ARCH_mips_TRUE@             -I $(srcdir)/mips \
5425 @SIM_ENABLE_ARCH_mips_TRUE@             -Werror \
5426 @SIM_ENABLE_ARCH_mips_TRUE@             -Wnodiscard \
5427 @SIM_ENABLE_ARCH_mips_TRUE@             $(SIM_MIPS_SINGLE_FLAGS) \
5428 @SIM_ENABLE_ARCH_mips_TRUE@             -G gen-direct-access \
5429 @SIM_ENABLE_ARCH_mips_TRUE@             -G gen-zero-r0 \
5430 @SIM_ENABLE_ARCH_mips_TRUE@             -B 32 \
5431 @SIM_ENABLE_ARCH_mips_TRUE@             -H 31 \
5432 @SIM_ENABLE_ARCH_mips_TRUE@             -i $(mips_IGEN_INSN) \
5433 @SIM_ENABLE_ARCH_mips_TRUE@             -o $(mips_IGEN_DC) \
5434 @SIM_ENABLE_ARCH_mips_TRUE@             -x \
5435 @SIM_ENABLE_ARCH_mips_TRUE@             -n icache.h    -hc mips/icache.h \
5436 @SIM_ENABLE_ARCH_mips_TRUE@             -n icache.c    -c  mips/icache.c \
5437 @SIM_ENABLE_ARCH_mips_TRUE@             -n semantics.h -hs mips/semantics.h \
5438 @SIM_ENABLE_ARCH_mips_TRUE@             -n semantics.c -s  mips/semantics.c \
5439 @SIM_ENABLE_ARCH_mips_TRUE@             -n idecode.h   -hd mips/idecode.h \
5440 @SIM_ENABLE_ARCH_mips_TRUE@             -n idecode.c   -d  mips/idecode.c \
5441 @SIM_ENABLE_ARCH_mips_TRUE@             -n model.h     -hm mips/model.h \
5442 @SIM_ENABLE_ARCH_mips_TRUE@             -n model.c     -m  mips/model.c \
5443 @SIM_ENABLE_ARCH_mips_TRUE@             -n support.h   -hf mips/support.h \
5444 @SIM_ENABLE_ARCH_mips_TRUE@             -n support.c   -f  mips/support.c \
5445 @SIM_ENABLE_ARCH_mips_TRUE@             -n engine.h    -he mips/engine.h \
5446 @SIM_ENABLE_ARCH_mips_TRUE@             -n engine.c    -e  mips/engine.c \
5447 @SIM_ENABLE_ARCH_mips_TRUE@             -n irun.c      -r  mips/irun.c
5448 @SIM_ENABLE_ARCH_mips_TRUE@     $(AM_V_at)touch $@
5449
5450 @SIM_ENABLE_ARCH_mips_TRUE@mips/stamp-gen-mode-m16-m16: $(mips_IGEN_INSN) $(mips_IGEN_INSN_INC) $(mips_M16_DC) $(IGEN)
5451 @SIM_ENABLE_ARCH_mips_TRUE@     $(AM_V_GEN)$(IGEN_RUN) \
5452 @SIM_ENABLE_ARCH_mips_TRUE@             $(mips_IGEN_TRACE) \
5453 @SIM_ENABLE_ARCH_mips_TRUE@             -I $(srcdir)/mips \
5454 @SIM_ENABLE_ARCH_mips_TRUE@             -Werror \
5455 @SIM_ENABLE_ARCH_mips_TRUE@             -Wnodiscard \
5456 @SIM_ENABLE_ARCH_mips_TRUE@             $(SIM_MIPS_M16_FLAGS) \
5457 @SIM_ENABLE_ARCH_mips_TRUE@             -G gen-direct-access \
5458 @SIM_ENABLE_ARCH_mips_TRUE@             -G gen-zero-r0 \
5459 @SIM_ENABLE_ARCH_mips_TRUE@             -B 16 \
5460 @SIM_ENABLE_ARCH_mips_TRUE@             -H 15 \
5461 @SIM_ENABLE_ARCH_mips_TRUE@             -i $(mips_IGEN_INSN) \
5462 @SIM_ENABLE_ARCH_mips_TRUE@             -o $(mips_M16_DC) \
5463 @SIM_ENABLE_ARCH_mips_TRUE@             -P m16_ \
5464 @SIM_ENABLE_ARCH_mips_TRUE@             -x \
5465 @SIM_ENABLE_ARCH_mips_TRUE@             -n m16_icache.h    -hc mips/m16_icache.h \
5466 @SIM_ENABLE_ARCH_mips_TRUE@             -n m16_icache.c    -c  mips/m16_icache.c \
5467 @SIM_ENABLE_ARCH_mips_TRUE@             -n m16_semantics.h -hs mips/m16_semantics.h \
5468 @SIM_ENABLE_ARCH_mips_TRUE@             -n m16_semantics.c -s  mips/m16_semantics.c \
5469 @SIM_ENABLE_ARCH_mips_TRUE@             -n m16_idecode.h   -hd mips/m16_idecode.h \
5470 @SIM_ENABLE_ARCH_mips_TRUE@             -n m16_idecode.c   -d  mips/m16_idecode.c \
5471 @SIM_ENABLE_ARCH_mips_TRUE@             -n m16_model.h     -hm mips/m16_model.h \
5472 @SIM_ENABLE_ARCH_mips_TRUE@             -n m16_model.c     -m  mips/m16_model.c \
5473 @SIM_ENABLE_ARCH_mips_TRUE@             -n m16_support.h   -hf mips/m16_support.h \
5474 @SIM_ENABLE_ARCH_mips_TRUE@             -n m16_support.c   -f  mips/m16_support.c
5475 @SIM_ENABLE_ARCH_mips_TRUE@     $(AM_V_at)touch $@
5476
5477 @SIM_ENABLE_ARCH_mips_TRUE@mips/stamp-gen-mode-m16-m32: $(mips_IGEN_INSN) $(mips_IGEN_INSN_INC) $(mips_IGEN_DC) $(IGEN)
5478 @SIM_ENABLE_ARCH_mips_TRUE@     $(AM_V_GEN)$(IGEN_RUN) \
5479 @SIM_ENABLE_ARCH_mips_TRUE@             $(mips_IGEN_TRACE) \
5480 @SIM_ENABLE_ARCH_mips_TRUE@             -I $(srcdir)/mips \
5481 @SIM_ENABLE_ARCH_mips_TRUE@             -Werror \
5482 @SIM_ENABLE_ARCH_mips_TRUE@             -Wnodiscard \
5483 @SIM_ENABLE_ARCH_mips_TRUE@             $(SIM_MIPS_SINGLE_FLAGS) \
5484 @SIM_ENABLE_ARCH_mips_TRUE@             -G gen-direct-access \
5485 @SIM_ENABLE_ARCH_mips_TRUE@             -G gen-zero-r0 \
5486 @SIM_ENABLE_ARCH_mips_TRUE@             -B 32 \
5487 @SIM_ENABLE_ARCH_mips_TRUE@             -H 31 \
5488 @SIM_ENABLE_ARCH_mips_TRUE@             -i $(mips_IGEN_INSN) \
5489 @SIM_ENABLE_ARCH_mips_TRUE@             -o $(mips_IGEN_DC) \
5490 @SIM_ENABLE_ARCH_mips_TRUE@             -P m32_ \
5491 @SIM_ENABLE_ARCH_mips_TRUE@             -x \
5492 @SIM_ENABLE_ARCH_mips_TRUE@             -n m32_icache.h    -hc mips/m32_icache.h \
5493 @SIM_ENABLE_ARCH_mips_TRUE@             -n m32_icache.c    -c  mips/m32_icache.c \
5494 @SIM_ENABLE_ARCH_mips_TRUE@             -n m32_semantics.h -hs mips/m32_semantics.h \
5495 @SIM_ENABLE_ARCH_mips_TRUE@             -n m32_semantics.c -s  mips/m32_semantics.c \
5496 @SIM_ENABLE_ARCH_mips_TRUE@             -n m32_idecode.h   -hd mips/m32_idecode.h \
5497 @SIM_ENABLE_ARCH_mips_TRUE@             -n m32_idecode.c   -d  mips/m32_idecode.c \
5498 @SIM_ENABLE_ARCH_mips_TRUE@             -n m32_model.h     -hm mips/m32_model.h \
5499 @SIM_ENABLE_ARCH_mips_TRUE@             -n m32_model.c     -m  mips/m32_model.c \
5500 @SIM_ENABLE_ARCH_mips_TRUE@             -n m32_support.h   -hf mips/m32_support.h \
5501 @SIM_ENABLE_ARCH_mips_TRUE@             -n m32_support.c   -f  mips/m32_support.c
5502 @SIM_ENABLE_ARCH_mips_TRUE@     $(AM_V_at)touch $@
5503
5504 @SIM_ENABLE_ARCH_mips_TRUE@mips/stamp-gen-mode-multi-igen: $(mips_IGEN_INSN) $(mips_IGEN_INSN_INC) $(mips_IGEN_DC) $(mips_M16_DC) $(mips_MICROMIPS32_DC) $(mips_MICROMIPS16_DC) $(IGEN)
5505 @SIM_ENABLE_ARCH_mips_TRUE@     $(AM_V_GEN)\
5506 @SIM_ENABLE_ARCH_mips_TRUE@     for t in $(SIM_MIPS_MULTI_IGEN_CONFIGS); do \
5507 @SIM_ENABLE_ARCH_mips_TRUE@       p=`echo $${t} | sed -e 's/:.*//'` ; \
5508 @SIM_ENABLE_ARCH_mips_TRUE@       m=`echo $${t} | sed -e 's/.*:\(.*\):.*/\1/'` ; \
5509 @SIM_ENABLE_ARCH_mips_TRUE@       f=`echo $${t} | sed -e 's/.*://'` ; \
5510 @SIM_ENABLE_ARCH_mips_TRUE@       case $${p} in \
5511 @SIM_ENABLE_ARCH_mips_TRUE@         micromips16*) \
5512 @SIM_ENABLE_ARCH_mips_TRUE@           e="-B 16 -H 15 -o $(mips_MICROMIPS16_DC) -F 16" ;; \
5513 @SIM_ENABLE_ARCH_mips_TRUE@         micromips32* | micromips64*) \
5514 @SIM_ENABLE_ARCH_mips_TRUE@           e="-B 32 -H 31 -o $(mips_MICROMIPS32_DC) -F $${f}" ;; \
5515 @SIM_ENABLE_ARCH_mips_TRUE@         micromips_m32*) \
5516 @SIM_ENABLE_ARCH_mips_TRUE@           e="-B 32 -H 31 -o $(mips_IGEN_DC) -F $${f}"; \
5517 @SIM_ENABLE_ARCH_mips_TRUE@           m="mips32r2,mips3d,mdmx,dsp,dsp2,smartmips" ;; \
5518 @SIM_ENABLE_ARCH_mips_TRUE@         micromips_m64*) \
5519 @SIM_ENABLE_ARCH_mips_TRUE@           e="-B 32 -H 31 -o $(mips_IGEN_DC) -F $${f}"; \
5520 @SIM_ENABLE_ARCH_mips_TRUE@           m="mips64r2,mips3d,mdmx,dsp,dsp2,smartmips" ;; \
5521 @SIM_ENABLE_ARCH_mips_TRUE@         m16*) \
5522 @SIM_ENABLE_ARCH_mips_TRUE@           e="-B 16 -H 15 -o $(mips_M16_DC) -F 16" ;; \
5523 @SIM_ENABLE_ARCH_mips_TRUE@         *) \
5524 @SIM_ENABLE_ARCH_mips_TRUE@           e="-B 32 -H 31 -o $(mips_IGEN_DC) -F $${f}" ;; \
5525 @SIM_ENABLE_ARCH_mips_TRUE@       esac; \
5526 @SIM_ENABLE_ARCH_mips_TRUE@       $(IGEN_RUN) \
5527 @SIM_ENABLE_ARCH_mips_TRUE@             $(mips_IGEN_TRACE) \
5528 @SIM_ENABLE_ARCH_mips_TRUE@             $${e} \
5529 @SIM_ENABLE_ARCH_mips_TRUE@             -I $(srcdir)/mips \
5530 @SIM_ENABLE_ARCH_mips_TRUE@             -Werror \
5531 @SIM_ENABLE_ARCH_mips_TRUE@             -Wnodiscard \
5532 @SIM_ENABLE_ARCH_mips_TRUE@             -M $${m} \
5533 @SIM_ENABLE_ARCH_mips_TRUE@             -G gen-direct-access \
5534 @SIM_ENABLE_ARCH_mips_TRUE@             -G gen-zero-r0 \
5535 @SIM_ENABLE_ARCH_mips_TRUE@             -i $(mips_IGEN_INSN) \
5536 @SIM_ENABLE_ARCH_mips_TRUE@             -P $${p}_ \
5537 @SIM_ENABLE_ARCH_mips_TRUE@             -x \
5538 @SIM_ENABLE_ARCH_mips_TRUE@             -n $${p}_icache.h    -hc mips/$${p}_icache.h \
5539 @SIM_ENABLE_ARCH_mips_TRUE@             -n $${p}_icache.c    -c  mips/$${p}_icache.c \
5540 @SIM_ENABLE_ARCH_mips_TRUE@             -n $${p}_semantics.h -hs mips/$${p}_semantics.h \
5541 @SIM_ENABLE_ARCH_mips_TRUE@             -n $${p}_semantics.c -s  mips/$${p}_semantics.c \
5542 @SIM_ENABLE_ARCH_mips_TRUE@             -n $${p}_idecode.h   -hd mips/$${p}_idecode.h \
5543 @SIM_ENABLE_ARCH_mips_TRUE@             -n $${p}_idecode.c   -d  mips/$${p}_idecode.c \
5544 @SIM_ENABLE_ARCH_mips_TRUE@             -n $${p}_model.h     -hm mips/$${p}_model.h \
5545 @SIM_ENABLE_ARCH_mips_TRUE@             -n $${p}_model.c     -m  mips/$${p}_model.c \
5546 @SIM_ENABLE_ARCH_mips_TRUE@             -n $${p}_support.h   -hf mips/$${p}_support.h \
5547 @SIM_ENABLE_ARCH_mips_TRUE@             -n $${p}_support.c   -f  mips/$${p}_support.c \
5548 @SIM_ENABLE_ARCH_mips_TRUE@             -n $${p}_engine.h    -he mips/$${p}_engine.h \
5549 @SIM_ENABLE_ARCH_mips_TRUE@             -n $${p}_engine.c    -e  mips/$${p}_engine.c \
5550 @SIM_ENABLE_ARCH_mips_TRUE@         || exit; \
5551 @SIM_ENABLE_ARCH_mips_TRUE@     done
5552 @SIM_ENABLE_ARCH_mips_TRUE@     $(AM_V_at)touch $@
5553
5554 @SIM_ENABLE_ARCH_mips_TRUE@mips/stamp-gen-mode-multi-run: mips/m16run.c mips/micromipsrun.c
5555 @SIM_ENABLE_ARCH_mips_TRUE@     $(AM_V_GEN)\
5556 @SIM_ENABLE_ARCH_mips_TRUE@     for t in $(SIM_MIPS_MULTI_IGEN_CONFIGS); do \
5557 @SIM_ENABLE_ARCH_mips_TRUE@       case $${t} in \
5558 @SIM_ENABLE_ARCH_mips_TRUE@         m16*) \
5559 @SIM_ENABLE_ARCH_mips_TRUE@           m=`echo $${t} | sed -e 's/^m16//' -e 's/:.*//'`; \
5560 @SIM_ENABLE_ARCH_mips_TRUE@           o=mips/m16$${m}_run.c; \
5561 @SIM_ENABLE_ARCH_mips_TRUE@           sed < $(srcdir)/mips/m16run.c > $$o.tmp \
5562 @SIM_ENABLE_ARCH_mips_TRUE@                 -e "s/^sim_/m16$${m}_/" \
5563 @SIM_ENABLE_ARCH_mips_TRUE@                 -e "/include/s/sim-engine/m16$${m}_engine/" \
5564 @SIM_ENABLE_ARCH_mips_TRUE@                 -e "s/m16_/m16$${m}_/" \
5565 @SIM_ENABLE_ARCH_mips_TRUE@                 -e "s/m32_/m32$${m}_/" \
5566 @SIM_ENABLE_ARCH_mips_TRUE@                 || exit 1; \
5567 @SIM_ENABLE_ARCH_mips_TRUE@           $(SHELL) $(srcroot)/move-if-change $$o.tmp $$o; \
5568 @SIM_ENABLE_ARCH_mips_TRUE@           ;;\
5569 @SIM_ENABLE_ARCH_mips_TRUE@         micromips32*) \
5570 @SIM_ENABLE_ARCH_mips_TRUE@           m=`echo $${t} | sed -e 's/^micromips32//' -e 's/:.*//'`; \
5571 @SIM_ENABLE_ARCH_mips_TRUE@           o=mips/micromips$${m}_run.c; \
5572 @SIM_ENABLE_ARCH_mips_TRUE@           sed < $(srcdir)/mips/micromipsrun.c > $$o.tmp \
5573 @SIM_ENABLE_ARCH_mips_TRUE@                 -e "s/^sim_/micromips32$${m}_/" \
5574 @SIM_ENABLE_ARCH_mips_TRUE@                 -e "/include/s/sim-engine/micromips32$${m}_engine/" \
5575 @SIM_ENABLE_ARCH_mips_TRUE@                 -e "s/micromips16_/micromips16$${m}_/" \
5576 @SIM_ENABLE_ARCH_mips_TRUE@                 -e "s/micromips32_/micromips32$${m}_/" \
5577 @SIM_ENABLE_ARCH_mips_TRUE@                 -e "s/m32_/m32$${m}_/" \
5578 @SIM_ENABLE_ARCH_mips_TRUE@                 || exit 1; \
5579 @SIM_ENABLE_ARCH_mips_TRUE@           $(SHELL) $(srcroot)/move-if-change $$o.tmp $$o; \
5580 @SIM_ENABLE_ARCH_mips_TRUE@           ;;\
5581 @SIM_ENABLE_ARCH_mips_TRUE@         micromips64*) \
5582 @SIM_ENABLE_ARCH_mips_TRUE@           m=`echo $${t} | sed -e 's/^micromips64//' -e 's/:.*//'`; \
5583 @SIM_ENABLE_ARCH_mips_TRUE@           o=mips/micromips$${m}_run.c; \
5584 @SIM_ENABLE_ARCH_mips_TRUE@           sed < $(srcdir)/mips/micromipsrun.c > $$o.tmp \
5585 @SIM_ENABLE_ARCH_mips_TRUE@                 -e "s/^sim_/micromips64$${m}_/" \
5586 @SIM_ENABLE_ARCH_mips_TRUE@                 -e "/include/s/sim-engine/micromips64$${m}_engine/" \
5587 @SIM_ENABLE_ARCH_mips_TRUE@                 -e "s/micromips16_/micromips16$${m}_/" \
5588 @SIM_ENABLE_ARCH_mips_TRUE@                 -e "s/micromips32_/micromips64$${m}_/" \
5589 @SIM_ENABLE_ARCH_mips_TRUE@                 -e "s/m32_/m64$${m}_/" \
5590 @SIM_ENABLE_ARCH_mips_TRUE@                 || exit 1; \
5591 @SIM_ENABLE_ARCH_mips_TRUE@           $(SHELL) $(srcroot)/move-if-change $$o.tmp $$o; \
5592 @SIM_ENABLE_ARCH_mips_TRUE@           ;;\
5593 @SIM_ENABLE_ARCH_mips_TRUE@       esac \
5594 @SIM_ENABLE_ARCH_mips_TRUE@     done
5595 @SIM_ENABLE_ARCH_mips_TRUE@     $(AM_V_at)touch $@
5596 @SIM_ENABLE_ARCH_mn10300_TRUE@$(mn10300_libsim_a_OBJECTS) $(mn10300_libsim_a_LIBADD): mn10300/hw-config.h
5597
5598 @SIM_ENABLE_ARCH_mn10300_TRUE@mn10300/modules.o: mn10300/modules.c
5599
5600 @SIM_ENABLE_ARCH_mn10300_TRUE@mn10300/%.o: common/%.c ; $(SIM_COMPILE)
5601 @SIM_ENABLE_ARCH_mn10300_TRUE@-@am__include@ mn10300/$(DEPDIR)/*.Po
5602
5603 @SIM_ENABLE_ARCH_mn10300_TRUE@mn10300/modules.c: | $(mn10300_BUILD_OUTPUTS)
5604
5605 @SIM_ENABLE_ARCH_mn10300_TRUE@$(mn10300_BUILT_SRC_FROM_IGEN): mn10300/stamp-igen
5606 @SIM_ENABLE_ARCH_mn10300_TRUE@mn10300/stamp-igen: $(mn10300_IGEN_INSN) $(mn10300_IGEN_INSN_INC) $(mn10300_IGEN_DC) $(IGEN)
5607 @SIM_ENABLE_ARCH_mn10300_TRUE@  $(AM_V_GEN)$(IGEN_RUN) \
5608 @SIM_ENABLE_ARCH_mn10300_TRUE@          $(mn10300_IGEN_TRACE) \
5609 @SIM_ENABLE_ARCH_mn10300_TRUE@          -G gen-direct-access \
5610 @SIM_ENABLE_ARCH_mn10300_TRUE@          -M mn10300,am33 -G gen-multi-sim=am33 \
5611 @SIM_ENABLE_ARCH_mn10300_TRUE@          -M am33_2 \
5612 @SIM_ENABLE_ARCH_mn10300_TRUE@          -I $(srcdir)/mn10300 \
5613 @SIM_ENABLE_ARCH_mn10300_TRUE@          -i $(mn10300_IGEN_INSN) \
5614 @SIM_ENABLE_ARCH_mn10300_TRUE@          -o $(mn10300_IGEN_DC) \
5615 @SIM_ENABLE_ARCH_mn10300_TRUE@          -x \
5616 @SIM_ENABLE_ARCH_mn10300_TRUE@          -n icache.h    -hc mn10300/icache.h \
5617 @SIM_ENABLE_ARCH_mn10300_TRUE@          -n icache.c    -c  mn10300/icache.c \
5618 @SIM_ENABLE_ARCH_mn10300_TRUE@          -n semantics.h -hs mn10300/semantics.h \
5619 @SIM_ENABLE_ARCH_mn10300_TRUE@          -n semantics.c -s  mn10300/semantics.c \
5620 @SIM_ENABLE_ARCH_mn10300_TRUE@          -n idecode.h   -hd mn10300/idecode.h \
5621 @SIM_ENABLE_ARCH_mn10300_TRUE@          -n idecode.c   -d  mn10300/idecode.c \
5622 @SIM_ENABLE_ARCH_mn10300_TRUE@          -n model.h     -hm mn10300/model.h \
5623 @SIM_ENABLE_ARCH_mn10300_TRUE@          -n model.c     -m  mn10300/model.c \
5624 @SIM_ENABLE_ARCH_mn10300_TRUE@          -n support.h   -hf mn10300/support.h \
5625 @SIM_ENABLE_ARCH_mn10300_TRUE@          -n support.c   -f  mn10300/support.c \
5626 @SIM_ENABLE_ARCH_mn10300_TRUE@          -n itable.h    -ht mn10300/itable.h \
5627 @SIM_ENABLE_ARCH_mn10300_TRUE@          -n itable.c    -t  mn10300/itable.c \
5628 @SIM_ENABLE_ARCH_mn10300_TRUE@          -n engine.h    -he mn10300/engine.h \
5629 @SIM_ENABLE_ARCH_mn10300_TRUE@          -n engine.c    -e  mn10300/engine.c \
5630 @SIM_ENABLE_ARCH_mn10300_TRUE@          -n irun.c      -r  mn10300/irun.c
5631 @SIM_ENABLE_ARCH_mn10300_TRUE@  $(AM_V_at)touch $@
5632 @SIM_ENABLE_ARCH_moxie_TRUE@$(moxie_libsim_a_OBJECTS) $(moxie_libsim_a_LIBADD): moxie/hw-config.h
5633
5634 @SIM_ENABLE_ARCH_moxie_TRUE@moxie/modules.o: moxie/modules.c
5635
5636 @SIM_ENABLE_ARCH_moxie_TRUE@moxie/%.o: common/%.c ; $(SIM_COMPILE)
5637 @SIM_ENABLE_ARCH_moxie_TRUE@-@am__include@ moxie/$(DEPDIR)/*.Po
5638
5639 @SIM_ENABLE_ARCH_moxie_TRUE@moxie/moxie-gdb.dtb: @MAINT@ moxie/moxie-gdb.dts moxie/$(am__dirstamp)
5640 @SIM_ENABLE_ARCH_moxie_TRUE@    $(AM_V_GEN) \
5641 @SIM_ENABLE_ARCH_moxie_TRUE@    if test "x$(DTC)" != x; then \
5642 @SIM_ENABLE_ARCH_moxie_TRUE@      $(DTC) -O dtb -o $@.tmp ${srcdir}/moxie/moxie-gdb.dts || exit 1; \
5643 @SIM_ENABLE_ARCH_moxie_TRUE@      $(SHELL) $(srcroot)/move-if-change $@.tmp ${srcdir}/moxie/moxie-gdb.dtb || exit 1; \
5644 @SIM_ENABLE_ARCH_moxie_TRUE@      touch ${srcdir}/moxie/moxie-gdb.dtb; \
5645 @SIM_ENABLE_ARCH_moxie_TRUE@    else \
5646 @SIM_ENABLE_ARCH_moxie_TRUE@      echo "Could not update the moxie-gdb.dtb file because the device "; \
5647 @SIM_ENABLE_ARCH_moxie_TRUE@      echo "tree compiler tool (dtc) is missing.  Install the tool to "; \
5648 @SIM_ENABLE_ARCH_moxie_TRUE@      echo "update the device tree blob."; \
5649 @SIM_ENABLE_ARCH_moxie_TRUE@    fi
5650 @SIM_ENABLE_ARCH_msp430_TRUE@$(msp430_libsim_a_OBJECTS) $(msp430_libsim_a_LIBADD): msp430/hw-config.h
5651
5652 @SIM_ENABLE_ARCH_msp430_TRUE@msp430/modules.o: msp430/modules.c
5653
5654 @SIM_ENABLE_ARCH_msp430_TRUE@msp430/%.o: common/%.c ; $(SIM_COMPILE)
5655 @SIM_ENABLE_ARCH_msp430_TRUE@-@am__include@ msp430/$(DEPDIR)/*.Po
5656 @SIM_ENABLE_ARCH_or1k_TRUE@$(or1k_libsim_a_OBJECTS) $(or1k_libsim_a_LIBADD): or1k/hw-config.h
5657
5658 @SIM_ENABLE_ARCH_or1k_TRUE@or1k/modules.o: or1k/modules.c
5659
5660 @SIM_ENABLE_ARCH_or1k_TRUE@or1k/%.o: common/%.c ; $(SIM_COMPILE)
5661 @SIM_ENABLE_ARCH_or1k_TRUE@-@am__include@ or1k/$(DEPDIR)/*.Po
5662
5663 @SIM_ENABLE_ARCH_or1k_TRUE@or1k/modules.c: | $(or1k_BUILD_OUTPUTS)
5664
5665 @SIM_ENABLE_ARCH_or1k_TRUE@or1k/mloop.c or1k/eng.h: or1k/stamp-mloop ; @true
5666 @SIM_ENABLE_ARCH_or1k_TRUE@or1k/stamp-mloop: $(srccom)/genmloop.sh or1k/mloop.in
5667 @SIM_ENABLE_ARCH_or1k_TRUE@     $(AM_V_GEN)$(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \
5668 @SIM_ENABLE_ARCH_or1k_TRUE@             -mono -fast -pbb -switch sem-switch.c \
5669 @SIM_ENABLE_ARCH_or1k_TRUE@             -cpu or1k32bf \
5670 @SIM_ENABLE_ARCH_or1k_TRUE@             -infile $(srcdir)/or1k/mloop.in -outfile-prefix or1k/
5671 @SIM_ENABLE_ARCH_or1k_TRUE@     $(AM_V_at)$(SHELL) $(srcroot)/move-if-change or1k/eng.hin or1k/eng.h
5672 @SIM_ENABLE_ARCH_or1k_TRUE@     $(AM_V_at)$(SHELL) $(srcroot)/move-if-change or1k/mloop.cin or1k/mloop.c
5673 @SIM_ENABLE_ARCH_or1k_TRUE@     $(AM_V_at)touch $@
5674
5675 @SIM_ENABLE_ARCH_or1k_TRUE@or1k/cgen: or1k/cgen-arch or1k/cgen-cpu-decode
5676
5677 @SIM_ENABLE_ARCH_or1k_TRUE@or1k/cgen-arch:
5678 @SIM_ENABLE_ARCH_or1k_TRUE@     $(AM_V_GEN)mach=or32,or32nd FLAGS="with-scache"; $(CGEN_GEN_ARCH)
5679 @SIM_ENABLE_ARCH_or1k_TRUE@or1k/arch.h or1k/arch.c or1k/cpuall.h: @CGEN_MAINT@ or1k/cgen-arch
5680
5681 @SIM_ENABLE_ARCH_or1k_TRUE@or1k/cgen-cpu-decode:
5682 @SIM_ENABLE_ARCH_or1k_TRUE@     $(AM_V_GEN)cpu=or1k32bf mach=or32,or32nd FLAGS="with-scache" EXTRAFILES="$(CGEN_CPU_SEM) $(CGEN_CPU_SEMSW)"; $(CGEN_GEN_CPU_DECODE)
5683 @SIM_ENABLE_ARCH_or1k_TRUE@or1k/cpu.h or1k/cpu.c or1k/model.c or1k/sem.c or1k/sem-switch.c or1k/decode.c or1k/decode.h: @CGEN_MAINT@ or1k/cgen-cpu-decode
5684 @SIM_ENABLE_ARCH_ppc_TRUE@ppc/libsim.a: common/libcommon.a
5685 @SIM_ENABLE_ARCH_ppc_TRUE@      $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
5686
5687 @SIM_ENABLE_ARCH_ppc_TRUE@ppc/%.o: ppc/%.c | ppc/libsim.a $(SIM_ALL_RECURSIVE_DEPS)
5688 @SIM_ENABLE_ARCH_ppc_TRUE@      $(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
5689
5690 @SIM_ENABLE_ARCH_ppc_TRUE@ppc/spreg.c: @MAINT@ ppc/ppc-spr-table ppc/spreg-gen.py ppc/$(am__dirstamp)
5691 @SIM_ENABLE_ARCH_ppc_TRUE@      $(AM_V_GEN)$(srcdir)/ppc/spreg-gen.py --source $@.tmp
5692 @SIM_ENABLE_ARCH_ppc_TRUE@      $(AM_V_at)$(SHELL) $(srcroot)/move-if-change $@.tmp $(srcdir)/ppc/spreg.c
5693 @SIM_ENABLE_ARCH_ppc_TRUE@      $(AM_V_at)touch $(srcdir)/ppc/spreg.c
5694
5695 @SIM_ENABLE_ARCH_ppc_TRUE@ppc/spreg.h: @MAINT@ ppc/ppc-spr-table ppc/spreg-gen.py ppc/$(am__dirstamp)
5696 @SIM_ENABLE_ARCH_ppc_TRUE@      $(AM_V_GEN)$(srcdir)/ppc/spreg-gen.py --header $@.tmp
5697 @SIM_ENABLE_ARCH_ppc_TRUE@      $(AM_V_at)$(SHELL) $(srcroot)/move-if-change $@.tmp $(srcdir)/ppc/spreg.h
5698 @SIM_ENABLE_ARCH_ppc_TRUE@      $(AM_V_at)touch $(srcdir)/ppc/spreg.h
5699 @SIM_ENABLE_ARCH_pru_TRUE@$(pru_libsim_a_OBJECTS) $(pru_libsim_a_LIBADD): pru/hw-config.h
5700
5701 @SIM_ENABLE_ARCH_pru_TRUE@pru/modules.o: pru/modules.c
5702
5703 @SIM_ENABLE_ARCH_pru_TRUE@pru/%.o: common/%.c ; $(SIM_COMPILE)
5704 @SIM_ENABLE_ARCH_pru_TRUE@-@am__include@ pru/$(DEPDIR)/*.Po
5705 @SIM_ENABLE_ARCH_riscv_TRUE@$(riscv_libsim_a_OBJECTS) $(riscv_libsim_a_LIBADD): riscv/hw-config.h
5706
5707 @SIM_ENABLE_ARCH_riscv_TRUE@riscv/modules.o: riscv/modules.c
5708
5709 @SIM_ENABLE_ARCH_riscv_TRUE@riscv/%.o: common/%.c ; $(SIM_COMPILE)
5710 @SIM_ENABLE_ARCH_riscv_TRUE@-@am__include@ riscv/$(DEPDIR)/*.Po
5711 @SIM_ENABLE_ARCH_rl78_TRUE@$(rl78_libsim_a_OBJECTS) $(rl78_libsim_a_LIBADD): rl78/hw-config.h
5712
5713 @SIM_ENABLE_ARCH_rl78_TRUE@rl78/modules.o: rl78/modules.c
5714
5715 @SIM_ENABLE_ARCH_rl78_TRUE@rl78/%.o: common/%.c ; $(SIM_COMPILE)
5716 @SIM_ENABLE_ARCH_rl78_TRUE@-@am__include@ rl78/$(DEPDIR)/*.Po
5717 @SIM_ENABLE_ARCH_rx_TRUE@$(rx_libsim_a_OBJECTS) $(rx_libsim_a_LIBADD): rx/hw-config.h
5718
5719 @SIM_ENABLE_ARCH_rx_TRUE@rx/modules.o: rx/modules.c
5720
5721 @SIM_ENABLE_ARCH_rx_TRUE@rx/%.o: common/%.c ; $(SIM_COMPILE)
5722 @SIM_ENABLE_ARCH_rx_TRUE@-@am__include@ rx/$(DEPDIR)/*.Po
5723 @SIM_ENABLE_ARCH_sh_TRUE@$(sh_libsim_a_OBJECTS) $(sh_libsim_a_LIBADD): sh/hw-config.h
5724
5725 @SIM_ENABLE_ARCH_sh_TRUE@sh/modules.o: sh/modules.c
5726
5727 @SIM_ENABLE_ARCH_sh_TRUE@sh/%.o: common/%.c ; $(SIM_COMPILE)
5728 @SIM_ENABLE_ARCH_sh_TRUE@-@am__include@ sh/$(DEPDIR)/*.Po
5729
5730 @SIM_ENABLE_ARCH_sh_TRUE@sh/modules.c: | $(sh_BUILD_OUTPUTS)
5731
5732 # These rules are copied from automake, but tweaked to use FOR_BUILD variables.
5733 @SIM_ENABLE_ARCH_sh_TRUE@sh/gencode$(EXEEXT): $(sh_gencode_OBJECTS) $(sh_gencode_DEPENDENCIES) sh/$(am__dirstamp)
5734 @SIM_ENABLE_ARCH_sh_TRUE@       $(AM_V_CCLD)$(LINK_FOR_BUILD) $(sh_gencode_OBJECTS) $(sh_gencode_LDADD)
5735
5736 # gencode is a build-time only tool.  Override the default rules for it.
5737 @SIM_ENABLE_ARCH_sh_TRUE@sh/gencode.o: sh/gencode.c
5738 @SIM_ENABLE_ARCH_sh_TRUE@       $(AM_V_CC)$(COMPILE_FOR_BUILD) -c $< -o $@
5739
5740 @SIM_ENABLE_ARCH_sh_TRUE@sh/code.c: sh/gencode$(EXEEXT)
5741 @SIM_ENABLE_ARCH_sh_TRUE@       $(AM_V_GEN)$< -x >$@
5742
5743 @SIM_ENABLE_ARCH_sh_TRUE@sh/ppi.c: sh/gencode$(EXEEXT)
5744 @SIM_ENABLE_ARCH_sh_TRUE@       $(AM_V_GEN)$< -p >$@
5745
5746 @SIM_ENABLE_ARCH_sh_TRUE@sh/table.c: sh/gencode$(EXEEXT)
5747 @SIM_ENABLE_ARCH_sh_TRUE@       $(AM_V_GEN)$< -s >$@
5748 @SIM_ENABLE_ARCH_v850_TRUE@$(v850_libsim_a_OBJECTS) $(v850_libsim_a_LIBADD): v850/hw-config.h
5749
5750 @SIM_ENABLE_ARCH_v850_TRUE@v850/modules.o: v850/modules.c
5751
5752 @SIM_ENABLE_ARCH_v850_TRUE@v850/%.o: common/%.c ; $(SIM_COMPILE)
5753 @SIM_ENABLE_ARCH_v850_TRUE@-@am__include@ v850/$(DEPDIR)/*.Po
5754
5755 @SIM_ENABLE_ARCH_v850_TRUE@v850/modules.c: | $(v850_BUILD_OUTPUTS)
5756
5757 @SIM_ENABLE_ARCH_v850_TRUE@$(v850_BUILT_SRC_FROM_IGEN): v850/stamp-igen
5758 @SIM_ENABLE_ARCH_v850_TRUE@v850/stamp-igen: $(v850_IGEN_INSN) $(v850_IGEN_DC) $(IGEN)
5759 @SIM_ENABLE_ARCH_v850_TRUE@     $(AM_V_GEN)$(IGEN_RUN) \
5760 @SIM_ENABLE_ARCH_v850_TRUE@             $(v850_IGEN_TRACE) \
5761 @SIM_ENABLE_ARCH_v850_TRUE@             -G gen-direct-access \
5762 @SIM_ENABLE_ARCH_v850_TRUE@             -G gen-zero-r0 \
5763 @SIM_ENABLE_ARCH_v850_TRUE@             -i $(v850_IGEN_INSN) \
5764 @SIM_ENABLE_ARCH_v850_TRUE@             -o $(v850_IGEN_DC) \
5765 @SIM_ENABLE_ARCH_v850_TRUE@             -x \
5766 @SIM_ENABLE_ARCH_v850_TRUE@             -n icache.h    -hc v850/icache.h \
5767 @SIM_ENABLE_ARCH_v850_TRUE@             -n icache.c    -c  v850/icache.c \
5768 @SIM_ENABLE_ARCH_v850_TRUE@             -n semantics.h -hs v850/semantics.h \
5769 @SIM_ENABLE_ARCH_v850_TRUE@             -n semantics.c -s  v850/semantics.c \
5770 @SIM_ENABLE_ARCH_v850_TRUE@             -n idecode.h   -hd v850/idecode.h \
5771 @SIM_ENABLE_ARCH_v850_TRUE@             -n idecode.c   -d  v850/idecode.c \
5772 @SIM_ENABLE_ARCH_v850_TRUE@             -n model.h     -hm v850/model.h \
5773 @SIM_ENABLE_ARCH_v850_TRUE@             -n model.c     -m  v850/model.c \
5774 @SIM_ENABLE_ARCH_v850_TRUE@             -n support.h   -hf v850/support.h \
5775 @SIM_ENABLE_ARCH_v850_TRUE@             -n support.c   -f  v850/support.c \
5776 @SIM_ENABLE_ARCH_v850_TRUE@             -n itable.h    -ht v850/itable.h \
5777 @SIM_ENABLE_ARCH_v850_TRUE@             -n itable.c    -t  v850/itable.c \
5778 @SIM_ENABLE_ARCH_v850_TRUE@             -n engine.h    -he v850/engine.h \
5779 @SIM_ENABLE_ARCH_v850_TRUE@             -n engine.c    -e  v850/engine.c \
5780 @SIM_ENABLE_ARCH_v850_TRUE@             -n irun.c      -r  v850/irun.c
5781 @SIM_ENABLE_ARCH_v850_TRUE@     $(AM_V_at)touch $@
5782
5783 all-recursive: $(SIM_ALL_RECURSIVE_DEPS)
5784
5785 install-data-local: installdirs $(SIM_INSTALL_DATA_LOCAL_DEPS)
5786         $(AM_V_at)$(MKDIR_P) $(DESTDIR)$(libdir)
5787         lib=`echo sim | sed '$(program_transform_name)'`; \
5788         for d in $(SIM_ENABLED_ARCHES); do \
5789                 n="$$lib"; \
5790                 [ "$(SIM_PRIMARY_TARGET)" = "$$d" ] || n="$$n-$$d"; \
5791                 n="lib$$n.a"; \
5792                 $(INSTALL_DATA) $$d/libsim.a $(DESTDIR)$(libdir)/$$n || exit 1; \
5793         done
5794
5795 install-exec-local: installdirs $(SIM_INSTALL_EXEC_LOCAL_DEPS)
5796         $(AM_V_at)$(MKDIR_P) $(DESTDIR)$(bindir)
5797         run=`echo run | sed '$(program_transform_name)'`; \
5798         for d in $(SIM_ENABLED_ARCHES); do \
5799                 n="$$run"; \
5800                 [ "$(SIM_PRIMARY_TARGET)" = "$$d" ] || n="$$n-$$d"; \
5801                 $(LIBTOOL) --mode=install \
5802                         $(INSTALL_PROGRAM) $$d/run$(EXEEXT) $(DESTDIR)$(bindir)/$$n$(EXEEXT) || exit 1; \
5803         done
5804
5805 uninstall-local: $(SIM_UNINSTALL_LOCAL_DEPS)
5806         rm -f $(DESTDIR)$(bindir)/run $(DESTDIR)$(libdir)/libsim.a
5807         for d in $(SIM_ENABLED_ARCHES); do \
5808                 rm -f $(DESTDIR)$(bindir)/run-$$d $(DESTDIR)$(libdir)/libsim-$$d.a; \
5809         done
5810
5811 # Tell versions [3.59,3.63) of GNU make to not export all variables.
5812 # Otherwise a system limit (for SysV at least) may be exceeded.
5813 .NOEXPORT: