sim/Makefile.in

   1 # Makefile.in generated by automake 1.15.1 from Makefile.am.
   2 # @configure_input@
   3
   4 # Copyright (C) 1994-2017 Free Software Foundation, Inc.
   5
   6 # This Makefile.in is free software; the Free Software Foundation
   7 # gives unlimited permission to copy and/or distribute it,
   8 # with or without modifications, as long as this notice is preserved.
   9
  10 # This program is distributed in the hope that it will be useful,
  11 # but WITHOUT ANY WARRANTY, to the extent permitted by law; without
  12 # even the implied warranty of MERCHANTABILITY or FITNESS FOR A
  13 # PARTICULAR PURPOSE.
  14
  15 @SET_MAKE@
  16
  17 #   Copyright (C) 1993-2023 Free Software Foundation, Inc.
  18 #
  19 # This program is free software; you can redistribute it and/or modify
  20 # it under the terms of the GNU General Public License as published by
  21 # the Free Software Foundation; either version 3 of the License, or
  22 # (at your option) any later version.
  23 #
  24 # This program is distributed in the hope that it will be useful,
  25 # but WITHOUT ANY WARRANTY; without even the implied warranty of
  26 # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  27 # GNU General Public License for more details.
  28 #
  29 # You should have received a copy of the GNU General Public License
  30 # along with this program.  If not, see <http://www.gnu.org/licenses/>.
  31
  32
  33
  34
  35 VPATH = @srcdir@
  36 am__is_gnu_make = { \
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  47 am__make_running_with_option = \
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  54   has_opt=no; \
  55   sane_makeflags=$$MAKEFLAGS; \
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  66   skip_next=no; \
  67   strip_trailopt () \
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  89 am__make_dryrun = (target_option=n; $(am__make_running_with_option))
  90 am__make_keepgoing = (target_option=k; $(am__make_running_with_option))
  91 pkgdatadir = $(datadir)/@PACKAGE@
  92 pkgincludedir = $(includedir)/@PACKAGE@
  93 pkglibdir = $(libdir)/@PACKAGE@
  94 pkglibexecdir = $(libexecdir)/@PACKAGE@
  95 am__cd = CDPATH="$${ZSH_VERSION+.}$(PATH_SEPARATOR)" && cd
  96 install_sh_DATA = $(install_sh) -c -m 644
  97 install_sh_PROGRAM = $(install_sh) -c
  98 install_sh_SCRIPT = $(install_sh) -c
  99 INSTALL_HEADER = $(INSTALL_DATA)
 100 transform = $(program_transform_name)
 101 NORMAL_INSTALL = :
 102 PRE_INSTALL = :
 103 POST_INSTALL = :
 104 NORMAL_UNINSTALL = :
 105 PRE_UNINSTALL = :
 106 POST_UNINSTALL = :
 107 build_triplet = @build@
 108 host_triplet = @host@
 109 target_triplet = @target@
 110 check_PROGRAMS = $(am__EXEEXT_8) $(am__EXEEXT_9)
 111 noinst_PROGRAMS = $(am__EXEEXT_10) $(am__EXEEXT_11) $(am__EXEEXT_12) \
 112         $(am__EXEEXT_13) $(am__EXEEXT_14) $(am__EXEEXT_15) \
 113         $(am__EXEEXT_16) $(am__EXEEXT_17) $(am__EXEEXT_18) \
 114         $(am__EXEEXT_19) $(am__EXEEXT_20) $(am__EXEEXT_21) \
 115         $(am__EXEEXT_22) $(am__EXEEXT_23) $(am__EXEEXT_24) \
 116         $(am__EXEEXT_25) $(am__EXEEXT_26) $(am__EXEEXT_27) \
 117         $(am__EXEEXT_28) $(am__EXEEXT_29) $(am__EXEEXT_30) \
 118         $(am__EXEEXT_31) $(am__EXEEXT_32) $(am__EXEEXT_33) \
 119         $(am__EXEEXT_34) $(am__EXEEXT_35) $(am__EXEEXT_36) \
 120         $(am__EXEEXT_37) $(am__EXEEXT_38) $(am__EXEEXT_39) \
 121         $(am__EXEEXT_40) $(am__EXEEXT_41)
 122 EXTRA_PROGRAMS = $(am__EXEEXT_2) testsuite/common/bits-gen$(EXEEXT) \
 123         testsuite/common/fpu-tst$(EXEEXT) $(am__EXEEXT_3) \
 124         $(am__EXEEXT_4) $(am__EXEEXT_5) $(am__EXEEXT_6) \
 125         $(am__EXEEXT_7)
 126 @ENABLE_SIM_TRUE@am__append_1 = \
 127 @ENABLE_SIM_TRUE@       $(srcroot)/include/sim/callback.h \
 128 @ENABLE_SIM_TRUE@       $(srcroot)/include/sim/sim.h
 129
 130 @SIM_ENABLE_HW_TRUE@am__append_2 = \
 131 @SIM_ENABLE_HW_TRUE@    $(SIM_COMMON_HW_OBJS) \
 132 @SIM_ENABLE_HW_TRUE@    $(SIM_HW_SOCKSER)
 133
 134 @SIM_ENABLE_HW_TRUE@am__append_3 = SIM_HW_DEVICES_="$(SIM_HW_DEVICES)"
 135 @SIM_ENABLE_IGEN_TRUE@am__append_4 = $(IGEN)
 136 @SIM_ENABLE_IGEN_TRUE@am__append_5 = igen/libigen.a
 137 @SIM_ENABLE_IGEN_TRUE@am__append_6 = $(igen_IGEN_TOOLS)
 138 @SIM_ENABLE_IGEN_TRUE@am__append_7 = $(igen_IGEN_TOOLS)
 139 TESTS = testsuite/common/bits32m0$(EXEEXT) \
 140         testsuite/common/bits32m31$(EXEEXT) \
 141         testsuite/common/bits64m0$(EXEEXT) \
 142         testsuite/common/bits64m63$(EXEEXT) \
 143         testsuite/common/alu-tst$(EXEEXT)
 144 @SIM_ENABLE_ARCH_aarch64_TRUE@am__append_8 = aarch64/libsim.a
 145 @SIM_ENABLE_ARCH_aarch64_TRUE@am__append_9 = aarch64/run
 146 @SIM_ENABLE_ARCH_arm_TRUE@am__append_10 = arm/libsim.a
 147 @SIM_ENABLE_ARCH_arm_TRUE@am__append_11 = arm/run
 148 @SIM_ENABLE_ARCH_avr_TRUE@am__append_12 = avr/libsim.a
 149 @SIM_ENABLE_ARCH_avr_TRUE@am__append_13 = avr/run
 150 @SIM_ENABLE_ARCH_bfin_TRUE@am__append_14 = bfin/libsim.a
 151 @SIM_ENABLE_ARCH_bfin_TRUE@am__append_15 = bfin/run
 152 @SIM_ENABLE_ARCH_bfin_TRUE@am__append_16 = bfin_SIM_EXTRA_HW_DEVICES="$(bfin_SIM_EXTRA_HW_DEVICES)"
 153 @SIM_ENABLE_ARCH_bpf_TRUE@am__append_17 = bpf/libsim.a
 154 @SIM_ENABLE_ARCH_bpf_TRUE@am__append_18 = bpf/run
 155 @SIM_ENABLE_ARCH_bpf_TRUE@am__append_19 = \
 156 @SIM_ENABLE_ARCH_bpf_TRUE@      bpf/eng-le.h \
 157 @SIM_ENABLE_ARCH_bpf_TRUE@      bpf/eng-be.h
 158
 159 @SIM_ENABLE_ARCH_bpf_TRUE@am__append_20 = $(bpf_BUILD_OUTPUTS)
 160 @SIM_ENABLE_ARCH_bpf_TRUE@am__append_21 = $(bpf_BUILD_OUTPUTS)
 161 @SIM_ENABLE_ARCH_cr16_TRUE@am__append_22 = cr16/libsim.a
 162 @SIM_ENABLE_ARCH_cr16_TRUE@am__append_23 = cr16/run
 163 @SIM_ENABLE_ARCH_cr16_TRUE@am__append_24 = cr16/simops.h
 164 @SIM_ENABLE_ARCH_cr16_TRUE@am__append_25 = $(cr16_BUILD_OUTPUTS)
 165 @SIM_ENABLE_ARCH_cr16_TRUE@am__append_26 = cr16/gencode
 166 @SIM_ENABLE_ARCH_cr16_TRUE@am__append_27 = $(cr16_BUILD_OUTPUTS)
 167 @SIM_ENABLE_ARCH_cris_TRUE@am__append_28 = cris/libsim.a
 168 @SIM_ENABLE_ARCH_cris_TRUE@am__append_29 = cris/run
 169 @SIM_ENABLE_ARCH_cris_TRUE@am__append_30 = cris_SIM_EXTRA_HW_DEVICES="$(cris_SIM_EXTRA_HW_DEVICES)"
 170 @SIM_ENABLE_ARCH_cris_TRUE@am__append_31 = cris/rvdummy
 171 @SIM_ENABLE_ARCH_cris_TRUE@am__append_32 = \
 172 @SIM_ENABLE_ARCH_cris_TRUE@     cris/engv10.h \
 173 @SIM_ENABLE_ARCH_cris_TRUE@     cris/engv32.h
 174
 175 @SIM_ENABLE_ARCH_cris_TRUE@am__append_33 = $(cris_BUILD_OUTPUTS)
 176 @SIM_ENABLE_ARCH_cris_TRUE@am__append_34 = $(cris_BUILD_OUTPUTS)
 177 @SIM_ENABLE_ARCH_d10v_TRUE@am__append_35 = d10v/libsim.a
 178 @SIM_ENABLE_ARCH_d10v_TRUE@am__append_36 = d10v/run
 179 @SIM_ENABLE_ARCH_d10v_TRUE@am__append_37 = d10v/simops.h
 180 @SIM_ENABLE_ARCH_d10v_TRUE@am__append_38 = $(d10v_BUILD_OUTPUTS)
 181 @SIM_ENABLE_ARCH_d10v_TRUE@am__append_39 = d10v/gencode
 182 @SIM_ENABLE_ARCH_d10v_TRUE@am__append_40 = $(d10v_BUILD_OUTPUTS)
 183 @SIM_ENABLE_ARCH_erc32_TRUE@am__append_41 = erc32/libsim.a
 184 @SIM_ENABLE_ARCH_erc32_TRUE@am__append_42 = erc32/run erc32/sis
 185 @SIM_ENABLE_ARCH_erc32_TRUE@am__append_43 = sim-%D-install-exec-local
 186 @SIM_ENABLE_ARCH_erc32_TRUE@am__append_44 = sim-erc32-uninstall-local
 187 @SIM_ENABLE_ARCH_examples_TRUE@am__append_45 = example-synacor/libsim.a
 188 @SIM_ENABLE_ARCH_examples_TRUE@am__append_46 = example-synacor/run
 189 @SIM_ENABLE_ARCH_frv_TRUE@am__append_47 = frv/libsim.a
 190 @SIM_ENABLE_ARCH_frv_TRUE@am__append_48 = frv/run
 191 @SIM_ENABLE_ARCH_frv_TRUE@am__append_49 = frv/eng.h
 192 @SIM_ENABLE_ARCH_frv_TRUE@am__append_50 = $(frv_BUILD_OUTPUTS)
 193 @SIM_ENABLE_ARCH_frv_TRUE@am__append_51 = $(frv_BUILD_OUTPUTS)
 194 @SIM_ENABLE_ARCH_ft32_TRUE@am__append_52 = ft32/libsim.a
 195 @SIM_ENABLE_ARCH_ft32_TRUE@am__append_53 = ft32/run
 196 @SIM_ENABLE_ARCH_h8300_TRUE@am__append_54 = h8300/libsim.a
 197 @SIM_ENABLE_ARCH_h8300_TRUE@am__append_55 = h8300/run
 198 @SIM_ENABLE_ARCH_iq2000_TRUE@am__append_56 = iq2000/libsim.a
 199 @SIM_ENABLE_ARCH_iq2000_TRUE@am__append_57 = iq2000/run
 200 @SIM_ENABLE_ARCH_iq2000_TRUE@am__append_58 = iq2000/eng.h
 201 @SIM_ENABLE_ARCH_iq2000_TRUE@am__append_59 = $(iq2000_BUILD_OUTPUTS)
 202 @SIM_ENABLE_ARCH_iq2000_TRUE@am__append_60 = $(iq2000_BUILD_OUTPUTS)
 203 @SIM_ENABLE_ARCH_lm32_TRUE@am__append_61 = lm32/libsim.a
 204 @SIM_ENABLE_ARCH_lm32_TRUE@am__append_62 = lm32/run
 205 @SIM_ENABLE_ARCH_lm32_TRUE@am__append_63 = lm32_SIM_EXTRA_HW_DEVICES="$(lm32_SIM_EXTRA_HW_DEVICES)"
 206 @SIM_ENABLE_ARCH_lm32_TRUE@am__append_64 = lm32/eng.h
 207 @SIM_ENABLE_ARCH_lm32_TRUE@am__append_65 = $(lm32_BUILD_OUTPUTS)
 208 @SIM_ENABLE_ARCH_lm32_TRUE@am__append_66 = $(lm32_BUILD_OUTPUTS)
 209 @SIM_ENABLE_ARCH_m32c_TRUE@am__append_67 = m32c/libsim.a
 210 @SIM_ENABLE_ARCH_m32c_TRUE@am__append_68 = m32c/run
 211 @SIM_ENABLE_ARCH_m32c_TRUE@am__append_69 = $(m32c_BUILD_OUTPUTS)
 212 @SIM_ENABLE_ARCH_m32c_TRUE@am__append_70 = m32c/opc2c
 213 @SIM_ENABLE_ARCH_m32c_TRUE@am__append_71 = \
 214 @SIM_ENABLE_ARCH_m32c_TRUE@     $(m32c_BUILD_OUTPUTS) \
 215 @SIM_ENABLE_ARCH_m32c_TRUE@     m32c/m32c.c.log \
 216 @SIM_ENABLE_ARCH_m32c_TRUE@     m32c/r8c.c.log
 217
 218 @SIM_ENABLE_ARCH_m32r_TRUE@am__append_72 = m32r/libsim.a
 219 @SIM_ENABLE_ARCH_m32r_TRUE@am__append_73 = m32r/run
 220 @SIM_ENABLE_ARCH_m32r_TRUE@am__append_74 = m32r_SIM_EXTRA_HW_DEVICES="$(m32r_SIM_EXTRA_HW_DEVICES)"
 221 @SIM_ENABLE_ARCH_m32r_TRUE@am__append_75 = \
 222 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/eng.h \
 223 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/engx.h \
 224 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/eng2.h
 225
 226 @SIM_ENABLE_ARCH_m32r_TRUE@am__append_76 = $(m32r_BUILD_OUTPUTS)
 227 @SIM_ENABLE_ARCH_m32r_TRUE@am__append_77 = $(m32r_BUILD_OUTPUTS)
 228 @SIM_ENABLE_ARCH_m68hc11_TRUE@am__append_78 = m68hc11/libsim.a
 229 @SIM_ENABLE_ARCH_m68hc11_TRUE@am__append_79 = m68hc11/run
 230 @SIM_ENABLE_ARCH_m68hc11_TRUE@am__append_80 = m68hc11_SIM_EXTRA_HW_DEVICES="$(m68hc11_SIM_EXTRA_HW_DEVICES)"
 231 @SIM_ENABLE_ARCH_m68hc11_TRUE@am__append_81 = $(m68hc11_BUILD_OUTPUTS)
 232 @SIM_ENABLE_ARCH_m68hc11_TRUE@am__append_82 = m68hc11/gencode
 233 @SIM_ENABLE_ARCH_m68hc11_TRUE@am__append_83 = $(m68hc11_BUILD_OUTPUTS)
 234 @SIM_ENABLE_ARCH_mcore_TRUE@am__append_84 = mcore/libsim.a
 235 @SIM_ENABLE_ARCH_mcore_TRUE@am__append_85 = mcore/run
 236 @SIM_ENABLE_ARCH_microblaze_TRUE@am__append_86 = microblaze/libsim.a
 237 @SIM_ENABLE_ARCH_microblaze_TRUE@am__append_87 = microblaze/run
 238 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_SINGLE_TRUE@am__append_88 = \
 239 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_SINGLE_TRUE@      mips/support.o \
 240 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_SINGLE_TRUE@      mips/itable.o \
 241 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_SINGLE_TRUE@      mips/semantics.o \
 242 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_SINGLE_TRUE@      mips/idecode.o \
 243 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_SINGLE_TRUE@      mips/icache.o \
 244 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_SINGLE_TRUE@      mips/engine.o \
 245 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_SINGLE_TRUE@      mips/irun.o
 246
 247 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@am__append_89 = \
 248 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@ mips/m16_support.o \
 249 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@ mips/m16_semantics.o \
 250 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@ mips/m16_idecode.o \
 251 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@ mips/m16_icache.o \
 252 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@ \
 253 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@ mips/m32_support.o \
 254 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@ mips/m32_semantics.o \
 255 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@ mips/m32_idecode.o \
 256 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@ mips/m32_icache.o \
 257 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@ \
 258 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@ mips/itable.o \
 259 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@ mips/m16run.o
 260
 261 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_MULTI_TRUE@am__append_90 = \
 262 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_MULTI_TRUE@       $(SIM_MIPS_MULTI_OBJ) \
 263 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_MULTI_TRUE@       mips/itable.o \
 264 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_MULTI_TRUE@       mips/multi-run.o
 265
 266 @SIM_ENABLE_ARCH_mips_TRUE@am__append_91 = mips/libsim.a
 267 @SIM_ENABLE_ARCH_mips_TRUE@am__append_92 = mips/run
 268 @SIM_ENABLE_ARCH_mips_TRUE@am__append_93 = mips_SIM_EXTRA_HW_DEVICES="$(mips_SIM_EXTRA_HW_DEVICES)"
 269 @SIM_ENABLE_ARCH_mips_TRUE@am__append_94 = mips/itable.h \
 270 @SIM_ENABLE_ARCH_mips_TRUE@     $(SIM_MIPS_MULTI_SRC)
 271 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_SINGLE_TRUE@am__append_95 = \
 272 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_SINGLE_TRUE@      $(mips_BUILT_SRC_FROM_GEN_MODE_SINGLE) \
 273 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_SINGLE_TRUE@      mips/stamp-gen-mode-single
 274
 275 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@am__append_96 = \
 276 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@ $(mips_BUILT_SRC_FROM_GEN_MODE_M16_M16) \
 277 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@ $(mips_BUILT_SRC_FROM_GEN_MODE_M16_M32) \
 278 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@ mips/stamp-gen-mode-m16-m16 \
 279 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@ mips/stamp-gen-mode-m16-m32
 280
 281 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_MULTI_TRUE@am__append_97 = \
 282 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_MULTI_TRUE@       $(SIM_MIPS_MULTI_SRC) \
 283 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_MULTI_TRUE@       mips/stamp-gen-mode-multi-igen \
 284 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_MULTI_TRUE@       mips/stamp-gen-mode-multi-run
 285
 286 @SIM_ENABLE_ARCH_mips_TRUE@am__append_98 = $(mips_BUILD_OUTPUTS)
 287 @SIM_ENABLE_ARCH_mips_TRUE@am__append_99 = $(mips_BUILD_OUTPUTS)
 288 @SIM_ENABLE_ARCH_mips_TRUE@am__append_100 = mips/multi-include.h mips/multi-run.c
 289 @SIM_ENABLE_ARCH_mn10300_TRUE@am__append_101 = mn10300/libsim.a
 290 @SIM_ENABLE_ARCH_mn10300_TRUE@am__append_102 = mn10300/run
 291 @SIM_ENABLE_ARCH_mn10300_TRUE@am__append_103 = mn10300_SIM_EXTRA_HW_DEVICES="$(mn10300_SIM_EXTRA_HW_DEVICES)"
 292 @SIM_ENABLE_ARCH_mn10300_TRUE@am__append_104 = \
 293 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/icache.h \
 294 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/idecode.h \
 295 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/semantics.h \
 296 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/model.h \
 297 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/support.h \
 298 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/itable.h \
 299 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/engine.h
 300
 301 @SIM_ENABLE_ARCH_mn10300_TRUE@am__append_105 = $(mn10300_BUILD_OUTPUTS)
 302 @SIM_ENABLE_ARCH_mn10300_TRUE@am__append_106 = $(mn10300_BUILD_OUTPUTS)
 303 @SIM_ENABLE_ARCH_moxie_TRUE@am__append_107 = moxie/libsim.a
 304 @SIM_ENABLE_ARCH_moxie_TRUE@am__append_108 = moxie/run
 305 @SIM_ENABLE_ARCH_msp430_TRUE@am__append_109 = msp430/libsim.a
 306 @SIM_ENABLE_ARCH_msp430_TRUE@am__append_110 = msp430/run
 307 @SIM_ENABLE_ARCH_or1k_TRUE@am__append_111 = or1k/libsim.a
 308 @SIM_ENABLE_ARCH_or1k_TRUE@am__append_112 = or1k/run
 309 @SIM_ENABLE_ARCH_or1k_TRUE@am__append_113 = or1k/eng.h
 310 @SIM_ENABLE_ARCH_or1k_TRUE@am__append_114 = $(or1k_BUILD_OUTPUTS)
 311 @SIM_ENABLE_ARCH_or1k_TRUE@am__append_115 = $(or1k_BUILD_OUTPUTS)
 312 @SIM_ENABLE_ARCH_ppc_TRUE@am__append_116 = ppc/run ppc/psim
 313 @SIM_ENABLE_ARCH_pru_TRUE@am__append_117 = pru/libsim.a
 314 @SIM_ENABLE_ARCH_pru_TRUE@am__append_118 = pru/run
 315 @SIM_ENABLE_ARCH_riscv_TRUE@am__append_119 = riscv/libsim.a
 316 @SIM_ENABLE_ARCH_riscv_TRUE@am__append_120 = riscv/run
 317 @SIM_ENABLE_ARCH_rl78_TRUE@am__append_121 = rl78/libsim.a
 318 @SIM_ENABLE_ARCH_rl78_TRUE@am__append_122 = rl78/run
 319 @SIM_ENABLE_ARCH_rx_TRUE@am__append_123 = rx/run
 320 @SIM_ENABLE_ARCH_sh_TRUE@am__append_124 = sh/run
 321 @SIM_ENABLE_ARCH_sh_TRUE@am__append_125 = \
 322 @SIM_ENABLE_ARCH_sh_TRUE@       sh/code.c \
 323 @SIM_ENABLE_ARCH_sh_TRUE@       sh/ppi.c
 324
 325 @SIM_ENABLE_ARCH_sh_TRUE@am__append_126 = $(sh_BUILD_OUTPUTS)
 326 @SIM_ENABLE_ARCH_sh_TRUE@am__append_127 = sh/gencode
 327 @SIM_ENABLE_ARCH_sh_TRUE@am__append_128 = $(sh_BUILD_OUTPUTS)
 328 @SIM_ENABLE_ARCH_v850_TRUE@am__append_129 = v850/run
 329 @SIM_ENABLE_ARCH_v850_TRUE@am__append_130 = \
 330 @SIM_ENABLE_ARCH_v850_TRUE@     v850/icache.h \
 331 @SIM_ENABLE_ARCH_v850_TRUE@     v850/idecode.h \
 332 @SIM_ENABLE_ARCH_v850_TRUE@     v850/semantics.h \
 333 @SIM_ENABLE_ARCH_v850_TRUE@     v850/model.h \
 334 @SIM_ENABLE_ARCH_v850_TRUE@     v850/support.h \
 335 @SIM_ENABLE_ARCH_v850_TRUE@     v850/itable.h \
 336 @SIM_ENABLE_ARCH_v850_TRUE@     v850/engine.h
 337
 338 @SIM_ENABLE_ARCH_v850_TRUE@am__append_131 = $(v850_BUILD_OUTPUTS)
 339 @SIM_ENABLE_ARCH_v850_TRUE@am__append_132 = $(v850_BUILD_OUTPUTS)
 340 subdir = .
 341 ACLOCAL_M4 = $(top_srcdir)/aclocal.m4
 342 am__aclocal_m4_deps = $(top_srcdir)/../config/acx.m4 \
 343         $(top_srcdir)/../config/depstand.m4 \
 344         $(top_srcdir)/../config/lead-dot.m4 \
 345         $(top_srcdir)/../config/override.m4 \
 346         $(top_srcdir)/../config/pkg.m4 $(top_srcdir)/../libtool.m4 \
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 648 am_lm32_libsim_a_OBJECTS =
 649 lm32_libsim_a_OBJECTS = $(am_lm32_libsim_a_OBJECTS)
 650 m32c_libsim_a_AR = $(AR) $(ARFLAGS)
 651 @SIM_ENABLE_ARCH_m32c_TRUE@m32c_libsim_a_DEPENDENCIES =  \
 652 @SIM_ENABLE_ARCH_m32c_TRUE@     $(common_libcommon_a_OBJECTS) \
 653 @SIM_ENABLE_ARCH_m32c_TRUE@     m32c/gdb-if.o m32c/int.o \
 654 @SIM_ENABLE_ARCH_m32c_TRUE@     m32c/load.o m32c/m32c.o m32c/mem.o \
 655 @SIM_ENABLE_ARCH_m32c_TRUE@     m32c/misc.o m32c/modules.o \
 656 @SIM_ENABLE_ARCH_m32c_TRUE@     m32c/r8c.o m32c/reg.o \
 657 @SIM_ENABLE_ARCH_m32c_TRUE@     m32c/srcdest.o m32c/syscalls.o \
 658 @SIM_ENABLE_ARCH_m32c_TRUE@     m32c/trace.o
 659 am_m32c_libsim_a_OBJECTS =
 660 m32c_libsim_a_OBJECTS = $(am_m32c_libsim_a_OBJECTS)
 661 m32r_libsim_a_AR = $(AR) $(ARFLAGS)
 662 @SIM_ENABLE_ARCH_m32r_TRUE@m32r_libsim_a_DEPENDENCIES =  \
 663 @SIM_ENABLE_ARCH_m32r_TRUE@     $(common_libcommon_a_OBJECTS) \
 664 @SIM_ENABLE_ARCH_m32r_TRUE@     $(patsubst \
 665 @SIM_ENABLE_ARCH_m32r_TRUE@     %,m32r/%,$(SIM_NEW_COMMON_OBJS)) \
 666 @SIM_ENABLE_ARCH_m32r_TRUE@     $(patsubst \
 667 @SIM_ENABLE_ARCH_m32r_TRUE@     %,m32r/dv-%.o,$(SIM_HW_DEVICES)) \
 668 @SIM_ENABLE_ARCH_m32r_TRUE@     $(patsubst \
 669 @SIM_ENABLE_ARCH_m32r_TRUE@     %,m32r/dv-%.o,$(m32r_SIM_EXTRA_HW_DEVICES)) \
 670 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/modules.o m32r/cgen-run.o \
 671 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/cgen-scache.o \
 672 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/cgen-trace.o m32r/cgen-utils.o \
 673 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/arch.o m32r/m32r.o m32r/cpu.o \
 674 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/decode.o m32r/sem.o \
 675 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/model.o m32r/mloop.o \
 676 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/m32rx.o m32r/cpux.o \
 677 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/decodex.o m32r/modelx.o \
 678 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/mloopx.o m32r/m32r2.o \
 679 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/cpu2.o m32r/decode2.o \
 680 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/model2.o m32r/mloop2.o \
 681 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/sim-if.o m32r/traps.o
 682 am_m32r_libsim_a_OBJECTS =
 683 m32r_libsim_a_OBJECTS = $(am_m32r_libsim_a_OBJECTS)
 684 m68hc11_libsim_a_AR = $(AR) $(ARFLAGS)
 685 @SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11_libsim_a_DEPENDENCIES =  \
 686 @SIM_ENABLE_ARCH_m68hc11_TRUE@  $(common_libcommon_a_OBJECTS) \
 687 @SIM_ENABLE_ARCH_m68hc11_TRUE@  m68hc11/interp.o \
 688 @SIM_ENABLE_ARCH_m68hc11_TRUE@  m68hc11/m68hc11int.o \
 689 @SIM_ENABLE_ARCH_m68hc11_TRUE@  m68hc11/m68hc12int.o \
 690 @SIM_ENABLE_ARCH_m68hc11_TRUE@  m68hc11/emulos.o \
 691 @SIM_ENABLE_ARCH_m68hc11_TRUE@  m68hc11/interrupts.o \
 692 @SIM_ENABLE_ARCH_m68hc11_TRUE@  m68hc11/m68hc11_sim.o $(patsubst \
 693 @SIM_ENABLE_ARCH_m68hc11_TRUE@  %,m68hc11/%,$(SIM_NEW_COMMON_OBJS)) \
 694 @SIM_ENABLE_ARCH_m68hc11_TRUE@  $(patsubst \
 695 @SIM_ENABLE_ARCH_m68hc11_TRUE@  %,m68hc11/dv-%.o,$(SIM_HW_DEVICES)) \
 696 @SIM_ENABLE_ARCH_m68hc11_TRUE@  $(patsubst \
 697 @SIM_ENABLE_ARCH_m68hc11_TRUE@  %,m68hc11/dv-%.o,$(m68hc11_SIM_EXTRA_HW_DEVICES)) \
 698 @SIM_ENABLE_ARCH_m68hc11_TRUE@  m68hc11/modules.o \
 699 @SIM_ENABLE_ARCH_m68hc11_TRUE@  m68hc11/sim-resume.o
 700 am_m68hc11_libsim_a_OBJECTS =
 701 m68hc11_libsim_a_OBJECTS = $(am_m68hc11_libsim_a_OBJECTS)
 702 mcore_libsim_a_AR = $(AR) $(ARFLAGS)
 703 @SIM_ENABLE_ARCH_mcore_TRUE@mcore_libsim_a_DEPENDENCIES =  \
 704 @SIM_ENABLE_ARCH_mcore_TRUE@    $(common_libcommon_a_OBJECTS) \
 705 @SIM_ENABLE_ARCH_mcore_TRUE@    mcore/interp.o $(patsubst \
 706 @SIM_ENABLE_ARCH_mcore_TRUE@    %,mcore/%,$(SIM_NEW_COMMON_OBJS)) \
 707 @SIM_ENABLE_ARCH_mcore_TRUE@    $(patsubst \
 708 @SIM_ENABLE_ARCH_mcore_TRUE@    %,mcore/dv-%.o,$(SIM_HW_DEVICES)) \
 709 @SIM_ENABLE_ARCH_mcore_TRUE@    mcore/modules.o mcore/sim-resume.o
 710 am_mcore_libsim_a_OBJECTS =
 711 mcore_libsim_a_OBJECTS = $(am_mcore_libsim_a_OBJECTS)
 712 microblaze_libsim_a_AR = $(AR) $(ARFLAGS)
 713 @SIM_ENABLE_ARCH_microblaze_TRUE@microblaze_libsim_a_DEPENDENCIES = $(common_libcommon_a_OBJECTS) \
 714 @SIM_ENABLE_ARCH_microblaze_TRUE@       microblaze/interp.o \
 715 @SIM_ENABLE_ARCH_microblaze_TRUE@       $(patsubst \
 716 @SIM_ENABLE_ARCH_microblaze_TRUE@       %,microblaze/%,$(SIM_NEW_COMMON_OBJS)) \
 717 @SIM_ENABLE_ARCH_microblaze_TRUE@       $(patsubst \
 718 @SIM_ENABLE_ARCH_microblaze_TRUE@       %,microblaze/dv-%.o,$(SIM_HW_DEVICES)) \
 719 @SIM_ENABLE_ARCH_microblaze_TRUE@       microblaze/modules.o \
 720 @SIM_ENABLE_ARCH_microblaze_TRUE@       microblaze/sim-resume.o
 721 am_microblaze_libsim_a_OBJECTS =
 722 microblaze_libsim_a_OBJECTS = $(am_microblaze_libsim_a_OBJECTS)
 723 mips_libsim_a_AR = $(AR) $(ARFLAGS)
 724 am__DEPENDENCIES_1 =
 725 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_MULTI_TRUE@am__DEPENDENCIES_2 = $(am__DEPENDENCIES_1) \
 726 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_MULTI_TRUE@       mips/itable.o \
 727 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_MULTI_TRUE@       mips/multi-run.o
 728 @SIM_ENABLE_ARCH_mips_TRUE@am__DEPENDENCIES_3 = $(am__append_88) \
 729 @SIM_ENABLE_ARCH_mips_TRUE@     $(am__append_89) \
 730 @SIM_ENABLE_ARCH_mips_TRUE@     $(am__DEPENDENCIES_2)
 731 @SIM_ENABLE_ARCH_mips_TRUE@mips_libsim_a_DEPENDENCIES =  \
 732 @SIM_ENABLE_ARCH_mips_TRUE@     $(common_libcommon_a_OBJECTS) \
 733 @SIM_ENABLE_ARCH_mips_TRUE@     mips/interp.o $(am__DEPENDENCIES_3) \
 734 @SIM_ENABLE_ARCH_mips_TRUE@     $(patsubst \
 735 @SIM_ENABLE_ARCH_mips_TRUE@     %,mips/%,$(SIM_NEW_COMMON_OBJS)) \
 736 @SIM_ENABLE_ARCH_mips_TRUE@     $(patsubst \
 737 @SIM_ENABLE_ARCH_mips_TRUE@     %,mips/dv-%.o,$(SIM_HW_DEVICES)) \
 738 @SIM_ENABLE_ARCH_mips_TRUE@     $(patsubst \
 739 @SIM_ENABLE_ARCH_mips_TRUE@     %,mips/dv-%.o,$(mips_SIM_EXTRA_HW_DEVICES)) \
 740 @SIM_ENABLE_ARCH_mips_TRUE@     mips/cp1.o mips/dsp.o mips/mdmx.o \
 741 @SIM_ENABLE_ARCH_mips_TRUE@     mips/modules.o mips/sim-main.o \
 742 @SIM_ENABLE_ARCH_mips_TRUE@     mips/sim-resume.o
 743 am_mips_libsim_a_OBJECTS =
 744 mips_libsim_a_OBJECTS = $(am_mips_libsim_a_OBJECTS)
 745 mn10300_libsim_a_AR = $(AR) $(ARFLAGS)
 746 @SIM_ENABLE_ARCH_mn10300_TRUE@mn10300_libsim_a_DEPENDENCIES =  \
 747 @SIM_ENABLE_ARCH_mn10300_TRUE@  $(common_libcommon_a_OBJECTS) \
 748 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/itable.o \
 749 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/semantics.o \
 750 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/idecode.o \
 751 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/icache.o \
 752 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/engine.o mn10300/irun.o \
 753 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/support.o $(patsubst \
 754 @SIM_ENABLE_ARCH_mn10300_TRUE@  %,mn10300/%,$(SIM_NEW_COMMON_OBJS)) \
 755 @SIM_ENABLE_ARCH_mn10300_TRUE@  $(patsubst \
 756 @SIM_ENABLE_ARCH_mn10300_TRUE@  %,mn10300/dv-%.o,$(SIM_HW_DEVICES)) \
 757 @SIM_ENABLE_ARCH_mn10300_TRUE@  $(patsubst \
 758 @SIM_ENABLE_ARCH_mn10300_TRUE@  %,mn10300/dv-%.o,$(mn10300_SIM_EXTRA_HW_DEVICES)) \
 759 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/interp.o \
 760 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/modules.o \
 761 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/op_utils.o \
 762 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/sim-resume.o
 763 am_mn10300_libsim_a_OBJECTS =
 764 mn10300_libsim_a_OBJECTS = $(am_mn10300_libsim_a_OBJECTS)
 765 moxie_libsim_a_AR = $(AR) $(ARFLAGS)
 766 @SIM_ENABLE_ARCH_moxie_TRUE@moxie_libsim_a_DEPENDENCIES =  \
 767 @SIM_ENABLE_ARCH_moxie_TRUE@    $(common_libcommon_a_OBJECTS) \
 768 @SIM_ENABLE_ARCH_moxie_TRUE@    $(patsubst \
 769 @SIM_ENABLE_ARCH_moxie_TRUE@    %,moxie/%,$(SIM_NEW_COMMON_OBJS)) \
 770 @SIM_ENABLE_ARCH_moxie_TRUE@    $(patsubst \
 771 @SIM_ENABLE_ARCH_moxie_TRUE@    %,moxie/dv-%.o,$(SIM_HW_DEVICES)) \
 772 @SIM_ENABLE_ARCH_moxie_TRUE@    moxie/interp.o moxie/modules.o \
 773 @SIM_ENABLE_ARCH_moxie_TRUE@    moxie/sim-resume.o
 774 am_moxie_libsim_a_OBJECTS =
 775 moxie_libsim_a_OBJECTS = $(am_moxie_libsim_a_OBJECTS)
 776 msp430_libsim_a_AR = $(AR) $(ARFLAGS)
 777 @SIM_ENABLE_ARCH_msp430_TRUE@msp430_libsim_a_DEPENDENCIES =  \
 778 @SIM_ENABLE_ARCH_msp430_TRUE@   $(common_libcommon_a_OBJECTS) \
 779 @SIM_ENABLE_ARCH_msp430_TRUE@   $(patsubst \
 780 @SIM_ENABLE_ARCH_msp430_TRUE@   %,msp430/%,$(SIM_NEW_COMMON_OBJS)) \
 781 @SIM_ENABLE_ARCH_msp430_TRUE@   $(patsubst \
 782 @SIM_ENABLE_ARCH_msp430_TRUE@   %,msp430/dv-%.o,$(SIM_HW_DEVICES)) \
 783 @SIM_ENABLE_ARCH_msp430_TRUE@   msp430/msp430-sim.o \
 784 @SIM_ENABLE_ARCH_msp430_TRUE@   msp430/modules.o \
 785 @SIM_ENABLE_ARCH_msp430_TRUE@   msp430/sim-resume.o
 786 am_msp430_libsim_a_OBJECTS =
 787 msp430_libsim_a_OBJECTS = $(am_msp430_libsim_a_OBJECTS)
 788 or1k_libsim_a_AR = $(AR) $(ARFLAGS)
 789 @SIM_ENABLE_ARCH_or1k_TRUE@or1k_libsim_a_DEPENDENCIES =  \
 790 @SIM_ENABLE_ARCH_or1k_TRUE@     $(common_libcommon_a_OBJECTS) \
 791 @SIM_ENABLE_ARCH_or1k_TRUE@     $(patsubst \
 792 @SIM_ENABLE_ARCH_or1k_TRUE@     %,or1k/%,$(SIM_NEW_COMMON_OBJS)) \
 793 @SIM_ENABLE_ARCH_or1k_TRUE@     $(patsubst \
 794 @SIM_ENABLE_ARCH_or1k_TRUE@     %,or1k/dv-%.o,$(SIM_HW_DEVICES)) \
 795 @SIM_ENABLE_ARCH_or1k_TRUE@     or1k/modules.o or1k/cgen-accfp.o \
 796 @SIM_ENABLE_ARCH_or1k_TRUE@     or1k/cgen-fpu.o or1k/cgen-run.o \
 797 @SIM_ENABLE_ARCH_or1k_TRUE@     or1k/cgen-scache.o \
 798 @SIM_ENABLE_ARCH_or1k_TRUE@     or1k/cgen-trace.o or1k/cgen-utils.o \
 799 @SIM_ENABLE_ARCH_or1k_TRUE@     or1k/arch.o or1k/cpu.o \
 800 @SIM_ENABLE_ARCH_or1k_TRUE@     or1k/decode.o or1k/mloop.o \
 801 @SIM_ENABLE_ARCH_or1k_TRUE@     or1k/model.o or1k/sem.o or1k/or1k.o \
 802 @SIM_ENABLE_ARCH_or1k_TRUE@     or1k/sim-if.o or1k/traps.o
 803 am_or1k_libsim_a_OBJECTS =
 804 or1k_libsim_a_OBJECTS = $(am_or1k_libsim_a_OBJECTS)
 805 pru_libsim_a_AR = $(AR) $(ARFLAGS)
 806 @SIM_ENABLE_ARCH_pru_TRUE@pru_libsim_a_DEPENDENCIES =  \
 807 @SIM_ENABLE_ARCH_pru_TRUE@      $(common_libcommon_a_OBJECTS) \
 808 @SIM_ENABLE_ARCH_pru_TRUE@      $(patsubst \
 809 @SIM_ENABLE_ARCH_pru_TRUE@      %,pru/%,$(SIM_NEW_COMMON_OBJS)) \
 810 @SIM_ENABLE_ARCH_pru_TRUE@      $(patsubst \
 811 @SIM_ENABLE_ARCH_pru_TRUE@      %,pru/dv-%.o,$(SIM_HW_DEVICES)) \
 812 @SIM_ENABLE_ARCH_pru_TRUE@      pru/interp.o pru/modules.o \
 813 @SIM_ENABLE_ARCH_pru_TRUE@      pru/sim-resume.o
 814 am_pru_libsim_a_OBJECTS =
 815 pru_libsim_a_OBJECTS = $(am_pru_libsim_a_OBJECTS)
 816 riscv_libsim_a_AR = $(AR) $(ARFLAGS)
 817 @SIM_ENABLE_ARCH_riscv_TRUE@riscv_libsim_a_DEPENDENCIES =  \
 818 @SIM_ENABLE_ARCH_riscv_TRUE@    $(common_libcommon_a_OBJECTS) \
 819 @SIM_ENABLE_ARCH_riscv_TRUE@    $(patsubst \
 820 @SIM_ENABLE_ARCH_riscv_TRUE@    %,riscv/%,$(SIM_NEW_COMMON_OBJS)) \
 821 @SIM_ENABLE_ARCH_riscv_TRUE@    $(patsubst \
 822 @SIM_ENABLE_ARCH_riscv_TRUE@    %,riscv/dv-%.o,$(SIM_HW_DEVICES)) \
 823 @SIM_ENABLE_ARCH_riscv_TRUE@    riscv/interp.o riscv/machs.o \
 824 @SIM_ENABLE_ARCH_riscv_TRUE@    riscv/modules.o riscv/sim-main.o \
 825 @SIM_ENABLE_ARCH_riscv_TRUE@    riscv/sim-resume.o
 826 am_riscv_libsim_a_OBJECTS =
 827 riscv_libsim_a_OBJECTS = $(am_riscv_libsim_a_OBJECTS)
 828 rl78_libsim_a_AR = $(AR) $(ARFLAGS)
 829 @SIM_ENABLE_ARCH_rl78_TRUE@rl78_libsim_a_DEPENDENCIES =  \
 830 @SIM_ENABLE_ARCH_rl78_TRUE@     $(common_libcommon_a_OBJECTS) \
 831 @SIM_ENABLE_ARCH_rl78_TRUE@     rl78/load.o rl78/mem.o rl78/cpu.o \
 832 @SIM_ENABLE_ARCH_rl78_TRUE@     rl78/rl78.o rl78/gdb-if.o \
 833 @SIM_ENABLE_ARCH_rl78_TRUE@     rl78/modules.o rl78/trace.o
 834 am_rl78_libsim_a_OBJECTS =
 835 rl78_libsim_a_OBJECTS = $(am_rl78_libsim_a_OBJECTS)
 836 @SIM_ENABLE_IGEN_TRUE@am__EXEEXT_1 = $(IGEN) igen/filter$(EXEEXT) \
 837 @SIM_ENABLE_IGEN_TRUE@  igen/gen$(EXEEXT) igen/ld-cache$(EXEEXT) \
 838 @SIM_ENABLE_IGEN_TRUE@  igen/ld-decode$(EXEEXT) \
 839 @SIM_ENABLE_IGEN_TRUE@  igen/ld-insn$(EXEEXT) \
 840 @SIM_ENABLE_IGEN_TRUE@  igen/table$(EXEEXT)
 841 @SIM_ENABLE_IGEN_TRUE@am__EXEEXT_2 = $(am__EXEEXT_1)
 842 @SIM_ENABLE_ARCH_cr16_TRUE@am__EXEEXT_3 = cr16/gencode$(EXEEXT)
 843 @SIM_ENABLE_ARCH_d10v_TRUE@am__EXEEXT_4 = d10v/gencode$(EXEEXT)
 844 @SIM_ENABLE_ARCH_m32c_TRUE@am__EXEEXT_5 = m32c/opc2c$(EXEEXT)
 845 @SIM_ENABLE_ARCH_m68hc11_TRUE@am__EXEEXT_6 = m68hc11/gencode$(EXEEXT)
 846 @SIM_ENABLE_ARCH_sh_TRUE@am__EXEEXT_7 = sh/gencode$(EXEEXT)
 847 am__EXEEXT_8 = testsuite/common/bits32m0$(EXEEXT) \
 848         testsuite/common/bits32m31$(EXEEXT) \
 849         testsuite/common/bits64m0$(EXEEXT) \
 850         testsuite/common/bits64m63$(EXEEXT) \
 851         testsuite/common/alu-tst$(EXEEXT)
 852 @SIM_ENABLE_ARCH_cris_TRUE@am__EXEEXT_9 = cris/rvdummy$(EXEEXT)
 853 @SIM_ENABLE_ARCH_aarch64_TRUE@am__EXEEXT_10 = aarch64/run$(EXEEXT)
 854 @SIM_ENABLE_ARCH_arm_TRUE@am__EXEEXT_11 = arm/run$(EXEEXT)
 855 @SIM_ENABLE_ARCH_avr_TRUE@am__EXEEXT_12 = avr/run$(EXEEXT)
 856 @SIM_ENABLE_ARCH_bfin_TRUE@am__EXEEXT_13 = bfin/run$(EXEEXT)
 857 @SIM_ENABLE_ARCH_bpf_TRUE@am__EXEEXT_14 = bpf/run$(EXEEXT)
 858 @SIM_ENABLE_ARCH_cr16_TRUE@am__EXEEXT_15 = cr16/run$(EXEEXT)
 859 @SIM_ENABLE_ARCH_cris_TRUE@am__EXEEXT_16 = cris/run$(EXEEXT)
 860 @SIM_ENABLE_ARCH_d10v_TRUE@am__EXEEXT_17 = d10v/run$(EXEEXT)
 861 @SIM_ENABLE_ARCH_erc32_TRUE@am__EXEEXT_18 = erc32/run$(EXEEXT) \
 862 @SIM_ENABLE_ARCH_erc32_TRUE@    erc32/sis$(EXEEXT)
 863 @SIM_ENABLE_ARCH_examples_TRUE@am__EXEEXT_19 =  \
 864 @SIM_ENABLE_ARCH_examples_TRUE@ example-synacor/run$(EXEEXT)
 865 @SIM_ENABLE_ARCH_frv_TRUE@am__EXEEXT_20 = frv/run$(EXEEXT)
 866 @SIM_ENABLE_ARCH_ft32_TRUE@am__EXEEXT_21 = ft32/run$(EXEEXT)
 867 @SIM_ENABLE_ARCH_h8300_TRUE@am__EXEEXT_22 = h8300/run$(EXEEXT)
 868 @SIM_ENABLE_ARCH_iq2000_TRUE@am__EXEEXT_23 = iq2000/run$(EXEEXT)
 869 @SIM_ENABLE_ARCH_lm32_TRUE@am__EXEEXT_24 = lm32/run$(EXEEXT)
 870 @SIM_ENABLE_ARCH_m32c_TRUE@am__EXEEXT_25 = m32c/run$(EXEEXT)
 871 @SIM_ENABLE_ARCH_m32r_TRUE@am__EXEEXT_26 = m32r/run$(EXEEXT)
 872 @SIM_ENABLE_ARCH_m68hc11_TRUE@am__EXEEXT_27 = m68hc11/run$(EXEEXT)
 873 @SIM_ENABLE_ARCH_mcore_TRUE@am__EXEEXT_28 = mcore/run$(EXEEXT)
 874 @SIM_ENABLE_ARCH_microblaze_TRUE@am__EXEEXT_29 =  \
 875 @SIM_ENABLE_ARCH_microblaze_TRUE@       microblaze/run$(EXEEXT)
 876 @SIM_ENABLE_ARCH_mips_TRUE@am__EXEEXT_30 = mips/run$(EXEEXT)
 877 @SIM_ENABLE_ARCH_mn10300_TRUE@am__EXEEXT_31 = mn10300/run$(EXEEXT)
 878 @SIM_ENABLE_ARCH_moxie_TRUE@am__EXEEXT_32 = moxie/run$(EXEEXT)
 879 @SIM_ENABLE_ARCH_msp430_TRUE@am__EXEEXT_33 = msp430/run$(EXEEXT)
 880 @SIM_ENABLE_ARCH_or1k_TRUE@am__EXEEXT_34 = or1k/run$(EXEEXT)
 881 @SIM_ENABLE_ARCH_ppc_TRUE@am__EXEEXT_35 = ppc/run$(EXEEXT) \
 882 @SIM_ENABLE_ARCH_ppc_TRUE@      ppc/psim$(EXEEXT)
 883 @SIM_ENABLE_ARCH_pru_TRUE@am__EXEEXT_36 = pru/run$(EXEEXT)
 884 @SIM_ENABLE_ARCH_riscv_TRUE@am__EXEEXT_37 = riscv/run$(EXEEXT)
 885 @SIM_ENABLE_ARCH_rl78_TRUE@am__EXEEXT_38 = rl78/run$(EXEEXT)
 886 @SIM_ENABLE_ARCH_rx_TRUE@am__EXEEXT_39 = rx/run$(EXEEXT)
 887 @SIM_ENABLE_ARCH_sh_TRUE@am__EXEEXT_40 = sh/run$(EXEEXT)
 888 @SIM_ENABLE_ARCH_v850_TRUE@am__EXEEXT_41 = v850/run$(EXEEXT)
 889 PROGRAMS = $(noinst_PROGRAMS)
 890 am_aarch64_run_OBJECTS =
 891 aarch64_run_OBJECTS = $(am_aarch64_run_OBJECTS)
 892 am__DEPENDENCIES_4 = $(BFD_LIB) $(OPCODES_LIB) $(LIBIBERTY_LIB)
 893 @SIM_ENABLE_ARCH_aarch64_TRUE@aarch64_run_DEPENDENCIES =  \
 894 @SIM_ENABLE_ARCH_aarch64_TRUE@  aarch64/nrun.o aarch64/libsim.a \
 895 @SIM_ENABLE_ARCH_aarch64_TRUE@  $(am__DEPENDENCIES_4)
 896 AM_V_lt = $(am__v_lt_@AM_V@)
 897 am__v_lt_ = $(am__v_lt_@AM_DEFAULT_V@)
 898 am__v_lt_0 = --silent
 899 am__v_lt_1 =
 900 am_arm_run_OBJECTS =
 901 arm_run_OBJECTS = $(am_arm_run_OBJECTS)
 902 @SIM_ENABLE_ARCH_arm_TRUE@arm_run_DEPENDENCIES = arm/nrun.o \
 903 @SIM_ENABLE_ARCH_arm_TRUE@      arm/libsim.a $(am__DEPENDENCIES_4)
 904 am_avr_run_OBJECTS =
 905 avr_run_OBJECTS = $(am_avr_run_OBJECTS)
 906 @SIM_ENABLE_ARCH_avr_TRUE@avr_run_DEPENDENCIES = avr/nrun.o \
 907 @SIM_ENABLE_ARCH_avr_TRUE@      avr/libsim.a $(am__DEPENDENCIES_4)
 908 am_bfin_run_OBJECTS =
 909 bfin_run_OBJECTS = $(am_bfin_run_OBJECTS)
 910 @SIM_ENABLE_ARCH_bfin_TRUE@bfin_run_DEPENDENCIES = bfin/nrun.o \
 911 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin/libsim.a $(am__DEPENDENCIES_4)
 912 am_bpf_run_OBJECTS =
 913 bpf_run_OBJECTS = $(am_bpf_run_OBJECTS)
 914 @SIM_ENABLE_ARCH_bpf_TRUE@bpf_run_DEPENDENCIES = bpf/nrun.o \
 915 @SIM_ENABLE_ARCH_bpf_TRUE@      bpf/libsim.a $(am__DEPENDENCIES_4)
 916 @SIM_ENABLE_ARCH_cr16_TRUE@am_cr16_gencode_OBJECTS =  \
 917 @SIM_ENABLE_ARCH_cr16_TRUE@     cr16/gencode.$(OBJEXT)
 918 cr16_gencode_OBJECTS = $(am_cr16_gencode_OBJECTS)
 919 @SIM_ENABLE_ARCH_cr16_TRUE@cr16_gencode_DEPENDENCIES =  \
 920 @SIM_ENABLE_ARCH_cr16_TRUE@     cr16/cr16-opc.o
 921 am_cr16_run_OBJECTS =
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1246 RECURSIVE_CLEAN_TARGETS = mostlyclean-recursive clean-recursive \
1247   distclean-recursive maintainer-clean-recursive
1248 am__recursive_targets = \
1249   $(RECURSIVE_TARGETS) \
1250   $(RECURSIVE_CLEAN_TARGETS) \
1251   $(am__extra_recursive_targets)
1252 AM_RECURSIVE_TARGETS = $(am__recursive_targets:-recursive=) TAGS CTAGS \
1253         cscope check recheck
1254 am__tagged_files = $(HEADERS) $(SOURCES) $(TAGS_FILES) \
1255         $(LISP)config.h.in
1256 # Read a list of newline-separated strings from the standard input,
1257 # and print each of them once, without duplicates.  Input order is
1258 # *not* preserved.
1259 am__uniquify_input = $(AWK) '\
1260   BEGIN { nonempty = 0; } \
1261   { items[$$0] = 1; nonempty = 1; } \
1262   END { if (nonempty) { for (i in items) print i; }; } \
1263 '
1264 # Make sure the list of sources is unique.  This is necessary because,
1265 # e.g., the same source file might be shared among _SOURCES variables
1266 # for different programs/libraries.
1267 am__define_uniq_tagged_files = \
1268   list='$(am__tagged_files)'; \
1269   unique=`for i in $$list; do \
1270     if test -f "$$i"; then echo $$i; else echo $(srcdir)/$$i; fi; \
1271   done | $(am__uniquify_input)`
1272 ETAGS = etags
1273 CTAGS = ctags
1274 CSCOPE = cscope
1275 DEJATOOL = $(PACKAGE)
1276 RUNTESTDEFAULTFLAGS = --tool $$tool --srcdir $$srcdir
1277 EXPECT = expect
1278 RUNTEST = runtest
1279 am__tty_colors_dummy = \
1280   mgn= red= grn= lgn= blu= brg= std=; \
1281   am__color_tests=no
1282 am__tty_colors = { \
1283   $(am__tty_colors_dummy); \
1284   if test "X$(AM_COLOR_TESTS)" = Xno; then \
1285     am__color_tests=no; \
1286   elif test "X$(AM_COLOR_TESTS)" = Xalways; then \
1287     am__color_tests=yes; \
1288   elif test "X$$TERM" != Xdumb && { test -t 1; } 2>/dev/null; then \
1289     am__color_tests=yes; \
1290   fi; \
1291   if test $$am__color_tests = yes; then \
1292     red='\e[0;31m'; \
1293     grn='\e[0;32m'; \
1294     lgn='\e[1;32m'; \
1295     blu='\e[1;34m'; \
1296     mgn='\e[0;35m'; \
1297     brg='\e[1m'; \
1298     std='\e[m'; \
1299   fi; \
1300 }
1301 am__recheck_rx = ^[     ]*:recheck:[    ]*
1302 am__global_test_result_rx = ^[  ]*:global-test-result:[         ]*
1303 am__copy_in_global_log_rx = ^[  ]*:copy-in-global-log:[         ]*
1304 # A command that, given a newline-separated list of test names on the
1305 # standard input, print the name of the tests that are to be re-run
1306 # upon "make recheck".
1307 am__list_recheck_tests = $(AWK) '{ \
1308   recheck = 1; \
1309   while ((rc = (getline line < ($$0 ".trs"))) != 0) \
1310     { \
1311       if (rc < 0) \
1312         { \
1313           if ((getline line2 < ($$0 ".log")) < 0) \
1314             recheck = 0; \
1315           break; \
1316         } \
1317       else if (line ~ /$(am__recheck_rx)[nN][Oo]/) \
1318         { \
1319           recheck = 0; \
1320           break; \
1321         } \
1322       else if (line ~ /$(am__recheck_rx)[yY][eE][sS]/) \
1323         { \
1324           break; \
1325         } \
1326     }; \
1327   if (recheck) \
1328     print $$0; \
1329   close ($$0 ".trs"); \
1330   close ($$0 ".log"); \
1331 }'
1332 # A command that, given a newline-separated list of test names on the
1333 # standard input, create the global log from their .trs and .log files.
1334 am__create_global_log = $(AWK) ' \
1335 function fatal(msg) \
1336 { \
1337   print "fatal: making $@: " msg | "cat >&2"; \
1338   exit 1; \
1339 } \
1340 function rst_section(header) \
1341 { \
1342   print header; \
1343   len = length(header); \
1344   for (i = 1; i <= len; i = i + 1) \
1345     printf "="; \
1346   printf "\n\n"; \
1347 } \
1348 { \
1349   copy_in_global_log = 1; \
1350   global_test_result = "RUN"; \
1351   while ((rc = (getline line < ($$0 ".trs"))) != 0) \
1352     { \
1353       if (rc < 0) \
1354          fatal("failed to read from " $$0 ".trs"); \
1355       if (line ~ /$(am__global_test_result_rx)/) \
1356         { \
1357           sub("$(am__global_test_result_rx)", "", line); \
1358           sub("[        ]*$$", "", line); \
1359           global_test_result = line; \
1360         } \
1361       else if (line ~ /$(am__copy_in_global_log_rx)[nN][oO]/) \
1362         copy_in_global_log = 0; \
1363     }; \
1364   if (copy_in_global_log) \
1365     { \
1366       rst_section(global_test_result ": " $$0); \
1367       while ((rc = (getline line < ($$0 ".log"))) != 0) \
1368       { \
1369         if (rc < 0) \
1370           fatal("failed to read from " $$0 ".log"); \
1371         print line; \
1372       }; \
1373       printf "\n"; \
1374     }; \
1375   close ($$0 ".trs"); \
1376   close ($$0 ".log"); \
1377 }'
1378 # Restructured Text title.
1379 am__rst_title = { sed 's/.*/   &   /;h;s/./=/g;p;x;s/ *$$//;p;g' && echo; }
1380 # Solaris 10 'make', and several other traditional 'make' implementations,
1381 # pass "-e" to $(SHELL), and POSIX 2008 even requires this.  Work around it
1382 # by disabling -e (using the XSI extension "set +e") if it's set.
1383 am__sh_e_setup = case $$- in *e*) set +e;; esac
1384 # Default flags passed to test drivers.
1385 am__common_driver_flags = \
1386   --color-tests "$$am__color_tests" \
1387   --enable-hard-errors "$$am__enable_hard_errors" \
1388   --expect-failure "$$am__expect_failure"
1389 # To be inserted before the command running the test.  Creates the
1390 # directory for the log if needed.  Stores in $dir the directory
1391 # containing $f, in $tst the test, in $log the log.  Executes the
1392 # developer- defined test setup AM_TESTS_ENVIRONMENT (if any), and
1393 # passes TESTS_ENVIRONMENT.  Set up options for the wrapper that
1394 # will run the test scripts (or their associated LOG_COMPILER, if
1395 # thy have one).
1396 am__check_pre = \
1397 $(am__sh_e_setup);                                      \
1398 $(am__vpath_adj_setup) $(am__vpath_adj)                 \
1399 $(am__tty_colors);                                      \
1400 srcdir=$(srcdir); export srcdir;                        \
1401 case "$@" in                                            \
1402   */*) am__odir=`echo "./$@" | sed 's|/[^/]*$$||'`;;    \
1403     *) am__odir=.;;                                     \
1404 esac;                                                   \
1405 test "x$$am__odir" = x"." || test -d "$$am__odir"       \
1406   || $(MKDIR_P) "$$am__odir" || exit $$?;               \
1407 if test -f "./$$f"; then dir=./;                        \
1408 elif test -f "$$f"; then dir=;                          \
1409 else dir="$(srcdir)/"; fi;                              \
1410 tst=$$dir$$f; log='$@';                                 \
1411 if test -n '$(DISABLE_HARD_ERRORS)'; then               \
1412   am__enable_hard_errors=no;                            \
1413 else                                                    \
1414   am__enable_hard_errors=yes;                           \
1415 fi;                                                     \
1416 case " $(XFAIL_TESTS) " in                              \
1417   *[\ \ ]$$f[\ \        ]* | *[\ \      ]$$dir$$f[\ \   ]*) \
1418     am__expect_failure=yes;;                            \
1419   *)                                                    \
1420     am__expect_failure=no;;                             \
1421 esac;                                                   \
1422 $(AM_TESTS_ENVIRONMENT) $(TESTS_ENVIRONMENT)
1423 # A shell command to get the names of the tests scripts with any registered
1424 # extension removed (i.e., equivalently, the names of the test logs, with
1425 # the '.log' extension removed).  The result is saved in the shell variable
1426 # '$bases'.  This honors runtime overriding of TESTS and TEST_LOGS.  Sadly,
1427 # we cannot use something simpler, involving e.g., "$(TEST_LOGS:.log=)",
1428 # since that might cause problem with VPATH rewrites for suffix-less tests.
1429 # See also 'test-harness-vpath-rewrite.sh' and 'test-trs-basic.sh'.
1430 am__set_TESTS_bases = \
1431   bases='$(TEST_LOGS)'; \
1432   bases=`for i in $$bases; do echo $$i; done | sed 's/\.log$$//'`; \
1433   bases=`echo $$bases`
1434 RECHECK_LOGS = $(TEST_LOGS)
1435 TEST_SUITE_LOG = test-suite.log
1436 TEST_EXTENSIONS = @EXEEXT@ .test
1437 LOG_DRIVER = $(SHELL) $(top_srcdir)/../test-driver
1438 LOG_COMPILE = $(LOG_COMPILER) $(AM_LOG_FLAGS) $(LOG_FLAGS)
1439 am__set_b = \
1440   case '$@' in \
1441     */*) \
1442       case '$*' in \
1443         */*) b='$*';; \
1444           *) b=`echo '$@' | sed 's/\.log$$//'`; \
1445        esac;; \
1446     *) \
1447       b='$*';; \
1448   esac
1449 am__test_logs1 = $(TESTS:=.log)
1450 am__test_logs2 = $(am__test_logs1:@EXEEXT@.log=.log)
1451 TEST_LOGS = $(am__test_logs2:.test.log=.log)
1452 TEST_LOG_DRIVER = $(SHELL) $(top_srcdir)/../test-driver
1453 TEST_LOG_COMPILE = $(TEST_LOG_COMPILER) $(AM_TEST_LOG_FLAGS) \
1454         $(TEST_LOG_FLAGS)
1455 DIST_SUBDIRS = $(SUBDIRS)
1456 ACLOCAL = @ACLOCAL@
1457 AMTAR = @AMTAR@
1458 AM_DEFAULT_VERBOSITY = @AM_DEFAULT_VERBOSITY@
1459 AR = @AR@
1460 AR_FOR_BUILD = @AR_FOR_BUILD@
1461 AS_FOR_TARGET = @AS_FOR_TARGET@
1462 AS_FOR_TARGET_AARCH64 = @AS_FOR_TARGET_AARCH64@
1463 AS_FOR_TARGET_ARM = @AS_FOR_TARGET_ARM@
1464 AS_FOR_TARGET_AVR = @AS_FOR_TARGET_AVR@
1465 AS_FOR_TARGET_BFIN = @AS_FOR_TARGET_BFIN@
1466 AS_FOR_TARGET_BPF = @AS_FOR_TARGET_BPF@
1467 AS_FOR_TARGET_CR16 = @AS_FOR_TARGET_CR16@
1468 AS_FOR_TARGET_CRIS = @AS_FOR_TARGET_CRIS@
1469 AS_FOR_TARGET_D10V = @AS_FOR_TARGET_D10V@
1470 AS_FOR_TARGET_ERC32 = @AS_FOR_TARGET_ERC32@
1471 AS_FOR_TARGET_EXAMPLE_SYNACOR = @AS_FOR_TARGET_EXAMPLE_SYNACOR@
1472 AS_FOR_TARGET_FRV = @AS_FOR_TARGET_FRV@
1473 AS_FOR_TARGET_FT32 = @AS_FOR_TARGET_FT32@
1474 AS_FOR_TARGET_H8300 = @AS_FOR_TARGET_H8300@
1475 AS_FOR_TARGET_IQ2000 = @AS_FOR_TARGET_IQ2000@
1476 AS_FOR_TARGET_LM32 = @AS_FOR_TARGET_LM32@
1477 AS_FOR_TARGET_M32C = @AS_FOR_TARGET_M32C@
1478 AS_FOR_TARGET_M32R = @AS_FOR_TARGET_M32R@
1479 AS_FOR_TARGET_M68HC11 = @AS_FOR_TARGET_M68HC11@
1480 AS_FOR_TARGET_MCORE = @AS_FOR_TARGET_MCORE@
1481 AS_FOR_TARGET_MICROBLAZE = @AS_FOR_TARGET_MICROBLAZE@
1482 AS_FOR_TARGET_MIPS = @AS_FOR_TARGET_MIPS@
1483 AS_FOR_TARGET_MN10300 = @AS_FOR_TARGET_MN10300@
1484 AS_FOR_TARGET_MOXIE = @AS_FOR_TARGET_MOXIE@
1485 AS_FOR_TARGET_MSP430 = @AS_FOR_TARGET_MSP430@
1486 AS_FOR_TARGET_OR1K = @AS_FOR_TARGET_OR1K@
1487 AS_FOR_TARGET_PPC = @AS_FOR_TARGET_PPC@
1488 AS_FOR_TARGET_PRU = @AS_FOR_TARGET_PRU@
1489 AS_FOR_TARGET_RISCV = @AS_FOR_TARGET_RISCV@
1490 AS_FOR_TARGET_RL78 = @AS_FOR_TARGET_RL78@
1491 AS_FOR_TARGET_RX = @AS_FOR_TARGET_RX@
1492 AS_FOR_TARGET_SH = @AS_FOR_TARGET_SH@
1493 AS_FOR_TARGET_V850 = @AS_FOR_TARGET_V850@
1494 AUTOCONF = @AUTOCONF@
1495 AUTOHEADER = @AUTOHEADER@
1496 AUTOMAKE = @AUTOMAKE@
1497 AWK = @AWK@
1498 CC = @CC@
1499 CCDEPMODE = @CCDEPMODE@
1500 CC_FOR_BUILD = @CC_FOR_BUILD@
1501 CC_FOR_TARGET = @CC_FOR_TARGET@
1502 CC_FOR_TARGET_AARCH64 = @CC_FOR_TARGET_AARCH64@
1503 CC_FOR_TARGET_ARM = @CC_FOR_TARGET_ARM@
1504 CC_FOR_TARGET_AVR = @CC_FOR_TARGET_AVR@
1505 CC_FOR_TARGET_BFIN = @CC_FOR_TARGET_BFIN@
1506 CC_FOR_TARGET_BPF = @CC_FOR_TARGET_BPF@
1507 CC_FOR_TARGET_CR16 = @CC_FOR_TARGET_CR16@
1508 CC_FOR_TARGET_CRIS = @CC_FOR_TARGET_CRIS@
1509 CC_FOR_TARGET_D10V = @CC_FOR_TARGET_D10V@
1510 CC_FOR_TARGET_ERC32 = @CC_FOR_TARGET_ERC32@
1511 CC_FOR_TARGET_EXAMPLE_SYNACOR = @CC_FOR_TARGET_EXAMPLE_SYNACOR@
1512 CC_FOR_TARGET_FRV = @CC_FOR_TARGET_FRV@
1513 CC_FOR_TARGET_FT32 = @CC_FOR_TARGET_FT32@
1514 CC_FOR_TARGET_H8300 = @CC_FOR_TARGET_H8300@
1515 CC_FOR_TARGET_IQ2000 = @CC_FOR_TARGET_IQ2000@
1516 CC_FOR_TARGET_LM32 = @CC_FOR_TARGET_LM32@
1517 CC_FOR_TARGET_M32C = @CC_FOR_TARGET_M32C@
1518 CC_FOR_TARGET_M32R = @CC_FOR_TARGET_M32R@
1519 CC_FOR_TARGET_M68HC11 = @CC_FOR_TARGET_M68HC11@
1520 CC_FOR_TARGET_MCORE = @CC_FOR_TARGET_MCORE@
1521 CC_FOR_TARGET_MICROBLAZE = @CC_FOR_TARGET_MICROBLAZE@
1522 CC_FOR_TARGET_MIPS = @CC_FOR_TARGET_MIPS@
1523 CC_FOR_TARGET_MN10300 = @CC_FOR_TARGET_MN10300@
1524 CC_FOR_TARGET_MOXIE = @CC_FOR_TARGET_MOXIE@
1525 CC_FOR_TARGET_MSP430 = @CC_FOR_TARGET_MSP430@
1526 CC_FOR_TARGET_OR1K = @CC_FOR_TARGET_OR1K@
1527 CC_FOR_TARGET_PPC = @CC_FOR_TARGET_PPC@
1528 CC_FOR_TARGET_PRU = @CC_FOR_TARGET_PRU@
1529 CC_FOR_TARGET_RISCV = @CC_FOR_TARGET_RISCV@
1530 CC_FOR_TARGET_RL78 = @CC_FOR_TARGET_RL78@
1531 CC_FOR_TARGET_RX = @CC_FOR_TARGET_RX@
1532 CC_FOR_TARGET_SH = @CC_FOR_TARGET_SH@
1533 CC_FOR_TARGET_V850 = @CC_FOR_TARGET_V850@
1534 CFLAGS = @CFLAGS@
1535 CFLAGS_FOR_BUILD = @CFLAGS_FOR_BUILD@
1536 CGEN_MAINT = @CGEN_MAINT@
1537 CPP = @CPP@
1538 CPPFLAGS = @CPPFLAGS@
1539 CPPFLAGS_FOR_BUILD = @CPPFLAGS_FOR_BUILD@
1540 CYGPATH_W = @CYGPATH_W@
1541 C_DIALECT = @C_DIALECT@
1542 DEFS = @DEFS@
1543 DEPDIR = @DEPDIR@
1544 DSYMUTIL = @DSYMUTIL@
1545 DTC = @DTC@
1546 DUMPBIN = @DUMPBIN@
1547 ECHO_C = @ECHO_C@
1548 ECHO_N = @ECHO_N@
1549 ECHO_T = @ECHO_T@
1550 EGREP = @EGREP@
1551 EXEEXT = @EXEEXT@
1552 FGREP = @FGREP@
1553 GREP = @GREP@
1554 IGEN_FLAGS_SMP = @IGEN_FLAGS_SMP@
1555 INSTALL = @INSTALL@
1556 INSTALL_DATA = @INSTALL_DATA@
1557 INSTALL_PROGRAM = @INSTALL_PROGRAM@
1558 INSTALL_SCRIPT = @INSTALL_SCRIPT@
1559 INSTALL_STRIP_PROGRAM = @INSTALL_STRIP_PROGRAM@
1560 LD = @LD@
1561 LDFLAGS = @LDFLAGS@
1562 LDFLAGS_FOR_BUILD = @LDFLAGS_FOR_BUILD@
1563 LD_FOR_TARGET = @LD_FOR_TARGET@
1564 LD_FOR_TARGET_AARCH64 = @LD_FOR_TARGET_AARCH64@
1565 LD_FOR_TARGET_ARM = @LD_FOR_TARGET_ARM@
1566 LD_FOR_TARGET_AVR = @LD_FOR_TARGET_AVR@
1567 LD_FOR_TARGET_BFIN = @LD_FOR_TARGET_BFIN@
1568 LD_FOR_TARGET_BPF = @LD_FOR_TARGET_BPF@
1569 LD_FOR_TARGET_CR16 = @LD_FOR_TARGET_CR16@
1570 LD_FOR_TARGET_CRIS = @LD_FOR_TARGET_CRIS@
1571 LD_FOR_TARGET_D10V = @LD_FOR_TARGET_D10V@
1572 LD_FOR_TARGET_ERC32 = @LD_FOR_TARGET_ERC32@
1573 LD_FOR_TARGET_EXAMPLE_SYNACOR = @LD_FOR_TARGET_EXAMPLE_SYNACOR@
1574 LD_FOR_TARGET_FRV = @LD_FOR_TARGET_FRV@
1575 LD_FOR_TARGET_FT32 = @LD_FOR_TARGET_FT32@
1576 LD_FOR_TARGET_H8300 = @LD_FOR_TARGET_H8300@
1577 LD_FOR_TARGET_IQ2000 = @LD_FOR_TARGET_IQ2000@
1578 LD_FOR_TARGET_LM32 = @LD_FOR_TARGET_LM32@
1579 LD_FOR_TARGET_M32C = @LD_FOR_TARGET_M32C@
1580 LD_FOR_TARGET_M32R = @LD_FOR_TARGET_M32R@
1581 LD_FOR_TARGET_M68HC11 = @LD_FOR_TARGET_M68HC11@
1582 LD_FOR_TARGET_MCORE = @LD_FOR_TARGET_MCORE@
1583 LD_FOR_TARGET_MICROBLAZE = @LD_FOR_TARGET_MICROBLAZE@
1584 LD_FOR_TARGET_MIPS = @LD_FOR_TARGET_MIPS@
1585 LD_FOR_TARGET_MN10300 = @LD_FOR_TARGET_MN10300@
1586 LD_FOR_TARGET_MOXIE = @LD_FOR_TARGET_MOXIE@
1587 LD_FOR_TARGET_MSP430 = @LD_FOR_TARGET_MSP430@
1588 LD_FOR_TARGET_OR1K = @LD_FOR_TARGET_OR1K@
1589 LD_FOR_TARGET_PPC = @LD_FOR_TARGET_PPC@
1590 LD_FOR_TARGET_PRU = @LD_FOR_TARGET_PRU@
1591 LD_FOR_TARGET_RISCV = @LD_FOR_TARGET_RISCV@
1592 LD_FOR_TARGET_RL78 = @LD_FOR_TARGET_RL78@
1593 LD_FOR_TARGET_RX = @LD_FOR_TARGET_RX@
1594 LD_FOR_TARGET_SH = @LD_FOR_TARGET_SH@
1595 LD_FOR_TARGET_V850 = @LD_FOR_TARGET_V850@
1596 LIBOBJS = @LIBOBJS@
1597 LIBS = @LIBS@
1598 LIBTOOL = @LIBTOOL@
1599 LIPO = @LIPO@
1600 LN_S = @LN_S@
1601 LTLIBOBJS = @LTLIBOBJS@
1602 MAINT = @MAINT@
1603 MAKEINFO = @MAKEINFO@
1604 MKDIR_P = @MKDIR_P@
1605 NM = @NM@
1606 NMEDIT = @NMEDIT@
1607 OBJDUMP = @OBJDUMP@
1608 OBJEXT = @OBJEXT@
1609 OTOOL = @OTOOL@
1610 OTOOL64 = @OTOOL64@
1611 PACKAGE = @PACKAGE@
1612 PACKAGE_BUGREPORT = @PACKAGE_BUGREPORT@
1613 PACKAGE_NAME = @PACKAGE_NAME@
1614 PACKAGE_STRING = @PACKAGE_STRING@
1615 PACKAGE_TARNAME = @PACKAGE_TARNAME@
1616 PACKAGE_URL = @PACKAGE_URL@
1617 PACKAGE_VERSION = @PACKAGE_VERSION@
1618 PATH_SEPARATOR = @PATH_SEPARATOR@
1619 PKGVERSION = @PKGVERSION@
1620 PKG_CONFIG = @PKG_CONFIG@
1621 PKG_CONFIG_LIBDIR = @PKG_CONFIG_LIBDIR@
1622 PKG_CONFIG_PATH = @PKG_CONFIG_PATH@
1623 RANLIB = @RANLIB@
1624 RANLIB_FOR_BUILD = @RANLIB_FOR_BUILD@
1625 READLINE_CFLAGS = @READLINE_CFLAGS@
1626 READLINE_LIB = @READLINE_LIB@
1627 REPORT_BUGS_TEXI = @REPORT_BUGS_TEXI@
1628 REPORT_BUGS_TO = @REPORT_BUGS_TO@
1629 SDL_CFLAGS = @SDL_CFLAGS@
1630 SDL_LIBS = @SDL_LIBS@
1631 SED = @SED@
1632 SET_MAKE = @SET_MAKE@
1633 SHELL = @SHELL@
1634 SIM_COMMON_BUILD_FALSE = @SIM_COMMON_BUILD_FALSE@
1635 SIM_COMMON_BUILD_TRUE = @SIM_COMMON_BUILD_TRUE@
1636 SIM_ENABLED_ARCHES = @SIM_ENABLED_ARCHES@
1637 SIM_FRV_TRAPDUMP_FLAGS = @SIM_FRV_TRAPDUMP_FLAGS@
1638 SIM_HW_CFLAGS = @SIM_HW_CFLAGS@
1639 SIM_HW_SOCKSER = @SIM_HW_SOCKSER@
1640 SIM_INLINE = @SIM_INLINE@
1641 SIM_MIPS_BITSIZE = @SIM_MIPS_BITSIZE@
1642 SIM_MIPS_FPU_BITSIZE = @SIM_MIPS_FPU_BITSIZE@
1643 SIM_MIPS_GEN = @SIM_MIPS_GEN@
1644 SIM_MIPS_IGEN_ITABLE_FLAGS = @SIM_MIPS_IGEN_ITABLE_FLAGS@
1645 SIM_MIPS_M16_FLAGS = @SIM_MIPS_M16_FLAGS@
1646 SIM_MIPS_MULTI_IGEN_CONFIGS = @SIM_MIPS_MULTI_IGEN_CONFIGS@
1647 SIM_MIPS_MULTI_OBJ = @SIM_MIPS_MULTI_OBJ@
1648 SIM_MIPS_MULTI_SRC = @SIM_MIPS_MULTI_SRC@
1649 SIM_MIPS_SINGLE_FLAGS = @SIM_MIPS_SINGLE_FLAGS@
1650 SIM_MIPS_SUBTARGET = @SIM_MIPS_SUBTARGET@
1651 SIM_PRIMARY_TARGET = @SIM_PRIMARY_TARGET@
1652 SIM_RISCV_BITSIZE = @SIM_RISCV_BITSIZE@
1653 SIM_RX_CYCLE_ACCURATE_FLAGS = @SIM_RX_CYCLE_ACCURATE_FLAGS@
1654 SIM_SUBDIRS = @SIM_SUBDIRS@
1655 SIM_TOOLCHAIN_VARS = @SIM_TOOLCHAIN_VARS@
1656 STRIP = @STRIP@
1657 TERMCAP_LIB = @TERMCAP_LIB@
1658 VERSION = @VERSION@
1659 WARN_CFLAGS = @WARN_CFLAGS@
1660 WERROR_CFLAGS = @WERROR_CFLAGS@
1661 abs_builddir = @abs_builddir@
1662 abs_srcdir = @abs_srcdir@
1663 abs_top_builddir = @abs_top_builddir@
1664 abs_top_srcdir = @abs_top_srcdir@
1665 ac_ct_CC = @ac_ct_CC@
1666 ac_ct_DUMPBIN = @ac_ct_DUMPBIN@
1667 am__include = @am__include@
1668 am__leading_dot = @am__leading_dot@
1669 am__quote = @am__quote@
1670 am__tar = @am__tar@
1671 am__untar = @am__untar@
1672 bindir = @bindir@
1673 build = @build@
1674 build_alias = @build_alias@
1675 build_cpu = @build_cpu@
1676 build_os = @build_os@
1677 build_vendor = @build_vendor@
1678 builddir = @builddir@
1679 cgen = @cgen@
1680 cgendir = @cgendir@
1681 datadir = @datadir@
1682 datarootdir = @datarootdir@
1683 docdir = @docdir@
1684 dvidir = @dvidir@
1685 exec_prefix = @exec_prefix@
1686 host = @host@
1687 host_alias = @host_alias@
1688 host_cpu = @host_cpu@
1689 host_os = @host_os@
1690 host_vendor = @host_vendor@
1691 htmldir = @htmldir@
1692 includedir = @includedir@
1693 infodir = @infodir@
1694 install_sh = @install_sh@
1695 libdir = @libdir@
1696 libexecdir = @libexecdir@
1697 localedir = @localedir@
1698 localstatedir = @localstatedir@
1699 mandir = @mandir@
1700 mkdir_p = @mkdir_p@
1701 oldincludedir = @oldincludedir@
1702 pdfdir = @pdfdir@
1703 prefix = @prefix@
1704 program_transform_name = @program_transform_name@
1705 psdir = @psdir@
1706 sbindir = @sbindir@
1707 sharedstatedir = @sharedstatedir@
1708 sim_bitsize = @sim_bitsize@
1709 sim_float = @sim_float@
1710 srcdir = @srcdir@
1711 subdirs = @subdirs@
1712 sysconfdir = @sysconfdir@
1713 target = @target@
1714 target_alias = @target_alias@
1715 target_cpu = @target_cpu@
1716 target_os = @target_os@
1717 target_vendor = @target_vendor@
1718 top_build_prefix = @top_build_prefix@
1719 top_builddir = @top_builddir@
1720 top_srcdir = @top_srcdir@
1721 AUTOMAKE_OPTIONS = dejagnu foreign no-dist subdir-objects
1722 ACLOCAL_AMFLAGS = -Im4 -I.. -I../config
1723 GNULIB_PARENT_DIR = ..
1724 srccom = $(srcdir)/common
1725 srcroot = $(srcdir)/..
1726 SUBDIRS = @subdirs@ $(SIM_SUBDIRS)
1727 AM_MAKEFLAGS = SIM_NEW_COMMON_OBJS_="$(SIM_NEW_COMMON_OBJS)" \
1728         $(am__append_3) $(am__append_16) $(am__append_30) \
1729         $(am__append_63) $(am__append_74) $(am__append_80) \
1730         $(am__append_93) $(am__append_103)
1731 pkginclude_HEADERS = $(am__append_1)
1732 noinst_LIBRARIES = common/libcommon.a $(am__append_5) $(am__append_8) \
1733         $(am__append_10) $(am__append_12) $(am__append_14) \
1734         $(am__append_17) $(am__append_22) $(am__append_28) \
1735         $(am__append_35) $(am__append_41) $(am__append_45) \
1736         $(am__append_47) $(am__append_52) $(am__append_54) \
1737         $(am__append_56) $(am__append_61) $(am__append_67) \
1738         $(am__append_72) $(am__append_78) $(am__append_84) \
1739         $(am__append_86) $(am__append_91) $(am__append_101) \
1740         $(am__append_107) $(am__append_109) $(am__append_111) \
1741         $(am__append_117) $(am__append_119) $(am__append_121)
1742 BUILT_SOURCES = $(am__append_19) $(am__append_24) $(am__append_32) \
1743         $(am__append_37) $(am__append_49) $(am__append_58) \
1744         $(am__append_64) $(am__append_75) $(am__append_94) \
1745         $(am__append_104) $(am__append_113) $(am__append_125) \
1746         $(am__append_130)
1747 CLEANFILES = common/version.c common/version.c-stamp \
1748         testsuite/common/bits-gen testsuite/common/bits32m0.c \
1749         testsuite/common/bits32m31.c testsuite/common/bits64m0.c \
1750         testsuite/common/bits64m63.c
1751 DISTCLEANFILES = $(am__append_100)
1752 MOSTLYCLEANFILES = core $(common_HW_CONFIG_H_TARGETS) $(patsubst \
1753         %,%/stamp-hw,$(SIM_ENABLED_ARCHES)) \
1754         $(common_GEN_MODULES_C_TARGETS) $(patsubst \
1755         %,%/stamp-modules,$(SIM_ENABLED_ARCHES)) $(am__append_7) \
1756         site-sim-config.exp testrun.log testrun.sum $(am__append_21) \
1757         $(am__append_27) $(am__append_34) $(am__append_40) \
1758         $(am__append_51) $(am__append_60) $(am__append_66) \
1759         $(am__append_71) $(am__append_77) $(am__append_83) \
1760         $(am__append_99) $(am__append_106) $(am__append_115) \
1761         $(am__append_128) $(am__append_132)
1762 AM_CFLAGS = $(WERROR_CFLAGS) $(WARN_CFLAGS)
1763 AM_CPPFLAGS = $(INCGNU) -I$(srcroot)/include -I../bfd -I.. \
1764         $(SIM_HW_CFLAGS) $(SIM_INLINE) -I$(srcdir)/common \
1765         -DSIM_COMMON_BUILD
1766 AM_CPPFLAGS_FOR_BUILD = -I$(srcroot)/include $(SIM_HW_CFLAGS) \
1767         $(SIM_INLINE) -I$(srcdir)/common
1768 COMPILE_FOR_BUILD = $(CC_FOR_BUILD) $(AM_CPPFLAGS_FOR_BUILD) $(CPPFLAGS_FOR_BUILD) $(CFLAGS_FOR_BUILD)
1769 LINK_FOR_BUILD = $(CC_FOR_BUILD) $(CFLAGS_FOR_BUILD) $(LDFLAGS_FOR_BUILD) -o $@
1770 SIM_ALL_RECURSIVE_DEPS = common/libcommon.a \
1771         $(common_HW_CONFIG_H_TARGETS) $(common_GEN_MODULES_C_TARGETS) \
1772         $(am__append_4) $(am__append_20) $(am__append_25) \
1773         $(am__append_33) $(am__append_38) $(am__append_50) \
1774         $(am__append_59) $(am__append_65) $(am__append_69) \
1775         $(am__append_76) $(am__append_81) $(am__append_98) \
1776         $(am__append_105) $(am__append_114) $(am__append_126) \
1777         $(am__append_131)
1778 SIM_INSTALL_DATA_LOCAL_DEPS =
1779 SIM_INSTALL_EXEC_LOCAL_DEPS = $(am__append_43)
1780 SIM_UNINSTALL_LOCAL_DEPS = $(am__append_44)
1781 common_libcommon_a_SOURCES = \
1782         common/callback.c \
1783         common/portability.c \
1784         common/sim-load.c \
1785         common/syscall.c \
1786         common/target-newlib-errno.c \
1787         common/target-newlib-open.c \
1788         common/target-newlib-signal.c \
1789         common/target-newlib-syscall.c \
1790         common/version.c
1791
1792 SIM_COMMON_HW_OBJS = \
1793         hw-alloc.o \
1794         hw-base.o \
1795         hw-device.o \
1796         hw-events.o \
1797         hw-handles.o \
1798         hw-instances.o \
1799         hw-ports.o \
1800         hw-properties.o \
1801         hw-tree.o \
1802         sim-hw.o
1803
1804 SIM_NEW_COMMON_OBJS = sim-arange.o sim-bits.o sim-close.o \
1805         sim-command.o sim-config.o sim-core.o sim-cpu.o sim-endian.o \
1806         sim-engine.o sim-events.o sim-fpu.o sim-hload.o sim-hrw.o \
1807         sim-io.o sim-info.o sim-memopt.o sim-model.o sim-module.o \
1808         sim-options.o sim-profile.o sim-reason.o sim-reg.o \
1809         sim-signal.o sim-stop.o sim-syscall.o sim-trace.o sim-utils.o \
1810         sim-watch.o $(am__append_2)
1811 SIM_HW_DEVICES = cfi core pal glue
1812 common_HW_CONFIG_H_TARGETS = $(patsubst %,%/hw-config.h,$(SIM_ENABLED_ARCHES))
1813 am_arch_d = $(subst -,_,$(@D))
1814 GEN_MODULES_C_SRCS = \
1815         $(wildcard \
1816                 $(patsubst %.o,$(abs_srcdir)/%.c,$($(am_arch_d)_libsim_a_OBJECTS) $($(am_arch_d)_libsim_a_LIBADD)) \
1817                 $(filter-out %.o,$(patsubst $(@D)/%.o,$(abs_srcdir)/common/%.c,$($(am_arch_d)_libsim_a_LIBADD))))
1818
1819 common_GEN_MODULES_C_TARGETS = $(patsubst %,%/modules.c,$(filter-out ppc,$(SIM_ENABLED_ARCHES)))
1820 LIBIBERTY_LIB = ../libiberty/libiberty.a
1821 BFD_LIB = ../bfd/libbfd.la
1822 OPCODES_LIB = ../opcodes/libopcodes.la
1823 SIM_COMMON_LIBS = \
1824         $(BFD_LIB) \
1825         $(OPCODES_LIB) \
1826         $(LIBIBERTY_LIB) \
1827         $(LIBGNU) \
1828         $(LIBGNU_EXTRA_LIBS)
1829
1830 GUILE = $(or $(wildcard ../guile/libguile/guile),guile)
1831 CGEN = "$(GUILE) -l $(cgendir)/guile.scm -s"
1832 CGENFLAGS = -v
1833 CGEN_CPU_DIR = $(cgendir)/cpu
1834 CPU_DIR = $(srcroot)/cpu
1835 CGEN_ARCHFILE = $(CPU_DIR)/$(@D).cpu
1836 CGEN_READ_SCM = $(cgendir)/sim.scm
1837 CGEN_ARCH_SCM = $(cgendir)/sim-arch.scm
1838 CGEN_CPU_SCM = $(cgendir)/sim-cpu.scm $(cgendir)/sim-model.scm
1839 CGEN_DECODE_SCM = $(cgendir)/sim-decode.scm
1840 CGEN_DESC_SCM = $(cgendir)/desc.scm $(cgendir)/desc-cpu.scm
1841 CGEN_CPU_EXTR = /extr/
1842 CGEN_CPU_READ = /read/
1843 CGEN_CPU_WRITE = /write/
1844 CGEN_CPU_SEM = /sem/
1845 CGEN_CPU_SEMSW = /semsw/
1846 CGEN_WRAPPER = $(srccom)/cgen.sh
1847 CGEN_GEN_ARCH = \
1848         $(SHELL) $(CGEN_WRAPPER) arch $(srcdir)/$(@D) \
1849                 $(CGEN) $(cgendir) "$(CGENFLAGS)" \
1850                 $(@D) "$$FLAGS" ignored "$$isa" $$mach ignored \
1851                 $(CGEN_ARCHFILE) ignored
1852
1853 CGEN_GEN_CPU = \
1854         $(SHELL) $(CGEN_WRAPPER) cpu $(srcdir)/$(@D) \
1855                 $(CGEN) $(cgendir) "$(CGENFLAGS)" \
1856                 $(@D) "$$FLAGS" $$cpu "$$isa" $$mach "$$SUFFIX" \
1857                 $(CGEN_ARCHFILE) "$$EXTRAFILES"
1858
1859 CGEN_GEN_DEFS = \
1860         $(SHELL) $(CGEN_WRAPPER) defs $(srcdir)/$(@D) \
1861                 $(CGEN) $(cgendir) "$(CGENFLAGS)" \
1862                 $(@D) "$$FLAGS" $$cpu "$$isa" $$mach "$$SUFFIX" \
1863                 $(CGEN_ARCHFILE) ignored
1864
1865 CGEN_GEN_DECODE = \
1866         $(SHELL) $(CGEN_WRAPPER) decode $(srcdir)/$(@D) \
1867                 $(CGEN) $(cgendir) "$(CGENFLAGS)" \
1868                 $(@D) "$$FLAGS" $$cpu "$$isa" $$mach "$$SUFFIX" \
1869                 $(CGEN_ARCHFILE) "$$EXTRAFILES"
1870
1871 CGEN_GEN_CPU_DECODE = \
1872         $(SHELL) $(CGEN_WRAPPER) cpu-decode $(srcdir)/$(@D) \
1873                 $(CGEN) $(cgendir) "$(CGENFLAGS)" \
1874                 $(@D) "$$FLAGS" $$cpu "$$isa" $$mach "$$SUFFIX" \
1875                 $(CGEN_ARCHFILE) "$$EXTRAFILES"
1876
1877 CGEN_GEN_CPU_DESC = \
1878         $(SHELL) $(CGEN_WRAPPER) desc $(srcdir)/$(@D) \
1879                 $(CGEN) $(cgendir) "$(CGENFLAGS)" \
1880                 $(@D) "$$FLAGS" $$cpu "$$isa" $$mach "$$SUFFIX" \
1881                 $(CGEN_ARCHFILE) ignored $$opcfile
1882
1883
1884 # igen leaks memory, and therefore makes AddressSanitizer unhappy.  Disable
1885 # leak detection while running it.
1886 @SIM_ENABLE_IGEN_TRUE@IGEN = igen/igen$(EXEEXT)
1887 @SIM_ENABLE_IGEN_TRUE@IGEN_RUN = ASAN_OPTIONS=detect_leaks=0 $(IGEN) $(IGEN_FLAGS_SMP)
1888 @SIM_ENABLE_IGEN_TRUE@igen_libigen_a_SOURCES = \
1889 @SIM_ENABLE_IGEN_TRUE@  igen/table.c \
1890 @SIM_ENABLE_IGEN_TRUE@  igen/lf.c \
1891 @SIM_ENABLE_IGEN_TRUE@  igen/misc.c \
1892 @SIM_ENABLE_IGEN_TRUE@  igen/filter_host.c \
1893 @SIM_ENABLE_IGEN_TRUE@  igen/ld-decode.c \
1894 @SIM_ENABLE_IGEN_TRUE@  igen/ld-cache.c \
1895 @SIM_ENABLE_IGEN_TRUE@  igen/filter.c \
1896 @SIM_ENABLE_IGEN_TRUE@  igen/ld-insn.c \
1897 @SIM_ENABLE_IGEN_TRUE@  igen/gen-model.c \
1898 @SIM_ENABLE_IGEN_TRUE@  igen/gen-itable.c \
1899 @SIM_ENABLE_IGEN_TRUE@  igen/gen-icache.c \
1900 @SIM_ENABLE_IGEN_TRUE@  igen/gen-semantics.c \
1901 @SIM_ENABLE_IGEN_TRUE@  igen/gen-idecode.c \
1902 @SIM_ENABLE_IGEN_TRUE@  igen/gen-support.c \
1903 @SIM_ENABLE_IGEN_TRUE@  igen/gen-engine.c \
1904 @SIM_ENABLE_IGEN_TRUE@  igen/gen.c
1905
1906 @SIM_ENABLE_IGEN_TRUE@igen_igen_SOURCES = igen/igen.c
1907 @SIM_ENABLE_IGEN_TRUE@igen_igen_LDADD = igen/libigen.a
1908 @SIM_ENABLE_IGEN_TRUE@igen_filter_SOURCES =
1909 @SIM_ENABLE_IGEN_TRUE@igen_filter_LDADD = igen/filter-main.o igen/libigen.a
1910 @SIM_ENABLE_IGEN_TRUE@igen_gen_SOURCES =
1911 @SIM_ENABLE_IGEN_TRUE@igen_gen_LDADD = igen/gen-main.o igen/libigen.a
1912 @SIM_ENABLE_IGEN_TRUE@igen_ld_cache_SOURCES =
1913 @SIM_ENABLE_IGEN_TRUE@igen_ld_cache_LDADD = igen/ld-cache-main.o igen/libigen.a
1914 @SIM_ENABLE_IGEN_TRUE@igen_ld_decode_SOURCES =
1915 @SIM_ENABLE_IGEN_TRUE@igen_ld_decode_LDADD = igen/ld-decode-main.o igen/libigen.a
1916 @SIM_ENABLE_IGEN_TRUE@igen_ld_insn_SOURCES =
1917 @SIM_ENABLE_IGEN_TRUE@igen_ld_insn_LDADD = igen/ld-insn-main.o igen/libigen.a
1918 @SIM_ENABLE_IGEN_TRUE@igen_table_SOURCES =
1919 @SIM_ENABLE_IGEN_TRUE@igen_table_LDADD = igen/table-main.o igen/libigen.a
1920 @SIM_ENABLE_IGEN_TRUE@igen_IGEN_TOOLS = \
1921 @SIM_ENABLE_IGEN_TRUE@  $(IGEN) \
1922 @SIM_ENABLE_IGEN_TRUE@  igen/filter \
1923 @SIM_ENABLE_IGEN_TRUE@  igen/gen \
1924 @SIM_ENABLE_IGEN_TRUE@  igen/ld-cache \
1925 @SIM_ENABLE_IGEN_TRUE@  igen/ld-decode \
1926 @SIM_ENABLE_IGEN_TRUE@  igen/ld-insn \
1927 @SIM_ENABLE_IGEN_TRUE@  igen/table
1928
1929 EXTRA_DEJAGNU_SITE_CONFIG = site-sim-config.exp
1930
1931 # Custom verbose test variables that automake doesn't provide (yet?).
1932 AM_V_RUNTEST = $(AM_V_RUNTEST_@AM_V@)
1933 AM_V_RUNTEST_ = $(AM_V_RUNTEST_@AM_DEFAULT_V@)
1934 AM_V_RUNTEST_0 = @echo "  RUNTEST  $(RUNTESTFLAGS) $*";
1935 AM_V_RUNTEST_1 =
1936 DO_RUNTEST = \
1937         LC_ALL=C; export LC_ALL; \
1938         EXPECT=${EXPECT} ; export EXPECT ; \
1939         runtest=$(RUNTEST); \
1940         $$runtest $(RUNTESTFLAGS)
1941
1942 testsuite_common_CPPFLAGS = \
1943         -I$(srcdir)/common \
1944         -I$(srcroot)/include \
1945         -I../bfd
1946
1947 @SIM_ENABLE_ARCH_aarch64_TRUE@aarch64_libsim_a_SOURCES =
1948 @SIM_ENABLE_ARCH_aarch64_TRUE@aarch64_libsim_a_LIBADD = \
1949 @SIM_ENABLE_ARCH_aarch64_TRUE@  $(common_libcommon_a_OBJECTS) \
1950 @SIM_ENABLE_ARCH_aarch64_TRUE@  $(patsubst %,aarch64/%,$(SIM_NEW_COMMON_OBJS)) \
1951 @SIM_ENABLE_ARCH_aarch64_TRUE@  $(patsubst %,aarch64/dv-%.o,$(SIM_HW_DEVICES)) \
1952 @SIM_ENABLE_ARCH_aarch64_TRUE@  aarch64/cpustate.o \
1953 @SIM_ENABLE_ARCH_aarch64_TRUE@  aarch64/interp.o \
1954 @SIM_ENABLE_ARCH_aarch64_TRUE@  aarch64/memory.o \
1955 @SIM_ENABLE_ARCH_aarch64_TRUE@  aarch64/modules.o \
1956 @SIM_ENABLE_ARCH_aarch64_TRUE@  aarch64/sim-resume.o \
1957 @SIM_ENABLE_ARCH_aarch64_TRUE@  aarch64/simulator.o
1958
1959 @SIM_ENABLE_ARCH_aarch64_TRUE@aarch64_run_SOURCES =
1960 @SIM_ENABLE_ARCH_aarch64_TRUE@aarch64_run_LDADD = \
1961 @SIM_ENABLE_ARCH_aarch64_TRUE@  aarch64/nrun.o \
1962 @SIM_ENABLE_ARCH_aarch64_TRUE@  aarch64/libsim.a \
1963 @SIM_ENABLE_ARCH_aarch64_TRUE@  $(SIM_COMMON_LIBS)
1964
1965 @SIM_ENABLE_ARCH_arm_TRUE@arm_libsim_a_SOURCES =
1966 @SIM_ENABLE_ARCH_arm_TRUE@arm_libsim_a_LIBADD = \
1967 @SIM_ENABLE_ARCH_arm_TRUE@      $(common_libcommon_a_OBJECTS) \
1968 @SIM_ENABLE_ARCH_arm_TRUE@      arm/wrapper.o \
1969 @SIM_ENABLE_ARCH_arm_TRUE@      $(patsubst %,arm/%,$(SIM_NEW_COMMON_OBJS)) \
1970 @SIM_ENABLE_ARCH_arm_TRUE@      $(patsubst %,arm/dv-%.o,$(SIM_HW_DEVICES)) \
1971 @SIM_ENABLE_ARCH_arm_TRUE@      arm/armemu.o \
1972 @SIM_ENABLE_ARCH_arm_TRUE@      arm/armemu32.o arm/arminit.o arm/armos.o arm/armsupp.o \
1973 @SIM_ENABLE_ARCH_arm_TRUE@      arm/armvirt.o arm/thumbemu.o \
1974 @SIM_ENABLE_ARCH_arm_TRUE@      arm/armcopro.o arm/maverick.o arm/iwmmxt.o \
1975 @SIM_ENABLE_ARCH_arm_TRUE@      arm/modules.o
1976
1977 @SIM_ENABLE_ARCH_arm_TRUE@arm_run_SOURCES =
1978 @SIM_ENABLE_ARCH_arm_TRUE@arm_run_LDADD = \
1979 @SIM_ENABLE_ARCH_arm_TRUE@      arm/nrun.o \
1980 @SIM_ENABLE_ARCH_arm_TRUE@      arm/libsim.a \
1981 @SIM_ENABLE_ARCH_arm_TRUE@      $(SIM_COMMON_LIBS)
1982
1983 @SIM_ENABLE_ARCH_arm_TRUE@armdocdir = $(docdir)/arm
1984 @SIM_ENABLE_ARCH_arm_TRUE@armdoc_DATA = arm/README
1985 @SIM_ENABLE_ARCH_avr_TRUE@avr_libsim_a_SOURCES =
1986 @SIM_ENABLE_ARCH_avr_TRUE@avr_libsim_a_LIBADD = \
1987 @SIM_ENABLE_ARCH_avr_TRUE@      $(common_libcommon_a_OBJECTS) \
1988 @SIM_ENABLE_ARCH_avr_TRUE@      avr/interp.o \
1989 @SIM_ENABLE_ARCH_avr_TRUE@      $(patsubst %,avr/%,$(SIM_NEW_COMMON_OBJS)) \
1990 @SIM_ENABLE_ARCH_avr_TRUE@      $(patsubst %,avr/dv-%.o,$(SIM_HW_DEVICES)) \
1991 @SIM_ENABLE_ARCH_avr_TRUE@      avr/modules.o \
1992 @SIM_ENABLE_ARCH_avr_TRUE@      avr/sim-resume.o
1993
1994 @SIM_ENABLE_ARCH_avr_TRUE@avr_run_SOURCES =
1995 @SIM_ENABLE_ARCH_avr_TRUE@avr_run_LDADD = \
1996 @SIM_ENABLE_ARCH_avr_TRUE@      avr/nrun.o \
1997 @SIM_ENABLE_ARCH_avr_TRUE@      avr/libsim.a \
1998 @SIM_ENABLE_ARCH_avr_TRUE@      $(SIM_COMMON_LIBS)
1999
2000 @SIM_ENABLE_ARCH_bfin_TRUE@bfin_libsim_a_SOURCES =
2001 @SIM_ENABLE_ARCH_bfin_TRUE@bfin_libsim_a_LIBADD = \
2002 @SIM_ENABLE_ARCH_bfin_TRUE@     $(common_libcommon_a_OBJECTS) \
2003 @SIM_ENABLE_ARCH_bfin_TRUE@     $(patsubst %,bfin/%,$(SIM_NEW_COMMON_OBJS)) \
2004 @SIM_ENABLE_ARCH_bfin_TRUE@     $(patsubst %,bfin/dv-%.o,$(SIM_HW_DEVICES)) \
2005 @SIM_ENABLE_ARCH_bfin_TRUE@     $(patsubst %,bfin/dv-%.o,$(bfin_SIM_EXTRA_HW_DEVICES)) \
2006 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin/bfin-sim.o \
2007 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin/devices.o \
2008 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin/gui.o \
2009 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin/interp.o \
2010 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin/machs.o \
2011 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin/modules.o \
2012 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin/sim-resume.o
2013
2014 @SIM_ENABLE_ARCH_bfin_TRUE@bfin_run_SOURCES =
2015 @SIM_ENABLE_ARCH_bfin_TRUE@bfin_run_LDADD = \
2016 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin/nrun.o \
2017 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin/libsim.a \
2018 @SIM_ENABLE_ARCH_bfin_TRUE@     $(SIM_COMMON_LIBS)
2019
2020 @SIM_ENABLE_ARCH_bfin_TRUE@bfin_SIM_EXTRA_HW_DEVICES = \
2021 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin_cec \
2022 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin_ctimer \
2023 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin_dma \
2024 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin_dmac \
2025 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin_ebiu_amc \
2026 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin_ebiu_ddrc \
2027 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin_ebiu_sdc \
2028 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin_emac \
2029 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin_eppi \
2030 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin_evt \
2031 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin_gpio \
2032 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin_gpio2 \
2033 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin_gptimer \
2034 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin_jtag \
2035 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin_mmu \
2036 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin_nfc \
2037 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin_otp \
2038 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin_pfmon \
2039 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin_pint \
2040 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin_pll \
2041 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin_ppi \
2042 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin_rtc \
2043 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin_sic \
2044 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin_spi \
2045 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin_trace \
2046 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin_twi \
2047 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin_uart \
2048 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin_uart2 \
2049 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin_wdog \
2050 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin_wp \
2051 @SIM_ENABLE_ARCH_bfin_TRUE@     eth_phy
2052
2053 @SIM_ENABLE_ARCH_bpf_TRUE@bpf_libsim_a_SOURCES =
2054 @SIM_ENABLE_ARCH_bpf_TRUE@bpf_libsim_a_LIBADD = \
2055 @SIM_ENABLE_ARCH_bpf_TRUE@      $(common_libcommon_a_OBJECTS) \
2056 @SIM_ENABLE_ARCH_bpf_TRUE@      $(patsubst %,bpf/%,$(SIM_NEW_COMMON_OBJS)) \
2057 @SIM_ENABLE_ARCH_bpf_TRUE@      $(patsubst %,bpf/dv-%.o,$(SIM_HW_DEVICES)) \
2058 @SIM_ENABLE_ARCH_bpf_TRUE@      bpf/modules.o \
2059 @SIM_ENABLE_ARCH_bpf_TRUE@      \
2060 @SIM_ENABLE_ARCH_bpf_TRUE@      bpf/cgen-run.o \
2061 @SIM_ENABLE_ARCH_bpf_TRUE@      bpf/cgen-scache.o \
2062 @SIM_ENABLE_ARCH_bpf_TRUE@      bpf/cgen-trace.o \
2063 @SIM_ENABLE_ARCH_bpf_TRUE@      bpf/cgen-utils.o \
2064 @SIM_ENABLE_ARCH_bpf_TRUE@      \
2065 @SIM_ENABLE_ARCH_bpf_TRUE@      bpf/arch.o \
2066 @SIM_ENABLE_ARCH_bpf_TRUE@      bpf/cpu.o \
2067 @SIM_ENABLE_ARCH_bpf_TRUE@      bpf/decode-le.o \
2068 @SIM_ENABLE_ARCH_bpf_TRUE@      bpf/decode-be.o \
2069 @SIM_ENABLE_ARCH_bpf_TRUE@      bpf/sem-le.o \
2070 @SIM_ENABLE_ARCH_bpf_TRUE@      bpf/sem-be.o \
2071 @SIM_ENABLE_ARCH_bpf_TRUE@      bpf/mloop-le.o \
2072 @SIM_ENABLE_ARCH_bpf_TRUE@      bpf/mloop-be.o \
2073 @SIM_ENABLE_ARCH_bpf_TRUE@      \
2074 @SIM_ENABLE_ARCH_bpf_TRUE@      bpf/bpf.o \
2075 @SIM_ENABLE_ARCH_bpf_TRUE@      bpf/bpf-helpers.o \
2076 @SIM_ENABLE_ARCH_bpf_TRUE@      bpf/sim-if.o \
2077 @SIM_ENABLE_ARCH_bpf_TRUE@      bpf/traps.o
2078
2079 @SIM_ENABLE_ARCH_bpf_TRUE@bpf_run_SOURCES =
2080 @SIM_ENABLE_ARCH_bpf_TRUE@bpf_run_LDADD = \
2081 @SIM_ENABLE_ARCH_bpf_TRUE@      bpf/nrun.o \
2082 @SIM_ENABLE_ARCH_bpf_TRUE@      bpf/libsim.a \
2083 @SIM_ENABLE_ARCH_bpf_TRUE@      $(SIM_COMMON_LIBS)
2084
2085 @SIM_ENABLE_ARCH_bpf_TRUE@bpf_BUILD_OUTPUTS = \
2086 @SIM_ENABLE_ARCH_bpf_TRUE@      bpf/mloop-le.c \
2087 @SIM_ENABLE_ARCH_bpf_TRUE@      bpf/stamp-mloop-le \
2088 @SIM_ENABLE_ARCH_bpf_TRUE@      bpf/mloop-be.c \
2089 @SIM_ENABLE_ARCH_bpf_TRUE@      bpf/stamp-mloop-be
2090
2091 @SIM_ENABLE_ARCH_cr16_TRUE@cr16_libsim_a_SOURCES =
2092 @SIM_ENABLE_ARCH_cr16_TRUE@cr16_libsim_a_LIBADD = \
2093 @SIM_ENABLE_ARCH_cr16_TRUE@     $(common_libcommon_a_OBJECTS) \
2094 @SIM_ENABLE_ARCH_cr16_TRUE@     $(patsubst %,cr16/%,$(SIM_NEW_COMMON_OBJS)) \
2095 @SIM_ENABLE_ARCH_cr16_TRUE@     $(patsubst %,cr16/dv-%.o,$(SIM_HW_DEVICES)) \
2096 @SIM_ENABLE_ARCH_cr16_TRUE@     cr16/interp.o \
2097 @SIM_ENABLE_ARCH_cr16_TRUE@     cr16/modules.o \
2098 @SIM_ENABLE_ARCH_cr16_TRUE@     cr16/sim-resume.o \
2099 @SIM_ENABLE_ARCH_cr16_TRUE@     cr16/simops.o \
2100 @SIM_ENABLE_ARCH_cr16_TRUE@     cr16/table.o
2101
2102 @SIM_ENABLE_ARCH_cr16_TRUE@cr16_run_SOURCES =
2103 @SIM_ENABLE_ARCH_cr16_TRUE@cr16_run_LDADD = \
2104 @SIM_ENABLE_ARCH_cr16_TRUE@     cr16/nrun.o \
2105 @SIM_ENABLE_ARCH_cr16_TRUE@     cr16/libsim.a \
2106 @SIM_ENABLE_ARCH_cr16_TRUE@     $(SIM_COMMON_LIBS)
2107
2108 @SIM_ENABLE_ARCH_cr16_TRUE@cr16_BUILD_OUTPUTS = \
2109 @SIM_ENABLE_ARCH_cr16_TRUE@     cr16/gencode$(EXEEXT) \
2110 @SIM_ENABLE_ARCH_cr16_TRUE@     cr16/table.c
2111
2112 @SIM_ENABLE_ARCH_cr16_TRUE@cr16_gencode_SOURCES = cr16/gencode.c
2113 @SIM_ENABLE_ARCH_cr16_TRUE@cr16_gencode_LDADD = cr16/cr16-opc.o
2114 @SIM_ENABLE_ARCH_cris_TRUE@cris_libsim_a_SOURCES =
2115 @SIM_ENABLE_ARCH_cris_TRUE@cris_libsim_a_LIBADD = \
2116 @SIM_ENABLE_ARCH_cris_TRUE@     $(common_libcommon_a_OBJECTS) \
2117 @SIM_ENABLE_ARCH_cris_TRUE@     $(patsubst %,cris/%,$(SIM_NEW_COMMON_OBJS)) \
2118 @SIM_ENABLE_ARCH_cris_TRUE@     $(patsubst %,cris/dv-%.o,$(SIM_HW_DEVICES)) \
2119 @SIM_ENABLE_ARCH_cris_TRUE@     $(patsubst %,cris/dv-%.o,$(cris_SIM_EXTRA_HW_DEVICES)) \
2120 @SIM_ENABLE_ARCH_cris_TRUE@     cris/modules.o \
2121 @SIM_ENABLE_ARCH_cris_TRUE@     \
2122 @SIM_ENABLE_ARCH_cris_TRUE@     cris/cgen-run.o \
2123 @SIM_ENABLE_ARCH_cris_TRUE@     cris/cgen-scache.o \
2124 @SIM_ENABLE_ARCH_cris_TRUE@     cris/cgen-trace.o \
2125 @SIM_ENABLE_ARCH_cris_TRUE@     cris/cgen-utils.o \
2126 @SIM_ENABLE_ARCH_cris_TRUE@     \
2127 @SIM_ENABLE_ARCH_cris_TRUE@     cris/arch.o \
2128 @SIM_ENABLE_ARCH_cris_TRUE@     cris/crisv10f.o \
2129 @SIM_ENABLE_ARCH_cris_TRUE@     cris/cpuv10.o \
2130 @SIM_ENABLE_ARCH_cris_TRUE@     cris/decodev10.o \
2131 @SIM_ENABLE_ARCH_cris_TRUE@     cris/modelv10.o \
2132 @SIM_ENABLE_ARCH_cris_TRUE@     cris/mloopv10f.o \
2133 @SIM_ENABLE_ARCH_cris_TRUE@     cris/crisv32f.o \
2134 @SIM_ENABLE_ARCH_cris_TRUE@     cris/cpuv32.o \
2135 @SIM_ENABLE_ARCH_cris_TRUE@     cris/decodev32.o \
2136 @SIM_ENABLE_ARCH_cris_TRUE@     cris/modelv32.o \
2137 @SIM_ENABLE_ARCH_cris_TRUE@     cris/mloopv32f.o \
2138 @SIM_ENABLE_ARCH_cris_TRUE@     \
2139 @SIM_ENABLE_ARCH_cris_TRUE@     cris/sim-if.o \
2140 @SIM_ENABLE_ARCH_cris_TRUE@     cris/traps.o
2141
2142 @SIM_ENABLE_ARCH_cris_TRUE@cris_run_SOURCES =
2143 @SIM_ENABLE_ARCH_cris_TRUE@cris_run_LDADD = \
2144 @SIM_ENABLE_ARCH_cris_TRUE@     cris/nrun.o \
2145 @SIM_ENABLE_ARCH_cris_TRUE@     cris/libsim.a \
2146 @SIM_ENABLE_ARCH_cris_TRUE@     $(SIM_COMMON_LIBS)
2147
2148 @SIM_ENABLE_ARCH_cris_TRUE@cris_SIM_EXTRA_HW_DEVICES = rv cris cris_900000xx
2149 @SIM_ENABLE_ARCH_cris_TRUE@cris_rvdummy_SOURCES = cris/rvdummy.c
2150 @SIM_ENABLE_ARCH_cris_TRUE@cris_rvdummy_LDADD = $(LIBIBERTY_LIB)
2151 @SIM_ENABLE_ARCH_cris_TRUE@cris_BUILD_OUTPUTS = \
2152 @SIM_ENABLE_ARCH_cris_TRUE@     cris/mloopv10f.c \
2153 @SIM_ENABLE_ARCH_cris_TRUE@     cris/stamp-mloop-v10f \
2154 @SIM_ENABLE_ARCH_cris_TRUE@     cris/mloopv32f.c \
2155 @SIM_ENABLE_ARCH_cris_TRUE@     cris/stamp-mloop-v32f
2156
2157 @SIM_ENABLE_ARCH_d10v_TRUE@d10v_libsim_a_SOURCES =
2158 @SIM_ENABLE_ARCH_d10v_TRUE@d10v_libsim_a_LIBADD = \
2159 @SIM_ENABLE_ARCH_d10v_TRUE@     $(common_libcommon_a_OBJECTS) \
2160 @SIM_ENABLE_ARCH_d10v_TRUE@     d10v/interp.o \
2161 @SIM_ENABLE_ARCH_d10v_TRUE@     $(patsubst %,d10v/%,$(SIM_NEW_COMMON_OBJS)) \
2162 @SIM_ENABLE_ARCH_d10v_TRUE@     $(patsubst %,d10v/dv-%.o,$(SIM_HW_DEVICES)) \
2163 @SIM_ENABLE_ARCH_d10v_TRUE@     d10v/endian.o \
2164 @SIM_ENABLE_ARCH_d10v_TRUE@     d10v/modules.o \
2165 @SIM_ENABLE_ARCH_d10v_TRUE@     d10v/sim-resume.o \
2166 @SIM_ENABLE_ARCH_d10v_TRUE@     d10v/simops.o \
2167 @SIM_ENABLE_ARCH_d10v_TRUE@     d10v/table.o
2168
2169 @SIM_ENABLE_ARCH_d10v_TRUE@d10v_run_SOURCES =
2170 @SIM_ENABLE_ARCH_d10v_TRUE@d10v_run_LDADD = \
2171 @SIM_ENABLE_ARCH_d10v_TRUE@     d10v/nrun.o \
2172 @SIM_ENABLE_ARCH_d10v_TRUE@     d10v/libsim.a \
2173 @SIM_ENABLE_ARCH_d10v_TRUE@     $(SIM_COMMON_LIBS)
2174
2175 @SIM_ENABLE_ARCH_d10v_TRUE@d10v_BUILD_OUTPUTS = \
2176 @SIM_ENABLE_ARCH_d10v_TRUE@     d10v/gencode$(EXEEXT) \
2177 @SIM_ENABLE_ARCH_d10v_TRUE@     d10v/table.c
2178
2179 @SIM_ENABLE_ARCH_d10v_TRUE@d10v_gencode_SOURCES = d10v/gencode.c
2180 @SIM_ENABLE_ARCH_d10v_TRUE@d10v_gencode_LDADD = d10v/d10v-opc.o
2181 @SIM_ENABLE_ARCH_erc32_TRUE@erc32_libsim_a_SOURCES =
2182 @SIM_ENABLE_ARCH_erc32_TRUE@erc32_libsim_a_LIBADD = \
2183 @SIM_ENABLE_ARCH_erc32_TRUE@    $(common_libcommon_a_OBJECTS) \
2184 @SIM_ENABLE_ARCH_erc32_TRUE@    erc32/erc32.o \
2185 @SIM_ENABLE_ARCH_erc32_TRUE@    erc32/exec.o \
2186 @SIM_ENABLE_ARCH_erc32_TRUE@    erc32/float.o \
2187 @SIM_ENABLE_ARCH_erc32_TRUE@    erc32/func.o \
2188 @SIM_ENABLE_ARCH_erc32_TRUE@    erc32/help.o \
2189 @SIM_ENABLE_ARCH_erc32_TRUE@    erc32/interf.o \
2190 @SIM_ENABLE_ARCH_erc32_TRUE@    erc32/modules.o
2191
2192 @SIM_ENABLE_ARCH_erc32_TRUE@erc32_run_SOURCES =
2193 @SIM_ENABLE_ARCH_erc32_TRUE@erc32_run_LDADD = \
2194 @SIM_ENABLE_ARCH_erc32_TRUE@    erc32/sis.o \
2195 @SIM_ENABLE_ARCH_erc32_TRUE@    erc32/libsim.a \
2196 @SIM_ENABLE_ARCH_erc32_TRUE@    $(SIM_COMMON_LIBS) $(READLINE_LIB) $(TERMCAP_LIB)
2197
2198 @SIM_ENABLE_ARCH_erc32_TRUE@erc32docdir = $(docdir)/erc32
2199 @SIM_ENABLE_ARCH_erc32_TRUE@erc32doc_DATA = erc32/README.erc32 erc32/README.gdb erc32/README.sis
2200 @SIM_ENABLE_ARCH_examples_TRUE@example_synacor_libsim_a_SOURCES =
2201 @SIM_ENABLE_ARCH_examples_TRUE@example_synacor_libsim_a_LIBADD = \
2202 @SIM_ENABLE_ARCH_examples_TRUE@ $(common_libcommon_a_OBJECTS) \
2203 @SIM_ENABLE_ARCH_examples_TRUE@ $(patsubst %,example-synacor/%,$(SIM_NEW_COMMON_OBJS)) \
2204 @SIM_ENABLE_ARCH_examples_TRUE@ $(patsubst %,example-synacor/dv-%.o,$(SIM_HW_DEVICES)) \
2205 @SIM_ENABLE_ARCH_examples_TRUE@ example-synacor/interp.o \
2206 @SIM_ENABLE_ARCH_examples_TRUE@ example-synacor/modules.o \
2207 @SIM_ENABLE_ARCH_examples_TRUE@ example-synacor/sim-main.o \
2208 @SIM_ENABLE_ARCH_examples_TRUE@ example-synacor/sim-resume.o
2209
2210 @SIM_ENABLE_ARCH_examples_TRUE@example_synacor_run_SOURCES =
2211 @SIM_ENABLE_ARCH_examples_TRUE@example_synacor_run_LDADD = \
2212 @SIM_ENABLE_ARCH_examples_TRUE@ example-synacor/nrun.o \
2213 @SIM_ENABLE_ARCH_examples_TRUE@ example-synacor/libsim.a \
2214 @SIM_ENABLE_ARCH_examples_TRUE@ $(SIM_COMMON_LIBS)
2215
2216 @SIM_ENABLE_ARCH_frv_TRUE@frv_libsim_a_SOURCES =
2217 @SIM_ENABLE_ARCH_frv_TRUE@frv_libsim_a_LIBADD = \
2218 @SIM_ENABLE_ARCH_frv_TRUE@      $(common_libcommon_a_OBJECTS) \
2219 @SIM_ENABLE_ARCH_frv_TRUE@      $(patsubst %,frv/%,$(SIM_NEW_COMMON_OBJS)) \
2220 @SIM_ENABLE_ARCH_frv_TRUE@      $(patsubst %,frv/dv-%.o,$(SIM_HW_DEVICES)) \
2221 @SIM_ENABLE_ARCH_frv_TRUE@      frv/modules.o \
2222 @SIM_ENABLE_ARCH_frv_TRUE@      \
2223 @SIM_ENABLE_ARCH_frv_TRUE@      frv/cgen-accfp.o \
2224 @SIM_ENABLE_ARCH_frv_TRUE@      frv/cgen-fpu.o \
2225 @SIM_ENABLE_ARCH_frv_TRUE@      frv/cgen-run.o \
2226 @SIM_ENABLE_ARCH_frv_TRUE@      frv/cgen-scache.o \
2227 @SIM_ENABLE_ARCH_frv_TRUE@      frv/cgen-trace.o \
2228 @SIM_ENABLE_ARCH_frv_TRUE@      frv/cgen-utils.o \
2229 @SIM_ENABLE_ARCH_frv_TRUE@      \
2230 @SIM_ENABLE_ARCH_frv_TRUE@      frv/arch.o \
2231 @SIM_ENABLE_ARCH_frv_TRUE@      frv/cgen-par.o \
2232 @SIM_ENABLE_ARCH_frv_TRUE@      frv/cpu.o \
2233 @SIM_ENABLE_ARCH_frv_TRUE@      frv/decode.o \
2234 @SIM_ENABLE_ARCH_frv_TRUE@      frv/frv.o \
2235 @SIM_ENABLE_ARCH_frv_TRUE@      frv/mloop.o \
2236 @SIM_ENABLE_ARCH_frv_TRUE@      frv/model.o \
2237 @SIM_ENABLE_ARCH_frv_TRUE@      frv/sem.o \
2238 @SIM_ENABLE_ARCH_frv_TRUE@      \
2239 @SIM_ENABLE_ARCH_frv_TRUE@      frv/cache.o \
2240 @SIM_ENABLE_ARCH_frv_TRUE@      frv/interrupts.o \
2241 @SIM_ENABLE_ARCH_frv_TRUE@      frv/memory.o \
2242 @SIM_ENABLE_ARCH_frv_TRUE@      frv/options.o \
2243 @SIM_ENABLE_ARCH_frv_TRUE@      frv/pipeline.o \
2244 @SIM_ENABLE_ARCH_frv_TRUE@      frv/profile.o \
2245 @SIM_ENABLE_ARCH_frv_TRUE@      frv/profile-fr400.o \
2246 @SIM_ENABLE_ARCH_frv_TRUE@      frv/profile-fr450.o \
2247 @SIM_ENABLE_ARCH_frv_TRUE@      frv/profile-fr500.o \
2248 @SIM_ENABLE_ARCH_frv_TRUE@      frv/profile-fr550.o \
2249 @SIM_ENABLE_ARCH_frv_TRUE@      frv/registers.o \
2250 @SIM_ENABLE_ARCH_frv_TRUE@      frv/reset.o \
2251 @SIM_ENABLE_ARCH_frv_TRUE@      frv/sim-if.o \
2252 @SIM_ENABLE_ARCH_frv_TRUE@      frv/traps.o
2253
2254 @SIM_ENABLE_ARCH_frv_TRUE@frv_run_SOURCES =
2255 @SIM_ENABLE_ARCH_frv_TRUE@frv_run_LDADD = \
2256 @SIM_ENABLE_ARCH_frv_TRUE@      frv/nrun.o \
2257 @SIM_ENABLE_ARCH_frv_TRUE@      frv/libsim.a \
2258 @SIM_ENABLE_ARCH_frv_TRUE@      $(SIM_COMMON_LIBS)
2259
2260 @SIM_ENABLE_ARCH_frv_TRUE@frvdocdir = $(docdir)/frv
2261 @SIM_ENABLE_ARCH_frv_TRUE@frvdoc_DATA = frv/README
2262 @SIM_ENABLE_ARCH_frv_TRUE@frv_BUILD_OUTPUTS = \
2263 @SIM_ENABLE_ARCH_frv_TRUE@      frv/mloop.c \
2264 @SIM_ENABLE_ARCH_frv_TRUE@      frv/stamp-mloop
2265
2266 @SIM_ENABLE_ARCH_ft32_TRUE@ft32_libsim_a_SOURCES =
2267 @SIM_ENABLE_ARCH_ft32_TRUE@ft32_libsim_a_LIBADD = \
2268 @SIM_ENABLE_ARCH_ft32_TRUE@     $(common_libcommon_a_OBJECTS) \
2269 @SIM_ENABLE_ARCH_ft32_TRUE@     $(patsubst %,ft32/%,$(SIM_NEW_COMMON_OBJS)) \
2270 @SIM_ENABLE_ARCH_ft32_TRUE@     $(patsubst %,ft32/dv-%.o,$(SIM_HW_DEVICES)) \
2271 @SIM_ENABLE_ARCH_ft32_TRUE@     ft32/interp.o \
2272 @SIM_ENABLE_ARCH_ft32_TRUE@     ft32/modules.o \
2273 @SIM_ENABLE_ARCH_ft32_TRUE@     ft32/sim-resume.o
2274
2275 @SIM_ENABLE_ARCH_ft32_TRUE@ft32_run_SOURCES =
2276 @SIM_ENABLE_ARCH_ft32_TRUE@ft32_run_LDADD = \
2277 @SIM_ENABLE_ARCH_ft32_TRUE@     ft32/nrun.o \
2278 @SIM_ENABLE_ARCH_ft32_TRUE@     ft32/libsim.a \
2279 @SIM_ENABLE_ARCH_ft32_TRUE@     $(SIM_COMMON_LIBS)
2280
2281 @SIM_ENABLE_ARCH_h8300_TRUE@h8300_libsim_a_SOURCES =
2282 @SIM_ENABLE_ARCH_h8300_TRUE@h8300_libsim_a_LIBADD = \
2283 @SIM_ENABLE_ARCH_h8300_TRUE@    $(common_libcommon_a_OBJECTS) \
2284 @SIM_ENABLE_ARCH_h8300_TRUE@    h8300/compile.o \
2285 @SIM_ENABLE_ARCH_h8300_TRUE@    $(patsubst %,h8300/%,$(SIM_NEW_COMMON_OBJS)) \
2286 @SIM_ENABLE_ARCH_h8300_TRUE@    $(patsubst %,h8300/dv-%.o,$(SIM_HW_DEVICES)) \
2287 @SIM_ENABLE_ARCH_h8300_TRUE@    h8300/modules.o \
2288 @SIM_ENABLE_ARCH_h8300_TRUE@    h8300/sim-resume.o
2289
2290 @SIM_ENABLE_ARCH_h8300_TRUE@h8300_run_SOURCES =
2291 @SIM_ENABLE_ARCH_h8300_TRUE@h8300_run_LDADD = \
2292 @SIM_ENABLE_ARCH_h8300_TRUE@    h8300/nrun.o \
2293 @SIM_ENABLE_ARCH_h8300_TRUE@    h8300/libsim.a \
2294 @SIM_ENABLE_ARCH_h8300_TRUE@    $(SIM_COMMON_LIBS)
2295
2296 @SIM_ENABLE_ARCH_iq2000_TRUE@iq2000_libsim_a_SOURCES =
2297 @SIM_ENABLE_ARCH_iq2000_TRUE@iq2000_libsim_a_LIBADD = \
2298 @SIM_ENABLE_ARCH_iq2000_TRUE@   $(common_libcommon_a_OBJECTS) \
2299 @SIM_ENABLE_ARCH_iq2000_TRUE@   $(patsubst %,iq2000/%,$(SIM_NEW_COMMON_OBJS)) \
2300 @SIM_ENABLE_ARCH_iq2000_TRUE@   $(patsubst %,iq2000/dv-%.o,$(SIM_HW_DEVICES)) \
2301 @SIM_ENABLE_ARCH_iq2000_TRUE@   iq2000/modules.o \
2302 @SIM_ENABLE_ARCH_iq2000_TRUE@   \
2303 @SIM_ENABLE_ARCH_iq2000_TRUE@   iq2000/cgen-run.o \
2304 @SIM_ENABLE_ARCH_iq2000_TRUE@   iq2000/cgen-scache.o \
2305 @SIM_ENABLE_ARCH_iq2000_TRUE@   iq2000/cgen-trace.o \
2306 @SIM_ENABLE_ARCH_iq2000_TRUE@   iq2000/cgen-utils.o \
2307 @SIM_ENABLE_ARCH_iq2000_TRUE@   \
2308 @SIM_ENABLE_ARCH_iq2000_TRUE@   iq2000/arch.o \
2309 @SIM_ENABLE_ARCH_iq2000_TRUE@   iq2000/cpu.o \
2310 @SIM_ENABLE_ARCH_iq2000_TRUE@   iq2000/decode.o \
2311 @SIM_ENABLE_ARCH_iq2000_TRUE@   iq2000/iq2000.o \
2312 @SIM_ENABLE_ARCH_iq2000_TRUE@   iq2000/sem.o \
2313 @SIM_ENABLE_ARCH_iq2000_TRUE@   iq2000/mloop.o \
2314 @SIM_ENABLE_ARCH_iq2000_TRUE@   iq2000/model.o \
2315 @SIM_ENABLE_ARCH_iq2000_TRUE@   \
2316 @SIM_ENABLE_ARCH_iq2000_TRUE@   iq2000/sim-if.o
2317
2318 @SIM_ENABLE_ARCH_iq2000_TRUE@iq2000_run_SOURCES =
2319 @SIM_ENABLE_ARCH_iq2000_TRUE@iq2000_run_LDADD = \
2320 @SIM_ENABLE_ARCH_iq2000_TRUE@   iq2000/nrun.o \
2321 @SIM_ENABLE_ARCH_iq2000_TRUE@   iq2000/libsim.a \
2322 @SIM_ENABLE_ARCH_iq2000_TRUE@   $(SIM_COMMON_LIBS)
2323
2324 @SIM_ENABLE_ARCH_iq2000_TRUE@iq2000_BUILD_OUTPUTS = \
2325 @SIM_ENABLE_ARCH_iq2000_TRUE@   iq2000/mloop.c \
2326 @SIM_ENABLE_ARCH_iq2000_TRUE@   iq2000/stamp-mloop
2327
2328 @SIM_ENABLE_ARCH_lm32_TRUE@lm32_libsim_a_SOURCES =
2329 @SIM_ENABLE_ARCH_lm32_TRUE@lm32_libsim_a_LIBADD = \
2330 @SIM_ENABLE_ARCH_lm32_TRUE@     $(common_libcommon_a_OBJECTS) \
2331 @SIM_ENABLE_ARCH_lm32_TRUE@     $(patsubst %,lm32/%,$(SIM_NEW_COMMON_OBJS)) \
2332 @SIM_ENABLE_ARCH_lm32_TRUE@     $(patsubst %,lm32/dv-%.o,$(SIM_HW_DEVICES)) \
2333 @SIM_ENABLE_ARCH_lm32_TRUE@     $(patsubst %,lm32/dv-%.o,$(lm32_SIM_EXTRA_HW_DEVICES)) \
2334 @SIM_ENABLE_ARCH_lm32_TRUE@     lm32/modules.o \
2335 @SIM_ENABLE_ARCH_lm32_TRUE@     \
2336 @SIM_ENABLE_ARCH_lm32_TRUE@     lm32/cgen-run.o \
2337 @SIM_ENABLE_ARCH_lm32_TRUE@     lm32/cgen-scache.o \
2338 @SIM_ENABLE_ARCH_lm32_TRUE@     lm32/cgen-trace.o \
2339 @SIM_ENABLE_ARCH_lm32_TRUE@     lm32/cgen-utils.o \
2340 @SIM_ENABLE_ARCH_lm32_TRUE@     \
2341 @SIM_ENABLE_ARCH_lm32_TRUE@     lm32/arch.o \
2342 @SIM_ENABLE_ARCH_lm32_TRUE@     lm32/cpu.o \
2343 @SIM_ENABLE_ARCH_lm32_TRUE@     lm32/decode.o \
2344 @SIM_ENABLE_ARCH_lm32_TRUE@     lm32/sem.o \
2345 @SIM_ENABLE_ARCH_lm32_TRUE@     lm32/mloop.o \
2346 @SIM_ENABLE_ARCH_lm32_TRUE@     lm32/model.o \
2347 @SIM_ENABLE_ARCH_lm32_TRUE@     \
2348 @SIM_ENABLE_ARCH_lm32_TRUE@     lm32/lm32.o \
2349 @SIM_ENABLE_ARCH_lm32_TRUE@     lm32/sim-if.o \
2350 @SIM_ENABLE_ARCH_lm32_TRUE@     lm32/traps.o \
2351 @SIM_ENABLE_ARCH_lm32_TRUE@     lm32/user.o
2352
2353 @SIM_ENABLE_ARCH_lm32_TRUE@lm32_run_SOURCES =
2354 @SIM_ENABLE_ARCH_lm32_TRUE@lm32_run_LDADD = \
2355 @SIM_ENABLE_ARCH_lm32_TRUE@     lm32/nrun.o \
2356 @SIM_ENABLE_ARCH_lm32_TRUE@     lm32/libsim.a \
2357 @SIM_ENABLE_ARCH_lm32_TRUE@     $(SIM_COMMON_LIBS)
2358
2359 @SIM_ENABLE_ARCH_lm32_TRUE@lm32_SIM_EXTRA_HW_DEVICES = lm32cpu lm32timer lm32uart
2360 @SIM_ENABLE_ARCH_lm32_TRUE@lm32_BUILD_OUTPUTS = \
2361 @SIM_ENABLE_ARCH_lm32_TRUE@     lm32/mloop.c \
2362 @SIM_ENABLE_ARCH_lm32_TRUE@     lm32/stamp-mloop
2363
2364 @SIM_ENABLE_ARCH_m32c_TRUE@m32c_libsim_a_SOURCES =
2365 @SIM_ENABLE_ARCH_m32c_TRUE@m32c_libsim_a_LIBADD = \
2366 @SIM_ENABLE_ARCH_m32c_TRUE@     $(common_libcommon_a_OBJECTS) \
2367 @SIM_ENABLE_ARCH_m32c_TRUE@     m32c/gdb-if.o \
2368 @SIM_ENABLE_ARCH_m32c_TRUE@     m32c/int.o \
2369 @SIM_ENABLE_ARCH_m32c_TRUE@     m32c/load.o \
2370 @SIM_ENABLE_ARCH_m32c_TRUE@     m32c/m32c.o \
2371 @SIM_ENABLE_ARCH_m32c_TRUE@     m32c/mem.o \
2372 @SIM_ENABLE_ARCH_m32c_TRUE@     m32c/misc.o \
2373 @SIM_ENABLE_ARCH_m32c_TRUE@     m32c/modules.o \
2374 @SIM_ENABLE_ARCH_m32c_TRUE@     m32c/r8c.o \
2375 @SIM_ENABLE_ARCH_m32c_TRUE@     m32c/reg.o \
2376 @SIM_ENABLE_ARCH_m32c_TRUE@     m32c/srcdest.o \
2377 @SIM_ENABLE_ARCH_m32c_TRUE@     m32c/syscalls.o \
2378 @SIM_ENABLE_ARCH_m32c_TRUE@     m32c/trace.o
2379
2380 @SIM_ENABLE_ARCH_m32c_TRUE@m32c_run_SOURCES =
2381 @SIM_ENABLE_ARCH_m32c_TRUE@m32c_run_LDADD = \
2382 @SIM_ENABLE_ARCH_m32c_TRUE@     m32c/main.o \
2383 @SIM_ENABLE_ARCH_m32c_TRUE@     m32c/libsim.a \
2384 @SIM_ENABLE_ARCH_m32c_TRUE@     $(SIM_COMMON_LIBS)
2385
2386 @SIM_ENABLE_ARCH_m32c_TRUE@m32c_BUILD_OUTPUTS = \
2387 @SIM_ENABLE_ARCH_m32c_TRUE@     m32c/opc2c$(EXEEXT) \
2388 @SIM_ENABLE_ARCH_m32c_TRUE@     m32c/m32c.c \
2389 @SIM_ENABLE_ARCH_m32c_TRUE@     m32c/r8c.c
2390
2391 @SIM_ENABLE_ARCH_m32c_TRUE@m32c_opc2c_SOURCES = m32c/opc2c.c
2392
2393 # opc2c leaks memory, and therefore makes AddressSanitizer unhappy.  Disable
2394 # leak detection while running it.
2395 @SIM_ENABLE_ARCH_m32c_TRUE@m32c_OPC2C_RUN = ASAN_OPTIONS=detect_leaks=0 m32c/opc2c$(EXEEXT)
2396 @SIM_ENABLE_ARCH_m32r_TRUE@m32r_libsim_a_SOURCES =
2397 @SIM_ENABLE_ARCH_m32r_TRUE@m32r_libsim_a_LIBADD = \
2398 @SIM_ENABLE_ARCH_m32r_TRUE@     $(common_libcommon_a_OBJECTS) \
2399 @SIM_ENABLE_ARCH_m32r_TRUE@     $(patsubst %,m32r/%,$(SIM_NEW_COMMON_OBJS)) \
2400 @SIM_ENABLE_ARCH_m32r_TRUE@     $(patsubst %,m32r/dv-%.o,$(SIM_HW_DEVICES)) \
2401 @SIM_ENABLE_ARCH_m32r_TRUE@     $(patsubst %,m32r/dv-%.o,$(m32r_SIM_EXTRA_HW_DEVICES)) \
2402 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/modules.o \
2403 @SIM_ENABLE_ARCH_m32r_TRUE@     \
2404 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/cgen-run.o \
2405 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/cgen-scache.o \
2406 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/cgen-trace.o \
2407 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/cgen-utils.o \
2408 @SIM_ENABLE_ARCH_m32r_TRUE@     \
2409 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/arch.o \
2410 @SIM_ENABLE_ARCH_m32r_TRUE@     \
2411 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/m32r.o \
2412 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/cpu.o \
2413 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/decode.o \
2414 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/sem.o \
2415 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/model.o \
2416 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/mloop.o \
2417 @SIM_ENABLE_ARCH_m32r_TRUE@     \
2418 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/m32rx.o \
2419 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/cpux.o \
2420 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/decodex.o \
2421 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/modelx.o \
2422 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/mloopx.o \
2423 @SIM_ENABLE_ARCH_m32r_TRUE@     \
2424 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/m32r2.o \
2425 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/cpu2.o \
2426 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/decode2.o \
2427 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/model2.o \
2428 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/mloop2.o \
2429 @SIM_ENABLE_ARCH_m32r_TRUE@     \
2430 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/sim-if.o \
2431 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/traps.o
2432
2433 @SIM_ENABLE_ARCH_m32r_TRUE@m32r_run_SOURCES =
2434 @SIM_ENABLE_ARCH_m32r_TRUE@m32r_run_LDADD = \
2435 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/nrun.o \
2436 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/libsim.a \
2437 @SIM_ENABLE_ARCH_m32r_TRUE@     $(SIM_COMMON_LIBS)
2438
2439 @SIM_ENABLE_ARCH_m32r_TRUE@m32r_SIM_EXTRA_HW_DEVICES = m32r_cache m32r_uart
2440 @SIM_ENABLE_ARCH_m32r_TRUE@m32r_BUILD_OUTPUTS = \
2441 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/mloop.c \
2442 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/stamp-mloop \
2443 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/mloopx.c \
2444 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/stamp-mloop-x \
2445 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/mloop2.c \
2446 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/stamp-mloop-2
2447
2448 @SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11_libsim_a_SOURCES =
2449 @SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11_libsim_a_LIBADD = \
2450 @SIM_ENABLE_ARCH_m68hc11_TRUE@  $(common_libcommon_a_OBJECTS) \
2451 @SIM_ENABLE_ARCH_m68hc11_TRUE@  m68hc11/interp.o \
2452 @SIM_ENABLE_ARCH_m68hc11_TRUE@  m68hc11/m68hc11int.o \
2453 @SIM_ENABLE_ARCH_m68hc11_TRUE@  m68hc11/m68hc12int.o \
2454 @SIM_ENABLE_ARCH_m68hc11_TRUE@  m68hc11/emulos.o \
2455 @SIM_ENABLE_ARCH_m68hc11_TRUE@  m68hc11/interrupts.o \
2456 @SIM_ENABLE_ARCH_m68hc11_TRUE@  m68hc11/m68hc11_sim.o \
2457 @SIM_ENABLE_ARCH_m68hc11_TRUE@  $(patsubst %,m68hc11/%,$(SIM_NEW_COMMON_OBJS)) \
2458 @SIM_ENABLE_ARCH_m68hc11_TRUE@  $(patsubst %,m68hc11/dv-%.o,$(SIM_HW_DEVICES)) \
2459 @SIM_ENABLE_ARCH_m68hc11_TRUE@  $(patsubst %,m68hc11/dv-%.o,$(m68hc11_SIM_EXTRA_HW_DEVICES)) \
2460 @SIM_ENABLE_ARCH_m68hc11_TRUE@  m68hc11/modules.o \
2461 @SIM_ENABLE_ARCH_m68hc11_TRUE@  m68hc11/sim-resume.o
2462
2463 @SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11_run_SOURCES =
2464 @SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11_run_LDADD = \
2465 @SIM_ENABLE_ARCH_m68hc11_TRUE@  m68hc11/nrun.o \
2466 @SIM_ENABLE_ARCH_m68hc11_TRUE@  m68hc11/libsim.a \
2467 @SIM_ENABLE_ARCH_m68hc11_TRUE@  $(SIM_COMMON_LIBS)
2468
2469 @SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11_SIM_EXTRA_HW_DEVICES = m68hc11 m68hc11sio m68hc11eepr m68hc11tim m68hc11spi nvram
2470 @SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11_BUILD_OUTPUTS = \
2471 @SIM_ENABLE_ARCH_m68hc11_TRUE@  m68hc11/gencode$(EXEEXT) \
2472 @SIM_ENABLE_ARCH_m68hc11_TRUE@  m68hc11/m68hc11int.c \
2473 @SIM_ENABLE_ARCH_m68hc11_TRUE@  m68hc11/m68hc12int.c
2474
2475 @SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11_gencode_SOURCES = m68hc11/gencode.c
2476 @SIM_ENABLE_ARCH_mcore_TRUE@mcore_libsim_a_SOURCES =
2477 @SIM_ENABLE_ARCH_mcore_TRUE@mcore_libsim_a_LIBADD = \
2478 @SIM_ENABLE_ARCH_mcore_TRUE@    $(common_libcommon_a_OBJECTS) \
2479 @SIM_ENABLE_ARCH_mcore_TRUE@    mcore/interp.o \
2480 @SIM_ENABLE_ARCH_mcore_TRUE@    $(patsubst %,mcore/%,$(SIM_NEW_COMMON_OBJS)) \
2481 @SIM_ENABLE_ARCH_mcore_TRUE@    $(patsubst %,mcore/dv-%.o,$(SIM_HW_DEVICES)) \
2482 @SIM_ENABLE_ARCH_mcore_TRUE@    mcore/modules.o \
2483 @SIM_ENABLE_ARCH_mcore_TRUE@    mcore/sim-resume.o
2484
2485 @SIM_ENABLE_ARCH_mcore_TRUE@mcore_run_SOURCES =
2486 @SIM_ENABLE_ARCH_mcore_TRUE@mcore_run_LDADD = \
2487 @SIM_ENABLE_ARCH_mcore_TRUE@    mcore/nrun.o \
2488 @SIM_ENABLE_ARCH_mcore_TRUE@    mcore/libsim.a \
2489 @SIM_ENABLE_ARCH_mcore_TRUE@    $(SIM_COMMON_LIBS)
2490
2491 @SIM_ENABLE_ARCH_microblaze_TRUE@microblaze_libsim_a_SOURCES =
2492 @SIM_ENABLE_ARCH_microblaze_TRUE@microblaze_libsim_a_LIBADD = \
2493 @SIM_ENABLE_ARCH_microblaze_TRUE@       $(common_libcommon_a_OBJECTS) \
2494 @SIM_ENABLE_ARCH_microblaze_TRUE@       microblaze/interp.o \
2495 @SIM_ENABLE_ARCH_microblaze_TRUE@       $(patsubst %,microblaze/%,$(SIM_NEW_COMMON_OBJS)) \
2496 @SIM_ENABLE_ARCH_microblaze_TRUE@       $(patsubst %,microblaze/dv-%.o,$(SIM_HW_DEVICES)) \
2497 @SIM_ENABLE_ARCH_microblaze_TRUE@       microblaze/modules.o \
2498 @SIM_ENABLE_ARCH_microblaze_TRUE@       microblaze/sim-resume.o
2499
2500 @SIM_ENABLE_ARCH_microblaze_TRUE@microblaze_run_SOURCES =
2501 @SIM_ENABLE_ARCH_microblaze_TRUE@microblaze_run_LDADD = \
2502 @SIM_ENABLE_ARCH_microblaze_TRUE@       microblaze/nrun.o \
2503 @SIM_ENABLE_ARCH_microblaze_TRUE@       microblaze/libsim.a \
2504 @SIM_ENABLE_ARCH_microblaze_TRUE@       $(SIM_COMMON_LIBS)
2505
2506 @SIM_ENABLE_ARCH_mips_TRUE@mips_GEN_OBJ = $(am__append_88) \
2507 @SIM_ENABLE_ARCH_mips_TRUE@     $(am__append_89) $(am__append_90)
2508 @SIM_ENABLE_ARCH_mips_TRUE@mips_libsim_a_SOURCES =
2509 @SIM_ENABLE_ARCH_mips_TRUE@mips_libsim_a_LIBADD = \
2510 @SIM_ENABLE_ARCH_mips_TRUE@     $(common_libcommon_a_OBJECTS) \
2511 @SIM_ENABLE_ARCH_mips_TRUE@     mips/interp.o \
2512 @SIM_ENABLE_ARCH_mips_TRUE@     $(mips_GEN_OBJ) \
2513 @SIM_ENABLE_ARCH_mips_TRUE@     $(patsubst %,mips/%,$(SIM_NEW_COMMON_OBJS)) \
2514 @SIM_ENABLE_ARCH_mips_TRUE@     $(patsubst %,mips/dv-%.o,$(SIM_HW_DEVICES)) \
2515 @SIM_ENABLE_ARCH_mips_TRUE@     $(patsubst %,mips/dv-%.o,$(mips_SIM_EXTRA_HW_DEVICES)) \
2516 @SIM_ENABLE_ARCH_mips_TRUE@     mips/cp1.o \
2517 @SIM_ENABLE_ARCH_mips_TRUE@     mips/dsp.o \
2518 @SIM_ENABLE_ARCH_mips_TRUE@     mips/mdmx.o \
2519 @SIM_ENABLE_ARCH_mips_TRUE@     mips/modules.o \
2520 @SIM_ENABLE_ARCH_mips_TRUE@     mips/sim-main.o \
2521 @SIM_ENABLE_ARCH_mips_TRUE@     mips/sim-resume.o
2522
2523 @SIM_ENABLE_ARCH_mips_TRUE@EXTRA_mips_libsim_a_DEPENDENCIES = $(SIM_MIPS_MULTI_OBJ)
2524 @SIM_ENABLE_ARCH_mips_TRUE@mips_run_SOURCES =
2525 @SIM_ENABLE_ARCH_mips_TRUE@mips_run_LDADD = \
2526 @SIM_ENABLE_ARCH_mips_TRUE@     mips/nrun.o \
2527 @SIM_ENABLE_ARCH_mips_TRUE@     mips/libsim.a \
2528 @SIM_ENABLE_ARCH_mips_TRUE@     $(SIM_COMMON_LIBS)
2529
2530 @SIM_ENABLE_ARCH_mips_TRUE@mips_SIM_EXTRA_HW_DEVICES = tx3904cpu tx3904irc tx3904tmr tx3904sio
2531 @SIM_ENABLE_ARCH_mips_TRUE@mips_BUILT_SRC_FROM_IGEN_ITABLE = \
2532 @SIM_ENABLE_ARCH_mips_TRUE@     mips/itable.h \
2533 @SIM_ENABLE_ARCH_mips_TRUE@     mips/itable.c
2534
2535 @SIM_ENABLE_ARCH_mips_TRUE@mips_BUILT_SRC_FROM_GEN_MODE_SINGLE = \
2536 @SIM_ENABLE_ARCH_mips_TRUE@     mips/icache.h \
2537 @SIM_ENABLE_ARCH_mips_TRUE@     mips/icache.c \
2538 @SIM_ENABLE_ARCH_mips_TRUE@     mips/idecode.h \
2539 @SIM_ENABLE_ARCH_mips_TRUE@     mips/idecode.c \
2540 @SIM_ENABLE_ARCH_mips_TRUE@     mips/semantics.h \
2541 @SIM_ENABLE_ARCH_mips_TRUE@     mips/semantics.c \
2542 @SIM_ENABLE_ARCH_mips_TRUE@     mips/model.h \
2543 @SIM_ENABLE_ARCH_mips_TRUE@     mips/model.c \
2544 @SIM_ENABLE_ARCH_mips_TRUE@     mips/support.h \
2545 @SIM_ENABLE_ARCH_mips_TRUE@     mips/support.c \
2546 @SIM_ENABLE_ARCH_mips_TRUE@     mips/engine.h \
2547 @SIM_ENABLE_ARCH_mips_TRUE@     mips/engine.c \
2548 @SIM_ENABLE_ARCH_mips_TRUE@     mips/irun.c
2549
2550 @SIM_ENABLE_ARCH_mips_TRUE@mips_BUILT_SRC_FROM_GEN_MODE_M16_M16 = \
2551 @SIM_ENABLE_ARCH_mips_TRUE@     mips/m16_icache.h \
2552 @SIM_ENABLE_ARCH_mips_TRUE@     mips/m16_icache.c \
2553 @SIM_ENABLE_ARCH_mips_TRUE@     mips/m16_idecode.h \
2554 @SIM_ENABLE_ARCH_mips_TRUE@     mips/m16_idecode.c \
2555 @SIM_ENABLE_ARCH_mips_TRUE@     mips/m16_semantics.h \
2556 @SIM_ENABLE_ARCH_mips_TRUE@     mips/m16_semantics.c \
2557 @SIM_ENABLE_ARCH_mips_TRUE@     mips/m16_model.h \
2558 @SIM_ENABLE_ARCH_mips_TRUE@     mips/m16_model.c \
2559 @SIM_ENABLE_ARCH_mips_TRUE@     mips/m16_support.h \
2560 @SIM_ENABLE_ARCH_mips_TRUE@     mips/m16_support.c \
2561 @SIM_ENABLE_ARCH_mips_TRUE@mips_BUILT_SRC_FROM_GEN_MODE_M16_M32 = \
2562 @SIM_ENABLE_ARCH_mips_TRUE@     mips/m32_icache.h \
2563 @SIM_ENABLE_ARCH_mips_TRUE@     mips/m32_icache.c \
2564 @SIM_ENABLE_ARCH_mips_TRUE@     mips/m32_idecode.h \
2565 @SIM_ENABLE_ARCH_mips_TRUE@     mips/m32_idecode.c \
2566 @SIM_ENABLE_ARCH_mips_TRUE@     mips/m32_semantics.h \
2567 @SIM_ENABLE_ARCH_mips_TRUE@     mips/m32_semantics.c \
2568 @SIM_ENABLE_ARCH_mips_TRUE@     mips/m32_model.h \
2569 @SIM_ENABLE_ARCH_mips_TRUE@     mips/m32_model.c \
2570 @SIM_ENABLE_ARCH_mips_TRUE@     mips/m32_support.h \
2571 @SIM_ENABLE_ARCH_mips_TRUE@     mips/m32_support.c
2572
2573 @SIM_ENABLE_ARCH_mips_TRUE@mips_BUILD_OUTPUTS =  \
2574 @SIM_ENABLE_ARCH_mips_TRUE@     $(mips_BUILT_SRC_FROM_IGEN_ITABLE) \
2575 @SIM_ENABLE_ARCH_mips_TRUE@     mips/stamp-igen-itable \
2576 @SIM_ENABLE_ARCH_mips_TRUE@     $(am__append_95) $(am__append_96) \
2577 @SIM_ENABLE_ARCH_mips_TRUE@     $(am__append_97)
2578 @SIM_ENABLE_ARCH_mips_TRUE@mips_IGEN_TRACE = # -G omit-line-numbers # -G trace-rule-selection -G trace-rule-rejection -G trace-entries # -G trace-all
2579 @SIM_ENABLE_ARCH_mips_TRUE@mips_IGEN_INSN = $(srcdir)/mips/mips.igen
2580 @SIM_ENABLE_ARCH_mips_TRUE@mips_IGEN_INSN_INC = \
2581 @SIM_ENABLE_ARCH_mips_TRUE@     mips/dsp.igen \
2582 @SIM_ENABLE_ARCH_mips_TRUE@     mips/dsp2.igen \
2583 @SIM_ENABLE_ARCH_mips_TRUE@     mips/m16.igen \
2584 @SIM_ENABLE_ARCH_mips_TRUE@     mips/m16e.igen \
2585 @SIM_ENABLE_ARCH_mips_TRUE@     mips/mdmx.igen \
2586 @SIM_ENABLE_ARCH_mips_TRUE@     mips/micromipsdsp.igen \
2587 @SIM_ENABLE_ARCH_mips_TRUE@     mips/micromips.igen \
2588 @SIM_ENABLE_ARCH_mips_TRUE@     mips/mips3264r2.igen \
2589 @SIM_ENABLE_ARCH_mips_TRUE@     mips/mips3264r6.igen \
2590 @SIM_ENABLE_ARCH_mips_TRUE@     mips/mips3d.igen \
2591 @SIM_ENABLE_ARCH_mips_TRUE@     mips/sb1.igen \
2592 @SIM_ENABLE_ARCH_mips_TRUE@     mips/tx.igen \
2593 @SIM_ENABLE_ARCH_mips_TRUE@     mips/vr.igen
2594
2595 @SIM_ENABLE_ARCH_mips_TRUE@mips_IGEN_DC = $(srcdir)/mips/mips.dc
2596 @SIM_ENABLE_ARCH_mips_TRUE@mips_M16_DC = $(srcdir)/mips/m16.dc
2597 @SIM_ENABLE_ARCH_mips_TRUE@mips_MICROMIPS32_DC = $(srcdir)/mips/micromips.dc
2598 @SIM_ENABLE_ARCH_mips_TRUE@mips_MICROMIPS16_DC = $(srcdir)/mips/micromips16.dc
2599 @SIM_ENABLE_ARCH_mn10300_TRUE@mn10300_libsim_a_SOURCES =
2600 @SIM_ENABLE_ARCH_mn10300_TRUE@mn10300_libsim_a_LIBADD = \
2601 @SIM_ENABLE_ARCH_mn10300_TRUE@  $(common_libcommon_a_OBJECTS) \
2602 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/itable.o \
2603 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/semantics.o \
2604 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/idecode.o \
2605 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/icache.o \
2606 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/engine.o \
2607 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/irun.o \
2608 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/support.o \
2609 @SIM_ENABLE_ARCH_mn10300_TRUE@  $(patsubst %,mn10300/%,$(SIM_NEW_COMMON_OBJS)) \
2610 @SIM_ENABLE_ARCH_mn10300_TRUE@  $(patsubst %,mn10300/dv-%.o,$(SIM_HW_DEVICES)) \
2611 @SIM_ENABLE_ARCH_mn10300_TRUE@  $(patsubst %,mn10300/dv-%.o,$(mn10300_SIM_EXTRA_HW_DEVICES)) \
2612 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/interp.o \
2613 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/modules.o \
2614 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/op_utils.o \
2615 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/sim-resume.o
2616
2617 @SIM_ENABLE_ARCH_mn10300_TRUE@mn10300_run_SOURCES =
2618 @SIM_ENABLE_ARCH_mn10300_TRUE@mn10300_run_LDADD = \
2619 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/nrun.o \
2620 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/libsim.a \
2621 @SIM_ENABLE_ARCH_mn10300_TRUE@  $(SIM_COMMON_LIBS)
2622
2623 @SIM_ENABLE_ARCH_mn10300_TRUE@mn10300_SIM_EXTRA_HW_DEVICES = mn103cpu mn103int mn103tim mn103ser mn103iop
2624 @SIM_ENABLE_ARCH_mn10300_TRUE@mn10300_BUILT_SRC_FROM_IGEN = \
2625 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/icache.h \
2626 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/icache.c \
2627 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/idecode.h \
2628 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/idecode.c \
2629 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/semantics.h \
2630 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/semantics.c \
2631 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/model.h \
2632 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/model.c \
2633 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/support.h \
2634 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/support.c \
2635 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/itable.h \
2636 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/itable.c \
2637 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/engine.h \
2638 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/engine.c \
2639 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/irun.c
2640
2641 @SIM_ENABLE_ARCH_mn10300_TRUE@mn10300_BUILD_OUTPUTS = \
2642 @SIM_ENABLE_ARCH_mn10300_TRUE@  $(mn10300_BUILT_SRC_FROM_IGEN) \
2643 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/stamp-igen
2644
2645 @SIM_ENABLE_ARCH_mn10300_TRUE@mn10300_IGEN_TRACE = # -G omit-line-numbers # -G trace-rule-selection -G trace-rule-rejection -G trace-entries
2646 @SIM_ENABLE_ARCH_mn10300_TRUE@mn10300_IGEN_INSN = $(srcdir)/mn10300/mn10300.igen
2647 @SIM_ENABLE_ARCH_mn10300_TRUE@mn10300_IGEN_INSN_INC = mn10300/am33.igen mn10300/am33-2.igen
2648 @SIM_ENABLE_ARCH_mn10300_TRUE@mn10300_IGEN_DC = $(srcdir)/mn10300/mn10300.dc
2649 @SIM_ENABLE_ARCH_moxie_TRUE@moxie_libsim_a_SOURCES =
2650 @SIM_ENABLE_ARCH_moxie_TRUE@moxie_libsim_a_LIBADD = \
2651 @SIM_ENABLE_ARCH_moxie_TRUE@    $(common_libcommon_a_OBJECTS) \
2652 @SIM_ENABLE_ARCH_moxie_TRUE@    $(patsubst %,moxie/%,$(SIM_NEW_COMMON_OBJS)) \
2653 @SIM_ENABLE_ARCH_moxie_TRUE@    $(patsubst %,moxie/dv-%.o,$(SIM_HW_DEVICES)) \
2654 @SIM_ENABLE_ARCH_moxie_TRUE@    moxie/interp.o \
2655 @SIM_ENABLE_ARCH_moxie_TRUE@    moxie/modules.o \
2656 @SIM_ENABLE_ARCH_moxie_TRUE@    moxie/sim-resume.o
2657
2658 @SIM_ENABLE_ARCH_moxie_TRUE@moxie_run_SOURCES =
2659 @SIM_ENABLE_ARCH_moxie_TRUE@moxie_run_LDADD = \
2660 @SIM_ENABLE_ARCH_moxie_TRUE@    moxie/nrun.o \
2661 @SIM_ENABLE_ARCH_moxie_TRUE@    moxie/libsim.a \
2662 @SIM_ENABLE_ARCH_moxie_TRUE@    $(SIM_COMMON_LIBS)
2663
2664 @SIM_ENABLE_ARCH_moxie_TRUE@dtbdir = $(datadir)/gdb/dtb
2665 @SIM_ENABLE_ARCH_moxie_TRUE@dtb_DATA = moxie/moxie-gdb.dtb
2666 @SIM_ENABLE_ARCH_msp430_TRUE@msp430_libsim_a_SOURCES =
2667 @SIM_ENABLE_ARCH_msp430_TRUE@msp430_libsim_a_LIBADD = \
2668 @SIM_ENABLE_ARCH_msp430_TRUE@   $(common_libcommon_a_OBJECTS) \
2669 @SIM_ENABLE_ARCH_msp430_TRUE@   $(patsubst %,msp430/%,$(SIM_NEW_COMMON_OBJS)) \
2670 @SIM_ENABLE_ARCH_msp430_TRUE@   $(patsubst %,msp430/dv-%.o,$(SIM_HW_DEVICES)) \
2671 @SIM_ENABLE_ARCH_msp430_TRUE@   msp430/msp430-sim.o \
2672 @SIM_ENABLE_ARCH_msp430_TRUE@   msp430/modules.o \
2673 @SIM_ENABLE_ARCH_msp430_TRUE@   msp430/sim-resume.o
2674
2675 @SIM_ENABLE_ARCH_msp430_TRUE@msp430_run_SOURCES =
2676 @SIM_ENABLE_ARCH_msp430_TRUE@msp430_run_LDADD = \
2677 @SIM_ENABLE_ARCH_msp430_TRUE@   msp430/nrun.o \
2678 @SIM_ENABLE_ARCH_msp430_TRUE@   msp430/libsim.a \
2679 @SIM_ENABLE_ARCH_msp430_TRUE@   $(SIM_COMMON_LIBS)
2680
2681 @SIM_ENABLE_ARCH_or1k_TRUE@or1k_libsim_a_SOURCES =
2682 @SIM_ENABLE_ARCH_or1k_TRUE@or1k_libsim_a_LIBADD = \
2683 @SIM_ENABLE_ARCH_or1k_TRUE@     $(common_libcommon_a_OBJECTS) \
2684 @SIM_ENABLE_ARCH_or1k_TRUE@     $(patsubst %,or1k/%,$(SIM_NEW_COMMON_OBJS)) \
2685 @SIM_ENABLE_ARCH_or1k_TRUE@     $(patsubst %,or1k/dv-%.o,$(SIM_HW_DEVICES)) \
2686 @SIM_ENABLE_ARCH_or1k_TRUE@     or1k/modules.o \
2687 @SIM_ENABLE_ARCH_or1k_TRUE@     \
2688 @SIM_ENABLE_ARCH_or1k_TRUE@     or1k/cgen-accfp.o \
2689 @SIM_ENABLE_ARCH_or1k_TRUE@     or1k/cgen-fpu.o \
2690 @SIM_ENABLE_ARCH_or1k_TRUE@     or1k/cgen-run.o \
2691 @SIM_ENABLE_ARCH_or1k_TRUE@     or1k/cgen-scache.o \
2692 @SIM_ENABLE_ARCH_or1k_TRUE@     or1k/cgen-trace.o \
2693 @SIM_ENABLE_ARCH_or1k_TRUE@     or1k/cgen-utils.o \
2694 @SIM_ENABLE_ARCH_or1k_TRUE@     \
2695 @SIM_ENABLE_ARCH_or1k_TRUE@     or1k/arch.o \
2696 @SIM_ENABLE_ARCH_or1k_TRUE@     or1k/cpu.o \
2697 @SIM_ENABLE_ARCH_or1k_TRUE@     or1k/decode.o \
2698 @SIM_ENABLE_ARCH_or1k_TRUE@     or1k/mloop.o \
2699 @SIM_ENABLE_ARCH_or1k_TRUE@     or1k/model.o \
2700 @SIM_ENABLE_ARCH_or1k_TRUE@     or1k/sem.o \
2701 @SIM_ENABLE_ARCH_or1k_TRUE@     \
2702 @SIM_ENABLE_ARCH_or1k_TRUE@     or1k/or1k.o \
2703 @SIM_ENABLE_ARCH_or1k_TRUE@     or1k/sim-if.o \
2704 @SIM_ENABLE_ARCH_or1k_TRUE@     or1k/traps.o
2705
2706 @SIM_ENABLE_ARCH_or1k_TRUE@or1k_run_SOURCES =
2707 @SIM_ENABLE_ARCH_or1k_TRUE@or1k_run_LDADD = \
2708 @SIM_ENABLE_ARCH_or1k_TRUE@     or1k/nrun.o \
2709 @SIM_ENABLE_ARCH_or1k_TRUE@     or1k/libsim.a \
2710 @SIM_ENABLE_ARCH_or1k_TRUE@     $(SIM_COMMON_LIBS)
2711
2712 @SIM_ENABLE_ARCH_or1k_TRUE@or1kdocdir = $(docdir)/or1k
2713 @SIM_ENABLE_ARCH_or1k_TRUE@or1kdoc_DATA = or1k/README
2714 @SIM_ENABLE_ARCH_or1k_TRUE@or1k_BUILD_OUTPUTS = \
2715 @SIM_ENABLE_ARCH_or1k_TRUE@     or1k/mloop.c \
2716 @SIM_ENABLE_ARCH_or1k_TRUE@     or1k/stamp-mloop
2717
2718 @SIM_ENABLE_ARCH_ppc_TRUE@ppc_run_SOURCES =
2719 @SIM_ENABLE_ARCH_ppc_TRUE@ppc_run_LDADD = \
2720 @SIM_ENABLE_ARCH_ppc_TRUE@      ppc/main.o \
2721 @SIM_ENABLE_ARCH_ppc_TRUE@      ppc/libsim.a \
2722 @SIM_ENABLE_ARCH_ppc_TRUE@      $(SIM_COMMON_LIBS)
2723
2724 @SIM_ENABLE_ARCH_ppc_TRUE@ppcdocdir = $(docdir)/ppc
2725 @SIM_ENABLE_ARCH_ppc_TRUE@ppcdoc_DATA = ppc/BUGS ppc/INSTALL ppc/README ppc/RUN
2726 @SIM_ENABLE_ARCH_pru_TRUE@pru_libsim_a_SOURCES =
2727 @SIM_ENABLE_ARCH_pru_TRUE@pru_libsim_a_LIBADD = \
2728 @SIM_ENABLE_ARCH_pru_TRUE@      $(common_libcommon_a_OBJECTS) \
2729 @SIM_ENABLE_ARCH_pru_TRUE@      $(patsubst %,pru/%,$(SIM_NEW_COMMON_OBJS)) \
2730 @SIM_ENABLE_ARCH_pru_TRUE@      $(patsubst %,pru/dv-%.o,$(SIM_HW_DEVICES)) \
2731 @SIM_ENABLE_ARCH_pru_TRUE@      pru/interp.o \
2732 @SIM_ENABLE_ARCH_pru_TRUE@      pru/modules.o \
2733 @SIM_ENABLE_ARCH_pru_TRUE@      pru/sim-resume.o
2734
2735 @SIM_ENABLE_ARCH_pru_TRUE@pru_run_SOURCES =
2736 @SIM_ENABLE_ARCH_pru_TRUE@pru_run_LDADD = \
2737 @SIM_ENABLE_ARCH_pru_TRUE@      pru/nrun.o \
2738 @SIM_ENABLE_ARCH_pru_TRUE@      pru/libsim.a \
2739 @SIM_ENABLE_ARCH_pru_TRUE@      $(SIM_COMMON_LIBS)
2740
2741 @SIM_ENABLE_ARCH_riscv_TRUE@riscv_libsim_a_SOURCES =
2742 @SIM_ENABLE_ARCH_riscv_TRUE@riscv_libsim_a_LIBADD = \
2743 @SIM_ENABLE_ARCH_riscv_TRUE@    $(common_libcommon_a_OBJECTS) \
2744 @SIM_ENABLE_ARCH_riscv_TRUE@    $(patsubst %,riscv/%,$(SIM_NEW_COMMON_OBJS)) \
2745 @SIM_ENABLE_ARCH_riscv_TRUE@    $(patsubst %,riscv/dv-%.o,$(SIM_HW_DEVICES)) \
2746 @SIM_ENABLE_ARCH_riscv_TRUE@    riscv/interp.o \
2747 @SIM_ENABLE_ARCH_riscv_TRUE@    riscv/machs.o \
2748 @SIM_ENABLE_ARCH_riscv_TRUE@    riscv/modules.o \
2749 @SIM_ENABLE_ARCH_riscv_TRUE@    riscv/sim-main.o \
2750 @SIM_ENABLE_ARCH_riscv_TRUE@    riscv/sim-resume.o
2751
2752 @SIM_ENABLE_ARCH_riscv_TRUE@riscv_run_SOURCES =
2753 @SIM_ENABLE_ARCH_riscv_TRUE@riscv_run_LDADD = \
2754 @SIM_ENABLE_ARCH_riscv_TRUE@    riscv/nrun.o \
2755 @SIM_ENABLE_ARCH_riscv_TRUE@    riscv/libsim.a \
2756 @SIM_ENABLE_ARCH_riscv_TRUE@    $(SIM_COMMON_LIBS)
2757
2758 @SIM_ENABLE_ARCH_rl78_TRUE@rl78_libsim_a_SOURCES =
2759 @SIM_ENABLE_ARCH_rl78_TRUE@rl78_libsim_a_LIBADD = \
2760 @SIM_ENABLE_ARCH_rl78_TRUE@     $(common_libcommon_a_OBJECTS) \
2761 @SIM_ENABLE_ARCH_rl78_TRUE@     rl78/load.o \
2762 @SIM_ENABLE_ARCH_rl78_TRUE@     rl78/mem.o \
2763 @SIM_ENABLE_ARCH_rl78_TRUE@     rl78/cpu.o \
2764 @SIM_ENABLE_ARCH_rl78_TRUE@     rl78/rl78.o \
2765 @SIM_ENABLE_ARCH_rl78_TRUE@     rl78/gdb-if.o \
2766 @SIM_ENABLE_ARCH_rl78_TRUE@     rl78/modules.o \
2767 @SIM_ENABLE_ARCH_rl78_TRUE@     rl78/trace.o
2768
2769 @SIM_ENABLE_ARCH_rl78_TRUE@rl78_run_SOURCES =
2770 @SIM_ENABLE_ARCH_rl78_TRUE@rl78_run_LDADD = \
2771 @SIM_ENABLE_ARCH_rl78_TRUE@     rl78/main.o \
2772 @SIM_ENABLE_ARCH_rl78_TRUE@     rl78/libsim.a \
2773 @SIM_ENABLE_ARCH_rl78_TRUE@     $(SIM_COMMON_LIBS)
2774
2775 @SIM_ENABLE_ARCH_rx_TRUE@rx_run_SOURCES =
2776 @SIM_ENABLE_ARCH_rx_TRUE@rx_run_LDADD = \
2777 @SIM_ENABLE_ARCH_rx_TRUE@       rx/main.o \
2778 @SIM_ENABLE_ARCH_rx_TRUE@       rx/libsim.a \
2779 @SIM_ENABLE_ARCH_rx_TRUE@       $(SIM_COMMON_LIBS)
2780
2781 @SIM_ENABLE_ARCH_rx_TRUE@rxdocdir = $(docdir)/rx
2782 @SIM_ENABLE_ARCH_rx_TRUE@rxdoc_DATA = rx/README.txt
2783 @SIM_ENABLE_ARCH_sh_TRUE@sh_run_SOURCES =
2784 @SIM_ENABLE_ARCH_sh_TRUE@sh_run_LDADD = \
2785 @SIM_ENABLE_ARCH_sh_TRUE@       sh/nrun.o \
2786 @SIM_ENABLE_ARCH_sh_TRUE@       sh/libsim.a \
2787 @SIM_ENABLE_ARCH_sh_TRUE@       $(SIM_COMMON_LIBS)
2788
2789 @SIM_ENABLE_ARCH_sh_TRUE@sh_BUILD_OUTPUTS = \
2790 @SIM_ENABLE_ARCH_sh_TRUE@       sh/gencode$(EXEEXT) \
2791 @SIM_ENABLE_ARCH_sh_TRUE@       sh/table.c
2792
2793 @SIM_ENABLE_ARCH_sh_TRUE@sh_gencode_SOURCES = sh/gencode.c
2794 @SIM_ENABLE_ARCH_v850_TRUE@v850_run_SOURCES =
2795 @SIM_ENABLE_ARCH_v850_TRUE@v850_run_LDADD = \
2796 @SIM_ENABLE_ARCH_v850_TRUE@     v850/nrun.o \
2797 @SIM_ENABLE_ARCH_v850_TRUE@     v850/libsim.a \
2798 @SIM_ENABLE_ARCH_v850_TRUE@     $(SIM_COMMON_LIBS)
2799
2800 @SIM_ENABLE_ARCH_v850_TRUE@v850_BUILT_SRC_FROM_IGEN = \
2801 @SIM_ENABLE_ARCH_v850_TRUE@     v850/icache.h \
2802 @SIM_ENABLE_ARCH_v850_TRUE@     v850/icache.c \
2803 @SIM_ENABLE_ARCH_v850_TRUE@     v850/idecode.h \
2804 @SIM_ENABLE_ARCH_v850_TRUE@     v850/idecode.c \
2805 @SIM_ENABLE_ARCH_v850_TRUE@     v850/semantics.h \
2806 @SIM_ENABLE_ARCH_v850_TRUE@     v850/semantics.c \
2807 @SIM_ENABLE_ARCH_v850_TRUE@     v850/model.h \
2808 @SIM_ENABLE_ARCH_v850_TRUE@     v850/model.c \
2809 @SIM_ENABLE_ARCH_v850_TRUE@     v850/support.h \
2810 @SIM_ENABLE_ARCH_v850_TRUE@     v850/support.c \
2811 @SIM_ENABLE_ARCH_v850_TRUE@     v850/itable.h \
2812 @SIM_ENABLE_ARCH_v850_TRUE@     v850/itable.c \
2813 @SIM_ENABLE_ARCH_v850_TRUE@     v850/engine.h \
2814 @SIM_ENABLE_ARCH_v850_TRUE@     v850/engine.c \
2815 @SIM_ENABLE_ARCH_v850_TRUE@     v850/irun.c
2816
2817 @SIM_ENABLE_ARCH_v850_TRUE@v850_BUILD_OUTPUTS = \
2818 @SIM_ENABLE_ARCH_v850_TRUE@     $(v850_BUILT_SRC_FROM_IGEN) \
2819 @SIM_ENABLE_ARCH_v850_TRUE@     v850/stamp-igen
2820
2821 @SIM_ENABLE_ARCH_v850_TRUE@v850_IGEN_TRACE = # -G omit-line-numbers # -G trace-rule-selection -G trace-rule-rejection -G trace-entries
2822 @SIM_ENABLE_ARCH_v850_TRUE@v850_IGEN_INSN = $(srcdir)/v850/v850.igen
2823 @SIM_ENABLE_ARCH_v850_TRUE@v850_IGEN_DC = $(srcdir)/v850/v850.dc
2824 all: $(BUILT_SOURCES) config.h
2825         $(MAKE) $(AM_MAKEFLAGS) all-recursive
2826
2827 .SUFFIXES:
2828 .SUFFIXES: .c .lo .log .o .obj .test .test$(EXEEXT) .trs
2829 am--refresh: Makefile
2830         @:
2831 $(srcdir)/Makefile.in: @MAINTAINER_MODE_TRUE@ $(srcdir)/Makefile.am $(srcdir)/common/local.mk $(srcdir)/igen/local.mk $(srcdir)/testsuite/local.mk $(srcdir)/testsuite/common/local.mk $(srcdir)/aarch64/local.mk $(srcdir)/arm/local.mk $(srcdir)/avr/local.mk $(srcdir)/bfin/local.mk $(srcdir)/bpf/local.mk $(srcdir)/cr16/local.mk $(srcdir)/cris/local.mk $(srcdir)/d10v/local.mk $(srcdir)/erc32/local.mk $(srcdir)/example-synacor/local.mk $(srcdir)/frv/local.mk $(srcdir)/ft32/local.mk $(srcdir)/h8300/local.mk $(srcdir)/iq2000/local.mk $(srcdir)/lm32/local.mk $(srcdir)/m32c/local.mk $(srcdir)/m32r/local.mk $(srcdir)/m68hc11/local.mk $(srcdir)/mcore/local.mk $(srcdir)/microblaze/local.mk $(srcdir)/mips/local.mk $(srcdir)/mn10300/local.mk $(srcdir)/moxie/local.mk $(srcdir)/msp430/local.mk $(srcdir)/or1k/local.mk $(srcdir)/ppc/local.mk $(srcdir)/pru/local.mk $(srcdir)/riscv/local.mk $(srcdir)/rl78/local.mk $(srcdir)/rx/local.mk $(srcdir)/sh/local.mk $(srcdir)/v850/local.mk $(am__configure_deps)
2832         @for dep in $?; do \
2833           case '$(am__configure_deps)' in \
2834             *$$dep*) \
2835               echo ' cd $(srcdir) && $(AUTOMAKE) --foreign'; \
2836               $(am__cd) $(srcdir) && $(AUTOMAKE) --foreign \
2837                 && exit 0; \
2838               exit 1;; \
2839           esac; \
2840         done; \
2841         echo ' cd $(top_srcdir) && $(AUTOMAKE) --foreign Makefile'; \
2842         $(am__cd) $(top_srcdir) && \
2843           $(AUTOMAKE) --foreign Makefile
2844 Makefile: $(srcdir)/Makefile.in $(top_builddir)/config.status
2845         @case '$?' in \
2846           *config.status*) \
2847             echo ' $(SHELL) ./config.status'; \
2848             $(SHELL) ./config.status;; \
2849           *) \
2850             echo ' cd $(top_builddir) && $(SHELL) ./config.status $@ $(am__depfiles_maybe)'; \
2851             cd $(top_builddir) && $(SHELL) ./config.status $@ $(am__depfiles_maybe);; \
2852         esac;
2853 $(srcdir)/common/local.mk $(srcdir)/igen/local.mk $(srcdir)/testsuite/local.mk $(srcdir)/testsuite/common/local.mk $(srcdir)/aarch64/local.mk $(srcdir)/arm/local.mk $(srcdir)/avr/local.mk $(srcdir)/bfin/local.mk $(srcdir)/bpf/local.mk $(srcdir)/cr16/local.mk $(srcdir)/cris/local.mk $(srcdir)/d10v/local.mk $(srcdir)/erc32/local.mk $(srcdir)/example-synacor/local.mk $(srcdir)/frv/local.mk $(srcdir)/ft32/local.mk $(srcdir)/h8300/local.mk $(srcdir)/iq2000/local.mk $(srcdir)/lm32/local.mk $(srcdir)/m32c/local.mk $(srcdir)/m32r/local.mk $(srcdir)/m68hc11/local.mk $(srcdir)/mcore/local.mk $(srcdir)/microblaze/local.mk $(srcdir)/mips/local.mk $(srcdir)/mn10300/local.mk $(srcdir)/moxie/local.mk $(srcdir)/msp430/local.mk $(srcdir)/or1k/local.mk $(srcdir)/ppc/local.mk $(srcdir)/pru/local.mk $(srcdir)/riscv/local.mk $(srcdir)/rl78/local.mk $(srcdir)/rx/local.mk $(srcdir)/sh/local.mk $(srcdir)/v850/local.mk $(am__empty):
2854
2855 $(top_builddir)/config.status: $(top_srcdir)/configure $(CONFIG_STATUS_DEPENDENCIES)
2856         $(SHELL) ./config.status --recheck
2857
2858 $(top_srcdir)/configure: @MAINTAINER_MODE_TRUE@ $(am__configure_deps)
2859         $(am__cd) $(srcdir) && $(AUTOCONF)
2860 $(ACLOCAL_M4): @MAINTAINER_MODE_TRUE@ $(am__aclocal_m4_deps)
2861         $(am__cd) $(srcdir) && $(ACLOCAL) $(ACLOCAL_AMFLAGS)
2862 $(am__aclocal_m4_deps):
2863
2864 config.h: stamp-h1
2865         @test -f $@ || rm -f stamp-h1
2866         @test -f $@ || $(MAKE) $(AM_MAKEFLAGS) stamp-h1
2867
2868 stamp-h1: $(srcdir)/config.h.in $(top_builddir)/config.status
2869         @rm -f stamp-h1
2870         cd $(top_builddir) && $(SHELL) ./config.status config.h
2871 $(srcdir)/config.h.in: @MAINTAINER_MODE_TRUE@ $(am__configure_deps)
2872         ($(am__cd) $(top_srcdir) && $(AUTOHEADER))
2873         rm -f stamp-h1
2874         touch $@
2875
2876 distclean-hdr:
2877         -rm -f config.h stamp-h1
2878 Make-common.sim: $(top_builddir)/config.status $(top_srcdir)/common/Make-common.in
2879         cd $(top_builddir) && $(SHELL) ./config.status $@
2880 aarch64/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/aarch64/Makefile.in
2881         cd $(top_builddir) && $(SHELL) ./config.status $@
2882 aarch64/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
2883         cd $(top_builddir) && $(SHELL) ./config.status $@
2884 arm/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/arm/Makefile.in
2885         cd $(top_builddir) && $(SHELL) ./config.status $@
2886 arm/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
2887         cd $(top_builddir) && $(SHELL) ./config.status $@
2888 avr/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/avr/Makefile.in
2889         cd $(top_builddir) && $(SHELL) ./config.status $@
2890 avr/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
2891         cd $(top_builddir) && $(SHELL) ./config.status $@
2892 bfin/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/bfin/Makefile.in
2893         cd $(top_builddir) && $(SHELL) ./config.status $@
2894 bfin/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
2895         cd $(top_builddir) && $(SHELL) ./config.status $@
2896 bpf/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/bpf/Makefile.in
2897         cd $(top_builddir) && $(SHELL) ./config.status $@
2898 bpf/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
2899         cd $(top_builddir) && $(SHELL) ./config.status $@
2900 cr16/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/cr16/Makefile.in
2901         cd $(top_builddir) && $(SHELL) ./config.status $@
2902 cr16/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
2903         cd $(top_builddir) && $(SHELL) ./config.status $@
2904 cris/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/cris/Makefile.in
2905         cd $(top_builddir) && $(SHELL) ./config.status $@
2906 cris/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
2907         cd $(top_builddir) && $(SHELL) ./config.status $@
2908 d10v/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/d10v/Makefile.in
2909         cd $(top_builddir) && $(SHELL) ./config.status $@
2910 d10v/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
2911         cd $(top_builddir) && $(SHELL) ./config.status $@
2912 frv/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/frv/Makefile.in
2913         cd $(top_builddir) && $(SHELL) ./config.status $@
2914 frv/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
2915         cd $(top_builddir) && $(SHELL) ./config.status $@
2916 ft32/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/ft32/Makefile.in
2917         cd $(top_builddir) && $(SHELL) ./config.status $@
2918 ft32/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
2919         cd $(top_builddir) && $(SHELL) ./config.status $@
2920 h8300/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/h8300/Makefile.in
2921         cd $(top_builddir) && $(SHELL) ./config.status $@
2922 h8300/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
2923         cd $(top_builddir) && $(SHELL) ./config.status $@
2924 iq2000/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/iq2000/Makefile.in
2925         cd $(top_builddir) && $(SHELL) ./config.status $@
2926 iq2000/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
2927         cd $(top_builddir) && $(SHELL) ./config.status $@
2928 lm32/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/lm32/Makefile.in
2929         cd $(top_builddir) && $(SHELL) ./config.status $@
2930 lm32/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
2931         cd $(top_builddir) && $(SHELL) ./config.status $@
2932 m32c/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/m32c/Makefile.in
2933         cd $(top_builddir) && $(SHELL) ./config.status $@
2934 m32c/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
2935         cd $(top_builddir) && $(SHELL) ./config.status $@
2936 m32r/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/m32r/Makefile.in
2937         cd $(top_builddir) && $(SHELL) ./config.status $@
2938 m32r/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
2939         cd $(top_builddir) && $(SHELL) ./config.status $@
2940 m68hc11/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/m68hc11/Makefile.in
2941         cd $(top_builddir) && $(SHELL) ./config.status $@
2942 m68hc11/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
2943         cd $(top_builddir) && $(SHELL) ./config.status $@
2944 mcore/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/mcore/Makefile.in
2945         cd $(top_builddir) && $(SHELL) ./config.status $@
2946 mcore/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
2947         cd $(top_builddir) && $(SHELL) ./config.status $@
2948 microblaze/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/microblaze/Makefile.in
2949         cd $(top_builddir) && $(SHELL) ./config.status $@
2950 microblaze/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
2951         cd $(top_builddir) && $(SHELL) ./config.status $@
2952 mips/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/mips/Makefile.in
2953         cd $(top_builddir) && $(SHELL) ./config.status $@
2954 mips/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
2955         cd $(top_builddir) && $(SHELL) ./config.status $@
2956 mn10300/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/mn10300/Makefile.in
2957         cd $(top_builddir) && $(SHELL) ./config.status $@
2958 mn10300/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
2959         cd $(top_builddir) && $(SHELL) ./config.status $@
2960 moxie/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/moxie/Makefile.in
2961         cd $(top_builddir) && $(SHELL) ./config.status $@
2962 moxie/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
2963         cd $(top_builddir) && $(SHELL) ./config.status $@
2964 msp430/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/msp430/Makefile.in
2965         cd $(top_builddir) && $(SHELL) ./config.status $@
2966 msp430/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
2967         cd $(top_builddir) && $(SHELL) ./config.status $@
2968 or1k/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/or1k/Makefile.in
2969         cd $(top_builddir) && $(SHELL) ./config.status $@
2970 or1k/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
2971         cd $(top_builddir) && $(SHELL) ./config.status $@
2972 ppc/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
2973         cd $(top_builddir) && $(SHELL) ./config.status $@
2974 pru/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/pru/Makefile.in
2975         cd $(top_builddir) && $(SHELL) ./config.status $@
2976 pru/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
2977         cd $(top_builddir) && $(SHELL) ./config.status $@
2978 riscv/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/riscv/Makefile.in
2979         cd $(top_builddir) && $(SHELL) ./config.status $@
2980 riscv/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
2981         cd $(top_builddir) && $(SHELL) ./config.status $@
2982 rl78/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/rl78/Makefile.in
2983         cd $(top_builddir) && $(SHELL) ./config.status $@
2984 rl78/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
2985         cd $(top_builddir) && $(SHELL) ./config.status $@
2986 rx/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/rx/Makefile.in
2987         cd $(top_builddir) && $(SHELL) ./config.status $@
2988 rx/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
2989         cd $(top_builddir) && $(SHELL) ./config.status $@
2990 sh/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/sh/Makefile.in
2991         cd $(top_builddir) && $(SHELL) ./config.status $@
2992 sh/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
2993         cd $(top_builddir) && $(SHELL) ./config.status $@
2994 erc32/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/erc32/Makefile.in
2995         cd $(top_builddir) && $(SHELL) ./config.status $@
2996 erc32/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
2997         cd $(top_builddir) && $(SHELL) ./config.status $@
2998 v850/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/v850/Makefile.in
2999         cd $(top_builddir) && $(SHELL) ./config.status $@
3000 v850/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
3001         cd $(top_builddir) && $(SHELL) ./config.status $@
3002 example-synacor/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/example-synacor/Makefile.in
3003         cd $(top_builddir) && $(SHELL) ./config.status $@
3004 example-synacor/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
3005         cd $(top_builddir) && $(SHELL) ./config.status $@
3006 arch-subdir.mk: $(top_builddir)/config.status $(srcdir)/arch-subdir.mk.in
3007         cd $(top_builddir) && $(SHELL) ./config.status $@
3008 .gdbinit: $(top_builddir)/config.status $(srcdir)/gdbinit.in
3009         cd $(top_builddir) && $(SHELL) ./config.status $@
3010
3011 clean-noinstLIBRARIES:
3012         -test -z "$(noinst_LIBRARIES)" || rm -f $(noinst_LIBRARIES)
3013 aarch64/$(am__dirstamp):
3014         @$(MKDIR_P) aarch64
3015         @: > aarch64/$(am__dirstamp)
3016
3017 aarch64/libsim.a: $(aarch64_libsim_a_OBJECTS) $(aarch64_libsim_a_DEPENDENCIES) $(EXTRA_aarch64_libsim_a_DEPENDENCIES) aarch64/$(am__dirstamp)
3018         $(AM_V_at)-rm -f aarch64/libsim.a
3019         $(AM_V_AR)$(aarch64_libsim_a_AR) aarch64/libsim.a $(aarch64_libsim_a_OBJECTS) $(aarch64_libsim_a_LIBADD)
3020         $(AM_V_at)$(RANLIB) aarch64/libsim.a
3021 arm/$(am__dirstamp):
3022         @$(MKDIR_P) arm
3023         @: > arm/$(am__dirstamp)
3024
3025 arm/libsim.a: $(arm_libsim_a_OBJECTS) $(arm_libsim_a_DEPENDENCIES) $(EXTRA_arm_libsim_a_DEPENDENCIES) arm/$(am__dirstamp)
3026         $(AM_V_at)-rm -f arm/libsim.a
3027         $(AM_V_AR)$(arm_libsim_a_AR) arm/libsim.a $(arm_libsim_a_OBJECTS) $(arm_libsim_a_LIBADD)
3028         $(AM_V_at)$(RANLIB) arm/libsim.a
3029 avr/$(am__dirstamp):
3030         @$(MKDIR_P) avr
3031         @: > avr/$(am__dirstamp)
3032
3033 avr/libsim.a: $(avr_libsim_a_OBJECTS) $(avr_libsim_a_DEPENDENCIES) $(EXTRA_avr_libsim_a_DEPENDENCIES) avr/$(am__dirstamp)
3034         $(AM_V_at)-rm -f avr/libsim.a
3035         $(AM_V_AR)$(avr_libsim_a_AR) avr/libsim.a $(avr_libsim_a_OBJECTS) $(avr_libsim_a_LIBADD)
3036         $(AM_V_at)$(RANLIB) avr/libsim.a
3037 bfin/$(am__dirstamp):
3038         @$(MKDIR_P) bfin
3039         @: > bfin/$(am__dirstamp)
3040
3041 bfin/libsim.a: $(bfin_libsim_a_OBJECTS) $(bfin_libsim_a_DEPENDENCIES) $(EXTRA_bfin_libsim_a_DEPENDENCIES) bfin/$(am__dirstamp)
3042         $(AM_V_at)-rm -f bfin/libsim.a
3043         $(AM_V_AR)$(bfin_libsim_a_AR) bfin/libsim.a $(bfin_libsim_a_OBJECTS) $(bfin_libsim_a_LIBADD)
3044         $(AM_V_at)$(RANLIB) bfin/libsim.a
3045 bpf/$(am__dirstamp):
3046         @$(MKDIR_P) bpf
3047         @: > bpf/$(am__dirstamp)
3048
3049 bpf/libsim.a: $(bpf_libsim_a_OBJECTS) $(bpf_libsim_a_DEPENDENCIES) $(EXTRA_bpf_libsim_a_DEPENDENCIES) bpf/$(am__dirstamp)
3050         $(AM_V_at)-rm -f bpf/libsim.a
3051         $(AM_V_AR)$(bpf_libsim_a_AR) bpf/libsim.a $(bpf_libsim_a_OBJECTS) $(bpf_libsim_a_LIBADD)
3052         $(AM_V_at)$(RANLIB) bpf/libsim.a
3053 common/$(am__dirstamp):
3054         @$(MKDIR_P) common
3055         @: > common/$(am__dirstamp)
3056 common/$(DEPDIR)/$(am__dirstamp):
3057         @$(MKDIR_P) common/$(DEPDIR)
3058         @: > common/$(DEPDIR)/$(am__dirstamp)
3059 common/callback.$(OBJEXT): common/$(am__dirstamp) \
3060         common/$(DEPDIR)/$(am__dirstamp)
3061 common/portability.$(OBJEXT): common/$(am__dirstamp) \
3062         common/$(DEPDIR)/$(am__dirstamp)
3063 common/sim-load.$(OBJEXT): common/$(am__dirstamp) \
3064         common/$(DEPDIR)/$(am__dirstamp)
3065 common/syscall.$(OBJEXT): common/$(am__dirstamp) \
3066         common/$(DEPDIR)/$(am__dirstamp)
3067 common/target-newlib-errno.$(OBJEXT): common/$(am__dirstamp) \
3068         common/$(DEPDIR)/$(am__dirstamp)
3069 common/target-newlib-open.$(OBJEXT): common/$(am__dirstamp) \
3070         common/$(DEPDIR)/$(am__dirstamp)
3071 common/target-newlib-signal.$(OBJEXT): common/$(am__dirstamp) \
3072         common/$(DEPDIR)/$(am__dirstamp)
3073 common/target-newlib-syscall.$(OBJEXT): common/$(am__dirstamp) \
3074         common/$(DEPDIR)/$(am__dirstamp)
3075 common/version.$(OBJEXT): common/$(am__dirstamp) \
3076         common/$(DEPDIR)/$(am__dirstamp)
3077
3078 common/libcommon.a: $(common_libcommon_a_OBJECTS) $(common_libcommon_a_DEPENDENCIES) $(EXTRA_common_libcommon_a_DEPENDENCIES) common/$(am__dirstamp)
3079         $(AM_V_at)-rm -f common/libcommon.a
3080         $(AM_V_AR)$(common_libcommon_a_AR) common/libcommon.a $(common_libcommon_a_OBJECTS) $(common_libcommon_a_LIBADD)
3081         $(AM_V_at)$(RANLIB) common/libcommon.a
3082 cr16/$(am__dirstamp):
3083         @$(MKDIR_P) cr16
3084         @: > cr16/$(am__dirstamp)
3085
3086 cr16/libsim.a: $(cr16_libsim_a_OBJECTS) $(cr16_libsim_a_DEPENDENCIES) $(EXTRA_cr16_libsim_a_DEPENDENCIES) cr16/$(am__dirstamp)
3087         $(AM_V_at)-rm -f cr16/libsim.a
3088         $(AM_V_AR)$(cr16_libsim_a_AR) cr16/libsim.a $(cr16_libsim_a_OBJECTS) $(cr16_libsim_a_LIBADD)
3089         $(AM_V_at)$(RANLIB) cr16/libsim.a
3090 cris/$(am__dirstamp):
3091         @$(MKDIR_P) cris
3092         @: > cris/$(am__dirstamp)
3093
3094 cris/libsim.a: $(cris_libsim_a_OBJECTS) $(cris_libsim_a_DEPENDENCIES) $(EXTRA_cris_libsim_a_DEPENDENCIES) cris/$(am__dirstamp)
3095         $(AM_V_at)-rm -f cris/libsim.a
3096         $(AM_V_AR)$(cris_libsim_a_AR) cris/libsim.a $(cris_libsim_a_OBJECTS) $(cris_libsim_a_LIBADD)
3097         $(AM_V_at)$(RANLIB) cris/libsim.a
3098 d10v/$(am__dirstamp):
3099         @$(MKDIR_P) d10v
3100         @: > d10v/$(am__dirstamp)
3101
3102 d10v/libsim.a: $(d10v_libsim_a_OBJECTS) $(d10v_libsim_a_DEPENDENCIES) $(EXTRA_d10v_libsim_a_DEPENDENCIES) d10v/$(am__dirstamp)
3103         $(AM_V_at)-rm -f d10v/libsim.a
3104         $(AM_V_AR)$(d10v_libsim_a_AR) d10v/libsim.a $(d10v_libsim_a_OBJECTS) $(d10v_libsim_a_LIBADD)
3105         $(AM_V_at)$(RANLIB) d10v/libsim.a
3106 erc32/$(am__dirstamp):
3107         @$(MKDIR_P) erc32
3108         @: > erc32/$(am__dirstamp)
3109
3110 erc32/libsim.a: $(erc32_libsim_a_OBJECTS) $(erc32_libsim_a_DEPENDENCIES) $(EXTRA_erc32_libsim_a_DEPENDENCIES) erc32/$(am__dirstamp)
3111         $(AM_V_at)-rm -f erc32/libsim.a
3112         $(AM_V_AR)$(erc32_libsim_a_AR) erc32/libsim.a $(erc32_libsim_a_OBJECTS) $(erc32_libsim_a_LIBADD)
3113         $(AM_V_at)$(RANLIB) erc32/libsim.a
3114 example-synacor/$(am__dirstamp):
3115         @$(MKDIR_P) example-synacor
3116         @: > example-synacor/$(am__dirstamp)
3117
3118 example-synacor/libsim.a: $(example_synacor_libsim_a_OBJECTS) $(example_synacor_libsim_a_DEPENDENCIES) $(EXTRA_example_synacor_libsim_a_DEPENDENCIES) example-synacor/$(am__dirstamp)
3119         $(AM_V_at)-rm -f example-synacor/libsim.a
3120         $(AM_V_AR)$(example_synacor_libsim_a_AR) example-synacor/libsim.a $(example_synacor_libsim_a_OBJECTS) $(example_synacor_libsim_a_LIBADD)
3121         $(AM_V_at)$(RANLIB) example-synacor/libsim.a
3122 frv/$(am__dirstamp):
3123         @$(MKDIR_P) frv
3124         @: > frv/$(am__dirstamp)
3125
3126 frv/libsim.a: $(frv_libsim_a_OBJECTS) $(frv_libsim_a_DEPENDENCIES) $(EXTRA_frv_libsim_a_DEPENDENCIES) frv/$(am__dirstamp)
3127         $(AM_V_at)-rm -f frv/libsim.a
3128         $(AM_V_AR)$(frv_libsim_a_AR) frv/libsim.a $(frv_libsim_a_OBJECTS) $(frv_libsim_a_LIBADD)
3129         $(AM_V_at)$(RANLIB) frv/libsim.a
3130 ft32/$(am__dirstamp):
3131         @$(MKDIR_P) ft32
3132         @: > ft32/$(am__dirstamp)
3133
3134 ft32/libsim.a: $(ft32_libsim_a_OBJECTS) $(ft32_libsim_a_DEPENDENCIES) $(EXTRA_ft32_libsim_a_DEPENDENCIES) ft32/$(am__dirstamp)
3135         $(AM_V_at)-rm -f ft32/libsim.a
3136         $(AM_V_AR)$(ft32_libsim_a_AR) ft32/libsim.a $(ft32_libsim_a_OBJECTS) $(ft32_libsim_a_LIBADD)
3137         $(AM_V_at)$(RANLIB) ft32/libsim.a
3138 h8300/$(am__dirstamp):
3139         @$(MKDIR_P) h8300
3140         @: > h8300/$(am__dirstamp)
3141
3142 h8300/libsim.a: $(h8300_libsim_a_OBJECTS) $(h8300_libsim_a_DEPENDENCIES) $(EXTRA_h8300_libsim_a_DEPENDENCIES) h8300/$(am__dirstamp)
3143         $(AM_V_at)-rm -f h8300/libsim.a
3144         $(AM_V_AR)$(h8300_libsim_a_AR) h8300/libsim.a $(h8300_libsim_a_OBJECTS) $(h8300_libsim_a_LIBADD)
3145         $(AM_V_at)$(RANLIB) h8300/libsim.a
3146 igen/$(am__dirstamp):
3147         @$(MKDIR_P) igen
3148         @: > igen/$(am__dirstamp)
3149 igen/$(DEPDIR)/$(am__dirstamp):
3150         @$(MKDIR_P) igen/$(DEPDIR)
3151         @: > igen/$(DEPDIR)/$(am__dirstamp)
3152 igen/table.$(OBJEXT): igen/$(am__dirstamp) \
3153         igen/$(DEPDIR)/$(am__dirstamp)
3154 igen/lf.$(OBJEXT): igen/$(am__dirstamp) igen/$(DEPDIR)/$(am__dirstamp)
3155 igen/misc.$(OBJEXT): igen/$(am__dirstamp) \
3156         igen/$(DEPDIR)/$(am__dirstamp)
3157 igen/filter_host.$(OBJEXT): igen/$(am__dirstamp) \
3158         igen/$(DEPDIR)/$(am__dirstamp)
3159 igen/ld-decode.$(OBJEXT): igen/$(am__dirstamp) \
3160         igen/$(DEPDIR)/$(am__dirstamp)
3161 igen/ld-cache.$(OBJEXT): igen/$(am__dirstamp) \
3162         igen/$(DEPDIR)/$(am__dirstamp)
3163 igen/filter.$(OBJEXT): igen/$(am__dirstamp) \
3164         igen/$(DEPDIR)/$(am__dirstamp)
3165 igen/ld-insn.$(OBJEXT): igen/$(am__dirstamp) \
3166         igen/$(DEPDIR)/$(am__dirstamp)
3167 igen/gen-model.$(OBJEXT): igen/$(am__dirstamp) \
3168         igen/$(DEPDIR)/$(am__dirstamp)
3169 igen/gen-itable.$(OBJEXT): igen/$(am__dirstamp) \
3170         igen/$(DEPDIR)/$(am__dirstamp)
3171 igen/gen-icache.$(OBJEXT): igen/$(am__dirstamp) \
3172         igen/$(DEPDIR)/$(am__dirstamp)
3173 igen/gen-semantics.$(OBJEXT): igen/$(am__dirstamp) \
3174         igen/$(DEPDIR)/$(am__dirstamp)
3175 igen/gen-idecode.$(OBJEXT): igen/$(am__dirstamp) \
3176         igen/$(DEPDIR)/$(am__dirstamp)
3177 igen/gen-support.$(OBJEXT): igen/$(am__dirstamp) \
3178         igen/$(DEPDIR)/$(am__dirstamp)
3179 igen/gen-engine.$(OBJEXT): igen/$(am__dirstamp) \
3180         igen/$(DEPDIR)/$(am__dirstamp)
3181 igen/gen.$(OBJEXT): igen/$(am__dirstamp) \
3182         igen/$(DEPDIR)/$(am__dirstamp)
3183
3184 @SIM_ENABLE_IGEN_FALSE@igen/libigen.a: $(igen_libigen_a_OBJECTS) $(igen_libigen_a_DEPENDENCIES) $(EXTRA_igen_libigen_a_DEPENDENCIES) igen/$(am__dirstamp)
3185 @SIM_ENABLE_IGEN_FALSE@ $(AM_V_at)-rm -f igen/libigen.a
3186 @SIM_ENABLE_IGEN_FALSE@ $(AM_V_AR)$(igen_libigen_a_AR) igen/libigen.a $(igen_libigen_a_OBJECTS) $(igen_libigen_a_LIBADD)
3187 @SIM_ENABLE_IGEN_FALSE@ $(AM_V_at)$(RANLIB) igen/libigen.a
3188 iq2000/$(am__dirstamp):
3189         @$(MKDIR_P) iq2000
3190         @: > iq2000/$(am__dirstamp)
3191
3192 iq2000/libsim.a: $(iq2000_libsim_a_OBJECTS) $(iq2000_libsim_a_DEPENDENCIES) $(EXTRA_iq2000_libsim_a_DEPENDENCIES) iq2000/$(am__dirstamp)
3193         $(AM_V_at)-rm -f iq2000/libsim.a
3194         $(AM_V_AR)$(iq2000_libsim_a_AR) iq2000/libsim.a $(iq2000_libsim_a_OBJECTS) $(iq2000_libsim_a_LIBADD)
3195         $(AM_V_at)$(RANLIB) iq2000/libsim.a
3196 lm32/$(am__dirstamp):
3197         @$(MKDIR_P) lm32
3198         @: > lm32/$(am__dirstamp)
3199
3200 lm32/libsim.a: $(lm32_libsim_a_OBJECTS) $(lm32_libsim_a_DEPENDENCIES) $(EXTRA_lm32_libsim_a_DEPENDENCIES) lm32/$(am__dirstamp)
3201         $(AM_V_at)-rm -f lm32/libsim.a
3202         $(AM_V_AR)$(lm32_libsim_a_AR) lm32/libsim.a $(lm32_libsim_a_OBJECTS) $(lm32_libsim_a_LIBADD)
3203         $(AM_V_at)$(RANLIB) lm32/libsim.a
3204 m32c/$(am__dirstamp):
3205         @$(MKDIR_P) m32c
3206         @: > m32c/$(am__dirstamp)
3207
3208 m32c/libsim.a: $(m32c_libsim_a_OBJECTS) $(m32c_libsim_a_DEPENDENCIES) $(EXTRA_m32c_libsim_a_DEPENDENCIES) m32c/$(am__dirstamp)
3209         $(AM_V_at)-rm -f m32c/libsim.a
3210         $(AM_V_AR)$(m32c_libsim_a_AR) m32c/libsim.a $(m32c_libsim_a_OBJECTS) $(m32c_libsim_a_LIBADD)
3211         $(AM_V_at)$(RANLIB) m32c/libsim.a
3212 m32r/$(am__dirstamp):
3213         @$(MKDIR_P) m32r
3214         @: > m32r/$(am__dirstamp)
3215
3216 m32r/libsim.a: $(m32r_libsim_a_OBJECTS) $(m32r_libsim_a_DEPENDENCIES) $(EXTRA_m32r_libsim_a_DEPENDENCIES) m32r/$(am__dirstamp)
3217         $(AM_V_at)-rm -f m32r/libsim.a
3218         $(AM_V_AR)$(m32r_libsim_a_AR) m32r/libsim.a $(m32r_libsim_a_OBJECTS) $(m32r_libsim_a_LIBADD)
3219         $(AM_V_at)$(RANLIB) m32r/libsim.a
3220 m68hc11/$(am__dirstamp):
3221         @$(MKDIR_P) m68hc11
3222         @: > m68hc11/$(am__dirstamp)
3223
3224 m68hc11/libsim.a: $(m68hc11_libsim_a_OBJECTS) $(m68hc11_libsim_a_DEPENDENCIES) $(EXTRA_m68hc11_libsim_a_DEPENDENCIES) m68hc11/$(am__dirstamp)
3225         $(AM_V_at)-rm -f m68hc11/libsim.a
3226         $(AM_V_AR)$(m68hc11_libsim_a_AR) m68hc11/libsim.a $(m68hc11_libsim_a_OBJECTS) $(m68hc11_libsim_a_LIBADD)
3227         $(AM_V_at)$(RANLIB) m68hc11/libsim.a
3228 mcore/$(am__dirstamp):
3229         @$(MKDIR_P) mcore
3230         @: > mcore/$(am__dirstamp)
3231
3232 mcore/libsim.a: $(mcore_libsim_a_OBJECTS) $(mcore_libsim_a_DEPENDENCIES) $(EXTRA_mcore_libsim_a_DEPENDENCIES) mcore/$(am__dirstamp)
3233         $(AM_V_at)-rm -f mcore/libsim.a
3234         $(AM_V_AR)$(mcore_libsim_a_AR) mcore/libsim.a $(mcore_libsim_a_OBJECTS) $(mcore_libsim_a_LIBADD)
3235         $(AM_V_at)$(RANLIB) mcore/libsim.a
3236 microblaze/$(am__dirstamp):
3237         @$(MKDIR_P) microblaze
3238         @: > microblaze/$(am__dirstamp)
3239
3240 microblaze/libsim.a: $(microblaze_libsim_a_OBJECTS) $(microblaze_libsim_a_DEPENDENCIES) $(EXTRA_microblaze_libsim_a_DEPENDENCIES) microblaze/$(am__dirstamp)
3241         $(AM_V_at)-rm -f microblaze/libsim.a
3242         $(AM_V_AR)$(microblaze_libsim_a_AR) microblaze/libsim.a $(microblaze_libsim_a_OBJECTS) $(microblaze_libsim_a_LIBADD)
3243         $(AM_V_at)$(RANLIB) microblaze/libsim.a
3244 mips/$(am__dirstamp):
3245         @$(MKDIR_P) mips
3246         @: > mips/$(am__dirstamp)
3247
3248 mips/libsim.a: $(mips_libsim_a_OBJECTS) $(mips_libsim_a_DEPENDENCIES) $(EXTRA_mips_libsim_a_DEPENDENCIES) mips/$(am__dirstamp)
3249         $(AM_V_at)-rm -f mips/libsim.a
3250         $(AM_V_AR)$(mips_libsim_a_AR) mips/libsim.a $(mips_libsim_a_OBJECTS) $(mips_libsim_a_LIBADD)
3251         $(AM_V_at)$(RANLIB) mips/libsim.a
3252 mn10300/$(am__dirstamp):
3253         @$(MKDIR_P) mn10300
3254         @: > mn10300/$(am__dirstamp)
3255
3256 mn10300/libsim.a: $(mn10300_libsim_a_OBJECTS) $(mn10300_libsim_a_DEPENDENCIES) $(EXTRA_mn10300_libsim_a_DEPENDENCIES) mn10300/$(am__dirstamp)
3257         $(AM_V_at)-rm -f mn10300/libsim.a
3258         $(AM_V_AR)$(mn10300_libsim_a_AR) mn10300/libsim.a $(mn10300_libsim_a_OBJECTS) $(mn10300_libsim_a_LIBADD)
3259         $(AM_V_at)$(RANLIB) mn10300/libsim.a
3260 moxie/$(am__dirstamp):
3261         @$(MKDIR_P) moxie
3262         @: > moxie/$(am__dirstamp)
3263
3264 moxie/libsim.a: $(moxie_libsim_a_OBJECTS) $(moxie_libsim_a_DEPENDENCIES) $(EXTRA_moxie_libsim_a_DEPENDENCIES) moxie/$(am__dirstamp)
3265         $(AM_V_at)-rm -f moxie/libsim.a
3266         $(AM_V_AR)$(moxie_libsim_a_AR) moxie/libsim.a $(moxie_libsim_a_OBJECTS) $(moxie_libsim_a_LIBADD)
3267         $(AM_V_at)$(RANLIB) moxie/libsim.a
3268 msp430/$(am__dirstamp):
3269         @$(MKDIR_P) msp430
3270         @: > msp430/$(am__dirstamp)
3271
3272 msp430/libsim.a: $(msp430_libsim_a_OBJECTS) $(msp430_libsim_a_DEPENDENCIES) $(EXTRA_msp430_libsim_a_DEPENDENCIES) msp430/$(am__dirstamp)
3273         $(AM_V_at)-rm -f msp430/libsim.a
3274         $(AM_V_AR)$(msp430_libsim_a_AR) msp430/libsim.a $(msp430_libsim_a_OBJECTS) $(msp430_libsim_a_LIBADD)
3275         $(AM_V_at)$(RANLIB) msp430/libsim.a
3276 or1k/$(am__dirstamp):
3277         @$(MKDIR_P) or1k
3278         @: > or1k/$(am__dirstamp)
3279
3280 or1k/libsim.a: $(or1k_libsim_a_OBJECTS) $(or1k_libsim_a_DEPENDENCIES) $(EXTRA_or1k_libsim_a_DEPENDENCIES) or1k/$(am__dirstamp)
3281         $(AM_V_at)-rm -f or1k/libsim.a
3282         $(AM_V_AR)$(or1k_libsim_a_AR) or1k/libsim.a $(or1k_libsim_a_OBJECTS) $(or1k_libsim_a_LIBADD)
3283         $(AM_V_at)$(RANLIB) or1k/libsim.a
3284 pru/$(am__dirstamp):
3285         @$(MKDIR_P) pru
3286         @: > pru/$(am__dirstamp)
3287
3288 pru/libsim.a: $(pru_libsim_a_OBJECTS) $(pru_libsim_a_DEPENDENCIES) $(EXTRA_pru_libsim_a_DEPENDENCIES) pru/$(am__dirstamp)
3289         $(AM_V_at)-rm -f pru/libsim.a
3290         $(AM_V_AR)$(pru_libsim_a_AR) pru/libsim.a $(pru_libsim_a_OBJECTS) $(pru_libsim_a_LIBADD)
3291         $(AM_V_at)$(RANLIB) pru/libsim.a
3292 riscv/$(am__dirstamp):
3293         @$(MKDIR_P) riscv
3294         @: > riscv/$(am__dirstamp)
3295
3296 riscv/libsim.a: $(riscv_libsim_a_OBJECTS) $(riscv_libsim_a_DEPENDENCIES) $(EXTRA_riscv_libsim_a_DEPENDENCIES) riscv/$(am__dirstamp)
3297         $(AM_V_at)-rm -f riscv/libsim.a
3298         $(AM_V_AR)$(riscv_libsim_a_AR) riscv/libsim.a $(riscv_libsim_a_OBJECTS) $(riscv_libsim_a_LIBADD)
3299         $(AM_V_at)$(RANLIB) riscv/libsim.a
3300 rl78/$(am__dirstamp):
3301         @$(MKDIR_P) rl78
3302         @: > rl78/$(am__dirstamp)
3303
3304 rl78/libsim.a: $(rl78_libsim_a_OBJECTS) $(rl78_libsim_a_DEPENDENCIES) $(EXTRA_rl78_libsim_a_DEPENDENCIES) rl78/$(am__dirstamp)
3305         $(AM_V_at)-rm -f rl78/libsim.a
3306         $(AM_V_AR)$(rl78_libsim_a_AR) rl78/libsim.a $(rl78_libsim_a_OBJECTS) $(rl78_libsim_a_LIBADD)
3307         $(AM_V_at)$(RANLIB) rl78/libsim.a
3308
3309 clean-checkPROGRAMS:
3310         @list='$(check_PROGRAMS)'; test -n "$$list" || exit 0; \
3311         echo " rm -f" $$list; \
3312         rm -f $$list || exit $$?; \
3313         test -n "$(EXEEXT)" || exit 0; \
3314         list=`for p in $$list; do echo "$$p"; done | sed 's/$(EXEEXT)$$//'`; \
3315         echo " rm -f" $$list; \
3316         rm -f $$list
3317
3318 clean-noinstPROGRAMS:
3319         @list='$(noinst_PROGRAMS)'; test -n "$$list" || exit 0; \
3320         echo " rm -f" $$list; \
3321         rm -f $$list || exit $$?; \
3322         test -n "$(EXEEXT)" || exit 0; \
3323         list=`for p in $$list; do echo "$$p"; done | sed 's/$(EXEEXT)$$//'`; \
3324         echo " rm -f" $$list; \
3325         rm -f $$list
3326
3327 aarch64/run$(EXEEXT): $(aarch64_run_OBJECTS) $(aarch64_run_DEPENDENCIES) $(EXTRA_aarch64_run_DEPENDENCIES) aarch64/$(am__dirstamp)
3328         @rm -f aarch64/run$(EXEEXT)
3329         $(AM_V_CCLD)$(LINK) $(aarch64_run_OBJECTS) $(aarch64_run_LDADD) $(LIBS)
3330
3331 arm/run$(EXEEXT): $(arm_run_OBJECTS) $(arm_run_DEPENDENCIES) $(EXTRA_arm_run_DEPENDENCIES) arm/$(am__dirstamp)
3332         @rm -f arm/run$(EXEEXT)
3333         $(AM_V_CCLD)$(LINK) $(arm_run_OBJECTS) $(arm_run_LDADD) $(LIBS)
3334
3335 avr/run$(EXEEXT): $(avr_run_OBJECTS) $(avr_run_DEPENDENCIES) $(EXTRA_avr_run_DEPENDENCIES) avr/$(am__dirstamp)
3336         @rm -f avr/run$(EXEEXT)
3337         $(AM_V_CCLD)$(LINK) $(avr_run_OBJECTS) $(avr_run_LDADD) $(LIBS)
3338
3339 bfin/run$(EXEEXT): $(bfin_run_OBJECTS) $(bfin_run_DEPENDENCIES) $(EXTRA_bfin_run_DEPENDENCIES) bfin/$(am__dirstamp)
3340         @rm -f bfin/run$(EXEEXT)
3341         $(AM_V_CCLD)$(LINK) $(bfin_run_OBJECTS) $(bfin_run_LDADD) $(LIBS)
3342
3343 bpf/run$(EXEEXT): $(bpf_run_OBJECTS) $(bpf_run_DEPENDENCIES) $(EXTRA_bpf_run_DEPENDENCIES) bpf/$(am__dirstamp)
3344         @rm -f bpf/run$(EXEEXT)
3345         $(AM_V_CCLD)$(LINK) $(bpf_run_OBJECTS) $(bpf_run_LDADD) $(LIBS)
3346 cr16/$(DEPDIR)/$(am__dirstamp):
3347         @$(MKDIR_P) cr16/$(DEPDIR)
3348         @: > cr16/$(DEPDIR)/$(am__dirstamp)
3349 cr16/gencode.$(OBJEXT): cr16/$(am__dirstamp) \
3350         cr16/$(DEPDIR)/$(am__dirstamp)
3351
3352 @SIM_ENABLE_ARCH_cr16_FALSE@cr16/gencode$(EXEEXT): $(cr16_gencode_OBJECTS) $(cr16_gencode_DEPENDENCIES) $(EXTRA_cr16_gencode_DEPENDENCIES) cr16/$(am__dirstamp)
3353 @SIM_ENABLE_ARCH_cr16_FALSE@    @rm -f cr16/gencode$(EXEEXT)
3354 @SIM_ENABLE_ARCH_cr16_FALSE@    $(AM_V_CCLD)$(LINK) $(cr16_gencode_OBJECTS) $(cr16_gencode_LDADD) $(LIBS)
3355
3356 cr16/run$(EXEEXT): $(cr16_run_OBJECTS) $(cr16_run_DEPENDENCIES) $(EXTRA_cr16_run_DEPENDENCIES) cr16/$(am__dirstamp)
3357         @rm -f cr16/run$(EXEEXT)
3358         $(AM_V_CCLD)$(LINK) $(cr16_run_OBJECTS) $(cr16_run_LDADD) $(LIBS)
3359
3360 cris/run$(EXEEXT): $(cris_run_OBJECTS) $(cris_run_DEPENDENCIES) $(EXTRA_cris_run_DEPENDENCIES) cris/$(am__dirstamp)
3361         @rm -f cris/run$(EXEEXT)
3362         $(AM_V_CCLD)$(LINK) $(cris_run_OBJECTS) $(cris_run_LDADD) $(LIBS)
3363 cris/$(DEPDIR)/$(am__dirstamp):
3364         @$(MKDIR_P) cris/$(DEPDIR)
3365         @: > cris/$(DEPDIR)/$(am__dirstamp)
3366 cris/rvdummy.$(OBJEXT): cris/$(am__dirstamp) \
3367         cris/$(DEPDIR)/$(am__dirstamp)
3368
3369 cris/rvdummy$(EXEEXT): $(cris_rvdummy_OBJECTS) $(cris_rvdummy_DEPENDENCIES) $(EXTRA_cris_rvdummy_DEPENDENCIES) cris/$(am__dirstamp)
3370         @rm -f cris/rvdummy$(EXEEXT)
3371         $(AM_V_CCLD)$(LINK) $(cris_rvdummy_OBJECTS) $(cris_rvdummy_LDADD) $(LIBS)
3372 d10v/$(DEPDIR)/$(am__dirstamp):
3373         @$(MKDIR_P) d10v/$(DEPDIR)
3374         @: > d10v/$(DEPDIR)/$(am__dirstamp)
3375 d10v/gencode.$(OBJEXT): d10v/$(am__dirstamp) \
3376         d10v/$(DEPDIR)/$(am__dirstamp)
3377
3378 @SIM_ENABLE_ARCH_d10v_FALSE@d10v/gencode$(EXEEXT): $(d10v_gencode_OBJECTS) $(d10v_gencode_DEPENDENCIES) $(EXTRA_d10v_gencode_DEPENDENCIES) d10v/$(am__dirstamp)
3379 @SIM_ENABLE_ARCH_d10v_FALSE@    @rm -f d10v/gencode$(EXEEXT)
3380 @SIM_ENABLE_ARCH_d10v_FALSE@    $(AM_V_CCLD)$(LINK) $(d10v_gencode_OBJECTS) $(d10v_gencode_LDADD) $(LIBS)
3381
3382 d10v/run$(EXEEXT): $(d10v_run_OBJECTS) $(d10v_run_DEPENDENCIES) $(EXTRA_d10v_run_DEPENDENCIES) d10v/$(am__dirstamp)
3383         @rm -f d10v/run$(EXEEXT)
3384         $(AM_V_CCLD)$(LINK) $(d10v_run_OBJECTS) $(d10v_run_LDADD) $(LIBS)
3385
3386 erc32/run$(EXEEXT): $(erc32_run_OBJECTS) $(erc32_run_DEPENDENCIES) $(EXTRA_erc32_run_DEPENDENCIES) erc32/$(am__dirstamp)
3387         @rm -f erc32/run$(EXEEXT)
3388         $(AM_V_CCLD)$(LINK) $(erc32_run_OBJECTS) $(erc32_run_LDADD) $(LIBS)
3389 erc32/$(DEPDIR)/$(am__dirstamp):
3390         @$(MKDIR_P) erc32/$(DEPDIR)
3391         @: > erc32/$(DEPDIR)/$(am__dirstamp)
3392 erc32/sis.$(OBJEXT): erc32/$(am__dirstamp) \
3393         erc32/$(DEPDIR)/$(am__dirstamp)
3394
3395 @SIM_ENABLE_ARCH_erc32_FALSE@erc32/sis$(EXEEXT): $(erc32_sis_OBJECTS) $(erc32_sis_DEPENDENCIES) $(EXTRA_erc32_sis_DEPENDENCIES) erc32/$(am__dirstamp)
3396 @SIM_ENABLE_ARCH_erc32_FALSE@   @rm -f erc32/sis$(EXEEXT)
3397 @SIM_ENABLE_ARCH_erc32_FALSE@   $(AM_V_CCLD)$(LINK) $(erc32_sis_OBJECTS) $(erc32_sis_LDADD) $(LIBS)
3398
3399 example-synacor/run$(EXEEXT): $(example_synacor_run_OBJECTS) $(example_synacor_run_DEPENDENCIES) $(EXTRA_example_synacor_run_DEPENDENCIES) example-synacor/$(am__dirstamp)
3400         @rm -f example-synacor/run$(EXEEXT)
3401         $(AM_V_CCLD)$(LINK) $(example_synacor_run_OBJECTS) $(example_synacor_run_LDADD) $(LIBS)
3402
3403 frv/run$(EXEEXT): $(frv_run_OBJECTS) $(frv_run_DEPENDENCIES) $(EXTRA_frv_run_DEPENDENCIES) frv/$(am__dirstamp)
3404         @rm -f frv/run$(EXEEXT)
3405         $(AM_V_CCLD)$(LINK) $(frv_run_OBJECTS) $(frv_run_LDADD) $(LIBS)
3406
3407 ft32/run$(EXEEXT): $(ft32_run_OBJECTS) $(ft32_run_DEPENDENCIES) $(EXTRA_ft32_run_DEPENDENCIES) ft32/$(am__dirstamp)
3408         @rm -f ft32/run$(EXEEXT)
3409         $(AM_V_CCLD)$(LINK) $(ft32_run_OBJECTS) $(ft32_run_LDADD) $(LIBS)
3410
3411 h8300/run$(EXEEXT): $(h8300_run_OBJECTS) $(h8300_run_DEPENDENCIES) $(EXTRA_h8300_run_DEPENDENCIES) h8300/$(am__dirstamp)
3412         @rm -f h8300/run$(EXEEXT)
3413         $(AM_V_CCLD)$(LINK) $(h8300_run_OBJECTS) $(h8300_run_LDADD) $(LIBS)
3414
3415 igen/filter$(EXEEXT): $(igen_filter_OBJECTS) $(igen_filter_DEPENDENCIES) $(EXTRA_igen_filter_DEPENDENCIES) igen/$(am__dirstamp)
3416         @rm -f igen/filter$(EXEEXT)
3417         $(AM_V_CCLD)$(LINK) $(igen_filter_OBJECTS) $(igen_filter_LDADD) $(LIBS)
3418
3419 igen/gen$(EXEEXT): $(igen_gen_OBJECTS) $(igen_gen_DEPENDENCIES) $(EXTRA_igen_gen_DEPENDENCIES) igen/$(am__dirstamp)
3420         @rm -f igen/gen$(EXEEXT)
3421         $(AM_V_CCLD)$(LINK) $(igen_gen_OBJECTS) $(igen_gen_LDADD) $(LIBS)
3422 igen/igen.$(OBJEXT): igen/$(am__dirstamp) \
3423         igen/$(DEPDIR)/$(am__dirstamp)
3424
3425 @SIM_ENABLE_IGEN_FALSE@igen/igen$(EXEEXT): $(igen_igen_OBJECTS) $(igen_igen_DEPENDENCIES) $(EXTRA_igen_igen_DEPENDENCIES) igen/$(am__dirstamp)
3426 @SIM_ENABLE_IGEN_FALSE@ @rm -f igen/igen$(EXEEXT)
3427 @SIM_ENABLE_IGEN_FALSE@ $(AM_V_CCLD)$(LINK) $(igen_igen_OBJECTS) $(igen_igen_LDADD) $(LIBS)
3428
3429 igen/ld-cache$(EXEEXT): $(igen_ld_cache_OBJECTS) $(igen_ld_cache_DEPENDENCIES) $(EXTRA_igen_ld_cache_DEPENDENCIES) igen/$(am__dirstamp)
3430         @rm -f igen/ld-cache$(EXEEXT)
3431         $(AM_V_CCLD)$(LINK) $(igen_ld_cache_OBJECTS) $(igen_ld_cache_LDADD) $(LIBS)
3432
3433 igen/ld-decode$(EXEEXT): $(igen_ld_decode_OBJECTS) $(igen_ld_decode_DEPENDENCIES) $(EXTRA_igen_ld_decode_DEPENDENCIES) igen/$(am__dirstamp)
3434         @rm -f igen/ld-decode$(EXEEXT)
3435         $(AM_V_CCLD)$(LINK) $(igen_ld_decode_OBJECTS) $(igen_ld_decode_LDADD) $(LIBS)
3436
3437 igen/ld-insn$(EXEEXT): $(igen_ld_insn_OBJECTS) $(igen_ld_insn_DEPENDENCIES) $(EXTRA_igen_ld_insn_DEPENDENCIES) igen/$(am__dirstamp)
3438         @rm -f igen/ld-insn$(EXEEXT)
3439         $(AM_V_CCLD)$(LINK) $(igen_ld_insn_OBJECTS) $(igen_ld_insn_LDADD) $(LIBS)
3440
3441 igen/table$(EXEEXT): $(igen_table_OBJECTS) $(igen_table_DEPENDENCIES) $(EXTRA_igen_table_DEPENDENCIES) igen/$(am__dirstamp)
3442         @rm -f igen/table$(EXEEXT)
3443         $(AM_V_CCLD)$(LINK) $(igen_table_OBJECTS) $(igen_table_LDADD) $(LIBS)
3444
3445 iq2000/run$(EXEEXT): $(iq2000_run_OBJECTS) $(iq2000_run_DEPENDENCIES) $(EXTRA_iq2000_run_DEPENDENCIES) iq2000/$(am__dirstamp)
3446         @rm -f iq2000/run$(EXEEXT)
3447         $(AM_V_CCLD)$(LINK) $(iq2000_run_OBJECTS) $(iq2000_run_LDADD) $(LIBS)
3448
3449 lm32/run$(EXEEXT): $(lm32_run_OBJECTS) $(lm32_run_DEPENDENCIES) $(EXTRA_lm32_run_DEPENDENCIES) lm32/$(am__dirstamp)
3450         @rm -f lm32/run$(EXEEXT)
3451         $(AM_V_CCLD)$(LINK) $(lm32_run_OBJECTS) $(lm32_run_LDADD) $(LIBS)
3452 m32c/$(DEPDIR)/$(am__dirstamp):
3453         @$(MKDIR_P) m32c/$(DEPDIR)
3454         @: > m32c/$(DEPDIR)/$(am__dirstamp)
3455 m32c/opc2c.$(OBJEXT): m32c/$(am__dirstamp) \
3456         m32c/$(DEPDIR)/$(am__dirstamp)
3457
3458 @SIM_ENABLE_ARCH_m32c_FALSE@m32c/opc2c$(EXEEXT): $(m32c_opc2c_OBJECTS) $(m32c_opc2c_DEPENDENCIES) $(EXTRA_m32c_opc2c_DEPENDENCIES) m32c/$(am__dirstamp)
3459 @SIM_ENABLE_ARCH_m32c_FALSE@    @rm -f m32c/opc2c$(EXEEXT)
3460 @SIM_ENABLE_ARCH_m32c_FALSE@    $(AM_V_CCLD)$(LINK) $(m32c_opc2c_OBJECTS) $(m32c_opc2c_LDADD) $(LIBS)
3461
3462 m32c/run$(EXEEXT): $(m32c_run_OBJECTS) $(m32c_run_DEPENDENCIES) $(EXTRA_m32c_run_DEPENDENCIES) m32c/$(am__dirstamp)
3463         @rm -f m32c/run$(EXEEXT)
3464         $(AM_V_CCLD)$(LINK) $(m32c_run_OBJECTS) $(m32c_run_LDADD) $(LIBS)
3465
3466 m32r/run$(EXEEXT): $(m32r_run_OBJECTS) $(m32r_run_DEPENDENCIES) $(EXTRA_m32r_run_DEPENDENCIES) m32r/$(am__dirstamp)
3467         @rm -f m32r/run$(EXEEXT)
3468         $(AM_V_CCLD)$(LINK) $(m32r_run_OBJECTS) $(m32r_run_LDADD) $(LIBS)
3469 m68hc11/$(DEPDIR)/$(am__dirstamp):
3470         @$(MKDIR_P) m68hc11/$(DEPDIR)
3471         @: > m68hc11/$(DEPDIR)/$(am__dirstamp)
3472 m68hc11/gencode.$(OBJEXT): m68hc11/$(am__dirstamp) \
3473         m68hc11/$(DEPDIR)/$(am__dirstamp)
3474
3475 @SIM_ENABLE_ARCH_m68hc11_FALSE@m68hc11/gencode$(EXEEXT): $(m68hc11_gencode_OBJECTS) $(m68hc11_gencode_DEPENDENCIES) $(EXTRA_m68hc11_gencode_DEPENDENCIES) m68hc11/$(am__dirstamp)
3476 @SIM_ENABLE_ARCH_m68hc11_FALSE@ @rm -f m68hc11/gencode$(EXEEXT)
3477 @SIM_ENABLE_ARCH_m68hc11_FALSE@ $(AM_V_CCLD)$(LINK) $(m68hc11_gencode_OBJECTS) $(m68hc11_gencode_LDADD) $(LIBS)
3478
3479 m68hc11/run$(EXEEXT): $(m68hc11_run_OBJECTS) $(m68hc11_run_DEPENDENCIES) $(EXTRA_m68hc11_run_DEPENDENCIES) m68hc11/$(am__dirstamp)
3480         @rm -f m68hc11/run$(EXEEXT)
3481         $(AM_V_CCLD)$(LINK) $(m68hc11_run_OBJECTS) $(m68hc11_run_LDADD) $(LIBS)
3482
3483 mcore/run$(EXEEXT): $(mcore_run_OBJECTS) $(mcore_run_DEPENDENCIES) $(EXTRA_mcore_run_DEPENDENCIES) mcore/$(am__dirstamp)
3484         @rm -f mcore/run$(EXEEXT)
3485         $(AM_V_CCLD)$(LINK) $(mcore_run_OBJECTS) $(mcore_run_LDADD) $(LIBS)
3486
3487 microblaze/run$(EXEEXT): $(microblaze_run_OBJECTS) $(microblaze_run_DEPENDENCIES) $(EXTRA_microblaze_run_DEPENDENCIES) microblaze/$(am__dirstamp)
3488         @rm -f microblaze/run$(EXEEXT)
3489         $(AM_V_CCLD)$(LINK) $(microblaze_run_OBJECTS) $(microblaze_run_LDADD) $(LIBS)
3490
3491 mips/run$(EXEEXT): $(mips_run_OBJECTS) $(mips_run_DEPENDENCIES) $(EXTRA_mips_run_DEPENDENCIES) mips/$(am__dirstamp)
3492         @rm -f mips/run$(EXEEXT)
3493         $(AM_V_CCLD)$(LINK) $(mips_run_OBJECTS) $(mips_run_LDADD) $(LIBS)
3494
3495 mn10300/run$(EXEEXT): $(mn10300_run_OBJECTS) $(mn10300_run_DEPENDENCIES) $(EXTRA_mn10300_run_DEPENDENCIES) mn10300/$(am__dirstamp)
3496         @rm -f mn10300/run$(EXEEXT)
3497         $(AM_V_CCLD)$(LINK) $(mn10300_run_OBJECTS) $(mn10300_run_LDADD) $(LIBS)
3498
3499 moxie/run$(EXEEXT): $(moxie_run_OBJECTS) $(moxie_run_DEPENDENCIES) $(EXTRA_moxie_run_DEPENDENCIES) moxie/$(am__dirstamp)
3500         @rm -f moxie/run$(EXEEXT)
3501         $(AM_V_CCLD)$(LINK) $(moxie_run_OBJECTS) $(moxie_run_LDADD) $(LIBS)
3502
3503 msp430/run$(EXEEXT): $(msp430_run_OBJECTS) $(msp430_run_DEPENDENCIES) $(EXTRA_msp430_run_DEPENDENCIES) msp430/$(am__dirstamp)
3504         @rm -f msp430/run$(EXEEXT)
3505         $(AM_V_CCLD)$(LINK) $(msp430_run_OBJECTS) $(msp430_run_LDADD) $(LIBS)
3506
3507 or1k/run$(EXEEXT): $(or1k_run_OBJECTS) $(or1k_run_DEPENDENCIES) $(EXTRA_or1k_run_DEPENDENCIES) or1k/$(am__dirstamp)
3508         @rm -f or1k/run$(EXEEXT)
3509         $(AM_V_CCLD)$(LINK) $(or1k_run_OBJECTS) $(or1k_run_LDADD) $(LIBS)
3510 ppc/$(am__dirstamp):
3511         @$(MKDIR_P) ppc
3512         @: > ppc/$(am__dirstamp)
3513 ppc/$(DEPDIR)/$(am__dirstamp):
3514         @$(MKDIR_P) ppc/$(DEPDIR)
3515         @: > ppc/$(DEPDIR)/$(am__dirstamp)
3516 ppc/psim.$(OBJEXT): ppc/$(am__dirstamp) ppc/$(DEPDIR)/$(am__dirstamp)
3517
3518 @SIM_ENABLE_ARCH_ppc_FALSE@ppc/psim$(EXEEXT): $(ppc_psim_OBJECTS) $(ppc_psim_DEPENDENCIES) $(EXTRA_ppc_psim_DEPENDENCIES) ppc/$(am__dirstamp)
3519 @SIM_ENABLE_ARCH_ppc_FALSE@     @rm -f ppc/psim$(EXEEXT)
3520 @SIM_ENABLE_ARCH_ppc_FALSE@     $(AM_V_CCLD)$(LINK) $(ppc_psim_OBJECTS) $(ppc_psim_LDADD) $(LIBS)
3521
3522 ppc/run$(EXEEXT): $(ppc_run_OBJECTS) $(ppc_run_DEPENDENCIES) $(EXTRA_ppc_run_DEPENDENCIES) ppc/$(am__dirstamp)
3523         @rm -f ppc/run$(EXEEXT)
3524         $(AM_V_CCLD)$(LINK) $(ppc_run_OBJECTS) $(ppc_run_LDADD) $(LIBS)
3525
3526 pru/run$(EXEEXT): $(pru_run_OBJECTS) $(pru_run_DEPENDENCIES) $(EXTRA_pru_run_DEPENDENCIES) pru/$(am__dirstamp)
3527         @rm -f pru/run$(EXEEXT)
3528         $(AM_V_CCLD)$(LINK) $(pru_run_OBJECTS) $(pru_run_LDADD) $(LIBS)
3529
3530 riscv/run$(EXEEXT): $(riscv_run_OBJECTS) $(riscv_run_DEPENDENCIES) $(EXTRA_riscv_run_DEPENDENCIES) riscv/$(am__dirstamp)
3531         @rm -f riscv/run$(EXEEXT)
3532         $(AM_V_CCLD)$(LINK) $(riscv_run_OBJECTS) $(riscv_run_LDADD) $(LIBS)
3533
3534 rl78/run$(EXEEXT): $(rl78_run_OBJECTS) $(rl78_run_DEPENDENCIES) $(EXTRA_rl78_run_DEPENDENCIES) rl78/$(am__dirstamp)
3535         @rm -f rl78/run$(EXEEXT)
3536         $(AM_V_CCLD)$(LINK) $(rl78_run_OBJECTS) $(rl78_run_LDADD) $(LIBS)
3537 rx/$(am__dirstamp):
3538         @$(MKDIR_P) rx
3539         @: > rx/$(am__dirstamp)
3540
3541 rx/run$(EXEEXT): $(rx_run_OBJECTS) $(rx_run_DEPENDENCIES) $(EXTRA_rx_run_DEPENDENCIES) rx/$(am__dirstamp)
3542         @rm -f rx/run$(EXEEXT)
3543         $(AM_V_CCLD)$(LINK) $(rx_run_OBJECTS) $(rx_run_LDADD) $(LIBS)
3544 sh/$(am__dirstamp):
3545         @$(MKDIR_P) sh
3546         @: > sh/$(am__dirstamp)
3547 sh/$(DEPDIR)/$(am__dirstamp):
3548         @$(MKDIR_P) sh/$(DEPDIR)
3549         @: > sh/$(DEPDIR)/$(am__dirstamp)
3550 sh/gencode.$(OBJEXT): sh/$(am__dirstamp) sh/$(DEPDIR)/$(am__dirstamp)
3551
3552 @SIM_ENABLE_ARCH_sh_FALSE@sh/gencode$(EXEEXT): $(sh_gencode_OBJECTS) $(sh_gencode_DEPENDENCIES) $(EXTRA_sh_gencode_DEPENDENCIES) sh/$(am__dirstamp)
3553 @SIM_ENABLE_ARCH_sh_FALSE@      @rm -f sh/gencode$(EXEEXT)
3554 @SIM_ENABLE_ARCH_sh_FALSE@      $(AM_V_CCLD)$(LINK) $(sh_gencode_OBJECTS) $(sh_gencode_LDADD) $(LIBS)
3555
3556 sh/run$(EXEEXT): $(sh_run_OBJECTS) $(sh_run_DEPENDENCIES) $(EXTRA_sh_run_DEPENDENCIES) sh/$(am__dirstamp)
3557         @rm -f sh/run$(EXEEXT)
3558         $(AM_V_CCLD)$(LINK) $(sh_run_OBJECTS) $(sh_run_LDADD) $(LIBS)
3559 testsuite/common/$(am__dirstamp):
3560         @$(MKDIR_P) testsuite/common
3561         @: > testsuite/common/$(am__dirstamp)
3562 testsuite/common/$(DEPDIR)/$(am__dirstamp):
3563         @$(MKDIR_P) testsuite/common/$(DEPDIR)
3564         @: > testsuite/common/$(DEPDIR)/$(am__dirstamp)
3565 testsuite/common/alu-tst.$(OBJEXT): testsuite/common/$(am__dirstamp) \
3566         testsuite/common/$(DEPDIR)/$(am__dirstamp)
3567 testsuite/common/bits-gen.$(OBJEXT): testsuite/common/$(am__dirstamp) \
3568         testsuite/common/$(DEPDIR)/$(am__dirstamp)
3569 testsuite/common/bits32m0.$(OBJEXT): testsuite/common/$(am__dirstamp) \
3570         testsuite/common/$(DEPDIR)/$(am__dirstamp)
3571 testsuite/common/bits32m31.$(OBJEXT):  \
3572         testsuite/common/$(am__dirstamp) \
3573         testsuite/common/$(DEPDIR)/$(am__dirstamp)
3574 testsuite/common/bits64m0.$(OBJEXT): testsuite/common/$(am__dirstamp) \
3575         testsuite/common/$(DEPDIR)/$(am__dirstamp)
3576 testsuite/common/bits64m63.$(OBJEXT):  \
3577         testsuite/common/$(am__dirstamp) \
3578         testsuite/common/$(DEPDIR)/$(am__dirstamp)
3579 testsuite/common/fpu-tst.$(OBJEXT): testsuite/common/$(am__dirstamp) \
3580         testsuite/common/$(DEPDIR)/$(am__dirstamp)
3581 v850/$(am__dirstamp):
3582         @$(MKDIR_P) v850
3583         @: > v850/$(am__dirstamp)
3584
3585 v850/run$(EXEEXT): $(v850_run_OBJECTS) $(v850_run_DEPENDENCIES) $(EXTRA_v850_run_DEPENDENCIES) v850/$(am__dirstamp)
3586         @rm -f v850/run$(EXEEXT)
3587         $(AM_V_CCLD)$(LINK) $(v850_run_OBJECTS) $(v850_run_LDADD) $(LIBS)
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3989         @echo 'Making a new site.exp file ...'
3990         @echo '## these variables are automatically generated by make ##' >site.tmp
3991         @echo '# Do not edit here.  If you wish to override these values' >>site.tmp
3992         @echo '# edit the last section' >>site.tmp
3993         @echo 'set srcdir "$(srcdir)"' >>site.tmp
3994         @echo "set objdir `pwd`" >>site.tmp
3995         @echo 'set build_alias "$(build_alias)"' >>site.tmp
3996         @echo 'set build_triplet $(build_triplet)' >>site.tmp
3997         @echo 'set host_alias "$(host_alias)"' >>site.tmp
3998         @echo 'set host_triplet $(host_triplet)' >>site.tmp
3999         @echo 'set target_alias "$(target_alias)"' >>site.tmp
4000         @echo 'set target_triplet $(target_triplet)' >>site.tmp
4001         @list='$(EXTRA_DEJAGNU_SITE_CONFIG)'; for f in $$list; do \
4002           echo "## Begin content included from file $$f.  Do not modify. ##" \
4003            && cat `test -f "$$f" || echo '$(srcdir)/'`$$f \
4004            && echo "## End content included from file $$f. ##" \
4005            || exit 1; \
4006          done >> site.tmp
4007         @echo "## End of auto-generated content; you can edit from here. ##" >> site.tmp
4008         @if test -f site.exp; then \
4009            sed -e '1,/^## End of auto-generated content.*##/d' site.exp >> site.tmp; \
4010          fi
4011         @-rm -f site.bak
4012         @test ! -f site.exp || mv site.exp site.bak
4013         @mv site.tmp site.exp
4014
4015 distclean-DEJAGNU:
4016         -rm -f site.exp site.bak
4017         -l='$(DEJATOOL)'; for tool in $$l; do \
4018           rm -f $$tool.sum $$tool.log; \
4019         done
4020
4021 # Recover from deleted '.trs' file; this should ensure that
4022 # "rm -f foo.log; make foo.trs" re-run 'foo.test', and re-create
4023 # both 'foo.log' and 'foo.trs'.  Break the recipe in two subshells
4024 # to avoid problems with "make -n".
4025 .log.trs:
4026         rm -f $< $@
4027         $(MAKE) $(AM_MAKEFLAGS) $<
4028
4029 # Leading 'am--fnord' is there to ensure the list of targets does not
4030 # expand to empty, as could happen e.g. with make check TESTS=''.
4031 am--fnord $(TEST_LOGS) $(TEST_LOGS:.log=.trs): $(am__force_recheck)
4032 am--force-recheck:
4033         @:
4034
4035 $(TEST_SUITE_LOG): $(TEST_LOGS)
4036         @$(am__set_TESTS_bases); \
4037         am__f_ok () { test -f "$$1" && test -r "$$1"; }; \
4038         redo_bases=`for i in $$bases; do \
4039                       am__f_ok $$i.trs && am__f_ok $$i.log || echo $$i; \
4040                     done`; \
4041         if test -n "$$redo_bases"; then \
4042           redo_logs=`for i in $$redo_bases; do echo $$i.log; done`; \
4043           redo_results=`for i in $$redo_bases; do echo $$i.trs; done`; \
4044           if $(am__make_dryrun); then :; else \
4045             rm -f $$redo_logs && rm -f $$redo_results || exit 1; \
4046           fi; \
4047         fi; \
4048         if test -n "$$am__remaking_logs"; then \
4049           echo "fatal: making $(TEST_SUITE_LOG): possible infinite" \
4050                "recursion detected" >&2; \
4051         elif test -n "$$redo_logs"; then \
4052           am__remaking_logs=yes $(MAKE) $(AM_MAKEFLAGS) $$redo_logs; \
4053         fi; \
4054         if $(am__make_dryrun); then :; else \
4055           st=0;  \
4056           errmsg="fatal: making $(TEST_SUITE_LOG): failed to create"; \
4057           for i in $$redo_bases; do \
4058             test -f $$i.trs && test -r $$i.trs \
4059               || { echo "$$errmsg $$i.trs" >&2; st=1; }; \
4060             test -f $$i.log && test -r $$i.log \
4061               || { echo "$$errmsg $$i.log" >&2; st=1; }; \
4062           done; \
4063           test $$st -eq 0 || exit 1; \
4064         fi
4065         @$(am__sh_e_setup); $(am__tty_colors); $(am__set_TESTS_bases); \
4066         ws='[   ]'; \
4067         results=`for b in $$bases; do echo $$b.trs; done`; \
4068         test -n "$$results" || results=/dev/null; \
4069         all=`  grep "^$$ws*:test-result:"           $$results | wc -l`; \
4070         pass=` grep "^$$ws*:test-result:$$ws*PASS"  $$results | wc -l`; \
4071         fail=` grep "^$$ws*:test-result:$$ws*FAIL"  $$results | wc -l`; \
4072         skip=` grep "^$$ws*:test-result:$$ws*SKIP"  $$results | wc -l`; \
4073         xfail=`grep "^$$ws*:test-result:$$ws*XFAIL" $$results | wc -l`; \
4074         xpass=`grep "^$$ws*:test-result:$$ws*XPASS" $$results | wc -l`; \
4075         error=`grep "^$$ws*:test-result:$$ws*ERROR" $$results | wc -l`; \
4076         if test `expr $$fail + $$xpass + $$error` -eq 0; then \
4077           success=true; \
4078         else \
4079           success=false; \
4080         fi; \
4081         br='==================='; br=$$br$$br$$br$$br; \
4082         result_count () \
4083         { \
4084             if test x"$$1" = x"--maybe-color"; then \
4085               maybe_colorize=yes; \
4086             elif test x"$$1" = x"--no-color"; then \
4087               maybe_colorize=no; \
4088             else \
4089               echo "$@: invalid 'result_count' usage" >&2; exit 4; \
4090             fi; \
4091             shift; \
4092             desc=$$1 count=$$2; \
4093             if test $$maybe_colorize = yes && test $$count -gt 0; then \
4094               color_start=$$3 color_end=$$std; \
4095             else \
4096               color_start= color_end=; \
4097             fi; \
4098             echo "$${color_start}# $$desc $$count$${color_end}"; \
4099         }; \
4100         create_testsuite_report () \
4101         { \
4102           result_count $$1 "TOTAL:" $$all   "$$brg"; \
4103           result_count $$1 "PASS: " $$pass  "$$grn"; \
4104           result_count $$1 "SKIP: " $$skip  "$$blu"; \
4105           result_count $$1 "XFAIL:" $$xfail "$$lgn"; \
4106           result_count $$1 "FAIL: " $$fail  "$$red"; \
4107           result_count $$1 "XPASS:" $$xpass "$$red"; \
4108           result_count $$1 "ERROR:" $$error "$$mgn"; \
4109         }; \
4110         {                                                               \
4111           echo "$(PACKAGE_STRING): $(subdir)/$(TEST_SUITE_LOG)" |       \
4112             $(am__rst_title);                                           \
4113           create_testsuite_report --no-color;                           \
4114           echo;                                                         \
4115           echo ".. contents:: :depth: 2";                               \
4116           echo;                                                         \
4117           for b in $$bases; do echo $$b; done                           \
4118             | $(am__create_global_log);                                 \
4119         } >$(TEST_SUITE_LOG).tmp || exit 1;                             \
4120         mv $(TEST_SUITE_LOG).tmp $(TEST_SUITE_LOG);                     \
4121         if $$success; then                                              \
4122           col="$$grn";                                                  \
4123          else                                                           \
4124           col="$$red";                                                  \
4125           test x"$$VERBOSE" = x || cat $(TEST_SUITE_LOG);               \
4126         fi;                                                             \
4127         echo "$${col}$$br$${std}";                                      \
4128         echo "$${col}Testsuite summary for $(PACKAGE_STRING)$${std}";   \
4129         echo "$${col}$$br$${std}";                                      \
4130         create_testsuite_report --maybe-color;                          \
4131         echo "$$col$$br$$std";                                          \
4132         if $$success; then :; else                                      \
4133           echo "$${col}See $(subdir)/$(TEST_SUITE_LOG)$${std}";         \
4134           if test -n "$(PACKAGE_BUGREPORT)"; then                       \
4135             echo "$${col}Please report to $(PACKAGE_BUGREPORT)$${std}"; \
4136           fi;                                                           \
4137           echo "$$col$$br$$std";                                        \
4138         fi;                                                             \
4139         $$success || exit 1
4140
4141 check-TESTS:
4142         @list='$(RECHECK_LOGS)';           test -z "$$list" || rm -f $$list
4143         @list='$(RECHECK_LOGS:.log=.trs)'; test -z "$$list" || rm -f $$list
4144         @test -z "$(TEST_SUITE_LOG)" || rm -f $(TEST_SUITE_LOG)
4145         @set +e; $(am__set_TESTS_bases); \
4146         log_list=`for i in $$bases; do echo $$i.log; done`; \
4147         trs_list=`for i in $$bases; do echo $$i.trs; done`; \
4148         log_list=`echo $$log_list`; trs_list=`echo $$trs_list`; \
4149         $(MAKE) $(AM_MAKEFLAGS) $(TEST_SUITE_LOG) TEST_LOGS="$$log_list"; \
4150         exit $$?;
4151 recheck: all $(check_PROGRAMS)
4152         @test -z "$(TEST_SUITE_LOG)" || rm -f $(TEST_SUITE_LOG)
4153         @set +e; $(am__set_TESTS_bases); \
4154         bases=`for i in $$bases; do echo $$i; done \
4155                  | $(am__list_recheck_tests)` || exit 1; \
4156         log_list=`for i in $$bases; do echo $$i.log; done`; \
4157         log_list=`echo $$log_list`; \
4158         $(MAKE) $(AM_MAKEFLAGS) $(TEST_SUITE_LOG) \
4159                 am__force_recheck=am--force-recheck \
4160                 TEST_LOGS="$$log_list"; \
4161         exit $$?
4162 testsuite/common/bits32m0.log: testsuite/common/bits32m0$(EXEEXT)
4163         @p='testsuite/common/bits32m0$(EXEEXT)'; \
4164         b='testsuite/common/bits32m0'; \
4165         $(am__check_pre) $(LOG_DRIVER) --test-name "$$f" \
4166         --log-file $$b.log --trs-file $$b.trs \
4167         $(am__common_driver_flags) $(AM_LOG_DRIVER_FLAGS) $(LOG_DRIVER_FLAGS) -- $(LOG_COMPILE) \
4168         "$$tst" $(AM_TESTS_FD_REDIRECT)
4169 testsuite/common/bits32m31.log: testsuite/common/bits32m31$(EXEEXT)
4170         @p='testsuite/common/bits32m31$(EXEEXT)'; \
4171         b='testsuite/common/bits32m31'; \
4172         $(am__check_pre) $(LOG_DRIVER) --test-name "$$f" \
4173         --log-file $$b.log --trs-file $$b.trs \
4174         $(am__common_driver_flags) $(AM_LOG_DRIVER_FLAGS) $(LOG_DRIVER_FLAGS) -- $(LOG_COMPILE) \
4175         "$$tst" $(AM_TESTS_FD_REDIRECT)
4176 testsuite/common/bits64m0.log: testsuite/common/bits64m0$(EXEEXT)
4177         @p='testsuite/common/bits64m0$(EXEEXT)'; \
4178         b='testsuite/common/bits64m0'; \
4179         $(am__check_pre) $(LOG_DRIVER) --test-name "$$f" \
4180         --log-file $$b.log --trs-file $$b.trs \
4181         $(am__common_driver_flags) $(AM_LOG_DRIVER_FLAGS) $(LOG_DRIVER_FLAGS) -- $(LOG_COMPILE) \
4182         "$$tst" $(AM_TESTS_FD_REDIRECT)
4183 testsuite/common/bits64m63.log: testsuite/common/bits64m63$(EXEEXT)
4184         @p='testsuite/common/bits64m63$(EXEEXT)'; \
4185         b='testsuite/common/bits64m63'; \
4186         $(am__check_pre) $(LOG_DRIVER) --test-name "$$f" \
4187         --log-file $$b.log --trs-file $$b.trs \
4188         $(am__common_driver_flags) $(AM_LOG_DRIVER_FLAGS) $(LOG_DRIVER_FLAGS) -- $(LOG_COMPILE) \
4189         "$$tst" $(AM_TESTS_FD_REDIRECT)
4190 testsuite/common/alu-tst.log: testsuite/common/alu-tst$(EXEEXT)
4191         @p='testsuite/common/alu-tst$(EXEEXT)'; \
4192         b='testsuite/common/alu-tst'; \
4193         $(am__check_pre) $(LOG_DRIVER) --test-name "$$f" \
4194         --log-file $$b.log --trs-file $$b.trs \
4195         $(am__common_driver_flags) $(AM_LOG_DRIVER_FLAGS) $(LOG_DRIVER_FLAGS) -- $(LOG_COMPILE) \
4196         "$$tst" $(AM_TESTS_FD_REDIRECT)
4197 .test.log:
4198         @p='$<'; \
4199         $(am__set_b); \
4200         $(am__check_pre) $(TEST_LOG_DRIVER) --test-name "$$f" \
4201         --log-file $$b.log --trs-file $$b.trs \
4202         $(am__common_driver_flags) $(AM_TEST_LOG_DRIVER_FLAGS) $(TEST_LOG_DRIVER_FLAGS) -- $(TEST_LOG_COMPILE) \
4203         "$$tst" $(AM_TESTS_FD_REDIRECT)
4204 @am__EXEEXT_TRUE@.test$(EXEEXT).log:
4205 @am__EXEEXT_TRUE@       @p='$<'; \
4206 @am__EXEEXT_TRUE@       $(am__set_b); \
4207 @am__EXEEXT_TRUE@       $(am__check_pre) $(TEST_LOG_DRIVER) --test-name "$$f" \
4208 @am__EXEEXT_TRUE@       --log-file $$b.log --trs-file $$b.trs \
4209 @am__EXEEXT_TRUE@       $(am__common_driver_flags) $(AM_TEST_LOG_DRIVER_FLAGS) $(TEST_LOG_DRIVER_FLAGS) -- $(TEST_LOG_COMPILE) \
4210 @am__EXEEXT_TRUE@       "$$tst" $(AM_TESTS_FD_REDIRECT)
4211 check-am: all-am
4212         $(MAKE) $(AM_MAKEFLAGS) $(check_PROGRAMS)
4213         $(MAKE) $(AM_MAKEFLAGS) check-DEJAGNU check-TESTS
4214 check: $(BUILT_SOURCES)
4215         $(MAKE) $(AM_MAKEFLAGS) check-recursive
4216 all-am: Makefile $(LIBRARIES) $(PROGRAMS) $(DATA) $(HEADERS) config.h
4217 installdirs: installdirs-recursive
4218 installdirs-am:
4219         for dir in "$(DESTDIR)$(armdocdir)" "$(DESTDIR)$(dtbdir)" "$(DESTDIR)$(erc32docdir)" "$(DESTDIR)$(frvdocdir)" "$(DESTDIR)$(or1kdocdir)" "$(DESTDIR)$(ppcdocdir)" "$(DESTDIR)$(rxdocdir)" "$(DESTDIR)$(pkgincludedir)"; do \
4220           test -z "$$dir" || $(MKDIR_P) "$$dir"; \
4221         done
4222 install: $(BUILT_SOURCES)
4223         $(MAKE) $(AM_MAKEFLAGS) install-recursive
4224 install-exec: install-exec-recursive
4225 install-data: install-data-recursive
4226 uninstall: uninstall-recursive
4227
4228 install-am: all-am
4229         @$(MAKE) $(AM_MAKEFLAGS) install-exec-am install-data-am
4230
4231 installcheck: installcheck-recursive
4232 install-strip:
4233         if test -z '$(STRIP)'; then \
4234           $(MAKE) $(AM_MAKEFLAGS) INSTALL_PROGRAM="$(INSTALL_STRIP_PROGRAM)" \
4235             install_sh_PROGRAM="$(INSTALL_STRIP_PROGRAM)" INSTALL_STRIP_FLAG=-s \
4236               install; \
4237         else \
4238           $(MAKE) $(AM_MAKEFLAGS) INSTALL_PROGRAM="$(INSTALL_STRIP_PROGRAM)" \
4239             install_sh_PROGRAM="$(INSTALL_STRIP_PROGRAM)" INSTALL_STRIP_FLAG=-s \
4240             "INSTALL_PROGRAM_ENV=STRIPPROG='$(STRIP)'" install; \
4241         fi
4242 mostlyclean-generic:
4243         -test -z "$(MOSTLYCLEANFILES)" || rm -f $(MOSTLYCLEANFILES)
4244         -test -z "$(TEST_LOGS)" || rm -f $(TEST_LOGS)
4245         -test -z "$(TEST_LOGS:.log=.trs)" || rm -f $(TEST_LOGS:.log=.trs)
4246         -test -z "$(TEST_SUITE_LOG)" || rm -f $(TEST_SUITE_LOG)
4247
4248 clean-generic:
4249         -test -z "$(CLEANFILES)" || rm -f $(CLEANFILES)
4250
4251 distclean-generic:
4252         -test -z "$(CONFIG_CLEAN_FILES)" || rm -f $(CONFIG_CLEAN_FILES)
4253         -test . = "$(srcdir)" || test -z "$(CONFIG_CLEAN_VPATH_FILES)" || rm -f $(CONFIG_CLEAN_VPATH_FILES)
4254         -rm -f aarch64/$(am__dirstamp)
4255         -rm -f arm/$(am__dirstamp)
4256         -rm -f avr/$(am__dirstamp)
4257         -rm -f bfin/$(am__dirstamp)
4258         -rm -f bpf/$(am__dirstamp)
4259         -rm -f common/$(DEPDIR)/$(am__dirstamp)
4260         -rm -f common/$(am__dirstamp)
4261         -rm -f cr16/$(DEPDIR)/$(am__dirstamp)
4262         -rm -f cr16/$(am__dirstamp)
4263         -rm -f cris/$(DEPDIR)/$(am__dirstamp)
4264         -rm -f cris/$(am__dirstamp)
4265         -rm -f d10v/$(DEPDIR)/$(am__dirstamp)
4266         -rm -f d10v/$(am__dirstamp)
4267         -rm -f erc32/$(DEPDIR)/$(am__dirstamp)
4268         -rm -f erc32/$(am__dirstamp)
4269         -rm -f example-synacor/$(am__dirstamp)
4270         -rm -f frv/$(am__dirstamp)
4271         -rm -f ft32/$(am__dirstamp)
4272         -rm -f h8300/$(am__dirstamp)
4273         -rm -f igen/$(DEPDIR)/$(am__dirstamp)
4274         -rm -f igen/$(am__dirstamp)
4275         -rm -f iq2000/$(am__dirstamp)
4276         -rm -f lm32/$(am__dirstamp)
4277         -rm -f m32c/$(DEPDIR)/$(am__dirstamp)
4278         -rm -f m32c/$(am__dirstamp)
4279         -rm -f m32r/$(am__dirstamp)
4280         -rm -f m68hc11/$(DEPDIR)/$(am__dirstamp)
4281         -rm -f m68hc11/$(am__dirstamp)
4282         -rm -f mcore/$(am__dirstamp)
4283         -rm -f microblaze/$(am__dirstamp)
4284         -rm -f mips/$(am__dirstamp)
4285         -rm -f mn10300/$(am__dirstamp)
4286         -rm -f moxie/$(am__dirstamp)
4287         -rm -f msp430/$(am__dirstamp)
4288         -rm -f or1k/$(am__dirstamp)
4289         -rm -f ppc/$(DEPDIR)/$(am__dirstamp)
4290         -rm -f ppc/$(am__dirstamp)
4291         -rm -f pru/$(am__dirstamp)
4292         -rm -f riscv/$(am__dirstamp)
4293         -rm -f rl78/$(am__dirstamp)
4294         -rm -f rx/$(am__dirstamp)
4295         -rm -f sh/$(DEPDIR)/$(am__dirstamp)
4296         -rm -f sh/$(am__dirstamp)
4297         -rm -f testsuite/common/$(DEPDIR)/$(am__dirstamp)
4298         -rm -f testsuite/common/$(am__dirstamp)
4299         -rm -f v850/$(am__dirstamp)
4300         -test -z "$(DISTCLEANFILES)" || rm -f $(DISTCLEANFILES)
4301
4302 maintainer-clean-generic:
4303         @echo "This command is intended for maintainers to use"
4304         @echo "it deletes files that may require special tools to rebuild."
4305         -test -z "$(BUILT_SOURCES)" || rm -f $(BUILT_SOURCES)
4306 clean: clean-recursive
4307
4308 clean-am: clean-checkPROGRAMS clean-generic clean-libtool \
4309         clean-noinstLIBRARIES clean-noinstPROGRAMS mostlyclean-am
4310
4311 distclean: distclean-recursive
4312         -rm -f $(am__CONFIG_DISTCLEAN_FILES)
4313         -rm -rf common/$(DEPDIR) cr16/$(DEPDIR) cris/$(DEPDIR) d10v/$(DEPDIR) erc32/$(DEPDIR) igen/$(DEPDIR) m32c/$(DEPDIR) m68hc11/$(DEPDIR) ppc/$(DEPDIR) sh/$(DEPDIR) testsuite/common/$(DEPDIR)
4314         -rm -f Makefile
4315 distclean-am: clean-am distclean-DEJAGNU distclean-compile \
4316         distclean-generic distclean-hdr distclean-libtool \
4317         distclean-tags
4318
4319 dvi: dvi-recursive
4320
4321 dvi-am:
4322
4323 html: html-recursive
4324
4325 html-am:
4326
4327 info: info-recursive
4328
4329 info-am:
4330
4331 install-data-am: install-armdocDATA install-data-local install-dtbDATA \
4332         install-erc32docDATA install-frvdocDATA install-or1kdocDATA \
4333         install-pkgincludeHEADERS install-ppcdocDATA install-rxdocDATA
4334
4335 install-dvi: install-dvi-recursive
4336
4337 install-dvi-am:
4338
4339 install-exec-am: install-exec-local
4340
4341 install-html: install-html-recursive
4342
4343 install-html-am:
4344
4345 install-info: install-info-recursive
4346
4347 install-info-am:
4348
4349 install-man:
4350
4351 install-pdf: install-pdf-recursive
4352
4353 install-pdf-am:
4354
4355 install-ps: install-ps-recursive
4356
4357 install-ps-am:
4358
4359 installcheck-am:
4360
4361 maintainer-clean: maintainer-clean-recursive
4362         -rm -f $(am__CONFIG_DISTCLEAN_FILES)
4363         -rm -rf $(top_srcdir)/autom4te.cache
4364         -rm -rf common/$(DEPDIR) cr16/$(DEPDIR) cris/$(DEPDIR) d10v/$(DEPDIR) erc32/$(DEPDIR) igen/$(DEPDIR) m32c/$(DEPDIR) m68hc11/$(DEPDIR) ppc/$(DEPDIR) sh/$(DEPDIR) testsuite/common/$(DEPDIR)
4365         -rm -f Makefile
4366 maintainer-clean-am: distclean-am maintainer-clean-generic
4367
4368 mostlyclean: mostlyclean-recursive
4369
4370 mostlyclean-am: mostlyclean-compile mostlyclean-generic \
4371         mostlyclean-libtool
4372
4373 pdf: pdf-recursive
4374
4375 pdf-am:
4376
4377 ps: ps-recursive
4378
4379 ps-am:
4380
4381 uninstall-am: uninstall-armdocDATA uninstall-dtbDATA \
4382         uninstall-erc32docDATA uninstall-frvdocDATA uninstall-local \
4383         uninstall-or1kdocDATA uninstall-pkgincludeHEADERS \
4384         uninstall-ppcdocDATA uninstall-rxdocDATA
4385
4386 .MAKE: $(am__recursive_targets) all check check-am install install-am \
4387         install-strip
4388
4389 .PHONY: $(am__recursive_targets) CTAGS GTAGS TAGS all all-am \
4390         am--refresh check check-DEJAGNU check-TESTS check-am clean \
4391         clean-checkPROGRAMS clean-cscope clean-generic clean-libtool \
4392         clean-noinstLIBRARIES clean-noinstPROGRAMS cscope \
4393         cscopelist-am ctags ctags-am distclean distclean-DEJAGNU \
4394         distclean-compile distclean-generic distclean-hdr \
4395         distclean-libtool distclean-tags dvi dvi-am html html-am info \
4396         info-am install install-am install-armdocDATA install-data \
4397         install-data-am install-data-local install-dtbDATA install-dvi \
4398         install-dvi-am install-erc32docDATA install-exec \
4399         install-exec-am install-exec-local install-frvdocDATA \
4400         install-html install-html-am install-info install-info-am \
4401         install-man install-or1kdocDATA install-pdf install-pdf-am \
4402         install-pkgincludeHEADERS install-ppcdocDATA install-ps \
4403         install-ps-am install-rxdocDATA install-strip installcheck \
4404         installcheck-am installdirs installdirs-am maintainer-clean \
4405         maintainer-clean-generic mostlyclean mostlyclean-compile \
4406         mostlyclean-generic mostlyclean-libtool pdf pdf-am ps ps-am \
4407         recheck tags tags-am uninstall uninstall-am \
4408         uninstall-armdocDATA uninstall-dtbDATA uninstall-erc32docDATA \
4409         uninstall-frvdocDATA uninstall-local uninstall-or1kdocDATA \
4410         uninstall-pkgincludeHEADERS uninstall-ppcdocDATA \
4411         uninstall-rxdocDATA
4412
4413 .PRECIOUS: Makefile
4414
4415 @am__include@ @am__quote@$(GNULIB_PARENT_DIR)/gnulib/Makefile.gnulib.inc@am__quote@
4416
4417 # Generate target constants for newlib/libgloss from its source tree.
4418 # This file is shipped with distributions so we build in the source dir.
4419 # Use `make nltvals' to rebuild.
4420 .PHONY: nltvals
4421 nltvals:
4422         $(srccom)/gennltvals.py --cpp "$(CPP)"
4423
4424 common/version.c: common/version.c-stamp ; @true
4425 common/version.c-stamp: $(srcroot)/gdb/version.in $(srcroot)/bfd/version.h $(srcdir)/common/create-version.sh
4426         $(AM_V_GEN)$(SHELL) $(srcdir)/common/create-version.sh $(srcroot)/gdb $@.tmp
4427         $(AM_V_at)$(SHELL) $(srcroot)/move-if-change $@.tmp $(@:-stamp=)
4428         $(AM_V_at)touch $@
4429
4430 # FIXME This is one very simple-minded way of generating the file hw-config.h.
4431 %/hw-config.h: %/stamp-hw ; @true
4432 %/stamp-hw: Makefile
4433         $(AM_V_GEN)set -e; \
4434         ( \
4435         sim_hw="$(SIM_HW_DEVICES) $($(@D)_SIM_EXTRA_HW_DEVICES)" ; \
4436         echo "/* generated by Makefile */" ; \
4437         printf "extern const struct hw_descriptor dv_%s_descriptor[];\n" $$sim_hw ; \
4438         echo "const struct hw_descriptor * const hw_descriptors[] = {" ; \
4439         printf "  dv_%s_descriptor,\n" $$sim_hw ; \
4440         echo "  NULL," ; \
4441         echo "};" \
4442         ) > $@.tmp; \
4443         $(SHELL) $(srcroot)/move-if-change $@.tmp $(@D)/hw-config.h; \
4444         touch $@
4445 .PRECIOUS: %/stamp-hw
4446 %/modules.c:
4447         $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) GEN_MODULES_C_SRCS="$(GEN_MODULES_C_SRCS)" -C $(@D) $(@F)
4448
4449 # Alias for developers.
4450 @SIM_ENABLE_IGEN_TRUE@igen: $(IGEN)
4451
4452 # These rules are copied from automake, but tweaked to use FOR_BUILD variables.
4453 @SIM_ENABLE_IGEN_TRUE@igen/libigen.a: $(igen_libigen_a_OBJECTS) $(igen_libigen_a_DEPENDENCIES) $(EXTRA_igen_libigen_a_DEPENDENCIES) igen/$(am__dirstamp)
4454 @SIM_ENABLE_IGEN_TRUE@  $(AM_V_at)-rm -f $@
4455 @SIM_ENABLE_IGEN_TRUE@  $(AM_V_AR)$(AR_FOR_BUILD) $(ARFLAGS) $@ $(igen_libigen_a_OBJECTS) $(igen_libigen_a_LIBADD)
4456 @SIM_ENABLE_IGEN_TRUE@  $(AM_V_at)$(RANLIB_FOR_BUILD) $@
4457
4458 @SIM_ENABLE_IGEN_TRUE@igen/igen$(EXEEXT): $(igen_igen_OBJECTS) $(igen_igen_DEPENDENCIES) igen/$(am__dirstamp)
4459 @SIM_ENABLE_IGEN_TRUE@  $(AM_V_CCLD)$(LINK_FOR_BUILD) $(igen_igen_OBJECTS) $(igen_igen_LDADD)
4460
4461 # igen is a build-time only tool.  Override the default rules for it.
4462 @SIM_ENABLE_IGEN_TRUE@igen/%.o: igen/%.c
4463 @SIM_ENABLE_IGEN_TRUE@  $(AM_V_CC)$(COMPILE_FOR_BUILD) -c $< -o $@
4464
4465 # Build some of the files in standalone mode for developers of igen itself.
4466 @SIM_ENABLE_IGEN_TRUE@igen/%-main.o: igen/%.c
4467 @SIM_ENABLE_IGEN_TRUE@  $(AM_V_CC)$(COMPILE_FOR_BUILD) -DMAIN -c $< -o $@
4468
4469 site-sim-config.exp: Makefile
4470         $(AM_V_GEN)( \
4471         echo "set SIM_PRIMARY_TARGET \"$(SIM_PRIMARY_TARGET)\""; \
4472         echo "set builddir \"$(builddir)\""; \
4473         echo "set srcdir \"$(srcdir)/testsuite\""; \
4474         $(foreach V,$(SIM_TOOLCHAIN_VARS),echo "set $(V) \"$($(V))\"";) \
4475         ) > $@
4476
4477 # Ignore dirs that only contain configuration settings.
4478 check/./config/%.exp: ; @true
4479 check/config/%.exp: ; @true
4480 check/./lib/%.exp: ; @true
4481 check/lib/%.exp: ; @true
4482
4483 check/%.exp:
4484         $(AM_V_at)mkdir -p testsuite/$*
4485         $(AM_V_RUNTEST)$(DO_RUNTEST) --objdir testsuite/$* --outdir testsuite/$* $*.exp
4486
4487 check-DEJAGNU-parallel:
4488         $(AM_V_at)( \
4489         set -- `cd $(srcdir)/testsuite && find . -name '*.exp' -printf '%P\n' | sed 's:[.]exp$$::'`; \
4490         $(MAKE) -k `printf 'check/%s.exp ' $$@`; \
4491         ret=$$?; \
4492         set -- `printf 'testsuite/%s/ ' $$@`; \
4493         $(SHELL) $(srcroot)/contrib/dg-extract-results.sh \
4494           `find $$@ -maxdepth 1 -name testrun.sum 2>/dev/null | sort` > testrun.sum; \
4495         $(SHELL) $(srcroot)/contrib/dg-extract-results.sh -L \
4496           `find $$@ -maxdepth 1 -name testrun.log 2>/dev/null | sort` > testrun.log; \
4497         echo; \
4498         $(SED) -n '/^.*===.*Summary.*===/,$$p' testrun.sum; \
4499         exit $$ret)
4500
4501 check-DEJAGNU-single:
4502         $(AM_V_RUNTEST)$(DO_RUNTEST)
4503
4504 # If running a single job, invoking runtest once is faster & has nicer output.
4505 check-DEJAGNU: site.exp
4506         $(AM_V_at)(set -e; \
4507         EXPECT=${EXPECT} ; export EXPECT ; \
4508         runtest=$(RUNTEST); \
4509         if $(SHELL) -c "$$runtest --version" > /dev/null 2>&1; then \
4510           case "$(MAKEFLAGS)" in \
4511           *-j*) $(MAKE) check-DEJAGNU-parallel;; \
4512           *)    $(MAKE) check-DEJAGNU-single;; \
4513           esac; \
4514         else \
4515           echo "WARNING: could not find \`runtest'" 1>&2; :;\
4516         fi)
4517
4518 # These tests are build-time only tools.  Override the default rules for them.
4519 testsuite/common/%.o: testsuite/common/%.c
4520         $(AM_V_CC)$(COMPILE_FOR_BUILD) $(testsuite_common_CPPFLAGS) -c $< -o $@
4521
4522 testsuite/common/alu-tst$(EXEEXT): $(testsuite_common_alu_tst_OBJECTS) $(testsuite_common_alu_tst_DEPENDENCIES) testsuite/common/$(am__dirstamp)
4523         $(AM_V_CCLD)$(LINK_FOR_BUILD) $(testsuite_common_alu_tst_OBJECTS) $(testsuite_common_alu_tst_LDADD)
4524
4525 testsuite/common/fpu-tst$(EXEEXT): $(testsuite_common_fpu_tst_OBJECTS) $(testsuite_common_fpu_tst_DEPENDENCIES) testsuite/common/$(am__dirstamp)
4526         $(AM_V_CCLD)$(LINK_FOR_BUILD) $(testsuite_common_fpu_tst_OBJECTS) $(testsuite_common_fpu_tst_LDADD)
4527
4528 testsuite/common/bits-gen$(EXEEXT): $(testsuite_common_bits_gen_OBJECTS) $(testsuite_common_bits_gen_DEPENDENCIES) testsuite/common/$(am__dirstamp)
4529         $(AM_V_CCLD)$(LINK_FOR_BUILD) $(testsuite_common_bits_gen_OBJECTS) $(testsuite_common_bits_gen_LDADD)
4530
4531 testsuite/common/bits32m0$(EXEEXT): $(testsuite_common_bits32m0_OBJECTS) $(testsuite_common_bits32m0_DEPENDENCIES) testsuite/common/$(am__dirstamp)
4532         $(AM_V_CCLD)$(LINK_FOR_BUILD) $(testsuite_common_bits32m0_OBJECTS) $(testsuite_common_bits32m0_LDADD)
4533
4534 testsuite/common/bits32m0.c: testsuite/common/bits-gen$(EXEEXT) testsuite/common/bits-tst.c
4535         $(AM_V_GEN)$< 32 0 big > $@.tmp
4536         $(AM_V_at)cat $(srcdir)/testsuite/common/bits-tst.c >> $@.tmp
4537         $(AM_V_at)mv $@.tmp $@
4538
4539 testsuite/common/bits32m31$(EXEEXT): $(testsuite_common_bits32m31_OBJECTS) $(testsuite_common_bits32m31_DEPENDENCIES) testsuite/common/$(am__dirstamp)
4540         $(AM_V_CCLD)$(LINK_FOR_BUILD) $(testsuite_common_bits32m31_OBJECTS) $(testsuite_common_bits32m31_LDADD)
4541
4542 testsuite/common/bits32m31.c: testsuite/common/bits-gen$(EXEEXT) testsuite/common/bits-tst.c
4543         $(AM_V_GEN)$< 32 31 little > $@.tmp
4544         $(AM_V_at)cat $(srcdir)/testsuite/common/bits-tst.c >> $@.tmp
4545         $(AM_V_at)mv $@.tmp $@
4546
4547 testsuite/common/bits64m0$(EXEEXT): $(testsuite_common_bits64m0_OBJECTS) $(testsuite_common_bits64m0_DEPENDENCIES) testsuite/common/$(am__dirstamp)
4548         $(AM_V_CCLD)$(LINK_FOR_BUILD) $(testsuite_common_bits64m0_OBJECTS) $(testsuite_common_bits64m0_LDADD)
4549
4550 testsuite/common/bits64m0.c: testsuite/common/bits-gen$(EXEEXT) testsuite/common/bits-tst.c
4551         $(AM_V_GEN)$< 64 0 big > $@.tmp
4552         $(AM_V_at)cat $(srcdir)/testsuite/common/bits-tst.c >> $@.tmp
4553         $(AM_V_at)mv $@.tmp $@
4554
4555 testsuite/common/bits64m63$(EXEEXT): $(testsuite_common_bits64m63_OBJECTS) $(testsuite_common_bits64m63_DEPENDENCIES) testsuite/common/$(am__dirstamp)
4556         $(AM_V_CCLD)$(LINK_FOR_BUILD) $(testsuite_common_bits64m63_OBJECTS) $(testsuite_common_bits64m63_LDADD)
4557
4558 testsuite/common/bits64m63.c: testsuite/common/bits-gen$(EXEEXT) testsuite/common/bits-tst.c
4559         $(AM_V_GEN)$< 64 63 little > $@.tmp
4560         $(AM_V_at)cat $(srcdir)/testsuite/common/bits-tst.c >> $@.tmp
4561         $(AM_V_at)mv $@.tmp $@
4562 @SIM_ENABLE_ARCH_aarch64_TRUE@$(aarch64_libsim_a_OBJECTS) $(aarch64_libsim_a_LIBADD): aarch64/hw-config.h
4563
4564 @SIM_ENABLE_ARCH_aarch64_TRUE@aarch64/%.o: aarch64/%.c
4565 @SIM_ENABLE_ARCH_aarch64_TRUE@  $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
4566
4567 @SIM_ENABLE_ARCH_aarch64_TRUE@aarch64/%.o: common/%.c
4568 @SIM_ENABLE_ARCH_aarch64_TRUE@  $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
4569 @SIM_ENABLE_ARCH_arm_TRUE@$(arm_libsim_a_OBJECTS) $(arm_libsim_a_LIBADD): arm/hw-config.h
4570
4571 @SIM_ENABLE_ARCH_arm_TRUE@arm/%.o: arm/%.c
4572 @SIM_ENABLE_ARCH_arm_TRUE@      $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
4573
4574 @SIM_ENABLE_ARCH_arm_TRUE@arm/%.o: common/%.c
4575 @SIM_ENABLE_ARCH_arm_TRUE@      $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
4576 @SIM_ENABLE_ARCH_avr_TRUE@$(avr_libsim_a_OBJECTS) $(avr_libsim_a_LIBADD): avr/hw-config.h
4577
4578 @SIM_ENABLE_ARCH_avr_TRUE@avr/%.o: avr/%.c
4579 @SIM_ENABLE_ARCH_avr_TRUE@      $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
4580
4581 @SIM_ENABLE_ARCH_avr_TRUE@avr/%.o: common/%.c
4582 @SIM_ENABLE_ARCH_avr_TRUE@      $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
4583 @SIM_ENABLE_ARCH_bfin_TRUE@$(bfin_libsim_a_OBJECTS) $(bfin_libsim_a_LIBADD): bfin/hw-config.h
4584
4585 @SIM_ENABLE_ARCH_bfin_TRUE@bfin/%.o: bfin/%.c
4586 @SIM_ENABLE_ARCH_bfin_TRUE@     $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
4587
4588 @SIM_ENABLE_ARCH_bfin_TRUE@bfin/%.o: common/%.c
4589 @SIM_ENABLE_ARCH_bfin_TRUE@     $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
4590
4591 @SIM_ENABLE_ARCH_bfin_TRUE@bfin/linux-fixed-code.h: @MAINT@ $(srcdir)/bfin/linux-fixed-code.s bfin/local.mk bfin/$(am__dirstamp)
4592 @SIM_ENABLE_ARCH_bfin_TRUE@     $(AM_V_GEN)$(AS_FOR_TARGET_BFIN) $(srcdir)/bfin/linux-fixed-code.s -o bfin/linux-fixed-code.o
4593 @SIM_ENABLE_ARCH_bfin_TRUE@     $(AM_V_at)(\
4594 @SIM_ENABLE_ARCH_bfin_TRUE@             set -e; \
4595 @SIM_ENABLE_ARCH_bfin_TRUE@             echo "/* DO NOT EDIT: Autogenerated from linux-fixed-code.s.  */"; \
4596 @SIM_ENABLE_ARCH_bfin_TRUE@             echo "static const unsigned char bfin_linux_fixed_code[] ="; \
4597 @SIM_ENABLE_ARCH_bfin_TRUE@             echo "{"; \
4598 @SIM_ENABLE_ARCH_bfin_TRUE@             $(OBJDUMP_FOR_TARGET_BFIN) -d -z bfin/linux-fixed-code.o > $@.dis; \
4599 @SIM_ENABLE_ARCH_bfin_TRUE@             sed -n \
4600 @SIM_ENABLE_ARCH_bfin_TRUE@                     -e 's:^[^       ]*      :0x:' \
4601 @SIM_ENABLE_ARCH_bfin_TRUE@                     -e '/^0x/{s:    .*::;s: *$$:,:;s: :, 0x:g;p;}' \
4602 @SIM_ENABLE_ARCH_bfin_TRUE@                     $@.dis; \
4603 @SIM_ENABLE_ARCH_bfin_TRUE@             rm -f $@.dis; \
4604 @SIM_ENABLE_ARCH_bfin_TRUE@             echo "};" \
4605 @SIM_ENABLE_ARCH_bfin_TRUE@     ) > $@.tmp
4606 @SIM_ENABLE_ARCH_bfin_TRUE@     $(AM_V_at)$(SHELL) $(srcroot)/move-if-change $@.tmp $(srcdir)/bfin/linux-fixed-code.h
4607 @SIM_ENABLE_ARCH_bfin_TRUE@     $(AM_V_at)touch $(srcdir)/bfin/linux-fixed-code.h
4608 @SIM_ENABLE_ARCH_bpf_TRUE@$(bpf_libsim_a_OBJECTS) $(bpf_libsim_a_LIBADD): bpf/hw-config.h
4609
4610 @SIM_ENABLE_ARCH_bpf_TRUE@bpf/%.o: bpf/%.c
4611 @SIM_ENABLE_ARCH_bpf_TRUE@      $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
4612
4613 @SIM_ENABLE_ARCH_bpf_TRUE@bpf/%.o: common/%.c
4614 @SIM_ENABLE_ARCH_bpf_TRUE@      $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
4615 @SIM_ENABLE_ARCH_bpf_TRUE@bpf/modules.c: | $(bpf_BUILD_OUTPUTS)
4616
4617 @SIM_ENABLE_ARCH_bpf_TRUE@bpf/mloop-le.c bpf/eng-le.h: bpf/stamp-mloop-le ; @true
4618 @SIM_ENABLE_ARCH_bpf_TRUE@bpf/stamp-mloop-le: $(srccom)/genmloop.sh bpf/mloop.in
4619 @SIM_ENABLE_ARCH_bpf_TRUE@      $(AM_V_GEN)$(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \
4620 @SIM_ENABLE_ARCH_bpf_TRUE@              -mono -scache -prefix bpfbf_ebpfle -cpu bpfbf \
4621 @SIM_ENABLE_ARCH_bpf_TRUE@              -infile $(srcdir)/bpf/mloop.in \
4622 @SIM_ENABLE_ARCH_bpf_TRUE@              -outfile-prefix bpf/ -outfile-suffix -le
4623 @SIM_ENABLE_ARCH_bpf_TRUE@      $(AM_V_at)$(SHELL) $(srcroot)/move-if-change bpf/eng-le.hin bpf/eng-le.h
4624 @SIM_ENABLE_ARCH_bpf_TRUE@      $(AM_V_at)$(SHELL) $(srcroot)/move-if-change bpf/mloop-le.cin bpf/mloop-le.c
4625 @SIM_ENABLE_ARCH_bpf_TRUE@      $(AM_V_at)touch $@
4626
4627 @SIM_ENABLE_ARCH_bpf_TRUE@bpf/mloop-be.c bpf/eng-be.h: bpf/stamp-mloop-be ; @true
4628 @SIM_ENABLE_ARCH_bpf_TRUE@bpf/stamp-mloop-be: $(srccom)/genmloop.sh bpf/mloop.in
4629 @SIM_ENABLE_ARCH_bpf_TRUE@      $(AM_V_GEN)$(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \
4630 @SIM_ENABLE_ARCH_bpf_TRUE@              -mono -scache -prefix bpfbf_ebpfbe -cpu bpfbf \
4631 @SIM_ENABLE_ARCH_bpf_TRUE@              -infile $(srcdir)/bpf/mloop.in \
4632 @SIM_ENABLE_ARCH_bpf_TRUE@              -outfile-prefix bpf/ -outfile-suffix -be
4633 @SIM_ENABLE_ARCH_bpf_TRUE@      $(AM_V_at)$(SHELL) $(srcroot)/move-if-change bpf/eng-be.hin bpf/eng-be.h
4634 @SIM_ENABLE_ARCH_bpf_TRUE@      $(AM_V_at)$(SHELL) $(srcroot)/move-if-change bpf/mloop-be.cin bpf/mloop-be.c
4635 @SIM_ENABLE_ARCH_bpf_TRUE@      $(AM_V_at)touch $@
4636
4637 @SIM_ENABLE_ARCH_bpf_TRUE@bpf/cgen: bpf/cgen-arch bpf/cgen-cpu bpf/cgen-defs-le bpf/cgen-defs-be bpf/cgen-decode-le bpf/cgen-decode-be
4638
4639 @SIM_ENABLE_ARCH_bpf_TRUE@bpf/cgen-arch:
4640 @SIM_ENABLE_ARCH_bpf_TRUE@      $(AM_V_GEN)mach=bpf cpu=bpfbf FLAGS="with-scache"; $(CGEN_GEN_ARCH)
4641 @SIM_ENABLE_ARCH_bpf_TRUE@bpf/arch.h bpf/arch.c bpf/cpuall.h: @CGEN_MAINT@ bpf/cgen-arch
4642
4643 @SIM_ENABLE_ARCH_bpf_TRUE@bpf/cgen-cpu:
4644 @SIM_ENABLE_ARCH_bpf_TRUE@      $(AM_V_GEN)isa=ebpfle,ebpfbe cpu=bpfbf mach=bpf FLAGS="with-multiple-isa with-scache"; $(CGEN_GEN_CPU)
4645 @SIM_ENABLE_ARCH_bpf_TRUE@      $(AM_V_at)rm -f $(srcdir)/bpf/model.c
4646 @SIM_ENABLE_ARCH_bpf_TRUE@bpf/cpu.h bpf/cpu.c bpf/model.c: @CGEN_MAINT@ bpf/cgen-cpu
4647
4648 @SIM_ENABLE_ARCH_bpf_TRUE@bpf/cgen-defs-le:
4649 @SIM_ENABLE_ARCH_bpf_TRUE@      $(AM_V_GEN)isa=ebpfle cpu=bpfbf mach=bpf FLAGS="with-scache" SUFFIX="-le"; $(CGEN_GEN_DEFS)
4650 @SIM_ENABLE_ARCH_bpf_TRUE@bpf/defs-le.h: @CGEN_MAINT@ bpf/cgen-defs-le
4651
4652 @SIM_ENABLE_ARCH_bpf_TRUE@bpf/cgen-defs-be:
4653 @SIM_ENABLE_ARCH_bpf_TRUE@      $(AM_V_GEN)isa=ebpfbe cpu=bpfbf mach=bpf FLAGS="with-scache" SUFFIX="-be"; $(CGEN_GEN_DEFS)
4654 @SIM_ENABLE_ARCH_bpf_TRUE@bpf/defs-be.h: @CGEN_MAINT@ bpf/cgen-defs-be
4655
4656 @SIM_ENABLE_ARCH_bpf_TRUE@bpf/cgen-decode-le:
4657 @SIM_ENABLE_ARCH_bpf_TRUE@      $(AM_V_GEN)isa=ebpfle cpu=bpfbf mach=bpf FLAGS="with-scache" SUFFIX="-le" EXTRAFILES="$(CGEN_CPU_SEM)"; $(CGEN_GEN_DECODE)
4658 @SIM_ENABLE_ARCH_bpf_TRUE@bpf/sem-le.c bpf/decode-le.c bpf/decode-le.h: @CGEN_MAINT@ bpf/cgen-decode-vle
4659
4660 @SIM_ENABLE_ARCH_bpf_TRUE@bpf/cgen-decode-be:
4661 @SIM_ENABLE_ARCH_bpf_TRUE@      $(AM_V_GEN)isa=ebpfbe cpu=bpfbf mach=bpf FLAGS="with-scache" SUFFIX="-be" EXTRAFILES="$(CGEN_CPU_SEM)"; $(CGEN_GEN_DECODE)
4662 @SIM_ENABLE_ARCH_bpf_TRUE@bpf/sem-be.c bpf/decode-be.c bpf/decode-be.h: @CGEN_MAINT@ bpf/cgen-decode-be
4663 @SIM_ENABLE_ARCH_cr16_TRUE@$(cr16_libsim_a_OBJECTS) $(cr16_libsim_a_LIBADD): cr16/hw-config.h
4664
4665 @SIM_ENABLE_ARCH_cr16_TRUE@cr16/%.o: cr16/%.c
4666 @SIM_ENABLE_ARCH_cr16_TRUE@     $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
4667
4668 @SIM_ENABLE_ARCH_cr16_TRUE@cr16/%.o: common/%.c
4669 @SIM_ENABLE_ARCH_cr16_TRUE@     $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
4670 @SIM_ENABLE_ARCH_cr16_TRUE@cr16/modules.c: | $(cr16_BUILD_OUTPUTS)
4671
4672 # These rules are copied from automake, but tweaked to use FOR_BUILD variables.
4673 @SIM_ENABLE_ARCH_cr16_TRUE@cr16/gencode$(EXEEXT): $(cr16_gencode_OBJECTS) $(cr16_gencode_DEPENDENCIES) cr16/$(am__dirstamp)
4674 @SIM_ENABLE_ARCH_cr16_TRUE@     $(AM_V_CCLD)$(LINK_FOR_BUILD) $(cr16_gencode_OBJECTS) $(cr16_gencode_LDADD)
4675
4676 # gencode is a build-time only tool.  Override the default rules for it.
4677 @SIM_ENABLE_ARCH_cr16_TRUE@cr16/gencode.o: cr16/gencode.c
4678 @SIM_ENABLE_ARCH_cr16_TRUE@     $(AM_V_CC)$(COMPILE_FOR_BUILD) -c $< -o $@
4679 @SIM_ENABLE_ARCH_cr16_TRUE@cr16/cr16-opc.o: ../opcodes/cr16-opc.c
4680 @SIM_ENABLE_ARCH_cr16_TRUE@     $(AM_V_CC)$(COMPILE_FOR_BUILD) -c $< -o $@
4681
4682 @SIM_ENABLE_ARCH_cr16_TRUE@cr16/simops.h: cr16/gencode$(EXEEXT)
4683 @SIM_ENABLE_ARCH_cr16_TRUE@     $(AM_V_GEN)$< -h >$@
4684
4685 @SIM_ENABLE_ARCH_cr16_TRUE@cr16/table.c: cr16/gencode$(EXEEXT)
4686 @SIM_ENABLE_ARCH_cr16_TRUE@     $(AM_V_GEN)$< >$@
4687 @SIM_ENABLE_ARCH_cris_TRUE@$(cris_libsim_a_OBJECTS) $(cris_libsim_a_LIBADD): cris/hw-config.h
4688
4689 @SIM_ENABLE_ARCH_cris_TRUE@cris/%.o: cris/%.c
4690 @SIM_ENABLE_ARCH_cris_TRUE@     $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
4691
4692 @SIM_ENABLE_ARCH_cris_TRUE@cris/%.o: common/%.c
4693 @SIM_ENABLE_ARCH_cris_TRUE@     $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
4694 @SIM_ENABLE_ARCH_cris_TRUE@cris/modules.c: | $(cris_BUILD_OUTPUTS)
4695
4696 @SIM_ENABLE_ARCH_cris_TRUE@cris/mloopv10f.c cris/engv10.h: cris/stamp-mloop-v10f ; @true
4697 @SIM_ENABLE_ARCH_cris_TRUE@cris/stamp-mloop-v10f: $(srccom)/genmloop.sh cris/mloop.in
4698 @SIM_ENABLE_ARCH_cris_TRUE@     $(AM_V_GEN)$(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \
4699 @SIM_ENABLE_ARCH_cris_TRUE@             -mono -no-fast -pbb -switch semcrisv10f-switch.c \
4700 @SIM_ENABLE_ARCH_cris_TRUE@             -cpu crisv10f \
4701 @SIM_ENABLE_ARCH_cris_TRUE@             -infile $(srcdir)/cris/mloop.in -outfile-prefix cris/ -outfile-suffix -v10f
4702 @SIM_ENABLE_ARCH_cris_TRUE@     $(AM_V_at)$(SHELL) $(srcroot)/move-if-change cris/eng-v10f.hin cris/engv10.h
4703 @SIM_ENABLE_ARCH_cris_TRUE@     $(AM_V_at)$(SHELL) $(srcroot)/move-if-change cris/mloop-v10f.cin cris/mloopv10f.c
4704 @SIM_ENABLE_ARCH_cris_TRUE@     $(AM_V_at)touch $@
4705
4706 @SIM_ENABLE_ARCH_cris_TRUE@cris/mloopv32f.c cris/engv32.h: cris/stamp-mloop-v32f ; @true
4707 @SIM_ENABLE_ARCH_cris_TRUE@cris/stamp-mloop-v32f: $(srccom)/genmloop.sh cris/mloop.in
4708 @SIM_ENABLE_ARCH_cris_TRUE@     $(AM_V_GEN)$(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \
4709 @SIM_ENABLE_ARCH_cris_TRUE@             -mono -no-fast -pbb -switch semcrisv32f-switch.c \
4710 @SIM_ENABLE_ARCH_cris_TRUE@             -cpu crisv32f \
4711 @SIM_ENABLE_ARCH_cris_TRUE@             -infile $(srcdir)/cris/mloop.in -outfile-prefix cris/ -outfile-suffix -v32f
4712 @SIM_ENABLE_ARCH_cris_TRUE@     $(AM_V_at)$(SHELL) $(srcroot)/move-if-change cris/eng-v32f.hin cris/engv32.h
4713 @SIM_ENABLE_ARCH_cris_TRUE@     $(AM_V_at)$(SHELL) $(srcroot)/move-if-change cris/mloop-v32f.cin cris/mloopv32f.c
4714 @SIM_ENABLE_ARCH_cris_TRUE@     $(AM_V_at)touch $@
4715
4716 @SIM_ENABLE_ARCH_cris_TRUE@cris/cgen: cris/cgen-arch cris/cgen-cpu-decode-v10f cris/cgen-cpu-decode-v32f
4717
4718 @SIM_ENABLE_ARCH_cris_TRUE@cris/cgen-arch:
4719 @SIM_ENABLE_ARCH_cris_TRUE@     $(AM_V_GEN)mach=crisv10,crisv32 FLAGS="with-scache with-profile=fn"; $(CGEN_GEN_ARCH)
4720 @SIM_ENABLE_ARCH_cris_TRUE@cris/arch.h cris/arch.c cris/cpuall.h: @CGEN_MAINT@ cris/cgen-arch
4721
4722 @SIM_ENABLE_ARCH_cris_TRUE@cris/cgen-cpu-decode-v10f:
4723 @SIM_ENABLE_ARCH_cris_TRUE@     $(AM_V_GEN)cpu=crisv10f mach=crisv10 SUFFIX=v10 FLAGS="with-scache with-profile=fn" EXTRAFILES="$(CGEN_CPU_SEMSW)"; $(CGEN_GEN_CPU_DECODE)
4724 @SIM_ENABLE_ARCH_cris_TRUE@     $(AM_V_at)$(SHELL) $(srcroot)/move-if-change $(srcdir)/cris/semv10-switch.c $(srcdir)/cris/semcrisv10f-switch.c
4725 @SIM_ENABLE_ARCH_cris_TRUE@cris/cpuv10.h cris/cpuv10.c cris/semcrisv10f-switch.c cris/modelv10.c cris/decodev10.c cris/decodev10.h: @CGEN_MAINT@ cris/cgen-cpu-decode-v10f
4726
4727 @SIM_ENABLE_ARCH_cris_TRUE@cris/cgen-cpu-decode-v32f:
4728 @SIM_ENABLE_ARCH_cris_TRUE@     $(AM_V_GEN)cpu=crisv32f mach=crisv32 SUFFIX=v32 FLAGS="with-scache with-profile=fn" EXTRAFILES="$(CGEN_CPU_SEMSW)"; $(CGEN_GEN_CPU_DECODE)
4729 @SIM_ENABLE_ARCH_cris_TRUE@     $(AM_V_at)$(SHELL) $(srcroot)/move-if-change $(srcdir)/cris/semv32-switch.c $(srcdir)/cris/semcrisv32f-switch.c
4730 @SIM_ENABLE_ARCH_cris_TRUE@cris/cpuv32.h cris/cpuv32.c cris/semcrisv32f-switch.c cris/modelv32.c cris/decodev32.c cris/decodev32.h: @CGEN_MAINT@ cris/cgen-cpu-decode-v32f
4731 @SIM_ENABLE_ARCH_d10v_TRUE@$(d10v_libsim_a_OBJECTS) $(d10v_libsim_a_LIBADD): d10v/hw-config.h
4732
4733 @SIM_ENABLE_ARCH_d10v_TRUE@d10v/%.o: d10v/%.c
4734 @SIM_ENABLE_ARCH_d10v_TRUE@     $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
4735
4736 @SIM_ENABLE_ARCH_d10v_TRUE@d10v/%.o: common/%.c
4737 @SIM_ENABLE_ARCH_d10v_TRUE@     $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
4738 @SIM_ENABLE_ARCH_d10v_TRUE@d10v/modules.c: | $(d10v_BUILD_OUTPUTS)
4739
4740 # These rules are copied from automake, but tweaked to use FOR_BUILD variables.
4741 @SIM_ENABLE_ARCH_d10v_TRUE@d10v/gencode$(EXEEXT): $(d10v_gencode_OBJECTS) $(d10v_gencode_DEPENDENCIES) d10v/$(am__dirstamp)
4742 @SIM_ENABLE_ARCH_d10v_TRUE@     $(AM_V_CCLD)$(LINK_FOR_BUILD) $(d10v_gencode_OBJECTS) $(d10v_gencode_LDADD)
4743
4744 # gencode is a build-time only tool.  Override the default rules for it.
4745 @SIM_ENABLE_ARCH_d10v_TRUE@d10v/gencode.o: d10v/gencode.c
4746 @SIM_ENABLE_ARCH_d10v_TRUE@     $(AM_V_CC)$(COMPILE_FOR_BUILD) -c $< -o $@
4747 @SIM_ENABLE_ARCH_d10v_TRUE@d10v/d10v-opc.o: ../opcodes/d10v-opc.c
4748 @SIM_ENABLE_ARCH_d10v_TRUE@     $(AM_V_CC)$(COMPILE_FOR_BUILD) -c $< -o $@
4749
4750 @SIM_ENABLE_ARCH_d10v_TRUE@d10v/simops.h: d10v/gencode$(EXEEXT)
4751 @SIM_ENABLE_ARCH_d10v_TRUE@     $(AM_V_GEN)$< -h >$@
4752
4753 @SIM_ENABLE_ARCH_d10v_TRUE@d10v/table.c: d10v/gencode$(EXEEXT)
4754 @SIM_ENABLE_ARCH_d10v_TRUE@     $(AM_V_GEN)$< >$@
4755 @SIM_ENABLE_ARCH_erc32_TRUE@$(erc32_libsim_a_OBJECTS) $(erc32_libsim_a_LIBADD): erc32/hw-config.h
4756
4757 @SIM_ENABLE_ARCH_erc32_TRUE@erc32/%.o: erc32/%.c
4758 @SIM_ENABLE_ARCH_erc32_TRUE@    $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
4759
4760 @SIM_ENABLE_ARCH_erc32_TRUE@erc32/%.o: common/%.c
4761 @SIM_ENABLE_ARCH_erc32_TRUE@    $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
4762
4763 @SIM_ENABLE_ARCH_erc32_TRUE@erc32/sis$(EXEEXT): erc32/run$(EXEEXT)
4764 @SIM_ENABLE_ARCH_erc32_TRUE@    $(AM_V_GEN)ln $< $@ 2>/dev/null || $(LN_S) $< $@ 2>/dev/null || cp -p $< $@
4765 @SIM_ENABLE_ARCH_erc32_TRUE@sim-%D-install-exec-local: installdirs
4766 @SIM_ENABLE_ARCH_erc32_TRUE@    $(AM_V_at)$(MKDIR_P) $(DESTDIR)$(bindir)
4767 @SIM_ENABLE_ARCH_erc32_TRUE@    n=`echo sis | sed '$(program_transform_name)'`; \
4768 @SIM_ENABLE_ARCH_erc32_TRUE@    $(LIBTOOL) --mode=install $(INSTALL_PROGRAM) erc32/run$(EXEEXT) $(DESTDIR)$(bindir)/$$n$(EXEEXT)
4769 @SIM_ENABLE_ARCH_erc32_TRUE@sim-erc32-uninstall-local:
4770 @SIM_ENABLE_ARCH_erc32_TRUE@    rm -f $(DESTDIR)$(bindir)/sis
4771 @SIM_ENABLE_ARCH_examples_TRUE@$(example_synacor_libsim_a_OBJECTS) $(example_synacor_libsim_a_LIBADD): example-synacor/hw-config.h
4772
4773 @SIM_ENABLE_ARCH_examples_TRUE@example-synacor/%.o: example-synacor/%.c
4774 @SIM_ENABLE_ARCH_examples_TRUE@ $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
4775
4776 @SIM_ENABLE_ARCH_examples_TRUE@example-synacor/%.o: common/%.c
4777 @SIM_ENABLE_ARCH_examples_TRUE@ $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
4778 @SIM_ENABLE_ARCH_frv_TRUE@$(frv_libsim_a_OBJECTS) $(frv_libsim_a_LIBADD): frv/hw-config.h
4779
4780 @SIM_ENABLE_ARCH_frv_TRUE@frv/%.o: frv/%.c
4781 @SIM_ENABLE_ARCH_frv_TRUE@      $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
4782
4783 @SIM_ENABLE_ARCH_frv_TRUE@frv/%.o: common/%.c
4784 @SIM_ENABLE_ARCH_frv_TRUE@      $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
4785 @SIM_ENABLE_ARCH_frv_TRUE@frv/modules.c: | $(frv_BUILD_OUTPUTS)
4786
4787 @SIM_ENABLE_ARCH_frv_TRUE@frv/mloop.c frv/eng.h: frv/stamp-mloop ; @true
4788 @SIM_ENABLE_ARCH_frv_TRUE@frv/stamp-mloop: $(srccom)/genmloop.sh frv/mloop.in
4789 @SIM_ENABLE_ARCH_frv_TRUE@      $(AM_V_GEN)$(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \
4790 @SIM_ENABLE_ARCH_frv_TRUE@              -mono -scache -parallel-generic-write -parallel-only \
4791 @SIM_ENABLE_ARCH_frv_TRUE@              -cpu frvbf \
4792 @SIM_ENABLE_ARCH_frv_TRUE@              -infile $(srcdir)/frv/mloop.in -outfile-prefix frv/
4793 @SIM_ENABLE_ARCH_frv_TRUE@      $(AM_V_at)$(SHELL) $(srcroot)/move-if-change frv/eng.hin frv/eng.h
4794 @SIM_ENABLE_ARCH_frv_TRUE@      $(AM_V_at)$(SHELL) $(srcroot)/move-if-change frv/mloop.cin frv/mloop.c
4795 @SIM_ENABLE_ARCH_frv_TRUE@      $(AM_V_at)touch $@
4796
4797 @SIM_ENABLE_ARCH_frv_TRUE@frv/cgen: frv/cgen-arch frv/cgen-cpu-decode
4798
4799 @SIM_ENABLE_ARCH_frv_TRUE@frv/cgen-arch:
4800 @SIM_ENABLE_ARCH_frv_TRUE@      $(AM_V_GEN)mach=all FLAGS="with-scache"; $(CGEN_GEN_ARCH)
4801 @SIM_ENABLE_ARCH_frv_TRUE@frv/arch.h frv/arch.c frv/cpuall.h: @CGEN_MAINT@ frv/cgen-arch
4802
4803 @SIM_ENABLE_ARCH_frv_TRUE@frv/cgen-cpu-decode:
4804 @SIM_ENABLE_ARCH_frv_TRUE@      $(AM_V_GEN)cpu=frvbf mach=frv,fr550,fr500,fr450,fr400,tomcat,simple FLAGS="with-scache with-profile=fn with-generic-write with-parallel-only" EXTRAFILES="$(CGEN_CPU_SEM)"; $(CGEN_GEN_CPU_DECODE)
4805 @SIM_ENABLE_ARCH_frv_TRUE@frv/cpu.h frv/sem.c frv/model.c frv/decode.c frv/decode.h: @CGEN_MAINT@ frv/cgen-cpu-decode
4806 @SIM_ENABLE_ARCH_ft32_TRUE@$(ft32_libsim_a_OBJECTS) $(ft32_libsim_a_LIBADD): ft32/hw-config.h
4807
4808 @SIM_ENABLE_ARCH_ft32_TRUE@ft32/%.o: ft32/%.c
4809 @SIM_ENABLE_ARCH_ft32_TRUE@     $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
4810
4811 @SIM_ENABLE_ARCH_ft32_TRUE@ft32/%.o: common/%.c
4812 @SIM_ENABLE_ARCH_ft32_TRUE@     $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
4813 @SIM_ENABLE_ARCH_h8300_TRUE@$(h8300_libsim_a_OBJECTS) $(h8300_libsim_a_LIBADD): h8300/hw-config.h
4814
4815 @SIM_ENABLE_ARCH_h8300_TRUE@h8300/%.o: h8300/%.c
4816 @SIM_ENABLE_ARCH_h8300_TRUE@    $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
4817
4818 @SIM_ENABLE_ARCH_h8300_TRUE@h8300/%.o: common/%.c
4819 @SIM_ENABLE_ARCH_h8300_TRUE@    $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
4820 @SIM_ENABLE_ARCH_iq2000_TRUE@$(iq2000_libsim_a_OBJECTS) $(iq2000_libsim_a_LIBADD): iq2000/hw-config.h
4821
4822 @SIM_ENABLE_ARCH_iq2000_TRUE@iq2000/%.o: iq2000/%.c
4823 @SIM_ENABLE_ARCH_iq2000_TRUE@   $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
4824
4825 @SIM_ENABLE_ARCH_iq2000_TRUE@iq2000/%.o: common/%.c
4826 @SIM_ENABLE_ARCH_iq2000_TRUE@   $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
4827 @SIM_ENABLE_ARCH_iq2000_TRUE@iq2000/modules.c: | $(iq2000_BUILD_OUTPUTS)
4828
4829 @SIM_ENABLE_ARCH_iq2000_TRUE@iq2000/mloop.c iq2000/eng.h: iq2000/stamp-mloop ; @true
4830 @SIM_ENABLE_ARCH_iq2000_TRUE@iq2000/stamp-mloop: $(srccom)/genmloop.sh iq2000/mloop.in
4831 @SIM_ENABLE_ARCH_iq2000_TRUE@   $(AM_V_GEN)$(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \
4832 @SIM_ENABLE_ARCH_iq2000_TRUE@           -mono -fast -pbb -switch sem-switch.c \
4833 @SIM_ENABLE_ARCH_iq2000_TRUE@           -cpu iq2000bf \
4834 @SIM_ENABLE_ARCH_iq2000_TRUE@           -infile $(srcdir)/iq2000/mloop.in -outfile-prefix iq2000/
4835 @SIM_ENABLE_ARCH_iq2000_TRUE@   $(AM_V_at)$(SHELL) $(srcroot)/move-if-change iq2000/eng.hin iq2000/eng.h
4836 @SIM_ENABLE_ARCH_iq2000_TRUE@   $(AM_V_at)$(SHELL) $(srcroot)/move-if-change iq2000/mloop.cin iq2000/mloop.c
4837 @SIM_ENABLE_ARCH_iq2000_TRUE@   $(AM_V_at)touch $@
4838
4839 @SIM_ENABLE_ARCH_iq2000_TRUE@iq2000/cgen: iq2000/cgen-arch iq2000/cgen-cpu-decode
4840
4841 @SIM_ENABLE_ARCH_iq2000_TRUE@iq2000/cgen-arch:
4842 @SIM_ENABLE_ARCH_iq2000_TRUE@   $(AM_V_GEN)mach=iq2000 FLAGS="with-scache with-profile=fn"; $(CGEN_GEN_ARCH)
4843 @SIM_ENABLE_ARCH_iq2000_TRUE@iq2000/arch.h iq2000/arch.c iq2000/cpuall.h: @CGEN_MAINT@ iq2000/cgen-arch
4844
4845 @SIM_ENABLE_ARCH_iq2000_TRUE@iq2000/cgen-cpu-decode:
4846 @SIM_ENABLE_ARCH_iq2000_TRUE@   $(AM_V_GEN)cpu=iq2000bf mach=iq2000 FLAGS="with-scache with-profile=fn" EXTRAFILES="$(CGEN_CPU_SEM) $(CGEN_CPU_SEMSW)"; $(CGEN_GEN_CPU_DECODE)
4847 @SIM_ENABLE_ARCH_iq2000_TRUE@iq2000/cpu.h iq2000/sem.c iq2000/sem-switch.c iq2000/model.c iq2000/decode.c iq2000/decode.h: @CGEN_MAINT@ iq2000/cgen-cpu-decode
4848 @SIM_ENABLE_ARCH_lm32_TRUE@$(lm32_libsim_a_OBJECTS) $(lm32_libsim_a_LIBADD): lm32/hw-config.h
4849
4850 @SIM_ENABLE_ARCH_lm32_TRUE@lm32/%.o: lm32/%.c
4851 @SIM_ENABLE_ARCH_lm32_TRUE@     $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
4852
4853 @SIM_ENABLE_ARCH_lm32_TRUE@lm32/%.o: common/%.c
4854 @SIM_ENABLE_ARCH_lm32_TRUE@     $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
4855 @SIM_ENABLE_ARCH_lm32_TRUE@lm32/modules.c: | $(lm32_BUILD_OUTPUTS)
4856
4857 @SIM_ENABLE_ARCH_lm32_TRUE@lm32/mloop.c lm32/eng.h: lm32/stamp-mloop ; @true
4858 @SIM_ENABLE_ARCH_lm32_TRUE@lm32/stamp-mloop: $(srccom)/genmloop.sh lm32/mloop.in
4859 @SIM_ENABLE_ARCH_lm32_TRUE@     $(AM_V_GEN)$(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \
4860 @SIM_ENABLE_ARCH_lm32_TRUE@             -mono -fast -pbb -switch sem-switch.c \
4861 @SIM_ENABLE_ARCH_lm32_TRUE@             -cpu lm32bf \
4862 @SIM_ENABLE_ARCH_lm32_TRUE@             -infile $(srcdir)/lm32/mloop.in -outfile-prefix lm32/
4863 @SIM_ENABLE_ARCH_lm32_TRUE@     $(AM_V_at)$(SHELL) $(srcroot)/move-if-change lm32/eng.hin lm32/eng.h
4864 @SIM_ENABLE_ARCH_lm32_TRUE@     $(AM_V_at)$(SHELL) $(srcroot)/move-if-change lm32/mloop.cin lm32/mloop.c
4865 @SIM_ENABLE_ARCH_lm32_TRUE@     $(AM_V_at)touch $@
4866
4867 @SIM_ENABLE_ARCH_lm32_TRUE@lm32/cgen: lm32/cgen-arch lm32/cgen-cpu-decode
4868
4869 @SIM_ENABLE_ARCH_lm32_TRUE@lm32/cgen-arch:
4870 @SIM_ENABLE_ARCH_lm32_TRUE@     $(AM_V_GEN)mach=all FLAGS="with-scache with-profile=fn"; $(CGEN_GEN_ARCH)
4871 @SIM_ENABLE_ARCH_lm32_TRUE@lm32/arch.h lm32/arch.c lm32/cpuall.h: @CGEN_MAINT@ lm32/cgen-arch
4872
4873 @SIM_ENABLE_ARCH_lm32_TRUE@lm32/cgen-cpu-decode:
4874 @SIM_ENABLE_ARCH_lm32_TRUE@     $(AM_V_GEN)cpu=lm32bf mach=lm32 FLAGS="with-scache with-profile=fn" EXTRAFILES="$(CGEN_CPU_SEM) $(CGEN_CPU_SEMSW)"; $(CGEN_GEN_CPU_DECODE)
4875 @SIM_ENABLE_ARCH_lm32_TRUE@lm32/cpu.h lm32/sem.c lm32/sem-switch.c lm32/model.c lm32/decode.c lm32/decode.h: @CGEN_MAINT@ lm32/cgen-cpu-decode
4876 @SIM_ENABLE_ARCH_m32c_TRUE@$(m32c_libsim_a_OBJECTS) $(m32c_libsim_a_LIBADD): m32c/hw-config.h
4877
4878 @SIM_ENABLE_ARCH_m32c_TRUE@m32c/%.o: m32c/%.c
4879 @SIM_ENABLE_ARCH_m32c_TRUE@     $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
4880
4881 @SIM_ENABLE_ARCH_m32c_TRUE@m32c/%.o: common/%.c
4882 @SIM_ENABLE_ARCH_m32c_TRUE@     $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
4883 @SIM_ENABLE_ARCH_m32c_TRUE@m32c/modules.c: | $(m32c_BUILD_OUTPUTS)
4884
4885 # These rules are copied from automake, but tweaked to use FOR_BUILD variables.
4886 @SIM_ENABLE_ARCH_m32c_TRUE@m32c/opc2c$(EXEEXT): $(m32c_opc2c_OBJECTS) $(m32c_opc2c_DEPENDENCIES) m32c/$(am__dirstamp)
4887 @SIM_ENABLE_ARCH_m32c_TRUE@     $(AM_V_CCLD)$(LINK_FOR_BUILD) $(m32c_opc2c_OBJECTS) $(m32c_opc2c_LDADD)
4888
4889 # opc2c is a build-time only tool.  Override the default rules for it.
4890 @SIM_ENABLE_ARCH_m32c_TRUE@m32c/opc2c.o: m32c/opc2c.c
4891 @SIM_ENABLE_ARCH_m32c_TRUE@     $(AM_V_CC)$(COMPILE_FOR_BUILD) -c $< -o $@
4892
4893 @SIM_ENABLE_ARCH_m32c_TRUE@m32c/m32c.c: m32c/m32c.opc m32c/opc2c$(EXEEXT)
4894 @SIM_ENABLE_ARCH_m32c_TRUE@     $(AM_V_GEN)$(m32c_OPC2C_RUN) -l $@.log $< > $@.tmp
4895 @SIM_ENABLE_ARCH_m32c_TRUE@     $(AM_V_at)mv $@.tmp $@
4896
4897 @SIM_ENABLE_ARCH_m32c_TRUE@m32c/r8c.c: m32c/r8c.opc m32c/opc2c$(EXEEXT)
4898 @SIM_ENABLE_ARCH_m32c_TRUE@     $(AM_V_GEN)$(m32c_OPC2C_RUN) -l $@.log $< > $@.tmp
4899 @SIM_ENABLE_ARCH_m32c_TRUE@     $(AM_V_at)mv $@.tmp $@
4900 @SIM_ENABLE_ARCH_m32r_TRUE@$(m32r_libsim_a_OBJECTS) $(m32r_libsim_a_LIBADD): m32r/hw-config.h
4901
4902 @SIM_ENABLE_ARCH_m32r_TRUE@m32r/%.o: m32r/%.c
4903 @SIM_ENABLE_ARCH_m32r_TRUE@     $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
4904
4905 @SIM_ENABLE_ARCH_m32r_TRUE@m32r/%.o: common/%.c
4906 @SIM_ENABLE_ARCH_m32r_TRUE@     $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
4907 @SIM_ENABLE_ARCH_m32r_TRUE@m32r/modules.c: | $(m32r_BUILD_OUTPUTS)
4908
4909 @SIM_ENABLE_ARCH_m32r_TRUE@m32r/mloop.c m32r/eng.h: m32r/stamp-mloop ; @true
4910 @SIM_ENABLE_ARCH_m32r_TRUE@m32r/stamp-mloop: $(srccom)/genmloop.sh m32r/mloop.in
4911 @SIM_ENABLE_ARCH_m32r_TRUE@     $(AM_V_GEN)$(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \
4912 @SIM_ENABLE_ARCH_m32r_TRUE@             -mono -fast -pbb -switch sem-switch.c \
4913 @SIM_ENABLE_ARCH_m32r_TRUE@             -cpu m32rbf \
4914 @SIM_ENABLE_ARCH_m32r_TRUE@             -infile $(srcdir)/m32r/mloop.in -outfile-prefix m32r/
4915 @SIM_ENABLE_ARCH_m32r_TRUE@     $(AM_V_at)$(SHELL) $(srcroot)/move-if-change m32r/eng.hin m32r/eng.h
4916 @SIM_ENABLE_ARCH_m32r_TRUE@     $(AM_V_at)$(SHELL) $(srcroot)/move-if-change m32r/mloop.cin m32r/mloop.c
4917 @SIM_ENABLE_ARCH_m32r_TRUE@     $(AM_V_at)touch $@
4918
4919 @SIM_ENABLE_ARCH_m32r_TRUE@m32r/mloopx.c m32r/engx.h: m32r/stamp-mloop ; @true
4920 @SIM_ENABLE_ARCH_m32r_TRUE@m32r/stamp-mloop-x: $(srccom)/genmloop.sh m32r/mloop.in
4921 @SIM_ENABLE_ARCH_m32r_TRUE@     $(AM_V_GEN)$(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \
4922 @SIM_ENABLE_ARCH_m32r_TRUE@             -mono -no-fast -pbb -parallel-write -switch semx-switch.c \
4923 @SIM_ENABLE_ARCH_m32r_TRUE@             -cpu m32rxf \
4924 @SIM_ENABLE_ARCH_m32r_TRUE@             -infile $(srcdir)/m32r/mloopx.in -outfile-prefix m32r/ -outfile-suffix x
4925 @SIM_ENABLE_ARCH_m32r_TRUE@     $(AM_V_at)$(SHELL) $(srcroot)/move-if-change m32r/engx.hin m32r/engx.h
4926 @SIM_ENABLE_ARCH_m32r_TRUE@     $(AM_V_at)$(SHELL) $(srcroot)/move-if-change m32r/mloopx.cin m32r/mloopx.c
4927 @SIM_ENABLE_ARCH_m32r_TRUE@     $(AM_V_at)touch $@
4928
4929 @SIM_ENABLE_ARCH_m32r_TRUE@m32r/mloop2.c m32r/eng2.h: m32r/stamp-mloop ; @true
4930 @SIM_ENABLE_ARCH_m32r_TRUE@m32r/stamp-mloop-2: $(srccom)/genmloop.sh m32r/mloop.in
4931 @SIM_ENABLE_ARCH_m32r_TRUE@     $(AM_V_GEN)$(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \
4932 @SIM_ENABLE_ARCH_m32r_TRUE@             -mono -no-fast -pbb -parallel-write -switch sem2-switch.c \
4933 @SIM_ENABLE_ARCH_m32r_TRUE@             -cpu m32r2f \
4934 @SIM_ENABLE_ARCH_m32r_TRUE@             -infile $(srcdir)/m32r/mloop2.in -outfile-prefix m32r/ -outfile-suffix 2
4935 @SIM_ENABLE_ARCH_m32r_TRUE@     $(AM_V_at)$(SHELL) $(srcroot)/move-if-change m32r/eng2.hin m32r/eng2.h
4936 @SIM_ENABLE_ARCH_m32r_TRUE@     $(AM_V_at)$(SHELL) $(srcroot)/move-if-change m32r/mloop2.cin m32r/mloop2.c
4937 @SIM_ENABLE_ARCH_m32r_TRUE@     $(AM_V_at)touch $@
4938
4939 @SIM_ENABLE_ARCH_m32r_TRUE@m32r/cgen: m32r/cgen-arch m32r/cgen-cpu-decode m32r/cgen-cpu-decode-x m32r/cgen-cpu-decode-2
4940
4941 @SIM_ENABLE_ARCH_m32r_TRUE@m32r/cgen-arch:
4942 @SIM_ENABLE_ARCH_m32r_TRUE@     $(AM_V_GEN)mach=all FLAGS="with-scache with-profile=fn"; $(CGEN_GEN_ARCH)
4943 @SIM_ENABLE_ARCH_m32r_TRUE@m32r/arch.h m32r/arch.c m32r/cpuall.h: @CGEN_MAINT@ m32r/cgen-arch
4944
4945 @SIM_ENABLE_ARCH_m32r_TRUE@m32r/cgen-cpu-decode:
4946 @SIM_ENABLE_ARCH_m32r_TRUE@     $(AM_V_GEN)cpu=m32rbf mach=m32r FLAGS="with-scache with-profile=fn" EXTRAFILES="$(CGEN_CPU_SEM) $(CGEN_CPU_SEMSW)"; $(CGEN_GEN_CPU_DECODE)
4947 @SIM_ENABLE_ARCH_m32r_TRUE@m32r/cpu.h m32r/sem.c m32r/sem-switch.c m32r/model.c m32r/decode.c m32r/decode.h: @CGEN_MAINT@ m32r/cgen-cpu-decode
4948
4949 @SIM_ENABLE_ARCH_m32r_TRUE@m32r/cgen-cpu-decode-x:
4950 @SIM_ENABLE_ARCH_m32r_TRUE@     $(AM_V_GEN)cpu=m32rxf mach=m32rx SUFFIX=x FLAGS="with-scache with-profile=fn" EXTRAFILES="$(CGEN_CPU_SEMSW)"; $(CGEN_GEN_CPU_DECODE)
4951 @SIM_ENABLE_ARCH_m32r_TRUE@m32r/cpux.h m32r/semx-switch.c m32r/modelx.c m32r/decodex.c m32r/decodex.h: @CGEN_MAINT@ m32r/cgen-cpu-decode-x
4952
4953 @SIM_ENABLE_ARCH_m32r_TRUE@m32r/cgen-cpu-decode-2:
4954 @SIM_ENABLE_ARCH_m32r_TRUE@     $(AM_V_GEN)cpu=m32r2f mach=m32r2 SUFFIX=2 FLAGS="with-scache with-profile=fn" EXTRAFILES="$(CGEN_CPU_SEMSW)"; $(CGEN_GEN_CPU_DECODE)
4955 @SIM_ENABLE_ARCH_m32r_TRUE@m32r/cpu2.h m32r/sem2-switch.c m32r/model2.c m32r/decode2.c m32r/decode2.h: @CGEN_MAINT@ m32r/cgen-cpu-decode-2
4956 @SIM_ENABLE_ARCH_m68hc11_TRUE@$(m68hc11_libsim_a_OBJECTS) $(m68hc11_libsim_a_LIBADD): m68hc11/hw-config.h
4957
4958 @SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11/%.o: m68hc11/%.c
4959 @SIM_ENABLE_ARCH_m68hc11_TRUE@  $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
4960
4961 @SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11/%.o: common/%.c
4962 @SIM_ENABLE_ARCH_m68hc11_TRUE@  $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
4963 @SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11/modules.c: | $(m68hc11_BUILD_OUTPUTS)
4964
4965 # These rules are copied from automake, but tweaked to use FOR_BUILD variables.
4966 @SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11/gencode$(EXEEXT): $(m68hc11_gencode_OBJECTS) $(m68hc11_gencode_DEPENDENCIES) m68hc11/$(am__dirstamp)
4967 @SIM_ENABLE_ARCH_m68hc11_TRUE@  $(AM_V_CCLD)$(LINK_FOR_BUILD) $(m68hc11_gencode_OBJECTS) $(m68hc11_gencode_LDADD)
4968
4969 # gencode is a build-time only tool.  Override the default rules for it.
4970 @SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11/gencode.o: m68hc11/gencode.c
4971 @SIM_ENABLE_ARCH_m68hc11_TRUE@  $(AM_V_CC)$(COMPILE_FOR_BUILD) -c $< -o $@
4972
4973 @SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11/m68hc11int.c: m68hc11/gencode$(EXEEXT)
4974 @SIM_ENABLE_ARCH_m68hc11_TRUE@  $(AM_V_GEN)$< -m6811 >$@
4975
4976 @SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11/m68hc12int.c: m68hc11/gencode$(EXEEXT)
4977 @SIM_ENABLE_ARCH_m68hc11_TRUE@  $(AM_V_GEN)$< -m6812 >$@
4978 @SIM_ENABLE_ARCH_mcore_TRUE@$(mcore_libsim_a_OBJECTS) $(mcore_libsim_a_LIBADD): mcore/hw-config.h
4979
4980 @SIM_ENABLE_ARCH_mcore_TRUE@mcore/%.o: mcore/%.c
4981 @SIM_ENABLE_ARCH_mcore_TRUE@    $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
4982
4983 @SIM_ENABLE_ARCH_mcore_TRUE@mcore/%.o: common/%.c
4984 @SIM_ENABLE_ARCH_mcore_TRUE@    $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
4985 @SIM_ENABLE_ARCH_microblaze_TRUE@$(microblaze_libsim_a_OBJECTS) $(microblaze_libsim_a_LIBADD): microblaze/hw-config.h
4986
4987 @SIM_ENABLE_ARCH_microblaze_TRUE@microblaze/%.o: microblaze/%.c
4988 @SIM_ENABLE_ARCH_microblaze_TRUE@       $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
4989
4990 @SIM_ENABLE_ARCH_microblaze_TRUE@microblaze/%.o: common/%.c
4991 @SIM_ENABLE_ARCH_microblaze_TRUE@       $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
4992 @SIM_ENABLE_ARCH_mips_TRUE@$(mips_libsim_a_OBJECTS) $(mips_libsim_a_LIBADD): mips/hw-config.h
4993
4994 @SIM_ENABLE_ARCH_mips_TRUE@mips/%.o: mips/%.c
4995 @SIM_ENABLE_ARCH_mips_TRUE@     $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
4996
4997 @SIM_ENABLE_ARCH_mips_TRUE@mips/%.o: common/%.c
4998 @SIM_ENABLE_ARCH_mips_TRUE@     $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
4999 @SIM_ENABLE_ARCH_mips_TRUE@mips/modules.c: | $(mips_BUILD_OUTPUTS)
5000
5001 @SIM_ENABLE_ARCH_mips_TRUE@$(mips_BUILT_SRC_FROM_IGEN_ITABLE): mips/stamp-igen-itable
5002 @SIM_ENABLE_ARCH_mips_TRUE@$(mips_BUILT_SRC_FROM_GEN_MODE_SINGLE): mips/stamp-gen-mode-single
5003 @SIM_ENABLE_ARCH_mips_TRUE@$(mips_BUILT_SRC_FROM_GEN_MODE_M16_M16): mips/stamp-gen-mode-m16-m16
5004 @SIM_ENABLE_ARCH_mips_TRUE@$(mips_BUILT_SRC_FROM_GEN_MODE_M16_M32): mips/stamp-gen-mode-m16-m32
5005 @SIM_ENABLE_ARCH_mips_TRUE@$(SIM_MIPS_MULTI_SRC): mips/stamp-gen-mode-multi-igen mips/stamp-gen-mode-multi-run
5006
5007 @SIM_ENABLE_ARCH_mips_TRUE@mips/stamp-igen-itable: $(mips_IGEN_INSN) $(mips_IGEN_INSN_INC) $(IGEN)
5008 @SIM_ENABLE_ARCH_mips_TRUE@     $(AM_V_GEN)$(IGEN_RUN) \
5009 @SIM_ENABLE_ARCH_mips_TRUE@             $(mips_IGEN_TRACE) \
5010 @SIM_ENABLE_ARCH_mips_TRUE@             -I $(srcdir)/mips \
5011 @SIM_ENABLE_ARCH_mips_TRUE@             -Werror \
5012 @SIM_ENABLE_ARCH_mips_TRUE@             -Wnodiscard \
5013 @SIM_ENABLE_ARCH_mips_TRUE@             -Wnowidth \
5014 @SIM_ENABLE_ARCH_mips_TRUE@             -Wnounimplemented \
5015 @SIM_ENABLE_ARCH_mips_TRUE@             $(SIM_MIPS_IGEN_ITABLE_FLAGS) \
5016 @SIM_ENABLE_ARCH_mips_TRUE@             -G gen-direct-access \
5017 @SIM_ENABLE_ARCH_mips_TRUE@             -G gen-zero-r0 \
5018 @SIM_ENABLE_ARCH_mips_TRUE@             -i $(mips_IGEN_INSN) \
5019 @SIM_ENABLE_ARCH_mips_TRUE@             -n itable.h    -ht mips/itable.h \
5020 @SIM_ENABLE_ARCH_mips_TRUE@             -n itable.c    -t  mips/itable.c
5021 @SIM_ENABLE_ARCH_mips_TRUE@     $(AM_V_at)touch $@
5022
5023 @SIM_ENABLE_ARCH_mips_TRUE@mips/stamp-gen-mode-single: $(mips_IGEN_INSN) $(mips_IGEN_INSN_INC) $(mips_IGEN_DC) $(IGEN)
5024 @SIM_ENABLE_ARCH_mips_TRUE@     $(AM_V_GEN)$(IGEN_RUN) \
5025 @SIM_ENABLE_ARCH_mips_TRUE@             $(mips_IGEN_TRACE) \
5026 @SIM_ENABLE_ARCH_mips_TRUE@             -I $(srcdir)/mips \
5027 @SIM_ENABLE_ARCH_mips_TRUE@             -Werror \
5028 @SIM_ENABLE_ARCH_mips_TRUE@             -Wnodiscard \
5029 @SIM_ENABLE_ARCH_mips_TRUE@             $(SIM_MIPS_SINGLE_FLAGS) \
5030 @SIM_ENABLE_ARCH_mips_TRUE@             -G gen-direct-access \
5031 @SIM_ENABLE_ARCH_mips_TRUE@             -G gen-zero-r0 \
5032 @SIM_ENABLE_ARCH_mips_TRUE@             -B 32 \
5033 @SIM_ENABLE_ARCH_mips_TRUE@             -H 31 \
5034 @SIM_ENABLE_ARCH_mips_TRUE@             -i $(mips_IGEN_INSN) \
5035 @SIM_ENABLE_ARCH_mips_TRUE@             -o $(mips_IGEN_DC) \
5036 @SIM_ENABLE_ARCH_mips_TRUE@             -x \
5037 @SIM_ENABLE_ARCH_mips_TRUE@             -n icache.h    -hc mips/icache.h \
5038 @SIM_ENABLE_ARCH_mips_TRUE@             -n icache.c    -c  mips/icache.c \
5039 @SIM_ENABLE_ARCH_mips_TRUE@             -n semantics.h -hs mips/semantics.h \
5040 @SIM_ENABLE_ARCH_mips_TRUE@             -n semantics.c -s  mips/semantics.c \
5041 @SIM_ENABLE_ARCH_mips_TRUE@             -n idecode.h   -hd mips/idecode.h \
5042 @SIM_ENABLE_ARCH_mips_TRUE@             -n idecode.c   -d  mips/idecode.c \
5043 @SIM_ENABLE_ARCH_mips_TRUE@             -n model.h     -hm mips/model.h \
5044 @SIM_ENABLE_ARCH_mips_TRUE@             -n model.c     -m  mips/model.c \
5045 @SIM_ENABLE_ARCH_mips_TRUE@             -n support.h   -hf mips/support.h \
5046 @SIM_ENABLE_ARCH_mips_TRUE@             -n support.c   -f  mips/support.c \
5047 @SIM_ENABLE_ARCH_mips_TRUE@             -n engine.h    -he mips/engine.h \
5048 @SIM_ENABLE_ARCH_mips_TRUE@             -n engine.c    -e  mips/engine.c \
5049 @SIM_ENABLE_ARCH_mips_TRUE@             -n irun.c      -r  mips/irun.c
5050 @SIM_ENABLE_ARCH_mips_TRUE@     $(AM_V_at)touch $@
5051
5052 @SIM_ENABLE_ARCH_mips_TRUE@mips/stamp-gen-mode-m16-m16: $(mips_IGEN_INSN) $(mips_IGEN_INSN_INC) $(mips_M16_DC) $(IGEN)
5053 @SIM_ENABLE_ARCH_mips_TRUE@     $(AM_V_GEN)$(IGEN_RUN) \
5054 @SIM_ENABLE_ARCH_mips_TRUE@             $(mips_IGEN_TRACE) \
5055 @SIM_ENABLE_ARCH_mips_TRUE@             -I $(srcdir)/mips \
5056 @SIM_ENABLE_ARCH_mips_TRUE@             -Werror \
5057 @SIM_ENABLE_ARCH_mips_TRUE@             -Wnodiscard \
5058 @SIM_ENABLE_ARCH_mips_TRUE@             $(SIM_MIPS_M16_FLAGS) \
5059 @SIM_ENABLE_ARCH_mips_TRUE@             -G gen-direct-access \
5060 @SIM_ENABLE_ARCH_mips_TRUE@             -G gen-zero-r0 \
5061 @SIM_ENABLE_ARCH_mips_TRUE@             -B 16 \
5062 @SIM_ENABLE_ARCH_mips_TRUE@             -H 15 \
5063 @SIM_ENABLE_ARCH_mips_TRUE@             -i $(mips_IGEN_INSN) \
5064 @SIM_ENABLE_ARCH_mips_TRUE@             -o $(mips_M16_DC) \
5065 @SIM_ENABLE_ARCH_mips_TRUE@             -P m16_ \
5066 @SIM_ENABLE_ARCH_mips_TRUE@             -x \
5067 @SIM_ENABLE_ARCH_mips_TRUE@             -n m16_icache.h    -hc mips/m16_icache.h \
5068 @SIM_ENABLE_ARCH_mips_TRUE@             -n m16_icache.c    -c  mips/m16_icache.c \
5069 @SIM_ENABLE_ARCH_mips_TRUE@             -n m16_semantics.h -hs mips/m16_semantics.h \
5070 @SIM_ENABLE_ARCH_mips_TRUE@             -n m16_semantics.c -s  mips/m16_semantics.c \
5071 @SIM_ENABLE_ARCH_mips_TRUE@             -n m16_idecode.h   -hd mips/m16_idecode.h \
5072 @SIM_ENABLE_ARCH_mips_TRUE@             -n m16_idecode.c   -d  mips/m16_idecode.c \
5073 @SIM_ENABLE_ARCH_mips_TRUE@             -n m16_model.h     -hm mips/m16_model.h \
5074 @SIM_ENABLE_ARCH_mips_TRUE@             -n m16_model.c     -m  mips/m16_model.c \
5075 @SIM_ENABLE_ARCH_mips_TRUE@             -n m16_support.h   -hf mips/m16_support.h \
5076 @SIM_ENABLE_ARCH_mips_TRUE@             -n m16_support.c   -f  mips/m16_support.c
5077 @SIM_ENABLE_ARCH_mips_TRUE@     $(AM_V_at)touch $@
5078
5079 @SIM_ENABLE_ARCH_mips_TRUE@mips/stamp-gen-mode-m16-m32: $(mips_IGEN_INSN) $(mips_IGEN_INSN_INC) $(mips_IGEN_DC) $(IGEN)
5080 @SIM_ENABLE_ARCH_mips_TRUE@     $(AM_V_GEN)$(IGEN_RUN) \
5081 @SIM_ENABLE_ARCH_mips_TRUE@             $(mips_IGEN_TRACE) \
5082 @SIM_ENABLE_ARCH_mips_TRUE@             -I $(srcdir)/mips \
5083 @SIM_ENABLE_ARCH_mips_TRUE@             -Werror \
5084 @SIM_ENABLE_ARCH_mips_TRUE@             -Wnodiscard \
5085 @SIM_ENABLE_ARCH_mips_TRUE@             $(SIM_MIPS_SINGLE_FLAGS) \
5086 @SIM_ENABLE_ARCH_mips_TRUE@             -G gen-direct-access \
5087 @SIM_ENABLE_ARCH_mips_TRUE@             -G gen-zero-r0 \
5088 @SIM_ENABLE_ARCH_mips_TRUE@             -B 32 \
5089 @SIM_ENABLE_ARCH_mips_TRUE@             -H 31 \
5090 @SIM_ENABLE_ARCH_mips_TRUE@             -i $(mips_IGEN_INSN) \
5091 @SIM_ENABLE_ARCH_mips_TRUE@             -o $(mips_IGEN_DC) \
5092 @SIM_ENABLE_ARCH_mips_TRUE@             -P m32_ \
5093 @SIM_ENABLE_ARCH_mips_TRUE@             -x \
5094 @SIM_ENABLE_ARCH_mips_TRUE@             -n m32_icache.h    -hc mips/m32_icache.h \
5095 @SIM_ENABLE_ARCH_mips_TRUE@             -n m32_icache.c    -c  mips/m32_icache.c \
5096 @SIM_ENABLE_ARCH_mips_TRUE@             -n m32_semantics.h -hs mips/m32_semantics.h \
5097 @SIM_ENABLE_ARCH_mips_TRUE@             -n m32_semantics.c -s  mips/m32_semantics.c \
5098 @SIM_ENABLE_ARCH_mips_TRUE@             -n m32_idecode.h   -hd mips/m32_idecode.h \
5099 @SIM_ENABLE_ARCH_mips_TRUE@             -n m32_idecode.c   -d  mips/m32_idecode.c \
5100 @SIM_ENABLE_ARCH_mips_TRUE@             -n m32_model.h     -hm mips/m32_model.h \
5101 @SIM_ENABLE_ARCH_mips_TRUE@             -n m32_model.c     -m  mips/m32_model.c \
5102 @SIM_ENABLE_ARCH_mips_TRUE@             -n m32_support.h   -hf mips/m32_support.h \
5103 @SIM_ENABLE_ARCH_mips_TRUE@             -n m32_support.c   -f  mips/m32_support.c
5104 @SIM_ENABLE_ARCH_mips_TRUE@     $(AM_V_at)touch $@
5105
5106 @SIM_ENABLE_ARCH_mips_TRUE@mips/stamp-gen-mode-multi-igen: $(mips_IGEN_INSN) $(mips_IGEN_INSN_INC) $(mips_IGEN_DC) $(mips_M16_DC) $(mips_MICROMIPS32_DC) $(mips_MICROMIPS16_DC) $(IGEN)
5107 @SIM_ENABLE_ARCH_mips_TRUE@     $(AM_V_GEN)\
5108 @SIM_ENABLE_ARCH_mips_TRUE@     for t in $(SIM_MIPS_MULTI_IGEN_CONFIGS); do \
5109 @SIM_ENABLE_ARCH_mips_TRUE@       p=`echo $${t} | sed -e 's/:.*//'` ; \
5110 @SIM_ENABLE_ARCH_mips_TRUE@       m=`echo $${t} | sed -e 's/.*:\(.*\):.*/\1/'` ; \
5111 @SIM_ENABLE_ARCH_mips_TRUE@       f=`echo $${t} | sed -e 's/.*://'` ; \
5112 @SIM_ENABLE_ARCH_mips_TRUE@       case $${p} in \
5113 @SIM_ENABLE_ARCH_mips_TRUE@         micromips16*) \
5114 @SIM_ENABLE_ARCH_mips_TRUE@           e="-B 16 -H 15 -o $(mips_MICROMIPS16_DC) -F 16" ;; \
5115 @SIM_ENABLE_ARCH_mips_TRUE@         micromips32* | micromips64*) \
5116 @SIM_ENABLE_ARCH_mips_TRUE@           e="-B 32 -H 31 -o $(mips_MICROMIPS32_DC) -F $${f}" ;; \
5117 @SIM_ENABLE_ARCH_mips_TRUE@         micromips_m32*) \
5118 @SIM_ENABLE_ARCH_mips_TRUE@           e="-B 32 -H 31 -o $(mips_IGEN_DC) -F $${f}"; \
5119 @SIM_ENABLE_ARCH_mips_TRUE@           m="mips32r2,mips3d,mdmx,dsp,dsp2,smartmips" ;; \
5120 @SIM_ENABLE_ARCH_mips_TRUE@         micromips_m64*) \
5121 @SIM_ENABLE_ARCH_mips_TRUE@           e="-B 32 -H 31 -o $(mips_IGEN_DC) -F $${f}"; \
5122 @SIM_ENABLE_ARCH_mips_TRUE@           m="mips64r2,mips3d,mdmx,dsp,dsp2,smartmips" ;; \
5123 @SIM_ENABLE_ARCH_mips_TRUE@         m16*) \
5124 @SIM_ENABLE_ARCH_mips_TRUE@           e="-B 16 -H 15 -o $(mips_M16_DC) -F 16" ;; \
5125 @SIM_ENABLE_ARCH_mips_TRUE@         *) \
5126 @SIM_ENABLE_ARCH_mips_TRUE@           e="-B 32 -H 31 -o $(mips_IGEN_DC) -F $${f}" ;; \
5127 @SIM_ENABLE_ARCH_mips_TRUE@       esac; \
5128 @SIM_ENABLE_ARCH_mips_TRUE@       $(IGEN_RUN) \
5129 @SIM_ENABLE_ARCH_mips_TRUE@             $(mips_IGEN_TRACE) \
5130 @SIM_ENABLE_ARCH_mips_TRUE@             $${e} \
5131 @SIM_ENABLE_ARCH_mips_TRUE@             -I $(srcdir)/mips \
5132 @SIM_ENABLE_ARCH_mips_TRUE@             -Werror \
5133 @SIM_ENABLE_ARCH_mips_TRUE@             -Wnodiscard \
5134 @SIM_ENABLE_ARCH_mips_TRUE@             -M $${m} \
5135 @SIM_ENABLE_ARCH_mips_TRUE@             -G gen-direct-access \
5136 @SIM_ENABLE_ARCH_mips_TRUE@             -G gen-zero-r0 \
5137 @SIM_ENABLE_ARCH_mips_TRUE@             -i $(mips_IGEN_INSN) \
5138 @SIM_ENABLE_ARCH_mips_TRUE@             -P $${p}_ \
5139 @SIM_ENABLE_ARCH_mips_TRUE@             -x \
5140 @SIM_ENABLE_ARCH_mips_TRUE@             -n $${p}_icache.h    -hc mips/$${p}_icache.h \
5141 @SIM_ENABLE_ARCH_mips_TRUE@             -n $${p}_icache.c    -c  mips/$${p}_icache.c \
5142 @SIM_ENABLE_ARCH_mips_TRUE@             -n $${p}_semantics.h -hs mips/$${p}_semantics.h \
5143 @SIM_ENABLE_ARCH_mips_TRUE@             -n $${p}_semantics.c -s  mips/$${p}_semantics.c \
5144 @SIM_ENABLE_ARCH_mips_TRUE@             -n $${p}_idecode.h   -hd mips/$${p}_idecode.h \
5145 @SIM_ENABLE_ARCH_mips_TRUE@             -n $${p}_idecode.c   -d  mips/$${p}_idecode.c \
5146 @SIM_ENABLE_ARCH_mips_TRUE@             -n $${p}_model.h     -hm mips/$${p}_model.h \
5147 @SIM_ENABLE_ARCH_mips_TRUE@             -n $${p}_model.c     -m  mips/$${p}_model.c \
5148 @SIM_ENABLE_ARCH_mips_TRUE@             -n $${p}_support.h   -hf mips/$${p}_support.h \
5149 @SIM_ENABLE_ARCH_mips_TRUE@             -n $${p}_support.c   -f  mips/$${p}_support.c \
5150 @SIM_ENABLE_ARCH_mips_TRUE@             -n $${p}_engine.h    -he mips/$${p}_engine.h \
5151 @SIM_ENABLE_ARCH_mips_TRUE@             -n $${p}_engine.c    -e  mips/$${p}_engine.c \
5152 @SIM_ENABLE_ARCH_mips_TRUE@         || exit; \
5153 @SIM_ENABLE_ARCH_mips_TRUE@     done
5154 @SIM_ENABLE_ARCH_mips_TRUE@     $(AM_V_at)touch $@
5155
5156 @SIM_ENABLE_ARCH_mips_TRUE@mips/stamp-gen-mode-multi-run: mips/m16run.c mips/micromipsrun.c
5157 @SIM_ENABLE_ARCH_mips_TRUE@     $(AM_V_GEN)\
5158 @SIM_ENABLE_ARCH_mips_TRUE@     for t in $(SIM_MIPS_MULTI_IGEN_CONFIGS); do \
5159 @SIM_ENABLE_ARCH_mips_TRUE@       case $${t} in \
5160 @SIM_ENABLE_ARCH_mips_TRUE@         m16*) \
5161 @SIM_ENABLE_ARCH_mips_TRUE@           m=`echo $${t} | sed -e 's/^m16//' -e 's/:.*//'`; \
5162 @SIM_ENABLE_ARCH_mips_TRUE@           o=mips/m16$${m}_run.c; \
5163 @SIM_ENABLE_ARCH_mips_TRUE@           sed < $(srcdir)/mips/m16run.c > $$o.tmp \
5164 @SIM_ENABLE_ARCH_mips_TRUE@                 -e "s/^sim_/m16$${m}_/" \
5165 @SIM_ENABLE_ARCH_mips_TRUE@                 -e "/include/s/sim-engine/m16$${m}_engine/" \
5166 @SIM_ENABLE_ARCH_mips_TRUE@                 -e "s/m16_/m16$${m}_/" \
5167 @SIM_ENABLE_ARCH_mips_TRUE@                 -e "s/m32_/m32$${m}_/" \
5168 @SIM_ENABLE_ARCH_mips_TRUE@                 || exit 1; \
5169 @SIM_ENABLE_ARCH_mips_TRUE@           $(SHELL) $(srcroot)/move-if-change $$o.tmp $$o; \
5170 @SIM_ENABLE_ARCH_mips_TRUE@           ;;\
5171 @SIM_ENABLE_ARCH_mips_TRUE@         micromips32*) \
5172 @SIM_ENABLE_ARCH_mips_TRUE@           m=`echo $${t} | sed -e 's/^micromips32//' -e 's/:.*//'`; \
5173 @SIM_ENABLE_ARCH_mips_TRUE@           o=mips/micromips$${m}_run.c; \
5174 @SIM_ENABLE_ARCH_mips_TRUE@           sed < $(srcdir)/mips/micromipsrun.c > $$o.tmp \
5175 @SIM_ENABLE_ARCH_mips_TRUE@                 -e "s/^sim_/micromips32$${m}_/" \
5176 @SIM_ENABLE_ARCH_mips_TRUE@                 -e "/include/s/sim-engine/micromips32$${m}_engine/" \
5177 @SIM_ENABLE_ARCH_mips_TRUE@                 -e "s/micromips16_/micromips16$${m}_/" \
5178 @SIM_ENABLE_ARCH_mips_TRUE@                 -e "s/micromips32_/micromips32$${m}_/" \
5179 @SIM_ENABLE_ARCH_mips_TRUE@                 -e "s/m32_/m32$${m}_/" \
5180 @SIM_ENABLE_ARCH_mips_TRUE@                 || exit 1; \
5181 @SIM_ENABLE_ARCH_mips_TRUE@           $(SHELL) $(srcroot)/move-if-change $$o.tmp $$o; \
5182 @SIM_ENABLE_ARCH_mips_TRUE@           ;;\
5183 @SIM_ENABLE_ARCH_mips_TRUE@         micromips64*) \
5184 @SIM_ENABLE_ARCH_mips_TRUE@           m=`echo $${t} | sed -e 's/^micromips64//' -e 's/:.*//'`; \
5185 @SIM_ENABLE_ARCH_mips_TRUE@           o=mips/micromips$${m}_run.c; \
5186 @SIM_ENABLE_ARCH_mips_TRUE@           sed < $(srcdir)/mips/micromipsrun.c > $$o.tmp \
5187 @SIM_ENABLE_ARCH_mips_TRUE@                 -e "s/^sim_/micromips64$${m}_/" \
5188 @SIM_ENABLE_ARCH_mips_TRUE@                 -e "/include/s/sim-engine/micromips64$${m}_engine/" \
5189 @SIM_ENABLE_ARCH_mips_TRUE@                 -e "s/micromips16_/micromips16$${m}_/" \
5190 @SIM_ENABLE_ARCH_mips_TRUE@                 -e "s/micromips32_/micromips64$${m}_/" \
5191 @SIM_ENABLE_ARCH_mips_TRUE@                 -e "s/m32_/m64$${m}_/" \
5192 @SIM_ENABLE_ARCH_mips_TRUE@                 || exit 1; \
5193 @SIM_ENABLE_ARCH_mips_TRUE@           $(SHELL) $(srcroot)/move-if-change $$o.tmp $$o; \
5194 @SIM_ENABLE_ARCH_mips_TRUE@           ;;\
5195 @SIM_ENABLE_ARCH_mips_TRUE@       esac \
5196 @SIM_ENABLE_ARCH_mips_TRUE@     done
5197 @SIM_ENABLE_ARCH_mips_TRUE@     $(AM_V_at)touch $@
5198 @SIM_ENABLE_ARCH_mn10300_TRUE@$(mn10300_libsim_a_OBJECTS) $(mn10300_libsim_a_LIBADD): mn10300/hw-config.h
5199
5200 @SIM_ENABLE_ARCH_mn10300_TRUE@mn10300/%.o: mn10300/%.c
5201 @SIM_ENABLE_ARCH_mn10300_TRUE@  $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
5202
5203 @SIM_ENABLE_ARCH_mn10300_TRUE@mn10300/%.o: common/%.c
5204 @SIM_ENABLE_ARCH_mn10300_TRUE@  $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
5205 @SIM_ENABLE_ARCH_mn10300_TRUE@mn10300/modules.c: | $(mn10300_BUILD_OUTPUTS)
5206
5207 @SIM_ENABLE_ARCH_mn10300_TRUE@$(mn10300_BUILT_SRC_FROM_IGEN): mn10300/stamp-igen
5208 @SIM_ENABLE_ARCH_mn10300_TRUE@mn10300/stamp-igen: $(mn10300_IGEN_INSN) $(mn10300_IGEN_INSN_INC) $(mn10300_IGEN_DC) $(IGEN)
5209 @SIM_ENABLE_ARCH_mn10300_TRUE@  $(AM_V_GEN)$(IGEN_RUN) \
5210 @SIM_ENABLE_ARCH_mn10300_TRUE@          $(mn10300_IGEN_TRACE) \
5211 @SIM_ENABLE_ARCH_mn10300_TRUE@          -G gen-direct-access \
5212 @SIM_ENABLE_ARCH_mn10300_TRUE@          -M mn10300,am33 -G gen-multi-sim=am33 \
5213 @SIM_ENABLE_ARCH_mn10300_TRUE@          -M am33_2 \
5214 @SIM_ENABLE_ARCH_mn10300_TRUE@          -I $(srcdir)/mn10300 \
5215 @SIM_ENABLE_ARCH_mn10300_TRUE@          -i $(mn10300_IGEN_INSN) \
5216 @SIM_ENABLE_ARCH_mn10300_TRUE@          -o $(mn10300_IGEN_DC) \
5217 @SIM_ENABLE_ARCH_mn10300_TRUE@          -x \
5218 @SIM_ENABLE_ARCH_mn10300_TRUE@          -n icache.h    -hc mn10300/icache.h \
5219 @SIM_ENABLE_ARCH_mn10300_TRUE@          -n icache.c    -c  mn10300/icache.c \
5220 @SIM_ENABLE_ARCH_mn10300_TRUE@          -n semantics.h -hs mn10300/semantics.h \
5221 @SIM_ENABLE_ARCH_mn10300_TRUE@          -n semantics.c -s  mn10300/semantics.c \
5222 @SIM_ENABLE_ARCH_mn10300_TRUE@          -n idecode.h   -hd mn10300/idecode.h \
5223 @SIM_ENABLE_ARCH_mn10300_TRUE@          -n idecode.c   -d  mn10300/idecode.c \
5224 @SIM_ENABLE_ARCH_mn10300_TRUE@          -n model.h     -hm mn10300/model.h \
5225 @SIM_ENABLE_ARCH_mn10300_TRUE@          -n model.c     -m  mn10300/model.c \
5226 @SIM_ENABLE_ARCH_mn10300_TRUE@          -n support.h   -hf mn10300/support.h \
5227 @SIM_ENABLE_ARCH_mn10300_TRUE@          -n support.c   -f  mn10300/support.c \
5228 @SIM_ENABLE_ARCH_mn10300_TRUE@          -n itable.h    -ht mn10300/itable.h \
5229 @SIM_ENABLE_ARCH_mn10300_TRUE@          -n itable.c    -t  mn10300/itable.c \
5230 @SIM_ENABLE_ARCH_mn10300_TRUE@          -n engine.h    -he mn10300/engine.h \
5231 @SIM_ENABLE_ARCH_mn10300_TRUE@          -n engine.c    -e  mn10300/engine.c \
5232 @SIM_ENABLE_ARCH_mn10300_TRUE@          -n irun.c      -r  mn10300/irun.c
5233 @SIM_ENABLE_ARCH_mn10300_TRUE@  $(AM_V_at)touch $@
5234 @SIM_ENABLE_ARCH_moxie_TRUE@$(moxie_libsim_a_OBJECTS) $(moxie_libsim_a_LIBADD): moxie/hw-config.h
5235
5236 @SIM_ENABLE_ARCH_moxie_TRUE@moxie/%.o: moxie/%.c
5237 @SIM_ENABLE_ARCH_moxie_TRUE@    $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
5238
5239 @SIM_ENABLE_ARCH_moxie_TRUE@moxie/%.o: common/%.c
5240 @SIM_ENABLE_ARCH_moxie_TRUE@    $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
5241
5242 @SIM_ENABLE_ARCH_moxie_TRUE@moxie/moxie-gdb.dtb: @MAINT@ moxie/moxie-gdb.dts moxie/$(am__dirstamp)
5243 @SIM_ENABLE_ARCH_moxie_TRUE@    $(AM_V_GEN) \
5244 @SIM_ENABLE_ARCH_moxie_TRUE@    if test "x$(DTC)" != x; then \
5245 @SIM_ENABLE_ARCH_moxie_TRUE@      $(DTC) -O dtb -o $@.tmp ${srcdir}/moxie/moxie-gdb.dts || exit 1; \
5246 @SIM_ENABLE_ARCH_moxie_TRUE@      $(SHELL) $(srcroot)/move-if-change $@.tmp ${srcdir}/moxie/moxie-gdb.dtb || exit 1; \
5247 @SIM_ENABLE_ARCH_moxie_TRUE@      touch ${srcdir}/moxie/moxie-gdb.dtb; \
5248 @SIM_ENABLE_ARCH_moxie_TRUE@    else \
5249 @SIM_ENABLE_ARCH_moxie_TRUE@      echo "Could not update the moxie-gdb.dtb file because the device "; \
5250 @SIM_ENABLE_ARCH_moxie_TRUE@      echo "tree compiler tool (dtc) is missing.  Install the tool to "; \
5251 @SIM_ENABLE_ARCH_moxie_TRUE@      echo "update the device tree blob."; \
5252 @SIM_ENABLE_ARCH_moxie_TRUE@    fi
5253 @SIM_ENABLE_ARCH_msp430_TRUE@$(msp430_libsim_a_OBJECTS) $(msp430_libsim_a_LIBADD): msp430/hw-config.h
5254
5255 @SIM_ENABLE_ARCH_msp430_TRUE@msp430/%.o: msp430/%.c
5256 @SIM_ENABLE_ARCH_msp430_TRUE@   $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
5257
5258 @SIM_ENABLE_ARCH_msp430_TRUE@msp430/%.o: common/%.c
5259 @SIM_ENABLE_ARCH_msp430_TRUE@   $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
5260 @SIM_ENABLE_ARCH_or1k_TRUE@$(or1k_libsim_a_OBJECTS) $(or1k_libsim_a_LIBADD): or1k/hw-config.h
5261
5262 @SIM_ENABLE_ARCH_or1k_TRUE@or1k/%.o: or1k/%.c
5263 @SIM_ENABLE_ARCH_or1k_TRUE@     $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
5264
5265 @SIM_ENABLE_ARCH_or1k_TRUE@or1k/%.o: common/%.c
5266 @SIM_ENABLE_ARCH_or1k_TRUE@     $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
5267 @SIM_ENABLE_ARCH_or1k_TRUE@or1k/modules.c: | $(or1k_BUILD_OUTPUTS)
5268
5269 @SIM_ENABLE_ARCH_or1k_TRUE@or1k/mloop.c or1k/eng.h: or1k/stamp-mloop ; @true
5270 @SIM_ENABLE_ARCH_or1k_TRUE@or1k/stamp-mloop: $(srccom)/genmloop.sh or1k/mloop.in
5271 @SIM_ENABLE_ARCH_or1k_TRUE@     $(AM_V_GEN)$(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \
5272 @SIM_ENABLE_ARCH_or1k_TRUE@             -mono -fast -pbb -switch sem-switch.c \
5273 @SIM_ENABLE_ARCH_or1k_TRUE@             -cpu or1k32bf \
5274 @SIM_ENABLE_ARCH_or1k_TRUE@             -infile $(srcdir)/or1k/mloop.in -outfile-prefix or1k/
5275 @SIM_ENABLE_ARCH_or1k_TRUE@     $(AM_V_at)$(SHELL) $(srcroot)/move-if-change or1k/eng.hin or1k/eng.h
5276 @SIM_ENABLE_ARCH_or1k_TRUE@     $(AM_V_at)$(SHELL) $(srcroot)/move-if-change or1k/mloop.cin or1k/mloop.c
5277 @SIM_ENABLE_ARCH_or1k_TRUE@     $(AM_V_at)touch $@
5278
5279 @SIM_ENABLE_ARCH_or1k_TRUE@or1k/cgen: or1k/cgen-arch or1k/cgen-cpu-decode
5280
5281 @SIM_ENABLE_ARCH_or1k_TRUE@or1k/cgen-arch:
5282 @SIM_ENABLE_ARCH_or1k_TRUE@     $(AM_V_GEN)mach=or32,or32nd FLAGS="with-scache"; $(CGEN_GEN_ARCH)
5283 @SIM_ENABLE_ARCH_or1k_TRUE@or1k/arch.h or1k/arch.c or1k/cpuall.h: @CGEN_MAINT@ or1k/cgen-arch
5284
5285 @SIM_ENABLE_ARCH_or1k_TRUE@or1k/cgen-cpu-decode:
5286 @SIM_ENABLE_ARCH_or1k_TRUE@     $(AM_V_GEN)cpu=or1k32bf mach=or32,or32nd FLAGS="with-scache" EXTRAFILES="$(CGEN_CPU_SEM) $(CGEN_CPU_SEMSW)"; $(CGEN_GEN_CPU_DECODE)
5287 @SIM_ENABLE_ARCH_or1k_TRUE@or1k/cpu.h or1k/cpu.c or1k/model.c or1k/sem.c or1k/sem-switch.c or1k/decode.c or1k/decode.h: @CGEN_MAINT@ or1k/cgen-cpu-decode
5288
5289 @SIM_ENABLE_ARCH_ppc_TRUE@ppc/psim$(EXEEXT): ppc/run$(EXEEXT)
5290 @SIM_ENABLE_ARCH_ppc_TRUE@      $(AM_V_GEN)ln $< $@ 2>/dev/null || $(LN_S) $< $@ 2>/dev/null || cp -p $< $@
5291
5292 @SIM_ENABLE_ARCH_ppc_TRUE@ppc/%.o: ppc/%.c | ppc/libsim.a $(SIM_ALL_RECURSIVE_DEPS)
5293 @SIM_ENABLE_ARCH_ppc_TRUE@      $(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
5294
5295 @SIM_ENABLE_ARCH_ppc_TRUE@ppc/spreg.c: @MAINT@ ppc/ppc-spr-table ppc/spreg-gen.py ppc/$(am__dirstamp)
5296 @SIM_ENABLE_ARCH_ppc_TRUE@      $(AM_V_GEN)$(srcdir)/ppc/spreg-gen.py --source $@.tmp
5297 @SIM_ENABLE_ARCH_ppc_TRUE@      $(AM_V_at)$(SHELL) $(srcroot)/move-if-change $@.tmp $(srcdir)/ppc/spreg.c
5298 @SIM_ENABLE_ARCH_ppc_TRUE@      $(AM_V_at)touch $(srcdir)/ppc/spreg.c
5299
5300 @SIM_ENABLE_ARCH_ppc_TRUE@ppc/spreg.h: @MAINT@ ppc/ppc-spr-table ppc/spreg-gen.py ppc/$(am__dirstamp)
5301 @SIM_ENABLE_ARCH_ppc_TRUE@      $(AM_V_GEN)$(srcdir)/ppc/spreg-gen.py --header $@.tmp
5302 @SIM_ENABLE_ARCH_ppc_TRUE@      $(AM_V_at)$(SHELL) $(srcroot)/move-if-change $@.tmp $(srcdir)/ppc/spreg.h
5303 @SIM_ENABLE_ARCH_ppc_TRUE@      $(AM_V_at)touch $(srcdir)/ppc/spreg.h
5304 @SIM_ENABLE_ARCH_pru_TRUE@$(pru_libsim_a_OBJECTS) $(pru_libsim_a_LIBADD): pru/hw-config.h
5305
5306 @SIM_ENABLE_ARCH_pru_TRUE@pru/%.o: pru/%.c
5307 @SIM_ENABLE_ARCH_pru_TRUE@      $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
5308
5309 @SIM_ENABLE_ARCH_pru_TRUE@pru/%.o: common/%.c
5310 @SIM_ENABLE_ARCH_pru_TRUE@      $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
5311 @SIM_ENABLE_ARCH_riscv_TRUE@$(riscv_libsim_a_OBJECTS) $(riscv_libsim_a_LIBADD): riscv/hw-config.h
5312
5313 @SIM_ENABLE_ARCH_riscv_TRUE@riscv/%.o: riscv/%.c
5314 @SIM_ENABLE_ARCH_riscv_TRUE@    $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
5315
5316 @SIM_ENABLE_ARCH_riscv_TRUE@riscv/%.o: common/%.c
5317 @SIM_ENABLE_ARCH_riscv_TRUE@    $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
5318 @SIM_ENABLE_ARCH_rl78_TRUE@$(rl78_libsim_a_OBJECTS) $(rl78_libsim_a_LIBADD): rl78/hw-config.h
5319
5320 @SIM_ENABLE_ARCH_rl78_TRUE@rl78/%.o: rl78/%.c
5321 @SIM_ENABLE_ARCH_rl78_TRUE@     $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
5322
5323 @SIM_ENABLE_ARCH_rl78_TRUE@rl78/%.o: common/%.c
5324 @SIM_ENABLE_ARCH_rl78_TRUE@     $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
5325
5326 @SIM_ENABLE_ARCH_rx_TRUE@rx/%.o: rx/%.c | rx/libsim.a $(SIM_ALL_RECURSIVE_DEPS)
5327 @SIM_ENABLE_ARCH_rx_TRUE@       $(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
5328 @SIM_ENABLE_ARCH_sh_TRUE@sh/modules.c: | $(sh_BUILD_OUTPUTS)
5329
5330 # These rules are copied from automake, but tweaked to use FOR_BUILD variables.
5331 @SIM_ENABLE_ARCH_sh_TRUE@sh/gencode$(EXEEXT): $(sh_gencode_OBJECTS) $(sh_gencode_DEPENDENCIES) sh/$(am__dirstamp)
5332 @SIM_ENABLE_ARCH_sh_TRUE@       $(AM_V_CCLD)$(LINK_FOR_BUILD) $(sh_gencode_OBJECTS) $(sh_gencode_LDADD)
5333
5334 # gencode is a build-time only tool.  Override the default rules for it.
5335 @SIM_ENABLE_ARCH_sh_TRUE@sh/gencode.o: sh/gencode.c
5336 @SIM_ENABLE_ARCH_sh_TRUE@       $(AM_V_CC)$(COMPILE_FOR_BUILD) -c $< -o $@
5337
5338 @SIM_ENABLE_ARCH_sh_TRUE@sh/code.c: sh/gencode$(EXEEXT)
5339 @SIM_ENABLE_ARCH_sh_TRUE@       $(AM_V_GEN)$< -x >$@
5340
5341 @SIM_ENABLE_ARCH_sh_TRUE@sh/ppi.c: sh/gencode$(EXEEXT)
5342 @SIM_ENABLE_ARCH_sh_TRUE@       $(AM_V_GEN)$< -p >$@
5343
5344 @SIM_ENABLE_ARCH_sh_TRUE@sh/table.c: sh/gencode$(EXEEXT)
5345 @SIM_ENABLE_ARCH_sh_TRUE@       $(AM_V_GEN)$< -s >$@
5346 @SIM_ENABLE_ARCH_v850_TRUE@v850/modules.c: | $(v850_BUILD_OUTPUTS)
5347
5348 @SIM_ENABLE_ARCH_v850_TRUE@$(v850_BUILT_SRC_FROM_IGEN): v850/stamp-igen
5349 @SIM_ENABLE_ARCH_v850_TRUE@v850/stamp-igen: $(v850_IGEN_INSN) $(v850_IGEN_DC) $(IGEN)
5350 @SIM_ENABLE_ARCH_v850_TRUE@     $(AM_V_GEN)$(IGEN_RUN) \
5351 @SIM_ENABLE_ARCH_v850_TRUE@             $(v850_IGEN_TRACE) \
5352 @SIM_ENABLE_ARCH_v850_TRUE@             -G gen-direct-access \
5353 @SIM_ENABLE_ARCH_v850_TRUE@             -G gen-zero-r0 \
5354 @SIM_ENABLE_ARCH_v850_TRUE@             -i $(v850_IGEN_INSN) \
5355 @SIM_ENABLE_ARCH_v850_TRUE@             -o $(v850_IGEN_DC) \
5356 @SIM_ENABLE_ARCH_v850_TRUE@             -x \
5357 @SIM_ENABLE_ARCH_v850_TRUE@             -n icache.h    -hc v850/icache.h \
5358 @SIM_ENABLE_ARCH_v850_TRUE@             -n icache.c    -c  v850/icache.c \
5359 @SIM_ENABLE_ARCH_v850_TRUE@             -n semantics.h -hs v850/semantics.h \
5360 @SIM_ENABLE_ARCH_v850_TRUE@             -n semantics.c -s  v850/semantics.c \
5361 @SIM_ENABLE_ARCH_v850_TRUE@             -n idecode.h   -hd v850/idecode.h \
5362 @SIM_ENABLE_ARCH_v850_TRUE@             -n idecode.c   -d  v850/idecode.c \
5363 @SIM_ENABLE_ARCH_v850_TRUE@             -n model.h     -hm v850/model.h \
5364 @SIM_ENABLE_ARCH_v850_TRUE@             -n model.c     -m  v850/model.c \
5365 @SIM_ENABLE_ARCH_v850_TRUE@             -n support.h   -hf v850/support.h \
5366 @SIM_ENABLE_ARCH_v850_TRUE@             -n support.c   -f  v850/support.c \
5367 @SIM_ENABLE_ARCH_v850_TRUE@             -n itable.h    -ht v850/itable.h \
5368 @SIM_ENABLE_ARCH_v850_TRUE@             -n itable.c    -t  v850/itable.c \
5369 @SIM_ENABLE_ARCH_v850_TRUE@             -n engine.h    -he v850/engine.h \
5370 @SIM_ENABLE_ARCH_v850_TRUE@             -n engine.c    -e  v850/engine.c \
5371 @SIM_ENABLE_ARCH_v850_TRUE@             -n irun.c      -r  v850/irun.c
5372 @SIM_ENABLE_ARCH_v850_TRUE@     $(AM_V_at)touch $@
5373
5374 %/libsim.a: | $(SIM_ALL_RECURSIVE_DEPS)
5375         $(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
5376
5377 %/nrun.o: common/nrun.c | %/libsim.a $(SIM_ALL_RECURSIVE_DEPS)
5378         $(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
5379
5380 all-recursive: $(SIM_ALL_RECURSIVE_DEPS)
5381
5382 install-data-local: installdirs $(SIM_INSTALL_DATA_LOCAL_DEPS)
5383         $(AM_V_at)$(MKDIR_P) $(DESTDIR)$(libdir)
5384         lib=`echo sim | sed '$(program_transform_name)'`; \
5385         for d in $(SIM_ENABLED_ARCHES); do \
5386                 n="$$lib"; \
5387                 [ "$(SIM_PRIMARY_TARGET)" = "$$d" ] || n="$$n-$$d"; \
5388                 n="lib$$n.a"; \
5389                 $(INSTALL_DATA) $$d/libsim.a $(DESTDIR)$(libdir)/$$n || exit 1; \
5390         done
5391
5392 install-exec-local: installdirs $(SIM_INSTALL_EXEC_LOCAL_DEPS)
5393         $(AM_V_at)$(MKDIR_P) $(DESTDIR)$(bindir)
5394         run=`echo run | sed '$(program_transform_name)'`; \
5395         for d in $(SIM_ENABLED_ARCHES); do \
5396                 n="$$run"; \
5397                 [ "$(SIM_PRIMARY_TARGET)" = "$$d" ] || n="$$n-$$d"; \
5398                 $(LIBTOOL) --mode=install \
5399                         $(INSTALL_PROGRAM) $$d/run$(EXEEXT) $(DESTDIR)$(bindir)/$$n$(EXEEXT) || exit 1; \
5400         done
5401
5402 uninstall-local: $(SIM_UNINSTALL_LOCAL_DEPS)
5403         rm -f $(DESTDIR)$(bindir)/run $(DESTDIR)$(libdir)/libsim.a
5404         for d in $(SIM_ENABLED_ARCHES); do \
5405                 rm -f $(DESTDIR)$(bindir)/run-$$d $(DESTDIR)$(libdir)/libsim-$$d.a; \
5406         done
5407
5408 # Tell versions [3.59,3.63) of GNU make to not export all variables.
5409 # Otherwise a system limit (for SysV at least) may be exceeded.
5410 .NOEXPORT: