sim/Makefile.in

   1 # Makefile.in generated by automake 1.15.1 from Makefile.am.
   2 # @configure_input@
   3
   4 # Copyright (C) 1994-2017 Free Software Foundation, Inc.
   5
   6 # This Makefile.in is free software; the Free Software Foundation
   7 # gives unlimited permission to copy and/or distribute it,
   8 # with or without modifications, as long as this notice is preserved.
   9
  10 # This program is distributed in the hope that it will be useful,
  11 # but WITHOUT ANY WARRANTY, to the extent permitted by law; without
  12 # even the implied warranty of MERCHANTABILITY or FITNESS FOR A
  13 # PARTICULAR PURPOSE.
  14
  15 @SET_MAKE@
  16
  17 #   Copyright (C) 1993-2023 Free Software Foundation, Inc.
  18 #
  19 # This program is free software; you can redistribute it and/or modify
  20 # it under the terms of the GNU General Public License as published by
  21 # the Free Software Foundation; either version 3 of the License, or
  22 # (at your option) any later version.
  23 #
  24 # This program is distributed in the hope that it will be useful,
  25 # but WITHOUT ANY WARRANTY; without even the implied warranty of
  26 # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  27 # GNU General Public License for more details.
  28 #
  29 # You should have received a copy of the GNU General Public License
  30 # along with this program.  If not, see <http://www.gnu.org/licenses/>.
  31
  32
  33
  34
  35 VPATH = @srcdir@
  36 am__is_gnu_make = { \
  37   if test -z '$(MAKELEVEL)'; then \
  38     false; \
  39   elif test -n '$(MAKE_HOST)'; then \
  40     true; \
  41   elif test -n '$(MAKE_VERSION)' && test -n '$(CURDIR)'; then \
  42     true; \
  43   else \
  44     false; \
  45   fi; \
  46 }
  47 am__make_running_with_option = \
  48   case $${target_option-} in \
  49       ?) ;; \
  50       *) echo "am__make_running_with_option: internal error: invalid" \
  51               "target option '$${target_option-}' specified" >&2; \
  52          exit 1;; \
  53   esac; \
  54   has_opt=no; \
  55   sane_makeflags=$$MAKEFLAGS; \
  56   if $(am__is_gnu_make); then \
  57     sane_makeflags=$$MFLAGS; \
  58   else \
  59     case $$MAKEFLAGS in \
  60       *\\[\ \   ]*) \
  61         bs=\\; \
  62         sane_makeflags=`printf '%s\n' "$$MAKEFLAGS" \
  63           | sed "s/$$bs$$bs[$$bs $$bs   ]*//g"`;; \
  64     esac; \
  65   fi; \
  66   skip_next=no; \
  67   strip_trailopt () \
  68   { \
  69     flg=`printf '%s\n' "$$flg" | sed "s/$$1.*$$//"`; \
  70   }; \
  71   for flg in $$sane_makeflags; do \
  72     test $$skip_next = yes && { skip_next=no; continue; }; \
  73     case $$flg in \
  74       *=*|--*) continue;; \
  75         -*I) strip_trailopt 'I'; skip_next=yes;; \
  76       -*I?*) strip_trailopt 'I';; \
  77         -*O) strip_trailopt 'O'; skip_next=yes;; \
  78       -*O?*) strip_trailopt 'O';; \
  79         -*l) strip_trailopt 'l'; skip_next=yes;; \
  80       -*l?*) strip_trailopt 'l';; \
  81       -[dEDm]) skip_next=yes;; \
  82       -[JT]) skip_next=yes;; \
  83     esac; \
  84     case $$flg in \
  85       *$$target_option*) has_opt=yes; break;; \
  86     esac; \
  87   done; \
  88   test $$has_opt = yes
  89 am__make_dryrun = (target_option=n; $(am__make_running_with_option))
  90 am__make_keepgoing = (target_option=k; $(am__make_running_with_option))
  91 pkgdatadir = $(datadir)/@PACKAGE@
  92 pkgincludedir = $(includedir)/@PACKAGE@
  93 pkglibdir = $(libdir)/@PACKAGE@
  94 pkglibexecdir = $(libexecdir)/@PACKAGE@
  95 am__cd = CDPATH="$${ZSH_VERSION+.}$(PATH_SEPARATOR)" && cd
  96 install_sh_DATA = $(install_sh) -c -m 644
  97 install_sh_PROGRAM = $(install_sh) -c
  98 install_sh_SCRIPT = $(install_sh) -c
  99 INSTALL_HEADER = $(INSTALL_DATA)
 100 transform = $(program_transform_name)
 101 NORMAL_INSTALL = :
 102 PRE_INSTALL = :
 103 POST_INSTALL = :
 104 NORMAL_UNINSTALL = :
 105 PRE_UNINSTALL = :
 106 POST_UNINSTALL = :
 107 build_triplet = @build@
 108 host_triplet = @host@
 109 target_triplet = @target@
 110 check_PROGRAMS = $(am__EXEEXT_8) $(am__EXEEXT_9)
 111 noinst_PROGRAMS = $(am__EXEEXT_10) $(am__EXEEXT_11) $(am__EXEEXT_12) \
 112         $(am__EXEEXT_13) $(am__EXEEXT_14) $(am__EXEEXT_15) \
 113         $(am__EXEEXT_16) $(am__EXEEXT_17) $(am__EXEEXT_18) \
 114         $(am__EXEEXT_19) $(am__EXEEXT_20) $(am__EXEEXT_21) \
 115         $(am__EXEEXT_22) $(am__EXEEXT_23) $(am__EXEEXT_24) \
 116         $(am__EXEEXT_25) $(am__EXEEXT_26) $(am__EXEEXT_27) \
 117         $(am__EXEEXT_28) $(am__EXEEXT_29) $(am__EXEEXT_30) \
 118         $(am__EXEEXT_31) $(am__EXEEXT_32) $(am__EXEEXT_33) \
 119         $(am__EXEEXT_34) $(am__EXEEXT_35) $(am__EXEEXT_36) \
 120         $(am__EXEEXT_37) $(am__EXEEXT_38) $(am__EXEEXT_39) \
 121         $(am__EXEEXT_40) $(am__EXEEXT_41)
 122 EXTRA_PROGRAMS = $(am__EXEEXT_2) testsuite/common/bits-gen$(EXEEXT) \
 123         testsuite/common/fpu-tst$(EXEEXT) $(am__EXEEXT_3) \
 124         $(am__EXEEXT_4) $(am__EXEEXT_5) $(am__EXEEXT_6) \
 125         $(am__EXEEXT_7)
 126 @ENABLE_SIM_TRUE@am__append_1 = \
 127 @ENABLE_SIM_TRUE@       $(srcroot)/include/sim/callback.h \
 128 @ENABLE_SIM_TRUE@       $(srcroot)/include/sim/sim.h
 129
 130 @SIM_ENABLE_HW_TRUE@am__append_2 = \
 131 @SIM_ENABLE_HW_TRUE@    $(SIM_COMMON_HW_OBJS) \
 132 @SIM_ENABLE_HW_TRUE@    $(SIM_HW_SOCKSER)
 133
 134 @SIM_ENABLE_HW_TRUE@am__append_3 = SIM_HW_DEVICES_="$(SIM_HW_DEVICES)"
 135 @SIM_ENABLE_IGEN_TRUE@am__append_4 = $(IGEN)
 136 @SIM_ENABLE_IGEN_TRUE@am__append_5 = igen/libigen.a
 137 @SIM_ENABLE_IGEN_TRUE@am__append_6 = $(igen_IGEN_TOOLS)
 138 @SIM_ENABLE_IGEN_TRUE@am__append_7 = $(igen_IGEN_TOOLS)
 139 TESTS = testsuite/common/bits32m0$(EXEEXT) \
 140         testsuite/common/bits32m31$(EXEEXT) \
 141         testsuite/common/bits64m0$(EXEEXT) \
 142         testsuite/common/bits64m63$(EXEEXT) \
 143         testsuite/common/alu-tst$(EXEEXT)
 144 @SIM_ENABLE_ARCH_aarch64_TRUE@am__append_8 = aarch64/libsim.a
 145 @SIM_ENABLE_ARCH_aarch64_TRUE@am__append_9 = aarch64/run
 146 @SIM_ENABLE_ARCH_arm_TRUE@am__append_10 = arm/libsim.a
 147 @SIM_ENABLE_ARCH_arm_TRUE@am__append_11 = arm/run
 148 @SIM_ENABLE_ARCH_avr_TRUE@am__append_12 = avr/libsim.a
 149 @SIM_ENABLE_ARCH_avr_TRUE@am__append_13 = avr/run
 150 @SIM_ENABLE_ARCH_bfin_TRUE@am__append_14 = bfin/libsim.a
 151 @SIM_ENABLE_ARCH_bfin_TRUE@am__append_15 = bfin/run
 152 @SIM_ENABLE_ARCH_bfin_TRUE@am__append_16 = bfin_SIM_EXTRA_HW_DEVICES="$(bfin_SIM_EXTRA_HW_DEVICES)"
 153 @SIM_ENABLE_ARCH_bpf_TRUE@am__append_17 = bpf/libsim.a
 154 @SIM_ENABLE_ARCH_bpf_TRUE@am__append_18 = bpf/run
 155 @SIM_ENABLE_ARCH_bpf_TRUE@am__append_19 = \
 156 @SIM_ENABLE_ARCH_bpf_TRUE@      bpf/eng-le.h \
 157 @SIM_ENABLE_ARCH_bpf_TRUE@      bpf/eng-be.h
 158
 159 @SIM_ENABLE_ARCH_bpf_TRUE@am__append_20 = $(bpf_BUILD_OUTPUTS)
 160 @SIM_ENABLE_ARCH_bpf_TRUE@am__append_21 = $(bpf_BUILD_OUTPUTS)
 161 @SIM_ENABLE_ARCH_cr16_TRUE@am__append_22 = cr16/libsim.a
 162 @SIM_ENABLE_ARCH_cr16_TRUE@am__append_23 = cr16/run
 163 @SIM_ENABLE_ARCH_cr16_TRUE@am__append_24 = cr16/simops.h
 164 @SIM_ENABLE_ARCH_cr16_TRUE@am__append_25 = $(cr16_BUILD_OUTPUTS)
 165 @SIM_ENABLE_ARCH_cr16_TRUE@am__append_26 = cr16/gencode
 166 @SIM_ENABLE_ARCH_cr16_TRUE@am__append_27 = $(cr16_BUILD_OUTPUTS)
 167 @SIM_ENABLE_ARCH_cris_TRUE@am__append_28 = cris/libsim.a
 168 @SIM_ENABLE_ARCH_cris_TRUE@am__append_29 = cris/run
 169 @SIM_ENABLE_ARCH_cris_TRUE@am__append_30 = cris_SIM_EXTRA_HW_DEVICES="$(cris_SIM_EXTRA_HW_DEVICES)"
 170 @SIM_ENABLE_ARCH_cris_TRUE@am__append_31 = cris/rvdummy
 171 @SIM_ENABLE_ARCH_cris_TRUE@am__append_32 = \
 172 @SIM_ENABLE_ARCH_cris_TRUE@     cris/engv10.h \
 173 @SIM_ENABLE_ARCH_cris_TRUE@     cris/engv32.h
 174
 175 @SIM_ENABLE_ARCH_cris_TRUE@am__append_33 = $(cris_BUILD_OUTPUTS)
 176 @SIM_ENABLE_ARCH_cris_TRUE@am__append_34 = $(cris_BUILD_OUTPUTS)
 177 @SIM_ENABLE_ARCH_d10v_TRUE@am__append_35 = d10v/libsim.a
 178 @SIM_ENABLE_ARCH_d10v_TRUE@am__append_36 = d10v/run
 179 @SIM_ENABLE_ARCH_d10v_TRUE@am__append_37 = d10v/simops.h
 180 @SIM_ENABLE_ARCH_d10v_TRUE@am__append_38 = $(d10v_BUILD_OUTPUTS)
 181 @SIM_ENABLE_ARCH_d10v_TRUE@am__append_39 = d10v/gencode
 182 @SIM_ENABLE_ARCH_d10v_TRUE@am__append_40 = $(d10v_BUILD_OUTPUTS)
 183 @SIM_ENABLE_ARCH_erc32_TRUE@am__append_41 = erc32/libsim.a
 184 @SIM_ENABLE_ARCH_erc32_TRUE@am__append_42 = erc32/run erc32/sis
 185 @SIM_ENABLE_ARCH_erc32_TRUE@am__append_43 = sim-%D-install-exec-local
 186 @SIM_ENABLE_ARCH_erc32_TRUE@am__append_44 = sim-erc32-uninstall-local
 187 @SIM_ENABLE_ARCH_examples_TRUE@am__append_45 = example-synacor/libsim.a
 188 @SIM_ENABLE_ARCH_examples_TRUE@am__append_46 = example-synacor/run
 189 @SIM_ENABLE_ARCH_frv_TRUE@am__append_47 = frv/libsim.a
 190 @SIM_ENABLE_ARCH_frv_TRUE@am__append_48 = frv/run
 191 @SIM_ENABLE_ARCH_frv_TRUE@am__append_49 = frv/eng.h
 192 @SIM_ENABLE_ARCH_frv_TRUE@am__append_50 = $(frv_BUILD_OUTPUTS)
 193 @SIM_ENABLE_ARCH_frv_TRUE@am__append_51 = $(frv_BUILD_OUTPUTS)
 194 @SIM_ENABLE_ARCH_ft32_TRUE@am__append_52 = ft32/libsim.a
 195 @SIM_ENABLE_ARCH_ft32_TRUE@am__append_53 = ft32/run
 196 @SIM_ENABLE_ARCH_h8300_TRUE@am__append_54 = h8300/libsim.a
 197 @SIM_ENABLE_ARCH_h8300_TRUE@am__append_55 = h8300/run
 198 @SIM_ENABLE_ARCH_iq2000_TRUE@am__append_56 = iq2000/libsim.a
 199 @SIM_ENABLE_ARCH_iq2000_TRUE@am__append_57 = iq2000/run
 200 @SIM_ENABLE_ARCH_iq2000_TRUE@am__append_58 = iq2000/eng.h
 201 @SIM_ENABLE_ARCH_iq2000_TRUE@am__append_59 = $(iq2000_BUILD_OUTPUTS)
 202 @SIM_ENABLE_ARCH_iq2000_TRUE@am__append_60 = $(iq2000_BUILD_OUTPUTS)
 203 @SIM_ENABLE_ARCH_lm32_TRUE@am__append_61 = lm32/libsim.a
 204 @SIM_ENABLE_ARCH_lm32_TRUE@am__append_62 = lm32/run
 205 @SIM_ENABLE_ARCH_lm32_TRUE@am__append_63 = lm32_SIM_EXTRA_HW_DEVICES="$(lm32_SIM_EXTRA_HW_DEVICES)"
 206 @SIM_ENABLE_ARCH_lm32_TRUE@am__append_64 = lm32/eng.h
 207 @SIM_ENABLE_ARCH_lm32_TRUE@am__append_65 = $(lm32_BUILD_OUTPUTS)
 208 @SIM_ENABLE_ARCH_lm32_TRUE@am__append_66 = $(lm32_BUILD_OUTPUTS)
 209 @SIM_ENABLE_ARCH_m32c_TRUE@am__append_67 = m32c/libsim.a
 210 @SIM_ENABLE_ARCH_m32c_TRUE@am__append_68 = m32c/run
 211 @SIM_ENABLE_ARCH_m32c_TRUE@am__append_69 = $(m32c_BUILD_OUTPUTS)
 212 @SIM_ENABLE_ARCH_m32c_TRUE@am__append_70 = m32c/opc2c
 213 @SIM_ENABLE_ARCH_m32c_TRUE@am__append_71 = \
 214 @SIM_ENABLE_ARCH_m32c_TRUE@     $(m32c_BUILD_OUTPUTS) \
 215 @SIM_ENABLE_ARCH_m32c_TRUE@     m32c/m32c.c.log \
 216 @SIM_ENABLE_ARCH_m32c_TRUE@     m32c/r8c.c.log
 217
 218 @SIM_ENABLE_ARCH_m32r_TRUE@am__append_72 = m32r/libsim.a
 219 @SIM_ENABLE_ARCH_m32r_TRUE@am__append_73 = m32r/run
 220 @SIM_ENABLE_ARCH_m32r_TRUE@am__append_74 = m32r_SIM_EXTRA_HW_DEVICES="$(m32r_SIM_EXTRA_HW_DEVICES)"
 221 @SIM_ENABLE_ARCH_m32r_TRUE@am__append_75 = \
 222 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/eng.h \
 223 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/engx.h \
 224 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/eng2.h
 225
 226 @SIM_ENABLE_ARCH_m32r_TRUE@am__append_76 = $(m32r_BUILD_OUTPUTS)
 227 @SIM_ENABLE_ARCH_m32r_TRUE@am__append_77 = $(m32r_BUILD_OUTPUTS)
 228 @SIM_ENABLE_ARCH_m68hc11_TRUE@am__append_78 = m68hc11/libsim.a
 229 @SIM_ENABLE_ARCH_m68hc11_TRUE@am__append_79 = m68hc11/run
 230 @SIM_ENABLE_ARCH_m68hc11_TRUE@am__append_80 = m68hc11_SIM_EXTRA_HW_DEVICES="$(m68hc11_SIM_EXTRA_HW_DEVICES)"
 231 @SIM_ENABLE_ARCH_m68hc11_TRUE@am__append_81 = $(m68hc11_BUILD_OUTPUTS)
 232 @SIM_ENABLE_ARCH_m68hc11_TRUE@am__append_82 = m68hc11/gencode
 233 @SIM_ENABLE_ARCH_m68hc11_TRUE@am__append_83 = $(m68hc11_BUILD_OUTPUTS)
 234 @SIM_ENABLE_ARCH_mcore_TRUE@am__append_84 = mcore/libsim.a
 235 @SIM_ENABLE_ARCH_mcore_TRUE@am__append_85 = mcore/run
 236 @SIM_ENABLE_ARCH_microblaze_TRUE@am__append_86 = microblaze/libsim.a
 237 @SIM_ENABLE_ARCH_microblaze_TRUE@am__append_87 = microblaze/run
 238 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_SINGLE_TRUE@am__append_88 = \
 239 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_SINGLE_TRUE@      mips/support.o \
 240 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_SINGLE_TRUE@      mips/itable.o \
 241 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_SINGLE_TRUE@      mips/semantics.o \
 242 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_SINGLE_TRUE@      mips/idecode.o \
 243 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_SINGLE_TRUE@      mips/icache.o \
 244 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_SINGLE_TRUE@      mips/engine.o \
 245 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_SINGLE_TRUE@      mips/irun.o
 246
 247 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@am__append_89 = \
 248 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@ mips/m16_support.o \
 249 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@ mips/m16_semantics.o \
 250 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@ mips/m16_idecode.o \
 251 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@ mips/m16_icache.o \
 252 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@ \
 253 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@ mips/m32_support.o \
 254 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@ mips/m32_semantics.o \
 255 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@ mips/m32_idecode.o \
 256 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@ mips/m32_icache.o \
 257 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@ \
 258 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@ mips/itable.o \
 259 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@ mips/m16run.o
 260
 261 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_MULTI_TRUE@am__append_90 = \
 262 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_MULTI_TRUE@       $(SIM_MIPS_MULTI_OBJ) \
 263 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_MULTI_TRUE@       mips/itable.o \
 264 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_MULTI_TRUE@       mips/multi-run.o
 265
 266 @SIM_ENABLE_ARCH_mips_TRUE@am__append_91 = mips/libsim.a
 267 @SIM_ENABLE_ARCH_mips_TRUE@am__append_92 = mips/run
 268 @SIM_ENABLE_ARCH_mips_TRUE@am__append_93 = mips_SIM_EXTRA_HW_DEVICES="$(mips_SIM_EXTRA_HW_DEVICES)"
 269 @SIM_ENABLE_ARCH_mips_TRUE@am__append_94 = mips/itable.h \
 270 @SIM_ENABLE_ARCH_mips_TRUE@     $(SIM_MIPS_MULTI_SRC)
 271 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_SINGLE_TRUE@am__append_95 = \
 272 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_SINGLE_TRUE@      $(mips_BUILT_SRC_FROM_GEN_MODE_SINGLE) \
 273 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_SINGLE_TRUE@      mips/stamp-gen-mode-single
 274
 275 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@am__append_96 = \
 276 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@ $(mips_BUILT_SRC_FROM_GEN_MODE_M16_M16) \
 277 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@ $(mips_BUILT_SRC_FROM_GEN_MODE_M16_M32) \
 278 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@ mips/stamp-gen-mode-m16-m16 \
 279 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@ mips/stamp-gen-mode-m16-m32
 280
 281 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_MULTI_TRUE@am__append_97 = \
 282 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_MULTI_TRUE@       $(SIM_MIPS_MULTI_SRC) \
 283 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_MULTI_TRUE@       mips/stamp-gen-mode-multi-igen \
 284 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_MULTI_TRUE@       mips/stamp-gen-mode-multi-run
 285
 286 @SIM_ENABLE_ARCH_mips_TRUE@am__append_98 = $(mips_BUILD_OUTPUTS)
 287 @SIM_ENABLE_ARCH_mips_TRUE@am__append_99 = $(mips_BUILD_OUTPUTS)
 288 @SIM_ENABLE_ARCH_mips_TRUE@am__append_100 = mips/multi-include.h mips/multi-run.c
 289 @SIM_ENABLE_ARCH_mn10300_TRUE@am__append_101 = mn10300/libsim.a
 290 @SIM_ENABLE_ARCH_mn10300_TRUE@am__append_102 = mn10300/run
 291 @SIM_ENABLE_ARCH_mn10300_TRUE@am__append_103 = mn10300_SIM_EXTRA_HW_DEVICES="$(mn10300_SIM_EXTRA_HW_DEVICES)"
 292 @SIM_ENABLE_ARCH_mn10300_TRUE@am__append_104 = \
 293 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/icache.h \
 294 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/idecode.h \
 295 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/semantics.h \
 296 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/model.h \
 297 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/support.h \
 298 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/itable.h \
 299 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/engine.h
 300
 301 @SIM_ENABLE_ARCH_mn10300_TRUE@am__append_105 = $(mn10300_BUILD_OUTPUTS)
 302 @SIM_ENABLE_ARCH_mn10300_TRUE@am__append_106 = $(mn10300_BUILD_OUTPUTS)
 303 @SIM_ENABLE_ARCH_moxie_TRUE@am__append_107 = moxie/libsim.a
 304 @SIM_ENABLE_ARCH_moxie_TRUE@am__append_108 = moxie/run
 305 @SIM_ENABLE_ARCH_msp430_TRUE@am__append_109 = msp430/libsim.a
 306 @SIM_ENABLE_ARCH_msp430_TRUE@am__append_110 = msp430/run
 307 @SIM_ENABLE_ARCH_or1k_TRUE@am__append_111 = or1k/libsim.a
 308 @SIM_ENABLE_ARCH_or1k_TRUE@am__append_112 = or1k/run
 309 @SIM_ENABLE_ARCH_or1k_TRUE@am__append_113 = or1k/eng.h
 310 @SIM_ENABLE_ARCH_or1k_TRUE@am__append_114 = $(or1k_BUILD_OUTPUTS)
 311 @SIM_ENABLE_ARCH_or1k_TRUE@am__append_115 = $(or1k_BUILD_OUTPUTS)
 312 @SIM_ENABLE_ARCH_ppc_TRUE@am__append_116 = ppc/run ppc/psim
 313 @SIM_ENABLE_ARCH_pru_TRUE@am__append_117 = pru/libsim.a
 314 @SIM_ENABLE_ARCH_pru_TRUE@am__append_118 = pru/run
 315 @SIM_ENABLE_ARCH_riscv_TRUE@am__append_119 = riscv/libsim.a
 316 @SIM_ENABLE_ARCH_riscv_TRUE@am__append_120 = riscv/run
 317 @SIM_ENABLE_ARCH_rl78_TRUE@am__append_121 = rl78/libsim.a
 318 @SIM_ENABLE_ARCH_rl78_TRUE@am__append_122 = rl78/run
 319 @SIM_ENABLE_ARCH_rx_TRUE@am__append_123 = rx/libsim.a
 320 @SIM_ENABLE_ARCH_rx_TRUE@am__append_124 = rx/run
 321 @SIM_ENABLE_ARCH_sh_TRUE@am__append_125 = sh/libsim.a
 322 @SIM_ENABLE_ARCH_sh_TRUE@am__append_126 = sh/run
 323 @SIM_ENABLE_ARCH_sh_TRUE@am__append_127 = \
 324 @SIM_ENABLE_ARCH_sh_TRUE@       sh/code.c \
 325 @SIM_ENABLE_ARCH_sh_TRUE@       sh/ppi.c
 326
 327 @SIM_ENABLE_ARCH_sh_TRUE@am__append_128 = $(sh_BUILD_OUTPUTS)
 328 @SIM_ENABLE_ARCH_sh_TRUE@am__append_129 = sh/gencode
 329 @SIM_ENABLE_ARCH_sh_TRUE@am__append_130 = $(sh_BUILD_OUTPUTS)
 330 @SIM_ENABLE_ARCH_v850_TRUE@am__append_131 = v850/libsim.a
 331 @SIM_ENABLE_ARCH_v850_TRUE@am__append_132 = v850/run
 332 @SIM_ENABLE_ARCH_v850_TRUE@am__append_133 = \
 333 @SIM_ENABLE_ARCH_v850_TRUE@     v850/icache.h \
 334 @SIM_ENABLE_ARCH_v850_TRUE@     v850/idecode.h \
 335 @SIM_ENABLE_ARCH_v850_TRUE@     v850/semantics.h \
 336 @SIM_ENABLE_ARCH_v850_TRUE@     v850/model.h \
 337 @SIM_ENABLE_ARCH_v850_TRUE@     v850/support.h \
 338 @SIM_ENABLE_ARCH_v850_TRUE@     v850/itable.h \
 339 @SIM_ENABLE_ARCH_v850_TRUE@     v850/engine.h
 340
 341 @SIM_ENABLE_ARCH_v850_TRUE@am__append_134 = $(v850_BUILD_OUTPUTS)
 342 @SIM_ENABLE_ARCH_v850_TRUE@am__append_135 = $(v850_BUILD_OUTPUTS)
 343 subdir = .
 344 ACLOCAL_M4 = $(top_srcdir)/aclocal.m4
 345 am__aclocal_m4_deps = $(top_srcdir)/../config/acx.m4 \
 346         $(top_srcdir)/../config/depstand.m4 \
 347         $(top_srcdir)/../config/lead-dot.m4 \
 348         $(top_srcdir)/../config/override.m4 \
 349         $(top_srcdir)/../config/pkg.m4 $(top_srcdir)/../libtool.m4 \
 350         $(top_srcdir)/../ltoptions.m4 $(top_srcdir)/../ltsugar.m4 \
 351         $(top_srcdir)/../ltversion.m4 $(top_srcdir)/../lt~obsolete.m4 \
 352         $(top_srcdir)/m4/sim_ac_option_alignment.m4 \
 353         $(top_srcdir)/m4/sim_ac_option_assert.m4 \
 354         $(top_srcdir)/m4/sim_ac_option_cgen_maint.m4 \
 355         $(top_srcdir)/m4/sim_ac_option_debug.m4 \
 356         $(top_srcdir)/m4/sim_ac_option_endian.m4 \
 357         $(top_srcdir)/m4/sim_ac_option_environment.m4 \
 358         $(top_srcdir)/m4/sim_ac_option_hardware.m4 \
 359         $(top_srcdir)/m4/sim_ac_option_inline.m4 \
 360         $(top_srcdir)/m4/sim_ac_option_profile.m4 \
 361         $(top_srcdir)/m4/sim_ac_option_reserved_bits.m4 \
 362         $(top_srcdir)/m4/sim_ac_option_scache.m4 \
 363         $(top_srcdir)/m4/sim_ac_option_smp.m4 \
 364         $(top_srcdir)/m4/sim_ac_option_stdio.m4 \
 365         $(top_srcdir)/m4/sim_ac_option_trace.m4 \
 366         $(top_srcdir)/m4/sim_ac_option_warnings.m4 \
 367         $(top_srcdir)/m4/sim_ac_platform.m4 \
 368         $(top_srcdir)/m4/sim_ac_toolchain.m4 \
 369         $(top_srcdir)/frv/acinclude.m4 $(top_srcdir)/mips/acinclude.m4 \
 370         $(top_srcdir)/riscv/acinclude.m4 $(top_srcdir)/rx/acinclude.m4 \
 371         $(top_srcdir)/configure.ac
 372 am__configure_deps = $(am__aclocal_m4_deps) $(CONFIGURE_DEPENDENCIES) \
 373         $(ACLOCAL_M4)
 374 DIST_COMMON = $(srcdir)/Makefile.am $(top_srcdir)/configure \
 375         $(am__configure_deps) $(am__pkginclude_HEADERS_DIST)
 376 am__CONFIG_DISTCLEAN_FILES = config.status config.cache config.log \
 377  configure.lineno config.status.lineno
 378 mkinstalldirs = $(SHELL) $(top_srcdir)/../mkinstalldirs
 379 CONFIG_HEADER = config.h
 380 CONFIG_CLEAN_FILES = Make-common.sim aarch64/Makefile.sim \
 381         aarch64/.gdbinit arm/Makefile.sim arm/.gdbinit \
 382         avr/Makefile.sim avr/.gdbinit bfin/Makefile.sim bfin/.gdbinit \
 383         bpf/Makefile.sim bpf/.gdbinit cr16/Makefile.sim cr16/.gdbinit \
 384         cris/Makefile.sim cris/.gdbinit d10v/Makefile.sim \
 385         d10v/.gdbinit frv/Makefile.sim frv/.gdbinit ft32/Makefile.sim \
 386         ft32/.gdbinit h8300/Makefile.sim h8300/.gdbinit \
 387         iq2000/Makefile.sim iq2000/.gdbinit lm32/Makefile.sim \
 388         lm32/.gdbinit m32c/Makefile.sim m32c/.gdbinit \
 389         m32r/Makefile.sim m32r/.gdbinit m68hc11/Makefile.sim \
 390         m68hc11/.gdbinit mcore/Makefile.sim mcore/.gdbinit \
 391         microblaze/Makefile.sim microblaze/.gdbinit mips/Makefile.sim \
 392         mips/.gdbinit mn10300/Makefile.sim mn10300/.gdbinit \
 393         moxie/Makefile.sim moxie/.gdbinit msp430/Makefile.sim \
 394         msp430/.gdbinit or1k/Makefile.sim or1k/.gdbinit ppc/.gdbinit \
 395         pru/Makefile.sim pru/.gdbinit riscv/Makefile.sim \
 396         riscv/.gdbinit rl78/Makefile.sim rl78/.gdbinit rx/Makefile.sim \
 397         rx/.gdbinit sh/Makefile.sim sh/.gdbinit erc32/Makefile.sim \
 398         erc32/.gdbinit v850/Makefile.sim v850/.gdbinit \
 399         example-synacor/Makefile.sim example-synacor/.gdbinit \
 400         arch-subdir.mk .gdbinit
 401 CONFIG_CLEAN_VPATH_FILES =
 402 LIBRARIES = $(noinst_LIBRARIES)
 403 ARFLAGS = cru
 404 AM_V_AR = $(am__v_AR_@AM_V@)
 405 am__v_AR_ = $(am__v_AR_@AM_DEFAULT_V@)
 406 am__v_AR_0 = @echo "  AR      " $@;
 407 am__v_AR_1 =
 408 aarch64_libsim_a_AR = $(AR) $(ARFLAGS)
 409 @SIM_ENABLE_ARCH_aarch64_TRUE@aarch64_libsim_a_DEPENDENCIES =  \
 410 @SIM_ENABLE_ARCH_aarch64_TRUE@  $(patsubst \
 411 @SIM_ENABLE_ARCH_aarch64_TRUE@  %,aarch64/%,$(SIM_NEW_COMMON_OBJS)) \
 412 @SIM_ENABLE_ARCH_aarch64_TRUE@  $(patsubst \
 413 @SIM_ENABLE_ARCH_aarch64_TRUE@  %,aarch64/dv-%.o,$(SIM_HW_DEVICES)) \
 414 @SIM_ENABLE_ARCH_aarch64_TRUE@  aarch64/cpustate.o \
 415 @SIM_ENABLE_ARCH_aarch64_TRUE@  aarch64/interp.o \
 416 @SIM_ENABLE_ARCH_aarch64_TRUE@  aarch64/memory.o \
 417 @SIM_ENABLE_ARCH_aarch64_TRUE@  aarch64/modules.o \
 418 @SIM_ENABLE_ARCH_aarch64_TRUE@  aarch64/sim-resume.o \
 419 @SIM_ENABLE_ARCH_aarch64_TRUE@  aarch64/simulator.o
 420 am_aarch64_libsim_a_OBJECTS =
 421 aarch64_libsim_a_OBJECTS = $(am_aarch64_libsim_a_OBJECTS)
 422 am__dirstamp = $(am__leading_dot)dirstamp
 423 arm_libsim_a_AR = $(AR) $(ARFLAGS)
 424 @SIM_ENABLE_ARCH_arm_TRUE@arm_libsim_a_DEPENDENCIES = arm/wrapper.o \
 425 @SIM_ENABLE_ARCH_arm_TRUE@      $(patsubst \
 426 @SIM_ENABLE_ARCH_arm_TRUE@      %,arm/%,$(SIM_NEW_COMMON_OBJS)) \
 427 @SIM_ENABLE_ARCH_arm_TRUE@      $(patsubst \
 428 @SIM_ENABLE_ARCH_arm_TRUE@      %,arm/dv-%.o,$(SIM_HW_DEVICES)) \
 429 @SIM_ENABLE_ARCH_arm_TRUE@      arm/armemu.o arm/armemu32.o \
 430 @SIM_ENABLE_ARCH_arm_TRUE@      arm/arminit.o arm/armos.o \
 431 @SIM_ENABLE_ARCH_arm_TRUE@      arm/armsupp.o arm/armvirt.o \
 432 @SIM_ENABLE_ARCH_arm_TRUE@      arm/thumbemu.o arm/armcopro.o \
 433 @SIM_ENABLE_ARCH_arm_TRUE@      arm/maverick.o arm/iwmmxt.o \
 434 @SIM_ENABLE_ARCH_arm_TRUE@      arm/modules.o
 435 am_arm_libsim_a_OBJECTS =
 436 arm_libsim_a_OBJECTS = $(am_arm_libsim_a_OBJECTS)
 437 avr_libsim_a_AR = $(AR) $(ARFLAGS)
 438 @SIM_ENABLE_ARCH_avr_TRUE@avr_libsim_a_DEPENDENCIES = avr/interp.o \
 439 @SIM_ENABLE_ARCH_avr_TRUE@      $(patsubst \
 440 @SIM_ENABLE_ARCH_avr_TRUE@      %,avr/%,$(SIM_NEW_COMMON_OBJS)) \
 441 @SIM_ENABLE_ARCH_avr_TRUE@      $(patsubst \
 442 @SIM_ENABLE_ARCH_avr_TRUE@      %,avr/dv-%.o,$(SIM_HW_DEVICES)) \
 443 @SIM_ENABLE_ARCH_avr_TRUE@      avr/modules.o avr/sim-resume.o
 444 am_avr_libsim_a_OBJECTS =
 445 avr_libsim_a_OBJECTS = $(am_avr_libsim_a_OBJECTS)
 446 bfin_libsim_a_AR = $(AR) $(ARFLAGS)
 447 @SIM_ENABLE_ARCH_bfin_TRUE@bfin_libsim_a_DEPENDENCIES = $(patsubst \
 448 @SIM_ENABLE_ARCH_bfin_TRUE@     %,bfin/%,$(SIM_NEW_COMMON_OBJS)) \
 449 @SIM_ENABLE_ARCH_bfin_TRUE@     $(patsubst \
 450 @SIM_ENABLE_ARCH_bfin_TRUE@     %,bfin/dv-%.o,$(SIM_HW_DEVICES)) \
 451 @SIM_ENABLE_ARCH_bfin_TRUE@     $(patsubst \
 452 @SIM_ENABLE_ARCH_bfin_TRUE@     %,bfin/dv-%.o,$(bfin_SIM_EXTRA_HW_DEVICES)) \
 453 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin/bfin-sim.o bfin/devices.o \
 454 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin/gui.o bfin/interp.o \
 455 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin/machs.o bfin/modules.o \
 456 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin/sim-resume.o
 457 am_bfin_libsim_a_OBJECTS =
 458 bfin_libsim_a_OBJECTS = $(am_bfin_libsim_a_OBJECTS)
 459 bpf_libsim_a_AR = $(AR) $(ARFLAGS)
 460 @SIM_ENABLE_ARCH_bpf_TRUE@bpf_libsim_a_DEPENDENCIES = $(patsubst \
 461 @SIM_ENABLE_ARCH_bpf_TRUE@      %,bpf/%,$(SIM_NEW_COMMON_OBJS)) \
 462 @SIM_ENABLE_ARCH_bpf_TRUE@      $(patsubst \
 463 @SIM_ENABLE_ARCH_bpf_TRUE@      %,bpf/dv-%.o,$(SIM_HW_DEVICES)) \
 464 @SIM_ENABLE_ARCH_bpf_TRUE@      bpf/modules.o bpf/cgen-run.o \
 465 @SIM_ENABLE_ARCH_bpf_TRUE@      bpf/cgen-scache.o bpf/cgen-trace.o \
 466 @SIM_ENABLE_ARCH_bpf_TRUE@      bpf/cgen-utils.o bpf/arch.o \
 467 @SIM_ENABLE_ARCH_bpf_TRUE@      bpf/cpu.o bpf/decode-le.o \
 468 @SIM_ENABLE_ARCH_bpf_TRUE@      bpf/decode-be.o bpf/sem-le.o \
 469 @SIM_ENABLE_ARCH_bpf_TRUE@      bpf/sem-be.o bpf/mloop-le.o \
 470 @SIM_ENABLE_ARCH_bpf_TRUE@      bpf/mloop-be.o bpf/bpf.o \
 471 @SIM_ENABLE_ARCH_bpf_TRUE@      bpf/bpf-helpers.o bpf/sim-if.o \
 472 @SIM_ENABLE_ARCH_bpf_TRUE@      bpf/traps.o
 473 am_bpf_libsim_a_OBJECTS =
 474 bpf_libsim_a_OBJECTS = $(am_bpf_libsim_a_OBJECTS)
 475 common_libcommon_a_AR = $(AR) $(ARFLAGS)
 476 common_libcommon_a_LIBADD =
 477 am_common_libcommon_a_OBJECTS = common/callback.$(OBJEXT) \
 478         common/portability.$(OBJEXT) common/sim-load.$(OBJEXT) \
 479         common/syscall.$(OBJEXT) common/target-newlib-errno.$(OBJEXT) \
 480         common/target-newlib-open.$(OBJEXT) \
 481         common/target-newlib-signal.$(OBJEXT) \
 482         common/target-newlib-syscall.$(OBJEXT) \
 483         common/version.$(OBJEXT)
 484 common_libcommon_a_OBJECTS = $(am_common_libcommon_a_OBJECTS)
 485 cr16_libsim_a_AR = $(AR) $(ARFLAGS)
 486 @SIM_ENABLE_ARCH_cr16_TRUE@cr16_libsim_a_DEPENDENCIES =  \
 487 @SIM_ENABLE_ARCH_cr16_TRUE@     $(common_libcommon_a_OBJECTS) \
 488 @SIM_ENABLE_ARCH_cr16_TRUE@     $(patsubst \
 489 @SIM_ENABLE_ARCH_cr16_TRUE@     %,cr16/%,$(SIM_NEW_COMMON_OBJS)) \
 490 @SIM_ENABLE_ARCH_cr16_TRUE@     $(patsubst \
 491 @SIM_ENABLE_ARCH_cr16_TRUE@     %,cr16/dv-%.o,$(SIM_HW_DEVICES)) \
 492 @SIM_ENABLE_ARCH_cr16_TRUE@     cr16/interp.o cr16/modules.o \
 493 @SIM_ENABLE_ARCH_cr16_TRUE@     cr16/sim-resume.o cr16/simops.o \
 494 @SIM_ENABLE_ARCH_cr16_TRUE@     cr16/table.o
 495 am_cr16_libsim_a_OBJECTS =
 496 cr16_libsim_a_OBJECTS = $(am_cr16_libsim_a_OBJECTS)
 497 cris_libsim_a_AR = $(AR) $(ARFLAGS)
 498 @SIM_ENABLE_ARCH_cris_TRUE@cris_libsim_a_DEPENDENCIES =  \
 499 @SIM_ENABLE_ARCH_cris_TRUE@     $(common_libcommon_a_OBJECTS) \
 500 @SIM_ENABLE_ARCH_cris_TRUE@     $(patsubst \
 501 @SIM_ENABLE_ARCH_cris_TRUE@     %,cris/%,$(SIM_NEW_COMMON_OBJS)) \
 502 @SIM_ENABLE_ARCH_cris_TRUE@     $(patsubst \
 503 @SIM_ENABLE_ARCH_cris_TRUE@     %,cris/dv-%.o,$(SIM_HW_DEVICES)) \
 504 @SIM_ENABLE_ARCH_cris_TRUE@     $(patsubst \
 505 @SIM_ENABLE_ARCH_cris_TRUE@     %,cris/dv-%.o,$(cris_SIM_EXTRA_HW_DEVICES)) \
 506 @SIM_ENABLE_ARCH_cris_TRUE@     cris/modules.o cris/cgen-run.o \
 507 @SIM_ENABLE_ARCH_cris_TRUE@     cris/cgen-scache.o \
 508 @SIM_ENABLE_ARCH_cris_TRUE@     cris/cgen-trace.o cris/cgen-utils.o \
 509 @SIM_ENABLE_ARCH_cris_TRUE@     cris/arch.o cris/crisv10f.o \
 510 @SIM_ENABLE_ARCH_cris_TRUE@     cris/cpuv10.o cris/decodev10.o \
 511 @SIM_ENABLE_ARCH_cris_TRUE@     cris/modelv10.o cris/mloopv10f.o \
 512 @SIM_ENABLE_ARCH_cris_TRUE@     cris/crisv32f.o cris/cpuv32.o \
 513 @SIM_ENABLE_ARCH_cris_TRUE@     cris/decodev32.o cris/modelv32.o \
 514 @SIM_ENABLE_ARCH_cris_TRUE@     cris/mloopv32f.o cris/sim-if.o \
 515 @SIM_ENABLE_ARCH_cris_TRUE@     cris/traps.o
 516 am_cris_libsim_a_OBJECTS =
 517 cris_libsim_a_OBJECTS = $(am_cris_libsim_a_OBJECTS)
 518 d10v_libsim_a_AR = $(AR) $(ARFLAGS)
 519 @SIM_ENABLE_ARCH_d10v_TRUE@d10v_libsim_a_DEPENDENCIES =  \
 520 @SIM_ENABLE_ARCH_d10v_TRUE@     $(common_libcommon_a_OBJECTS) \
 521 @SIM_ENABLE_ARCH_d10v_TRUE@     d10v/interp.o $(patsubst \
 522 @SIM_ENABLE_ARCH_d10v_TRUE@     %,d10v/%,$(SIM_NEW_COMMON_OBJS)) \
 523 @SIM_ENABLE_ARCH_d10v_TRUE@     $(patsubst \
 524 @SIM_ENABLE_ARCH_d10v_TRUE@     %,d10v/dv-%.o,$(SIM_HW_DEVICES)) \
 525 @SIM_ENABLE_ARCH_d10v_TRUE@     d10v/endian.o d10v/modules.o \
 526 @SIM_ENABLE_ARCH_d10v_TRUE@     d10v/sim-resume.o d10v/simops.o \
 527 @SIM_ENABLE_ARCH_d10v_TRUE@     d10v/table.o
 528 am_d10v_libsim_a_OBJECTS =
 529 d10v_libsim_a_OBJECTS = $(am_d10v_libsim_a_OBJECTS)
 530 erc32_libsim_a_AR = $(AR) $(ARFLAGS)
 531 @SIM_ENABLE_ARCH_erc32_TRUE@erc32_libsim_a_DEPENDENCIES =  \
 532 @SIM_ENABLE_ARCH_erc32_TRUE@    $(common_libcommon_a_OBJECTS) \
 533 @SIM_ENABLE_ARCH_erc32_TRUE@    erc32/erc32.o erc32/exec.o \
 534 @SIM_ENABLE_ARCH_erc32_TRUE@    erc32/float.o erc32/func.o \
 535 @SIM_ENABLE_ARCH_erc32_TRUE@    erc32/help.o erc32/interf.o \
 536 @SIM_ENABLE_ARCH_erc32_TRUE@    erc32/modules.o
 537 am_erc32_libsim_a_OBJECTS =
 538 erc32_libsim_a_OBJECTS = $(am_erc32_libsim_a_OBJECTS)
 539 example_synacor_libsim_a_AR = $(AR) $(ARFLAGS)
 540 @SIM_ENABLE_ARCH_examples_TRUE@example_synacor_libsim_a_DEPENDENCIES =  \
 541 @SIM_ENABLE_ARCH_examples_TRUE@ $(common_libcommon_a_OBJECTS) \
 542 @SIM_ENABLE_ARCH_examples_TRUE@ $(patsubst \
 543 @SIM_ENABLE_ARCH_examples_TRUE@ %,example-synacor/%,$(SIM_NEW_COMMON_OBJS)) \
 544 @SIM_ENABLE_ARCH_examples_TRUE@ $(patsubst \
 545 @SIM_ENABLE_ARCH_examples_TRUE@ %,example-synacor/dv-%.o,$(SIM_HW_DEVICES)) \
 546 @SIM_ENABLE_ARCH_examples_TRUE@ example-synacor/interp.o \
 547 @SIM_ENABLE_ARCH_examples_TRUE@ example-synacor/modules.o \
 548 @SIM_ENABLE_ARCH_examples_TRUE@ example-synacor/sim-main.o \
 549 @SIM_ENABLE_ARCH_examples_TRUE@ example-synacor/sim-resume.o
 550 am_example_synacor_libsim_a_OBJECTS =
 551 example_synacor_libsim_a_OBJECTS =  \
 552         $(am_example_synacor_libsim_a_OBJECTS)
 553 frv_libsim_a_AR = $(AR) $(ARFLAGS)
 554 @SIM_ENABLE_ARCH_frv_TRUE@frv_libsim_a_DEPENDENCIES =  \
 555 @SIM_ENABLE_ARCH_frv_TRUE@      $(common_libcommon_a_OBJECTS) \
 556 @SIM_ENABLE_ARCH_frv_TRUE@      $(patsubst \
 557 @SIM_ENABLE_ARCH_frv_TRUE@      %,frv/%,$(SIM_NEW_COMMON_OBJS)) \
 558 @SIM_ENABLE_ARCH_frv_TRUE@      $(patsubst \
 559 @SIM_ENABLE_ARCH_frv_TRUE@      %,frv/dv-%.o,$(SIM_HW_DEVICES)) \
 560 @SIM_ENABLE_ARCH_frv_TRUE@      frv/modules.o frv/cgen-accfp.o \
 561 @SIM_ENABLE_ARCH_frv_TRUE@      frv/cgen-fpu.o frv/cgen-run.o \
 562 @SIM_ENABLE_ARCH_frv_TRUE@      frv/cgen-scache.o frv/cgen-trace.o \
 563 @SIM_ENABLE_ARCH_frv_TRUE@      frv/cgen-utils.o frv/arch.o \
 564 @SIM_ENABLE_ARCH_frv_TRUE@      frv/cgen-par.o frv/cpu.o \
 565 @SIM_ENABLE_ARCH_frv_TRUE@      frv/decode.o frv/frv.o frv/mloop.o \
 566 @SIM_ENABLE_ARCH_frv_TRUE@      frv/model.o frv/sem.o frv/cache.o \
 567 @SIM_ENABLE_ARCH_frv_TRUE@      frv/interrupts.o frv/memory.o \
 568 @SIM_ENABLE_ARCH_frv_TRUE@      frv/options.o frv/pipeline.o \
 569 @SIM_ENABLE_ARCH_frv_TRUE@      frv/profile.o frv/profile-fr400.o \
 570 @SIM_ENABLE_ARCH_frv_TRUE@      frv/profile-fr450.o \
 571 @SIM_ENABLE_ARCH_frv_TRUE@      frv/profile-fr500.o \
 572 @SIM_ENABLE_ARCH_frv_TRUE@      frv/profile-fr550.o frv/registers.o \
 573 @SIM_ENABLE_ARCH_frv_TRUE@      frv/reset.o frv/sim-if.o frv/traps.o
 574 am_frv_libsim_a_OBJECTS =
 575 frv_libsim_a_OBJECTS = $(am_frv_libsim_a_OBJECTS)
 576 ft32_libsim_a_AR = $(AR) $(ARFLAGS)
 577 @SIM_ENABLE_ARCH_ft32_TRUE@ft32_libsim_a_DEPENDENCIES =  \
 578 @SIM_ENABLE_ARCH_ft32_TRUE@     $(common_libcommon_a_OBJECTS) \
 579 @SIM_ENABLE_ARCH_ft32_TRUE@     $(patsubst \
 580 @SIM_ENABLE_ARCH_ft32_TRUE@     %,ft32/%,$(SIM_NEW_COMMON_OBJS)) \
 581 @SIM_ENABLE_ARCH_ft32_TRUE@     $(patsubst \
 582 @SIM_ENABLE_ARCH_ft32_TRUE@     %,ft32/dv-%.o,$(SIM_HW_DEVICES)) \
 583 @SIM_ENABLE_ARCH_ft32_TRUE@     ft32/interp.o ft32/modules.o \
 584 @SIM_ENABLE_ARCH_ft32_TRUE@     ft32/sim-resume.o
 585 am_ft32_libsim_a_OBJECTS =
 586 ft32_libsim_a_OBJECTS = $(am_ft32_libsim_a_OBJECTS)
 587 h8300_libsim_a_AR = $(AR) $(ARFLAGS)
 588 @SIM_ENABLE_ARCH_h8300_TRUE@h8300_libsim_a_DEPENDENCIES =  \
 589 @SIM_ENABLE_ARCH_h8300_TRUE@    $(common_libcommon_a_OBJECTS) \
 590 @SIM_ENABLE_ARCH_h8300_TRUE@    h8300/compile.o $(patsubst \
 591 @SIM_ENABLE_ARCH_h8300_TRUE@    %,h8300/%,$(SIM_NEW_COMMON_OBJS)) \
 592 @SIM_ENABLE_ARCH_h8300_TRUE@    $(patsubst \
 593 @SIM_ENABLE_ARCH_h8300_TRUE@    %,h8300/dv-%.o,$(SIM_HW_DEVICES)) \
 594 @SIM_ENABLE_ARCH_h8300_TRUE@    h8300/modules.o h8300/sim-resume.o
 595 am_h8300_libsim_a_OBJECTS =
 596 h8300_libsim_a_OBJECTS = $(am_h8300_libsim_a_OBJECTS)
 597 igen_libigen_a_AR = $(AR) $(ARFLAGS)
 598 igen_libigen_a_LIBADD =
 599 @SIM_ENABLE_IGEN_TRUE@am_igen_libigen_a_OBJECTS =  \
 600 @SIM_ENABLE_IGEN_TRUE@  igen/table.$(OBJEXT) igen/lf.$(OBJEXT) \
 601 @SIM_ENABLE_IGEN_TRUE@  igen/misc.$(OBJEXT) \
 602 @SIM_ENABLE_IGEN_TRUE@  igen/filter_host.$(OBJEXT) \
 603 @SIM_ENABLE_IGEN_TRUE@  igen/ld-decode.$(OBJEXT) \
 604 @SIM_ENABLE_IGEN_TRUE@  igen/ld-cache.$(OBJEXT) \
 605 @SIM_ENABLE_IGEN_TRUE@  igen/filter.$(OBJEXT) \
 606 @SIM_ENABLE_IGEN_TRUE@  igen/ld-insn.$(OBJEXT) \
 607 @SIM_ENABLE_IGEN_TRUE@  igen/gen-model.$(OBJEXT) \
 608 @SIM_ENABLE_IGEN_TRUE@  igen/gen-itable.$(OBJEXT) \
 609 @SIM_ENABLE_IGEN_TRUE@  igen/gen-icache.$(OBJEXT) \
 610 @SIM_ENABLE_IGEN_TRUE@  igen/gen-semantics.$(OBJEXT) \
 611 @SIM_ENABLE_IGEN_TRUE@  igen/gen-idecode.$(OBJEXT) \
 612 @SIM_ENABLE_IGEN_TRUE@  igen/gen-support.$(OBJEXT) \
 613 @SIM_ENABLE_IGEN_TRUE@  igen/gen-engine.$(OBJEXT) \
 614 @SIM_ENABLE_IGEN_TRUE@  igen/gen.$(OBJEXT)
 615 igen_libigen_a_OBJECTS = $(am_igen_libigen_a_OBJECTS)
 616 iq2000_libsim_a_AR = $(AR) $(ARFLAGS)
 617 @SIM_ENABLE_ARCH_iq2000_TRUE@iq2000_libsim_a_DEPENDENCIES =  \
 618 @SIM_ENABLE_ARCH_iq2000_TRUE@   $(common_libcommon_a_OBJECTS) \
 619 @SIM_ENABLE_ARCH_iq2000_TRUE@   $(patsubst \
 620 @SIM_ENABLE_ARCH_iq2000_TRUE@   %,iq2000/%,$(SIM_NEW_COMMON_OBJS)) \
 621 @SIM_ENABLE_ARCH_iq2000_TRUE@   $(patsubst \
 622 @SIM_ENABLE_ARCH_iq2000_TRUE@   %,iq2000/dv-%.o,$(SIM_HW_DEVICES)) \
 623 @SIM_ENABLE_ARCH_iq2000_TRUE@   iq2000/modules.o \
 624 @SIM_ENABLE_ARCH_iq2000_TRUE@   iq2000/cgen-run.o \
 625 @SIM_ENABLE_ARCH_iq2000_TRUE@   iq2000/cgen-scache.o \
 626 @SIM_ENABLE_ARCH_iq2000_TRUE@   iq2000/cgen-trace.o \
 627 @SIM_ENABLE_ARCH_iq2000_TRUE@   iq2000/cgen-utils.o iq2000/arch.o \
 628 @SIM_ENABLE_ARCH_iq2000_TRUE@   iq2000/cpu.o iq2000/decode.o \
 629 @SIM_ENABLE_ARCH_iq2000_TRUE@   iq2000/iq2000.o iq2000/sem.o \
 630 @SIM_ENABLE_ARCH_iq2000_TRUE@   iq2000/mloop.o iq2000/model.o \
 631 @SIM_ENABLE_ARCH_iq2000_TRUE@   iq2000/sim-if.o
 632 am_iq2000_libsim_a_OBJECTS =
 633 iq2000_libsim_a_OBJECTS = $(am_iq2000_libsim_a_OBJECTS)
 634 lm32_libsim_a_AR = $(AR) $(ARFLAGS)
 635 @SIM_ENABLE_ARCH_lm32_TRUE@lm32_libsim_a_DEPENDENCIES =  \
 636 @SIM_ENABLE_ARCH_lm32_TRUE@     $(common_libcommon_a_OBJECTS) \
 637 @SIM_ENABLE_ARCH_lm32_TRUE@     $(patsubst \
 638 @SIM_ENABLE_ARCH_lm32_TRUE@     %,lm32/%,$(SIM_NEW_COMMON_OBJS)) \
 639 @SIM_ENABLE_ARCH_lm32_TRUE@     $(patsubst \
 640 @SIM_ENABLE_ARCH_lm32_TRUE@     %,lm32/dv-%.o,$(SIM_HW_DEVICES)) \
 641 @SIM_ENABLE_ARCH_lm32_TRUE@     $(patsubst \
 642 @SIM_ENABLE_ARCH_lm32_TRUE@     %,lm32/dv-%.o,$(lm32_SIM_EXTRA_HW_DEVICES)) \
 643 @SIM_ENABLE_ARCH_lm32_TRUE@     lm32/modules.o lm32/cgen-run.o \
 644 @SIM_ENABLE_ARCH_lm32_TRUE@     lm32/cgen-scache.o \
 645 @SIM_ENABLE_ARCH_lm32_TRUE@     lm32/cgen-trace.o lm32/cgen-utils.o \
 646 @SIM_ENABLE_ARCH_lm32_TRUE@     lm32/arch.o lm32/cpu.o \
 647 @SIM_ENABLE_ARCH_lm32_TRUE@     lm32/decode.o lm32/sem.o \
 648 @SIM_ENABLE_ARCH_lm32_TRUE@     lm32/mloop.o lm32/model.o \
 649 @SIM_ENABLE_ARCH_lm32_TRUE@     lm32/lm32.o lm32/sim-if.o \
 650 @SIM_ENABLE_ARCH_lm32_TRUE@     lm32/traps.o lm32/user.o
 651 am_lm32_libsim_a_OBJECTS =
 652 lm32_libsim_a_OBJECTS = $(am_lm32_libsim_a_OBJECTS)
 653 m32c_libsim_a_AR = $(AR) $(ARFLAGS)
 654 @SIM_ENABLE_ARCH_m32c_TRUE@m32c_libsim_a_DEPENDENCIES =  \
 655 @SIM_ENABLE_ARCH_m32c_TRUE@     $(common_libcommon_a_OBJECTS) \
 656 @SIM_ENABLE_ARCH_m32c_TRUE@     m32c/gdb-if.o m32c/int.o \
 657 @SIM_ENABLE_ARCH_m32c_TRUE@     m32c/load.o m32c/m32c.o m32c/mem.o \
 658 @SIM_ENABLE_ARCH_m32c_TRUE@     m32c/misc.o m32c/modules.o \
 659 @SIM_ENABLE_ARCH_m32c_TRUE@     m32c/r8c.o m32c/reg.o \
 660 @SIM_ENABLE_ARCH_m32c_TRUE@     m32c/srcdest.o m32c/syscalls.o \
 661 @SIM_ENABLE_ARCH_m32c_TRUE@     m32c/trace.o
 662 am_m32c_libsim_a_OBJECTS =
 663 m32c_libsim_a_OBJECTS = $(am_m32c_libsim_a_OBJECTS)
 664 m32r_libsim_a_AR = $(AR) $(ARFLAGS)
 665 @SIM_ENABLE_ARCH_m32r_TRUE@m32r_libsim_a_DEPENDENCIES =  \
 666 @SIM_ENABLE_ARCH_m32r_TRUE@     $(common_libcommon_a_OBJECTS) \
 667 @SIM_ENABLE_ARCH_m32r_TRUE@     $(patsubst \
 668 @SIM_ENABLE_ARCH_m32r_TRUE@     %,m32r/%,$(SIM_NEW_COMMON_OBJS)) \
 669 @SIM_ENABLE_ARCH_m32r_TRUE@     $(patsubst \
 670 @SIM_ENABLE_ARCH_m32r_TRUE@     %,m32r/dv-%.o,$(SIM_HW_DEVICES)) \
 671 @SIM_ENABLE_ARCH_m32r_TRUE@     $(patsubst \
 672 @SIM_ENABLE_ARCH_m32r_TRUE@     %,m32r/dv-%.o,$(m32r_SIM_EXTRA_HW_DEVICES)) \
 673 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/modules.o m32r/cgen-run.o \
 674 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/cgen-scache.o \
 675 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/cgen-trace.o m32r/cgen-utils.o \
 676 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/arch.o m32r/m32r.o m32r/cpu.o \
 677 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/decode.o m32r/sem.o \
 678 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/model.o m32r/mloop.o \
 679 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/m32rx.o m32r/cpux.o \
 680 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/decodex.o m32r/modelx.o \
 681 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/mloopx.o m32r/m32r2.o \
 682 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/cpu2.o m32r/decode2.o \
 683 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/model2.o m32r/mloop2.o \
 684 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/sim-if.o m32r/traps.o
 685 am_m32r_libsim_a_OBJECTS =
 686 m32r_libsim_a_OBJECTS = $(am_m32r_libsim_a_OBJECTS)
 687 m68hc11_libsim_a_AR = $(AR) $(ARFLAGS)
 688 @SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11_libsim_a_DEPENDENCIES =  \
 689 @SIM_ENABLE_ARCH_m68hc11_TRUE@  $(common_libcommon_a_OBJECTS) \
 690 @SIM_ENABLE_ARCH_m68hc11_TRUE@  m68hc11/interp.o \
 691 @SIM_ENABLE_ARCH_m68hc11_TRUE@  m68hc11/m68hc11int.o \
 692 @SIM_ENABLE_ARCH_m68hc11_TRUE@  m68hc11/m68hc12int.o \
 693 @SIM_ENABLE_ARCH_m68hc11_TRUE@  m68hc11/emulos.o \
 694 @SIM_ENABLE_ARCH_m68hc11_TRUE@  m68hc11/interrupts.o \
 695 @SIM_ENABLE_ARCH_m68hc11_TRUE@  m68hc11/m68hc11_sim.o $(patsubst \
 696 @SIM_ENABLE_ARCH_m68hc11_TRUE@  %,m68hc11/%,$(SIM_NEW_COMMON_OBJS)) \
 697 @SIM_ENABLE_ARCH_m68hc11_TRUE@  $(patsubst \
 698 @SIM_ENABLE_ARCH_m68hc11_TRUE@  %,m68hc11/dv-%.o,$(SIM_HW_DEVICES)) \
 699 @SIM_ENABLE_ARCH_m68hc11_TRUE@  $(patsubst \
 700 @SIM_ENABLE_ARCH_m68hc11_TRUE@  %,m68hc11/dv-%.o,$(m68hc11_SIM_EXTRA_HW_DEVICES)) \
 701 @SIM_ENABLE_ARCH_m68hc11_TRUE@  m68hc11/modules.o \
 702 @SIM_ENABLE_ARCH_m68hc11_TRUE@  m68hc11/sim-resume.o
 703 am_m68hc11_libsim_a_OBJECTS =
 704 m68hc11_libsim_a_OBJECTS = $(am_m68hc11_libsim_a_OBJECTS)
 705 mcore_libsim_a_AR = $(AR) $(ARFLAGS)
 706 @SIM_ENABLE_ARCH_mcore_TRUE@mcore_libsim_a_DEPENDENCIES =  \
 707 @SIM_ENABLE_ARCH_mcore_TRUE@    $(common_libcommon_a_OBJECTS) \
 708 @SIM_ENABLE_ARCH_mcore_TRUE@    mcore/interp.o $(patsubst \
 709 @SIM_ENABLE_ARCH_mcore_TRUE@    %,mcore/%,$(SIM_NEW_COMMON_OBJS)) \
 710 @SIM_ENABLE_ARCH_mcore_TRUE@    $(patsubst \
 711 @SIM_ENABLE_ARCH_mcore_TRUE@    %,mcore/dv-%.o,$(SIM_HW_DEVICES)) \
 712 @SIM_ENABLE_ARCH_mcore_TRUE@    mcore/modules.o mcore/sim-resume.o
 713 am_mcore_libsim_a_OBJECTS =
 714 mcore_libsim_a_OBJECTS = $(am_mcore_libsim_a_OBJECTS)
 715 microblaze_libsim_a_AR = $(AR) $(ARFLAGS)
 716 @SIM_ENABLE_ARCH_microblaze_TRUE@microblaze_libsim_a_DEPENDENCIES = $(common_libcommon_a_OBJECTS) \
 717 @SIM_ENABLE_ARCH_microblaze_TRUE@       microblaze/interp.o \
 718 @SIM_ENABLE_ARCH_microblaze_TRUE@       $(patsubst \
 719 @SIM_ENABLE_ARCH_microblaze_TRUE@       %,microblaze/%,$(SIM_NEW_COMMON_OBJS)) \
 720 @SIM_ENABLE_ARCH_microblaze_TRUE@       $(patsubst \
 721 @SIM_ENABLE_ARCH_microblaze_TRUE@       %,microblaze/dv-%.o,$(SIM_HW_DEVICES)) \
 722 @SIM_ENABLE_ARCH_microblaze_TRUE@       microblaze/modules.o \
 723 @SIM_ENABLE_ARCH_microblaze_TRUE@       microblaze/sim-resume.o
 724 am_microblaze_libsim_a_OBJECTS =
 725 microblaze_libsim_a_OBJECTS = $(am_microblaze_libsim_a_OBJECTS)
 726 mips_libsim_a_AR = $(AR) $(ARFLAGS)
 727 am__DEPENDENCIES_1 =
 728 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_MULTI_TRUE@am__DEPENDENCIES_2 = $(am__DEPENDENCIES_1) \
 729 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_MULTI_TRUE@       mips/itable.o \
 730 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_MULTI_TRUE@       mips/multi-run.o
 731 @SIM_ENABLE_ARCH_mips_TRUE@am__DEPENDENCIES_3 = $(am__append_88) \
 732 @SIM_ENABLE_ARCH_mips_TRUE@     $(am__append_89) \
 733 @SIM_ENABLE_ARCH_mips_TRUE@     $(am__DEPENDENCIES_2)
 734 @SIM_ENABLE_ARCH_mips_TRUE@mips_libsim_a_DEPENDENCIES =  \
 735 @SIM_ENABLE_ARCH_mips_TRUE@     $(common_libcommon_a_OBJECTS) \
 736 @SIM_ENABLE_ARCH_mips_TRUE@     mips/interp.o $(am__DEPENDENCIES_3) \
 737 @SIM_ENABLE_ARCH_mips_TRUE@     $(patsubst \
 738 @SIM_ENABLE_ARCH_mips_TRUE@     %,mips/%,$(SIM_NEW_COMMON_OBJS)) \
 739 @SIM_ENABLE_ARCH_mips_TRUE@     $(patsubst \
 740 @SIM_ENABLE_ARCH_mips_TRUE@     %,mips/dv-%.o,$(SIM_HW_DEVICES)) \
 741 @SIM_ENABLE_ARCH_mips_TRUE@     $(patsubst \
 742 @SIM_ENABLE_ARCH_mips_TRUE@     %,mips/dv-%.o,$(mips_SIM_EXTRA_HW_DEVICES)) \
 743 @SIM_ENABLE_ARCH_mips_TRUE@     mips/cp1.o mips/dsp.o mips/mdmx.o \
 744 @SIM_ENABLE_ARCH_mips_TRUE@     mips/modules.o mips/sim-main.o \
 745 @SIM_ENABLE_ARCH_mips_TRUE@     mips/sim-resume.o
 746 am_mips_libsim_a_OBJECTS =
 747 mips_libsim_a_OBJECTS = $(am_mips_libsim_a_OBJECTS)
 748 mn10300_libsim_a_AR = $(AR) $(ARFLAGS)
 749 @SIM_ENABLE_ARCH_mn10300_TRUE@mn10300_libsim_a_DEPENDENCIES =  \
 750 @SIM_ENABLE_ARCH_mn10300_TRUE@  $(common_libcommon_a_OBJECTS) \
 751 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/itable.o \
 752 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/semantics.o \
 753 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/idecode.o \
 754 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/icache.o \
 755 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/engine.o mn10300/irun.o \
 756 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/support.o $(patsubst \
 757 @SIM_ENABLE_ARCH_mn10300_TRUE@  %,mn10300/%,$(SIM_NEW_COMMON_OBJS)) \
 758 @SIM_ENABLE_ARCH_mn10300_TRUE@  $(patsubst \
 759 @SIM_ENABLE_ARCH_mn10300_TRUE@  %,mn10300/dv-%.o,$(SIM_HW_DEVICES)) \
 760 @SIM_ENABLE_ARCH_mn10300_TRUE@  $(patsubst \
 761 @SIM_ENABLE_ARCH_mn10300_TRUE@  %,mn10300/dv-%.o,$(mn10300_SIM_EXTRA_HW_DEVICES)) \
 762 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/interp.o \
 763 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/modules.o \
 764 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/op_utils.o \
 765 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/sim-resume.o
 766 am_mn10300_libsim_a_OBJECTS =
 767 mn10300_libsim_a_OBJECTS = $(am_mn10300_libsim_a_OBJECTS)
 768 moxie_libsim_a_AR = $(AR) $(ARFLAGS)
 769 @SIM_ENABLE_ARCH_moxie_TRUE@moxie_libsim_a_DEPENDENCIES =  \
 770 @SIM_ENABLE_ARCH_moxie_TRUE@    $(common_libcommon_a_OBJECTS) \
 771 @SIM_ENABLE_ARCH_moxie_TRUE@    $(patsubst \
 772 @SIM_ENABLE_ARCH_moxie_TRUE@    %,moxie/%,$(SIM_NEW_COMMON_OBJS)) \
 773 @SIM_ENABLE_ARCH_moxie_TRUE@    $(patsubst \
 774 @SIM_ENABLE_ARCH_moxie_TRUE@    %,moxie/dv-%.o,$(SIM_HW_DEVICES)) \
 775 @SIM_ENABLE_ARCH_moxie_TRUE@    moxie/interp.o moxie/modules.o \
 776 @SIM_ENABLE_ARCH_moxie_TRUE@    moxie/sim-resume.o
 777 am_moxie_libsim_a_OBJECTS =
 778 moxie_libsim_a_OBJECTS = $(am_moxie_libsim_a_OBJECTS)
 779 msp430_libsim_a_AR = $(AR) $(ARFLAGS)
 780 @SIM_ENABLE_ARCH_msp430_TRUE@msp430_libsim_a_DEPENDENCIES =  \
 781 @SIM_ENABLE_ARCH_msp430_TRUE@   $(common_libcommon_a_OBJECTS) \
 782 @SIM_ENABLE_ARCH_msp430_TRUE@   $(patsubst \
 783 @SIM_ENABLE_ARCH_msp430_TRUE@   %,msp430/%,$(SIM_NEW_COMMON_OBJS)) \
 784 @SIM_ENABLE_ARCH_msp430_TRUE@   $(patsubst \
 785 @SIM_ENABLE_ARCH_msp430_TRUE@   %,msp430/dv-%.o,$(SIM_HW_DEVICES)) \
 786 @SIM_ENABLE_ARCH_msp430_TRUE@   msp430/msp430-sim.o \
 787 @SIM_ENABLE_ARCH_msp430_TRUE@   msp430/modules.o \
 788 @SIM_ENABLE_ARCH_msp430_TRUE@   msp430/sim-resume.o
 789 am_msp430_libsim_a_OBJECTS =
 790 msp430_libsim_a_OBJECTS = $(am_msp430_libsim_a_OBJECTS)
 791 or1k_libsim_a_AR = $(AR) $(ARFLAGS)
 792 @SIM_ENABLE_ARCH_or1k_TRUE@or1k_libsim_a_DEPENDENCIES =  \
 793 @SIM_ENABLE_ARCH_or1k_TRUE@     $(common_libcommon_a_OBJECTS) \
 794 @SIM_ENABLE_ARCH_or1k_TRUE@     $(patsubst \
 795 @SIM_ENABLE_ARCH_or1k_TRUE@     %,or1k/%,$(SIM_NEW_COMMON_OBJS)) \
 796 @SIM_ENABLE_ARCH_or1k_TRUE@     $(patsubst \
 797 @SIM_ENABLE_ARCH_or1k_TRUE@     %,or1k/dv-%.o,$(SIM_HW_DEVICES)) \
 798 @SIM_ENABLE_ARCH_or1k_TRUE@     or1k/modules.o or1k/cgen-accfp.o \
 799 @SIM_ENABLE_ARCH_or1k_TRUE@     or1k/cgen-fpu.o or1k/cgen-run.o \
 800 @SIM_ENABLE_ARCH_or1k_TRUE@     or1k/cgen-scache.o \
 801 @SIM_ENABLE_ARCH_or1k_TRUE@     or1k/cgen-trace.o or1k/cgen-utils.o \
 802 @SIM_ENABLE_ARCH_or1k_TRUE@     or1k/arch.o or1k/cpu.o \
 803 @SIM_ENABLE_ARCH_or1k_TRUE@     or1k/decode.o or1k/mloop.o \
 804 @SIM_ENABLE_ARCH_or1k_TRUE@     or1k/model.o or1k/sem.o or1k/or1k.o \
 805 @SIM_ENABLE_ARCH_or1k_TRUE@     or1k/sim-if.o or1k/traps.o
 806 am_or1k_libsim_a_OBJECTS =
 807 or1k_libsim_a_OBJECTS = $(am_or1k_libsim_a_OBJECTS)
 808 pru_libsim_a_AR = $(AR) $(ARFLAGS)
 809 @SIM_ENABLE_ARCH_pru_TRUE@pru_libsim_a_DEPENDENCIES =  \
 810 @SIM_ENABLE_ARCH_pru_TRUE@      $(common_libcommon_a_OBJECTS) \
 811 @SIM_ENABLE_ARCH_pru_TRUE@      $(patsubst \
 812 @SIM_ENABLE_ARCH_pru_TRUE@      %,pru/%,$(SIM_NEW_COMMON_OBJS)) \
 813 @SIM_ENABLE_ARCH_pru_TRUE@      $(patsubst \
 814 @SIM_ENABLE_ARCH_pru_TRUE@      %,pru/dv-%.o,$(SIM_HW_DEVICES)) \
 815 @SIM_ENABLE_ARCH_pru_TRUE@      pru/interp.o pru/modules.o \
 816 @SIM_ENABLE_ARCH_pru_TRUE@      pru/sim-resume.o
 817 am_pru_libsim_a_OBJECTS =
 818 pru_libsim_a_OBJECTS = $(am_pru_libsim_a_OBJECTS)
 819 riscv_libsim_a_AR = $(AR) $(ARFLAGS)
 820 @SIM_ENABLE_ARCH_riscv_TRUE@riscv_libsim_a_DEPENDENCIES =  \
 821 @SIM_ENABLE_ARCH_riscv_TRUE@    $(common_libcommon_a_OBJECTS) \
 822 @SIM_ENABLE_ARCH_riscv_TRUE@    $(patsubst \
 823 @SIM_ENABLE_ARCH_riscv_TRUE@    %,riscv/%,$(SIM_NEW_COMMON_OBJS)) \
 824 @SIM_ENABLE_ARCH_riscv_TRUE@    $(patsubst \
 825 @SIM_ENABLE_ARCH_riscv_TRUE@    %,riscv/dv-%.o,$(SIM_HW_DEVICES)) \
 826 @SIM_ENABLE_ARCH_riscv_TRUE@    riscv/interp.o riscv/machs.o \
 827 @SIM_ENABLE_ARCH_riscv_TRUE@    riscv/modules.o riscv/sim-main.o \
 828 @SIM_ENABLE_ARCH_riscv_TRUE@    riscv/sim-resume.o
 829 am_riscv_libsim_a_OBJECTS =
 830 riscv_libsim_a_OBJECTS = $(am_riscv_libsim_a_OBJECTS)
 831 rl78_libsim_a_AR = $(AR) $(ARFLAGS)
 832 @SIM_ENABLE_ARCH_rl78_TRUE@rl78_libsim_a_DEPENDENCIES =  \
 833 @SIM_ENABLE_ARCH_rl78_TRUE@     $(common_libcommon_a_OBJECTS) \
 834 @SIM_ENABLE_ARCH_rl78_TRUE@     rl78/load.o rl78/mem.o rl78/cpu.o \
 835 @SIM_ENABLE_ARCH_rl78_TRUE@     rl78/rl78.o rl78/gdb-if.o \
 836 @SIM_ENABLE_ARCH_rl78_TRUE@     rl78/modules.o rl78/trace.o
 837 am_rl78_libsim_a_OBJECTS =
 838 rl78_libsim_a_OBJECTS = $(am_rl78_libsim_a_OBJECTS)
 839 rx_libsim_a_AR = $(AR) $(ARFLAGS)
 840 @SIM_ENABLE_ARCH_rx_TRUE@rx_libsim_a_DEPENDENCIES =  \
 841 @SIM_ENABLE_ARCH_rx_TRUE@       $(common_libcommon_a_OBJECTS) \
 842 @SIM_ENABLE_ARCH_rx_TRUE@       rx/fpu.o rx/load.o rx/mem.o rx/misc.o \
 843 @SIM_ENABLE_ARCH_rx_TRUE@       rx/reg.o rx/rx.o rx/syscalls.o \
 844 @SIM_ENABLE_ARCH_rx_TRUE@       rx/trace.o rx/gdb-if.o rx/err.o \
 845 @SIM_ENABLE_ARCH_rx_TRUE@       rx/modules.o
 846 am_rx_libsim_a_OBJECTS =
 847 rx_libsim_a_OBJECTS = $(am_rx_libsim_a_OBJECTS)
 848 sh_libsim_a_AR = $(AR) $(ARFLAGS)
 849 @SIM_ENABLE_ARCH_sh_TRUE@sh_libsim_a_DEPENDENCIES =  \
 850 @SIM_ENABLE_ARCH_sh_TRUE@       $(common_libcommon_a_OBJECTS) \
 851 @SIM_ENABLE_ARCH_sh_TRUE@       sh/interp.o $(patsubst \
 852 @SIM_ENABLE_ARCH_sh_TRUE@       %,sh/%,$(SIM_NEW_COMMON_OBJS)) \
 853 @SIM_ENABLE_ARCH_sh_TRUE@       $(patsubst \
 854 @SIM_ENABLE_ARCH_sh_TRUE@       %,sh/dv-%.o,$(SIM_HW_DEVICES)) \
 855 @SIM_ENABLE_ARCH_sh_TRUE@       sh/modules.o sh/table.o
 856 am_sh_libsim_a_OBJECTS =
 857 sh_libsim_a_OBJECTS = $(am_sh_libsim_a_OBJECTS)
 858 v850_libsim_a_AR = $(AR) $(ARFLAGS)
 859 @SIM_ENABLE_ARCH_v850_TRUE@v850_libsim_a_DEPENDENCIES =  \
 860 @SIM_ENABLE_ARCH_v850_TRUE@     $(common_libcommon_a_OBJECTS) \
 861 @SIM_ENABLE_ARCH_v850_TRUE@     $(patsubst \
 862 @SIM_ENABLE_ARCH_v850_TRUE@     %,v850/%,$(SIM_NEW_COMMON_OBJS)) \
 863 @SIM_ENABLE_ARCH_v850_TRUE@     $(patsubst \
 864 @SIM_ENABLE_ARCH_v850_TRUE@     %,v850/dv-%.o,$(SIM_HW_DEVICES)) \
 865 @SIM_ENABLE_ARCH_v850_TRUE@     v850/simops.o v850/interp.o \
 866 @SIM_ENABLE_ARCH_v850_TRUE@     v850/itable.o v850/semantics.o \
 867 @SIM_ENABLE_ARCH_v850_TRUE@     v850/idecode.o v850/icache.o \
 868 @SIM_ENABLE_ARCH_v850_TRUE@     v850/engine.o v850/irun.o \
 869 @SIM_ENABLE_ARCH_v850_TRUE@     v850/support.o v850/modules.o \
 870 @SIM_ENABLE_ARCH_v850_TRUE@     v850/sim-resume.o
 871 am_v850_libsim_a_OBJECTS =
 872 v850_libsim_a_OBJECTS = $(am_v850_libsim_a_OBJECTS)
 873 @SIM_ENABLE_IGEN_TRUE@am__EXEEXT_1 = $(IGEN) igen/filter$(EXEEXT) \
 874 @SIM_ENABLE_IGEN_TRUE@  igen/gen$(EXEEXT) igen/ld-cache$(EXEEXT) \
 875 @SIM_ENABLE_IGEN_TRUE@  igen/ld-decode$(EXEEXT) \
 876 @SIM_ENABLE_IGEN_TRUE@  igen/ld-insn$(EXEEXT) \
 877 @SIM_ENABLE_IGEN_TRUE@  igen/table$(EXEEXT)
 878 @SIM_ENABLE_IGEN_TRUE@am__EXEEXT_2 = $(am__EXEEXT_1)
 879 @SIM_ENABLE_ARCH_cr16_TRUE@am__EXEEXT_3 = cr16/gencode$(EXEEXT)
 880 @SIM_ENABLE_ARCH_d10v_TRUE@am__EXEEXT_4 = d10v/gencode$(EXEEXT)
 881 @SIM_ENABLE_ARCH_m32c_TRUE@am__EXEEXT_5 = m32c/opc2c$(EXEEXT)
 882 @SIM_ENABLE_ARCH_m68hc11_TRUE@am__EXEEXT_6 = m68hc11/gencode$(EXEEXT)
 883 @SIM_ENABLE_ARCH_sh_TRUE@am__EXEEXT_7 = sh/gencode$(EXEEXT)
 884 am__EXEEXT_8 = testsuite/common/bits32m0$(EXEEXT) \
 885         testsuite/common/bits32m31$(EXEEXT) \
 886         testsuite/common/bits64m0$(EXEEXT) \
 887         testsuite/common/bits64m63$(EXEEXT) \
 888         testsuite/common/alu-tst$(EXEEXT)
 889 @SIM_ENABLE_ARCH_cris_TRUE@am__EXEEXT_9 = cris/rvdummy$(EXEEXT)
 890 @SIM_ENABLE_ARCH_aarch64_TRUE@am__EXEEXT_10 = aarch64/run$(EXEEXT)
 891 @SIM_ENABLE_ARCH_arm_TRUE@am__EXEEXT_11 = arm/run$(EXEEXT)
 892 @SIM_ENABLE_ARCH_avr_TRUE@am__EXEEXT_12 = avr/run$(EXEEXT)
 893 @SIM_ENABLE_ARCH_bfin_TRUE@am__EXEEXT_13 = bfin/run$(EXEEXT)
 894 @SIM_ENABLE_ARCH_bpf_TRUE@am__EXEEXT_14 = bpf/run$(EXEEXT)
 895 @SIM_ENABLE_ARCH_cr16_TRUE@am__EXEEXT_15 = cr16/run$(EXEEXT)
 896 @SIM_ENABLE_ARCH_cris_TRUE@am__EXEEXT_16 = cris/run$(EXEEXT)
 897 @SIM_ENABLE_ARCH_d10v_TRUE@am__EXEEXT_17 = d10v/run$(EXEEXT)
 898 @SIM_ENABLE_ARCH_erc32_TRUE@am__EXEEXT_18 = erc32/run$(EXEEXT) \
 899 @SIM_ENABLE_ARCH_erc32_TRUE@    erc32/sis$(EXEEXT)
 900 @SIM_ENABLE_ARCH_examples_TRUE@am__EXEEXT_19 =  \
 901 @SIM_ENABLE_ARCH_examples_TRUE@ example-synacor/run$(EXEEXT)
 902 @SIM_ENABLE_ARCH_frv_TRUE@am__EXEEXT_20 = frv/run$(EXEEXT)
 903 @SIM_ENABLE_ARCH_ft32_TRUE@am__EXEEXT_21 = ft32/run$(EXEEXT)
 904 @SIM_ENABLE_ARCH_h8300_TRUE@am__EXEEXT_22 = h8300/run$(EXEEXT)
 905 @SIM_ENABLE_ARCH_iq2000_TRUE@am__EXEEXT_23 = iq2000/run$(EXEEXT)
 906 @SIM_ENABLE_ARCH_lm32_TRUE@am__EXEEXT_24 = lm32/run$(EXEEXT)
 907 @SIM_ENABLE_ARCH_m32c_TRUE@am__EXEEXT_25 = m32c/run$(EXEEXT)
 908 @SIM_ENABLE_ARCH_m32r_TRUE@am__EXEEXT_26 = m32r/run$(EXEEXT)
 909 @SIM_ENABLE_ARCH_m68hc11_TRUE@am__EXEEXT_27 = m68hc11/run$(EXEEXT)
 910 @SIM_ENABLE_ARCH_mcore_TRUE@am__EXEEXT_28 = mcore/run$(EXEEXT)
 911 @SIM_ENABLE_ARCH_microblaze_TRUE@am__EXEEXT_29 =  \
 912 @SIM_ENABLE_ARCH_microblaze_TRUE@       microblaze/run$(EXEEXT)
 913 @SIM_ENABLE_ARCH_mips_TRUE@am__EXEEXT_30 = mips/run$(EXEEXT)
 914 @SIM_ENABLE_ARCH_mn10300_TRUE@am__EXEEXT_31 = mn10300/run$(EXEEXT)
 915 @SIM_ENABLE_ARCH_moxie_TRUE@am__EXEEXT_32 = moxie/run$(EXEEXT)
 916 @SIM_ENABLE_ARCH_msp430_TRUE@am__EXEEXT_33 = msp430/run$(EXEEXT)
 917 @SIM_ENABLE_ARCH_or1k_TRUE@am__EXEEXT_34 = or1k/run$(EXEEXT)
 918 @SIM_ENABLE_ARCH_ppc_TRUE@am__EXEEXT_35 = ppc/run$(EXEEXT) \
 919 @SIM_ENABLE_ARCH_ppc_TRUE@      ppc/psim$(EXEEXT)
 920 @SIM_ENABLE_ARCH_pru_TRUE@am__EXEEXT_36 = pru/run$(EXEEXT)
 921 @SIM_ENABLE_ARCH_riscv_TRUE@am__EXEEXT_37 = riscv/run$(EXEEXT)
 922 @SIM_ENABLE_ARCH_rl78_TRUE@am__EXEEXT_38 = rl78/run$(EXEEXT)
 923 @SIM_ENABLE_ARCH_rx_TRUE@am__EXEEXT_39 = rx/run$(EXEEXT)
 924 @SIM_ENABLE_ARCH_sh_TRUE@am__EXEEXT_40 = sh/run$(EXEEXT)
 925 @SIM_ENABLE_ARCH_v850_TRUE@am__EXEEXT_41 = v850/run$(EXEEXT)
 926 PROGRAMS = $(noinst_PROGRAMS)
 927 am_aarch64_run_OBJECTS =
 928 aarch64_run_OBJECTS = $(am_aarch64_run_OBJECTS)
 929 am__DEPENDENCIES_4 = $(BFD_LIB) $(OPCODES_LIB) $(LIBIBERTY_LIB)
 930 @SIM_ENABLE_ARCH_aarch64_TRUE@aarch64_run_DEPENDENCIES =  \
 931 @SIM_ENABLE_ARCH_aarch64_TRUE@  aarch64/nrun.o aarch64/libsim.a \
 932 @SIM_ENABLE_ARCH_aarch64_TRUE@  $(am__DEPENDENCIES_4)
 933 AM_V_lt = $(am__v_lt_@AM_V@)
 934 am__v_lt_ = $(am__v_lt_@AM_DEFAULT_V@)
 935 am__v_lt_0 = --silent
 936 am__v_lt_1 =
 937 am_arm_run_OBJECTS =
 938 arm_run_OBJECTS = $(am_arm_run_OBJECTS)
 939 @SIM_ENABLE_ARCH_arm_TRUE@arm_run_DEPENDENCIES = arm/nrun.o \
 940 @SIM_ENABLE_ARCH_arm_TRUE@      arm/libsim.a $(am__DEPENDENCIES_4)
 941 am_avr_run_OBJECTS =
 942 avr_run_OBJECTS = $(am_avr_run_OBJECTS)
 943 @SIM_ENABLE_ARCH_avr_TRUE@avr_run_DEPENDENCIES = avr/nrun.o \
 944 @SIM_ENABLE_ARCH_avr_TRUE@      avr/libsim.a $(am__DEPENDENCIES_4)
 945 am_bfin_run_OBJECTS =
 946 bfin_run_OBJECTS = $(am_bfin_run_OBJECTS)
 947 @SIM_ENABLE_ARCH_bfin_TRUE@bfin_run_DEPENDENCIES = bfin/nrun.o \
 948 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin/libsim.a $(am__DEPENDENCIES_4)
 949 am_bpf_run_OBJECTS =
 950 bpf_run_OBJECTS = $(am_bpf_run_OBJECTS)
 951 @SIM_ENABLE_ARCH_bpf_TRUE@bpf_run_DEPENDENCIES = bpf/nrun.o \
 952 @SIM_ENABLE_ARCH_bpf_TRUE@      bpf/libsim.a $(am__DEPENDENCIES_4)
 953 @SIM_ENABLE_ARCH_cr16_TRUE@am_cr16_gencode_OBJECTS =  \
 954 @SIM_ENABLE_ARCH_cr16_TRUE@     cr16/gencode.$(OBJEXT)
 955 cr16_gencode_OBJECTS = $(am_cr16_gencode_OBJECTS)
 956 @SIM_ENABLE_ARCH_cr16_TRUE@cr16_gencode_DEPENDENCIES =  \
 957 @SIM_ENABLE_ARCH_cr16_TRUE@     cr16/cr16-opc.o
 958 am_cr16_run_OBJECTS =
 959 cr16_run_OBJECTS = $(am_cr16_run_OBJECTS)
 960 @SIM_ENABLE_ARCH_cr16_TRUE@cr16_run_DEPENDENCIES = cr16/nrun.o \
 961 @SIM_ENABLE_ARCH_cr16_TRUE@     cr16/libsim.a $(am__DEPENDENCIES_4)
 962 am_cris_run_OBJECTS =
 963 cris_run_OBJECTS = $(am_cris_run_OBJECTS)
 964 @SIM_ENABLE_ARCH_cris_TRUE@cris_run_DEPENDENCIES = cris/nrun.o \
 965 @SIM_ENABLE_ARCH_cris_TRUE@     cris/libsim.a $(am__DEPENDENCIES_4)
 966 @SIM_ENABLE_ARCH_cris_TRUE@am_cris_rvdummy_OBJECTS =  \
 967 @SIM_ENABLE_ARCH_cris_TRUE@     cris/rvdummy.$(OBJEXT)
 968 cris_rvdummy_OBJECTS = $(am_cris_rvdummy_OBJECTS)
 969 @SIM_ENABLE_ARCH_cris_TRUE@cris_rvdummy_DEPENDENCIES =  \
 970 @SIM_ENABLE_ARCH_cris_TRUE@     $(LIBIBERTY_LIB)
 971 @SIM_ENABLE_ARCH_d10v_TRUE@am_d10v_gencode_OBJECTS =  \
 972 @SIM_ENABLE_ARCH_d10v_TRUE@     d10v/gencode.$(OBJEXT)
 973 d10v_gencode_OBJECTS = $(am_d10v_gencode_OBJECTS)
 974 @SIM_ENABLE_ARCH_d10v_TRUE@d10v_gencode_DEPENDENCIES =  \
 975 @SIM_ENABLE_ARCH_d10v_TRUE@     d10v/d10v-opc.o
 976 am_d10v_run_OBJECTS =
 977 d10v_run_OBJECTS = $(am_d10v_run_OBJECTS)
 978 @SIM_ENABLE_ARCH_d10v_TRUE@d10v_run_DEPENDENCIES = d10v/nrun.o \
 979 @SIM_ENABLE_ARCH_d10v_TRUE@     d10v/libsim.a $(am__DEPENDENCIES_4)
 980 am_erc32_run_OBJECTS =
 981 erc32_run_OBJECTS = $(am_erc32_run_OBJECTS)
 982 @SIM_ENABLE_ARCH_erc32_TRUE@erc32_run_DEPENDENCIES = erc32/sis.o \
 983 @SIM_ENABLE_ARCH_erc32_TRUE@    erc32/libsim.a \
 984 @SIM_ENABLE_ARCH_erc32_TRUE@    $(am__DEPENDENCIES_4) \
 985 @SIM_ENABLE_ARCH_erc32_TRUE@    $(am__DEPENDENCIES_1) \
 986 @SIM_ENABLE_ARCH_erc32_TRUE@    $(am__DEPENDENCIES_1)
 987 erc32_sis_SOURCES = erc32/sis.c
 988 erc32_sis_OBJECTS = erc32/sis.$(OBJEXT)
 989 erc32_sis_LDADD = $(LDADD)
 990 am_example_synacor_run_OBJECTS =
 991 example_synacor_run_OBJECTS = $(am_example_synacor_run_OBJECTS)
 992 @SIM_ENABLE_ARCH_examples_TRUE@example_synacor_run_DEPENDENCIES =  \
 993 @SIM_ENABLE_ARCH_examples_TRUE@ example-synacor/nrun.o \
 994 @SIM_ENABLE_ARCH_examples_TRUE@ example-synacor/libsim.a \
 995 @SIM_ENABLE_ARCH_examples_TRUE@ $(am__DEPENDENCIES_4)
 996 am_frv_run_OBJECTS =
 997 frv_run_OBJECTS = $(am_frv_run_OBJECTS)
 998 @SIM_ENABLE_ARCH_frv_TRUE@frv_run_DEPENDENCIES = frv/nrun.o \
 999 @SIM_ENABLE_ARCH_frv_TRUE@      frv/libsim.a $(am__DEPENDENCIES_4)
1000 am_ft32_run_OBJECTS =
1001 ft32_run_OBJECTS = $(am_ft32_run_OBJECTS)
1002 @SIM_ENABLE_ARCH_ft32_TRUE@ft32_run_DEPENDENCIES = ft32/nrun.o \
1003 @SIM_ENABLE_ARCH_ft32_TRUE@     ft32/libsim.a $(am__DEPENDENCIES_4)
1004 am_h8300_run_OBJECTS =
1005 h8300_run_OBJECTS = $(am_h8300_run_OBJECTS)
1006 @SIM_ENABLE_ARCH_h8300_TRUE@h8300_run_DEPENDENCIES = h8300/nrun.o \
1007 @SIM_ENABLE_ARCH_h8300_TRUE@    h8300/libsim.a \
1008 @SIM_ENABLE_ARCH_h8300_TRUE@    $(am__DEPENDENCIES_4)
1009 am_igen_filter_OBJECTS =
1010 igen_filter_OBJECTS = $(am_igen_filter_OBJECTS)
1011 @SIM_ENABLE_IGEN_TRUE@igen_filter_DEPENDENCIES = igen/filter-main.o \
1012 @SIM_ENABLE_IGEN_TRUE@  igen/libigen.a
1013 am_igen_gen_OBJECTS =
1014 igen_gen_OBJECTS = $(am_igen_gen_OBJECTS)
1015 @SIM_ENABLE_IGEN_TRUE@igen_gen_DEPENDENCIES = igen/gen-main.o \
1016 @SIM_ENABLE_IGEN_TRUE@  igen/libigen.a
1017 @SIM_ENABLE_IGEN_TRUE@am_igen_igen_OBJECTS = igen/igen.$(OBJEXT)
1018 igen_igen_OBJECTS = $(am_igen_igen_OBJECTS)
1019 @SIM_ENABLE_IGEN_TRUE@igen_igen_DEPENDENCIES = igen/libigen.a
1020 am_igen_ld_cache_OBJECTS =
1021 igen_ld_cache_OBJECTS = $(am_igen_ld_cache_OBJECTS)
1022 @SIM_ENABLE_IGEN_TRUE@igen_ld_cache_DEPENDENCIES =  \
1023 @SIM_ENABLE_IGEN_TRUE@  igen/ld-cache-main.o igen/libigen.a
1024 am_igen_ld_decode_OBJECTS =
1025 igen_ld_decode_OBJECTS = $(am_igen_ld_decode_OBJECTS)
1026 @SIM_ENABLE_IGEN_TRUE@igen_ld_decode_DEPENDENCIES =  \
1027 @SIM_ENABLE_IGEN_TRUE@  igen/ld-decode-main.o igen/libigen.a
1028 am_igen_ld_insn_OBJECTS =
1029 igen_ld_insn_OBJECTS = $(am_igen_ld_insn_OBJECTS)
1030 @SIM_ENABLE_IGEN_TRUE@igen_ld_insn_DEPENDENCIES = igen/ld-insn-main.o \
1031 @SIM_ENABLE_IGEN_TRUE@  igen/libigen.a
1032 am_igen_table_OBJECTS =
1033 igen_table_OBJECTS = $(am_igen_table_OBJECTS)
1034 @SIM_ENABLE_IGEN_TRUE@igen_table_DEPENDENCIES = igen/table-main.o \
1035 @SIM_ENABLE_IGEN_TRUE@  igen/libigen.a
1036 am_iq2000_run_OBJECTS =
1037 iq2000_run_OBJECTS = $(am_iq2000_run_OBJECTS)
1038 @SIM_ENABLE_ARCH_iq2000_TRUE@iq2000_run_DEPENDENCIES = iq2000/nrun.o \
1039 @SIM_ENABLE_ARCH_iq2000_TRUE@   iq2000/libsim.a \
1040 @SIM_ENABLE_ARCH_iq2000_TRUE@   $(am__DEPENDENCIES_4)
1041 am_lm32_run_OBJECTS =
1042 lm32_run_OBJECTS = $(am_lm32_run_OBJECTS)
1043 @SIM_ENABLE_ARCH_lm32_TRUE@lm32_run_DEPENDENCIES = lm32/nrun.o \
1044 @SIM_ENABLE_ARCH_lm32_TRUE@     lm32/libsim.a $(am__DEPENDENCIES_4)
1045 @SIM_ENABLE_ARCH_m32c_TRUE@am_m32c_opc2c_OBJECTS =  \
1046 @SIM_ENABLE_ARCH_m32c_TRUE@     m32c/opc2c.$(OBJEXT)
1047 m32c_opc2c_OBJECTS = $(am_m32c_opc2c_OBJECTS)
1048 m32c_opc2c_LDADD = $(LDADD)
1049 am_m32c_run_OBJECTS =
1050 m32c_run_OBJECTS = $(am_m32c_run_OBJECTS)
1051 @SIM_ENABLE_ARCH_m32c_TRUE@m32c_run_DEPENDENCIES = m32c/main.o \
1052 @SIM_ENABLE_ARCH_m32c_TRUE@     m32c/libsim.a $(am__DEPENDENCIES_4)
1053 am_m32r_run_OBJECTS =
1054 m32r_run_OBJECTS = $(am_m32r_run_OBJECTS)
1055 @SIM_ENABLE_ARCH_m32r_TRUE@m32r_run_DEPENDENCIES = m32r/nrun.o \
1056 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/libsim.a $(am__DEPENDENCIES_4)
1057 @SIM_ENABLE_ARCH_m68hc11_TRUE@am_m68hc11_gencode_OBJECTS =  \
1058 @SIM_ENABLE_ARCH_m68hc11_TRUE@  m68hc11/gencode.$(OBJEXT)
1059 m68hc11_gencode_OBJECTS = $(am_m68hc11_gencode_OBJECTS)
1060 m68hc11_gencode_LDADD = $(LDADD)
1061 am_m68hc11_run_OBJECTS =
1062 m68hc11_run_OBJECTS = $(am_m68hc11_run_OBJECTS)
1063 @SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11_run_DEPENDENCIES =  \
1064 @SIM_ENABLE_ARCH_m68hc11_TRUE@  m68hc11/nrun.o m68hc11/libsim.a \
1065 @SIM_ENABLE_ARCH_m68hc11_TRUE@  $(am__DEPENDENCIES_4)
1066 am_mcore_run_OBJECTS =
1067 mcore_run_OBJECTS = $(am_mcore_run_OBJECTS)
1068 @SIM_ENABLE_ARCH_mcore_TRUE@mcore_run_DEPENDENCIES = mcore/nrun.o \
1069 @SIM_ENABLE_ARCH_mcore_TRUE@    mcore/libsim.a \
1070 @SIM_ENABLE_ARCH_mcore_TRUE@    $(am__DEPENDENCIES_4)
1071 am_microblaze_run_OBJECTS =
1072 microblaze_run_OBJECTS = $(am_microblaze_run_OBJECTS)
1073 @SIM_ENABLE_ARCH_microblaze_TRUE@microblaze_run_DEPENDENCIES =  \
1074 @SIM_ENABLE_ARCH_microblaze_TRUE@       microblaze/nrun.o \
1075 @SIM_ENABLE_ARCH_microblaze_TRUE@       microblaze/libsim.a \
1076 @SIM_ENABLE_ARCH_microblaze_TRUE@       $(am__DEPENDENCIES_4)
1077 am_mips_run_OBJECTS =
1078 mips_run_OBJECTS = $(am_mips_run_OBJECTS)
1079 @SIM_ENABLE_ARCH_mips_TRUE@mips_run_DEPENDENCIES = mips/nrun.o \
1080 @SIM_ENABLE_ARCH_mips_TRUE@     mips/libsim.a $(am__DEPENDENCIES_4)
1081 am_mn10300_run_OBJECTS =
1082 mn10300_run_OBJECTS = $(am_mn10300_run_OBJECTS)
1083 @SIM_ENABLE_ARCH_mn10300_TRUE@mn10300_run_DEPENDENCIES =  \
1084 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/nrun.o mn10300/libsim.a \
1085 @SIM_ENABLE_ARCH_mn10300_TRUE@  $(am__DEPENDENCIES_4)
1086 am_moxie_run_OBJECTS =
1087 moxie_run_OBJECTS = $(am_moxie_run_OBJECTS)
1088 @SIM_ENABLE_ARCH_moxie_TRUE@moxie_run_DEPENDENCIES = moxie/nrun.o \
1089 @SIM_ENABLE_ARCH_moxie_TRUE@    moxie/libsim.a \
1090 @SIM_ENABLE_ARCH_moxie_TRUE@    $(am__DEPENDENCIES_4)
1091 am_msp430_run_OBJECTS =
1092 msp430_run_OBJECTS = $(am_msp430_run_OBJECTS)
1093 @SIM_ENABLE_ARCH_msp430_TRUE@msp430_run_DEPENDENCIES = msp430/nrun.o \
1094 @SIM_ENABLE_ARCH_msp430_TRUE@   msp430/libsim.a \
1095 @SIM_ENABLE_ARCH_msp430_TRUE@   $(am__DEPENDENCIES_4)
1096 am_or1k_run_OBJECTS =
1097 or1k_run_OBJECTS = $(am_or1k_run_OBJECTS)
1098 @SIM_ENABLE_ARCH_or1k_TRUE@or1k_run_DEPENDENCIES = or1k/nrun.o \
1099 @SIM_ENABLE_ARCH_or1k_TRUE@     or1k/libsim.a $(am__DEPENDENCIES_4)
1100 ppc_psim_SOURCES = ppc/psim.c
1101 ppc_psim_OBJECTS = ppc/psim.$(OBJEXT)
1102 ppc_psim_LDADD = $(LDADD)
1103 am_ppc_run_OBJECTS =
1104 ppc_run_OBJECTS = $(am_ppc_run_OBJECTS)
1105 @SIM_ENABLE_ARCH_ppc_TRUE@ppc_run_DEPENDENCIES = ppc/main.o \
1106 @SIM_ENABLE_ARCH_ppc_TRUE@      ppc/libsim.a $(am__DEPENDENCIES_4)
1107 am_pru_run_OBJECTS =
1108 pru_run_OBJECTS = $(am_pru_run_OBJECTS)
1109 @SIM_ENABLE_ARCH_pru_TRUE@pru_run_DEPENDENCIES = pru/nrun.o \
1110 @SIM_ENABLE_ARCH_pru_TRUE@      pru/libsim.a $(am__DEPENDENCIES_4)
1111 am_riscv_run_OBJECTS =
1112 riscv_run_OBJECTS = $(am_riscv_run_OBJECTS)
1113 @SIM_ENABLE_ARCH_riscv_TRUE@riscv_run_DEPENDENCIES = riscv/nrun.o \
1114 @SIM_ENABLE_ARCH_riscv_TRUE@    riscv/libsim.a \
1115 @SIM_ENABLE_ARCH_riscv_TRUE@    $(am__DEPENDENCIES_4)
1116 am_rl78_run_OBJECTS =
1117 rl78_run_OBJECTS = $(am_rl78_run_OBJECTS)
1118 @SIM_ENABLE_ARCH_rl78_TRUE@rl78_run_DEPENDENCIES = rl78/main.o \
1119 @SIM_ENABLE_ARCH_rl78_TRUE@     rl78/libsim.a $(am__DEPENDENCIES_4)
1120 am_rx_run_OBJECTS =
1121 rx_run_OBJECTS = $(am_rx_run_OBJECTS)
1122 @SIM_ENABLE_ARCH_rx_TRUE@rx_run_DEPENDENCIES = rx/main.o rx/libsim.a \
1123 @SIM_ENABLE_ARCH_rx_TRUE@       $(am__DEPENDENCIES_4)
1124 @SIM_ENABLE_ARCH_sh_TRUE@am_sh_gencode_OBJECTS = sh/gencode.$(OBJEXT)
1125 sh_gencode_OBJECTS = $(am_sh_gencode_OBJECTS)
1126 sh_gencode_LDADD = $(LDADD)
1127 am_sh_run_OBJECTS =
1128 sh_run_OBJECTS = $(am_sh_run_OBJECTS)
1129 @SIM_ENABLE_ARCH_sh_TRUE@sh_run_DEPENDENCIES = sh/nrun.o sh/libsim.a \
1130 @SIM_ENABLE_ARCH_sh_TRUE@       $(am__DEPENDENCIES_4)
1131 testsuite_common_alu_tst_SOURCES = testsuite/common/alu-tst.c
1132 testsuite_common_alu_tst_OBJECTS = testsuite/common/alu-tst.$(OBJEXT)
1133 testsuite_common_alu_tst_LDADD = $(LDADD)
1134 testsuite_common_bits_gen_SOURCES = testsuite/common/bits-gen.c
1135 testsuite_common_bits_gen_OBJECTS =  \
1136         testsuite/common/bits-gen.$(OBJEXT)
1137 testsuite_common_bits_gen_LDADD = $(LDADD)
1138 testsuite_common_bits32m0_SOURCES = testsuite/common/bits32m0.c
1139 testsuite_common_bits32m0_OBJECTS =  \
1140         testsuite/common/bits32m0.$(OBJEXT)
1141 testsuite_common_bits32m0_LDADD = $(LDADD)
1142 testsuite_common_bits32m31_SOURCES = testsuite/common/bits32m31.c
1143 testsuite_common_bits32m31_OBJECTS =  \
1144         testsuite/common/bits32m31.$(OBJEXT)
1145 testsuite_common_bits32m31_LDADD = $(LDADD)
1146 testsuite_common_bits64m0_SOURCES = testsuite/common/bits64m0.c
1147 testsuite_common_bits64m0_OBJECTS =  \
1148         testsuite/common/bits64m0.$(OBJEXT)
1149 testsuite_common_bits64m0_LDADD = $(LDADD)
1150 testsuite_common_bits64m63_SOURCES = testsuite/common/bits64m63.c
1151 testsuite_common_bits64m63_OBJECTS =  \
1152         testsuite/common/bits64m63.$(OBJEXT)
1153 testsuite_common_bits64m63_LDADD = $(LDADD)
1154 testsuite_common_fpu_tst_SOURCES = testsuite/common/fpu-tst.c
1155 testsuite_common_fpu_tst_OBJECTS = testsuite/common/fpu-tst.$(OBJEXT)
1156 testsuite_common_fpu_tst_LDADD = $(LDADD)
1157 am_v850_run_OBJECTS =
1158 v850_run_OBJECTS = $(am_v850_run_OBJECTS)
1159 @SIM_ENABLE_ARCH_v850_TRUE@v850_run_DEPENDENCIES = v850/nrun.o \
1160 @SIM_ENABLE_ARCH_v850_TRUE@     v850/libsim.a $(am__DEPENDENCIES_4)
1161 AM_V_P = $(am__v_P_@AM_V@)
1162 am__v_P_ = $(am__v_P_@AM_DEFAULT_V@)
1163 am__v_P_0 = false
1164 am__v_P_1 = :
1165 AM_V_GEN = $(am__v_GEN_@AM_V@)
1166 am__v_GEN_ = $(am__v_GEN_@AM_DEFAULT_V@)
1167 am__v_GEN_0 = @echo "  GEN     " $@;
1168 am__v_GEN_1 =
1169 AM_V_at = $(am__v_at_@AM_V@)
1170 am__v_at_ = $(am__v_at_@AM_DEFAULT_V@)
1171 am__v_at_0 = @
1172 am__v_at_1 =
1173 DEFAULT_INCLUDES = -I.@am__isrc@
1174 depcomp = $(SHELL) $(top_srcdir)/../depcomp
1175 am__depfiles_maybe = depfiles
1176 am__mv = mv -f
1177 COMPILE = $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) \
1178         $(CPPFLAGS) $(AM_CFLAGS) $(CFLAGS)
1179 LTCOMPILE = $(LIBTOOL) $(AM_V_lt) --tag=CC $(AM_LIBTOOLFLAGS) \
1180         $(LIBTOOLFLAGS) --mode=compile $(CC) $(DEFS) \
1181         $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) \
1182         $(AM_CFLAGS) $(CFLAGS)
1183 AM_V_CC = $(am__v_CC_@AM_V@)
1184 am__v_CC_ = $(am__v_CC_@AM_DEFAULT_V@)
1185 am__v_CC_0 = @echo "  CC      " $@;
1186 am__v_CC_1 =
1187 CCLD = $(CC)
1188 LINK = $(LIBTOOL) $(AM_V_lt) --tag=CC $(AM_LIBTOOLFLAGS) \
1189         $(LIBTOOLFLAGS) --mode=link $(CCLD) $(AM_CFLAGS) $(CFLAGS) \
1190         $(AM_LDFLAGS) $(LDFLAGS) -o $@
1191 AM_V_CCLD = $(am__v_CCLD_@AM_V@)
1192 am__v_CCLD_ = $(am__v_CCLD_@AM_DEFAULT_V@)
1193 am__v_CCLD_0 = @echo "  CCLD    " $@;
1194 am__v_CCLD_1 =
1195 SOURCES = $(aarch64_libsim_a_SOURCES) $(arm_libsim_a_SOURCES) \
1196         $(avr_libsim_a_SOURCES) $(bfin_libsim_a_SOURCES) \
1197         $(bpf_libsim_a_SOURCES) $(common_libcommon_a_SOURCES) \
1198         $(cr16_libsim_a_SOURCES) $(cris_libsim_a_SOURCES) \
1199         $(d10v_libsim_a_SOURCES) $(erc32_libsim_a_SOURCES) \
1200         $(example_synacor_libsim_a_SOURCES) $(frv_libsim_a_SOURCES) \
1201         $(ft32_libsim_a_SOURCES) $(h8300_libsim_a_SOURCES) \
1202         $(igen_libigen_a_SOURCES) $(iq2000_libsim_a_SOURCES) \
1203         $(lm32_libsim_a_SOURCES) $(m32c_libsim_a_SOURCES) \
1204         $(m32r_libsim_a_SOURCES) $(m68hc11_libsim_a_SOURCES) \
1205         $(mcore_libsim_a_SOURCES) $(microblaze_libsim_a_SOURCES) \
1206         $(mips_libsim_a_SOURCES) $(mn10300_libsim_a_SOURCES) \
1207         $(moxie_libsim_a_SOURCES) $(msp430_libsim_a_SOURCES) \
1208         $(or1k_libsim_a_SOURCES) $(pru_libsim_a_SOURCES) \
1209         $(riscv_libsim_a_SOURCES) $(rl78_libsim_a_SOURCES) \
1210         $(rx_libsim_a_SOURCES) $(sh_libsim_a_SOURCES) \
1211         $(v850_libsim_a_SOURCES) $(aarch64_run_SOURCES) \
1212         $(arm_run_SOURCES) $(avr_run_SOURCES) $(bfin_run_SOURCES) \
1213         $(bpf_run_SOURCES) $(cr16_gencode_SOURCES) $(cr16_run_SOURCES) \
1214         $(cris_run_SOURCES) $(cris_rvdummy_SOURCES) \
1215         $(d10v_gencode_SOURCES) $(d10v_run_SOURCES) \
1216         $(erc32_run_SOURCES) erc32/sis.c \
1217         $(example_synacor_run_SOURCES) $(frv_run_SOURCES) \
1218         $(ft32_run_SOURCES) $(h8300_run_SOURCES) \
1219         $(igen_filter_SOURCES) $(igen_gen_SOURCES) \
1220         $(igen_igen_SOURCES) $(igen_ld_cache_SOURCES) \
1221         $(igen_ld_decode_SOURCES) $(igen_ld_insn_SOURCES) \
1222         $(igen_table_SOURCES) $(iq2000_run_SOURCES) \
1223         $(lm32_run_SOURCES) $(m32c_opc2c_SOURCES) $(m32c_run_SOURCES) \
1224         $(m32r_run_SOURCES) $(m68hc11_gencode_SOURCES) \
1225         $(m68hc11_run_SOURCES) $(mcore_run_SOURCES) \
1226         $(microblaze_run_SOURCES) $(mips_run_SOURCES) \
1227         $(mn10300_run_SOURCES) $(moxie_run_SOURCES) \
1228         $(msp430_run_SOURCES) $(or1k_run_SOURCES) ppc/psim.c \
1229         $(ppc_run_SOURCES) $(pru_run_SOURCES) $(riscv_run_SOURCES) \
1230         $(rl78_run_SOURCES) $(rx_run_SOURCES) $(sh_gencode_SOURCES) \
1231         $(sh_run_SOURCES) testsuite/common/alu-tst.c \
1232         testsuite/common/bits-gen.c testsuite/common/bits32m0.c \
1233         testsuite/common/bits32m31.c testsuite/common/bits64m0.c \
1234         testsuite/common/bits64m63.c testsuite/common/fpu-tst.c \
1235         $(v850_run_SOURCES)
1236 RECURSIVE_TARGETS = all-recursive check-recursive cscopelist-recursive \
1237         ctags-recursive dvi-recursive html-recursive info-recursive \
1238         install-data-recursive install-dvi-recursive \
1239         install-exec-recursive install-html-recursive \
1240         install-info-recursive install-pdf-recursive \
1241         install-ps-recursive install-recursive installcheck-recursive \
1242         installdirs-recursive pdf-recursive ps-recursive \
1243         tags-recursive uninstall-recursive
1244 am__can_run_installinfo = \
1245   case $$AM_UPDATE_INFO_DIR in \
1246     n|no|NO) false;; \
1247     *) (install-info --version) >/dev/null 2>&1;; \
1248   esac
1249 am__vpath_adj_setup = srcdirstrip=`echo "$(srcdir)" | sed 's|.|.|g'`;
1250 am__vpath_adj = case $$p in \
1251     $(srcdir)/*) f=`echo "$$p" | sed "s|^$$srcdirstrip/||"`;; \
1252     *) f=$$p;; \
1253   esac;
1254 am__strip_dir = f=`echo $$p | sed -e 's|^.*/||'`;
1255 am__install_max = 40
1256 am__nobase_strip_setup = \
1257   srcdirstrip=`echo "$(srcdir)" | sed 's/[].[^$$\\*|]/\\\\&/g'`
1258 am__nobase_strip = \
1259   for p in $$list; do echo "$$p"; done | sed -e "s|$$srcdirstrip/||"
1260 am__nobase_list = $(am__nobase_strip_setup); \
1261   for p in $$list; do echo "$$p $$p"; done | \
1262   sed "s| $$srcdirstrip/| |;"' / .*\//!s/ .*/ ./; s,\( .*\)/[^/]*$$,\1,' | \
1263   $(AWK) 'BEGIN { files["."] = "" } { files[$$2] = files[$$2] " " $$1; \
1264     if (++n[$$2] == $(am__install_max)) \
1265       { print $$2, files[$$2]; n[$$2] = 0; files[$$2] = "" } } \
1266     END { for (dir in files) print dir, files[dir] }'
1267 am__base_list = \
1268   sed '$$!N;$$!N;$$!N;$$!N;$$!N;$$!N;$$!N;s/\n/ /g' | \
1269   sed '$$!N;$$!N;$$!N;$$!N;s/\n/ /g'
1270 am__uninstall_files_from_dir = { \
1271   test -z "$$files" \
1272     || { test ! -d "$$dir" && test ! -f "$$dir" && test ! -r "$$dir"; } \
1273     || { echo " ( cd '$$dir' && rm -f" $$files ")"; \
1274          $(am__cd) "$$dir" && rm -f $$files; }; \
1275   }
1276 am__installdirs = "$(DESTDIR)$(armdocdir)" "$(DESTDIR)$(dtbdir)" \
1277         "$(DESTDIR)$(erc32docdir)" "$(DESTDIR)$(frvdocdir)" \
1278         "$(DESTDIR)$(or1kdocdir)" "$(DESTDIR)$(ppcdocdir)" \
1279         "$(DESTDIR)$(rxdocdir)" "$(DESTDIR)$(pkgincludedir)"
1280 DATA = $(armdoc_DATA) $(dtb_DATA) $(erc32doc_DATA) $(frvdoc_DATA) \
1281         $(or1kdoc_DATA) $(ppcdoc_DATA) $(rxdoc_DATA)
1282 am__pkginclude_HEADERS_DIST = $(srcroot)/include/sim/callback.h \
1283         $(srcroot)/include/sim/sim.h
1284 HEADERS = $(pkginclude_HEADERS)
1285 RECURSIVE_CLEAN_TARGETS = mostlyclean-recursive clean-recursive \
1286   distclean-recursive maintainer-clean-recursive
1287 am__recursive_targets = \
1288   $(RECURSIVE_TARGETS) \
1289   $(RECURSIVE_CLEAN_TARGETS) \
1290   $(am__extra_recursive_targets)
1291 AM_RECURSIVE_TARGETS = $(am__recursive_targets:-recursive=) TAGS CTAGS \
1292         cscope check recheck
1293 am__tagged_files = $(HEADERS) $(SOURCES) $(TAGS_FILES) \
1294         $(LISP)config.h.in
1295 # Read a list of newline-separated strings from the standard input,
1296 # and print each of them once, without duplicates.  Input order is
1297 # *not* preserved.
1298 am__uniquify_input = $(AWK) '\
1299   BEGIN { nonempty = 0; } \
1300   { items[$$0] = 1; nonempty = 1; } \
1301   END { if (nonempty) { for (i in items) print i; }; } \
1302 '
1303 # Make sure the list of sources is unique.  This is necessary because,
1304 # e.g., the same source file might be shared among _SOURCES variables
1305 # for different programs/libraries.
1306 am__define_uniq_tagged_files = \
1307   list='$(am__tagged_files)'; \
1308   unique=`for i in $$list; do \
1309     if test -f "$$i"; then echo $$i; else echo $(srcdir)/$$i; fi; \
1310   done | $(am__uniquify_input)`
1311 ETAGS = etags
1312 CTAGS = ctags
1313 CSCOPE = cscope
1314 DEJATOOL = $(PACKAGE)
1315 RUNTESTDEFAULTFLAGS = --tool $$tool --srcdir $$srcdir
1316 EXPECT = expect
1317 RUNTEST = runtest
1318 am__tty_colors_dummy = \
1319   mgn= red= grn= lgn= blu= brg= std=; \
1320   am__color_tests=no
1321 am__tty_colors = { \
1322   $(am__tty_colors_dummy); \
1323   if test "X$(AM_COLOR_TESTS)" = Xno; then \
1324     am__color_tests=no; \
1325   elif test "X$(AM_COLOR_TESTS)" = Xalways; then \
1326     am__color_tests=yes; \
1327   elif test "X$$TERM" != Xdumb && { test -t 1; } 2>/dev/null; then \
1328     am__color_tests=yes; \
1329   fi; \
1330   if test $$am__color_tests = yes; then \
1331     red='\e[0;31m'; \
1332     grn='\e[0;32m'; \
1333     lgn='\e[1;32m'; \
1334     blu='\e[1;34m'; \
1335     mgn='\e[0;35m'; \
1336     brg='\e[1m'; \
1337     std='\e[m'; \
1338   fi; \
1339 }
1340 am__recheck_rx = ^[     ]*:recheck:[    ]*
1341 am__global_test_result_rx = ^[  ]*:global-test-result:[         ]*
1342 am__copy_in_global_log_rx = ^[  ]*:copy-in-global-log:[         ]*
1343 # A command that, given a newline-separated list of test names on the
1344 # standard input, print the name of the tests that are to be re-run
1345 # upon "make recheck".
1346 am__list_recheck_tests = $(AWK) '{ \
1347   recheck = 1; \
1348   while ((rc = (getline line < ($$0 ".trs"))) != 0) \
1349     { \
1350       if (rc < 0) \
1351         { \
1352           if ((getline line2 < ($$0 ".log")) < 0) \
1353             recheck = 0; \
1354           break; \
1355         } \
1356       else if (line ~ /$(am__recheck_rx)[nN][Oo]/) \
1357         { \
1358           recheck = 0; \
1359           break; \
1360         } \
1361       else if (line ~ /$(am__recheck_rx)[yY][eE][sS]/) \
1362         { \
1363           break; \
1364         } \
1365     }; \
1366   if (recheck) \
1367     print $$0; \
1368   close ($$0 ".trs"); \
1369   close ($$0 ".log"); \
1370 }'
1371 # A command that, given a newline-separated list of test names on the
1372 # standard input, create the global log from their .trs and .log files.
1373 am__create_global_log = $(AWK) ' \
1374 function fatal(msg) \
1375 { \
1376   print "fatal: making $@: " msg | "cat >&2"; \
1377   exit 1; \
1378 } \
1379 function rst_section(header) \
1380 { \
1381   print header; \
1382   len = length(header); \
1383   for (i = 1; i <= len; i = i + 1) \
1384     printf "="; \
1385   printf "\n\n"; \
1386 } \
1387 { \
1388   copy_in_global_log = 1; \
1389   global_test_result = "RUN"; \
1390   while ((rc = (getline line < ($$0 ".trs"))) != 0) \
1391     { \
1392       if (rc < 0) \
1393          fatal("failed to read from " $$0 ".trs"); \
1394       if (line ~ /$(am__global_test_result_rx)/) \
1395         { \
1396           sub("$(am__global_test_result_rx)", "", line); \
1397           sub("[        ]*$$", "", line); \
1398           global_test_result = line; \
1399         } \
1400       else if (line ~ /$(am__copy_in_global_log_rx)[nN][oO]/) \
1401         copy_in_global_log = 0; \
1402     }; \
1403   if (copy_in_global_log) \
1404     { \
1405       rst_section(global_test_result ": " $$0); \
1406       while ((rc = (getline line < ($$0 ".log"))) != 0) \
1407       { \
1408         if (rc < 0) \
1409           fatal("failed to read from " $$0 ".log"); \
1410         print line; \
1411       }; \
1412       printf "\n"; \
1413     }; \
1414   close ($$0 ".trs"); \
1415   close ($$0 ".log"); \
1416 }'
1417 # Restructured Text title.
1418 am__rst_title = { sed 's/.*/   &   /;h;s/./=/g;p;x;s/ *$$//;p;g' && echo; }
1419 # Solaris 10 'make', and several other traditional 'make' implementations,
1420 # pass "-e" to $(SHELL), and POSIX 2008 even requires this.  Work around it
1421 # by disabling -e (using the XSI extension "set +e") if it's set.
1422 am__sh_e_setup = case $$- in *e*) set +e;; esac
1423 # Default flags passed to test drivers.
1424 am__common_driver_flags = \
1425   --color-tests "$$am__color_tests" \
1426   --enable-hard-errors "$$am__enable_hard_errors" \
1427   --expect-failure "$$am__expect_failure"
1428 # To be inserted before the command running the test.  Creates the
1429 # directory for the log if needed.  Stores in $dir the directory
1430 # containing $f, in $tst the test, in $log the log.  Executes the
1431 # developer- defined test setup AM_TESTS_ENVIRONMENT (if any), and
1432 # passes TESTS_ENVIRONMENT.  Set up options for the wrapper that
1433 # will run the test scripts (or their associated LOG_COMPILER, if
1434 # thy have one).
1435 am__check_pre = \
1436 $(am__sh_e_setup);                                      \
1437 $(am__vpath_adj_setup) $(am__vpath_adj)                 \
1438 $(am__tty_colors);                                      \
1439 srcdir=$(srcdir); export srcdir;                        \
1440 case "$@" in                                            \
1441   */*) am__odir=`echo "./$@" | sed 's|/[^/]*$$||'`;;    \
1442     *) am__odir=.;;                                     \
1443 esac;                                                   \
1444 test "x$$am__odir" = x"." || test -d "$$am__odir"       \
1445   || $(MKDIR_P) "$$am__odir" || exit $$?;               \
1446 if test -f "./$$f"; then dir=./;                        \
1447 elif test -f "$$f"; then dir=;                          \
1448 else dir="$(srcdir)/"; fi;                              \
1449 tst=$$dir$$f; log='$@';                                 \
1450 if test -n '$(DISABLE_HARD_ERRORS)'; then               \
1451   am__enable_hard_errors=no;                            \
1452 else                                                    \
1453   am__enable_hard_errors=yes;                           \
1454 fi;                                                     \
1455 case " $(XFAIL_TESTS) " in                              \
1456   *[\ \ ]$$f[\ \        ]* | *[\ \      ]$$dir$$f[\ \   ]*) \
1457     am__expect_failure=yes;;                            \
1458   *)                                                    \
1459     am__expect_failure=no;;                             \
1460 esac;                                                   \
1461 $(AM_TESTS_ENVIRONMENT) $(TESTS_ENVIRONMENT)
1462 # A shell command to get the names of the tests scripts with any registered
1463 # extension removed (i.e., equivalently, the names of the test logs, with
1464 # the '.log' extension removed).  The result is saved in the shell variable
1465 # '$bases'.  This honors runtime overriding of TESTS and TEST_LOGS.  Sadly,
1466 # we cannot use something simpler, involving e.g., "$(TEST_LOGS:.log=)",
1467 # since that might cause problem with VPATH rewrites for suffix-less tests.
1468 # See also 'test-harness-vpath-rewrite.sh' and 'test-trs-basic.sh'.
1469 am__set_TESTS_bases = \
1470   bases='$(TEST_LOGS)'; \
1471   bases=`for i in $$bases; do echo $$i; done | sed 's/\.log$$//'`; \
1472   bases=`echo $$bases`
1473 RECHECK_LOGS = $(TEST_LOGS)
1474 TEST_SUITE_LOG = test-suite.log
1475 TEST_EXTENSIONS = @EXEEXT@ .test
1476 LOG_DRIVER = $(SHELL) $(top_srcdir)/../test-driver
1477 LOG_COMPILE = $(LOG_COMPILER) $(AM_LOG_FLAGS) $(LOG_FLAGS)
1478 am__set_b = \
1479   case '$@' in \
1480     */*) \
1481       case '$*' in \
1482         */*) b='$*';; \
1483           *) b=`echo '$@' | sed 's/\.log$$//'`; \
1484        esac;; \
1485     *) \
1486       b='$*';; \
1487   esac
1488 am__test_logs1 = $(TESTS:=.log)
1489 am__test_logs2 = $(am__test_logs1:@EXEEXT@.log=.log)
1490 TEST_LOGS = $(am__test_logs2:.test.log=.log)
1491 TEST_LOG_DRIVER = $(SHELL) $(top_srcdir)/../test-driver
1492 TEST_LOG_COMPILE = $(TEST_LOG_COMPILER) $(AM_TEST_LOG_FLAGS) \
1493         $(TEST_LOG_FLAGS)
1494 DIST_SUBDIRS = $(SUBDIRS)
1495 ACLOCAL = @ACLOCAL@
1496 AMTAR = @AMTAR@
1497 AM_DEFAULT_VERBOSITY = @AM_DEFAULT_VERBOSITY@
1498 AR = @AR@
1499 AR_FOR_BUILD = @AR_FOR_BUILD@
1500 AS_FOR_TARGET = @AS_FOR_TARGET@
1501 AS_FOR_TARGET_AARCH64 = @AS_FOR_TARGET_AARCH64@
1502 AS_FOR_TARGET_ARM = @AS_FOR_TARGET_ARM@
1503 AS_FOR_TARGET_AVR = @AS_FOR_TARGET_AVR@
1504 AS_FOR_TARGET_BFIN = @AS_FOR_TARGET_BFIN@
1505 AS_FOR_TARGET_BPF = @AS_FOR_TARGET_BPF@
1506 AS_FOR_TARGET_CR16 = @AS_FOR_TARGET_CR16@
1507 AS_FOR_TARGET_CRIS = @AS_FOR_TARGET_CRIS@
1508 AS_FOR_TARGET_D10V = @AS_FOR_TARGET_D10V@
1509 AS_FOR_TARGET_ERC32 = @AS_FOR_TARGET_ERC32@
1510 AS_FOR_TARGET_EXAMPLE_SYNACOR = @AS_FOR_TARGET_EXAMPLE_SYNACOR@
1511 AS_FOR_TARGET_FRV = @AS_FOR_TARGET_FRV@
1512 AS_FOR_TARGET_FT32 = @AS_FOR_TARGET_FT32@
1513 AS_FOR_TARGET_H8300 = @AS_FOR_TARGET_H8300@
1514 AS_FOR_TARGET_IQ2000 = @AS_FOR_TARGET_IQ2000@
1515 AS_FOR_TARGET_LM32 = @AS_FOR_TARGET_LM32@
1516 AS_FOR_TARGET_M32C = @AS_FOR_TARGET_M32C@
1517 AS_FOR_TARGET_M32R = @AS_FOR_TARGET_M32R@
1518 AS_FOR_TARGET_M68HC11 = @AS_FOR_TARGET_M68HC11@
1519 AS_FOR_TARGET_MCORE = @AS_FOR_TARGET_MCORE@
1520 AS_FOR_TARGET_MICROBLAZE = @AS_FOR_TARGET_MICROBLAZE@
1521 AS_FOR_TARGET_MIPS = @AS_FOR_TARGET_MIPS@
1522 AS_FOR_TARGET_MN10300 = @AS_FOR_TARGET_MN10300@
1523 AS_FOR_TARGET_MOXIE = @AS_FOR_TARGET_MOXIE@
1524 AS_FOR_TARGET_MSP430 = @AS_FOR_TARGET_MSP430@
1525 AS_FOR_TARGET_OR1K = @AS_FOR_TARGET_OR1K@
1526 AS_FOR_TARGET_PPC = @AS_FOR_TARGET_PPC@
1527 AS_FOR_TARGET_PRU = @AS_FOR_TARGET_PRU@
1528 AS_FOR_TARGET_RISCV = @AS_FOR_TARGET_RISCV@
1529 AS_FOR_TARGET_RL78 = @AS_FOR_TARGET_RL78@
1530 AS_FOR_TARGET_RX = @AS_FOR_TARGET_RX@
1531 AS_FOR_TARGET_SH = @AS_FOR_TARGET_SH@
1532 AS_FOR_TARGET_V850 = @AS_FOR_TARGET_V850@
1533 AUTOCONF = @AUTOCONF@
1534 AUTOHEADER = @AUTOHEADER@
1535 AUTOMAKE = @AUTOMAKE@
1536 AWK = @AWK@
1537 CC = @CC@
1538 CCDEPMODE = @CCDEPMODE@
1539 CC_FOR_BUILD = @CC_FOR_BUILD@
1540 CC_FOR_TARGET = @CC_FOR_TARGET@
1541 CC_FOR_TARGET_AARCH64 = @CC_FOR_TARGET_AARCH64@
1542 CC_FOR_TARGET_ARM = @CC_FOR_TARGET_ARM@
1543 CC_FOR_TARGET_AVR = @CC_FOR_TARGET_AVR@
1544 CC_FOR_TARGET_BFIN = @CC_FOR_TARGET_BFIN@
1545 CC_FOR_TARGET_BPF = @CC_FOR_TARGET_BPF@
1546 CC_FOR_TARGET_CR16 = @CC_FOR_TARGET_CR16@
1547 CC_FOR_TARGET_CRIS = @CC_FOR_TARGET_CRIS@
1548 CC_FOR_TARGET_D10V = @CC_FOR_TARGET_D10V@
1549 CC_FOR_TARGET_ERC32 = @CC_FOR_TARGET_ERC32@
1550 CC_FOR_TARGET_EXAMPLE_SYNACOR = @CC_FOR_TARGET_EXAMPLE_SYNACOR@
1551 CC_FOR_TARGET_FRV = @CC_FOR_TARGET_FRV@
1552 CC_FOR_TARGET_FT32 = @CC_FOR_TARGET_FT32@
1553 CC_FOR_TARGET_H8300 = @CC_FOR_TARGET_H8300@
1554 CC_FOR_TARGET_IQ2000 = @CC_FOR_TARGET_IQ2000@
1555 CC_FOR_TARGET_LM32 = @CC_FOR_TARGET_LM32@
1556 CC_FOR_TARGET_M32C = @CC_FOR_TARGET_M32C@
1557 CC_FOR_TARGET_M32R = @CC_FOR_TARGET_M32R@
1558 CC_FOR_TARGET_M68HC11 = @CC_FOR_TARGET_M68HC11@
1559 CC_FOR_TARGET_MCORE = @CC_FOR_TARGET_MCORE@
1560 CC_FOR_TARGET_MICROBLAZE = @CC_FOR_TARGET_MICROBLAZE@
1561 CC_FOR_TARGET_MIPS = @CC_FOR_TARGET_MIPS@
1562 CC_FOR_TARGET_MN10300 = @CC_FOR_TARGET_MN10300@
1563 CC_FOR_TARGET_MOXIE = @CC_FOR_TARGET_MOXIE@
1564 CC_FOR_TARGET_MSP430 = @CC_FOR_TARGET_MSP430@
1565 CC_FOR_TARGET_OR1K = @CC_FOR_TARGET_OR1K@
1566 CC_FOR_TARGET_PPC = @CC_FOR_TARGET_PPC@
1567 CC_FOR_TARGET_PRU = @CC_FOR_TARGET_PRU@
1568 CC_FOR_TARGET_RISCV = @CC_FOR_TARGET_RISCV@
1569 CC_FOR_TARGET_RL78 = @CC_FOR_TARGET_RL78@
1570 CC_FOR_TARGET_RX = @CC_FOR_TARGET_RX@
1571 CC_FOR_TARGET_SH = @CC_FOR_TARGET_SH@
1572 CC_FOR_TARGET_V850 = @CC_FOR_TARGET_V850@
1573 CFLAGS = @CFLAGS@
1574 CFLAGS_FOR_BUILD = @CFLAGS_FOR_BUILD@
1575 CGEN_MAINT = @CGEN_MAINT@
1576 CPP = @CPP@
1577 CPPFLAGS = @CPPFLAGS@
1578 CPPFLAGS_FOR_BUILD = @CPPFLAGS_FOR_BUILD@
1579 CYGPATH_W = @CYGPATH_W@
1580 C_DIALECT = @C_DIALECT@
1581 DEFS = @DEFS@
1582 DEPDIR = @DEPDIR@
1583 DSYMUTIL = @DSYMUTIL@
1584 DTC = @DTC@
1585 DUMPBIN = @DUMPBIN@
1586 ECHO_C = @ECHO_C@
1587 ECHO_N = @ECHO_N@
1588 ECHO_T = @ECHO_T@
1589 EGREP = @EGREP@
1590 EXEEXT = @EXEEXT@
1591 FGREP = @FGREP@
1592 GREP = @GREP@
1593 IGEN_FLAGS_SMP = @IGEN_FLAGS_SMP@
1594 INSTALL = @INSTALL@
1595 INSTALL_DATA = @INSTALL_DATA@
1596 INSTALL_PROGRAM = @INSTALL_PROGRAM@
1597 INSTALL_SCRIPT = @INSTALL_SCRIPT@
1598 INSTALL_STRIP_PROGRAM = @INSTALL_STRIP_PROGRAM@
1599 LD = @LD@
1600 LDFLAGS = @LDFLAGS@
1601 LDFLAGS_FOR_BUILD = @LDFLAGS_FOR_BUILD@
1602 LD_FOR_TARGET = @LD_FOR_TARGET@
1603 LD_FOR_TARGET_AARCH64 = @LD_FOR_TARGET_AARCH64@
1604 LD_FOR_TARGET_ARM = @LD_FOR_TARGET_ARM@
1605 LD_FOR_TARGET_AVR = @LD_FOR_TARGET_AVR@
1606 LD_FOR_TARGET_BFIN = @LD_FOR_TARGET_BFIN@
1607 LD_FOR_TARGET_BPF = @LD_FOR_TARGET_BPF@
1608 LD_FOR_TARGET_CR16 = @LD_FOR_TARGET_CR16@
1609 LD_FOR_TARGET_CRIS = @LD_FOR_TARGET_CRIS@
1610 LD_FOR_TARGET_D10V = @LD_FOR_TARGET_D10V@
1611 LD_FOR_TARGET_ERC32 = @LD_FOR_TARGET_ERC32@
1612 LD_FOR_TARGET_EXAMPLE_SYNACOR = @LD_FOR_TARGET_EXAMPLE_SYNACOR@
1613 LD_FOR_TARGET_FRV = @LD_FOR_TARGET_FRV@
1614 LD_FOR_TARGET_FT32 = @LD_FOR_TARGET_FT32@
1615 LD_FOR_TARGET_H8300 = @LD_FOR_TARGET_H8300@
1616 LD_FOR_TARGET_IQ2000 = @LD_FOR_TARGET_IQ2000@
1617 LD_FOR_TARGET_LM32 = @LD_FOR_TARGET_LM32@
1618 LD_FOR_TARGET_M32C = @LD_FOR_TARGET_M32C@
1619 LD_FOR_TARGET_M32R = @LD_FOR_TARGET_M32R@
1620 LD_FOR_TARGET_M68HC11 = @LD_FOR_TARGET_M68HC11@
1621 LD_FOR_TARGET_MCORE = @LD_FOR_TARGET_MCORE@
1622 LD_FOR_TARGET_MICROBLAZE = @LD_FOR_TARGET_MICROBLAZE@
1623 LD_FOR_TARGET_MIPS = @LD_FOR_TARGET_MIPS@
1624 LD_FOR_TARGET_MN10300 = @LD_FOR_TARGET_MN10300@
1625 LD_FOR_TARGET_MOXIE = @LD_FOR_TARGET_MOXIE@
1626 LD_FOR_TARGET_MSP430 = @LD_FOR_TARGET_MSP430@
1627 LD_FOR_TARGET_OR1K = @LD_FOR_TARGET_OR1K@
1628 LD_FOR_TARGET_PPC = @LD_FOR_TARGET_PPC@
1629 LD_FOR_TARGET_PRU = @LD_FOR_TARGET_PRU@
1630 LD_FOR_TARGET_RISCV = @LD_FOR_TARGET_RISCV@
1631 LD_FOR_TARGET_RL78 = @LD_FOR_TARGET_RL78@
1632 LD_FOR_TARGET_RX = @LD_FOR_TARGET_RX@
1633 LD_FOR_TARGET_SH = @LD_FOR_TARGET_SH@
1634 LD_FOR_TARGET_V850 = @LD_FOR_TARGET_V850@
1635 LIBOBJS = @LIBOBJS@
1636 LIBS = @LIBS@
1637 LIBTOOL = @LIBTOOL@
1638 LIPO = @LIPO@
1639 LN_S = @LN_S@
1640 LTLIBOBJS = @LTLIBOBJS@
1641 MAINT = @MAINT@
1642 MAKEINFO = @MAKEINFO@
1643 MKDIR_P = @MKDIR_P@
1644 NM = @NM@
1645 NMEDIT = @NMEDIT@
1646 OBJDUMP = @OBJDUMP@
1647 OBJEXT = @OBJEXT@
1648 OTOOL = @OTOOL@
1649 OTOOL64 = @OTOOL64@
1650 PACKAGE = @PACKAGE@
1651 PACKAGE_BUGREPORT = @PACKAGE_BUGREPORT@
1652 PACKAGE_NAME = @PACKAGE_NAME@
1653 PACKAGE_STRING = @PACKAGE_STRING@
1654 PACKAGE_TARNAME = @PACKAGE_TARNAME@
1655 PACKAGE_URL = @PACKAGE_URL@
1656 PACKAGE_VERSION = @PACKAGE_VERSION@
1657 PATH_SEPARATOR = @PATH_SEPARATOR@
1658 PKGVERSION = @PKGVERSION@
1659 PKG_CONFIG = @PKG_CONFIG@
1660 PKG_CONFIG_LIBDIR = @PKG_CONFIG_LIBDIR@
1661 PKG_CONFIG_PATH = @PKG_CONFIG_PATH@
1662 RANLIB = @RANLIB@
1663 RANLIB_FOR_BUILD = @RANLIB_FOR_BUILD@
1664 READLINE_CFLAGS = @READLINE_CFLAGS@
1665 READLINE_LIB = @READLINE_LIB@
1666 REPORT_BUGS_TEXI = @REPORT_BUGS_TEXI@
1667 REPORT_BUGS_TO = @REPORT_BUGS_TO@
1668 SDL_CFLAGS = @SDL_CFLAGS@
1669 SDL_LIBS = @SDL_LIBS@
1670 SED = @SED@
1671 SET_MAKE = @SET_MAKE@
1672 SHELL = @SHELL@
1673 SIM_COMMON_BUILD_FALSE = @SIM_COMMON_BUILD_FALSE@
1674 SIM_COMMON_BUILD_TRUE = @SIM_COMMON_BUILD_TRUE@
1675 SIM_ENABLED_ARCHES = @SIM_ENABLED_ARCHES@
1676 SIM_FRV_TRAPDUMP_FLAGS = @SIM_FRV_TRAPDUMP_FLAGS@
1677 SIM_HW_CFLAGS = @SIM_HW_CFLAGS@
1678 SIM_HW_SOCKSER = @SIM_HW_SOCKSER@
1679 SIM_INLINE = @SIM_INLINE@
1680 SIM_MIPS_BITSIZE = @SIM_MIPS_BITSIZE@
1681 SIM_MIPS_FPU_BITSIZE = @SIM_MIPS_FPU_BITSIZE@
1682 SIM_MIPS_GEN = @SIM_MIPS_GEN@
1683 SIM_MIPS_IGEN_ITABLE_FLAGS = @SIM_MIPS_IGEN_ITABLE_FLAGS@
1684 SIM_MIPS_M16_FLAGS = @SIM_MIPS_M16_FLAGS@
1685 SIM_MIPS_MULTI_IGEN_CONFIGS = @SIM_MIPS_MULTI_IGEN_CONFIGS@
1686 SIM_MIPS_MULTI_OBJ = @SIM_MIPS_MULTI_OBJ@
1687 SIM_MIPS_MULTI_SRC = @SIM_MIPS_MULTI_SRC@
1688 SIM_MIPS_SINGLE_FLAGS = @SIM_MIPS_SINGLE_FLAGS@
1689 SIM_MIPS_SUBTARGET = @SIM_MIPS_SUBTARGET@
1690 SIM_PRIMARY_TARGET = @SIM_PRIMARY_TARGET@
1691 SIM_RISCV_BITSIZE = @SIM_RISCV_BITSIZE@
1692 SIM_RX_CYCLE_ACCURATE_FLAGS = @SIM_RX_CYCLE_ACCURATE_FLAGS@
1693 SIM_SUBDIRS = @SIM_SUBDIRS@
1694 SIM_TOOLCHAIN_VARS = @SIM_TOOLCHAIN_VARS@
1695 STRIP = @STRIP@
1696 TERMCAP_LIB = @TERMCAP_LIB@
1697 VERSION = @VERSION@
1698 WARN_CFLAGS = @WARN_CFLAGS@
1699 WERROR_CFLAGS = @WERROR_CFLAGS@
1700 abs_builddir = @abs_builddir@
1701 abs_srcdir = @abs_srcdir@
1702 abs_top_builddir = @abs_top_builddir@
1703 abs_top_srcdir = @abs_top_srcdir@
1704 ac_ct_CC = @ac_ct_CC@
1705 ac_ct_DUMPBIN = @ac_ct_DUMPBIN@
1706 am__include = @am__include@
1707 am__leading_dot = @am__leading_dot@
1708 am__quote = @am__quote@
1709 am__tar = @am__tar@
1710 am__untar = @am__untar@
1711 bindir = @bindir@
1712 build = @build@
1713 build_alias = @build_alias@
1714 build_cpu = @build_cpu@
1715 build_os = @build_os@
1716 build_vendor = @build_vendor@
1717 builddir = @builddir@
1718 cgen = @cgen@
1719 cgendir = @cgendir@
1720 datadir = @datadir@
1721 datarootdir = @datarootdir@
1722 docdir = @docdir@
1723 dvidir = @dvidir@
1724 exec_prefix = @exec_prefix@
1725 host = @host@
1726 host_alias = @host_alias@
1727 host_cpu = @host_cpu@
1728 host_os = @host_os@
1729 host_vendor = @host_vendor@
1730 htmldir = @htmldir@
1731 includedir = @includedir@
1732 infodir = @infodir@
1733 install_sh = @install_sh@
1734 libdir = @libdir@
1735 libexecdir = @libexecdir@
1736 localedir = @localedir@
1737 localstatedir = @localstatedir@
1738 mandir = @mandir@
1739 mkdir_p = @mkdir_p@
1740 oldincludedir = @oldincludedir@
1741 pdfdir = @pdfdir@
1742 prefix = @prefix@
1743 program_transform_name = @program_transform_name@
1744 psdir = @psdir@
1745 sbindir = @sbindir@
1746 sharedstatedir = @sharedstatedir@
1747 sim_bitsize = @sim_bitsize@
1748 sim_float = @sim_float@
1749 srcdir = @srcdir@
1750 subdirs = @subdirs@
1751 sysconfdir = @sysconfdir@
1752 target = @target@
1753 target_alias = @target_alias@
1754 target_cpu = @target_cpu@
1755 target_os = @target_os@
1756 target_vendor = @target_vendor@
1757 top_build_prefix = @top_build_prefix@
1758 top_builddir = @top_builddir@
1759 top_srcdir = @top_srcdir@
1760 AUTOMAKE_OPTIONS = dejagnu foreign no-dist subdir-objects
1761 ACLOCAL_AMFLAGS = -Im4 -I.. -I../config
1762 GNULIB_PARENT_DIR = ..
1763 srccom = $(srcdir)/common
1764 srcroot = $(srcdir)/..
1765 SUBDIRS = @subdirs@ $(SIM_SUBDIRS)
1766 AM_MAKEFLAGS = SIM_NEW_COMMON_OBJS_="$(SIM_NEW_COMMON_OBJS)" \
1767         $(am__append_3) $(am__append_16) $(am__append_30) \
1768         $(am__append_63) $(am__append_74) $(am__append_80) \
1769         $(am__append_93) $(am__append_103)
1770 pkginclude_HEADERS = $(am__append_1)
1771 noinst_LIBRARIES = common/libcommon.a $(am__append_5) $(am__append_8) \
1772         $(am__append_10) $(am__append_12) $(am__append_14) \
1773         $(am__append_17) $(am__append_22) $(am__append_28) \
1774         $(am__append_35) $(am__append_41) $(am__append_45) \
1775         $(am__append_47) $(am__append_52) $(am__append_54) \
1776         $(am__append_56) $(am__append_61) $(am__append_67) \
1777         $(am__append_72) $(am__append_78) $(am__append_84) \
1778         $(am__append_86) $(am__append_91) $(am__append_101) \
1779         $(am__append_107) $(am__append_109) $(am__append_111) \
1780         $(am__append_117) $(am__append_119) $(am__append_121) \
1781         $(am__append_123) $(am__append_125) $(am__append_131)
1782 BUILT_SOURCES = $(am__append_19) $(am__append_24) $(am__append_32) \
1783         $(am__append_37) $(am__append_49) $(am__append_58) \
1784         $(am__append_64) $(am__append_75) $(am__append_94) \
1785         $(am__append_104) $(am__append_113) $(am__append_127) \
1786         $(am__append_133)
1787 CLEANFILES = common/version.c common/version.c-stamp \
1788         testsuite/common/bits-gen testsuite/common/bits32m0.c \
1789         testsuite/common/bits32m31.c testsuite/common/bits64m0.c \
1790         testsuite/common/bits64m63.c
1791 DISTCLEANFILES = $(am__append_100)
1792 MOSTLYCLEANFILES = core $(SIM_ENABLED_ARCHES:%=%/*.o) \
1793         $(common_HW_CONFIG_H_TARGETS) $(patsubst \
1794         %,%/stamp-hw,$(SIM_ENABLED_ARCHES)) \
1795         $(common_GEN_MODULES_C_TARGETS) $(patsubst \
1796         %,%/stamp-modules,$(SIM_ENABLED_ARCHES)) $(am__append_7) \
1797         site-sim-config.exp testrun.log testrun.sum $(am__append_21) \
1798         $(am__append_27) $(am__append_34) $(am__append_40) \
1799         $(am__append_51) $(am__append_60) $(am__append_66) \
1800         $(am__append_71) $(am__append_77) $(am__append_83) \
1801         $(am__append_99) $(am__append_106) $(am__append_115) \
1802         $(am__append_130) $(am__append_135)
1803 AM_CFLAGS = \
1804         $(WERROR_CFLAGS) \
1805         $(WARN_CFLAGS) \
1806         $(AM_CFLAGS_$(subst -,_,$(@D))) \
1807         $(AM_CFLAGS_$(subst -,_,$(@D)_$(@F)))
1808
1809 AM_CPPFLAGS = $(INCGNU) -I$(srcroot) -I$(srcroot)/include -I../bfd \
1810         -I.. -I$(@D) -I$(srcdir)/$(@D) $(SIM_HW_CFLAGS) $(SIM_INLINE) \
1811         $(AM_CPPFLAGS_$(subst -,_,$(@D))) $(AM_CPPFLAGS_$(subst \
1812         -,_,$(@D)_$(@F))) -I$(srcdir)/common -DSIM_TOPDIR_BUILD
1813 AM_CPPFLAGS_FOR_BUILD = -I$(srcroot)/include $(SIM_HW_CFLAGS) \
1814         $(SIM_INLINE) -I$(srcdir)/common
1815 COMPILE_FOR_BUILD = $(CC_FOR_BUILD) $(AM_CPPFLAGS_FOR_BUILD) $(CPPFLAGS_FOR_BUILD) $(CFLAGS_FOR_BUILD)
1816 LINK_FOR_BUILD = $(CC_FOR_BUILD) $(CFLAGS_FOR_BUILD) $(LDFLAGS_FOR_BUILD) -o $@
1817 SIM_ALL_RECURSIVE_DEPS = common/libcommon.a \
1818         $(common_HW_CONFIG_H_TARGETS) $(common_GEN_MODULES_C_TARGETS) \
1819         $(am__append_4) $(am__append_20) $(am__append_25) \
1820         $(am__append_33) $(am__append_38) $(am__append_50) \
1821         $(am__append_59) $(am__append_65) $(am__append_69) \
1822         $(am__append_76) $(am__append_81) $(am__append_98) \
1823         $(am__append_105) $(am__append_114) $(am__append_128) \
1824         $(am__append_134)
1825 SIM_INSTALL_DATA_LOCAL_DEPS =
1826 SIM_INSTALL_EXEC_LOCAL_DEPS = $(am__append_43)
1827 SIM_UNINSTALL_LOCAL_DEPS = $(am__append_44)
1828 AM_CPPFLAGS_common = -DSIM_COMMON_BUILD
1829 common_libcommon_a_SOURCES = \
1830         common/callback.c \
1831         common/portability.c \
1832         common/sim-load.c \
1833         common/syscall.c \
1834         common/target-newlib-errno.c \
1835         common/target-newlib-open.c \
1836         common/target-newlib-signal.c \
1837         common/target-newlib-syscall.c \
1838         common/version.c
1839
1840 SIM_COMMON_HW_OBJS = \
1841         hw-alloc.o \
1842         hw-base.o \
1843         hw-device.o \
1844         hw-events.o \
1845         hw-handles.o \
1846         hw-instances.o \
1847         hw-ports.o \
1848         hw-properties.o \
1849         hw-tree.o \
1850         sim-hw.o
1851
1852 SIM_NEW_COMMON_OBJS = sim-arange.o sim-bits.o sim-close.o \
1853         sim-command.o sim-config.o sim-core.o sim-cpu.o sim-endian.o \
1854         sim-engine.o sim-events.o sim-fpu.o sim-hload.o sim-hrw.o \
1855         sim-io.o sim-info.o sim-memopt.o sim-model.o sim-module.o \
1856         sim-options.o sim-profile.o sim-reason.o sim-reg.o \
1857         sim-signal.o sim-stop.o sim-syscall.o sim-trace.o sim-utils.o \
1858         sim-watch.o $(am__append_2)
1859 SIM_HW_DEVICES = cfi core pal glue
1860 common_HW_CONFIG_H_TARGETS = $(patsubst %,%/hw-config.h,$(SIM_ENABLED_ARCHES))
1861 am_arch_d = $(subst -,_,$(@D))
1862 GEN_MODULES_C_SRCS = \
1863         $(wildcard \
1864                 $(patsubst %,$(srcdir)/%,$($(am_arch_d)_libsim_a_SOURCES)) \
1865                 $(patsubst %.o,$(srcdir)/%.c,$($(am_arch_d)_libsim_a_OBJECTS) $($(am_arch_d)_libsim_a_LIBADD)) \
1866                 $(filter-out %.o,$(patsubst $(@D)/%.o,$(srcdir)/common/%.c,$($(am_arch_d)_libsim_a_LIBADD))))
1867
1868 common_GEN_MODULES_C_TARGETS = $(patsubst %,%/modules.c,$(filter-out ppc,$(SIM_ENABLED_ARCHES)))
1869 LIBIBERTY_LIB = ../libiberty/libiberty.a
1870 BFD_LIB = ../bfd/libbfd.la
1871 OPCODES_LIB = ../opcodes/libopcodes.la
1872 SIM_COMMON_LIBS = \
1873         $(BFD_LIB) \
1874         $(OPCODES_LIB) \
1875         $(LIBIBERTY_LIB) \
1876         $(LIBGNU) \
1877         $(LIBGNU_EXTRA_LIBS)
1878
1879 GUILE = $(or $(wildcard ../guile/libguile/guile),guile)
1880 CGEN = "$(GUILE) -l $(cgendir)/guile.scm -s"
1881 CGENFLAGS = -v
1882 CGEN_CPU_DIR = $(cgendir)/cpu
1883 CPU_DIR = $(srcroot)/cpu
1884 CGEN_ARCHFILE = $(CPU_DIR)/$(@D).cpu
1885 CGEN_READ_SCM = $(cgendir)/sim.scm
1886 CGEN_ARCH_SCM = $(cgendir)/sim-arch.scm
1887 CGEN_CPU_SCM = $(cgendir)/sim-cpu.scm $(cgendir)/sim-model.scm
1888 CGEN_DECODE_SCM = $(cgendir)/sim-decode.scm
1889 CGEN_DESC_SCM = $(cgendir)/desc.scm $(cgendir)/desc-cpu.scm
1890 CGEN_CPU_EXTR = /extr/
1891 CGEN_CPU_READ = /read/
1892 CGEN_CPU_WRITE = /write/
1893 CGEN_CPU_SEM = /sem/
1894 CGEN_CPU_SEMSW = /semsw/
1895 CGEN_WRAPPER = $(srccom)/cgen.sh
1896 CGEN_GEN_ARCH = \
1897         $(SHELL) $(CGEN_WRAPPER) arch $(srcdir)/$(@D) \
1898                 $(CGEN) $(cgendir) "$(CGENFLAGS)" \
1899                 $(@D) "$$FLAGS" ignored "$$isa" $$mach ignored \
1900                 $(CGEN_ARCHFILE) ignored
1901
1902 CGEN_GEN_CPU = \
1903         $(SHELL) $(CGEN_WRAPPER) cpu $(srcdir)/$(@D) \
1904                 $(CGEN) $(cgendir) "$(CGENFLAGS)" \
1905                 $(@D) "$$FLAGS" $$cpu "$$isa" $$mach "$$SUFFIX" \
1906                 $(CGEN_ARCHFILE) "$$EXTRAFILES"
1907
1908 CGEN_GEN_DEFS = \
1909         $(SHELL) $(CGEN_WRAPPER) defs $(srcdir)/$(@D) \
1910                 $(CGEN) $(cgendir) "$(CGENFLAGS)" \
1911                 $(@D) "$$FLAGS" $$cpu "$$isa" $$mach "$$SUFFIX" \
1912                 $(CGEN_ARCHFILE) ignored
1913
1914 CGEN_GEN_DECODE = \
1915         $(SHELL) $(CGEN_WRAPPER) decode $(srcdir)/$(@D) \
1916                 $(CGEN) $(cgendir) "$(CGENFLAGS)" \
1917                 $(@D) "$$FLAGS" $$cpu "$$isa" $$mach "$$SUFFIX" \
1918                 $(CGEN_ARCHFILE) "$$EXTRAFILES"
1919
1920 CGEN_GEN_CPU_DECODE = \
1921         $(SHELL) $(CGEN_WRAPPER) cpu-decode $(srcdir)/$(@D) \
1922                 $(CGEN) $(cgendir) "$(CGENFLAGS)" \
1923                 $(@D) "$$FLAGS" $$cpu "$$isa" $$mach "$$SUFFIX" \
1924                 $(CGEN_ARCHFILE) "$$EXTRAFILES"
1925
1926 CGEN_GEN_CPU_DESC = \
1927         $(SHELL) $(CGEN_WRAPPER) desc $(srcdir)/$(@D) \
1928                 $(CGEN) $(cgendir) "$(CGENFLAGS)" \
1929                 $(@D) "$$FLAGS" $$cpu "$$isa" $$mach "$$SUFFIX" \
1930                 $(CGEN_ARCHFILE) ignored $$opcfile
1931
1932
1933 # igen leaks memory, and therefore makes AddressSanitizer unhappy.  Disable
1934 # leak detection while running it.
1935 @SIM_ENABLE_IGEN_TRUE@IGEN = igen/igen$(EXEEXT)
1936 @SIM_ENABLE_IGEN_TRUE@IGEN_RUN = ASAN_OPTIONS=detect_leaks=0 $(IGEN) $(IGEN_FLAGS_SMP)
1937 @SIM_ENABLE_IGEN_TRUE@igen_libigen_a_SOURCES = \
1938 @SIM_ENABLE_IGEN_TRUE@  igen/table.c \
1939 @SIM_ENABLE_IGEN_TRUE@  igen/lf.c \
1940 @SIM_ENABLE_IGEN_TRUE@  igen/misc.c \
1941 @SIM_ENABLE_IGEN_TRUE@  igen/filter_host.c \
1942 @SIM_ENABLE_IGEN_TRUE@  igen/ld-decode.c \
1943 @SIM_ENABLE_IGEN_TRUE@  igen/ld-cache.c \
1944 @SIM_ENABLE_IGEN_TRUE@  igen/filter.c \
1945 @SIM_ENABLE_IGEN_TRUE@  igen/ld-insn.c \
1946 @SIM_ENABLE_IGEN_TRUE@  igen/gen-model.c \
1947 @SIM_ENABLE_IGEN_TRUE@  igen/gen-itable.c \
1948 @SIM_ENABLE_IGEN_TRUE@  igen/gen-icache.c \
1949 @SIM_ENABLE_IGEN_TRUE@  igen/gen-semantics.c \
1950 @SIM_ENABLE_IGEN_TRUE@  igen/gen-idecode.c \
1951 @SIM_ENABLE_IGEN_TRUE@  igen/gen-support.c \
1952 @SIM_ENABLE_IGEN_TRUE@  igen/gen-engine.c \
1953 @SIM_ENABLE_IGEN_TRUE@  igen/gen.c
1954
1955 @SIM_ENABLE_IGEN_TRUE@igen_igen_SOURCES = igen/igen.c
1956 @SIM_ENABLE_IGEN_TRUE@igen_igen_LDADD = igen/libigen.a
1957 @SIM_ENABLE_IGEN_TRUE@igen_filter_SOURCES =
1958 @SIM_ENABLE_IGEN_TRUE@igen_filter_LDADD = igen/filter-main.o igen/libigen.a
1959 @SIM_ENABLE_IGEN_TRUE@igen_gen_SOURCES =
1960 @SIM_ENABLE_IGEN_TRUE@igen_gen_LDADD = igen/gen-main.o igen/libigen.a
1961 @SIM_ENABLE_IGEN_TRUE@igen_ld_cache_SOURCES =
1962 @SIM_ENABLE_IGEN_TRUE@igen_ld_cache_LDADD = igen/ld-cache-main.o igen/libigen.a
1963 @SIM_ENABLE_IGEN_TRUE@igen_ld_decode_SOURCES =
1964 @SIM_ENABLE_IGEN_TRUE@igen_ld_decode_LDADD = igen/ld-decode-main.o igen/libigen.a
1965 @SIM_ENABLE_IGEN_TRUE@igen_ld_insn_SOURCES =
1966 @SIM_ENABLE_IGEN_TRUE@igen_ld_insn_LDADD = igen/ld-insn-main.o igen/libigen.a
1967 @SIM_ENABLE_IGEN_TRUE@igen_table_SOURCES =
1968 @SIM_ENABLE_IGEN_TRUE@igen_table_LDADD = igen/table-main.o igen/libigen.a
1969 @SIM_ENABLE_IGEN_TRUE@igen_IGEN_TOOLS = \
1970 @SIM_ENABLE_IGEN_TRUE@  $(IGEN) \
1971 @SIM_ENABLE_IGEN_TRUE@  igen/filter \
1972 @SIM_ENABLE_IGEN_TRUE@  igen/gen \
1973 @SIM_ENABLE_IGEN_TRUE@  igen/ld-cache \
1974 @SIM_ENABLE_IGEN_TRUE@  igen/ld-decode \
1975 @SIM_ENABLE_IGEN_TRUE@  igen/ld-insn \
1976 @SIM_ENABLE_IGEN_TRUE@  igen/table
1977
1978 EXTRA_DEJAGNU_SITE_CONFIG = site-sim-config.exp
1979
1980 # Custom verbose test variables that automake doesn't provide (yet?).
1981 AM_V_RUNTEST = $(AM_V_RUNTEST_@AM_V@)
1982 AM_V_RUNTEST_ = $(AM_V_RUNTEST_@AM_DEFAULT_V@)
1983 AM_V_RUNTEST_0 = @echo "  RUNTEST  $(RUNTESTFLAGS) $*";
1984 AM_V_RUNTEST_1 =
1985 DO_RUNTEST = \
1986         LC_ALL=C; export LC_ALL; \
1987         EXPECT=${EXPECT} ; export EXPECT ; \
1988         runtest=$(RUNTEST); \
1989         $$runtest $(RUNTESTFLAGS)
1990
1991 testsuite_common_CPPFLAGS = \
1992         -I$(srcdir)/common \
1993         -I$(srcroot)/include \
1994         -I../bfd
1995
1996 @SIM_ENABLE_ARCH_aarch64_TRUE@aarch64_libsim_a_SOURCES =
1997 @SIM_ENABLE_ARCH_aarch64_TRUE@aarch64_libsim_a_LIBADD = \
1998 @SIM_ENABLE_ARCH_aarch64_TRUE@  $(common_libcommon_a_OBJECTS) \
1999 @SIM_ENABLE_ARCH_aarch64_TRUE@  $(patsubst %,aarch64/%,$(SIM_NEW_COMMON_OBJS)) \
2000 @SIM_ENABLE_ARCH_aarch64_TRUE@  $(patsubst %,aarch64/dv-%.o,$(SIM_HW_DEVICES)) \
2001 @SIM_ENABLE_ARCH_aarch64_TRUE@  aarch64/cpustate.o \
2002 @SIM_ENABLE_ARCH_aarch64_TRUE@  aarch64/interp.o \
2003 @SIM_ENABLE_ARCH_aarch64_TRUE@  aarch64/memory.o \
2004 @SIM_ENABLE_ARCH_aarch64_TRUE@  aarch64/modules.o \
2005 @SIM_ENABLE_ARCH_aarch64_TRUE@  aarch64/sim-resume.o \
2006 @SIM_ENABLE_ARCH_aarch64_TRUE@  aarch64/simulator.o
2007
2008 @SIM_ENABLE_ARCH_aarch64_TRUE@aarch64_run_SOURCES =
2009 @SIM_ENABLE_ARCH_aarch64_TRUE@aarch64_run_LDADD = \
2010 @SIM_ENABLE_ARCH_aarch64_TRUE@  aarch64/nrun.o \
2011 @SIM_ENABLE_ARCH_aarch64_TRUE@  aarch64/libsim.a \
2012 @SIM_ENABLE_ARCH_aarch64_TRUE@  $(SIM_COMMON_LIBS)
2013
2014 @SIM_ENABLE_ARCH_arm_TRUE@AM_CPPFLAGS_arm = -DMODET
2015 @SIM_ENABLE_ARCH_arm_TRUE@arm_libsim_a_SOURCES =
2016 @SIM_ENABLE_ARCH_arm_TRUE@arm_libsim_a_LIBADD = \
2017 @SIM_ENABLE_ARCH_arm_TRUE@      $(common_libcommon_a_OBJECTS) \
2018 @SIM_ENABLE_ARCH_arm_TRUE@      arm/wrapper.o \
2019 @SIM_ENABLE_ARCH_arm_TRUE@      $(patsubst %,arm/%,$(SIM_NEW_COMMON_OBJS)) \
2020 @SIM_ENABLE_ARCH_arm_TRUE@      $(patsubst %,arm/dv-%.o,$(SIM_HW_DEVICES)) \
2021 @SIM_ENABLE_ARCH_arm_TRUE@      arm/armemu.o \
2022 @SIM_ENABLE_ARCH_arm_TRUE@      arm/armemu32.o arm/arminit.o arm/armos.o arm/armsupp.o \
2023 @SIM_ENABLE_ARCH_arm_TRUE@      arm/armvirt.o arm/thumbemu.o \
2024 @SIM_ENABLE_ARCH_arm_TRUE@      arm/armcopro.o arm/maverick.o arm/iwmmxt.o \
2025 @SIM_ENABLE_ARCH_arm_TRUE@      arm/modules.o
2026
2027 @SIM_ENABLE_ARCH_arm_TRUE@arm_run_SOURCES =
2028 @SIM_ENABLE_ARCH_arm_TRUE@arm_run_LDADD = \
2029 @SIM_ENABLE_ARCH_arm_TRUE@      arm/nrun.o \
2030 @SIM_ENABLE_ARCH_arm_TRUE@      arm/libsim.a \
2031 @SIM_ENABLE_ARCH_arm_TRUE@      $(SIM_COMMON_LIBS)
2032
2033 @SIM_ENABLE_ARCH_arm_TRUE@armdocdir = $(docdir)/arm
2034 @SIM_ENABLE_ARCH_arm_TRUE@armdoc_DATA = arm/README
2035 @SIM_ENABLE_ARCH_avr_TRUE@avr_libsim_a_SOURCES =
2036 @SIM_ENABLE_ARCH_avr_TRUE@avr_libsim_a_LIBADD = \
2037 @SIM_ENABLE_ARCH_avr_TRUE@      $(common_libcommon_a_OBJECTS) \
2038 @SIM_ENABLE_ARCH_avr_TRUE@      avr/interp.o \
2039 @SIM_ENABLE_ARCH_avr_TRUE@      $(patsubst %,avr/%,$(SIM_NEW_COMMON_OBJS)) \
2040 @SIM_ENABLE_ARCH_avr_TRUE@      $(patsubst %,avr/dv-%.o,$(SIM_HW_DEVICES)) \
2041 @SIM_ENABLE_ARCH_avr_TRUE@      avr/modules.o \
2042 @SIM_ENABLE_ARCH_avr_TRUE@      avr/sim-resume.o
2043
2044 @SIM_ENABLE_ARCH_avr_TRUE@avr_run_SOURCES =
2045 @SIM_ENABLE_ARCH_avr_TRUE@avr_run_LDADD = \
2046 @SIM_ENABLE_ARCH_avr_TRUE@      avr/nrun.o \
2047 @SIM_ENABLE_ARCH_avr_TRUE@      avr/libsim.a \
2048 @SIM_ENABLE_ARCH_avr_TRUE@      $(SIM_COMMON_LIBS)
2049
2050 @SIM_ENABLE_ARCH_bfin_TRUE@AM_CPPFLAGS_bfin = $(SDL_CFLAGS)
2051 @SIM_ENABLE_ARCH_bfin_TRUE@bfin_libsim_a_SOURCES =
2052 @SIM_ENABLE_ARCH_bfin_TRUE@bfin_libsim_a_LIBADD = \
2053 @SIM_ENABLE_ARCH_bfin_TRUE@     $(common_libcommon_a_OBJECTS) \
2054 @SIM_ENABLE_ARCH_bfin_TRUE@     $(patsubst %,bfin/%,$(SIM_NEW_COMMON_OBJS)) \
2055 @SIM_ENABLE_ARCH_bfin_TRUE@     $(patsubst %,bfin/dv-%.o,$(SIM_HW_DEVICES)) \
2056 @SIM_ENABLE_ARCH_bfin_TRUE@     $(patsubst %,bfin/dv-%.o,$(bfin_SIM_EXTRA_HW_DEVICES)) \
2057 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin/bfin-sim.o \
2058 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin/devices.o \
2059 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin/gui.o \
2060 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin/interp.o \
2061 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin/machs.o \
2062 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin/modules.o \
2063 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin/sim-resume.o
2064
2065 @SIM_ENABLE_ARCH_bfin_TRUE@bfin_run_SOURCES =
2066 @SIM_ENABLE_ARCH_bfin_TRUE@bfin_run_LDADD = \
2067 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin/nrun.o \
2068 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin/libsim.a \
2069 @SIM_ENABLE_ARCH_bfin_TRUE@     $(SIM_COMMON_LIBS)
2070
2071 @SIM_ENABLE_ARCH_bfin_TRUE@bfin_SIM_EXTRA_HW_DEVICES = \
2072 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin_cec \
2073 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin_ctimer \
2074 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin_dma \
2075 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin_dmac \
2076 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin_ebiu_amc \
2077 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin_ebiu_ddrc \
2078 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin_ebiu_sdc \
2079 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin_emac \
2080 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin_eppi \
2081 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin_evt \
2082 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin_gpio \
2083 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin_gpio2 \
2084 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin_gptimer \
2085 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin_jtag \
2086 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin_mmu \
2087 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin_nfc \
2088 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin_otp \
2089 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin_pfmon \
2090 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin_pint \
2091 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin_pll \
2092 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin_ppi \
2093 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin_rtc \
2094 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin_sic \
2095 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin_spi \
2096 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin_trace \
2097 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin_twi \
2098 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin_uart \
2099 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin_uart2 \
2100 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin_wdog \
2101 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin_wp \
2102 @SIM_ENABLE_ARCH_bfin_TRUE@     eth_phy
2103
2104 @SIM_ENABLE_ARCH_bpf_TRUE@AM_CPPFLAGS_bpf = -DWITH_TARGET_WORD_BITSIZE=64
2105 @SIM_ENABLE_ARCH_bpf_TRUE@AM_CPPFLAGS_bpf_mloop_le.o = -DWANT_ISA_EBPFLE
2106 @SIM_ENABLE_ARCH_bpf_TRUE@AM_CPPFLAGS_bpf_mloop_be.o = -DWANT_ISA_EBPFBE
2107 @SIM_ENABLE_ARCH_bpf_TRUE@AM_CPPFLAGS_bpf_decode_le.o = -DWANT_ISA_EBPFLE
2108 @SIM_ENABLE_ARCH_bpf_TRUE@AM_CPPFLAGS_bpf_decode_be.o = -DWANT_ISA_EBPFBE
2109 @SIM_ENABLE_ARCH_bpf_TRUE@AM_CPPFLAGS_bpf_sem_le.o = -DWANT_ISA_EBPFLE
2110 @SIM_ENABLE_ARCH_bpf_TRUE@AM_CPPFLAGS_bpf_sem_be.o = -DWANT_ISA_EBPFBE
2111 @SIM_ENABLE_ARCH_bpf_TRUE@bpf_libsim_a_SOURCES =
2112 @SIM_ENABLE_ARCH_bpf_TRUE@bpf_libsim_a_LIBADD = \
2113 @SIM_ENABLE_ARCH_bpf_TRUE@      $(common_libcommon_a_OBJECTS) \
2114 @SIM_ENABLE_ARCH_bpf_TRUE@      $(patsubst %,bpf/%,$(SIM_NEW_COMMON_OBJS)) \
2115 @SIM_ENABLE_ARCH_bpf_TRUE@      $(patsubst %,bpf/dv-%.o,$(SIM_HW_DEVICES)) \
2116 @SIM_ENABLE_ARCH_bpf_TRUE@      bpf/modules.o \
2117 @SIM_ENABLE_ARCH_bpf_TRUE@      \
2118 @SIM_ENABLE_ARCH_bpf_TRUE@      bpf/cgen-run.o \
2119 @SIM_ENABLE_ARCH_bpf_TRUE@      bpf/cgen-scache.o \
2120 @SIM_ENABLE_ARCH_bpf_TRUE@      bpf/cgen-trace.o \
2121 @SIM_ENABLE_ARCH_bpf_TRUE@      bpf/cgen-utils.o \
2122 @SIM_ENABLE_ARCH_bpf_TRUE@      \
2123 @SIM_ENABLE_ARCH_bpf_TRUE@      bpf/arch.o \
2124 @SIM_ENABLE_ARCH_bpf_TRUE@      bpf/cpu.o \
2125 @SIM_ENABLE_ARCH_bpf_TRUE@      bpf/decode-le.o \
2126 @SIM_ENABLE_ARCH_bpf_TRUE@      bpf/decode-be.o \
2127 @SIM_ENABLE_ARCH_bpf_TRUE@      bpf/sem-le.o \
2128 @SIM_ENABLE_ARCH_bpf_TRUE@      bpf/sem-be.o \
2129 @SIM_ENABLE_ARCH_bpf_TRUE@      bpf/mloop-le.o \
2130 @SIM_ENABLE_ARCH_bpf_TRUE@      bpf/mloop-be.o \
2131 @SIM_ENABLE_ARCH_bpf_TRUE@      \
2132 @SIM_ENABLE_ARCH_bpf_TRUE@      bpf/bpf.o \
2133 @SIM_ENABLE_ARCH_bpf_TRUE@      bpf/bpf-helpers.o \
2134 @SIM_ENABLE_ARCH_bpf_TRUE@      bpf/sim-if.o \
2135 @SIM_ENABLE_ARCH_bpf_TRUE@      bpf/traps.o
2136
2137 @SIM_ENABLE_ARCH_bpf_TRUE@bpf_run_SOURCES =
2138 @SIM_ENABLE_ARCH_bpf_TRUE@bpf_run_LDADD = \
2139 @SIM_ENABLE_ARCH_bpf_TRUE@      bpf/nrun.o \
2140 @SIM_ENABLE_ARCH_bpf_TRUE@      bpf/libsim.a \
2141 @SIM_ENABLE_ARCH_bpf_TRUE@      $(SIM_COMMON_LIBS)
2142
2143 @SIM_ENABLE_ARCH_bpf_TRUE@bpf_BUILD_OUTPUTS = \
2144 @SIM_ENABLE_ARCH_bpf_TRUE@      bpf/mloop-le.c \
2145 @SIM_ENABLE_ARCH_bpf_TRUE@      bpf/stamp-mloop-le \
2146 @SIM_ENABLE_ARCH_bpf_TRUE@      bpf/mloop-be.c \
2147 @SIM_ENABLE_ARCH_bpf_TRUE@      bpf/stamp-mloop-be
2148
2149 @SIM_ENABLE_ARCH_cr16_TRUE@cr16_libsim_a_SOURCES =
2150 @SIM_ENABLE_ARCH_cr16_TRUE@cr16_libsim_a_LIBADD = \
2151 @SIM_ENABLE_ARCH_cr16_TRUE@     $(common_libcommon_a_OBJECTS) \
2152 @SIM_ENABLE_ARCH_cr16_TRUE@     $(patsubst %,cr16/%,$(SIM_NEW_COMMON_OBJS)) \
2153 @SIM_ENABLE_ARCH_cr16_TRUE@     $(patsubst %,cr16/dv-%.o,$(SIM_HW_DEVICES)) \
2154 @SIM_ENABLE_ARCH_cr16_TRUE@     cr16/interp.o \
2155 @SIM_ENABLE_ARCH_cr16_TRUE@     cr16/modules.o \
2156 @SIM_ENABLE_ARCH_cr16_TRUE@     cr16/sim-resume.o \
2157 @SIM_ENABLE_ARCH_cr16_TRUE@     cr16/simops.o \
2158 @SIM_ENABLE_ARCH_cr16_TRUE@     cr16/table.o
2159
2160 @SIM_ENABLE_ARCH_cr16_TRUE@cr16_run_SOURCES =
2161 @SIM_ENABLE_ARCH_cr16_TRUE@cr16_run_LDADD = \
2162 @SIM_ENABLE_ARCH_cr16_TRUE@     cr16/nrun.o \
2163 @SIM_ENABLE_ARCH_cr16_TRUE@     cr16/libsim.a \
2164 @SIM_ENABLE_ARCH_cr16_TRUE@     $(SIM_COMMON_LIBS)
2165
2166 @SIM_ENABLE_ARCH_cr16_TRUE@cr16_BUILD_OUTPUTS = \
2167 @SIM_ENABLE_ARCH_cr16_TRUE@     cr16/gencode$(EXEEXT) \
2168 @SIM_ENABLE_ARCH_cr16_TRUE@     cr16/table.c
2169
2170 @SIM_ENABLE_ARCH_cr16_TRUE@cr16_gencode_SOURCES = cr16/gencode.c
2171 @SIM_ENABLE_ARCH_cr16_TRUE@cr16_gencode_LDADD = cr16/cr16-opc.o
2172 @SIM_ENABLE_ARCH_cris_TRUE@cris_libsim_a_SOURCES =
2173 @SIM_ENABLE_ARCH_cris_TRUE@cris_libsim_a_LIBADD = \
2174 @SIM_ENABLE_ARCH_cris_TRUE@     $(common_libcommon_a_OBJECTS) \
2175 @SIM_ENABLE_ARCH_cris_TRUE@     $(patsubst %,cris/%,$(SIM_NEW_COMMON_OBJS)) \
2176 @SIM_ENABLE_ARCH_cris_TRUE@     $(patsubst %,cris/dv-%.o,$(SIM_HW_DEVICES)) \
2177 @SIM_ENABLE_ARCH_cris_TRUE@     $(patsubst %,cris/dv-%.o,$(cris_SIM_EXTRA_HW_DEVICES)) \
2178 @SIM_ENABLE_ARCH_cris_TRUE@     cris/modules.o \
2179 @SIM_ENABLE_ARCH_cris_TRUE@     \
2180 @SIM_ENABLE_ARCH_cris_TRUE@     cris/cgen-run.o \
2181 @SIM_ENABLE_ARCH_cris_TRUE@     cris/cgen-scache.o \
2182 @SIM_ENABLE_ARCH_cris_TRUE@     cris/cgen-trace.o \
2183 @SIM_ENABLE_ARCH_cris_TRUE@     cris/cgen-utils.o \
2184 @SIM_ENABLE_ARCH_cris_TRUE@     \
2185 @SIM_ENABLE_ARCH_cris_TRUE@     cris/arch.o \
2186 @SIM_ENABLE_ARCH_cris_TRUE@     cris/crisv10f.o \
2187 @SIM_ENABLE_ARCH_cris_TRUE@     cris/cpuv10.o \
2188 @SIM_ENABLE_ARCH_cris_TRUE@     cris/decodev10.o \
2189 @SIM_ENABLE_ARCH_cris_TRUE@     cris/modelv10.o \
2190 @SIM_ENABLE_ARCH_cris_TRUE@     cris/mloopv10f.o \
2191 @SIM_ENABLE_ARCH_cris_TRUE@     cris/crisv32f.o \
2192 @SIM_ENABLE_ARCH_cris_TRUE@     cris/cpuv32.o \
2193 @SIM_ENABLE_ARCH_cris_TRUE@     cris/decodev32.o \
2194 @SIM_ENABLE_ARCH_cris_TRUE@     cris/modelv32.o \
2195 @SIM_ENABLE_ARCH_cris_TRUE@     cris/mloopv32f.o \
2196 @SIM_ENABLE_ARCH_cris_TRUE@     \
2197 @SIM_ENABLE_ARCH_cris_TRUE@     cris/sim-if.o \
2198 @SIM_ENABLE_ARCH_cris_TRUE@     cris/traps.o
2199
2200 @SIM_ENABLE_ARCH_cris_TRUE@cris_run_SOURCES =
2201 @SIM_ENABLE_ARCH_cris_TRUE@cris_run_LDADD = \
2202 @SIM_ENABLE_ARCH_cris_TRUE@     cris/nrun.o \
2203 @SIM_ENABLE_ARCH_cris_TRUE@     cris/libsim.a \
2204 @SIM_ENABLE_ARCH_cris_TRUE@     $(SIM_COMMON_LIBS)
2205
2206 @SIM_ENABLE_ARCH_cris_TRUE@cris_SIM_EXTRA_HW_DEVICES = rv cris cris_900000xx
2207 @SIM_ENABLE_ARCH_cris_TRUE@cris_rvdummy_SOURCES = cris/rvdummy.c
2208 @SIM_ENABLE_ARCH_cris_TRUE@cris_rvdummy_LDADD = $(LIBIBERTY_LIB)
2209 @SIM_ENABLE_ARCH_cris_TRUE@cris_BUILD_OUTPUTS = \
2210 @SIM_ENABLE_ARCH_cris_TRUE@     cris/mloopv10f.c \
2211 @SIM_ENABLE_ARCH_cris_TRUE@     cris/stamp-mloop-v10f \
2212 @SIM_ENABLE_ARCH_cris_TRUE@     cris/mloopv32f.c \
2213 @SIM_ENABLE_ARCH_cris_TRUE@     cris/stamp-mloop-v32f
2214
2215 @SIM_ENABLE_ARCH_d10v_TRUE@d10v_libsim_a_SOURCES =
2216 @SIM_ENABLE_ARCH_d10v_TRUE@d10v_libsim_a_LIBADD = \
2217 @SIM_ENABLE_ARCH_d10v_TRUE@     $(common_libcommon_a_OBJECTS) \
2218 @SIM_ENABLE_ARCH_d10v_TRUE@     d10v/interp.o \
2219 @SIM_ENABLE_ARCH_d10v_TRUE@     $(patsubst %,d10v/%,$(SIM_NEW_COMMON_OBJS)) \
2220 @SIM_ENABLE_ARCH_d10v_TRUE@     $(patsubst %,d10v/dv-%.o,$(SIM_HW_DEVICES)) \
2221 @SIM_ENABLE_ARCH_d10v_TRUE@     d10v/endian.o \
2222 @SIM_ENABLE_ARCH_d10v_TRUE@     d10v/modules.o \
2223 @SIM_ENABLE_ARCH_d10v_TRUE@     d10v/sim-resume.o \
2224 @SIM_ENABLE_ARCH_d10v_TRUE@     d10v/simops.o \
2225 @SIM_ENABLE_ARCH_d10v_TRUE@     d10v/table.o
2226
2227 @SIM_ENABLE_ARCH_d10v_TRUE@d10v_run_SOURCES =
2228 @SIM_ENABLE_ARCH_d10v_TRUE@d10v_run_LDADD = \
2229 @SIM_ENABLE_ARCH_d10v_TRUE@     d10v/nrun.o \
2230 @SIM_ENABLE_ARCH_d10v_TRUE@     d10v/libsim.a \
2231 @SIM_ENABLE_ARCH_d10v_TRUE@     $(SIM_COMMON_LIBS)
2232
2233 @SIM_ENABLE_ARCH_d10v_TRUE@d10v_BUILD_OUTPUTS = \
2234 @SIM_ENABLE_ARCH_d10v_TRUE@     d10v/gencode$(EXEEXT) \
2235 @SIM_ENABLE_ARCH_d10v_TRUE@     d10v/table.c
2236
2237 @SIM_ENABLE_ARCH_d10v_TRUE@d10v_gencode_SOURCES = d10v/gencode.c
2238 @SIM_ENABLE_ARCH_d10v_TRUE@d10v_gencode_LDADD = d10v/d10v-opc.o
2239 @SIM_ENABLE_ARCH_erc32_TRUE@erc32_libsim_a_SOURCES =
2240 @SIM_ENABLE_ARCH_erc32_TRUE@erc32_libsim_a_LIBADD = \
2241 @SIM_ENABLE_ARCH_erc32_TRUE@    $(common_libcommon_a_OBJECTS) \
2242 @SIM_ENABLE_ARCH_erc32_TRUE@    erc32/erc32.o \
2243 @SIM_ENABLE_ARCH_erc32_TRUE@    erc32/exec.o \
2244 @SIM_ENABLE_ARCH_erc32_TRUE@    erc32/float.o \
2245 @SIM_ENABLE_ARCH_erc32_TRUE@    erc32/func.o \
2246 @SIM_ENABLE_ARCH_erc32_TRUE@    erc32/help.o \
2247 @SIM_ENABLE_ARCH_erc32_TRUE@    erc32/interf.o \
2248 @SIM_ENABLE_ARCH_erc32_TRUE@    erc32/modules.o
2249
2250 @SIM_ENABLE_ARCH_erc32_TRUE@erc32_run_SOURCES =
2251 @SIM_ENABLE_ARCH_erc32_TRUE@erc32_run_LDADD = \
2252 @SIM_ENABLE_ARCH_erc32_TRUE@    erc32/sis.o \
2253 @SIM_ENABLE_ARCH_erc32_TRUE@    erc32/libsim.a \
2254 @SIM_ENABLE_ARCH_erc32_TRUE@    $(SIM_COMMON_LIBS) $(READLINE_LIB) $(TERMCAP_LIB)
2255
2256 @SIM_ENABLE_ARCH_erc32_TRUE@erc32docdir = $(docdir)/erc32
2257 @SIM_ENABLE_ARCH_erc32_TRUE@erc32doc_DATA = erc32/README.erc32 erc32/README.gdb erc32/README.sis
2258 @SIM_ENABLE_ARCH_examples_TRUE@example_synacor_libsim_a_SOURCES =
2259 @SIM_ENABLE_ARCH_examples_TRUE@example_synacor_libsim_a_LIBADD = \
2260 @SIM_ENABLE_ARCH_examples_TRUE@ $(common_libcommon_a_OBJECTS) \
2261 @SIM_ENABLE_ARCH_examples_TRUE@ $(patsubst %,example-synacor/%,$(SIM_NEW_COMMON_OBJS)) \
2262 @SIM_ENABLE_ARCH_examples_TRUE@ $(patsubst %,example-synacor/dv-%.o,$(SIM_HW_DEVICES)) \
2263 @SIM_ENABLE_ARCH_examples_TRUE@ example-synacor/interp.o \
2264 @SIM_ENABLE_ARCH_examples_TRUE@ example-synacor/modules.o \
2265 @SIM_ENABLE_ARCH_examples_TRUE@ example-synacor/sim-main.o \
2266 @SIM_ENABLE_ARCH_examples_TRUE@ example-synacor/sim-resume.o
2267
2268 @SIM_ENABLE_ARCH_examples_TRUE@example_synacor_run_SOURCES =
2269 @SIM_ENABLE_ARCH_examples_TRUE@example_synacor_run_LDADD = \
2270 @SIM_ENABLE_ARCH_examples_TRUE@ example-synacor/nrun.o \
2271 @SIM_ENABLE_ARCH_examples_TRUE@ example-synacor/libsim.a \
2272 @SIM_ENABLE_ARCH_examples_TRUE@ $(SIM_COMMON_LIBS)
2273
2274 @SIM_ENABLE_ARCH_frv_TRUE@frv_libsim_a_SOURCES =
2275 @SIM_ENABLE_ARCH_frv_TRUE@frv_libsim_a_LIBADD = \
2276 @SIM_ENABLE_ARCH_frv_TRUE@      $(common_libcommon_a_OBJECTS) \
2277 @SIM_ENABLE_ARCH_frv_TRUE@      $(patsubst %,frv/%,$(SIM_NEW_COMMON_OBJS)) \
2278 @SIM_ENABLE_ARCH_frv_TRUE@      $(patsubst %,frv/dv-%.o,$(SIM_HW_DEVICES)) \
2279 @SIM_ENABLE_ARCH_frv_TRUE@      frv/modules.o \
2280 @SIM_ENABLE_ARCH_frv_TRUE@      \
2281 @SIM_ENABLE_ARCH_frv_TRUE@      frv/cgen-accfp.o \
2282 @SIM_ENABLE_ARCH_frv_TRUE@      frv/cgen-fpu.o \
2283 @SIM_ENABLE_ARCH_frv_TRUE@      frv/cgen-run.o \
2284 @SIM_ENABLE_ARCH_frv_TRUE@      frv/cgen-scache.o \
2285 @SIM_ENABLE_ARCH_frv_TRUE@      frv/cgen-trace.o \
2286 @SIM_ENABLE_ARCH_frv_TRUE@      frv/cgen-utils.o \
2287 @SIM_ENABLE_ARCH_frv_TRUE@      \
2288 @SIM_ENABLE_ARCH_frv_TRUE@      frv/arch.o \
2289 @SIM_ENABLE_ARCH_frv_TRUE@      frv/cgen-par.o \
2290 @SIM_ENABLE_ARCH_frv_TRUE@      frv/cpu.o \
2291 @SIM_ENABLE_ARCH_frv_TRUE@      frv/decode.o \
2292 @SIM_ENABLE_ARCH_frv_TRUE@      frv/frv.o \
2293 @SIM_ENABLE_ARCH_frv_TRUE@      frv/mloop.o \
2294 @SIM_ENABLE_ARCH_frv_TRUE@      frv/model.o \
2295 @SIM_ENABLE_ARCH_frv_TRUE@      frv/sem.o \
2296 @SIM_ENABLE_ARCH_frv_TRUE@      \
2297 @SIM_ENABLE_ARCH_frv_TRUE@      frv/cache.o \
2298 @SIM_ENABLE_ARCH_frv_TRUE@      frv/interrupts.o \
2299 @SIM_ENABLE_ARCH_frv_TRUE@      frv/memory.o \
2300 @SIM_ENABLE_ARCH_frv_TRUE@      frv/options.o \
2301 @SIM_ENABLE_ARCH_frv_TRUE@      frv/pipeline.o \
2302 @SIM_ENABLE_ARCH_frv_TRUE@      frv/profile.o \
2303 @SIM_ENABLE_ARCH_frv_TRUE@      frv/profile-fr400.o \
2304 @SIM_ENABLE_ARCH_frv_TRUE@      frv/profile-fr450.o \
2305 @SIM_ENABLE_ARCH_frv_TRUE@      frv/profile-fr500.o \
2306 @SIM_ENABLE_ARCH_frv_TRUE@      frv/profile-fr550.o \
2307 @SIM_ENABLE_ARCH_frv_TRUE@      frv/registers.o \
2308 @SIM_ENABLE_ARCH_frv_TRUE@      frv/reset.o \
2309 @SIM_ENABLE_ARCH_frv_TRUE@      frv/sim-if.o \
2310 @SIM_ENABLE_ARCH_frv_TRUE@      frv/traps.o
2311
2312 @SIM_ENABLE_ARCH_frv_TRUE@frv_run_SOURCES =
2313 @SIM_ENABLE_ARCH_frv_TRUE@frv_run_LDADD = \
2314 @SIM_ENABLE_ARCH_frv_TRUE@      frv/nrun.o \
2315 @SIM_ENABLE_ARCH_frv_TRUE@      frv/libsim.a \
2316 @SIM_ENABLE_ARCH_frv_TRUE@      $(SIM_COMMON_LIBS)
2317
2318 @SIM_ENABLE_ARCH_frv_TRUE@frvdocdir = $(docdir)/frv
2319 @SIM_ENABLE_ARCH_frv_TRUE@frvdoc_DATA = frv/README
2320 @SIM_ENABLE_ARCH_frv_TRUE@frv_BUILD_OUTPUTS = \
2321 @SIM_ENABLE_ARCH_frv_TRUE@      frv/mloop.c \
2322 @SIM_ENABLE_ARCH_frv_TRUE@      frv/stamp-mloop
2323
2324 @SIM_ENABLE_ARCH_ft32_TRUE@ft32_libsim_a_SOURCES =
2325 @SIM_ENABLE_ARCH_ft32_TRUE@ft32_libsim_a_LIBADD = \
2326 @SIM_ENABLE_ARCH_ft32_TRUE@     $(common_libcommon_a_OBJECTS) \
2327 @SIM_ENABLE_ARCH_ft32_TRUE@     $(patsubst %,ft32/%,$(SIM_NEW_COMMON_OBJS)) \
2328 @SIM_ENABLE_ARCH_ft32_TRUE@     $(patsubst %,ft32/dv-%.o,$(SIM_HW_DEVICES)) \
2329 @SIM_ENABLE_ARCH_ft32_TRUE@     ft32/interp.o \
2330 @SIM_ENABLE_ARCH_ft32_TRUE@     ft32/modules.o \
2331 @SIM_ENABLE_ARCH_ft32_TRUE@     ft32/sim-resume.o
2332
2333 @SIM_ENABLE_ARCH_ft32_TRUE@ft32_run_SOURCES =
2334 @SIM_ENABLE_ARCH_ft32_TRUE@ft32_run_LDADD = \
2335 @SIM_ENABLE_ARCH_ft32_TRUE@     ft32/nrun.o \
2336 @SIM_ENABLE_ARCH_ft32_TRUE@     ft32/libsim.a \
2337 @SIM_ENABLE_ARCH_ft32_TRUE@     $(SIM_COMMON_LIBS)
2338
2339 @SIM_ENABLE_ARCH_h8300_TRUE@h8300_libsim_a_SOURCES =
2340 @SIM_ENABLE_ARCH_h8300_TRUE@h8300_libsim_a_LIBADD = \
2341 @SIM_ENABLE_ARCH_h8300_TRUE@    $(common_libcommon_a_OBJECTS) \
2342 @SIM_ENABLE_ARCH_h8300_TRUE@    h8300/compile.o \
2343 @SIM_ENABLE_ARCH_h8300_TRUE@    $(patsubst %,h8300/%,$(SIM_NEW_COMMON_OBJS)) \
2344 @SIM_ENABLE_ARCH_h8300_TRUE@    $(patsubst %,h8300/dv-%.o,$(SIM_HW_DEVICES)) \
2345 @SIM_ENABLE_ARCH_h8300_TRUE@    h8300/modules.o \
2346 @SIM_ENABLE_ARCH_h8300_TRUE@    h8300/sim-resume.o
2347
2348 @SIM_ENABLE_ARCH_h8300_TRUE@h8300_run_SOURCES =
2349 @SIM_ENABLE_ARCH_h8300_TRUE@h8300_run_LDADD = \
2350 @SIM_ENABLE_ARCH_h8300_TRUE@    h8300/nrun.o \
2351 @SIM_ENABLE_ARCH_h8300_TRUE@    h8300/libsim.a \
2352 @SIM_ENABLE_ARCH_h8300_TRUE@    $(SIM_COMMON_LIBS)
2353
2354 @SIM_ENABLE_ARCH_iq2000_TRUE@iq2000_libsim_a_SOURCES =
2355 @SIM_ENABLE_ARCH_iq2000_TRUE@iq2000_libsim_a_LIBADD = \
2356 @SIM_ENABLE_ARCH_iq2000_TRUE@   $(common_libcommon_a_OBJECTS) \
2357 @SIM_ENABLE_ARCH_iq2000_TRUE@   $(patsubst %,iq2000/%,$(SIM_NEW_COMMON_OBJS)) \
2358 @SIM_ENABLE_ARCH_iq2000_TRUE@   $(patsubst %,iq2000/dv-%.o,$(SIM_HW_DEVICES)) \
2359 @SIM_ENABLE_ARCH_iq2000_TRUE@   iq2000/modules.o \
2360 @SIM_ENABLE_ARCH_iq2000_TRUE@   \
2361 @SIM_ENABLE_ARCH_iq2000_TRUE@   iq2000/cgen-run.o \
2362 @SIM_ENABLE_ARCH_iq2000_TRUE@   iq2000/cgen-scache.o \
2363 @SIM_ENABLE_ARCH_iq2000_TRUE@   iq2000/cgen-trace.o \
2364 @SIM_ENABLE_ARCH_iq2000_TRUE@   iq2000/cgen-utils.o \
2365 @SIM_ENABLE_ARCH_iq2000_TRUE@   \
2366 @SIM_ENABLE_ARCH_iq2000_TRUE@   iq2000/arch.o \
2367 @SIM_ENABLE_ARCH_iq2000_TRUE@   iq2000/cpu.o \
2368 @SIM_ENABLE_ARCH_iq2000_TRUE@   iq2000/decode.o \
2369 @SIM_ENABLE_ARCH_iq2000_TRUE@   iq2000/iq2000.o \
2370 @SIM_ENABLE_ARCH_iq2000_TRUE@   iq2000/sem.o \
2371 @SIM_ENABLE_ARCH_iq2000_TRUE@   iq2000/mloop.o \
2372 @SIM_ENABLE_ARCH_iq2000_TRUE@   iq2000/model.o \
2373 @SIM_ENABLE_ARCH_iq2000_TRUE@   \
2374 @SIM_ENABLE_ARCH_iq2000_TRUE@   iq2000/sim-if.o
2375
2376 @SIM_ENABLE_ARCH_iq2000_TRUE@iq2000_run_SOURCES =
2377 @SIM_ENABLE_ARCH_iq2000_TRUE@iq2000_run_LDADD = \
2378 @SIM_ENABLE_ARCH_iq2000_TRUE@   iq2000/nrun.o \
2379 @SIM_ENABLE_ARCH_iq2000_TRUE@   iq2000/libsim.a \
2380 @SIM_ENABLE_ARCH_iq2000_TRUE@   $(SIM_COMMON_LIBS)
2381
2382 @SIM_ENABLE_ARCH_iq2000_TRUE@iq2000_BUILD_OUTPUTS = \
2383 @SIM_ENABLE_ARCH_iq2000_TRUE@   iq2000/mloop.c \
2384 @SIM_ENABLE_ARCH_iq2000_TRUE@   iq2000/stamp-mloop
2385
2386 @SIM_ENABLE_ARCH_lm32_TRUE@lm32_libsim_a_SOURCES =
2387 @SIM_ENABLE_ARCH_lm32_TRUE@lm32_libsim_a_LIBADD = \
2388 @SIM_ENABLE_ARCH_lm32_TRUE@     $(common_libcommon_a_OBJECTS) \
2389 @SIM_ENABLE_ARCH_lm32_TRUE@     $(patsubst %,lm32/%,$(SIM_NEW_COMMON_OBJS)) \
2390 @SIM_ENABLE_ARCH_lm32_TRUE@     $(patsubst %,lm32/dv-%.o,$(SIM_HW_DEVICES)) \
2391 @SIM_ENABLE_ARCH_lm32_TRUE@     $(patsubst %,lm32/dv-%.o,$(lm32_SIM_EXTRA_HW_DEVICES)) \
2392 @SIM_ENABLE_ARCH_lm32_TRUE@     lm32/modules.o \
2393 @SIM_ENABLE_ARCH_lm32_TRUE@     \
2394 @SIM_ENABLE_ARCH_lm32_TRUE@     lm32/cgen-run.o \
2395 @SIM_ENABLE_ARCH_lm32_TRUE@     lm32/cgen-scache.o \
2396 @SIM_ENABLE_ARCH_lm32_TRUE@     lm32/cgen-trace.o \
2397 @SIM_ENABLE_ARCH_lm32_TRUE@     lm32/cgen-utils.o \
2398 @SIM_ENABLE_ARCH_lm32_TRUE@     \
2399 @SIM_ENABLE_ARCH_lm32_TRUE@     lm32/arch.o \
2400 @SIM_ENABLE_ARCH_lm32_TRUE@     lm32/cpu.o \
2401 @SIM_ENABLE_ARCH_lm32_TRUE@     lm32/decode.o \
2402 @SIM_ENABLE_ARCH_lm32_TRUE@     lm32/sem.o \
2403 @SIM_ENABLE_ARCH_lm32_TRUE@     lm32/mloop.o \
2404 @SIM_ENABLE_ARCH_lm32_TRUE@     lm32/model.o \
2405 @SIM_ENABLE_ARCH_lm32_TRUE@     \
2406 @SIM_ENABLE_ARCH_lm32_TRUE@     lm32/lm32.o \
2407 @SIM_ENABLE_ARCH_lm32_TRUE@     lm32/sim-if.o \
2408 @SIM_ENABLE_ARCH_lm32_TRUE@     lm32/traps.o \
2409 @SIM_ENABLE_ARCH_lm32_TRUE@     lm32/user.o
2410
2411 @SIM_ENABLE_ARCH_lm32_TRUE@lm32_run_SOURCES =
2412 @SIM_ENABLE_ARCH_lm32_TRUE@lm32_run_LDADD = \
2413 @SIM_ENABLE_ARCH_lm32_TRUE@     lm32/nrun.o \
2414 @SIM_ENABLE_ARCH_lm32_TRUE@     lm32/libsim.a \
2415 @SIM_ENABLE_ARCH_lm32_TRUE@     $(SIM_COMMON_LIBS)
2416
2417 @SIM_ENABLE_ARCH_lm32_TRUE@lm32_SIM_EXTRA_HW_DEVICES = lm32cpu lm32timer lm32uart
2418 @SIM_ENABLE_ARCH_lm32_TRUE@lm32_BUILD_OUTPUTS = \
2419 @SIM_ENABLE_ARCH_lm32_TRUE@     lm32/mloop.c \
2420 @SIM_ENABLE_ARCH_lm32_TRUE@     lm32/stamp-mloop
2421
2422 @SIM_ENABLE_ARCH_m32c_TRUE@m32c_libsim_a_SOURCES =
2423 @SIM_ENABLE_ARCH_m32c_TRUE@m32c_libsim_a_LIBADD = \
2424 @SIM_ENABLE_ARCH_m32c_TRUE@     $(common_libcommon_a_OBJECTS) \
2425 @SIM_ENABLE_ARCH_m32c_TRUE@     m32c/gdb-if.o \
2426 @SIM_ENABLE_ARCH_m32c_TRUE@     m32c/int.o \
2427 @SIM_ENABLE_ARCH_m32c_TRUE@     m32c/load.o \
2428 @SIM_ENABLE_ARCH_m32c_TRUE@     m32c/m32c.o \
2429 @SIM_ENABLE_ARCH_m32c_TRUE@     m32c/mem.o \
2430 @SIM_ENABLE_ARCH_m32c_TRUE@     m32c/misc.o \
2431 @SIM_ENABLE_ARCH_m32c_TRUE@     m32c/modules.o \
2432 @SIM_ENABLE_ARCH_m32c_TRUE@     m32c/r8c.o \
2433 @SIM_ENABLE_ARCH_m32c_TRUE@     m32c/reg.o \
2434 @SIM_ENABLE_ARCH_m32c_TRUE@     m32c/srcdest.o \
2435 @SIM_ENABLE_ARCH_m32c_TRUE@     m32c/syscalls.o \
2436 @SIM_ENABLE_ARCH_m32c_TRUE@     m32c/trace.o
2437
2438 @SIM_ENABLE_ARCH_m32c_TRUE@m32c_run_SOURCES =
2439 @SIM_ENABLE_ARCH_m32c_TRUE@m32c_run_LDADD = \
2440 @SIM_ENABLE_ARCH_m32c_TRUE@     m32c/main.o \
2441 @SIM_ENABLE_ARCH_m32c_TRUE@     m32c/libsim.a \
2442 @SIM_ENABLE_ARCH_m32c_TRUE@     $(SIM_COMMON_LIBS)
2443
2444 @SIM_ENABLE_ARCH_m32c_TRUE@m32c_BUILD_OUTPUTS = \
2445 @SIM_ENABLE_ARCH_m32c_TRUE@     m32c/opc2c$(EXEEXT) \
2446 @SIM_ENABLE_ARCH_m32c_TRUE@     m32c/m32c.c \
2447 @SIM_ENABLE_ARCH_m32c_TRUE@     m32c/r8c.c
2448
2449 @SIM_ENABLE_ARCH_m32c_TRUE@m32c_opc2c_SOURCES = m32c/opc2c.c
2450
2451 # opc2c leaks memory, and therefore makes AddressSanitizer unhappy.  Disable
2452 # leak detection while running it.
2453 @SIM_ENABLE_ARCH_m32c_TRUE@m32c_OPC2C_RUN = ASAN_OPTIONS=detect_leaks=0 m32c/opc2c$(EXEEXT)
2454 @SIM_ENABLE_ARCH_m32r_TRUE@m32r_libsim_a_SOURCES =
2455 @SIM_ENABLE_ARCH_m32r_TRUE@m32r_libsim_a_LIBADD = \
2456 @SIM_ENABLE_ARCH_m32r_TRUE@     $(common_libcommon_a_OBJECTS) \
2457 @SIM_ENABLE_ARCH_m32r_TRUE@     $(patsubst %,m32r/%,$(SIM_NEW_COMMON_OBJS)) \
2458 @SIM_ENABLE_ARCH_m32r_TRUE@     $(patsubst %,m32r/dv-%.o,$(SIM_HW_DEVICES)) \
2459 @SIM_ENABLE_ARCH_m32r_TRUE@     $(patsubst %,m32r/dv-%.o,$(m32r_SIM_EXTRA_HW_DEVICES)) \
2460 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/modules.o \
2461 @SIM_ENABLE_ARCH_m32r_TRUE@     \
2462 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/cgen-run.o \
2463 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/cgen-scache.o \
2464 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/cgen-trace.o \
2465 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/cgen-utils.o \
2466 @SIM_ENABLE_ARCH_m32r_TRUE@     \
2467 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/arch.o \
2468 @SIM_ENABLE_ARCH_m32r_TRUE@     \
2469 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/m32r.o \
2470 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/cpu.o \
2471 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/decode.o \
2472 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/sem.o \
2473 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/model.o \
2474 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/mloop.o \
2475 @SIM_ENABLE_ARCH_m32r_TRUE@     \
2476 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/m32rx.o \
2477 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/cpux.o \
2478 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/decodex.o \
2479 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/modelx.o \
2480 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/mloopx.o \
2481 @SIM_ENABLE_ARCH_m32r_TRUE@     \
2482 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/m32r2.o \
2483 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/cpu2.o \
2484 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/decode2.o \
2485 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/model2.o \
2486 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/mloop2.o \
2487 @SIM_ENABLE_ARCH_m32r_TRUE@     \
2488 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/sim-if.o \
2489 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/traps.o
2490
2491 @SIM_ENABLE_ARCH_m32r_TRUE@m32r_run_SOURCES =
2492 @SIM_ENABLE_ARCH_m32r_TRUE@m32r_run_LDADD = \
2493 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/nrun.o \
2494 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/libsim.a \
2495 @SIM_ENABLE_ARCH_m32r_TRUE@     $(SIM_COMMON_LIBS)
2496
2497 @SIM_ENABLE_ARCH_m32r_TRUE@m32r_SIM_EXTRA_HW_DEVICES = m32r_cache m32r_uart
2498 @SIM_ENABLE_ARCH_m32r_TRUE@m32r_BUILD_OUTPUTS = \
2499 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/mloop.c \
2500 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/stamp-mloop \
2501 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/mloopx.c \
2502 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/stamp-mloop-x \
2503 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/mloop2.c \
2504 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/stamp-mloop-2
2505
2506 @SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11_libsim_a_SOURCES =
2507 @SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11_libsim_a_LIBADD = \
2508 @SIM_ENABLE_ARCH_m68hc11_TRUE@  $(common_libcommon_a_OBJECTS) \
2509 @SIM_ENABLE_ARCH_m68hc11_TRUE@  m68hc11/interp.o \
2510 @SIM_ENABLE_ARCH_m68hc11_TRUE@  m68hc11/m68hc11int.o \
2511 @SIM_ENABLE_ARCH_m68hc11_TRUE@  m68hc11/m68hc12int.o \
2512 @SIM_ENABLE_ARCH_m68hc11_TRUE@  m68hc11/emulos.o \
2513 @SIM_ENABLE_ARCH_m68hc11_TRUE@  m68hc11/interrupts.o \
2514 @SIM_ENABLE_ARCH_m68hc11_TRUE@  m68hc11/m68hc11_sim.o \
2515 @SIM_ENABLE_ARCH_m68hc11_TRUE@  $(patsubst %,m68hc11/%,$(SIM_NEW_COMMON_OBJS)) \
2516 @SIM_ENABLE_ARCH_m68hc11_TRUE@  $(patsubst %,m68hc11/dv-%.o,$(SIM_HW_DEVICES)) \
2517 @SIM_ENABLE_ARCH_m68hc11_TRUE@  $(patsubst %,m68hc11/dv-%.o,$(m68hc11_SIM_EXTRA_HW_DEVICES)) \
2518 @SIM_ENABLE_ARCH_m68hc11_TRUE@  m68hc11/modules.o \
2519 @SIM_ENABLE_ARCH_m68hc11_TRUE@  m68hc11/sim-resume.o
2520
2521 @SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11_run_SOURCES =
2522 @SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11_run_LDADD = \
2523 @SIM_ENABLE_ARCH_m68hc11_TRUE@  m68hc11/nrun.o \
2524 @SIM_ENABLE_ARCH_m68hc11_TRUE@  m68hc11/libsim.a \
2525 @SIM_ENABLE_ARCH_m68hc11_TRUE@  $(SIM_COMMON_LIBS)
2526
2527 @SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11_SIM_EXTRA_HW_DEVICES = m68hc11 m68hc11sio m68hc11eepr m68hc11tim m68hc11spi nvram
2528 @SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11_BUILD_OUTPUTS = \
2529 @SIM_ENABLE_ARCH_m68hc11_TRUE@  m68hc11/gencode$(EXEEXT) \
2530 @SIM_ENABLE_ARCH_m68hc11_TRUE@  m68hc11/m68hc11int.c \
2531 @SIM_ENABLE_ARCH_m68hc11_TRUE@  m68hc11/m68hc12int.c
2532
2533 @SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11_gencode_SOURCES = m68hc11/gencode.c
2534 @SIM_ENABLE_ARCH_mcore_TRUE@mcore_libsim_a_SOURCES =
2535 @SIM_ENABLE_ARCH_mcore_TRUE@mcore_libsim_a_LIBADD = \
2536 @SIM_ENABLE_ARCH_mcore_TRUE@    $(common_libcommon_a_OBJECTS) \
2537 @SIM_ENABLE_ARCH_mcore_TRUE@    mcore/interp.o \
2538 @SIM_ENABLE_ARCH_mcore_TRUE@    $(patsubst %,mcore/%,$(SIM_NEW_COMMON_OBJS)) \
2539 @SIM_ENABLE_ARCH_mcore_TRUE@    $(patsubst %,mcore/dv-%.o,$(SIM_HW_DEVICES)) \
2540 @SIM_ENABLE_ARCH_mcore_TRUE@    mcore/modules.o \
2541 @SIM_ENABLE_ARCH_mcore_TRUE@    mcore/sim-resume.o
2542
2543 @SIM_ENABLE_ARCH_mcore_TRUE@mcore_run_SOURCES =
2544 @SIM_ENABLE_ARCH_mcore_TRUE@mcore_run_LDADD = \
2545 @SIM_ENABLE_ARCH_mcore_TRUE@    mcore/nrun.o \
2546 @SIM_ENABLE_ARCH_mcore_TRUE@    mcore/libsim.a \
2547 @SIM_ENABLE_ARCH_mcore_TRUE@    $(SIM_COMMON_LIBS)
2548
2549 @SIM_ENABLE_ARCH_microblaze_TRUE@microblaze_libsim_a_SOURCES =
2550 @SIM_ENABLE_ARCH_microblaze_TRUE@microblaze_libsim_a_LIBADD = \
2551 @SIM_ENABLE_ARCH_microblaze_TRUE@       $(common_libcommon_a_OBJECTS) \
2552 @SIM_ENABLE_ARCH_microblaze_TRUE@       microblaze/interp.o \
2553 @SIM_ENABLE_ARCH_microblaze_TRUE@       $(patsubst %,microblaze/%,$(SIM_NEW_COMMON_OBJS)) \
2554 @SIM_ENABLE_ARCH_microblaze_TRUE@       $(patsubst %,microblaze/dv-%.o,$(SIM_HW_DEVICES)) \
2555 @SIM_ENABLE_ARCH_microblaze_TRUE@       microblaze/modules.o \
2556 @SIM_ENABLE_ARCH_microblaze_TRUE@       microblaze/sim-resume.o
2557
2558 @SIM_ENABLE_ARCH_microblaze_TRUE@microblaze_run_SOURCES =
2559 @SIM_ENABLE_ARCH_microblaze_TRUE@microblaze_run_LDADD = \
2560 @SIM_ENABLE_ARCH_microblaze_TRUE@       microblaze/nrun.o \
2561 @SIM_ENABLE_ARCH_microblaze_TRUE@       microblaze/libsim.a \
2562 @SIM_ENABLE_ARCH_microblaze_TRUE@       $(SIM_COMMON_LIBS)
2563
2564 @SIM_ENABLE_ARCH_mips_TRUE@mips_GEN_OBJ = $(am__append_88) \
2565 @SIM_ENABLE_ARCH_mips_TRUE@     $(am__append_89) $(am__append_90)
2566 @SIM_ENABLE_ARCH_mips_TRUE@mips_libsim_a_SOURCES =
2567 @SIM_ENABLE_ARCH_mips_TRUE@mips_libsim_a_LIBADD = \
2568 @SIM_ENABLE_ARCH_mips_TRUE@     $(common_libcommon_a_OBJECTS) \
2569 @SIM_ENABLE_ARCH_mips_TRUE@     mips/interp.o \
2570 @SIM_ENABLE_ARCH_mips_TRUE@     $(mips_GEN_OBJ) \
2571 @SIM_ENABLE_ARCH_mips_TRUE@     $(patsubst %,mips/%,$(SIM_NEW_COMMON_OBJS)) \
2572 @SIM_ENABLE_ARCH_mips_TRUE@     $(patsubst %,mips/dv-%.o,$(SIM_HW_DEVICES)) \
2573 @SIM_ENABLE_ARCH_mips_TRUE@     $(patsubst %,mips/dv-%.o,$(mips_SIM_EXTRA_HW_DEVICES)) \
2574 @SIM_ENABLE_ARCH_mips_TRUE@     mips/cp1.o \
2575 @SIM_ENABLE_ARCH_mips_TRUE@     mips/dsp.o \
2576 @SIM_ENABLE_ARCH_mips_TRUE@     mips/mdmx.o \
2577 @SIM_ENABLE_ARCH_mips_TRUE@     mips/modules.o \
2578 @SIM_ENABLE_ARCH_mips_TRUE@     mips/sim-main.o \
2579 @SIM_ENABLE_ARCH_mips_TRUE@     mips/sim-resume.o
2580
2581 @SIM_ENABLE_ARCH_mips_TRUE@EXTRA_mips_libsim_a_DEPENDENCIES = $(SIM_MIPS_MULTI_OBJ)
2582 @SIM_ENABLE_ARCH_mips_TRUE@mips_run_SOURCES =
2583 @SIM_ENABLE_ARCH_mips_TRUE@mips_run_LDADD = \
2584 @SIM_ENABLE_ARCH_mips_TRUE@     mips/nrun.o \
2585 @SIM_ENABLE_ARCH_mips_TRUE@     mips/libsim.a \
2586 @SIM_ENABLE_ARCH_mips_TRUE@     $(SIM_COMMON_LIBS)
2587
2588 @SIM_ENABLE_ARCH_mips_TRUE@mips_SIM_EXTRA_HW_DEVICES = tx3904cpu tx3904irc tx3904tmr tx3904sio
2589 @SIM_ENABLE_ARCH_mips_TRUE@mips_BUILT_SRC_FROM_IGEN_ITABLE = \
2590 @SIM_ENABLE_ARCH_mips_TRUE@     mips/itable.h \
2591 @SIM_ENABLE_ARCH_mips_TRUE@     mips/itable.c
2592
2593 @SIM_ENABLE_ARCH_mips_TRUE@mips_BUILT_SRC_FROM_GEN_MODE_SINGLE = \
2594 @SIM_ENABLE_ARCH_mips_TRUE@     mips/icache.h \
2595 @SIM_ENABLE_ARCH_mips_TRUE@     mips/icache.c \
2596 @SIM_ENABLE_ARCH_mips_TRUE@     mips/idecode.h \
2597 @SIM_ENABLE_ARCH_mips_TRUE@     mips/idecode.c \
2598 @SIM_ENABLE_ARCH_mips_TRUE@     mips/semantics.h \
2599 @SIM_ENABLE_ARCH_mips_TRUE@     mips/semantics.c \
2600 @SIM_ENABLE_ARCH_mips_TRUE@     mips/model.h \
2601 @SIM_ENABLE_ARCH_mips_TRUE@     mips/model.c \
2602 @SIM_ENABLE_ARCH_mips_TRUE@     mips/support.h \
2603 @SIM_ENABLE_ARCH_mips_TRUE@     mips/support.c \
2604 @SIM_ENABLE_ARCH_mips_TRUE@     mips/engine.h \
2605 @SIM_ENABLE_ARCH_mips_TRUE@     mips/engine.c \
2606 @SIM_ENABLE_ARCH_mips_TRUE@     mips/irun.c
2607
2608 @SIM_ENABLE_ARCH_mips_TRUE@mips_BUILT_SRC_FROM_GEN_MODE_M16_M16 = \
2609 @SIM_ENABLE_ARCH_mips_TRUE@     mips/m16_icache.h \
2610 @SIM_ENABLE_ARCH_mips_TRUE@     mips/m16_icache.c \
2611 @SIM_ENABLE_ARCH_mips_TRUE@     mips/m16_idecode.h \
2612 @SIM_ENABLE_ARCH_mips_TRUE@     mips/m16_idecode.c \
2613 @SIM_ENABLE_ARCH_mips_TRUE@     mips/m16_semantics.h \
2614 @SIM_ENABLE_ARCH_mips_TRUE@     mips/m16_semantics.c \
2615 @SIM_ENABLE_ARCH_mips_TRUE@     mips/m16_model.h \
2616 @SIM_ENABLE_ARCH_mips_TRUE@     mips/m16_model.c \
2617 @SIM_ENABLE_ARCH_mips_TRUE@     mips/m16_support.h \
2618 @SIM_ENABLE_ARCH_mips_TRUE@     mips/m16_support.c \
2619 @SIM_ENABLE_ARCH_mips_TRUE@mips_BUILT_SRC_FROM_GEN_MODE_M16_M32 = \
2620 @SIM_ENABLE_ARCH_mips_TRUE@     mips/m32_icache.h \
2621 @SIM_ENABLE_ARCH_mips_TRUE@     mips/m32_icache.c \
2622 @SIM_ENABLE_ARCH_mips_TRUE@     mips/m32_idecode.h \
2623 @SIM_ENABLE_ARCH_mips_TRUE@     mips/m32_idecode.c \
2624 @SIM_ENABLE_ARCH_mips_TRUE@     mips/m32_semantics.h \
2625 @SIM_ENABLE_ARCH_mips_TRUE@     mips/m32_semantics.c \
2626 @SIM_ENABLE_ARCH_mips_TRUE@     mips/m32_model.h \
2627 @SIM_ENABLE_ARCH_mips_TRUE@     mips/m32_model.c \
2628 @SIM_ENABLE_ARCH_mips_TRUE@     mips/m32_support.h \
2629 @SIM_ENABLE_ARCH_mips_TRUE@     mips/m32_support.c
2630
2631 @SIM_ENABLE_ARCH_mips_TRUE@mips_BUILD_OUTPUTS =  \
2632 @SIM_ENABLE_ARCH_mips_TRUE@     $(mips_BUILT_SRC_FROM_IGEN_ITABLE) \
2633 @SIM_ENABLE_ARCH_mips_TRUE@     mips/stamp-igen-itable \
2634 @SIM_ENABLE_ARCH_mips_TRUE@     $(am__append_95) $(am__append_96) \
2635 @SIM_ENABLE_ARCH_mips_TRUE@     $(am__append_97)
2636 @SIM_ENABLE_ARCH_mips_TRUE@mips_IGEN_TRACE = # -G omit-line-numbers # -G trace-rule-selection -G trace-rule-rejection -G trace-entries # -G trace-all
2637 @SIM_ENABLE_ARCH_mips_TRUE@mips_IGEN_INSN = $(srcdir)/mips/mips.igen
2638 @SIM_ENABLE_ARCH_mips_TRUE@mips_IGEN_INSN_INC = \
2639 @SIM_ENABLE_ARCH_mips_TRUE@     mips/dsp.igen \
2640 @SIM_ENABLE_ARCH_mips_TRUE@     mips/dsp2.igen \
2641 @SIM_ENABLE_ARCH_mips_TRUE@     mips/m16.igen \
2642 @SIM_ENABLE_ARCH_mips_TRUE@     mips/m16e.igen \
2643 @SIM_ENABLE_ARCH_mips_TRUE@     mips/mdmx.igen \
2644 @SIM_ENABLE_ARCH_mips_TRUE@     mips/micromipsdsp.igen \
2645 @SIM_ENABLE_ARCH_mips_TRUE@     mips/micromips.igen \
2646 @SIM_ENABLE_ARCH_mips_TRUE@     mips/mips3264r2.igen \
2647 @SIM_ENABLE_ARCH_mips_TRUE@     mips/mips3264r6.igen \
2648 @SIM_ENABLE_ARCH_mips_TRUE@     mips/mips3d.igen \
2649 @SIM_ENABLE_ARCH_mips_TRUE@     mips/sb1.igen \
2650 @SIM_ENABLE_ARCH_mips_TRUE@     mips/tx.igen \
2651 @SIM_ENABLE_ARCH_mips_TRUE@     mips/vr.igen
2652
2653 @SIM_ENABLE_ARCH_mips_TRUE@mips_IGEN_DC = $(srcdir)/mips/mips.dc
2654 @SIM_ENABLE_ARCH_mips_TRUE@mips_M16_DC = $(srcdir)/mips/m16.dc
2655 @SIM_ENABLE_ARCH_mips_TRUE@mips_MICROMIPS32_DC = $(srcdir)/mips/micromips.dc
2656 @SIM_ENABLE_ARCH_mips_TRUE@mips_MICROMIPS16_DC = $(srcdir)/mips/micromips16.dc
2657 @SIM_ENABLE_ARCH_mn10300_TRUE@mn10300_libsim_a_SOURCES =
2658 @SIM_ENABLE_ARCH_mn10300_TRUE@mn10300_libsim_a_LIBADD = \
2659 @SIM_ENABLE_ARCH_mn10300_TRUE@  $(common_libcommon_a_OBJECTS) \
2660 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/itable.o \
2661 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/semantics.o \
2662 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/idecode.o \
2663 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/icache.o \
2664 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/engine.o \
2665 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/irun.o \
2666 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/support.o \
2667 @SIM_ENABLE_ARCH_mn10300_TRUE@  $(patsubst %,mn10300/%,$(SIM_NEW_COMMON_OBJS)) \
2668 @SIM_ENABLE_ARCH_mn10300_TRUE@  $(patsubst %,mn10300/dv-%.o,$(SIM_HW_DEVICES)) \
2669 @SIM_ENABLE_ARCH_mn10300_TRUE@  $(patsubst %,mn10300/dv-%.o,$(mn10300_SIM_EXTRA_HW_DEVICES)) \
2670 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/interp.o \
2671 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/modules.o \
2672 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/op_utils.o \
2673 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/sim-resume.o
2674
2675 @SIM_ENABLE_ARCH_mn10300_TRUE@mn10300_run_SOURCES =
2676 @SIM_ENABLE_ARCH_mn10300_TRUE@mn10300_run_LDADD = \
2677 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/nrun.o \
2678 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/libsim.a \
2679 @SIM_ENABLE_ARCH_mn10300_TRUE@  $(SIM_COMMON_LIBS)
2680
2681 @SIM_ENABLE_ARCH_mn10300_TRUE@mn10300_SIM_EXTRA_HW_DEVICES = mn103cpu mn103int mn103tim mn103ser mn103iop
2682 @SIM_ENABLE_ARCH_mn10300_TRUE@mn10300_BUILT_SRC_FROM_IGEN = \
2683 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/icache.h \
2684 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/icache.c \
2685 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/idecode.h \
2686 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/idecode.c \
2687 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/semantics.h \
2688 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/semantics.c \
2689 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/model.h \
2690 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/model.c \
2691 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/support.h \
2692 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/support.c \
2693 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/itable.h \
2694 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/itable.c \
2695 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/engine.h \
2696 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/engine.c \
2697 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/irun.c
2698
2699 @SIM_ENABLE_ARCH_mn10300_TRUE@mn10300_BUILD_OUTPUTS = \
2700 @SIM_ENABLE_ARCH_mn10300_TRUE@  $(mn10300_BUILT_SRC_FROM_IGEN) \
2701 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/stamp-igen
2702
2703 @SIM_ENABLE_ARCH_mn10300_TRUE@mn10300_IGEN_TRACE = # -G omit-line-numbers # -G trace-rule-selection -G trace-rule-rejection -G trace-entries
2704 @SIM_ENABLE_ARCH_mn10300_TRUE@mn10300_IGEN_INSN = $(srcdir)/mn10300/mn10300.igen
2705 @SIM_ENABLE_ARCH_mn10300_TRUE@mn10300_IGEN_INSN_INC = mn10300/am33.igen mn10300/am33-2.igen
2706 @SIM_ENABLE_ARCH_mn10300_TRUE@mn10300_IGEN_DC = $(srcdir)/mn10300/mn10300.dc
2707 @SIM_ENABLE_ARCH_moxie_TRUE@moxie_libsim_a_SOURCES =
2708 @SIM_ENABLE_ARCH_moxie_TRUE@moxie_libsim_a_LIBADD = \
2709 @SIM_ENABLE_ARCH_moxie_TRUE@    $(common_libcommon_a_OBJECTS) \
2710 @SIM_ENABLE_ARCH_moxie_TRUE@    $(patsubst %,moxie/%,$(SIM_NEW_COMMON_OBJS)) \
2711 @SIM_ENABLE_ARCH_moxie_TRUE@    $(patsubst %,moxie/dv-%.o,$(SIM_HW_DEVICES)) \
2712 @SIM_ENABLE_ARCH_moxie_TRUE@    moxie/interp.o \
2713 @SIM_ENABLE_ARCH_moxie_TRUE@    moxie/modules.o \
2714 @SIM_ENABLE_ARCH_moxie_TRUE@    moxie/sim-resume.o
2715
2716 @SIM_ENABLE_ARCH_moxie_TRUE@moxie_run_SOURCES =
2717 @SIM_ENABLE_ARCH_moxie_TRUE@moxie_run_LDADD = \
2718 @SIM_ENABLE_ARCH_moxie_TRUE@    moxie/nrun.o \
2719 @SIM_ENABLE_ARCH_moxie_TRUE@    moxie/libsim.a \
2720 @SIM_ENABLE_ARCH_moxie_TRUE@    $(SIM_COMMON_LIBS)
2721
2722 @SIM_ENABLE_ARCH_moxie_TRUE@dtbdir = $(datadir)/gdb/dtb
2723 @SIM_ENABLE_ARCH_moxie_TRUE@dtb_DATA = moxie/moxie-gdb.dtb
2724 @SIM_ENABLE_ARCH_msp430_TRUE@msp430_libsim_a_SOURCES =
2725 @SIM_ENABLE_ARCH_msp430_TRUE@msp430_libsim_a_LIBADD = \
2726 @SIM_ENABLE_ARCH_msp430_TRUE@   $(common_libcommon_a_OBJECTS) \
2727 @SIM_ENABLE_ARCH_msp430_TRUE@   $(patsubst %,msp430/%,$(SIM_NEW_COMMON_OBJS)) \
2728 @SIM_ENABLE_ARCH_msp430_TRUE@   $(patsubst %,msp430/dv-%.o,$(SIM_HW_DEVICES)) \
2729 @SIM_ENABLE_ARCH_msp430_TRUE@   msp430/msp430-sim.o \
2730 @SIM_ENABLE_ARCH_msp430_TRUE@   msp430/modules.o \
2731 @SIM_ENABLE_ARCH_msp430_TRUE@   msp430/sim-resume.o
2732
2733 @SIM_ENABLE_ARCH_msp430_TRUE@msp430_run_SOURCES =
2734 @SIM_ENABLE_ARCH_msp430_TRUE@msp430_run_LDADD = \
2735 @SIM_ENABLE_ARCH_msp430_TRUE@   msp430/nrun.o \
2736 @SIM_ENABLE_ARCH_msp430_TRUE@   msp430/libsim.a \
2737 @SIM_ENABLE_ARCH_msp430_TRUE@   $(SIM_COMMON_LIBS)
2738
2739 @SIM_ENABLE_ARCH_or1k_TRUE@or1k_libsim_a_SOURCES =
2740 @SIM_ENABLE_ARCH_or1k_TRUE@or1k_libsim_a_LIBADD = \
2741 @SIM_ENABLE_ARCH_or1k_TRUE@     $(common_libcommon_a_OBJECTS) \
2742 @SIM_ENABLE_ARCH_or1k_TRUE@     $(patsubst %,or1k/%,$(SIM_NEW_COMMON_OBJS)) \
2743 @SIM_ENABLE_ARCH_or1k_TRUE@     $(patsubst %,or1k/dv-%.o,$(SIM_HW_DEVICES)) \
2744 @SIM_ENABLE_ARCH_or1k_TRUE@     or1k/modules.o \
2745 @SIM_ENABLE_ARCH_or1k_TRUE@     \
2746 @SIM_ENABLE_ARCH_or1k_TRUE@     or1k/cgen-accfp.o \
2747 @SIM_ENABLE_ARCH_or1k_TRUE@     or1k/cgen-fpu.o \
2748 @SIM_ENABLE_ARCH_or1k_TRUE@     or1k/cgen-run.o \
2749 @SIM_ENABLE_ARCH_or1k_TRUE@     or1k/cgen-scache.o \
2750 @SIM_ENABLE_ARCH_or1k_TRUE@     or1k/cgen-trace.o \
2751 @SIM_ENABLE_ARCH_or1k_TRUE@     or1k/cgen-utils.o \
2752 @SIM_ENABLE_ARCH_or1k_TRUE@     \
2753 @SIM_ENABLE_ARCH_or1k_TRUE@     or1k/arch.o \
2754 @SIM_ENABLE_ARCH_or1k_TRUE@     or1k/cpu.o \
2755 @SIM_ENABLE_ARCH_or1k_TRUE@     or1k/decode.o \
2756 @SIM_ENABLE_ARCH_or1k_TRUE@     or1k/mloop.o \
2757 @SIM_ENABLE_ARCH_or1k_TRUE@     or1k/model.o \
2758 @SIM_ENABLE_ARCH_or1k_TRUE@     or1k/sem.o \
2759 @SIM_ENABLE_ARCH_or1k_TRUE@     \
2760 @SIM_ENABLE_ARCH_or1k_TRUE@     or1k/or1k.o \
2761 @SIM_ENABLE_ARCH_or1k_TRUE@     or1k/sim-if.o \
2762 @SIM_ENABLE_ARCH_or1k_TRUE@     or1k/traps.o
2763
2764 @SIM_ENABLE_ARCH_or1k_TRUE@or1k_run_SOURCES =
2765 @SIM_ENABLE_ARCH_or1k_TRUE@or1k_run_LDADD = \
2766 @SIM_ENABLE_ARCH_or1k_TRUE@     or1k/nrun.o \
2767 @SIM_ENABLE_ARCH_or1k_TRUE@     or1k/libsim.a \
2768 @SIM_ENABLE_ARCH_or1k_TRUE@     $(SIM_COMMON_LIBS)
2769
2770 @SIM_ENABLE_ARCH_or1k_TRUE@or1kdocdir = $(docdir)/or1k
2771 @SIM_ENABLE_ARCH_or1k_TRUE@or1kdoc_DATA = or1k/README
2772 @SIM_ENABLE_ARCH_or1k_TRUE@or1k_BUILD_OUTPUTS = \
2773 @SIM_ENABLE_ARCH_or1k_TRUE@     or1k/mloop.c \
2774 @SIM_ENABLE_ARCH_or1k_TRUE@     or1k/stamp-mloop
2775
2776 @SIM_ENABLE_ARCH_ppc_TRUE@ppc_run_SOURCES =
2777 @SIM_ENABLE_ARCH_ppc_TRUE@ppc_run_LDADD = \
2778 @SIM_ENABLE_ARCH_ppc_TRUE@      ppc/main.o \
2779 @SIM_ENABLE_ARCH_ppc_TRUE@      ppc/libsim.a \
2780 @SIM_ENABLE_ARCH_ppc_TRUE@      $(SIM_COMMON_LIBS)
2781
2782 @SIM_ENABLE_ARCH_ppc_TRUE@ppcdocdir = $(docdir)/ppc
2783 @SIM_ENABLE_ARCH_ppc_TRUE@ppcdoc_DATA = ppc/BUGS ppc/INSTALL ppc/README ppc/RUN
2784 @SIM_ENABLE_ARCH_pru_TRUE@pru_libsim_a_SOURCES =
2785 @SIM_ENABLE_ARCH_pru_TRUE@pru_libsim_a_LIBADD = \
2786 @SIM_ENABLE_ARCH_pru_TRUE@      $(common_libcommon_a_OBJECTS) \
2787 @SIM_ENABLE_ARCH_pru_TRUE@      $(patsubst %,pru/%,$(SIM_NEW_COMMON_OBJS)) \
2788 @SIM_ENABLE_ARCH_pru_TRUE@      $(patsubst %,pru/dv-%.o,$(SIM_HW_DEVICES)) \
2789 @SIM_ENABLE_ARCH_pru_TRUE@      pru/interp.o \
2790 @SIM_ENABLE_ARCH_pru_TRUE@      pru/modules.o \
2791 @SIM_ENABLE_ARCH_pru_TRUE@      pru/sim-resume.o
2792
2793 @SIM_ENABLE_ARCH_pru_TRUE@pru_run_SOURCES =
2794 @SIM_ENABLE_ARCH_pru_TRUE@pru_run_LDADD = \
2795 @SIM_ENABLE_ARCH_pru_TRUE@      pru/nrun.o \
2796 @SIM_ENABLE_ARCH_pru_TRUE@      pru/libsim.a \
2797 @SIM_ENABLE_ARCH_pru_TRUE@      $(SIM_COMMON_LIBS)
2798
2799 @SIM_ENABLE_ARCH_riscv_TRUE@riscv_libsim_a_SOURCES =
2800 @SIM_ENABLE_ARCH_riscv_TRUE@riscv_libsim_a_LIBADD = \
2801 @SIM_ENABLE_ARCH_riscv_TRUE@    $(common_libcommon_a_OBJECTS) \
2802 @SIM_ENABLE_ARCH_riscv_TRUE@    $(patsubst %,riscv/%,$(SIM_NEW_COMMON_OBJS)) \
2803 @SIM_ENABLE_ARCH_riscv_TRUE@    $(patsubst %,riscv/dv-%.o,$(SIM_HW_DEVICES)) \
2804 @SIM_ENABLE_ARCH_riscv_TRUE@    riscv/interp.o \
2805 @SIM_ENABLE_ARCH_riscv_TRUE@    riscv/machs.o \
2806 @SIM_ENABLE_ARCH_riscv_TRUE@    riscv/modules.o \
2807 @SIM_ENABLE_ARCH_riscv_TRUE@    riscv/sim-main.o \
2808 @SIM_ENABLE_ARCH_riscv_TRUE@    riscv/sim-resume.o
2809
2810 @SIM_ENABLE_ARCH_riscv_TRUE@riscv_run_SOURCES =
2811 @SIM_ENABLE_ARCH_riscv_TRUE@riscv_run_LDADD = \
2812 @SIM_ENABLE_ARCH_riscv_TRUE@    riscv/nrun.o \
2813 @SIM_ENABLE_ARCH_riscv_TRUE@    riscv/libsim.a \
2814 @SIM_ENABLE_ARCH_riscv_TRUE@    $(SIM_COMMON_LIBS)
2815
2816 @SIM_ENABLE_ARCH_rl78_TRUE@rl78_libsim_a_SOURCES =
2817 @SIM_ENABLE_ARCH_rl78_TRUE@rl78_libsim_a_LIBADD = \
2818 @SIM_ENABLE_ARCH_rl78_TRUE@     $(common_libcommon_a_OBJECTS) \
2819 @SIM_ENABLE_ARCH_rl78_TRUE@     rl78/load.o \
2820 @SIM_ENABLE_ARCH_rl78_TRUE@     rl78/mem.o \
2821 @SIM_ENABLE_ARCH_rl78_TRUE@     rl78/cpu.o \
2822 @SIM_ENABLE_ARCH_rl78_TRUE@     rl78/rl78.o \
2823 @SIM_ENABLE_ARCH_rl78_TRUE@     rl78/gdb-if.o \
2824 @SIM_ENABLE_ARCH_rl78_TRUE@     rl78/modules.o \
2825 @SIM_ENABLE_ARCH_rl78_TRUE@     rl78/trace.o
2826
2827 @SIM_ENABLE_ARCH_rl78_TRUE@rl78_run_SOURCES =
2828 @SIM_ENABLE_ARCH_rl78_TRUE@rl78_run_LDADD = \
2829 @SIM_ENABLE_ARCH_rl78_TRUE@     rl78/main.o \
2830 @SIM_ENABLE_ARCH_rl78_TRUE@     rl78/libsim.a \
2831 @SIM_ENABLE_ARCH_rl78_TRUE@     $(SIM_COMMON_LIBS)
2832
2833 @SIM_ENABLE_ARCH_rx_TRUE@rx_libsim_a_SOURCES =
2834 @SIM_ENABLE_ARCH_rx_TRUE@rx_libsim_a_LIBADD = \
2835 @SIM_ENABLE_ARCH_rx_TRUE@       $(common_libcommon_a_OBJECTS) \
2836 @SIM_ENABLE_ARCH_rx_TRUE@       rx/fpu.o \
2837 @SIM_ENABLE_ARCH_rx_TRUE@       rx/load.o \
2838 @SIM_ENABLE_ARCH_rx_TRUE@       rx/mem.o \
2839 @SIM_ENABLE_ARCH_rx_TRUE@       rx/misc.o \
2840 @SIM_ENABLE_ARCH_rx_TRUE@       rx/reg.o \
2841 @SIM_ENABLE_ARCH_rx_TRUE@       rx/rx.o \
2842 @SIM_ENABLE_ARCH_rx_TRUE@       rx/syscalls.o \
2843 @SIM_ENABLE_ARCH_rx_TRUE@       rx/trace.o \
2844 @SIM_ENABLE_ARCH_rx_TRUE@       rx/gdb-if.o \
2845 @SIM_ENABLE_ARCH_rx_TRUE@       rx/err.o \
2846 @SIM_ENABLE_ARCH_rx_TRUE@       rx/modules.o
2847
2848 @SIM_ENABLE_ARCH_rx_TRUE@rx_run_SOURCES =
2849 @SIM_ENABLE_ARCH_rx_TRUE@rx_run_LDADD = \
2850 @SIM_ENABLE_ARCH_rx_TRUE@       rx/main.o \
2851 @SIM_ENABLE_ARCH_rx_TRUE@       rx/libsim.a \
2852 @SIM_ENABLE_ARCH_rx_TRUE@       $(SIM_COMMON_LIBS)
2853
2854 @SIM_ENABLE_ARCH_rx_TRUE@rxdocdir = $(docdir)/rx
2855 @SIM_ENABLE_ARCH_rx_TRUE@rxdoc_DATA = rx/README.txt
2856 @SIM_ENABLE_ARCH_sh_TRUE@sh_libsim_a_SOURCES =
2857 @SIM_ENABLE_ARCH_sh_TRUE@sh_libsim_a_LIBADD = \
2858 @SIM_ENABLE_ARCH_sh_TRUE@       $(common_libcommon_a_OBJECTS) \
2859 @SIM_ENABLE_ARCH_sh_TRUE@       sh/interp.o \
2860 @SIM_ENABLE_ARCH_sh_TRUE@       $(patsubst %,sh/%,$(SIM_NEW_COMMON_OBJS)) \
2861 @SIM_ENABLE_ARCH_sh_TRUE@       $(patsubst %,sh/dv-%.o,$(SIM_HW_DEVICES)) \
2862 @SIM_ENABLE_ARCH_sh_TRUE@       sh/modules.o \
2863 @SIM_ENABLE_ARCH_sh_TRUE@       sh/table.o
2864
2865 @SIM_ENABLE_ARCH_sh_TRUE@sh_run_SOURCES =
2866 @SIM_ENABLE_ARCH_sh_TRUE@sh_run_LDADD = \
2867 @SIM_ENABLE_ARCH_sh_TRUE@       sh/nrun.o \
2868 @SIM_ENABLE_ARCH_sh_TRUE@       sh/libsim.a \
2869 @SIM_ENABLE_ARCH_sh_TRUE@       $(SIM_COMMON_LIBS)
2870
2871 @SIM_ENABLE_ARCH_sh_TRUE@sh_BUILD_OUTPUTS = \
2872 @SIM_ENABLE_ARCH_sh_TRUE@       sh/gencode$(EXEEXT) \
2873 @SIM_ENABLE_ARCH_sh_TRUE@       sh/table.c
2874
2875 @SIM_ENABLE_ARCH_sh_TRUE@sh_gencode_SOURCES = sh/gencode.c
2876 @SIM_ENABLE_ARCH_v850_TRUE@v850_libsim_a_SOURCES =
2877 @SIM_ENABLE_ARCH_v850_TRUE@v850_libsim_a_LIBADD = \
2878 @SIM_ENABLE_ARCH_v850_TRUE@     $(common_libcommon_a_OBJECTS) \
2879 @SIM_ENABLE_ARCH_v850_TRUE@     $(patsubst %,v850/%,$(SIM_NEW_COMMON_OBJS)) \
2880 @SIM_ENABLE_ARCH_v850_TRUE@     $(patsubst %,v850/dv-%.o,$(SIM_HW_DEVICES)) \
2881 @SIM_ENABLE_ARCH_v850_TRUE@     v850/simops.o \
2882 @SIM_ENABLE_ARCH_v850_TRUE@     v850/interp.o \
2883 @SIM_ENABLE_ARCH_v850_TRUE@     v850/itable.o \
2884 @SIM_ENABLE_ARCH_v850_TRUE@     v850/semantics.o \
2885 @SIM_ENABLE_ARCH_v850_TRUE@     v850/idecode.o \
2886 @SIM_ENABLE_ARCH_v850_TRUE@     v850/icache.o \
2887 @SIM_ENABLE_ARCH_v850_TRUE@     v850/engine.o \
2888 @SIM_ENABLE_ARCH_v850_TRUE@     v850/irun.o \
2889 @SIM_ENABLE_ARCH_v850_TRUE@     v850/support.o \
2890 @SIM_ENABLE_ARCH_v850_TRUE@     v850/modules.o \
2891 @SIM_ENABLE_ARCH_v850_TRUE@     v850/sim-resume.o
2892
2893 @SIM_ENABLE_ARCH_v850_TRUE@v850_run_SOURCES =
2894 @SIM_ENABLE_ARCH_v850_TRUE@v850_run_LDADD = \
2895 @SIM_ENABLE_ARCH_v850_TRUE@     v850/nrun.o \
2896 @SIM_ENABLE_ARCH_v850_TRUE@     v850/libsim.a \
2897 @SIM_ENABLE_ARCH_v850_TRUE@     $(SIM_COMMON_LIBS)
2898
2899 @SIM_ENABLE_ARCH_v850_TRUE@v850_BUILT_SRC_FROM_IGEN = \
2900 @SIM_ENABLE_ARCH_v850_TRUE@     v850/icache.h \
2901 @SIM_ENABLE_ARCH_v850_TRUE@     v850/icache.c \
2902 @SIM_ENABLE_ARCH_v850_TRUE@     v850/idecode.h \
2903 @SIM_ENABLE_ARCH_v850_TRUE@     v850/idecode.c \
2904 @SIM_ENABLE_ARCH_v850_TRUE@     v850/semantics.h \
2905 @SIM_ENABLE_ARCH_v850_TRUE@     v850/semantics.c \
2906 @SIM_ENABLE_ARCH_v850_TRUE@     v850/model.h \
2907 @SIM_ENABLE_ARCH_v850_TRUE@     v850/model.c \
2908 @SIM_ENABLE_ARCH_v850_TRUE@     v850/support.h \
2909 @SIM_ENABLE_ARCH_v850_TRUE@     v850/support.c \
2910 @SIM_ENABLE_ARCH_v850_TRUE@     v850/itable.h \
2911 @SIM_ENABLE_ARCH_v850_TRUE@     v850/itable.c \
2912 @SIM_ENABLE_ARCH_v850_TRUE@     v850/engine.h \
2913 @SIM_ENABLE_ARCH_v850_TRUE@     v850/engine.c \
2914 @SIM_ENABLE_ARCH_v850_TRUE@     v850/irun.c
2915
2916 @SIM_ENABLE_ARCH_v850_TRUE@v850_BUILD_OUTPUTS = \
2917 @SIM_ENABLE_ARCH_v850_TRUE@     $(v850_BUILT_SRC_FROM_IGEN) \
2918 @SIM_ENABLE_ARCH_v850_TRUE@     v850/stamp-igen
2919
2920 @SIM_ENABLE_ARCH_v850_TRUE@v850_IGEN_TRACE = # -G omit-line-numbers # -G trace-rule-selection -G trace-rule-rejection -G trace-entries
2921 @SIM_ENABLE_ARCH_v850_TRUE@v850_IGEN_INSN = $(srcdir)/v850/v850.igen
2922 @SIM_ENABLE_ARCH_v850_TRUE@v850_IGEN_DC = $(srcdir)/v850/v850.dc
2923 all: $(BUILT_SOURCES) config.h
2924         $(MAKE) $(AM_MAKEFLAGS) all-recursive
2925
2926 .SUFFIXES:
2927 .SUFFIXES: .c .lo .log .o .obj .test .test$(EXEEXT) .trs
2928 am--refresh: Makefile
2929         @:
2930 $(srcdir)/Makefile.in: @MAINTAINER_MODE_TRUE@ $(srcdir)/Makefile.am $(srcdir)/common/local.mk $(srcdir)/igen/local.mk $(srcdir)/testsuite/local.mk $(srcdir)/testsuite/common/local.mk $(srcdir)/aarch64/local.mk $(srcdir)/arm/local.mk $(srcdir)/avr/local.mk $(srcdir)/bfin/local.mk $(srcdir)/bpf/local.mk $(srcdir)/cr16/local.mk $(srcdir)/cris/local.mk $(srcdir)/d10v/local.mk $(srcdir)/erc32/local.mk $(srcdir)/example-synacor/local.mk $(srcdir)/frv/local.mk $(srcdir)/ft32/local.mk $(srcdir)/h8300/local.mk $(srcdir)/iq2000/local.mk $(srcdir)/lm32/local.mk $(srcdir)/m32c/local.mk $(srcdir)/m32r/local.mk $(srcdir)/m68hc11/local.mk $(srcdir)/mcore/local.mk $(srcdir)/microblaze/local.mk $(srcdir)/mips/local.mk $(srcdir)/mn10300/local.mk $(srcdir)/moxie/local.mk $(srcdir)/msp430/local.mk $(srcdir)/or1k/local.mk $(srcdir)/ppc/local.mk $(srcdir)/pru/local.mk $(srcdir)/riscv/local.mk $(srcdir)/rl78/local.mk $(srcdir)/rx/local.mk $(srcdir)/sh/local.mk $(srcdir)/v850/local.mk $(am__configure_deps)
2931         @for dep in $?; do \
2932           case '$(am__configure_deps)' in \
2933             *$$dep*) \
2934               echo ' cd $(srcdir) && $(AUTOMAKE) --foreign'; \
2935               $(am__cd) $(srcdir) && $(AUTOMAKE) --foreign \
2936                 && exit 0; \
2937               exit 1;; \
2938           esac; \
2939         done; \
2940         echo ' cd $(top_srcdir) && $(AUTOMAKE) --foreign Makefile'; \
2941         $(am__cd) $(top_srcdir) && \
2942           $(AUTOMAKE) --foreign Makefile
2943 Makefile: $(srcdir)/Makefile.in $(top_builddir)/config.status
2944         @case '$?' in \
2945           *config.status*) \
2946             echo ' $(SHELL) ./config.status'; \
2947             $(SHELL) ./config.status;; \
2948           *) \
2949             echo ' cd $(top_builddir) && $(SHELL) ./config.status $@ $(am__depfiles_maybe)'; \
2950             cd $(top_builddir) && $(SHELL) ./config.status $@ $(am__depfiles_maybe);; \
2951         esac;
2952 $(srcdir)/common/local.mk $(srcdir)/igen/local.mk $(srcdir)/testsuite/local.mk $(srcdir)/testsuite/common/local.mk $(srcdir)/aarch64/local.mk $(srcdir)/arm/local.mk $(srcdir)/avr/local.mk $(srcdir)/bfin/local.mk $(srcdir)/bpf/local.mk $(srcdir)/cr16/local.mk $(srcdir)/cris/local.mk $(srcdir)/d10v/local.mk $(srcdir)/erc32/local.mk $(srcdir)/example-synacor/local.mk $(srcdir)/frv/local.mk $(srcdir)/ft32/local.mk $(srcdir)/h8300/local.mk $(srcdir)/iq2000/local.mk $(srcdir)/lm32/local.mk $(srcdir)/m32c/local.mk $(srcdir)/m32r/local.mk $(srcdir)/m68hc11/local.mk $(srcdir)/mcore/local.mk $(srcdir)/microblaze/local.mk $(srcdir)/mips/local.mk $(srcdir)/mn10300/local.mk $(srcdir)/moxie/local.mk $(srcdir)/msp430/local.mk $(srcdir)/or1k/local.mk $(srcdir)/ppc/local.mk $(srcdir)/pru/local.mk $(srcdir)/riscv/local.mk $(srcdir)/rl78/local.mk $(srcdir)/rx/local.mk $(srcdir)/sh/local.mk $(srcdir)/v850/local.mk $(am__empty):
2953
2954 $(top_builddir)/config.status: $(top_srcdir)/configure $(CONFIG_STATUS_DEPENDENCIES)
2955         $(SHELL) ./config.status --recheck
2956
2957 $(top_srcdir)/configure: @MAINTAINER_MODE_TRUE@ $(am__configure_deps)
2958         $(am__cd) $(srcdir) && $(AUTOCONF)
2959 $(ACLOCAL_M4): @MAINTAINER_MODE_TRUE@ $(am__aclocal_m4_deps)
2960         $(am__cd) $(srcdir) && $(ACLOCAL) $(ACLOCAL_AMFLAGS)
2961 $(am__aclocal_m4_deps):
2962
2963 config.h: stamp-h1
2964         @test -f $@ || rm -f stamp-h1
2965         @test -f $@ || $(MAKE) $(AM_MAKEFLAGS) stamp-h1
2966
2967 stamp-h1: $(srcdir)/config.h.in $(top_builddir)/config.status
2968         @rm -f stamp-h1
2969         cd $(top_builddir) && $(SHELL) ./config.status config.h
2970 $(srcdir)/config.h.in: @MAINTAINER_MODE_TRUE@ $(am__configure_deps)
2971         ($(am__cd) $(top_srcdir) && $(AUTOHEADER))
2972         rm -f stamp-h1
2973         touch $@
2974
2975 distclean-hdr:
2976         -rm -f config.h stamp-h1
2977 Make-common.sim: $(top_builddir)/config.status $(top_srcdir)/common/Make-common.in
2978         cd $(top_builddir) && $(SHELL) ./config.status $@
2979 aarch64/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/aarch64/Makefile.in
2980         cd $(top_builddir) && $(SHELL) ./config.status $@
2981 aarch64/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
2982         cd $(top_builddir) && $(SHELL) ./config.status $@
2983 arm/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/arm/Makefile.in
2984         cd $(top_builddir) && $(SHELL) ./config.status $@
2985 arm/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
2986         cd $(top_builddir) && $(SHELL) ./config.status $@
2987 avr/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/avr/Makefile.in
2988         cd $(top_builddir) && $(SHELL) ./config.status $@
2989 avr/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
2990         cd $(top_builddir) && $(SHELL) ./config.status $@
2991 bfin/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/bfin/Makefile.in
2992         cd $(top_builddir) && $(SHELL) ./config.status $@
2993 bfin/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
2994         cd $(top_builddir) && $(SHELL) ./config.status $@
2995 bpf/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/bpf/Makefile.in
2996         cd $(top_builddir) && $(SHELL) ./config.status $@
2997 bpf/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
2998         cd $(top_builddir) && $(SHELL) ./config.status $@
2999 cr16/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/cr16/Makefile.in
3000         cd $(top_builddir) && $(SHELL) ./config.status $@
3001 cr16/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
3002         cd $(top_builddir) && $(SHELL) ./config.status $@
3003 cris/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/cris/Makefile.in
3004         cd $(top_builddir) && $(SHELL) ./config.status $@
3005 cris/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
3006         cd $(top_builddir) && $(SHELL) ./config.status $@
3007 d10v/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/d10v/Makefile.in
3008         cd $(top_builddir) && $(SHELL) ./config.status $@
3009 d10v/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
3010         cd $(top_builddir) && $(SHELL) ./config.status $@
3011 frv/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/frv/Makefile.in
3012         cd $(top_builddir) && $(SHELL) ./config.status $@
3013 frv/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
3014         cd $(top_builddir) && $(SHELL) ./config.status $@
3015 ft32/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/ft32/Makefile.in
3016         cd $(top_builddir) && $(SHELL) ./config.status $@
3017 ft32/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
3018         cd $(top_builddir) && $(SHELL) ./config.status $@
3019 h8300/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/h8300/Makefile.in
3020         cd $(top_builddir) && $(SHELL) ./config.status $@
3021 h8300/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
3022         cd $(top_builddir) && $(SHELL) ./config.status $@
3023 iq2000/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/iq2000/Makefile.in
3024         cd $(top_builddir) && $(SHELL) ./config.status $@
3025 iq2000/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
3026         cd $(top_builddir) && $(SHELL) ./config.status $@
3027 lm32/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/lm32/Makefile.in
3028         cd $(top_builddir) && $(SHELL) ./config.status $@
3029 lm32/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
3030         cd $(top_builddir) && $(SHELL) ./config.status $@
3031 m32c/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/m32c/Makefile.in
3032         cd $(top_builddir) && $(SHELL) ./config.status $@
3033 m32c/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
3034         cd $(top_builddir) && $(SHELL) ./config.status $@
3035 m32r/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/m32r/Makefile.in
3036         cd $(top_builddir) && $(SHELL) ./config.status $@
3037 m32r/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
3038         cd $(top_builddir) && $(SHELL) ./config.status $@
3039 m68hc11/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/m68hc11/Makefile.in
3040         cd $(top_builddir) && $(SHELL) ./config.status $@
3041 m68hc11/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
3042         cd $(top_builddir) && $(SHELL) ./config.status $@
3043 mcore/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/mcore/Makefile.in
3044         cd $(top_builddir) && $(SHELL) ./config.status $@
3045 mcore/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
3046         cd $(top_builddir) && $(SHELL) ./config.status $@
3047 microblaze/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/microblaze/Makefile.in
3048         cd $(top_builddir) && $(SHELL) ./config.status $@
3049 microblaze/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
3050         cd $(top_builddir) && $(SHELL) ./config.status $@
3051 mips/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/mips/Makefile.in
3052         cd $(top_builddir) && $(SHELL) ./config.status $@
3053 mips/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
3054         cd $(top_builddir) && $(SHELL) ./config.status $@
3055 mn10300/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/mn10300/Makefile.in
3056         cd $(top_builddir) && $(SHELL) ./config.status $@
3057 mn10300/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
3058         cd $(top_builddir) && $(SHELL) ./config.status $@
3059 moxie/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/moxie/Makefile.in
3060         cd $(top_builddir) && $(SHELL) ./config.status $@
3061 moxie/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
3062         cd $(top_builddir) && $(SHELL) ./config.status $@
3063 msp430/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/msp430/Makefile.in
3064         cd $(top_builddir) && $(SHELL) ./config.status $@
3065 msp430/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
3066         cd $(top_builddir) && $(SHELL) ./config.status $@
3067 or1k/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/or1k/Makefile.in
3068         cd $(top_builddir) && $(SHELL) ./config.status $@
3069 or1k/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
3070         cd $(top_builddir) && $(SHELL) ./config.status $@
3071 ppc/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
3072         cd $(top_builddir) && $(SHELL) ./config.status $@
3073 pru/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/pru/Makefile.in
3074         cd $(top_builddir) && $(SHELL) ./config.status $@
3075 pru/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
3076         cd $(top_builddir) && $(SHELL) ./config.status $@
3077 riscv/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/riscv/Makefile.in
3078         cd $(top_builddir) && $(SHELL) ./config.status $@
3079 riscv/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
3080         cd $(top_builddir) && $(SHELL) ./config.status $@
3081 rl78/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/rl78/Makefile.in
3082         cd $(top_builddir) && $(SHELL) ./config.status $@
3083 rl78/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
3084         cd $(top_builddir) && $(SHELL) ./config.status $@
3085 rx/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/rx/Makefile.in
3086         cd $(top_builddir) && $(SHELL) ./config.status $@
3087 rx/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
3088         cd $(top_builddir) && $(SHELL) ./config.status $@
3089 sh/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/sh/Makefile.in
3090         cd $(top_builddir) && $(SHELL) ./config.status $@
3091 sh/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
3092         cd $(top_builddir) && $(SHELL) ./config.status $@
3093 erc32/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/erc32/Makefile.in
3094         cd $(top_builddir) && $(SHELL) ./config.status $@
3095 erc32/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
3096         cd $(top_builddir) && $(SHELL) ./config.status $@
3097 v850/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/v850/Makefile.in
3098         cd $(top_builddir) && $(SHELL) ./config.status $@
3099 v850/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
3100         cd $(top_builddir) && $(SHELL) ./config.status $@
3101 example-synacor/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/example-synacor/Makefile.in
3102         cd $(top_builddir) && $(SHELL) ./config.status $@
3103 example-synacor/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
3104         cd $(top_builddir) && $(SHELL) ./config.status $@
3105 arch-subdir.mk: $(top_builddir)/config.status $(srcdir)/arch-subdir.mk.in
3106         cd $(top_builddir) && $(SHELL) ./config.status $@
3107 .gdbinit: $(top_builddir)/config.status $(srcdir)/gdbinit.in
3108         cd $(top_builddir) && $(SHELL) ./config.status $@
3109
3110 clean-noinstLIBRARIES:
3111         -test -z "$(noinst_LIBRARIES)" || rm -f $(noinst_LIBRARIES)
3112 aarch64/$(am__dirstamp):
3113         @$(MKDIR_P) aarch64
3114         @: > aarch64/$(am__dirstamp)
3115
3116 aarch64/libsim.a: $(aarch64_libsim_a_OBJECTS) $(aarch64_libsim_a_DEPENDENCIES) $(EXTRA_aarch64_libsim_a_DEPENDENCIES) aarch64/$(am__dirstamp)
3117         $(AM_V_at)-rm -f aarch64/libsim.a
3118         $(AM_V_AR)$(aarch64_libsim_a_AR) aarch64/libsim.a $(aarch64_libsim_a_OBJECTS) $(aarch64_libsim_a_LIBADD)
3119         $(AM_V_at)$(RANLIB) aarch64/libsim.a
3120 arm/$(am__dirstamp):
3121         @$(MKDIR_P) arm
3122         @: > arm/$(am__dirstamp)
3123
3124 arm/libsim.a: $(arm_libsim_a_OBJECTS) $(arm_libsim_a_DEPENDENCIES) $(EXTRA_arm_libsim_a_DEPENDENCIES) arm/$(am__dirstamp)
3125         $(AM_V_at)-rm -f arm/libsim.a
3126         $(AM_V_AR)$(arm_libsim_a_AR) arm/libsim.a $(arm_libsim_a_OBJECTS) $(arm_libsim_a_LIBADD)
3127         $(AM_V_at)$(RANLIB) arm/libsim.a
3128 avr/$(am__dirstamp):
3129         @$(MKDIR_P) avr
3130         @: > avr/$(am__dirstamp)
3131
3132 avr/libsim.a: $(avr_libsim_a_OBJECTS) $(avr_libsim_a_DEPENDENCIES) $(EXTRA_avr_libsim_a_DEPENDENCIES) avr/$(am__dirstamp)
3133         $(AM_V_at)-rm -f avr/libsim.a
3134         $(AM_V_AR)$(avr_libsim_a_AR) avr/libsim.a $(avr_libsim_a_OBJECTS) $(avr_libsim_a_LIBADD)
3135         $(AM_V_at)$(RANLIB) avr/libsim.a
3136 bfin/$(am__dirstamp):
3137         @$(MKDIR_P) bfin
3138         @: > bfin/$(am__dirstamp)
3139
3140 bfin/libsim.a: $(bfin_libsim_a_OBJECTS) $(bfin_libsim_a_DEPENDENCIES) $(EXTRA_bfin_libsim_a_DEPENDENCIES) bfin/$(am__dirstamp)
3141         $(AM_V_at)-rm -f bfin/libsim.a
3142         $(AM_V_AR)$(bfin_libsim_a_AR) bfin/libsim.a $(bfin_libsim_a_OBJECTS) $(bfin_libsim_a_LIBADD)
3143         $(AM_V_at)$(RANLIB) bfin/libsim.a
3144 bpf/$(am__dirstamp):
3145         @$(MKDIR_P) bpf
3146         @: > bpf/$(am__dirstamp)
3147
3148 bpf/libsim.a: $(bpf_libsim_a_OBJECTS) $(bpf_libsim_a_DEPENDENCIES) $(EXTRA_bpf_libsim_a_DEPENDENCIES) bpf/$(am__dirstamp)
3149         $(AM_V_at)-rm -f bpf/libsim.a
3150         $(AM_V_AR)$(bpf_libsim_a_AR) bpf/libsim.a $(bpf_libsim_a_OBJECTS) $(bpf_libsim_a_LIBADD)
3151         $(AM_V_at)$(RANLIB) bpf/libsim.a
3152 common/$(am__dirstamp):
3153         @$(MKDIR_P) common
3154         @: > common/$(am__dirstamp)
3155 common/$(DEPDIR)/$(am__dirstamp):
3156         @$(MKDIR_P) common/$(DEPDIR)
3157         @: > common/$(DEPDIR)/$(am__dirstamp)
3158 common/callback.$(OBJEXT): common/$(am__dirstamp) \
3159         common/$(DEPDIR)/$(am__dirstamp)
3160 common/portability.$(OBJEXT): common/$(am__dirstamp) \
3161         common/$(DEPDIR)/$(am__dirstamp)
3162 common/sim-load.$(OBJEXT): common/$(am__dirstamp) \
3163         common/$(DEPDIR)/$(am__dirstamp)
3164 common/syscall.$(OBJEXT): common/$(am__dirstamp) \
3165         common/$(DEPDIR)/$(am__dirstamp)
3166 common/target-newlib-errno.$(OBJEXT): common/$(am__dirstamp) \
3167         common/$(DEPDIR)/$(am__dirstamp)
3168 common/target-newlib-open.$(OBJEXT): common/$(am__dirstamp) \
3169         common/$(DEPDIR)/$(am__dirstamp)
3170 common/target-newlib-signal.$(OBJEXT): common/$(am__dirstamp) \
3171         common/$(DEPDIR)/$(am__dirstamp)
3172 common/target-newlib-syscall.$(OBJEXT): common/$(am__dirstamp) \
3173         common/$(DEPDIR)/$(am__dirstamp)
3174 common/version.$(OBJEXT): common/$(am__dirstamp) \
3175         common/$(DEPDIR)/$(am__dirstamp)
3176
3177 common/libcommon.a: $(common_libcommon_a_OBJECTS) $(common_libcommon_a_DEPENDENCIES) $(EXTRA_common_libcommon_a_DEPENDENCIES) common/$(am__dirstamp)
3178         $(AM_V_at)-rm -f common/libcommon.a
3179         $(AM_V_AR)$(common_libcommon_a_AR) common/libcommon.a $(common_libcommon_a_OBJECTS) $(common_libcommon_a_LIBADD)
3180         $(AM_V_at)$(RANLIB) common/libcommon.a
3181 cr16/$(am__dirstamp):
3182         @$(MKDIR_P) cr16
3183         @: > cr16/$(am__dirstamp)
3184
3185 cr16/libsim.a: $(cr16_libsim_a_OBJECTS) $(cr16_libsim_a_DEPENDENCIES) $(EXTRA_cr16_libsim_a_DEPENDENCIES) cr16/$(am__dirstamp)
3186         $(AM_V_at)-rm -f cr16/libsim.a
3187         $(AM_V_AR)$(cr16_libsim_a_AR) cr16/libsim.a $(cr16_libsim_a_OBJECTS) $(cr16_libsim_a_LIBADD)
3188         $(AM_V_at)$(RANLIB) cr16/libsim.a
3189 cris/$(am__dirstamp):
3190         @$(MKDIR_P) cris
3191         @: > cris/$(am__dirstamp)
3192
3193 cris/libsim.a: $(cris_libsim_a_OBJECTS) $(cris_libsim_a_DEPENDENCIES) $(EXTRA_cris_libsim_a_DEPENDENCIES) cris/$(am__dirstamp)
3194         $(AM_V_at)-rm -f cris/libsim.a
3195         $(AM_V_AR)$(cris_libsim_a_AR) cris/libsim.a $(cris_libsim_a_OBJECTS) $(cris_libsim_a_LIBADD)
3196         $(AM_V_at)$(RANLIB) cris/libsim.a
3197 d10v/$(am__dirstamp):
3198         @$(MKDIR_P) d10v
3199         @: > d10v/$(am__dirstamp)
3200
3201 d10v/libsim.a: $(d10v_libsim_a_OBJECTS) $(d10v_libsim_a_DEPENDENCIES) $(EXTRA_d10v_libsim_a_DEPENDENCIES) d10v/$(am__dirstamp)
3202         $(AM_V_at)-rm -f d10v/libsim.a
3203         $(AM_V_AR)$(d10v_libsim_a_AR) d10v/libsim.a $(d10v_libsim_a_OBJECTS) $(d10v_libsim_a_LIBADD)
3204         $(AM_V_at)$(RANLIB) d10v/libsim.a
3205 erc32/$(am__dirstamp):
3206         @$(MKDIR_P) erc32
3207         @: > erc32/$(am__dirstamp)
3208
3209 erc32/libsim.a: $(erc32_libsim_a_OBJECTS) $(erc32_libsim_a_DEPENDENCIES) $(EXTRA_erc32_libsim_a_DEPENDENCIES) erc32/$(am__dirstamp)
3210         $(AM_V_at)-rm -f erc32/libsim.a
3211         $(AM_V_AR)$(erc32_libsim_a_AR) erc32/libsim.a $(erc32_libsim_a_OBJECTS) $(erc32_libsim_a_LIBADD)
3212         $(AM_V_at)$(RANLIB) erc32/libsim.a
3213 example-synacor/$(am__dirstamp):
3214         @$(MKDIR_P) example-synacor
3215         @: > example-synacor/$(am__dirstamp)
3216
3217 example-synacor/libsim.a: $(example_synacor_libsim_a_OBJECTS) $(example_synacor_libsim_a_DEPENDENCIES) $(EXTRA_example_synacor_libsim_a_DEPENDENCIES) example-synacor/$(am__dirstamp)
3218         $(AM_V_at)-rm -f example-synacor/libsim.a
3219         $(AM_V_AR)$(example_synacor_libsim_a_AR) example-synacor/libsim.a $(example_synacor_libsim_a_OBJECTS) $(example_synacor_libsim_a_LIBADD)
3220         $(AM_V_at)$(RANLIB) example-synacor/libsim.a
3221 frv/$(am__dirstamp):
3222         @$(MKDIR_P) frv
3223         @: > frv/$(am__dirstamp)
3224
3225 frv/libsim.a: $(frv_libsim_a_OBJECTS) $(frv_libsim_a_DEPENDENCIES) $(EXTRA_frv_libsim_a_DEPENDENCIES) frv/$(am__dirstamp)
3226         $(AM_V_at)-rm -f frv/libsim.a
3227         $(AM_V_AR)$(frv_libsim_a_AR) frv/libsim.a $(frv_libsim_a_OBJECTS) $(frv_libsim_a_LIBADD)
3228         $(AM_V_at)$(RANLIB) frv/libsim.a
3229 ft32/$(am__dirstamp):
3230         @$(MKDIR_P) ft32
3231         @: > ft32/$(am__dirstamp)
3232
3233 ft32/libsim.a: $(ft32_libsim_a_OBJECTS) $(ft32_libsim_a_DEPENDENCIES) $(EXTRA_ft32_libsim_a_DEPENDENCIES) ft32/$(am__dirstamp)
3234         $(AM_V_at)-rm -f ft32/libsim.a
3235         $(AM_V_AR)$(ft32_libsim_a_AR) ft32/libsim.a $(ft32_libsim_a_OBJECTS) $(ft32_libsim_a_LIBADD)
3236         $(AM_V_at)$(RANLIB) ft32/libsim.a
3237 h8300/$(am__dirstamp):
3238         @$(MKDIR_P) h8300
3239         @: > h8300/$(am__dirstamp)
3240
3241 h8300/libsim.a: $(h8300_libsim_a_OBJECTS) $(h8300_libsim_a_DEPENDENCIES) $(EXTRA_h8300_libsim_a_DEPENDENCIES) h8300/$(am__dirstamp)
3242         $(AM_V_at)-rm -f h8300/libsim.a
3243         $(AM_V_AR)$(h8300_libsim_a_AR) h8300/libsim.a $(h8300_libsim_a_OBJECTS) $(h8300_libsim_a_LIBADD)
3244         $(AM_V_at)$(RANLIB) h8300/libsim.a
3245 igen/$(am__dirstamp):
3246         @$(MKDIR_P) igen
3247         @: > igen/$(am__dirstamp)
3248 igen/$(DEPDIR)/$(am__dirstamp):
3249         @$(MKDIR_P) igen/$(DEPDIR)
3250         @: > igen/$(DEPDIR)/$(am__dirstamp)
3251 igen/table.$(OBJEXT): igen/$(am__dirstamp) \
3252         igen/$(DEPDIR)/$(am__dirstamp)
3253 igen/lf.$(OBJEXT): igen/$(am__dirstamp) igen/$(DEPDIR)/$(am__dirstamp)
3254 igen/misc.$(OBJEXT): igen/$(am__dirstamp) \
3255         igen/$(DEPDIR)/$(am__dirstamp)
3256 igen/filter_host.$(OBJEXT): igen/$(am__dirstamp) \
3257         igen/$(DEPDIR)/$(am__dirstamp)
3258 igen/ld-decode.$(OBJEXT): igen/$(am__dirstamp) \
3259         igen/$(DEPDIR)/$(am__dirstamp)
3260 igen/ld-cache.$(OBJEXT): igen/$(am__dirstamp) \
3261         igen/$(DEPDIR)/$(am__dirstamp)
3262 igen/filter.$(OBJEXT): igen/$(am__dirstamp) \
3263         igen/$(DEPDIR)/$(am__dirstamp)
3264 igen/ld-insn.$(OBJEXT): igen/$(am__dirstamp) \
3265         igen/$(DEPDIR)/$(am__dirstamp)
3266 igen/gen-model.$(OBJEXT): igen/$(am__dirstamp) \
3267         igen/$(DEPDIR)/$(am__dirstamp)
3268 igen/gen-itable.$(OBJEXT): igen/$(am__dirstamp) \
3269         igen/$(DEPDIR)/$(am__dirstamp)
3270 igen/gen-icache.$(OBJEXT): igen/$(am__dirstamp) \
3271         igen/$(DEPDIR)/$(am__dirstamp)
3272 igen/gen-semantics.$(OBJEXT): igen/$(am__dirstamp) \
3273         igen/$(DEPDIR)/$(am__dirstamp)
3274 igen/gen-idecode.$(OBJEXT): igen/$(am__dirstamp) \
3275         igen/$(DEPDIR)/$(am__dirstamp)
3276 igen/gen-support.$(OBJEXT): igen/$(am__dirstamp) \
3277         igen/$(DEPDIR)/$(am__dirstamp)
3278 igen/gen-engine.$(OBJEXT): igen/$(am__dirstamp) \
3279         igen/$(DEPDIR)/$(am__dirstamp)
3280 igen/gen.$(OBJEXT): igen/$(am__dirstamp) \
3281         igen/$(DEPDIR)/$(am__dirstamp)
3282
3283 @SIM_ENABLE_IGEN_FALSE@igen/libigen.a: $(igen_libigen_a_OBJECTS) $(igen_libigen_a_DEPENDENCIES) $(EXTRA_igen_libigen_a_DEPENDENCIES) igen/$(am__dirstamp)
3284 @SIM_ENABLE_IGEN_FALSE@ $(AM_V_at)-rm -f igen/libigen.a
3285 @SIM_ENABLE_IGEN_FALSE@ $(AM_V_AR)$(igen_libigen_a_AR) igen/libigen.a $(igen_libigen_a_OBJECTS) $(igen_libigen_a_LIBADD)
3286 @SIM_ENABLE_IGEN_FALSE@ $(AM_V_at)$(RANLIB) igen/libigen.a
3287 iq2000/$(am__dirstamp):
3288         @$(MKDIR_P) iq2000
3289         @: > iq2000/$(am__dirstamp)
3290
3291 iq2000/libsim.a: $(iq2000_libsim_a_OBJECTS) $(iq2000_libsim_a_DEPENDENCIES) $(EXTRA_iq2000_libsim_a_DEPENDENCIES) iq2000/$(am__dirstamp)
3292         $(AM_V_at)-rm -f iq2000/libsim.a
3293         $(AM_V_AR)$(iq2000_libsim_a_AR) iq2000/libsim.a $(iq2000_libsim_a_OBJECTS) $(iq2000_libsim_a_LIBADD)
3294         $(AM_V_at)$(RANLIB) iq2000/libsim.a
3295 lm32/$(am__dirstamp):
3296         @$(MKDIR_P) lm32
3297         @: > lm32/$(am__dirstamp)
3298
3299 lm32/libsim.a: $(lm32_libsim_a_OBJECTS) $(lm32_libsim_a_DEPENDENCIES) $(EXTRA_lm32_libsim_a_DEPENDENCIES) lm32/$(am__dirstamp)
3300         $(AM_V_at)-rm -f lm32/libsim.a
3301         $(AM_V_AR)$(lm32_libsim_a_AR) lm32/libsim.a $(lm32_libsim_a_OBJECTS) $(lm32_libsim_a_LIBADD)
3302         $(AM_V_at)$(RANLIB) lm32/libsim.a
3303 m32c/$(am__dirstamp):
3304         @$(MKDIR_P) m32c
3305         @: > m32c/$(am__dirstamp)
3306
3307 m32c/libsim.a: $(m32c_libsim_a_OBJECTS) $(m32c_libsim_a_DEPENDENCIES) $(EXTRA_m32c_libsim_a_DEPENDENCIES) m32c/$(am__dirstamp)
3308         $(AM_V_at)-rm -f m32c/libsim.a
3309         $(AM_V_AR)$(m32c_libsim_a_AR) m32c/libsim.a $(m32c_libsim_a_OBJECTS) $(m32c_libsim_a_LIBADD)
3310         $(AM_V_at)$(RANLIB) m32c/libsim.a
3311 m32r/$(am__dirstamp):
3312         @$(MKDIR_P) m32r
3313         @: > m32r/$(am__dirstamp)
3314
3315 m32r/libsim.a: $(m32r_libsim_a_OBJECTS) $(m32r_libsim_a_DEPENDENCIES) $(EXTRA_m32r_libsim_a_DEPENDENCIES) m32r/$(am__dirstamp)
3316         $(AM_V_at)-rm -f m32r/libsim.a
3317         $(AM_V_AR)$(m32r_libsim_a_AR) m32r/libsim.a $(m32r_libsim_a_OBJECTS) $(m32r_libsim_a_LIBADD)
3318         $(AM_V_at)$(RANLIB) m32r/libsim.a
3319 m68hc11/$(am__dirstamp):
3320         @$(MKDIR_P) m68hc11
3321         @: > m68hc11/$(am__dirstamp)
3322
3323 m68hc11/libsim.a: $(m68hc11_libsim_a_OBJECTS) $(m68hc11_libsim_a_DEPENDENCIES) $(EXTRA_m68hc11_libsim_a_DEPENDENCIES) m68hc11/$(am__dirstamp)
3324         $(AM_V_at)-rm -f m68hc11/libsim.a
3325         $(AM_V_AR)$(m68hc11_libsim_a_AR) m68hc11/libsim.a $(m68hc11_libsim_a_OBJECTS) $(m68hc11_libsim_a_LIBADD)
3326         $(AM_V_at)$(RANLIB) m68hc11/libsim.a
3327 mcore/$(am__dirstamp):
3328         @$(MKDIR_P) mcore
3329         @: > mcore/$(am__dirstamp)
3330
3331 mcore/libsim.a: $(mcore_libsim_a_OBJECTS) $(mcore_libsim_a_DEPENDENCIES) $(EXTRA_mcore_libsim_a_DEPENDENCIES) mcore/$(am__dirstamp)
3332         $(AM_V_at)-rm -f mcore/libsim.a
3333         $(AM_V_AR)$(mcore_libsim_a_AR) mcore/libsim.a $(mcore_libsim_a_OBJECTS) $(mcore_libsim_a_LIBADD)
3334         $(AM_V_at)$(RANLIB) mcore/libsim.a
3335 microblaze/$(am__dirstamp):
3336         @$(MKDIR_P) microblaze
3337         @: > microblaze/$(am__dirstamp)
3338
3339 microblaze/libsim.a: $(microblaze_libsim_a_OBJECTS) $(microblaze_libsim_a_DEPENDENCIES) $(EXTRA_microblaze_libsim_a_DEPENDENCIES) microblaze/$(am__dirstamp)
3340         $(AM_V_at)-rm -f microblaze/libsim.a
3341         $(AM_V_AR)$(microblaze_libsim_a_AR) microblaze/libsim.a $(microblaze_libsim_a_OBJECTS) $(microblaze_libsim_a_LIBADD)
3342         $(AM_V_at)$(RANLIB) microblaze/libsim.a
3343 mips/$(am__dirstamp):
3344         @$(MKDIR_P) mips
3345         @: > mips/$(am__dirstamp)
3346
3347 mips/libsim.a: $(mips_libsim_a_OBJECTS) $(mips_libsim_a_DEPENDENCIES) $(EXTRA_mips_libsim_a_DEPENDENCIES) mips/$(am__dirstamp)
3348         $(AM_V_at)-rm -f mips/libsim.a
3349         $(AM_V_AR)$(mips_libsim_a_AR) mips/libsim.a $(mips_libsim_a_OBJECTS) $(mips_libsim_a_LIBADD)
3350         $(AM_V_at)$(RANLIB) mips/libsim.a
3351 mn10300/$(am__dirstamp):
3352         @$(MKDIR_P) mn10300
3353         @: > mn10300/$(am__dirstamp)
3354
3355 mn10300/libsim.a: $(mn10300_libsim_a_OBJECTS) $(mn10300_libsim_a_DEPENDENCIES) $(EXTRA_mn10300_libsim_a_DEPENDENCIES) mn10300/$(am__dirstamp)
3356         $(AM_V_at)-rm -f mn10300/libsim.a
3357         $(AM_V_AR)$(mn10300_libsim_a_AR) mn10300/libsim.a $(mn10300_libsim_a_OBJECTS) $(mn10300_libsim_a_LIBADD)
3358         $(AM_V_at)$(RANLIB) mn10300/libsim.a
3359 moxie/$(am__dirstamp):
3360         @$(MKDIR_P) moxie
3361         @: > moxie/$(am__dirstamp)
3362
3363 moxie/libsim.a: $(moxie_libsim_a_OBJECTS) $(moxie_libsim_a_DEPENDENCIES) $(EXTRA_moxie_libsim_a_DEPENDENCIES) moxie/$(am__dirstamp)
3364         $(AM_V_at)-rm -f moxie/libsim.a
3365         $(AM_V_AR)$(moxie_libsim_a_AR) moxie/libsim.a $(moxie_libsim_a_OBJECTS) $(moxie_libsim_a_LIBADD)
3366         $(AM_V_at)$(RANLIB) moxie/libsim.a
3367 msp430/$(am__dirstamp):
3368         @$(MKDIR_P) msp430
3369         @: > msp430/$(am__dirstamp)
3370
3371 msp430/libsim.a: $(msp430_libsim_a_OBJECTS) $(msp430_libsim_a_DEPENDENCIES) $(EXTRA_msp430_libsim_a_DEPENDENCIES) msp430/$(am__dirstamp)
3372         $(AM_V_at)-rm -f msp430/libsim.a
3373         $(AM_V_AR)$(msp430_libsim_a_AR) msp430/libsim.a $(msp430_libsim_a_OBJECTS) $(msp430_libsim_a_LIBADD)
3374         $(AM_V_at)$(RANLIB) msp430/libsim.a
3375 or1k/$(am__dirstamp):
3376         @$(MKDIR_P) or1k
3377         @: > or1k/$(am__dirstamp)
3378
3379 or1k/libsim.a: $(or1k_libsim_a_OBJECTS) $(or1k_libsim_a_DEPENDENCIES) $(EXTRA_or1k_libsim_a_DEPENDENCIES) or1k/$(am__dirstamp)
3380         $(AM_V_at)-rm -f or1k/libsim.a
3381         $(AM_V_AR)$(or1k_libsim_a_AR) or1k/libsim.a $(or1k_libsim_a_OBJECTS) $(or1k_libsim_a_LIBADD)
3382         $(AM_V_at)$(RANLIB) or1k/libsim.a
3383 pru/$(am__dirstamp):
3384         @$(MKDIR_P) pru
3385         @: > pru/$(am__dirstamp)
3386
3387 pru/libsim.a: $(pru_libsim_a_OBJECTS) $(pru_libsim_a_DEPENDENCIES) $(EXTRA_pru_libsim_a_DEPENDENCIES) pru/$(am__dirstamp)
3388         $(AM_V_at)-rm -f pru/libsim.a
3389         $(AM_V_AR)$(pru_libsim_a_AR) pru/libsim.a $(pru_libsim_a_OBJECTS) $(pru_libsim_a_LIBADD)
3390         $(AM_V_at)$(RANLIB) pru/libsim.a
3391 riscv/$(am__dirstamp):
3392         @$(MKDIR_P) riscv
3393         @: > riscv/$(am__dirstamp)
3394
3395 riscv/libsim.a: $(riscv_libsim_a_OBJECTS) $(riscv_libsim_a_DEPENDENCIES) $(EXTRA_riscv_libsim_a_DEPENDENCIES) riscv/$(am__dirstamp)
3396         $(AM_V_at)-rm -f riscv/libsim.a
3397         $(AM_V_AR)$(riscv_libsim_a_AR) riscv/libsim.a $(riscv_libsim_a_OBJECTS) $(riscv_libsim_a_LIBADD)
3398         $(AM_V_at)$(RANLIB) riscv/libsim.a
3399 rl78/$(am__dirstamp):
3400         @$(MKDIR_P) rl78
3401         @: > rl78/$(am__dirstamp)
3402
3403 rl78/libsim.a: $(rl78_libsim_a_OBJECTS) $(rl78_libsim_a_DEPENDENCIES) $(EXTRA_rl78_libsim_a_DEPENDENCIES) rl78/$(am__dirstamp)
3404         $(AM_V_at)-rm -f rl78/libsim.a
3405         $(AM_V_AR)$(rl78_libsim_a_AR) rl78/libsim.a $(rl78_libsim_a_OBJECTS) $(rl78_libsim_a_LIBADD)
3406         $(AM_V_at)$(RANLIB) rl78/libsim.a
3407 rx/$(am__dirstamp):
3408         @$(MKDIR_P) rx
3409         @: > rx/$(am__dirstamp)
3410
3411 rx/libsim.a: $(rx_libsim_a_OBJECTS) $(rx_libsim_a_DEPENDENCIES) $(EXTRA_rx_libsim_a_DEPENDENCIES) rx/$(am__dirstamp)
3412         $(AM_V_at)-rm -f rx/libsim.a
3413         $(AM_V_AR)$(rx_libsim_a_AR) rx/libsim.a $(rx_libsim_a_OBJECTS) $(rx_libsim_a_LIBADD)
3414         $(AM_V_at)$(RANLIB) rx/libsim.a
3415 sh/$(am__dirstamp):
3416         @$(MKDIR_P) sh
3417         @: > sh/$(am__dirstamp)
3418
3419 sh/libsim.a: $(sh_libsim_a_OBJECTS) $(sh_libsim_a_DEPENDENCIES) $(EXTRA_sh_libsim_a_DEPENDENCIES) sh/$(am__dirstamp)
3420         $(AM_V_at)-rm -f sh/libsim.a
3421         $(AM_V_AR)$(sh_libsim_a_AR) sh/libsim.a $(sh_libsim_a_OBJECTS) $(sh_libsim_a_LIBADD)
3422         $(AM_V_at)$(RANLIB) sh/libsim.a
3423 v850/$(am__dirstamp):
3424         @$(MKDIR_P) v850
3425         @: > v850/$(am__dirstamp)
3426
3427 v850/libsim.a: $(v850_libsim_a_OBJECTS) $(v850_libsim_a_DEPENDENCIES) $(EXTRA_v850_libsim_a_DEPENDENCIES) v850/$(am__dirstamp)
3428         $(AM_V_at)-rm -f v850/libsim.a
3429         $(AM_V_AR)$(v850_libsim_a_AR) v850/libsim.a $(v850_libsim_a_OBJECTS) $(v850_libsim_a_LIBADD)
3430         $(AM_V_at)$(RANLIB) v850/libsim.a
3431
3432 clean-checkPROGRAMS:
3433         @list='$(check_PROGRAMS)'; test -n "$$list" || exit 0; \
3434         echo " rm -f" $$list; \
3435         rm -f $$list || exit $$?; \
3436         test -n "$(EXEEXT)" || exit 0; \
3437         list=`for p in $$list; do echo "$$p"; done | sed 's/$(EXEEXT)$$//'`; \
3438         echo " rm -f" $$list; \
3439         rm -f $$list
3440
3441 clean-noinstPROGRAMS:
3442         @list='$(noinst_PROGRAMS)'; test -n "$$list" || exit 0; \
3443         echo " rm -f" $$list; \
3444         rm -f $$list || exit $$?; \
3445         test -n "$(EXEEXT)" || exit 0; \
3446         list=`for p in $$list; do echo "$$p"; done | sed 's/$(EXEEXT)$$//'`; \
3447         echo " rm -f" $$list; \
3448         rm -f $$list
3449
3450 aarch64/run$(EXEEXT): $(aarch64_run_OBJECTS) $(aarch64_run_DEPENDENCIES) $(EXTRA_aarch64_run_DEPENDENCIES) aarch64/$(am__dirstamp)
3451         @rm -f aarch64/run$(EXEEXT)
3452         $(AM_V_CCLD)$(LINK) $(aarch64_run_OBJECTS) $(aarch64_run_LDADD) $(LIBS)
3453
3454 arm/run$(EXEEXT): $(arm_run_OBJECTS) $(arm_run_DEPENDENCIES) $(EXTRA_arm_run_DEPENDENCIES) arm/$(am__dirstamp)
3455         @rm -f arm/run$(EXEEXT)
3456         $(AM_V_CCLD)$(LINK) $(arm_run_OBJECTS) $(arm_run_LDADD) $(LIBS)
3457
3458 avr/run$(EXEEXT): $(avr_run_OBJECTS) $(avr_run_DEPENDENCIES) $(EXTRA_avr_run_DEPENDENCIES) avr/$(am__dirstamp)
3459         @rm -f avr/run$(EXEEXT)
3460         $(AM_V_CCLD)$(LINK) $(avr_run_OBJECTS) $(avr_run_LDADD) $(LIBS)
3461
3462 bfin/run$(EXEEXT): $(bfin_run_OBJECTS) $(bfin_run_DEPENDENCIES) $(EXTRA_bfin_run_DEPENDENCIES) bfin/$(am__dirstamp)
3463         @rm -f bfin/run$(EXEEXT)
3464         $(AM_V_CCLD)$(LINK) $(bfin_run_OBJECTS) $(bfin_run_LDADD) $(LIBS)
3465
3466 bpf/run$(EXEEXT): $(bpf_run_OBJECTS) $(bpf_run_DEPENDENCIES) $(EXTRA_bpf_run_DEPENDENCIES) bpf/$(am__dirstamp)
3467         @rm -f bpf/run$(EXEEXT)
3468         $(AM_V_CCLD)$(LINK) $(bpf_run_OBJECTS) $(bpf_run_LDADD) $(LIBS)
3469 cr16/$(DEPDIR)/$(am__dirstamp):
3470         @$(MKDIR_P) cr16/$(DEPDIR)
3471         @: > cr16/$(DEPDIR)/$(am__dirstamp)
3472 cr16/gencode.$(OBJEXT): cr16/$(am__dirstamp) \
3473         cr16/$(DEPDIR)/$(am__dirstamp)
3474
3475 @SIM_ENABLE_ARCH_cr16_FALSE@cr16/gencode$(EXEEXT): $(cr16_gencode_OBJECTS) $(cr16_gencode_DEPENDENCIES) $(EXTRA_cr16_gencode_DEPENDENCIES) cr16/$(am__dirstamp)
3476 @SIM_ENABLE_ARCH_cr16_FALSE@    @rm -f cr16/gencode$(EXEEXT)
3477 @SIM_ENABLE_ARCH_cr16_FALSE@    $(AM_V_CCLD)$(LINK) $(cr16_gencode_OBJECTS) $(cr16_gencode_LDADD) $(LIBS)
3478
3479 cr16/run$(EXEEXT): $(cr16_run_OBJECTS) $(cr16_run_DEPENDENCIES) $(EXTRA_cr16_run_DEPENDENCIES) cr16/$(am__dirstamp)
3480         @rm -f cr16/run$(EXEEXT)
3481         $(AM_V_CCLD)$(LINK) $(cr16_run_OBJECTS) $(cr16_run_LDADD) $(LIBS)
3482
3483 cris/run$(EXEEXT): $(cris_run_OBJECTS) $(cris_run_DEPENDENCIES) $(EXTRA_cris_run_DEPENDENCIES) cris/$(am__dirstamp)
3484         @rm -f cris/run$(EXEEXT)
3485         $(AM_V_CCLD)$(LINK) $(cris_run_OBJECTS) $(cris_run_LDADD) $(LIBS)
3486 cris/$(DEPDIR)/$(am__dirstamp):
3487         @$(MKDIR_P) cris/$(DEPDIR)
3488         @: > cris/$(DEPDIR)/$(am__dirstamp)
3489 cris/rvdummy.$(OBJEXT): cris/$(am__dirstamp) \
3490         cris/$(DEPDIR)/$(am__dirstamp)
3491
3492 cris/rvdummy$(EXEEXT): $(cris_rvdummy_OBJECTS) $(cris_rvdummy_DEPENDENCIES) $(EXTRA_cris_rvdummy_DEPENDENCIES) cris/$(am__dirstamp)
3493         @rm -f cris/rvdummy$(EXEEXT)
3494         $(AM_V_CCLD)$(LINK) $(cris_rvdummy_OBJECTS) $(cris_rvdummy_LDADD) $(LIBS)
3495 d10v/$(DEPDIR)/$(am__dirstamp):
3496         @$(MKDIR_P) d10v/$(DEPDIR)
3497         @: > d10v/$(DEPDIR)/$(am__dirstamp)
3498 d10v/gencode.$(OBJEXT): d10v/$(am__dirstamp) \
3499         d10v/$(DEPDIR)/$(am__dirstamp)
3500
3501 @SIM_ENABLE_ARCH_d10v_FALSE@d10v/gencode$(EXEEXT): $(d10v_gencode_OBJECTS) $(d10v_gencode_DEPENDENCIES) $(EXTRA_d10v_gencode_DEPENDENCIES) d10v/$(am__dirstamp)
3502 @SIM_ENABLE_ARCH_d10v_FALSE@    @rm -f d10v/gencode$(EXEEXT)
3503 @SIM_ENABLE_ARCH_d10v_FALSE@    $(AM_V_CCLD)$(LINK) $(d10v_gencode_OBJECTS) $(d10v_gencode_LDADD) $(LIBS)
3504
3505 d10v/run$(EXEEXT): $(d10v_run_OBJECTS) $(d10v_run_DEPENDENCIES) $(EXTRA_d10v_run_DEPENDENCIES) d10v/$(am__dirstamp)
3506         @rm -f d10v/run$(EXEEXT)
3507         $(AM_V_CCLD)$(LINK) $(d10v_run_OBJECTS) $(d10v_run_LDADD) $(LIBS)
3508
3509 erc32/run$(EXEEXT): $(erc32_run_OBJECTS) $(erc32_run_DEPENDENCIES) $(EXTRA_erc32_run_DEPENDENCIES) erc32/$(am__dirstamp)
3510         @rm -f erc32/run$(EXEEXT)
3511         $(AM_V_CCLD)$(LINK) $(erc32_run_OBJECTS) $(erc32_run_LDADD) $(LIBS)
3512 erc32/$(DEPDIR)/$(am__dirstamp):
3513         @$(MKDIR_P) erc32/$(DEPDIR)
3514         @: > erc32/$(DEPDIR)/$(am__dirstamp)
3515 erc32/sis.$(OBJEXT): erc32/$(am__dirstamp) \
3516         erc32/$(DEPDIR)/$(am__dirstamp)
3517
3518 @SIM_ENABLE_ARCH_erc32_FALSE@erc32/sis$(EXEEXT): $(erc32_sis_OBJECTS) $(erc32_sis_DEPENDENCIES) $(EXTRA_erc32_sis_DEPENDENCIES) erc32/$(am__dirstamp)
3519 @SIM_ENABLE_ARCH_erc32_FALSE@   @rm -f erc32/sis$(EXEEXT)
3520 @SIM_ENABLE_ARCH_erc32_FALSE@   $(AM_V_CCLD)$(LINK) $(erc32_sis_OBJECTS) $(erc32_sis_LDADD) $(LIBS)
3521
3522 example-synacor/run$(EXEEXT): $(example_synacor_run_OBJECTS) $(example_synacor_run_DEPENDENCIES) $(EXTRA_example_synacor_run_DEPENDENCIES) example-synacor/$(am__dirstamp)
3523         @rm -f example-synacor/run$(EXEEXT)
3524         $(AM_V_CCLD)$(LINK) $(example_synacor_run_OBJECTS) $(example_synacor_run_LDADD) $(LIBS)
3525
3526 frv/run$(EXEEXT): $(frv_run_OBJECTS) $(frv_run_DEPENDENCIES) $(EXTRA_frv_run_DEPENDENCIES) frv/$(am__dirstamp)
3527         @rm -f frv/run$(EXEEXT)
3528         $(AM_V_CCLD)$(LINK) $(frv_run_OBJECTS) $(frv_run_LDADD) $(LIBS)
3529
3530 ft32/run$(EXEEXT): $(ft32_run_OBJECTS) $(ft32_run_DEPENDENCIES) $(EXTRA_ft32_run_DEPENDENCIES) ft32/$(am__dirstamp)
3531         @rm -f ft32/run$(EXEEXT)
3532         $(AM_V_CCLD)$(LINK) $(ft32_run_OBJECTS) $(ft32_run_LDADD) $(LIBS)
3533
3534 h8300/run$(EXEEXT): $(h8300_run_OBJECTS) $(h8300_run_DEPENDENCIES) $(EXTRA_h8300_run_DEPENDENCIES) h8300/$(am__dirstamp)
3535         @rm -f h8300/run$(EXEEXT)
3536         $(AM_V_CCLD)$(LINK) $(h8300_run_OBJECTS) $(h8300_run_LDADD) $(LIBS)
3537
3538 igen/filter$(EXEEXT): $(igen_filter_OBJECTS) $(igen_filter_DEPENDENCIES) $(EXTRA_igen_filter_DEPENDENCIES) igen/$(am__dirstamp)
3539         @rm -f igen/filter$(EXEEXT)
3540         $(AM_V_CCLD)$(LINK) $(igen_filter_OBJECTS) $(igen_filter_LDADD) $(LIBS)
3541
3542 igen/gen$(EXEEXT): $(igen_gen_OBJECTS) $(igen_gen_DEPENDENCIES) $(EXTRA_igen_gen_DEPENDENCIES) igen/$(am__dirstamp)
3543         @rm -f igen/gen$(EXEEXT)
3544         $(AM_V_CCLD)$(LINK) $(igen_gen_OBJECTS) $(igen_gen_LDADD) $(LIBS)
3545 igen/igen.$(OBJEXT): igen/$(am__dirstamp) \
3546         igen/$(DEPDIR)/$(am__dirstamp)
3547
3548 @SIM_ENABLE_IGEN_FALSE@igen/igen$(EXEEXT): $(igen_igen_OBJECTS) $(igen_igen_DEPENDENCIES) $(EXTRA_igen_igen_DEPENDENCIES) igen/$(am__dirstamp)
3549 @SIM_ENABLE_IGEN_FALSE@ @rm -f igen/igen$(EXEEXT)
3550 @SIM_ENABLE_IGEN_FALSE@ $(AM_V_CCLD)$(LINK) $(igen_igen_OBJECTS) $(igen_igen_LDADD) $(LIBS)
3551
3552 igen/ld-cache$(EXEEXT): $(igen_ld_cache_OBJECTS) $(igen_ld_cache_DEPENDENCIES) $(EXTRA_igen_ld_cache_DEPENDENCIES) igen/$(am__dirstamp)
3553         @rm -f igen/ld-cache$(EXEEXT)
3554         $(AM_V_CCLD)$(LINK) $(igen_ld_cache_OBJECTS) $(igen_ld_cache_LDADD) $(LIBS)
3555
3556 igen/ld-decode$(EXEEXT): $(igen_ld_decode_OBJECTS) $(igen_ld_decode_DEPENDENCIES) $(EXTRA_igen_ld_decode_DEPENDENCIES) igen/$(am__dirstamp)
3557         @rm -f igen/ld-decode$(EXEEXT)
3558         $(AM_V_CCLD)$(LINK) $(igen_ld_decode_OBJECTS) $(igen_ld_decode_LDADD) $(LIBS)
3559
3560 igen/ld-insn$(EXEEXT): $(igen_ld_insn_OBJECTS) $(igen_ld_insn_DEPENDENCIES) $(EXTRA_igen_ld_insn_DEPENDENCIES) igen/$(am__dirstamp)
3561         @rm -f igen/ld-insn$(EXEEXT)
3562         $(AM_V_CCLD)$(LINK) $(igen_ld_insn_OBJECTS) $(igen_ld_insn_LDADD) $(LIBS)
3563
3564 igen/table$(EXEEXT): $(igen_table_OBJECTS) $(igen_table_DEPENDENCIES) $(EXTRA_igen_table_DEPENDENCIES) igen/$(am__dirstamp)
3565         @rm -f igen/table$(EXEEXT)
3566         $(AM_V_CCLD)$(LINK) $(igen_table_OBJECTS) $(igen_table_LDADD) $(LIBS)
3567
3568 iq2000/run$(EXEEXT): $(iq2000_run_OBJECTS) $(iq2000_run_DEPENDENCIES) $(EXTRA_iq2000_run_DEPENDENCIES) iq2000/$(am__dirstamp)
3569         @rm -f iq2000/run$(EXEEXT)
3570         $(AM_V_CCLD)$(LINK) $(iq2000_run_OBJECTS) $(iq2000_run_LDADD) $(LIBS)
3571
3572 lm32/run$(EXEEXT): $(lm32_run_OBJECTS) $(lm32_run_DEPENDENCIES) $(EXTRA_lm32_run_DEPENDENCIES) lm32/$(am__dirstamp)
3573         @rm -f lm32/run$(EXEEXT)
3574         $(AM_V_CCLD)$(LINK) $(lm32_run_OBJECTS) $(lm32_run_LDADD) $(LIBS)
3575 m32c/$(DEPDIR)/$(am__dirstamp):
3576         @$(MKDIR_P) m32c/$(DEPDIR)
3577         @: > m32c/$(DEPDIR)/$(am__dirstamp)
3578 m32c/opc2c.$(OBJEXT): m32c/$(am__dirstamp) \
3579         m32c/$(DEPDIR)/$(am__dirstamp)
3580
3581 @SIM_ENABLE_ARCH_m32c_FALSE@m32c/opc2c$(EXEEXT): $(m32c_opc2c_OBJECTS) $(m32c_opc2c_DEPENDENCIES) $(EXTRA_m32c_opc2c_DEPENDENCIES) m32c/$(am__dirstamp)
3582 @SIM_ENABLE_ARCH_m32c_FALSE@    @rm -f m32c/opc2c$(EXEEXT)
3583 @SIM_ENABLE_ARCH_m32c_FALSE@    $(AM_V_CCLD)$(LINK) $(m32c_opc2c_OBJECTS) $(m32c_opc2c_LDADD) $(LIBS)
3584
3585 m32c/run$(EXEEXT): $(m32c_run_OBJECTS) $(m32c_run_DEPENDENCIES) $(EXTRA_m32c_run_DEPENDENCIES) m32c/$(am__dirstamp)
3586         @rm -f m32c/run$(EXEEXT)
3587         $(AM_V_CCLD)$(LINK) $(m32c_run_OBJECTS) $(m32c_run_LDADD) $(LIBS)
3588
3589 m32r/run$(EXEEXT): $(m32r_run_OBJECTS) $(m32r_run_DEPENDENCIES) $(EXTRA_m32r_run_DEPENDENCIES) m32r/$(am__dirstamp)
3590         @rm -f m32r/run$(EXEEXT)
3591         $(AM_V_CCLD)$(LINK) $(m32r_run_OBJECTS) $(m32r_run_LDADD) $(LIBS)
3592 m68hc11/$(DEPDIR)/$(am__dirstamp):
3593         @$(MKDIR_P) m68hc11/$(DEPDIR)
3594         @: > m68hc11/$(DEPDIR)/$(am__dirstamp)
3595 m68hc11/gencode.$(OBJEXT): m68hc11/$(am__dirstamp) \
3596         m68hc11/$(DEPDIR)/$(am__dirstamp)
3597
3598 @SIM_ENABLE_ARCH_m68hc11_FALSE@m68hc11/gencode$(EXEEXT): $(m68hc11_gencode_OBJECTS) $(m68hc11_gencode_DEPENDENCIES) $(EXTRA_m68hc11_gencode_DEPENDENCIES) m68hc11/$(am__dirstamp)
3599 @SIM_ENABLE_ARCH_m68hc11_FALSE@ @rm -f m68hc11/gencode$(EXEEXT)
3600 @SIM_ENABLE_ARCH_m68hc11_FALSE@ $(AM_V_CCLD)$(LINK) $(m68hc11_gencode_OBJECTS) $(m68hc11_gencode_LDADD) $(LIBS)
3601
3602 m68hc11/run$(EXEEXT): $(m68hc11_run_OBJECTS) $(m68hc11_run_DEPENDENCIES) $(EXTRA_m68hc11_run_DEPENDENCIES) m68hc11/$(am__dirstamp)
3603         @rm -f m68hc11/run$(EXEEXT)
3604         $(AM_V_CCLD)$(LINK) $(m68hc11_run_OBJECTS) $(m68hc11_run_LDADD) $(LIBS)
3605
3606 mcore/run$(EXEEXT): $(mcore_run_OBJECTS) $(mcore_run_DEPENDENCIES) $(EXTRA_mcore_run_DEPENDENCIES) mcore/$(am__dirstamp)
3607         @rm -f mcore/run$(EXEEXT)
3608         $(AM_V_CCLD)$(LINK) $(mcore_run_OBJECTS) $(mcore_run_LDADD) $(LIBS)
3609
3610 microblaze/run$(EXEEXT): $(microblaze_run_OBJECTS) $(microblaze_run_DEPENDENCIES) $(EXTRA_microblaze_run_DEPENDENCIES) microblaze/$(am__dirstamp)
3611         @rm -f microblaze/run$(EXEEXT)
3612         $(AM_V_CCLD)$(LINK) $(microblaze_run_OBJECTS) $(microblaze_run_LDADD) $(LIBS)
3613
3614 mips/run$(EXEEXT): $(mips_run_OBJECTS) $(mips_run_DEPENDENCIES) $(EXTRA_mips_run_DEPENDENCIES) mips/$(am__dirstamp)
3615         @rm -f mips/run$(EXEEXT)
3616         $(AM_V_CCLD)$(LINK) $(mips_run_OBJECTS) $(mips_run_LDADD) $(LIBS)
3617
3618 mn10300/run$(EXEEXT): $(mn10300_run_OBJECTS) $(mn10300_run_DEPENDENCIES) $(EXTRA_mn10300_run_DEPENDENCIES) mn10300/$(am__dirstamp)
3619         @rm -f mn10300/run$(EXEEXT)
3620         $(AM_V_CCLD)$(LINK) $(mn10300_run_OBJECTS) $(mn10300_run_LDADD) $(LIBS)
3621
3622 moxie/run$(EXEEXT): $(moxie_run_OBJECTS) $(moxie_run_DEPENDENCIES) $(EXTRA_moxie_run_DEPENDENCIES) moxie/$(am__dirstamp)
3623         @rm -f moxie/run$(EXEEXT)
3624         $(AM_V_CCLD)$(LINK) $(moxie_run_OBJECTS) $(moxie_run_LDADD) $(LIBS)
3625
3626 msp430/run$(EXEEXT): $(msp430_run_OBJECTS) $(msp430_run_DEPENDENCIES) $(EXTRA_msp430_run_DEPENDENCIES) msp430/$(am__dirstamp)
3627         @rm -f msp430/run$(EXEEXT)
3628         $(AM_V_CCLD)$(LINK) $(msp430_run_OBJECTS) $(msp430_run_LDADD) $(LIBS)
3629
3630 or1k/run$(EXEEXT): $(or1k_run_OBJECTS) $(or1k_run_DEPENDENCIES) $(EXTRA_or1k_run_DEPENDENCIES) or1k/$(am__dirstamp)
3631         @rm -f or1k/run$(EXEEXT)
3632         $(AM_V_CCLD)$(LINK) $(or1k_run_OBJECTS) $(or1k_run_LDADD) $(LIBS)
3633 ppc/$(am__dirstamp):
3634         @$(MKDIR_P) ppc
3635         @: > ppc/$(am__dirstamp)
3636 ppc/$(DEPDIR)/$(am__dirstamp):
3637         @$(MKDIR_P) ppc/$(DEPDIR)
3638         @: > ppc/$(DEPDIR)/$(am__dirstamp)
3639 ppc/psim.$(OBJEXT): ppc/$(am__dirstamp) ppc/$(DEPDIR)/$(am__dirstamp)
3640
3641 @SIM_ENABLE_ARCH_ppc_FALSE@ppc/psim$(EXEEXT): $(ppc_psim_OBJECTS) $(ppc_psim_DEPENDENCIES) $(EXTRA_ppc_psim_DEPENDENCIES) ppc/$(am__dirstamp)
3642 @SIM_ENABLE_ARCH_ppc_FALSE@     @rm -f ppc/psim$(EXEEXT)
3643 @SIM_ENABLE_ARCH_ppc_FALSE@     $(AM_V_CCLD)$(LINK) $(ppc_psim_OBJECTS) $(ppc_psim_LDADD) $(LIBS)
3644
3645 ppc/run$(EXEEXT): $(ppc_run_OBJECTS) $(ppc_run_DEPENDENCIES) $(EXTRA_ppc_run_DEPENDENCIES) ppc/$(am__dirstamp)
3646         @rm -f ppc/run$(EXEEXT)
3647         $(AM_V_CCLD)$(LINK) $(ppc_run_OBJECTS) $(ppc_run_LDADD) $(LIBS)
3648
3649 pru/run$(EXEEXT): $(pru_run_OBJECTS) $(pru_run_DEPENDENCIES) $(EXTRA_pru_run_DEPENDENCIES) pru/$(am__dirstamp)
3650         @rm -f pru/run$(EXEEXT)
3651         $(AM_V_CCLD)$(LINK) $(pru_run_OBJECTS) $(pru_run_LDADD) $(LIBS)
3652
3653 riscv/run$(EXEEXT): $(riscv_run_OBJECTS) $(riscv_run_DEPENDENCIES) $(EXTRA_riscv_run_DEPENDENCIES) riscv/$(am__dirstamp)
3654         @rm -f riscv/run$(EXEEXT)
3655         $(AM_V_CCLD)$(LINK) $(riscv_run_OBJECTS) $(riscv_run_LDADD) $(LIBS)
3656
3657 rl78/run$(EXEEXT): $(rl78_run_OBJECTS) $(rl78_run_DEPENDENCIES) $(EXTRA_rl78_run_DEPENDENCIES) rl78/$(am__dirstamp)
3658         @rm -f rl78/run$(EXEEXT)
3659         $(AM_V_CCLD)$(LINK) $(rl78_run_OBJECTS) $(rl78_run_LDADD) $(LIBS)
3660
3661 rx/run$(EXEEXT): $(rx_run_OBJECTS) $(rx_run_DEPENDENCIES) $(EXTRA_rx_run_DEPENDENCIES) rx/$(am__dirstamp)
3662         @rm -f rx/run$(EXEEXT)
3663         $(AM_V_CCLD)$(LINK) $(rx_run_OBJECTS) $(rx_run_LDADD) $(LIBS)
3664 sh/$(DEPDIR)/$(am__dirstamp):
3665         @$(MKDIR_P) sh/$(DEPDIR)
3666         @: > sh/$(DEPDIR)/$(am__dirstamp)
3667 sh/gencode.$(OBJEXT): sh/$(am__dirstamp) sh/$(DEPDIR)/$(am__dirstamp)
3668
3669 @SIM_ENABLE_ARCH_sh_FALSE@sh/gencode$(EXEEXT): $(sh_gencode_OBJECTS) $(sh_gencode_DEPENDENCIES) $(EXTRA_sh_gencode_DEPENDENCIES) sh/$(am__dirstamp)
3670 @SIM_ENABLE_ARCH_sh_FALSE@      @rm -f sh/gencode$(EXEEXT)
3671 @SIM_ENABLE_ARCH_sh_FALSE@      $(AM_V_CCLD)$(LINK) $(sh_gencode_OBJECTS) $(sh_gencode_LDADD) $(LIBS)
3672
3673 sh/run$(EXEEXT): $(sh_run_OBJECTS) $(sh_run_DEPENDENCIES) $(EXTRA_sh_run_DEPENDENCIES) sh/$(am__dirstamp)
3674         @rm -f sh/run$(EXEEXT)
3675         $(AM_V_CCLD)$(LINK) $(sh_run_OBJECTS) $(sh_run_LDADD) $(LIBS)
3676 testsuite/common/$(am__dirstamp):
3677         @$(MKDIR_P) testsuite/common
3678         @: > testsuite/common/$(am__dirstamp)
3679 testsuite/common/$(DEPDIR)/$(am__dirstamp):
3680         @$(MKDIR_P) testsuite/common/$(DEPDIR)
3681         @: > testsuite/common/$(DEPDIR)/$(am__dirstamp)
3682 testsuite/common/alu-tst.$(OBJEXT): testsuite/common/$(am__dirstamp) \
3683         testsuite/common/$(DEPDIR)/$(am__dirstamp)
3684 testsuite/common/bits-gen.$(OBJEXT): testsuite/common/$(am__dirstamp) \
3685         testsuite/common/$(DEPDIR)/$(am__dirstamp)
3686 testsuite/common/bits32m0.$(OBJEXT): testsuite/common/$(am__dirstamp) \
3687         testsuite/common/$(DEPDIR)/$(am__dirstamp)
3688 testsuite/common/bits32m31.$(OBJEXT):  \
3689         testsuite/common/$(am__dirstamp) \
3690         testsuite/common/$(DEPDIR)/$(am__dirstamp)
3691 testsuite/common/bits64m0.$(OBJEXT): testsuite/common/$(am__dirstamp) \
3692         testsuite/common/$(DEPDIR)/$(am__dirstamp)
3693 testsuite/common/bits64m63.$(OBJEXT):  \
3694         testsuite/common/$(am__dirstamp) \
3695         testsuite/common/$(DEPDIR)/$(am__dirstamp)
3696 testsuite/common/fpu-tst.$(OBJEXT): testsuite/common/$(am__dirstamp) \
3697         testsuite/common/$(DEPDIR)/$(am__dirstamp)
3698
3699 v850/run$(EXEEXT): $(v850_run_OBJECTS) $(v850_run_DEPENDENCIES) $(EXTRA_v850_run_DEPENDENCIES) v850/$(am__dirstamp)
3700         @rm -f v850/run$(EXEEXT)
3701         $(AM_V_CCLD)$(LINK) $(v850_run_OBJECTS) $(v850_run_LDADD) $(LIBS)
3702
3703 mostlyclean-compile:
3704         -rm -f *.$(OBJEXT)
3705         -rm -f common/*.$(OBJEXT)
3706         -rm -f cr16/*.$(OBJEXT)
3707         -rm -f cris/*.$(OBJEXT)
3708         -rm -f d10v/*.$(OBJEXT)
3709         -rm -f erc32/*.$(OBJEXT)
3710         -rm -f igen/*.$(OBJEXT)
3711         -rm -f m32c/*.$(OBJEXT)
3712         -rm -f m68hc11/*.$(OBJEXT)
3713         -rm -f ppc/*.$(OBJEXT)
3714         -rm -f sh/*.$(OBJEXT)
3715         -rm -f testsuite/common/*.$(OBJEXT)
3716
3717 distclean-compile:
3718         -rm -f *.tab.c
3719
3720 @AMDEP_TRUE@@am__include@ @am__quote@common/$(DEPDIR)/callback.Po@am__quote@
3721 @AMDEP_TRUE@@am__include@ @am__quote@common/$(DEPDIR)/portability.Po@am__quote@
3722 @AMDEP_TRUE@@am__include@ @am__quote@common/$(DEPDIR)/sim-load.Po@am__quote@
3723 @AMDEP_TRUE@@am__include@ @am__quote@common/$(DEPDIR)/syscall.Po@am__quote@
3724 @AMDEP_TRUE@@am__include@ @am__quote@common/$(DEPDIR)/target-newlib-errno.Po@am__quote@
3725 @AMDEP_TRUE@@am__include@ @am__quote@common/$(DEPDIR)/target-newlib-open.Po@am__quote@
3726 @AMDEP_TRUE@@am__include@ @am__quote@common/$(DEPDIR)/target-newlib-signal.Po@am__quote@
3727 @AMDEP_TRUE@@am__include@ @am__quote@common/$(DEPDIR)/target-newlib-syscall.Po@am__quote@
3728 @AMDEP_TRUE@@am__include@ @am__quote@common/$(DEPDIR)/version.Po@am__quote@
3729 @AMDEP_TRUE@@am__include@ @am__quote@cr16/$(DEPDIR)/gencode.Po@am__quote@
3730 @AMDEP_TRUE@@am__include@ @am__quote@cris/$(DEPDIR)/rvdummy.Po@am__quote@
3731 @AMDEP_TRUE@@am__include@ @am__quote@d10v/$(DEPDIR)/gencode.Po@am__quote@
3732 @AMDEP_TRUE@@am__include@ @am__quote@erc32/$(DEPDIR)/sis.Po@am__quote@
3733 @AMDEP_TRUE@@am__include@ @am__quote@igen/$(DEPDIR)/filter.Po@am__quote@
3734 @AMDEP_TRUE@@am__include@ @am__quote@igen/$(DEPDIR)/filter_host.Po@am__quote@
3735 @AMDEP_TRUE@@am__include@ @am__quote@igen/$(DEPDIR)/gen-engine.Po@am__quote@
3736 @AMDEP_TRUE@@am__include@ @am__quote@igen/$(DEPDIR)/gen-icache.Po@am__quote@
3737 @AMDEP_TRUE@@am__include@ @am__quote@igen/$(DEPDIR)/gen-idecode.Po@am__quote@
3738 @AMDEP_TRUE@@am__include@ @am__quote@igen/$(DEPDIR)/gen-itable.Po@am__quote@
3739 @AMDEP_TRUE@@am__include@ @am__quote@igen/$(DEPDIR)/gen-model.Po@am__quote@
3740 @AMDEP_TRUE@@am__include@ @am__quote@igen/$(DEPDIR)/gen-semantics.Po@am__quote@
3741 @AMDEP_TRUE@@am__include@ @am__quote@igen/$(DEPDIR)/gen-support.Po@am__quote@
3742 @AMDEP_TRUE@@am__include@ @am__quote@igen/$(DEPDIR)/gen.Po@am__quote@
3743 @AMDEP_TRUE@@am__include@ @am__quote@igen/$(DEPDIR)/igen.Po@am__quote@
3744 @AMDEP_TRUE@@am__include@ @am__quote@igen/$(DEPDIR)/ld-cache.Po@am__quote@
3745 @AMDEP_TRUE@@am__include@ @am__quote@igen/$(DEPDIR)/ld-decode.Po@am__quote@
3746 @AMDEP_TRUE@@am__include@ @am__quote@igen/$(DEPDIR)/ld-insn.Po@am__quote@
3747 @AMDEP_TRUE@@am__include@ @am__quote@igen/$(DEPDIR)/lf.Po@am__quote@
3748 @AMDEP_TRUE@@am__include@ @am__quote@igen/$(DEPDIR)/misc.Po@am__quote@
3749 @AMDEP_TRUE@@am__include@ @am__quote@igen/$(DEPDIR)/table.Po@am__quote@
3750 @AMDEP_TRUE@@am__include@ @am__quote@m32c/$(DEPDIR)/opc2c.Po@am__quote@
3751 @AMDEP_TRUE@@am__include@ @am__quote@m68hc11/$(DEPDIR)/gencode.Po@am__quote@
3752 @AMDEP_TRUE@@am__include@ @am__quote@ppc/$(DEPDIR)/psim.Po@am__quote@
3753 @AMDEP_TRUE@@am__include@ @am__quote@sh/$(DEPDIR)/gencode.Po@am__quote@
3754 @AMDEP_TRUE@@am__include@ @am__quote@testsuite/common/$(DEPDIR)/alu-tst.Po@am__quote@
3755 @AMDEP_TRUE@@am__include@ @am__quote@testsuite/common/$(DEPDIR)/bits-gen.Po@am__quote@
3756 @AMDEP_TRUE@@am__include@ @am__quote@testsuite/common/$(DEPDIR)/bits32m0.Po@am__quote@
3757 @AMDEP_TRUE@@am__include@ @am__quote@testsuite/common/$(DEPDIR)/bits32m31.Po@am__quote@
3758 @AMDEP_TRUE@@am__include@ @am__quote@testsuite/common/$(DEPDIR)/bits64m0.Po@am__quote@
3759 @AMDEP_TRUE@@am__include@ @am__quote@testsuite/common/$(DEPDIR)/bits64m63.Po@am__quote@
3760 @AMDEP_TRUE@@am__include@ @am__quote@testsuite/common/$(DEPDIR)/fpu-tst.Po@am__quote@
3761
3762 .c.o:
3763 @am__fastdepCC_TRUE@    $(AM_V_CC)depbase=`echo $@ | sed 's|[^/]*$$|$(DEPDIR)/&|;s|\.o$$||'`;\
3764 @am__fastdepCC_TRUE@    $(COMPILE) -MT $@ -MD -MP -MF $$depbase.Tpo -c -o $@ $< &&\
3765 @am__fastdepCC_TRUE@    $(am__mv) $$depbase.Tpo $$depbase.Po
3766 @AMDEP_TRUE@@am__fastdepCC_FALSE@       $(AM_V_CC)source='$<' object='$@' libtool=no @AMDEPBACKSLASH@
3767 @AMDEP_TRUE@@am__fastdepCC_FALSE@       DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) @AMDEPBACKSLASH@
3768 @am__fastdepCC_FALSE@   $(AM_V_CC@am__nodep@)$(COMPILE) -c -o $@ $<
3769
3770 .c.obj:
3771 @am__fastdepCC_TRUE@    $(AM_V_CC)depbase=`echo $@ | sed 's|[^/]*$$|$(DEPDIR)/&|;s|\.obj$$||'`;\
3772 @am__fastdepCC_TRUE@    $(COMPILE) -MT $@ -MD -MP -MF $$depbase.Tpo -c -o $@ `$(CYGPATH_W) '$<'` &&\
3773 @am__fastdepCC_TRUE@    $(am__mv) $$depbase.Tpo $$depbase.Po
3774 @AMDEP_TRUE@@am__fastdepCC_FALSE@       $(AM_V_CC)source='$<' object='$@' libtool=no @AMDEPBACKSLASH@
3775 @AMDEP_TRUE@@am__fastdepCC_FALSE@       DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) @AMDEPBACKSLASH@
3776 @am__fastdepCC_FALSE@   $(AM_V_CC@am__nodep@)$(COMPILE) -c -o $@ `$(CYGPATH_W) '$<'`
3777
3778 .c.lo:
3779 @am__fastdepCC_TRUE@    $(AM_V_CC)depbase=`echo $@ | sed 's|[^/]*$$|$(DEPDIR)/&|;s|\.lo$$||'`;\
3780 @am__fastdepCC_TRUE@    $(LTCOMPILE) -MT $@ -MD -MP -MF $$depbase.Tpo -c -o $@ $< &&\
3781 @am__fastdepCC_TRUE@    $(am__mv) $$depbase.Tpo $$depbase.Plo
3782 @AMDEP_TRUE@@am__fastdepCC_FALSE@       $(AM_V_CC)source='$<' object='$@' libtool=yes @AMDEPBACKSLASH@
3783 @AMDEP_TRUE@@am__fastdepCC_FALSE@       DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) @AMDEPBACKSLASH@
3784 @am__fastdepCC_FALSE@   $(AM_V_CC@am__nodep@)$(LTCOMPILE) -c -o $@ $<
3785
3786 mostlyclean-libtool:
3787         -rm -f *.lo
3788
3789 clean-libtool:
3790         -rm -rf .libs _libs
3791         -rm -rf aarch64/.libs aarch64/_libs
3792         -rm -rf arm/.libs arm/_libs
3793         -rm -rf avr/.libs avr/_libs
3794         -rm -rf bfin/.libs bfin/_libs
3795         -rm -rf bpf/.libs bpf/_libs
3796         -rm -rf cr16/.libs cr16/_libs
3797         -rm -rf cris/.libs cris/_libs
3798         -rm -rf d10v/.libs d10v/_libs
3799         -rm -rf erc32/.libs erc32/_libs
3800         -rm -rf example-synacor/.libs example-synacor/_libs
3801         -rm -rf frv/.libs frv/_libs
3802         -rm -rf ft32/.libs ft32/_libs
3803         -rm -rf h8300/.libs h8300/_libs
3804         -rm -rf igen/.libs igen/_libs
3805         -rm -rf iq2000/.libs iq2000/_libs
3806         -rm -rf lm32/.libs lm32/_libs
3807         -rm -rf m32c/.libs m32c/_libs
3808         -rm -rf m32r/.libs m32r/_libs
3809         -rm -rf m68hc11/.libs m68hc11/_libs
3810         -rm -rf mcore/.libs mcore/_libs
3811         -rm -rf microblaze/.libs microblaze/_libs
3812         -rm -rf mips/.libs mips/_libs
3813         -rm -rf mn10300/.libs mn10300/_libs
3814         -rm -rf moxie/.libs moxie/_libs
3815         -rm -rf msp430/.libs msp430/_libs
3816         -rm -rf or1k/.libs or1k/_libs
3817         -rm -rf ppc/.libs ppc/_libs
3818         -rm -rf pru/.libs pru/_libs
3819         -rm -rf riscv/.libs riscv/_libs
3820         -rm -rf rl78/.libs rl78/_libs
3821         -rm -rf rx/.libs rx/_libs
3822         -rm -rf sh/.libs sh/_libs
3823         -rm -rf testsuite/common/.libs testsuite/common/_libs
3824         -rm -rf v850/.libs v850/_libs
3825
3826 distclean-libtool:
3827         -rm -f libtool config.lt
3828 install-armdocDATA: $(armdoc_DATA)
3829         @$(NORMAL_INSTALL)
3830         @list='$(armdoc_DATA)'; test -n "$(armdocdir)" || list=; \
3831         if test -n "$$list"; then \
3832           echo " $(MKDIR_P) '$(DESTDIR)$(armdocdir)'"; \
3833           $(MKDIR_P) "$(DESTDIR)$(armdocdir)" || exit 1; \
3834         fi; \
3835         for p in $$list; do \
3836           if test -f "$$p"; then d=; else d="$(srcdir)/"; fi; \
3837           echo "$$d$$p"; \
3838         done | $(am__base_list) | \
3839         while read files; do \
3840           echo " $(INSTALL_DATA) $$files '$(DESTDIR)$(armdocdir)'"; \
3841           $(INSTALL_DATA) $$files "$(DESTDIR)$(armdocdir)" || exit $$?; \
3842         done
3843
3844 uninstall-armdocDATA:
3845         @$(NORMAL_UNINSTALL)
3846         @list='$(armdoc_DATA)'; test -n "$(armdocdir)" || list=; \
3847         files=`for p in $$list; do echo $$p; done | sed -e 's|^.*/||'`; \
3848         dir='$(DESTDIR)$(armdocdir)'; $(am__uninstall_files_from_dir)
3849 install-dtbDATA: $(dtb_DATA)
3850         @$(NORMAL_INSTALL)
3851         @list='$(dtb_DATA)'; test -n "$(dtbdir)" || list=; \
3852         if test -n "$$list"; then \
3853           echo " $(MKDIR_P) '$(DESTDIR)$(dtbdir)'"; \
3854           $(MKDIR_P) "$(DESTDIR)$(dtbdir)" || exit 1; \
3855         fi; \
3856         for p in $$list; do \
3857           if test -f "$$p"; then d=; else d="$(srcdir)/"; fi; \
3858           echo "$$d$$p"; \
3859         done | $(am__base_list) | \
3860         while read files; do \
3861           echo " $(INSTALL_DATA) $$files '$(DESTDIR)$(dtbdir)'"; \
3862           $(INSTALL_DATA) $$files "$(DESTDIR)$(dtbdir)" || exit $$?; \
3863         done
3864
3865 uninstall-dtbDATA:
3866         @$(NORMAL_UNINSTALL)
3867         @list='$(dtb_DATA)'; test -n "$(dtbdir)" || list=; \
3868         files=`for p in $$list; do echo $$p; done | sed -e 's|^.*/||'`; \
3869         dir='$(DESTDIR)$(dtbdir)'; $(am__uninstall_files_from_dir)
3870 install-erc32docDATA: $(erc32doc_DATA)
3871         @$(NORMAL_INSTALL)
3872         @list='$(erc32doc_DATA)'; test -n "$(erc32docdir)" || list=; \
3873         if test -n "$$list"; then \
3874           echo " $(MKDIR_P) '$(DESTDIR)$(erc32docdir)'"; \
3875           $(MKDIR_P) "$(DESTDIR)$(erc32docdir)" || exit 1; \
3876         fi; \
3877         for p in $$list; do \
3878           if test -f "$$p"; then d=; else d="$(srcdir)/"; fi; \
3879           echo "$$d$$p"; \
3880         done | $(am__base_list) | \
3881         while read files; do \
3882           echo " $(INSTALL_DATA) $$files '$(DESTDIR)$(erc32docdir)'"; \
3883           $(INSTALL_DATA) $$files "$(DESTDIR)$(erc32docdir)" || exit $$?; \
3884         done
3885
3886 uninstall-erc32docDATA:
3887         @$(NORMAL_UNINSTALL)
3888         @list='$(erc32doc_DATA)'; test -n "$(erc32docdir)" || list=; \
3889         files=`for p in $$list; do echo $$p; done | sed -e 's|^.*/||'`; \
3890         dir='$(DESTDIR)$(erc32docdir)'; $(am__uninstall_files_from_dir)
3891 install-frvdocDATA: $(frvdoc_DATA)
3892         @$(NORMAL_INSTALL)
3893         @list='$(frvdoc_DATA)'; test -n "$(frvdocdir)" || list=; \
3894         if test -n "$$list"; then \
3895           echo " $(MKDIR_P) '$(DESTDIR)$(frvdocdir)'"; \
3896           $(MKDIR_P) "$(DESTDIR)$(frvdocdir)" || exit 1; \
3897         fi; \
3898         for p in $$list; do \
3899           if test -f "$$p"; then d=; else d="$(srcdir)/"; fi; \
3900           echo "$$d$$p"; \
3901         done | $(am__base_list) | \
3902         while read files; do \
3903           echo " $(INSTALL_DATA) $$files '$(DESTDIR)$(frvdocdir)'"; \
3904           $(INSTALL_DATA) $$files "$(DESTDIR)$(frvdocdir)" || exit $$?; \
3905         done
3906
3907 uninstall-frvdocDATA:
3908         @$(NORMAL_UNINSTALL)
3909         @list='$(frvdoc_DATA)'; test -n "$(frvdocdir)" || list=; \
3910         files=`for p in $$list; do echo $$p; done | sed -e 's|^.*/||'`; \
3911         dir='$(DESTDIR)$(frvdocdir)'; $(am__uninstall_files_from_dir)
3912 install-or1kdocDATA: $(or1kdoc_DATA)
3913         @$(NORMAL_INSTALL)
3914         @list='$(or1kdoc_DATA)'; test -n "$(or1kdocdir)" || list=; \
3915         if test -n "$$list"; then \
3916           echo " $(MKDIR_P) '$(DESTDIR)$(or1kdocdir)'"; \
3917           $(MKDIR_P) "$(DESTDIR)$(or1kdocdir)" || exit 1; \
3918         fi; \
3919         for p in $$list; do \
3920           if test -f "$$p"; then d=; else d="$(srcdir)/"; fi; \
3921           echo "$$d$$p"; \
3922         done | $(am__base_list) | \
3923         while read files; do \
3924           echo " $(INSTALL_DATA) $$files '$(DESTDIR)$(or1kdocdir)'"; \
3925           $(INSTALL_DATA) $$files "$(DESTDIR)$(or1kdocdir)" || exit $$?; \
3926         done
3927
3928 uninstall-or1kdocDATA:
3929         @$(NORMAL_UNINSTALL)
3930         @list='$(or1kdoc_DATA)'; test -n "$(or1kdocdir)" || list=; \
3931         files=`for p in $$list; do echo $$p; done | sed -e 's|^.*/||'`; \
3932         dir='$(DESTDIR)$(or1kdocdir)'; $(am__uninstall_files_from_dir)
3933 install-ppcdocDATA: $(ppcdoc_DATA)
3934         @$(NORMAL_INSTALL)
3935         @list='$(ppcdoc_DATA)'; test -n "$(ppcdocdir)" || list=; \
3936         if test -n "$$list"; then \
3937           echo " $(MKDIR_P) '$(DESTDIR)$(ppcdocdir)'"; \
3938           $(MKDIR_P) "$(DESTDIR)$(ppcdocdir)" || exit 1; \
3939         fi; \
3940         for p in $$list; do \
3941           if test -f "$$p"; then d=; else d="$(srcdir)/"; fi; \
3942           echo "$$d$$p"; \
3943         done | $(am__base_list) | \
3944         while read files; do \
3945           echo " $(INSTALL_DATA) $$files '$(DESTDIR)$(ppcdocdir)'"; \
3946           $(INSTALL_DATA) $$files "$(DESTDIR)$(ppcdocdir)" || exit $$?; \
3947         done
3948
3949 uninstall-ppcdocDATA:
3950         @$(NORMAL_UNINSTALL)
3951         @list='$(ppcdoc_DATA)'; test -n "$(ppcdocdir)" || list=; \
3952         files=`for p in $$list; do echo $$p; done | sed -e 's|^.*/||'`; \
3953         dir='$(DESTDIR)$(ppcdocdir)'; $(am__uninstall_files_from_dir)
3954 install-rxdocDATA: $(rxdoc_DATA)
3955         @$(NORMAL_INSTALL)
3956         @list='$(rxdoc_DATA)'; test -n "$(rxdocdir)" || list=; \
3957         if test -n "$$list"; then \
3958           echo " $(MKDIR_P) '$(DESTDIR)$(rxdocdir)'"; \
3959           $(MKDIR_P) "$(DESTDIR)$(rxdocdir)" || exit 1; \
3960         fi; \
3961         for p in $$list; do \
3962           if test -f "$$p"; then d=; else d="$(srcdir)/"; fi; \
3963           echo "$$d$$p"; \
3964         done | $(am__base_list) | \
3965         while read files; do \
3966           echo " $(INSTALL_DATA) $$files '$(DESTDIR)$(rxdocdir)'"; \
3967           $(INSTALL_DATA) $$files "$(DESTDIR)$(rxdocdir)" || exit $$?; \
3968         done
3969
3970 uninstall-rxdocDATA:
3971         @$(NORMAL_UNINSTALL)
3972         @list='$(rxdoc_DATA)'; test -n "$(rxdocdir)" || list=; \
3973         files=`for p in $$list; do echo $$p; done | sed -e 's|^.*/||'`; \
3974         dir='$(DESTDIR)$(rxdocdir)'; $(am__uninstall_files_from_dir)
3975 install-pkgincludeHEADERS: $(pkginclude_HEADERS)
3976         @$(NORMAL_INSTALL)
3977         @list='$(pkginclude_HEADERS)'; test -n "$(pkgincludedir)" || list=; \
3978         if test -n "$$list"; then \
3979           echo " $(MKDIR_P) '$(DESTDIR)$(pkgincludedir)'"; \
3980           $(MKDIR_P) "$(DESTDIR)$(pkgincludedir)" || exit 1; \
3981         fi; \
3982         for p in $$list; do \
3983           if test -f "$$p"; then d=; else d="$(srcdir)/"; fi; \
3984           echo "$$d$$p"; \
3985         done | $(am__base_list) | \
3986         while read files; do \
3987           echo " $(INSTALL_HEADER) $$files '$(DESTDIR)$(pkgincludedir)'"; \
3988           $(INSTALL_HEADER) $$files "$(DESTDIR)$(pkgincludedir)" || exit $$?; \
3989         done
3990
3991 uninstall-pkgincludeHEADERS:
3992         @$(NORMAL_UNINSTALL)
3993         @list='$(pkginclude_HEADERS)'; test -n "$(pkgincludedir)" || list=; \
3994         files=`for p in $$list; do echo $$p; done | sed -e 's|^.*/||'`; \
3995         dir='$(DESTDIR)$(pkgincludedir)'; $(am__uninstall_files_from_dir)
3996
3997 # This directory's subdirectories are mostly independent; you can cd
3998 # into them and run 'make' without going through this Makefile.
3999 # To change the values of 'make' variables: instead of editing Makefiles,
4000 # (1) if the variable is set in 'config.status', edit 'config.status'
4001 #     (which will cause the Makefiles to be regenerated when you run 'make');
4002 # (2) otherwise, pass the desired values on the 'make' command line.
4003 $(am__recursive_targets):
4004         @fail=; \
4005         if $(am__make_keepgoing); then \
4006           failcom='fail=yes'; \
4007         else \
4008           failcom='exit 1'; \
4009         fi; \
4010         dot_seen=no; \
4011         target=`echo $@ | sed s/-recursive//`; \
4012         case "$@" in \
4013           distclean-* | maintainer-clean-*) list='$(DIST_SUBDIRS)' ;; \
4014           *) list='$(SUBDIRS)' ;; \
4015         esac; \
4016         for subdir in $$list; do \
4017           echo "Making $$target in $$subdir"; \
4018           if test "$$subdir" = "."; then \
4019             dot_seen=yes; \
4020             local_target="$$target-am"; \
4021           else \
4022             local_target="$$target"; \
4023           fi; \
4024           ($(am__cd) $$subdir && $(MAKE) $(AM_MAKEFLAGS) $$local_target) \
4025           || eval $$failcom; \
4026         done; \
4027         if test "$$dot_seen" = "no"; then \
4028           $(MAKE) $(AM_MAKEFLAGS) "$$target-am" || exit 1; \
4029         fi; test -z "$$fail"
4030
4031 ID: $(am__tagged_files)
4032         $(am__define_uniq_tagged_files); mkid -fID $$unique
4033 tags: tags-recursive
4034 TAGS: tags
4035
4036 tags-am: $(TAGS_DEPENDENCIES) $(am__tagged_files)
4037         set x; \
4038         here=`pwd`; \
4039         if ($(ETAGS) --etags-include --version) >/dev/null 2>&1; then \
4040           include_option=--etags-include; \
4041           empty_fix=.; \
4042         else \
4043           include_option=--include; \
4044           empty_fix=; \
4045         fi; \
4046         list='$(SUBDIRS)'; for subdir in $$list; do \
4047           if test "$$subdir" = .; then :; else \
4048             test ! -f $$subdir/TAGS || \
4049               set "$$@" "$$include_option=$$here/$$subdir/TAGS"; \
4050           fi; \
4051         done; \
4052         $(am__define_uniq_tagged_files); \
4053         shift; \
4054         if test -z "$(ETAGS_ARGS)$$*$$unique"; then :; else \
4055           test -n "$$unique" || unique=$$empty_fix; \
4056           if test $$# -gt 0; then \
4057             $(ETAGS) $(ETAGSFLAGS) $(AM_ETAGSFLAGS) $(ETAGS_ARGS) \
4058               "$$@" $$unique; \
4059           else \
4060             $(ETAGS) $(ETAGSFLAGS) $(AM_ETAGSFLAGS) $(ETAGS_ARGS) \
4061               $$unique; \
4062           fi; \
4063         fi
4064 ctags: ctags-recursive
4065
4066 CTAGS: ctags
4067 ctags-am: $(TAGS_DEPENDENCIES) $(am__tagged_files)
4068         $(am__define_uniq_tagged_files); \
4069         test -z "$(CTAGS_ARGS)$$unique" \
4070           || $(CTAGS) $(CTAGSFLAGS) $(AM_CTAGSFLAGS) $(CTAGS_ARGS) \
4071              $$unique
4072
4073 GTAGS:
4074         here=`$(am__cd) $(top_builddir) && pwd` \
4075           && $(am__cd) $(top_srcdir) \
4076           && gtags -i $(GTAGS_ARGS) "$$here"
4077 cscope: cscope.files
4078         test ! -s cscope.files \
4079           || $(CSCOPE) -b -q $(AM_CSCOPEFLAGS) $(CSCOPEFLAGS) -i cscope.files $(CSCOPE_ARGS)
4080 clean-cscope:
4081         -rm -f cscope.files
4082 cscope.files: clean-cscope cscopelist
4083 cscopelist: cscopelist-recursive
4084
4085 cscopelist-am: $(am__tagged_files)
4086         list='$(am__tagged_files)'; \
4087         case "$(srcdir)" in \
4088           [\\/]* | ?:[\\/]*) sdir="$(srcdir)" ;; \
4089           *) sdir=$(subdir)/$(srcdir) ;; \
4090         esac; \
4091         for i in $$list; do \
4092           if test -f "$$i"; then \
4093             echo "$(subdir)/$$i"; \
4094           else \
4095             echo "$$sdir/$$i"; \
4096           fi; \
4097         done >> $(top_builddir)/cscope.files
4098
4099 distclean-tags:
4100         -rm -f TAGS ID GTAGS GRTAGS GSYMS GPATH tags
4101         -rm -f cscope.out cscope.in.out cscope.po.out cscope.files
4102 site.exp: Makefile $(EXTRA_DEJAGNU_SITE_CONFIG)
4103         @echo 'Making a new site.exp file ...'
4104         @echo '## these variables are automatically generated by make ##' >site.tmp
4105         @echo '# Do not edit here.  If you wish to override these values' >>site.tmp
4106         @echo '# edit the last section' >>site.tmp
4107         @echo 'set srcdir "$(srcdir)"' >>site.tmp
4108         @echo "set objdir `pwd`" >>site.tmp
4109         @echo 'set build_alias "$(build_alias)"' >>site.tmp
4110         @echo 'set build_triplet $(build_triplet)' >>site.tmp
4111         @echo 'set host_alias "$(host_alias)"' >>site.tmp
4112         @echo 'set host_triplet $(host_triplet)' >>site.tmp
4113         @echo 'set target_alias "$(target_alias)"' >>site.tmp
4114         @echo 'set target_triplet $(target_triplet)' >>site.tmp
4115         @list='$(EXTRA_DEJAGNU_SITE_CONFIG)'; for f in $$list; do \
4116           echo "## Begin content included from file $$f.  Do not modify. ##" \
4117            && cat `test -f "$$f" || echo '$(srcdir)/'`$$f \
4118            && echo "## End content included from file $$f. ##" \
4119            || exit 1; \
4120          done >> site.tmp
4121         @echo "## End of auto-generated content; you can edit from here. ##" >> site.tmp
4122         @if test -f site.exp; then \
4123            sed -e '1,/^## End of auto-generated content.*##/d' site.exp >> site.tmp; \
4124          fi
4125         @-rm -f site.bak
4126         @test ! -f site.exp || mv site.exp site.bak
4127         @mv site.tmp site.exp
4128
4129 distclean-DEJAGNU:
4130         -rm -f site.exp site.bak
4131         -l='$(DEJATOOL)'; for tool in $$l; do \
4132           rm -f $$tool.sum $$tool.log; \
4133         done
4134
4135 # Recover from deleted '.trs' file; this should ensure that
4136 # "rm -f foo.log; make foo.trs" re-run 'foo.test', and re-create
4137 # both 'foo.log' and 'foo.trs'.  Break the recipe in two subshells
4138 # to avoid problems with "make -n".
4139 .log.trs:
4140         rm -f $< $@
4141         $(MAKE) $(AM_MAKEFLAGS) $<
4142
4143 # Leading 'am--fnord' is there to ensure the list of targets does not
4144 # expand to empty, as could happen e.g. with make check TESTS=''.
4145 am--fnord $(TEST_LOGS) $(TEST_LOGS:.log=.trs): $(am__force_recheck)
4146 am--force-recheck:
4147         @:
4148
4149 $(TEST_SUITE_LOG): $(TEST_LOGS)
4150         @$(am__set_TESTS_bases); \
4151         am__f_ok () { test -f "$$1" && test -r "$$1"; }; \
4152         redo_bases=`for i in $$bases; do \
4153                       am__f_ok $$i.trs && am__f_ok $$i.log || echo $$i; \
4154                     done`; \
4155         if test -n "$$redo_bases"; then \
4156           redo_logs=`for i in $$redo_bases; do echo $$i.log; done`; \
4157           redo_results=`for i in $$redo_bases; do echo $$i.trs; done`; \
4158           if $(am__make_dryrun); then :; else \
4159             rm -f $$redo_logs && rm -f $$redo_results || exit 1; \
4160           fi; \
4161         fi; \
4162         if test -n "$$am__remaking_logs"; then \
4163           echo "fatal: making $(TEST_SUITE_LOG): possible infinite" \
4164                "recursion detected" >&2; \
4165         elif test -n "$$redo_logs"; then \
4166           am__remaking_logs=yes $(MAKE) $(AM_MAKEFLAGS) $$redo_logs; \
4167         fi; \
4168         if $(am__make_dryrun); then :; else \
4169           st=0;  \
4170           errmsg="fatal: making $(TEST_SUITE_LOG): failed to create"; \
4171           for i in $$redo_bases; do \
4172             test -f $$i.trs && test -r $$i.trs \
4173               || { echo "$$errmsg $$i.trs" >&2; st=1; }; \
4174             test -f $$i.log && test -r $$i.log \
4175               || { echo "$$errmsg $$i.log" >&2; st=1; }; \
4176           done; \
4177           test $$st -eq 0 || exit 1; \
4178         fi
4179         @$(am__sh_e_setup); $(am__tty_colors); $(am__set_TESTS_bases); \
4180         ws='[   ]'; \
4181         results=`for b in $$bases; do echo $$b.trs; done`; \
4182         test -n "$$results" || results=/dev/null; \
4183         all=`  grep "^$$ws*:test-result:"           $$results | wc -l`; \
4184         pass=` grep "^$$ws*:test-result:$$ws*PASS"  $$results | wc -l`; \
4185         fail=` grep "^$$ws*:test-result:$$ws*FAIL"  $$results | wc -l`; \
4186         skip=` grep "^$$ws*:test-result:$$ws*SKIP"  $$results | wc -l`; \
4187         xfail=`grep "^$$ws*:test-result:$$ws*XFAIL" $$results | wc -l`; \
4188         xpass=`grep "^$$ws*:test-result:$$ws*XPASS" $$results | wc -l`; \
4189         error=`grep "^$$ws*:test-result:$$ws*ERROR" $$results | wc -l`; \
4190         if test `expr $$fail + $$xpass + $$error` -eq 0; then \
4191           success=true; \
4192         else \
4193           success=false; \
4194         fi; \
4195         br='==================='; br=$$br$$br$$br$$br; \
4196         result_count () \
4197         { \
4198             if test x"$$1" = x"--maybe-color"; then \
4199               maybe_colorize=yes; \
4200             elif test x"$$1" = x"--no-color"; then \
4201               maybe_colorize=no; \
4202             else \
4203               echo "$@: invalid 'result_count' usage" >&2; exit 4; \
4204             fi; \
4205             shift; \
4206             desc=$$1 count=$$2; \
4207             if test $$maybe_colorize = yes && test $$count -gt 0; then \
4208               color_start=$$3 color_end=$$std; \
4209             else \
4210               color_start= color_end=; \
4211             fi; \
4212             echo "$${color_start}# $$desc $$count$${color_end}"; \
4213         }; \
4214         create_testsuite_report () \
4215         { \
4216           result_count $$1 "TOTAL:" $$all   "$$brg"; \
4217           result_count $$1 "PASS: " $$pass  "$$grn"; \
4218           result_count $$1 "SKIP: " $$skip  "$$blu"; \
4219           result_count $$1 "XFAIL:" $$xfail "$$lgn"; \
4220           result_count $$1 "FAIL: " $$fail  "$$red"; \
4221           result_count $$1 "XPASS:" $$xpass "$$red"; \
4222           result_count $$1 "ERROR:" $$error "$$mgn"; \
4223         }; \
4224         {                                                               \
4225           echo "$(PACKAGE_STRING): $(subdir)/$(TEST_SUITE_LOG)" |       \
4226             $(am__rst_title);                                           \
4227           create_testsuite_report --no-color;                           \
4228           echo;                                                         \
4229           echo ".. contents:: :depth: 2";                               \
4230           echo;                                                         \
4231           for b in $$bases; do echo $$b; done                           \
4232             | $(am__create_global_log);                                 \
4233         } >$(TEST_SUITE_LOG).tmp || exit 1;                             \
4234         mv $(TEST_SUITE_LOG).tmp $(TEST_SUITE_LOG);                     \
4235         if $$success; then                                              \
4236           col="$$grn";                                                  \
4237          else                                                           \
4238           col="$$red";                                                  \
4239           test x"$$VERBOSE" = x || cat $(TEST_SUITE_LOG);               \
4240         fi;                                                             \
4241         echo "$${col}$$br$${std}";                                      \
4242         echo "$${col}Testsuite summary for $(PACKAGE_STRING)$${std}";   \
4243         echo "$${col}$$br$${std}";                                      \
4244         create_testsuite_report --maybe-color;                          \
4245         echo "$$col$$br$$std";                                          \
4246         if $$success; then :; else                                      \
4247           echo "$${col}See $(subdir)/$(TEST_SUITE_LOG)$${std}";         \
4248           if test -n "$(PACKAGE_BUGREPORT)"; then                       \
4249             echo "$${col}Please report to $(PACKAGE_BUGREPORT)$${std}"; \
4250           fi;                                                           \
4251           echo "$$col$$br$$std";                                        \
4252         fi;                                                             \
4253         $$success || exit 1
4254
4255 check-TESTS:
4256         @list='$(RECHECK_LOGS)';           test -z "$$list" || rm -f $$list
4257         @list='$(RECHECK_LOGS:.log=.trs)'; test -z "$$list" || rm -f $$list
4258         @test -z "$(TEST_SUITE_LOG)" || rm -f $(TEST_SUITE_LOG)
4259         @set +e; $(am__set_TESTS_bases); \
4260         log_list=`for i in $$bases; do echo $$i.log; done`; \
4261         trs_list=`for i in $$bases; do echo $$i.trs; done`; \
4262         log_list=`echo $$log_list`; trs_list=`echo $$trs_list`; \
4263         $(MAKE) $(AM_MAKEFLAGS) $(TEST_SUITE_LOG) TEST_LOGS="$$log_list"; \
4264         exit $$?;
4265 recheck: all $(check_PROGRAMS)
4266         @test -z "$(TEST_SUITE_LOG)" || rm -f $(TEST_SUITE_LOG)
4267         @set +e; $(am__set_TESTS_bases); \
4268         bases=`for i in $$bases; do echo $$i; done \
4269                  | $(am__list_recheck_tests)` || exit 1; \
4270         log_list=`for i in $$bases; do echo $$i.log; done`; \
4271         log_list=`echo $$log_list`; \
4272         $(MAKE) $(AM_MAKEFLAGS) $(TEST_SUITE_LOG) \
4273                 am__force_recheck=am--force-recheck \
4274                 TEST_LOGS="$$log_list"; \
4275         exit $$?
4276 testsuite/common/bits32m0.log: testsuite/common/bits32m0$(EXEEXT)
4277         @p='testsuite/common/bits32m0$(EXEEXT)'; \
4278         b='testsuite/common/bits32m0'; \
4279         $(am__check_pre) $(LOG_DRIVER) --test-name "$$f" \
4280         --log-file $$b.log --trs-file $$b.trs \
4281         $(am__common_driver_flags) $(AM_LOG_DRIVER_FLAGS) $(LOG_DRIVER_FLAGS) -- $(LOG_COMPILE) \
4282         "$$tst" $(AM_TESTS_FD_REDIRECT)
4283 testsuite/common/bits32m31.log: testsuite/common/bits32m31$(EXEEXT)
4284         @p='testsuite/common/bits32m31$(EXEEXT)'; \
4285         b='testsuite/common/bits32m31'; \
4286         $(am__check_pre) $(LOG_DRIVER) --test-name "$$f" \
4287         --log-file $$b.log --trs-file $$b.trs \
4288         $(am__common_driver_flags) $(AM_LOG_DRIVER_FLAGS) $(LOG_DRIVER_FLAGS) -- $(LOG_COMPILE) \
4289         "$$tst" $(AM_TESTS_FD_REDIRECT)
4290 testsuite/common/bits64m0.log: testsuite/common/bits64m0$(EXEEXT)
4291         @p='testsuite/common/bits64m0$(EXEEXT)'; \
4292         b='testsuite/common/bits64m0'; \
4293         $(am__check_pre) $(LOG_DRIVER) --test-name "$$f" \
4294         --log-file $$b.log --trs-file $$b.trs \
4295         $(am__common_driver_flags) $(AM_LOG_DRIVER_FLAGS) $(LOG_DRIVER_FLAGS) -- $(LOG_COMPILE) \
4296         "$$tst" $(AM_TESTS_FD_REDIRECT)
4297 testsuite/common/bits64m63.log: testsuite/common/bits64m63$(EXEEXT)
4298         @p='testsuite/common/bits64m63$(EXEEXT)'; \
4299         b='testsuite/common/bits64m63'; \
4300         $(am__check_pre) $(LOG_DRIVER) --test-name "$$f" \
4301         --log-file $$b.log --trs-file $$b.trs \
4302         $(am__common_driver_flags) $(AM_LOG_DRIVER_FLAGS) $(LOG_DRIVER_FLAGS) -- $(LOG_COMPILE) \
4303         "$$tst" $(AM_TESTS_FD_REDIRECT)
4304 testsuite/common/alu-tst.log: testsuite/common/alu-tst$(EXEEXT)
4305         @p='testsuite/common/alu-tst$(EXEEXT)'; \
4306         b='testsuite/common/alu-tst'; \
4307         $(am__check_pre) $(LOG_DRIVER) --test-name "$$f" \
4308         --log-file $$b.log --trs-file $$b.trs \
4309         $(am__common_driver_flags) $(AM_LOG_DRIVER_FLAGS) $(LOG_DRIVER_FLAGS) -- $(LOG_COMPILE) \
4310         "$$tst" $(AM_TESTS_FD_REDIRECT)
4311 .test.log:
4312         @p='$<'; \
4313         $(am__set_b); \
4314         $(am__check_pre) $(TEST_LOG_DRIVER) --test-name "$$f" \
4315         --log-file $$b.log --trs-file $$b.trs \
4316         $(am__common_driver_flags) $(AM_TEST_LOG_DRIVER_FLAGS) $(TEST_LOG_DRIVER_FLAGS) -- $(TEST_LOG_COMPILE) \
4317         "$$tst" $(AM_TESTS_FD_REDIRECT)
4318 @am__EXEEXT_TRUE@.test$(EXEEXT).log:
4319 @am__EXEEXT_TRUE@       @p='$<'; \
4320 @am__EXEEXT_TRUE@       $(am__set_b); \
4321 @am__EXEEXT_TRUE@       $(am__check_pre) $(TEST_LOG_DRIVER) --test-name "$$f" \
4322 @am__EXEEXT_TRUE@       --log-file $$b.log --trs-file $$b.trs \
4323 @am__EXEEXT_TRUE@       $(am__common_driver_flags) $(AM_TEST_LOG_DRIVER_FLAGS) $(TEST_LOG_DRIVER_FLAGS) -- $(TEST_LOG_COMPILE) \
4324 @am__EXEEXT_TRUE@       "$$tst" $(AM_TESTS_FD_REDIRECT)
4325 check-am: all-am
4326         $(MAKE) $(AM_MAKEFLAGS) $(check_PROGRAMS)
4327         $(MAKE) $(AM_MAKEFLAGS) check-DEJAGNU check-TESTS
4328 check: $(BUILT_SOURCES)
4329         $(MAKE) $(AM_MAKEFLAGS) check-recursive
4330 all-am: Makefile $(LIBRARIES) $(PROGRAMS) $(DATA) $(HEADERS) config.h
4331 installdirs: installdirs-recursive
4332 installdirs-am:
4333         for dir in "$(DESTDIR)$(armdocdir)" "$(DESTDIR)$(dtbdir)" "$(DESTDIR)$(erc32docdir)" "$(DESTDIR)$(frvdocdir)" "$(DESTDIR)$(or1kdocdir)" "$(DESTDIR)$(ppcdocdir)" "$(DESTDIR)$(rxdocdir)" "$(DESTDIR)$(pkgincludedir)"; do \
4334           test -z "$$dir" || $(MKDIR_P) "$$dir"; \
4335         done
4336 install: $(BUILT_SOURCES)
4337         $(MAKE) $(AM_MAKEFLAGS) install-recursive
4338 install-exec: install-exec-recursive
4339 install-data: install-data-recursive
4340 uninstall: uninstall-recursive
4341
4342 install-am: all-am
4343         @$(MAKE) $(AM_MAKEFLAGS) install-exec-am install-data-am
4344
4345 installcheck: installcheck-recursive
4346 install-strip:
4347         if test -z '$(STRIP)'; then \
4348           $(MAKE) $(AM_MAKEFLAGS) INSTALL_PROGRAM="$(INSTALL_STRIP_PROGRAM)" \
4349             install_sh_PROGRAM="$(INSTALL_STRIP_PROGRAM)" INSTALL_STRIP_FLAG=-s \
4350               install; \
4351         else \
4352           $(MAKE) $(AM_MAKEFLAGS) INSTALL_PROGRAM="$(INSTALL_STRIP_PROGRAM)" \
4353             install_sh_PROGRAM="$(INSTALL_STRIP_PROGRAM)" INSTALL_STRIP_FLAG=-s \
4354             "INSTALL_PROGRAM_ENV=STRIPPROG='$(STRIP)'" install; \
4355         fi
4356 mostlyclean-generic:
4357         -test -z "$(MOSTLYCLEANFILES)" || rm -f $(MOSTLYCLEANFILES)
4358         -test -z "$(TEST_LOGS)" || rm -f $(TEST_LOGS)
4359         -test -z "$(TEST_LOGS:.log=.trs)" || rm -f $(TEST_LOGS:.log=.trs)
4360         -test -z "$(TEST_SUITE_LOG)" || rm -f $(TEST_SUITE_LOG)
4361
4362 clean-generic:
4363         -test -z "$(CLEANFILES)" || rm -f $(CLEANFILES)
4364
4365 distclean-generic:
4366         -test -z "$(CONFIG_CLEAN_FILES)" || rm -f $(CONFIG_CLEAN_FILES)
4367         -test . = "$(srcdir)" || test -z "$(CONFIG_CLEAN_VPATH_FILES)" || rm -f $(CONFIG_CLEAN_VPATH_FILES)
4368         -rm -f aarch64/$(am__dirstamp)
4369         -rm -f arm/$(am__dirstamp)
4370         -rm -f avr/$(am__dirstamp)
4371         -rm -f bfin/$(am__dirstamp)
4372         -rm -f bpf/$(am__dirstamp)
4373         -rm -f common/$(DEPDIR)/$(am__dirstamp)
4374         -rm -f common/$(am__dirstamp)
4375         -rm -f cr16/$(DEPDIR)/$(am__dirstamp)
4376         -rm -f cr16/$(am__dirstamp)
4377         -rm -f cris/$(DEPDIR)/$(am__dirstamp)
4378         -rm -f cris/$(am__dirstamp)
4379         -rm -f d10v/$(DEPDIR)/$(am__dirstamp)
4380         -rm -f d10v/$(am__dirstamp)
4381         -rm -f erc32/$(DEPDIR)/$(am__dirstamp)
4382         -rm -f erc32/$(am__dirstamp)
4383         -rm -f example-synacor/$(am__dirstamp)
4384         -rm -f frv/$(am__dirstamp)
4385         -rm -f ft32/$(am__dirstamp)
4386         -rm -f h8300/$(am__dirstamp)
4387         -rm -f igen/$(DEPDIR)/$(am__dirstamp)
4388         -rm -f igen/$(am__dirstamp)
4389         -rm -f iq2000/$(am__dirstamp)
4390         -rm -f lm32/$(am__dirstamp)
4391         -rm -f m32c/$(DEPDIR)/$(am__dirstamp)
4392         -rm -f m32c/$(am__dirstamp)
4393         -rm -f m32r/$(am__dirstamp)
4394         -rm -f m68hc11/$(DEPDIR)/$(am__dirstamp)
4395         -rm -f m68hc11/$(am__dirstamp)
4396         -rm -f mcore/$(am__dirstamp)
4397         -rm -f microblaze/$(am__dirstamp)
4398         -rm -f mips/$(am__dirstamp)
4399         -rm -f mn10300/$(am__dirstamp)
4400         -rm -f moxie/$(am__dirstamp)
4401         -rm -f msp430/$(am__dirstamp)
4402         -rm -f or1k/$(am__dirstamp)
4403         -rm -f ppc/$(DEPDIR)/$(am__dirstamp)
4404         -rm -f ppc/$(am__dirstamp)
4405         -rm -f pru/$(am__dirstamp)
4406         -rm -f riscv/$(am__dirstamp)
4407         -rm -f rl78/$(am__dirstamp)
4408         -rm -f rx/$(am__dirstamp)
4409         -rm -f sh/$(DEPDIR)/$(am__dirstamp)
4410         -rm -f sh/$(am__dirstamp)
4411         -rm -f testsuite/common/$(DEPDIR)/$(am__dirstamp)
4412         -rm -f testsuite/common/$(am__dirstamp)
4413         -rm -f v850/$(am__dirstamp)
4414         -test -z "$(DISTCLEANFILES)" || rm -f $(DISTCLEANFILES)
4415
4416 maintainer-clean-generic:
4417         @echo "This command is intended for maintainers to use"
4418         @echo "it deletes files that may require special tools to rebuild."
4419         -test -z "$(BUILT_SOURCES)" || rm -f $(BUILT_SOURCES)
4420 clean: clean-recursive
4421
4422 clean-am: clean-checkPROGRAMS clean-generic clean-libtool \
4423         clean-noinstLIBRARIES clean-noinstPROGRAMS mostlyclean-am
4424
4425 distclean: distclean-recursive
4426         -rm -f $(am__CONFIG_DISTCLEAN_FILES)
4427         -rm -rf common/$(DEPDIR) cr16/$(DEPDIR) cris/$(DEPDIR) d10v/$(DEPDIR) erc32/$(DEPDIR) igen/$(DEPDIR) m32c/$(DEPDIR) m68hc11/$(DEPDIR) ppc/$(DEPDIR) sh/$(DEPDIR) testsuite/common/$(DEPDIR)
4428         -rm -f Makefile
4429 distclean-am: clean-am distclean-DEJAGNU distclean-compile \
4430         distclean-generic distclean-hdr distclean-libtool \
4431         distclean-tags
4432
4433 dvi: dvi-recursive
4434
4435 dvi-am:
4436
4437 html: html-recursive
4438
4439 html-am:
4440
4441 info: info-recursive
4442
4443 info-am:
4444
4445 install-data-am: install-armdocDATA install-data-local install-dtbDATA \
4446         install-erc32docDATA install-frvdocDATA install-or1kdocDATA \
4447         install-pkgincludeHEADERS install-ppcdocDATA install-rxdocDATA
4448
4449 install-dvi: install-dvi-recursive
4450
4451 install-dvi-am:
4452
4453 install-exec-am: install-exec-local
4454
4455 install-html: install-html-recursive
4456
4457 install-html-am:
4458
4459 install-info: install-info-recursive
4460
4461 install-info-am:
4462
4463 install-man:
4464
4465 install-pdf: install-pdf-recursive
4466
4467 install-pdf-am:
4468
4469 install-ps: install-ps-recursive
4470
4471 install-ps-am:
4472
4473 installcheck-am:
4474
4475 maintainer-clean: maintainer-clean-recursive
4476         -rm -f $(am__CONFIG_DISTCLEAN_FILES)
4477         -rm -rf $(top_srcdir)/autom4te.cache
4478         -rm -rf common/$(DEPDIR) cr16/$(DEPDIR) cris/$(DEPDIR) d10v/$(DEPDIR) erc32/$(DEPDIR) igen/$(DEPDIR) m32c/$(DEPDIR) m68hc11/$(DEPDIR) ppc/$(DEPDIR) sh/$(DEPDIR) testsuite/common/$(DEPDIR)
4479         -rm -f Makefile
4480 maintainer-clean-am: distclean-am maintainer-clean-generic
4481
4482 mostlyclean: mostlyclean-recursive
4483
4484 mostlyclean-am: mostlyclean-compile mostlyclean-generic \
4485         mostlyclean-libtool
4486
4487 pdf: pdf-recursive
4488
4489 pdf-am:
4490
4491 ps: ps-recursive
4492
4493 ps-am:
4494
4495 uninstall-am: uninstall-armdocDATA uninstall-dtbDATA \
4496         uninstall-erc32docDATA uninstall-frvdocDATA uninstall-local \
4497         uninstall-or1kdocDATA uninstall-pkgincludeHEADERS \
4498         uninstall-ppcdocDATA uninstall-rxdocDATA
4499
4500 .MAKE: $(am__recursive_targets) all check check-am install install-am \
4501         install-strip
4502
4503 .PHONY: $(am__recursive_targets) CTAGS GTAGS TAGS all all-am \
4504         am--refresh check check-DEJAGNU check-TESTS check-am clean \
4505         clean-checkPROGRAMS clean-cscope clean-generic clean-libtool \
4506         clean-noinstLIBRARIES clean-noinstPROGRAMS cscope \
4507         cscopelist-am ctags ctags-am distclean distclean-DEJAGNU \
4508         distclean-compile distclean-generic distclean-hdr \
4509         distclean-libtool distclean-tags dvi dvi-am html html-am info \
4510         info-am install install-am install-armdocDATA install-data \
4511         install-data-am install-data-local install-dtbDATA install-dvi \
4512         install-dvi-am install-erc32docDATA install-exec \
4513         install-exec-am install-exec-local install-frvdocDATA \
4514         install-html install-html-am install-info install-info-am \
4515         install-man install-or1kdocDATA install-pdf install-pdf-am \
4516         install-pkgincludeHEADERS install-ppcdocDATA install-ps \
4517         install-ps-am install-rxdocDATA install-strip installcheck \
4518         installcheck-am installdirs installdirs-am maintainer-clean \
4519         maintainer-clean-generic mostlyclean mostlyclean-compile \
4520         mostlyclean-generic mostlyclean-libtool pdf pdf-am ps ps-am \
4521         recheck tags tags-am uninstall uninstall-am \
4522         uninstall-armdocDATA uninstall-dtbDATA uninstall-erc32docDATA \
4523         uninstall-frvdocDATA uninstall-local uninstall-or1kdocDATA \
4524         uninstall-pkgincludeHEADERS uninstall-ppcdocDATA \
4525         uninstall-rxdocDATA
4526
4527 .PRECIOUS: Makefile
4528
4529 @am__include@ @am__quote@$(GNULIB_PARENT_DIR)/gnulib/Makefile.gnulib.inc@am__quote@
4530
4531 # Generate target constants for newlib/libgloss from its source tree.
4532 # This file is shipped with distributions so we build in the source dir.
4533 # Use `make nltvals' to rebuild.
4534 .PHONY: nltvals
4535 nltvals:
4536         $(srccom)/gennltvals.py --cpp "$(CPP)"
4537
4538 common/version.c: common/version.c-stamp ; @true
4539 common/version.c-stamp: $(srcroot)/gdb/version.in $(srcroot)/bfd/version.h $(srcdir)/common/create-version.sh
4540         $(AM_V_GEN)$(SHELL) $(srcdir)/common/create-version.sh $(srcroot)/gdb $@.tmp
4541         $(AM_V_at)$(SHELL) $(srcroot)/move-if-change $@.tmp $(@:-stamp=)
4542         $(AM_V_at)touch $@
4543
4544 # FIXME This is one very simple-minded way of generating the file hw-config.h.
4545 %/hw-config.h: %/stamp-hw ; @true
4546 %/stamp-hw: Makefile
4547         $(AM_V_GEN)set -e; \
4548         ( \
4549         sim_hw="$(SIM_HW_DEVICES) $($(@D)_SIM_EXTRA_HW_DEVICES)" ; \
4550         echo "/* generated by Makefile */" ; \
4551         printf "extern const struct hw_descriptor dv_%s_descriptor[];\n" $$sim_hw ; \
4552         echo "const struct hw_descriptor * const hw_descriptors[] = {" ; \
4553         printf "  dv_%s_descriptor,\n" $$sim_hw ; \
4554         echo "  NULL," ; \
4555         echo "};" \
4556         ) > $@.tmp; \
4557         $(SHELL) $(srcroot)/move-if-change $@.tmp $(@D)/hw-config.h; \
4558         touch $@
4559 .PRECIOUS: %/stamp-hw
4560 %/modules.c: %/stamp-modules ; @true
4561 %/stamp-modules: Makefile
4562         $(AM_V_GEN)set -e; \
4563         LANG=C ; export LANG; \
4564         LC_ALL=C ; export LC_ALL; \
4565         sed -n -e '/^sim_install_/{s/^\(sim_install_[a-z_0-9A-Z]*\).*/\1/;p}' $(GEN_MODULES_C_SRCS) | sort >$@.l-tmp; \
4566         ( \
4567         echo '/* Do not modify this file.  */'; \
4568         echo '/* It is created automatically by the Makefile.  */'; \
4569         echo '#include "libiberty.h"'; \
4570         echo '#include "sim-module.h"'; \
4571         sed -e 's:\(.*\):extern MODULE_INIT_FN \1;:' $@.l-tmp; \
4572         echo 'MODULE_INSTALL_FN * const sim_modules_detected[] = {'; \
4573         sed -e 's:\(.*\):  \1,:' $@.l-tmp; \
4574         echo '};'; \
4575         echo 'const int sim_modules_detected_len = ARRAY_SIZE (sim_modules_detected);'; \
4576         ) >$@.tmp; \
4577         $(SHELL) $(srcroot)/move-if-change $@.tmp $(@D)/modules.c; \
4578         rm -f $@.l-tmp; \
4579         touch $@
4580 .PRECIOUS: %/stamp-modules
4581
4582 # Alias for developers.
4583 @SIM_ENABLE_IGEN_TRUE@igen: $(IGEN)
4584
4585 # These rules are copied from automake, but tweaked to use FOR_BUILD variables.
4586 @SIM_ENABLE_IGEN_TRUE@igen/libigen.a: $(igen_libigen_a_OBJECTS) $(igen_libigen_a_DEPENDENCIES) $(EXTRA_igen_libigen_a_DEPENDENCIES) igen/$(am__dirstamp)
4587 @SIM_ENABLE_IGEN_TRUE@  $(AM_V_at)-rm -f $@
4588 @SIM_ENABLE_IGEN_TRUE@  $(AM_V_AR)$(AR_FOR_BUILD) $(ARFLAGS) $@ $(igen_libigen_a_OBJECTS) $(igen_libigen_a_LIBADD)
4589 @SIM_ENABLE_IGEN_TRUE@  $(AM_V_at)$(RANLIB_FOR_BUILD) $@
4590
4591 @SIM_ENABLE_IGEN_TRUE@igen/igen$(EXEEXT): $(igen_igen_OBJECTS) $(igen_igen_DEPENDENCIES) igen/$(am__dirstamp)
4592 @SIM_ENABLE_IGEN_TRUE@  $(AM_V_CCLD)$(LINK_FOR_BUILD) $(igen_igen_OBJECTS) $(igen_igen_LDADD)
4593
4594 # igen is a build-time only tool.  Override the default rules for it.
4595 @SIM_ENABLE_IGEN_TRUE@igen/%.o: igen/%.c
4596 @SIM_ENABLE_IGEN_TRUE@  $(AM_V_CC)$(COMPILE_FOR_BUILD) -c $< -o $@
4597
4598 # Build some of the files in standalone mode for developers of igen itself.
4599 @SIM_ENABLE_IGEN_TRUE@igen/%-main.o: igen/%.c
4600 @SIM_ENABLE_IGEN_TRUE@  $(AM_V_CC)$(COMPILE_FOR_BUILD) -DMAIN -c $< -o $@
4601
4602 site-sim-config.exp: Makefile
4603         $(AM_V_GEN)( \
4604         echo "set SIM_PRIMARY_TARGET \"$(SIM_PRIMARY_TARGET)\""; \
4605         echo "set builddir \"$(builddir)\""; \
4606         echo "set srcdir \"$(srcdir)/testsuite\""; \
4607         $(foreach V,$(SIM_TOOLCHAIN_VARS),echo "set $(V) \"$($(V))\"";) \
4608         ) > $@
4609
4610 # Ignore dirs that only contain configuration settings.
4611 check/./config/%.exp: ; @true
4612 check/config/%.exp: ; @true
4613 check/./lib/%.exp: ; @true
4614 check/lib/%.exp: ; @true
4615
4616 check/%.exp:
4617         $(AM_V_at)mkdir -p testsuite/$*
4618         $(AM_V_RUNTEST)$(DO_RUNTEST) --objdir testsuite/$* --outdir testsuite/$* $*.exp
4619
4620 check-DEJAGNU-parallel:
4621         $(AM_V_at)( \
4622         set -- `cd $(srcdir)/testsuite && find . -name '*.exp' -printf '%P\n' | sed 's:[.]exp$$::'`; \
4623         $(MAKE) -k `printf 'check/%s.exp ' $$@`; \
4624         ret=$$?; \
4625         set -- `printf 'testsuite/%s/ ' $$@`; \
4626         $(SHELL) $(srcroot)/contrib/dg-extract-results.sh \
4627           `find $$@ -maxdepth 1 -name testrun.sum 2>/dev/null | sort` > testrun.sum; \
4628         $(SHELL) $(srcroot)/contrib/dg-extract-results.sh -L \
4629           `find $$@ -maxdepth 1 -name testrun.log 2>/dev/null | sort` > testrun.log; \
4630         echo; \
4631         $(SED) -n '/^.*===.*Summary.*===/,$$p' testrun.sum; \
4632         exit $$ret)
4633
4634 check-DEJAGNU-single:
4635         $(AM_V_RUNTEST)$(DO_RUNTEST)
4636
4637 # If running a single job, invoking runtest once is faster & has nicer output.
4638 check-DEJAGNU: site.exp
4639         $(AM_V_at)(set -e; \
4640         EXPECT=${EXPECT} ; export EXPECT ; \
4641         runtest=$(RUNTEST); \
4642         if $(SHELL) -c "$$runtest --version" > /dev/null 2>&1; then \
4643           case "$(MAKEFLAGS)" in \
4644           *-j*) $(MAKE) check-DEJAGNU-parallel;; \
4645           *)    $(MAKE) check-DEJAGNU-single;; \
4646           esac; \
4647         else \
4648           echo "WARNING: could not find \`runtest'" 1>&2; :;\
4649         fi)
4650
4651 # These tests are build-time only tools.  Override the default rules for them.
4652 testsuite/common/%.o: testsuite/common/%.c
4653         $(AM_V_CC)$(COMPILE_FOR_BUILD) $(testsuite_common_CPPFLAGS) -c $< -o $@
4654
4655 testsuite/common/alu-tst$(EXEEXT): $(testsuite_common_alu_tst_OBJECTS) $(testsuite_common_alu_tst_DEPENDENCIES) testsuite/common/$(am__dirstamp)
4656         $(AM_V_CCLD)$(LINK_FOR_BUILD) $(testsuite_common_alu_tst_OBJECTS) $(testsuite_common_alu_tst_LDADD)
4657
4658 testsuite/common/fpu-tst$(EXEEXT): $(testsuite_common_fpu_tst_OBJECTS) $(testsuite_common_fpu_tst_DEPENDENCIES) testsuite/common/$(am__dirstamp)
4659         $(AM_V_CCLD)$(LINK_FOR_BUILD) $(testsuite_common_fpu_tst_OBJECTS) $(testsuite_common_fpu_tst_LDADD)
4660
4661 testsuite/common/bits-gen$(EXEEXT): $(testsuite_common_bits_gen_OBJECTS) $(testsuite_common_bits_gen_DEPENDENCIES) testsuite/common/$(am__dirstamp)
4662         $(AM_V_CCLD)$(LINK_FOR_BUILD) $(testsuite_common_bits_gen_OBJECTS) $(testsuite_common_bits_gen_LDADD)
4663
4664 testsuite/common/bits32m0$(EXEEXT): $(testsuite_common_bits32m0_OBJECTS) $(testsuite_common_bits32m0_DEPENDENCIES) testsuite/common/$(am__dirstamp)
4665         $(AM_V_CCLD)$(LINK_FOR_BUILD) $(testsuite_common_bits32m0_OBJECTS) $(testsuite_common_bits32m0_LDADD)
4666
4667 testsuite/common/bits32m0.c: testsuite/common/bits-gen$(EXEEXT) testsuite/common/bits-tst.c
4668         $(AM_V_GEN)$< 32 0 big > $@.tmp
4669         $(AM_V_at)cat $(srcdir)/testsuite/common/bits-tst.c >> $@.tmp
4670         $(AM_V_at)mv $@.tmp $@
4671
4672 testsuite/common/bits32m31$(EXEEXT): $(testsuite_common_bits32m31_OBJECTS) $(testsuite_common_bits32m31_DEPENDENCIES) testsuite/common/$(am__dirstamp)
4673         $(AM_V_CCLD)$(LINK_FOR_BUILD) $(testsuite_common_bits32m31_OBJECTS) $(testsuite_common_bits32m31_LDADD)
4674
4675 testsuite/common/bits32m31.c: testsuite/common/bits-gen$(EXEEXT) testsuite/common/bits-tst.c
4676         $(AM_V_GEN)$< 32 31 little > $@.tmp
4677         $(AM_V_at)cat $(srcdir)/testsuite/common/bits-tst.c >> $@.tmp
4678         $(AM_V_at)mv $@.tmp $@
4679
4680 testsuite/common/bits64m0$(EXEEXT): $(testsuite_common_bits64m0_OBJECTS) $(testsuite_common_bits64m0_DEPENDENCIES) testsuite/common/$(am__dirstamp)
4681         $(AM_V_CCLD)$(LINK_FOR_BUILD) $(testsuite_common_bits64m0_OBJECTS) $(testsuite_common_bits64m0_LDADD)
4682
4683 testsuite/common/bits64m0.c: testsuite/common/bits-gen$(EXEEXT) testsuite/common/bits-tst.c
4684         $(AM_V_GEN)$< 64 0 big > $@.tmp
4685         $(AM_V_at)cat $(srcdir)/testsuite/common/bits-tst.c >> $@.tmp
4686         $(AM_V_at)mv $@.tmp $@
4687
4688 testsuite/common/bits64m63$(EXEEXT): $(testsuite_common_bits64m63_OBJECTS) $(testsuite_common_bits64m63_DEPENDENCIES) testsuite/common/$(am__dirstamp)
4689         $(AM_V_CCLD)$(LINK_FOR_BUILD) $(testsuite_common_bits64m63_OBJECTS) $(testsuite_common_bits64m63_LDADD)
4690
4691 testsuite/common/bits64m63.c: testsuite/common/bits-gen$(EXEEXT) testsuite/common/bits-tst.c
4692         $(AM_V_GEN)$< 64 63 little > $@.tmp
4693         $(AM_V_at)cat $(srcdir)/testsuite/common/bits-tst.c >> $@.tmp
4694         $(AM_V_at)mv $@.tmp $@
4695 @SIM_ENABLE_ARCH_aarch64_TRUE@$(aarch64_libsim_a_OBJECTS) $(aarch64_libsim_a_LIBADD): aarch64/hw-config.h
4696
4697 @SIM_ENABLE_ARCH_aarch64_TRUE@aarch64/%.o: common/%.c
4698 @SIM_ENABLE_ARCH_aarch64_TRUE@  $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
4699 @SIM_ENABLE_ARCH_arm_TRUE@$(arm_libsim_a_OBJECTS) $(arm_libsim_a_LIBADD): arm/hw-config.h
4700
4701 @SIM_ENABLE_ARCH_arm_TRUE@arm/%.o: common/%.c
4702 @SIM_ENABLE_ARCH_arm_TRUE@      $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
4703 @SIM_ENABLE_ARCH_avr_TRUE@$(avr_libsim_a_OBJECTS) $(avr_libsim_a_LIBADD): avr/hw-config.h
4704
4705 @SIM_ENABLE_ARCH_avr_TRUE@avr/%.o: common/%.c
4706 @SIM_ENABLE_ARCH_avr_TRUE@      $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
4707 @SIM_ENABLE_ARCH_bfin_TRUE@$(bfin_libsim_a_OBJECTS) $(bfin_libsim_a_LIBADD): bfin/hw-config.h
4708
4709 @SIM_ENABLE_ARCH_bfin_TRUE@bfin/%.o: common/%.c
4710 @SIM_ENABLE_ARCH_bfin_TRUE@     $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
4711
4712 @SIM_ENABLE_ARCH_bfin_TRUE@bfin/linux-fixed-code.h: @MAINT@ $(srcdir)/bfin/linux-fixed-code.s bfin/local.mk bfin/$(am__dirstamp)
4713 @SIM_ENABLE_ARCH_bfin_TRUE@     $(AM_V_GEN)$(AS_FOR_TARGET_BFIN) $(srcdir)/bfin/linux-fixed-code.s -o bfin/linux-fixed-code.o
4714 @SIM_ENABLE_ARCH_bfin_TRUE@     $(AM_V_at)(\
4715 @SIM_ENABLE_ARCH_bfin_TRUE@             set -e; \
4716 @SIM_ENABLE_ARCH_bfin_TRUE@             echo "/* DO NOT EDIT: Autogenerated from linux-fixed-code.s.  */"; \
4717 @SIM_ENABLE_ARCH_bfin_TRUE@             echo "static const unsigned char bfin_linux_fixed_code[] ="; \
4718 @SIM_ENABLE_ARCH_bfin_TRUE@             echo "{"; \
4719 @SIM_ENABLE_ARCH_bfin_TRUE@             $(OBJDUMP_FOR_TARGET_BFIN) -d -z bfin/linux-fixed-code.o > $@.dis; \
4720 @SIM_ENABLE_ARCH_bfin_TRUE@             sed -n \
4721 @SIM_ENABLE_ARCH_bfin_TRUE@                     -e 's:^[^       ]*      :0x:' \
4722 @SIM_ENABLE_ARCH_bfin_TRUE@                     -e '/^0x/{s:    .*::;s: *$$:,:;s: :, 0x:g;p;}' \
4723 @SIM_ENABLE_ARCH_bfin_TRUE@                     $@.dis; \
4724 @SIM_ENABLE_ARCH_bfin_TRUE@             rm -f $@.dis; \
4725 @SIM_ENABLE_ARCH_bfin_TRUE@             echo "};" \
4726 @SIM_ENABLE_ARCH_bfin_TRUE@     ) > $@.tmp
4727 @SIM_ENABLE_ARCH_bfin_TRUE@     $(AM_V_at)$(SHELL) $(srcroot)/move-if-change $@.tmp $(srcdir)/bfin/linux-fixed-code.h
4728 @SIM_ENABLE_ARCH_bfin_TRUE@     $(AM_V_at)touch $(srcdir)/bfin/linux-fixed-code.h
4729 @SIM_ENABLE_ARCH_bpf_TRUE@$(bpf_libsim_a_OBJECTS) $(bpf_libsim_a_LIBADD): bpf/hw-config.h
4730
4731 @SIM_ENABLE_ARCH_bpf_TRUE@bpf/%.o: common/%.c
4732 @SIM_ENABLE_ARCH_bpf_TRUE@      $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
4733 @SIM_ENABLE_ARCH_bpf_TRUE@bpf/modules.c: | $(bpf_BUILD_OUTPUTS)
4734
4735 @SIM_ENABLE_ARCH_bpf_TRUE@bpf/mloop-le.c bpf/eng-le.h: bpf/stamp-mloop-le ; @true
4736 @SIM_ENABLE_ARCH_bpf_TRUE@bpf/stamp-mloop-le: $(srccom)/genmloop.sh bpf/mloop.in
4737 @SIM_ENABLE_ARCH_bpf_TRUE@      $(AM_V_GEN)$(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \
4738 @SIM_ENABLE_ARCH_bpf_TRUE@              -mono -scache -prefix bpfbf_ebpfle -cpu bpfbf \
4739 @SIM_ENABLE_ARCH_bpf_TRUE@              -infile $(srcdir)/bpf/mloop.in \
4740 @SIM_ENABLE_ARCH_bpf_TRUE@              -outfile-prefix bpf/ -outfile-suffix -le
4741 @SIM_ENABLE_ARCH_bpf_TRUE@      $(AM_V_at)$(SHELL) $(srcroot)/move-if-change bpf/eng-le.hin bpf/eng-le.h
4742 @SIM_ENABLE_ARCH_bpf_TRUE@      $(AM_V_at)$(SHELL) $(srcroot)/move-if-change bpf/mloop-le.cin bpf/mloop-le.c
4743 @SIM_ENABLE_ARCH_bpf_TRUE@      $(AM_V_at)touch $@
4744
4745 @SIM_ENABLE_ARCH_bpf_TRUE@bpf/mloop-be.c bpf/eng-be.h: bpf/stamp-mloop-be ; @true
4746 @SIM_ENABLE_ARCH_bpf_TRUE@bpf/stamp-mloop-be: $(srccom)/genmloop.sh bpf/mloop.in
4747 @SIM_ENABLE_ARCH_bpf_TRUE@      $(AM_V_GEN)$(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \
4748 @SIM_ENABLE_ARCH_bpf_TRUE@              -mono -scache -prefix bpfbf_ebpfbe -cpu bpfbf \
4749 @SIM_ENABLE_ARCH_bpf_TRUE@              -infile $(srcdir)/bpf/mloop.in \
4750 @SIM_ENABLE_ARCH_bpf_TRUE@              -outfile-prefix bpf/ -outfile-suffix -be
4751 @SIM_ENABLE_ARCH_bpf_TRUE@      $(AM_V_at)$(SHELL) $(srcroot)/move-if-change bpf/eng-be.hin bpf/eng-be.h
4752 @SIM_ENABLE_ARCH_bpf_TRUE@      $(AM_V_at)$(SHELL) $(srcroot)/move-if-change bpf/mloop-be.cin bpf/mloop-be.c
4753 @SIM_ENABLE_ARCH_bpf_TRUE@      $(AM_V_at)touch $@
4754
4755 @SIM_ENABLE_ARCH_bpf_TRUE@bpf/cgen: bpf/cgen-arch bpf/cgen-cpu bpf/cgen-defs-le bpf/cgen-defs-be bpf/cgen-decode-le bpf/cgen-decode-be
4756
4757 @SIM_ENABLE_ARCH_bpf_TRUE@bpf/cgen-arch:
4758 @SIM_ENABLE_ARCH_bpf_TRUE@      $(AM_V_GEN)mach=bpf cpu=bpfbf FLAGS="with-scache"; $(CGEN_GEN_ARCH)
4759 @SIM_ENABLE_ARCH_bpf_TRUE@bpf/arch.h bpf/arch.c bpf/cpuall.h: @CGEN_MAINT@ bpf/cgen-arch
4760
4761 @SIM_ENABLE_ARCH_bpf_TRUE@bpf/cgen-cpu:
4762 @SIM_ENABLE_ARCH_bpf_TRUE@      $(AM_V_GEN)isa=ebpfle,ebpfbe cpu=bpfbf mach=bpf FLAGS="with-multiple-isa with-scache"; $(CGEN_GEN_CPU)
4763 @SIM_ENABLE_ARCH_bpf_TRUE@      $(AM_V_at)rm -f $(srcdir)/bpf/model.c
4764 @SIM_ENABLE_ARCH_bpf_TRUE@bpf/cpu.h bpf/cpu.c bpf/model.c: @CGEN_MAINT@ bpf/cgen-cpu
4765
4766 @SIM_ENABLE_ARCH_bpf_TRUE@bpf/cgen-defs-le:
4767 @SIM_ENABLE_ARCH_bpf_TRUE@      $(AM_V_GEN)isa=ebpfle cpu=bpfbf mach=bpf FLAGS="with-scache" SUFFIX="-le"; $(CGEN_GEN_DEFS)
4768 @SIM_ENABLE_ARCH_bpf_TRUE@bpf/defs-le.h: @CGEN_MAINT@ bpf/cgen-defs-le
4769
4770 @SIM_ENABLE_ARCH_bpf_TRUE@bpf/cgen-defs-be:
4771 @SIM_ENABLE_ARCH_bpf_TRUE@      $(AM_V_GEN)isa=ebpfbe cpu=bpfbf mach=bpf FLAGS="with-scache" SUFFIX="-be"; $(CGEN_GEN_DEFS)
4772 @SIM_ENABLE_ARCH_bpf_TRUE@bpf/defs-be.h: @CGEN_MAINT@ bpf/cgen-defs-be
4773
4774 @SIM_ENABLE_ARCH_bpf_TRUE@bpf/cgen-decode-le:
4775 @SIM_ENABLE_ARCH_bpf_TRUE@      $(AM_V_GEN)isa=ebpfle cpu=bpfbf mach=bpf FLAGS="with-scache" SUFFIX="-le" EXTRAFILES="$(CGEN_CPU_SEM)"; $(CGEN_GEN_DECODE)
4776 @SIM_ENABLE_ARCH_bpf_TRUE@bpf/sem-le.c bpf/decode-le.c bpf/decode-le.h: @CGEN_MAINT@ bpf/cgen-decode-vle
4777
4778 @SIM_ENABLE_ARCH_bpf_TRUE@bpf/cgen-decode-be:
4779 @SIM_ENABLE_ARCH_bpf_TRUE@      $(AM_V_GEN)isa=ebpfbe cpu=bpfbf mach=bpf FLAGS="with-scache" SUFFIX="-be" EXTRAFILES="$(CGEN_CPU_SEM)"; $(CGEN_GEN_DECODE)
4780 @SIM_ENABLE_ARCH_bpf_TRUE@bpf/sem-be.c bpf/decode-be.c bpf/decode-be.h: @CGEN_MAINT@ bpf/cgen-decode-be
4781 @SIM_ENABLE_ARCH_cr16_TRUE@$(cr16_libsim_a_OBJECTS) $(cr16_libsim_a_LIBADD): cr16/hw-config.h
4782
4783 @SIM_ENABLE_ARCH_cr16_TRUE@cr16/%.o: cr16/%.c
4784 @SIM_ENABLE_ARCH_cr16_TRUE@     $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
4785
4786 @SIM_ENABLE_ARCH_cr16_TRUE@cr16/%.o: common/%.c
4787 @SIM_ENABLE_ARCH_cr16_TRUE@     $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
4788 @SIM_ENABLE_ARCH_cr16_TRUE@cr16/modules.c: | $(cr16_BUILD_OUTPUTS)
4789
4790 # These rules are copied from automake, but tweaked to use FOR_BUILD variables.
4791 @SIM_ENABLE_ARCH_cr16_TRUE@cr16/gencode$(EXEEXT): $(cr16_gencode_OBJECTS) $(cr16_gencode_DEPENDENCIES) cr16/$(am__dirstamp)
4792 @SIM_ENABLE_ARCH_cr16_TRUE@     $(AM_V_CCLD)$(LINK_FOR_BUILD) $(cr16_gencode_OBJECTS) $(cr16_gencode_LDADD)
4793
4794 # gencode is a build-time only tool.  Override the default rules for it.
4795 @SIM_ENABLE_ARCH_cr16_TRUE@cr16/gencode.o: cr16/gencode.c
4796 @SIM_ENABLE_ARCH_cr16_TRUE@     $(AM_V_CC)$(COMPILE_FOR_BUILD) -c $< -o $@
4797 @SIM_ENABLE_ARCH_cr16_TRUE@cr16/cr16-opc.o: ../opcodes/cr16-opc.c
4798 @SIM_ENABLE_ARCH_cr16_TRUE@     $(AM_V_CC)$(COMPILE_FOR_BUILD) -c $< -o $@
4799
4800 @SIM_ENABLE_ARCH_cr16_TRUE@cr16/simops.h: cr16/gencode$(EXEEXT)
4801 @SIM_ENABLE_ARCH_cr16_TRUE@     $(AM_V_GEN)$< -h >$@
4802
4803 @SIM_ENABLE_ARCH_cr16_TRUE@cr16/table.c: cr16/gencode$(EXEEXT)
4804 @SIM_ENABLE_ARCH_cr16_TRUE@     $(AM_V_GEN)$< >$@
4805 @SIM_ENABLE_ARCH_cris_TRUE@$(cris_libsim_a_OBJECTS) $(cris_libsim_a_LIBADD): cris/hw-config.h
4806
4807 @SIM_ENABLE_ARCH_cris_TRUE@cris/%.o: cris/%.c
4808 @SIM_ENABLE_ARCH_cris_TRUE@     $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
4809
4810 @SIM_ENABLE_ARCH_cris_TRUE@cris/%.o: common/%.c
4811 @SIM_ENABLE_ARCH_cris_TRUE@     $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
4812 @SIM_ENABLE_ARCH_cris_TRUE@cris/modules.c: | $(cris_BUILD_OUTPUTS)
4813
4814 @SIM_ENABLE_ARCH_cris_TRUE@cris/mloopv10f.c cris/engv10.h: cris/stamp-mloop-v10f ; @true
4815 @SIM_ENABLE_ARCH_cris_TRUE@cris/stamp-mloop-v10f: $(srccom)/genmloop.sh cris/mloop.in
4816 @SIM_ENABLE_ARCH_cris_TRUE@     $(AM_V_GEN)$(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \
4817 @SIM_ENABLE_ARCH_cris_TRUE@             -mono -no-fast -pbb -switch semcrisv10f-switch.c \
4818 @SIM_ENABLE_ARCH_cris_TRUE@             -cpu crisv10f \
4819 @SIM_ENABLE_ARCH_cris_TRUE@             -infile $(srcdir)/cris/mloop.in -outfile-prefix cris/ -outfile-suffix -v10f
4820 @SIM_ENABLE_ARCH_cris_TRUE@     $(AM_V_at)$(SHELL) $(srcroot)/move-if-change cris/eng-v10f.hin cris/engv10.h
4821 @SIM_ENABLE_ARCH_cris_TRUE@     $(AM_V_at)$(SHELL) $(srcroot)/move-if-change cris/mloop-v10f.cin cris/mloopv10f.c
4822 @SIM_ENABLE_ARCH_cris_TRUE@     $(AM_V_at)touch $@
4823
4824 @SIM_ENABLE_ARCH_cris_TRUE@cris/mloopv32f.c cris/engv32.h: cris/stamp-mloop-v32f ; @true
4825 @SIM_ENABLE_ARCH_cris_TRUE@cris/stamp-mloop-v32f: $(srccom)/genmloop.sh cris/mloop.in
4826 @SIM_ENABLE_ARCH_cris_TRUE@     $(AM_V_GEN)$(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \
4827 @SIM_ENABLE_ARCH_cris_TRUE@             -mono -no-fast -pbb -switch semcrisv32f-switch.c \
4828 @SIM_ENABLE_ARCH_cris_TRUE@             -cpu crisv32f \
4829 @SIM_ENABLE_ARCH_cris_TRUE@             -infile $(srcdir)/cris/mloop.in -outfile-prefix cris/ -outfile-suffix -v32f
4830 @SIM_ENABLE_ARCH_cris_TRUE@     $(AM_V_at)$(SHELL) $(srcroot)/move-if-change cris/eng-v32f.hin cris/engv32.h
4831 @SIM_ENABLE_ARCH_cris_TRUE@     $(AM_V_at)$(SHELL) $(srcroot)/move-if-change cris/mloop-v32f.cin cris/mloopv32f.c
4832 @SIM_ENABLE_ARCH_cris_TRUE@     $(AM_V_at)touch $@
4833
4834 @SIM_ENABLE_ARCH_cris_TRUE@cris/cgen: cris/cgen-arch cris/cgen-cpu-decode-v10f cris/cgen-cpu-decode-v32f
4835
4836 @SIM_ENABLE_ARCH_cris_TRUE@cris/cgen-arch:
4837 @SIM_ENABLE_ARCH_cris_TRUE@     $(AM_V_GEN)mach=crisv10,crisv32 FLAGS="with-scache with-profile=fn"; $(CGEN_GEN_ARCH)
4838 @SIM_ENABLE_ARCH_cris_TRUE@cris/arch.h cris/arch.c cris/cpuall.h: @CGEN_MAINT@ cris/cgen-arch
4839
4840 @SIM_ENABLE_ARCH_cris_TRUE@cris/cgen-cpu-decode-v10f:
4841 @SIM_ENABLE_ARCH_cris_TRUE@     $(AM_V_GEN)cpu=crisv10f mach=crisv10 SUFFIX=v10 FLAGS="with-scache with-profile=fn" EXTRAFILES="$(CGEN_CPU_SEMSW)"; $(CGEN_GEN_CPU_DECODE)
4842 @SIM_ENABLE_ARCH_cris_TRUE@     $(AM_V_at)$(SHELL) $(srcroot)/move-if-change $(srcdir)/cris/semv10-switch.c $(srcdir)/cris/semcrisv10f-switch.c
4843 @SIM_ENABLE_ARCH_cris_TRUE@cris/cpuv10.h cris/cpuv10.c cris/semcrisv10f-switch.c cris/modelv10.c cris/decodev10.c cris/decodev10.h: @CGEN_MAINT@ cris/cgen-cpu-decode-v10f
4844
4845 @SIM_ENABLE_ARCH_cris_TRUE@cris/cgen-cpu-decode-v32f:
4846 @SIM_ENABLE_ARCH_cris_TRUE@     $(AM_V_GEN)cpu=crisv32f mach=crisv32 SUFFIX=v32 FLAGS="with-scache with-profile=fn" EXTRAFILES="$(CGEN_CPU_SEMSW)"; $(CGEN_GEN_CPU_DECODE)
4847 @SIM_ENABLE_ARCH_cris_TRUE@     $(AM_V_at)$(SHELL) $(srcroot)/move-if-change $(srcdir)/cris/semv32-switch.c $(srcdir)/cris/semcrisv32f-switch.c
4848 @SIM_ENABLE_ARCH_cris_TRUE@cris/cpuv32.h cris/cpuv32.c cris/semcrisv32f-switch.c cris/modelv32.c cris/decodev32.c cris/decodev32.h: @CGEN_MAINT@ cris/cgen-cpu-decode-v32f
4849 @SIM_ENABLE_ARCH_d10v_TRUE@$(d10v_libsim_a_OBJECTS) $(d10v_libsim_a_LIBADD): d10v/hw-config.h
4850
4851 @SIM_ENABLE_ARCH_d10v_TRUE@d10v/%.o: d10v/%.c
4852 @SIM_ENABLE_ARCH_d10v_TRUE@     $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
4853
4854 @SIM_ENABLE_ARCH_d10v_TRUE@d10v/%.o: common/%.c
4855 @SIM_ENABLE_ARCH_d10v_TRUE@     $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
4856 @SIM_ENABLE_ARCH_d10v_TRUE@d10v/modules.c: | $(d10v_BUILD_OUTPUTS)
4857
4858 # These rules are copied from automake, but tweaked to use FOR_BUILD variables.
4859 @SIM_ENABLE_ARCH_d10v_TRUE@d10v/gencode$(EXEEXT): $(d10v_gencode_OBJECTS) $(d10v_gencode_DEPENDENCIES) d10v/$(am__dirstamp)
4860 @SIM_ENABLE_ARCH_d10v_TRUE@     $(AM_V_CCLD)$(LINK_FOR_BUILD) $(d10v_gencode_OBJECTS) $(d10v_gencode_LDADD)
4861
4862 # gencode is a build-time only tool.  Override the default rules for it.
4863 @SIM_ENABLE_ARCH_d10v_TRUE@d10v/gencode.o: d10v/gencode.c
4864 @SIM_ENABLE_ARCH_d10v_TRUE@     $(AM_V_CC)$(COMPILE_FOR_BUILD) -c $< -o $@
4865 @SIM_ENABLE_ARCH_d10v_TRUE@d10v/d10v-opc.o: ../opcodes/d10v-opc.c
4866 @SIM_ENABLE_ARCH_d10v_TRUE@     $(AM_V_CC)$(COMPILE_FOR_BUILD) -c $< -o $@
4867
4868 @SIM_ENABLE_ARCH_d10v_TRUE@d10v/simops.h: d10v/gencode$(EXEEXT)
4869 @SIM_ENABLE_ARCH_d10v_TRUE@     $(AM_V_GEN)$< -h >$@
4870
4871 @SIM_ENABLE_ARCH_d10v_TRUE@d10v/table.c: d10v/gencode$(EXEEXT)
4872 @SIM_ENABLE_ARCH_d10v_TRUE@     $(AM_V_GEN)$< >$@
4873 @SIM_ENABLE_ARCH_erc32_TRUE@$(erc32_libsim_a_OBJECTS) $(erc32_libsim_a_LIBADD): erc32/hw-config.h
4874
4875 @SIM_ENABLE_ARCH_erc32_TRUE@erc32/%.o: erc32/%.c
4876 @SIM_ENABLE_ARCH_erc32_TRUE@    $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
4877
4878 @SIM_ENABLE_ARCH_erc32_TRUE@erc32/%.o: common/%.c
4879 @SIM_ENABLE_ARCH_erc32_TRUE@    $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
4880
4881 @SIM_ENABLE_ARCH_erc32_TRUE@erc32/sis$(EXEEXT): erc32/run$(EXEEXT)
4882 @SIM_ENABLE_ARCH_erc32_TRUE@    $(AM_V_GEN)ln $< $@ 2>/dev/null || $(LN_S) $< $@ 2>/dev/null || cp -p $< $@
4883 @SIM_ENABLE_ARCH_erc32_TRUE@sim-%D-install-exec-local: installdirs
4884 @SIM_ENABLE_ARCH_erc32_TRUE@    $(AM_V_at)$(MKDIR_P) $(DESTDIR)$(bindir)
4885 @SIM_ENABLE_ARCH_erc32_TRUE@    n=`echo sis | sed '$(program_transform_name)'`; \
4886 @SIM_ENABLE_ARCH_erc32_TRUE@    $(LIBTOOL) --mode=install $(INSTALL_PROGRAM) erc32/run$(EXEEXT) $(DESTDIR)$(bindir)/$$n$(EXEEXT)
4887 @SIM_ENABLE_ARCH_erc32_TRUE@sim-erc32-uninstall-local:
4888 @SIM_ENABLE_ARCH_erc32_TRUE@    rm -f $(DESTDIR)$(bindir)/sis
4889 @SIM_ENABLE_ARCH_examples_TRUE@$(example_synacor_libsim_a_OBJECTS) $(example_synacor_libsim_a_LIBADD): example-synacor/hw-config.h
4890
4891 @SIM_ENABLE_ARCH_examples_TRUE@example-synacor/%.o: example-synacor/%.c
4892 @SIM_ENABLE_ARCH_examples_TRUE@ $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
4893
4894 @SIM_ENABLE_ARCH_examples_TRUE@example-synacor/%.o: common/%.c
4895 @SIM_ENABLE_ARCH_examples_TRUE@ $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
4896 @SIM_ENABLE_ARCH_frv_TRUE@$(frv_libsim_a_OBJECTS) $(frv_libsim_a_LIBADD): frv/hw-config.h
4897
4898 @SIM_ENABLE_ARCH_frv_TRUE@frv/%.o: frv/%.c
4899 @SIM_ENABLE_ARCH_frv_TRUE@      $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
4900
4901 @SIM_ENABLE_ARCH_frv_TRUE@frv/%.o: common/%.c
4902 @SIM_ENABLE_ARCH_frv_TRUE@      $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
4903 @SIM_ENABLE_ARCH_frv_TRUE@frv/modules.c: | $(frv_BUILD_OUTPUTS)
4904
4905 @SIM_ENABLE_ARCH_frv_TRUE@frv/mloop.c frv/eng.h: frv/stamp-mloop ; @true
4906 @SIM_ENABLE_ARCH_frv_TRUE@frv/stamp-mloop: $(srccom)/genmloop.sh frv/mloop.in
4907 @SIM_ENABLE_ARCH_frv_TRUE@      $(AM_V_GEN)$(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \
4908 @SIM_ENABLE_ARCH_frv_TRUE@              -mono -scache -parallel-generic-write -parallel-only \
4909 @SIM_ENABLE_ARCH_frv_TRUE@              -cpu frvbf \
4910 @SIM_ENABLE_ARCH_frv_TRUE@              -infile $(srcdir)/frv/mloop.in -outfile-prefix frv/
4911 @SIM_ENABLE_ARCH_frv_TRUE@      $(AM_V_at)$(SHELL) $(srcroot)/move-if-change frv/eng.hin frv/eng.h
4912 @SIM_ENABLE_ARCH_frv_TRUE@      $(AM_V_at)$(SHELL) $(srcroot)/move-if-change frv/mloop.cin frv/mloop.c
4913 @SIM_ENABLE_ARCH_frv_TRUE@      $(AM_V_at)touch $@
4914
4915 @SIM_ENABLE_ARCH_frv_TRUE@frv/cgen: frv/cgen-arch frv/cgen-cpu-decode
4916
4917 @SIM_ENABLE_ARCH_frv_TRUE@frv/cgen-arch:
4918 @SIM_ENABLE_ARCH_frv_TRUE@      $(AM_V_GEN)mach=all FLAGS="with-scache"; $(CGEN_GEN_ARCH)
4919 @SIM_ENABLE_ARCH_frv_TRUE@frv/arch.h frv/arch.c frv/cpuall.h: @CGEN_MAINT@ frv/cgen-arch
4920
4921 @SIM_ENABLE_ARCH_frv_TRUE@frv/cgen-cpu-decode:
4922 @SIM_ENABLE_ARCH_frv_TRUE@      $(AM_V_GEN)cpu=frvbf mach=frv,fr550,fr500,fr450,fr400,tomcat,simple FLAGS="with-scache with-profile=fn with-generic-write with-parallel-only" EXTRAFILES="$(CGEN_CPU_SEM)"; $(CGEN_GEN_CPU_DECODE)
4923 @SIM_ENABLE_ARCH_frv_TRUE@frv/cpu.h frv/sem.c frv/model.c frv/decode.c frv/decode.h: @CGEN_MAINT@ frv/cgen-cpu-decode
4924 @SIM_ENABLE_ARCH_ft32_TRUE@$(ft32_libsim_a_OBJECTS) $(ft32_libsim_a_LIBADD): ft32/hw-config.h
4925
4926 @SIM_ENABLE_ARCH_ft32_TRUE@ft32/%.o: ft32/%.c
4927 @SIM_ENABLE_ARCH_ft32_TRUE@     $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
4928
4929 @SIM_ENABLE_ARCH_ft32_TRUE@ft32/%.o: common/%.c
4930 @SIM_ENABLE_ARCH_ft32_TRUE@     $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
4931 @SIM_ENABLE_ARCH_h8300_TRUE@$(h8300_libsim_a_OBJECTS) $(h8300_libsim_a_LIBADD): h8300/hw-config.h
4932
4933 @SIM_ENABLE_ARCH_h8300_TRUE@h8300/%.o: h8300/%.c
4934 @SIM_ENABLE_ARCH_h8300_TRUE@    $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
4935
4936 @SIM_ENABLE_ARCH_h8300_TRUE@h8300/%.o: common/%.c
4937 @SIM_ENABLE_ARCH_h8300_TRUE@    $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
4938 @SIM_ENABLE_ARCH_iq2000_TRUE@$(iq2000_libsim_a_OBJECTS) $(iq2000_libsim_a_LIBADD): iq2000/hw-config.h
4939
4940 @SIM_ENABLE_ARCH_iq2000_TRUE@iq2000/%.o: iq2000/%.c
4941 @SIM_ENABLE_ARCH_iq2000_TRUE@   $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
4942
4943 @SIM_ENABLE_ARCH_iq2000_TRUE@iq2000/%.o: common/%.c
4944 @SIM_ENABLE_ARCH_iq2000_TRUE@   $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
4945 @SIM_ENABLE_ARCH_iq2000_TRUE@iq2000/modules.c: | $(iq2000_BUILD_OUTPUTS)
4946
4947 @SIM_ENABLE_ARCH_iq2000_TRUE@iq2000/mloop.c iq2000/eng.h: iq2000/stamp-mloop ; @true
4948 @SIM_ENABLE_ARCH_iq2000_TRUE@iq2000/stamp-mloop: $(srccom)/genmloop.sh iq2000/mloop.in
4949 @SIM_ENABLE_ARCH_iq2000_TRUE@   $(AM_V_GEN)$(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \
4950 @SIM_ENABLE_ARCH_iq2000_TRUE@           -mono -fast -pbb -switch sem-switch.c \
4951 @SIM_ENABLE_ARCH_iq2000_TRUE@           -cpu iq2000bf \
4952 @SIM_ENABLE_ARCH_iq2000_TRUE@           -infile $(srcdir)/iq2000/mloop.in -outfile-prefix iq2000/
4953 @SIM_ENABLE_ARCH_iq2000_TRUE@   $(AM_V_at)$(SHELL) $(srcroot)/move-if-change iq2000/eng.hin iq2000/eng.h
4954 @SIM_ENABLE_ARCH_iq2000_TRUE@   $(AM_V_at)$(SHELL) $(srcroot)/move-if-change iq2000/mloop.cin iq2000/mloop.c
4955 @SIM_ENABLE_ARCH_iq2000_TRUE@   $(AM_V_at)touch $@
4956
4957 @SIM_ENABLE_ARCH_iq2000_TRUE@iq2000/cgen: iq2000/cgen-arch iq2000/cgen-cpu-decode
4958
4959 @SIM_ENABLE_ARCH_iq2000_TRUE@iq2000/cgen-arch:
4960 @SIM_ENABLE_ARCH_iq2000_TRUE@   $(AM_V_GEN)mach=iq2000 FLAGS="with-scache with-profile=fn"; $(CGEN_GEN_ARCH)
4961 @SIM_ENABLE_ARCH_iq2000_TRUE@iq2000/arch.h iq2000/arch.c iq2000/cpuall.h: @CGEN_MAINT@ iq2000/cgen-arch
4962
4963 @SIM_ENABLE_ARCH_iq2000_TRUE@iq2000/cgen-cpu-decode:
4964 @SIM_ENABLE_ARCH_iq2000_TRUE@   $(AM_V_GEN)cpu=iq2000bf mach=iq2000 FLAGS="with-scache with-profile=fn" EXTRAFILES="$(CGEN_CPU_SEM) $(CGEN_CPU_SEMSW)"; $(CGEN_GEN_CPU_DECODE)
4965 @SIM_ENABLE_ARCH_iq2000_TRUE@iq2000/cpu.h iq2000/sem.c iq2000/sem-switch.c iq2000/model.c iq2000/decode.c iq2000/decode.h: @CGEN_MAINT@ iq2000/cgen-cpu-decode
4966 @SIM_ENABLE_ARCH_lm32_TRUE@$(lm32_libsim_a_OBJECTS) $(lm32_libsim_a_LIBADD): lm32/hw-config.h
4967
4968 @SIM_ENABLE_ARCH_lm32_TRUE@lm32/%.o: lm32/%.c
4969 @SIM_ENABLE_ARCH_lm32_TRUE@     $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
4970
4971 @SIM_ENABLE_ARCH_lm32_TRUE@lm32/%.o: common/%.c
4972 @SIM_ENABLE_ARCH_lm32_TRUE@     $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
4973 @SIM_ENABLE_ARCH_lm32_TRUE@lm32/modules.c: | $(lm32_BUILD_OUTPUTS)
4974
4975 @SIM_ENABLE_ARCH_lm32_TRUE@lm32/mloop.c lm32/eng.h: lm32/stamp-mloop ; @true
4976 @SIM_ENABLE_ARCH_lm32_TRUE@lm32/stamp-mloop: $(srccom)/genmloop.sh lm32/mloop.in
4977 @SIM_ENABLE_ARCH_lm32_TRUE@     $(AM_V_GEN)$(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \
4978 @SIM_ENABLE_ARCH_lm32_TRUE@             -mono -fast -pbb -switch sem-switch.c \
4979 @SIM_ENABLE_ARCH_lm32_TRUE@             -cpu lm32bf \
4980 @SIM_ENABLE_ARCH_lm32_TRUE@             -infile $(srcdir)/lm32/mloop.in -outfile-prefix lm32/
4981 @SIM_ENABLE_ARCH_lm32_TRUE@     $(AM_V_at)$(SHELL) $(srcroot)/move-if-change lm32/eng.hin lm32/eng.h
4982 @SIM_ENABLE_ARCH_lm32_TRUE@     $(AM_V_at)$(SHELL) $(srcroot)/move-if-change lm32/mloop.cin lm32/mloop.c
4983 @SIM_ENABLE_ARCH_lm32_TRUE@     $(AM_V_at)touch $@
4984
4985 @SIM_ENABLE_ARCH_lm32_TRUE@lm32/cgen: lm32/cgen-arch lm32/cgen-cpu-decode
4986
4987 @SIM_ENABLE_ARCH_lm32_TRUE@lm32/cgen-arch:
4988 @SIM_ENABLE_ARCH_lm32_TRUE@     $(AM_V_GEN)mach=all FLAGS="with-scache with-profile=fn"; $(CGEN_GEN_ARCH)
4989 @SIM_ENABLE_ARCH_lm32_TRUE@lm32/arch.h lm32/arch.c lm32/cpuall.h: @CGEN_MAINT@ lm32/cgen-arch
4990
4991 @SIM_ENABLE_ARCH_lm32_TRUE@lm32/cgen-cpu-decode:
4992 @SIM_ENABLE_ARCH_lm32_TRUE@     $(AM_V_GEN)cpu=lm32bf mach=lm32 FLAGS="with-scache with-profile=fn" EXTRAFILES="$(CGEN_CPU_SEM) $(CGEN_CPU_SEMSW)"; $(CGEN_GEN_CPU_DECODE)
4993 @SIM_ENABLE_ARCH_lm32_TRUE@lm32/cpu.h lm32/sem.c lm32/sem-switch.c lm32/model.c lm32/decode.c lm32/decode.h: @CGEN_MAINT@ lm32/cgen-cpu-decode
4994 @SIM_ENABLE_ARCH_m32c_TRUE@$(m32c_libsim_a_OBJECTS) $(m32c_libsim_a_LIBADD): m32c/hw-config.h
4995
4996 @SIM_ENABLE_ARCH_m32c_TRUE@m32c/%.o: m32c/%.c
4997 @SIM_ENABLE_ARCH_m32c_TRUE@     $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
4998
4999 @SIM_ENABLE_ARCH_m32c_TRUE@m32c/%.o: common/%.c
5000 @SIM_ENABLE_ARCH_m32c_TRUE@     $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
5001 @SIM_ENABLE_ARCH_m32c_TRUE@m32c/modules.c: | $(m32c_BUILD_OUTPUTS)
5002
5003 # These rules are copied from automake, but tweaked to use FOR_BUILD variables.
5004 @SIM_ENABLE_ARCH_m32c_TRUE@m32c/opc2c$(EXEEXT): $(m32c_opc2c_OBJECTS) $(m32c_opc2c_DEPENDENCIES) m32c/$(am__dirstamp)
5005 @SIM_ENABLE_ARCH_m32c_TRUE@     $(AM_V_CCLD)$(LINK_FOR_BUILD) $(m32c_opc2c_OBJECTS) $(m32c_opc2c_LDADD)
5006
5007 # opc2c is a build-time only tool.  Override the default rules for it.
5008 @SIM_ENABLE_ARCH_m32c_TRUE@m32c/opc2c.o: m32c/opc2c.c
5009 @SIM_ENABLE_ARCH_m32c_TRUE@     $(AM_V_CC)$(COMPILE_FOR_BUILD) -c $< -o $@
5010
5011 @SIM_ENABLE_ARCH_m32c_TRUE@m32c/m32c.c: m32c/m32c.opc m32c/opc2c$(EXEEXT)
5012 @SIM_ENABLE_ARCH_m32c_TRUE@     $(AM_V_GEN)$(m32c_OPC2C_RUN) -l $@.log $< > $@.tmp
5013 @SIM_ENABLE_ARCH_m32c_TRUE@     $(AM_V_at)mv $@.tmp $@
5014
5015 @SIM_ENABLE_ARCH_m32c_TRUE@m32c/r8c.c: m32c/r8c.opc m32c/opc2c$(EXEEXT)
5016 @SIM_ENABLE_ARCH_m32c_TRUE@     $(AM_V_GEN)$(m32c_OPC2C_RUN) -l $@.log $< > $@.tmp
5017 @SIM_ENABLE_ARCH_m32c_TRUE@     $(AM_V_at)mv $@.tmp $@
5018 @SIM_ENABLE_ARCH_m32r_TRUE@$(m32r_libsim_a_OBJECTS) $(m32r_libsim_a_LIBADD): m32r/hw-config.h
5019
5020 @SIM_ENABLE_ARCH_m32r_TRUE@m32r/%.o: m32r/%.c
5021 @SIM_ENABLE_ARCH_m32r_TRUE@     $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
5022
5023 @SIM_ENABLE_ARCH_m32r_TRUE@m32r/%.o: common/%.c
5024 @SIM_ENABLE_ARCH_m32r_TRUE@     $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
5025 @SIM_ENABLE_ARCH_m32r_TRUE@m32r/modules.c: | $(m32r_BUILD_OUTPUTS)
5026
5027 @SIM_ENABLE_ARCH_m32r_TRUE@m32r/mloop.c m32r/eng.h: m32r/stamp-mloop ; @true
5028 @SIM_ENABLE_ARCH_m32r_TRUE@m32r/stamp-mloop: $(srccom)/genmloop.sh m32r/mloop.in
5029 @SIM_ENABLE_ARCH_m32r_TRUE@     $(AM_V_GEN)$(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \
5030 @SIM_ENABLE_ARCH_m32r_TRUE@             -mono -fast -pbb -switch sem-switch.c \
5031 @SIM_ENABLE_ARCH_m32r_TRUE@             -cpu m32rbf \
5032 @SIM_ENABLE_ARCH_m32r_TRUE@             -infile $(srcdir)/m32r/mloop.in -outfile-prefix m32r/
5033 @SIM_ENABLE_ARCH_m32r_TRUE@     $(AM_V_at)$(SHELL) $(srcroot)/move-if-change m32r/eng.hin m32r/eng.h
5034 @SIM_ENABLE_ARCH_m32r_TRUE@     $(AM_V_at)$(SHELL) $(srcroot)/move-if-change m32r/mloop.cin m32r/mloop.c
5035 @SIM_ENABLE_ARCH_m32r_TRUE@     $(AM_V_at)touch $@
5036
5037 @SIM_ENABLE_ARCH_m32r_TRUE@m32r/mloopx.c m32r/engx.h: m32r/stamp-mloop ; @true
5038 @SIM_ENABLE_ARCH_m32r_TRUE@m32r/stamp-mloop-x: $(srccom)/genmloop.sh m32r/mloop.in
5039 @SIM_ENABLE_ARCH_m32r_TRUE@     $(AM_V_GEN)$(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \
5040 @SIM_ENABLE_ARCH_m32r_TRUE@             -mono -no-fast -pbb -parallel-write -switch semx-switch.c \
5041 @SIM_ENABLE_ARCH_m32r_TRUE@             -cpu m32rxf \
5042 @SIM_ENABLE_ARCH_m32r_TRUE@             -infile $(srcdir)/m32r/mloopx.in -outfile-prefix m32r/ -outfile-suffix x
5043 @SIM_ENABLE_ARCH_m32r_TRUE@     $(AM_V_at)$(SHELL) $(srcroot)/move-if-change m32r/engx.hin m32r/engx.h
5044 @SIM_ENABLE_ARCH_m32r_TRUE@     $(AM_V_at)$(SHELL) $(srcroot)/move-if-change m32r/mloopx.cin m32r/mloopx.c
5045 @SIM_ENABLE_ARCH_m32r_TRUE@     $(AM_V_at)touch $@
5046
5047 @SIM_ENABLE_ARCH_m32r_TRUE@m32r/mloop2.c m32r/eng2.h: m32r/stamp-mloop ; @true
5048 @SIM_ENABLE_ARCH_m32r_TRUE@m32r/stamp-mloop-2: $(srccom)/genmloop.sh m32r/mloop.in
5049 @SIM_ENABLE_ARCH_m32r_TRUE@     $(AM_V_GEN)$(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \
5050 @SIM_ENABLE_ARCH_m32r_TRUE@             -mono -no-fast -pbb -parallel-write -switch sem2-switch.c \
5051 @SIM_ENABLE_ARCH_m32r_TRUE@             -cpu m32r2f \
5052 @SIM_ENABLE_ARCH_m32r_TRUE@             -infile $(srcdir)/m32r/mloop2.in -outfile-prefix m32r/ -outfile-suffix 2
5053 @SIM_ENABLE_ARCH_m32r_TRUE@     $(AM_V_at)$(SHELL) $(srcroot)/move-if-change m32r/eng2.hin m32r/eng2.h
5054 @SIM_ENABLE_ARCH_m32r_TRUE@     $(AM_V_at)$(SHELL) $(srcroot)/move-if-change m32r/mloop2.cin m32r/mloop2.c
5055 @SIM_ENABLE_ARCH_m32r_TRUE@     $(AM_V_at)touch $@
5056
5057 @SIM_ENABLE_ARCH_m32r_TRUE@m32r/cgen: m32r/cgen-arch m32r/cgen-cpu-decode m32r/cgen-cpu-decode-x m32r/cgen-cpu-decode-2
5058
5059 @SIM_ENABLE_ARCH_m32r_TRUE@m32r/cgen-arch:
5060 @SIM_ENABLE_ARCH_m32r_TRUE@     $(AM_V_GEN)mach=all FLAGS="with-scache with-profile=fn"; $(CGEN_GEN_ARCH)
5061 @SIM_ENABLE_ARCH_m32r_TRUE@m32r/arch.h m32r/arch.c m32r/cpuall.h: @CGEN_MAINT@ m32r/cgen-arch
5062
5063 @SIM_ENABLE_ARCH_m32r_TRUE@m32r/cgen-cpu-decode:
5064 @SIM_ENABLE_ARCH_m32r_TRUE@     $(AM_V_GEN)cpu=m32rbf mach=m32r FLAGS="with-scache with-profile=fn" EXTRAFILES="$(CGEN_CPU_SEM) $(CGEN_CPU_SEMSW)"; $(CGEN_GEN_CPU_DECODE)
5065 @SIM_ENABLE_ARCH_m32r_TRUE@m32r/cpu.h m32r/sem.c m32r/sem-switch.c m32r/model.c m32r/decode.c m32r/decode.h: @CGEN_MAINT@ m32r/cgen-cpu-decode
5066
5067 @SIM_ENABLE_ARCH_m32r_TRUE@m32r/cgen-cpu-decode-x:
5068 @SIM_ENABLE_ARCH_m32r_TRUE@     $(AM_V_GEN)cpu=m32rxf mach=m32rx SUFFIX=x FLAGS="with-scache with-profile=fn" EXTRAFILES="$(CGEN_CPU_SEMSW)"; $(CGEN_GEN_CPU_DECODE)
5069 @SIM_ENABLE_ARCH_m32r_TRUE@m32r/cpux.h m32r/semx-switch.c m32r/modelx.c m32r/decodex.c m32r/decodex.h: @CGEN_MAINT@ m32r/cgen-cpu-decode-x
5070
5071 @SIM_ENABLE_ARCH_m32r_TRUE@m32r/cgen-cpu-decode-2:
5072 @SIM_ENABLE_ARCH_m32r_TRUE@     $(AM_V_GEN)cpu=m32r2f mach=m32r2 SUFFIX=2 FLAGS="with-scache with-profile=fn" EXTRAFILES="$(CGEN_CPU_SEMSW)"; $(CGEN_GEN_CPU_DECODE)
5073 @SIM_ENABLE_ARCH_m32r_TRUE@m32r/cpu2.h m32r/sem2-switch.c m32r/model2.c m32r/decode2.c m32r/decode2.h: @CGEN_MAINT@ m32r/cgen-cpu-decode-2
5074 @SIM_ENABLE_ARCH_m68hc11_TRUE@$(m68hc11_libsim_a_OBJECTS) $(m68hc11_libsim_a_LIBADD): m68hc11/hw-config.h
5075
5076 @SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11/%.o: m68hc11/%.c
5077 @SIM_ENABLE_ARCH_m68hc11_TRUE@  $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
5078
5079 @SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11/%.o: common/%.c
5080 @SIM_ENABLE_ARCH_m68hc11_TRUE@  $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
5081 @SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11/modules.c: | $(m68hc11_BUILD_OUTPUTS)
5082
5083 # These rules are copied from automake, but tweaked to use FOR_BUILD variables.
5084 @SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11/gencode$(EXEEXT): $(m68hc11_gencode_OBJECTS) $(m68hc11_gencode_DEPENDENCIES) m68hc11/$(am__dirstamp)
5085 @SIM_ENABLE_ARCH_m68hc11_TRUE@  $(AM_V_CCLD)$(LINK_FOR_BUILD) $(m68hc11_gencode_OBJECTS) $(m68hc11_gencode_LDADD)
5086
5087 # gencode is a build-time only tool.  Override the default rules for it.
5088 @SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11/gencode.o: m68hc11/gencode.c
5089 @SIM_ENABLE_ARCH_m68hc11_TRUE@  $(AM_V_CC)$(COMPILE_FOR_BUILD) -c $< -o $@
5090
5091 @SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11/m68hc11int.c: m68hc11/gencode$(EXEEXT)
5092 @SIM_ENABLE_ARCH_m68hc11_TRUE@  $(AM_V_GEN)$< -m6811 >$@
5093
5094 @SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11/m68hc12int.c: m68hc11/gencode$(EXEEXT)
5095 @SIM_ENABLE_ARCH_m68hc11_TRUE@  $(AM_V_GEN)$< -m6812 >$@
5096 @SIM_ENABLE_ARCH_mcore_TRUE@$(mcore_libsim_a_OBJECTS) $(mcore_libsim_a_LIBADD): mcore/hw-config.h
5097
5098 @SIM_ENABLE_ARCH_mcore_TRUE@mcore/%.o: mcore/%.c
5099 @SIM_ENABLE_ARCH_mcore_TRUE@    $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
5100
5101 @SIM_ENABLE_ARCH_mcore_TRUE@mcore/%.o: common/%.c
5102 @SIM_ENABLE_ARCH_mcore_TRUE@    $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
5103 @SIM_ENABLE_ARCH_microblaze_TRUE@$(microblaze_libsim_a_OBJECTS) $(microblaze_libsim_a_LIBADD): microblaze/hw-config.h
5104
5105 @SIM_ENABLE_ARCH_microblaze_TRUE@microblaze/%.o: microblaze/%.c
5106 @SIM_ENABLE_ARCH_microblaze_TRUE@       $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
5107
5108 @SIM_ENABLE_ARCH_microblaze_TRUE@microblaze/%.o: common/%.c
5109 @SIM_ENABLE_ARCH_microblaze_TRUE@       $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
5110 @SIM_ENABLE_ARCH_mips_TRUE@$(mips_libsim_a_OBJECTS) $(mips_libsim_a_LIBADD): mips/hw-config.h
5111
5112 @SIM_ENABLE_ARCH_mips_TRUE@mips/%.o: mips/%.c
5113 @SIM_ENABLE_ARCH_mips_TRUE@     $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
5114
5115 @SIM_ENABLE_ARCH_mips_TRUE@mips/%.o: common/%.c
5116 @SIM_ENABLE_ARCH_mips_TRUE@     $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
5117 @SIM_ENABLE_ARCH_mips_TRUE@mips/modules.c: | $(mips_BUILD_OUTPUTS)
5118
5119 @SIM_ENABLE_ARCH_mips_TRUE@$(mips_BUILT_SRC_FROM_IGEN_ITABLE): mips/stamp-igen-itable
5120 @SIM_ENABLE_ARCH_mips_TRUE@$(mips_BUILT_SRC_FROM_GEN_MODE_SINGLE): mips/stamp-gen-mode-single
5121 @SIM_ENABLE_ARCH_mips_TRUE@$(mips_BUILT_SRC_FROM_GEN_MODE_M16_M16): mips/stamp-gen-mode-m16-m16
5122 @SIM_ENABLE_ARCH_mips_TRUE@$(mips_BUILT_SRC_FROM_GEN_MODE_M16_M32): mips/stamp-gen-mode-m16-m32
5123 @SIM_ENABLE_ARCH_mips_TRUE@$(SIM_MIPS_MULTI_SRC): mips/stamp-gen-mode-multi-igen mips/stamp-gen-mode-multi-run
5124
5125 @SIM_ENABLE_ARCH_mips_TRUE@mips/stamp-igen-itable: $(mips_IGEN_INSN) $(mips_IGEN_INSN_INC) $(IGEN)
5126 @SIM_ENABLE_ARCH_mips_TRUE@     $(AM_V_GEN)$(IGEN_RUN) \
5127 @SIM_ENABLE_ARCH_mips_TRUE@             $(mips_IGEN_TRACE) \
5128 @SIM_ENABLE_ARCH_mips_TRUE@             -I $(srcdir)/mips \
5129 @SIM_ENABLE_ARCH_mips_TRUE@             -Werror \
5130 @SIM_ENABLE_ARCH_mips_TRUE@             -Wnodiscard \
5131 @SIM_ENABLE_ARCH_mips_TRUE@             -Wnowidth \
5132 @SIM_ENABLE_ARCH_mips_TRUE@             -Wnounimplemented \
5133 @SIM_ENABLE_ARCH_mips_TRUE@             $(SIM_MIPS_IGEN_ITABLE_FLAGS) \
5134 @SIM_ENABLE_ARCH_mips_TRUE@             -G gen-direct-access \
5135 @SIM_ENABLE_ARCH_mips_TRUE@             -G gen-zero-r0 \
5136 @SIM_ENABLE_ARCH_mips_TRUE@             -i $(mips_IGEN_INSN) \
5137 @SIM_ENABLE_ARCH_mips_TRUE@             -n itable.h    -ht mips/itable.h \
5138 @SIM_ENABLE_ARCH_mips_TRUE@             -n itable.c    -t  mips/itable.c
5139 @SIM_ENABLE_ARCH_mips_TRUE@     $(AM_V_at)touch $@
5140
5141 @SIM_ENABLE_ARCH_mips_TRUE@mips/stamp-gen-mode-single: $(mips_IGEN_INSN) $(mips_IGEN_INSN_INC) $(mips_IGEN_DC) $(IGEN)
5142 @SIM_ENABLE_ARCH_mips_TRUE@     $(AM_V_GEN)$(IGEN_RUN) \
5143 @SIM_ENABLE_ARCH_mips_TRUE@             $(mips_IGEN_TRACE) \
5144 @SIM_ENABLE_ARCH_mips_TRUE@             -I $(srcdir)/mips \
5145 @SIM_ENABLE_ARCH_mips_TRUE@             -Werror \
5146 @SIM_ENABLE_ARCH_mips_TRUE@             -Wnodiscard \
5147 @SIM_ENABLE_ARCH_mips_TRUE@             $(SIM_MIPS_SINGLE_FLAGS) \
5148 @SIM_ENABLE_ARCH_mips_TRUE@             -G gen-direct-access \
5149 @SIM_ENABLE_ARCH_mips_TRUE@             -G gen-zero-r0 \
5150 @SIM_ENABLE_ARCH_mips_TRUE@             -B 32 \
5151 @SIM_ENABLE_ARCH_mips_TRUE@             -H 31 \
5152 @SIM_ENABLE_ARCH_mips_TRUE@             -i $(mips_IGEN_INSN) \
5153 @SIM_ENABLE_ARCH_mips_TRUE@             -o $(mips_IGEN_DC) \
5154 @SIM_ENABLE_ARCH_mips_TRUE@             -x \
5155 @SIM_ENABLE_ARCH_mips_TRUE@             -n icache.h    -hc mips/icache.h \
5156 @SIM_ENABLE_ARCH_mips_TRUE@             -n icache.c    -c  mips/icache.c \
5157 @SIM_ENABLE_ARCH_mips_TRUE@             -n semantics.h -hs mips/semantics.h \
5158 @SIM_ENABLE_ARCH_mips_TRUE@             -n semantics.c -s  mips/semantics.c \
5159 @SIM_ENABLE_ARCH_mips_TRUE@             -n idecode.h   -hd mips/idecode.h \
5160 @SIM_ENABLE_ARCH_mips_TRUE@             -n idecode.c   -d  mips/idecode.c \
5161 @SIM_ENABLE_ARCH_mips_TRUE@             -n model.h     -hm mips/model.h \
5162 @SIM_ENABLE_ARCH_mips_TRUE@             -n model.c     -m  mips/model.c \
5163 @SIM_ENABLE_ARCH_mips_TRUE@             -n support.h   -hf mips/support.h \
5164 @SIM_ENABLE_ARCH_mips_TRUE@             -n support.c   -f  mips/support.c \
5165 @SIM_ENABLE_ARCH_mips_TRUE@             -n engine.h    -he mips/engine.h \
5166 @SIM_ENABLE_ARCH_mips_TRUE@             -n engine.c    -e  mips/engine.c \
5167 @SIM_ENABLE_ARCH_mips_TRUE@             -n irun.c      -r  mips/irun.c
5168 @SIM_ENABLE_ARCH_mips_TRUE@     $(AM_V_at)touch $@
5169
5170 @SIM_ENABLE_ARCH_mips_TRUE@mips/stamp-gen-mode-m16-m16: $(mips_IGEN_INSN) $(mips_IGEN_INSN_INC) $(mips_M16_DC) $(IGEN)
5171 @SIM_ENABLE_ARCH_mips_TRUE@     $(AM_V_GEN)$(IGEN_RUN) \
5172 @SIM_ENABLE_ARCH_mips_TRUE@             $(mips_IGEN_TRACE) \
5173 @SIM_ENABLE_ARCH_mips_TRUE@             -I $(srcdir)/mips \
5174 @SIM_ENABLE_ARCH_mips_TRUE@             -Werror \
5175 @SIM_ENABLE_ARCH_mips_TRUE@             -Wnodiscard \
5176 @SIM_ENABLE_ARCH_mips_TRUE@             $(SIM_MIPS_M16_FLAGS) \
5177 @SIM_ENABLE_ARCH_mips_TRUE@             -G gen-direct-access \
5178 @SIM_ENABLE_ARCH_mips_TRUE@             -G gen-zero-r0 \
5179 @SIM_ENABLE_ARCH_mips_TRUE@             -B 16 \
5180 @SIM_ENABLE_ARCH_mips_TRUE@             -H 15 \
5181 @SIM_ENABLE_ARCH_mips_TRUE@             -i $(mips_IGEN_INSN) \
5182 @SIM_ENABLE_ARCH_mips_TRUE@             -o $(mips_M16_DC) \
5183 @SIM_ENABLE_ARCH_mips_TRUE@             -P m16_ \
5184 @SIM_ENABLE_ARCH_mips_TRUE@             -x \
5185 @SIM_ENABLE_ARCH_mips_TRUE@             -n m16_icache.h    -hc mips/m16_icache.h \
5186 @SIM_ENABLE_ARCH_mips_TRUE@             -n m16_icache.c    -c  mips/m16_icache.c \
5187 @SIM_ENABLE_ARCH_mips_TRUE@             -n m16_semantics.h -hs mips/m16_semantics.h \
5188 @SIM_ENABLE_ARCH_mips_TRUE@             -n m16_semantics.c -s  mips/m16_semantics.c \
5189 @SIM_ENABLE_ARCH_mips_TRUE@             -n m16_idecode.h   -hd mips/m16_idecode.h \
5190 @SIM_ENABLE_ARCH_mips_TRUE@             -n m16_idecode.c   -d  mips/m16_idecode.c \
5191 @SIM_ENABLE_ARCH_mips_TRUE@             -n m16_model.h     -hm mips/m16_model.h \
5192 @SIM_ENABLE_ARCH_mips_TRUE@             -n m16_model.c     -m  mips/m16_model.c \
5193 @SIM_ENABLE_ARCH_mips_TRUE@             -n m16_support.h   -hf mips/m16_support.h \
5194 @SIM_ENABLE_ARCH_mips_TRUE@             -n m16_support.c   -f  mips/m16_support.c
5195 @SIM_ENABLE_ARCH_mips_TRUE@     $(AM_V_at)touch $@
5196
5197 @SIM_ENABLE_ARCH_mips_TRUE@mips/stamp-gen-mode-m16-m32: $(mips_IGEN_INSN) $(mips_IGEN_INSN_INC) $(mips_IGEN_DC) $(IGEN)
5198 @SIM_ENABLE_ARCH_mips_TRUE@     $(AM_V_GEN)$(IGEN_RUN) \
5199 @SIM_ENABLE_ARCH_mips_TRUE@             $(mips_IGEN_TRACE) \
5200 @SIM_ENABLE_ARCH_mips_TRUE@             -I $(srcdir)/mips \
5201 @SIM_ENABLE_ARCH_mips_TRUE@             -Werror \
5202 @SIM_ENABLE_ARCH_mips_TRUE@             -Wnodiscard \
5203 @SIM_ENABLE_ARCH_mips_TRUE@             $(SIM_MIPS_SINGLE_FLAGS) \
5204 @SIM_ENABLE_ARCH_mips_TRUE@             -G gen-direct-access \
5205 @SIM_ENABLE_ARCH_mips_TRUE@             -G gen-zero-r0 \
5206 @SIM_ENABLE_ARCH_mips_TRUE@             -B 32 \
5207 @SIM_ENABLE_ARCH_mips_TRUE@             -H 31 \
5208 @SIM_ENABLE_ARCH_mips_TRUE@             -i $(mips_IGEN_INSN) \
5209 @SIM_ENABLE_ARCH_mips_TRUE@             -o $(mips_IGEN_DC) \
5210 @SIM_ENABLE_ARCH_mips_TRUE@             -P m32_ \
5211 @SIM_ENABLE_ARCH_mips_TRUE@             -x \
5212 @SIM_ENABLE_ARCH_mips_TRUE@             -n m32_icache.h    -hc mips/m32_icache.h \
5213 @SIM_ENABLE_ARCH_mips_TRUE@             -n m32_icache.c    -c  mips/m32_icache.c \
5214 @SIM_ENABLE_ARCH_mips_TRUE@             -n m32_semantics.h -hs mips/m32_semantics.h \
5215 @SIM_ENABLE_ARCH_mips_TRUE@             -n m32_semantics.c -s  mips/m32_semantics.c \
5216 @SIM_ENABLE_ARCH_mips_TRUE@             -n m32_idecode.h   -hd mips/m32_idecode.h \
5217 @SIM_ENABLE_ARCH_mips_TRUE@             -n m32_idecode.c   -d  mips/m32_idecode.c \
5218 @SIM_ENABLE_ARCH_mips_TRUE@             -n m32_model.h     -hm mips/m32_model.h \
5219 @SIM_ENABLE_ARCH_mips_TRUE@             -n m32_model.c     -m  mips/m32_model.c \
5220 @SIM_ENABLE_ARCH_mips_TRUE@             -n m32_support.h   -hf mips/m32_support.h \
5221 @SIM_ENABLE_ARCH_mips_TRUE@             -n m32_support.c   -f  mips/m32_support.c
5222 @SIM_ENABLE_ARCH_mips_TRUE@     $(AM_V_at)touch $@
5223
5224 @SIM_ENABLE_ARCH_mips_TRUE@mips/stamp-gen-mode-multi-igen: $(mips_IGEN_INSN) $(mips_IGEN_INSN_INC) $(mips_IGEN_DC) $(mips_M16_DC) $(mips_MICROMIPS32_DC) $(mips_MICROMIPS16_DC) $(IGEN)
5225 @SIM_ENABLE_ARCH_mips_TRUE@     $(AM_V_GEN)\
5226 @SIM_ENABLE_ARCH_mips_TRUE@     for t in $(SIM_MIPS_MULTI_IGEN_CONFIGS); do \
5227 @SIM_ENABLE_ARCH_mips_TRUE@       p=`echo $${t} | sed -e 's/:.*//'` ; \
5228 @SIM_ENABLE_ARCH_mips_TRUE@       m=`echo $${t} | sed -e 's/.*:\(.*\):.*/\1/'` ; \
5229 @SIM_ENABLE_ARCH_mips_TRUE@       f=`echo $${t} | sed -e 's/.*://'` ; \
5230 @SIM_ENABLE_ARCH_mips_TRUE@       case $${p} in \
5231 @SIM_ENABLE_ARCH_mips_TRUE@         micromips16*) \
5232 @SIM_ENABLE_ARCH_mips_TRUE@           e="-B 16 -H 15 -o $(mips_MICROMIPS16_DC) -F 16" ;; \
5233 @SIM_ENABLE_ARCH_mips_TRUE@         micromips32* | micromips64*) \
5234 @SIM_ENABLE_ARCH_mips_TRUE@           e="-B 32 -H 31 -o $(mips_MICROMIPS32_DC) -F $${f}" ;; \
5235 @SIM_ENABLE_ARCH_mips_TRUE@         micromips_m32*) \
5236 @SIM_ENABLE_ARCH_mips_TRUE@           e="-B 32 -H 31 -o $(mips_IGEN_DC) -F $${f}"; \
5237 @SIM_ENABLE_ARCH_mips_TRUE@           m="mips32r2,mips3d,mdmx,dsp,dsp2,smartmips" ;; \
5238 @SIM_ENABLE_ARCH_mips_TRUE@         micromips_m64*) \
5239 @SIM_ENABLE_ARCH_mips_TRUE@           e="-B 32 -H 31 -o $(mips_IGEN_DC) -F $${f}"; \
5240 @SIM_ENABLE_ARCH_mips_TRUE@           m="mips64r2,mips3d,mdmx,dsp,dsp2,smartmips" ;; \
5241 @SIM_ENABLE_ARCH_mips_TRUE@         m16*) \
5242 @SIM_ENABLE_ARCH_mips_TRUE@           e="-B 16 -H 15 -o $(mips_M16_DC) -F 16" ;; \
5243 @SIM_ENABLE_ARCH_mips_TRUE@         *) \
5244 @SIM_ENABLE_ARCH_mips_TRUE@           e="-B 32 -H 31 -o $(mips_IGEN_DC) -F $${f}" ;; \
5245 @SIM_ENABLE_ARCH_mips_TRUE@       esac; \
5246 @SIM_ENABLE_ARCH_mips_TRUE@       $(IGEN_RUN) \
5247 @SIM_ENABLE_ARCH_mips_TRUE@             $(mips_IGEN_TRACE) \
5248 @SIM_ENABLE_ARCH_mips_TRUE@             $${e} \
5249 @SIM_ENABLE_ARCH_mips_TRUE@             -I $(srcdir)/mips \
5250 @SIM_ENABLE_ARCH_mips_TRUE@             -Werror \
5251 @SIM_ENABLE_ARCH_mips_TRUE@             -Wnodiscard \
5252 @SIM_ENABLE_ARCH_mips_TRUE@             -M $${m} \
5253 @SIM_ENABLE_ARCH_mips_TRUE@             -G gen-direct-access \
5254 @SIM_ENABLE_ARCH_mips_TRUE@             -G gen-zero-r0 \
5255 @SIM_ENABLE_ARCH_mips_TRUE@             -i $(mips_IGEN_INSN) \
5256 @SIM_ENABLE_ARCH_mips_TRUE@             -P $${p}_ \
5257 @SIM_ENABLE_ARCH_mips_TRUE@             -x \
5258 @SIM_ENABLE_ARCH_mips_TRUE@             -n $${p}_icache.h    -hc mips/$${p}_icache.h \
5259 @SIM_ENABLE_ARCH_mips_TRUE@             -n $${p}_icache.c    -c  mips/$${p}_icache.c \
5260 @SIM_ENABLE_ARCH_mips_TRUE@             -n $${p}_semantics.h -hs mips/$${p}_semantics.h \
5261 @SIM_ENABLE_ARCH_mips_TRUE@             -n $${p}_semantics.c -s  mips/$${p}_semantics.c \
5262 @SIM_ENABLE_ARCH_mips_TRUE@             -n $${p}_idecode.h   -hd mips/$${p}_idecode.h \
5263 @SIM_ENABLE_ARCH_mips_TRUE@             -n $${p}_idecode.c   -d  mips/$${p}_idecode.c \
5264 @SIM_ENABLE_ARCH_mips_TRUE@             -n $${p}_model.h     -hm mips/$${p}_model.h \
5265 @SIM_ENABLE_ARCH_mips_TRUE@             -n $${p}_model.c     -m  mips/$${p}_model.c \
5266 @SIM_ENABLE_ARCH_mips_TRUE@             -n $${p}_support.h   -hf mips/$${p}_support.h \
5267 @SIM_ENABLE_ARCH_mips_TRUE@             -n $${p}_support.c   -f  mips/$${p}_support.c \
5268 @SIM_ENABLE_ARCH_mips_TRUE@             -n $${p}_engine.h    -he mips/$${p}_engine.h \
5269 @SIM_ENABLE_ARCH_mips_TRUE@             -n $${p}_engine.c    -e  mips/$${p}_engine.c \
5270 @SIM_ENABLE_ARCH_mips_TRUE@         || exit; \
5271 @SIM_ENABLE_ARCH_mips_TRUE@     done
5272 @SIM_ENABLE_ARCH_mips_TRUE@     $(AM_V_at)touch $@
5273
5274 @SIM_ENABLE_ARCH_mips_TRUE@mips/stamp-gen-mode-multi-run: mips/m16run.c mips/micromipsrun.c
5275 @SIM_ENABLE_ARCH_mips_TRUE@     $(AM_V_GEN)\
5276 @SIM_ENABLE_ARCH_mips_TRUE@     for t in $(SIM_MIPS_MULTI_IGEN_CONFIGS); do \
5277 @SIM_ENABLE_ARCH_mips_TRUE@       case $${t} in \
5278 @SIM_ENABLE_ARCH_mips_TRUE@         m16*) \
5279 @SIM_ENABLE_ARCH_mips_TRUE@           m=`echo $${t} | sed -e 's/^m16//' -e 's/:.*//'`; \
5280 @SIM_ENABLE_ARCH_mips_TRUE@           o=mips/m16$${m}_run.c; \
5281 @SIM_ENABLE_ARCH_mips_TRUE@           sed < $(srcdir)/mips/m16run.c > $$o.tmp \
5282 @SIM_ENABLE_ARCH_mips_TRUE@                 -e "s/^sim_/m16$${m}_/" \
5283 @SIM_ENABLE_ARCH_mips_TRUE@                 -e "/include/s/sim-engine/m16$${m}_engine/" \
5284 @SIM_ENABLE_ARCH_mips_TRUE@                 -e "s/m16_/m16$${m}_/" \
5285 @SIM_ENABLE_ARCH_mips_TRUE@                 -e "s/m32_/m32$${m}_/" \
5286 @SIM_ENABLE_ARCH_mips_TRUE@                 || exit 1; \
5287 @SIM_ENABLE_ARCH_mips_TRUE@           $(SHELL) $(srcroot)/move-if-change $$o.tmp $$o; \
5288 @SIM_ENABLE_ARCH_mips_TRUE@           ;;\
5289 @SIM_ENABLE_ARCH_mips_TRUE@         micromips32*) \
5290 @SIM_ENABLE_ARCH_mips_TRUE@           m=`echo $${t} | sed -e 's/^micromips32//' -e 's/:.*//'`; \
5291 @SIM_ENABLE_ARCH_mips_TRUE@           o=mips/micromips$${m}_run.c; \
5292 @SIM_ENABLE_ARCH_mips_TRUE@           sed < $(srcdir)/mips/micromipsrun.c > $$o.tmp \
5293 @SIM_ENABLE_ARCH_mips_TRUE@                 -e "s/^sim_/micromips32$${m}_/" \
5294 @SIM_ENABLE_ARCH_mips_TRUE@                 -e "/include/s/sim-engine/micromips32$${m}_engine/" \
5295 @SIM_ENABLE_ARCH_mips_TRUE@                 -e "s/micromips16_/micromips16$${m}_/" \
5296 @SIM_ENABLE_ARCH_mips_TRUE@                 -e "s/micromips32_/micromips32$${m}_/" \
5297 @SIM_ENABLE_ARCH_mips_TRUE@                 -e "s/m32_/m32$${m}_/" \
5298 @SIM_ENABLE_ARCH_mips_TRUE@                 || exit 1; \
5299 @SIM_ENABLE_ARCH_mips_TRUE@           $(SHELL) $(srcroot)/move-if-change $$o.tmp $$o; \
5300 @SIM_ENABLE_ARCH_mips_TRUE@           ;;\
5301 @SIM_ENABLE_ARCH_mips_TRUE@         micromips64*) \
5302 @SIM_ENABLE_ARCH_mips_TRUE@           m=`echo $${t} | sed -e 's/^micromips64//' -e 's/:.*//'`; \
5303 @SIM_ENABLE_ARCH_mips_TRUE@           o=mips/micromips$${m}_run.c; \
5304 @SIM_ENABLE_ARCH_mips_TRUE@           sed < $(srcdir)/mips/micromipsrun.c > $$o.tmp \
5305 @SIM_ENABLE_ARCH_mips_TRUE@                 -e "s/^sim_/micromips64$${m}_/" \
5306 @SIM_ENABLE_ARCH_mips_TRUE@                 -e "/include/s/sim-engine/micromips64$${m}_engine/" \
5307 @SIM_ENABLE_ARCH_mips_TRUE@                 -e "s/micromips16_/micromips16$${m}_/" \
5308 @SIM_ENABLE_ARCH_mips_TRUE@                 -e "s/micromips32_/micromips64$${m}_/" \
5309 @SIM_ENABLE_ARCH_mips_TRUE@                 -e "s/m32_/m64$${m}_/" \
5310 @SIM_ENABLE_ARCH_mips_TRUE@                 || exit 1; \
5311 @SIM_ENABLE_ARCH_mips_TRUE@           $(SHELL) $(srcroot)/move-if-change $$o.tmp $$o; \
5312 @SIM_ENABLE_ARCH_mips_TRUE@           ;;\
5313 @SIM_ENABLE_ARCH_mips_TRUE@       esac \
5314 @SIM_ENABLE_ARCH_mips_TRUE@     done
5315 @SIM_ENABLE_ARCH_mips_TRUE@     $(AM_V_at)touch $@
5316 @SIM_ENABLE_ARCH_mn10300_TRUE@$(mn10300_libsim_a_OBJECTS) $(mn10300_libsim_a_LIBADD): mn10300/hw-config.h
5317
5318 @SIM_ENABLE_ARCH_mn10300_TRUE@mn10300/%.o: mn10300/%.c
5319 @SIM_ENABLE_ARCH_mn10300_TRUE@  $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
5320
5321 @SIM_ENABLE_ARCH_mn10300_TRUE@mn10300/%.o: common/%.c
5322 @SIM_ENABLE_ARCH_mn10300_TRUE@  $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
5323 @SIM_ENABLE_ARCH_mn10300_TRUE@mn10300/modules.c: | $(mn10300_BUILD_OUTPUTS)
5324
5325 @SIM_ENABLE_ARCH_mn10300_TRUE@$(mn10300_BUILT_SRC_FROM_IGEN): mn10300/stamp-igen
5326 @SIM_ENABLE_ARCH_mn10300_TRUE@mn10300/stamp-igen: $(mn10300_IGEN_INSN) $(mn10300_IGEN_INSN_INC) $(mn10300_IGEN_DC) $(IGEN)
5327 @SIM_ENABLE_ARCH_mn10300_TRUE@  $(AM_V_GEN)$(IGEN_RUN) \
5328 @SIM_ENABLE_ARCH_mn10300_TRUE@          $(mn10300_IGEN_TRACE) \
5329 @SIM_ENABLE_ARCH_mn10300_TRUE@          -G gen-direct-access \
5330 @SIM_ENABLE_ARCH_mn10300_TRUE@          -M mn10300,am33 -G gen-multi-sim=am33 \
5331 @SIM_ENABLE_ARCH_mn10300_TRUE@          -M am33_2 \
5332 @SIM_ENABLE_ARCH_mn10300_TRUE@          -I $(srcdir)/mn10300 \
5333 @SIM_ENABLE_ARCH_mn10300_TRUE@          -i $(mn10300_IGEN_INSN) \
5334 @SIM_ENABLE_ARCH_mn10300_TRUE@          -o $(mn10300_IGEN_DC) \
5335 @SIM_ENABLE_ARCH_mn10300_TRUE@          -x \
5336 @SIM_ENABLE_ARCH_mn10300_TRUE@          -n icache.h    -hc mn10300/icache.h \
5337 @SIM_ENABLE_ARCH_mn10300_TRUE@          -n icache.c    -c  mn10300/icache.c \
5338 @SIM_ENABLE_ARCH_mn10300_TRUE@          -n semantics.h -hs mn10300/semantics.h \
5339 @SIM_ENABLE_ARCH_mn10300_TRUE@          -n semantics.c -s  mn10300/semantics.c \
5340 @SIM_ENABLE_ARCH_mn10300_TRUE@          -n idecode.h   -hd mn10300/idecode.h \
5341 @SIM_ENABLE_ARCH_mn10300_TRUE@          -n idecode.c   -d  mn10300/idecode.c \
5342 @SIM_ENABLE_ARCH_mn10300_TRUE@          -n model.h     -hm mn10300/model.h \
5343 @SIM_ENABLE_ARCH_mn10300_TRUE@          -n model.c     -m  mn10300/model.c \
5344 @SIM_ENABLE_ARCH_mn10300_TRUE@          -n support.h   -hf mn10300/support.h \
5345 @SIM_ENABLE_ARCH_mn10300_TRUE@          -n support.c   -f  mn10300/support.c \
5346 @SIM_ENABLE_ARCH_mn10300_TRUE@          -n itable.h    -ht mn10300/itable.h \
5347 @SIM_ENABLE_ARCH_mn10300_TRUE@          -n itable.c    -t  mn10300/itable.c \
5348 @SIM_ENABLE_ARCH_mn10300_TRUE@          -n engine.h    -he mn10300/engine.h \
5349 @SIM_ENABLE_ARCH_mn10300_TRUE@          -n engine.c    -e  mn10300/engine.c \
5350 @SIM_ENABLE_ARCH_mn10300_TRUE@          -n irun.c      -r  mn10300/irun.c
5351 @SIM_ENABLE_ARCH_mn10300_TRUE@  $(AM_V_at)touch $@
5352 @SIM_ENABLE_ARCH_moxie_TRUE@$(moxie_libsim_a_OBJECTS) $(moxie_libsim_a_LIBADD): moxie/hw-config.h
5353
5354 @SIM_ENABLE_ARCH_moxie_TRUE@moxie/%.o: moxie/%.c
5355 @SIM_ENABLE_ARCH_moxie_TRUE@    $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
5356
5357 @SIM_ENABLE_ARCH_moxie_TRUE@moxie/%.o: common/%.c
5358 @SIM_ENABLE_ARCH_moxie_TRUE@    $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
5359
5360 @SIM_ENABLE_ARCH_moxie_TRUE@moxie/moxie-gdb.dtb: @MAINT@ moxie/moxie-gdb.dts moxie/$(am__dirstamp)
5361 @SIM_ENABLE_ARCH_moxie_TRUE@    $(AM_V_GEN) \
5362 @SIM_ENABLE_ARCH_moxie_TRUE@    if test "x$(DTC)" != x; then \
5363 @SIM_ENABLE_ARCH_moxie_TRUE@      $(DTC) -O dtb -o $@.tmp ${srcdir}/moxie/moxie-gdb.dts || exit 1; \
5364 @SIM_ENABLE_ARCH_moxie_TRUE@      $(SHELL) $(srcroot)/move-if-change $@.tmp ${srcdir}/moxie/moxie-gdb.dtb || exit 1; \
5365 @SIM_ENABLE_ARCH_moxie_TRUE@      touch ${srcdir}/moxie/moxie-gdb.dtb; \
5366 @SIM_ENABLE_ARCH_moxie_TRUE@    else \
5367 @SIM_ENABLE_ARCH_moxie_TRUE@      echo "Could not update the moxie-gdb.dtb file because the device "; \
5368 @SIM_ENABLE_ARCH_moxie_TRUE@      echo "tree compiler tool (dtc) is missing.  Install the tool to "; \
5369 @SIM_ENABLE_ARCH_moxie_TRUE@      echo "update the device tree blob."; \
5370 @SIM_ENABLE_ARCH_moxie_TRUE@    fi
5371 @SIM_ENABLE_ARCH_msp430_TRUE@$(msp430_libsim_a_OBJECTS) $(msp430_libsim_a_LIBADD): msp430/hw-config.h
5372
5373 @SIM_ENABLE_ARCH_msp430_TRUE@msp430/%.o: msp430/%.c
5374 @SIM_ENABLE_ARCH_msp430_TRUE@   $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
5375
5376 @SIM_ENABLE_ARCH_msp430_TRUE@msp430/%.o: common/%.c
5377 @SIM_ENABLE_ARCH_msp430_TRUE@   $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
5378 @SIM_ENABLE_ARCH_or1k_TRUE@$(or1k_libsim_a_OBJECTS) $(or1k_libsim_a_LIBADD): or1k/hw-config.h
5379
5380 @SIM_ENABLE_ARCH_or1k_TRUE@or1k/%.o: or1k/%.c
5381 @SIM_ENABLE_ARCH_or1k_TRUE@     $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
5382
5383 @SIM_ENABLE_ARCH_or1k_TRUE@or1k/%.o: common/%.c
5384 @SIM_ENABLE_ARCH_or1k_TRUE@     $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
5385 @SIM_ENABLE_ARCH_or1k_TRUE@or1k/modules.c: | $(or1k_BUILD_OUTPUTS)
5386
5387 @SIM_ENABLE_ARCH_or1k_TRUE@or1k/mloop.c or1k/eng.h: or1k/stamp-mloop ; @true
5388 @SIM_ENABLE_ARCH_or1k_TRUE@or1k/stamp-mloop: $(srccom)/genmloop.sh or1k/mloop.in
5389 @SIM_ENABLE_ARCH_or1k_TRUE@     $(AM_V_GEN)$(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \
5390 @SIM_ENABLE_ARCH_or1k_TRUE@             -mono -fast -pbb -switch sem-switch.c \
5391 @SIM_ENABLE_ARCH_or1k_TRUE@             -cpu or1k32bf \
5392 @SIM_ENABLE_ARCH_or1k_TRUE@             -infile $(srcdir)/or1k/mloop.in -outfile-prefix or1k/
5393 @SIM_ENABLE_ARCH_or1k_TRUE@     $(AM_V_at)$(SHELL) $(srcroot)/move-if-change or1k/eng.hin or1k/eng.h
5394 @SIM_ENABLE_ARCH_or1k_TRUE@     $(AM_V_at)$(SHELL) $(srcroot)/move-if-change or1k/mloop.cin or1k/mloop.c
5395 @SIM_ENABLE_ARCH_or1k_TRUE@     $(AM_V_at)touch $@
5396
5397 @SIM_ENABLE_ARCH_or1k_TRUE@or1k/cgen: or1k/cgen-arch or1k/cgen-cpu-decode
5398
5399 @SIM_ENABLE_ARCH_or1k_TRUE@or1k/cgen-arch:
5400 @SIM_ENABLE_ARCH_or1k_TRUE@     $(AM_V_GEN)mach=or32,or32nd FLAGS="with-scache"; $(CGEN_GEN_ARCH)
5401 @SIM_ENABLE_ARCH_or1k_TRUE@or1k/arch.h or1k/arch.c or1k/cpuall.h: @CGEN_MAINT@ or1k/cgen-arch
5402
5403 @SIM_ENABLE_ARCH_or1k_TRUE@or1k/cgen-cpu-decode:
5404 @SIM_ENABLE_ARCH_or1k_TRUE@     $(AM_V_GEN)cpu=or1k32bf mach=or32,or32nd FLAGS="with-scache" EXTRAFILES="$(CGEN_CPU_SEM) $(CGEN_CPU_SEMSW)"; $(CGEN_GEN_CPU_DECODE)
5405 @SIM_ENABLE_ARCH_or1k_TRUE@or1k/cpu.h or1k/cpu.c or1k/model.c or1k/sem.c or1k/sem-switch.c or1k/decode.c or1k/decode.h: @CGEN_MAINT@ or1k/cgen-cpu-decode
5406
5407 @SIM_ENABLE_ARCH_ppc_TRUE@ppc/psim$(EXEEXT): ppc/run$(EXEEXT)
5408 @SIM_ENABLE_ARCH_ppc_TRUE@      $(AM_V_GEN)ln $< $@ 2>/dev/null || $(LN_S) $< $@ 2>/dev/null || cp -p $< $@
5409
5410 @SIM_ENABLE_ARCH_ppc_TRUE@ppc/%.o: ppc/%.c | ppc/libsim.a $(SIM_ALL_RECURSIVE_DEPS)
5411 @SIM_ENABLE_ARCH_ppc_TRUE@      $(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
5412
5413 @SIM_ENABLE_ARCH_ppc_TRUE@ppc/spreg.c: @MAINT@ ppc/ppc-spr-table ppc/spreg-gen.py ppc/$(am__dirstamp)
5414 @SIM_ENABLE_ARCH_ppc_TRUE@      $(AM_V_GEN)$(srcdir)/ppc/spreg-gen.py --source $@.tmp
5415 @SIM_ENABLE_ARCH_ppc_TRUE@      $(AM_V_at)$(SHELL) $(srcroot)/move-if-change $@.tmp $(srcdir)/ppc/spreg.c
5416 @SIM_ENABLE_ARCH_ppc_TRUE@      $(AM_V_at)touch $(srcdir)/ppc/spreg.c
5417
5418 @SIM_ENABLE_ARCH_ppc_TRUE@ppc/spreg.h: @MAINT@ ppc/ppc-spr-table ppc/spreg-gen.py ppc/$(am__dirstamp)
5419 @SIM_ENABLE_ARCH_ppc_TRUE@      $(AM_V_GEN)$(srcdir)/ppc/spreg-gen.py --header $@.tmp
5420 @SIM_ENABLE_ARCH_ppc_TRUE@      $(AM_V_at)$(SHELL) $(srcroot)/move-if-change $@.tmp $(srcdir)/ppc/spreg.h
5421 @SIM_ENABLE_ARCH_ppc_TRUE@      $(AM_V_at)touch $(srcdir)/ppc/spreg.h
5422 @SIM_ENABLE_ARCH_pru_TRUE@$(pru_libsim_a_OBJECTS) $(pru_libsim_a_LIBADD): pru/hw-config.h
5423
5424 @SIM_ENABLE_ARCH_pru_TRUE@pru/%.o: pru/%.c
5425 @SIM_ENABLE_ARCH_pru_TRUE@      $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
5426
5427 @SIM_ENABLE_ARCH_pru_TRUE@pru/%.o: common/%.c
5428 @SIM_ENABLE_ARCH_pru_TRUE@      $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
5429 @SIM_ENABLE_ARCH_riscv_TRUE@$(riscv_libsim_a_OBJECTS) $(riscv_libsim_a_LIBADD): riscv/hw-config.h
5430
5431 @SIM_ENABLE_ARCH_riscv_TRUE@riscv/%.o: riscv/%.c
5432 @SIM_ENABLE_ARCH_riscv_TRUE@    $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
5433
5434 @SIM_ENABLE_ARCH_riscv_TRUE@riscv/%.o: common/%.c
5435 @SIM_ENABLE_ARCH_riscv_TRUE@    $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
5436 @SIM_ENABLE_ARCH_rl78_TRUE@$(rl78_libsim_a_OBJECTS) $(rl78_libsim_a_LIBADD): rl78/hw-config.h
5437
5438 @SIM_ENABLE_ARCH_rl78_TRUE@rl78/%.o: rl78/%.c
5439 @SIM_ENABLE_ARCH_rl78_TRUE@     $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
5440
5441 @SIM_ENABLE_ARCH_rl78_TRUE@rl78/%.o: common/%.c
5442 @SIM_ENABLE_ARCH_rl78_TRUE@     $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
5443 @SIM_ENABLE_ARCH_rx_TRUE@$(rx_libsim_a_OBJECTS) $(rx_libsim_a_LIBADD): rx/hw-config.h
5444
5445 @SIM_ENABLE_ARCH_rx_TRUE@rx/%.o: rx/%.c
5446 @SIM_ENABLE_ARCH_rx_TRUE@       $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
5447
5448 @SIM_ENABLE_ARCH_rx_TRUE@rx/%.o: common/%.c
5449 @SIM_ENABLE_ARCH_rx_TRUE@       $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
5450 @SIM_ENABLE_ARCH_sh_TRUE@$(sh_libsim_a_OBJECTS) $(sh_libsim_a_LIBADD): sh/hw-config.h
5451
5452 @SIM_ENABLE_ARCH_sh_TRUE@sh/%.o: sh/%.c
5453 @SIM_ENABLE_ARCH_sh_TRUE@       $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
5454
5455 @SIM_ENABLE_ARCH_sh_TRUE@sh/%.o: common/%.c
5456 @SIM_ENABLE_ARCH_sh_TRUE@       $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
5457 @SIM_ENABLE_ARCH_sh_TRUE@sh/modules.c: | $(sh_BUILD_OUTPUTS)
5458
5459 # These rules are copied from automake, but tweaked to use FOR_BUILD variables.
5460 @SIM_ENABLE_ARCH_sh_TRUE@sh/gencode$(EXEEXT): $(sh_gencode_OBJECTS) $(sh_gencode_DEPENDENCIES) sh/$(am__dirstamp)
5461 @SIM_ENABLE_ARCH_sh_TRUE@       $(AM_V_CCLD)$(LINK_FOR_BUILD) $(sh_gencode_OBJECTS) $(sh_gencode_LDADD)
5462
5463 # gencode is a build-time only tool.  Override the default rules for it.
5464 @SIM_ENABLE_ARCH_sh_TRUE@sh/gencode.o: sh/gencode.c
5465 @SIM_ENABLE_ARCH_sh_TRUE@       $(AM_V_CC)$(COMPILE_FOR_BUILD) -c $< -o $@
5466
5467 @SIM_ENABLE_ARCH_sh_TRUE@sh/code.c: sh/gencode$(EXEEXT)
5468 @SIM_ENABLE_ARCH_sh_TRUE@       $(AM_V_GEN)$< -x >$@
5469
5470 @SIM_ENABLE_ARCH_sh_TRUE@sh/ppi.c: sh/gencode$(EXEEXT)
5471 @SIM_ENABLE_ARCH_sh_TRUE@       $(AM_V_GEN)$< -p >$@
5472
5473 @SIM_ENABLE_ARCH_sh_TRUE@sh/table.c: sh/gencode$(EXEEXT)
5474 @SIM_ENABLE_ARCH_sh_TRUE@       $(AM_V_GEN)$< -s >$@
5475 @SIM_ENABLE_ARCH_v850_TRUE@$(v850_libsim_a_OBJECTS) $(v850_libsim_a_LIBADD): v850/hw-config.h
5476
5477 @SIM_ENABLE_ARCH_v850_TRUE@v850/%.o: v850/%.c
5478 @SIM_ENABLE_ARCH_v850_TRUE@     $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
5479
5480 @SIM_ENABLE_ARCH_v850_TRUE@v850/%.o: common/%.c
5481 @SIM_ENABLE_ARCH_v850_TRUE@     $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
5482 @SIM_ENABLE_ARCH_v850_TRUE@v850/modules.c: | $(v850_BUILD_OUTPUTS)
5483
5484 @SIM_ENABLE_ARCH_v850_TRUE@$(v850_BUILT_SRC_FROM_IGEN): v850/stamp-igen
5485 @SIM_ENABLE_ARCH_v850_TRUE@v850/stamp-igen: $(v850_IGEN_INSN) $(v850_IGEN_DC) $(IGEN)
5486 @SIM_ENABLE_ARCH_v850_TRUE@     $(AM_V_GEN)$(IGEN_RUN) \
5487 @SIM_ENABLE_ARCH_v850_TRUE@             $(v850_IGEN_TRACE) \
5488 @SIM_ENABLE_ARCH_v850_TRUE@             -G gen-direct-access \
5489 @SIM_ENABLE_ARCH_v850_TRUE@             -G gen-zero-r0 \
5490 @SIM_ENABLE_ARCH_v850_TRUE@             -i $(v850_IGEN_INSN) \
5491 @SIM_ENABLE_ARCH_v850_TRUE@             -o $(v850_IGEN_DC) \
5492 @SIM_ENABLE_ARCH_v850_TRUE@             -x \
5493 @SIM_ENABLE_ARCH_v850_TRUE@             -n icache.h    -hc v850/icache.h \
5494 @SIM_ENABLE_ARCH_v850_TRUE@             -n icache.c    -c  v850/icache.c \
5495 @SIM_ENABLE_ARCH_v850_TRUE@             -n semantics.h -hs v850/semantics.h \
5496 @SIM_ENABLE_ARCH_v850_TRUE@             -n semantics.c -s  v850/semantics.c \
5497 @SIM_ENABLE_ARCH_v850_TRUE@             -n idecode.h   -hd v850/idecode.h \
5498 @SIM_ENABLE_ARCH_v850_TRUE@             -n idecode.c   -d  v850/idecode.c \
5499 @SIM_ENABLE_ARCH_v850_TRUE@             -n model.h     -hm v850/model.h \
5500 @SIM_ENABLE_ARCH_v850_TRUE@             -n model.c     -m  v850/model.c \
5501 @SIM_ENABLE_ARCH_v850_TRUE@             -n support.h   -hf v850/support.h \
5502 @SIM_ENABLE_ARCH_v850_TRUE@             -n support.c   -f  v850/support.c \
5503 @SIM_ENABLE_ARCH_v850_TRUE@             -n itable.h    -ht v850/itable.h \
5504 @SIM_ENABLE_ARCH_v850_TRUE@             -n itable.c    -t  v850/itable.c \
5505 @SIM_ENABLE_ARCH_v850_TRUE@             -n engine.h    -he v850/engine.h \
5506 @SIM_ENABLE_ARCH_v850_TRUE@             -n engine.c    -e  v850/engine.c \
5507 @SIM_ENABLE_ARCH_v850_TRUE@             -n irun.c      -r  v850/irun.c
5508 @SIM_ENABLE_ARCH_v850_TRUE@     $(AM_V_at)touch $@
5509
5510 all-recursive: $(SIM_ALL_RECURSIVE_DEPS)
5511
5512 install-data-local: installdirs $(SIM_INSTALL_DATA_LOCAL_DEPS)
5513         $(AM_V_at)$(MKDIR_P) $(DESTDIR)$(libdir)
5514         lib=`echo sim | sed '$(program_transform_name)'`; \
5515         for d in $(SIM_ENABLED_ARCHES); do \
5516                 n="$$lib"; \
5517                 [ "$(SIM_PRIMARY_TARGET)" = "$$d" ] || n="$$n-$$d"; \
5518                 n="lib$$n.a"; \
5519                 $(INSTALL_DATA) $$d/libsim.a $(DESTDIR)$(libdir)/$$n || exit 1; \
5520         done
5521
5522 install-exec-local: installdirs $(SIM_INSTALL_EXEC_LOCAL_DEPS)
5523         $(AM_V_at)$(MKDIR_P) $(DESTDIR)$(bindir)
5524         run=`echo run | sed '$(program_transform_name)'`; \
5525         for d in $(SIM_ENABLED_ARCHES); do \
5526                 n="$$run"; \
5527                 [ "$(SIM_PRIMARY_TARGET)" = "$$d" ] || n="$$n-$$d"; \
5528                 $(LIBTOOL) --mode=install \
5529                         $(INSTALL_PROGRAM) $$d/run$(EXEEXT) $(DESTDIR)$(bindir)/$$n$(EXEEXT) || exit 1; \
5530         done
5531
5532 uninstall-local: $(SIM_UNINSTALL_LOCAL_DEPS)
5533         rm -f $(DESTDIR)$(bindir)/run $(DESTDIR)$(libdir)/libsim.a
5534         for d in $(SIM_ENABLED_ARCHES); do \
5535                 rm -f $(DESTDIR)$(bindir)/run-$$d $(DESTDIR)$(libdir)/libsim-$$d.a; \
5536         done
5537
5538 # Tell versions [3.59,3.63) of GNU make to not export all variables.
5539 # Otherwise a system limit (for SysV at least) may be exceeded.
5540 .NOEXPORT: