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sim: moxie: move arch-specific file compilation to top-level
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1 # Makefile.in generated by automake 1.15.1 from Makefile.am.
2 # @configure_input@
3
4 # Copyright (C) 1994-2017 Free Software Foundation, Inc.
5
6 # This Makefile.in is free software; the Free Software Foundation
7 # gives unlimited permission to copy and/or distribute it,
8 # with or without modifications, as long as this notice is preserved.
9
10 # This program is distributed in the hope that it will be useful,
11 # but WITHOUT ANY WARRANTY, to the extent permitted by law; without
12 # even the implied warranty of MERCHANTABILITY or FITNESS FOR A
13 # PARTICULAR PURPOSE.
14
15 @SET_MAKE@
16
17 # Copyright (C) 1993-2023 Free Software Foundation, Inc.
18 #
19 # This program is free software; you can redistribute it and/or modify
20 # it under the terms of the GNU General Public License as published by
21 # the Free Software Foundation; either version 3 of the License, or
22 # (at your option) any later version.
23 #
24 # This program is distributed in the hope that it will be useful,
25 # but WITHOUT ANY WARRANTY; without even the implied warranty of
26 # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
27 # GNU General Public License for more details.
28 #
29 # You should have received a copy of the GNU General Public License
30 # along with this program. If not, see <http://www.gnu.org/licenses/>.
31
32
33
34
35 VPATH = @srcdir@
36 am__is_gnu_make = { \
37 if test -z '$(MAKELEVEL)'; then \
38 false; \
39 elif test -n '$(MAKE_HOST)'; then \
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41 elif test -n '$(MAKE_VERSION)' && test -n '$(CURDIR)'; then \
42 true; \
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44 false; \
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47 am__make_running_with_option = \
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54 has_opt=no; \
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89 am__make_dryrun = (target_option=n; $(am__make_running_with_option))
90 am__make_keepgoing = (target_option=k; $(am__make_running_with_option))
91 pkgdatadir = $(datadir)/@PACKAGE@
92 pkgincludedir = $(includedir)/@PACKAGE@
93 pkglibdir = $(libdir)/@PACKAGE@
94 pkglibexecdir = $(libexecdir)/@PACKAGE@
95 am__cd = CDPATH="$${ZSH_VERSION+.}$(PATH_SEPARATOR)" && cd
96 install_sh_DATA = $(install_sh) -c -m 644
97 install_sh_PROGRAM = $(install_sh) -c
98 install_sh_SCRIPT = $(install_sh) -c
99 INSTALL_HEADER = $(INSTALL_DATA)
100 transform = $(program_transform_name)
101 NORMAL_INSTALL = :
102 PRE_INSTALL = :
103 POST_INSTALL = :
104 NORMAL_UNINSTALL = :
105 PRE_UNINSTALL = :
106 POST_UNINSTALL = :
107 build_triplet = @build@
108 host_triplet = @host@
109 target_triplet = @target@
110 check_PROGRAMS = $(am__EXEEXT_8) $(am__EXEEXT_9)
111 noinst_PROGRAMS = $(am__EXEEXT_10) $(am__EXEEXT_11) $(am__EXEEXT_12) \
112 $(am__EXEEXT_13) $(am__EXEEXT_14) $(am__EXEEXT_15) \
113 $(am__EXEEXT_16) $(am__EXEEXT_17) $(am__EXEEXT_18) \
114 $(am__EXEEXT_19) $(am__EXEEXT_20) $(am__EXEEXT_21) \
115 $(am__EXEEXT_22) $(am__EXEEXT_23) $(am__EXEEXT_24) \
116 $(am__EXEEXT_25) $(am__EXEEXT_26) $(am__EXEEXT_27) \
117 $(am__EXEEXT_28) $(am__EXEEXT_29) $(am__EXEEXT_30) \
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123 testsuite/common/fpu-tst$(EXEEXT) $(am__EXEEXT_3) \
124 $(am__EXEEXT_4) $(am__EXEEXT_5) $(am__EXEEXT_6) \
125 $(am__EXEEXT_7)
126 @ENABLE_SIM_TRUE@am__append_1 = \
127 @ENABLE_SIM_TRUE@ $(srcroot)/include/sim/callback.h \
128 @ENABLE_SIM_TRUE@ $(srcroot)/include/sim/sim.h
129
130 @SIM_ENABLE_HW_TRUE@am__append_2 = \
131 @SIM_ENABLE_HW_TRUE@ $(SIM_COMMON_HW_OBJS) \
132 @SIM_ENABLE_HW_TRUE@ $(SIM_HW_SOCKSER)
133
134 @SIM_ENABLE_HW_TRUE@am__append_3 = SIM_HW_DEVICES_="$(SIM_HW_DEVICES)"
135 @SIM_ENABLE_IGEN_TRUE@am__append_4 = $(IGEN)
136 @SIM_ENABLE_IGEN_TRUE@am__append_5 = igen/libigen.a
137 @SIM_ENABLE_IGEN_TRUE@am__append_6 = $(igen_IGEN_TOOLS)
138 @SIM_ENABLE_IGEN_TRUE@am__append_7 = $(igen_IGEN_TOOLS)
139 TESTS = testsuite/common/bits32m0$(EXEEXT) \
140 testsuite/common/bits32m31$(EXEEXT) \
141 testsuite/common/bits64m0$(EXEEXT) \
142 testsuite/common/bits64m63$(EXEEXT) \
143 testsuite/common/alu-tst$(EXEEXT)
144 @SIM_ENABLE_ARCH_aarch64_TRUE@am__append_8 = aarch64/libsim.a
145 @SIM_ENABLE_ARCH_aarch64_TRUE@am__append_9 = aarch64/run
146 @SIM_ENABLE_ARCH_arm_TRUE@am__append_10 = arm/libsim.a
147 @SIM_ENABLE_ARCH_arm_TRUE@am__append_11 = arm/run
148 @SIM_ENABLE_ARCH_avr_TRUE@am__append_12 = avr/libsim.a
149 @SIM_ENABLE_ARCH_avr_TRUE@am__append_13 = avr/run
150 @SIM_ENABLE_ARCH_bfin_TRUE@am__append_14 = bfin/libsim.a
151 @SIM_ENABLE_ARCH_bfin_TRUE@am__append_15 = bfin/run
152 @SIM_ENABLE_ARCH_bfin_TRUE@am__append_16 = bfin_SIM_EXTRA_HW_DEVICES="$(bfin_SIM_EXTRA_HW_DEVICES)"
153 @SIM_ENABLE_ARCH_bpf_TRUE@am__append_17 = bpf/libsim.a
154 @SIM_ENABLE_ARCH_bpf_TRUE@am__append_18 = bpf/run
155 @SIM_ENABLE_ARCH_bpf_TRUE@am__append_19 = \
156 @SIM_ENABLE_ARCH_bpf_TRUE@ bpf/eng-le.h \
157 @SIM_ENABLE_ARCH_bpf_TRUE@ bpf/eng-be.h
158
159 @SIM_ENABLE_ARCH_bpf_TRUE@am__append_20 = $(bpf_BUILD_OUTPUTS)
160 @SIM_ENABLE_ARCH_bpf_TRUE@am__append_21 = $(bpf_BUILD_OUTPUTS)
161 @SIM_ENABLE_ARCH_cr16_TRUE@am__append_22 = cr16/libsim.a
162 @SIM_ENABLE_ARCH_cr16_TRUE@am__append_23 = cr16/run
163 @SIM_ENABLE_ARCH_cr16_TRUE@am__append_24 = cr16/simops.h
164 @SIM_ENABLE_ARCH_cr16_TRUE@am__append_25 = $(cr16_BUILD_OUTPUTS)
165 @SIM_ENABLE_ARCH_cr16_TRUE@am__append_26 = cr16/gencode
166 @SIM_ENABLE_ARCH_cr16_TRUE@am__append_27 = $(cr16_BUILD_OUTPUTS)
167 @SIM_ENABLE_ARCH_cris_TRUE@am__append_28 = cris/libsim.a
168 @SIM_ENABLE_ARCH_cris_TRUE@am__append_29 = cris/run
169 @SIM_ENABLE_ARCH_cris_TRUE@am__append_30 = cris_SIM_EXTRA_HW_DEVICES="$(cris_SIM_EXTRA_HW_DEVICES)"
170 @SIM_ENABLE_ARCH_cris_TRUE@am__append_31 = cris/rvdummy
171 @SIM_ENABLE_ARCH_cris_TRUE@am__append_32 = \
172 @SIM_ENABLE_ARCH_cris_TRUE@ cris/engv10.h \
173 @SIM_ENABLE_ARCH_cris_TRUE@ cris/engv32.h
174
175 @SIM_ENABLE_ARCH_cris_TRUE@am__append_33 = $(cris_BUILD_OUTPUTS)
176 @SIM_ENABLE_ARCH_cris_TRUE@am__append_34 = $(cris_BUILD_OUTPUTS)
177 @SIM_ENABLE_ARCH_d10v_TRUE@am__append_35 = d10v/libsim.a
178 @SIM_ENABLE_ARCH_d10v_TRUE@am__append_36 = d10v/run
179 @SIM_ENABLE_ARCH_d10v_TRUE@am__append_37 = d10v/simops.h
180 @SIM_ENABLE_ARCH_d10v_TRUE@am__append_38 = $(d10v_BUILD_OUTPUTS)
181 @SIM_ENABLE_ARCH_d10v_TRUE@am__append_39 = d10v/gencode
182 @SIM_ENABLE_ARCH_d10v_TRUE@am__append_40 = $(d10v_BUILD_OUTPUTS)
183 @SIM_ENABLE_ARCH_erc32_TRUE@am__append_41 = erc32/libsim.a
184 @SIM_ENABLE_ARCH_erc32_TRUE@am__append_42 = erc32/run erc32/sis
185 @SIM_ENABLE_ARCH_erc32_TRUE@am__append_43 = sim-%D-install-exec-local
186 @SIM_ENABLE_ARCH_erc32_TRUE@am__append_44 = sim-erc32-uninstall-local
187 @SIM_ENABLE_ARCH_examples_TRUE@am__append_45 = example-synacor/libsim.a
188 @SIM_ENABLE_ARCH_examples_TRUE@am__append_46 = example-synacor/run
189 @SIM_ENABLE_ARCH_frv_TRUE@am__append_47 = frv/libsim.a
190 @SIM_ENABLE_ARCH_frv_TRUE@am__append_48 = frv/run
191 @SIM_ENABLE_ARCH_frv_TRUE@am__append_49 = frv/eng.h
192 @SIM_ENABLE_ARCH_frv_TRUE@am__append_50 = $(frv_BUILD_OUTPUTS)
193 @SIM_ENABLE_ARCH_frv_TRUE@am__append_51 = $(frv_BUILD_OUTPUTS)
194 @SIM_ENABLE_ARCH_ft32_TRUE@am__append_52 = ft32/libsim.a
195 @SIM_ENABLE_ARCH_ft32_TRUE@am__append_53 = ft32/run
196 @SIM_ENABLE_ARCH_h8300_TRUE@am__append_54 = h8300/libsim.a
197 @SIM_ENABLE_ARCH_h8300_TRUE@am__append_55 = h8300/run
198 @SIM_ENABLE_ARCH_iq2000_TRUE@am__append_56 = iq2000/libsim.a
199 @SIM_ENABLE_ARCH_iq2000_TRUE@am__append_57 = iq2000/run
200 @SIM_ENABLE_ARCH_iq2000_TRUE@am__append_58 = iq2000/eng.h
201 @SIM_ENABLE_ARCH_iq2000_TRUE@am__append_59 = $(iq2000_BUILD_OUTPUTS)
202 @SIM_ENABLE_ARCH_iq2000_TRUE@am__append_60 = $(iq2000_BUILD_OUTPUTS)
203 @SIM_ENABLE_ARCH_lm32_TRUE@am__append_61 = lm32/libsim.a
204 @SIM_ENABLE_ARCH_lm32_TRUE@am__append_62 = lm32/run
205 @SIM_ENABLE_ARCH_lm32_TRUE@am__append_63 = lm32_SIM_EXTRA_HW_DEVICES="$(lm32_SIM_EXTRA_HW_DEVICES)"
206 @SIM_ENABLE_ARCH_lm32_TRUE@am__append_64 = lm32/eng.h
207 @SIM_ENABLE_ARCH_lm32_TRUE@am__append_65 = $(lm32_BUILD_OUTPUTS)
208 @SIM_ENABLE_ARCH_lm32_TRUE@am__append_66 = $(lm32_BUILD_OUTPUTS)
209 @SIM_ENABLE_ARCH_m32c_TRUE@am__append_67 = m32c/libsim.a
210 @SIM_ENABLE_ARCH_m32c_TRUE@am__append_68 = m32c/run
211 @SIM_ENABLE_ARCH_m32c_TRUE@am__append_69 = $(m32c_BUILD_OUTPUTS)
212 @SIM_ENABLE_ARCH_m32c_TRUE@am__append_70 = m32c/opc2c
213 @SIM_ENABLE_ARCH_m32c_TRUE@am__append_71 = \
214 @SIM_ENABLE_ARCH_m32c_TRUE@ $(m32c_BUILD_OUTPUTS) \
215 @SIM_ENABLE_ARCH_m32c_TRUE@ m32c/m32c.c.log \
216 @SIM_ENABLE_ARCH_m32c_TRUE@ m32c/r8c.c.log
217
218 @SIM_ENABLE_ARCH_m32r_TRUE@am__append_72 = m32r/libsim.a
219 @SIM_ENABLE_ARCH_m32r_TRUE@am__append_73 = m32r/run
220 @SIM_ENABLE_ARCH_m32r_TRUE@am__append_74 = m32r_SIM_EXTRA_HW_DEVICES="$(m32r_SIM_EXTRA_HW_DEVICES)"
221 @SIM_ENABLE_ARCH_m32r_TRUE@am__append_75 = \
222 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r/eng.h \
223 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r/engx.h \
224 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r/eng2.h
225
226 @SIM_ENABLE_ARCH_m32r_TRUE@am__append_76 = $(m32r_BUILD_OUTPUTS)
227 @SIM_ENABLE_ARCH_m32r_TRUE@am__append_77 = $(m32r_BUILD_OUTPUTS)
228 @SIM_ENABLE_ARCH_m68hc11_TRUE@am__append_78 = m68hc11/libsim.a
229 @SIM_ENABLE_ARCH_m68hc11_TRUE@am__append_79 = m68hc11/run
230 @SIM_ENABLE_ARCH_m68hc11_TRUE@am__append_80 = m68hc11_SIM_EXTRA_HW_DEVICES="$(m68hc11_SIM_EXTRA_HW_DEVICES)"
231 @SIM_ENABLE_ARCH_m68hc11_TRUE@am__append_81 = $(m68hc11_BUILD_OUTPUTS)
232 @SIM_ENABLE_ARCH_m68hc11_TRUE@am__append_82 = m68hc11/gencode
233 @SIM_ENABLE_ARCH_m68hc11_TRUE@am__append_83 = $(m68hc11_BUILD_OUTPUTS)
234 @SIM_ENABLE_ARCH_mcore_TRUE@am__append_84 = mcore/libsim.a
235 @SIM_ENABLE_ARCH_mcore_TRUE@am__append_85 = mcore/run
236 @SIM_ENABLE_ARCH_microblaze_TRUE@am__append_86 = microblaze/libsim.a
237 @SIM_ENABLE_ARCH_microblaze_TRUE@am__append_87 = microblaze/run
238 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_SINGLE_TRUE@am__append_88 = \
239 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_SINGLE_TRUE@ mips/support.o \
240 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_SINGLE_TRUE@ mips/itable.o \
241 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_SINGLE_TRUE@ mips/semantics.o \
242 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_SINGLE_TRUE@ mips/idecode.o \
243 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_SINGLE_TRUE@ mips/icache.o \
244 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_SINGLE_TRUE@ mips/engine.o \
245 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_SINGLE_TRUE@ mips/irun.o
246
247 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@am__append_89 = \
248 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@ mips/m16_support.o \
249 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@ mips/m16_semantics.o \
250 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@ mips/m16_idecode.o \
251 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@ mips/m16_icache.o \
252 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@ \
253 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@ mips/m32_support.o \
254 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@ mips/m32_semantics.o \
255 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@ mips/m32_idecode.o \
256 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@ mips/m32_icache.o \
257 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@ \
258 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@ mips/itable.o \
259 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@ mips/m16run.o
260
261 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_MULTI_TRUE@am__append_90 = \
262 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_MULTI_TRUE@ $(SIM_MIPS_MULTI_OBJ) \
263 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_MULTI_TRUE@ mips/itable.o \
264 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_MULTI_TRUE@ mips/multi-run.o
265
266 @SIM_ENABLE_ARCH_mips_TRUE@am__append_91 = mips/libsim.a
267 @SIM_ENABLE_ARCH_mips_TRUE@am__append_92 = mips/run
268 @SIM_ENABLE_ARCH_mips_TRUE@am__append_93 = mips_SIM_EXTRA_HW_DEVICES="$(mips_SIM_EXTRA_HW_DEVICES)"
269 @SIM_ENABLE_ARCH_mips_TRUE@am__append_94 = mips/itable.h \
270 @SIM_ENABLE_ARCH_mips_TRUE@ $(SIM_MIPS_MULTI_SRC)
271 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_SINGLE_TRUE@am__append_95 = \
272 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_SINGLE_TRUE@ $(mips_BUILT_SRC_FROM_GEN_MODE_SINGLE) \
273 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_SINGLE_TRUE@ mips/stamp-gen-mode-single
274
275 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@am__append_96 = \
276 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@ $(mips_BUILT_SRC_FROM_GEN_MODE_M16_M16) \
277 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@ $(mips_BUILT_SRC_FROM_GEN_MODE_M16_M32) \
278 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@ mips/stamp-gen-mode-m16-m16 \
279 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@ mips/stamp-gen-mode-m16-m32
280
281 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_MULTI_TRUE@am__append_97 = \
282 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_MULTI_TRUE@ $(SIM_MIPS_MULTI_SRC) \
283 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_MULTI_TRUE@ mips/stamp-gen-mode-multi-igen \
284 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_MULTI_TRUE@ mips/stamp-gen-mode-multi-run
285
286 @SIM_ENABLE_ARCH_mips_TRUE@am__append_98 = $(mips_BUILD_OUTPUTS)
287 @SIM_ENABLE_ARCH_mips_TRUE@am__append_99 = $(mips_BUILD_OUTPUTS)
288 @SIM_ENABLE_ARCH_mips_TRUE@am__append_100 = mips/multi-include.h mips/multi-run.c
289 @SIM_ENABLE_ARCH_mn10300_TRUE@am__append_101 = mn10300/libsim.a
290 @SIM_ENABLE_ARCH_mn10300_TRUE@am__append_102 = mn10300/run
291 @SIM_ENABLE_ARCH_mn10300_TRUE@am__append_103 = mn10300_SIM_EXTRA_HW_DEVICES="$(mn10300_SIM_EXTRA_HW_DEVICES)"
292 @SIM_ENABLE_ARCH_mn10300_TRUE@am__append_104 = \
293 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/icache.h \
294 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/idecode.h \
295 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/semantics.h \
296 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/model.h \
297 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/support.h \
298 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/itable.h \
299 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/engine.h
300
301 @SIM_ENABLE_ARCH_mn10300_TRUE@am__append_105 = $(mn10300_BUILD_OUTPUTS)
302 @SIM_ENABLE_ARCH_mn10300_TRUE@am__append_106 = $(mn10300_BUILD_OUTPUTS)
303 @SIM_ENABLE_ARCH_moxie_TRUE@am__append_107 = moxie/libsim.a
304 @SIM_ENABLE_ARCH_moxie_TRUE@am__append_108 = moxie/run
305 @SIM_ENABLE_ARCH_msp430_TRUE@am__append_109 = msp430/libsim.a
306 @SIM_ENABLE_ARCH_msp430_TRUE@am__append_110 = msp430/run
307 @SIM_ENABLE_ARCH_or1k_TRUE@am__append_111 = or1k/libsim.a
308 @SIM_ENABLE_ARCH_or1k_TRUE@am__append_112 = or1k/run
309 @SIM_ENABLE_ARCH_or1k_TRUE@am__append_113 = or1k/eng.h
310 @SIM_ENABLE_ARCH_or1k_TRUE@am__append_114 = $(or1k_BUILD_OUTPUTS)
311 @SIM_ENABLE_ARCH_or1k_TRUE@am__append_115 = $(or1k_BUILD_OUTPUTS)
312 @SIM_ENABLE_ARCH_ppc_TRUE@am__append_116 = ppc/run ppc/psim
313 @SIM_ENABLE_ARCH_pru_TRUE@am__append_117 = pru/libsim.a
314 @SIM_ENABLE_ARCH_pru_TRUE@am__append_118 = pru/run
315 @SIM_ENABLE_ARCH_riscv_TRUE@am__append_119 = riscv/libsim.a
316 @SIM_ENABLE_ARCH_riscv_TRUE@am__append_120 = riscv/run
317 @SIM_ENABLE_ARCH_rl78_TRUE@am__append_121 = rl78/libsim.a
318 @SIM_ENABLE_ARCH_rl78_TRUE@am__append_122 = rl78/run
319 @SIM_ENABLE_ARCH_rx_TRUE@am__append_123 = rx/libsim.a
320 @SIM_ENABLE_ARCH_rx_TRUE@am__append_124 = rx/run
321 @SIM_ENABLE_ARCH_sh_TRUE@am__append_125 = sh/libsim.a
322 @SIM_ENABLE_ARCH_sh_TRUE@am__append_126 = sh/run
323 @SIM_ENABLE_ARCH_sh_TRUE@am__append_127 = \
324 @SIM_ENABLE_ARCH_sh_TRUE@ sh/code.c \
325 @SIM_ENABLE_ARCH_sh_TRUE@ sh/ppi.c
326
327 @SIM_ENABLE_ARCH_sh_TRUE@am__append_128 = $(sh_BUILD_OUTPUTS)
328 @SIM_ENABLE_ARCH_sh_TRUE@am__append_129 = sh/gencode
329 @SIM_ENABLE_ARCH_sh_TRUE@am__append_130 = $(sh_BUILD_OUTPUTS)
330 @SIM_ENABLE_ARCH_v850_TRUE@am__append_131 = v850/libsim.a
331 @SIM_ENABLE_ARCH_v850_TRUE@am__append_132 = v850/run
332 @SIM_ENABLE_ARCH_v850_TRUE@am__append_133 = \
333 @SIM_ENABLE_ARCH_v850_TRUE@ v850/icache.h \
334 @SIM_ENABLE_ARCH_v850_TRUE@ v850/idecode.h \
335 @SIM_ENABLE_ARCH_v850_TRUE@ v850/semantics.h \
336 @SIM_ENABLE_ARCH_v850_TRUE@ v850/model.h \
337 @SIM_ENABLE_ARCH_v850_TRUE@ v850/support.h \
338 @SIM_ENABLE_ARCH_v850_TRUE@ v850/itable.h \
339 @SIM_ENABLE_ARCH_v850_TRUE@ v850/engine.h
340
341 @SIM_ENABLE_ARCH_v850_TRUE@am__append_134 = $(v850_BUILD_OUTPUTS)
342 @SIM_ENABLE_ARCH_v850_TRUE@am__append_135 = $(v850_BUILD_OUTPUTS)
343 subdir = .
344 ACLOCAL_M4 = $(top_srcdir)/aclocal.m4
345 am__aclocal_m4_deps = $(top_srcdir)/../config/acx.m4 \
346 $(top_srcdir)/../config/depstand.m4 \
347 $(top_srcdir)/../config/lead-dot.m4 \
348 $(top_srcdir)/../config/override.m4 \
349 $(top_srcdir)/../config/pkg.m4 $(top_srcdir)/../libtool.m4 \
350 $(top_srcdir)/../ltoptions.m4 $(top_srcdir)/../ltsugar.m4 \
351 $(top_srcdir)/../ltversion.m4 $(top_srcdir)/../lt~obsolete.m4 \
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385 d10v/.gdbinit frv/Makefile.sim frv/.gdbinit ft32/Makefile.sim \
386 ft32/.gdbinit h8300/Makefile.sim h8300/.gdbinit \
387 iq2000/Makefile.sim iq2000/.gdbinit lm32/Makefile.sim \
388 lm32/.gdbinit m32c/Makefile.sim m32c/.gdbinit \
389 m32r/Makefile.sim m32r/.gdbinit m68hc11/Makefile.sim \
390 m68hc11/.gdbinit mcore/Makefile.sim mcore/.gdbinit \
391 microblaze/Makefile.sim microblaze/.gdbinit mips/Makefile.sim \
392 mips/.gdbinit mn10300/Makefile.sim mn10300/.gdbinit \
393 moxie/Makefile.sim moxie/.gdbinit msp430/Makefile.sim \
394 msp430/.gdbinit or1k/Makefile.sim or1k/.gdbinit ppc/.gdbinit \
395 pru/Makefile.sim pru/.gdbinit riscv/Makefile.sim \
396 riscv/.gdbinit rl78/Makefile.sim rl78/.gdbinit rx/Makefile.sim \
397 rx/.gdbinit sh/Makefile.sim sh/.gdbinit erc32/Makefile.sim \
398 erc32/.gdbinit v850/Makefile.sim v850/.gdbinit \
399 example-synacor/Makefile.sim example-synacor/.gdbinit \
400 arch-subdir.mk .gdbinit
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402 LIBRARIES = $(noinst_LIBRARIES)
403 ARFLAGS = cru
404 AM_V_AR = $(am__v_AR_@AM_V@)
405 am__v_AR_ = $(am__v_AR_@AM_DEFAULT_V@)
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416 @SIM_ENABLE_ARCH_aarch64_TRUE@ aarch64/memory.o \
417 @SIM_ENABLE_ARCH_aarch64_TRUE@ aarch64/modules.o \
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513 @SIM_ENABLE_ARCH_cris_TRUE@ cris/decodev32.o cris/modelv32.o \
514 @SIM_ENABLE_ARCH_cris_TRUE@ cris/mloopv32f.o cris/sim-if.o \
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659 @SIM_ENABLE_ARCH_m32c_TRUE@ m32c/r8c.o m32c/reg.o \
660 @SIM_ENABLE_ARCH_m32c_TRUE@ m32c/srcdest.o m32c/syscalls.o \
661 @SIM_ENABLE_ARCH_m32c_TRUE@ m32c/trace.o
662 am_m32c_libsim_a_OBJECTS =
663 m32c_libsim_a_OBJECTS = $(am_m32c_libsim_a_OBJECTS)
664 m32r_libsim_a_AR = $(AR) $(ARFLAGS)
665 @SIM_ENABLE_ARCH_m32r_TRUE@m32r_libsim_a_DEPENDENCIES = \
666 @SIM_ENABLE_ARCH_m32r_TRUE@ $(common_libcommon_a_OBJECTS) \
667 @SIM_ENABLE_ARCH_m32r_TRUE@ $(patsubst \
668 @SIM_ENABLE_ARCH_m32r_TRUE@ %,m32r/%,$(SIM_NEW_COMMON_OBJS)) \
669 @SIM_ENABLE_ARCH_m32r_TRUE@ $(patsubst \
670 @SIM_ENABLE_ARCH_m32r_TRUE@ %,m32r/dv-%.o,$(SIM_HW_DEVICES)) \
671 @SIM_ENABLE_ARCH_m32r_TRUE@ $(patsubst \
672 @SIM_ENABLE_ARCH_m32r_TRUE@ %,m32r/dv-%.o,$(m32r_SIM_EXTRA_HW_DEVICES)) \
673 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r/modules.o m32r/cgen-run.o \
674 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r/cgen-scache.o \
675 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r/cgen-trace.o m32r/cgen-utils.o \
676 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r/arch.o m32r/m32r.o m32r/cpu.o \
677 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r/decode.o m32r/sem.o \
678 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r/model.o m32r/mloop.o \
679 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r/m32rx.o m32r/cpux.o \
680 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r/decodex.o m32r/modelx.o \
681 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r/mloopx.o m32r/m32r2.o \
682 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r/cpu2.o m32r/decode2.o \
683 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r/model2.o m32r/mloop2.o \
684 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r/sim-if.o m32r/traps.o
685 am_m32r_libsim_a_OBJECTS =
686 m32r_libsim_a_OBJECTS = $(am_m32r_libsim_a_OBJECTS)
687 m68hc11_libsim_a_AR = $(AR) $(ARFLAGS)
688 @SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11_libsim_a_DEPENDENCIES = \
689 @SIM_ENABLE_ARCH_m68hc11_TRUE@ $(common_libcommon_a_OBJECTS) \
690 @SIM_ENABLE_ARCH_m68hc11_TRUE@ m68hc11/interp.o \
691 @SIM_ENABLE_ARCH_m68hc11_TRUE@ m68hc11/m68hc11int.o \
692 @SIM_ENABLE_ARCH_m68hc11_TRUE@ m68hc11/m68hc12int.o \
693 @SIM_ENABLE_ARCH_m68hc11_TRUE@ m68hc11/emulos.o \
694 @SIM_ENABLE_ARCH_m68hc11_TRUE@ m68hc11/interrupts.o \
695 @SIM_ENABLE_ARCH_m68hc11_TRUE@ m68hc11/m68hc11_sim.o $(patsubst \
696 @SIM_ENABLE_ARCH_m68hc11_TRUE@ %,m68hc11/%,$(SIM_NEW_COMMON_OBJS)) \
697 @SIM_ENABLE_ARCH_m68hc11_TRUE@ $(patsubst \
698 @SIM_ENABLE_ARCH_m68hc11_TRUE@ %,m68hc11/dv-%.o,$(SIM_HW_DEVICES)) \
699 @SIM_ENABLE_ARCH_m68hc11_TRUE@ $(patsubst \
700 @SIM_ENABLE_ARCH_m68hc11_TRUE@ %,m68hc11/dv-%.o,$(m68hc11_SIM_EXTRA_HW_DEVICES)) \
701 @SIM_ENABLE_ARCH_m68hc11_TRUE@ m68hc11/modules.o \
702 @SIM_ENABLE_ARCH_m68hc11_TRUE@ m68hc11/sim-resume.o
703 am_m68hc11_libsim_a_OBJECTS =
704 m68hc11_libsim_a_OBJECTS = $(am_m68hc11_libsim_a_OBJECTS)
705 mcore_libsim_a_AR = $(AR) $(ARFLAGS)
706 @SIM_ENABLE_ARCH_mcore_TRUE@mcore_libsim_a_DEPENDENCIES = \
707 @SIM_ENABLE_ARCH_mcore_TRUE@ $(common_libcommon_a_OBJECTS) \
708 @SIM_ENABLE_ARCH_mcore_TRUE@ mcore/interp.o $(patsubst \
709 @SIM_ENABLE_ARCH_mcore_TRUE@ %,mcore/%,$(SIM_NEW_COMMON_OBJS)) \
710 @SIM_ENABLE_ARCH_mcore_TRUE@ $(patsubst \
711 @SIM_ENABLE_ARCH_mcore_TRUE@ %,mcore/dv-%.o,$(SIM_HW_DEVICES)) \
712 @SIM_ENABLE_ARCH_mcore_TRUE@ mcore/modules.o mcore/sim-resume.o
713 am_mcore_libsim_a_OBJECTS =
714 mcore_libsim_a_OBJECTS = $(am_mcore_libsim_a_OBJECTS)
715 microblaze_libsim_a_AR = $(AR) $(ARFLAGS)
716 @SIM_ENABLE_ARCH_microblaze_TRUE@microblaze_libsim_a_DEPENDENCIES = $(common_libcommon_a_OBJECTS) \
717 @SIM_ENABLE_ARCH_microblaze_TRUE@ microblaze/interp.o \
718 @SIM_ENABLE_ARCH_microblaze_TRUE@ $(patsubst \
719 @SIM_ENABLE_ARCH_microblaze_TRUE@ %,microblaze/%,$(SIM_NEW_COMMON_OBJS)) \
720 @SIM_ENABLE_ARCH_microblaze_TRUE@ $(patsubst \
721 @SIM_ENABLE_ARCH_microblaze_TRUE@ %,microblaze/dv-%.o,$(SIM_HW_DEVICES)) \
722 @SIM_ENABLE_ARCH_microblaze_TRUE@ microblaze/modules.o \
723 @SIM_ENABLE_ARCH_microblaze_TRUE@ microblaze/sim-resume.o
724 am_microblaze_libsim_a_OBJECTS =
725 microblaze_libsim_a_OBJECTS = $(am_microblaze_libsim_a_OBJECTS)
726 mips_libsim_a_AR = $(AR) $(ARFLAGS)
727 am__DEPENDENCIES_1 =
728 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_MULTI_TRUE@am__DEPENDENCIES_2 = $(am__DEPENDENCIES_1) \
729 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_MULTI_TRUE@ mips/itable.o \
730 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_MULTI_TRUE@ mips/multi-run.o
731 @SIM_ENABLE_ARCH_mips_TRUE@am__DEPENDENCIES_3 = $(am__append_88) \
732 @SIM_ENABLE_ARCH_mips_TRUE@ $(am__append_89) \
733 @SIM_ENABLE_ARCH_mips_TRUE@ $(am__DEPENDENCIES_2)
734 @SIM_ENABLE_ARCH_mips_TRUE@mips_libsim_a_DEPENDENCIES = \
735 @SIM_ENABLE_ARCH_mips_TRUE@ $(common_libcommon_a_OBJECTS) \
736 @SIM_ENABLE_ARCH_mips_TRUE@ mips/interp.o $(am__DEPENDENCIES_3) \
737 @SIM_ENABLE_ARCH_mips_TRUE@ $(patsubst \
738 @SIM_ENABLE_ARCH_mips_TRUE@ %,mips/%,$(SIM_NEW_COMMON_OBJS)) \
739 @SIM_ENABLE_ARCH_mips_TRUE@ $(patsubst \
740 @SIM_ENABLE_ARCH_mips_TRUE@ %,mips/dv-%.o,$(SIM_HW_DEVICES)) \
741 @SIM_ENABLE_ARCH_mips_TRUE@ $(patsubst \
742 @SIM_ENABLE_ARCH_mips_TRUE@ %,mips/dv-%.o,$(mips_SIM_EXTRA_HW_DEVICES)) \
743 @SIM_ENABLE_ARCH_mips_TRUE@ mips/cp1.o mips/dsp.o mips/mdmx.o \
744 @SIM_ENABLE_ARCH_mips_TRUE@ mips/modules.o mips/sim-main.o \
745 @SIM_ENABLE_ARCH_mips_TRUE@ mips/sim-resume.o
746 am_mips_libsim_a_OBJECTS =
747 mips_libsim_a_OBJECTS = $(am_mips_libsim_a_OBJECTS)
748 mn10300_libsim_a_AR = $(AR) $(ARFLAGS)
749 @SIM_ENABLE_ARCH_mn10300_TRUE@mn10300_libsim_a_DEPENDENCIES = \
750 @SIM_ENABLE_ARCH_mn10300_TRUE@ $(common_libcommon_a_OBJECTS) \
751 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/itable.o \
752 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/semantics.o \
753 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/idecode.o \
754 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/icache.o \
755 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/engine.o mn10300/irun.o \
756 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/support.o $(patsubst \
757 @SIM_ENABLE_ARCH_mn10300_TRUE@ %,mn10300/%,$(SIM_NEW_COMMON_OBJS)) \
758 @SIM_ENABLE_ARCH_mn10300_TRUE@ $(patsubst \
759 @SIM_ENABLE_ARCH_mn10300_TRUE@ %,mn10300/dv-%.o,$(SIM_HW_DEVICES)) \
760 @SIM_ENABLE_ARCH_mn10300_TRUE@ $(patsubst \
761 @SIM_ENABLE_ARCH_mn10300_TRUE@ %,mn10300/dv-%.o,$(mn10300_SIM_EXTRA_HW_DEVICES)) \
762 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/interp.o \
763 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/modules.o \
764 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/op_utils.o \
765 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/sim-resume.o
766 am_mn10300_libsim_a_OBJECTS =
767 mn10300_libsim_a_OBJECTS = $(am_mn10300_libsim_a_OBJECTS)
768 moxie_libsim_a_AR = $(AR) $(ARFLAGS)
769 @SIM_ENABLE_ARCH_moxie_TRUE@moxie_libsim_a_DEPENDENCIES = \
770 @SIM_ENABLE_ARCH_moxie_TRUE@ $(common_libcommon_a_OBJECTS) \
771 @SIM_ENABLE_ARCH_moxie_TRUE@ $(patsubst \
772 @SIM_ENABLE_ARCH_moxie_TRUE@ %,moxie/%,$(SIM_NEW_COMMON_OBJS)) \
773 @SIM_ENABLE_ARCH_moxie_TRUE@ $(patsubst \
774 @SIM_ENABLE_ARCH_moxie_TRUE@ %,moxie/dv-%.o,$(SIM_HW_DEVICES)) \
775 @SIM_ENABLE_ARCH_moxie_TRUE@ moxie/interp.o moxie/modules.o \
776 @SIM_ENABLE_ARCH_moxie_TRUE@ moxie/sim-resume.o
777 am_moxie_libsim_a_OBJECTS =
778 moxie_libsim_a_OBJECTS = $(am_moxie_libsim_a_OBJECTS)
779 msp430_libsim_a_AR = $(AR) $(ARFLAGS)
780 @SIM_ENABLE_ARCH_msp430_TRUE@msp430_libsim_a_DEPENDENCIES = \
781 @SIM_ENABLE_ARCH_msp430_TRUE@ $(common_libcommon_a_OBJECTS) \
782 @SIM_ENABLE_ARCH_msp430_TRUE@ $(patsubst \
783 @SIM_ENABLE_ARCH_msp430_TRUE@ %,msp430/%,$(SIM_NEW_COMMON_OBJS)) \
784 @SIM_ENABLE_ARCH_msp430_TRUE@ $(patsubst \
785 @SIM_ENABLE_ARCH_msp430_TRUE@ %,msp430/dv-%.o,$(SIM_HW_DEVICES)) \
786 @SIM_ENABLE_ARCH_msp430_TRUE@ msp430/msp430-sim.o \
787 @SIM_ENABLE_ARCH_msp430_TRUE@ msp430/modules.o \
788 @SIM_ENABLE_ARCH_msp430_TRUE@ msp430/sim-resume.o
789 am_msp430_libsim_a_OBJECTS =
790 msp430_libsim_a_OBJECTS = $(am_msp430_libsim_a_OBJECTS)
791 or1k_libsim_a_AR = $(AR) $(ARFLAGS)
792 @SIM_ENABLE_ARCH_or1k_TRUE@or1k_libsim_a_DEPENDENCIES = \
793 @SIM_ENABLE_ARCH_or1k_TRUE@ $(common_libcommon_a_OBJECTS) \
794 @SIM_ENABLE_ARCH_or1k_TRUE@ $(patsubst \
795 @SIM_ENABLE_ARCH_or1k_TRUE@ %,or1k/%,$(SIM_NEW_COMMON_OBJS)) \
796 @SIM_ENABLE_ARCH_or1k_TRUE@ $(patsubst \
797 @SIM_ENABLE_ARCH_or1k_TRUE@ %,or1k/dv-%.o,$(SIM_HW_DEVICES)) \
798 @SIM_ENABLE_ARCH_or1k_TRUE@ or1k/modules.o or1k/cgen-accfp.o \
799 @SIM_ENABLE_ARCH_or1k_TRUE@ or1k/cgen-fpu.o or1k/cgen-run.o \
800 @SIM_ENABLE_ARCH_or1k_TRUE@ or1k/cgen-scache.o \
801 @SIM_ENABLE_ARCH_or1k_TRUE@ or1k/cgen-trace.o or1k/cgen-utils.o \
802 @SIM_ENABLE_ARCH_or1k_TRUE@ or1k/arch.o or1k/cpu.o \
803 @SIM_ENABLE_ARCH_or1k_TRUE@ or1k/decode.o or1k/mloop.o \
804 @SIM_ENABLE_ARCH_or1k_TRUE@ or1k/model.o or1k/sem.o or1k/or1k.o \
805 @SIM_ENABLE_ARCH_or1k_TRUE@ or1k/sim-if.o or1k/traps.o
806 am_or1k_libsim_a_OBJECTS =
807 or1k_libsim_a_OBJECTS = $(am_or1k_libsim_a_OBJECTS)
808 pru_libsim_a_AR = $(AR) $(ARFLAGS)
809 @SIM_ENABLE_ARCH_pru_TRUE@pru_libsim_a_DEPENDENCIES = \
810 @SIM_ENABLE_ARCH_pru_TRUE@ $(common_libcommon_a_OBJECTS) \
811 @SIM_ENABLE_ARCH_pru_TRUE@ $(patsubst \
812 @SIM_ENABLE_ARCH_pru_TRUE@ %,pru/%,$(SIM_NEW_COMMON_OBJS)) \
813 @SIM_ENABLE_ARCH_pru_TRUE@ $(patsubst \
814 @SIM_ENABLE_ARCH_pru_TRUE@ %,pru/dv-%.o,$(SIM_HW_DEVICES)) \
815 @SIM_ENABLE_ARCH_pru_TRUE@ pru/interp.o pru/modules.o \
816 @SIM_ENABLE_ARCH_pru_TRUE@ pru/sim-resume.o
817 am_pru_libsim_a_OBJECTS =
818 pru_libsim_a_OBJECTS = $(am_pru_libsim_a_OBJECTS)
819 riscv_libsim_a_AR = $(AR) $(ARFLAGS)
820 @SIM_ENABLE_ARCH_riscv_TRUE@riscv_libsim_a_DEPENDENCIES = \
821 @SIM_ENABLE_ARCH_riscv_TRUE@ $(common_libcommon_a_OBJECTS) \
822 @SIM_ENABLE_ARCH_riscv_TRUE@ $(patsubst \
823 @SIM_ENABLE_ARCH_riscv_TRUE@ %,riscv/%,$(SIM_NEW_COMMON_OBJS)) \
824 @SIM_ENABLE_ARCH_riscv_TRUE@ $(patsubst \
825 @SIM_ENABLE_ARCH_riscv_TRUE@ %,riscv/dv-%.o,$(SIM_HW_DEVICES)) \
826 @SIM_ENABLE_ARCH_riscv_TRUE@ riscv/interp.o riscv/machs.o \
827 @SIM_ENABLE_ARCH_riscv_TRUE@ riscv/modules.o riscv/sim-main.o \
828 @SIM_ENABLE_ARCH_riscv_TRUE@ riscv/sim-resume.o
829 am_riscv_libsim_a_OBJECTS =
830 riscv_libsim_a_OBJECTS = $(am_riscv_libsim_a_OBJECTS)
831 rl78_libsim_a_AR = $(AR) $(ARFLAGS)
832 @SIM_ENABLE_ARCH_rl78_TRUE@rl78_libsim_a_DEPENDENCIES = \
833 @SIM_ENABLE_ARCH_rl78_TRUE@ $(common_libcommon_a_OBJECTS) \
834 @SIM_ENABLE_ARCH_rl78_TRUE@ rl78/load.o rl78/mem.o rl78/cpu.o \
835 @SIM_ENABLE_ARCH_rl78_TRUE@ rl78/rl78.o rl78/gdb-if.o \
836 @SIM_ENABLE_ARCH_rl78_TRUE@ rl78/modules.o rl78/trace.o
837 am_rl78_libsim_a_OBJECTS =
838 rl78_libsim_a_OBJECTS = $(am_rl78_libsim_a_OBJECTS)
839 rx_libsim_a_AR = $(AR) $(ARFLAGS)
840 @SIM_ENABLE_ARCH_rx_TRUE@rx_libsim_a_DEPENDENCIES = \
841 @SIM_ENABLE_ARCH_rx_TRUE@ $(common_libcommon_a_OBJECTS) \
842 @SIM_ENABLE_ARCH_rx_TRUE@ rx/fpu.o rx/load.o rx/mem.o rx/misc.o \
843 @SIM_ENABLE_ARCH_rx_TRUE@ rx/reg.o rx/rx.o rx/syscalls.o \
844 @SIM_ENABLE_ARCH_rx_TRUE@ rx/trace.o rx/gdb-if.o rx/err.o \
845 @SIM_ENABLE_ARCH_rx_TRUE@ rx/modules.o
846 am_rx_libsim_a_OBJECTS =
847 rx_libsim_a_OBJECTS = $(am_rx_libsim_a_OBJECTS)
848 sh_libsim_a_AR = $(AR) $(ARFLAGS)
849 @SIM_ENABLE_ARCH_sh_TRUE@sh_libsim_a_DEPENDENCIES = \
850 @SIM_ENABLE_ARCH_sh_TRUE@ $(common_libcommon_a_OBJECTS) \
851 @SIM_ENABLE_ARCH_sh_TRUE@ sh/interp.o $(patsubst \
852 @SIM_ENABLE_ARCH_sh_TRUE@ %,sh/%,$(SIM_NEW_COMMON_OBJS)) \
853 @SIM_ENABLE_ARCH_sh_TRUE@ $(patsubst \
854 @SIM_ENABLE_ARCH_sh_TRUE@ %,sh/dv-%.o,$(SIM_HW_DEVICES)) \
855 @SIM_ENABLE_ARCH_sh_TRUE@ sh/modules.o sh/table.o
856 am_sh_libsim_a_OBJECTS =
857 sh_libsim_a_OBJECTS = $(am_sh_libsim_a_OBJECTS)
858 v850_libsim_a_AR = $(AR) $(ARFLAGS)
859 @SIM_ENABLE_ARCH_v850_TRUE@v850_libsim_a_DEPENDENCIES = \
860 @SIM_ENABLE_ARCH_v850_TRUE@ $(common_libcommon_a_OBJECTS) \
861 @SIM_ENABLE_ARCH_v850_TRUE@ $(patsubst \
862 @SIM_ENABLE_ARCH_v850_TRUE@ %,v850/%,$(SIM_NEW_COMMON_OBJS)) \
863 @SIM_ENABLE_ARCH_v850_TRUE@ $(patsubst \
864 @SIM_ENABLE_ARCH_v850_TRUE@ %,v850/dv-%.o,$(SIM_HW_DEVICES)) \
865 @SIM_ENABLE_ARCH_v850_TRUE@ v850/simops.o v850/interp.o \
866 @SIM_ENABLE_ARCH_v850_TRUE@ v850/itable.o v850/semantics.o \
867 @SIM_ENABLE_ARCH_v850_TRUE@ v850/idecode.o v850/icache.o \
868 @SIM_ENABLE_ARCH_v850_TRUE@ v850/engine.o v850/irun.o \
869 @SIM_ENABLE_ARCH_v850_TRUE@ v850/support.o v850/modules.o \
870 @SIM_ENABLE_ARCH_v850_TRUE@ v850/sim-resume.o
871 am_v850_libsim_a_OBJECTS =
872 v850_libsim_a_OBJECTS = $(am_v850_libsim_a_OBJECTS)
873 @SIM_ENABLE_IGEN_TRUE@am__EXEEXT_1 = $(IGEN) igen/filter$(EXEEXT) \
874 @SIM_ENABLE_IGEN_TRUE@ igen/gen$(EXEEXT) igen/ld-cache$(EXEEXT) \
875 @SIM_ENABLE_IGEN_TRUE@ igen/ld-decode$(EXEEXT) \
876 @SIM_ENABLE_IGEN_TRUE@ igen/ld-insn$(EXEEXT) \
877 @SIM_ENABLE_IGEN_TRUE@ igen/table$(EXEEXT)
878 @SIM_ENABLE_IGEN_TRUE@am__EXEEXT_2 = $(am__EXEEXT_1)
879 @SIM_ENABLE_ARCH_cr16_TRUE@am__EXEEXT_3 = cr16/gencode$(EXEEXT)
880 @SIM_ENABLE_ARCH_d10v_TRUE@am__EXEEXT_4 = d10v/gencode$(EXEEXT)
881 @SIM_ENABLE_ARCH_m32c_TRUE@am__EXEEXT_5 = m32c/opc2c$(EXEEXT)
882 @SIM_ENABLE_ARCH_m68hc11_TRUE@am__EXEEXT_6 = m68hc11/gencode$(EXEEXT)
883 @SIM_ENABLE_ARCH_sh_TRUE@am__EXEEXT_7 = sh/gencode$(EXEEXT)
884 am__EXEEXT_8 = testsuite/common/bits32m0$(EXEEXT) \
885 testsuite/common/bits32m31$(EXEEXT) \
886 testsuite/common/bits64m0$(EXEEXT) \
887 testsuite/common/bits64m63$(EXEEXT) \
888 testsuite/common/alu-tst$(EXEEXT)
889 @SIM_ENABLE_ARCH_cris_TRUE@am__EXEEXT_9 = cris/rvdummy$(EXEEXT)
890 @SIM_ENABLE_ARCH_aarch64_TRUE@am__EXEEXT_10 = aarch64/run$(EXEEXT)
891 @SIM_ENABLE_ARCH_arm_TRUE@am__EXEEXT_11 = arm/run$(EXEEXT)
892 @SIM_ENABLE_ARCH_avr_TRUE@am__EXEEXT_12 = avr/run$(EXEEXT)
893 @SIM_ENABLE_ARCH_bfin_TRUE@am__EXEEXT_13 = bfin/run$(EXEEXT)
894 @SIM_ENABLE_ARCH_bpf_TRUE@am__EXEEXT_14 = bpf/run$(EXEEXT)
895 @SIM_ENABLE_ARCH_cr16_TRUE@am__EXEEXT_15 = cr16/run$(EXEEXT)
896 @SIM_ENABLE_ARCH_cris_TRUE@am__EXEEXT_16 = cris/run$(EXEEXT)
897 @SIM_ENABLE_ARCH_d10v_TRUE@am__EXEEXT_17 = d10v/run$(EXEEXT)
898 @SIM_ENABLE_ARCH_erc32_TRUE@am__EXEEXT_18 = erc32/run$(EXEEXT) \
899 @SIM_ENABLE_ARCH_erc32_TRUE@ erc32/sis$(EXEEXT)
900 @SIM_ENABLE_ARCH_examples_TRUE@am__EXEEXT_19 = \
901 @SIM_ENABLE_ARCH_examples_TRUE@ example-synacor/run$(EXEEXT)
902 @SIM_ENABLE_ARCH_frv_TRUE@am__EXEEXT_20 = frv/run$(EXEEXT)
903 @SIM_ENABLE_ARCH_ft32_TRUE@am__EXEEXT_21 = ft32/run$(EXEEXT)
904 @SIM_ENABLE_ARCH_h8300_TRUE@am__EXEEXT_22 = h8300/run$(EXEEXT)
905 @SIM_ENABLE_ARCH_iq2000_TRUE@am__EXEEXT_23 = iq2000/run$(EXEEXT)
906 @SIM_ENABLE_ARCH_lm32_TRUE@am__EXEEXT_24 = lm32/run$(EXEEXT)
907 @SIM_ENABLE_ARCH_m32c_TRUE@am__EXEEXT_25 = m32c/run$(EXEEXT)
908 @SIM_ENABLE_ARCH_m32r_TRUE@am__EXEEXT_26 = m32r/run$(EXEEXT)
909 @SIM_ENABLE_ARCH_m68hc11_TRUE@am__EXEEXT_27 = m68hc11/run$(EXEEXT)
910 @SIM_ENABLE_ARCH_mcore_TRUE@am__EXEEXT_28 = mcore/run$(EXEEXT)
911 @SIM_ENABLE_ARCH_microblaze_TRUE@am__EXEEXT_29 = \
912 @SIM_ENABLE_ARCH_microblaze_TRUE@ microblaze/run$(EXEEXT)
913 @SIM_ENABLE_ARCH_mips_TRUE@am__EXEEXT_30 = mips/run$(EXEEXT)
914 @SIM_ENABLE_ARCH_mn10300_TRUE@am__EXEEXT_31 = mn10300/run$(EXEEXT)
915 @SIM_ENABLE_ARCH_moxie_TRUE@am__EXEEXT_32 = moxie/run$(EXEEXT)
916 @SIM_ENABLE_ARCH_msp430_TRUE@am__EXEEXT_33 = msp430/run$(EXEEXT)
917 @SIM_ENABLE_ARCH_or1k_TRUE@am__EXEEXT_34 = or1k/run$(EXEEXT)
918 @SIM_ENABLE_ARCH_ppc_TRUE@am__EXEEXT_35 = ppc/run$(EXEEXT) \
919 @SIM_ENABLE_ARCH_ppc_TRUE@ ppc/psim$(EXEEXT)
920 @SIM_ENABLE_ARCH_pru_TRUE@am__EXEEXT_36 = pru/run$(EXEEXT)
921 @SIM_ENABLE_ARCH_riscv_TRUE@am__EXEEXT_37 = riscv/run$(EXEEXT)
922 @SIM_ENABLE_ARCH_rl78_TRUE@am__EXEEXT_38 = rl78/run$(EXEEXT)
923 @SIM_ENABLE_ARCH_rx_TRUE@am__EXEEXT_39 = rx/run$(EXEEXT)
924 @SIM_ENABLE_ARCH_sh_TRUE@am__EXEEXT_40 = sh/run$(EXEEXT)
925 @SIM_ENABLE_ARCH_v850_TRUE@am__EXEEXT_41 = v850/run$(EXEEXT)
926 PROGRAMS = $(noinst_PROGRAMS)
927 am_aarch64_run_OBJECTS =
928 aarch64_run_OBJECTS = $(am_aarch64_run_OBJECTS)
929 am__DEPENDENCIES_4 = $(BFD_LIB) $(OPCODES_LIB) $(LIBIBERTY_LIB)
930 @SIM_ENABLE_ARCH_aarch64_TRUE@aarch64_run_DEPENDENCIES = \
931 @SIM_ENABLE_ARCH_aarch64_TRUE@ aarch64/nrun.o aarch64/libsim.a \
932 @SIM_ENABLE_ARCH_aarch64_TRUE@ $(am__DEPENDENCIES_4)
933 AM_V_lt = $(am__v_lt_@AM_V@)
934 am__v_lt_ = $(am__v_lt_@AM_DEFAULT_V@)
935 am__v_lt_0 = --silent
936 am__v_lt_1 =
937 am_arm_run_OBJECTS =
938 arm_run_OBJECTS = $(am_arm_run_OBJECTS)
939 @SIM_ENABLE_ARCH_arm_TRUE@arm_run_DEPENDENCIES = arm/nrun.o \
940 @SIM_ENABLE_ARCH_arm_TRUE@ arm/libsim.a $(am__DEPENDENCIES_4)
941 am_avr_run_OBJECTS =
942 avr_run_OBJECTS = $(am_avr_run_OBJECTS)
943 @SIM_ENABLE_ARCH_avr_TRUE@avr_run_DEPENDENCIES = avr/nrun.o \
944 @SIM_ENABLE_ARCH_avr_TRUE@ avr/libsim.a $(am__DEPENDENCIES_4)
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1275 }
1276 am__installdirs = "$(DESTDIR)$(armdocdir)" "$(DESTDIR)$(dtbdir)" \
1277 "$(DESTDIR)$(erc32docdir)" "$(DESTDIR)$(frvdocdir)" \
1278 "$(DESTDIR)$(or1kdocdir)" "$(DESTDIR)$(ppcdocdir)" \
1279 "$(DESTDIR)$(rxdocdir)" "$(DESTDIR)$(pkgincludedir)"
1280 DATA = $(armdoc_DATA) $(dtb_DATA) $(erc32doc_DATA) $(frvdoc_DATA) \
1281 $(or1kdoc_DATA) $(ppcdoc_DATA) $(rxdoc_DATA)
1282 am__pkginclude_HEADERS_DIST = $(srcroot)/include/sim/callback.h \
1283 $(srcroot)/include/sim/sim.h
1284 HEADERS = $(pkginclude_HEADERS)
1285 RECURSIVE_CLEAN_TARGETS = mostlyclean-recursive clean-recursive \
1286 distclean-recursive maintainer-clean-recursive
1287 am__recursive_targets = \
1288 $(RECURSIVE_TARGETS) \
1289 $(RECURSIVE_CLEAN_TARGETS) \
1290 $(am__extra_recursive_targets)
1291 AM_RECURSIVE_TARGETS = $(am__recursive_targets:-recursive=) TAGS CTAGS \
1292 cscope check recheck
1293 am__tagged_files = $(HEADERS) $(SOURCES) $(TAGS_FILES) \
1294 $(LISP)config.h.in
1295 # Read a list of newline-separated strings from the standard input,
1296 # and print each of them once, without duplicates. Input order is
1297 # *not* preserved.
1298 am__uniquify_input = $(AWK) '\
1299 BEGIN { nonempty = 0; } \
1300 { items[$$0] = 1; nonempty = 1; } \
1301 END { if (nonempty) { for (i in items) print i; }; } \
1302 '
1303 # Make sure the list of sources is unique. This is necessary because,
1304 # e.g., the same source file might be shared among _SOURCES variables
1305 # for different programs/libraries.
1306 am__define_uniq_tagged_files = \
1307 list='$(am__tagged_files)'; \
1308 unique=`for i in $$list; do \
1309 if test -f "$$i"; then echo $$i; else echo $(srcdir)/$$i; fi; \
1310 done | $(am__uniquify_input)`
1311 ETAGS = etags
1312 CTAGS = ctags
1313 CSCOPE = cscope
1314 DEJATOOL = $(PACKAGE)
1315 RUNTESTDEFAULTFLAGS = --tool $$tool --srcdir $$srcdir
1316 EXPECT = expect
1317 RUNTEST = runtest
1318 am__tty_colors_dummy = \
1319 mgn= red= grn= lgn= blu= brg= std=; \
1320 am__color_tests=no
1321 am__tty_colors = { \
1322 $(am__tty_colors_dummy); \
1323 if test "X$(AM_COLOR_TESTS)" = Xno; then \
1324 am__color_tests=no; \
1325 elif test "X$(AM_COLOR_TESTS)" = Xalways; then \
1326 am__color_tests=yes; \
1327 elif test "X$$TERM" != Xdumb && { test -t 1; } 2>/dev/null; then \
1328 am__color_tests=yes; \
1329 fi; \
1330 if test $$am__color_tests = yes; then \
1331 red='\e[0;31m'; \
1332 grn='\e[0;32m'; \
1333 lgn='\e[1;32m'; \
1334 blu='\e[1;34m'; \
1335 mgn='\e[0;35m'; \
1336 brg='\e[1m'; \
1337 std='\e[m'; \
1338 fi; \
1339 }
1340 am__recheck_rx = ^[ ]*:recheck:[ ]*
1341 am__global_test_result_rx = ^[ ]*:global-test-result:[ ]*
1342 am__copy_in_global_log_rx = ^[ ]*:copy-in-global-log:[ ]*
1343 # A command that, given a newline-separated list of test names on the
1344 # standard input, print the name of the tests that are to be re-run
1345 # upon "make recheck".
1346 am__list_recheck_tests = $(AWK) '{ \
1347 recheck = 1; \
1348 while ((rc = (getline line < ($$0 ".trs"))) != 0) \
1349 { \
1350 if (rc < 0) \
1351 { \
1352 if ((getline line2 < ($$0 ".log")) < 0) \
1353 recheck = 0; \
1354 break; \
1355 } \
1356 else if (line ~ /$(am__recheck_rx)[nN][Oo]/) \
1357 { \
1358 recheck = 0; \
1359 break; \
1360 } \
1361 else if (line ~ /$(am__recheck_rx)[yY][eE][sS]/) \
1362 { \
1363 break; \
1364 } \
1365 }; \
1366 if (recheck) \
1367 print $$0; \
1368 close ($$0 ".trs"); \
1369 close ($$0 ".log"); \
1370 }'
1371 # A command that, given a newline-separated list of test names on the
1372 # standard input, create the global log from their .trs and .log files.
1373 am__create_global_log = $(AWK) ' \
1374 function fatal(msg) \
1375 { \
1376 print "fatal: making $@: " msg | "cat >&2"; \
1377 exit 1; \
1378 } \
1379 function rst_section(header) \
1380 { \
1381 print header; \
1382 len = length(header); \
1383 for (i = 1; i <= len; i = i + 1) \
1384 printf "="; \
1385 printf "\n\n"; \
1386 } \
1387 { \
1388 copy_in_global_log = 1; \
1389 global_test_result = "RUN"; \
1390 while ((rc = (getline line < ($$0 ".trs"))) != 0) \
1391 { \
1392 if (rc < 0) \
1393 fatal("failed to read from " $$0 ".trs"); \
1394 if (line ~ /$(am__global_test_result_rx)/) \
1395 { \
1396 sub("$(am__global_test_result_rx)", "", line); \
1397 sub("[ ]*$$", "", line); \
1398 global_test_result = line; \
1399 } \
1400 else if (line ~ /$(am__copy_in_global_log_rx)[nN][oO]/) \
1401 copy_in_global_log = 0; \
1402 }; \
1403 if (copy_in_global_log) \
1404 { \
1405 rst_section(global_test_result ": " $$0); \
1406 while ((rc = (getline line < ($$0 ".log"))) != 0) \
1407 { \
1408 if (rc < 0) \
1409 fatal("failed to read from " $$0 ".log"); \
1410 print line; \
1411 }; \
1412 printf "\n"; \
1413 }; \
1414 close ($$0 ".trs"); \
1415 close ($$0 ".log"); \
1416 }'
1417 # Restructured Text title.
1418 am__rst_title = { sed 's/.*/ & /;h;s/./=/g;p;x;s/ *$$//;p;g' && echo; }
1419 # Solaris 10 'make', and several other traditional 'make' implementations,
1420 # pass "-e" to $(SHELL), and POSIX 2008 even requires this. Work around it
1421 # by disabling -e (using the XSI extension "set +e") if it's set.
1422 am__sh_e_setup = case $$- in *e*) set +e;; esac
1423 # Default flags passed to test drivers.
1424 am__common_driver_flags = \
1425 --color-tests "$$am__color_tests" \
1426 --enable-hard-errors "$$am__enable_hard_errors" \
1427 --expect-failure "$$am__expect_failure"
1428 # To be inserted before the command running the test. Creates the
1429 # directory for the log if needed. Stores in $dir the directory
1430 # containing $f, in $tst the test, in $log the log. Executes the
1431 # developer- defined test setup AM_TESTS_ENVIRONMENT (if any), and
1432 # passes TESTS_ENVIRONMENT. Set up options for the wrapper that
1433 # will run the test scripts (or their associated LOG_COMPILER, if
1434 # thy have one).
1435 am__check_pre = \
1436 $(am__sh_e_setup); \
1437 $(am__vpath_adj_setup) $(am__vpath_adj) \
1438 $(am__tty_colors); \
1439 srcdir=$(srcdir); export srcdir; \
1440 case "$@" in \
1441 */*) am__odir=`echo "./$@" | sed 's|/[^/]*$$||'`;; \
1442 *) am__odir=.;; \
1443 esac; \
1444 test "x$$am__odir" = x"." || test -d "$$am__odir" \
1445 || $(MKDIR_P) "$$am__odir" || exit $$?; \
1446 if test -f "./$$f"; then dir=./; \
1447 elif test -f "$$f"; then dir=; \
1448 else dir="$(srcdir)/"; fi; \
1449 tst=$$dir$$f; log='$@'; \
1450 if test -n '$(DISABLE_HARD_ERRORS)'; then \
1451 am__enable_hard_errors=no; \
1452 else \
1453 am__enable_hard_errors=yes; \
1454 fi; \
1455 case " $(XFAIL_TESTS) " in \
1456 *[\ \ ]$$f[\ \ ]* | *[\ \ ]$$dir$$f[\ \ ]*) \
1457 am__expect_failure=yes;; \
1458 *) \
1459 am__expect_failure=no;; \
1460 esac; \
1461 $(AM_TESTS_ENVIRONMENT) $(TESTS_ENVIRONMENT)
1462 # A shell command to get the names of the tests scripts with any registered
1463 # extension removed (i.e., equivalently, the names of the test logs, with
1464 # the '.log' extension removed). The result is saved in the shell variable
1465 # '$bases'. This honors runtime overriding of TESTS and TEST_LOGS. Sadly,
1466 # we cannot use something simpler, involving e.g., "$(TEST_LOGS:.log=)",
1467 # since that might cause problem with VPATH rewrites for suffix-less tests.
1468 # See also 'test-harness-vpath-rewrite.sh' and 'test-trs-basic.sh'.
1469 am__set_TESTS_bases = \
1470 bases='$(TEST_LOGS)'; \
1471 bases=`for i in $$bases; do echo $$i; done | sed 's/\.log$$//'`; \
1472 bases=`echo $$bases`
1473 RECHECK_LOGS = $(TEST_LOGS)
1474 TEST_SUITE_LOG = test-suite.log
1475 TEST_EXTENSIONS = @EXEEXT@ .test
1476 LOG_DRIVER = $(SHELL) $(top_srcdir)/../test-driver
1477 LOG_COMPILE = $(LOG_COMPILER) $(AM_LOG_FLAGS) $(LOG_FLAGS)
1478 am__set_b = \
1479 case '$@' in \
1480 */*) \
1481 case '$*' in \
1482 */*) b='$*';; \
1483 *) b=`echo '$@' | sed 's/\.log$$//'`; \
1484 esac;; \
1485 *) \
1486 b='$*';; \
1487 esac
1488 am__test_logs1 = $(TESTS:=.log)
1489 am__test_logs2 = $(am__test_logs1:@EXEEXT@.log=.log)
1490 TEST_LOGS = $(am__test_logs2:.test.log=.log)
1491 TEST_LOG_DRIVER = $(SHELL) $(top_srcdir)/../test-driver
1492 TEST_LOG_COMPILE = $(TEST_LOG_COMPILER) $(AM_TEST_LOG_FLAGS) \
1493 $(TEST_LOG_FLAGS)
1494 DIST_SUBDIRS = $(SUBDIRS)
1495 ACLOCAL = @ACLOCAL@
1496 AMTAR = @AMTAR@
1497 AM_DEFAULT_VERBOSITY = @AM_DEFAULT_VERBOSITY@
1498 AR = @AR@
1499 AR_FOR_BUILD = @AR_FOR_BUILD@
1500 AS_FOR_TARGET = @AS_FOR_TARGET@
1501 AS_FOR_TARGET_AARCH64 = @AS_FOR_TARGET_AARCH64@
1502 AS_FOR_TARGET_ARM = @AS_FOR_TARGET_ARM@
1503 AS_FOR_TARGET_AVR = @AS_FOR_TARGET_AVR@
1504 AS_FOR_TARGET_BFIN = @AS_FOR_TARGET_BFIN@
1505 AS_FOR_TARGET_BPF = @AS_FOR_TARGET_BPF@
1506 AS_FOR_TARGET_CR16 = @AS_FOR_TARGET_CR16@
1507 AS_FOR_TARGET_CRIS = @AS_FOR_TARGET_CRIS@
1508 AS_FOR_TARGET_D10V = @AS_FOR_TARGET_D10V@
1509 AS_FOR_TARGET_ERC32 = @AS_FOR_TARGET_ERC32@
1510 AS_FOR_TARGET_EXAMPLE_SYNACOR = @AS_FOR_TARGET_EXAMPLE_SYNACOR@
1511 AS_FOR_TARGET_FRV = @AS_FOR_TARGET_FRV@
1512 AS_FOR_TARGET_FT32 = @AS_FOR_TARGET_FT32@
1513 AS_FOR_TARGET_H8300 = @AS_FOR_TARGET_H8300@
1514 AS_FOR_TARGET_IQ2000 = @AS_FOR_TARGET_IQ2000@
1515 AS_FOR_TARGET_LM32 = @AS_FOR_TARGET_LM32@
1516 AS_FOR_TARGET_M32C = @AS_FOR_TARGET_M32C@
1517 AS_FOR_TARGET_M32R = @AS_FOR_TARGET_M32R@
1518 AS_FOR_TARGET_M68HC11 = @AS_FOR_TARGET_M68HC11@
1519 AS_FOR_TARGET_MCORE = @AS_FOR_TARGET_MCORE@
1520 AS_FOR_TARGET_MICROBLAZE = @AS_FOR_TARGET_MICROBLAZE@
1521 AS_FOR_TARGET_MIPS = @AS_FOR_TARGET_MIPS@
1522 AS_FOR_TARGET_MN10300 = @AS_FOR_TARGET_MN10300@
1523 AS_FOR_TARGET_MOXIE = @AS_FOR_TARGET_MOXIE@
1524 AS_FOR_TARGET_MSP430 = @AS_FOR_TARGET_MSP430@
1525 AS_FOR_TARGET_OR1K = @AS_FOR_TARGET_OR1K@
1526 AS_FOR_TARGET_PPC = @AS_FOR_TARGET_PPC@
1527 AS_FOR_TARGET_PRU = @AS_FOR_TARGET_PRU@
1528 AS_FOR_TARGET_RISCV = @AS_FOR_TARGET_RISCV@
1529 AS_FOR_TARGET_RL78 = @AS_FOR_TARGET_RL78@
1530 AS_FOR_TARGET_RX = @AS_FOR_TARGET_RX@
1531 AS_FOR_TARGET_SH = @AS_FOR_TARGET_SH@
1532 AS_FOR_TARGET_V850 = @AS_FOR_TARGET_V850@
1533 AUTOCONF = @AUTOCONF@
1534 AUTOHEADER = @AUTOHEADER@
1535 AUTOMAKE = @AUTOMAKE@
1536 AWK = @AWK@
1537 CC = @CC@
1538 CCDEPMODE = @CCDEPMODE@
1539 CC_FOR_BUILD = @CC_FOR_BUILD@
1540 CC_FOR_TARGET = @CC_FOR_TARGET@
1541 CC_FOR_TARGET_AARCH64 = @CC_FOR_TARGET_AARCH64@
1542 CC_FOR_TARGET_ARM = @CC_FOR_TARGET_ARM@
1543 CC_FOR_TARGET_AVR = @CC_FOR_TARGET_AVR@
1544 CC_FOR_TARGET_BFIN = @CC_FOR_TARGET_BFIN@
1545 CC_FOR_TARGET_BPF = @CC_FOR_TARGET_BPF@
1546 CC_FOR_TARGET_CR16 = @CC_FOR_TARGET_CR16@
1547 CC_FOR_TARGET_CRIS = @CC_FOR_TARGET_CRIS@
1548 CC_FOR_TARGET_D10V = @CC_FOR_TARGET_D10V@
1549 CC_FOR_TARGET_ERC32 = @CC_FOR_TARGET_ERC32@
1550 CC_FOR_TARGET_EXAMPLE_SYNACOR = @CC_FOR_TARGET_EXAMPLE_SYNACOR@
1551 CC_FOR_TARGET_FRV = @CC_FOR_TARGET_FRV@
1552 CC_FOR_TARGET_FT32 = @CC_FOR_TARGET_FT32@
1553 CC_FOR_TARGET_H8300 = @CC_FOR_TARGET_H8300@
1554 CC_FOR_TARGET_IQ2000 = @CC_FOR_TARGET_IQ2000@
1555 CC_FOR_TARGET_LM32 = @CC_FOR_TARGET_LM32@
1556 CC_FOR_TARGET_M32C = @CC_FOR_TARGET_M32C@
1557 CC_FOR_TARGET_M32R = @CC_FOR_TARGET_M32R@
1558 CC_FOR_TARGET_M68HC11 = @CC_FOR_TARGET_M68HC11@
1559 CC_FOR_TARGET_MCORE = @CC_FOR_TARGET_MCORE@
1560 CC_FOR_TARGET_MICROBLAZE = @CC_FOR_TARGET_MICROBLAZE@
1561 CC_FOR_TARGET_MIPS = @CC_FOR_TARGET_MIPS@
1562 CC_FOR_TARGET_MN10300 = @CC_FOR_TARGET_MN10300@
1563 CC_FOR_TARGET_MOXIE = @CC_FOR_TARGET_MOXIE@
1564 CC_FOR_TARGET_MSP430 = @CC_FOR_TARGET_MSP430@
1565 CC_FOR_TARGET_OR1K = @CC_FOR_TARGET_OR1K@
1566 CC_FOR_TARGET_PPC = @CC_FOR_TARGET_PPC@
1567 CC_FOR_TARGET_PRU = @CC_FOR_TARGET_PRU@
1568 CC_FOR_TARGET_RISCV = @CC_FOR_TARGET_RISCV@
1569 CC_FOR_TARGET_RL78 = @CC_FOR_TARGET_RL78@
1570 CC_FOR_TARGET_RX = @CC_FOR_TARGET_RX@
1571 CC_FOR_TARGET_SH = @CC_FOR_TARGET_SH@
1572 CC_FOR_TARGET_V850 = @CC_FOR_TARGET_V850@
1573 CFLAGS = @CFLAGS@
1574 CFLAGS_FOR_BUILD = @CFLAGS_FOR_BUILD@
1575 CGEN_MAINT = @CGEN_MAINT@
1576 CPP = @CPP@
1577 CPPFLAGS = @CPPFLAGS@
1578 CPPFLAGS_FOR_BUILD = @CPPFLAGS_FOR_BUILD@
1579 CYGPATH_W = @CYGPATH_W@
1580 C_DIALECT = @C_DIALECT@
1581 DEFS = @DEFS@
1582 DEPDIR = @DEPDIR@
1583 DSYMUTIL = @DSYMUTIL@
1584 DTC = @DTC@
1585 DUMPBIN = @DUMPBIN@
1586 ECHO_C = @ECHO_C@
1587 ECHO_N = @ECHO_N@
1588 ECHO_T = @ECHO_T@
1589 EGREP = @EGREP@
1590 EXEEXT = @EXEEXT@
1591 FGREP = @FGREP@
1592 GREP = @GREP@
1593 IGEN_FLAGS_SMP = @IGEN_FLAGS_SMP@
1594 INSTALL = @INSTALL@
1595 INSTALL_DATA = @INSTALL_DATA@
1596 INSTALL_PROGRAM = @INSTALL_PROGRAM@
1597 INSTALL_SCRIPT = @INSTALL_SCRIPT@
1598 INSTALL_STRIP_PROGRAM = @INSTALL_STRIP_PROGRAM@
1599 LD = @LD@
1600 LDFLAGS = @LDFLAGS@
1601 LDFLAGS_FOR_BUILD = @LDFLAGS_FOR_BUILD@
1602 LD_FOR_TARGET = @LD_FOR_TARGET@
1603 LD_FOR_TARGET_AARCH64 = @LD_FOR_TARGET_AARCH64@
1604 LD_FOR_TARGET_ARM = @LD_FOR_TARGET_ARM@
1605 LD_FOR_TARGET_AVR = @LD_FOR_TARGET_AVR@
1606 LD_FOR_TARGET_BFIN = @LD_FOR_TARGET_BFIN@
1607 LD_FOR_TARGET_BPF = @LD_FOR_TARGET_BPF@
1608 LD_FOR_TARGET_CR16 = @LD_FOR_TARGET_CR16@
1609 LD_FOR_TARGET_CRIS = @LD_FOR_TARGET_CRIS@
1610 LD_FOR_TARGET_D10V = @LD_FOR_TARGET_D10V@
1611 LD_FOR_TARGET_ERC32 = @LD_FOR_TARGET_ERC32@
1612 LD_FOR_TARGET_EXAMPLE_SYNACOR = @LD_FOR_TARGET_EXAMPLE_SYNACOR@
1613 LD_FOR_TARGET_FRV = @LD_FOR_TARGET_FRV@
1614 LD_FOR_TARGET_FT32 = @LD_FOR_TARGET_FT32@
1615 LD_FOR_TARGET_H8300 = @LD_FOR_TARGET_H8300@
1616 LD_FOR_TARGET_IQ2000 = @LD_FOR_TARGET_IQ2000@
1617 LD_FOR_TARGET_LM32 = @LD_FOR_TARGET_LM32@
1618 LD_FOR_TARGET_M32C = @LD_FOR_TARGET_M32C@
1619 LD_FOR_TARGET_M32R = @LD_FOR_TARGET_M32R@
1620 LD_FOR_TARGET_M68HC11 = @LD_FOR_TARGET_M68HC11@
1621 LD_FOR_TARGET_MCORE = @LD_FOR_TARGET_MCORE@
1622 LD_FOR_TARGET_MICROBLAZE = @LD_FOR_TARGET_MICROBLAZE@
1623 LD_FOR_TARGET_MIPS = @LD_FOR_TARGET_MIPS@
1624 LD_FOR_TARGET_MN10300 = @LD_FOR_TARGET_MN10300@
1625 LD_FOR_TARGET_MOXIE = @LD_FOR_TARGET_MOXIE@
1626 LD_FOR_TARGET_MSP430 = @LD_FOR_TARGET_MSP430@
1627 LD_FOR_TARGET_OR1K = @LD_FOR_TARGET_OR1K@
1628 LD_FOR_TARGET_PPC = @LD_FOR_TARGET_PPC@
1629 LD_FOR_TARGET_PRU = @LD_FOR_TARGET_PRU@
1630 LD_FOR_TARGET_RISCV = @LD_FOR_TARGET_RISCV@
1631 LD_FOR_TARGET_RL78 = @LD_FOR_TARGET_RL78@
1632 LD_FOR_TARGET_RX = @LD_FOR_TARGET_RX@
1633 LD_FOR_TARGET_SH = @LD_FOR_TARGET_SH@
1634 LD_FOR_TARGET_V850 = @LD_FOR_TARGET_V850@
1635 LIBOBJS = @LIBOBJS@
1636 LIBS = @LIBS@
1637 LIBTOOL = @LIBTOOL@
1638 LIPO = @LIPO@
1639 LN_S = @LN_S@
1640 LTLIBOBJS = @LTLIBOBJS@
1641 MAINT = @MAINT@
1642 MAKEINFO = @MAKEINFO@
1643 MKDIR_P = @MKDIR_P@
1644 NM = @NM@
1645 NMEDIT = @NMEDIT@
1646 OBJDUMP = @OBJDUMP@
1647 OBJEXT = @OBJEXT@
1648 OTOOL = @OTOOL@
1649 OTOOL64 = @OTOOL64@
1650 PACKAGE = @PACKAGE@
1651 PACKAGE_BUGREPORT = @PACKAGE_BUGREPORT@
1652 PACKAGE_NAME = @PACKAGE_NAME@
1653 PACKAGE_STRING = @PACKAGE_STRING@
1654 PACKAGE_TARNAME = @PACKAGE_TARNAME@
1655 PACKAGE_URL = @PACKAGE_URL@
1656 PACKAGE_VERSION = @PACKAGE_VERSION@
1657 PATH_SEPARATOR = @PATH_SEPARATOR@
1658 PKGVERSION = @PKGVERSION@
1659 PKG_CONFIG = @PKG_CONFIG@
1660 PKG_CONFIG_LIBDIR = @PKG_CONFIG_LIBDIR@
1661 PKG_CONFIG_PATH = @PKG_CONFIG_PATH@
1662 RANLIB = @RANLIB@
1663 RANLIB_FOR_BUILD = @RANLIB_FOR_BUILD@
1664 READLINE_CFLAGS = @READLINE_CFLAGS@
1665 READLINE_LIB = @READLINE_LIB@
1666 REPORT_BUGS_TEXI = @REPORT_BUGS_TEXI@
1667 REPORT_BUGS_TO = @REPORT_BUGS_TO@
1668 SDL_CFLAGS = @SDL_CFLAGS@
1669 SDL_LIBS = @SDL_LIBS@
1670 SED = @SED@
1671 SET_MAKE = @SET_MAKE@
1672 SHELL = @SHELL@
1673 SIM_COMMON_BUILD_FALSE = @SIM_COMMON_BUILD_FALSE@
1674 SIM_COMMON_BUILD_TRUE = @SIM_COMMON_BUILD_TRUE@
1675 SIM_ENABLED_ARCHES = @SIM_ENABLED_ARCHES@
1676 SIM_FRV_TRAPDUMP_FLAGS = @SIM_FRV_TRAPDUMP_FLAGS@
1677 SIM_HW_CFLAGS = @SIM_HW_CFLAGS@
1678 SIM_HW_SOCKSER = @SIM_HW_SOCKSER@
1679 SIM_INLINE = @SIM_INLINE@
1680 SIM_MIPS_BITSIZE = @SIM_MIPS_BITSIZE@
1681 SIM_MIPS_FPU_BITSIZE = @SIM_MIPS_FPU_BITSIZE@
1682 SIM_MIPS_GEN = @SIM_MIPS_GEN@
1683 SIM_MIPS_IGEN_ITABLE_FLAGS = @SIM_MIPS_IGEN_ITABLE_FLAGS@
1684 SIM_MIPS_M16_FLAGS = @SIM_MIPS_M16_FLAGS@
1685 SIM_MIPS_MULTI_IGEN_CONFIGS = @SIM_MIPS_MULTI_IGEN_CONFIGS@
1686 SIM_MIPS_MULTI_OBJ = @SIM_MIPS_MULTI_OBJ@
1687 SIM_MIPS_MULTI_SRC = @SIM_MIPS_MULTI_SRC@
1688 SIM_MIPS_SINGLE_FLAGS = @SIM_MIPS_SINGLE_FLAGS@
1689 SIM_MIPS_SUBTARGET = @SIM_MIPS_SUBTARGET@
1690 SIM_PRIMARY_TARGET = @SIM_PRIMARY_TARGET@
1691 SIM_RISCV_BITSIZE = @SIM_RISCV_BITSIZE@
1692 SIM_RX_CYCLE_ACCURATE_FLAGS = @SIM_RX_CYCLE_ACCURATE_FLAGS@
1693 SIM_SUBDIRS = @SIM_SUBDIRS@
1694 SIM_TOOLCHAIN_VARS = @SIM_TOOLCHAIN_VARS@
1695 STRIP = @STRIP@
1696 TERMCAP_LIB = @TERMCAP_LIB@
1697 VERSION = @VERSION@
1698 WARN_CFLAGS = @WARN_CFLAGS@
1699 WERROR_CFLAGS = @WERROR_CFLAGS@
1700 abs_builddir = @abs_builddir@
1701 abs_srcdir = @abs_srcdir@
1702 abs_top_builddir = @abs_top_builddir@
1703 abs_top_srcdir = @abs_top_srcdir@
1704 ac_ct_CC = @ac_ct_CC@
1705 ac_ct_DUMPBIN = @ac_ct_DUMPBIN@
1706 am__include = @am__include@
1707 am__leading_dot = @am__leading_dot@
1708 am__quote = @am__quote@
1709 am__tar = @am__tar@
1710 am__untar = @am__untar@
1711 bindir = @bindir@
1712 build = @build@
1713 build_alias = @build_alias@
1714 build_cpu = @build_cpu@
1715 build_os = @build_os@
1716 build_vendor = @build_vendor@
1717 builddir = @builddir@
1718 cgen = @cgen@
1719 cgendir = @cgendir@
1720 datadir = @datadir@
1721 datarootdir = @datarootdir@
1722 docdir = @docdir@
1723 dvidir = @dvidir@
1724 exec_prefix = @exec_prefix@
1725 host = @host@
1726 host_alias = @host_alias@
1727 host_cpu = @host_cpu@
1728 host_os = @host_os@
1729 host_vendor = @host_vendor@
1730 htmldir = @htmldir@
1731 includedir = @includedir@
1732 infodir = @infodir@
1733 install_sh = @install_sh@
1734 libdir = @libdir@
1735 libexecdir = @libexecdir@
1736 localedir = @localedir@
1737 localstatedir = @localstatedir@
1738 mandir = @mandir@
1739 mkdir_p = @mkdir_p@
1740 oldincludedir = @oldincludedir@
1741 pdfdir = @pdfdir@
1742 prefix = @prefix@
1743 program_transform_name = @program_transform_name@
1744 psdir = @psdir@
1745 sbindir = @sbindir@
1746 sharedstatedir = @sharedstatedir@
1747 sim_bitsize = @sim_bitsize@
1748 sim_float = @sim_float@
1749 srcdir = @srcdir@
1750 subdirs = @subdirs@
1751 sysconfdir = @sysconfdir@
1752 target = @target@
1753 target_alias = @target_alias@
1754 target_cpu = @target_cpu@
1755 target_os = @target_os@
1756 target_vendor = @target_vendor@
1757 top_build_prefix = @top_build_prefix@
1758 top_builddir = @top_builddir@
1759 top_srcdir = @top_srcdir@
1760 AUTOMAKE_OPTIONS = dejagnu foreign no-dist subdir-objects
1761 ACLOCAL_AMFLAGS = -Im4 -I.. -I../config
1762 GNULIB_PARENT_DIR = ..
1763 srccom = $(srcdir)/common
1764 srcroot = $(srcdir)/..
1765 SUBDIRS = @subdirs@ $(SIM_SUBDIRS)
1766 AM_MAKEFLAGS = SIM_NEW_COMMON_OBJS_="$(SIM_NEW_COMMON_OBJS)" \
1767 $(am__append_3) $(am__append_16) $(am__append_30) \
1768 $(am__append_63) $(am__append_74) $(am__append_80) \
1769 $(am__append_93) $(am__append_103)
1770 pkginclude_HEADERS = $(am__append_1)
1771 noinst_LIBRARIES = common/libcommon.a $(am__append_5) $(am__append_8) \
1772 $(am__append_10) $(am__append_12) $(am__append_14) \
1773 $(am__append_17) $(am__append_22) $(am__append_28) \
1774 $(am__append_35) $(am__append_41) $(am__append_45) \
1775 $(am__append_47) $(am__append_52) $(am__append_54) \
1776 $(am__append_56) $(am__append_61) $(am__append_67) \
1777 $(am__append_72) $(am__append_78) $(am__append_84) \
1778 $(am__append_86) $(am__append_91) $(am__append_101) \
1779 $(am__append_107) $(am__append_109) $(am__append_111) \
1780 $(am__append_117) $(am__append_119) $(am__append_121) \
1781 $(am__append_123) $(am__append_125) $(am__append_131)
1782 BUILT_SOURCES = $(am__append_19) $(am__append_24) $(am__append_32) \
1783 $(am__append_37) $(am__append_49) $(am__append_58) \
1784 $(am__append_64) $(am__append_75) $(am__append_94) \
1785 $(am__append_104) $(am__append_113) $(am__append_127) \
1786 $(am__append_133)
1787 CLEANFILES = common/version.c common/version.c-stamp \
1788 testsuite/common/bits-gen testsuite/common/bits32m0.c \
1789 testsuite/common/bits32m31.c testsuite/common/bits64m0.c \
1790 testsuite/common/bits64m63.c
1791 DISTCLEANFILES = $(am__append_100)
1792 MOSTLYCLEANFILES = core $(SIM_ENABLED_ARCHES:%=%/*.o) \
1793 $(common_HW_CONFIG_H_TARGETS) $(patsubst \
1794 %,%/stamp-hw,$(SIM_ENABLED_ARCHES)) \
1795 $(common_GEN_MODULES_C_TARGETS) $(patsubst \
1796 %,%/stamp-modules,$(SIM_ENABLED_ARCHES)) $(am__append_7) \
1797 site-sim-config.exp testrun.log testrun.sum $(am__append_21) \
1798 $(am__append_27) $(am__append_34) $(am__append_40) \
1799 $(am__append_51) $(am__append_60) $(am__append_66) \
1800 $(am__append_71) $(am__append_77) $(am__append_83) \
1801 $(am__append_99) $(am__append_106) $(am__append_115) \
1802 $(am__append_130) $(am__append_135)
1803 AM_CFLAGS = \
1804 $(WERROR_CFLAGS) \
1805 $(WARN_CFLAGS) \
1806 $(AM_CFLAGS_$(subst -,_,$(@D))) \
1807 $(AM_CFLAGS_$(subst -,_,$(@D)_$(@F)))
1808
1809 AM_CPPFLAGS = $(INCGNU) -I$(srcroot) -I$(srcroot)/include -I../bfd \
1810 -I.. -I$(@D) -I$(srcdir)/$(@D) $(SIM_HW_CFLAGS) $(SIM_INLINE) \
1811 $(AM_CPPFLAGS_$(subst -,_,$(@D))) $(AM_CPPFLAGS_$(subst \
1812 -,_,$(@D)_$(@F))) -I$(srcdir)/common -DSIM_TOPDIR_BUILD
1813 AM_CPPFLAGS_FOR_BUILD = -I$(srcroot)/include $(SIM_HW_CFLAGS) \
1814 $(SIM_INLINE) -I$(srcdir)/common
1815 COMPILE_FOR_BUILD = $(CC_FOR_BUILD) $(AM_CPPFLAGS_FOR_BUILD) $(CPPFLAGS_FOR_BUILD) $(CFLAGS_FOR_BUILD)
1816 LINK_FOR_BUILD = $(CC_FOR_BUILD) $(CFLAGS_FOR_BUILD) $(LDFLAGS_FOR_BUILD) -o $@
1817 SIM_ALL_RECURSIVE_DEPS = common/libcommon.a \
1818 $(common_HW_CONFIG_H_TARGETS) $(common_GEN_MODULES_C_TARGETS) \
1819 $(am__append_4) $(am__append_20) $(am__append_25) \
1820 $(am__append_33) $(am__append_38) $(am__append_50) \
1821 $(am__append_59) $(am__append_65) $(am__append_69) \
1822 $(am__append_76) $(am__append_81) $(am__append_98) \
1823 $(am__append_105) $(am__append_114) $(am__append_128) \
1824 $(am__append_134)
1825 SIM_INSTALL_DATA_LOCAL_DEPS =
1826 SIM_INSTALL_EXEC_LOCAL_DEPS = $(am__append_43)
1827 SIM_UNINSTALL_LOCAL_DEPS = $(am__append_44)
1828 AM_CPPFLAGS_common = -DSIM_COMMON_BUILD
1829 common_libcommon_a_SOURCES = \
1830 common/callback.c \
1831 common/portability.c \
1832 common/sim-load.c \
1833 common/syscall.c \
1834 common/target-newlib-errno.c \
1835 common/target-newlib-open.c \
1836 common/target-newlib-signal.c \
1837 common/target-newlib-syscall.c \
1838 common/version.c
1839
1840 SIM_COMMON_HW_OBJS = \
1841 hw-alloc.o \
1842 hw-base.o \
1843 hw-device.o \
1844 hw-events.o \
1845 hw-handles.o \
1846 hw-instances.o \
1847 hw-ports.o \
1848 hw-properties.o \
1849 hw-tree.o \
1850 sim-hw.o
1851
1852 SIM_NEW_COMMON_OBJS = sim-arange.o sim-bits.o sim-close.o \
1853 sim-command.o sim-config.o sim-core.o sim-cpu.o sim-endian.o \
1854 sim-engine.o sim-events.o sim-fpu.o sim-hload.o sim-hrw.o \
1855 sim-io.o sim-info.o sim-memopt.o sim-model.o sim-module.o \
1856 sim-options.o sim-profile.o sim-reason.o sim-reg.o \
1857 sim-signal.o sim-stop.o sim-syscall.o sim-trace.o sim-utils.o \
1858 sim-watch.o $(am__append_2)
1859 SIM_HW_DEVICES = cfi core pal glue
1860 common_HW_CONFIG_H_TARGETS = $(patsubst %,%/hw-config.h,$(SIM_ENABLED_ARCHES))
1861 am_arch_d = $(subst -,_,$(@D))
1862 GEN_MODULES_C_SRCS = \
1863 $(wildcard \
1864 $(patsubst %,$(srcdir)/%,$($(am_arch_d)_libsim_a_SOURCES)) \
1865 $(patsubst %.o,$(srcdir)/%.c,$($(am_arch_d)_libsim_a_OBJECTS) $($(am_arch_d)_libsim_a_LIBADD)) \
1866 $(filter-out %.o,$(patsubst $(@D)/%.o,$(srcdir)/common/%.c,$($(am_arch_d)_libsim_a_LIBADD))))
1867
1868 common_GEN_MODULES_C_TARGETS = $(patsubst %,%/modules.c,$(filter-out ppc,$(SIM_ENABLED_ARCHES)))
1869 LIBIBERTY_LIB = ../libiberty/libiberty.a
1870 BFD_LIB = ../bfd/libbfd.la
1871 OPCODES_LIB = ../opcodes/libopcodes.la
1872 SIM_COMMON_LIBS = \
1873 $(BFD_LIB) \
1874 $(OPCODES_LIB) \
1875 $(LIBIBERTY_LIB) \
1876 $(LIBGNU) \
1877 $(LIBGNU_EXTRA_LIBS)
1878
1879 GUILE = $(or $(wildcard ../guile/libguile/guile),guile)
1880 CGEN = "$(GUILE) -l $(cgendir)/guile.scm -s"
1881 CGENFLAGS = -v
1882 CGEN_CPU_DIR = $(cgendir)/cpu
1883 CPU_DIR = $(srcroot)/cpu
1884 CGEN_ARCHFILE = $(CPU_DIR)/$(@D).cpu
1885 CGEN_READ_SCM = $(cgendir)/sim.scm
1886 CGEN_ARCH_SCM = $(cgendir)/sim-arch.scm
1887 CGEN_CPU_SCM = $(cgendir)/sim-cpu.scm $(cgendir)/sim-model.scm
1888 CGEN_DECODE_SCM = $(cgendir)/sim-decode.scm
1889 CGEN_DESC_SCM = $(cgendir)/desc.scm $(cgendir)/desc-cpu.scm
1890 CGEN_CPU_EXTR = /extr/
1891 CGEN_CPU_READ = /read/
1892 CGEN_CPU_WRITE = /write/
1893 CGEN_CPU_SEM = /sem/
1894 CGEN_CPU_SEMSW = /semsw/
1895 CGEN_WRAPPER = $(srccom)/cgen.sh
1896 CGEN_GEN_ARCH = \
1897 $(SHELL) $(CGEN_WRAPPER) arch $(srcdir)/$(@D) \
1898 $(CGEN) $(cgendir) "$(CGENFLAGS)" \
1899 $(@D) "$$FLAGS" ignored "$$isa" $$mach ignored \
1900 $(CGEN_ARCHFILE) ignored
1901
1902 CGEN_GEN_CPU = \
1903 $(SHELL) $(CGEN_WRAPPER) cpu $(srcdir)/$(@D) \
1904 $(CGEN) $(cgendir) "$(CGENFLAGS)" \
1905 $(@D) "$$FLAGS" $$cpu "$$isa" $$mach "$$SUFFIX" \
1906 $(CGEN_ARCHFILE) "$$EXTRAFILES"
1907
1908 CGEN_GEN_DEFS = \
1909 $(SHELL) $(CGEN_WRAPPER) defs $(srcdir)/$(@D) \
1910 $(CGEN) $(cgendir) "$(CGENFLAGS)" \
1911 $(@D) "$$FLAGS" $$cpu "$$isa" $$mach "$$SUFFIX" \
1912 $(CGEN_ARCHFILE) ignored
1913
1914 CGEN_GEN_DECODE = \
1915 $(SHELL) $(CGEN_WRAPPER) decode $(srcdir)/$(@D) \
1916 $(CGEN) $(cgendir) "$(CGENFLAGS)" \
1917 $(@D) "$$FLAGS" $$cpu "$$isa" $$mach "$$SUFFIX" \
1918 $(CGEN_ARCHFILE) "$$EXTRAFILES"
1919
1920 CGEN_GEN_CPU_DECODE = \
1921 $(SHELL) $(CGEN_WRAPPER) cpu-decode $(srcdir)/$(@D) \
1922 $(CGEN) $(cgendir) "$(CGENFLAGS)" \
1923 $(@D) "$$FLAGS" $$cpu "$$isa" $$mach "$$SUFFIX" \
1924 $(CGEN_ARCHFILE) "$$EXTRAFILES"
1925
1926 CGEN_GEN_CPU_DESC = \
1927 $(SHELL) $(CGEN_WRAPPER) desc $(srcdir)/$(@D) \
1928 $(CGEN) $(cgendir) "$(CGENFLAGS)" \
1929 $(@D) "$$FLAGS" $$cpu "$$isa" $$mach "$$SUFFIX" \
1930 $(CGEN_ARCHFILE) ignored $$opcfile
1931
1932
1933 # igen leaks memory, and therefore makes AddressSanitizer unhappy. Disable
1934 # leak detection while running it.
1935 @SIM_ENABLE_IGEN_TRUE@IGEN = igen/igen$(EXEEXT)
1936 @SIM_ENABLE_IGEN_TRUE@IGEN_RUN = ASAN_OPTIONS=detect_leaks=0 $(IGEN) $(IGEN_FLAGS_SMP)
1937 @SIM_ENABLE_IGEN_TRUE@igen_libigen_a_SOURCES = \
1938 @SIM_ENABLE_IGEN_TRUE@ igen/table.c \
1939 @SIM_ENABLE_IGEN_TRUE@ igen/lf.c \
1940 @SIM_ENABLE_IGEN_TRUE@ igen/misc.c \
1941 @SIM_ENABLE_IGEN_TRUE@ igen/filter_host.c \
1942 @SIM_ENABLE_IGEN_TRUE@ igen/ld-decode.c \
1943 @SIM_ENABLE_IGEN_TRUE@ igen/ld-cache.c \
1944 @SIM_ENABLE_IGEN_TRUE@ igen/filter.c \
1945 @SIM_ENABLE_IGEN_TRUE@ igen/ld-insn.c \
1946 @SIM_ENABLE_IGEN_TRUE@ igen/gen-model.c \
1947 @SIM_ENABLE_IGEN_TRUE@ igen/gen-itable.c \
1948 @SIM_ENABLE_IGEN_TRUE@ igen/gen-icache.c \
1949 @SIM_ENABLE_IGEN_TRUE@ igen/gen-semantics.c \
1950 @SIM_ENABLE_IGEN_TRUE@ igen/gen-idecode.c \
1951 @SIM_ENABLE_IGEN_TRUE@ igen/gen-support.c \
1952 @SIM_ENABLE_IGEN_TRUE@ igen/gen-engine.c \
1953 @SIM_ENABLE_IGEN_TRUE@ igen/gen.c
1954
1955 @SIM_ENABLE_IGEN_TRUE@igen_igen_SOURCES = igen/igen.c
1956 @SIM_ENABLE_IGEN_TRUE@igen_igen_LDADD = igen/libigen.a
1957 @SIM_ENABLE_IGEN_TRUE@igen_filter_SOURCES =
1958 @SIM_ENABLE_IGEN_TRUE@igen_filter_LDADD = igen/filter-main.o igen/libigen.a
1959 @SIM_ENABLE_IGEN_TRUE@igen_gen_SOURCES =
1960 @SIM_ENABLE_IGEN_TRUE@igen_gen_LDADD = igen/gen-main.o igen/libigen.a
1961 @SIM_ENABLE_IGEN_TRUE@igen_ld_cache_SOURCES =
1962 @SIM_ENABLE_IGEN_TRUE@igen_ld_cache_LDADD = igen/ld-cache-main.o igen/libigen.a
1963 @SIM_ENABLE_IGEN_TRUE@igen_ld_decode_SOURCES =
1964 @SIM_ENABLE_IGEN_TRUE@igen_ld_decode_LDADD = igen/ld-decode-main.o igen/libigen.a
1965 @SIM_ENABLE_IGEN_TRUE@igen_ld_insn_SOURCES =
1966 @SIM_ENABLE_IGEN_TRUE@igen_ld_insn_LDADD = igen/ld-insn-main.o igen/libigen.a
1967 @SIM_ENABLE_IGEN_TRUE@igen_table_SOURCES =
1968 @SIM_ENABLE_IGEN_TRUE@igen_table_LDADD = igen/table-main.o igen/libigen.a
1969 @SIM_ENABLE_IGEN_TRUE@igen_IGEN_TOOLS = \
1970 @SIM_ENABLE_IGEN_TRUE@ $(IGEN) \
1971 @SIM_ENABLE_IGEN_TRUE@ igen/filter \
1972 @SIM_ENABLE_IGEN_TRUE@ igen/gen \
1973 @SIM_ENABLE_IGEN_TRUE@ igen/ld-cache \
1974 @SIM_ENABLE_IGEN_TRUE@ igen/ld-decode \
1975 @SIM_ENABLE_IGEN_TRUE@ igen/ld-insn \
1976 @SIM_ENABLE_IGEN_TRUE@ igen/table
1977
1978 EXTRA_DEJAGNU_SITE_CONFIG = site-sim-config.exp
1979
1980 # Custom verbose test variables that automake doesn't provide (yet?).
1981 AM_V_RUNTEST = $(AM_V_RUNTEST_@AM_V@)
1982 AM_V_RUNTEST_ = $(AM_V_RUNTEST_@AM_DEFAULT_V@)
1983 AM_V_RUNTEST_0 = @echo " RUNTEST $(RUNTESTFLAGS) $*";
1984 AM_V_RUNTEST_1 =
1985 DO_RUNTEST = \
1986 LC_ALL=C; export LC_ALL; \
1987 EXPECT=${EXPECT} ; export EXPECT ; \
1988 runtest=$(RUNTEST); \
1989 $$runtest $(RUNTESTFLAGS)
1990
1991 testsuite_common_CPPFLAGS = \
1992 -I$(srcdir)/common \
1993 -I$(srcroot)/include \
1994 -I../bfd
1995
1996 @SIM_ENABLE_ARCH_aarch64_TRUE@aarch64_libsim_a_SOURCES =
1997 @SIM_ENABLE_ARCH_aarch64_TRUE@aarch64_libsim_a_LIBADD = \
1998 @SIM_ENABLE_ARCH_aarch64_TRUE@ $(common_libcommon_a_OBJECTS) \
1999 @SIM_ENABLE_ARCH_aarch64_TRUE@ $(patsubst %,aarch64/%,$(SIM_NEW_COMMON_OBJS)) \
2000 @SIM_ENABLE_ARCH_aarch64_TRUE@ $(patsubst %,aarch64/dv-%.o,$(SIM_HW_DEVICES)) \
2001 @SIM_ENABLE_ARCH_aarch64_TRUE@ aarch64/cpustate.o \
2002 @SIM_ENABLE_ARCH_aarch64_TRUE@ aarch64/interp.o \
2003 @SIM_ENABLE_ARCH_aarch64_TRUE@ aarch64/memory.o \
2004 @SIM_ENABLE_ARCH_aarch64_TRUE@ aarch64/modules.o \
2005 @SIM_ENABLE_ARCH_aarch64_TRUE@ aarch64/sim-resume.o \
2006 @SIM_ENABLE_ARCH_aarch64_TRUE@ aarch64/simulator.o
2007
2008 @SIM_ENABLE_ARCH_aarch64_TRUE@aarch64_run_SOURCES =
2009 @SIM_ENABLE_ARCH_aarch64_TRUE@aarch64_run_LDADD = \
2010 @SIM_ENABLE_ARCH_aarch64_TRUE@ aarch64/nrun.o \
2011 @SIM_ENABLE_ARCH_aarch64_TRUE@ aarch64/libsim.a \
2012 @SIM_ENABLE_ARCH_aarch64_TRUE@ $(SIM_COMMON_LIBS)
2013
2014 @SIM_ENABLE_ARCH_arm_TRUE@AM_CPPFLAGS_arm = -DMODET
2015 @SIM_ENABLE_ARCH_arm_TRUE@arm_libsim_a_SOURCES =
2016 @SIM_ENABLE_ARCH_arm_TRUE@arm_libsim_a_LIBADD = \
2017 @SIM_ENABLE_ARCH_arm_TRUE@ $(common_libcommon_a_OBJECTS) \
2018 @SIM_ENABLE_ARCH_arm_TRUE@ arm/wrapper.o \
2019 @SIM_ENABLE_ARCH_arm_TRUE@ $(patsubst %,arm/%,$(SIM_NEW_COMMON_OBJS)) \
2020 @SIM_ENABLE_ARCH_arm_TRUE@ $(patsubst %,arm/dv-%.o,$(SIM_HW_DEVICES)) \
2021 @SIM_ENABLE_ARCH_arm_TRUE@ arm/armemu.o \
2022 @SIM_ENABLE_ARCH_arm_TRUE@ arm/armemu32.o arm/arminit.o arm/armos.o arm/armsupp.o \
2023 @SIM_ENABLE_ARCH_arm_TRUE@ arm/armvirt.o arm/thumbemu.o \
2024 @SIM_ENABLE_ARCH_arm_TRUE@ arm/armcopro.o arm/maverick.o arm/iwmmxt.o \
2025 @SIM_ENABLE_ARCH_arm_TRUE@ arm/modules.o
2026
2027 @SIM_ENABLE_ARCH_arm_TRUE@arm_run_SOURCES =
2028 @SIM_ENABLE_ARCH_arm_TRUE@arm_run_LDADD = \
2029 @SIM_ENABLE_ARCH_arm_TRUE@ arm/nrun.o \
2030 @SIM_ENABLE_ARCH_arm_TRUE@ arm/libsim.a \
2031 @SIM_ENABLE_ARCH_arm_TRUE@ $(SIM_COMMON_LIBS)
2032
2033 @SIM_ENABLE_ARCH_arm_TRUE@armdocdir = $(docdir)/arm
2034 @SIM_ENABLE_ARCH_arm_TRUE@armdoc_DATA = arm/README
2035 @SIM_ENABLE_ARCH_avr_TRUE@avr_libsim_a_SOURCES =
2036 @SIM_ENABLE_ARCH_avr_TRUE@avr_libsim_a_LIBADD = \
2037 @SIM_ENABLE_ARCH_avr_TRUE@ $(common_libcommon_a_OBJECTS) \
2038 @SIM_ENABLE_ARCH_avr_TRUE@ avr/interp.o \
2039 @SIM_ENABLE_ARCH_avr_TRUE@ $(patsubst %,avr/%,$(SIM_NEW_COMMON_OBJS)) \
2040 @SIM_ENABLE_ARCH_avr_TRUE@ $(patsubst %,avr/dv-%.o,$(SIM_HW_DEVICES)) \
2041 @SIM_ENABLE_ARCH_avr_TRUE@ avr/modules.o \
2042 @SIM_ENABLE_ARCH_avr_TRUE@ avr/sim-resume.o
2043
2044 @SIM_ENABLE_ARCH_avr_TRUE@avr_run_SOURCES =
2045 @SIM_ENABLE_ARCH_avr_TRUE@avr_run_LDADD = \
2046 @SIM_ENABLE_ARCH_avr_TRUE@ avr/nrun.o \
2047 @SIM_ENABLE_ARCH_avr_TRUE@ avr/libsim.a \
2048 @SIM_ENABLE_ARCH_avr_TRUE@ $(SIM_COMMON_LIBS)
2049
2050 @SIM_ENABLE_ARCH_bfin_TRUE@AM_CPPFLAGS_bfin = $(SDL_CFLAGS)
2051 @SIM_ENABLE_ARCH_bfin_TRUE@bfin_libsim_a_SOURCES =
2052 @SIM_ENABLE_ARCH_bfin_TRUE@bfin_libsim_a_LIBADD = \
2053 @SIM_ENABLE_ARCH_bfin_TRUE@ $(common_libcommon_a_OBJECTS) \
2054 @SIM_ENABLE_ARCH_bfin_TRUE@ $(patsubst %,bfin/%,$(SIM_NEW_COMMON_OBJS)) \
2055 @SIM_ENABLE_ARCH_bfin_TRUE@ $(patsubst %,bfin/dv-%.o,$(SIM_HW_DEVICES)) \
2056 @SIM_ENABLE_ARCH_bfin_TRUE@ $(patsubst %,bfin/dv-%.o,$(bfin_SIM_EXTRA_HW_DEVICES)) \
2057 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin/bfin-sim.o \
2058 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin/devices.o \
2059 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin/gui.o \
2060 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin/interp.o \
2061 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin/machs.o \
2062 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin/modules.o \
2063 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin/sim-resume.o
2064
2065 @SIM_ENABLE_ARCH_bfin_TRUE@bfin_run_SOURCES =
2066 @SIM_ENABLE_ARCH_bfin_TRUE@bfin_run_LDADD = \
2067 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin/nrun.o \
2068 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin/libsim.a \
2069 @SIM_ENABLE_ARCH_bfin_TRUE@ $(SIM_COMMON_LIBS)
2070
2071 @SIM_ENABLE_ARCH_bfin_TRUE@bfin_SIM_EXTRA_HW_DEVICES = \
2072 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_cec \
2073 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_ctimer \
2074 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_dma \
2075 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_dmac \
2076 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_ebiu_amc \
2077 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_ebiu_ddrc \
2078 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_ebiu_sdc \
2079 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_emac \
2080 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_eppi \
2081 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_evt \
2082 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_gpio \
2083 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_gpio2 \
2084 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_gptimer \
2085 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_jtag \
2086 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_mmu \
2087 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_nfc \
2088 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_otp \
2089 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_pfmon \
2090 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_pint \
2091 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_pll \
2092 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_ppi \
2093 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_rtc \
2094 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_sic \
2095 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_spi \
2096 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_trace \
2097 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_twi \
2098 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_uart \
2099 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_uart2 \
2100 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_wdog \
2101 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_wp \
2102 @SIM_ENABLE_ARCH_bfin_TRUE@ eth_phy
2103
2104 @SIM_ENABLE_ARCH_bpf_TRUE@AM_CPPFLAGS_bpf = -DWITH_TARGET_WORD_BITSIZE=64
2105 @SIM_ENABLE_ARCH_bpf_TRUE@AM_CPPFLAGS_bpf_mloop_le.o = -DWANT_ISA_EBPFLE
2106 @SIM_ENABLE_ARCH_bpf_TRUE@AM_CPPFLAGS_bpf_mloop_be.o = -DWANT_ISA_EBPFBE
2107 @SIM_ENABLE_ARCH_bpf_TRUE@AM_CPPFLAGS_bpf_decode_le.o = -DWANT_ISA_EBPFLE
2108 @SIM_ENABLE_ARCH_bpf_TRUE@AM_CPPFLAGS_bpf_decode_be.o = -DWANT_ISA_EBPFBE
2109 @SIM_ENABLE_ARCH_bpf_TRUE@AM_CPPFLAGS_bpf_sem_le.o = -DWANT_ISA_EBPFLE
2110 @SIM_ENABLE_ARCH_bpf_TRUE@AM_CPPFLAGS_bpf_sem_be.o = -DWANT_ISA_EBPFBE
2111 @SIM_ENABLE_ARCH_bpf_TRUE@bpf_libsim_a_SOURCES =
2112 @SIM_ENABLE_ARCH_bpf_TRUE@bpf_libsim_a_LIBADD = \
2113 @SIM_ENABLE_ARCH_bpf_TRUE@ $(common_libcommon_a_OBJECTS) \
2114 @SIM_ENABLE_ARCH_bpf_TRUE@ $(patsubst %,bpf/%,$(SIM_NEW_COMMON_OBJS)) \
2115 @SIM_ENABLE_ARCH_bpf_TRUE@ $(patsubst %,bpf/dv-%.o,$(SIM_HW_DEVICES)) \
2116 @SIM_ENABLE_ARCH_bpf_TRUE@ bpf/modules.o \
2117 @SIM_ENABLE_ARCH_bpf_TRUE@ \
2118 @SIM_ENABLE_ARCH_bpf_TRUE@ bpf/cgen-run.o \
2119 @SIM_ENABLE_ARCH_bpf_TRUE@ bpf/cgen-scache.o \
2120 @SIM_ENABLE_ARCH_bpf_TRUE@ bpf/cgen-trace.o \
2121 @SIM_ENABLE_ARCH_bpf_TRUE@ bpf/cgen-utils.o \
2122 @SIM_ENABLE_ARCH_bpf_TRUE@ \
2123 @SIM_ENABLE_ARCH_bpf_TRUE@ bpf/arch.o \
2124 @SIM_ENABLE_ARCH_bpf_TRUE@ bpf/cpu.o \
2125 @SIM_ENABLE_ARCH_bpf_TRUE@ bpf/decode-le.o \
2126 @SIM_ENABLE_ARCH_bpf_TRUE@ bpf/decode-be.o \
2127 @SIM_ENABLE_ARCH_bpf_TRUE@ bpf/sem-le.o \
2128 @SIM_ENABLE_ARCH_bpf_TRUE@ bpf/sem-be.o \
2129 @SIM_ENABLE_ARCH_bpf_TRUE@ bpf/mloop-le.o \
2130 @SIM_ENABLE_ARCH_bpf_TRUE@ bpf/mloop-be.o \
2131 @SIM_ENABLE_ARCH_bpf_TRUE@ \
2132 @SIM_ENABLE_ARCH_bpf_TRUE@ bpf/bpf.o \
2133 @SIM_ENABLE_ARCH_bpf_TRUE@ bpf/bpf-helpers.o \
2134 @SIM_ENABLE_ARCH_bpf_TRUE@ bpf/sim-if.o \
2135 @SIM_ENABLE_ARCH_bpf_TRUE@ bpf/traps.o
2136
2137 @SIM_ENABLE_ARCH_bpf_TRUE@bpf_run_SOURCES =
2138 @SIM_ENABLE_ARCH_bpf_TRUE@bpf_run_LDADD = \
2139 @SIM_ENABLE_ARCH_bpf_TRUE@ bpf/nrun.o \
2140 @SIM_ENABLE_ARCH_bpf_TRUE@ bpf/libsim.a \
2141 @SIM_ENABLE_ARCH_bpf_TRUE@ $(SIM_COMMON_LIBS)
2142
2143 @SIM_ENABLE_ARCH_bpf_TRUE@bpf_BUILD_OUTPUTS = \
2144 @SIM_ENABLE_ARCH_bpf_TRUE@ bpf/mloop-le.c \
2145 @SIM_ENABLE_ARCH_bpf_TRUE@ bpf/stamp-mloop-le \
2146 @SIM_ENABLE_ARCH_bpf_TRUE@ bpf/mloop-be.c \
2147 @SIM_ENABLE_ARCH_bpf_TRUE@ bpf/stamp-mloop-be
2148
2149 @SIM_ENABLE_ARCH_cr16_TRUE@cr16_libsim_a_SOURCES =
2150 @SIM_ENABLE_ARCH_cr16_TRUE@cr16_libsim_a_LIBADD = \
2151 @SIM_ENABLE_ARCH_cr16_TRUE@ $(common_libcommon_a_OBJECTS) \
2152 @SIM_ENABLE_ARCH_cr16_TRUE@ $(patsubst %,cr16/%,$(SIM_NEW_COMMON_OBJS)) \
2153 @SIM_ENABLE_ARCH_cr16_TRUE@ $(patsubst %,cr16/dv-%.o,$(SIM_HW_DEVICES)) \
2154 @SIM_ENABLE_ARCH_cr16_TRUE@ cr16/interp.o \
2155 @SIM_ENABLE_ARCH_cr16_TRUE@ cr16/modules.o \
2156 @SIM_ENABLE_ARCH_cr16_TRUE@ cr16/sim-resume.o \
2157 @SIM_ENABLE_ARCH_cr16_TRUE@ cr16/simops.o \
2158 @SIM_ENABLE_ARCH_cr16_TRUE@ cr16/table.o
2159
2160 @SIM_ENABLE_ARCH_cr16_TRUE@cr16_run_SOURCES =
2161 @SIM_ENABLE_ARCH_cr16_TRUE@cr16_run_LDADD = \
2162 @SIM_ENABLE_ARCH_cr16_TRUE@ cr16/nrun.o \
2163 @SIM_ENABLE_ARCH_cr16_TRUE@ cr16/libsim.a \
2164 @SIM_ENABLE_ARCH_cr16_TRUE@ $(SIM_COMMON_LIBS)
2165
2166 @SIM_ENABLE_ARCH_cr16_TRUE@cr16_BUILD_OUTPUTS = \
2167 @SIM_ENABLE_ARCH_cr16_TRUE@ cr16/gencode$(EXEEXT) \
2168 @SIM_ENABLE_ARCH_cr16_TRUE@ cr16/table.c
2169
2170 @SIM_ENABLE_ARCH_cr16_TRUE@cr16_gencode_SOURCES = cr16/gencode.c
2171 @SIM_ENABLE_ARCH_cr16_TRUE@cr16_gencode_LDADD = cr16/cr16-opc.o
2172 @SIM_ENABLE_ARCH_cris_TRUE@cris_libsim_a_SOURCES =
2173 @SIM_ENABLE_ARCH_cris_TRUE@cris_libsim_a_LIBADD = \
2174 @SIM_ENABLE_ARCH_cris_TRUE@ $(common_libcommon_a_OBJECTS) \
2175 @SIM_ENABLE_ARCH_cris_TRUE@ $(patsubst %,cris/%,$(SIM_NEW_COMMON_OBJS)) \
2176 @SIM_ENABLE_ARCH_cris_TRUE@ $(patsubst %,cris/dv-%.o,$(SIM_HW_DEVICES)) \
2177 @SIM_ENABLE_ARCH_cris_TRUE@ $(patsubst %,cris/dv-%.o,$(cris_SIM_EXTRA_HW_DEVICES)) \
2178 @SIM_ENABLE_ARCH_cris_TRUE@ cris/modules.o \
2179 @SIM_ENABLE_ARCH_cris_TRUE@ \
2180 @SIM_ENABLE_ARCH_cris_TRUE@ cris/cgen-run.o \
2181 @SIM_ENABLE_ARCH_cris_TRUE@ cris/cgen-scache.o \
2182 @SIM_ENABLE_ARCH_cris_TRUE@ cris/cgen-trace.o \
2183 @SIM_ENABLE_ARCH_cris_TRUE@ cris/cgen-utils.o \
2184 @SIM_ENABLE_ARCH_cris_TRUE@ \
2185 @SIM_ENABLE_ARCH_cris_TRUE@ cris/arch.o \
2186 @SIM_ENABLE_ARCH_cris_TRUE@ cris/crisv10f.o \
2187 @SIM_ENABLE_ARCH_cris_TRUE@ cris/cpuv10.o \
2188 @SIM_ENABLE_ARCH_cris_TRUE@ cris/decodev10.o \
2189 @SIM_ENABLE_ARCH_cris_TRUE@ cris/modelv10.o \
2190 @SIM_ENABLE_ARCH_cris_TRUE@ cris/mloopv10f.o \
2191 @SIM_ENABLE_ARCH_cris_TRUE@ cris/crisv32f.o \
2192 @SIM_ENABLE_ARCH_cris_TRUE@ cris/cpuv32.o \
2193 @SIM_ENABLE_ARCH_cris_TRUE@ cris/decodev32.o \
2194 @SIM_ENABLE_ARCH_cris_TRUE@ cris/modelv32.o \
2195 @SIM_ENABLE_ARCH_cris_TRUE@ cris/mloopv32f.o \
2196 @SIM_ENABLE_ARCH_cris_TRUE@ \
2197 @SIM_ENABLE_ARCH_cris_TRUE@ cris/sim-if.o \
2198 @SIM_ENABLE_ARCH_cris_TRUE@ cris/traps.o
2199
2200 @SIM_ENABLE_ARCH_cris_TRUE@cris_run_SOURCES =
2201 @SIM_ENABLE_ARCH_cris_TRUE@cris_run_LDADD = \
2202 @SIM_ENABLE_ARCH_cris_TRUE@ cris/nrun.o \
2203 @SIM_ENABLE_ARCH_cris_TRUE@ cris/libsim.a \
2204 @SIM_ENABLE_ARCH_cris_TRUE@ $(SIM_COMMON_LIBS)
2205
2206 @SIM_ENABLE_ARCH_cris_TRUE@cris_SIM_EXTRA_HW_DEVICES = rv cris cris_900000xx
2207 @SIM_ENABLE_ARCH_cris_TRUE@cris_rvdummy_SOURCES = cris/rvdummy.c
2208 @SIM_ENABLE_ARCH_cris_TRUE@cris_rvdummy_LDADD = $(LIBIBERTY_LIB)
2209 @SIM_ENABLE_ARCH_cris_TRUE@cris_BUILD_OUTPUTS = \
2210 @SIM_ENABLE_ARCH_cris_TRUE@ cris/mloopv10f.c \
2211 @SIM_ENABLE_ARCH_cris_TRUE@ cris/stamp-mloop-v10f \
2212 @SIM_ENABLE_ARCH_cris_TRUE@ cris/mloopv32f.c \
2213 @SIM_ENABLE_ARCH_cris_TRUE@ cris/stamp-mloop-v32f
2214
2215 @SIM_ENABLE_ARCH_d10v_TRUE@d10v_libsim_a_SOURCES =
2216 @SIM_ENABLE_ARCH_d10v_TRUE@d10v_libsim_a_LIBADD = \
2217 @SIM_ENABLE_ARCH_d10v_TRUE@ $(common_libcommon_a_OBJECTS) \
2218 @SIM_ENABLE_ARCH_d10v_TRUE@ d10v/interp.o \
2219 @SIM_ENABLE_ARCH_d10v_TRUE@ $(patsubst %,d10v/%,$(SIM_NEW_COMMON_OBJS)) \
2220 @SIM_ENABLE_ARCH_d10v_TRUE@ $(patsubst %,d10v/dv-%.o,$(SIM_HW_DEVICES)) \
2221 @SIM_ENABLE_ARCH_d10v_TRUE@ d10v/endian.o \
2222 @SIM_ENABLE_ARCH_d10v_TRUE@ d10v/modules.o \
2223 @SIM_ENABLE_ARCH_d10v_TRUE@ d10v/sim-resume.o \
2224 @SIM_ENABLE_ARCH_d10v_TRUE@ d10v/simops.o \
2225 @SIM_ENABLE_ARCH_d10v_TRUE@ d10v/table.o
2226
2227 @SIM_ENABLE_ARCH_d10v_TRUE@d10v_run_SOURCES =
2228 @SIM_ENABLE_ARCH_d10v_TRUE@d10v_run_LDADD = \
2229 @SIM_ENABLE_ARCH_d10v_TRUE@ d10v/nrun.o \
2230 @SIM_ENABLE_ARCH_d10v_TRUE@ d10v/libsim.a \
2231 @SIM_ENABLE_ARCH_d10v_TRUE@ $(SIM_COMMON_LIBS)
2232
2233 @SIM_ENABLE_ARCH_d10v_TRUE@d10v_BUILD_OUTPUTS = \
2234 @SIM_ENABLE_ARCH_d10v_TRUE@ d10v/gencode$(EXEEXT) \
2235 @SIM_ENABLE_ARCH_d10v_TRUE@ d10v/table.c
2236
2237 @SIM_ENABLE_ARCH_d10v_TRUE@d10v_gencode_SOURCES = d10v/gencode.c
2238 @SIM_ENABLE_ARCH_d10v_TRUE@d10v_gencode_LDADD = d10v/d10v-opc.o
2239 @SIM_ENABLE_ARCH_erc32_TRUE@READLINE_SRC = $(srcroot)/readline/readline
2240 @SIM_ENABLE_ARCH_erc32_TRUE@AM_CPPFLAGS_erc32 = $(READLINE_CFLAGS) \
2241 @SIM_ENABLE_ARCH_erc32_TRUE@ -DFAST_UART
2242 @SIM_ENABLE_ARCH_erc32_TRUE@erc32_libsim_a_SOURCES =
2243 @SIM_ENABLE_ARCH_erc32_TRUE@erc32_libsim_a_LIBADD = \
2244 @SIM_ENABLE_ARCH_erc32_TRUE@ $(common_libcommon_a_OBJECTS) \
2245 @SIM_ENABLE_ARCH_erc32_TRUE@ erc32/erc32.o \
2246 @SIM_ENABLE_ARCH_erc32_TRUE@ erc32/exec.o \
2247 @SIM_ENABLE_ARCH_erc32_TRUE@ erc32/float.o \
2248 @SIM_ENABLE_ARCH_erc32_TRUE@ erc32/func.o \
2249 @SIM_ENABLE_ARCH_erc32_TRUE@ erc32/help.o \
2250 @SIM_ENABLE_ARCH_erc32_TRUE@ erc32/interf.o \
2251 @SIM_ENABLE_ARCH_erc32_TRUE@ erc32/modules.o
2252
2253 @SIM_ENABLE_ARCH_erc32_TRUE@erc32_run_SOURCES =
2254 @SIM_ENABLE_ARCH_erc32_TRUE@erc32_run_LDADD = \
2255 @SIM_ENABLE_ARCH_erc32_TRUE@ erc32/sis.o \
2256 @SIM_ENABLE_ARCH_erc32_TRUE@ erc32/libsim.a \
2257 @SIM_ENABLE_ARCH_erc32_TRUE@ $(SIM_COMMON_LIBS) $(READLINE_LIB) $(TERMCAP_LIB)
2258
2259 @SIM_ENABLE_ARCH_erc32_TRUE@erc32docdir = $(docdir)/erc32
2260 @SIM_ENABLE_ARCH_erc32_TRUE@erc32doc_DATA = erc32/README.erc32 erc32/README.gdb erc32/README.sis
2261 @SIM_ENABLE_ARCH_examples_TRUE@example_synacor_libsim_a_SOURCES =
2262 @SIM_ENABLE_ARCH_examples_TRUE@example_synacor_libsim_a_LIBADD = \
2263 @SIM_ENABLE_ARCH_examples_TRUE@ $(common_libcommon_a_OBJECTS) \
2264 @SIM_ENABLE_ARCH_examples_TRUE@ $(patsubst %,example-synacor/%,$(SIM_NEW_COMMON_OBJS)) \
2265 @SIM_ENABLE_ARCH_examples_TRUE@ $(patsubst %,example-synacor/dv-%.o,$(SIM_HW_DEVICES)) \
2266 @SIM_ENABLE_ARCH_examples_TRUE@ example-synacor/interp.o \
2267 @SIM_ENABLE_ARCH_examples_TRUE@ example-synacor/modules.o \
2268 @SIM_ENABLE_ARCH_examples_TRUE@ example-synacor/sim-main.o \
2269 @SIM_ENABLE_ARCH_examples_TRUE@ example-synacor/sim-resume.o
2270
2271 @SIM_ENABLE_ARCH_examples_TRUE@example_synacor_run_SOURCES =
2272 @SIM_ENABLE_ARCH_examples_TRUE@example_synacor_run_LDADD = \
2273 @SIM_ENABLE_ARCH_examples_TRUE@ example-synacor/nrun.o \
2274 @SIM_ENABLE_ARCH_examples_TRUE@ example-synacor/libsim.a \
2275 @SIM_ENABLE_ARCH_examples_TRUE@ $(SIM_COMMON_LIBS)
2276
2277 @SIM_ENABLE_ARCH_frv_TRUE@AM_CPPFLAGS_frv = $(SIM_FRV_TRAPDUMP_FLAGS)
2278 @SIM_ENABLE_ARCH_frv_TRUE@AM_CFLAGS_frv_memory.o = -Wno-error
2279 @SIM_ENABLE_ARCH_frv_TRUE@AM_CFLAGS_frv_sem.o = -Wno-error
2280 @SIM_ENABLE_ARCH_frv_TRUE@frv_libsim_a_SOURCES =
2281 @SIM_ENABLE_ARCH_frv_TRUE@frv_libsim_a_LIBADD = \
2282 @SIM_ENABLE_ARCH_frv_TRUE@ $(common_libcommon_a_OBJECTS) \
2283 @SIM_ENABLE_ARCH_frv_TRUE@ $(patsubst %,frv/%,$(SIM_NEW_COMMON_OBJS)) \
2284 @SIM_ENABLE_ARCH_frv_TRUE@ $(patsubst %,frv/dv-%.o,$(SIM_HW_DEVICES)) \
2285 @SIM_ENABLE_ARCH_frv_TRUE@ frv/modules.o \
2286 @SIM_ENABLE_ARCH_frv_TRUE@ \
2287 @SIM_ENABLE_ARCH_frv_TRUE@ frv/cgen-accfp.o \
2288 @SIM_ENABLE_ARCH_frv_TRUE@ frv/cgen-fpu.o \
2289 @SIM_ENABLE_ARCH_frv_TRUE@ frv/cgen-run.o \
2290 @SIM_ENABLE_ARCH_frv_TRUE@ frv/cgen-scache.o \
2291 @SIM_ENABLE_ARCH_frv_TRUE@ frv/cgen-trace.o \
2292 @SIM_ENABLE_ARCH_frv_TRUE@ frv/cgen-utils.o \
2293 @SIM_ENABLE_ARCH_frv_TRUE@ \
2294 @SIM_ENABLE_ARCH_frv_TRUE@ frv/arch.o \
2295 @SIM_ENABLE_ARCH_frv_TRUE@ frv/cgen-par.o \
2296 @SIM_ENABLE_ARCH_frv_TRUE@ frv/cpu.o \
2297 @SIM_ENABLE_ARCH_frv_TRUE@ frv/decode.o \
2298 @SIM_ENABLE_ARCH_frv_TRUE@ frv/frv.o \
2299 @SIM_ENABLE_ARCH_frv_TRUE@ frv/mloop.o \
2300 @SIM_ENABLE_ARCH_frv_TRUE@ frv/model.o \
2301 @SIM_ENABLE_ARCH_frv_TRUE@ frv/sem.o \
2302 @SIM_ENABLE_ARCH_frv_TRUE@ \
2303 @SIM_ENABLE_ARCH_frv_TRUE@ frv/cache.o \
2304 @SIM_ENABLE_ARCH_frv_TRUE@ frv/interrupts.o \
2305 @SIM_ENABLE_ARCH_frv_TRUE@ frv/memory.o \
2306 @SIM_ENABLE_ARCH_frv_TRUE@ frv/options.o \
2307 @SIM_ENABLE_ARCH_frv_TRUE@ frv/pipeline.o \
2308 @SIM_ENABLE_ARCH_frv_TRUE@ frv/profile.o \
2309 @SIM_ENABLE_ARCH_frv_TRUE@ frv/profile-fr400.o \
2310 @SIM_ENABLE_ARCH_frv_TRUE@ frv/profile-fr450.o \
2311 @SIM_ENABLE_ARCH_frv_TRUE@ frv/profile-fr500.o \
2312 @SIM_ENABLE_ARCH_frv_TRUE@ frv/profile-fr550.o \
2313 @SIM_ENABLE_ARCH_frv_TRUE@ frv/registers.o \
2314 @SIM_ENABLE_ARCH_frv_TRUE@ frv/reset.o \
2315 @SIM_ENABLE_ARCH_frv_TRUE@ frv/sim-if.o \
2316 @SIM_ENABLE_ARCH_frv_TRUE@ frv/traps.o
2317
2318 @SIM_ENABLE_ARCH_frv_TRUE@frv_run_SOURCES =
2319 @SIM_ENABLE_ARCH_frv_TRUE@frv_run_LDADD = \
2320 @SIM_ENABLE_ARCH_frv_TRUE@ frv/nrun.o \
2321 @SIM_ENABLE_ARCH_frv_TRUE@ frv/libsim.a \
2322 @SIM_ENABLE_ARCH_frv_TRUE@ $(SIM_COMMON_LIBS)
2323
2324 @SIM_ENABLE_ARCH_frv_TRUE@frvdocdir = $(docdir)/frv
2325 @SIM_ENABLE_ARCH_frv_TRUE@frvdoc_DATA = frv/README
2326 @SIM_ENABLE_ARCH_frv_TRUE@frv_BUILD_OUTPUTS = \
2327 @SIM_ENABLE_ARCH_frv_TRUE@ frv/mloop.c \
2328 @SIM_ENABLE_ARCH_frv_TRUE@ frv/stamp-mloop
2329
2330 @SIM_ENABLE_ARCH_ft32_TRUE@ft32_libsim_a_SOURCES =
2331 @SIM_ENABLE_ARCH_ft32_TRUE@ft32_libsim_a_LIBADD = \
2332 @SIM_ENABLE_ARCH_ft32_TRUE@ $(common_libcommon_a_OBJECTS) \
2333 @SIM_ENABLE_ARCH_ft32_TRUE@ $(patsubst %,ft32/%,$(SIM_NEW_COMMON_OBJS)) \
2334 @SIM_ENABLE_ARCH_ft32_TRUE@ $(patsubst %,ft32/dv-%.o,$(SIM_HW_DEVICES)) \
2335 @SIM_ENABLE_ARCH_ft32_TRUE@ ft32/interp.o \
2336 @SIM_ENABLE_ARCH_ft32_TRUE@ ft32/modules.o \
2337 @SIM_ENABLE_ARCH_ft32_TRUE@ ft32/sim-resume.o
2338
2339 @SIM_ENABLE_ARCH_ft32_TRUE@ft32_run_SOURCES =
2340 @SIM_ENABLE_ARCH_ft32_TRUE@ft32_run_LDADD = \
2341 @SIM_ENABLE_ARCH_ft32_TRUE@ ft32/nrun.o \
2342 @SIM_ENABLE_ARCH_ft32_TRUE@ ft32/libsim.a \
2343 @SIM_ENABLE_ARCH_ft32_TRUE@ $(SIM_COMMON_LIBS)
2344
2345 @SIM_ENABLE_ARCH_h8300_TRUE@h8300_libsim_a_SOURCES =
2346 @SIM_ENABLE_ARCH_h8300_TRUE@h8300_libsim_a_LIBADD = \
2347 @SIM_ENABLE_ARCH_h8300_TRUE@ $(common_libcommon_a_OBJECTS) \
2348 @SIM_ENABLE_ARCH_h8300_TRUE@ h8300/compile.o \
2349 @SIM_ENABLE_ARCH_h8300_TRUE@ $(patsubst %,h8300/%,$(SIM_NEW_COMMON_OBJS)) \
2350 @SIM_ENABLE_ARCH_h8300_TRUE@ $(patsubst %,h8300/dv-%.o,$(SIM_HW_DEVICES)) \
2351 @SIM_ENABLE_ARCH_h8300_TRUE@ h8300/modules.o \
2352 @SIM_ENABLE_ARCH_h8300_TRUE@ h8300/sim-resume.o
2353
2354 @SIM_ENABLE_ARCH_h8300_TRUE@h8300_run_SOURCES =
2355 @SIM_ENABLE_ARCH_h8300_TRUE@h8300_run_LDADD = \
2356 @SIM_ENABLE_ARCH_h8300_TRUE@ h8300/nrun.o \
2357 @SIM_ENABLE_ARCH_h8300_TRUE@ h8300/libsim.a \
2358 @SIM_ENABLE_ARCH_h8300_TRUE@ $(SIM_COMMON_LIBS)
2359
2360 @SIM_ENABLE_ARCH_iq2000_TRUE@iq2000_libsim_a_SOURCES =
2361 @SIM_ENABLE_ARCH_iq2000_TRUE@iq2000_libsim_a_LIBADD = \
2362 @SIM_ENABLE_ARCH_iq2000_TRUE@ $(common_libcommon_a_OBJECTS) \
2363 @SIM_ENABLE_ARCH_iq2000_TRUE@ $(patsubst %,iq2000/%,$(SIM_NEW_COMMON_OBJS)) \
2364 @SIM_ENABLE_ARCH_iq2000_TRUE@ $(patsubst %,iq2000/dv-%.o,$(SIM_HW_DEVICES)) \
2365 @SIM_ENABLE_ARCH_iq2000_TRUE@ iq2000/modules.o \
2366 @SIM_ENABLE_ARCH_iq2000_TRUE@ \
2367 @SIM_ENABLE_ARCH_iq2000_TRUE@ iq2000/cgen-run.o \
2368 @SIM_ENABLE_ARCH_iq2000_TRUE@ iq2000/cgen-scache.o \
2369 @SIM_ENABLE_ARCH_iq2000_TRUE@ iq2000/cgen-trace.o \
2370 @SIM_ENABLE_ARCH_iq2000_TRUE@ iq2000/cgen-utils.o \
2371 @SIM_ENABLE_ARCH_iq2000_TRUE@ \
2372 @SIM_ENABLE_ARCH_iq2000_TRUE@ iq2000/arch.o \
2373 @SIM_ENABLE_ARCH_iq2000_TRUE@ iq2000/cpu.o \
2374 @SIM_ENABLE_ARCH_iq2000_TRUE@ iq2000/decode.o \
2375 @SIM_ENABLE_ARCH_iq2000_TRUE@ iq2000/iq2000.o \
2376 @SIM_ENABLE_ARCH_iq2000_TRUE@ iq2000/sem.o \
2377 @SIM_ENABLE_ARCH_iq2000_TRUE@ iq2000/mloop.o \
2378 @SIM_ENABLE_ARCH_iq2000_TRUE@ iq2000/model.o \
2379 @SIM_ENABLE_ARCH_iq2000_TRUE@ \
2380 @SIM_ENABLE_ARCH_iq2000_TRUE@ iq2000/sim-if.o
2381
2382 @SIM_ENABLE_ARCH_iq2000_TRUE@iq2000_run_SOURCES =
2383 @SIM_ENABLE_ARCH_iq2000_TRUE@iq2000_run_LDADD = \
2384 @SIM_ENABLE_ARCH_iq2000_TRUE@ iq2000/nrun.o \
2385 @SIM_ENABLE_ARCH_iq2000_TRUE@ iq2000/libsim.a \
2386 @SIM_ENABLE_ARCH_iq2000_TRUE@ $(SIM_COMMON_LIBS)
2387
2388 @SIM_ENABLE_ARCH_iq2000_TRUE@iq2000_BUILD_OUTPUTS = \
2389 @SIM_ENABLE_ARCH_iq2000_TRUE@ iq2000/mloop.c \
2390 @SIM_ENABLE_ARCH_iq2000_TRUE@ iq2000/stamp-mloop
2391
2392 @SIM_ENABLE_ARCH_lm32_TRUE@lm32_libsim_a_SOURCES =
2393 @SIM_ENABLE_ARCH_lm32_TRUE@lm32_libsim_a_LIBADD = \
2394 @SIM_ENABLE_ARCH_lm32_TRUE@ $(common_libcommon_a_OBJECTS) \
2395 @SIM_ENABLE_ARCH_lm32_TRUE@ $(patsubst %,lm32/%,$(SIM_NEW_COMMON_OBJS)) \
2396 @SIM_ENABLE_ARCH_lm32_TRUE@ $(patsubst %,lm32/dv-%.o,$(SIM_HW_DEVICES)) \
2397 @SIM_ENABLE_ARCH_lm32_TRUE@ $(patsubst %,lm32/dv-%.o,$(lm32_SIM_EXTRA_HW_DEVICES)) \
2398 @SIM_ENABLE_ARCH_lm32_TRUE@ lm32/modules.o \
2399 @SIM_ENABLE_ARCH_lm32_TRUE@ \
2400 @SIM_ENABLE_ARCH_lm32_TRUE@ lm32/cgen-run.o \
2401 @SIM_ENABLE_ARCH_lm32_TRUE@ lm32/cgen-scache.o \
2402 @SIM_ENABLE_ARCH_lm32_TRUE@ lm32/cgen-trace.o \
2403 @SIM_ENABLE_ARCH_lm32_TRUE@ lm32/cgen-utils.o \
2404 @SIM_ENABLE_ARCH_lm32_TRUE@ \
2405 @SIM_ENABLE_ARCH_lm32_TRUE@ lm32/arch.o \
2406 @SIM_ENABLE_ARCH_lm32_TRUE@ lm32/cpu.o \
2407 @SIM_ENABLE_ARCH_lm32_TRUE@ lm32/decode.o \
2408 @SIM_ENABLE_ARCH_lm32_TRUE@ lm32/sem.o \
2409 @SIM_ENABLE_ARCH_lm32_TRUE@ lm32/mloop.o \
2410 @SIM_ENABLE_ARCH_lm32_TRUE@ lm32/model.o \
2411 @SIM_ENABLE_ARCH_lm32_TRUE@ \
2412 @SIM_ENABLE_ARCH_lm32_TRUE@ lm32/lm32.o \
2413 @SIM_ENABLE_ARCH_lm32_TRUE@ lm32/sim-if.o \
2414 @SIM_ENABLE_ARCH_lm32_TRUE@ lm32/traps.o \
2415 @SIM_ENABLE_ARCH_lm32_TRUE@ lm32/user.o
2416
2417 @SIM_ENABLE_ARCH_lm32_TRUE@lm32_run_SOURCES =
2418 @SIM_ENABLE_ARCH_lm32_TRUE@lm32_run_LDADD = \
2419 @SIM_ENABLE_ARCH_lm32_TRUE@ lm32/nrun.o \
2420 @SIM_ENABLE_ARCH_lm32_TRUE@ lm32/libsim.a \
2421 @SIM_ENABLE_ARCH_lm32_TRUE@ $(SIM_COMMON_LIBS)
2422
2423 @SIM_ENABLE_ARCH_lm32_TRUE@lm32_SIM_EXTRA_HW_DEVICES = lm32cpu lm32timer lm32uart
2424 @SIM_ENABLE_ARCH_lm32_TRUE@lm32_BUILD_OUTPUTS = \
2425 @SIM_ENABLE_ARCH_lm32_TRUE@ lm32/mloop.c \
2426 @SIM_ENABLE_ARCH_lm32_TRUE@ lm32/stamp-mloop
2427
2428 @SIM_ENABLE_ARCH_m32c_TRUE@AM_CPPFLAGS_m32c = -DTIMER_A
2429 @SIM_ENABLE_ARCH_m32c_TRUE@m32c_libsim_a_SOURCES =
2430 @SIM_ENABLE_ARCH_m32c_TRUE@m32c_libsim_a_LIBADD = \
2431 @SIM_ENABLE_ARCH_m32c_TRUE@ $(common_libcommon_a_OBJECTS) \
2432 @SIM_ENABLE_ARCH_m32c_TRUE@ m32c/gdb-if.o \
2433 @SIM_ENABLE_ARCH_m32c_TRUE@ m32c/int.o \
2434 @SIM_ENABLE_ARCH_m32c_TRUE@ m32c/load.o \
2435 @SIM_ENABLE_ARCH_m32c_TRUE@ m32c/m32c.o \
2436 @SIM_ENABLE_ARCH_m32c_TRUE@ m32c/mem.o \
2437 @SIM_ENABLE_ARCH_m32c_TRUE@ m32c/misc.o \
2438 @SIM_ENABLE_ARCH_m32c_TRUE@ m32c/modules.o \
2439 @SIM_ENABLE_ARCH_m32c_TRUE@ m32c/r8c.o \
2440 @SIM_ENABLE_ARCH_m32c_TRUE@ m32c/reg.o \
2441 @SIM_ENABLE_ARCH_m32c_TRUE@ m32c/srcdest.o \
2442 @SIM_ENABLE_ARCH_m32c_TRUE@ m32c/syscalls.o \
2443 @SIM_ENABLE_ARCH_m32c_TRUE@ m32c/trace.o
2444
2445 @SIM_ENABLE_ARCH_m32c_TRUE@m32c_run_SOURCES =
2446 @SIM_ENABLE_ARCH_m32c_TRUE@m32c_run_LDADD = \
2447 @SIM_ENABLE_ARCH_m32c_TRUE@ m32c/main.o \
2448 @SIM_ENABLE_ARCH_m32c_TRUE@ m32c/libsim.a \
2449 @SIM_ENABLE_ARCH_m32c_TRUE@ $(SIM_COMMON_LIBS)
2450
2451 @SIM_ENABLE_ARCH_m32c_TRUE@m32c_BUILD_OUTPUTS = \
2452 @SIM_ENABLE_ARCH_m32c_TRUE@ m32c/opc2c$(EXEEXT) \
2453 @SIM_ENABLE_ARCH_m32c_TRUE@ m32c/m32c.c \
2454 @SIM_ENABLE_ARCH_m32c_TRUE@ m32c/r8c.c
2455
2456 @SIM_ENABLE_ARCH_m32c_TRUE@m32c_opc2c_SOURCES = m32c/opc2c.c
2457
2458 # opc2c leaks memory, and therefore makes AddressSanitizer unhappy. Disable
2459 # leak detection while running it.
2460 @SIM_ENABLE_ARCH_m32c_TRUE@m32c_OPC2C_RUN = ASAN_OPTIONS=detect_leaks=0 m32c/opc2c$(EXEEXT)
2461 @SIM_ENABLE_ARCH_m32r_TRUE@AM_CFLAGS_m32r_cpu.o = -Wno-error
2462 @SIM_ENABLE_ARCH_m32r_TRUE@AM_CFLAGS_m32r_cpu2.o = -Wno-error
2463 @SIM_ENABLE_ARCH_m32r_TRUE@AM_CFLAGS_m32r_cpux.o = -Wno-error
2464 @SIM_ENABLE_ARCH_m32r_TRUE@AM_CFLAGS_m32r_m32r.o = -Wno-error
2465 @SIM_ENABLE_ARCH_m32r_TRUE@AM_CFLAGS_m32r_m32r2.o = -Wno-error
2466 @SIM_ENABLE_ARCH_m32r_TRUE@AM_CFLAGS_m32r_m32rx.o = -Wno-error
2467 @SIM_ENABLE_ARCH_m32r_TRUE@AM_CFLAGS_m32r_mloop.o = -Wno-error
2468 @SIM_ENABLE_ARCH_m32r_TRUE@AM_CFLAGS_m32r_mloop2.o = -Wno-error
2469 @SIM_ENABLE_ARCH_m32r_TRUE@AM_CFLAGS_m32r_mloopx.o = -Wno-error
2470 @SIM_ENABLE_ARCH_m32r_TRUE@AM_CFLAGS_m32r_sem.o = -Wno-error
2471 @SIM_ENABLE_ARCH_m32r_TRUE@AM_CFLAGS_m32r_sim_if.o = -Wno-error
2472 @SIM_ENABLE_ARCH_m32r_TRUE@AM_CFLAGS_m32r_traps.o = -Wno-error
2473 @SIM_ENABLE_ARCH_m32r_TRUE@m32r_libsim_a_SOURCES =
2474 @SIM_ENABLE_ARCH_m32r_TRUE@m32r_libsim_a_LIBADD = \
2475 @SIM_ENABLE_ARCH_m32r_TRUE@ $(common_libcommon_a_OBJECTS) \
2476 @SIM_ENABLE_ARCH_m32r_TRUE@ $(patsubst %,m32r/%,$(SIM_NEW_COMMON_OBJS)) \
2477 @SIM_ENABLE_ARCH_m32r_TRUE@ $(patsubst %,m32r/dv-%.o,$(SIM_HW_DEVICES)) \
2478 @SIM_ENABLE_ARCH_m32r_TRUE@ $(patsubst %,m32r/dv-%.o,$(m32r_SIM_EXTRA_HW_DEVICES)) \
2479 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r/modules.o \
2480 @SIM_ENABLE_ARCH_m32r_TRUE@ \
2481 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r/cgen-run.o \
2482 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r/cgen-scache.o \
2483 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r/cgen-trace.o \
2484 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r/cgen-utils.o \
2485 @SIM_ENABLE_ARCH_m32r_TRUE@ \
2486 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r/arch.o \
2487 @SIM_ENABLE_ARCH_m32r_TRUE@ \
2488 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r/m32r.o \
2489 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r/cpu.o \
2490 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r/decode.o \
2491 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r/sem.o \
2492 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r/model.o \
2493 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r/mloop.o \
2494 @SIM_ENABLE_ARCH_m32r_TRUE@ \
2495 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r/m32rx.o \
2496 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r/cpux.o \
2497 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r/decodex.o \
2498 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r/modelx.o \
2499 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r/mloopx.o \
2500 @SIM_ENABLE_ARCH_m32r_TRUE@ \
2501 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r/m32r2.o \
2502 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r/cpu2.o \
2503 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r/decode2.o \
2504 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r/model2.o \
2505 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r/mloop2.o \
2506 @SIM_ENABLE_ARCH_m32r_TRUE@ \
2507 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r/sim-if.o \
2508 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r/traps.o
2509
2510 @SIM_ENABLE_ARCH_m32r_TRUE@m32r_run_SOURCES =
2511 @SIM_ENABLE_ARCH_m32r_TRUE@m32r_run_LDADD = \
2512 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r/nrun.o \
2513 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r/libsim.a \
2514 @SIM_ENABLE_ARCH_m32r_TRUE@ $(SIM_COMMON_LIBS)
2515
2516 @SIM_ENABLE_ARCH_m32r_TRUE@m32r_SIM_EXTRA_HW_DEVICES = m32r_cache m32r_uart
2517 @SIM_ENABLE_ARCH_m32r_TRUE@m32r_BUILD_OUTPUTS = \
2518 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r/mloop.c \
2519 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r/stamp-mloop \
2520 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r/mloopx.c \
2521 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r/stamp-mloop-x \
2522 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r/mloop2.c \
2523 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r/stamp-mloop-2
2524
2525 @SIM_ENABLE_ARCH_m68hc11_TRUE@AM_CPPFLAGS_m68hc11 = \
2526 @SIM_ENABLE_ARCH_m68hc11_TRUE@ -DWITH_TARGET_WORD_BITSIZE=32 \
2527 @SIM_ENABLE_ARCH_m68hc11_TRUE@ -DWITH_TARGET_CELL_BITSIZE=32 \
2528 @SIM_ENABLE_ARCH_m68hc11_TRUE@ -DWITH_TARGET_ADDRESS_BITSIZE=32 \
2529 @SIM_ENABLE_ARCH_m68hc11_TRUE@ -DWITH_TARGET_WORD_MSB=31
2530
2531 @SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11_libsim_a_SOURCES =
2532 @SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11_libsim_a_LIBADD = \
2533 @SIM_ENABLE_ARCH_m68hc11_TRUE@ $(common_libcommon_a_OBJECTS) \
2534 @SIM_ENABLE_ARCH_m68hc11_TRUE@ m68hc11/interp.o \
2535 @SIM_ENABLE_ARCH_m68hc11_TRUE@ m68hc11/m68hc11int.o \
2536 @SIM_ENABLE_ARCH_m68hc11_TRUE@ m68hc11/m68hc12int.o \
2537 @SIM_ENABLE_ARCH_m68hc11_TRUE@ m68hc11/emulos.o \
2538 @SIM_ENABLE_ARCH_m68hc11_TRUE@ m68hc11/interrupts.o \
2539 @SIM_ENABLE_ARCH_m68hc11_TRUE@ m68hc11/m68hc11_sim.o \
2540 @SIM_ENABLE_ARCH_m68hc11_TRUE@ $(patsubst %,m68hc11/%,$(SIM_NEW_COMMON_OBJS)) \
2541 @SIM_ENABLE_ARCH_m68hc11_TRUE@ $(patsubst %,m68hc11/dv-%.o,$(SIM_HW_DEVICES)) \
2542 @SIM_ENABLE_ARCH_m68hc11_TRUE@ $(patsubst %,m68hc11/dv-%.o,$(m68hc11_SIM_EXTRA_HW_DEVICES)) \
2543 @SIM_ENABLE_ARCH_m68hc11_TRUE@ m68hc11/modules.o \
2544 @SIM_ENABLE_ARCH_m68hc11_TRUE@ m68hc11/sim-resume.o
2545
2546 @SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11_run_SOURCES =
2547 @SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11_run_LDADD = \
2548 @SIM_ENABLE_ARCH_m68hc11_TRUE@ m68hc11/nrun.o \
2549 @SIM_ENABLE_ARCH_m68hc11_TRUE@ m68hc11/libsim.a \
2550 @SIM_ENABLE_ARCH_m68hc11_TRUE@ $(SIM_COMMON_LIBS)
2551
2552 @SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11_SIM_EXTRA_HW_DEVICES = m68hc11 m68hc11sio m68hc11eepr m68hc11tim m68hc11spi nvram
2553 @SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11_BUILD_OUTPUTS = \
2554 @SIM_ENABLE_ARCH_m68hc11_TRUE@ m68hc11/gencode$(EXEEXT) \
2555 @SIM_ENABLE_ARCH_m68hc11_TRUE@ m68hc11/m68hc11int.c \
2556 @SIM_ENABLE_ARCH_m68hc11_TRUE@ m68hc11/m68hc12int.c
2557
2558 @SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11_gencode_SOURCES = m68hc11/gencode.c
2559 @SIM_ENABLE_ARCH_mcore_TRUE@mcore_libsim_a_SOURCES =
2560 @SIM_ENABLE_ARCH_mcore_TRUE@mcore_libsim_a_LIBADD = \
2561 @SIM_ENABLE_ARCH_mcore_TRUE@ $(common_libcommon_a_OBJECTS) \
2562 @SIM_ENABLE_ARCH_mcore_TRUE@ mcore/interp.o \
2563 @SIM_ENABLE_ARCH_mcore_TRUE@ $(patsubst %,mcore/%,$(SIM_NEW_COMMON_OBJS)) \
2564 @SIM_ENABLE_ARCH_mcore_TRUE@ $(patsubst %,mcore/dv-%.o,$(SIM_HW_DEVICES)) \
2565 @SIM_ENABLE_ARCH_mcore_TRUE@ mcore/modules.o \
2566 @SIM_ENABLE_ARCH_mcore_TRUE@ mcore/sim-resume.o
2567
2568 @SIM_ENABLE_ARCH_mcore_TRUE@mcore_run_SOURCES =
2569 @SIM_ENABLE_ARCH_mcore_TRUE@mcore_run_LDADD = \
2570 @SIM_ENABLE_ARCH_mcore_TRUE@ mcore/nrun.o \
2571 @SIM_ENABLE_ARCH_mcore_TRUE@ mcore/libsim.a \
2572 @SIM_ENABLE_ARCH_mcore_TRUE@ $(SIM_COMMON_LIBS)
2573
2574 @SIM_ENABLE_ARCH_microblaze_TRUE@microblaze_libsim_a_SOURCES =
2575 @SIM_ENABLE_ARCH_microblaze_TRUE@microblaze_libsim_a_LIBADD = \
2576 @SIM_ENABLE_ARCH_microblaze_TRUE@ $(common_libcommon_a_OBJECTS) \
2577 @SIM_ENABLE_ARCH_microblaze_TRUE@ microblaze/interp.o \
2578 @SIM_ENABLE_ARCH_microblaze_TRUE@ $(patsubst %,microblaze/%,$(SIM_NEW_COMMON_OBJS)) \
2579 @SIM_ENABLE_ARCH_microblaze_TRUE@ $(patsubst %,microblaze/dv-%.o,$(SIM_HW_DEVICES)) \
2580 @SIM_ENABLE_ARCH_microblaze_TRUE@ microblaze/modules.o \
2581 @SIM_ENABLE_ARCH_microblaze_TRUE@ microblaze/sim-resume.o
2582
2583 @SIM_ENABLE_ARCH_microblaze_TRUE@microblaze_run_SOURCES =
2584 @SIM_ENABLE_ARCH_microblaze_TRUE@microblaze_run_LDADD = \
2585 @SIM_ENABLE_ARCH_microblaze_TRUE@ microblaze/nrun.o \
2586 @SIM_ENABLE_ARCH_microblaze_TRUE@ microblaze/libsim.a \
2587 @SIM_ENABLE_ARCH_microblaze_TRUE@ $(SIM_COMMON_LIBS)
2588
2589 @SIM_ENABLE_ARCH_mips_TRUE@AM_CPPFLAGS_mips = \
2590 @SIM_ENABLE_ARCH_mips_TRUE@ @SIM_MIPS_SUBTARGET@ \
2591 @SIM_ENABLE_ARCH_mips_TRUE@ -DWITH_TARGET_WORD_BITSIZE=@SIM_MIPS_BITSIZE@ -DWITH_TARGET_WORD_MSB=WITH_TARGET_WORD_BITSIZE-1 \
2592 @SIM_ENABLE_ARCH_mips_TRUE@ -DWITH_FLOATING_POINT=HARD_FLOATING_POINT -DWITH_TARGET_FLOATING_POINT_BITSIZE=@SIM_MIPS_FPU_BITSIZE@
2593
2594 @SIM_ENABLE_ARCH_mips_TRUE@mips_GEN_OBJ = $(am__append_88) \
2595 @SIM_ENABLE_ARCH_mips_TRUE@ $(am__append_89) $(am__append_90)
2596 @SIM_ENABLE_ARCH_mips_TRUE@mips_libsim_a_SOURCES =
2597 @SIM_ENABLE_ARCH_mips_TRUE@mips_libsim_a_LIBADD = \
2598 @SIM_ENABLE_ARCH_mips_TRUE@ $(common_libcommon_a_OBJECTS) \
2599 @SIM_ENABLE_ARCH_mips_TRUE@ mips/interp.o \
2600 @SIM_ENABLE_ARCH_mips_TRUE@ $(mips_GEN_OBJ) \
2601 @SIM_ENABLE_ARCH_mips_TRUE@ $(patsubst %,mips/%,$(SIM_NEW_COMMON_OBJS)) \
2602 @SIM_ENABLE_ARCH_mips_TRUE@ $(patsubst %,mips/dv-%.o,$(SIM_HW_DEVICES)) \
2603 @SIM_ENABLE_ARCH_mips_TRUE@ $(patsubst %,mips/dv-%.o,$(mips_SIM_EXTRA_HW_DEVICES)) \
2604 @SIM_ENABLE_ARCH_mips_TRUE@ mips/cp1.o \
2605 @SIM_ENABLE_ARCH_mips_TRUE@ mips/dsp.o \
2606 @SIM_ENABLE_ARCH_mips_TRUE@ mips/mdmx.o \
2607 @SIM_ENABLE_ARCH_mips_TRUE@ mips/modules.o \
2608 @SIM_ENABLE_ARCH_mips_TRUE@ mips/sim-main.o \
2609 @SIM_ENABLE_ARCH_mips_TRUE@ mips/sim-resume.o
2610
2611 @SIM_ENABLE_ARCH_mips_TRUE@EXTRA_mips_libsim_a_DEPENDENCIES = $(SIM_MIPS_MULTI_OBJ)
2612 @SIM_ENABLE_ARCH_mips_TRUE@mips_run_SOURCES =
2613 @SIM_ENABLE_ARCH_mips_TRUE@mips_run_LDADD = \
2614 @SIM_ENABLE_ARCH_mips_TRUE@ mips/nrun.o \
2615 @SIM_ENABLE_ARCH_mips_TRUE@ mips/libsim.a \
2616 @SIM_ENABLE_ARCH_mips_TRUE@ $(SIM_COMMON_LIBS)
2617
2618 @SIM_ENABLE_ARCH_mips_TRUE@mips_SIM_EXTRA_HW_DEVICES = tx3904cpu tx3904irc tx3904tmr tx3904sio
2619 @SIM_ENABLE_ARCH_mips_TRUE@mips_BUILT_SRC_FROM_IGEN_ITABLE = \
2620 @SIM_ENABLE_ARCH_mips_TRUE@ mips/itable.h \
2621 @SIM_ENABLE_ARCH_mips_TRUE@ mips/itable.c
2622
2623 @SIM_ENABLE_ARCH_mips_TRUE@mips_BUILT_SRC_FROM_GEN_MODE_SINGLE = \
2624 @SIM_ENABLE_ARCH_mips_TRUE@ mips/icache.h \
2625 @SIM_ENABLE_ARCH_mips_TRUE@ mips/icache.c \
2626 @SIM_ENABLE_ARCH_mips_TRUE@ mips/idecode.h \
2627 @SIM_ENABLE_ARCH_mips_TRUE@ mips/idecode.c \
2628 @SIM_ENABLE_ARCH_mips_TRUE@ mips/semantics.h \
2629 @SIM_ENABLE_ARCH_mips_TRUE@ mips/semantics.c \
2630 @SIM_ENABLE_ARCH_mips_TRUE@ mips/model.h \
2631 @SIM_ENABLE_ARCH_mips_TRUE@ mips/model.c \
2632 @SIM_ENABLE_ARCH_mips_TRUE@ mips/support.h \
2633 @SIM_ENABLE_ARCH_mips_TRUE@ mips/support.c \
2634 @SIM_ENABLE_ARCH_mips_TRUE@ mips/engine.h \
2635 @SIM_ENABLE_ARCH_mips_TRUE@ mips/engine.c \
2636 @SIM_ENABLE_ARCH_mips_TRUE@ mips/irun.c
2637
2638 @SIM_ENABLE_ARCH_mips_TRUE@mips_BUILT_SRC_FROM_GEN_MODE_M16_M16 = \
2639 @SIM_ENABLE_ARCH_mips_TRUE@ mips/m16_icache.h \
2640 @SIM_ENABLE_ARCH_mips_TRUE@ mips/m16_icache.c \
2641 @SIM_ENABLE_ARCH_mips_TRUE@ mips/m16_idecode.h \
2642 @SIM_ENABLE_ARCH_mips_TRUE@ mips/m16_idecode.c \
2643 @SIM_ENABLE_ARCH_mips_TRUE@ mips/m16_semantics.h \
2644 @SIM_ENABLE_ARCH_mips_TRUE@ mips/m16_semantics.c \
2645 @SIM_ENABLE_ARCH_mips_TRUE@ mips/m16_model.h \
2646 @SIM_ENABLE_ARCH_mips_TRUE@ mips/m16_model.c \
2647 @SIM_ENABLE_ARCH_mips_TRUE@ mips/m16_support.h \
2648 @SIM_ENABLE_ARCH_mips_TRUE@ mips/m16_support.c \
2649 @SIM_ENABLE_ARCH_mips_TRUE@mips_BUILT_SRC_FROM_GEN_MODE_M16_M32 = \
2650 @SIM_ENABLE_ARCH_mips_TRUE@ mips/m32_icache.h \
2651 @SIM_ENABLE_ARCH_mips_TRUE@ mips/m32_icache.c \
2652 @SIM_ENABLE_ARCH_mips_TRUE@ mips/m32_idecode.h \
2653 @SIM_ENABLE_ARCH_mips_TRUE@ mips/m32_idecode.c \
2654 @SIM_ENABLE_ARCH_mips_TRUE@ mips/m32_semantics.h \
2655 @SIM_ENABLE_ARCH_mips_TRUE@ mips/m32_semantics.c \
2656 @SIM_ENABLE_ARCH_mips_TRUE@ mips/m32_model.h \
2657 @SIM_ENABLE_ARCH_mips_TRUE@ mips/m32_model.c \
2658 @SIM_ENABLE_ARCH_mips_TRUE@ mips/m32_support.h \
2659 @SIM_ENABLE_ARCH_mips_TRUE@ mips/m32_support.c
2660
2661 @SIM_ENABLE_ARCH_mips_TRUE@mips_BUILD_OUTPUTS = \
2662 @SIM_ENABLE_ARCH_mips_TRUE@ $(mips_BUILT_SRC_FROM_IGEN_ITABLE) \
2663 @SIM_ENABLE_ARCH_mips_TRUE@ mips/stamp-igen-itable \
2664 @SIM_ENABLE_ARCH_mips_TRUE@ $(am__append_95) $(am__append_96) \
2665 @SIM_ENABLE_ARCH_mips_TRUE@ $(am__append_97)
2666 @SIM_ENABLE_ARCH_mips_TRUE@mips_IGEN_TRACE = # -G omit-line-numbers # -G trace-rule-selection -G trace-rule-rejection -G trace-entries # -G trace-all
2667 @SIM_ENABLE_ARCH_mips_TRUE@mips_IGEN_INSN = $(srcdir)/mips/mips.igen
2668 @SIM_ENABLE_ARCH_mips_TRUE@mips_IGEN_INSN_INC = \
2669 @SIM_ENABLE_ARCH_mips_TRUE@ mips/dsp.igen \
2670 @SIM_ENABLE_ARCH_mips_TRUE@ mips/dsp2.igen \
2671 @SIM_ENABLE_ARCH_mips_TRUE@ mips/m16.igen \
2672 @SIM_ENABLE_ARCH_mips_TRUE@ mips/m16e.igen \
2673 @SIM_ENABLE_ARCH_mips_TRUE@ mips/mdmx.igen \
2674 @SIM_ENABLE_ARCH_mips_TRUE@ mips/micromipsdsp.igen \
2675 @SIM_ENABLE_ARCH_mips_TRUE@ mips/micromips.igen \
2676 @SIM_ENABLE_ARCH_mips_TRUE@ mips/mips3264r2.igen \
2677 @SIM_ENABLE_ARCH_mips_TRUE@ mips/mips3264r6.igen \
2678 @SIM_ENABLE_ARCH_mips_TRUE@ mips/mips3d.igen \
2679 @SIM_ENABLE_ARCH_mips_TRUE@ mips/sb1.igen \
2680 @SIM_ENABLE_ARCH_mips_TRUE@ mips/tx.igen \
2681 @SIM_ENABLE_ARCH_mips_TRUE@ mips/vr.igen
2682
2683 @SIM_ENABLE_ARCH_mips_TRUE@mips_IGEN_DC = $(srcdir)/mips/mips.dc
2684 @SIM_ENABLE_ARCH_mips_TRUE@mips_M16_DC = $(srcdir)/mips/m16.dc
2685 @SIM_ENABLE_ARCH_mips_TRUE@mips_MICROMIPS32_DC = $(srcdir)/mips/micromips.dc
2686 @SIM_ENABLE_ARCH_mips_TRUE@mips_MICROMIPS16_DC = $(srcdir)/mips/micromips16.dc
2687 @SIM_ENABLE_ARCH_mn10300_TRUE@AM_CPPFLAGS_mn10300 = \
2688 @SIM_ENABLE_ARCH_mn10300_TRUE@ -DPOLL_QUIT_INTERVAL=0x20 \
2689 @SIM_ENABLE_ARCH_mn10300_TRUE@ -DWITH_TARGET_WORD_BITSIZE=32 -DWITH_TARGET_WORD_MSB=31
2690
2691 @SIM_ENABLE_ARCH_mn10300_TRUE@mn10300_libsim_a_SOURCES =
2692 @SIM_ENABLE_ARCH_mn10300_TRUE@mn10300_libsim_a_LIBADD = \
2693 @SIM_ENABLE_ARCH_mn10300_TRUE@ $(common_libcommon_a_OBJECTS) \
2694 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/itable.o \
2695 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/semantics.o \
2696 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/idecode.o \
2697 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/icache.o \
2698 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/engine.o \
2699 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/irun.o \
2700 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/support.o \
2701 @SIM_ENABLE_ARCH_mn10300_TRUE@ $(patsubst %,mn10300/%,$(SIM_NEW_COMMON_OBJS)) \
2702 @SIM_ENABLE_ARCH_mn10300_TRUE@ $(patsubst %,mn10300/dv-%.o,$(SIM_HW_DEVICES)) \
2703 @SIM_ENABLE_ARCH_mn10300_TRUE@ $(patsubst %,mn10300/dv-%.o,$(mn10300_SIM_EXTRA_HW_DEVICES)) \
2704 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/interp.o \
2705 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/modules.o \
2706 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/op_utils.o \
2707 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/sim-resume.o
2708
2709 @SIM_ENABLE_ARCH_mn10300_TRUE@mn10300_run_SOURCES =
2710 @SIM_ENABLE_ARCH_mn10300_TRUE@mn10300_run_LDADD = \
2711 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/nrun.o \
2712 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/libsim.a \
2713 @SIM_ENABLE_ARCH_mn10300_TRUE@ $(SIM_COMMON_LIBS)
2714
2715 @SIM_ENABLE_ARCH_mn10300_TRUE@mn10300_SIM_EXTRA_HW_DEVICES = mn103cpu mn103int mn103tim mn103ser mn103iop
2716 @SIM_ENABLE_ARCH_mn10300_TRUE@mn10300_BUILT_SRC_FROM_IGEN = \
2717 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/icache.h \
2718 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/icache.c \
2719 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/idecode.h \
2720 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/idecode.c \
2721 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/semantics.h \
2722 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/semantics.c \
2723 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/model.h \
2724 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/model.c \
2725 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/support.h \
2726 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/support.c \
2727 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/itable.h \
2728 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/itable.c \
2729 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/engine.h \
2730 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/engine.c \
2731 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/irun.c
2732
2733 @SIM_ENABLE_ARCH_mn10300_TRUE@mn10300_BUILD_OUTPUTS = \
2734 @SIM_ENABLE_ARCH_mn10300_TRUE@ $(mn10300_BUILT_SRC_FROM_IGEN) \
2735 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/stamp-igen
2736
2737 @SIM_ENABLE_ARCH_mn10300_TRUE@mn10300_IGEN_TRACE = # -G omit-line-numbers # -G trace-rule-selection -G trace-rule-rejection -G trace-entries
2738 @SIM_ENABLE_ARCH_mn10300_TRUE@mn10300_IGEN_INSN = $(srcdir)/mn10300/mn10300.igen
2739 @SIM_ENABLE_ARCH_mn10300_TRUE@mn10300_IGEN_INSN_INC = mn10300/am33.igen mn10300/am33-2.igen
2740 @SIM_ENABLE_ARCH_mn10300_TRUE@mn10300_IGEN_DC = $(srcdir)/mn10300/mn10300.dc
2741 @SIM_ENABLE_ARCH_moxie_TRUE@AM_CPPFLAGS_moxie = -DDTB="\"$(dtbdir)/moxie-gdb.dtb\""
2742 @SIM_ENABLE_ARCH_moxie_TRUE@moxie_libsim_a_SOURCES =
2743 @SIM_ENABLE_ARCH_moxie_TRUE@moxie_libsim_a_LIBADD = \
2744 @SIM_ENABLE_ARCH_moxie_TRUE@ $(common_libcommon_a_OBJECTS) \
2745 @SIM_ENABLE_ARCH_moxie_TRUE@ $(patsubst %,moxie/%,$(SIM_NEW_COMMON_OBJS)) \
2746 @SIM_ENABLE_ARCH_moxie_TRUE@ $(patsubst %,moxie/dv-%.o,$(SIM_HW_DEVICES)) \
2747 @SIM_ENABLE_ARCH_moxie_TRUE@ moxie/interp.o \
2748 @SIM_ENABLE_ARCH_moxie_TRUE@ moxie/modules.o \
2749 @SIM_ENABLE_ARCH_moxie_TRUE@ moxie/sim-resume.o
2750
2751 @SIM_ENABLE_ARCH_moxie_TRUE@moxie_run_SOURCES =
2752 @SIM_ENABLE_ARCH_moxie_TRUE@moxie_run_LDADD = \
2753 @SIM_ENABLE_ARCH_moxie_TRUE@ moxie/nrun.o \
2754 @SIM_ENABLE_ARCH_moxie_TRUE@ moxie/libsim.a \
2755 @SIM_ENABLE_ARCH_moxie_TRUE@ $(SIM_COMMON_LIBS)
2756
2757 @SIM_ENABLE_ARCH_moxie_TRUE@dtbdir = $(datadir)/gdb/dtb
2758 @SIM_ENABLE_ARCH_moxie_TRUE@dtb_DATA = moxie/moxie-gdb.dtb
2759 @SIM_ENABLE_ARCH_msp430_TRUE@msp430_libsim_a_SOURCES =
2760 @SIM_ENABLE_ARCH_msp430_TRUE@msp430_libsim_a_LIBADD = \
2761 @SIM_ENABLE_ARCH_msp430_TRUE@ $(common_libcommon_a_OBJECTS) \
2762 @SIM_ENABLE_ARCH_msp430_TRUE@ $(patsubst %,msp430/%,$(SIM_NEW_COMMON_OBJS)) \
2763 @SIM_ENABLE_ARCH_msp430_TRUE@ $(patsubst %,msp430/dv-%.o,$(SIM_HW_DEVICES)) \
2764 @SIM_ENABLE_ARCH_msp430_TRUE@ msp430/msp430-sim.o \
2765 @SIM_ENABLE_ARCH_msp430_TRUE@ msp430/modules.o \
2766 @SIM_ENABLE_ARCH_msp430_TRUE@ msp430/sim-resume.o
2767
2768 @SIM_ENABLE_ARCH_msp430_TRUE@msp430_run_SOURCES =
2769 @SIM_ENABLE_ARCH_msp430_TRUE@msp430_run_LDADD = \
2770 @SIM_ENABLE_ARCH_msp430_TRUE@ msp430/nrun.o \
2771 @SIM_ENABLE_ARCH_msp430_TRUE@ msp430/libsim.a \
2772 @SIM_ENABLE_ARCH_msp430_TRUE@ $(SIM_COMMON_LIBS)
2773
2774 @SIM_ENABLE_ARCH_or1k_TRUE@or1k_libsim_a_SOURCES =
2775 @SIM_ENABLE_ARCH_or1k_TRUE@or1k_libsim_a_LIBADD = \
2776 @SIM_ENABLE_ARCH_or1k_TRUE@ $(common_libcommon_a_OBJECTS) \
2777 @SIM_ENABLE_ARCH_or1k_TRUE@ $(patsubst %,or1k/%,$(SIM_NEW_COMMON_OBJS)) \
2778 @SIM_ENABLE_ARCH_or1k_TRUE@ $(patsubst %,or1k/dv-%.o,$(SIM_HW_DEVICES)) \
2779 @SIM_ENABLE_ARCH_or1k_TRUE@ or1k/modules.o \
2780 @SIM_ENABLE_ARCH_or1k_TRUE@ \
2781 @SIM_ENABLE_ARCH_or1k_TRUE@ or1k/cgen-accfp.o \
2782 @SIM_ENABLE_ARCH_or1k_TRUE@ or1k/cgen-fpu.o \
2783 @SIM_ENABLE_ARCH_or1k_TRUE@ or1k/cgen-run.o \
2784 @SIM_ENABLE_ARCH_or1k_TRUE@ or1k/cgen-scache.o \
2785 @SIM_ENABLE_ARCH_or1k_TRUE@ or1k/cgen-trace.o \
2786 @SIM_ENABLE_ARCH_or1k_TRUE@ or1k/cgen-utils.o \
2787 @SIM_ENABLE_ARCH_or1k_TRUE@ \
2788 @SIM_ENABLE_ARCH_or1k_TRUE@ or1k/arch.o \
2789 @SIM_ENABLE_ARCH_or1k_TRUE@ or1k/cpu.o \
2790 @SIM_ENABLE_ARCH_or1k_TRUE@ or1k/decode.o \
2791 @SIM_ENABLE_ARCH_or1k_TRUE@ or1k/mloop.o \
2792 @SIM_ENABLE_ARCH_or1k_TRUE@ or1k/model.o \
2793 @SIM_ENABLE_ARCH_or1k_TRUE@ or1k/sem.o \
2794 @SIM_ENABLE_ARCH_or1k_TRUE@ \
2795 @SIM_ENABLE_ARCH_or1k_TRUE@ or1k/or1k.o \
2796 @SIM_ENABLE_ARCH_or1k_TRUE@ or1k/sim-if.o \
2797 @SIM_ENABLE_ARCH_or1k_TRUE@ or1k/traps.o
2798
2799 @SIM_ENABLE_ARCH_or1k_TRUE@or1k_run_SOURCES =
2800 @SIM_ENABLE_ARCH_or1k_TRUE@or1k_run_LDADD = \
2801 @SIM_ENABLE_ARCH_or1k_TRUE@ or1k/nrun.o \
2802 @SIM_ENABLE_ARCH_or1k_TRUE@ or1k/libsim.a \
2803 @SIM_ENABLE_ARCH_or1k_TRUE@ $(SIM_COMMON_LIBS)
2804
2805 @SIM_ENABLE_ARCH_or1k_TRUE@or1kdocdir = $(docdir)/or1k
2806 @SIM_ENABLE_ARCH_or1k_TRUE@or1kdoc_DATA = or1k/README
2807 @SIM_ENABLE_ARCH_or1k_TRUE@or1k_BUILD_OUTPUTS = \
2808 @SIM_ENABLE_ARCH_or1k_TRUE@ or1k/mloop.c \
2809 @SIM_ENABLE_ARCH_or1k_TRUE@ or1k/stamp-mloop
2810
2811 @SIM_ENABLE_ARCH_ppc_TRUE@ppc_run_SOURCES =
2812 @SIM_ENABLE_ARCH_ppc_TRUE@ppc_run_LDADD = \
2813 @SIM_ENABLE_ARCH_ppc_TRUE@ ppc/main.o \
2814 @SIM_ENABLE_ARCH_ppc_TRUE@ ppc/libsim.a \
2815 @SIM_ENABLE_ARCH_ppc_TRUE@ $(SIM_COMMON_LIBS)
2816
2817 @SIM_ENABLE_ARCH_ppc_TRUE@ppcdocdir = $(docdir)/ppc
2818 @SIM_ENABLE_ARCH_ppc_TRUE@ppcdoc_DATA = ppc/BUGS ppc/INSTALL ppc/README ppc/RUN
2819 @SIM_ENABLE_ARCH_pru_TRUE@pru_libsim_a_SOURCES =
2820 @SIM_ENABLE_ARCH_pru_TRUE@pru_libsim_a_LIBADD = \
2821 @SIM_ENABLE_ARCH_pru_TRUE@ $(common_libcommon_a_OBJECTS) \
2822 @SIM_ENABLE_ARCH_pru_TRUE@ $(patsubst %,pru/%,$(SIM_NEW_COMMON_OBJS)) \
2823 @SIM_ENABLE_ARCH_pru_TRUE@ $(patsubst %,pru/dv-%.o,$(SIM_HW_DEVICES)) \
2824 @SIM_ENABLE_ARCH_pru_TRUE@ pru/interp.o \
2825 @SIM_ENABLE_ARCH_pru_TRUE@ pru/modules.o \
2826 @SIM_ENABLE_ARCH_pru_TRUE@ pru/sim-resume.o
2827
2828 @SIM_ENABLE_ARCH_pru_TRUE@pru_run_SOURCES =
2829 @SIM_ENABLE_ARCH_pru_TRUE@pru_run_LDADD = \
2830 @SIM_ENABLE_ARCH_pru_TRUE@ pru/nrun.o \
2831 @SIM_ENABLE_ARCH_pru_TRUE@ pru/libsim.a \
2832 @SIM_ENABLE_ARCH_pru_TRUE@ $(SIM_COMMON_LIBS)
2833
2834 @SIM_ENABLE_ARCH_riscv_TRUE@riscv_libsim_a_SOURCES =
2835 @SIM_ENABLE_ARCH_riscv_TRUE@riscv_libsim_a_LIBADD = \
2836 @SIM_ENABLE_ARCH_riscv_TRUE@ $(common_libcommon_a_OBJECTS) \
2837 @SIM_ENABLE_ARCH_riscv_TRUE@ $(patsubst %,riscv/%,$(SIM_NEW_COMMON_OBJS)) \
2838 @SIM_ENABLE_ARCH_riscv_TRUE@ $(patsubst %,riscv/dv-%.o,$(SIM_HW_DEVICES)) \
2839 @SIM_ENABLE_ARCH_riscv_TRUE@ riscv/interp.o \
2840 @SIM_ENABLE_ARCH_riscv_TRUE@ riscv/machs.o \
2841 @SIM_ENABLE_ARCH_riscv_TRUE@ riscv/modules.o \
2842 @SIM_ENABLE_ARCH_riscv_TRUE@ riscv/sim-main.o \
2843 @SIM_ENABLE_ARCH_riscv_TRUE@ riscv/sim-resume.o
2844
2845 @SIM_ENABLE_ARCH_riscv_TRUE@riscv_run_SOURCES =
2846 @SIM_ENABLE_ARCH_riscv_TRUE@riscv_run_LDADD = \
2847 @SIM_ENABLE_ARCH_riscv_TRUE@ riscv/nrun.o \
2848 @SIM_ENABLE_ARCH_riscv_TRUE@ riscv/libsim.a \
2849 @SIM_ENABLE_ARCH_riscv_TRUE@ $(SIM_COMMON_LIBS)
2850
2851 @SIM_ENABLE_ARCH_rl78_TRUE@rl78_libsim_a_SOURCES =
2852 @SIM_ENABLE_ARCH_rl78_TRUE@rl78_libsim_a_LIBADD = \
2853 @SIM_ENABLE_ARCH_rl78_TRUE@ $(common_libcommon_a_OBJECTS) \
2854 @SIM_ENABLE_ARCH_rl78_TRUE@ rl78/load.o \
2855 @SIM_ENABLE_ARCH_rl78_TRUE@ rl78/mem.o \
2856 @SIM_ENABLE_ARCH_rl78_TRUE@ rl78/cpu.o \
2857 @SIM_ENABLE_ARCH_rl78_TRUE@ rl78/rl78.o \
2858 @SIM_ENABLE_ARCH_rl78_TRUE@ rl78/gdb-if.o \
2859 @SIM_ENABLE_ARCH_rl78_TRUE@ rl78/modules.o \
2860 @SIM_ENABLE_ARCH_rl78_TRUE@ rl78/trace.o
2861
2862 @SIM_ENABLE_ARCH_rl78_TRUE@rl78_run_SOURCES =
2863 @SIM_ENABLE_ARCH_rl78_TRUE@rl78_run_LDADD = \
2864 @SIM_ENABLE_ARCH_rl78_TRUE@ rl78/main.o \
2865 @SIM_ENABLE_ARCH_rl78_TRUE@ rl78/libsim.a \
2866 @SIM_ENABLE_ARCH_rl78_TRUE@ $(SIM_COMMON_LIBS)
2867
2868 @SIM_ENABLE_ARCH_rx_TRUE@rx_libsim_a_SOURCES =
2869 @SIM_ENABLE_ARCH_rx_TRUE@rx_libsim_a_LIBADD = \
2870 @SIM_ENABLE_ARCH_rx_TRUE@ $(common_libcommon_a_OBJECTS) \
2871 @SIM_ENABLE_ARCH_rx_TRUE@ rx/fpu.o \
2872 @SIM_ENABLE_ARCH_rx_TRUE@ rx/load.o \
2873 @SIM_ENABLE_ARCH_rx_TRUE@ rx/mem.o \
2874 @SIM_ENABLE_ARCH_rx_TRUE@ rx/misc.o \
2875 @SIM_ENABLE_ARCH_rx_TRUE@ rx/reg.o \
2876 @SIM_ENABLE_ARCH_rx_TRUE@ rx/rx.o \
2877 @SIM_ENABLE_ARCH_rx_TRUE@ rx/syscalls.o \
2878 @SIM_ENABLE_ARCH_rx_TRUE@ rx/trace.o \
2879 @SIM_ENABLE_ARCH_rx_TRUE@ rx/gdb-if.o \
2880 @SIM_ENABLE_ARCH_rx_TRUE@ rx/err.o \
2881 @SIM_ENABLE_ARCH_rx_TRUE@ rx/modules.o
2882
2883 @SIM_ENABLE_ARCH_rx_TRUE@rx_run_SOURCES =
2884 @SIM_ENABLE_ARCH_rx_TRUE@rx_run_LDADD = \
2885 @SIM_ENABLE_ARCH_rx_TRUE@ rx/main.o \
2886 @SIM_ENABLE_ARCH_rx_TRUE@ rx/libsim.a \
2887 @SIM_ENABLE_ARCH_rx_TRUE@ $(SIM_COMMON_LIBS)
2888
2889 @SIM_ENABLE_ARCH_rx_TRUE@rxdocdir = $(docdir)/rx
2890 @SIM_ENABLE_ARCH_rx_TRUE@rxdoc_DATA = rx/README.txt
2891 @SIM_ENABLE_ARCH_sh_TRUE@sh_libsim_a_SOURCES =
2892 @SIM_ENABLE_ARCH_sh_TRUE@sh_libsim_a_LIBADD = \
2893 @SIM_ENABLE_ARCH_sh_TRUE@ $(common_libcommon_a_OBJECTS) \
2894 @SIM_ENABLE_ARCH_sh_TRUE@ sh/interp.o \
2895 @SIM_ENABLE_ARCH_sh_TRUE@ $(patsubst %,sh/%,$(SIM_NEW_COMMON_OBJS)) \
2896 @SIM_ENABLE_ARCH_sh_TRUE@ $(patsubst %,sh/dv-%.o,$(SIM_HW_DEVICES)) \
2897 @SIM_ENABLE_ARCH_sh_TRUE@ sh/modules.o \
2898 @SIM_ENABLE_ARCH_sh_TRUE@ sh/table.o
2899
2900 @SIM_ENABLE_ARCH_sh_TRUE@sh_run_SOURCES =
2901 @SIM_ENABLE_ARCH_sh_TRUE@sh_run_LDADD = \
2902 @SIM_ENABLE_ARCH_sh_TRUE@ sh/nrun.o \
2903 @SIM_ENABLE_ARCH_sh_TRUE@ sh/libsim.a \
2904 @SIM_ENABLE_ARCH_sh_TRUE@ $(SIM_COMMON_LIBS)
2905
2906 @SIM_ENABLE_ARCH_sh_TRUE@sh_BUILD_OUTPUTS = \
2907 @SIM_ENABLE_ARCH_sh_TRUE@ sh/gencode$(EXEEXT) \
2908 @SIM_ENABLE_ARCH_sh_TRUE@ sh/table.c
2909
2910 @SIM_ENABLE_ARCH_sh_TRUE@sh_gencode_SOURCES = sh/gencode.c
2911 @SIM_ENABLE_ARCH_v850_TRUE@v850_libsim_a_SOURCES =
2912 @SIM_ENABLE_ARCH_v850_TRUE@v850_libsim_a_LIBADD = \
2913 @SIM_ENABLE_ARCH_v850_TRUE@ $(common_libcommon_a_OBJECTS) \
2914 @SIM_ENABLE_ARCH_v850_TRUE@ $(patsubst %,v850/%,$(SIM_NEW_COMMON_OBJS)) \
2915 @SIM_ENABLE_ARCH_v850_TRUE@ $(patsubst %,v850/dv-%.o,$(SIM_HW_DEVICES)) \
2916 @SIM_ENABLE_ARCH_v850_TRUE@ v850/simops.o \
2917 @SIM_ENABLE_ARCH_v850_TRUE@ v850/interp.o \
2918 @SIM_ENABLE_ARCH_v850_TRUE@ v850/itable.o \
2919 @SIM_ENABLE_ARCH_v850_TRUE@ v850/semantics.o \
2920 @SIM_ENABLE_ARCH_v850_TRUE@ v850/idecode.o \
2921 @SIM_ENABLE_ARCH_v850_TRUE@ v850/icache.o \
2922 @SIM_ENABLE_ARCH_v850_TRUE@ v850/engine.o \
2923 @SIM_ENABLE_ARCH_v850_TRUE@ v850/irun.o \
2924 @SIM_ENABLE_ARCH_v850_TRUE@ v850/support.o \
2925 @SIM_ENABLE_ARCH_v850_TRUE@ v850/modules.o \
2926 @SIM_ENABLE_ARCH_v850_TRUE@ v850/sim-resume.o
2927
2928 @SIM_ENABLE_ARCH_v850_TRUE@v850_run_SOURCES =
2929 @SIM_ENABLE_ARCH_v850_TRUE@v850_run_LDADD = \
2930 @SIM_ENABLE_ARCH_v850_TRUE@ v850/nrun.o \
2931 @SIM_ENABLE_ARCH_v850_TRUE@ v850/libsim.a \
2932 @SIM_ENABLE_ARCH_v850_TRUE@ $(SIM_COMMON_LIBS)
2933
2934 @SIM_ENABLE_ARCH_v850_TRUE@v850_BUILT_SRC_FROM_IGEN = \
2935 @SIM_ENABLE_ARCH_v850_TRUE@ v850/icache.h \
2936 @SIM_ENABLE_ARCH_v850_TRUE@ v850/icache.c \
2937 @SIM_ENABLE_ARCH_v850_TRUE@ v850/idecode.h \
2938 @SIM_ENABLE_ARCH_v850_TRUE@ v850/idecode.c \
2939 @SIM_ENABLE_ARCH_v850_TRUE@ v850/semantics.h \
2940 @SIM_ENABLE_ARCH_v850_TRUE@ v850/semantics.c \
2941 @SIM_ENABLE_ARCH_v850_TRUE@ v850/model.h \
2942 @SIM_ENABLE_ARCH_v850_TRUE@ v850/model.c \
2943 @SIM_ENABLE_ARCH_v850_TRUE@ v850/support.h \
2944 @SIM_ENABLE_ARCH_v850_TRUE@ v850/support.c \
2945 @SIM_ENABLE_ARCH_v850_TRUE@ v850/itable.h \
2946 @SIM_ENABLE_ARCH_v850_TRUE@ v850/itable.c \
2947 @SIM_ENABLE_ARCH_v850_TRUE@ v850/engine.h \
2948 @SIM_ENABLE_ARCH_v850_TRUE@ v850/engine.c \
2949 @SIM_ENABLE_ARCH_v850_TRUE@ v850/irun.c
2950
2951 @SIM_ENABLE_ARCH_v850_TRUE@v850_BUILD_OUTPUTS = \
2952 @SIM_ENABLE_ARCH_v850_TRUE@ $(v850_BUILT_SRC_FROM_IGEN) \
2953 @SIM_ENABLE_ARCH_v850_TRUE@ v850/stamp-igen
2954
2955 @SIM_ENABLE_ARCH_v850_TRUE@v850_IGEN_TRACE = # -G omit-line-numbers # -G trace-rule-selection -G trace-rule-rejection -G trace-entries
2956 @SIM_ENABLE_ARCH_v850_TRUE@v850_IGEN_INSN = $(srcdir)/v850/v850.igen
2957 @SIM_ENABLE_ARCH_v850_TRUE@v850_IGEN_DC = $(srcdir)/v850/v850.dc
2958 all: $(BUILT_SOURCES) config.h
2959 $(MAKE) $(AM_MAKEFLAGS) all-recursive
2960
2961 .SUFFIXES:
2962 .SUFFIXES: .c .lo .log .o .obj .test .test$(EXEEXT) .trs
2963 am--refresh: Makefile
2964 @:
2965 $(srcdir)/Makefile.in: @MAINTAINER_MODE_TRUE@ $(srcdir)/Makefile.am $(srcdir)/common/local.mk $(srcdir)/igen/local.mk $(srcdir)/testsuite/local.mk $(srcdir)/testsuite/common/local.mk $(srcdir)/aarch64/local.mk $(srcdir)/arm/local.mk $(srcdir)/avr/local.mk $(srcdir)/bfin/local.mk $(srcdir)/bpf/local.mk $(srcdir)/cr16/local.mk $(srcdir)/cris/local.mk $(srcdir)/d10v/local.mk $(srcdir)/erc32/local.mk $(srcdir)/example-synacor/local.mk $(srcdir)/frv/local.mk $(srcdir)/ft32/local.mk $(srcdir)/h8300/local.mk $(srcdir)/iq2000/local.mk $(srcdir)/lm32/local.mk $(srcdir)/m32c/local.mk $(srcdir)/m32r/local.mk $(srcdir)/m68hc11/local.mk $(srcdir)/mcore/local.mk $(srcdir)/microblaze/local.mk $(srcdir)/mips/local.mk $(srcdir)/mn10300/local.mk $(srcdir)/moxie/local.mk $(srcdir)/msp430/local.mk $(srcdir)/or1k/local.mk $(srcdir)/ppc/local.mk $(srcdir)/pru/local.mk $(srcdir)/riscv/local.mk $(srcdir)/rl78/local.mk $(srcdir)/rx/local.mk $(srcdir)/sh/local.mk $(srcdir)/v850/local.mk $(am__configure_deps)
2966 @for dep in $?; do \
2967 case '$(am__configure_deps)' in \
2968 *$$dep*) \
2969 echo ' cd $(srcdir) && $(AUTOMAKE) --foreign'; \
2970 $(am__cd) $(srcdir) && $(AUTOMAKE) --foreign \
2971 && exit 0; \
2972 exit 1;; \
2973 esac; \
2974 done; \
2975 echo ' cd $(top_srcdir) && $(AUTOMAKE) --foreign Makefile'; \
2976 $(am__cd) $(top_srcdir) && \
2977 $(AUTOMAKE) --foreign Makefile
2978 Makefile: $(srcdir)/Makefile.in $(top_builddir)/config.status
2979 @case '$?' in \
2980 *config.status*) \
2981 echo ' $(SHELL) ./config.status'; \
2982 $(SHELL) ./config.status;; \
2983 *) \
2984 echo ' cd $(top_builddir) && $(SHELL) ./config.status $@ $(am__depfiles_maybe)'; \
2985 cd $(top_builddir) && $(SHELL) ./config.status $@ $(am__depfiles_maybe);; \
2986 esac;
2987 $(srcdir)/common/local.mk $(srcdir)/igen/local.mk $(srcdir)/testsuite/local.mk $(srcdir)/testsuite/common/local.mk $(srcdir)/aarch64/local.mk $(srcdir)/arm/local.mk $(srcdir)/avr/local.mk $(srcdir)/bfin/local.mk $(srcdir)/bpf/local.mk $(srcdir)/cr16/local.mk $(srcdir)/cris/local.mk $(srcdir)/d10v/local.mk $(srcdir)/erc32/local.mk $(srcdir)/example-synacor/local.mk $(srcdir)/frv/local.mk $(srcdir)/ft32/local.mk $(srcdir)/h8300/local.mk $(srcdir)/iq2000/local.mk $(srcdir)/lm32/local.mk $(srcdir)/m32c/local.mk $(srcdir)/m32r/local.mk $(srcdir)/m68hc11/local.mk $(srcdir)/mcore/local.mk $(srcdir)/microblaze/local.mk $(srcdir)/mips/local.mk $(srcdir)/mn10300/local.mk $(srcdir)/moxie/local.mk $(srcdir)/msp430/local.mk $(srcdir)/or1k/local.mk $(srcdir)/ppc/local.mk $(srcdir)/pru/local.mk $(srcdir)/riscv/local.mk $(srcdir)/rl78/local.mk $(srcdir)/rx/local.mk $(srcdir)/sh/local.mk $(srcdir)/v850/local.mk $(am__empty):
2988
2989 $(top_builddir)/config.status: $(top_srcdir)/configure $(CONFIG_STATUS_DEPENDENCIES)
2990 $(SHELL) ./config.status --recheck
2991
2992 $(top_srcdir)/configure: @MAINTAINER_MODE_TRUE@ $(am__configure_deps)
2993 $(am__cd) $(srcdir) && $(AUTOCONF)
2994 $(ACLOCAL_M4): @MAINTAINER_MODE_TRUE@ $(am__aclocal_m4_deps)
2995 $(am__cd) $(srcdir) && $(ACLOCAL) $(ACLOCAL_AMFLAGS)
2996 $(am__aclocal_m4_deps):
2997
2998 config.h: stamp-h1
2999 @test -f $@ || rm -f stamp-h1
3000 @test -f $@ || $(MAKE) $(AM_MAKEFLAGS) stamp-h1
3001
3002 stamp-h1: $(srcdir)/config.h.in $(top_builddir)/config.status
3003 @rm -f stamp-h1
3004 cd $(top_builddir) && $(SHELL) ./config.status config.h
3005 $(srcdir)/config.h.in: @MAINTAINER_MODE_TRUE@ $(am__configure_deps)
3006 ($(am__cd) $(top_srcdir) && $(AUTOHEADER))
3007 rm -f stamp-h1
3008 touch $@
3009
3010 distclean-hdr:
3011 -rm -f config.h stamp-h1
3012 Make-common.sim: $(top_builddir)/config.status $(top_srcdir)/common/Make-common.in
3013 cd $(top_builddir) && $(SHELL) ./config.status $@
3014 aarch64/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/aarch64/Makefile.in
3015 cd $(top_builddir) && $(SHELL) ./config.status $@
3016 aarch64/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
3017 cd $(top_builddir) && $(SHELL) ./config.status $@
3018 arm/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/arm/Makefile.in
3019 cd $(top_builddir) && $(SHELL) ./config.status $@
3020 arm/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
3021 cd $(top_builddir) && $(SHELL) ./config.status $@
3022 avr/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/avr/Makefile.in
3023 cd $(top_builddir) && $(SHELL) ./config.status $@
3024 avr/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
3025 cd $(top_builddir) && $(SHELL) ./config.status $@
3026 bfin/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/bfin/Makefile.in
3027 cd $(top_builddir) && $(SHELL) ./config.status $@
3028 bfin/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
3029 cd $(top_builddir) && $(SHELL) ./config.status $@
3030 bpf/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/bpf/Makefile.in
3031 cd $(top_builddir) && $(SHELL) ./config.status $@
3032 bpf/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
3033 cd $(top_builddir) && $(SHELL) ./config.status $@
3034 cr16/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/cr16/Makefile.in
3035 cd $(top_builddir) && $(SHELL) ./config.status $@
3036 cr16/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
3037 cd $(top_builddir) && $(SHELL) ./config.status $@
3038 cris/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/cris/Makefile.in
3039 cd $(top_builddir) && $(SHELL) ./config.status $@
3040 cris/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
3041 cd $(top_builddir) && $(SHELL) ./config.status $@
3042 d10v/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/d10v/Makefile.in
3043 cd $(top_builddir) && $(SHELL) ./config.status $@
3044 d10v/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
3045 cd $(top_builddir) && $(SHELL) ./config.status $@
3046 frv/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/frv/Makefile.in
3047 cd $(top_builddir) && $(SHELL) ./config.status $@
3048 frv/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
3049 cd $(top_builddir) && $(SHELL) ./config.status $@
3050 ft32/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/ft32/Makefile.in
3051 cd $(top_builddir) && $(SHELL) ./config.status $@
3052 ft32/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
3053 cd $(top_builddir) && $(SHELL) ./config.status $@
3054 h8300/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/h8300/Makefile.in
3055 cd $(top_builddir) && $(SHELL) ./config.status $@
3056 h8300/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
3057 cd $(top_builddir) && $(SHELL) ./config.status $@
3058 iq2000/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/iq2000/Makefile.in
3059 cd $(top_builddir) && $(SHELL) ./config.status $@
3060 iq2000/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
3061 cd $(top_builddir) && $(SHELL) ./config.status $@
3062 lm32/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/lm32/Makefile.in
3063 cd $(top_builddir) && $(SHELL) ./config.status $@
3064 lm32/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
3065 cd $(top_builddir) && $(SHELL) ./config.status $@
3066 m32c/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/m32c/Makefile.in
3067 cd $(top_builddir) && $(SHELL) ./config.status $@
3068 m32c/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
3069 cd $(top_builddir) && $(SHELL) ./config.status $@
3070 m32r/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/m32r/Makefile.in
3071 cd $(top_builddir) && $(SHELL) ./config.status $@
3072 m32r/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
3073 cd $(top_builddir) && $(SHELL) ./config.status $@
3074 m68hc11/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/m68hc11/Makefile.in
3075 cd $(top_builddir) && $(SHELL) ./config.status $@
3076 m68hc11/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
3077 cd $(top_builddir) && $(SHELL) ./config.status $@
3078 mcore/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/mcore/Makefile.in
3079 cd $(top_builddir) && $(SHELL) ./config.status $@
3080 mcore/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
3081 cd $(top_builddir) && $(SHELL) ./config.status $@
3082 microblaze/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/microblaze/Makefile.in
3083 cd $(top_builddir) && $(SHELL) ./config.status $@
3084 microblaze/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
3085 cd $(top_builddir) && $(SHELL) ./config.status $@
3086 mips/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/mips/Makefile.in
3087 cd $(top_builddir) && $(SHELL) ./config.status $@
3088 mips/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
3089 cd $(top_builddir) && $(SHELL) ./config.status $@
3090 mn10300/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/mn10300/Makefile.in
3091 cd $(top_builddir) && $(SHELL) ./config.status $@
3092 mn10300/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
3093 cd $(top_builddir) && $(SHELL) ./config.status $@
3094 moxie/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/moxie/Makefile.in
3095 cd $(top_builddir) && $(SHELL) ./config.status $@
3096 moxie/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
3097 cd $(top_builddir) && $(SHELL) ./config.status $@
3098 msp430/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/msp430/Makefile.in
3099 cd $(top_builddir) && $(SHELL) ./config.status $@
3100 msp430/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
3101 cd $(top_builddir) && $(SHELL) ./config.status $@
3102 or1k/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/or1k/Makefile.in
3103 cd $(top_builddir) && $(SHELL) ./config.status $@
3104 or1k/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
3105 cd $(top_builddir) && $(SHELL) ./config.status $@
3106 ppc/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
3107 cd $(top_builddir) && $(SHELL) ./config.status $@
3108 pru/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/pru/Makefile.in
3109 cd $(top_builddir) && $(SHELL) ./config.status $@
3110 pru/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
3111 cd $(top_builddir) && $(SHELL) ./config.status $@
3112 riscv/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/riscv/Makefile.in
3113 cd $(top_builddir) && $(SHELL) ./config.status $@
3114 riscv/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
3115 cd $(top_builddir) && $(SHELL) ./config.status $@
3116 rl78/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/rl78/Makefile.in
3117 cd $(top_builddir) && $(SHELL) ./config.status $@
3118 rl78/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
3119 cd $(top_builddir) && $(SHELL) ./config.status $@
3120 rx/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/rx/Makefile.in
3121 cd $(top_builddir) && $(SHELL) ./config.status $@
3122 rx/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
3123 cd $(top_builddir) && $(SHELL) ./config.status $@
3124 sh/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/sh/Makefile.in
3125 cd $(top_builddir) && $(SHELL) ./config.status $@
3126 sh/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
3127 cd $(top_builddir) && $(SHELL) ./config.status $@
3128 erc32/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/erc32/Makefile.in
3129 cd $(top_builddir) && $(SHELL) ./config.status $@
3130 erc32/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
3131 cd $(top_builddir) && $(SHELL) ./config.status $@
3132 v850/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/v850/Makefile.in
3133 cd $(top_builddir) && $(SHELL) ./config.status $@
3134 v850/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
3135 cd $(top_builddir) && $(SHELL) ./config.status $@
3136 example-synacor/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/example-synacor/Makefile.in
3137 cd $(top_builddir) && $(SHELL) ./config.status $@
3138 example-synacor/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
3139 cd $(top_builddir) && $(SHELL) ./config.status $@
3140 arch-subdir.mk: $(top_builddir)/config.status $(srcdir)/arch-subdir.mk.in
3141 cd $(top_builddir) && $(SHELL) ./config.status $@
3142 .gdbinit: $(top_builddir)/config.status $(srcdir)/gdbinit.in
3143 cd $(top_builddir) && $(SHELL) ./config.status $@
3144
3145 clean-noinstLIBRARIES:
3146 -test -z "$(noinst_LIBRARIES)" || rm -f $(noinst_LIBRARIES)
3147 aarch64/$(am__dirstamp):
3148 @$(MKDIR_P) aarch64
3149 @: > aarch64/$(am__dirstamp)
3150
3151 aarch64/libsim.a: $(aarch64_libsim_a_OBJECTS) $(aarch64_libsim_a_DEPENDENCIES) $(EXTRA_aarch64_libsim_a_DEPENDENCIES) aarch64/$(am__dirstamp)
3152 $(AM_V_at)-rm -f aarch64/libsim.a
3153 $(AM_V_AR)$(aarch64_libsim_a_AR) aarch64/libsim.a $(aarch64_libsim_a_OBJECTS) $(aarch64_libsim_a_LIBADD)
3154 $(AM_V_at)$(RANLIB) aarch64/libsim.a
3155 arm/$(am__dirstamp):
3156 @$(MKDIR_P) arm
3157 @: > arm/$(am__dirstamp)
3158
3159 arm/libsim.a: $(arm_libsim_a_OBJECTS) $(arm_libsim_a_DEPENDENCIES) $(EXTRA_arm_libsim_a_DEPENDENCIES) arm/$(am__dirstamp)
3160 $(AM_V_at)-rm -f arm/libsim.a
3161 $(AM_V_AR)$(arm_libsim_a_AR) arm/libsim.a $(arm_libsim_a_OBJECTS) $(arm_libsim_a_LIBADD)
3162 $(AM_V_at)$(RANLIB) arm/libsim.a
3163 avr/$(am__dirstamp):
3164 @$(MKDIR_P) avr
3165 @: > avr/$(am__dirstamp)
3166
3167 avr/libsim.a: $(avr_libsim_a_OBJECTS) $(avr_libsim_a_DEPENDENCIES) $(EXTRA_avr_libsim_a_DEPENDENCIES) avr/$(am__dirstamp)
3168 $(AM_V_at)-rm -f avr/libsim.a
3169 $(AM_V_AR)$(avr_libsim_a_AR) avr/libsim.a $(avr_libsim_a_OBJECTS) $(avr_libsim_a_LIBADD)
3170 $(AM_V_at)$(RANLIB) avr/libsim.a
3171 bfin/$(am__dirstamp):
3172 @$(MKDIR_P) bfin
3173 @: > bfin/$(am__dirstamp)
3174
3175 bfin/libsim.a: $(bfin_libsim_a_OBJECTS) $(bfin_libsim_a_DEPENDENCIES) $(EXTRA_bfin_libsim_a_DEPENDENCIES) bfin/$(am__dirstamp)
3176 $(AM_V_at)-rm -f bfin/libsim.a
3177 $(AM_V_AR)$(bfin_libsim_a_AR) bfin/libsim.a $(bfin_libsim_a_OBJECTS) $(bfin_libsim_a_LIBADD)
3178 $(AM_V_at)$(RANLIB) bfin/libsim.a
3179 bpf/$(am__dirstamp):
3180 @$(MKDIR_P) bpf
3181 @: > bpf/$(am__dirstamp)
3182
3183 bpf/libsim.a: $(bpf_libsim_a_OBJECTS) $(bpf_libsim_a_DEPENDENCIES) $(EXTRA_bpf_libsim_a_DEPENDENCIES) bpf/$(am__dirstamp)
3184 $(AM_V_at)-rm -f bpf/libsim.a
3185 $(AM_V_AR)$(bpf_libsim_a_AR) bpf/libsim.a $(bpf_libsim_a_OBJECTS) $(bpf_libsim_a_LIBADD)
3186 $(AM_V_at)$(RANLIB) bpf/libsim.a
3187 common/$(am__dirstamp):
3188 @$(MKDIR_P) common
3189 @: > common/$(am__dirstamp)
3190 common/$(DEPDIR)/$(am__dirstamp):
3191 @$(MKDIR_P) common/$(DEPDIR)
3192 @: > common/$(DEPDIR)/$(am__dirstamp)
3193 common/callback.$(OBJEXT): common/$(am__dirstamp) \
3194 common/$(DEPDIR)/$(am__dirstamp)
3195 common/portability.$(OBJEXT): common/$(am__dirstamp) \
3196 common/$(DEPDIR)/$(am__dirstamp)
3197 common/sim-load.$(OBJEXT): common/$(am__dirstamp) \
3198 common/$(DEPDIR)/$(am__dirstamp)
3199 common/syscall.$(OBJEXT): common/$(am__dirstamp) \
3200 common/$(DEPDIR)/$(am__dirstamp)
3201 common/target-newlib-errno.$(OBJEXT): common/$(am__dirstamp) \
3202 common/$(DEPDIR)/$(am__dirstamp)
3203 common/target-newlib-open.$(OBJEXT): common/$(am__dirstamp) \
3204 common/$(DEPDIR)/$(am__dirstamp)
3205 common/target-newlib-signal.$(OBJEXT): common/$(am__dirstamp) \
3206 common/$(DEPDIR)/$(am__dirstamp)
3207 common/target-newlib-syscall.$(OBJEXT): common/$(am__dirstamp) \
3208 common/$(DEPDIR)/$(am__dirstamp)
3209 common/version.$(OBJEXT): common/$(am__dirstamp) \
3210 common/$(DEPDIR)/$(am__dirstamp)
3211
3212 common/libcommon.a: $(common_libcommon_a_OBJECTS) $(common_libcommon_a_DEPENDENCIES) $(EXTRA_common_libcommon_a_DEPENDENCIES) common/$(am__dirstamp)
3213 $(AM_V_at)-rm -f common/libcommon.a
3214 $(AM_V_AR)$(common_libcommon_a_AR) common/libcommon.a $(common_libcommon_a_OBJECTS) $(common_libcommon_a_LIBADD)
3215 $(AM_V_at)$(RANLIB) common/libcommon.a
3216 cr16/$(am__dirstamp):
3217 @$(MKDIR_P) cr16
3218 @: > cr16/$(am__dirstamp)
3219
3220 cr16/libsim.a: $(cr16_libsim_a_OBJECTS) $(cr16_libsim_a_DEPENDENCIES) $(EXTRA_cr16_libsim_a_DEPENDENCIES) cr16/$(am__dirstamp)
3221 $(AM_V_at)-rm -f cr16/libsim.a
3222 $(AM_V_AR)$(cr16_libsim_a_AR) cr16/libsim.a $(cr16_libsim_a_OBJECTS) $(cr16_libsim_a_LIBADD)
3223 $(AM_V_at)$(RANLIB) cr16/libsim.a
3224 cris/$(am__dirstamp):
3225 @$(MKDIR_P) cris
3226 @: > cris/$(am__dirstamp)
3227
3228 cris/libsim.a: $(cris_libsim_a_OBJECTS) $(cris_libsim_a_DEPENDENCIES) $(EXTRA_cris_libsim_a_DEPENDENCIES) cris/$(am__dirstamp)
3229 $(AM_V_at)-rm -f cris/libsim.a
3230 $(AM_V_AR)$(cris_libsim_a_AR) cris/libsim.a $(cris_libsim_a_OBJECTS) $(cris_libsim_a_LIBADD)
3231 $(AM_V_at)$(RANLIB) cris/libsim.a
3232 d10v/$(am__dirstamp):
3233 @$(MKDIR_P) d10v
3234 @: > d10v/$(am__dirstamp)
3235
3236 d10v/libsim.a: $(d10v_libsim_a_OBJECTS) $(d10v_libsim_a_DEPENDENCIES) $(EXTRA_d10v_libsim_a_DEPENDENCIES) d10v/$(am__dirstamp)
3237 $(AM_V_at)-rm -f d10v/libsim.a
3238 $(AM_V_AR)$(d10v_libsim_a_AR) d10v/libsim.a $(d10v_libsim_a_OBJECTS) $(d10v_libsim_a_LIBADD)
3239 $(AM_V_at)$(RANLIB) d10v/libsim.a
3240 erc32/$(am__dirstamp):
3241 @$(MKDIR_P) erc32
3242 @: > erc32/$(am__dirstamp)
3243
3244 erc32/libsim.a: $(erc32_libsim_a_OBJECTS) $(erc32_libsim_a_DEPENDENCIES) $(EXTRA_erc32_libsim_a_DEPENDENCIES) erc32/$(am__dirstamp)
3245 $(AM_V_at)-rm -f erc32/libsim.a
3246 $(AM_V_AR)$(erc32_libsim_a_AR) erc32/libsim.a $(erc32_libsim_a_OBJECTS) $(erc32_libsim_a_LIBADD)
3247 $(AM_V_at)$(RANLIB) erc32/libsim.a
3248 example-synacor/$(am__dirstamp):
3249 @$(MKDIR_P) example-synacor
3250 @: > example-synacor/$(am__dirstamp)
3251
3252 example-synacor/libsim.a: $(example_synacor_libsim_a_OBJECTS) $(example_synacor_libsim_a_DEPENDENCIES) $(EXTRA_example_synacor_libsim_a_DEPENDENCIES) example-synacor/$(am__dirstamp)
3253 $(AM_V_at)-rm -f example-synacor/libsim.a
3254 $(AM_V_AR)$(example_synacor_libsim_a_AR) example-synacor/libsim.a $(example_synacor_libsim_a_OBJECTS) $(example_synacor_libsim_a_LIBADD)
3255 $(AM_V_at)$(RANLIB) example-synacor/libsim.a
3256 frv/$(am__dirstamp):
3257 @$(MKDIR_P) frv
3258 @: > frv/$(am__dirstamp)
3259
3260 frv/libsim.a: $(frv_libsim_a_OBJECTS) $(frv_libsim_a_DEPENDENCIES) $(EXTRA_frv_libsim_a_DEPENDENCIES) frv/$(am__dirstamp)
3261 $(AM_V_at)-rm -f frv/libsim.a
3262 $(AM_V_AR)$(frv_libsim_a_AR) frv/libsim.a $(frv_libsim_a_OBJECTS) $(frv_libsim_a_LIBADD)
3263 $(AM_V_at)$(RANLIB) frv/libsim.a
3264 ft32/$(am__dirstamp):
3265 @$(MKDIR_P) ft32
3266 @: > ft32/$(am__dirstamp)
3267
3268 ft32/libsim.a: $(ft32_libsim_a_OBJECTS) $(ft32_libsim_a_DEPENDENCIES) $(EXTRA_ft32_libsim_a_DEPENDENCIES) ft32/$(am__dirstamp)
3269 $(AM_V_at)-rm -f ft32/libsim.a
3270 $(AM_V_AR)$(ft32_libsim_a_AR) ft32/libsim.a $(ft32_libsim_a_OBJECTS) $(ft32_libsim_a_LIBADD)
3271 $(AM_V_at)$(RANLIB) ft32/libsim.a
3272 h8300/$(am__dirstamp):
3273 @$(MKDIR_P) h8300
3274 @: > h8300/$(am__dirstamp)
3275
3276 h8300/libsim.a: $(h8300_libsim_a_OBJECTS) $(h8300_libsim_a_DEPENDENCIES) $(EXTRA_h8300_libsim_a_DEPENDENCIES) h8300/$(am__dirstamp)
3277 $(AM_V_at)-rm -f h8300/libsim.a
3278 $(AM_V_AR)$(h8300_libsim_a_AR) h8300/libsim.a $(h8300_libsim_a_OBJECTS) $(h8300_libsim_a_LIBADD)
3279 $(AM_V_at)$(RANLIB) h8300/libsim.a
3280 igen/$(am__dirstamp):
3281 @$(MKDIR_P) igen
3282 @: > igen/$(am__dirstamp)
3283 igen/$(DEPDIR)/$(am__dirstamp):
3284 @$(MKDIR_P) igen/$(DEPDIR)
3285 @: > igen/$(DEPDIR)/$(am__dirstamp)
3286 igen/table.$(OBJEXT): igen/$(am__dirstamp) \
3287 igen/$(DEPDIR)/$(am__dirstamp)
3288 igen/lf.$(OBJEXT): igen/$(am__dirstamp) igen/$(DEPDIR)/$(am__dirstamp)
3289 igen/misc.$(OBJEXT): igen/$(am__dirstamp) \
3290 igen/$(DEPDIR)/$(am__dirstamp)
3291 igen/filter_host.$(OBJEXT): igen/$(am__dirstamp) \
3292 igen/$(DEPDIR)/$(am__dirstamp)
3293 igen/ld-decode.$(OBJEXT): igen/$(am__dirstamp) \
3294 igen/$(DEPDIR)/$(am__dirstamp)
3295 igen/ld-cache.$(OBJEXT): igen/$(am__dirstamp) \
3296 igen/$(DEPDIR)/$(am__dirstamp)
3297 igen/filter.$(OBJEXT): igen/$(am__dirstamp) \
3298 igen/$(DEPDIR)/$(am__dirstamp)
3299 igen/ld-insn.$(OBJEXT): igen/$(am__dirstamp) \
3300 igen/$(DEPDIR)/$(am__dirstamp)
3301 igen/gen-model.$(OBJEXT): igen/$(am__dirstamp) \
3302 igen/$(DEPDIR)/$(am__dirstamp)
3303 igen/gen-itable.$(OBJEXT): igen/$(am__dirstamp) \
3304 igen/$(DEPDIR)/$(am__dirstamp)
3305 igen/gen-icache.$(OBJEXT): igen/$(am__dirstamp) \
3306 igen/$(DEPDIR)/$(am__dirstamp)
3307 igen/gen-semantics.$(OBJEXT): igen/$(am__dirstamp) \
3308 igen/$(DEPDIR)/$(am__dirstamp)
3309 igen/gen-idecode.$(OBJEXT): igen/$(am__dirstamp) \
3310 igen/$(DEPDIR)/$(am__dirstamp)
3311 igen/gen-support.$(OBJEXT): igen/$(am__dirstamp) \
3312 igen/$(DEPDIR)/$(am__dirstamp)
3313 igen/gen-engine.$(OBJEXT): igen/$(am__dirstamp) \
3314 igen/$(DEPDIR)/$(am__dirstamp)
3315 igen/gen.$(OBJEXT): igen/$(am__dirstamp) \
3316 igen/$(DEPDIR)/$(am__dirstamp)
3317
3318 @SIM_ENABLE_IGEN_FALSE@igen/libigen.a: $(igen_libigen_a_OBJECTS) $(igen_libigen_a_DEPENDENCIES) $(EXTRA_igen_libigen_a_DEPENDENCIES) igen/$(am__dirstamp)
3319 @SIM_ENABLE_IGEN_FALSE@ $(AM_V_at)-rm -f igen/libigen.a
3320 @SIM_ENABLE_IGEN_FALSE@ $(AM_V_AR)$(igen_libigen_a_AR) igen/libigen.a $(igen_libigen_a_OBJECTS) $(igen_libigen_a_LIBADD)
3321 @SIM_ENABLE_IGEN_FALSE@ $(AM_V_at)$(RANLIB) igen/libigen.a
3322 iq2000/$(am__dirstamp):
3323 @$(MKDIR_P) iq2000
3324 @: > iq2000/$(am__dirstamp)
3325
3326 iq2000/libsim.a: $(iq2000_libsim_a_OBJECTS) $(iq2000_libsim_a_DEPENDENCIES) $(EXTRA_iq2000_libsim_a_DEPENDENCIES) iq2000/$(am__dirstamp)
3327 $(AM_V_at)-rm -f iq2000/libsim.a
3328 $(AM_V_AR)$(iq2000_libsim_a_AR) iq2000/libsim.a $(iq2000_libsim_a_OBJECTS) $(iq2000_libsim_a_LIBADD)
3329 $(AM_V_at)$(RANLIB) iq2000/libsim.a
3330 lm32/$(am__dirstamp):
3331 @$(MKDIR_P) lm32
3332 @: > lm32/$(am__dirstamp)
3333
3334 lm32/libsim.a: $(lm32_libsim_a_OBJECTS) $(lm32_libsim_a_DEPENDENCIES) $(EXTRA_lm32_libsim_a_DEPENDENCIES) lm32/$(am__dirstamp)
3335 $(AM_V_at)-rm -f lm32/libsim.a
3336 $(AM_V_AR)$(lm32_libsim_a_AR) lm32/libsim.a $(lm32_libsim_a_OBJECTS) $(lm32_libsim_a_LIBADD)
3337 $(AM_V_at)$(RANLIB) lm32/libsim.a
3338 m32c/$(am__dirstamp):
3339 @$(MKDIR_P) m32c
3340 @: > m32c/$(am__dirstamp)
3341
3342 m32c/libsim.a: $(m32c_libsim_a_OBJECTS) $(m32c_libsim_a_DEPENDENCIES) $(EXTRA_m32c_libsim_a_DEPENDENCIES) m32c/$(am__dirstamp)
3343 $(AM_V_at)-rm -f m32c/libsim.a
3344 $(AM_V_AR)$(m32c_libsim_a_AR) m32c/libsim.a $(m32c_libsim_a_OBJECTS) $(m32c_libsim_a_LIBADD)
3345 $(AM_V_at)$(RANLIB) m32c/libsim.a
3346 m32r/$(am__dirstamp):
3347 @$(MKDIR_P) m32r
3348 @: > m32r/$(am__dirstamp)
3349
3350 m32r/libsim.a: $(m32r_libsim_a_OBJECTS) $(m32r_libsim_a_DEPENDENCIES) $(EXTRA_m32r_libsim_a_DEPENDENCIES) m32r/$(am__dirstamp)
3351 $(AM_V_at)-rm -f m32r/libsim.a
3352 $(AM_V_AR)$(m32r_libsim_a_AR) m32r/libsim.a $(m32r_libsim_a_OBJECTS) $(m32r_libsim_a_LIBADD)
3353 $(AM_V_at)$(RANLIB) m32r/libsim.a
3354 m68hc11/$(am__dirstamp):
3355 @$(MKDIR_P) m68hc11
3356 @: > m68hc11/$(am__dirstamp)
3357
3358 m68hc11/libsim.a: $(m68hc11_libsim_a_OBJECTS) $(m68hc11_libsim_a_DEPENDENCIES) $(EXTRA_m68hc11_libsim_a_DEPENDENCIES) m68hc11/$(am__dirstamp)
3359 $(AM_V_at)-rm -f m68hc11/libsim.a
3360 $(AM_V_AR)$(m68hc11_libsim_a_AR) m68hc11/libsim.a $(m68hc11_libsim_a_OBJECTS) $(m68hc11_libsim_a_LIBADD)
3361 $(AM_V_at)$(RANLIB) m68hc11/libsim.a
3362 mcore/$(am__dirstamp):
3363 @$(MKDIR_P) mcore
3364 @: > mcore/$(am__dirstamp)
3365
3366 mcore/libsim.a: $(mcore_libsim_a_OBJECTS) $(mcore_libsim_a_DEPENDENCIES) $(EXTRA_mcore_libsim_a_DEPENDENCIES) mcore/$(am__dirstamp)
3367 $(AM_V_at)-rm -f mcore/libsim.a
3368 $(AM_V_AR)$(mcore_libsim_a_AR) mcore/libsim.a $(mcore_libsim_a_OBJECTS) $(mcore_libsim_a_LIBADD)
3369 $(AM_V_at)$(RANLIB) mcore/libsim.a
3370 microblaze/$(am__dirstamp):
3371 @$(MKDIR_P) microblaze
3372 @: > microblaze/$(am__dirstamp)
3373
3374 microblaze/libsim.a: $(microblaze_libsim_a_OBJECTS) $(microblaze_libsim_a_DEPENDENCIES) $(EXTRA_microblaze_libsim_a_DEPENDENCIES) microblaze/$(am__dirstamp)
3375 $(AM_V_at)-rm -f microblaze/libsim.a
3376 $(AM_V_AR)$(microblaze_libsim_a_AR) microblaze/libsim.a $(microblaze_libsim_a_OBJECTS) $(microblaze_libsim_a_LIBADD)
3377 $(AM_V_at)$(RANLIB) microblaze/libsim.a
3378 mips/$(am__dirstamp):
3379 @$(MKDIR_P) mips
3380 @: > mips/$(am__dirstamp)
3381
3382 mips/libsim.a: $(mips_libsim_a_OBJECTS) $(mips_libsim_a_DEPENDENCIES) $(EXTRA_mips_libsim_a_DEPENDENCIES) mips/$(am__dirstamp)
3383 $(AM_V_at)-rm -f mips/libsim.a
3384 $(AM_V_AR)$(mips_libsim_a_AR) mips/libsim.a $(mips_libsim_a_OBJECTS) $(mips_libsim_a_LIBADD)
3385 $(AM_V_at)$(RANLIB) mips/libsim.a
3386 mn10300/$(am__dirstamp):
3387 @$(MKDIR_P) mn10300
3388 @: > mn10300/$(am__dirstamp)
3389
3390 mn10300/libsim.a: $(mn10300_libsim_a_OBJECTS) $(mn10300_libsim_a_DEPENDENCIES) $(EXTRA_mn10300_libsim_a_DEPENDENCIES) mn10300/$(am__dirstamp)
3391 $(AM_V_at)-rm -f mn10300/libsim.a
3392 $(AM_V_AR)$(mn10300_libsim_a_AR) mn10300/libsim.a $(mn10300_libsim_a_OBJECTS) $(mn10300_libsim_a_LIBADD)
3393 $(AM_V_at)$(RANLIB) mn10300/libsim.a
3394 moxie/$(am__dirstamp):
3395 @$(MKDIR_P) moxie
3396 @: > moxie/$(am__dirstamp)
3397
3398 moxie/libsim.a: $(moxie_libsim_a_OBJECTS) $(moxie_libsim_a_DEPENDENCIES) $(EXTRA_moxie_libsim_a_DEPENDENCIES) moxie/$(am__dirstamp)
3399 $(AM_V_at)-rm -f moxie/libsim.a
3400 $(AM_V_AR)$(moxie_libsim_a_AR) moxie/libsim.a $(moxie_libsim_a_OBJECTS) $(moxie_libsim_a_LIBADD)
3401 $(AM_V_at)$(RANLIB) moxie/libsim.a
3402 msp430/$(am__dirstamp):
3403 @$(MKDIR_P) msp430
3404 @: > msp430/$(am__dirstamp)
3405
3406 msp430/libsim.a: $(msp430_libsim_a_OBJECTS) $(msp430_libsim_a_DEPENDENCIES) $(EXTRA_msp430_libsim_a_DEPENDENCIES) msp430/$(am__dirstamp)
3407 $(AM_V_at)-rm -f msp430/libsim.a
3408 $(AM_V_AR)$(msp430_libsim_a_AR) msp430/libsim.a $(msp430_libsim_a_OBJECTS) $(msp430_libsim_a_LIBADD)
3409 $(AM_V_at)$(RANLIB) msp430/libsim.a
3410 or1k/$(am__dirstamp):
3411 @$(MKDIR_P) or1k
3412 @: > or1k/$(am__dirstamp)
3413
3414 or1k/libsim.a: $(or1k_libsim_a_OBJECTS) $(or1k_libsim_a_DEPENDENCIES) $(EXTRA_or1k_libsim_a_DEPENDENCIES) or1k/$(am__dirstamp)
3415 $(AM_V_at)-rm -f or1k/libsim.a
3416 $(AM_V_AR)$(or1k_libsim_a_AR) or1k/libsim.a $(or1k_libsim_a_OBJECTS) $(or1k_libsim_a_LIBADD)
3417 $(AM_V_at)$(RANLIB) or1k/libsim.a
3418 pru/$(am__dirstamp):
3419 @$(MKDIR_P) pru
3420 @: > pru/$(am__dirstamp)
3421
3422 pru/libsim.a: $(pru_libsim_a_OBJECTS) $(pru_libsim_a_DEPENDENCIES) $(EXTRA_pru_libsim_a_DEPENDENCIES) pru/$(am__dirstamp)
3423 $(AM_V_at)-rm -f pru/libsim.a
3424 $(AM_V_AR)$(pru_libsim_a_AR) pru/libsim.a $(pru_libsim_a_OBJECTS) $(pru_libsim_a_LIBADD)
3425 $(AM_V_at)$(RANLIB) pru/libsim.a
3426 riscv/$(am__dirstamp):
3427 @$(MKDIR_P) riscv
3428 @: > riscv/$(am__dirstamp)
3429
3430 riscv/libsim.a: $(riscv_libsim_a_OBJECTS) $(riscv_libsim_a_DEPENDENCIES) $(EXTRA_riscv_libsim_a_DEPENDENCIES) riscv/$(am__dirstamp)
3431 $(AM_V_at)-rm -f riscv/libsim.a
3432 $(AM_V_AR)$(riscv_libsim_a_AR) riscv/libsim.a $(riscv_libsim_a_OBJECTS) $(riscv_libsim_a_LIBADD)
3433 $(AM_V_at)$(RANLIB) riscv/libsim.a
3434 rl78/$(am__dirstamp):
3435 @$(MKDIR_P) rl78
3436 @: > rl78/$(am__dirstamp)
3437
3438 rl78/libsim.a: $(rl78_libsim_a_OBJECTS) $(rl78_libsim_a_DEPENDENCIES) $(EXTRA_rl78_libsim_a_DEPENDENCIES) rl78/$(am__dirstamp)
3439 $(AM_V_at)-rm -f rl78/libsim.a
3440 $(AM_V_AR)$(rl78_libsim_a_AR) rl78/libsim.a $(rl78_libsim_a_OBJECTS) $(rl78_libsim_a_LIBADD)
3441 $(AM_V_at)$(RANLIB) rl78/libsim.a
3442 rx/$(am__dirstamp):
3443 @$(MKDIR_P) rx
3444 @: > rx/$(am__dirstamp)
3445
3446 rx/libsim.a: $(rx_libsim_a_OBJECTS) $(rx_libsim_a_DEPENDENCIES) $(EXTRA_rx_libsim_a_DEPENDENCIES) rx/$(am__dirstamp)
3447 $(AM_V_at)-rm -f rx/libsim.a
3448 $(AM_V_AR)$(rx_libsim_a_AR) rx/libsim.a $(rx_libsim_a_OBJECTS) $(rx_libsim_a_LIBADD)
3449 $(AM_V_at)$(RANLIB) rx/libsim.a
3450 sh/$(am__dirstamp):
3451 @$(MKDIR_P) sh
3452 @: > sh/$(am__dirstamp)
3453
3454 sh/libsim.a: $(sh_libsim_a_OBJECTS) $(sh_libsim_a_DEPENDENCIES) $(EXTRA_sh_libsim_a_DEPENDENCIES) sh/$(am__dirstamp)
3455 $(AM_V_at)-rm -f sh/libsim.a
3456 $(AM_V_AR)$(sh_libsim_a_AR) sh/libsim.a $(sh_libsim_a_OBJECTS) $(sh_libsim_a_LIBADD)
3457 $(AM_V_at)$(RANLIB) sh/libsim.a
3458 v850/$(am__dirstamp):
3459 @$(MKDIR_P) v850
3460 @: > v850/$(am__dirstamp)
3461
3462 v850/libsim.a: $(v850_libsim_a_OBJECTS) $(v850_libsim_a_DEPENDENCIES) $(EXTRA_v850_libsim_a_DEPENDENCIES) v850/$(am__dirstamp)
3463 $(AM_V_at)-rm -f v850/libsim.a
3464 $(AM_V_AR)$(v850_libsim_a_AR) v850/libsim.a $(v850_libsim_a_OBJECTS) $(v850_libsim_a_LIBADD)
3465 $(AM_V_at)$(RANLIB) v850/libsim.a
3466
3467 clean-checkPROGRAMS:
3468 @list='$(check_PROGRAMS)'; test -n "$$list" || exit 0; \
3469 echo " rm -f" $$list; \
3470 rm -f $$list || exit $$?; \
3471 test -n "$(EXEEXT)" || exit 0; \
3472 list=`for p in $$list; do echo "$$p"; done | sed 's/$(EXEEXT)$$//'`; \
3473 echo " rm -f" $$list; \
3474 rm -f $$list
3475
3476 clean-noinstPROGRAMS:
3477 @list='$(noinst_PROGRAMS)'; test -n "$$list" || exit 0; \
3478 echo " rm -f" $$list; \
3479 rm -f $$list || exit $$?; \
3480 test -n "$(EXEEXT)" || exit 0; \
3481 list=`for p in $$list; do echo "$$p"; done | sed 's/$(EXEEXT)$$//'`; \
3482 echo " rm -f" $$list; \
3483 rm -f $$list
3484
3485 aarch64/run$(EXEEXT): $(aarch64_run_OBJECTS) $(aarch64_run_DEPENDENCIES) $(EXTRA_aarch64_run_DEPENDENCIES) aarch64/$(am__dirstamp)
3486 @rm -f aarch64/run$(EXEEXT)
3487 $(AM_V_CCLD)$(LINK) $(aarch64_run_OBJECTS) $(aarch64_run_LDADD) $(LIBS)
3488
3489 arm/run$(EXEEXT): $(arm_run_OBJECTS) $(arm_run_DEPENDENCIES) $(EXTRA_arm_run_DEPENDENCIES) arm/$(am__dirstamp)
3490 @rm -f arm/run$(EXEEXT)
3491 $(AM_V_CCLD)$(LINK) $(arm_run_OBJECTS) $(arm_run_LDADD) $(LIBS)
3492
3493 avr/run$(EXEEXT): $(avr_run_OBJECTS) $(avr_run_DEPENDENCIES) $(EXTRA_avr_run_DEPENDENCIES) avr/$(am__dirstamp)
3494 @rm -f avr/run$(EXEEXT)
3495 $(AM_V_CCLD)$(LINK) $(avr_run_OBJECTS) $(avr_run_LDADD) $(LIBS)
3496
3497 bfin/run$(EXEEXT): $(bfin_run_OBJECTS) $(bfin_run_DEPENDENCIES) $(EXTRA_bfin_run_DEPENDENCIES) bfin/$(am__dirstamp)
3498 @rm -f bfin/run$(EXEEXT)
3499 $(AM_V_CCLD)$(LINK) $(bfin_run_OBJECTS) $(bfin_run_LDADD) $(LIBS)
3500
3501 bpf/run$(EXEEXT): $(bpf_run_OBJECTS) $(bpf_run_DEPENDENCIES) $(EXTRA_bpf_run_DEPENDENCIES) bpf/$(am__dirstamp)
3502 @rm -f bpf/run$(EXEEXT)
3503 $(AM_V_CCLD)$(LINK) $(bpf_run_OBJECTS) $(bpf_run_LDADD) $(LIBS)
3504 cr16/$(DEPDIR)/$(am__dirstamp):
3505 @$(MKDIR_P) cr16/$(DEPDIR)
3506 @: > cr16/$(DEPDIR)/$(am__dirstamp)
3507 cr16/gencode.$(OBJEXT): cr16/$(am__dirstamp) \
3508 cr16/$(DEPDIR)/$(am__dirstamp)
3509
3510 @SIM_ENABLE_ARCH_cr16_FALSE@cr16/gencode$(EXEEXT): $(cr16_gencode_OBJECTS) $(cr16_gencode_DEPENDENCIES) $(EXTRA_cr16_gencode_DEPENDENCIES) cr16/$(am__dirstamp)
3511 @SIM_ENABLE_ARCH_cr16_FALSE@ @rm -f cr16/gencode$(EXEEXT)
3512 @SIM_ENABLE_ARCH_cr16_FALSE@ $(AM_V_CCLD)$(LINK) $(cr16_gencode_OBJECTS) $(cr16_gencode_LDADD) $(LIBS)
3513
3514 cr16/run$(EXEEXT): $(cr16_run_OBJECTS) $(cr16_run_DEPENDENCIES) $(EXTRA_cr16_run_DEPENDENCIES) cr16/$(am__dirstamp)
3515 @rm -f cr16/run$(EXEEXT)
3516 $(AM_V_CCLD)$(LINK) $(cr16_run_OBJECTS) $(cr16_run_LDADD) $(LIBS)
3517
3518 cris/run$(EXEEXT): $(cris_run_OBJECTS) $(cris_run_DEPENDENCIES) $(EXTRA_cris_run_DEPENDENCIES) cris/$(am__dirstamp)
3519 @rm -f cris/run$(EXEEXT)
3520 $(AM_V_CCLD)$(LINK) $(cris_run_OBJECTS) $(cris_run_LDADD) $(LIBS)
3521 cris/$(DEPDIR)/$(am__dirstamp):
3522 @$(MKDIR_P) cris/$(DEPDIR)
3523 @: > cris/$(DEPDIR)/$(am__dirstamp)
3524 cris/rvdummy.$(OBJEXT): cris/$(am__dirstamp) \
3525 cris/$(DEPDIR)/$(am__dirstamp)
3526
3527 cris/rvdummy$(EXEEXT): $(cris_rvdummy_OBJECTS) $(cris_rvdummy_DEPENDENCIES) $(EXTRA_cris_rvdummy_DEPENDENCIES) cris/$(am__dirstamp)
3528 @rm -f cris/rvdummy$(EXEEXT)
3529 $(AM_V_CCLD)$(LINK) $(cris_rvdummy_OBJECTS) $(cris_rvdummy_LDADD) $(LIBS)
3530 d10v/$(DEPDIR)/$(am__dirstamp):
3531 @$(MKDIR_P) d10v/$(DEPDIR)
3532 @: > d10v/$(DEPDIR)/$(am__dirstamp)
3533 d10v/gencode.$(OBJEXT): d10v/$(am__dirstamp) \
3534 d10v/$(DEPDIR)/$(am__dirstamp)
3535
3536 @SIM_ENABLE_ARCH_d10v_FALSE@d10v/gencode$(EXEEXT): $(d10v_gencode_OBJECTS) $(d10v_gencode_DEPENDENCIES) $(EXTRA_d10v_gencode_DEPENDENCIES) d10v/$(am__dirstamp)
3537 @SIM_ENABLE_ARCH_d10v_FALSE@ @rm -f d10v/gencode$(EXEEXT)
3538 @SIM_ENABLE_ARCH_d10v_FALSE@ $(AM_V_CCLD)$(LINK) $(d10v_gencode_OBJECTS) $(d10v_gencode_LDADD) $(LIBS)
3539
3540 d10v/run$(EXEEXT): $(d10v_run_OBJECTS) $(d10v_run_DEPENDENCIES) $(EXTRA_d10v_run_DEPENDENCIES) d10v/$(am__dirstamp)
3541 @rm -f d10v/run$(EXEEXT)
3542 $(AM_V_CCLD)$(LINK) $(d10v_run_OBJECTS) $(d10v_run_LDADD) $(LIBS)
3543
3544 erc32/run$(EXEEXT): $(erc32_run_OBJECTS) $(erc32_run_DEPENDENCIES) $(EXTRA_erc32_run_DEPENDENCIES) erc32/$(am__dirstamp)
3545 @rm -f erc32/run$(EXEEXT)
3546 $(AM_V_CCLD)$(LINK) $(erc32_run_OBJECTS) $(erc32_run_LDADD) $(LIBS)
3547 erc32/$(DEPDIR)/$(am__dirstamp):
3548 @$(MKDIR_P) erc32/$(DEPDIR)
3549 @: > erc32/$(DEPDIR)/$(am__dirstamp)
3550 erc32/sis.$(OBJEXT): erc32/$(am__dirstamp) \
3551 erc32/$(DEPDIR)/$(am__dirstamp)
3552
3553 @SIM_ENABLE_ARCH_erc32_FALSE@erc32/sis$(EXEEXT): $(erc32_sis_OBJECTS) $(erc32_sis_DEPENDENCIES) $(EXTRA_erc32_sis_DEPENDENCIES) erc32/$(am__dirstamp)
3554 @SIM_ENABLE_ARCH_erc32_FALSE@ @rm -f erc32/sis$(EXEEXT)
3555 @SIM_ENABLE_ARCH_erc32_FALSE@ $(AM_V_CCLD)$(LINK) $(erc32_sis_OBJECTS) $(erc32_sis_LDADD) $(LIBS)
3556
3557 example-synacor/run$(EXEEXT): $(example_synacor_run_OBJECTS) $(example_synacor_run_DEPENDENCIES) $(EXTRA_example_synacor_run_DEPENDENCIES) example-synacor/$(am__dirstamp)
3558 @rm -f example-synacor/run$(EXEEXT)
3559 $(AM_V_CCLD)$(LINK) $(example_synacor_run_OBJECTS) $(example_synacor_run_LDADD) $(LIBS)
3560
3561 frv/run$(EXEEXT): $(frv_run_OBJECTS) $(frv_run_DEPENDENCIES) $(EXTRA_frv_run_DEPENDENCIES) frv/$(am__dirstamp)
3562 @rm -f frv/run$(EXEEXT)
3563 $(AM_V_CCLD)$(LINK) $(frv_run_OBJECTS) $(frv_run_LDADD) $(LIBS)
3564
3565 ft32/run$(EXEEXT): $(ft32_run_OBJECTS) $(ft32_run_DEPENDENCIES) $(EXTRA_ft32_run_DEPENDENCIES) ft32/$(am__dirstamp)
3566 @rm -f ft32/run$(EXEEXT)
3567 $(AM_V_CCLD)$(LINK) $(ft32_run_OBJECTS) $(ft32_run_LDADD) $(LIBS)
3568
3569 h8300/run$(EXEEXT): $(h8300_run_OBJECTS) $(h8300_run_DEPENDENCIES) $(EXTRA_h8300_run_DEPENDENCIES) h8300/$(am__dirstamp)
3570 @rm -f h8300/run$(EXEEXT)
3571 $(AM_V_CCLD)$(LINK) $(h8300_run_OBJECTS) $(h8300_run_LDADD) $(LIBS)
3572
3573 igen/filter$(EXEEXT): $(igen_filter_OBJECTS) $(igen_filter_DEPENDENCIES) $(EXTRA_igen_filter_DEPENDENCIES) igen/$(am__dirstamp)
3574 @rm -f igen/filter$(EXEEXT)
3575 $(AM_V_CCLD)$(LINK) $(igen_filter_OBJECTS) $(igen_filter_LDADD) $(LIBS)
3576
3577 igen/gen$(EXEEXT): $(igen_gen_OBJECTS) $(igen_gen_DEPENDENCIES) $(EXTRA_igen_gen_DEPENDENCIES) igen/$(am__dirstamp)
3578 @rm -f igen/gen$(EXEEXT)
3579 $(AM_V_CCLD)$(LINK) $(igen_gen_OBJECTS) $(igen_gen_LDADD) $(LIBS)
3580 igen/igen.$(OBJEXT): igen/$(am__dirstamp) \
3581 igen/$(DEPDIR)/$(am__dirstamp)
3582
3583 @SIM_ENABLE_IGEN_FALSE@igen/igen$(EXEEXT): $(igen_igen_OBJECTS) $(igen_igen_DEPENDENCIES) $(EXTRA_igen_igen_DEPENDENCIES) igen/$(am__dirstamp)
3584 @SIM_ENABLE_IGEN_FALSE@ @rm -f igen/igen$(EXEEXT)
3585 @SIM_ENABLE_IGEN_FALSE@ $(AM_V_CCLD)$(LINK) $(igen_igen_OBJECTS) $(igen_igen_LDADD) $(LIBS)
3586
3587 igen/ld-cache$(EXEEXT): $(igen_ld_cache_OBJECTS) $(igen_ld_cache_DEPENDENCIES) $(EXTRA_igen_ld_cache_DEPENDENCIES) igen/$(am__dirstamp)
3588 @rm -f igen/ld-cache$(EXEEXT)
3589 $(AM_V_CCLD)$(LINK) $(igen_ld_cache_OBJECTS) $(igen_ld_cache_LDADD) $(LIBS)
3590
3591 igen/ld-decode$(EXEEXT): $(igen_ld_decode_OBJECTS) $(igen_ld_decode_DEPENDENCIES) $(EXTRA_igen_ld_decode_DEPENDENCIES) igen/$(am__dirstamp)
3592 @rm -f igen/ld-decode$(EXEEXT)
3593 $(AM_V_CCLD)$(LINK) $(igen_ld_decode_OBJECTS) $(igen_ld_decode_LDADD) $(LIBS)
3594
3595 igen/ld-insn$(EXEEXT): $(igen_ld_insn_OBJECTS) $(igen_ld_insn_DEPENDENCIES) $(EXTRA_igen_ld_insn_DEPENDENCIES) igen/$(am__dirstamp)
3596 @rm -f igen/ld-insn$(EXEEXT)
3597 $(AM_V_CCLD)$(LINK) $(igen_ld_insn_OBJECTS) $(igen_ld_insn_LDADD) $(LIBS)
3598
3599 igen/table$(EXEEXT): $(igen_table_OBJECTS) $(igen_table_DEPENDENCIES) $(EXTRA_igen_table_DEPENDENCIES) igen/$(am__dirstamp)
3600 @rm -f igen/table$(EXEEXT)
3601 $(AM_V_CCLD)$(LINK) $(igen_table_OBJECTS) $(igen_table_LDADD) $(LIBS)
3602
3603 iq2000/run$(EXEEXT): $(iq2000_run_OBJECTS) $(iq2000_run_DEPENDENCIES) $(EXTRA_iq2000_run_DEPENDENCIES) iq2000/$(am__dirstamp)
3604 @rm -f iq2000/run$(EXEEXT)
3605 $(AM_V_CCLD)$(LINK) $(iq2000_run_OBJECTS) $(iq2000_run_LDADD) $(LIBS)
3606
3607 lm32/run$(EXEEXT): $(lm32_run_OBJECTS) $(lm32_run_DEPENDENCIES) $(EXTRA_lm32_run_DEPENDENCIES) lm32/$(am__dirstamp)
3608 @rm -f lm32/run$(EXEEXT)
3609 $(AM_V_CCLD)$(LINK) $(lm32_run_OBJECTS) $(lm32_run_LDADD) $(LIBS)
3610 m32c/$(DEPDIR)/$(am__dirstamp):
3611 @$(MKDIR_P) m32c/$(DEPDIR)
3612 @: > m32c/$(DEPDIR)/$(am__dirstamp)
3613 m32c/opc2c.$(OBJEXT): m32c/$(am__dirstamp) \
3614 m32c/$(DEPDIR)/$(am__dirstamp)
3615
3616 @SIM_ENABLE_ARCH_m32c_FALSE@m32c/opc2c$(EXEEXT): $(m32c_opc2c_OBJECTS) $(m32c_opc2c_DEPENDENCIES) $(EXTRA_m32c_opc2c_DEPENDENCIES) m32c/$(am__dirstamp)
3617 @SIM_ENABLE_ARCH_m32c_FALSE@ @rm -f m32c/opc2c$(EXEEXT)
3618 @SIM_ENABLE_ARCH_m32c_FALSE@ $(AM_V_CCLD)$(LINK) $(m32c_opc2c_OBJECTS) $(m32c_opc2c_LDADD) $(LIBS)
3619
3620 m32c/run$(EXEEXT): $(m32c_run_OBJECTS) $(m32c_run_DEPENDENCIES) $(EXTRA_m32c_run_DEPENDENCIES) m32c/$(am__dirstamp)
3621 @rm -f m32c/run$(EXEEXT)
3622 $(AM_V_CCLD)$(LINK) $(m32c_run_OBJECTS) $(m32c_run_LDADD) $(LIBS)
3623
3624 m32r/run$(EXEEXT): $(m32r_run_OBJECTS) $(m32r_run_DEPENDENCIES) $(EXTRA_m32r_run_DEPENDENCIES) m32r/$(am__dirstamp)
3625 @rm -f m32r/run$(EXEEXT)
3626 $(AM_V_CCLD)$(LINK) $(m32r_run_OBJECTS) $(m32r_run_LDADD) $(LIBS)
3627 m68hc11/$(DEPDIR)/$(am__dirstamp):
3628 @$(MKDIR_P) m68hc11/$(DEPDIR)
3629 @: > m68hc11/$(DEPDIR)/$(am__dirstamp)
3630 m68hc11/gencode.$(OBJEXT): m68hc11/$(am__dirstamp) \
3631 m68hc11/$(DEPDIR)/$(am__dirstamp)
3632
3633 @SIM_ENABLE_ARCH_m68hc11_FALSE@m68hc11/gencode$(EXEEXT): $(m68hc11_gencode_OBJECTS) $(m68hc11_gencode_DEPENDENCIES) $(EXTRA_m68hc11_gencode_DEPENDENCIES) m68hc11/$(am__dirstamp)
3634 @SIM_ENABLE_ARCH_m68hc11_FALSE@ @rm -f m68hc11/gencode$(EXEEXT)
3635 @SIM_ENABLE_ARCH_m68hc11_FALSE@ $(AM_V_CCLD)$(LINK) $(m68hc11_gencode_OBJECTS) $(m68hc11_gencode_LDADD) $(LIBS)
3636
3637 m68hc11/run$(EXEEXT): $(m68hc11_run_OBJECTS) $(m68hc11_run_DEPENDENCIES) $(EXTRA_m68hc11_run_DEPENDENCIES) m68hc11/$(am__dirstamp)
3638 @rm -f m68hc11/run$(EXEEXT)
3639 $(AM_V_CCLD)$(LINK) $(m68hc11_run_OBJECTS) $(m68hc11_run_LDADD) $(LIBS)
3640
3641 mcore/run$(EXEEXT): $(mcore_run_OBJECTS) $(mcore_run_DEPENDENCIES) $(EXTRA_mcore_run_DEPENDENCIES) mcore/$(am__dirstamp)
3642 @rm -f mcore/run$(EXEEXT)
3643 $(AM_V_CCLD)$(LINK) $(mcore_run_OBJECTS) $(mcore_run_LDADD) $(LIBS)
3644
3645 microblaze/run$(EXEEXT): $(microblaze_run_OBJECTS) $(microblaze_run_DEPENDENCIES) $(EXTRA_microblaze_run_DEPENDENCIES) microblaze/$(am__dirstamp)
3646 @rm -f microblaze/run$(EXEEXT)
3647 $(AM_V_CCLD)$(LINK) $(microblaze_run_OBJECTS) $(microblaze_run_LDADD) $(LIBS)
3648
3649 mips/run$(EXEEXT): $(mips_run_OBJECTS) $(mips_run_DEPENDENCIES) $(EXTRA_mips_run_DEPENDENCIES) mips/$(am__dirstamp)
3650 @rm -f mips/run$(EXEEXT)
3651 $(AM_V_CCLD)$(LINK) $(mips_run_OBJECTS) $(mips_run_LDADD) $(LIBS)
3652
3653 mn10300/run$(EXEEXT): $(mn10300_run_OBJECTS) $(mn10300_run_DEPENDENCIES) $(EXTRA_mn10300_run_DEPENDENCIES) mn10300/$(am__dirstamp)
3654 @rm -f mn10300/run$(EXEEXT)
3655 $(AM_V_CCLD)$(LINK) $(mn10300_run_OBJECTS) $(mn10300_run_LDADD) $(LIBS)
3656
3657 moxie/run$(EXEEXT): $(moxie_run_OBJECTS) $(moxie_run_DEPENDENCIES) $(EXTRA_moxie_run_DEPENDENCIES) moxie/$(am__dirstamp)
3658 @rm -f moxie/run$(EXEEXT)
3659 $(AM_V_CCLD)$(LINK) $(moxie_run_OBJECTS) $(moxie_run_LDADD) $(LIBS)
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4026 uninstall-pkgincludeHEADERS:
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4031
4032 # This directory's subdirectories are mostly independent; you can cd
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4038 $(am__recursive_targets):
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4119
4120 cscopelist-am: $(am__tagged_files)
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4160 @-rm -f site.bak
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4162 @mv site.tmp site.exp
4163
4164 distclean-DEJAGNU:
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4166 -l='$(DEJATOOL)'; for tool in $$l; do \
4167 rm -f $$tool.sum $$tool.log; \
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4169
4170 # Recover from deleted '.trs' file; this should ensure that
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4178 # Leading 'am--fnord' is there to ensure the list of targets does not
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4184 $(TEST_SUITE_LOG): $(TEST_LOGS)
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4251 result_count $$1 "TOTAL:" $$all "$$brg"; \
4252 result_count $$1 "PASS: " $$pass "$$grn"; \
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4255 result_count $$1 "FAIL: " $$fail "$$red"; \
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4260 echo "$(PACKAGE_STRING): $(subdir)/$(TEST_SUITE_LOG)" | \
4261 $(am__rst_title); \
4262 create_testsuite_report --no-color; \
4263 echo; \
4264 echo ".. contents:: :depth: 2"; \
4265 echo; \
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4268 } >$(TEST_SUITE_LOG).tmp || exit 1; \
4269 mv $(TEST_SUITE_LOG).tmp $(TEST_SUITE_LOG); \
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4277 echo "$${col}Testsuite summary for $(PACKAGE_STRING)$${std}"; \
4278 echo "$${col}$$br$${std}"; \
4279 create_testsuite_report --maybe-color; \
4280 echo "$$col$$br$$std"; \
4281 if $$success; then :; else \
4282 echo "$${col}See $(subdir)/$(TEST_SUITE_LOG)$${std}"; \
4283 if test -n "$(PACKAGE_BUGREPORT)"; then \
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4286 echo "$$col$$br$$std"; \
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4288 $$success || exit 1
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4290 check-TESTS:
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4297 log_list=`echo $$log_list`; trs_list=`echo $$trs_list`; \
4298 $(MAKE) $(AM_MAKEFLAGS) $(TEST_SUITE_LOG) TEST_LOGS="$$log_list"; \
4299 exit $$?;
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4301 @test -z "$(TEST_SUITE_LOG)" || rm -f $(TEST_SUITE_LOG)
4302 @set +e; $(am__set_TESTS_bases); \
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4306 log_list=`echo $$log_list`; \
4307 $(MAKE) $(AM_MAKEFLAGS) $(TEST_SUITE_LOG) \
4308 am__force_recheck=am--force-recheck \
4309 TEST_LOGS="$$log_list"; \
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4344 $(am__common_driver_flags) $(AM_LOG_DRIVER_FLAGS) $(LOG_DRIVER_FLAGS) -- $(LOG_COMPILE) \
4345 "$$tst" $(AM_TESTS_FD_REDIRECT)
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4348 $(am__set_b); \
4349 $(am__check_pre) $(TEST_LOG_DRIVER) --test-name "$$f" \
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4362 $(MAKE) $(AM_MAKEFLAGS) check-DEJAGNU check-TESTS
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4364 $(MAKE) $(AM_MAKEFLAGS) check-recursive
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4366 installdirs: installdirs-recursive
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4378 @$(MAKE) $(AM_MAKEFLAGS) install-exec-am install-data-am
4379
4380 installcheck: installcheck-recursive
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4399
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4405 -rm -f avr/$(am__dirstamp)
4406 -rm -f bfin/$(am__dirstamp)
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4411 -rm -f cr16/$(am__dirstamp)
4412 -rm -f cris/$(DEPDIR)/$(am__dirstamp)
4413 -rm -f cris/$(am__dirstamp)
4414 -rm -f d10v/$(DEPDIR)/$(am__dirstamp)
4415 -rm -f d10v/$(am__dirstamp)
4416 -rm -f erc32/$(DEPDIR)/$(am__dirstamp)
4417 -rm -f erc32/$(am__dirstamp)
4418 -rm -f example-synacor/$(am__dirstamp)
4419 -rm -f frv/$(am__dirstamp)
4420 -rm -f ft32/$(am__dirstamp)
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4423 -rm -f igen/$(am__dirstamp)
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4428 -rm -f m32r/$(am__dirstamp)
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4430 -rm -f m68hc11/$(am__dirstamp)
4431 -rm -f mcore/$(am__dirstamp)
4432 -rm -f microblaze/$(am__dirstamp)
4433 -rm -f mips/$(am__dirstamp)
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4435 -rm -f moxie/$(am__dirstamp)
4436 -rm -f msp430/$(am__dirstamp)
4437 -rm -f or1k/$(am__dirstamp)
4438 -rm -f ppc/$(DEPDIR)/$(am__dirstamp)
4439 -rm -f ppc/$(am__dirstamp)
4440 -rm -f pru/$(am__dirstamp)
4441 -rm -f riscv/$(am__dirstamp)
4442 -rm -f rl78/$(am__dirstamp)
4443 -rm -f rx/$(am__dirstamp)
4444 -rm -f sh/$(DEPDIR)/$(am__dirstamp)
4445 -rm -f sh/$(am__dirstamp)
4446 -rm -f testsuite/common/$(DEPDIR)/$(am__dirstamp)
4447 -rm -f testsuite/common/$(am__dirstamp)
4448 -rm -f v850/$(am__dirstamp)
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4451 maintainer-clean-generic:
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4456
4457 clean-am: clean-checkPROGRAMS clean-generic clean-libtool \
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4460 distclean: distclean-recursive
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4464 distclean-am: clean-am distclean-DEJAGNU distclean-compile \
4465 distclean-generic distclean-hdr distclean-libtool \
4466 distclean-tags
4467
4468 dvi: dvi-recursive
4469
4470 dvi-am:
4471
4472 html: html-recursive
4473
4474 html-am:
4475
4476 info: info-recursive
4477
4478 info-am:
4479
4480 install-data-am: install-armdocDATA install-data-local install-dtbDATA \
4481 install-erc32docDATA install-frvdocDATA install-or1kdocDATA \
4482 install-pkgincludeHEADERS install-ppcdocDATA install-rxdocDATA
4483
4484 install-dvi: install-dvi-recursive
4485
4486 install-dvi-am:
4487
4488 install-exec-am: install-exec-local
4489
4490 install-html: install-html-recursive
4491
4492 install-html-am:
4493
4494 install-info: install-info-recursive
4495
4496 install-info-am:
4497
4498 install-man:
4499
4500 install-pdf: install-pdf-recursive
4501
4502 install-pdf-am:
4503
4504 install-ps: install-ps-recursive
4505
4506 install-ps-am:
4507
4508 installcheck-am:
4509
4510 maintainer-clean: maintainer-clean-recursive
4511 -rm -f $(am__CONFIG_DISTCLEAN_FILES)
4512 -rm -rf $(top_srcdir)/autom4te.cache
4513 -rm -rf common/$(DEPDIR) cr16/$(DEPDIR) cris/$(DEPDIR) d10v/$(DEPDIR) erc32/$(DEPDIR) igen/$(DEPDIR) m32c/$(DEPDIR) m68hc11/$(DEPDIR) ppc/$(DEPDIR) sh/$(DEPDIR) testsuite/common/$(DEPDIR)
4514 -rm -f Makefile
4515 maintainer-clean-am: distclean-am maintainer-clean-generic
4516
4517 mostlyclean: mostlyclean-recursive
4518
4519 mostlyclean-am: mostlyclean-compile mostlyclean-generic \
4520 mostlyclean-libtool
4521
4522 pdf: pdf-recursive
4523
4524 pdf-am:
4525
4526 ps: ps-recursive
4527
4528 ps-am:
4529
4530 uninstall-am: uninstall-armdocDATA uninstall-dtbDATA \
4531 uninstall-erc32docDATA uninstall-frvdocDATA uninstall-local \
4532 uninstall-or1kdocDATA uninstall-pkgincludeHEADERS \
4533 uninstall-ppcdocDATA uninstall-rxdocDATA
4534
4535 .MAKE: $(am__recursive_targets) all check check-am install install-am \
4536 install-strip
4537
4538 .PHONY: $(am__recursive_targets) CTAGS GTAGS TAGS all all-am \
4539 am--refresh check check-DEJAGNU check-TESTS check-am clean \
4540 clean-checkPROGRAMS clean-cscope clean-generic clean-libtool \
4541 clean-noinstLIBRARIES clean-noinstPROGRAMS cscope \
4542 cscopelist-am ctags ctags-am distclean distclean-DEJAGNU \
4543 distclean-compile distclean-generic distclean-hdr \
4544 distclean-libtool distclean-tags dvi dvi-am html html-am info \
4545 info-am install install-am install-armdocDATA install-data \
4546 install-data-am install-data-local install-dtbDATA install-dvi \
4547 install-dvi-am install-erc32docDATA install-exec \
4548 install-exec-am install-exec-local install-frvdocDATA \
4549 install-html install-html-am install-info install-info-am \
4550 install-man install-or1kdocDATA install-pdf install-pdf-am \
4551 install-pkgincludeHEADERS install-ppcdocDATA install-ps \
4552 install-ps-am install-rxdocDATA install-strip installcheck \
4553 installcheck-am installdirs installdirs-am maintainer-clean \
4554 maintainer-clean-generic mostlyclean mostlyclean-compile \
4555 mostlyclean-generic mostlyclean-libtool pdf pdf-am ps ps-am \
4556 recheck tags tags-am uninstall uninstall-am \
4557 uninstall-armdocDATA uninstall-dtbDATA uninstall-erc32docDATA \
4558 uninstall-frvdocDATA uninstall-local uninstall-or1kdocDATA \
4559 uninstall-pkgincludeHEADERS uninstall-ppcdocDATA \
4560 uninstall-rxdocDATA
4561
4562 .PRECIOUS: Makefile
4563
4564 @am__include@ @am__quote@$(GNULIB_PARENT_DIR)/gnulib/Makefile.gnulib.inc@am__quote@
4565
4566 # Generate target constants for newlib/libgloss from its source tree.
4567 # This file is shipped with distributions so we build in the source dir.
4568 # Use `make nltvals' to rebuild.
4569 .PHONY: nltvals
4570 nltvals:
4571 $(srccom)/gennltvals.py --cpp "$(CPP)"
4572
4573 common/version.c: common/version.c-stamp ; @true
4574 common/version.c-stamp: $(srcroot)/gdb/version.in $(srcroot)/bfd/version.h $(srcdir)/common/create-version.sh
4575 $(AM_V_GEN)$(SHELL) $(srcdir)/common/create-version.sh $(srcroot)/gdb $@.tmp
4576 $(AM_V_at)$(SHELL) $(srcroot)/move-if-change $@.tmp $(@:-stamp=)
4577 $(AM_V_at)touch $@
4578
4579 # FIXME This is one very simple-minded way of generating the file hw-config.h.
4580 %/hw-config.h: %/stamp-hw ; @true
4581 %/stamp-hw: Makefile
4582 $(AM_V_GEN)set -e; \
4583 ( \
4584 sim_hw="$(SIM_HW_DEVICES) $($(@D)_SIM_EXTRA_HW_DEVICES)" ; \
4585 echo "/* generated by Makefile */" ; \
4586 printf "extern const struct hw_descriptor dv_%s_descriptor[];\n" $$sim_hw ; \
4587 echo "const struct hw_descriptor * const hw_descriptors[] = {" ; \
4588 printf " dv_%s_descriptor,\n" $$sim_hw ; \
4589 echo " NULL," ; \
4590 echo "};" \
4591 ) > $@.tmp; \
4592 $(SHELL) $(srcroot)/move-if-change $@.tmp $(@D)/hw-config.h; \
4593 touch $@
4594 .PRECIOUS: %/stamp-hw
4595 %/modules.c: %/stamp-modules ; @true
4596 %/stamp-modules: Makefile
4597 $(AM_V_GEN)set -e; \
4598 LANG=C ; export LANG; \
4599 LC_ALL=C ; export LC_ALL; \
4600 sed -n -e '/^sim_install_/{s/^\(sim_install_[a-z_0-9A-Z]*\).*/\1/;p}' $(GEN_MODULES_C_SRCS) | sort >$@.l-tmp; \
4601 ( \
4602 echo '/* Do not modify this file. */'; \
4603 echo '/* It is created automatically by the Makefile. */'; \
4604 echo '#include "libiberty.h"'; \
4605 echo '#include "sim-module.h"'; \
4606 sed -e 's:\(.*\):extern MODULE_INIT_FN \1;:' $@.l-tmp; \
4607 echo 'MODULE_INSTALL_FN * const sim_modules_detected[] = {'; \
4608 sed -e 's:\(.*\): \1,:' $@.l-tmp; \
4609 echo '};'; \
4610 echo 'const int sim_modules_detected_len = ARRAY_SIZE (sim_modules_detected);'; \
4611 ) >$@.tmp; \
4612 $(SHELL) $(srcroot)/move-if-change $@.tmp $(@D)/modules.c; \
4613 rm -f $@.l-tmp; \
4614 touch $@
4615 .PRECIOUS: %/stamp-modules
4616
4617 # Alias for developers.
4618 @SIM_ENABLE_IGEN_TRUE@igen: $(IGEN)
4619
4620 # These rules are copied from automake, but tweaked to use FOR_BUILD variables.
4621 @SIM_ENABLE_IGEN_TRUE@igen/libigen.a: $(igen_libigen_a_OBJECTS) $(igen_libigen_a_DEPENDENCIES) $(EXTRA_igen_libigen_a_DEPENDENCIES) igen/$(am__dirstamp)
4622 @SIM_ENABLE_IGEN_TRUE@ $(AM_V_at)-rm -f $@
4623 @SIM_ENABLE_IGEN_TRUE@ $(AM_V_AR)$(AR_FOR_BUILD) $(ARFLAGS) $@ $(igen_libigen_a_OBJECTS) $(igen_libigen_a_LIBADD)
4624 @SIM_ENABLE_IGEN_TRUE@ $(AM_V_at)$(RANLIB_FOR_BUILD) $@
4625
4626 @SIM_ENABLE_IGEN_TRUE@igen/igen$(EXEEXT): $(igen_igen_OBJECTS) $(igen_igen_DEPENDENCIES) igen/$(am__dirstamp)
4627 @SIM_ENABLE_IGEN_TRUE@ $(AM_V_CCLD)$(LINK_FOR_BUILD) $(igen_igen_OBJECTS) $(igen_igen_LDADD)
4628
4629 # igen is a build-time only tool. Override the default rules for it.
4630 @SIM_ENABLE_IGEN_TRUE@igen/%.o: igen/%.c
4631 @SIM_ENABLE_IGEN_TRUE@ $(AM_V_CC)$(COMPILE_FOR_BUILD) -c $< -o $@
4632
4633 # Build some of the files in standalone mode for developers of igen itself.
4634 @SIM_ENABLE_IGEN_TRUE@igen/%-main.o: igen/%.c
4635 @SIM_ENABLE_IGEN_TRUE@ $(AM_V_CC)$(COMPILE_FOR_BUILD) -DMAIN -c $< -o $@
4636
4637 site-sim-config.exp: Makefile
4638 $(AM_V_GEN)( \
4639 echo "set SIM_PRIMARY_TARGET \"$(SIM_PRIMARY_TARGET)\""; \
4640 echo "set builddir \"$(builddir)\""; \
4641 echo "set srcdir \"$(srcdir)/testsuite\""; \
4642 $(foreach V,$(SIM_TOOLCHAIN_VARS),echo "set $(V) \"$($(V))\"";) \
4643 ) > $@
4644
4645 # Ignore dirs that only contain configuration settings.
4646 check/./config/%.exp: ; @true
4647 check/config/%.exp: ; @true
4648 check/./lib/%.exp: ; @true
4649 check/lib/%.exp: ; @true
4650
4651 check/%.exp:
4652 $(AM_V_at)mkdir -p testsuite/$*
4653 $(AM_V_RUNTEST)$(DO_RUNTEST) --objdir testsuite/$* --outdir testsuite/$* $*.exp
4654
4655 check-DEJAGNU-parallel:
4656 $(AM_V_at)( \
4657 set -- `cd $(srcdir)/testsuite && find . -name '*.exp' -printf '%P\n' | sed 's:[.]exp$$::'`; \
4658 $(MAKE) -k `printf 'check/%s.exp ' $$@`; \
4659 ret=$$?; \
4660 set -- `printf 'testsuite/%s/ ' $$@`; \
4661 $(SHELL) $(srcroot)/contrib/dg-extract-results.sh \
4662 `find $$@ -maxdepth 1 -name testrun.sum 2>/dev/null | sort` > testrun.sum; \
4663 $(SHELL) $(srcroot)/contrib/dg-extract-results.sh -L \
4664 `find $$@ -maxdepth 1 -name testrun.log 2>/dev/null | sort` > testrun.log; \
4665 echo; \
4666 $(SED) -n '/^.*===.*Summary.*===/,$$p' testrun.sum; \
4667 exit $$ret)
4668
4669 check-DEJAGNU-single:
4670 $(AM_V_RUNTEST)$(DO_RUNTEST)
4671
4672 # If running a single job, invoking runtest once is faster & has nicer output.
4673 check-DEJAGNU: site.exp
4674 $(AM_V_at)(set -e; \
4675 EXPECT=${EXPECT} ; export EXPECT ; \
4676 runtest=$(RUNTEST); \
4677 if $(SHELL) -c "$$runtest --version" > /dev/null 2>&1; then \
4678 case "$(MAKEFLAGS)" in \
4679 *-j*) $(MAKE) check-DEJAGNU-parallel;; \
4680 *) $(MAKE) check-DEJAGNU-single;; \
4681 esac; \
4682 else \
4683 echo "WARNING: could not find \`runtest'" 1>&2; :;\
4684 fi)
4685
4686 # These tests are build-time only tools. Override the default rules for them.
4687 testsuite/common/%.o: testsuite/common/%.c
4688 $(AM_V_CC)$(COMPILE_FOR_BUILD) $(testsuite_common_CPPFLAGS) -c $< -o $@
4689
4690 testsuite/common/alu-tst$(EXEEXT): $(testsuite_common_alu_tst_OBJECTS) $(testsuite_common_alu_tst_DEPENDENCIES) testsuite/common/$(am__dirstamp)
4691 $(AM_V_CCLD)$(LINK_FOR_BUILD) $(testsuite_common_alu_tst_OBJECTS) $(testsuite_common_alu_tst_LDADD)
4692
4693 testsuite/common/fpu-tst$(EXEEXT): $(testsuite_common_fpu_tst_OBJECTS) $(testsuite_common_fpu_tst_DEPENDENCIES) testsuite/common/$(am__dirstamp)
4694 $(AM_V_CCLD)$(LINK_FOR_BUILD) $(testsuite_common_fpu_tst_OBJECTS) $(testsuite_common_fpu_tst_LDADD)
4695
4696 testsuite/common/bits-gen$(EXEEXT): $(testsuite_common_bits_gen_OBJECTS) $(testsuite_common_bits_gen_DEPENDENCIES) testsuite/common/$(am__dirstamp)
4697 $(AM_V_CCLD)$(LINK_FOR_BUILD) $(testsuite_common_bits_gen_OBJECTS) $(testsuite_common_bits_gen_LDADD)
4698
4699 testsuite/common/bits32m0$(EXEEXT): $(testsuite_common_bits32m0_OBJECTS) $(testsuite_common_bits32m0_DEPENDENCIES) testsuite/common/$(am__dirstamp)
4700 $(AM_V_CCLD)$(LINK_FOR_BUILD) $(testsuite_common_bits32m0_OBJECTS) $(testsuite_common_bits32m0_LDADD)
4701
4702 testsuite/common/bits32m0.c: testsuite/common/bits-gen$(EXEEXT) testsuite/common/bits-tst.c
4703 $(AM_V_GEN)$< 32 0 big > $@.tmp
4704 $(AM_V_at)cat $(srcdir)/testsuite/common/bits-tst.c >> $@.tmp
4705 $(AM_V_at)mv $@.tmp $@
4706
4707 testsuite/common/bits32m31$(EXEEXT): $(testsuite_common_bits32m31_OBJECTS) $(testsuite_common_bits32m31_DEPENDENCIES) testsuite/common/$(am__dirstamp)
4708 $(AM_V_CCLD)$(LINK_FOR_BUILD) $(testsuite_common_bits32m31_OBJECTS) $(testsuite_common_bits32m31_LDADD)
4709
4710 testsuite/common/bits32m31.c: testsuite/common/bits-gen$(EXEEXT) testsuite/common/bits-tst.c
4711 $(AM_V_GEN)$< 32 31 little > $@.tmp
4712 $(AM_V_at)cat $(srcdir)/testsuite/common/bits-tst.c >> $@.tmp
4713 $(AM_V_at)mv $@.tmp $@
4714
4715 testsuite/common/bits64m0$(EXEEXT): $(testsuite_common_bits64m0_OBJECTS) $(testsuite_common_bits64m0_DEPENDENCIES) testsuite/common/$(am__dirstamp)
4716 $(AM_V_CCLD)$(LINK_FOR_BUILD) $(testsuite_common_bits64m0_OBJECTS) $(testsuite_common_bits64m0_LDADD)
4717
4718 testsuite/common/bits64m0.c: testsuite/common/bits-gen$(EXEEXT) testsuite/common/bits-tst.c
4719 $(AM_V_GEN)$< 64 0 big > $@.tmp
4720 $(AM_V_at)cat $(srcdir)/testsuite/common/bits-tst.c >> $@.tmp
4721 $(AM_V_at)mv $@.tmp $@
4722
4723 testsuite/common/bits64m63$(EXEEXT): $(testsuite_common_bits64m63_OBJECTS) $(testsuite_common_bits64m63_DEPENDENCIES) testsuite/common/$(am__dirstamp)
4724 $(AM_V_CCLD)$(LINK_FOR_BUILD) $(testsuite_common_bits64m63_OBJECTS) $(testsuite_common_bits64m63_LDADD)
4725
4726 testsuite/common/bits64m63.c: testsuite/common/bits-gen$(EXEEXT) testsuite/common/bits-tst.c
4727 $(AM_V_GEN)$< 64 63 little > $@.tmp
4728 $(AM_V_at)cat $(srcdir)/testsuite/common/bits-tst.c >> $@.tmp
4729 $(AM_V_at)mv $@.tmp $@
4730 @SIM_ENABLE_ARCH_aarch64_TRUE@$(aarch64_libsim_a_OBJECTS) $(aarch64_libsim_a_LIBADD): aarch64/hw-config.h
4731
4732 @SIM_ENABLE_ARCH_aarch64_TRUE@aarch64/%.o: common/%.c
4733 @SIM_ENABLE_ARCH_aarch64_TRUE@ $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
4734 @SIM_ENABLE_ARCH_arm_TRUE@$(arm_libsim_a_OBJECTS) $(arm_libsim_a_LIBADD): arm/hw-config.h
4735
4736 @SIM_ENABLE_ARCH_arm_TRUE@arm/%.o: common/%.c
4737 @SIM_ENABLE_ARCH_arm_TRUE@ $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
4738 @SIM_ENABLE_ARCH_avr_TRUE@$(avr_libsim_a_OBJECTS) $(avr_libsim_a_LIBADD): avr/hw-config.h
4739
4740 @SIM_ENABLE_ARCH_avr_TRUE@avr/%.o: common/%.c
4741 @SIM_ENABLE_ARCH_avr_TRUE@ $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
4742 @SIM_ENABLE_ARCH_bfin_TRUE@$(bfin_libsim_a_OBJECTS) $(bfin_libsim_a_LIBADD): bfin/hw-config.h
4743
4744 @SIM_ENABLE_ARCH_bfin_TRUE@bfin/%.o: common/%.c
4745 @SIM_ENABLE_ARCH_bfin_TRUE@ $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
4746
4747 @SIM_ENABLE_ARCH_bfin_TRUE@bfin/linux-fixed-code.h: @MAINT@ $(srcdir)/bfin/linux-fixed-code.s bfin/local.mk bfin/$(am__dirstamp)
4748 @SIM_ENABLE_ARCH_bfin_TRUE@ $(AM_V_GEN)$(AS_FOR_TARGET_BFIN) $(srcdir)/bfin/linux-fixed-code.s -o bfin/linux-fixed-code.o
4749 @SIM_ENABLE_ARCH_bfin_TRUE@ $(AM_V_at)(\
4750 @SIM_ENABLE_ARCH_bfin_TRUE@ set -e; \
4751 @SIM_ENABLE_ARCH_bfin_TRUE@ echo "/* DO NOT EDIT: Autogenerated from linux-fixed-code.s. */"; \
4752 @SIM_ENABLE_ARCH_bfin_TRUE@ echo "static const unsigned char bfin_linux_fixed_code[] ="; \
4753 @SIM_ENABLE_ARCH_bfin_TRUE@ echo "{"; \
4754 @SIM_ENABLE_ARCH_bfin_TRUE@ $(OBJDUMP_FOR_TARGET_BFIN) -d -z bfin/linux-fixed-code.o > $@.dis; \
4755 @SIM_ENABLE_ARCH_bfin_TRUE@ sed -n \
4756 @SIM_ENABLE_ARCH_bfin_TRUE@ -e 's:^[^ ]* :0x:' \
4757 @SIM_ENABLE_ARCH_bfin_TRUE@ -e '/^0x/{s: .*::;s: *$$:,:;s: :, 0x:g;p;}' \
4758 @SIM_ENABLE_ARCH_bfin_TRUE@ $@.dis; \
4759 @SIM_ENABLE_ARCH_bfin_TRUE@ rm -f $@.dis; \
4760 @SIM_ENABLE_ARCH_bfin_TRUE@ echo "};" \
4761 @SIM_ENABLE_ARCH_bfin_TRUE@ ) > $@.tmp
4762 @SIM_ENABLE_ARCH_bfin_TRUE@ $(AM_V_at)$(SHELL) $(srcroot)/move-if-change $@.tmp $(srcdir)/bfin/linux-fixed-code.h
4763 @SIM_ENABLE_ARCH_bfin_TRUE@ $(AM_V_at)touch $(srcdir)/bfin/linux-fixed-code.h
4764 @SIM_ENABLE_ARCH_bpf_TRUE@$(bpf_libsim_a_OBJECTS) $(bpf_libsim_a_LIBADD): bpf/hw-config.h
4765
4766 @SIM_ENABLE_ARCH_bpf_TRUE@bpf/%.o: common/%.c
4767 @SIM_ENABLE_ARCH_bpf_TRUE@ $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
4768 @SIM_ENABLE_ARCH_bpf_TRUE@bpf/modules.c: | $(bpf_BUILD_OUTPUTS)
4769
4770 @SIM_ENABLE_ARCH_bpf_TRUE@bpf/mloop-le.c bpf/eng-le.h: bpf/stamp-mloop-le ; @true
4771 @SIM_ENABLE_ARCH_bpf_TRUE@bpf/stamp-mloop-le: $(srccom)/genmloop.sh bpf/mloop.in
4772 @SIM_ENABLE_ARCH_bpf_TRUE@ $(AM_V_GEN)$(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \
4773 @SIM_ENABLE_ARCH_bpf_TRUE@ -mono -scache -prefix bpfbf_ebpfle -cpu bpfbf \
4774 @SIM_ENABLE_ARCH_bpf_TRUE@ -infile $(srcdir)/bpf/mloop.in \
4775 @SIM_ENABLE_ARCH_bpf_TRUE@ -outfile-prefix bpf/ -outfile-suffix -le
4776 @SIM_ENABLE_ARCH_bpf_TRUE@ $(AM_V_at)$(SHELL) $(srcroot)/move-if-change bpf/eng-le.hin bpf/eng-le.h
4777 @SIM_ENABLE_ARCH_bpf_TRUE@ $(AM_V_at)$(SHELL) $(srcroot)/move-if-change bpf/mloop-le.cin bpf/mloop-le.c
4778 @SIM_ENABLE_ARCH_bpf_TRUE@ $(AM_V_at)touch $@
4779
4780 @SIM_ENABLE_ARCH_bpf_TRUE@bpf/mloop-be.c bpf/eng-be.h: bpf/stamp-mloop-be ; @true
4781 @SIM_ENABLE_ARCH_bpf_TRUE@bpf/stamp-mloop-be: $(srccom)/genmloop.sh bpf/mloop.in
4782 @SIM_ENABLE_ARCH_bpf_TRUE@ $(AM_V_GEN)$(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \
4783 @SIM_ENABLE_ARCH_bpf_TRUE@ -mono -scache -prefix bpfbf_ebpfbe -cpu bpfbf \
4784 @SIM_ENABLE_ARCH_bpf_TRUE@ -infile $(srcdir)/bpf/mloop.in \
4785 @SIM_ENABLE_ARCH_bpf_TRUE@ -outfile-prefix bpf/ -outfile-suffix -be
4786 @SIM_ENABLE_ARCH_bpf_TRUE@ $(AM_V_at)$(SHELL) $(srcroot)/move-if-change bpf/eng-be.hin bpf/eng-be.h
4787 @SIM_ENABLE_ARCH_bpf_TRUE@ $(AM_V_at)$(SHELL) $(srcroot)/move-if-change bpf/mloop-be.cin bpf/mloop-be.c
4788 @SIM_ENABLE_ARCH_bpf_TRUE@ $(AM_V_at)touch $@
4789
4790 @SIM_ENABLE_ARCH_bpf_TRUE@bpf/cgen: bpf/cgen-arch bpf/cgen-cpu bpf/cgen-defs-le bpf/cgen-defs-be bpf/cgen-decode-le bpf/cgen-decode-be
4791
4792 @SIM_ENABLE_ARCH_bpf_TRUE@bpf/cgen-arch:
4793 @SIM_ENABLE_ARCH_bpf_TRUE@ $(AM_V_GEN)mach=bpf cpu=bpfbf FLAGS="with-scache"; $(CGEN_GEN_ARCH)
4794 @SIM_ENABLE_ARCH_bpf_TRUE@bpf/arch.h bpf/arch.c bpf/cpuall.h: @CGEN_MAINT@ bpf/cgen-arch
4795
4796 @SIM_ENABLE_ARCH_bpf_TRUE@bpf/cgen-cpu:
4797 @SIM_ENABLE_ARCH_bpf_TRUE@ $(AM_V_GEN)isa=ebpfle,ebpfbe cpu=bpfbf mach=bpf FLAGS="with-multiple-isa with-scache"; $(CGEN_GEN_CPU)
4798 @SIM_ENABLE_ARCH_bpf_TRUE@ $(AM_V_at)rm -f $(srcdir)/bpf/model.c
4799 @SIM_ENABLE_ARCH_bpf_TRUE@bpf/cpu.h bpf/cpu.c bpf/model.c: @CGEN_MAINT@ bpf/cgen-cpu
4800
4801 @SIM_ENABLE_ARCH_bpf_TRUE@bpf/cgen-defs-le:
4802 @SIM_ENABLE_ARCH_bpf_TRUE@ $(AM_V_GEN)isa=ebpfle cpu=bpfbf mach=bpf FLAGS="with-scache" SUFFIX="-le"; $(CGEN_GEN_DEFS)
4803 @SIM_ENABLE_ARCH_bpf_TRUE@bpf/defs-le.h: @CGEN_MAINT@ bpf/cgen-defs-le
4804
4805 @SIM_ENABLE_ARCH_bpf_TRUE@bpf/cgen-defs-be:
4806 @SIM_ENABLE_ARCH_bpf_TRUE@ $(AM_V_GEN)isa=ebpfbe cpu=bpfbf mach=bpf FLAGS="with-scache" SUFFIX="-be"; $(CGEN_GEN_DEFS)
4807 @SIM_ENABLE_ARCH_bpf_TRUE@bpf/defs-be.h: @CGEN_MAINT@ bpf/cgen-defs-be
4808
4809 @SIM_ENABLE_ARCH_bpf_TRUE@bpf/cgen-decode-le:
4810 @SIM_ENABLE_ARCH_bpf_TRUE@ $(AM_V_GEN)isa=ebpfle cpu=bpfbf mach=bpf FLAGS="with-scache" SUFFIX="-le" EXTRAFILES="$(CGEN_CPU_SEM)"; $(CGEN_GEN_DECODE)
4811 @SIM_ENABLE_ARCH_bpf_TRUE@bpf/sem-le.c bpf/decode-le.c bpf/decode-le.h: @CGEN_MAINT@ bpf/cgen-decode-vle
4812
4813 @SIM_ENABLE_ARCH_bpf_TRUE@bpf/cgen-decode-be:
4814 @SIM_ENABLE_ARCH_bpf_TRUE@ $(AM_V_GEN)isa=ebpfbe cpu=bpfbf mach=bpf FLAGS="with-scache" SUFFIX="-be" EXTRAFILES="$(CGEN_CPU_SEM)"; $(CGEN_GEN_DECODE)
4815 @SIM_ENABLE_ARCH_bpf_TRUE@bpf/sem-be.c bpf/decode-be.c bpf/decode-be.h: @CGEN_MAINT@ bpf/cgen-decode-be
4816 @SIM_ENABLE_ARCH_cr16_TRUE@$(cr16_libsim_a_OBJECTS) $(cr16_libsim_a_LIBADD): cr16/hw-config.h
4817
4818 @SIM_ENABLE_ARCH_cr16_TRUE@cr16/%.o: common/%.c
4819 @SIM_ENABLE_ARCH_cr16_TRUE@ $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
4820 @SIM_ENABLE_ARCH_cr16_TRUE@cr16/modules.c: | $(cr16_BUILD_OUTPUTS)
4821
4822 # These rules are copied from automake, but tweaked to use FOR_BUILD variables.
4823 @SIM_ENABLE_ARCH_cr16_TRUE@cr16/gencode$(EXEEXT): $(cr16_gencode_OBJECTS) $(cr16_gencode_DEPENDENCIES) cr16/$(am__dirstamp)
4824 @SIM_ENABLE_ARCH_cr16_TRUE@ $(AM_V_CCLD)$(LINK_FOR_BUILD) $(cr16_gencode_OBJECTS) $(cr16_gencode_LDADD)
4825
4826 # gencode is a build-time only tool. Override the default rules for it.
4827 @SIM_ENABLE_ARCH_cr16_TRUE@cr16/gencode.o: cr16/gencode.c
4828 @SIM_ENABLE_ARCH_cr16_TRUE@ $(AM_V_CC)$(COMPILE_FOR_BUILD) -c $< -o $@
4829 @SIM_ENABLE_ARCH_cr16_TRUE@cr16/cr16-opc.o: ../opcodes/cr16-opc.c
4830 @SIM_ENABLE_ARCH_cr16_TRUE@ $(AM_V_CC)$(COMPILE_FOR_BUILD) -c $< -o $@
4831
4832 @SIM_ENABLE_ARCH_cr16_TRUE@cr16/simops.h: cr16/gencode$(EXEEXT)
4833 @SIM_ENABLE_ARCH_cr16_TRUE@ $(AM_V_GEN)$< -h >$@
4834
4835 @SIM_ENABLE_ARCH_cr16_TRUE@cr16/table.c: cr16/gencode$(EXEEXT)
4836 @SIM_ENABLE_ARCH_cr16_TRUE@ $(AM_V_GEN)$< >$@
4837 @SIM_ENABLE_ARCH_cris_TRUE@$(cris_libsim_a_OBJECTS) $(cris_libsim_a_LIBADD): cris/hw-config.h
4838
4839 @SIM_ENABLE_ARCH_cris_TRUE@cris/%.o: common/%.c
4840 @SIM_ENABLE_ARCH_cris_TRUE@ $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
4841 @SIM_ENABLE_ARCH_cris_TRUE@cris/modules.c: | $(cris_BUILD_OUTPUTS)
4842
4843 @SIM_ENABLE_ARCH_cris_TRUE@cris/mloopv10f.c cris/engv10.h: cris/stamp-mloop-v10f ; @true
4844 @SIM_ENABLE_ARCH_cris_TRUE@cris/stamp-mloop-v10f: $(srccom)/genmloop.sh cris/mloop.in
4845 @SIM_ENABLE_ARCH_cris_TRUE@ $(AM_V_GEN)$(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \
4846 @SIM_ENABLE_ARCH_cris_TRUE@ -mono -no-fast -pbb -switch semcrisv10f-switch.c \
4847 @SIM_ENABLE_ARCH_cris_TRUE@ -cpu crisv10f \
4848 @SIM_ENABLE_ARCH_cris_TRUE@ -infile $(srcdir)/cris/mloop.in -outfile-prefix cris/ -outfile-suffix -v10f
4849 @SIM_ENABLE_ARCH_cris_TRUE@ $(AM_V_at)$(SHELL) $(srcroot)/move-if-change cris/eng-v10f.hin cris/engv10.h
4850 @SIM_ENABLE_ARCH_cris_TRUE@ $(AM_V_at)$(SHELL) $(srcroot)/move-if-change cris/mloop-v10f.cin cris/mloopv10f.c
4851 @SIM_ENABLE_ARCH_cris_TRUE@ $(AM_V_at)touch $@
4852
4853 @SIM_ENABLE_ARCH_cris_TRUE@cris/mloopv32f.c cris/engv32.h: cris/stamp-mloop-v32f ; @true
4854 @SIM_ENABLE_ARCH_cris_TRUE@cris/stamp-mloop-v32f: $(srccom)/genmloop.sh cris/mloop.in
4855 @SIM_ENABLE_ARCH_cris_TRUE@ $(AM_V_GEN)$(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \
4856 @SIM_ENABLE_ARCH_cris_TRUE@ -mono -no-fast -pbb -switch semcrisv32f-switch.c \
4857 @SIM_ENABLE_ARCH_cris_TRUE@ -cpu crisv32f \
4858 @SIM_ENABLE_ARCH_cris_TRUE@ -infile $(srcdir)/cris/mloop.in -outfile-prefix cris/ -outfile-suffix -v32f
4859 @SIM_ENABLE_ARCH_cris_TRUE@ $(AM_V_at)$(SHELL) $(srcroot)/move-if-change cris/eng-v32f.hin cris/engv32.h
4860 @SIM_ENABLE_ARCH_cris_TRUE@ $(AM_V_at)$(SHELL) $(srcroot)/move-if-change cris/mloop-v32f.cin cris/mloopv32f.c
4861 @SIM_ENABLE_ARCH_cris_TRUE@ $(AM_V_at)touch $@
4862
4863 @SIM_ENABLE_ARCH_cris_TRUE@cris/cgen: cris/cgen-arch cris/cgen-cpu-decode-v10f cris/cgen-cpu-decode-v32f
4864
4865 @SIM_ENABLE_ARCH_cris_TRUE@cris/cgen-arch:
4866 @SIM_ENABLE_ARCH_cris_TRUE@ $(AM_V_GEN)mach=crisv10,crisv32 FLAGS="with-scache with-profile=fn"; $(CGEN_GEN_ARCH)
4867 @SIM_ENABLE_ARCH_cris_TRUE@cris/arch.h cris/arch.c cris/cpuall.h: @CGEN_MAINT@ cris/cgen-arch
4868
4869 @SIM_ENABLE_ARCH_cris_TRUE@cris/cgen-cpu-decode-v10f:
4870 @SIM_ENABLE_ARCH_cris_TRUE@ $(AM_V_GEN)cpu=crisv10f mach=crisv10 SUFFIX=v10 FLAGS="with-scache with-profile=fn" EXTRAFILES="$(CGEN_CPU_SEMSW)"; $(CGEN_GEN_CPU_DECODE)
4871 @SIM_ENABLE_ARCH_cris_TRUE@ $(AM_V_at)$(SHELL) $(srcroot)/move-if-change $(srcdir)/cris/semv10-switch.c $(srcdir)/cris/semcrisv10f-switch.c
4872 @SIM_ENABLE_ARCH_cris_TRUE@cris/cpuv10.h cris/cpuv10.c cris/semcrisv10f-switch.c cris/modelv10.c cris/decodev10.c cris/decodev10.h: @CGEN_MAINT@ cris/cgen-cpu-decode-v10f
4873
4874 @SIM_ENABLE_ARCH_cris_TRUE@cris/cgen-cpu-decode-v32f:
4875 @SIM_ENABLE_ARCH_cris_TRUE@ $(AM_V_GEN)cpu=crisv32f mach=crisv32 SUFFIX=v32 FLAGS="with-scache with-profile=fn" EXTRAFILES="$(CGEN_CPU_SEMSW)"; $(CGEN_GEN_CPU_DECODE)
4876 @SIM_ENABLE_ARCH_cris_TRUE@ $(AM_V_at)$(SHELL) $(srcroot)/move-if-change $(srcdir)/cris/semv32-switch.c $(srcdir)/cris/semcrisv32f-switch.c
4877 @SIM_ENABLE_ARCH_cris_TRUE@cris/cpuv32.h cris/cpuv32.c cris/semcrisv32f-switch.c cris/modelv32.c cris/decodev32.c cris/decodev32.h: @CGEN_MAINT@ cris/cgen-cpu-decode-v32f
4878 @SIM_ENABLE_ARCH_d10v_TRUE@$(d10v_libsim_a_OBJECTS) $(d10v_libsim_a_LIBADD): d10v/hw-config.h
4879
4880 @SIM_ENABLE_ARCH_d10v_TRUE@d10v/%.o: common/%.c
4881 @SIM_ENABLE_ARCH_d10v_TRUE@ $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
4882 @SIM_ENABLE_ARCH_d10v_TRUE@d10v/modules.c: | $(d10v_BUILD_OUTPUTS)
4883
4884 # These rules are copied from automake, but tweaked to use FOR_BUILD variables.
4885 @SIM_ENABLE_ARCH_d10v_TRUE@d10v/gencode$(EXEEXT): $(d10v_gencode_OBJECTS) $(d10v_gencode_DEPENDENCIES) d10v/$(am__dirstamp)
4886 @SIM_ENABLE_ARCH_d10v_TRUE@ $(AM_V_CCLD)$(LINK_FOR_BUILD) $(d10v_gencode_OBJECTS) $(d10v_gencode_LDADD)
4887
4888 # gencode is a build-time only tool. Override the default rules for it.
4889 @SIM_ENABLE_ARCH_d10v_TRUE@d10v/gencode.o: d10v/gencode.c
4890 @SIM_ENABLE_ARCH_d10v_TRUE@ $(AM_V_CC)$(COMPILE_FOR_BUILD) -c $< -o $@
4891 @SIM_ENABLE_ARCH_d10v_TRUE@d10v/d10v-opc.o: ../opcodes/d10v-opc.c
4892 @SIM_ENABLE_ARCH_d10v_TRUE@ $(AM_V_CC)$(COMPILE_FOR_BUILD) -c $< -o $@
4893
4894 @SIM_ENABLE_ARCH_d10v_TRUE@d10v/simops.h: d10v/gencode$(EXEEXT)
4895 @SIM_ENABLE_ARCH_d10v_TRUE@ $(AM_V_GEN)$< -h >$@
4896
4897 @SIM_ENABLE_ARCH_d10v_TRUE@d10v/table.c: d10v/gencode$(EXEEXT)
4898 @SIM_ENABLE_ARCH_d10v_TRUE@ $(AM_V_GEN)$< >$@
4899 @SIM_ENABLE_ARCH_erc32_TRUE@$(erc32_libsim_a_OBJECTS) $(erc32_libsim_a_LIBADD): erc32/hw-config.h
4900
4901 @SIM_ENABLE_ARCH_erc32_TRUE@erc32/%.o: common/%.c
4902 @SIM_ENABLE_ARCH_erc32_TRUE@ $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
4903
4904 @SIM_ENABLE_ARCH_erc32_TRUE@erc32/sis$(EXEEXT): erc32/run$(EXEEXT)
4905 @SIM_ENABLE_ARCH_erc32_TRUE@ $(AM_V_GEN)ln $< $@ 2>/dev/null || $(LN_S) $< $@ 2>/dev/null || cp -p $< $@
4906 @SIM_ENABLE_ARCH_erc32_TRUE@sim-%D-install-exec-local: installdirs
4907 @SIM_ENABLE_ARCH_erc32_TRUE@ $(AM_V_at)$(MKDIR_P) $(DESTDIR)$(bindir)
4908 @SIM_ENABLE_ARCH_erc32_TRUE@ n=`echo sis | sed '$(program_transform_name)'`; \
4909 @SIM_ENABLE_ARCH_erc32_TRUE@ $(LIBTOOL) --mode=install $(INSTALL_PROGRAM) erc32/run$(EXEEXT) $(DESTDIR)$(bindir)/$$n$(EXEEXT)
4910 @SIM_ENABLE_ARCH_erc32_TRUE@sim-erc32-uninstall-local:
4911 @SIM_ENABLE_ARCH_erc32_TRUE@ rm -f $(DESTDIR)$(bindir)/sis
4912 @SIM_ENABLE_ARCH_examples_TRUE@$(example_synacor_libsim_a_OBJECTS) $(example_synacor_libsim_a_LIBADD): example-synacor/hw-config.h
4913
4914 @SIM_ENABLE_ARCH_examples_TRUE@example-synacor/%.o: common/%.c
4915 @SIM_ENABLE_ARCH_examples_TRUE@ $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
4916 @SIM_ENABLE_ARCH_frv_TRUE@$(frv_libsim_a_OBJECTS) $(frv_libsim_a_LIBADD): frv/hw-config.h
4917
4918 @SIM_ENABLE_ARCH_frv_TRUE@frv/%.o: common/%.c
4919 @SIM_ENABLE_ARCH_frv_TRUE@ $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
4920 @SIM_ENABLE_ARCH_frv_TRUE@frv/modules.c: | $(frv_BUILD_OUTPUTS)
4921
4922 @SIM_ENABLE_ARCH_frv_TRUE@frv/mloop.c frv/eng.h: frv/stamp-mloop ; @true
4923 @SIM_ENABLE_ARCH_frv_TRUE@frv/stamp-mloop: $(srccom)/genmloop.sh frv/mloop.in
4924 @SIM_ENABLE_ARCH_frv_TRUE@ $(AM_V_GEN)$(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \
4925 @SIM_ENABLE_ARCH_frv_TRUE@ -mono -scache -parallel-generic-write -parallel-only \
4926 @SIM_ENABLE_ARCH_frv_TRUE@ -cpu frvbf \
4927 @SIM_ENABLE_ARCH_frv_TRUE@ -infile $(srcdir)/frv/mloop.in -outfile-prefix frv/
4928 @SIM_ENABLE_ARCH_frv_TRUE@ $(AM_V_at)$(SHELL) $(srcroot)/move-if-change frv/eng.hin frv/eng.h
4929 @SIM_ENABLE_ARCH_frv_TRUE@ $(AM_V_at)$(SHELL) $(srcroot)/move-if-change frv/mloop.cin frv/mloop.c
4930 @SIM_ENABLE_ARCH_frv_TRUE@ $(AM_V_at)touch $@
4931
4932 @SIM_ENABLE_ARCH_frv_TRUE@frv/cgen: frv/cgen-arch frv/cgen-cpu-decode
4933
4934 @SIM_ENABLE_ARCH_frv_TRUE@frv/cgen-arch:
4935 @SIM_ENABLE_ARCH_frv_TRUE@ $(AM_V_GEN)mach=all FLAGS="with-scache"; $(CGEN_GEN_ARCH)
4936 @SIM_ENABLE_ARCH_frv_TRUE@frv/arch.h frv/arch.c frv/cpuall.h: @CGEN_MAINT@ frv/cgen-arch
4937
4938 @SIM_ENABLE_ARCH_frv_TRUE@frv/cgen-cpu-decode:
4939 @SIM_ENABLE_ARCH_frv_TRUE@ $(AM_V_GEN)cpu=frvbf mach=frv,fr550,fr500,fr450,fr400,tomcat,simple FLAGS="with-scache with-profile=fn with-generic-write with-parallel-only" EXTRAFILES="$(CGEN_CPU_SEM)"; $(CGEN_GEN_CPU_DECODE)
4940 @SIM_ENABLE_ARCH_frv_TRUE@frv/cpu.h frv/sem.c frv/model.c frv/decode.c frv/decode.h: @CGEN_MAINT@ frv/cgen-cpu-decode
4941 @SIM_ENABLE_ARCH_ft32_TRUE@$(ft32_libsim_a_OBJECTS) $(ft32_libsim_a_LIBADD): ft32/hw-config.h
4942
4943 @SIM_ENABLE_ARCH_ft32_TRUE@ft32/%.o: common/%.c
4944 @SIM_ENABLE_ARCH_ft32_TRUE@ $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
4945 @SIM_ENABLE_ARCH_h8300_TRUE@$(h8300_libsim_a_OBJECTS) $(h8300_libsim_a_LIBADD): h8300/hw-config.h
4946
4947 @SIM_ENABLE_ARCH_h8300_TRUE@h8300/%.o: common/%.c
4948 @SIM_ENABLE_ARCH_h8300_TRUE@ $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
4949 @SIM_ENABLE_ARCH_iq2000_TRUE@$(iq2000_libsim_a_OBJECTS) $(iq2000_libsim_a_LIBADD): iq2000/hw-config.h
4950
4951 @SIM_ENABLE_ARCH_iq2000_TRUE@iq2000/%.o: common/%.c
4952 @SIM_ENABLE_ARCH_iq2000_TRUE@ $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
4953 @SIM_ENABLE_ARCH_iq2000_TRUE@iq2000/modules.c: | $(iq2000_BUILD_OUTPUTS)
4954
4955 @SIM_ENABLE_ARCH_iq2000_TRUE@iq2000/mloop.c iq2000/eng.h: iq2000/stamp-mloop ; @true
4956 @SIM_ENABLE_ARCH_iq2000_TRUE@iq2000/stamp-mloop: $(srccom)/genmloop.sh iq2000/mloop.in
4957 @SIM_ENABLE_ARCH_iq2000_TRUE@ $(AM_V_GEN)$(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \
4958 @SIM_ENABLE_ARCH_iq2000_TRUE@ -mono -fast -pbb -switch sem-switch.c \
4959 @SIM_ENABLE_ARCH_iq2000_TRUE@ -cpu iq2000bf \
4960 @SIM_ENABLE_ARCH_iq2000_TRUE@ -infile $(srcdir)/iq2000/mloop.in -outfile-prefix iq2000/
4961 @SIM_ENABLE_ARCH_iq2000_TRUE@ $(AM_V_at)$(SHELL) $(srcroot)/move-if-change iq2000/eng.hin iq2000/eng.h
4962 @SIM_ENABLE_ARCH_iq2000_TRUE@ $(AM_V_at)$(SHELL) $(srcroot)/move-if-change iq2000/mloop.cin iq2000/mloop.c
4963 @SIM_ENABLE_ARCH_iq2000_TRUE@ $(AM_V_at)touch $@
4964
4965 @SIM_ENABLE_ARCH_iq2000_TRUE@iq2000/cgen: iq2000/cgen-arch iq2000/cgen-cpu-decode
4966
4967 @SIM_ENABLE_ARCH_iq2000_TRUE@iq2000/cgen-arch:
4968 @SIM_ENABLE_ARCH_iq2000_TRUE@ $(AM_V_GEN)mach=iq2000 FLAGS="with-scache with-profile=fn"; $(CGEN_GEN_ARCH)
4969 @SIM_ENABLE_ARCH_iq2000_TRUE@iq2000/arch.h iq2000/arch.c iq2000/cpuall.h: @CGEN_MAINT@ iq2000/cgen-arch
4970
4971 @SIM_ENABLE_ARCH_iq2000_TRUE@iq2000/cgen-cpu-decode:
4972 @SIM_ENABLE_ARCH_iq2000_TRUE@ $(AM_V_GEN)cpu=iq2000bf mach=iq2000 FLAGS="with-scache with-profile=fn" EXTRAFILES="$(CGEN_CPU_SEM) $(CGEN_CPU_SEMSW)"; $(CGEN_GEN_CPU_DECODE)
4973 @SIM_ENABLE_ARCH_iq2000_TRUE@iq2000/cpu.h iq2000/sem.c iq2000/sem-switch.c iq2000/model.c iq2000/decode.c iq2000/decode.h: @CGEN_MAINT@ iq2000/cgen-cpu-decode
4974 @SIM_ENABLE_ARCH_lm32_TRUE@$(lm32_libsim_a_OBJECTS) $(lm32_libsim_a_LIBADD): lm32/hw-config.h
4975
4976 @SIM_ENABLE_ARCH_lm32_TRUE@lm32/%.o: common/%.c
4977 @SIM_ENABLE_ARCH_lm32_TRUE@ $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
4978 @SIM_ENABLE_ARCH_lm32_TRUE@lm32/modules.c: | $(lm32_BUILD_OUTPUTS)
4979
4980 @SIM_ENABLE_ARCH_lm32_TRUE@lm32/mloop.c lm32/eng.h: lm32/stamp-mloop ; @true
4981 @SIM_ENABLE_ARCH_lm32_TRUE@lm32/stamp-mloop: $(srccom)/genmloop.sh lm32/mloop.in
4982 @SIM_ENABLE_ARCH_lm32_TRUE@ $(AM_V_GEN)$(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \
4983 @SIM_ENABLE_ARCH_lm32_TRUE@ -mono -fast -pbb -switch sem-switch.c \
4984 @SIM_ENABLE_ARCH_lm32_TRUE@ -cpu lm32bf \
4985 @SIM_ENABLE_ARCH_lm32_TRUE@ -infile $(srcdir)/lm32/mloop.in -outfile-prefix lm32/
4986 @SIM_ENABLE_ARCH_lm32_TRUE@ $(AM_V_at)$(SHELL) $(srcroot)/move-if-change lm32/eng.hin lm32/eng.h
4987 @SIM_ENABLE_ARCH_lm32_TRUE@ $(AM_V_at)$(SHELL) $(srcroot)/move-if-change lm32/mloop.cin lm32/mloop.c
4988 @SIM_ENABLE_ARCH_lm32_TRUE@ $(AM_V_at)touch $@
4989
4990 @SIM_ENABLE_ARCH_lm32_TRUE@lm32/cgen: lm32/cgen-arch lm32/cgen-cpu-decode
4991
4992 @SIM_ENABLE_ARCH_lm32_TRUE@lm32/cgen-arch:
4993 @SIM_ENABLE_ARCH_lm32_TRUE@ $(AM_V_GEN)mach=all FLAGS="with-scache with-profile=fn"; $(CGEN_GEN_ARCH)
4994 @SIM_ENABLE_ARCH_lm32_TRUE@lm32/arch.h lm32/arch.c lm32/cpuall.h: @CGEN_MAINT@ lm32/cgen-arch
4995
4996 @SIM_ENABLE_ARCH_lm32_TRUE@lm32/cgen-cpu-decode:
4997 @SIM_ENABLE_ARCH_lm32_TRUE@ $(AM_V_GEN)cpu=lm32bf mach=lm32 FLAGS="with-scache with-profile=fn" EXTRAFILES="$(CGEN_CPU_SEM) $(CGEN_CPU_SEMSW)"; $(CGEN_GEN_CPU_DECODE)
4998 @SIM_ENABLE_ARCH_lm32_TRUE@lm32/cpu.h lm32/sem.c lm32/sem-switch.c lm32/model.c lm32/decode.c lm32/decode.h: @CGEN_MAINT@ lm32/cgen-cpu-decode
4999 @SIM_ENABLE_ARCH_m32c_TRUE@$(m32c_libsim_a_OBJECTS) $(m32c_libsim_a_LIBADD): m32c/hw-config.h
5000
5001 @SIM_ENABLE_ARCH_m32c_TRUE@m32c/%.o: common/%.c
5002 @SIM_ENABLE_ARCH_m32c_TRUE@ $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
5003 @SIM_ENABLE_ARCH_m32c_TRUE@m32c/modules.c: | $(m32c_BUILD_OUTPUTS)
5004
5005 # These rules are copied from automake, but tweaked to use FOR_BUILD variables.
5006 @SIM_ENABLE_ARCH_m32c_TRUE@m32c/opc2c$(EXEEXT): $(m32c_opc2c_OBJECTS) $(m32c_opc2c_DEPENDENCIES) m32c/$(am__dirstamp)
5007 @SIM_ENABLE_ARCH_m32c_TRUE@ $(AM_V_CCLD)$(LINK_FOR_BUILD) $(m32c_opc2c_OBJECTS) $(m32c_opc2c_LDADD)
5008
5009 # opc2c is a build-time only tool. Override the default rules for it.
5010 @SIM_ENABLE_ARCH_m32c_TRUE@m32c/opc2c.o: m32c/opc2c.c
5011 @SIM_ENABLE_ARCH_m32c_TRUE@ $(AM_V_CC)$(COMPILE_FOR_BUILD) -c $< -o $@
5012
5013 @SIM_ENABLE_ARCH_m32c_TRUE@m32c/m32c.c: m32c/m32c.opc m32c/opc2c$(EXEEXT)
5014 @SIM_ENABLE_ARCH_m32c_TRUE@ $(AM_V_GEN)$(m32c_OPC2C_RUN) -l $@.log $< > $@.tmp
5015 @SIM_ENABLE_ARCH_m32c_TRUE@ $(AM_V_at)mv $@.tmp $@
5016
5017 @SIM_ENABLE_ARCH_m32c_TRUE@m32c/r8c.c: m32c/r8c.opc m32c/opc2c$(EXEEXT)
5018 @SIM_ENABLE_ARCH_m32c_TRUE@ $(AM_V_GEN)$(m32c_OPC2C_RUN) -l $@.log $< > $@.tmp
5019 @SIM_ENABLE_ARCH_m32c_TRUE@ $(AM_V_at)mv $@.tmp $@
5020 @SIM_ENABLE_ARCH_m32r_TRUE@$(m32r_libsim_a_OBJECTS) $(m32r_libsim_a_LIBADD): m32r/hw-config.h
5021
5022 @SIM_ENABLE_ARCH_m32r_TRUE@m32r/%.o: common/%.c
5023 @SIM_ENABLE_ARCH_m32r_TRUE@ $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
5024 @SIM_ENABLE_ARCH_m32r_TRUE@m32r/modules.c: | $(m32r_BUILD_OUTPUTS)
5025
5026 @SIM_ENABLE_ARCH_m32r_TRUE@m32r/mloop.c m32r/eng.h: m32r/stamp-mloop ; @true
5027 @SIM_ENABLE_ARCH_m32r_TRUE@m32r/stamp-mloop: $(srccom)/genmloop.sh m32r/mloop.in
5028 @SIM_ENABLE_ARCH_m32r_TRUE@ $(AM_V_GEN)$(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \
5029 @SIM_ENABLE_ARCH_m32r_TRUE@ -mono -fast -pbb -switch sem-switch.c \
5030 @SIM_ENABLE_ARCH_m32r_TRUE@ -cpu m32rbf \
5031 @SIM_ENABLE_ARCH_m32r_TRUE@ -infile $(srcdir)/m32r/mloop.in -outfile-prefix m32r/
5032 @SIM_ENABLE_ARCH_m32r_TRUE@ $(AM_V_at)$(SHELL) $(srcroot)/move-if-change m32r/eng.hin m32r/eng.h
5033 @SIM_ENABLE_ARCH_m32r_TRUE@ $(AM_V_at)$(SHELL) $(srcroot)/move-if-change m32r/mloop.cin m32r/mloop.c
5034 @SIM_ENABLE_ARCH_m32r_TRUE@ $(AM_V_at)touch $@
5035
5036 @SIM_ENABLE_ARCH_m32r_TRUE@m32r/mloopx.c m32r/engx.h: m32r/stamp-mloop ; @true
5037 @SIM_ENABLE_ARCH_m32r_TRUE@m32r/stamp-mloop-x: $(srccom)/genmloop.sh m32r/mloop.in
5038 @SIM_ENABLE_ARCH_m32r_TRUE@ $(AM_V_GEN)$(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \
5039 @SIM_ENABLE_ARCH_m32r_TRUE@ -mono -no-fast -pbb -parallel-write -switch semx-switch.c \
5040 @SIM_ENABLE_ARCH_m32r_TRUE@ -cpu m32rxf \
5041 @SIM_ENABLE_ARCH_m32r_TRUE@ -infile $(srcdir)/m32r/mloopx.in -outfile-prefix m32r/ -outfile-suffix x
5042 @SIM_ENABLE_ARCH_m32r_TRUE@ $(AM_V_at)$(SHELL) $(srcroot)/move-if-change m32r/engx.hin m32r/engx.h
5043 @SIM_ENABLE_ARCH_m32r_TRUE@ $(AM_V_at)$(SHELL) $(srcroot)/move-if-change m32r/mloopx.cin m32r/mloopx.c
5044 @SIM_ENABLE_ARCH_m32r_TRUE@ $(AM_V_at)touch $@
5045
5046 @SIM_ENABLE_ARCH_m32r_TRUE@m32r/mloop2.c m32r/eng2.h: m32r/stamp-mloop ; @true
5047 @SIM_ENABLE_ARCH_m32r_TRUE@m32r/stamp-mloop-2: $(srccom)/genmloop.sh m32r/mloop.in
5048 @SIM_ENABLE_ARCH_m32r_TRUE@ $(AM_V_GEN)$(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \
5049 @SIM_ENABLE_ARCH_m32r_TRUE@ -mono -no-fast -pbb -parallel-write -switch sem2-switch.c \
5050 @SIM_ENABLE_ARCH_m32r_TRUE@ -cpu m32r2f \
5051 @SIM_ENABLE_ARCH_m32r_TRUE@ -infile $(srcdir)/m32r/mloop2.in -outfile-prefix m32r/ -outfile-suffix 2
5052 @SIM_ENABLE_ARCH_m32r_TRUE@ $(AM_V_at)$(SHELL) $(srcroot)/move-if-change m32r/eng2.hin m32r/eng2.h
5053 @SIM_ENABLE_ARCH_m32r_TRUE@ $(AM_V_at)$(SHELL) $(srcroot)/move-if-change m32r/mloop2.cin m32r/mloop2.c
5054 @SIM_ENABLE_ARCH_m32r_TRUE@ $(AM_V_at)touch $@
5055
5056 @SIM_ENABLE_ARCH_m32r_TRUE@m32r/cgen: m32r/cgen-arch m32r/cgen-cpu-decode m32r/cgen-cpu-decode-x m32r/cgen-cpu-decode-2
5057
5058 @SIM_ENABLE_ARCH_m32r_TRUE@m32r/cgen-arch:
5059 @SIM_ENABLE_ARCH_m32r_TRUE@ $(AM_V_GEN)mach=all FLAGS="with-scache with-profile=fn"; $(CGEN_GEN_ARCH)
5060 @SIM_ENABLE_ARCH_m32r_TRUE@m32r/arch.h m32r/arch.c m32r/cpuall.h: @CGEN_MAINT@ m32r/cgen-arch
5061
5062 @SIM_ENABLE_ARCH_m32r_TRUE@m32r/cgen-cpu-decode:
5063 @SIM_ENABLE_ARCH_m32r_TRUE@ $(AM_V_GEN)cpu=m32rbf mach=m32r FLAGS="with-scache with-profile=fn" EXTRAFILES="$(CGEN_CPU_SEM) $(CGEN_CPU_SEMSW)"; $(CGEN_GEN_CPU_DECODE)
5064 @SIM_ENABLE_ARCH_m32r_TRUE@m32r/cpu.h m32r/sem.c m32r/sem-switch.c m32r/model.c m32r/decode.c m32r/decode.h: @CGEN_MAINT@ m32r/cgen-cpu-decode
5065
5066 @SIM_ENABLE_ARCH_m32r_TRUE@m32r/cgen-cpu-decode-x:
5067 @SIM_ENABLE_ARCH_m32r_TRUE@ $(AM_V_GEN)cpu=m32rxf mach=m32rx SUFFIX=x FLAGS="with-scache with-profile=fn" EXTRAFILES="$(CGEN_CPU_SEMSW)"; $(CGEN_GEN_CPU_DECODE)
5068 @SIM_ENABLE_ARCH_m32r_TRUE@m32r/cpux.h m32r/semx-switch.c m32r/modelx.c m32r/decodex.c m32r/decodex.h: @CGEN_MAINT@ m32r/cgen-cpu-decode-x
5069
5070 @SIM_ENABLE_ARCH_m32r_TRUE@m32r/cgen-cpu-decode-2:
5071 @SIM_ENABLE_ARCH_m32r_TRUE@ $(AM_V_GEN)cpu=m32r2f mach=m32r2 SUFFIX=2 FLAGS="with-scache with-profile=fn" EXTRAFILES="$(CGEN_CPU_SEMSW)"; $(CGEN_GEN_CPU_DECODE)
5072 @SIM_ENABLE_ARCH_m32r_TRUE@m32r/cpu2.h m32r/sem2-switch.c m32r/model2.c m32r/decode2.c m32r/decode2.h: @CGEN_MAINT@ m32r/cgen-cpu-decode-2
5073 @SIM_ENABLE_ARCH_m68hc11_TRUE@$(m68hc11_libsim_a_OBJECTS) $(m68hc11_libsim_a_LIBADD): m68hc11/hw-config.h
5074
5075 @SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11/%.o: common/%.c
5076 @SIM_ENABLE_ARCH_m68hc11_TRUE@ $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
5077 @SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11/modules.c: | $(m68hc11_BUILD_OUTPUTS)
5078
5079 # These rules are copied from automake, but tweaked to use FOR_BUILD variables.
5080 @SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11/gencode$(EXEEXT): $(m68hc11_gencode_OBJECTS) $(m68hc11_gencode_DEPENDENCIES) m68hc11/$(am__dirstamp)
5081 @SIM_ENABLE_ARCH_m68hc11_TRUE@ $(AM_V_CCLD)$(LINK_FOR_BUILD) $(m68hc11_gencode_OBJECTS) $(m68hc11_gencode_LDADD)
5082
5083 # gencode is a build-time only tool. Override the default rules for it.
5084 @SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11/gencode.o: m68hc11/gencode.c
5085 @SIM_ENABLE_ARCH_m68hc11_TRUE@ $(AM_V_CC)$(COMPILE_FOR_BUILD) -c $< -o $@
5086
5087 @SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11/m68hc11int.c: m68hc11/gencode$(EXEEXT)
5088 @SIM_ENABLE_ARCH_m68hc11_TRUE@ $(AM_V_GEN)$< -m6811 >$@
5089
5090 @SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11/m68hc12int.c: m68hc11/gencode$(EXEEXT)
5091 @SIM_ENABLE_ARCH_m68hc11_TRUE@ $(AM_V_GEN)$< -m6812 >$@
5092 @SIM_ENABLE_ARCH_mcore_TRUE@$(mcore_libsim_a_OBJECTS) $(mcore_libsim_a_LIBADD): mcore/hw-config.h
5093
5094 @SIM_ENABLE_ARCH_mcore_TRUE@mcore/%.o: common/%.c
5095 @SIM_ENABLE_ARCH_mcore_TRUE@ $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
5096 @SIM_ENABLE_ARCH_microblaze_TRUE@$(microblaze_libsim_a_OBJECTS) $(microblaze_libsim_a_LIBADD): microblaze/hw-config.h
5097
5098 @SIM_ENABLE_ARCH_microblaze_TRUE@microblaze/%.o: common/%.c
5099 @SIM_ENABLE_ARCH_microblaze_TRUE@ $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
5100 @SIM_ENABLE_ARCH_mips_TRUE@$(mips_libsim_a_OBJECTS) $(mips_libsim_a_LIBADD): mips/hw-config.h
5101
5102 @SIM_ENABLE_ARCH_mips_TRUE@mips/%.o: common/%.c
5103 @SIM_ENABLE_ARCH_mips_TRUE@ $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
5104 @SIM_ENABLE_ARCH_mips_TRUE@mips/modules.c: | $(mips_BUILD_OUTPUTS)
5105
5106 @SIM_ENABLE_ARCH_mips_TRUE@$(mips_BUILT_SRC_FROM_IGEN_ITABLE): mips/stamp-igen-itable
5107 @SIM_ENABLE_ARCH_mips_TRUE@$(mips_BUILT_SRC_FROM_GEN_MODE_SINGLE): mips/stamp-gen-mode-single
5108 @SIM_ENABLE_ARCH_mips_TRUE@$(mips_BUILT_SRC_FROM_GEN_MODE_M16_M16): mips/stamp-gen-mode-m16-m16
5109 @SIM_ENABLE_ARCH_mips_TRUE@$(mips_BUILT_SRC_FROM_GEN_MODE_M16_M32): mips/stamp-gen-mode-m16-m32
5110 @SIM_ENABLE_ARCH_mips_TRUE@$(SIM_MIPS_MULTI_SRC): mips/stamp-gen-mode-multi-igen mips/stamp-gen-mode-multi-run
5111
5112 @SIM_ENABLE_ARCH_mips_TRUE@mips/stamp-igen-itable: $(mips_IGEN_INSN) $(mips_IGEN_INSN_INC) $(IGEN)
5113 @SIM_ENABLE_ARCH_mips_TRUE@ $(AM_V_GEN)$(IGEN_RUN) \
5114 @SIM_ENABLE_ARCH_mips_TRUE@ $(mips_IGEN_TRACE) \
5115 @SIM_ENABLE_ARCH_mips_TRUE@ -I $(srcdir)/mips \
5116 @SIM_ENABLE_ARCH_mips_TRUE@ -Werror \
5117 @SIM_ENABLE_ARCH_mips_TRUE@ -Wnodiscard \
5118 @SIM_ENABLE_ARCH_mips_TRUE@ -Wnowidth \
5119 @SIM_ENABLE_ARCH_mips_TRUE@ -Wnounimplemented \
5120 @SIM_ENABLE_ARCH_mips_TRUE@ $(SIM_MIPS_IGEN_ITABLE_FLAGS) \
5121 @SIM_ENABLE_ARCH_mips_TRUE@ -G gen-direct-access \
5122 @SIM_ENABLE_ARCH_mips_TRUE@ -G gen-zero-r0 \
5123 @SIM_ENABLE_ARCH_mips_TRUE@ -i $(mips_IGEN_INSN) \
5124 @SIM_ENABLE_ARCH_mips_TRUE@ -n itable.h -ht mips/itable.h \
5125 @SIM_ENABLE_ARCH_mips_TRUE@ -n itable.c -t mips/itable.c
5126 @SIM_ENABLE_ARCH_mips_TRUE@ $(AM_V_at)touch $@
5127
5128 @SIM_ENABLE_ARCH_mips_TRUE@mips/stamp-gen-mode-single: $(mips_IGEN_INSN) $(mips_IGEN_INSN_INC) $(mips_IGEN_DC) $(IGEN)
5129 @SIM_ENABLE_ARCH_mips_TRUE@ $(AM_V_GEN)$(IGEN_RUN) \
5130 @SIM_ENABLE_ARCH_mips_TRUE@ $(mips_IGEN_TRACE) \
5131 @SIM_ENABLE_ARCH_mips_TRUE@ -I $(srcdir)/mips \
5132 @SIM_ENABLE_ARCH_mips_TRUE@ -Werror \
5133 @SIM_ENABLE_ARCH_mips_TRUE@ -Wnodiscard \
5134 @SIM_ENABLE_ARCH_mips_TRUE@ $(SIM_MIPS_SINGLE_FLAGS) \
5135 @SIM_ENABLE_ARCH_mips_TRUE@ -G gen-direct-access \
5136 @SIM_ENABLE_ARCH_mips_TRUE@ -G gen-zero-r0 \
5137 @SIM_ENABLE_ARCH_mips_TRUE@ -B 32 \
5138 @SIM_ENABLE_ARCH_mips_TRUE@ -H 31 \
5139 @SIM_ENABLE_ARCH_mips_TRUE@ -i $(mips_IGEN_INSN) \
5140 @SIM_ENABLE_ARCH_mips_TRUE@ -o $(mips_IGEN_DC) \
5141 @SIM_ENABLE_ARCH_mips_TRUE@ -x \
5142 @SIM_ENABLE_ARCH_mips_TRUE@ -n icache.h -hc mips/icache.h \
5143 @SIM_ENABLE_ARCH_mips_TRUE@ -n icache.c -c mips/icache.c \
5144 @SIM_ENABLE_ARCH_mips_TRUE@ -n semantics.h -hs mips/semantics.h \
5145 @SIM_ENABLE_ARCH_mips_TRUE@ -n semantics.c -s mips/semantics.c \
5146 @SIM_ENABLE_ARCH_mips_TRUE@ -n idecode.h -hd mips/idecode.h \
5147 @SIM_ENABLE_ARCH_mips_TRUE@ -n idecode.c -d mips/idecode.c \
5148 @SIM_ENABLE_ARCH_mips_TRUE@ -n model.h -hm mips/model.h \
5149 @SIM_ENABLE_ARCH_mips_TRUE@ -n model.c -m mips/model.c \
5150 @SIM_ENABLE_ARCH_mips_TRUE@ -n support.h -hf mips/support.h \
5151 @SIM_ENABLE_ARCH_mips_TRUE@ -n support.c -f mips/support.c \
5152 @SIM_ENABLE_ARCH_mips_TRUE@ -n engine.h -he mips/engine.h \
5153 @SIM_ENABLE_ARCH_mips_TRUE@ -n engine.c -e mips/engine.c \
5154 @SIM_ENABLE_ARCH_mips_TRUE@ -n irun.c -r mips/irun.c
5155 @SIM_ENABLE_ARCH_mips_TRUE@ $(AM_V_at)touch $@
5156
5157 @SIM_ENABLE_ARCH_mips_TRUE@mips/stamp-gen-mode-m16-m16: $(mips_IGEN_INSN) $(mips_IGEN_INSN_INC) $(mips_M16_DC) $(IGEN)
5158 @SIM_ENABLE_ARCH_mips_TRUE@ $(AM_V_GEN)$(IGEN_RUN) \
5159 @SIM_ENABLE_ARCH_mips_TRUE@ $(mips_IGEN_TRACE) \
5160 @SIM_ENABLE_ARCH_mips_TRUE@ -I $(srcdir)/mips \
5161 @SIM_ENABLE_ARCH_mips_TRUE@ -Werror \
5162 @SIM_ENABLE_ARCH_mips_TRUE@ -Wnodiscard \
5163 @SIM_ENABLE_ARCH_mips_TRUE@ $(SIM_MIPS_M16_FLAGS) \
5164 @SIM_ENABLE_ARCH_mips_TRUE@ -G gen-direct-access \
5165 @SIM_ENABLE_ARCH_mips_TRUE@ -G gen-zero-r0 \
5166 @SIM_ENABLE_ARCH_mips_TRUE@ -B 16 \
5167 @SIM_ENABLE_ARCH_mips_TRUE@ -H 15 \
5168 @SIM_ENABLE_ARCH_mips_TRUE@ -i $(mips_IGEN_INSN) \
5169 @SIM_ENABLE_ARCH_mips_TRUE@ -o $(mips_M16_DC) \
5170 @SIM_ENABLE_ARCH_mips_TRUE@ -P m16_ \
5171 @SIM_ENABLE_ARCH_mips_TRUE@ -x \
5172 @SIM_ENABLE_ARCH_mips_TRUE@ -n m16_icache.h -hc mips/m16_icache.h \
5173 @SIM_ENABLE_ARCH_mips_TRUE@ -n m16_icache.c -c mips/m16_icache.c \
5174 @SIM_ENABLE_ARCH_mips_TRUE@ -n m16_semantics.h -hs mips/m16_semantics.h \
5175 @SIM_ENABLE_ARCH_mips_TRUE@ -n m16_semantics.c -s mips/m16_semantics.c \
5176 @SIM_ENABLE_ARCH_mips_TRUE@ -n m16_idecode.h -hd mips/m16_idecode.h \
5177 @SIM_ENABLE_ARCH_mips_TRUE@ -n m16_idecode.c -d mips/m16_idecode.c \
5178 @SIM_ENABLE_ARCH_mips_TRUE@ -n m16_model.h -hm mips/m16_model.h \
5179 @SIM_ENABLE_ARCH_mips_TRUE@ -n m16_model.c -m mips/m16_model.c \
5180 @SIM_ENABLE_ARCH_mips_TRUE@ -n m16_support.h -hf mips/m16_support.h \
5181 @SIM_ENABLE_ARCH_mips_TRUE@ -n m16_support.c -f mips/m16_support.c
5182 @SIM_ENABLE_ARCH_mips_TRUE@ $(AM_V_at)touch $@
5183
5184 @SIM_ENABLE_ARCH_mips_TRUE@mips/stamp-gen-mode-m16-m32: $(mips_IGEN_INSN) $(mips_IGEN_INSN_INC) $(mips_IGEN_DC) $(IGEN)
5185 @SIM_ENABLE_ARCH_mips_TRUE@ $(AM_V_GEN)$(IGEN_RUN) \
5186 @SIM_ENABLE_ARCH_mips_TRUE@ $(mips_IGEN_TRACE) \
5187 @SIM_ENABLE_ARCH_mips_TRUE@ -I $(srcdir)/mips \
5188 @SIM_ENABLE_ARCH_mips_TRUE@ -Werror \
5189 @SIM_ENABLE_ARCH_mips_TRUE@ -Wnodiscard \
5190 @SIM_ENABLE_ARCH_mips_TRUE@ $(SIM_MIPS_SINGLE_FLAGS) \
5191 @SIM_ENABLE_ARCH_mips_TRUE@ -G gen-direct-access \
5192 @SIM_ENABLE_ARCH_mips_TRUE@ -G gen-zero-r0 \
5193 @SIM_ENABLE_ARCH_mips_TRUE@ -B 32 \
5194 @SIM_ENABLE_ARCH_mips_TRUE@ -H 31 \
5195 @SIM_ENABLE_ARCH_mips_TRUE@ -i $(mips_IGEN_INSN) \
5196 @SIM_ENABLE_ARCH_mips_TRUE@ -o $(mips_IGEN_DC) \
5197 @SIM_ENABLE_ARCH_mips_TRUE@ -P m32_ \
5198 @SIM_ENABLE_ARCH_mips_TRUE@ -x \
5199 @SIM_ENABLE_ARCH_mips_TRUE@ -n m32_icache.h -hc mips/m32_icache.h \
5200 @SIM_ENABLE_ARCH_mips_TRUE@ -n m32_icache.c -c mips/m32_icache.c \
5201 @SIM_ENABLE_ARCH_mips_TRUE@ -n m32_semantics.h -hs mips/m32_semantics.h \
5202 @SIM_ENABLE_ARCH_mips_TRUE@ -n m32_semantics.c -s mips/m32_semantics.c \
5203 @SIM_ENABLE_ARCH_mips_TRUE@ -n m32_idecode.h -hd mips/m32_idecode.h \
5204 @SIM_ENABLE_ARCH_mips_TRUE@ -n m32_idecode.c -d mips/m32_idecode.c \
5205 @SIM_ENABLE_ARCH_mips_TRUE@ -n m32_model.h -hm mips/m32_model.h \
5206 @SIM_ENABLE_ARCH_mips_TRUE@ -n m32_model.c -m mips/m32_model.c \
5207 @SIM_ENABLE_ARCH_mips_TRUE@ -n m32_support.h -hf mips/m32_support.h \
5208 @SIM_ENABLE_ARCH_mips_TRUE@ -n m32_support.c -f mips/m32_support.c
5209 @SIM_ENABLE_ARCH_mips_TRUE@ $(AM_V_at)touch $@
5210
5211 @SIM_ENABLE_ARCH_mips_TRUE@mips/stamp-gen-mode-multi-igen: $(mips_IGEN_INSN) $(mips_IGEN_INSN_INC) $(mips_IGEN_DC) $(mips_M16_DC) $(mips_MICROMIPS32_DC) $(mips_MICROMIPS16_DC) $(IGEN)
5212 @SIM_ENABLE_ARCH_mips_TRUE@ $(AM_V_GEN)\
5213 @SIM_ENABLE_ARCH_mips_TRUE@ for t in $(SIM_MIPS_MULTI_IGEN_CONFIGS); do \
5214 @SIM_ENABLE_ARCH_mips_TRUE@ p=`echo $${t} | sed -e 's/:.*//'` ; \
5215 @SIM_ENABLE_ARCH_mips_TRUE@ m=`echo $${t} | sed -e 's/.*:\(.*\):.*/\1/'` ; \
5216 @SIM_ENABLE_ARCH_mips_TRUE@ f=`echo $${t} | sed -e 's/.*://'` ; \
5217 @SIM_ENABLE_ARCH_mips_TRUE@ case $${p} in \
5218 @SIM_ENABLE_ARCH_mips_TRUE@ micromips16*) \
5219 @SIM_ENABLE_ARCH_mips_TRUE@ e="-B 16 -H 15 -o $(mips_MICROMIPS16_DC) -F 16" ;; \
5220 @SIM_ENABLE_ARCH_mips_TRUE@ micromips32* | micromips64*) \
5221 @SIM_ENABLE_ARCH_mips_TRUE@ e="-B 32 -H 31 -o $(mips_MICROMIPS32_DC) -F $${f}" ;; \
5222 @SIM_ENABLE_ARCH_mips_TRUE@ micromips_m32*) \
5223 @SIM_ENABLE_ARCH_mips_TRUE@ e="-B 32 -H 31 -o $(mips_IGEN_DC) -F $${f}"; \
5224 @SIM_ENABLE_ARCH_mips_TRUE@ m="mips32r2,mips3d,mdmx,dsp,dsp2,smartmips" ;; \
5225 @SIM_ENABLE_ARCH_mips_TRUE@ micromips_m64*) \
5226 @SIM_ENABLE_ARCH_mips_TRUE@ e="-B 32 -H 31 -o $(mips_IGEN_DC) -F $${f}"; \
5227 @SIM_ENABLE_ARCH_mips_TRUE@ m="mips64r2,mips3d,mdmx,dsp,dsp2,smartmips" ;; \
5228 @SIM_ENABLE_ARCH_mips_TRUE@ m16*) \
5229 @SIM_ENABLE_ARCH_mips_TRUE@ e="-B 16 -H 15 -o $(mips_M16_DC) -F 16" ;; \
5230 @SIM_ENABLE_ARCH_mips_TRUE@ *) \
5231 @SIM_ENABLE_ARCH_mips_TRUE@ e="-B 32 -H 31 -o $(mips_IGEN_DC) -F $${f}" ;; \
5232 @SIM_ENABLE_ARCH_mips_TRUE@ esac; \
5233 @SIM_ENABLE_ARCH_mips_TRUE@ $(IGEN_RUN) \
5234 @SIM_ENABLE_ARCH_mips_TRUE@ $(mips_IGEN_TRACE) \
5235 @SIM_ENABLE_ARCH_mips_TRUE@ $${e} \
5236 @SIM_ENABLE_ARCH_mips_TRUE@ -I $(srcdir)/mips \
5237 @SIM_ENABLE_ARCH_mips_TRUE@ -Werror \
5238 @SIM_ENABLE_ARCH_mips_TRUE@ -Wnodiscard \
5239 @SIM_ENABLE_ARCH_mips_TRUE@ -M $${m} \
5240 @SIM_ENABLE_ARCH_mips_TRUE@ -G gen-direct-access \
5241 @SIM_ENABLE_ARCH_mips_TRUE@ -G gen-zero-r0 \
5242 @SIM_ENABLE_ARCH_mips_TRUE@ -i $(mips_IGEN_INSN) \
5243 @SIM_ENABLE_ARCH_mips_TRUE@ -P $${p}_ \
5244 @SIM_ENABLE_ARCH_mips_TRUE@ -x \
5245 @SIM_ENABLE_ARCH_mips_TRUE@ -n $${p}_icache.h -hc mips/$${p}_icache.h \
5246 @SIM_ENABLE_ARCH_mips_TRUE@ -n $${p}_icache.c -c mips/$${p}_icache.c \
5247 @SIM_ENABLE_ARCH_mips_TRUE@ -n $${p}_semantics.h -hs mips/$${p}_semantics.h \
5248 @SIM_ENABLE_ARCH_mips_TRUE@ -n $${p}_semantics.c -s mips/$${p}_semantics.c \
5249 @SIM_ENABLE_ARCH_mips_TRUE@ -n $${p}_idecode.h -hd mips/$${p}_idecode.h \
5250 @SIM_ENABLE_ARCH_mips_TRUE@ -n $${p}_idecode.c -d mips/$${p}_idecode.c \
5251 @SIM_ENABLE_ARCH_mips_TRUE@ -n $${p}_model.h -hm mips/$${p}_model.h \
5252 @SIM_ENABLE_ARCH_mips_TRUE@ -n $${p}_model.c -m mips/$${p}_model.c \
5253 @SIM_ENABLE_ARCH_mips_TRUE@ -n $${p}_support.h -hf mips/$${p}_support.h \
5254 @SIM_ENABLE_ARCH_mips_TRUE@ -n $${p}_support.c -f mips/$${p}_support.c \
5255 @SIM_ENABLE_ARCH_mips_TRUE@ -n $${p}_engine.h -he mips/$${p}_engine.h \
5256 @SIM_ENABLE_ARCH_mips_TRUE@ -n $${p}_engine.c -e mips/$${p}_engine.c \
5257 @SIM_ENABLE_ARCH_mips_TRUE@ || exit; \
5258 @SIM_ENABLE_ARCH_mips_TRUE@ done
5259 @SIM_ENABLE_ARCH_mips_TRUE@ $(AM_V_at)touch $@
5260
5261 @SIM_ENABLE_ARCH_mips_TRUE@mips/stamp-gen-mode-multi-run: mips/m16run.c mips/micromipsrun.c
5262 @SIM_ENABLE_ARCH_mips_TRUE@ $(AM_V_GEN)\
5263 @SIM_ENABLE_ARCH_mips_TRUE@ for t in $(SIM_MIPS_MULTI_IGEN_CONFIGS); do \
5264 @SIM_ENABLE_ARCH_mips_TRUE@ case $${t} in \
5265 @SIM_ENABLE_ARCH_mips_TRUE@ m16*) \
5266 @SIM_ENABLE_ARCH_mips_TRUE@ m=`echo $${t} | sed -e 's/^m16//' -e 's/:.*//'`; \
5267 @SIM_ENABLE_ARCH_mips_TRUE@ o=mips/m16$${m}_run.c; \
5268 @SIM_ENABLE_ARCH_mips_TRUE@ sed < $(srcdir)/mips/m16run.c > $$o.tmp \
5269 @SIM_ENABLE_ARCH_mips_TRUE@ -e "s/^sim_/m16$${m}_/" \
5270 @SIM_ENABLE_ARCH_mips_TRUE@ -e "/include/s/sim-engine/m16$${m}_engine/" \
5271 @SIM_ENABLE_ARCH_mips_TRUE@ -e "s/m16_/m16$${m}_/" \
5272 @SIM_ENABLE_ARCH_mips_TRUE@ -e "s/m32_/m32$${m}_/" \
5273 @SIM_ENABLE_ARCH_mips_TRUE@ || exit 1; \
5274 @SIM_ENABLE_ARCH_mips_TRUE@ $(SHELL) $(srcroot)/move-if-change $$o.tmp $$o; \
5275 @SIM_ENABLE_ARCH_mips_TRUE@ ;;\
5276 @SIM_ENABLE_ARCH_mips_TRUE@ micromips32*) \
5277 @SIM_ENABLE_ARCH_mips_TRUE@ m=`echo $${t} | sed -e 's/^micromips32//' -e 's/:.*//'`; \
5278 @SIM_ENABLE_ARCH_mips_TRUE@ o=mips/micromips$${m}_run.c; \
5279 @SIM_ENABLE_ARCH_mips_TRUE@ sed < $(srcdir)/mips/micromipsrun.c > $$o.tmp \
5280 @SIM_ENABLE_ARCH_mips_TRUE@ -e "s/^sim_/micromips32$${m}_/" \
5281 @SIM_ENABLE_ARCH_mips_TRUE@ -e "/include/s/sim-engine/micromips32$${m}_engine/" \
5282 @SIM_ENABLE_ARCH_mips_TRUE@ -e "s/micromips16_/micromips16$${m}_/" \
5283 @SIM_ENABLE_ARCH_mips_TRUE@ -e "s/micromips32_/micromips32$${m}_/" \
5284 @SIM_ENABLE_ARCH_mips_TRUE@ -e "s/m32_/m32$${m}_/" \
5285 @SIM_ENABLE_ARCH_mips_TRUE@ || exit 1; \
5286 @SIM_ENABLE_ARCH_mips_TRUE@ $(SHELL) $(srcroot)/move-if-change $$o.tmp $$o; \
5287 @SIM_ENABLE_ARCH_mips_TRUE@ ;;\
5288 @SIM_ENABLE_ARCH_mips_TRUE@ micromips64*) \
5289 @SIM_ENABLE_ARCH_mips_TRUE@ m=`echo $${t} | sed -e 's/^micromips64//' -e 's/:.*//'`; \
5290 @SIM_ENABLE_ARCH_mips_TRUE@ o=mips/micromips$${m}_run.c; \
5291 @SIM_ENABLE_ARCH_mips_TRUE@ sed < $(srcdir)/mips/micromipsrun.c > $$o.tmp \
5292 @SIM_ENABLE_ARCH_mips_TRUE@ -e "s/^sim_/micromips64$${m}_/" \
5293 @SIM_ENABLE_ARCH_mips_TRUE@ -e "/include/s/sim-engine/micromips64$${m}_engine/" \
5294 @SIM_ENABLE_ARCH_mips_TRUE@ -e "s/micromips16_/micromips16$${m}_/" \
5295 @SIM_ENABLE_ARCH_mips_TRUE@ -e "s/micromips32_/micromips64$${m}_/" \
5296 @SIM_ENABLE_ARCH_mips_TRUE@ -e "s/m32_/m64$${m}_/" \
5297 @SIM_ENABLE_ARCH_mips_TRUE@ || exit 1; \
5298 @SIM_ENABLE_ARCH_mips_TRUE@ $(SHELL) $(srcroot)/move-if-change $$o.tmp $$o; \
5299 @SIM_ENABLE_ARCH_mips_TRUE@ ;;\
5300 @SIM_ENABLE_ARCH_mips_TRUE@ esac \
5301 @SIM_ENABLE_ARCH_mips_TRUE@ done
5302 @SIM_ENABLE_ARCH_mips_TRUE@ $(AM_V_at)touch $@
5303 @SIM_ENABLE_ARCH_mn10300_TRUE@$(mn10300_libsim_a_OBJECTS) $(mn10300_libsim_a_LIBADD): mn10300/hw-config.h
5304
5305 @SIM_ENABLE_ARCH_mn10300_TRUE@mn10300/%.o: common/%.c
5306 @SIM_ENABLE_ARCH_mn10300_TRUE@ $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
5307 @SIM_ENABLE_ARCH_mn10300_TRUE@mn10300/modules.c: | $(mn10300_BUILD_OUTPUTS)
5308
5309 @SIM_ENABLE_ARCH_mn10300_TRUE@$(mn10300_BUILT_SRC_FROM_IGEN): mn10300/stamp-igen
5310 @SIM_ENABLE_ARCH_mn10300_TRUE@mn10300/stamp-igen: $(mn10300_IGEN_INSN) $(mn10300_IGEN_INSN_INC) $(mn10300_IGEN_DC) $(IGEN)
5311 @SIM_ENABLE_ARCH_mn10300_TRUE@ $(AM_V_GEN)$(IGEN_RUN) \
5312 @SIM_ENABLE_ARCH_mn10300_TRUE@ $(mn10300_IGEN_TRACE) \
5313 @SIM_ENABLE_ARCH_mn10300_TRUE@ -G gen-direct-access \
5314 @SIM_ENABLE_ARCH_mn10300_TRUE@ -M mn10300,am33 -G gen-multi-sim=am33 \
5315 @SIM_ENABLE_ARCH_mn10300_TRUE@ -M am33_2 \
5316 @SIM_ENABLE_ARCH_mn10300_TRUE@ -I $(srcdir)/mn10300 \
5317 @SIM_ENABLE_ARCH_mn10300_TRUE@ -i $(mn10300_IGEN_INSN) \
5318 @SIM_ENABLE_ARCH_mn10300_TRUE@ -o $(mn10300_IGEN_DC) \
5319 @SIM_ENABLE_ARCH_mn10300_TRUE@ -x \
5320 @SIM_ENABLE_ARCH_mn10300_TRUE@ -n icache.h -hc mn10300/icache.h \
5321 @SIM_ENABLE_ARCH_mn10300_TRUE@ -n icache.c -c mn10300/icache.c \
5322 @SIM_ENABLE_ARCH_mn10300_TRUE@ -n semantics.h -hs mn10300/semantics.h \
5323 @SIM_ENABLE_ARCH_mn10300_TRUE@ -n semantics.c -s mn10300/semantics.c \
5324 @SIM_ENABLE_ARCH_mn10300_TRUE@ -n idecode.h -hd mn10300/idecode.h \
5325 @SIM_ENABLE_ARCH_mn10300_TRUE@ -n idecode.c -d mn10300/idecode.c \
5326 @SIM_ENABLE_ARCH_mn10300_TRUE@ -n model.h -hm mn10300/model.h \
5327 @SIM_ENABLE_ARCH_mn10300_TRUE@ -n model.c -m mn10300/model.c \
5328 @SIM_ENABLE_ARCH_mn10300_TRUE@ -n support.h -hf mn10300/support.h \
5329 @SIM_ENABLE_ARCH_mn10300_TRUE@ -n support.c -f mn10300/support.c \
5330 @SIM_ENABLE_ARCH_mn10300_TRUE@ -n itable.h -ht mn10300/itable.h \
5331 @SIM_ENABLE_ARCH_mn10300_TRUE@ -n itable.c -t mn10300/itable.c \
5332 @SIM_ENABLE_ARCH_mn10300_TRUE@ -n engine.h -he mn10300/engine.h \
5333 @SIM_ENABLE_ARCH_mn10300_TRUE@ -n engine.c -e mn10300/engine.c \
5334 @SIM_ENABLE_ARCH_mn10300_TRUE@ -n irun.c -r mn10300/irun.c
5335 @SIM_ENABLE_ARCH_mn10300_TRUE@ $(AM_V_at)touch $@
5336 @SIM_ENABLE_ARCH_moxie_TRUE@$(moxie_libsim_a_OBJECTS) $(moxie_libsim_a_LIBADD): moxie/hw-config.h
5337
5338 @SIM_ENABLE_ARCH_moxie_TRUE@moxie/%.o: common/%.c
5339 @SIM_ENABLE_ARCH_moxie_TRUE@ $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
5340
5341 @SIM_ENABLE_ARCH_moxie_TRUE@moxie/moxie-gdb.dtb: @MAINT@ moxie/moxie-gdb.dts moxie/$(am__dirstamp)
5342 @SIM_ENABLE_ARCH_moxie_TRUE@ $(AM_V_GEN) \
5343 @SIM_ENABLE_ARCH_moxie_TRUE@ if test "x$(DTC)" != x; then \
5344 @SIM_ENABLE_ARCH_moxie_TRUE@ $(DTC) -O dtb -o $@.tmp ${srcdir}/moxie/moxie-gdb.dts || exit 1; \
5345 @SIM_ENABLE_ARCH_moxie_TRUE@ $(SHELL) $(srcroot)/move-if-change $@.tmp ${srcdir}/moxie/moxie-gdb.dtb || exit 1; \
5346 @SIM_ENABLE_ARCH_moxie_TRUE@ touch ${srcdir}/moxie/moxie-gdb.dtb; \
5347 @SIM_ENABLE_ARCH_moxie_TRUE@ else \
5348 @SIM_ENABLE_ARCH_moxie_TRUE@ echo "Could not update the moxie-gdb.dtb file because the device "; \
5349 @SIM_ENABLE_ARCH_moxie_TRUE@ echo "tree compiler tool (dtc) is missing. Install the tool to "; \
5350 @SIM_ENABLE_ARCH_moxie_TRUE@ echo "update the device tree blob."; \
5351 @SIM_ENABLE_ARCH_moxie_TRUE@ fi
5352 @SIM_ENABLE_ARCH_msp430_TRUE@$(msp430_libsim_a_OBJECTS) $(msp430_libsim_a_LIBADD): msp430/hw-config.h
5353
5354 @SIM_ENABLE_ARCH_msp430_TRUE@msp430/%.o: msp430/%.c
5355 @SIM_ENABLE_ARCH_msp430_TRUE@ $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
5356
5357 @SIM_ENABLE_ARCH_msp430_TRUE@msp430/%.o: common/%.c
5358 @SIM_ENABLE_ARCH_msp430_TRUE@ $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
5359 @SIM_ENABLE_ARCH_or1k_TRUE@$(or1k_libsim_a_OBJECTS) $(or1k_libsim_a_LIBADD): or1k/hw-config.h
5360
5361 @SIM_ENABLE_ARCH_or1k_TRUE@or1k/%.o: or1k/%.c
5362 @SIM_ENABLE_ARCH_or1k_TRUE@ $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
5363
5364 @SIM_ENABLE_ARCH_or1k_TRUE@or1k/%.o: common/%.c
5365 @SIM_ENABLE_ARCH_or1k_TRUE@ $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
5366 @SIM_ENABLE_ARCH_or1k_TRUE@or1k/modules.c: | $(or1k_BUILD_OUTPUTS)
5367
5368 @SIM_ENABLE_ARCH_or1k_TRUE@or1k/mloop.c or1k/eng.h: or1k/stamp-mloop ; @true
5369 @SIM_ENABLE_ARCH_or1k_TRUE@or1k/stamp-mloop: $(srccom)/genmloop.sh or1k/mloop.in
5370 @SIM_ENABLE_ARCH_or1k_TRUE@ $(AM_V_GEN)$(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \
5371 @SIM_ENABLE_ARCH_or1k_TRUE@ -mono -fast -pbb -switch sem-switch.c \
5372 @SIM_ENABLE_ARCH_or1k_TRUE@ -cpu or1k32bf \
5373 @SIM_ENABLE_ARCH_or1k_TRUE@ -infile $(srcdir)/or1k/mloop.in -outfile-prefix or1k/
5374 @SIM_ENABLE_ARCH_or1k_TRUE@ $(AM_V_at)$(SHELL) $(srcroot)/move-if-change or1k/eng.hin or1k/eng.h
5375 @SIM_ENABLE_ARCH_or1k_TRUE@ $(AM_V_at)$(SHELL) $(srcroot)/move-if-change or1k/mloop.cin or1k/mloop.c
5376 @SIM_ENABLE_ARCH_or1k_TRUE@ $(AM_V_at)touch $@
5377
5378 @SIM_ENABLE_ARCH_or1k_TRUE@or1k/cgen: or1k/cgen-arch or1k/cgen-cpu-decode
5379
5380 @SIM_ENABLE_ARCH_or1k_TRUE@or1k/cgen-arch:
5381 @SIM_ENABLE_ARCH_or1k_TRUE@ $(AM_V_GEN)mach=or32,or32nd FLAGS="with-scache"; $(CGEN_GEN_ARCH)
5382 @SIM_ENABLE_ARCH_or1k_TRUE@or1k/arch.h or1k/arch.c or1k/cpuall.h: @CGEN_MAINT@ or1k/cgen-arch
5383
5384 @SIM_ENABLE_ARCH_or1k_TRUE@or1k/cgen-cpu-decode:
5385 @SIM_ENABLE_ARCH_or1k_TRUE@ $(AM_V_GEN)cpu=or1k32bf mach=or32,or32nd FLAGS="with-scache" EXTRAFILES="$(CGEN_CPU_SEM) $(CGEN_CPU_SEMSW)"; $(CGEN_GEN_CPU_DECODE)
5386 @SIM_ENABLE_ARCH_or1k_TRUE@or1k/cpu.h or1k/cpu.c or1k/model.c or1k/sem.c or1k/sem-switch.c or1k/decode.c or1k/decode.h: @CGEN_MAINT@ or1k/cgen-cpu-decode
5387
5388 @SIM_ENABLE_ARCH_ppc_TRUE@ppc/psim$(EXEEXT): ppc/run$(EXEEXT)
5389 @SIM_ENABLE_ARCH_ppc_TRUE@ $(AM_V_GEN)ln $< $@ 2>/dev/null || $(LN_S) $< $@ 2>/dev/null || cp -p $< $@
5390
5391 @SIM_ENABLE_ARCH_ppc_TRUE@ppc/%.o: ppc/%.c | ppc/libsim.a $(SIM_ALL_RECURSIVE_DEPS)
5392 @SIM_ENABLE_ARCH_ppc_TRUE@ $(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
5393
5394 @SIM_ENABLE_ARCH_ppc_TRUE@ppc/spreg.c: @MAINT@ ppc/ppc-spr-table ppc/spreg-gen.py ppc/$(am__dirstamp)
5395 @SIM_ENABLE_ARCH_ppc_TRUE@ $(AM_V_GEN)$(srcdir)/ppc/spreg-gen.py --source $@.tmp
5396 @SIM_ENABLE_ARCH_ppc_TRUE@ $(AM_V_at)$(SHELL) $(srcroot)/move-if-change $@.tmp $(srcdir)/ppc/spreg.c
5397 @SIM_ENABLE_ARCH_ppc_TRUE@ $(AM_V_at)touch $(srcdir)/ppc/spreg.c
5398
5399 @SIM_ENABLE_ARCH_ppc_TRUE@ppc/spreg.h: @MAINT@ ppc/ppc-spr-table ppc/spreg-gen.py ppc/$(am__dirstamp)
5400 @SIM_ENABLE_ARCH_ppc_TRUE@ $(AM_V_GEN)$(srcdir)/ppc/spreg-gen.py --header $@.tmp
5401 @SIM_ENABLE_ARCH_ppc_TRUE@ $(AM_V_at)$(SHELL) $(srcroot)/move-if-change $@.tmp $(srcdir)/ppc/spreg.h
5402 @SIM_ENABLE_ARCH_ppc_TRUE@ $(AM_V_at)touch $(srcdir)/ppc/spreg.h
5403 @SIM_ENABLE_ARCH_pru_TRUE@$(pru_libsim_a_OBJECTS) $(pru_libsim_a_LIBADD): pru/hw-config.h
5404
5405 @SIM_ENABLE_ARCH_pru_TRUE@pru/%.o: pru/%.c
5406 @SIM_ENABLE_ARCH_pru_TRUE@ $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
5407
5408 @SIM_ENABLE_ARCH_pru_TRUE@pru/%.o: common/%.c
5409 @SIM_ENABLE_ARCH_pru_TRUE@ $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
5410 @SIM_ENABLE_ARCH_riscv_TRUE@$(riscv_libsim_a_OBJECTS) $(riscv_libsim_a_LIBADD): riscv/hw-config.h
5411
5412 @SIM_ENABLE_ARCH_riscv_TRUE@riscv/%.o: riscv/%.c
5413 @SIM_ENABLE_ARCH_riscv_TRUE@ $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
5414
5415 @SIM_ENABLE_ARCH_riscv_TRUE@riscv/%.o: common/%.c
5416 @SIM_ENABLE_ARCH_riscv_TRUE@ $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
5417 @SIM_ENABLE_ARCH_rl78_TRUE@$(rl78_libsim_a_OBJECTS) $(rl78_libsim_a_LIBADD): rl78/hw-config.h
5418
5419 @SIM_ENABLE_ARCH_rl78_TRUE@rl78/%.o: rl78/%.c
5420 @SIM_ENABLE_ARCH_rl78_TRUE@ $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
5421
5422 @SIM_ENABLE_ARCH_rl78_TRUE@rl78/%.o: common/%.c
5423 @SIM_ENABLE_ARCH_rl78_TRUE@ $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
5424 @SIM_ENABLE_ARCH_rx_TRUE@$(rx_libsim_a_OBJECTS) $(rx_libsim_a_LIBADD): rx/hw-config.h
5425
5426 @SIM_ENABLE_ARCH_rx_TRUE@rx/%.o: rx/%.c
5427 @SIM_ENABLE_ARCH_rx_TRUE@ $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
5428
5429 @SIM_ENABLE_ARCH_rx_TRUE@rx/%.o: common/%.c
5430 @SIM_ENABLE_ARCH_rx_TRUE@ $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
5431 @SIM_ENABLE_ARCH_sh_TRUE@$(sh_libsim_a_OBJECTS) $(sh_libsim_a_LIBADD): sh/hw-config.h
5432
5433 @SIM_ENABLE_ARCH_sh_TRUE@sh/%.o: sh/%.c
5434 @SIM_ENABLE_ARCH_sh_TRUE@ $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
5435
5436 @SIM_ENABLE_ARCH_sh_TRUE@sh/%.o: common/%.c
5437 @SIM_ENABLE_ARCH_sh_TRUE@ $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
5438 @SIM_ENABLE_ARCH_sh_TRUE@sh/modules.c: | $(sh_BUILD_OUTPUTS)
5439
5440 # These rules are copied from automake, but tweaked to use FOR_BUILD variables.
5441 @SIM_ENABLE_ARCH_sh_TRUE@sh/gencode$(EXEEXT): $(sh_gencode_OBJECTS) $(sh_gencode_DEPENDENCIES) sh/$(am__dirstamp)
5442 @SIM_ENABLE_ARCH_sh_TRUE@ $(AM_V_CCLD)$(LINK_FOR_BUILD) $(sh_gencode_OBJECTS) $(sh_gencode_LDADD)
5443
5444 # gencode is a build-time only tool. Override the default rules for it.
5445 @SIM_ENABLE_ARCH_sh_TRUE@sh/gencode.o: sh/gencode.c
5446 @SIM_ENABLE_ARCH_sh_TRUE@ $(AM_V_CC)$(COMPILE_FOR_BUILD) -c $< -o $@
5447
5448 @SIM_ENABLE_ARCH_sh_TRUE@sh/code.c: sh/gencode$(EXEEXT)
5449 @SIM_ENABLE_ARCH_sh_TRUE@ $(AM_V_GEN)$< -x >$@
5450
5451 @SIM_ENABLE_ARCH_sh_TRUE@sh/ppi.c: sh/gencode$(EXEEXT)
5452 @SIM_ENABLE_ARCH_sh_TRUE@ $(AM_V_GEN)$< -p >$@
5453
5454 @SIM_ENABLE_ARCH_sh_TRUE@sh/table.c: sh/gencode$(EXEEXT)
5455 @SIM_ENABLE_ARCH_sh_TRUE@ $(AM_V_GEN)$< -s >$@
5456 @SIM_ENABLE_ARCH_v850_TRUE@$(v850_libsim_a_OBJECTS) $(v850_libsim_a_LIBADD): v850/hw-config.h
5457
5458 @SIM_ENABLE_ARCH_v850_TRUE@v850/%.o: v850/%.c
5459 @SIM_ENABLE_ARCH_v850_TRUE@ $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
5460
5461 @SIM_ENABLE_ARCH_v850_TRUE@v850/%.o: common/%.c
5462 @SIM_ENABLE_ARCH_v850_TRUE@ $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
5463 @SIM_ENABLE_ARCH_v850_TRUE@v850/modules.c: | $(v850_BUILD_OUTPUTS)
5464
5465 @SIM_ENABLE_ARCH_v850_TRUE@$(v850_BUILT_SRC_FROM_IGEN): v850/stamp-igen
5466 @SIM_ENABLE_ARCH_v850_TRUE@v850/stamp-igen: $(v850_IGEN_INSN) $(v850_IGEN_DC) $(IGEN)
5467 @SIM_ENABLE_ARCH_v850_TRUE@ $(AM_V_GEN)$(IGEN_RUN) \
5468 @SIM_ENABLE_ARCH_v850_TRUE@ $(v850_IGEN_TRACE) \
5469 @SIM_ENABLE_ARCH_v850_TRUE@ -G gen-direct-access \
5470 @SIM_ENABLE_ARCH_v850_TRUE@ -G gen-zero-r0 \
5471 @SIM_ENABLE_ARCH_v850_TRUE@ -i $(v850_IGEN_INSN) \
5472 @SIM_ENABLE_ARCH_v850_TRUE@ -o $(v850_IGEN_DC) \
5473 @SIM_ENABLE_ARCH_v850_TRUE@ -x \
5474 @SIM_ENABLE_ARCH_v850_TRUE@ -n icache.h -hc v850/icache.h \
5475 @SIM_ENABLE_ARCH_v850_TRUE@ -n icache.c -c v850/icache.c \
5476 @SIM_ENABLE_ARCH_v850_TRUE@ -n semantics.h -hs v850/semantics.h \
5477 @SIM_ENABLE_ARCH_v850_TRUE@ -n semantics.c -s v850/semantics.c \
5478 @SIM_ENABLE_ARCH_v850_TRUE@ -n idecode.h -hd v850/idecode.h \
5479 @SIM_ENABLE_ARCH_v850_TRUE@ -n idecode.c -d v850/idecode.c \
5480 @SIM_ENABLE_ARCH_v850_TRUE@ -n model.h -hm v850/model.h \
5481 @SIM_ENABLE_ARCH_v850_TRUE@ -n model.c -m v850/model.c \
5482 @SIM_ENABLE_ARCH_v850_TRUE@ -n support.h -hf v850/support.h \
5483 @SIM_ENABLE_ARCH_v850_TRUE@ -n support.c -f v850/support.c \
5484 @SIM_ENABLE_ARCH_v850_TRUE@ -n itable.h -ht v850/itable.h \
5485 @SIM_ENABLE_ARCH_v850_TRUE@ -n itable.c -t v850/itable.c \
5486 @SIM_ENABLE_ARCH_v850_TRUE@ -n engine.h -he v850/engine.h \
5487 @SIM_ENABLE_ARCH_v850_TRUE@ -n engine.c -e v850/engine.c \
5488 @SIM_ENABLE_ARCH_v850_TRUE@ -n irun.c -r v850/irun.c
5489 @SIM_ENABLE_ARCH_v850_TRUE@ $(AM_V_at)touch $@
5490
5491 all-recursive: $(SIM_ALL_RECURSIVE_DEPS)
5492
5493 install-data-local: installdirs $(SIM_INSTALL_DATA_LOCAL_DEPS)
5494 $(AM_V_at)$(MKDIR_P) $(DESTDIR)$(libdir)
5495 lib=`echo sim | sed '$(program_transform_name)'`; \
5496 for d in $(SIM_ENABLED_ARCHES); do \
5497 n="$$lib"; \
5498 [ "$(SIM_PRIMARY_TARGET)" = "$$d" ] || n="$$n-$$d"; \
5499 n="lib$$n.a"; \
5500 $(INSTALL_DATA) $$d/libsim.a $(DESTDIR)$(libdir)/$$n || exit 1; \
5501 done
5502
5503 install-exec-local: installdirs $(SIM_INSTALL_EXEC_LOCAL_DEPS)
5504 $(AM_V_at)$(MKDIR_P) $(DESTDIR)$(bindir)
5505 run=`echo run | sed '$(program_transform_name)'`; \
5506 for d in $(SIM_ENABLED_ARCHES); do \
5507 n="$$run"; \
5508 [ "$(SIM_PRIMARY_TARGET)" = "$$d" ] || n="$$n-$$d"; \
5509 $(LIBTOOL) --mode=install \
5510 $(INSTALL_PROGRAM) $$d/run$(EXEEXT) $(DESTDIR)$(bindir)/$$n$(EXEEXT) || exit 1; \
5511 done
5512
5513 uninstall-local: $(SIM_UNINSTALL_LOCAL_DEPS)
5514 rm -f $(DESTDIR)$(bindir)/run $(DESTDIR)$(libdir)/libsim.a
5515 for d in $(SIM_ENABLED_ARCHES); do \
5516 rm -f $(DESTDIR)$(bindir)/run-$$d $(DESTDIR)$(libdir)/libsim-$$d.a; \
5517 done
5518
5519 # Tell versions [3.59,3.63) of GNU make to not export all variables.
5520 # Otherwise a system limit (for SysV at least) may be exceeded.
5521 .NOEXPORT: