1 # Makefile.in generated by automake 1.15.1 from Makefile.am.
4 # Copyright (C) 1994-2017 Free Software Foundation, Inc.
6 # This Makefile.in is free software; the Free Software Foundation
7 # gives unlimited permission to copy and/or distribute it,
8 # with or without modifications, as long as this notice is preserved.
10 # This program is distributed in the hope that it will be useful,
11 # but WITHOUT ANY WARRANTY, to the extent permitted by law; without
12 # even the implied warranty of MERCHANTABILITY or FITNESS FOR A
17 # Copyright (C) 1993-2023 Free Software Foundation, Inc.
19 # This program is free software; you can redistribute it and/or modify
20 # it under the terms of the GNU General Public License as published by
21 # the Free Software Foundation; either version 3 of the License, or
22 # (at your option) any later version.
24 # This program is distributed in the hope that it will be useful,
25 # but WITHOUT ANY WARRANTY; without even the implied warranty of
26 # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
27 # GNU General Public License for more details.
29 # You should have received a copy of the GNU General Public License
30 # along with this program. If not, see <http://www.gnu.org/licenses/>.
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123 testsuite
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124 $(am__EXEEXT_4
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126 @ENABLE_SIM_TRUE@am__append_1
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127 @ENABLE_SIM_TRUE@
$(srcroot
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128 @ENABLE_SIM_TRUE@
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130 @SIM_ENABLE_HW_TRUE@am__append_2
= \
131 @SIM_ENABLE_HW_TRUE@
$(SIM_COMMON_HW_OBJS
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132 @SIM_ENABLE_HW_TRUE@
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134 @SIM_ENABLE_HW_TRUE@am__append_3
= SIM_HW_DEVICES_
="$(SIM_HW_DEVICES)"
135 @SIM_ENABLE_IGEN_TRUE@am__append_4
= $(IGEN
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136 @SIM_ENABLE_IGEN_TRUE@am__append_5
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/libigen.a
137 @SIM_ENABLE_IGEN_TRUE@am__append_6
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138 @SIM_ENABLE_IGEN_TRUE@am__append_7
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139 TESTS
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/bits32m0
$(EXEEXT
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140 testsuite
/common
/bits32m31
$(EXEEXT
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141 testsuite
/common
/bits64m0
$(EXEEXT
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142 testsuite
/common
/bits64m63
$(EXEEXT
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143 testsuite
/common
/alu-tst
$(EXEEXT
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144 @SIM_ENABLE_ARCH_aarch64_TRUE@am__append_8
= aarch64
/libsim.a
145 @SIM_ENABLE_ARCH_aarch64_TRUE@am__append_9
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/run
146 @SIM_ENABLE_ARCH_arm_TRUE@am__append_10
= arm
/libsim.a
147 @SIM_ENABLE_ARCH_arm_TRUE@am__append_11
= arm
/run
148 @SIM_ENABLE_ARCH_avr_TRUE@am__append_12
= avr
/libsim.a
149 @SIM_ENABLE_ARCH_avr_TRUE@am__append_13
= avr
/run
150 @SIM_ENABLE_ARCH_bfin_TRUE@am__append_14
= bfin
/libsim.a
151 @SIM_ENABLE_ARCH_bfin_TRUE@am__append_15
= bfin
/run
152 @SIM_ENABLE_ARCH_bfin_TRUE@am__append_16
= bfin_SIM_EXTRA_HW_DEVICES
="$(bfin_SIM_EXTRA_HW_DEVICES)"
153 @SIM_ENABLE_ARCH_bpf_TRUE@am__append_17
= bpf
/libsim.a
154 @SIM_ENABLE_ARCH_bpf_TRUE@am__append_18
= bpf
/run
155 @SIM_ENABLE_ARCH_bpf_TRUE@am__append_19
= \
156 @SIM_ENABLE_ARCH_bpf_TRUE@ bpf
/eng-le.h \
157 @SIM_ENABLE_ARCH_bpf_TRUE@ bpf
/eng-be.h
159 @SIM_ENABLE_ARCH_bpf_TRUE@am__append_20
= $(bpf_BUILD_OUTPUTS
)
160 @SIM_ENABLE_ARCH_bpf_TRUE@am__append_21
= $(bpf_BUILD_OUTPUTS
)
161 @SIM_ENABLE_ARCH_cr16_TRUE@am__append_22
= cr16
/libsim.a
162 @SIM_ENABLE_ARCH_cr16_TRUE@am__append_23
= cr16
/run
163 @SIM_ENABLE_ARCH_cr16_TRUE@am__append_24
= cr16
/simops.h
164 @SIM_ENABLE_ARCH_cr16_TRUE@am__append_25
= $(cr16_BUILD_OUTPUTS
)
165 @SIM_ENABLE_ARCH_cr16_TRUE@am__append_26
= cr16
/gencode
166 @SIM_ENABLE_ARCH_cr16_TRUE@am__append_27
= $(cr16_BUILD_OUTPUTS
)
167 @SIM_ENABLE_ARCH_cris_TRUE@am__append_28
= cris
/libsim.a
168 @SIM_ENABLE_ARCH_cris_TRUE@am__append_29
= cris
/run
169 @SIM_ENABLE_ARCH_cris_TRUE@am__append_30
= cris_SIM_EXTRA_HW_DEVICES
="$(cris_SIM_EXTRA_HW_DEVICES)"
170 @SIM_ENABLE_ARCH_cris_TRUE@am__append_31
= cris
/rvdummy
171 @SIM_ENABLE_ARCH_cris_TRUE@am__append_32
= \
172 @SIM_ENABLE_ARCH_cris_TRUE@ cris
/engv10.h \
173 @SIM_ENABLE_ARCH_cris_TRUE@ cris
/engv32.h
175 @SIM_ENABLE_ARCH_cris_TRUE@am__append_33
= $(cris_BUILD_OUTPUTS
)
176 @SIM_ENABLE_ARCH_cris_TRUE@am__append_34
= $(cris_BUILD_OUTPUTS
)
177 @SIM_ENABLE_ARCH_d10v_TRUE@am__append_35
= d10v
/libsim.a
178 @SIM_ENABLE_ARCH_d10v_TRUE@am__append_36
= d10v
/run
179 @SIM_ENABLE_ARCH_d10v_TRUE@am__append_37
= d10v
/simops.h
180 @SIM_ENABLE_ARCH_d10v_TRUE@am__append_38
= $(d10v_BUILD_OUTPUTS
)
181 @SIM_ENABLE_ARCH_d10v_TRUE@am__append_39
= d10v
/gencode
182 @SIM_ENABLE_ARCH_d10v_TRUE@am__append_40
= $(d10v_BUILD_OUTPUTS
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183 @SIM_ENABLE_ARCH_erc32_TRUE@am__append_41
= erc32
/libsim.a
184 @SIM_ENABLE_ARCH_erc32_TRUE@am__append_42
= erc32
/run erc32
/sis
185 @SIM_ENABLE_ARCH_erc32_TRUE@am__append_43
= sim-
%D-install-exec-local
186 @SIM_ENABLE_ARCH_erc32_TRUE@am__append_44
= sim-erc32-uninstall-local
187 @SIM_ENABLE_ARCH_examples_TRUE@am__append_45
= example-synacor
/libsim.a
188 @SIM_ENABLE_ARCH_examples_TRUE@am__append_46
= example-synacor
/run
189 @SIM_ENABLE_ARCH_frv_TRUE@am__append_47
= frv
/libsim.a
190 @SIM_ENABLE_ARCH_frv_TRUE@am__append_48
= frv
/run
191 @SIM_ENABLE_ARCH_frv_TRUE@am__append_49
= frv
/eng.h
192 @SIM_ENABLE_ARCH_frv_TRUE@am__append_50
= $(frv_BUILD_OUTPUTS
)
193 @SIM_ENABLE_ARCH_frv_TRUE@am__append_51
= $(frv_BUILD_OUTPUTS
)
194 @SIM_ENABLE_ARCH_ft32_TRUE@am__append_52
= ft32
/libsim.a
195 @SIM_ENABLE_ARCH_ft32_TRUE@am__append_53
= ft32
/run
196 @SIM_ENABLE_ARCH_h8300_TRUE@am__append_54
= h8300
/libsim.a
197 @SIM_ENABLE_ARCH_h8300_TRUE@am__append_55
= h8300
/run
198 @SIM_ENABLE_ARCH_iq2000_TRUE@am__append_56
= iq2000
/libsim.a
199 @SIM_ENABLE_ARCH_iq2000_TRUE@am__append_57
= iq2000
/run
200 @SIM_ENABLE_ARCH_iq2000_TRUE@am__append_58
= iq2000
/eng.h
201 @SIM_ENABLE_ARCH_iq2000_TRUE@am__append_59
= $(iq2000_BUILD_OUTPUTS
)
202 @SIM_ENABLE_ARCH_iq2000_TRUE@am__append_60
= $(iq2000_BUILD_OUTPUTS
)
203 @SIM_ENABLE_ARCH_lm32_TRUE@am__append_61
= lm32
/libsim.a
204 @SIM_ENABLE_ARCH_lm32_TRUE@am__append_62
= lm32
/run
205 @SIM_ENABLE_ARCH_lm32_TRUE@am__append_63
= lm32_SIM_EXTRA_HW_DEVICES
="$(lm32_SIM_EXTRA_HW_DEVICES)"
206 @SIM_ENABLE_ARCH_lm32_TRUE@am__append_64
= lm32
/eng.h
207 @SIM_ENABLE_ARCH_lm32_TRUE@am__append_65
= $(lm32_BUILD_OUTPUTS
)
208 @SIM_ENABLE_ARCH_lm32_TRUE@am__append_66
= $(lm32_BUILD_OUTPUTS
)
209 @SIM_ENABLE_ARCH_m32c_TRUE@am__append_67
= m32c
/libsim.a
210 @SIM_ENABLE_ARCH_m32c_TRUE@am__append_68
= m32c
/run
211 @SIM_ENABLE_ARCH_m32c_TRUE@am__append_69
= $(m32c_BUILD_OUTPUTS
)
212 @SIM_ENABLE_ARCH_m32c_TRUE@am__append_70
= m32c
/opc2c
213 @SIM_ENABLE_ARCH_m32c_TRUE@am__append_71
= \
214 @SIM_ENABLE_ARCH_m32c_TRUE@
$(m32c_BUILD_OUTPUTS
) \
215 @SIM_ENABLE_ARCH_m32c_TRUE@ m32c
/m32c.c.log \
216 @SIM_ENABLE_ARCH_m32c_TRUE@ m32c
/r8c.c.log
218 @SIM_ENABLE_ARCH_m32r_TRUE@am__append_72
= m32r
/libsim.a
219 @SIM_ENABLE_ARCH_m32r_TRUE@am__append_73
= m32r
/run
220 @SIM_ENABLE_ARCH_m32r_TRUE@am__append_74
= m32r_SIM_EXTRA_HW_DEVICES
="$(m32r_SIM_EXTRA_HW_DEVICES)"
221 @SIM_ENABLE_ARCH_m32r_TRUE@am__append_75
= \
222 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r
/eng.h \
223 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r
/engx.h \
224 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r
/eng2.h
226 @SIM_ENABLE_ARCH_m32r_TRUE@am__append_76
= $(m32r_BUILD_OUTPUTS
)
227 @SIM_ENABLE_ARCH_m32r_TRUE@am__append_77
= $(m32r_BUILD_OUTPUTS
)
228 @SIM_ENABLE_ARCH_m68hc11_TRUE@am__append_78
= m68hc11
/libsim.a
229 @SIM_ENABLE_ARCH_m68hc11_TRUE@am__append_79
= m68hc11
/run
230 @SIM_ENABLE_ARCH_m68hc11_TRUE@am__append_80
= m68hc11_SIM_EXTRA_HW_DEVICES
="$(m68hc11_SIM_EXTRA_HW_DEVICES)"
231 @SIM_ENABLE_ARCH_m68hc11_TRUE@am__append_81
= $(m68hc11_BUILD_OUTPUTS
)
232 @SIM_ENABLE_ARCH_m68hc11_TRUE@am__append_82
= m68hc11
/gencode
233 @SIM_ENABLE_ARCH_m68hc11_TRUE@am__append_83
= $(m68hc11_BUILD_OUTPUTS
)
234 @SIM_ENABLE_ARCH_mcore_TRUE@am__append_84
= mcore
/libsim.a
235 @SIM_ENABLE_ARCH_mcore_TRUE@am__append_85
= mcore
/run
236 @SIM_ENABLE_ARCH_microblaze_TRUE@am__append_86
= microblaze
/libsim.a
237 @SIM_ENABLE_ARCH_microblaze_TRUE@am__append_87
= microblaze
/run
238 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_SINGLE_TRUE@am__append_88
= \
239 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_SINGLE_TRUE@ mips
/support.o \
240 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_SINGLE_TRUE@ mips
/itable.o \
241 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_SINGLE_TRUE@ mips
/semantics.o \
242 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_SINGLE_TRUE@ mips
/idecode.o \
243 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_SINGLE_TRUE@ mips
/icache.o \
244 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_SINGLE_TRUE@ mips
/engine.o \
245 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_SINGLE_TRUE@ mips
/irun.o
247 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@am__append_89
= \
248 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@ mips
/m16_support.o \
249 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@ mips
/m16_semantics.o \
250 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@ mips
/m16_idecode.o \
251 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@ mips
/m16_icache.o \
252 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@ \
253 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@ mips
/m32_support.o \
254 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@ mips
/m32_semantics.o \
255 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@ mips
/m32_idecode.o \
256 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@ mips
/m32_icache.o \
257 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@ \
258 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@ mips
/itable.o \
259 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@ mips
/m16run.o
261 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_MULTI_TRUE@am__append_90
= \
262 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_MULTI_TRUE@
$(SIM_MIPS_MULTI_OBJ
) \
263 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_MULTI_TRUE@ mips
/itable.o \
264 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_MULTI_TRUE@ mips
/multi-run.o
266 @SIM_ENABLE_ARCH_mips_TRUE@am__append_91
= mips
/libsim.a
267 @SIM_ENABLE_ARCH_mips_TRUE@am__append_92
= mips
/run
268 @SIM_ENABLE_ARCH_mips_TRUE@am__append_93
= mips_SIM_EXTRA_HW_DEVICES
="$(mips_SIM_EXTRA_HW_DEVICES)"
269 @SIM_ENABLE_ARCH_mips_TRUE@am__append_94
= mips
/itable.h \
270 @SIM_ENABLE_ARCH_mips_TRUE@
$(SIM_MIPS_MULTI_SRC
)
271 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_SINGLE_TRUE@am__append_95
= \
272 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_SINGLE_TRUE@
$(mips_BUILT_SRC_FROM_GEN_MODE_SINGLE
) \
273 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_SINGLE_TRUE@ mips
/stamp-gen-mode-single
275 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@am__append_96
= \
276 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@
$(mips_BUILT_SRC_FROM_GEN_MODE_M16_M16
) \
277 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@
$(mips_BUILT_SRC_FROM_GEN_MODE_M16_M32
) \
278 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@ mips
/stamp-gen-mode-m16-m16 \
279 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@ mips
/stamp-gen-mode-m16-m32
281 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_MULTI_TRUE@am__append_97
= \
282 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_MULTI_TRUE@
$(SIM_MIPS_MULTI_SRC
) \
283 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_MULTI_TRUE@ mips
/stamp-gen-mode-multi-igen \
284 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_MULTI_TRUE@ mips
/stamp-gen-mode-multi-run
286 @SIM_ENABLE_ARCH_mips_TRUE@am__append_98
= $(mips_BUILD_OUTPUTS
)
287 @SIM_ENABLE_ARCH_mips_TRUE@am__append_99
= $(mips_BUILD_OUTPUTS
)
288 @SIM_ENABLE_ARCH_mips_TRUE@am__append_100
= mips
/multi-include.h mips
/multi-run.c
289 @SIM_ENABLE_ARCH_mn10300_TRUE@am__append_101
= mn10300
/libsim.a
290 @SIM_ENABLE_ARCH_mn10300_TRUE@am__append_102
= mn10300
/run
291 @SIM_ENABLE_ARCH_mn10300_TRUE@am__append_103
= mn10300_SIM_EXTRA_HW_DEVICES
="$(mn10300_SIM_EXTRA_HW_DEVICES)"
292 @SIM_ENABLE_ARCH_mn10300_TRUE@am__append_104
= \
293 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300
/icache.h \
294 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300
/idecode.h \
295 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300
/semantics.h \
296 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300
/model.h \
297 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300
/support.h \
298 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300
/itable.h \
299 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300
/engine.h
301 @SIM_ENABLE_ARCH_mn10300_TRUE@am__append_105
= $(mn10300_BUILD_OUTPUTS
)
302 @SIM_ENABLE_ARCH_mn10300_TRUE@am__append_106
= $(mn10300_BUILD_OUTPUTS
)
303 @SIM_ENABLE_ARCH_moxie_TRUE@am__append_107
= moxie
/libsim.a
304 @SIM_ENABLE_ARCH_moxie_TRUE@am__append_108
= moxie
/run
305 @SIM_ENABLE_ARCH_msp430_TRUE@am__append_109
= msp430
/libsim.a
306 @SIM_ENABLE_ARCH_msp430_TRUE@am__append_110
= msp430
/run
307 @SIM_ENABLE_ARCH_or1k_TRUE@am__append_111
= or1k
/libsim.a
308 @SIM_ENABLE_ARCH_or1k_TRUE@am__append_112
= or1k
/run
309 @SIM_ENABLE_ARCH_or1k_TRUE@am__append_113
= or1k
/eng.h
310 @SIM_ENABLE_ARCH_or1k_TRUE@am__append_114
= $(or1k_BUILD_OUTPUTS
)
311 @SIM_ENABLE_ARCH_or1k_TRUE@am__append_115
= $(or1k_BUILD_OUTPUTS
)
312 @SIM_ENABLE_ARCH_ppc_TRUE@am__append_116
= ppc
/run ppc
/psim
313 @SIM_ENABLE_ARCH_pru_TRUE@am__append_117
= pru
/libsim.a
314 @SIM_ENABLE_ARCH_pru_TRUE@am__append_118
= pru
/run
315 @SIM_ENABLE_ARCH_riscv_TRUE@am__append_119
= riscv
/libsim.a
316 @SIM_ENABLE_ARCH_riscv_TRUE@am__append_120
= riscv
/run
317 @SIM_ENABLE_ARCH_rl78_TRUE@am__append_121
= rl78
/libsim.a
318 @SIM_ENABLE_ARCH_rl78_TRUE@am__append_122
= rl78
/run
319 @SIM_ENABLE_ARCH_rx_TRUE@am__append_123
= rx
/libsim.a
320 @SIM_ENABLE_ARCH_rx_TRUE@am__append_124
= rx
/run
321 @SIM_ENABLE_ARCH_sh_TRUE@am__append_125
= sh
/libsim.a
322 @SIM_ENABLE_ARCH_sh_TRUE@am__append_126
= sh
/run
323 @SIM_ENABLE_ARCH_sh_TRUE@am__append_127
= \
324 @SIM_ENABLE_ARCH_sh_TRUE@ sh
/code.c \
325 @SIM_ENABLE_ARCH_sh_TRUE@ sh
/ppi.c
327 @SIM_ENABLE_ARCH_sh_TRUE@am__append_128
= $(sh_BUILD_OUTPUTS
)
328 @SIM_ENABLE_ARCH_sh_TRUE@am__append_129
= sh
/gencode
329 @SIM_ENABLE_ARCH_sh_TRUE@am__append_130
= $(sh_BUILD_OUTPUTS
)
330 @SIM_ENABLE_ARCH_v850_TRUE@am__append_131
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$(OBJEXT
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$(OBJEXT
) \
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$(OBJEXT
) \
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$(OBJEXT
) \
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/gen-icache.
$(OBJEXT
) \
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$(OBJEXT
) \
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/gen-idecode.
$(OBJEXT
) \
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$(OBJEXT
) \
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/gen-engine.
$(OBJEXT
) \
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$(OBJEXT
)
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= $(am_igen_libigen_a_OBJECTS
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= $(AR
) $(ARFLAGS
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=
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= $(AR
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= $(AR
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=
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= $(AR
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=
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= $(am_m32r_libsim_a_OBJECTS
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= $(AR
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$(patsubst \
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$(patsubst \
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=
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= $(am_m68hc11_libsim_a_OBJECTS
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= $(AR
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%.o
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)) \
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=
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= $(am_mcore_libsim_a_OBJECTS
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715 microblaze_libsim_a_AR
= $(AR
) $(ARFLAGS
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= $(common_libcommon_a_OBJECTS
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$(patsubst \
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$(patsubst \
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)) \
722 @SIM_ENABLE_ARCH_microblaze_TRUE@ microblaze
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724 am_microblaze_libsim_a_OBJECTS
=
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= $(am_microblaze_libsim_a_OBJECTS
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726 mips_libsim_a_AR
= $(AR
) $(ARFLAGS
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731 @SIM_ENABLE_ARCH_mips_TRUE@am__DEPENDENCIES_3
= $(am__append_88
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734 @SIM_ENABLE_ARCH_mips_TRUE@mips_libsim_a_DEPENDENCIES
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$(common_libcommon_a_OBJECTS
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$(am__DEPENDENCIES_3
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$(patsubst \
738 @SIM_ENABLE_ARCH_mips_TRUE@
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$(patsubst \
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$(patsubst \
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/cp1.o mips
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744 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/modules.o mips
/sim-main.o \
745 @SIM_ENABLE_ARCH_mips_TRUE@ mips
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746 am_mips_libsim_a_OBJECTS
=
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= $(am_mips_libsim_a_OBJECTS
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748 mn10300_libsim_a_AR
= $(AR
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$(common_libcommon_a_OBJECTS
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$(patsubst \
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$(patsubst \
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=
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= $(am_mn10300_libsim_a_OBJECTS
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= $(AR
) $(ARFLAGS
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= \
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$(patsubst \
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=
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= $(AR
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$(common_libcommon_a_OBJECTS
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$(patsubst \
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=
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= $(AR
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=
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= $(am_or1k_libsim_a_OBJECTS
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= $(AR
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= \
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$(patsubst \
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=
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= $(am_pru_libsim_a_OBJECTS
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= $(AR
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= \
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=
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= $(AR
) $(ARFLAGS
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= \
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=
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= $(am_rl78_libsim_a_OBJECTS
)
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= $(AR
) $(ARFLAGS
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= \
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$(common_libcommon_a_OBJECTS
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846 am_rx_libsim_a_OBJECTS
=
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= $(AR
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) $(ARFLAGS
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= \
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$(common_libcommon_a_OBJECTS
) \
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$(patsubst \
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%,v850
/%,$(SIM_NEW_COMMON_OBJS
)) \
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$(patsubst \
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%.o
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)) \
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866 @SIM_ENABLE_ARCH_v850_TRUE@ v850
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867 @SIM_ENABLE_ARCH_v850_TRUE@ v850
/idecode.o v850
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868 @SIM_ENABLE_ARCH_v850_TRUE@ v850
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869 @SIM_ENABLE_ARCH_v850_TRUE@ v850
/support.o v850
/modules.o \
870 @SIM_ENABLE_ARCH_v850_TRUE@ v850
/sim-resume.o
871 am_v850_libsim_a_OBJECTS
=
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= $(am_v850_libsim_a_OBJECTS
)
873 @SIM_ENABLE_IGEN_TRUE@am__EXEEXT_1
= $(IGEN
) igen
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) \
874 @SIM_ENABLE_IGEN_TRUE@ igen
/gen
$(EXEEXT
) igen
/ld-cache
$(EXEEXT
) \
875 @SIM_ENABLE_IGEN_TRUE@ igen
/ld-decode
$(EXEEXT
) \
876 @SIM_ENABLE_IGEN_TRUE@ igen
/ld-insn
$(EXEEXT
) \
877 @SIM_ENABLE_IGEN_TRUE@ igen
/table
$(EXEEXT
)
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= $(am__EXEEXT_1
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= cr16
/gencode
$(EXEEXT
)
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= d10v
/gencode
$(EXEEXT
)
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= m32c
/opc2c
$(EXEEXT
)
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= m68hc11
/gencode
$(EXEEXT
)
883 @SIM_ENABLE_ARCH_sh_TRUE@am__EXEEXT_7
= sh
/gencode
$(EXEEXT
)
884 am__EXEEXT_8
= testsuite
/common
/bits32m0
$(EXEEXT
) \
885 testsuite
/common
/bits32m31
$(EXEEXT
) \
886 testsuite
/common
/bits64m0
$(EXEEXT
) \
887 testsuite
/common
/bits64m63
$(EXEEXT
) \
888 testsuite
/common
/alu-tst
$(EXEEXT
)
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= cris
/rvdummy
$(EXEEXT
)
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= aarch64
/run
$(EXEEXT
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= arm
/run
$(EXEEXT
)
892 @SIM_ENABLE_ARCH_avr_TRUE@am__EXEEXT_12
= avr
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$(EXEEXT
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893 @SIM_ENABLE_ARCH_bfin_TRUE@am__EXEEXT_13
= bfin
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$(EXEEXT
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$(EXEEXT
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$(EXEEXT
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$(EXEEXT
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= \
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$(EXEEXT
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$(EXEEXT
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$(EXEEXT
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$(EXEEXT
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= iq2000
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$(EXEEXT
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906 @SIM_ENABLE_ARCH_lm32_TRUE@am__EXEEXT_24
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$(EXEEXT
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907 @SIM_ENABLE_ARCH_m32c_TRUE@am__EXEEXT_25
= m32c
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$(EXEEXT
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= m32r
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$(EXEEXT
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$(EXEEXT
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= \
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= mips
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$(EXEEXT
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= mn10300
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$(EXEEXT
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$(EXEEXT
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= msp430
/run
$(EXEEXT
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= or1k
/run
$(EXEEXT
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= ppc
/run
$(EXEEXT
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= pru
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$(EXEEXT
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= riscv
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$(EXEEXT
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= rx
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$(EXEEXT
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$(EXEEXT
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= $(noinst_PROGRAMS
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=
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= $(am_aarch64_run_OBJECTS
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= \
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/libsim.a \
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$(am__DEPENDENCIES_4
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940 @SIM_ENABLE_ARCH_arm_TRUE@ arm
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$(am__DEPENDENCIES_4
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=
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= $(am_bfin_run_OBJECTS
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$(am__DEPENDENCIES_4
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952 @SIM_ENABLE_ARCH_bpf_TRUE@ bpf
/libsim.a
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$(OBJEXT
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956 @SIM_ENABLE_ARCH_cr16_TRUE@cr16_gencode_DEPENDENCIES
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958 am_cr16_run_OBJECTS
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960 @SIM_ENABLE_ARCH_cr16_TRUE@cr16_run_DEPENDENCIES
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/nrun.o \
965 @SIM_ENABLE_ARCH_cris_TRUE@ cris
/libsim.a
$(am__DEPENDENCIES_4
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$(OBJEXT
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= $(am_d10v_gencode_OBJECTS
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= \
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= $(am_d10v_run_OBJECTS
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$(am__DEPENDENCIES_4
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= $(am_erc32_run_OBJECTS
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/sis.o \
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= erc32
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/sis.
$(OBJEXT
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= $(LDADD
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=
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= $(am_example_synacor_run_OBJECTS
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/nrun.o \
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= $(am_frv_run_OBJECTS
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/nrun.o \
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$(am__DEPENDENCIES_4
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=
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= $(am_ft32_run_OBJECTS
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/nrun.o \
1003 @SIM_ENABLE_ARCH_ft32_TRUE@ ft32
/libsim.a
$(am__DEPENDENCIES_4
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=
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/nrun.o \
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$(am__DEPENDENCIES_4
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=
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= $(am_igen_filter_OBJECTS
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= igen
/filter-main.o \
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=
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= $(am_igen_gen_OBJECTS
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= igen
/gen-main.o \
1016 @SIM_ENABLE_IGEN_TRUE@ igen
/libigen.a
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= igen
/igen.
$(OBJEXT
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1018 igen_igen_OBJECTS
= $(am_igen_igen_OBJECTS
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= igen
/libigen.a
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=
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= $(am_igen_ld_cache_OBJECTS
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1022 @SIM_ENABLE_IGEN_TRUE@igen_ld_cache_DEPENDENCIES
= \
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/ld-cache-main.o igen
/libigen.a
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=
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= $(am_igen_ld_decode_OBJECTS
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1026 @SIM_ENABLE_IGEN_TRUE@igen_ld_decode_DEPENDENCIES
= \
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/ld-decode-main.o igen
/libigen.a
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=
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= $(am_igen_ld_insn_OBJECTS
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= igen
/ld-insn-main.o \
1031 @SIM_ENABLE_IGEN_TRUE@ igen
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=
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= $(am_igen_table_OBJECTS
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= igen
/table-main.o \
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=
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= $(am_iq2000_run_OBJECTS
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1038 @SIM_ENABLE_ARCH_iq2000_TRUE@iq2000_run_DEPENDENCIES
= iq2000
/nrun.o \
1039 @SIM_ENABLE_ARCH_iq2000_TRUE@ iq2000
/libsim.a \
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1041 am_lm32_run_OBJECTS
=
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= $(am_lm32_run_OBJECTS
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= lm32
/nrun.o \
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/libsim.a
$(am__DEPENDENCIES_4
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= \
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/opc2c.
$(OBJEXT
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1047 m32c_opc2c_OBJECTS
= $(am_m32c_opc2c_OBJECTS
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= $(LDADD
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=
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= $(am_m32c_run_OBJECTS
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= m32c
/main.o \
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/libsim.a
$(am__DEPENDENCIES_4
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= $(am_m32r_run_OBJECTS
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= m32r
/nrun.o \
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/libsim.a
$(am__DEPENDENCIES_4
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= \
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/gencode.
$(OBJEXT
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= $(am_m68hc11_gencode_OBJECTS
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= $(LDADD
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=
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= $(am_m68hc11_run_OBJECTS
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= \
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/nrun.o m68hc11
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= mcore
/nrun.o \
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/libsim.a \
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=
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= \
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/nrun.o \
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=
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1079 @SIM_ENABLE_ARCH_mips_TRUE@mips_run_DEPENDENCIES
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/nrun.o \
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/libsim.a
$(am__DEPENDENCIES_4
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/nrun.o mn10300
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=
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$(OBJEXT
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1126 sh_gencode_LDADD
= $(LDADD
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= $(am_sh_run_OBJECTS
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1134 testsuite_common_bits_gen_SOURCES
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1137 testsuite_common_bits_gen_LDADD
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= \
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$(OBJEXT
)
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= $(LDADD
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= testsuite
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= \
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1179 LTCOMPILE
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1233 testsuite
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1234 testsuite
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1237 ctags-recursive dvi-recursive html-recursive info-recursive \
1238 install-data-recursive install-dvi-recursive \
1239 install-exec-recursive install-html-recursive \
1240 install-info-recursive install-pdf-recursive \
1241 install-ps-recursive install-recursive installcheck-recursive \
1242 installdirs-recursive pdf-recursive ps-recursive \
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1268 sed
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1282 am__pkginclude_HEADERS_DIST
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1285 RECURSIVE_CLEAN_TARGETS
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1286 distclean-recursive maintainer-clean-recursive
1287 am__recursive_targets
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1288 $(RECURSIVE_TARGETS
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1289 $(RECURSIVE_CLEAN_TARGETS
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1290 $(am__extra_recursive_targets
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1291 AM_RECURSIVE_TARGETS
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1314 DEJATOOL
= $(PACKAGE
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1315 RUNTESTDEFAULTFLAGS
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1323 if
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[ ]*:global-test-result
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1342 am__copy_in_global_log_rx
= ^
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1373 am__create_global_log
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1374 function fatal(msg) \
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1379 function rst_section(header) \
1382 len = length(header); \
1383 for (i = 1; i <= len; i = i + 1) \
1388 copy_in_global_log = 1; \
1389 global_test_result = "RUN"; \
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1418 am__rst_title
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1419 # Solaris 10 'make', and several other traditional 'make' implementations,
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1455 case
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1469 am__set_TESTS_bases
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1470 bases
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1473 RECHECK_LOGS
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1474 TEST_SUITE_LOG
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1490 TEST_LOGS
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1491 TEST_LOG_DRIVER
= $(SHELL
) $(top_srcdir
)/..
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1492 TEST_LOG_COMPILE
= $(TEST_LOG_COMPILER
) $(AM_TEST_LOG_FLAGS
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1494 DIST_SUBDIRS
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1497 AM_DEFAULT_VERBOSITY
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1499 AR_FOR_BUILD
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1500 AS_FOR_TARGET
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1501 AS_FOR_TARGET_AARCH64
= @AS_FOR_TARGET_AARCH64@
1502 AS_FOR_TARGET_ARM
= @AS_FOR_TARGET_ARM@
1503 AS_FOR_TARGET_AVR
= @AS_FOR_TARGET_AVR@
1504 AS_FOR_TARGET_BFIN
= @AS_FOR_TARGET_BFIN@
1505 AS_FOR_TARGET_BPF
= @AS_FOR_TARGET_BPF@
1506 AS_FOR_TARGET_CR16
= @AS_FOR_TARGET_CR16@
1507 AS_FOR_TARGET_CRIS
= @AS_FOR_TARGET_CRIS@
1508 AS_FOR_TARGET_D10V
= @AS_FOR_TARGET_D10V@
1509 AS_FOR_TARGET_ERC32
= @AS_FOR_TARGET_ERC32@
1510 AS_FOR_TARGET_EXAMPLE_SYNACOR
= @AS_FOR_TARGET_EXAMPLE_SYNACOR@
1511 AS_FOR_TARGET_FRV
= @AS_FOR_TARGET_FRV@
1512 AS_FOR_TARGET_FT32
= @AS_FOR_TARGET_FT32@
1513 AS_FOR_TARGET_H8300
= @AS_FOR_TARGET_H8300@
1514 AS_FOR_TARGET_IQ2000
= @AS_FOR_TARGET_IQ2000@
1515 AS_FOR_TARGET_LM32
= @AS_FOR_TARGET_LM32@
1516 AS_FOR_TARGET_M32C
= @AS_FOR_TARGET_M32C@
1517 AS_FOR_TARGET_M32R
= @AS_FOR_TARGET_M32R@
1518 AS_FOR_TARGET_M68HC11
= @AS_FOR_TARGET_M68HC11@
1519 AS_FOR_TARGET_MCORE
= @AS_FOR_TARGET_MCORE@
1520 AS_FOR_TARGET_MICROBLAZE
= @AS_FOR_TARGET_MICROBLAZE@
1521 AS_FOR_TARGET_MIPS
= @AS_FOR_TARGET_MIPS@
1522 AS_FOR_TARGET_MN10300
= @AS_FOR_TARGET_MN10300@
1523 AS_FOR_TARGET_MOXIE
= @AS_FOR_TARGET_MOXIE@
1524 AS_FOR_TARGET_MSP430
= @AS_FOR_TARGET_MSP430@
1525 AS_FOR_TARGET_OR1K
= @AS_FOR_TARGET_OR1K@
1526 AS_FOR_TARGET_PPC
= @AS_FOR_TARGET_PPC@
1527 AS_FOR_TARGET_PRU
= @AS_FOR_TARGET_PRU@
1528 AS_FOR_TARGET_RISCV
= @AS_FOR_TARGET_RISCV@
1529 AS_FOR_TARGET_RL78
= @AS_FOR_TARGET_RL78@
1530 AS_FOR_TARGET_RX
= @AS_FOR_TARGET_RX@
1531 AS_FOR_TARGET_SH
= @AS_FOR_TARGET_SH@
1532 AS_FOR_TARGET_V850
= @AS_FOR_TARGET_V850@
1533 AUTOCONF
= @AUTOCONF@
1534 AUTOHEADER
= @AUTOHEADER@
1535 AUTOMAKE
= @AUTOMAKE@
1538 CCDEPMODE
= @CCDEPMODE@
1539 CC_FOR_BUILD
= @CC_FOR_BUILD@
1540 CC_FOR_TARGET
= @CC_FOR_TARGET@
1541 CC_FOR_TARGET_AARCH64
= @CC_FOR_TARGET_AARCH64@
1542 CC_FOR_TARGET_ARM
= @CC_FOR_TARGET_ARM@
1543 CC_FOR_TARGET_AVR
= @CC_FOR_TARGET_AVR@
1544 CC_FOR_TARGET_BFIN
= @CC_FOR_TARGET_BFIN@
1545 CC_FOR_TARGET_BPF
= @CC_FOR_TARGET_BPF@
1546 CC_FOR_TARGET_CR16
= @CC_FOR_TARGET_CR16@
1547 CC_FOR_TARGET_CRIS
= @CC_FOR_TARGET_CRIS@
1548 CC_FOR_TARGET_D10V
= @CC_FOR_TARGET_D10V@
1549 CC_FOR_TARGET_ERC32
= @CC_FOR_TARGET_ERC32@
1550 CC_FOR_TARGET_EXAMPLE_SYNACOR
= @CC_FOR_TARGET_EXAMPLE_SYNACOR@
1551 CC_FOR_TARGET_FRV
= @CC_FOR_TARGET_FRV@
1552 CC_FOR_TARGET_FT32
= @CC_FOR_TARGET_FT32@
1553 CC_FOR_TARGET_H8300
= @CC_FOR_TARGET_H8300@
1554 CC_FOR_TARGET_IQ2000
= @CC_FOR_TARGET_IQ2000@
1555 CC_FOR_TARGET_LM32
= @CC_FOR_TARGET_LM32@
1556 CC_FOR_TARGET_M32C
= @CC_FOR_TARGET_M32C@
1557 CC_FOR_TARGET_M32R
= @CC_FOR_TARGET_M32R@
1558 CC_FOR_TARGET_M68HC11
= @CC_FOR_TARGET_M68HC11@
1559 CC_FOR_TARGET_MCORE
= @CC_FOR_TARGET_MCORE@
1560 CC_FOR_TARGET_MICROBLAZE
= @CC_FOR_TARGET_MICROBLAZE@
1561 CC_FOR_TARGET_MIPS
= @CC_FOR_TARGET_MIPS@
1562 CC_FOR_TARGET_MN10300
= @CC_FOR_TARGET_MN10300@
1563 CC_FOR_TARGET_MOXIE
= @CC_FOR_TARGET_MOXIE@
1564 CC_FOR_TARGET_MSP430
= @CC_FOR_TARGET_MSP430@
1565 CC_FOR_TARGET_OR1K
= @CC_FOR_TARGET_OR1K@
1566 CC_FOR_TARGET_PPC
= @CC_FOR_TARGET_PPC@
1567 CC_FOR_TARGET_PRU
= @CC_FOR_TARGET_PRU@
1568 CC_FOR_TARGET_RISCV
= @CC_FOR_TARGET_RISCV@
1569 CC_FOR_TARGET_RL78
= @CC_FOR_TARGET_RL78@
1570 CC_FOR_TARGET_RX
= @CC_FOR_TARGET_RX@
1571 CC_FOR_TARGET_SH
= @CC_FOR_TARGET_SH@
1572 CC_FOR_TARGET_V850
= @CC_FOR_TARGET_V850@
1574 CFLAGS_FOR_BUILD
= @CFLAGS_FOR_BUILD@
1575 CGEN_MAINT
= @CGEN_MAINT@
1577 CPPFLAGS
= @CPPFLAGS@
1578 CPPFLAGS_FOR_BUILD
= @CPPFLAGS_FOR_BUILD@
1579 CYGPATH_W
= @CYGPATH_W@
1580 C_DIALECT
= @C_DIALECT@
1583 DSYMUTIL
= @DSYMUTIL@
1593 IGEN_FLAGS_SMP
= @IGEN_FLAGS_SMP@
1595 INSTALL_DATA
= @INSTALL_DATA@
1596 INSTALL_PROGRAM
= @INSTALL_PROGRAM@
1597 INSTALL_SCRIPT
= @INSTALL_SCRIPT@
1598 INSTALL_STRIP_PROGRAM
= @INSTALL_STRIP_PROGRAM@
1601 LDFLAGS_FOR_BUILD
= @LDFLAGS_FOR_BUILD@
1602 LD_FOR_TARGET
= @LD_FOR_TARGET@
1603 LD_FOR_TARGET_AARCH64
= @LD_FOR_TARGET_AARCH64@
1604 LD_FOR_TARGET_ARM
= @LD_FOR_TARGET_ARM@
1605 LD_FOR_TARGET_AVR
= @LD_FOR_TARGET_AVR@
1606 LD_FOR_TARGET_BFIN
= @LD_FOR_TARGET_BFIN@
1607 LD_FOR_TARGET_BPF
= @LD_FOR_TARGET_BPF@
1608 LD_FOR_TARGET_CR16
= @LD_FOR_TARGET_CR16@
1609 LD_FOR_TARGET_CRIS
= @LD_FOR_TARGET_CRIS@
1610 LD_FOR_TARGET_D10V
= @LD_FOR_TARGET_D10V@
1611 LD_FOR_TARGET_ERC32
= @LD_FOR_TARGET_ERC32@
1612 LD_FOR_TARGET_EXAMPLE_SYNACOR
= @LD_FOR_TARGET_EXAMPLE_SYNACOR@
1613 LD_FOR_TARGET_FRV
= @LD_FOR_TARGET_FRV@
1614 LD_FOR_TARGET_FT32
= @LD_FOR_TARGET_FT32@
1615 LD_FOR_TARGET_H8300
= @LD_FOR_TARGET_H8300@
1616 LD_FOR_TARGET_IQ2000
= @LD_FOR_TARGET_IQ2000@
1617 LD_FOR_TARGET_LM32
= @LD_FOR_TARGET_LM32@
1618 LD_FOR_TARGET_M32C
= @LD_FOR_TARGET_M32C@
1619 LD_FOR_TARGET_M32R
= @LD_FOR_TARGET_M32R@
1620 LD_FOR_TARGET_M68HC11
= @LD_FOR_TARGET_M68HC11@
1621 LD_FOR_TARGET_MCORE
= @LD_FOR_TARGET_MCORE@
1622 LD_FOR_TARGET_MICROBLAZE
= @LD_FOR_TARGET_MICROBLAZE@
1623 LD_FOR_TARGET_MIPS
= @LD_FOR_TARGET_MIPS@
1624 LD_FOR_TARGET_MN10300
= @LD_FOR_TARGET_MN10300@
1625 LD_FOR_TARGET_MOXIE
= @LD_FOR_TARGET_MOXIE@
1626 LD_FOR_TARGET_MSP430
= @LD_FOR_TARGET_MSP430@
1627 LD_FOR_TARGET_OR1K
= @LD_FOR_TARGET_OR1K@
1628 LD_FOR_TARGET_PPC
= @LD_FOR_TARGET_PPC@
1629 LD_FOR_TARGET_PRU
= @LD_FOR_TARGET_PRU@
1630 LD_FOR_TARGET_RISCV
= @LD_FOR_TARGET_RISCV@
1631 LD_FOR_TARGET_RL78
= @LD_FOR_TARGET_RL78@
1632 LD_FOR_TARGET_RX
= @LD_FOR_TARGET_RX@
1633 LD_FOR_TARGET_SH
= @LD_FOR_TARGET_SH@
1634 LD_FOR_TARGET_V850
= @LD_FOR_TARGET_V850@
1640 LTLIBOBJS
= @LTLIBOBJS@
1642 MAKEINFO
= @MAKEINFO@
1651 PACKAGE_BUGREPORT
= @PACKAGE_BUGREPORT@
1652 PACKAGE_NAME
= @PACKAGE_NAME@
1653 PACKAGE_STRING
= @PACKAGE_STRING@
1654 PACKAGE_TARNAME
= @PACKAGE_TARNAME@
1655 PACKAGE_URL
= @PACKAGE_URL@
1656 PACKAGE_VERSION
= @PACKAGE_VERSION@
1657 PATH_SEPARATOR
= @PATH_SEPARATOR@
1658 PKGVERSION
= @PKGVERSION@
1659 PKG_CONFIG
= @PKG_CONFIG@
1660 PKG_CONFIG_LIBDIR
= @PKG_CONFIG_LIBDIR@
1661 PKG_CONFIG_PATH
= @PKG_CONFIG_PATH@
1663 RANLIB_FOR_BUILD
= @RANLIB_FOR_BUILD@
1664 READLINE_CFLAGS
= @READLINE_CFLAGS@
1665 READLINE_LIB
= @READLINE_LIB@
1666 REPORT_BUGS_TEXI
= @REPORT_BUGS_TEXI@
1667 REPORT_BUGS_TO
= @REPORT_BUGS_TO@
1668 SDL_CFLAGS
= @SDL_CFLAGS@
1669 SDL_LIBS
= @SDL_LIBS@
1671 SET_MAKE
= @SET_MAKE@
1673 SIM_COMMON_BUILD_FALSE
= @SIM_COMMON_BUILD_FALSE@
1674 SIM_COMMON_BUILD_TRUE
= @SIM_COMMON_BUILD_TRUE@
1675 SIM_ENABLED_ARCHES
= @SIM_ENABLED_ARCHES@
1676 SIM_FRV_TRAPDUMP_FLAGS
= @SIM_FRV_TRAPDUMP_FLAGS@
1677 SIM_HW_CFLAGS
= @SIM_HW_CFLAGS@
1678 SIM_HW_SOCKSER
= @SIM_HW_SOCKSER@
1679 SIM_INLINE
= @SIM_INLINE@
1680 SIM_MIPS_BITSIZE
= @SIM_MIPS_BITSIZE@
1681 SIM_MIPS_FPU_BITSIZE
= @SIM_MIPS_FPU_BITSIZE@
1682 SIM_MIPS_GEN
= @SIM_MIPS_GEN@
1683 SIM_MIPS_IGEN_ITABLE_FLAGS
= @SIM_MIPS_IGEN_ITABLE_FLAGS@
1684 SIM_MIPS_M16_FLAGS
= @SIM_MIPS_M16_FLAGS@
1685 SIM_MIPS_MULTI_IGEN_CONFIGS
= @SIM_MIPS_MULTI_IGEN_CONFIGS@
1686 SIM_MIPS_MULTI_OBJ
= @SIM_MIPS_MULTI_OBJ@
1687 SIM_MIPS_MULTI_SRC
= @SIM_MIPS_MULTI_SRC@
1688 SIM_MIPS_SINGLE_FLAGS
= @SIM_MIPS_SINGLE_FLAGS@
1689 SIM_MIPS_SUBTARGET
= @SIM_MIPS_SUBTARGET@
1690 SIM_PRIMARY_TARGET
= @SIM_PRIMARY_TARGET@
1691 SIM_RISCV_BITSIZE
= @SIM_RISCV_BITSIZE@
1692 SIM_RX_CYCLE_ACCURATE_FLAGS
= @SIM_RX_CYCLE_ACCURATE_FLAGS@
1693 SIM_SUBDIRS
= @SIM_SUBDIRS@
1694 SIM_TOOLCHAIN_VARS
= @SIM_TOOLCHAIN_VARS@
1696 TERMCAP_LIB
= @TERMCAP_LIB@
1698 WARN_CFLAGS
= @WARN_CFLAGS@
1699 WERROR_CFLAGS
= @WERROR_CFLAGS@
1700 abs_builddir
= @abs_builddir@
1701 abs_srcdir
= @abs_srcdir@
1702 abs_top_builddir
= @abs_top_builddir@
1703 abs_top_srcdir
= @abs_top_srcdir@
1704 ac_ct_CC
= @ac_ct_CC@
1705 ac_ct_DUMPBIN
= @ac_ct_DUMPBIN@
1706 am__include
= @am__include@
1707 am__leading_dot
= @am__leading_dot@
1708 am__quote
= @am__quote@
1710 am__untar
= @am__untar@
1713 build_alias
= @build_alias@
1714 build_cpu
= @build_cpu@
1715 build_os
= @build_os@
1716 build_vendor
= @build_vendor@
1717 builddir
= @builddir@
1721 datarootdir
= @datarootdir@
1724 exec_prefix = @
exec_prefix@
1726 host_alias
= @host_alias@
1727 host_cpu
= @host_cpu@
1729 host_vendor
= @host_vendor@
1731 includedir = @
includedir@
1733 install_sh
= @install_sh@
1735 libexecdir
= @libexecdir@
1736 localedir
= @localedir@
1737 localstatedir
= @localstatedir@
1740 oldincludedir = @
oldincludedir@
1743 program_transform_name
= @program_transform_name@
1746 sharedstatedir
= @sharedstatedir@
1747 sim_bitsize
= @sim_bitsize@
1748 sim_float
= @sim_float@
1751 sysconfdir
= @sysconfdir@
1753 target_alias
= @target_alias@
1754 target_cpu
= @target_cpu@
1755 target_os
= @target_os@
1756 target_vendor
= @target_vendor@
1757 top_build_prefix
= @top_build_prefix@
1758 top_builddir
= @top_builddir@
1759 top_srcdir
= @top_srcdir@
1760 AUTOMAKE_OPTIONS
= dejagnu foreign no-dist subdir-objects
1761 ACLOCAL_AMFLAGS
= -Im4
-I..
-I..
/config
1762 GNULIB_PARENT_DIR
= ..
1763 srccom
= $(srcdir)/common
1764 srcroot
= $(srcdir)/..
1765 SUBDIRS
= @subdirs@
$(SIM_SUBDIRS
)
1766 AM_MAKEFLAGS
= SIM_NEW_COMMON_OBJS_
="$(SIM_NEW_COMMON_OBJS)" \
1767 $(am__append_3
) $(am__append_16
) $(am__append_30
) \
1768 $(am__append_63
) $(am__append_74
) $(am__append_80
) \
1769 $(am__append_93
) $(am__append_103
)
1770 pkginclude_HEADERS
= $(am__append_1
)
1771 noinst_LIBRARIES
= common
/libcommon.a
$(am__append_5
) $(am__append_8
) \
1772 $(am__append_10
) $(am__append_12
) $(am__append_14
) \
1773 $(am__append_17
) $(am__append_22
) $(am__append_28
) \
1774 $(am__append_35
) $(am__append_41
) $(am__append_45
) \
1775 $(am__append_47
) $(am__append_52
) $(am__append_54
) \
1776 $(am__append_56
) $(am__append_61
) $(am__append_67
) \
1777 $(am__append_72
) $(am__append_78
) $(am__append_84
) \
1778 $(am__append_86
) $(am__append_91
) $(am__append_101
) \
1779 $(am__append_107
) $(am__append_109
) $(am__append_111
) \
1780 $(am__append_117
) $(am__append_119
) $(am__append_121
) \
1781 $(am__append_123
) $(am__append_125
) $(am__append_131
)
1782 BUILT_SOURCES
= $(am__append_19
) $(am__append_24
) $(am__append_32
) \
1783 $(am__append_37
) $(am__append_49
) $(am__append_58
) \
1784 $(am__append_64
) $(am__append_75
) $(am__append_94
) \
1785 $(am__append_104
) $(am__append_113
) $(am__append_127
) \
1787 CLEANFILES
= common
/version.c common
/version.c-stamp \
1788 testsuite
/common
/bits-gen testsuite
/common
/bits32m0.c \
1789 testsuite
/common
/bits32m31.c testsuite
/common
/bits64m0.c \
1790 testsuite
/common
/bits64m63.c
1791 DISTCLEANFILES
= $(am__append_100
)
1792 MOSTLYCLEANFILES
= core
$(SIM_ENABLED_ARCHES
:%=%/*.o
) \
1793 $(common_HW_CONFIG_H_TARGETS
) $(patsubst \
1794 %,%/stamp-hw
,$(SIM_ENABLED_ARCHES
)) \
1795 $(common_GEN_MODULES_C_TARGETS
) $(patsubst \
1796 %,%/stamp-modules
,$(SIM_ENABLED_ARCHES
)) $(am__append_7
) \
1797 site-sim-config.exp testrun.log testrun.sum
$(am__append_21
) \
1798 $(am__append_27
) $(am__append_34
) $(am__append_40
) \
1799 $(am__append_51
) $(am__append_60
) $(am__append_66
) \
1800 $(am__append_71
) $(am__append_77
) $(am__append_83
) \
1801 $(am__append_99
) $(am__append_106
) $(am__append_115
) \
1802 $(am__append_130
) $(am__append_135
)
1806 $(AM_CFLAGS_
$(subst -,_
,$(@D
))) \
1807 $(AM_CFLAGS_
$(subst -,_
,$(@D
)_
$(@F
)))
1809 AM_CPPFLAGS
= $(INCGNU
) -I
$(srcroot
) -I
$(srcroot
)/include -I..
/bfd \
1810 -I..
-I
$(@D
) -I
$(srcdir)/$(@D
) $(SIM_HW_CFLAGS
) $(SIM_INLINE
) \
1811 $(AM_CPPFLAGS_
$(subst -,_
,$(@D
))) $(AM_CPPFLAGS_
$(subst \
1812 -,_
,$(@D
)_
$(@F
))) -I
$(srcdir)/common
-DSIM_TOPDIR_BUILD
1813 AM_CPPFLAGS_FOR_BUILD
= -I
$(srcroot
)/include $(SIM_HW_CFLAGS
) \
1814 $(SIM_INLINE
) -I
$(srcdir)/common
1815 COMPILE_FOR_BUILD
= $(CC_FOR_BUILD
) $(AM_CPPFLAGS_FOR_BUILD
) $(CPPFLAGS_FOR_BUILD
) $(CFLAGS_FOR_BUILD
)
1816 LINK_FOR_BUILD
= $(CC_FOR_BUILD
) $(CFLAGS_FOR_BUILD
) $(LDFLAGS_FOR_BUILD
) -o
$@
1817 SIM_ALL_RECURSIVE_DEPS
= common
/libcommon.a \
1818 $(common_HW_CONFIG_H_TARGETS
) $(common_GEN_MODULES_C_TARGETS
) \
1819 $(am__append_4
) $(am__append_20
) $(am__append_25
) \
1820 $(am__append_33
) $(am__append_38
) $(am__append_50
) \
1821 $(am__append_59
) $(am__append_65
) $(am__append_69
) \
1822 $(am__append_76
) $(am__append_81
) $(am__append_98
) \
1823 $(am__append_105
) $(am__append_114
) $(am__append_128
) \
1825 SIM_INSTALL_DATA_LOCAL_DEPS
=
1826 SIM_INSTALL_EXEC_LOCAL_DEPS
= $(am__append_43
)
1827 SIM_UNINSTALL_LOCAL_DEPS
= $(am__append_44
)
1828 AM_CPPFLAGS_common
= -DSIM_COMMON_BUILD
1829 common_libcommon_a_SOURCES
= \
1831 common
/portability.c \
1834 common
/target-newlib-errno.c \
1835 common
/target-newlib-open.c \
1836 common
/target-newlib-signal.c \
1837 common
/target-newlib-syscall.c \
1840 SIM_COMMON_HW_OBJS
= \
1852 SIM_NEW_COMMON_OBJS
= sim-arange.o sim-bits.o sim-close.o \
1853 sim-command.o sim-config.o sim-core.o sim-cpu.o sim-endian.o \
1854 sim-engine.o sim-events.o sim-fpu.o sim-hload.o sim-hrw.o \
1855 sim-io.o sim-info.o sim-memopt.o sim-model.o sim-module.o \
1856 sim-options.o sim-profile.o sim-reason.o sim-reg.o \
1857 sim-signal.o sim-stop.o sim-syscall.o sim-trace.o sim-utils.o \
1858 sim-watch.o
$(am__append_2
)
1859 SIM_HW_DEVICES
= cfi core pal glue
1860 common_HW_CONFIG_H_TARGETS
= $(patsubst %,%/hw-config.h
,$(SIM_ENABLED_ARCHES
))
1861 am_arch_d
= $(subst -,_
,$(@D
))
1862 GEN_MODULES_C_SRCS
= \
1864 $(patsubst %,$(srcdir)/%,$($(am_arch_d
)_libsim_a_SOURCES
)) \
1865 $(patsubst %.o
,$(srcdir)/%.c
,$($(am_arch_d
)_libsim_a_OBJECTS
) $($(am_arch_d
)_libsim_a_LIBADD
)) \
1866 $(filter-out %.o
,$(patsubst $(@D
)/%.o
,$(srcdir)/common
/%.c
,$($(am_arch_d
)_libsim_a_LIBADD
))))
1868 common_GEN_MODULES_C_TARGETS
= $(patsubst %,%/modules.c
,$(filter-out ppc
,$(SIM_ENABLED_ARCHES
)))
1869 LIBIBERTY_LIB
= ..
/libiberty
/libiberty.a
1870 BFD_LIB
= ..
/bfd
/libbfd.la
1871 OPCODES_LIB
= ..
/opcodes
/libopcodes.la
1877 $(LIBGNU_EXTRA_LIBS
)
1879 GUILE
= $(or
$(wildcard ..
/guile
/libguile
/guile
),guile
)
1880 CGEN
= "$(GUILE) -l $(cgendir)/guile.scm -s"
1882 CGEN_CPU_DIR
= $(cgendir
)/cpu
1883 CPU_DIR
= $(srcroot
)/cpu
1884 CGEN_ARCHFILE
= $(CPU_DIR
)/$(@D
).cpu
1885 CGEN_READ_SCM
= $(cgendir
)/sim.scm
1886 CGEN_ARCH_SCM
= $(cgendir
)/sim-arch.scm
1887 CGEN_CPU_SCM
= $(cgendir
)/sim-cpu.scm
$(cgendir
)/sim-model.scm
1888 CGEN_DECODE_SCM
= $(cgendir
)/sim-decode.scm
1889 CGEN_DESC_SCM
= $(cgendir
)/desc.scm
$(cgendir
)/desc-cpu.scm
1890 CGEN_CPU_EXTR
= /extr
/
1891 CGEN_CPU_READ
= /read
/
1892 CGEN_CPU_WRITE
= /write
/
1893 CGEN_CPU_SEM
= /sem
/
1894 CGEN_CPU_SEMSW
= /semsw
/
1895 CGEN_WRAPPER
= $(srccom
)/cgen.sh
1897 $(SHELL
) $(CGEN_WRAPPER
) arch
$(srcdir)/$(@D
) \
1898 $(CGEN
) $(cgendir
) "$(CGENFLAGS)" \
1899 $(@D
) "$$FLAGS" ignored
"$$isa" $$mach ignored \
1900 $(CGEN_ARCHFILE
) ignored
1903 $(SHELL
) $(CGEN_WRAPPER
) cpu
$(srcdir)/$(@D
) \
1904 $(CGEN
) $(cgendir
) "$(CGENFLAGS)" \
1905 $(@D
) "$$FLAGS" $$cpu "$$isa" $$mach "$$SUFFIX" \
1906 $(CGEN_ARCHFILE
) "$$EXTRAFILES"
1909 $(SHELL
) $(CGEN_WRAPPER
) defs
$(srcdir)/$(@D
) \
1910 $(CGEN
) $(cgendir
) "$(CGENFLAGS)" \
1911 $(@D
) "$$FLAGS" $$cpu "$$isa" $$mach "$$SUFFIX" \
1912 $(CGEN_ARCHFILE
) ignored
1915 $(SHELL
) $(CGEN_WRAPPER
) decode
$(srcdir)/$(@D
) \
1916 $(CGEN
) $(cgendir
) "$(CGENFLAGS)" \
1917 $(@D
) "$$FLAGS" $$cpu "$$isa" $$mach "$$SUFFIX" \
1918 $(CGEN_ARCHFILE
) "$$EXTRAFILES"
1920 CGEN_GEN_CPU_DECODE
= \
1921 $(SHELL
) $(CGEN_WRAPPER
) cpu-decode
$(srcdir)/$(@D
) \
1922 $(CGEN
) $(cgendir
) "$(CGENFLAGS)" \
1923 $(@D
) "$$FLAGS" $$cpu "$$isa" $$mach "$$SUFFIX" \
1924 $(CGEN_ARCHFILE
) "$$EXTRAFILES"
1926 CGEN_GEN_CPU_DESC
= \
1927 $(SHELL
) $(CGEN_WRAPPER
) desc
$(srcdir)/$(@D
) \
1928 $(CGEN
) $(cgendir
) "$(CGENFLAGS)" \
1929 $(@D
) "$$FLAGS" $$cpu "$$isa" $$mach "$$SUFFIX" \
1930 $(CGEN_ARCHFILE
) ignored
$$opcfile
1933 # igen leaks memory, and therefore makes AddressSanitizer unhappy. Disable
1934 # leak detection while running it.
1935 @SIM_ENABLE_IGEN_TRUE@IGEN
= igen
/igen
$(EXEEXT
)
1936 @SIM_ENABLE_IGEN_TRUE@IGEN_RUN
= ASAN_OPTIONS
=detect_leaks
=0 $(IGEN
) $(IGEN_FLAGS_SMP
)
1937 @SIM_ENABLE_IGEN_TRUE@igen_libigen_a_SOURCES
= \
1938 @SIM_ENABLE_IGEN_TRUE@ igen
/table.c \
1939 @SIM_ENABLE_IGEN_TRUE@ igen
/lf.c \
1940 @SIM_ENABLE_IGEN_TRUE@ igen
/misc.c \
1941 @SIM_ENABLE_IGEN_TRUE@ igen
/filter_host.c \
1942 @SIM_ENABLE_IGEN_TRUE@ igen
/ld-decode.c \
1943 @SIM_ENABLE_IGEN_TRUE@ igen
/ld-cache.c \
1944 @SIM_ENABLE_IGEN_TRUE@ igen
/filter.c \
1945 @SIM_ENABLE_IGEN_TRUE@ igen
/ld-insn.c \
1946 @SIM_ENABLE_IGEN_TRUE@ igen
/gen-model.c \
1947 @SIM_ENABLE_IGEN_TRUE@ igen
/gen-itable.c \
1948 @SIM_ENABLE_IGEN_TRUE@ igen
/gen-icache.c \
1949 @SIM_ENABLE_IGEN_TRUE@ igen
/gen-semantics.c \
1950 @SIM_ENABLE_IGEN_TRUE@ igen
/gen-idecode.c \
1951 @SIM_ENABLE_IGEN_TRUE@ igen
/gen-support.c \
1952 @SIM_ENABLE_IGEN_TRUE@ igen
/gen-engine.c \
1953 @SIM_ENABLE_IGEN_TRUE@ igen
/gen.c
1955 @SIM_ENABLE_IGEN_TRUE@igen_igen_SOURCES
= igen
/igen.c
1956 @SIM_ENABLE_IGEN_TRUE@igen_igen_LDADD
= igen
/libigen.a
1957 @SIM_ENABLE_IGEN_TRUE@igen_filter_SOURCES
=
1958 @SIM_ENABLE_IGEN_TRUE@igen_filter_LDADD
= igen
/filter-main.o igen
/libigen.a
1959 @SIM_ENABLE_IGEN_TRUE@igen_gen_SOURCES
=
1960 @SIM_ENABLE_IGEN_TRUE@igen_gen_LDADD
= igen
/gen-main.o igen
/libigen.a
1961 @SIM_ENABLE_IGEN_TRUE@igen_ld_cache_SOURCES
=
1962 @SIM_ENABLE_IGEN_TRUE@igen_ld_cache_LDADD
= igen
/ld-cache-main.o igen
/libigen.a
1963 @SIM_ENABLE_IGEN_TRUE@igen_ld_decode_SOURCES
=
1964 @SIM_ENABLE_IGEN_TRUE@igen_ld_decode_LDADD
= igen
/ld-decode-main.o igen
/libigen.a
1965 @SIM_ENABLE_IGEN_TRUE@igen_ld_insn_SOURCES
=
1966 @SIM_ENABLE_IGEN_TRUE@igen_ld_insn_LDADD
= igen
/ld-insn-main.o igen
/libigen.a
1967 @SIM_ENABLE_IGEN_TRUE@igen_table_SOURCES
=
1968 @SIM_ENABLE_IGEN_TRUE@igen_table_LDADD
= igen
/table-main.o igen
/libigen.a
1969 @SIM_ENABLE_IGEN_TRUE@igen_IGEN_TOOLS
= \
1970 @SIM_ENABLE_IGEN_TRUE@
$(IGEN
) \
1971 @SIM_ENABLE_IGEN_TRUE@ igen
/filter \
1972 @SIM_ENABLE_IGEN_TRUE@ igen
/gen \
1973 @SIM_ENABLE_IGEN_TRUE@ igen
/ld-cache \
1974 @SIM_ENABLE_IGEN_TRUE@ igen
/ld-decode \
1975 @SIM_ENABLE_IGEN_TRUE@ igen
/ld-insn \
1976 @SIM_ENABLE_IGEN_TRUE@ igen
/table
1978 EXTRA_DEJAGNU_SITE_CONFIG
= site-sim-config.exp
1980 # Custom verbose test variables that automake doesn't provide (yet?).
1981 AM_V_RUNTEST
= $(AM_V_RUNTEST_@AM_V@
)
1982 AM_V_RUNTEST_
= $(AM_V_RUNTEST_@AM_DEFAULT_V@
)
1983 AM_V_RUNTEST_0
= @echo
" RUNTEST $(RUNTESTFLAGS) $*";
1986 LC_ALL
=C
; export LC_ALL
; \
1987 EXPECT
=${EXPECT} ; export EXPECT
; \
1988 runtest
=$(RUNTEST
); \
1989 $$runtest $(RUNTESTFLAGS
)
1991 testsuite_common_CPPFLAGS
= \
1992 -I
$(srcdir)/common \
1993 -I
$(srcroot
)/include \
1996 @SIM_ENABLE_ARCH_aarch64_TRUE@aarch64_libsim_a_SOURCES
=
1997 @SIM_ENABLE_ARCH_aarch64_TRUE@aarch64_libsim_a_LIBADD
= \
1998 @SIM_ENABLE_ARCH_aarch64_TRUE@
$(common_libcommon_a_OBJECTS
) \
1999 @SIM_ENABLE_ARCH_aarch64_TRUE@
$(patsubst %,aarch64
/%,$(SIM_NEW_COMMON_OBJS
)) \
2000 @SIM_ENABLE_ARCH_aarch64_TRUE@
$(patsubst %,aarch64
/dv-
%.o
,$(SIM_HW_DEVICES
)) \
2001 @SIM_ENABLE_ARCH_aarch64_TRUE@ aarch64
/cpustate.o \
2002 @SIM_ENABLE_ARCH_aarch64_TRUE@ aarch64
/interp.o \
2003 @SIM_ENABLE_ARCH_aarch64_TRUE@ aarch64
/memory.o \
2004 @SIM_ENABLE_ARCH_aarch64_TRUE@ aarch64
/modules.o \
2005 @SIM_ENABLE_ARCH_aarch64_TRUE@ aarch64
/sim-resume.o \
2006 @SIM_ENABLE_ARCH_aarch64_TRUE@ aarch64
/simulator.o
2008 @SIM_ENABLE_ARCH_aarch64_TRUE@aarch64_run_SOURCES
=
2009 @SIM_ENABLE_ARCH_aarch64_TRUE@aarch64_run_LDADD
= \
2010 @SIM_ENABLE_ARCH_aarch64_TRUE@ aarch64
/nrun.o \
2011 @SIM_ENABLE_ARCH_aarch64_TRUE@ aarch64
/libsim.a \
2012 @SIM_ENABLE_ARCH_aarch64_TRUE@
$(SIM_COMMON_LIBS
)
2014 @SIM_ENABLE_ARCH_arm_TRUE@AM_CPPFLAGS_arm
= -DMODET
2015 @SIM_ENABLE_ARCH_arm_TRUE@arm_libsim_a_SOURCES
=
2016 @SIM_ENABLE_ARCH_arm_TRUE@arm_libsim_a_LIBADD
= \
2017 @SIM_ENABLE_ARCH_arm_TRUE@
$(common_libcommon_a_OBJECTS
) \
2018 @SIM_ENABLE_ARCH_arm_TRUE@ arm
/wrapper.o \
2019 @SIM_ENABLE_ARCH_arm_TRUE@
$(patsubst %,arm
/%,$(SIM_NEW_COMMON_OBJS
)) \
2020 @SIM_ENABLE_ARCH_arm_TRUE@
$(patsubst %,arm
/dv-
%.o
,$(SIM_HW_DEVICES
)) \
2021 @SIM_ENABLE_ARCH_arm_TRUE@ arm
/armemu.o \
2022 @SIM_ENABLE_ARCH_arm_TRUE@ arm
/armemu32.o arm
/arminit.o arm
/armos.o arm
/armsupp.o \
2023 @SIM_ENABLE_ARCH_arm_TRUE@ arm
/armvirt.o arm
/thumbemu.o \
2024 @SIM_ENABLE_ARCH_arm_TRUE@ arm
/armcopro.o arm
/maverick.o arm
/iwmmxt.o \
2025 @SIM_ENABLE_ARCH_arm_TRUE@ arm
/modules.o
2027 @SIM_ENABLE_ARCH_arm_TRUE@arm_run_SOURCES
=
2028 @SIM_ENABLE_ARCH_arm_TRUE@arm_run_LDADD
= \
2029 @SIM_ENABLE_ARCH_arm_TRUE@ arm
/nrun.o \
2030 @SIM_ENABLE_ARCH_arm_TRUE@ arm
/libsim.a \
2031 @SIM_ENABLE_ARCH_arm_TRUE@
$(SIM_COMMON_LIBS
)
2033 @SIM_ENABLE_ARCH_arm_TRUE@armdocdir
= $(docdir
)/arm
2034 @SIM_ENABLE_ARCH_arm_TRUE@armdoc_DATA
= arm
/README
2035 @SIM_ENABLE_ARCH_avr_TRUE@avr_libsim_a_SOURCES
=
2036 @SIM_ENABLE_ARCH_avr_TRUE@avr_libsim_a_LIBADD
= \
2037 @SIM_ENABLE_ARCH_avr_TRUE@
$(common_libcommon_a_OBJECTS
) \
2038 @SIM_ENABLE_ARCH_avr_TRUE@ avr
/interp.o \
2039 @SIM_ENABLE_ARCH_avr_TRUE@
$(patsubst %,avr
/%,$(SIM_NEW_COMMON_OBJS
)) \
2040 @SIM_ENABLE_ARCH_avr_TRUE@
$(patsubst %,avr
/dv-
%.o
,$(SIM_HW_DEVICES
)) \
2041 @SIM_ENABLE_ARCH_avr_TRUE@ avr
/modules.o \
2042 @SIM_ENABLE_ARCH_avr_TRUE@ avr
/sim-resume.o
2044 @SIM_ENABLE_ARCH_avr_TRUE@avr_run_SOURCES
=
2045 @SIM_ENABLE_ARCH_avr_TRUE@avr_run_LDADD
= \
2046 @SIM_ENABLE_ARCH_avr_TRUE@ avr
/nrun.o \
2047 @SIM_ENABLE_ARCH_avr_TRUE@ avr
/libsim.a \
2048 @SIM_ENABLE_ARCH_avr_TRUE@
$(SIM_COMMON_LIBS
)
2050 @SIM_ENABLE_ARCH_bfin_TRUE@AM_CPPFLAGS_bfin
= $(SDL_CFLAGS
)
2051 @SIM_ENABLE_ARCH_bfin_TRUE@bfin_libsim_a_SOURCES
=
2052 @SIM_ENABLE_ARCH_bfin_TRUE@bfin_libsim_a_LIBADD
= \
2053 @SIM_ENABLE_ARCH_bfin_TRUE@
$(common_libcommon_a_OBJECTS
) \
2054 @SIM_ENABLE_ARCH_bfin_TRUE@
$(patsubst %,bfin
/%,$(SIM_NEW_COMMON_OBJS
)) \
2055 @SIM_ENABLE_ARCH_bfin_TRUE@
$(patsubst %,bfin
/dv-
%.o
,$(SIM_HW_DEVICES
)) \
2056 @SIM_ENABLE_ARCH_bfin_TRUE@
$(patsubst %,bfin
/dv-
%.o
,$(bfin_SIM_EXTRA_HW_DEVICES
)) \
2057 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin
/bfin-sim.o \
2058 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin
/devices.o \
2059 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin
/gui.o \
2060 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin
/interp.o \
2061 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin
/machs.o \
2062 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin
/modules.o \
2063 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin
/sim-resume.o
2065 @SIM_ENABLE_ARCH_bfin_TRUE@bfin_run_SOURCES
=
2066 @SIM_ENABLE_ARCH_bfin_TRUE@bfin_run_LDADD
= \
2067 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin
/nrun.o \
2068 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin
/libsim.a \
2069 @SIM_ENABLE_ARCH_bfin_TRUE@
$(SIM_COMMON_LIBS
)
2071 @SIM_ENABLE_ARCH_bfin_TRUE@bfin_SIM_EXTRA_HW_DEVICES
= \
2072 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_cec \
2073 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_ctimer \
2074 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_dma \
2075 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_dmac \
2076 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_ebiu_amc \
2077 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_ebiu_ddrc \
2078 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_ebiu_sdc \
2079 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_emac \
2080 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_eppi \
2081 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_evt \
2082 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_gpio \
2083 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_gpio2 \
2084 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_gptimer \
2085 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_jtag \
2086 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_mmu \
2087 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_nfc \
2088 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_otp \
2089 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_pfmon \
2090 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_pint \
2091 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_pll \
2092 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_ppi \
2093 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_rtc \
2094 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_sic \
2095 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_spi \
2096 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_trace \
2097 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_twi \
2098 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_uart \
2099 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_uart2 \
2100 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_wdog \
2101 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_wp \
2102 @SIM_ENABLE_ARCH_bfin_TRUE@ eth_phy
2104 @SIM_ENABLE_ARCH_bpf_TRUE@AM_CPPFLAGS_bpf
= -DWITH_TARGET_WORD_BITSIZE
=64
2105 @SIM_ENABLE_ARCH_bpf_TRUE@AM_CPPFLAGS_bpf_mloop_le.o
= -DWANT_ISA_EBPFLE
2106 @SIM_ENABLE_ARCH_bpf_TRUE@AM_CPPFLAGS_bpf_mloop_be.o
= -DWANT_ISA_EBPFBE
2107 @SIM_ENABLE_ARCH_bpf_TRUE@AM_CPPFLAGS_bpf_decode_le.o
= -DWANT_ISA_EBPFLE
2108 @SIM_ENABLE_ARCH_bpf_TRUE@AM_CPPFLAGS_bpf_decode_be.o
= -DWANT_ISA_EBPFBE
2109 @SIM_ENABLE_ARCH_bpf_TRUE@AM_CPPFLAGS_bpf_sem_le.o
= -DWANT_ISA_EBPFLE
2110 @SIM_ENABLE_ARCH_bpf_TRUE@AM_CPPFLAGS_bpf_sem_be.o
= -DWANT_ISA_EBPFBE
2111 @SIM_ENABLE_ARCH_bpf_TRUE@bpf_libsim_a_SOURCES
=
2112 @SIM_ENABLE_ARCH_bpf_TRUE@bpf_libsim_a_LIBADD
= \
2113 @SIM_ENABLE_ARCH_bpf_TRUE@
$(common_libcommon_a_OBJECTS
) \
2114 @SIM_ENABLE_ARCH_bpf_TRUE@
$(patsubst %,bpf
/%,$(SIM_NEW_COMMON_OBJS
)) \
2115 @SIM_ENABLE_ARCH_bpf_TRUE@
$(patsubst %,bpf
/dv-
%.o
,$(SIM_HW_DEVICES
)) \
2116 @SIM_ENABLE_ARCH_bpf_TRUE@ bpf
/modules.o \
2117 @SIM_ENABLE_ARCH_bpf_TRUE@ \
2118 @SIM_ENABLE_ARCH_bpf_TRUE@ bpf
/cgen-run.o \
2119 @SIM_ENABLE_ARCH_bpf_TRUE@ bpf
/cgen-scache.o \
2120 @SIM_ENABLE_ARCH_bpf_TRUE@ bpf
/cgen-trace.o \
2121 @SIM_ENABLE_ARCH_bpf_TRUE@ bpf
/cgen-utils.o \
2122 @SIM_ENABLE_ARCH_bpf_TRUE@ \
2123 @SIM_ENABLE_ARCH_bpf_TRUE@ bpf
/arch.o \
2124 @SIM_ENABLE_ARCH_bpf_TRUE@ bpf
/cpu.o \
2125 @SIM_ENABLE_ARCH_bpf_TRUE@ bpf
/decode-le.o \
2126 @SIM_ENABLE_ARCH_bpf_TRUE@ bpf
/decode-be.o \
2127 @SIM_ENABLE_ARCH_bpf_TRUE@ bpf
/sem-le.o \
2128 @SIM_ENABLE_ARCH_bpf_TRUE@ bpf
/sem-be.o \
2129 @SIM_ENABLE_ARCH_bpf_TRUE@ bpf
/mloop-le.o \
2130 @SIM_ENABLE_ARCH_bpf_TRUE@ bpf
/mloop-be.o \
2131 @SIM_ENABLE_ARCH_bpf_TRUE@ \
2132 @SIM_ENABLE_ARCH_bpf_TRUE@ bpf
/bpf.o \
2133 @SIM_ENABLE_ARCH_bpf_TRUE@ bpf
/bpf-helpers.o \
2134 @SIM_ENABLE_ARCH_bpf_TRUE@ bpf
/sim-if.o \
2135 @SIM_ENABLE_ARCH_bpf_TRUE@ bpf
/traps.o
2137 @SIM_ENABLE_ARCH_bpf_TRUE@bpf_run_SOURCES
=
2138 @SIM_ENABLE_ARCH_bpf_TRUE@bpf_run_LDADD
= \
2139 @SIM_ENABLE_ARCH_bpf_TRUE@ bpf
/nrun.o \
2140 @SIM_ENABLE_ARCH_bpf_TRUE@ bpf
/libsim.a \
2141 @SIM_ENABLE_ARCH_bpf_TRUE@
$(SIM_COMMON_LIBS
)
2143 @SIM_ENABLE_ARCH_bpf_TRUE@bpf_BUILD_OUTPUTS
= \
2144 @SIM_ENABLE_ARCH_bpf_TRUE@ bpf
/mloop-le.c \
2145 @SIM_ENABLE_ARCH_bpf_TRUE@ bpf
/stamp-mloop-le \
2146 @SIM_ENABLE_ARCH_bpf_TRUE@ bpf
/mloop-be.c \
2147 @SIM_ENABLE_ARCH_bpf_TRUE@ bpf
/stamp-mloop-be
2149 @SIM_ENABLE_ARCH_cr16_TRUE@cr16_libsim_a_SOURCES
=
2150 @SIM_ENABLE_ARCH_cr16_TRUE@cr16_libsim_a_LIBADD
= \
2151 @SIM_ENABLE_ARCH_cr16_TRUE@
$(common_libcommon_a_OBJECTS
) \
2152 @SIM_ENABLE_ARCH_cr16_TRUE@
$(patsubst %,cr16
/%,$(SIM_NEW_COMMON_OBJS
)) \
2153 @SIM_ENABLE_ARCH_cr16_TRUE@
$(patsubst %,cr16
/dv-
%.o
,$(SIM_HW_DEVICES
)) \
2154 @SIM_ENABLE_ARCH_cr16_TRUE@ cr16
/interp.o \
2155 @SIM_ENABLE_ARCH_cr16_TRUE@ cr16
/modules.o \
2156 @SIM_ENABLE_ARCH_cr16_TRUE@ cr16
/sim-resume.o \
2157 @SIM_ENABLE_ARCH_cr16_TRUE@ cr16
/simops.o \
2158 @SIM_ENABLE_ARCH_cr16_TRUE@ cr16
/table.o
2160 @SIM_ENABLE_ARCH_cr16_TRUE@cr16_run_SOURCES
=
2161 @SIM_ENABLE_ARCH_cr16_TRUE@cr16_run_LDADD
= \
2162 @SIM_ENABLE_ARCH_cr16_TRUE@ cr16
/nrun.o \
2163 @SIM_ENABLE_ARCH_cr16_TRUE@ cr16
/libsim.a \
2164 @SIM_ENABLE_ARCH_cr16_TRUE@
$(SIM_COMMON_LIBS
)
2166 @SIM_ENABLE_ARCH_cr16_TRUE@cr16_BUILD_OUTPUTS
= \
2167 @SIM_ENABLE_ARCH_cr16_TRUE@ cr16
/gencode
$(EXEEXT
) \
2168 @SIM_ENABLE_ARCH_cr16_TRUE@ cr16
/table.c
2170 @SIM_ENABLE_ARCH_cr16_TRUE@cr16_gencode_SOURCES
= cr16
/gencode.c
2171 @SIM_ENABLE_ARCH_cr16_TRUE@cr16_gencode_LDADD
= cr16
/cr16-opc.o
2172 @SIM_ENABLE_ARCH_cris_TRUE@cris_libsim_a_SOURCES
=
2173 @SIM_ENABLE_ARCH_cris_TRUE@cris_libsim_a_LIBADD
= \
2174 @SIM_ENABLE_ARCH_cris_TRUE@
$(common_libcommon_a_OBJECTS
) \
2175 @SIM_ENABLE_ARCH_cris_TRUE@
$(patsubst %,cris
/%,$(SIM_NEW_COMMON_OBJS
)) \
2176 @SIM_ENABLE_ARCH_cris_TRUE@
$(patsubst %,cris
/dv-
%.o
,$(SIM_HW_DEVICES
)) \
2177 @SIM_ENABLE_ARCH_cris_TRUE@
$(patsubst %,cris
/dv-
%.o
,$(cris_SIM_EXTRA_HW_DEVICES
)) \
2178 @SIM_ENABLE_ARCH_cris_TRUE@ cris
/modules.o \
2179 @SIM_ENABLE_ARCH_cris_TRUE@ \
2180 @SIM_ENABLE_ARCH_cris_TRUE@ cris
/cgen-run.o \
2181 @SIM_ENABLE_ARCH_cris_TRUE@ cris
/cgen-scache.o \
2182 @SIM_ENABLE_ARCH_cris_TRUE@ cris
/cgen-trace.o \
2183 @SIM_ENABLE_ARCH_cris_TRUE@ cris
/cgen-utils.o \
2184 @SIM_ENABLE_ARCH_cris_TRUE@ \
2185 @SIM_ENABLE_ARCH_cris_TRUE@ cris
/arch.o \
2186 @SIM_ENABLE_ARCH_cris_TRUE@ cris
/crisv10f.o \
2187 @SIM_ENABLE_ARCH_cris_TRUE@ cris
/cpuv10.o \
2188 @SIM_ENABLE_ARCH_cris_TRUE@ cris
/decodev10.o \
2189 @SIM_ENABLE_ARCH_cris_TRUE@ cris
/modelv10.o \
2190 @SIM_ENABLE_ARCH_cris_TRUE@ cris
/mloopv10f.o \
2191 @SIM_ENABLE_ARCH_cris_TRUE@ cris
/crisv32f.o \
2192 @SIM_ENABLE_ARCH_cris_TRUE@ cris
/cpuv32.o \
2193 @SIM_ENABLE_ARCH_cris_TRUE@ cris
/decodev32.o \
2194 @SIM_ENABLE_ARCH_cris_TRUE@ cris
/modelv32.o \
2195 @SIM_ENABLE_ARCH_cris_TRUE@ cris
/mloopv32f.o \
2196 @SIM_ENABLE_ARCH_cris_TRUE@ \
2197 @SIM_ENABLE_ARCH_cris_TRUE@ cris
/sim-if.o \
2198 @SIM_ENABLE_ARCH_cris_TRUE@ cris
/traps.o
2200 @SIM_ENABLE_ARCH_cris_TRUE@cris_run_SOURCES
=
2201 @SIM_ENABLE_ARCH_cris_TRUE@cris_run_LDADD
= \
2202 @SIM_ENABLE_ARCH_cris_TRUE@ cris
/nrun.o \
2203 @SIM_ENABLE_ARCH_cris_TRUE@ cris
/libsim.a \
2204 @SIM_ENABLE_ARCH_cris_TRUE@
$(SIM_COMMON_LIBS
)
2206 @SIM_ENABLE_ARCH_cris_TRUE@cris_SIM_EXTRA_HW_DEVICES
= rv cris cris_900000xx
2207 @SIM_ENABLE_ARCH_cris_TRUE@cris_rvdummy_SOURCES
= cris
/rvdummy.c
2208 @SIM_ENABLE_ARCH_cris_TRUE@cris_rvdummy_LDADD
= $(LIBIBERTY_LIB
)
2209 @SIM_ENABLE_ARCH_cris_TRUE@cris_BUILD_OUTPUTS
= \
2210 @SIM_ENABLE_ARCH_cris_TRUE@ cris
/mloopv10f.c \
2211 @SIM_ENABLE_ARCH_cris_TRUE@ cris
/stamp-mloop-v10f \
2212 @SIM_ENABLE_ARCH_cris_TRUE@ cris
/mloopv32f.c \
2213 @SIM_ENABLE_ARCH_cris_TRUE@ cris
/stamp-mloop-v32f
2215 @SIM_ENABLE_ARCH_d10v_TRUE@d10v_libsim_a_SOURCES
=
2216 @SIM_ENABLE_ARCH_d10v_TRUE@d10v_libsim_a_LIBADD
= \
2217 @SIM_ENABLE_ARCH_d10v_TRUE@
$(common_libcommon_a_OBJECTS
) \
2218 @SIM_ENABLE_ARCH_d10v_TRUE@ d10v
/interp.o \
2219 @SIM_ENABLE_ARCH_d10v_TRUE@
$(patsubst %,d10v
/%,$(SIM_NEW_COMMON_OBJS
)) \
2220 @SIM_ENABLE_ARCH_d10v_TRUE@
$(patsubst %,d10v
/dv-
%.o
,$(SIM_HW_DEVICES
)) \
2221 @SIM_ENABLE_ARCH_d10v_TRUE@ d10v
/endian.o \
2222 @SIM_ENABLE_ARCH_d10v_TRUE@ d10v
/modules.o \
2223 @SIM_ENABLE_ARCH_d10v_TRUE@ d10v
/sim-resume.o \
2224 @SIM_ENABLE_ARCH_d10v_TRUE@ d10v
/simops.o \
2225 @SIM_ENABLE_ARCH_d10v_TRUE@ d10v
/table.o
2227 @SIM_ENABLE_ARCH_d10v_TRUE@d10v_run_SOURCES
=
2228 @SIM_ENABLE_ARCH_d10v_TRUE@d10v_run_LDADD
= \
2229 @SIM_ENABLE_ARCH_d10v_TRUE@ d10v
/nrun.o \
2230 @SIM_ENABLE_ARCH_d10v_TRUE@ d10v
/libsim.a \
2231 @SIM_ENABLE_ARCH_d10v_TRUE@
$(SIM_COMMON_LIBS
)
2233 @SIM_ENABLE_ARCH_d10v_TRUE@d10v_BUILD_OUTPUTS
= \
2234 @SIM_ENABLE_ARCH_d10v_TRUE@ d10v
/gencode
$(EXEEXT
) \
2235 @SIM_ENABLE_ARCH_d10v_TRUE@ d10v
/table.c
2237 @SIM_ENABLE_ARCH_d10v_TRUE@d10v_gencode_SOURCES
= d10v
/gencode.c
2238 @SIM_ENABLE_ARCH_d10v_TRUE@d10v_gencode_LDADD
= d10v
/d10v-opc.o
2239 @SIM_ENABLE_ARCH_erc32_TRUE@READLINE_SRC
= $(srcroot
)/readline
/readline
2240 @SIM_ENABLE_ARCH_erc32_TRUE@AM_CPPFLAGS_erc32
= $(READLINE_CFLAGS
) \
2241 @SIM_ENABLE_ARCH_erc32_TRUE@
-DFAST_UART
2242 @SIM_ENABLE_ARCH_erc32_TRUE@erc32_libsim_a_SOURCES
=
2243 @SIM_ENABLE_ARCH_erc32_TRUE@erc32_libsim_a_LIBADD
= \
2244 @SIM_ENABLE_ARCH_erc32_TRUE@
$(common_libcommon_a_OBJECTS
) \
2245 @SIM_ENABLE_ARCH_erc32_TRUE@ erc32
/erc32.o \
2246 @SIM_ENABLE_ARCH_erc32_TRUE@ erc32
/exec.o \
2247 @SIM_ENABLE_ARCH_erc32_TRUE@ erc32
/float.o \
2248 @SIM_ENABLE_ARCH_erc32_TRUE@ erc32
/func.o \
2249 @SIM_ENABLE_ARCH_erc32_TRUE@ erc32
/help.o \
2250 @SIM_ENABLE_ARCH_erc32_TRUE@ erc32
/interf.o \
2251 @SIM_ENABLE_ARCH_erc32_TRUE@ erc32
/modules.o
2253 @SIM_ENABLE_ARCH_erc32_TRUE@erc32_run_SOURCES
=
2254 @SIM_ENABLE_ARCH_erc32_TRUE@erc32_run_LDADD
= \
2255 @SIM_ENABLE_ARCH_erc32_TRUE@ erc32
/sis.o \
2256 @SIM_ENABLE_ARCH_erc32_TRUE@ erc32
/libsim.a \
2257 @SIM_ENABLE_ARCH_erc32_TRUE@
$(SIM_COMMON_LIBS
) $(READLINE_LIB
) $(TERMCAP_LIB
)
2259 @SIM_ENABLE_ARCH_erc32_TRUE@erc32docdir
= $(docdir
)/erc32
2260 @SIM_ENABLE_ARCH_erc32_TRUE@erc32doc_DATA
= erc32
/README.erc32 erc32
/README.gdb erc32
/README.sis
2261 @SIM_ENABLE_ARCH_examples_TRUE@example_synacor_libsim_a_SOURCES
=
2262 @SIM_ENABLE_ARCH_examples_TRUE@example_synacor_libsim_a_LIBADD
= \
2263 @SIM_ENABLE_ARCH_examples_TRUE@
$(common_libcommon_a_OBJECTS
) \
2264 @SIM_ENABLE_ARCH_examples_TRUE@
$(patsubst %,example-synacor
/%,$(SIM_NEW_COMMON_OBJS
)) \
2265 @SIM_ENABLE_ARCH_examples_TRUE@
$(patsubst %,example-synacor
/dv-
%.o
,$(SIM_HW_DEVICES
)) \
2266 @SIM_ENABLE_ARCH_examples_TRUE@ example-synacor
/interp.o \
2267 @SIM_ENABLE_ARCH_examples_TRUE@ example-synacor
/modules.o \
2268 @SIM_ENABLE_ARCH_examples_TRUE@ example-synacor
/sim-main.o \
2269 @SIM_ENABLE_ARCH_examples_TRUE@ example-synacor
/sim-resume.o
2271 @SIM_ENABLE_ARCH_examples_TRUE@example_synacor_run_SOURCES
=
2272 @SIM_ENABLE_ARCH_examples_TRUE@example_synacor_run_LDADD
= \
2273 @SIM_ENABLE_ARCH_examples_TRUE@ example-synacor
/nrun.o \
2274 @SIM_ENABLE_ARCH_examples_TRUE@ example-synacor
/libsim.a \
2275 @SIM_ENABLE_ARCH_examples_TRUE@
$(SIM_COMMON_LIBS
)
2277 @SIM_ENABLE_ARCH_frv_TRUE@AM_CPPFLAGS_frv
= $(SIM_FRV_TRAPDUMP_FLAGS
)
2278 @SIM_ENABLE_ARCH_frv_TRUE@AM_CFLAGS_frv_memory.o
= -Wno-error
2279 @SIM_ENABLE_ARCH_frv_TRUE@AM_CFLAGS_frv_sem.o
= -Wno-error
2280 @SIM_ENABLE_ARCH_frv_TRUE@frv_libsim_a_SOURCES
=
2281 @SIM_ENABLE_ARCH_frv_TRUE@frv_libsim_a_LIBADD
= \
2282 @SIM_ENABLE_ARCH_frv_TRUE@
$(common_libcommon_a_OBJECTS
) \
2283 @SIM_ENABLE_ARCH_frv_TRUE@
$(patsubst %,frv
/%,$(SIM_NEW_COMMON_OBJS
)) \
2284 @SIM_ENABLE_ARCH_frv_TRUE@
$(patsubst %,frv
/dv-
%.o
,$(SIM_HW_DEVICES
)) \
2285 @SIM_ENABLE_ARCH_frv_TRUE@ frv
/modules.o \
2286 @SIM_ENABLE_ARCH_frv_TRUE@ \
2287 @SIM_ENABLE_ARCH_frv_TRUE@ frv
/cgen-accfp.o \
2288 @SIM_ENABLE_ARCH_frv_TRUE@ frv
/cgen-fpu.o \
2289 @SIM_ENABLE_ARCH_frv_TRUE@ frv
/cgen-run.o \
2290 @SIM_ENABLE_ARCH_frv_TRUE@ frv
/cgen-scache.o \
2291 @SIM_ENABLE_ARCH_frv_TRUE@ frv
/cgen-trace.o \
2292 @SIM_ENABLE_ARCH_frv_TRUE@ frv
/cgen-utils.o \
2293 @SIM_ENABLE_ARCH_frv_TRUE@ \
2294 @SIM_ENABLE_ARCH_frv_TRUE@ frv
/arch.o \
2295 @SIM_ENABLE_ARCH_frv_TRUE@ frv
/cgen-par.o \
2296 @SIM_ENABLE_ARCH_frv_TRUE@ frv
/cpu.o \
2297 @SIM_ENABLE_ARCH_frv_TRUE@ frv
/decode.o \
2298 @SIM_ENABLE_ARCH_frv_TRUE@ frv
/frv.o \
2299 @SIM_ENABLE_ARCH_frv_TRUE@ frv
/mloop.o \
2300 @SIM_ENABLE_ARCH_frv_TRUE@ frv
/model.o \
2301 @SIM_ENABLE_ARCH_frv_TRUE@ frv
/sem.o \
2302 @SIM_ENABLE_ARCH_frv_TRUE@ \
2303 @SIM_ENABLE_ARCH_frv_TRUE@ frv
/cache.o \
2304 @SIM_ENABLE_ARCH_frv_TRUE@ frv
/interrupts.o \
2305 @SIM_ENABLE_ARCH_frv_TRUE@ frv
/memory.o \
2306 @SIM_ENABLE_ARCH_frv_TRUE@ frv
/options.o \
2307 @SIM_ENABLE_ARCH_frv_TRUE@ frv
/pipeline.o \
2308 @SIM_ENABLE_ARCH_frv_TRUE@ frv
/profile.o \
2309 @SIM_ENABLE_ARCH_frv_TRUE@ frv
/profile-fr400.o \
2310 @SIM_ENABLE_ARCH_frv_TRUE@ frv
/profile-fr450.o \
2311 @SIM_ENABLE_ARCH_frv_TRUE@ frv
/profile-fr500.o \
2312 @SIM_ENABLE_ARCH_frv_TRUE@ frv
/profile-fr550.o \
2313 @SIM_ENABLE_ARCH_frv_TRUE@ frv
/registers.o \
2314 @SIM_ENABLE_ARCH_frv_TRUE@ frv
/reset.o \
2315 @SIM_ENABLE_ARCH_frv_TRUE@ frv
/sim-if.o \
2316 @SIM_ENABLE_ARCH_frv_TRUE@ frv
/traps.o
2318 @SIM_ENABLE_ARCH_frv_TRUE@frv_run_SOURCES
=
2319 @SIM_ENABLE_ARCH_frv_TRUE@frv_run_LDADD
= \
2320 @SIM_ENABLE_ARCH_frv_TRUE@ frv
/nrun.o \
2321 @SIM_ENABLE_ARCH_frv_TRUE@ frv
/libsim.a \
2322 @SIM_ENABLE_ARCH_frv_TRUE@
$(SIM_COMMON_LIBS
)
2324 @SIM_ENABLE_ARCH_frv_TRUE@frvdocdir
= $(docdir
)/frv
2325 @SIM_ENABLE_ARCH_frv_TRUE@frvdoc_DATA
= frv
/README
2326 @SIM_ENABLE_ARCH_frv_TRUE@frv_BUILD_OUTPUTS
= \
2327 @SIM_ENABLE_ARCH_frv_TRUE@ frv
/mloop.c \
2328 @SIM_ENABLE_ARCH_frv_TRUE@ frv
/stamp-mloop
2330 @SIM_ENABLE_ARCH_ft32_TRUE@ft32_libsim_a_SOURCES
=
2331 @SIM_ENABLE_ARCH_ft32_TRUE@ft32_libsim_a_LIBADD
= \
2332 @SIM_ENABLE_ARCH_ft32_TRUE@
$(common_libcommon_a_OBJECTS
) \
2333 @SIM_ENABLE_ARCH_ft32_TRUE@
$(patsubst %,ft32
/%,$(SIM_NEW_COMMON_OBJS
)) \
2334 @SIM_ENABLE_ARCH_ft32_TRUE@
$(patsubst %,ft32
/dv-
%.o
,$(SIM_HW_DEVICES
)) \
2335 @SIM_ENABLE_ARCH_ft32_TRUE@ ft32
/interp.o \
2336 @SIM_ENABLE_ARCH_ft32_TRUE@ ft32
/modules.o \
2337 @SIM_ENABLE_ARCH_ft32_TRUE@ ft32
/sim-resume.o
2339 @SIM_ENABLE_ARCH_ft32_TRUE@ft32_run_SOURCES
=
2340 @SIM_ENABLE_ARCH_ft32_TRUE@ft32_run_LDADD
= \
2341 @SIM_ENABLE_ARCH_ft32_TRUE@ ft32
/nrun.o \
2342 @SIM_ENABLE_ARCH_ft32_TRUE@ ft32
/libsim.a \
2343 @SIM_ENABLE_ARCH_ft32_TRUE@
$(SIM_COMMON_LIBS
)
2345 @SIM_ENABLE_ARCH_h8300_TRUE@h8300_libsim_a_SOURCES
=
2346 @SIM_ENABLE_ARCH_h8300_TRUE@h8300_libsim_a_LIBADD
= \
2347 @SIM_ENABLE_ARCH_h8300_TRUE@
$(common_libcommon_a_OBJECTS
) \
2348 @SIM_ENABLE_ARCH_h8300_TRUE@ h8300
/compile.o \
2349 @SIM_ENABLE_ARCH_h8300_TRUE@
$(patsubst %,h8300
/%,$(SIM_NEW_COMMON_OBJS
)) \
2350 @SIM_ENABLE_ARCH_h8300_TRUE@
$(patsubst %,h8300
/dv-
%.o
,$(SIM_HW_DEVICES
)) \
2351 @SIM_ENABLE_ARCH_h8300_TRUE@ h8300
/modules.o \
2352 @SIM_ENABLE_ARCH_h8300_TRUE@ h8300
/sim-resume.o
2354 @SIM_ENABLE_ARCH_h8300_TRUE@h8300_run_SOURCES
=
2355 @SIM_ENABLE_ARCH_h8300_TRUE@h8300_run_LDADD
= \
2356 @SIM_ENABLE_ARCH_h8300_TRUE@ h8300
/nrun.o \
2357 @SIM_ENABLE_ARCH_h8300_TRUE@ h8300
/libsim.a \
2358 @SIM_ENABLE_ARCH_h8300_TRUE@
$(SIM_COMMON_LIBS
)
2360 @SIM_ENABLE_ARCH_iq2000_TRUE@iq2000_libsim_a_SOURCES
=
2361 @SIM_ENABLE_ARCH_iq2000_TRUE@iq2000_libsim_a_LIBADD
= \
2362 @SIM_ENABLE_ARCH_iq2000_TRUE@
$(common_libcommon_a_OBJECTS
) \
2363 @SIM_ENABLE_ARCH_iq2000_TRUE@
$(patsubst %,iq2000
/%,$(SIM_NEW_COMMON_OBJS
)) \
2364 @SIM_ENABLE_ARCH_iq2000_TRUE@
$(patsubst %,iq2000
/dv-
%.o
,$(SIM_HW_DEVICES
)) \
2365 @SIM_ENABLE_ARCH_iq2000_TRUE@ iq2000
/modules.o \
2366 @SIM_ENABLE_ARCH_iq2000_TRUE@ \
2367 @SIM_ENABLE_ARCH_iq2000_TRUE@ iq2000
/cgen-run.o \
2368 @SIM_ENABLE_ARCH_iq2000_TRUE@ iq2000
/cgen-scache.o \
2369 @SIM_ENABLE_ARCH_iq2000_TRUE@ iq2000
/cgen-trace.o \
2370 @SIM_ENABLE_ARCH_iq2000_TRUE@ iq2000
/cgen-utils.o \
2371 @SIM_ENABLE_ARCH_iq2000_TRUE@ \
2372 @SIM_ENABLE_ARCH_iq2000_TRUE@ iq2000
/arch.o \
2373 @SIM_ENABLE_ARCH_iq2000_TRUE@ iq2000
/cpu.o \
2374 @SIM_ENABLE_ARCH_iq2000_TRUE@ iq2000
/decode.o \
2375 @SIM_ENABLE_ARCH_iq2000_TRUE@ iq2000
/iq2000.o \
2376 @SIM_ENABLE_ARCH_iq2000_TRUE@ iq2000
/sem.o \
2377 @SIM_ENABLE_ARCH_iq2000_TRUE@ iq2000
/mloop.o \
2378 @SIM_ENABLE_ARCH_iq2000_TRUE@ iq2000
/model.o \
2379 @SIM_ENABLE_ARCH_iq2000_TRUE@ \
2380 @SIM_ENABLE_ARCH_iq2000_TRUE@ iq2000
/sim-if.o
2382 @SIM_ENABLE_ARCH_iq2000_TRUE@iq2000_run_SOURCES
=
2383 @SIM_ENABLE_ARCH_iq2000_TRUE@iq2000_run_LDADD
= \
2384 @SIM_ENABLE_ARCH_iq2000_TRUE@ iq2000
/nrun.o \
2385 @SIM_ENABLE_ARCH_iq2000_TRUE@ iq2000
/libsim.a \
2386 @SIM_ENABLE_ARCH_iq2000_TRUE@
$(SIM_COMMON_LIBS
)
2388 @SIM_ENABLE_ARCH_iq2000_TRUE@iq2000_BUILD_OUTPUTS
= \
2389 @SIM_ENABLE_ARCH_iq2000_TRUE@ iq2000
/mloop.c \
2390 @SIM_ENABLE_ARCH_iq2000_TRUE@ iq2000
/stamp-mloop
2392 @SIM_ENABLE_ARCH_lm32_TRUE@lm32_libsim_a_SOURCES
=
2393 @SIM_ENABLE_ARCH_lm32_TRUE@lm32_libsim_a_LIBADD
= \
2394 @SIM_ENABLE_ARCH_lm32_TRUE@
$(common_libcommon_a_OBJECTS
) \
2395 @SIM_ENABLE_ARCH_lm32_TRUE@
$(patsubst %,lm32
/%,$(SIM_NEW_COMMON_OBJS
)) \
2396 @SIM_ENABLE_ARCH_lm32_TRUE@
$(patsubst %,lm32
/dv-
%.o
,$(SIM_HW_DEVICES
)) \
2397 @SIM_ENABLE_ARCH_lm32_TRUE@
$(patsubst %,lm32
/dv-
%.o
,$(lm32_SIM_EXTRA_HW_DEVICES
)) \
2398 @SIM_ENABLE_ARCH_lm32_TRUE@ lm32
/modules.o \
2399 @SIM_ENABLE_ARCH_lm32_TRUE@ \
2400 @SIM_ENABLE_ARCH_lm32_TRUE@ lm32
/cgen-run.o \
2401 @SIM_ENABLE_ARCH_lm32_TRUE@ lm32
/cgen-scache.o \
2402 @SIM_ENABLE_ARCH_lm32_TRUE@ lm32
/cgen-trace.o \
2403 @SIM_ENABLE_ARCH_lm32_TRUE@ lm32
/cgen-utils.o \
2404 @SIM_ENABLE_ARCH_lm32_TRUE@ \
2405 @SIM_ENABLE_ARCH_lm32_TRUE@ lm32
/arch.o \
2406 @SIM_ENABLE_ARCH_lm32_TRUE@ lm32
/cpu.o \
2407 @SIM_ENABLE_ARCH_lm32_TRUE@ lm32
/decode.o \
2408 @SIM_ENABLE_ARCH_lm32_TRUE@ lm32
/sem.o \
2409 @SIM_ENABLE_ARCH_lm32_TRUE@ lm32
/mloop.o \
2410 @SIM_ENABLE_ARCH_lm32_TRUE@ lm32
/model.o \
2411 @SIM_ENABLE_ARCH_lm32_TRUE@ \
2412 @SIM_ENABLE_ARCH_lm32_TRUE@ lm32
/lm32.o \
2413 @SIM_ENABLE_ARCH_lm32_TRUE@ lm32
/sim-if.o \
2414 @SIM_ENABLE_ARCH_lm32_TRUE@ lm32
/traps.o \
2415 @SIM_ENABLE_ARCH_lm32_TRUE@ lm32
/user.o
2417 @SIM_ENABLE_ARCH_lm32_TRUE@lm32_run_SOURCES
=
2418 @SIM_ENABLE_ARCH_lm32_TRUE@lm32_run_LDADD
= \
2419 @SIM_ENABLE_ARCH_lm32_TRUE@ lm32
/nrun.o \
2420 @SIM_ENABLE_ARCH_lm32_TRUE@ lm32
/libsim.a \
2421 @SIM_ENABLE_ARCH_lm32_TRUE@
$(SIM_COMMON_LIBS
)
2423 @SIM_ENABLE_ARCH_lm32_TRUE@lm32_SIM_EXTRA_HW_DEVICES
= lm32cpu lm32timer lm32uart
2424 @SIM_ENABLE_ARCH_lm32_TRUE@lm32_BUILD_OUTPUTS
= \
2425 @SIM_ENABLE_ARCH_lm32_TRUE@ lm32
/mloop.c \
2426 @SIM_ENABLE_ARCH_lm32_TRUE@ lm32
/stamp-mloop
2428 @SIM_ENABLE_ARCH_m32c_TRUE@m32c_libsim_a_SOURCES
=
2429 @SIM_ENABLE_ARCH_m32c_TRUE@m32c_libsim_a_LIBADD
= \
2430 @SIM_ENABLE_ARCH_m32c_TRUE@
$(common_libcommon_a_OBJECTS
) \
2431 @SIM_ENABLE_ARCH_m32c_TRUE@ m32c
/gdb-if.o \
2432 @SIM_ENABLE_ARCH_m32c_TRUE@ m32c
/int.o \
2433 @SIM_ENABLE_ARCH_m32c_TRUE@ m32c
/load.o \
2434 @SIM_ENABLE_ARCH_m32c_TRUE@ m32c
/m32c.o \
2435 @SIM_ENABLE_ARCH_m32c_TRUE@ m32c
/mem.o \
2436 @SIM_ENABLE_ARCH_m32c_TRUE@ m32c
/misc.o \
2437 @SIM_ENABLE_ARCH_m32c_TRUE@ m32c
/modules.o \
2438 @SIM_ENABLE_ARCH_m32c_TRUE@ m32c
/r8c.o \
2439 @SIM_ENABLE_ARCH_m32c_TRUE@ m32c
/reg.o \
2440 @SIM_ENABLE_ARCH_m32c_TRUE@ m32c
/srcdest.o \
2441 @SIM_ENABLE_ARCH_m32c_TRUE@ m32c
/syscalls.o \
2442 @SIM_ENABLE_ARCH_m32c_TRUE@ m32c
/trace.o
2444 @SIM_ENABLE_ARCH_m32c_TRUE@m32c_run_SOURCES
=
2445 @SIM_ENABLE_ARCH_m32c_TRUE@m32c_run_LDADD
= \
2446 @SIM_ENABLE_ARCH_m32c_TRUE@ m32c
/main.o \
2447 @SIM_ENABLE_ARCH_m32c_TRUE@ m32c
/libsim.a \
2448 @SIM_ENABLE_ARCH_m32c_TRUE@
$(SIM_COMMON_LIBS
)
2450 @SIM_ENABLE_ARCH_m32c_TRUE@m32c_BUILD_OUTPUTS
= \
2451 @SIM_ENABLE_ARCH_m32c_TRUE@ m32c
/opc2c
$(EXEEXT
) \
2452 @SIM_ENABLE_ARCH_m32c_TRUE@ m32c
/m32c.c \
2453 @SIM_ENABLE_ARCH_m32c_TRUE@ m32c
/r8c.c
2455 @SIM_ENABLE_ARCH_m32c_TRUE@m32c_opc2c_SOURCES
= m32c
/opc2c.c
2457 # opc2c leaks memory, and therefore makes AddressSanitizer unhappy. Disable
2458 # leak detection while running it.
2459 @SIM_ENABLE_ARCH_m32c_TRUE@m32c_OPC2C_RUN
= ASAN_OPTIONS
=detect_leaks
=0 m32c
/opc2c
$(EXEEXT
)
2460 @SIM_ENABLE_ARCH_m32r_TRUE@m32r_libsim_a_SOURCES
=
2461 @SIM_ENABLE_ARCH_m32r_TRUE@m32r_libsim_a_LIBADD
= \
2462 @SIM_ENABLE_ARCH_m32r_TRUE@
$(common_libcommon_a_OBJECTS
) \
2463 @SIM_ENABLE_ARCH_m32r_TRUE@
$(patsubst %,m32r
/%,$(SIM_NEW_COMMON_OBJS
)) \
2464 @SIM_ENABLE_ARCH_m32r_TRUE@
$(patsubst %,m32r
/dv-
%.o
,$(SIM_HW_DEVICES
)) \
2465 @SIM_ENABLE_ARCH_m32r_TRUE@
$(patsubst %,m32r
/dv-
%.o
,$(m32r_SIM_EXTRA_HW_DEVICES
)) \
2466 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r
/modules.o \
2467 @SIM_ENABLE_ARCH_m32r_TRUE@ \
2468 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r
/cgen-run.o \
2469 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r
/cgen-scache.o \
2470 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r
/cgen-trace.o \
2471 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r
/cgen-utils.o \
2472 @SIM_ENABLE_ARCH_m32r_TRUE@ \
2473 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r
/arch.o \
2474 @SIM_ENABLE_ARCH_m32r_TRUE@ \
2475 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r
/m32r.o \
2476 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r
/cpu.o \
2477 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r
/decode.o \
2478 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r
/sem.o \
2479 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r
/model.o \
2480 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r
/mloop.o \
2481 @SIM_ENABLE_ARCH_m32r_TRUE@ \
2482 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r
/m32rx.o \
2483 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r
/cpux.o \
2484 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r
/decodex.o \
2485 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r
/modelx.o \
2486 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r
/mloopx.o \
2487 @SIM_ENABLE_ARCH_m32r_TRUE@ \
2488 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r
/m32r2.o \
2489 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r
/cpu2.o \
2490 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r
/decode2.o \
2491 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r
/model2.o \
2492 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r
/mloop2.o \
2493 @SIM_ENABLE_ARCH_m32r_TRUE@ \
2494 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r
/sim-if.o \
2495 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r
/traps.o
2497 @SIM_ENABLE_ARCH_m32r_TRUE@m32r_run_SOURCES
=
2498 @SIM_ENABLE_ARCH_m32r_TRUE@m32r_run_LDADD
= \
2499 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r
/nrun.o \
2500 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r
/libsim.a \
2501 @SIM_ENABLE_ARCH_m32r_TRUE@
$(SIM_COMMON_LIBS
)
2503 @SIM_ENABLE_ARCH_m32r_TRUE@m32r_SIM_EXTRA_HW_DEVICES
= m32r_cache m32r_uart
2504 @SIM_ENABLE_ARCH_m32r_TRUE@m32r_BUILD_OUTPUTS
= \
2505 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r
/mloop.c \
2506 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r
/stamp-mloop \
2507 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r
/mloopx.c \
2508 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r
/stamp-mloop-x \
2509 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r
/mloop2.c \
2510 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r
/stamp-mloop-2
2512 @SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11_libsim_a_SOURCES
=
2513 @SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11_libsim_a_LIBADD
= \
2514 @SIM_ENABLE_ARCH_m68hc11_TRUE@
$(common_libcommon_a_OBJECTS
) \
2515 @SIM_ENABLE_ARCH_m68hc11_TRUE@ m68hc11
/interp.o \
2516 @SIM_ENABLE_ARCH_m68hc11_TRUE@ m68hc11
/m68hc11int.o \
2517 @SIM_ENABLE_ARCH_m68hc11_TRUE@ m68hc11
/m68hc12int.o \
2518 @SIM_ENABLE_ARCH_m68hc11_TRUE@ m68hc11
/emulos.o \
2519 @SIM_ENABLE_ARCH_m68hc11_TRUE@ m68hc11
/interrupts.o \
2520 @SIM_ENABLE_ARCH_m68hc11_TRUE@ m68hc11
/m68hc11_sim.o \
2521 @SIM_ENABLE_ARCH_m68hc11_TRUE@
$(patsubst %,m68hc11
/%,$(SIM_NEW_COMMON_OBJS
)) \
2522 @SIM_ENABLE_ARCH_m68hc11_TRUE@
$(patsubst %,m68hc11
/dv-
%.o
,$(SIM_HW_DEVICES
)) \
2523 @SIM_ENABLE_ARCH_m68hc11_TRUE@
$(patsubst %,m68hc11
/dv-
%.o
,$(m68hc11_SIM_EXTRA_HW_DEVICES
)) \
2524 @SIM_ENABLE_ARCH_m68hc11_TRUE@ m68hc11
/modules.o \
2525 @SIM_ENABLE_ARCH_m68hc11_TRUE@ m68hc11
/sim-resume.o
2527 @SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11_run_SOURCES
=
2528 @SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11_run_LDADD
= \
2529 @SIM_ENABLE_ARCH_m68hc11_TRUE@ m68hc11
/nrun.o \
2530 @SIM_ENABLE_ARCH_m68hc11_TRUE@ m68hc11
/libsim.a \
2531 @SIM_ENABLE_ARCH_m68hc11_TRUE@
$(SIM_COMMON_LIBS
)
2533 @SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11_SIM_EXTRA_HW_DEVICES
= m68hc11 m68hc11sio m68hc11eepr m68hc11tim m68hc11spi nvram
2534 @SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11_BUILD_OUTPUTS
= \
2535 @SIM_ENABLE_ARCH_m68hc11_TRUE@ m68hc11
/gencode
$(EXEEXT
) \
2536 @SIM_ENABLE_ARCH_m68hc11_TRUE@ m68hc11
/m68hc11int.c \
2537 @SIM_ENABLE_ARCH_m68hc11_TRUE@ m68hc11
/m68hc12int.c
2539 @SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11_gencode_SOURCES
= m68hc11
/gencode.c
2540 @SIM_ENABLE_ARCH_mcore_TRUE@mcore_libsim_a_SOURCES
=
2541 @SIM_ENABLE_ARCH_mcore_TRUE@mcore_libsim_a_LIBADD
= \
2542 @SIM_ENABLE_ARCH_mcore_TRUE@
$(common_libcommon_a_OBJECTS
) \
2543 @SIM_ENABLE_ARCH_mcore_TRUE@ mcore
/interp.o \
2544 @SIM_ENABLE_ARCH_mcore_TRUE@
$(patsubst %,mcore
/%,$(SIM_NEW_COMMON_OBJS
)) \
2545 @SIM_ENABLE_ARCH_mcore_TRUE@
$(patsubst %,mcore
/dv-
%.o
,$(SIM_HW_DEVICES
)) \
2546 @SIM_ENABLE_ARCH_mcore_TRUE@ mcore
/modules.o \
2547 @SIM_ENABLE_ARCH_mcore_TRUE@ mcore
/sim-resume.o
2549 @SIM_ENABLE_ARCH_mcore_TRUE@mcore_run_SOURCES
=
2550 @SIM_ENABLE_ARCH_mcore_TRUE@mcore_run_LDADD
= \
2551 @SIM_ENABLE_ARCH_mcore_TRUE@ mcore
/nrun.o \
2552 @SIM_ENABLE_ARCH_mcore_TRUE@ mcore
/libsim.a \
2553 @SIM_ENABLE_ARCH_mcore_TRUE@
$(SIM_COMMON_LIBS
)
2555 @SIM_ENABLE_ARCH_microblaze_TRUE@microblaze_libsim_a_SOURCES
=
2556 @SIM_ENABLE_ARCH_microblaze_TRUE@microblaze_libsim_a_LIBADD
= \
2557 @SIM_ENABLE_ARCH_microblaze_TRUE@
$(common_libcommon_a_OBJECTS
) \
2558 @SIM_ENABLE_ARCH_microblaze_TRUE@ microblaze
/interp.o \
2559 @SIM_ENABLE_ARCH_microblaze_TRUE@
$(patsubst %,microblaze
/%,$(SIM_NEW_COMMON_OBJS
)) \
2560 @SIM_ENABLE_ARCH_microblaze_TRUE@
$(patsubst %,microblaze
/dv-
%.o
,$(SIM_HW_DEVICES
)) \
2561 @SIM_ENABLE_ARCH_microblaze_TRUE@ microblaze
/modules.o \
2562 @SIM_ENABLE_ARCH_microblaze_TRUE@ microblaze
/sim-resume.o
2564 @SIM_ENABLE_ARCH_microblaze_TRUE@microblaze_run_SOURCES
=
2565 @SIM_ENABLE_ARCH_microblaze_TRUE@microblaze_run_LDADD
= \
2566 @SIM_ENABLE_ARCH_microblaze_TRUE@ microblaze
/nrun.o \
2567 @SIM_ENABLE_ARCH_microblaze_TRUE@ microblaze
/libsim.a \
2568 @SIM_ENABLE_ARCH_microblaze_TRUE@
$(SIM_COMMON_LIBS
)
2570 @SIM_ENABLE_ARCH_mips_TRUE@mips_GEN_OBJ
= $(am__append_88
) \
2571 @SIM_ENABLE_ARCH_mips_TRUE@
$(am__append_89
) $(am__append_90
)
2572 @SIM_ENABLE_ARCH_mips_TRUE@mips_libsim_a_SOURCES
=
2573 @SIM_ENABLE_ARCH_mips_TRUE@mips_libsim_a_LIBADD
= \
2574 @SIM_ENABLE_ARCH_mips_TRUE@
$(common_libcommon_a_OBJECTS
) \
2575 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/interp.o \
2576 @SIM_ENABLE_ARCH_mips_TRUE@
$(mips_GEN_OBJ
) \
2577 @SIM_ENABLE_ARCH_mips_TRUE@
$(patsubst %,mips
/%,$(SIM_NEW_COMMON_OBJS
)) \
2578 @SIM_ENABLE_ARCH_mips_TRUE@
$(patsubst %,mips
/dv-
%.o
,$(SIM_HW_DEVICES
)) \
2579 @SIM_ENABLE_ARCH_mips_TRUE@
$(patsubst %,mips
/dv-
%.o
,$(mips_SIM_EXTRA_HW_DEVICES
)) \
2580 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/cp1.o \
2581 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/dsp.o \
2582 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/mdmx.o \
2583 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/modules.o \
2584 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/sim-main.o \
2585 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/sim-resume.o
2587 @SIM_ENABLE_ARCH_mips_TRUE@EXTRA_mips_libsim_a_DEPENDENCIES
= $(SIM_MIPS_MULTI_OBJ
)
2588 @SIM_ENABLE_ARCH_mips_TRUE@mips_run_SOURCES
=
2589 @SIM_ENABLE_ARCH_mips_TRUE@mips_run_LDADD
= \
2590 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/nrun.o \
2591 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/libsim.a \
2592 @SIM_ENABLE_ARCH_mips_TRUE@
$(SIM_COMMON_LIBS
)
2594 @SIM_ENABLE_ARCH_mips_TRUE@mips_SIM_EXTRA_HW_DEVICES
= tx3904cpu tx3904irc tx3904tmr tx3904sio
2595 @SIM_ENABLE_ARCH_mips_TRUE@mips_BUILT_SRC_FROM_IGEN_ITABLE
= \
2596 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/itable.h \
2597 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/itable.c
2599 @SIM_ENABLE_ARCH_mips_TRUE@mips_BUILT_SRC_FROM_GEN_MODE_SINGLE
= \
2600 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/icache.h \
2601 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/icache.c \
2602 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/idecode.h \
2603 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/idecode.c \
2604 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/semantics.h \
2605 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/semantics.c \
2606 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/model.h \
2607 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/model.c \
2608 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/support.h \
2609 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/support.c \
2610 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/engine.h \
2611 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/engine.c \
2612 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/irun.c
2614 @SIM_ENABLE_ARCH_mips_TRUE@mips_BUILT_SRC_FROM_GEN_MODE_M16_M16
= \
2615 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/m16_icache.h \
2616 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/m16_icache.c \
2617 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/m16_idecode.h \
2618 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/m16_idecode.c \
2619 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/m16_semantics.h \
2620 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/m16_semantics.c \
2621 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/m16_model.h \
2622 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/m16_model.c \
2623 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/m16_support.h \
2624 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/m16_support.c \
2625 @SIM_ENABLE_ARCH_mips_TRUE@mips_BUILT_SRC_FROM_GEN_MODE_M16_M32
= \
2626 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/m32_icache.h \
2627 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/m32_icache.c \
2628 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/m32_idecode.h \
2629 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/m32_idecode.c \
2630 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/m32_semantics.h \
2631 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/m32_semantics.c \
2632 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/m32_model.h \
2633 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/m32_model.c \
2634 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/m32_support.h \
2635 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/m32_support.c
2637 @SIM_ENABLE_ARCH_mips_TRUE@mips_BUILD_OUTPUTS
= \
2638 @SIM_ENABLE_ARCH_mips_TRUE@
$(mips_BUILT_SRC_FROM_IGEN_ITABLE
) \
2639 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/stamp-igen-itable \
2640 @SIM_ENABLE_ARCH_mips_TRUE@
$(am__append_95
) $(am__append_96
) \
2641 @SIM_ENABLE_ARCH_mips_TRUE@
$(am__append_97
)
2642 @SIM_ENABLE_ARCH_mips_TRUE@mips_IGEN_TRACE
= # -G omit-line-numbers # -G trace-rule-selection -G trace-rule-rejection -G trace-entries # -G trace-all
2643 @SIM_ENABLE_ARCH_mips_TRUE@mips_IGEN_INSN
= $(srcdir)/mips
/mips.igen
2644 @SIM_ENABLE_ARCH_mips_TRUE@mips_IGEN_INSN_INC
= \
2645 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/dsp.igen \
2646 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/dsp2.igen \
2647 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/m16.igen \
2648 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/m16e.igen \
2649 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/mdmx.igen \
2650 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/micromipsdsp.igen \
2651 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/micromips.igen \
2652 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/mips3264r2.igen \
2653 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/mips3264r6.igen \
2654 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/mips3d.igen \
2655 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/sb1.igen \
2656 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/tx.igen \
2657 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/vr.igen
2659 @SIM_ENABLE_ARCH_mips_TRUE@mips_IGEN_DC
= $(srcdir)/mips
/mips.dc
2660 @SIM_ENABLE_ARCH_mips_TRUE@mips_M16_DC
= $(srcdir)/mips
/m16.dc
2661 @SIM_ENABLE_ARCH_mips_TRUE@mips_MICROMIPS32_DC
= $(srcdir)/mips
/micromips.dc
2662 @SIM_ENABLE_ARCH_mips_TRUE@mips_MICROMIPS16_DC
= $(srcdir)/mips
/micromips16.dc
2663 @SIM_ENABLE_ARCH_mn10300_TRUE@mn10300_libsim_a_SOURCES
=
2664 @SIM_ENABLE_ARCH_mn10300_TRUE@mn10300_libsim_a_LIBADD
= \
2665 @SIM_ENABLE_ARCH_mn10300_TRUE@
$(common_libcommon_a_OBJECTS
) \
2666 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300
/itable.o \
2667 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300
/semantics.o \
2668 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300
/idecode.o \
2669 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300
/icache.o \
2670 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300
/engine.o \
2671 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300
/irun.o \
2672 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300
/support.o \
2673 @SIM_ENABLE_ARCH_mn10300_TRUE@
$(patsubst %,mn10300
/%,$(SIM_NEW_COMMON_OBJS
)) \
2674 @SIM_ENABLE_ARCH_mn10300_TRUE@
$(patsubst %,mn10300
/dv-
%.o
,$(SIM_HW_DEVICES
)) \
2675 @SIM_ENABLE_ARCH_mn10300_TRUE@
$(patsubst %,mn10300
/dv-
%.o
,$(mn10300_SIM_EXTRA_HW_DEVICES
)) \
2676 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300
/interp.o \
2677 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300
/modules.o \
2678 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300
/op_utils.o \
2679 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300
/sim-resume.o
2681 @SIM_ENABLE_ARCH_mn10300_TRUE@mn10300_run_SOURCES
=
2682 @SIM_ENABLE_ARCH_mn10300_TRUE@mn10300_run_LDADD
= \
2683 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300
/nrun.o \
2684 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300
/libsim.a \
2685 @SIM_ENABLE_ARCH_mn10300_TRUE@
$(SIM_COMMON_LIBS
)
2687 @SIM_ENABLE_ARCH_mn10300_TRUE@mn10300_SIM_EXTRA_HW_DEVICES
= mn103cpu mn103int mn103tim mn103ser mn103iop
2688 @SIM_ENABLE_ARCH_mn10300_TRUE@mn10300_BUILT_SRC_FROM_IGEN
= \
2689 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300
/icache.h \
2690 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300
/icache.c \
2691 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300
/idecode.h \
2692 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300
/idecode.c \
2693 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300
/semantics.h \
2694 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300
/semantics.c \
2695 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300
/model.h \
2696 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300
/model.c \
2697 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300
/support.h \
2698 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300
/support.c \
2699 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300
/itable.h \
2700 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300
/itable.c \
2701 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300
/engine.h \
2702 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300
/engine.c \
2703 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300
/irun.c
2705 @SIM_ENABLE_ARCH_mn10300_TRUE@mn10300_BUILD_OUTPUTS
= \
2706 @SIM_ENABLE_ARCH_mn10300_TRUE@
$(mn10300_BUILT_SRC_FROM_IGEN
) \
2707 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300
/stamp-igen
2709 @SIM_ENABLE_ARCH_mn10300_TRUE@mn10300_IGEN_TRACE
= # -G omit-line-numbers # -G trace-rule-selection -G trace-rule-rejection -G trace-entries
2710 @SIM_ENABLE_ARCH_mn10300_TRUE@mn10300_IGEN_INSN
= $(srcdir)/mn10300
/mn10300.igen
2711 @SIM_ENABLE_ARCH_mn10300_TRUE@mn10300_IGEN_INSN_INC
= mn10300
/am33.igen mn10300
/am33-2.igen
2712 @SIM_ENABLE_ARCH_mn10300_TRUE@mn10300_IGEN_DC
= $(srcdir)/mn10300
/mn10300.dc
2713 @SIM_ENABLE_ARCH_moxie_TRUE@moxie_libsim_a_SOURCES
=
2714 @SIM_ENABLE_ARCH_moxie_TRUE@moxie_libsim_a_LIBADD
= \
2715 @SIM_ENABLE_ARCH_moxie_TRUE@
$(common_libcommon_a_OBJECTS
) \
2716 @SIM_ENABLE_ARCH_moxie_TRUE@
$(patsubst %,moxie
/%,$(SIM_NEW_COMMON_OBJS
)) \
2717 @SIM_ENABLE_ARCH_moxie_TRUE@
$(patsubst %,moxie
/dv-
%.o
,$(SIM_HW_DEVICES
)) \
2718 @SIM_ENABLE_ARCH_moxie_TRUE@ moxie
/interp.o \
2719 @SIM_ENABLE_ARCH_moxie_TRUE@ moxie
/modules.o \
2720 @SIM_ENABLE_ARCH_moxie_TRUE@ moxie
/sim-resume.o
2722 @SIM_ENABLE_ARCH_moxie_TRUE@moxie_run_SOURCES
=
2723 @SIM_ENABLE_ARCH_moxie_TRUE@moxie_run_LDADD
= \
2724 @SIM_ENABLE_ARCH_moxie_TRUE@ moxie
/nrun.o \
2725 @SIM_ENABLE_ARCH_moxie_TRUE@ moxie
/libsim.a \
2726 @SIM_ENABLE_ARCH_moxie_TRUE@
$(SIM_COMMON_LIBS
)
2728 @SIM_ENABLE_ARCH_moxie_TRUE@dtbdir
= $(datadir)/gdb
/dtb
2729 @SIM_ENABLE_ARCH_moxie_TRUE@dtb_DATA
= moxie
/moxie-gdb.dtb
2730 @SIM_ENABLE_ARCH_msp430_TRUE@msp430_libsim_a_SOURCES
=
2731 @SIM_ENABLE_ARCH_msp430_TRUE@msp430_libsim_a_LIBADD
= \
2732 @SIM_ENABLE_ARCH_msp430_TRUE@
$(common_libcommon_a_OBJECTS
) \
2733 @SIM_ENABLE_ARCH_msp430_TRUE@
$(patsubst %,msp430
/%,$(SIM_NEW_COMMON_OBJS
)) \
2734 @SIM_ENABLE_ARCH_msp430_TRUE@
$(patsubst %,msp430
/dv-
%.o
,$(SIM_HW_DEVICES
)) \
2735 @SIM_ENABLE_ARCH_msp430_TRUE@ msp430
/msp430-sim.o \
2736 @SIM_ENABLE_ARCH_msp430_TRUE@ msp430
/modules.o \
2737 @SIM_ENABLE_ARCH_msp430_TRUE@ msp430
/sim-resume.o
2739 @SIM_ENABLE_ARCH_msp430_TRUE@msp430_run_SOURCES
=
2740 @SIM_ENABLE_ARCH_msp430_TRUE@msp430_run_LDADD
= \
2741 @SIM_ENABLE_ARCH_msp430_TRUE@ msp430
/nrun.o \
2742 @SIM_ENABLE_ARCH_msp430_TRUE@ msp430
/libsim.a \
2743 @SIM_ENABLE_ARCH_msp430_TRUE@
$(SIM_COMMON_LIBS
)
2745 @SIM_ENABLE_ARCH_or1k_TRUE@or1k_libsim_a_SOURCES
=
2746 @SIM_ENABLE_ARCH_or1k_TRUE@or1k_libsim_a_LIBADD
= \
2747 @SIM_ENABLE_ARCH_or1k_TRUE@
$(common_libcommon_a_OBJECTS
) \
2748 @SIM_ENABLE_ARCH_or1k_TRUE@
$(patsubst %,or1k
/%,$(SIM_NEW_COMMON_OBJS
)) \
2749 @SIM_ENABLE_ARCH_or1k_TRUE@
$(patsubst %,or1k
/dv-
%.o
,$(SIM_HW_DEVICES
)) \
2750 @SIM_ENABLE_ARCH_or1k_TRUE@ or1k
/modules.o \
2751 @SIM_ENABLE_ARCH_or1k_TRUE@ \
2752 @SIM_ENABLE_ARCH_or1k_TRUE@ or1k
/cgen-accfp.o \
2753 @SIM_ENABLE_ARCH_or1k_TRUE@ or1k
/cgen-fpu.o \
2754 @SIM_ENABLE_ARCH_or1k_TRUE@ or1k
/cgen-run.o \
2755 @SIM_ENABLE_ARCH_or1k_TRUE@ or1k
/cgen-scache.o \
2756 @SIM_ENABLE_ARCH_or1k_TRUE@ or1k
/cgen-trace.o \
2757 @SIM_ENABLE_ARCH_or1k_TRUE@ or1k
/cgen-utils.o \
2758 @SIM_ENABLE_ARCH_or1k_TRUE@ \
2759 @SIM_ENABLE_ARCH_or1k_TRUE@ or1k
/arch.o \
2760 @SIM_ENABLE_ARCH_or1k_TRUE@ or1k
/cpu.o \
2761 @SIM_ENABLE_ARCH_or1k_TRUE@ or1k
/decode.o \
2762 @SIM_ENABLE_ARCH_or1k_TRUE@ or1k
/mloop.o \
2763 @SIM_ENABLE_ARCH_or1k_TRUE@ or1k
/model.o \
2764 @SIM_ENABLE_ARCH_or1k_TRUE@ or1k
/sem.o \
2765 @SIM_ENABLE_ARCH_or1k_TRUE@ \
2766 @SIM_ENABLE_ARCH_or1k_TRUE@ or1k
/or1k.o \
2767 @SIM_ENABLE_ARCH_or1k_TRUE@ or1k
/sim-if.o \
2768 @SIM_ENABLE_ARCH_or1k_TRUE@ or1k
/traps.o
2770 @SIM_ENABLE_ARCH_or1k_TRUE@or1k_run_SOURCES
=
2771 @SIM_ENABLE_ARCH_or1k_TRUE@or1k_run_LDADD
= \
2772 @SIM_ENABLE_ARCH_or1k_TRUE@ or1k
/nrun.o \
2773 @SIM_ENABLE_ARCH_or1k_TRUE@ or1k
/libsim.a \
2774 @SIM_ENABLE_ARCH_or1k_TRUE@
$(SIM_COMMON_LIBS
)
2776 @SIM_ENABLE_ARCH_or1k_TRUE@or1kdocdir
= $(docdir
)/or1k
2777 @SIM_ENABLE_ARCH_or1k_TRUE@or1kdoc_DATA
= or1k
/README
2778 @SIM_ENABLE_ARCH_or1k_TRUE@or1k_BUILD_OUTPUTS
= \
2779 @SIM_ENABLE_ARCH_or1k_TRUE@ or1k
/mloop.c \
2780 @SIM_ENABLE_ARCH_or1k_TRUE@ or1k
/stamp-mloop
2782 @SIM_ENABLE_ARCH_ppc_TRUE@ppc_run_SOURCES
=
2783 @SIM_ENABLE_ARCH_ppc_TRUE@ppc_run_LDADD
= \
2784 @SIM_ENABLE_ARCH_ppc_TRUE@ ppc
/main.o \
2785 @SIM_ENABLE_ARCH_ppc_TRUE@ ppc
/libsim.a \
2786 @SIM_ENABLE_ARCH_ppc_TRUE@
$(SIM_COMMON_LIBS
)
2788 @SIM_ENABLE_ARCH_ppc_TRUE@ppcdocdir
= $(docdir
)/ppc
2789 @SIM_ENABLE_ARCH_ppc_TRUE@ppcdoc_DATA
= ppc
/BUGS ppc
/INSTALL ppc
/README ppc
/RUN
2790 @SIM_ENABLE_ARCH_pru_TRUE@pru_libsim_a_SOURCES
=
2791 @SIM_ENABLE_ARCH_pru_TRUE@pru_libsim_a_LIBADD
= \
2792 @SIM_ENABLE_ARCH_pru_TRUE@
$(common_libcommon_a_OBJECTS
) \
2793 @SIM_ENABLE_ARCH_pru_TRUE@
$(patsubst %,pru
/%,$(SIM_NEW_COMMON_OBJS
)) \
2794 @SIM_ENABLE_ARCH_pru_TRUE@
$(patsubst %,pru
/dv-
%.o
,$(SIM_HW_DEVICES
)) \
2795 @SIM_ENABLE_ARCH_pru_TRUE@ pru
/interp.o \
2796 @SIM_ENABLE_ARCH_pru_TRUE@ pru
/modules.o \
2797 @SIM_ENABLE_ARCH_pru_TRUE@ pru
/sim-resume.o
2799 @SIM_ENABLE_ARCH_pru_TRUE@pru_run_SOURCES
=
2800 @SIM_ENABLE_ARCH_pru_TRUE@pru_run_LDADD
= \
2801 @SIM_ENABLE_ARCH_pru_TRUE@ pru
/nrun.o \
2802 @SIM_ENABLE_ARCH_pru_TRUE@ pru
/libsim.a \
2803 @SIM_ENABLE_ARCH_pru_TRUE@
$(SIM_COMMON_LIBS
)
2805 @SIM_ENABLE_ARCH_riscv_TRUE@riscv_libsim_a_SOURCES
=
2806 @SIM_ENABLE_ARCH_riscv_TRUE@riscv_libsim_a_LIBADD
= \
2807 @SIM_ENABLE_ARCH_riscv_TRUE@
$(common_libcommon_a_OBJECTS
) \
2808 @SIM_ENABLE_ARCH_riscv_TRUE@
$(patsubst %,riscv
/%,$(SIM_NEW_COMMON_OBJS
)) \
2809 @SIM_ENABLE_ARCH_riscv_TRUE@
$(patsubst %,riscv
/dv-
%.o
,$(SIM_HW_DEVICES
)) \
2810 @SIM_ENABLE_ARCH_riscv_TRUE@ riscv
/interp.o \
2811 @SIM_ENABLE_ARCH_riscv_TRUE@ riscv
/machs.o \
2812 @SIM_ENABLE_ARCH_riscv_TRUE@ riscv
/modules.o \
2813 @SIM_ENABLE_ARCH_riscv_TRUE@ riscv
/sim-main.o \
2814 @SIM_ENABLE_ARCH_riscv_TRUE@ riscv
/sim-resume.o
2816 @SIM_ENABLE_ARCH_riscv_TRUE@riscv_run_SOURCES
=
2817 @SIM_ENABLE_ARCH_riscv_TRUE@riscv_run_LDADD
= \
2818 @SIM_ENABLE_ARCH_riscv_TRUE@ riscv
/nrun.o \
2819 @SIM_ENABLE_ARCH_riscv_TRUE@ riscv
/libsim.a \
2820 @SIM_ENABLE_ARCH_riscv_TRUE@
$(SIM_COMMON_LIBS
)
2822 @SIM_ENABLE_ARCH_rl78_TRUE@rl78_libsim_a_SOURCES
=
2823 @SIM_ENABLE_ARCH_rl78_TRUE@rl78_libsim_a_LIBADD
= \
2824 @SIM_ENABLE_ARCH_rl78_TRUE@
$(common_libcommon_a_OBJECTS
) \
2825 @SIM_ENABLE_ARCH_rl78_TRUE@ rl78
/load.o \
2826 @SIM_ENABLE_ARCH_rl78_TRUE@ rl78
/mem.o \
2827 @SIM_ENABLE_ARCH_rl78_TRUE@ rl78
/cpu.o \
2828 @SIM_ENABLE_ARCH_rl78_TRUE@ rl78
/rl78.o \
2829 @SIM_ENABLE_ARCH_rl78_TRUE@ rl78
/gdb-if.o \
2830 @SIM_ENABLE_ARCH_rl78_TRUE@ rl78
/modules.o \
2831 @SIM_ENABLE_ARCH_rl78_TRUE@ rl78
/trace.o
2833 @SIM_ENABLE_ARCH_rl78_TRUE@rl78_run_SOURCES
=
2834 @SIM_ENABLE_ARCH_rl78_TRUE@rl78_run_LDADD
= \
2835 @SIM_ENABLE_ARCH_rl78_TRUE@ rl78
/main.o \
2836 @SIM_ENABLE_ARCH_rl78_TRUE@ rl78
/libsim.a \
2837 @SIM_ENABLE_ARCH_rl78_TRUE@
$(SIM_COMMON_LIBS
)
2839 @SIM_ENABLE_ARCH_rx_TRUE@rx_libsim_a_SOURCES
=
2840 @SIM_ENABLE_ARCH_rx_TRUE@rx_libsim_a_LIBADD
= \
2841 @SIM_ENABLE_ARCH_rx_TRUE@
$(common_libcommon_a_OBJECTS
) \
2842 @SIM_ENABLE_ARCH_rx_TRUE@ rx
/fpu.o \
2843 @SIM_ENABLE_ARCH_rx_TRUE@ rx
/load.o \
2844 @SIM_ENABLE_ARCH_rx_TRUE@ rx
/mem.o \
2845 @SIM_ENABLE_ARCH_rx_TRUE@ rx
/misc.o \
2846 @SIM_ENABLE_ARCH_rx_TRUE@ rx
/reg.o \
2847 @SIM_ENABLE_ARCH_rx_TRUE@ rx
/rx.o \
2848 @SIM_ENABLE_ARCH_rx_TRUE@ rx
/syscalls.o \
2849 @SIM_ENABLE_ARCH_rx_TRUE@ rx
/trace.o \
2850 @SIM_ENABLE_ARCH_rx_TRUE@ rx
/gdb-if.o \
2851 @SIM_ENABLE_ARCH_rx_TRUE@ rx
/err.o \
2852 @SIM_ENABLE_ARCH_rx_TRUE@ rx
/modules.o
2854 @SIM_ENABLE_ARCH_rx_TRUE@rx_run_SOURCES
=
2855 @SIM_ENABLE_ARCH_rx_TRUE@rx_run_LDADD
= \
2856 @SIM_ENABLE_ARCH_rx_TRUE@ rx
/main.o \
2857 @SIM_ENABLE_ARCH_rx_TRUE@ rx
/libsim.a \
2858 @SIM_ENABLE_ARCH_rx_TRUE@
$(SIM_COMMON_LIBS
)
2860 @SIM_ENABLE_ARCH_rx_TRUE@rxdocdir
= $(docdir
)/rx
2861 @SIM_ENABLE_ARCH_rx_TRUE@rxdoc_DATA
= rx
/README.txt
2862 @SIM_ENABLE_ARCH_sh_TRUE@sh_libsim_a_SOURCES
=
2863 @SIM_ENABLE_ARCH_sh_TRUE@sh_libsim_a_LIBADD
= \
2864 @SIM_ENABLE_ARCH_sh_TRUE@
$(common_libcommon_a_OBJECTS
) \
2865 @SIM_ENABLE_ARCH_sh_TRUE@ sh
/interp.o \
2866 @SIM_ENABLE_ARCH_sh_TRUE@
$(patsubst %,sh
/%,$(SIM_NEW_COMMON_OBJS
)) \
2867 @SIM_ENABLE_ARCH_sh_TRUE@
$(patsubst %,sh
/dv-
%.o
,$(SIM_HW_DEVICES
)) \
2868 @SIM_ENABLE_ARCH_sh_TRUE@ sh
/modules.o \
2869 @SIM_ENABLE_ARCH_sh_TRUE@ sh
/table.o
2871 @SIM_ENABLE_ARCH_sh_TRUE@sh_run_SOURCES
=
2872 @SIM_ENABLE_ARCH_sh_TRUE@sh_run_LDADD
= \
2873 @SIM_ENABLE_ARCH_sh_TRUE@ sh
/nrun.o \
2874 @SIM_ENABLE_ARCH_sh_TRUE@ sh
/libsim.a \
2875 @SIM_ENABLE_ARCH_sh_TRUE@
$(SIM_COMMON_LIBS
)
2877 @SIM_ENABLE_ARCH_sh_TRUE@sh_BUILD_OUTPUTS
= \
2878 @SIM_ENABLE_ARCH_sh_TRUE@ sh
/gencode
$(EXEEXT
) \
2879 @SIM_ENABLE_ARCH_sh_TRUE@ sh
/table.c
2881 @SIM_ENABLE_ARCH_sh_TRUE@sh_gencode_SOURCES
= sh
/gencode.c
2882 @SIM_ENABLE_ARCH_v850_TRUE@v850_libsim_a_SOURCES
=
2883 @SIM_ENABLE_ARCH_v850_TRUE@v850_libsim_a_LIBADD
= \
2884 @SIM_ENABLE_ARCH_v850_TRUE@
$(common_libcommon_a_OBJECTS
) \
2885 @SIM_ENABLE_ARCH_v850_TRUE@
$(patsubst %,v850
/%,$(SIM_NEW_COMMON_OBJS
)) \
2886 @SIM_ENABLE_ARCH_v850_TRUE@
$(patsubst %,v850
/dv-
%.o
,$(SIM_HW_DEVICES
)) \
2887 @SIM_ENABLE_ARCH_v850_TRUE@ v850
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2888 @SIM_ENABLE_ARCH_v850_TRUE@ v850
/interp.o \
2889 @SIM_ENABLE_ARCH_v850_TRUE@ v850
/itable.o \
2890 @SIM_ENABLE_ARCH_v850_TRUE@ v850
/semantics.o \
2891 @SIM_ENABLE_ARCH_v850_TRUE@ v850
/idecode.o \
2892 @SIM_ENABLE_ARCH_v850_TRUE@ v850
/icache.o \
2893 @SIM_ENABLE_ARCH_v850_TRUE@ v850
/engine.o \
2894 @SIM_ENABLE_ARCH_v850_TRUE@ v850
/irun.o \
2895 @SIM_ENABLE_ARCH_v850_TRUE@ v850
/support.o \
2896 @SIM_ENABLE_ARCH_v850_TRUE@ v850
/modules.o \
2897 @SIM_ENABLE_ARCH_v850_TRUE@ v850
/sim-resume.o
2899 @SIM_ENABLE_ARCH_v850_TRUE@v850_run_SOURCES
=
2900 @SIM_ENABLE_ARCH_v850_TRUE@v850_run_LDADD
= \
2901 @SIM_ENABLE_ARCH_v850_TRUE@ v850
/nrun.o \
2902 @SIM_ENABLE_ARCH_v850_TRUE@ v850
/libsim.a \
2903 @SIM_ENABLE_ARCH_v850_TRUE@
$(SIM_COMMON_LIBS
)
2905 @SIM_ENABLE_ARCH_v850_TRUE@v850_BUILT_SRC_FROM_IGEN
= \
2906 @SIM_ENABLE_ARCH_v850_TRUE@ v850
/icache.h \
2907 @SIM_ENABLE_ARCH_v850_TRUE@ v850
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2908 @SIM_ENABLE_ARCH_v850_TRUE@ v850
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2909 @SIM_ENABLE_ARCH_v850_TRUE@ v850
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2910 @SIM_ENABLE_ARCH_v850_TRUE@ v850
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2911 @SIM_ENABLE_ARCH_v850_TRUE@ v850
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2912 @SIM_ENABLE_ARCH_v850_TRUE@ v850
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2913 @SIM_ENABLE_ARCH_v850_TRUE@ v850
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2914 @SIM_ENABLE_ARCH_v850_TRUE@ v850
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2915 @SIM_ENABLE_ARCH_v850_TRUE@ v850
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2916 @SIM_ENABLE_ARCH_v850_TRUE@ v850
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2917 @SIM_ENABLE_ARCH_v850_TRUE@ v850
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2918 @SIM_ENABLE_ARCH_v850_TRUE@ v850
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2919 @SIM_ENABLE_ARCH_v850_TRUE@ v850
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2920 @SIM_ENABLE_ARCH_v850_TRUE@ v850
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2922 @SIM_ENABLE_ARCH_v850_TRUE@v850_BUILD_OUTPUTS
= \
2923 @SIM_ENABLE_ARCH_v850_TRUE@
$(v850_BUILT_SRC_FROM_IGEN
) \
2924 @SIM_ENABLE_ARCH_v850_TRUE@ v850
/stamp-igen
2926 @SIM_ENABLE_ARCH_v850_TRUE@v850_IGEN_TRACE
= # -G omit-line-numbers # -G trace-rule-selection -G trace-rule-rejection -G trace-entries
2927 @SIM_ENABLE_ARCH_v850_TRUE@v850_IGEN_INSN
= $(srcdir)/v850
/v850.igen
2928 @SIM_ENABLE_ARCH_v850_TRUE@v850_IGEN_DC
= $(srcdir)/v850
/v850.dc
2929 all: $(BUILT_SOURCES
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2930 $(MAKE
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2937 @for dep in
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2938 case
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2946 echo
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2948 $(AUTOMAKE
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2949 Makefile
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2953 $(SHELL
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$(srcdir)/example-synacor
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$(srcdir)/frv
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$(srcdir)/ft32
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$(srcdir)/h8300
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$(srcdir)/iq2000
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test -f
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2973 stamp-h1
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2975 cd
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2976 $(srcdir)/config.h.in
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2977 ($(am__cd
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2985 aarch64
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2987 aarch64
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$@
2989 arm
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2990 cd
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) .
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$@
2991 arm
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2992 cd
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$@
2993 avr
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2994 cd
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$@
2995 avr
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$(top_srcdir
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2996 cd
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$@
2997 bfin
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$(top_srcdir
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2998 cd
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$@
2999 bfin
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) && $(SHELL
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$@
3001 bpf
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$(top_srcdir
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3002 cd
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) && $(SHELL
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$@
3003 bpf
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$(top_srcdir
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3004 cd
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$@
3005 cr16
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$(top_srcdir
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3006 cd
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$@
3007 cr16
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$(top_srcdir
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3008 cd
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) && $(SHELL
) .
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$@
3009 cris
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$(top_srcdir
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3010 cd
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) && $(SHELL
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$@
3011 cris
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: $(top_builddir
)/config.status
$(top_srcdir
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3012 cd
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) && $(SHELL
) .
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$@
3013 d10v
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: $(top_builddir
)/config.status
$(top_srcdir
)/d10v
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3014 cd
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) && $(SHELL
) .
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$@
3015 d10v
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: $(top_builddir
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$(top_srcdir
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3016 cd
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) && $(SHELL
) .
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$@
3017 frv
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: $(top_builddir
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$(top_srcdir
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3018 cd
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) && $(SHELL
) .
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$@
3019 frv
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: $(top_builddir
)/config.status
$(top_srcdir
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3020 cd
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) && $(SHELL
) .
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$@
3021 ft32
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: $(top_builddir
)/config.status
$(top_srcdir
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3022 cd
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) && $(SHELL
) .
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$@
3023 ft32
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: $(top_builddir
)/config.status
$(top_srcdir
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3024 cd
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) && $(SHELL
) .
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$@
3025 h8300
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: $(top_builddir
)/config.status
$(top_srcdir
)/h8300
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3026 cd
$(top_builddir
) && $(SHELL
) .
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$@
3027 h8300
/.gdbinit
: $(top_builddir
)/config.status
$(top_srcdir
)/common
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3028 cd
$(top_builddir
) && $(SHELL
) .
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$@
3029 iq2000
/Makefile.sim
: $(top_builddir
)/config.status
$(top_srcdir
)/iq2000
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3030 cd
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) && $(SHELL
) .
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$@
3031 iq2000
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: $(top_builddir
)/config.status
$(top_srcdir
)/common
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3032 cd
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) && $(SHELL
) .
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$@
3033 lm32
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: $(top_builddir
)/config.status
$(top_srcdir
)/lm32
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3034 cd
$(top_builddir
) && $(SHELL
) .
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$@
3035 lm32
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: $(top_builddir
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$(top_srcdir
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3036 cd
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) && $(SHELL
) .
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$@
3037 m32c
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: $(top_builddir
)/config.status
$(top_srcdir
)/m32c
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3038 cd
$(top_builddir
) && $(SHELL
) .
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$@
3039 m32c
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)/config.status
$(top_srcdir
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3040 cd
$(top_builddir
) && $(SHELL
) .
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$@
3041 m32r
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)/config.status
$(top_srcdir
)/m32r
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3042 cd
$(top_builddir
) && $(SHELL
) .
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$@
3043 m32r
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)/config.status
$(top_srcdir
)/common
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3044 cd
$(top_builddir
) && $(SHELL
) .
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$@
3045 m68hc11
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$(top_srcdir
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3046 cd
$(top_builddir
) && $(SHELL
) .
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$@
3047 m68hc11
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$(top_srcdir
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3048 cd
$(top_builddir
) && $(SHELL
) .
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$@
3049 mcore
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: $(top_builddir
)/config.status
$(top_srcdir
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3050 cd
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) && $(SHELL
) .
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$@
3051 mcore
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)/config.status
$(top_srcdir
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3052 cd
$(top_builddir
) && $(SHELL
) .
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$@
3053 microblaze
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: $(top_builddir
)/config.status
$(top_srcdir
)/microblaze
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3054 cd
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) && $(SHELL
) .
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$@
3055 microblaze
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: $(top_builddir
)/config.status
$(top_srcdir
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3056 cd
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) && $(SHELL
) .
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$@
3057 mips
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: $(top_builddir
)/config.status
$(top_srcdir
)/mips
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3058 cd
$(top_builddir
) && $(SHELL
) .
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$@
3059 mips
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: $(top_builddir
)/config.status
$(top_srcdir
)/common
/gdbinit.in
3060 cd
$(top_builddir
) && $(SHELL
) .
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$@
3061 mn10300
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: $(top_builddir
)/config.status
$(top_srcdir
)/mn10300
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3062 cd
$(top_builddir
) && $(SHELL
) .
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$@
3063 mn10300
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: $(top_builddir
)/config.status
$(top_srcdir
)/common
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3064 cd
$(top_builddir
) && $(SHELL
) .
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$@
3065 moxie
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: $(top_builddir
)/config.status
$(top_srcdir
)/moxie
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3066 cd
$(top_builddir
) && $(SHELL
) .
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$@
3067 moxie
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: $(top_builddir
)/config.status
$(top_srcdir
)/common
/gdbinit.in
3068 cd
$(top_builddir
) && $(SHELL
) .
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$@
3069 msp430
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: $(top_builddir
)/config.status
$(top_srcdir
)/msp430
/Makefile.in
3070 cd
$(top_builddir
) && $(SHELL
) .
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$@
3071 msp430
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: $(top_builddir
)/config.status
$(top_srcdir
)/common
/gdbinit.in
3072 cd
$(top_builddir
) && $(SHELL
) .
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$@
3073 or1k
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: $(top_builddir
)/config.status
$(top_srcdir
)/or1k
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3074 cd
$(top_builddir
) && $(SHELL
) .
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$@
3075 or1k
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: $(top_builddir
)/config.status
$(top_srcdir
)/common
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3076 cd
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) && $(SHELL
) .
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$@
3077 ppc
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: $(top_builddir
)/config.status
$(top_srcdir
)/common
/gdbinit.in
3078 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
3079 pru
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: $(top_builddir
)/config.status
$(top_srcdir
)/pru
/Makefile.in
3080 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
3081 pru
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: $(top_builddir
)/config.status
$(top_srcdir
)/common
/gdbinit.in
3082 cd
$(top_builddir
) && $(SHELL
) .
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$@
3083 riscv
/Makefile.sim
: $(top_builddir
)/config.status
$(top_srcdir
)/riscv
/Makefile.in
3084 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
3085 riscv
/.gdbinit
: $(top_builddir
)/config.status
$(top_srcdir
)/common
/gdbinit.in
3086 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
3087 rl78
/Makefile.sim
: $(top_builddir
)/config.status
$(top_srcdir
)/rl78
/Makefile.in
3088 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
3089 rl78
/.gdbinit
: $(top_builddir
)/config.status
$(top_srcdir
)/common
/gdbinit.in
3090 cd
$(top_builddir
) && $(SHELL
) .
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$@
3091 rx
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: $(top_builddir
)/config.status
$(top_srcdir
)/rx
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3092 cd
$(top_builddir
) && $(SHELL
) .
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$@
3093 rx
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: $(top_builddir
)/config.status
$(top_srcdir
)/common
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3094 cd
$(top_builddir
) && $(SHELL
) .
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$@
3095 sh
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: $(top_builddir
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$(top_srcdir
)/sh
/Makefile.in
3096 cd
$(top_builddir
) && $(SHELL
) .
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$@
3097 sh
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: $(top_builddir
)/config.status
$(top_srcdir
)/common
/gdbinit.in
3098 cd
$(top_builddir
) && $(SHELL
) .
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$@
3099 erc32
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: $(top_builddir
)/config.status
$(top_srcdir
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3100 cd
$(top_builddir
) && $(SHELL
) .
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$@
3101 erc32
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: $(top_builddir
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$(top_srcdir
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3102 cd
$(top_builddir
) && $(SHELL
) .
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$@
3103 v850
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$(top_srcdir
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3104 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
3105 v850
/.gdbinit
: $(top_builddir
)/config.status
$(top_srcdir
)/common
/gdbinit.in
3106 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
3107 example-synacor
/Makefile.sim
: $(top_builddir
)/config.status
$(top_srcdir
)/example-synacor
/Makefile.in
3108 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
3109 example-synacor
/.gdbinit
: $(top_builddir
)/config.status
$(top_srcdir
)/common
/gdbinit.in
3110 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
3111 arch-subdir.mk
: $(top_builddir
)/config.status
$(srcdir)/arch-subdir.mk.in
3112 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
3113 .gdbinit
: $(top_builddir
)/config.status
$(srcdir)/gdbinit.in
3114 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
3116 clean-noinstLIBRARIES
:
3117 -test -z
"$(noinst_LIBRARIES)" ||
rm -f
$(noinst_LIBRARIES
)
3118 aarch64
/$(am__dirstamp
):
3120 @
: > aarch64
/$(am__dirstamp
)
3122 aarch64
/libsim.a
: $(aarch64_libsim_a_OBJECTS
) $(aarch64_libsim_a_DEPENDENCIES
) $(EXTRA_aarch64_libsim_a_DEPENDENCIES
) aarch64
/$(am__dirstamp
)
3123 $(AM_V_at
)-rm -f aarch64
/libsim.a
3124 $(AM_V_AR
)$(aarch64_libsim_a_AR
) aarch64
/libsim.a
$(aarch64_libsim_a_OBJECTS
) $(aarch64_libsim_a_LIBADD
)
3125 $(AM_V_at
)$(RANLIB
) aarch64
/libsim.a
3126 arm
/$(am__dirstamp
):
3128 @
: > arm
/$(am__dirstamp
)
3130 arm
/libsim.a
: $(arm_libsim_a_OBJECTS
) $(arm_libsim_a_DEPENDENCIES
) $(EXTRA_arm_libsim_a_DEPENDENCIES
) arm
/$(am__dirstamp
)
3131 $(AM_V_at
)-rm -f arm
/libsim.a
3132 $(AM_V_AR
)$(arm_libsim_a_AR
) arm
/libsim.a
$(arm_libsim_a_OBJECTS
) $(arm_libsim_a_LIBADD
)
3133 $(AM_V_at
)$(RANLIB
) arm
/libsim.a
3134 avr
/$(am__dirstamp
):
3136 @
: > avr
/$(am__dirstamp
)
3138 avr
/libsim.a
: $(avr_libsim_a_OBJECTS
) $(avr_libsim_a_DEPENDENCIES
) $(EXTRA_avr_libsim_a_DEPENDENCIES
) avr
/$(am__dirstamp
)
3139 $(AM_V_at
)-rm -f avr
/libsim.a
3140 $(AM_V_AR
)$(avr_libsim_a_AR
) avr
/libsim.a
$(avr_libsim_a_OBJECTS
) $(avr_libsim_a_LIBADD
)
3141 $(AM_V_at
)$(RANLIB
) avr
/libsim.a
3142 bfin
/$(am__dirstamp
):
3144 @
: > bfin
/$(am__dirstamp
)
3146 bfin
/libsim.a
: $(bfin_libsim_a_OBJECTS
) $(bfin_libsim_a_DEPENDENCIES
) $(EXTRA_bfin_libsim_a_DEPENDENCIES
) bfin
/$(am__dirstamp
)
3147 $(AM_V_at
)-rm -f bfin
/libsim.a
3148 $(AM_V_AR
)$(bfin_libsim_a_AR
) bfin
/libsim.a
$(bfin_libsim_a_OBJECTS
) $(bfin_libsim_a_LIBADD
)
3149 $(AM_V_at
)$(RANLIB
) bfin
/libsim.a
3150 bpf
/$(am__dirstamp
):
3152 @
: > bpf
/$(am__dirstamp
)
3154 bpf
/libsim.a
: $(bpf_libsim_a_OBJECTS
) $(bpf_libsim_a_DEPENDENCIES
) $(EXTRA_bpf_libsim_a_DEPENDENCIES
) bpf
/$(am__dirstamp
)
3155 $(AM_V_at
)-rm -f bpf
/libsim.a
3156 $(AM_V_AR
)$(bpf_libsim_a_AR
) bpf
/libsim.a
$(bpf_libsim_a_OBJECTS
) $(bpf_libsim_a_LIBADD
)
3157 $(AM_V_at
)$(RANLIB
) bpf
/libsim.a
3158 common
/$(am__dirstamp
):
3160 @
: > common
/$(am__dirstamp
)
3161 common
/$(DEPDIR
)/$(am__dirstamp
):
3162 @
$(MKDIR_P
) common
/$(DEPDIR
)
3163 @
: > common
/$(DEPDIR
)/$(am__dirstamp
)
3164 common
/callback.
$(OBJEXT
): common
/$(am__dirstamp
) \
3165 common
/$(DEPDIR
)/$(am__dirstamp
)
3166 common
/portability.
$(OBJEXT
): common
/$(am__dirstamp
) \
3167 common
/$(DEPDIR
)/$(am__dirstamp
)
3168 common
/sim-load.
$(OBJEXT
): common
/$(am__dirstamp
) \
3169 common
/$(DEPDIR
)/$(am__dirstamp
)
3170 common
/syscall.
$(OBJEXT
): common
/$(am__dirstamp
) \
3171 common
/$(DEPDIR
)/$(am__dirstamp
)
3172 common
/target-newlib-errno.
$(OBJEXT
): common
/$(am__dirstamp
) \
3173 common
/$(DEPDIR
)/$(am__dirstamp
)
3174 common
/target-newlib-open.
$(OBJEXT
): common
/$(am__dirstamp
) \
3175 common
/$(DEPDIR
)/$(am__dirstamp
)
3176 common
/target-newlib-signal.
$(OBJEXT
): common
/$(am__dirstamp
) \
3177 common
/$(DEPDIR
)/$(am__dirstamp
)
3178 common
/target-newlib-syscall.
$(OBJEXT
): common
/$(am__dirstamp
) \
3179 common
/$(DEPDIR
)/$(am__dirstamp
)
3180 common
/version.
$(OBJEXT
): common
/$(am__dirstamp
) \
3181 common
/$(DEPDIR
)/$(am__dirstamp
)
3183 common
/libcommon.a
: $(common_libcommon_a_OBJECTS
) $(common_libcommon_a_DEPENDENCIES
) $(EXTRA_common_libcommon_a_DEPENDENCIES
) common
/$(am__dirstamp
)
3184 $(AM_V_at
)-rm -f common
/libcommon.a
3185 $(AM_V_AR
)$(common_libcommon_a_AR
) common
/libcommon.a
$(common_libcommon_a_OBJECTS
) $(common_libcommon_a_LIBADD
)
3186 $(AM_V_at
)$(RANLIB
) common
/libcommon.a
3187 cr16
/$(am__dirstamp
):
3189 @
: > cr16
/$(am__dirstamp
)
3191 cr16
/libsim.a
: $(cr16_libsim_a_OBJECTS
) $(cr16_libsim_a_DEPENDENCIES
) $(EXTRA_cr16_libsim_a_DEPENDENCIES
) cr16
/$(am__dirstamp
)
3192 $(AM_V_at
)-rm -f cr16
/libsim.a
3193 $(AM_V_AR
)$(cr16_libsim_a_AR
) cr16
/libsim.a
$(cr16_libsim_a_OBJECTS
) $(cr16_libsim_a_LIBADD
)
3194 $(AM_V_at
)$(RANLIB
) cr16
/libsim.a
3195 cris
/$(am__dirstamp
):
3197 @
: > cris
/$(am__dirstamp
)
3199 cris
/libsim.a
: $(cris_libsim_a_OBJECTS
) $(cris_libsim_a_DEPENDENCIES
) $(EXTRA_cris_libsim_a_DEPENDENCIES
) cris
/$(am__dirstamp
)
3200 $(AM_V_at
)-rm -f cris
/libsim.a
3201 $(AM_V_AR
)$(cris_libsim_a_AR
) cris
/libsim.a
$(cris_libsim_a_OBJECTS
) $(cris_libsim_a_LIBADD
)
3202 $(AM_V_at
)$(RANLIB
) cris
/libsim.a
3203 d10v
/$(am__dirstamp
):
3205 @
: > d10v
/$(am__dirstamp
)
3207 d10v
/libsim.a
: $(d10v_libsim_a_OBJECTS
) $(d10v_libsim_a_DEPENDENCIES
) $(EXTRA_d10v_libsim_a_DEPENDENCIES
) d10v
/$(am__dirstamp
)
3208 $(AM_V_at
)-rm -f d10v
/libsim.a
3209 $(AM_V_AR
)$(d10v_libsim_a_AR
) d10v
/libsim.a
$(d10v_libsim_a_OBJECTS
) $(d10v_libsim_a_LIBADD
)
3210 $(AM_V_at
)$(RANLIB
) d10v
/libsim.a
3211 erc32
/$(am__dirstamp
):
3213 @
: > erc32
/$(am__dirstamp
)
3215 erc32
/libsim.a
: $(erc32_libsim_a_OBJECTS
) $(erc32_libsim_a_DEPENDENCIES
) $(EXTRA_erc32_libsim_a_DEPENDENCIES
) erc32
/$(am__dirstamp
)
3216 $(AM_V_at
)-rm -f erc32
/libsim.a
3217 $(AM_V_AR
)$(erc32_libsim_a_AR
) erc32
/libsim.a
$(erc32_libsim_a_OBJECTS
) $(erc32_libsim_a_LIBADD
)
3218 $(AM_V_at
)$(RANLIB
) erc32
/libsim.a
3219 example-synacor
/$(am__dirstamp
):
3220 @
$(MKDIR_P
) example-synacor
3221 @
: > example-synacor
/$(am__dirstamp
)
3223 example-synacor
/libsim.a
: $(example_synacor_libsim_a_OBJECTS
) $(example_synacor_libsim_a_DEPENDENCIES
) $(EXTRA_example_synacor_libsim_a_DEPENDENCIES
) example-synacor
/$(am__dirstamp
)
3224 $(AM_V_at
)-rm -f example-synacor
/libsim.a
3225 $(AM_V_AR
)$(example_synacor_libsim_a_AR
) example-synacor
/libsim.a
$(example_synacor_libsim_a_OBJECTS
) $(example_synacor_libsim_a_LIBADD
)
3226 $(AM_V_at
)$(RANLIB
) example-synacor
/libsim.a
3227 frv
/$(am__dirstamp
):
3229 @
: > frv
/$(am__dirstamp
)
3231 frv
/libsim.a
: $(frv_libsim_a_OBJECTS
) $(frv_libsim_a_DEPENDENCIES
) $(EXTRA_frv_libsim_a_DEPENDENCIES
) frv
/$(am__dirstamp
)
3232 $(AM_V_at
)-rm -f frv
/libsim.a
3233 $(AM_V_AR
)$(frv_libsim_a_AR
) frv
/libsim.a
$(frv_libsim_a_OBJECTS
) $(frv_libsim_a_LIBADD
)
3234 $(AM_V_at
)$(RANLIB
) frv
/libsim.a
3235 ft32
/$(am__dirstamp
):
3237 @
: > ft32
/$(am__dirstamp
)
3239 ft32
/libsim.a
: $(ft32_libsim_a_OBJECTS
) $(ft32_libsim_a_DEPENDENCIES
) $(EXTRA_ft32_libsim_a_DEPENDENCIES
) ft32
/$(am__dirstamp
)
3240 $(AM_V_at
)-rm -f ft32
/libsim.a
3241 $(AM_V_AR
)$(ft32_libsim_a_AR
) ft32
/libsim.a
$(ft32_libsim_a_OBJECTS
) $(ft32_libsim_a_LIBADD
)
3242 $(AM_V_at
)$(RANLIB
) ft32
/libsim.a
3243 h8300
/$(am__dirstamp
):
3245 @
: > h8300
/$(am__dirstamp
)
3247 h8300
/libsim.a
: $(h8300_libsim_a_OBJECTS
) $(h8300_libsim_a_DEPENDENCIES
) $(EXTRA_h8300_libsim_a_DEPENDENCIES
) h8300
/$(am__dirstamp
)
3248 $(AM_V_at
)-rm -f h8300
/libsim.a
3249 $(AM_V_AR
)$(h8300_libsim_a_AR
) h8300
/libsim.a
$(h8300_libsim_a_OBJECTS
) $(h8300_libsim_a_LIBADD
)
3250 $(AM_V_at
)$(RANLIB
) h8300
/libsim.a
3251 igen
/$(am__dirstamp
):
3253 @
: > igen
/$(am__dirstamp
)
3254 igen
/$(DEPDIR
)/$(am__dirstamp
):
3255 @
$(MKDIR_P
) igen
/$(DEPDIR
)
3256 @
: > igen
/$(DEPDIR
)/$(am__dirstamp
)
3257 igen
/table.
$(OBJEXT
): igen
/$(am__dirstamp
) \
3258 igen
/$(DEPDIR
)/$(am__dirstamp
)
3259 igen
/lf.
$(OBJEXT
): igen
/$(am__dirstamp
) igen
/$(DEPDIR
)/$(am__dirstamp
)
3260 igen
/misc.
$(OBJEXT
): igen
/$(am__dirstamp
) \
3261 igen
/$(DEPDIR
)/$(am__dirstamp
)
3262 igen
/filter_host.
$(OBJEXT
): igen
/$(am__dirstamp
) \
3263 igen
/$(DEPDIR
)/$(am__dirstamp
)
3264 igen
/ld-decode.
$(OBJEXT
): igen
/$(am__dirstamp
) \
3265 igen
/$(DEPDIR
)/$(am__dirstamp
)
3266 igen
/ld-cache.
$(OBJEXT
): igen
/$(am__dirstamp
) \
3267 igen
/$(DEPDIR
)/$(am__dirstamp
)
3268 igen
/filter.
$(OBJEXT
): igen
/$(am__dirstamp
) \
3269 igen
/$(DEPDIR
)/$(am__dirstamp
)
3270 igen
/ld-insn.
$(OBJEXT
): igen
/$(am__dirstamp
) \
3271 igen
/$(DEPDIR
)/$(am__dirstamp
)
3272 igen
/gen-model.
$(OBJEXT
): igen
/$(am__dirstamp
) \
3273 igen
/$(DEPDIR
)/$(am__dirstamp
)
3274 igen
/gen-itable.
$(OBJEXT
): igen
/$(am__dirstamp
) \
3275 igen
/$(DEPDIR
)/$(am__dirstamp
)
3276 igen
/gen-icache.
$(OBJEXT
): igen
/$(am__dirstamp
) \
3277 igen
/$(DEPDIR
)/$(am__dirstamp
)
3278 igen
/gen-semantics.
$(OBJEXT
): igen
/$(am__dirstamp
) \
3279 igen
/$(DEPDIR
)/$(am__dirstamp
)
3280 igen
/gen-idecode.
$(OBJEXT
): igen
/$(am__dirstamp
) \
3281 igen
/$(DEPDIR
)/$(am__dirstamp
)
3282 igen
/gen-support.
$(OBJEXT
): igen
/$(am__dirstamp
) \
3283 igen
/$(DEPDIR
)/$(am__dirstamp
)
3284 igen
/gen-engine.
$(OBJEXT
): igen
/$(am__dirstamp
) \
3285 igen
/$(DEPDIR
)/$(am__dirstamp
)
3286 igen
/gen.
$(OBJEXT
): igen
/$(am__dirstamp
) \
3287 igen
/$(DEPDIR
)/$(am__dirstamp
)
3289 @SIM_ENABLE_IGEN_FALSE@igen
/libigen.a
: $(igen_libigen_a_OBJECTS
) $(igen_libigen_a_DEPENDENCIES
) $(EXTRA_igen_libigen_a_DEPENDENCIES
) igen
/$(am__dirstamp
)
3290 @SIM_ENABLE_IGEN_FALSE@
$(AM_V_at
)-rm -f igen
/libigen.a
3291 @SIM_ENABLE_IGEN_FALSE@
$(AM_V_AR
)$(igen_libigen_a_AR
) igen
/libigen.a
$(igen_libigen_a_OBJECTS
) $(igen_libigen_a_LIBADD
)
3292 @SIM_ENABLE_IGEN_FALSE@
$(AM_V_at
)$(RANLIB
) igen
/libigen.a
3293 iq2000
/$(am__dirstamp
):
3295 @
: > iq2000
/$(am__dirstamp
)
3297 iq2000
/libsim.a
: $(iq2000_libsim_a_OBJECTS
) $(iq2000_libsim_a_DEPENDENCIES
) $(EXTRA_iq2000_libsim_a_DEPENDENCIES
) iq2000
/$(am__dirstamp
)
3298 $(AM_V_at
)-rm -f iq2000
/libsim.a
3299 $(AM_V_AR
)$(iq2000_libsim_a_AR
) iq2000
/libsim.a
$(iq2000_libsim_a_OBJECTS
) $(iq2000_libsim_a_LIBADD
)
3300 $(AM_V_at
)$(RANLIB
) iq2000
/libsim.a
3301 lm32
/$(am__dirstamp
):
3303 @
: > lm32
/$(am__dirstamp
)
3305 lm32
/libsim.a
: $(lm32_libsim_a_OBJECTS
) $(lm32_libsim_a_DEPENDENCIES
) $(EXTRA_lm32_libsim_a_DEPENDENCIES
) lm32
/$(am__dirstamp
)
3306 $(AM_V_at
)-rm -f lm32
/libsim.a
3307 $(AM_V_AR
)$(lm32_libsim_a_AR
) lm32
/libsim.a
$(lm32_libsim_a_OBJECTS
) $(lm32_libsim_a_LIBADD
)
3308 $(AM_V_at
)$(RANLIB
) lm32
/libsim.a
3309 m32c
/$(am__dirstamp
):
3311 @
: > m32c
/$(am__dirstamp
)
3313 m32c
/libsim.a
: $(m32c_libsim_a_OBJECTS
) $(m32c_libsim_a_DEPENDENCIES
) $(EXTRA_m32c_libsim_a_DEPENDENCIES
) m32c
/$(am__dirstamp
)
3314 $(AM_V_at
)-rm -f m32c
/libsim.a
3315 $(AM_V_AR
)$(m32c_libsim_a_AR
) m32c
/libsim.a
$(m32c_libsim_a_OBJECTS
) $(m32c_libsim_a_LIBADD
)
3316 $(AM_V_at
)$(RANLIB
) m32c
/libsim.a
3317 m32r
/$(am__dirstamp
):
3319 @
: > m32r
/$(am__dirstamp
)
3321 m32r
/libsim.a
: $(m32r_libsim_a_OBJECTS
) $(m32r_libsim_a_DEPENDENCIES
) $(EXTRA_m32r_libsim_a_DEPENDENCIES
) m32r
/$(am__dirstamp
)
3322 $(AM_V_at
)-rm -f m32r
/libsim.a
3323 $(AM_V_AR
)$(m32r_libsim_a_AR
) m32r
/libsim.a
$(m32r_libsim_a_OBJECTS
) $(m32r_libsim_a_LIBADD
)
3324 $(AM_V_at
)$(RANLIB
) m32r
/libsim.a
3325 m68hc11
/$(am__dirstamp
):
3327 @
: > m68hc11
/$(am__dirstamp
)
3329 m68hc11
/libsim.a
: $(m68hc11_libsim_a_OBJECTS
) $(m68hc11_libsim_a_DEPENDENCIES
) $(EXTRA_m68hc11_libsim_a_DEPENDENCIES
) m68hc11
/$(am__dirstamp
)
3330 $(AM_V_at
)-rm -f m68hc11
/libsim.a
3331 $(AM_V_AR
)$(m68hc11_libsim_a_AR
) m68hc11
/libsim.a
$(m68hc11_libsim_a_OBJECTS
) $(m68hc11_libsim_a_LIBADD
)
3332 $(AM_V_at
)$(RANLIB
) m68hc11
/libsim.a
3333 mcore
/$(am__dirstamp
):
3335 @
: > mcore
/$(am__dirstamp
)
3337 mcore
/libsim.a
: $(mcore_libsim_a_OBJECTS
) $(mcore_libsim_a_DEPENDENCIES
) $(EXTRA_mcore_libsim_a_DEPENDENCIES
) mcore
/$(am__dirstamp
)
3338 $(AM_V_at
)-rm -f mcore
/libsim.a
3339 $(AM_V_AR
)$(mcore_libsim_a_AR
) mcore
/libsim.a
$(mcore_libsim_a_OBJECTS
) $(mcore_libsim_a_LIBADD
)
3340 $(AM_V_at
)$(RANLIB
) mcore
/libsim.a
3341 microblaze
/$(am__dirstamp
):
3342 @
$(MKDIR_P
) microblaze
3343 @
: > microblaze
/$(am__dirstamp
)
3345 microblaze
/libsim.a
: $(microblaze_libsim_a_OBJECTS
) $(microblaze_libsim_a_DEPENDENCIES
) $(EXTRA_microblaze_libsim_a_DEPENDENCIES
) microblaze
/$(am__dirstamp
)
3346 $(AM_V_at
)-rm -f microblaze
/libsim.a
3347 $(AM_V_AR
)$(microblaze_libsim_a_AR
) microblaze
/libsim.a
$(microblaze_libsim_a_OBJECTS
) $(microblaze_libsim_a_LIBADD
)
3348 $(AM_V_at
)$(RANLIB
) microblaze
/libsim.a
3349 mips
/$(am__dirstamp
):
3351 @
: > mips
/$(am__dirstamp
)
3353 mips
/libsim.a
: $(mips_libsim_a_OBJECTS
) $(mips_libsim_a_DEPENDENCIES
) $(EXTRA_mips_libsim_a_DEPENDENCIES
) mips
/$(am__dirstamp
)
3354 $(AM_V_at
)-rm -f mips
/libsim.a
3355 $(AM_V_AR
)$(mips_libsim_a_AR
) mips
/libsim.a
$(mips_libsim_a_OBJECTS
) $(mips_libsim_a_LIBADD
)
3356 $(AM_V_at
)$(RANLIB
) mips
/libsim.a
3357 mn10300
/$(am__dirstamp
):
3359 @
: > mn10300
/$(am__dirstamp
)
3361 mn10300
/libsim.a
: $(mn10300_libsim_a_OBJECTS
) $(mn10300_libsim_a_DEPENDENCIES
) $(EXTRA_mn10300_libsim_a_DEPENDENCIES
) mn10300
/$(am__dirstamp
)
3362 $(AM_V_at
)-rm -f mn10300
/libsim.a
3363 $(AM_V_AR
)$(mn10300_libsim_a_AR
) mn10300
/libsim.a
$(mn10300_libsim_a_OBJECTS
) $(mn10300_libsim_a_LIBADD
)
3364 $(AM_V_at
)$(RANLIB
) mn10300
/libsim.a
3365 moxie
/$(am__dirstamp
):
3367 @
: > moxie
/$(am__dirstamp
)
3369 moxie
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) $(moxie_libsim_a_DEPENDENCIES
) $(EXTRA_moxie_libsim_a_DEPENDENCIES
) moxie
/$(am__dirstamp
)
3370 $(AM_V_at
)-rm -f moxie
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3371 $(AM_V_AR
)$(moxie_libsim_a_AR
) moxie
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$(moxie_libsim_a_OBJECTS
) $(moxie_libsim_a_LIBADD
)
3372 $(AM_V_at
)$(RANLIB
) moxie
/libsim.a
3373 msp430
/$(am__dirstamp
):
3375 @
: > msp430
/$(am__dirstamp
)
3377 msp430
/libsim.a
: $(msp430_libsim_a_OBJECTS
) $(msp430_libsim_a_DEPENDENCIES
) $(EXTRA_msp430_libsim_a_DEPENDENCIES
) msp430
/$(am__dirstamp
)
3378 $(AM_V_at
)-rm -f msp430
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3379 $(AM_V_AR
)$(msp430_libsim_a_AR
) msp430
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$(msp430_libsim_a_OBJECTS
) $(msp430_libsim_a_LIBADD
)
3380 $(AM_V_at
)$(RANLIB
) msp430
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3381 or1k
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):
3383 @
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/$(am__dirstamp
)
3385 or1k
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: $(or1k_libsim_a_OBJECTS
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) $(EXTRA_or1k_libsim_a_DEPENDENCIES
) or1k
/$(am__dirstamp
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3386 $(AM_V_at
)-rm -f or1k
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3387 $(AM_V_AR
)$(or1k_libsim_a_AR
) or1k
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$(or1k_libsim_a_OBJECTS
) $(or1k_libsim_a_LIBADD
)
3388 $(AM_V_at
)$(RANLIB
) or1k
/libsim.a
3389 pru
/$(am__dirstamp
):
3391 @
: > pru
/$(am__dirstamp
)
3393 pru
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: $(pru_libsim_a_OBJECTS
) $(pru_libsim_a_DEPENDENCIES
) $(EXTRA_pru_libsim_a_DEPENDENCIES
) pru
/$(am__dirstamp
)
3394 $(AM_V_at
)-rm -f pru
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3395 $(AM_V_AR
)$(pru_libsim_a_AR
) pru
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$(pru_libsim_a_OBJECTS
) $(pru_libsim_a_LIBADD
)
3396 $(AM_V_at
)$(RANLIB
) pru
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3397 riscv
/$(am__dirstamp
):
3399 @
: > riscv
/$(am__dirstamp
)
3401 riscv
/libsim.a
: $(riscv_libsim_a_OBJECTS
) $(riscv_libsim_a_DEPENDENCIES
) $(EXTRA_riscv_libsim_a_DEPENDENCIES
) riscv
/$(am__dirstamp
)
3402 $(AM_V_at
)-rm -f riscv
/libsim.a
3403 $(AM_V_AR
)$(riscv_libsim_a_AR
) riscv
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$(riscv_libsim_a_OBJECTS
) $(riscv_libsim_a_LIBADD
)
3404 $(AM_V_at
)$(RANLIB
) riscv
/libsim.a
3405 rl78
/$(am__dirstamp
):
3407 @
: > rl78
/$(am__dirstamp
)
3409 rl78
/libsim.a
: $(rl78_libsim_a_OBJECTS
) $(rl78_libsim_a_DEPENDENCIES
) $(EXTRA_rl78_libsim_a_DEPENDENCIES
) rl78
/$(am__dirstamp
)
3410 $(AM_V_at
)-rm -f rl78
/libsim.a
3411 $(AM_V_AR
)$(rl78_libsim_a_AR
) rl78
/libsim.a
$(rl78_libsim_a_OBJECTS
) $(rl78_libsim_a_LIBADD
)
3412 $(AM_V_at
)$(RANLIB
) rl78
/libsim.a
3415 @
: > rx
/$(am__dirstamp
)
3417 rx
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: $(rx_libsim_a_OBJECTS
) $(rx_libsim_a_DEPENDENCIES
) $(EXTRA_rx_libsim_a_DEPENDENCIES
) rx
/$(am__dirstamp
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3418 $(AM_V_at
)-rm -f rx
/libsim.a
3419 $(AM_V_AR
)$(rx_libsim_a_AR
) rx
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$(rx_libsim_a_OBJECTS
) $(rx_libsim_a_LIBADD
)
3420 $(AM_V_at
)$(RANLIB
) rx
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3423 @
: > sh
/$(am__dirstamp
)
3425 sh
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: $(sh_libsim_a_OBJECTS
) $(sh_libsim_a_DEPENDENCIES
) $(EXTRA_sh_libsim_a_DEPENDENCIES
) sh
/$(am__dirstamp
)
3426 $(AM_V_at
)-rm -f sh
/libsim.a
3427 $(AM_V_AR
)$(sh_libsim_a_AR
) sh
/libsim.a
$(sh_libsim_a_OBJECTS
) $(sh_libsim_a_LIBADD
)
3428 $(AM_V_at
)$(RANLIB
) sh
/libsim.a
3429 v850
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):
3431 @
: > v850
/$(am__dirstamp
)
3433 v850
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: $(v850_libsim_a_OBJECTS
) $(v850_libsim_a_DEPENDENCIES
) $(EXTRA_v850_libsim_a_DEPENDENCIES
) v850
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)
3434 $(AM_V_at
)-rm -f v850
/libsim.a
3435 $(AM_V_AR
)$(v850_libsim_a_AR
) v850
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$(v850_libsim_a_OBJECTS
) $(v850_libsim_a_LIBADD
)
3436 $(AM_V_at
)$(RANLIB
) v850
/libsim.a
3438 clean-checkPROGRAMS
:
3439 @list
='$(check_PROGRAMS)'; test -n
"$$list" || exit
0; \
3440 echo
" rm -f" $$list; \
3441 rm -f
$$list || exit
$$?
; \
3442 test -n
"$(EXEEXT)" || exit
0; \
3443 list
=`for p in $$list; do echo "$$p"; done | sed 's/$(EXEEXT)$$//'`; \
3444 echo
" rm -f" $$list; \
3447 clean-noinstPROGRAMS
:
3448 @list
='$(noinst_PROGRAMS)'; test -n
"$$list" || exit
0; \
3449 echo
" rm -f" $$list; \
3450 rm -f
$$list || exit
$$?
; \
3451 test -n
"$(EXEEXT)" || exit
0; \
3452 list
=`for p in $$list; do echo "$$p"; done | sed 's/$(EXEEXT)$$//'`; \
3453 echo
" rm -f" $$list; \
3456 aarch64
/run
$(EXEEXT
): $(aarch64_run_OBJECTS
) $(aarch64_run_DEPENDENCIES
) $(EXTRA_aarch64_run_DEPENDENCIES
) aarch64
/$(am__dirstamp
)
3457 @
rm -f aarch64
/run
$(EXEEXT
)
3458 $(AM_V_CCLD
)$(LINK
) $(aarch64_run_OBJECTS
) $(aarch64_run_LDADD
) $(LIBS
)
3460 arm
/run
$(EXEEXT
): $(arm_run_OBJECTS
) $(arm_run_DEPENDENCIES
) $(EXTRA_arm_run_DEPENDENCIES
) arm
/$(am__dirstamp
)
3461 @
rm -f arm
/run
$(EXEEXT
)
3462 $(AM_V_CCLD
)$(LINK
) $(arm_run_OBJECTS
) $(arm_run_LDADD
) $(LIBS
)
3464 avr
/run
$(EXEEXT
): $(avr_run_OBJECTS
) $(avr_run_DEPENDENCIES
) $(EXTRA_avr_run_DEPENDENCIES
) avr
/$(am__dirstamp
)
3465 @
rm -f avr
/run
$(EXEEXT
)
3466 $(AM_V_CCLD
)$(LINK
) $(avr_run_OBJECTS
) $(avr_run_LDADD
) $(LIBS
)
3468 bfin
/run
$(EXEEXT
): $(bfin_run_OBJECTS
) $(bfin_run_DEPENDENCIES
) $(EXTRA_bfin_run_DEPENDENCIES
) bfin
/$(am__dirstamp
)
3469 @
rm -f bfin
/run
$(EXEEXT
)
3470 $(AM_V_CCLD
)$(LINK
) $(bfin_run_OBJECTS
) $(bfin_run_LDADD
) $(LIBS
)
3472 bpf
/run
$(EXEEXT
): $(bpf_run_OBJECTS
) $(bpf_run_DEPENDENCIES
) $(EXTRA_bpf_run_DEPENDENCIES
) bpf
/$(am__dirstamp
)
3473 @
rm -f bpf
/run
$(EXEEXT
)
3474 $(AM_V_CCLD
)$(LINK
) $(bpf_run_OBJECTS
) $(bpf_run_LDADD
) $(LIBS
)
3475 cr16
/$(DEPDIR
)/$(am__dirstamp
):
3476 @
$(MKDIR_P
) cr16
/$(DEPDIR
)
3477 @
: > cr16
/$(DEPDIR
)/$(am__dirstamp
)
3478 cr16
/gencode.
$(OBJEXT
): cr16
/$(am__dirstamp
) \
3479 cr16
/$(DEPDIR
)/$(am__dirstamp
)
3481 @SIM_ENABLE_ARCH_cr16_FALSE@cr16
/gencode
$(EXEEXT
): $(cr16_gencode_OBJECTS
) $(cr16_gencode_DEPENDENCIES
) $(EXTRA_cr16_gencode_DEPENDENCIES
) cr16
/$(am__dirstamp
)
3482 @SIM_ENABLE_ARCH_cr16_FALSE@ @
rm -f cr16
/gencode
$(EXEEXT
)
3483 @SIM_ENABLE_ARCH_cr16_FALSE@
$(AM_V_CCLD
)$(LINK
) $(cr16_gencode_OBJECTS
) $(cr16_gencode_LDADD
) $(LIBS
)
3485 cr16
/run
$(EXEEXT
): $(cr16_run_OBJECTS
) $(cr16_run_DEPENDENCIES
) $(EXTRA_cr16_run_DEPENDENCIES
) cr16
/$(am__dirstamp
)
3486 @
rm -f cr16
/run
$(EXEEXT
)
3487 $(AM_V_CCLD
)$(LINK
) $(cr16_run_OBJECTS
) $(cr16_run_LDADD
) $(LIBS
)
3489 cris
/run
$(EXEEXT
): $(cris_run_OBJECTS
) $(cris_run_DEPENDENCIES
) $(EXTRA_cris_run_DEPENDENCIES
) cris
/$(am__dirstamp
)
3490 @
rm -f cris
/run
$(EXEEXT
)
3491 $(AM_V_CCLD
)$(LINK
) $(cris_run_OBJECTS
) $(cris_run_LDADD
) $(LIBS
)
3492 cris
/$(DEPDIR
)/$(am__dirstamp
):
3493 @
$(MKDIR_P
) cris
/$(DEPDIR
)
3494 @
: > cris
/$(DEPDIR
)/$(am__dirstamp
)
3495 cris
/rvdummy.
$(OBJEXT
): cris
/$(am__dirstamp
) \
3496 cris
/$(DEPDIR
)/$(am__dirstamp
)
3498 cris
/rvdummy
$(EXEEXT
): $(cris_rvdummy_OBJECTS
) $(cris_rvdummy_DEPENDENCIES
) $(EXTRA_cris_rvdummy_DEPENDENCIES
) cris
/$(am__dirstamp
)
3499 @
rm -f cris
/rvdummy
$(EXEEXT
)
3500 $(AM_V_CCLD
)$(LINK
) $(cris_rvdummy_OBJECTS
) $(cris_rvdummy_LDADD
) $(LIBS
)
3501 d10v
/$(DEPDIR
)/$(am__dirstamp
):
3502 @
$(MKDIR_P
) d10v
/$(DEPDIR
)
3503 @
: > d10v
/$(DEPDIR
)/$(am__dirstamp
)
3504 d10v
/gencode.
$(OBJEXT
): d10v
/$(am__dirstamp
) \
3505 d10v
/$(DEPDIR
)/$(am__dirstamp
)
3507 @SIM_ENABLE_ARCH_d10v_FALSE@d10v
/gencode
$(EXEEXT
): $(d10v_gencode_OBJECTS
) $(d10v_gencode_DEPENDENCIES
) $(EXTRA_d10v_gencode_DEPENDENCIES
) d10v
/$(am__dirstamp
)
3508 @SIM_ENABLE_ARCH_d10v_FALSE@ @
rm -f d10v
/gencode
$(EXEEXT
)
3509 @SIM_ENABLE_ARCH_d10v_FALSE@
$(AM_V_CCLD
)$(LINK
) $(d10v_gencode_OBJECTS
) $(d10v_gencode_LDADD
) $(LIBS
)
3511 d10v
/run
$(EXEEXT
): $(d10v_run_OBJECTS
) $(d10v_run_DEPENDENCIES
) $(EXTRA_d10v_run_DEPENDENCIES
) d10v
/$(am__dirstamp
)
3512 @
rm -f d10v
/run
$(EXEEXT
)
3513 $(AM_V_CCLD
)$(LINK
) $(d10v_run_OBJECTS
) $(d10v_run_LDADD
) $(LIBS
)
3515 erc32
/run
$(EXEEXT
): $(erc32_run_OBJECTS
) $(erc32_run_DEPENDENCIES
) $(EXTRA_erc32_run_DEPENDENCIES
) erc32
/$(am__dirstamp
)
3516 @
rm -f erc32
/run
$(EXEEXT
)
3517 $(AM_V_CCLD
)$(LINK
) $(erc32_run_OBJECTS
) $(erc32_run_LDADD
) $(LIBS
)
3518 erc32
/$(DEPDIR
)/$(am__dirstamp
):
3519 @
$(MKDIR_P
) erc32
/$(DEPDIR
)
3520 @
: > erc32
/$(DEPDIR
)/$(am__dirstamp
)
3521 erc32
/sis.
$(OBJEXT
): erc32
/$(am__dirstamp
) \
3522 erc32
/$(DEPDIR
)/$(am__dirstamp
)
3524 @SIM_ENABLE_ARCH_erc32_FALSE@erc32
/sis
$(EXEEXT
): $(erc32_sis_OBJECTS
) $(erc32_sis_DEPENDENCIES
) $(EXTRA_erc32_sis_DEPENDENCIES
) erc32
/$(am__dirstamp
)
3525 @SIM_ENABLE_ARCH_erc32_FALSE@ @
rm -f erc32
/sis
$(EXEEXT
)
3526 @SIM_ENABLE_ARCH_erc32_FALSE@
$(AM_V_CCLD
)$(LINK
) $(erc32_sis_OBJECTS
) $(erc32_sis_LDADD
) $(LIBS
)
3528 example-synacor
/run
$(EXEEXT
): $(example_synacor_run_OBJECTS
) $(example_synacor_run_DEPENDENCIES
) $(EXTRA_example_synacor_run_DEPENDENCIES
) example-synacor
/$(am__dirstamp
)
3529 @
rm -f example-synacor
/run
$(EXEEXT
)
3530 $(AM_V_CCLD
)$(LINK
) $(example_synacor_run_OBJECTS
) $(example_synacor_run_LDADD
) $(LIBS
)
3532 frv
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$(EXEEXT
): $(frv_run_OBJECTS
) $(frv_run_DEPENDENCIES
) $(EXTRA_frv_run_DEPENDENCIES
) frv
/$(am__dirstamp
)
3533 @
rm -f frv
/run
$(EXEEXT
)
3534 $(AM_V_CCLD
)$(LINK
) $(frv_run_OBJECTS
) $(frv_run_LDADD
) $(LIBS
)
3536 ft32
/run
$(EXEEXT
): $(ft32_run_OBJECTS
) $(ft32_run_DEPENDENCIES
) $(EXTRA_ft32_run_DEPENDENCIES
) ft32
/$(am__dirstamp
)
3537 @
rm -f ft32
/run
$(EXEEXT
)
3538 $(AM_V_CCLD
)$(LINK
) $(ft32_run_OBJECTS
) $(ft32_run_LDADD
) $(LIBS
)
3540 h8300
/run
$(EXEEXT
): $(h8300_run_OBJECTS
) $(h8300_run_DEPENDENCIES
) $(EXTRA_h8300_run_DEPENDENCIES
) h8300
/$(am__dirstamp
)
3541 @
rm -f h8300
/run
$(EXEEXT
)
3542 $(AM_V_CCLD
)$(LINK
) $(h8300_run_OBJECTS
) $(h8300_run_LDADD
) $(LIBS
)
3544 igen
/filter$(EXEEXT
): $(igen_filter_OBJECTS
) $(igen_filter_DEPENDENCIES
) $(EXTRA_igen_filter_DEPENDENCIES
) igen
/$(am__dirstamp
)
3545 @
rm -f igen
/filter$(EXEEXT
)
3546 $(AM_V_CCLD
)$(LINK
) $(igen_filter_OBJECTS
) $(igen_filter_LDADD
) $(LIBS
)
3548 igen
/gen
$(EXEEXT
): $(igen_gen_OBJECTS
) $(igen_gen_DEPENDENCIES
) $(EXTRA_igen_gen_DEPENDENCIES
) igen
/$(am__dirstamp
)
3549 @
rm -f igen
/gen
$(EXEEXT
)
3550 $(AM_V_CCLD
)$(LINK
) $(igen_gen_OBJECTS
) $(igen_gen_LDADD
) $(LIBS
)
3551 igen
/igen.
$(OBJEXT
): igen
/$(am__dirstamp
) \
3552 igen
/$(DEPDIR
)/$(am__dirstamp
)
3554 @SIM_ENABLE_IGEN_FALSE@igen
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$(EXEEXT
): $(igen_igen_OBJECTS
) $(igen_igen_DEPENDENCIES
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/$(am__dirstamp
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3555 @SIM_ENABLE_IGEN_FALSE@ @
rm -f igen
/igen
$(EXEEXT
)
3556 @SIM_ENABLE_IGEN_FALSE@
$(AM_V_CCLD
)$(LINK
) $(igen_igen_OBJECTS
) $(igen_igen_LDADD
) $(LIBS
)
3558 igen
/ld-cache
$(EXEEXT
): $(igen_ld_cache_OBJECTS
) $(igen_ld_cache_DEPENDENCIES
) $(EXTRA_igen_ld_cache_DEPENDENCIES
) igen
/$(am__dirstamp
)
3559 @
rm -f igen
/ld-cache
$(EXEEXT
)
3560 $(AM_V_CCLD
)$(LINK
) $(igen_ld_cache_OBJECTS
) $(igen_ld_cache_LDADD
) $(LIBS
)
3562 igen
/ld-decode
$(EXEEXT
): $(igen_ld_decode_OBJECTS
) $(igen_ld_decode_DEPENDENCIES
) $(EXTRA_igen_ld_decode_DEPENDENCIES
) igen
/$(am__dirstamp
)
3563 @
rm -f igen
/ld-decode
$(EXEEXT
)
3564 $(AM_V_CCLD
)$(LINK
) $(igen_ld_decode_OBJECTS
) $(igen_ld_decode_LDADD
) $(LIBS
)
3566 igen
/ld-insn
$(EXEEXT
): $(igen_ld_insn_OBJECTS
) $(igen_ld_insn_DEPENDENCIES
) $(EXTRA_igen_ld_insn_DEPENDENCIES
) igen
/$(am__dirstamp
)
3567 @
rm -f igen
/ld-insn
$(EXEEXT
)
3568 $(AM_V_CCLD
)$(LINK
) $(igen_ld_insn_OBJECTS
) $(igen_ld_insn_LDADD
) $(LIBS
)
3570 igen
/table
$(EXEEXT
): $(igen_table_OBJECTS
) $(igen_table_DEPENDENCIES
) $(EXTRA_igen_table_DEPENDENCIES
) igen
/$(am__dirstamp
)
3571 @
rm -f igen
/table
$(EXEEXT
)
3572 $(AM_V_CCLD
)$(LINK
) $(igen_table_OBJECTS
) $(igen_table_LDADD
) $(LIBS
)
3574 iq2000
/run
$(EXEEXT
): $(iq2000_run_OBJECTS
) $(iq2000_run_DEPENDENCIES
) $(EXTRA_iq2000_run_DEPENDENCIES
) iq2000
/$(am__dirstamp
)
3575 @
rm -f iq2000
/run
$(EXEEXT
)
3576 $(AM_V_CCLD
)$(LINK
) $(iq2000_run_OBJECTS
) $(iq2000_run_LDADD
) $(LIBS
)
3578 lm32
/run
$(EXEEXT
): $(lm32_run_OBJECTS
) $(lm32_run_DEPENDENCIES
) $(EXTRA_lm32_run_DEPENDENCIES
) lm32
/$(am__dirstamp
)
3579 @
rm -f lm32
/run
$(EXEEXT
)
3580 $(AM_V_CCLD
)$(LINK
) $(lm32_run_OBJECTS
) $(lm32_run_LDADD
) $(LIBS
)
3581 m32c
/$(DEPDIR
)/$(am__dirstamp
):
3582 @
$(MKDIR_P
) m32c
/$(DEPDIR
)
3583 @
: > m32c
/$(DEPDIR
)/$(am__dirstamp
)
3584 m32c
/opc2c.
$(OBJEXT
): m32c
/$(am__dirstamp
) \
3585 m32c
/$(DEPDIR
)/$(am__dirstamp
)
3587 @SIM_ENABLE_ARCH_m32c_FALSE@m32c
/opc2c
$(EXEEXT
): $(m32c_opc2c_OBJECTS
) $(m32c_opc2c_DEPENDENCIES
) $(EXTRA_m32c_opc2c_DEPENDENCIES
) m32c
/$(am__dirstamp
)
3588 @SIM_ENABLE_ARCH_m32c_FALSE@ @
rm -f m32c
/opc2c
$(EXEEXT
)
3589 @SIM_ENABLE_ARCH_m32c_FALSE@
$(AM_V_CCLD
)$(LINK
) $(m32c_opc2c_OBJECTS
) $(m32c_opc2c_LDADD
) $(LIBS
)
3591 m32c
/run
$(EXEEXT
): $(m32c_run_OBJECTS
) $(m32c_run_DEPENDENCIES
) $(EXTRA_m32c_run_DEPENDENCIES
) m32c
/$(am__dirstamp
)
3592 @
rm -f m32c
/run
$(EXEEXT
)
3593 $(AM_V_CCLD
)$(LINK
) $(m32c_run_OBJECTS
) $(m32c_run_LDADD
) $(LIBS
)
3595 m32r
/run
$(EXEEXT
): $(m32r_run_OBJECTS
) $(m32r_run_DEPENDENCIES
) $(EXTRA_m32r_run_DEPENDENCIES
) m32r
/$(am__dirstamp
)
3596 @
rm -f m32r
/run
$(EXEEXT
)
3597 $(AM_V_CCLD
)$(LINK
) $(m32r_run_OBJECTS
) $(m32r_run_LDADD
) $(LIBS
)
3598 m68hc11
/$(DEPDIR
)/$(am__dirstamp
):
3599 @
$(MKDIR_P
) m68hc11
/$(DEPDIR
)
3600 @
: > m68hc11
/$(DEPDIR
)/$(am__dirstamp
)
3601 m68hc11
/gencode.
$(OBJEXT
): m68hc11
/$(am__dirstamp
) \
3602 m68hc11
/$(DEPDIR
)/$(am__dirstamp
)
3604 @SIM_ENABLE_ARCH_m68hc11_FALSE@m68hc11
/gencode
$(EXEEXT
): $(m68hc11_gencode_OBJECTS
) $(m68hc11_gencode_DEPENDENCIES
) $(EXTRA_m68hc11_gencode_DEPENDENCIES
) m68hc11
/$(am__dirstamp
)
3605 @SIM_ENABLE_ARCH_m68hc11_FALSE@ @
rm -f m68hc11
/gencode
$(EXEEXT
)
3606 @SIM_ENABLE_ARCH_m68hc11_FALSE@
$(AM_V_CCLD
)$(LINK
) $(m68hc11_gencode_OBJECTS
) $(m68hc11_gencode_LDADD
) $(LIBS
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3910 $(INSTALL_DATA
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" $(MKDIR_P) '$(DESTDIR)$(ppcdocdir)'"; \
3944 $(MKDIR_P
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3947 if
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3952 $(INSTALL_DATA
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3955 uninstall-ppcdocDATA
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3989 if
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3993 echo
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4155 $(TEST_SUITE_LOG
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4212 desc
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test $$maybe_colorize = yes
&& test $$count -gt
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4214 color_start
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4216 color_start
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$$1 "TOTAL:" $$all "$$brg"; \
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4224 result_count
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4225 result_count
$$1 "XFAIL:" $$xfail "$$lgn"; \
4226 result_count
$$1 "FAIL: " $$fail "$$red"; \
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4228 result_count
$$1 "ERROR:" $$error "$$mgn"; \
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$$success; then \
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"$${col}$$br$${std}"; \
4248 echo
"$${col}Testsuite summary for $(PACKAGE_STRING)$${std}"; \
4249 echo
"$${col}$$br$${std}"; \
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4251 echo
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$$success; then
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"$${col}See $(subdir)/$(TEST_SUITE_LOG)$${std}"; \
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test -n
"$(PACKAGE_BUGREPORT)"; then \
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"$${col}Please report to $(PACKAGE_BUGREPORT)$${std}"; \
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rm -f
$$list
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='$(RECHECK_LOGS:.log=.trs)'; test -z
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rm -f
$$list
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test -z
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rm -f
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test -z
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$(EXEEXT
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$$b.log
--trs-file
$$b.trs \
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$(EXEEXT
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"$$f" \
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$$b.log
--trs-file
$$b.trs \
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$$b.log
--trs-file
$$b.trs \
4301 $(am__common_driver_flags
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4309 "$$tst" $(AM_TESTS_FD_REDIRECT
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4310 testsuite
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: testsuite
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$(EXEEXT
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='testsuite/common/alu-tst'; \
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$$b.log
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4315 $(am__common_driver_flags
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4320 $(am__check_pre
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$$b.log
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4325 @am__EXEEXT_TRUE@ @p
='$<'; \
4326 @am__EXEEXT_TRUE@
$(am__set_b
); \
4327 @am__EXEEXT_TRUE@
$(am__check_pre
) $(TEST_LOG_DRIVER
) --test-name
"$$f" \
4328 @am__EXEEXT_TRUE@
--log-file
$$b.log
--trs-file
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4329 @am__EXEEXT_TRUE@
$(am__common_driver_flags
) $(AM_TEST_LOG_DRIVER_FLAGS
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4330 @am__EXEEXT_TRUE@
"$$tst" $(AM_TESTS_FD_REDIRECT
)
4332 $(MAKE
) $(AM_MAKEFLAGS
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4333 $(MAKE
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4334 check: $(BUILT_SOURCES
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4335 $(MAKE
) $(AM_MAKEFLAGS
) check-recursive
4336 all-am
: Makefile
$(LIBRARIES
) $(PROGRAMS
) $(DATA
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4337 installdirs: installdirs-recursive
4339 for
dir in
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4340 test -z
"$$dir" ||
$(MKDIR_P
) "$$dir"; \
4342 install: $(BUILT_SOURCES
)
4343 $(MAKE
) $(AM_MAKEFLAGS
) install-recursive
4344 install-exec
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4345 install-data
: install-data-recursive
4346 uninstall: uninstall-recursive
4349 @
$(MAKE
) $(AM_MAKEFLAGS
) install-exec-am install-data-am
4351 installcheck: installcheck-recursive
4353 if
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4355 install_sh_PROGRAM
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4358 $(MAKE
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4359 install_sh_PROGRAM
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4362 mostlyclean-generic
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rm -f
$(MOSTLYCLEANFILES
)
4364 -test -z
"$(TEST_LOGS)" ||
rm -f
$(TEST_LOGS
)
4365 -test -z
"$(TEST_LOGS:.log=.trs)" ||
rm -f
$(TEST_LOGS
:.log
=.trs
)
4366 -test -z
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rm -f
$(TEST_SUITE_LOG
)
4369 -test -z
"$(CLEANFILES)" ||
rm -f
$(CLEANFILES
)
4372 -test -z
"$(CONFIG_CLEAN_FILES)" ||
rm -f
$(CONFIG_CLEAN_FILES
)
4373 -test .
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test -z
"$(CONFIG_CLEAN_VPATH_FILES)" ||
rm -f
$(CONFIG_CLEAN_VPATH_FILES
)
4374 -rm -f aarch64
/$(am__dirstamp
)
4375 -rm -f arm
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)
4376 -rm -f avr
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4377 -rm -f bfin
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4378 -rm -f bpf
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4379 -rm -f common
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4380 -rm -f common
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4381 -rm -f cr16
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)/$(am__dirstamp
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4382 -rm -f cr16
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4383 -rm -f cris
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)/$(am__dirstamp
)
4384 -rm -f cris
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4385 -rm -f d10v
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)/$(am__dirstamp
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4386 -rm -f d10v
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4387 -rm -f erc32
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)/$(am__dirstamp
)
4388 -rm -f erc32
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4389 -rm -f example-synacor
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)
4390 -rm -f frv
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)
4391 -rm -f ft32
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4392 -rm -f h8300
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)
4393 -rm -f igen
/$(DEPDIR
)/$(am__dirstamp
)
4394 -rm -f igen
/$(am__dirstamp
)
4395 -rm -f iq2000
/$(am__dirstamp
)
4396 -rm -f lm32
/$(am__dirstamp
)
4397 -rm -f m32c
/$(DEPDIR
)/$(am__dirstamp
)
4398 -rm -f m32c
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)
4399 -rm -f m32r
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4400 -rm -f m68hc11
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)/$(am__dirstamp
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/$(am__dirstamp
)
4402 -rm -f mcore
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)
4403 -rm -f microblaze
/$(am__dirstamp
)
4404 -rm -f mips
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)
4405 -rm -f mn10300
/$(am__dirstamp
)
4406 -rm -f moxie
/$(am__dirstamp
)
4407 -rm -f msp430
/$(am__dirstamp
)
4408 -rm -f or1k
/$(am__dirstamp
)
4409 -rm -f ppc
/$(DEPDIR
)/$(am__dirstamp
)
4410 -rm -f ppc
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)
4411 -rm -f pru
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)
4412 -rm -f riscv
/$(am__dirstamp
)
4413 -rm -f rl78
/$(am__dirstamp
)
4414 -rm -f rx
/$(am__dirstamp
)
4415 -rm -f sh
/$(DEPDIR
)/$(am__dirstamp
)
4416 -rm -f sh
/$(am__dirstamp
)
4417 -rm -f testsuite
/common
/$(DEPDIR
)/$(am__dirstamp
)
4418 -rm -f testsuite
/common
/$(am__dirstamp
)
4419 -rm -f v850
/$(am__dirstamp
)
4420 -test -z
"$(DISTCLEANFILES)" ||
rm -f
$(DISTCLEANFILES
)
4422 maintainer-clean-generic
:
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"This command is intended for maintainers to use"
4424 @echo
"it deletes files that may require special tools to rebuild."
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"$(BUILT_SOURCES)" ||
rm -f
$(BUILT_SOURCES
)
4426 clean: clean-recursive
4428 clean-am
: clean-checkPROGRAMS clean-generic clean-libtool \
4429 clean-noinstLIBRARIES clean-noinstPROGRAMS mostlyclean-am
4431 distclean: distclean-recursive
4432 -rm -f
$(am__CONFIG_DISTCLEAN_FILES
)
4433 -rm -rf common
/$(DEPDIR
) cr16
/$(DEPDIR
) cris
/$(DEPDIR
) d10v
/$(DEPDIR
) erc32
/$(DEPDIR
) igen
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)
4435 distclean-am
: clean-am distclean-DEJAGNU distclean-compile \
4436 distclean-generic distclean-hdr distclean-libtool \
4443 html
: html-recursive
4447 info: info-recursive
4451 install-data-am
: install-armdocDATA install-data-local install-dtbDATA \
4452 install-erc32docDATA install-frvdocDATA install-or1kdocDATA \
4453 install-pkgincludeHEADERS install-ppcdocDATA install-rxdocDATA
4455 install-dvi
: install-dvi-recursive
4459 install-exec-am
: install-exec-local
4461 install-html
: install-html-recursive
4465 install-info
: install-info-recursive
4471 install-pdf
: install-pdf-recursive
4475 install-ps
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4481 maintainer-clean
: maintainer-clean-recursive
4482 -rm -f
$(am__CONFIG_DISTCLEAN_FILES
)
4483 -rm -rf
$(top_srcdir
)/autom4te.cache
4484 -rm -rf common
/$(DEPDIR
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) cris
/$(DEPDIR
) d10v
/$(DEPDIR
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/$(DEPDIR
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4488 mostlyclean: mostlyclean-recursive
4490 mostlyclean-am
: mostlyclean-compile mostlyclean-generic \
4501 uninstall-am
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4502 uninstall-erc32docDATA uninstall-frvdocDATA uninstall-local \
4503 uninstall-or1kdocDATA uninstall-pkgincludeHEADERS \
4504 uninstall-ppcdocDATA uninstall-rxdocDATA
4506 .MAKE
: $(am__recursive_targets
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install install-am \
4509 .PHONY
: $(am__recursive_targets
) CTAGS GTAGS TAGS
all all-am \
4510 am--refresh
check check-DEJAGNU check-TESTS check-am
clean \
4511 clean-checkPROGRAMS clean-cscope clean-generic clean-libtool \
4512 clean-noinstLIBRARIES clean-noinstPROGRAMS cscope \
4513 cscopelist-am ctags ctags-am
distclean distclean-DEJAGNU \
4514 distclean-compile distclean-generic distclean-hdr \
4515 distclean-libtool distclean-tags
dvi dvi-am html html-am
info \
4516 info-am
install install-am install-armdocDATA install-data \
4517 install-data-am install-data-local install-dtbDATA install-dvi \
4518 install-dvi-am install-erc32docDATA install-exec \
4519 install-exec-am install-exec-local install-frvdocDATA \
4520 install-html install-html-am install-info install-info-am \
4521 install-man install-or1kdocDATA install-pdf install-pdf-am \
4522 install-pkgincludeHEADERS install-ppcdocDATA install-ps \
4523 install-ps-am install-rxdocDATA install-strip
installcheck \
4524 installcheck-am
installdirs installdirs-am maintainer-clean \
4525 maintainer-clean-generic
mostlyclean mostlyclean-compile \
4526 mostlyclean-generic mostlyclean-libtool pdf pdf-am ps ps-am \
4527 recheck
tags tags-am
uninstall uninstall-am \
4528 uninstall-armdocDATA uninstall-dtbDATA uninstall-erc32docDATA \
4529 uninstall-frvdocDATA uninstall-local uninstall-or1kdocDATA \
4530 uninstall-pkgincludeHEADERS uninstall-ppcdocDATA \
4535 @am__include@ @am__quote@
$(GNULIB_PARENT_DIR
)/gnulib
/Makefile.gnulib.inc@am__quote@
4537 # Generate target constants for newlib/libgloss from its source tree.
4538 # This file is shipped with distributions so we build in the source dir.
4539 # Use `make nltvals' to rebuild.
4542 $(srccom
)/gennltvals.py
--cpp "$(CPP)"
4544 common
/version.c
: common
/version.c-stamp
; @true
4545 common
/version.c-stamp
: $(srcroot
)/gdb
/version.in
$(srcroot
)/bfd
/version.h
$(srcdir)/common
/create-version.sh
4546 $(AM_V_GEN
)$(SHELL
) $(srcdir)/common
/create-version.sh
$(srcroot
)/gdb
$@.tmp
4547 $(AM_V_at
)$(SHELL
) $(srcroot
)/move-if-change
$@.tmp
$(@
:-stamp
=)
4550 # FIXME This is one very simple-minded way of generating the file hw-config.h.
4551 %/hw-config.h
: %/stamp-hw
; @true
4552 %/stamp-hw
: Makefile
4553 $(AM_V_GEN
)set
-e
; \
4555 sim_hw
="$(SIM_HW_DEVICES) $($(@D)_SIM_EXTRA_HW_DEVICES)" ; \
4556 echo
"/* generated by Makefile */" ; \
4557 printf
"extern const struct hw_descriptor dv_%s_descriptor[];\n" $$sim_hw ; \
4558 echo
"const struct hw_descriptor * const hw_descriptors[] = {" ; \
4559 printf
" dv_%s_descriptor,\n" $$sim_hw ; \
4563 $(SHELL
) $(srcroot
)/move-if-change
$@.tmp
$(@D
)/hw-config.h
; \
4565 .PRECIOUS
: %/stamp-hw
4566 %/modules.c
: %/stamp-modules
; @true
4567 %/stamp-modules
: Makefile
4568 $(AM_V_GEN
)set
-e
; \
4569 LANG
=C
; export LANG
; \
4570 LC_ALL
=C
; export LC_ALL
; \
4571 sed
-n
-e
'/^sim_install_/{s/^\(sim_install_[a-z_0-9A-Z]*\).*/\1/;p}' $(GEN_MODULES_C_SRCS
) |
sort >$@.l-tmp
; \
4573 echo
'/* Do not modify this file. */'; \
4574 echo
'/* It is created automatically by the Makefile. */'; \
4575 echo
'#include "libiberty.h"'; \
4576 echo
'#include "sim-module.h"'; \
4577 sed
-e
's:\(.*\):extern MODULE_INIT_FN \1;:' $@.l-tmp
; \
4578 echo
'MODULE_INSTALL_FN * const sim_modules_detected[] = {'; \
4579 sed
-e
's:\(.*\): \1,:' $@.l-tmp
; \
4581 echo
'const int sim_modules_detected_len = ARRAY_SIZE (sim_modules_detected);'; \
4583 $(SHELL
) $(srcroot
)/move-if-change
$@.tmp
$(@D
)/modules.c
; \
4586 .PRECIOUS
: %/stamp-modules
4588 # Alias for developers.
4589 @SIM_ENABLE_IGEN_TRUE@igen
: $(IGEN
)
4591 # These rules are copied from automake, but tweaked to use FOR_BUILD variables.
4592 @SIM_ENABLE_IGEN_TRUE@igen
/libigen.a
: $(igen_libigen_a_OBJECTS
) $(igen_libigen_a_DEPENDENCIES
) $(EXTRA_igen_libigen_a_DEPENDENCIES
) igen
/$(am__dirstamp
)
4593 @SIM_ENABLE_IGEN_TRUE@
$(AM_V_at
)-rm -f
$@
4594 @SIM_ENABLE_IGEN_TRUE@
$(AM_V_AR
)$(AR_FOR_BUILD
) $(ARFLAGS
) $@
$(igen_libigen_a_OBJECTS
) $(igen_libigen_a_LIBADD
)
4595 @SIM_ENABLE_IGEN_TRUE@
$(AM_V_at
)$(RANLIB_FOR_BUILD
) $@
4597 @SIM_ENABLE_IGEN_TRUE@igen
/igen
$(EXEEXT
): $(igen_igen_OBJECTS
) $(igen_igen_DEPENDENCIES
) igen
/$(am__dirstamp
)
4598 @SIM_ENABLE_IGEN_TRUE@
$(AM_V_CCLD
)$(LINK_FOR_BUILD
) $(igen_igen_OBJECTS
) $(igen_igen_LDADD
)
4600 # igen is a build-time only tool. Override the default rules for it.
4601 @SIM_ENABLE_IGEN_TRUE@igen
/%.o
: igen
/%.c
4602 @SIM_ENABLE_IGEN_TRUE@
$(AM_V_CC
)$(COMPILE_FOR_BUILD
) -c
$< -o
$@
4604 # Build some of the files in standalone mode for developers of igen itself.
4605 @SIM_ENABLE_IGEN_TRUE@igen
/%-main.o
: igen
/%.c
4606 @SIM_ENABLE_IGEN_TRUE@
$(AM_V_CC
)$(COMPILE_FOR_BUILD
) -DMAIN
-c
$< -o
$@
4608 site-sim-config.exp
: Makefile
4610 echo
"set SIM_PRIMARY_TARGET \"$(SIM_PRIMARY_TARGET)\""; \
4611 echo
"set builddir \"$(builddir)\""; \
4612 echo
"set srcdir \"$(srcdir)/testsuite\""; \
4613 $(foreach V
,$(SIM_TOOLCHAIN_VARS
),echo
"set $(V) \"$($(V))\"";) \
4616 # Ignore dirs that only contain configuration settings.
4617 check/.
/config
/%.exp
: ; @true
4618 check/config
/%.exp
: ; @true
4619 check/.
/lib
/%.exp
: ; @true
4620 check/lib
/%.exp
: ; @true
4623 $(AM_V_at
)mkdir
-p testsuite
/$*
4624 $(AM_V_RUNTEST
)$(DO_RUNTEST
) --objdir testsuite
/$* --outdir testsuite
/$* $*.exp
4626 check-DEJAGNU-parallel
:
4628 set
-- `cd $(srcdir)/testsuite && find . -name '*.exp' -printf '%P\n' | sed 's:[.]exp$$::'`; \
4629 $(MAKE
) -k
`printf 'check/%s.exp ' $$@`; \
4631 set
-- `printf 'testsuite/%s/ ' $$@`; \
4632 $(SHELL
) $(srcroot
)/contrib
/dg-extract-results.sh \
4633 `find $$@ -maxdepth 1 -name testrun.sum 2>/dev/null | sort` > testrun.sum
; \
4634 $(SHELL
) $(srcroot
)/contrib
/dg-extract-results.sh
-L \
4635 `find $$@ -maxdepth 1 -name testrun.log 2>/dev/null | sort` > testrun.log
; \
4637 $(SED
) -n
'/^.*===.*Summary.*===/,$$p' testrun.sum
; \
4640 check-DEJAGNU-single
:
4641 $(AM_V_RUNTEST
)$(DO_RUNTEST
)
4643 # If running a single job, invoking runtest once is faster & has nicer output.
4644 check-DEJAGNU
: site.exp
4645 $(AM_V_at
)(set
-e
; \
4646 EXPECT
=${EXPECT} ; export EXPECT
; \
4647 runtest
=$(RUNTEST
); \
4648 if
$(SHELL
) -c
"$$runtest --version" > /dev
/null
2>&1; then \
4649 case
"$(MAKEFLAGS)" in \
4650 *-j
*) $(MAKE
) check-DEJAGNU-parallel
;; \
4651 *) $(MAKE
) check-DEJAGNU-single
;; \
4654 echo
"WARNING: could not find \`runtest'" 1>&2; :;\
4657 # These tests are build-time only tools. Override the default rules for them.
4658 testsuite
/common
/%.o
: testsuite
/common
/%.c
4659 $(AM_V_CC
)$(COMPILE_FOR_BUILD
) $(testsuite_common_CPPFLAGS
) -c
$< -o
$@
4661 testsuite
/common
/alu-tst
$(EXEEXT
): $(testsuite_common_alu_tst_OBJECTS
) $(testsuite_common_alu_tst_DEPENDENCIES
) testsuite
/common
/$(am__dirstamp
)
4662 $(AM_V_CCLD
)$(LINK_FOR_BUILD
) $(testsuite_common_alu_tst_OBJECTS
) $(testsuite_common_alu_tst_LDADD
)
4664 testsuite
/common
/fpu-tst
$(EXEEXT
): $(testsuite_common_fpu_tst_OBJECTS
) $(testsuite_common_fpu_tst_DEPENDENCIES
) testsuite
/common
/$(am__dirstamp
)
4665 $(AM_V_CCLD
)$(LINK_FOR_BUILD
) $(testsuite_common_fpu_tst_OBJECTS
) $(testsuite_common_fpu_tst_LDADD
)
4667 testsuite
/common
/bits-gen
$(EXEEXT
): $(testsuite_common_bits_gen_OBJECTS
) $(testsuite_common_bits_gen_DEPENDENCIES
) testsuite
/common
/$(am__dirstamp
)
4668 $(AM_V_CCLD
)$(LINK_FOR_BUILD
) $(testsuite_common_bits_gen_OBJECTS
) $(testsuite_common_bits_gen_LDADD
)
4670 testsuite
/common
/bits32m0
$(EXEEXT
): $(testsuite_common_bits32m0_OBJECTS
) $(testsuite_common_bits32m0_DEPENDENCIES
) testsuite
/common
/$(am__dirstamp
)
4671 $(AM_V_CCLD
)$(LINK_FOR_BUILD
) $(testsuite_common_bits32m0_OBJECTS
) $(testsuite_common_bits32m0_LDADD
)
4673 testsuite
/common
/bits32m0.c
: testsuite
/common
/bits-gen
$(EXEEXT
) testsuite
/common
/bits-tst.c
4674 $(AM_V_GEN
)$< 32 0 big
> $@.tmp
4675 $(AM_V_at
)cat
$(srcdir)/testsuite
/common
/bits-tst.c
>> $@.tmp
4676 $(AM_V_at
)mv
$@.tmp
$@
4678 testsuite
/common
/bits32m31
$(EXEEXT
): $(testsuite_common_bits32m31_OBJECTS
) $(testsuite_common_bits32m31_DEPENDENCIES
) testsuite
/common
/$(am__dirstamp
)
4679 $(AM_V_CCLD
)$(LINK_FOR_BUILD
) $(testsuite_common_bits32m31_OBJECTS
) $(testsuite_common_bits32m31_LDADD
)
4681 testsuite
/common
/bits32m31.c
: testsuite
/common
/bits-gen
$(EXEEXT
) testsuite
/common
/bits-tst.c
4682 $(AM_V_GEN
)$< 32 31 little
> $@.tmp
4683 $(AM_V_at
)cat
$(srcdir)/testsuite
/common
/bits-tst.c
>> $@.tmp
4684 $(AM_V_at
)mv
$@.tmp
$@
4686 testsuite
/common
/bits64m0
$(EXEEXT
): $(testsuite_common_bits64m0_OBJECTS
) $(testsuite_common_bits64m0_DEPENDENCIES
) testsuite
/common
/$(am__dirstamp
)
4687 $(AM_V_CCLD
)$(LINK_FOR_BUILD
) $(testsuite_common_bits64m0_OBJECTS
) $(testsuite_common_bits64m0_LDADD
)
4689 testsuite
/common
/bits64m0.c
: testsuite
/common
/bits-gen
$(EXEEXT
) testsuite
/common
/bits-tst.c
4690 $(AM_V_GEN
)$< 64 0 big
> $@.tmp
4691 $(AM_V_at
)cat
$(srcdir)/testsuite
/common
/bits-tst.c
>> $@.tmp
4692 $(AM_V_at
)mv
$@.tmp
$@
4694 testsuite
/common
/bits64m63
$(EXEEXT
): $(testsuite_common_bits64m63_OBJECTS
) $(testsuite_common_bits64m63_DEPENDENCIES
) testsuite
/common
/$(am__dirstamp
)
4695 $(AM_V_CCLD
)$(LINK_FOR_BUILD
) $(testsuite_common_bits64m63_OBJECTS
) $(testsuite_common_bits64m63_LDADD
)
4697 testsuite
/common
/bits64m63.c
: testsuite
/common
/bits-gen
$(EXEEXT
) testsuite
/common
/bits-tst.c
4698 $(AM_V_GEN
)$< 64 63 little
> $@.tmp
4699 $(AM_V_at
)cat
$(srcdir)/testsuite
/common
/bits-tst.c
>> $@.tmp
4700 $(AM_V_at
)mv
$@.tmp
$@
4701 @SIM_ENABLE_ARCH_aarch64_TRUE@
$(aarch64_libsim_a_OBJECTS
) $(aarch64_libsim_a_LIBADD
): aarch64
/hw-config.h
4703 @SIM_ENABLE_ARCH_aarch64_TRUE@aarch64
/%.o
: common
/%.c
4704 @SIM_ENABLE_ARCH_aarch64_TRUE@
$(AM_V_at
)$(MAKE
) $(AM_MAKEFLAGS
) -C
$(@D
) $(@F
)
4705 @SIM_ENABLE_ARCH_arm_TRUE@
$(arm_libsim_a_OBJECTS
) $(arm_libsim_a_LIBADD
): arm
/hw-config.h
4707 @SIM_ENABLE_ARCH_arm_TRUE@arm
/%.o
: common
/%.c
4708 @SIM_ENABLE_ARCH_arm_TRUE@
$(AM_V_at
)$(MAKE
) $(AM_MAKEFLAGS
) -C
$(@D
) $(@F
)
4709 @SIM_ENABLE_ARCH_avr_TRUE@
$(avr_libsim_a_OBJECTS
) $(avr_libsim_a_LIBADD
): avr
/hw-config.h
4711 @SIM_ENABLE_ARCH_avr_TRUE@avr
/%.o
: common
/%.c
4712 @SIM_ENABLE_ARCH_avr_TRUE@
$(AM_V_at
)$(MAKE
) $(AM_MAKEFLAGS
) -C
$(@D
) $(@F
)
4713 @SIM_ENABLE_ARCH_bfin_TRUE@
$(bfin_libsim_a_OBJECTS
) $(bfin_libsim_a_LIBADD
): bfin
/hw-config.h
4715 @SIM_ENABLE_ARCH_bfin_TRUE@bfin
/%.o
: common
/%.c
4716 @SIM_ENABLE_ARCH_bfin_TRUE@
$(AM_V_at
)$(MAKE
) $(AM_MAKEFLAGS
) -C
$(@D
) $(@F
)
4718 @SIM_ENABLE_ARCH_bfin_TRUE@bfin
/linux-fixed-code.h
: @MAINT@
$(srcdir)/bfin
/linux-fixed-code.s bfin
/local.mk bfin
/$(am__dirstamp
)
4719 @SIM_ENABLE_ARCH_bfin_TRUE@
$(AM_V_GEN
)$(AS_FOR_TARGET_BFIN
) $(srcdir)/bfin
/linux-fixed-code.s
-o bfin
/linux-fixed-code.o
4720 @SIM_ENABLE_ARCH_bfin_TRUE@
$(AM_V_at
)(\
4721 @SIM_ENABLE_ARCH_bfin_TRUE@ set
-e
; \
4722 @SIM_ENABLE_ARCH_bfin_TRUE@ echo
"/* DO NOT EDIT: Autogenerated from linux-fixed-code.s. */"; \
4723 @SIM_ENABLE_ARCH_bfin_TRUE@ echo
"static const unsigned char bfin_linux_fixed_code[] ="; \
4724 @SIM_ENABLE_ARCH_bfin_TRUE@ echo
"{"; \
4725 @SIM_ENABLE_ARCH_bfin_TRUE@
$(OBJDUMP_FOR_TARGET_BFIN
) -d
-z bfin
/linux-fixed-code.o
> $@.dis
; \
4726 @SIM_ENABLE_ARCH_bfin_TRUE@ sed
-n \
4727 @SIM_ENABLE_ARCH_bfin_TRUE@
-e
's:^[^ ]* :0x:' \
4728 @SIM_ENABLE_ARCH_bfin_TRUE@
-e
'/^0x/{s: .*::;s: *$$:,:;s: :, 0x:g;p;}' \
4729 @SIM_ENABLE_ARCH_bfin_TRUE@
$@.dis
; \
4730 @SIM_ENABLE_ARCH_bfin_TRUE@
rm -f
$@.dis
; \
4731 @SIM_ENABLE_ARCH_bfin_TRUE@ echo
"};" \
4732 @SIM_ENABLE_ARCH_bfin_TRUE@
) > $@.tmp
4733 @SIM_ENABLE_ARCH_bfin_TRUE@
$(AM_V_at
)$(SHELL
) $(srcroot
)/move-if-change
$@.tmp
$(srcdir)/bfin
/linux-fixed-code.h
4734 @SIM_ENABLE_ARCH_bfin_TRUE@
$(AM_V_at
)touch
$(srcdir)/bfin
/linux-fixed-code.h
4735 @SIM_ENABLE_ARCH_bpf_TRUE@
$(bpf_libsim_a_OBJECTS
) $(bpf_libsim_a_LIBADD
): bpf
/hw-config.h
4737 @SIM_ENABLE_ARCH_bpf_TRUE@bpf
/%.o
: common
/%.c
4738 @SIM_ENABLE_ARCH_bpf_TRUE@
$(AM_V_at
)$(MAKE
) $(AM_MAKEFLAGS
) -C
$(@D
) $(@F
)
4739 @SIM_ENABLE_ARCH_bpf_TRUE@bpf
/modules.c
: |
$(bpf_BUILD_OUTPUTS
)
4741 @SIM_ENABLE_ARCH_bpf_TRUE@bpf
/mloop-le.c bpf
/eng-le.h
: bpf
/stamp-mloop-le
; @true
4742 @SIM_ENABLE_ARCH_bpf_TRUE@bpf
/stamp-mloop-le
: $(srccom
)/genmloop.sh bpf
/mloop.in
4743 @SIM_ENABLE_ARCH_bpf_TRUE@
$(AM_V_GEN
)$(SHELL
) $(srccom
)/genmloop.sh
-shell $(SHELL
) \
4744 @SIM_ENABLE_ARCH_bpf_TRUE@
-mono
-scache
-prefix bpfbf_ebpfle
-cpu bpfbf \
4745 @SIM_ENABLE_ARCH_bpf_TRUE@
-infile
$(srcdir)/bpf
/mloop.in \
4746 @SIM_ENABLE_ARCH_bpf_TRUE@
-outfile-prefix bpf
/ -outfile-suffix
-le
4747 @SIM_ENABLE_ARCH_bpf_TRUE@
$(AM_V_at
)$(SHELL
) $(srcroot
)/move-if-change bpf
/eng-le.hin bpf
/eng-le.h
4748 @SIM_ENABLE_ARCH_bpf_TRUE@
$(AM_V_at
)$(SHELL
) $(srcroot
)/move-if-change bpf
/mloop-le.cin bpf
/mloop-le.c
4749 @SIM_ENABLE_ARCH_bpf_TRUE@
$(AM_V_at
)touch
$@
4751 @SIM_ENABLE_ARCH_bpf_TRUE@bpf
/mloop-be.c bpf
/eng-be.h
: bpf
/stamp-mloop-be
; @true
4752 @SIM_ENABLE_ARCH_bpf_TRUE@bpf
/stamp-mloop-be
: $(srccom
)/genmloop.sh bpf
/mloop.in
4753 @SIM_ENABLE_ARCH_bpf_TRUE@
$(AM_V_GEN
)$(SHELL
) $(srccom
)/genmloop.sh
-shell $(SHELL
) \
4754 @SIM_ENABLE_ARCH_bpf_TRUE@
-mono
-scache
-prefix bpfbf_ebpfbe
-cpu bpfbf \
4755 @SIM_ENABLE_ARCH_bpf_TRUE@
-infile
$(srcdir)/bpf
/mloop.in \
4756 @SIM_ENABLE_ARCH_bpf_TRUE@
-outfile-prefix bpf
/ -outfile-suffix
-be
4757 @SIM_ENABLE_ARCH_bpf_TRUE@
$(AM_V_at
)$(SHELL
) $(srcroot
)/move-if-change bpf
/eng-be.hin bpf
/eng-be.h
4758 @SIM_ENABLE_ARCH_bpf_TRUE@
$(AM_V_at
)$(SHELL
) $(srcroot
)/move-if-change bpf
/mloop-be.cin bpf
/mloop-be.c
4759 @SIM_ENABLE_ARCH_bpf_TRUE@
$(AM_V_at
)touch
$@
4761 @SIM_ENABLE_ARCH_bpf_TRUE@bpf
/cgen
: bpf
/cgen-arch bpf
/cgen-cpu bpf
/cgen-defs-le bpf
/cgen-defs-be bpf
/cgen-decode-le bpf
/cgen-decode-be
4763 @SIM_ENABLE_ARCH_bpf_TRUE@bpf
/cgen-arch
:
4764 @SIM_ENABLE_ARCH_bpf_TRUE@
$(AM_V_GEN
)mach
=bpf cpu
=bpfbf FLAGS
="with-scache"; $(CGEN_GEN_ARCH
)
4765 @SIM_ENABLE_ARCH_bpf_TRUE@bpf
/arch.h bpf
/arch.c bpf
/cpuall.h
: @CGEN_MAINT@ bpf
/cgen-arch
4767 @SIM_ENABLE_ARCH_bpf_TRUE@bpf
/cgen-cpu
:
4768 @SIM_ENABLE_ARCH_bpf_TRUE@
$(AM_V_GEN
)isa
=ebpfle
,ebpfbe cpu
=bpfbf mach
=bpf FLAGS
="with-multiple-isa with-scache"; $(CGEN_GEN_CPU
)
4769 @SIM_ENABLE_ARCH_bpf_TRUE@
$(AM_V_at
)rm -f
$(srcdir)/bpf
/model.c
4770 @SIM_ENABLE_ARCH_bpf_TRUE@bpf
/cpu.h bpf
/cpu.c bpf
/model.c
: @CGEN_MAINT@ bpf
/cgen-cpu
4772 @SIM_ENABLE_ARCH_bpf_TRUE@bpf
/cgen-defs-le
:
4773 @SIM_ENABLE_ARCH_bpf_TRUE@
$(AM_V_GEN
)isa
=ebpfle cpu
=bpfbf mach
=bpf FLAGS
="with-scache" SUFFIX
="-le"; $(CGEN_GEN_DEFS
)
4774 @SIM_ENABLE_ARCH_bpf_TRUE@bpf
/defs-le.h
: @CGEN_MAINT@ bpf
/cgen-defs-le
4776 @SIM_ENABLE_ARCH_bpf_TRUE@bpf
/cgen-defs-be
:
4777 @SIM_ENABLE_ARCH_bpf_TRUE@
$(AM_V_GEN
)isa
=ebpfbe cpu
=bpfbf mach
=bpf FLAGS
="with-scache" SUFFIX
="-be"; $(CGEN_GEN_DEFS
)
4778 @SIM_ENABLE_ARCH_bpf_TRUE@bpf
/defs-be.h
: @CGEN_MAINT@ bpf
/cgen-defs-be
4780 @SIM_ENABLE_ARCH_bpf_TRUE@bpf
/cgen-decode-le
:
4781 @SIM_ENABLE_ARCH_bpf_TRUE@
$(AM_V_GEN
)isa
=ebpfle cpu
=bpfbf mach
=bpf FLAGS
="with-scache" SUFFIX
="-le" EXTRAFILES
="$(CGEN_CPU_SEM)"; $(CGEN_GEN_DECODE
)
4782 @SIM_ENABLE_ARCH_bpf_TRUE@bpf
/sem-le.c bpf
/decode-le.c bpf
/decode-le.h
: @CGEN_MAINT@ bpf
/cgen-decode-vle
4784 @SIM_ENABLE_ARCH_bpf_TRUE@bpf
/cgen-decode-be
:
4785 @SIM_ENABLE_ARCH_bpf_TRUE@
$(AM_V_GEN
)isa
=ebpfbe cpu
=bpfbf mach
=bpf FLAGS
="with-scache" SUFFIX
="-be" EXTRAFILES
="$(CGEN_CPU_SEM)"; $(CGEN_GEN_DECODE
)
4786 @SIM_ENABLE_ARCH_bpf_TRUE@bpf
/sem-be.c bpf
/decode-be.c bpf
/decode-be.h
: @CGEN_MAINT@ bpf
/cgen-decode-be
4787 @SIM_ENABLE_ARCH_cr16_TRUE@
$(cr16_libsim_a_OBJECTS
) $(cr16_libsim_a_LIBADD
): cr16
/hw-config.h
4789 @SIM_ENABLE_ARCH_cr16_TRUE@cr16
/%.o
: common
/%.c
4790 @SIM_ENABLE_ARCH_cr16_TRUE@
$(AM_V_at
)$(MAKE
) $(AM_MAKEFLAGS
) -C
$(@D
) $(@F
)
4791 @SIM_ENABLE_ARCH_cr16_TRUE@cr16
/modules.c
: |
$(cr16_BUILD_OUTPUTS
)
4793 # These rules are copied from automake, but tweaked to use FOR_BUILD variables.
4794 @SIM_ENABLE_ARCH_cr16_TRUE@cr16
/gencode
$(EXEEXT
): $(cr16_gencode_OBJECTS
) $(cr16_gencode_DEPENDENCIES
) cr16
/$(am__dirstamp
)
4795 @SIM_ENABLE_ARCH_cr16_TRUE@
$(AM_V_CCLD
)$(LINK_FOR_BUILD
) $(cr16_gencode_OBJECTS
) $(cr16_gencode_LDADD
)
4797 # gencode is a build-time only tool. Override the default rules for it.
4798 @SIM_ENABLE_ARCH_cr16_TRUE@cr16
/gencode.o
: cr16
/gencode.c
4799 @SIM_ENABLE_ARCH_cr16_TRUE@
$(AM_V_CC
)$(COMPILE_FOR_BUILD
) -c
$< -o
$@
4800 @SIM_ENABLE_ARCH_cr16_TRUE@cr16
/cr16-opc.o
: ..
/opcodes
/cr16-opc.c
4801 @SIM_ENABLE_ARCH_cr16_TRUE@
$(AM_V_CC
)$(COMPILE_FOR_BUILD
) -c
$< -o
$@
4803 @SIM_ENABLE_ARCH_cr16_TRUE@cr16
/simops.h
: cr16
/gencode
$(EXEEXT
)
4804 @SIM_ENABLE_ARCH_cr16_TRUE@
$(AM_V_GEN
)$< -h
>$@
4806 @SIM_ENABLE_ARCH_cr16_TRUE@cr16
/table.c
: cr16
/gencode
$(EXEEXT
)
4807 @SIM_ENABLE_ARCH_cr16_TRUE@
$(AM_V_GEN
)$< >$@
4808 @SIM_ENABLE_ARCH_cris_TRUE@
$(cris_libsim_a_OBJECTS
) $(cris_libsim_a_LIBADD
): cris
/hw-config.h
4810 @SIM_ENABLE_ARCH_cris_TRUE@cris
/%.o
: common
/%.c
4811 @SIM_ENABLE_ARCH_cris_TRUE@
$(AM_V_at
)$(MAKE
) $(AM_MAKEFLAGS
) -C
$(@D
) $(@F
)
4812 @SIM_ENABLE_ARCH_cris_TRUE@cris
/modules.c
: |
$(cris_BUILD_OUTPUTS
)
4814 @SIM_ENABLE_ARCH_cris_TRUE@cris
/mloopv10f.c cris
/engv10.h
: cris
/stamp-mloop-v10f
; @true
4815 @SIM_ENABLE_ARCH_cris_TRUE@cris
/stamp-mloop-v10f
: $(srccom
)/genmloop.sh cris
/mloop.in
4816 @SIM_ENABLE_ARCH_cris_TRUE@
$(AM_V_GEN
)$(SHELL
) $(srccom
)/genmloop.sh
-shell $(SHELL
) \
4817 @SIM_ENABLE_ARCH_cris_TRUE@
-mono
-no-fast
-pbb
-switch semcrisv10f-switch.c \
4818 @SIM_ENABLE_ARCH_cris_TRUE@
-cpu crisv10f \
4819 @SIM_ENABLE_ARCH_cris_TRUE@
-infile
$(srcdir)/cris
/mloop.in
-outfile-prefix cris
/ -outfile-suffix
-v10f
4820 @SIM_ENABLE_ARCH_cris_TRUE@
$(AM_V_at
)$(SHELL
) $(srcroot
)/move-if-change cris
/eng-v10f.hin cris
/engv10.h
4821 @SIM_ENABLE_ARCH_cris_TRUE@
$(AM_V_at
)$(SHELL
) $(srcroot
)/move-if-change cris
/mloop-v10f.cin cris
/mloopv10f.c
4822 @SIM_ENABLE_ARCH_cris_TRUE@
$(AM_V_at
)touch
$@
4824 @SIM_ENABLE_ARCH_cris_TRUE@cris
/mloopv32f.c cris
/engv32.h
: cris
/stamp-mloop-v32f
; @true
4825 @SIM_ENABLE_ARCH_cris_TRUE@cris
/stamp-mloop-v32f
: $(srccom
)/genmloop.sh cris
/mloop.in
4826 @SIM_ENABLE_ARCH_cris_TRUE@
$(AM_V_GEN
)$(SHELL
) $(srccom
)/genmloop.sh
-shell $(SHELL
) \
4827 @SIM_ENABLE_ARCH_cris_TRUE@
-mono
-no-fast
-pbb
-switch semcrisv32f-switch.c \
4828 @SIM_ENABLE_ARCH_cris_TRUE@
-cpu crisv32f \
4829 @SIM_ENABLE_ARCH_cris_TRUE@
-infile
$(srcdir)/cris
/mloop.in
-outfile-prefix cris
/ -outfile-suffix
-v32f
4830 @SIM_ENABLE_ARCH_cris_TRUE@
$(AM_V_at
)$(SHELL
) $(srcroot
)/move-if-change cris
/eng-v32f.hin cris
/engv32.h
4831 @SIM_ENABLE_ARCH_cris_TRUE@
$(AM_V_at
)$(SHELL
) $(srcroot
)/move-if-change cris
/mloop-v32f.cin cris
/mloopv32f.c
4832 @SIM_ENABLE_ARCH_cris_TRUE@
$(AM_V_at
)touch
$@
4834 @SIM_ENABLE_ARCH_cris_TRUE@cris
/cgen
: cris
/cgen-arch cris
/cgen-cpu-decode-v10f cris
/cgen-cpu-decode-v32f
4836 @SIM_ENABLE_ARCH_cris_TRUE@cris
/cgen-arch
:
4837 @SIM_ENABLE_ARCH_cris_TRUE@
$(AM_V_GEN
)mach
=crisv10
,crisv32 FLAGS
="with-scache with-profile=fn"; $(CGEN_GEN_ARCH
)
4838 @SIM_ENABLE_ARCH_cris_TRUE@cris
/arch.h cris
/arch.c cris
/cpuall.h
: @CGEN_MAINT@ cris
/cgen-arch
4840 @SIM_ENABLE_ARCH_cris_TRUE@cris
/cgen-cpu-decode-v10f
:
4841 @SIM_ENABLE_ARCH_cris_TRUE@
$(AM_V_GEN
)cpu
=crisv10f mach
=crisv10 SUFFIX
=v10 FLAGS
="with-scache with-profile=fn" EXTRAFILES
="$(CGEN_CPU_SEMSW)"; $(CGEN_GEN_CPU_DECODE
)
4842 @SIM_ENABLE_ARCH_cris_TRUE@
$(AM_V_at
)$(SHELL
) $(srcroot
)/move-if-change
$(srcdir)/cris
/semv10-switch.c
$(srcdir)/cris
/semcrisv10f-switch.c
4843 @SIM_ENABLE_ARCH_cris_TRUE@cris
/cpuv10.h cris
/cpuv10.c cris
/semcrisv10f-switch.c cris
/modelv10.c cris
/decodev10.c cris
/decodev10.h
: @CGEN_MAINT@ cris
/cgen-cpu-decode-v10f
4845 @SIM_ENABLE_ARCH_cris_TRUE@cris
/cgen-cpu-decode-v32f
:
4846 @SIM_ENABLE_ARCH_cris_TRUE@
$(AM_V_GEN
)cpu
=crisv32f mach
=crisv32 SUFFIX
=v32 FLAGS
="with-scache with-profile=fn" EXTRAFILES
="$(CGEN_CPU_SEMSW)"; $(CGEN_GEN_CPU_DECODE
)
4847 @SIM_ENABLE_ARCH_cris_TRUE@
$(AM_V_at
)$(SHELL
) $(srcroot
)/move-if-change
$(srcdir)/cris
/semv32-switch.c
$(srcdir)/cris
/semcrisv32f-switch.c
4848 @SIM_ENABLE_ARCH_cris_TRUE@cris
/cpuv32.h cris
/cpuv32.c cris
/semcrisv32f-switch.c cris
/modelv32.c cris
/decodev32.c cris
/decodev32.h
: @CGEN_MAINT@ cris
/cgen-cpu-decode-v32f
4849 @SIM_ENABLE_ARCH_d10v_TRUE@
$(d10v_libsim_a_OBJECTS
) $(d10v_libsim_a_LIBADD
): d10v
/hw-config.h
4851 @SIM_ENABLE_ARCH_d10v_TRUE@d10v
/%.o
: common
/%.c
4852 @SIM_ENABLE_ARCH_d10v_TRUE@
$(AM_V_at
)$(MAKE
) $(AM_MAKEFLAGS
) -C
$(@D
) $(@F
)
4853 @SIM_ENABLE_ARCH_d10v_TRUE@d10v
/modules.c
: |
$(d10v_BUILD_OUTPUTS
)
4855 # These rules are copied from automake, but tweaked to use FOR_BUILD variables.
4856 @SIM_ENABLE_ARCH_d10v_TRUE@d10v
/gencode
$(EXEEXT
): $(d10v_gencode_OBJECTS
) $(d10v_gencode_DEPENDENCIES
) d10v
/$(am__dirstamp
)
4857 @SIM_ENABLE_ARCH_d10v_TRUE@
$(AM_V_CCLD
)$(LINK_FOR_BUILD
) $(d10v_gencode_OBJECTS
) $(d10v_gencode_LDADD
)
4859 # gencode is a build-time only tool. Override the default rules for it.
4860 @SIM_ENABLE_ARCH_d10v_TRUE@d10v
/gencode.o
: d10v
/gencode.c
4861 @SIM_ENABLE_ARCH_d10v_TRUE@
$(AM_V_CC
)$(COMPILE_FOR_BUILD
) -c
$< -o
$@
4862 @SIM_ENABLE_ARCH_d10v_TRUE@d10v
/d10v-opc.o
: ..
/opcodes
/d10v-opc.c
4863 @SIM_ENABLE_ARCH_d10v_TRUE@
$(AM_V_CC
)$(COMPILE_FOR_BUILD
) -c
$< -o
$@
4865 @SIM_ENABLE_ARCH_d10v_TRUE@d10v
/simops.h
: d10v
/gencode
$(EXEEXT
)
4866 @SIM_ENABLE_ARCH_d10v_TRUE@
$(AM_V_GEN
)$< -h
>$@
4868 @SIM_ENABLE_ARCH_d10v_TRUE@d10v
/table.c
: d10v
/gencode
$(EXEEXT
)
4869 @SIM_ENABLE_ARCH_d10v_TRUE@
$(AM_V_GEN
)$< >$@
4870 @SIM_ENABLE_ARCH_erc32_TRUE@
$(erc32_libsim_a_OBJECTS
) $(erc32_libsim_a_LIBADD
): erc32
/hw-config.h
4872 @SIM_ENABLE_ARCH_erc32_TRUE@erc32
/%.o
: common
/%.c
4873 @SIM_ENABLE_ARCH_erc32_TRUE@
$(AM_V_at
)$(MAKE
) $(AM_MAKEFLAGS
) -C
$(@D
) $(@F
)
4875 @SIM_ENABLE_ARCH_erc32_TRUE@erc32
/sis
$(EXEEXT
): erc32
/run
$(EXEEXT
)
4876 @SIM_ENABLE_ARCH_erc32_TRUE@
$(AM_V_GEN
)ln
$< $@
2>/dev
/null ||
$(LN_S
) $< $@
2>/dev
/null || cp
-p
$< $@
4877 @SIM_ENABLE_ARCH_erc32_TRUE@sim-
%D-install-exec-local
: installdirs
4878 @SIM_ENABLE_ARCH_erc32_TRUE@
$(AM_V_at
)$(MKDIR_P
) $(DESTDIR
)$(bindir)
4879 @SIM_ENABLE_ARCH_erc32_TRUE@ n
=`echo sis | sed '$(program_transform_name)'`; \
4880 @SIM_ENABLE_ARCH_erc32_TRUE@
$(LIBTOOL
) --mode
=install $(INSTALL_PROGRAM
) erc32
/run
$(EXEEXT
) $(DESTDIR
)$(bindir)/$$n$(EXEEXT
)
4881 @SIM_ENABLE_ARCH_erc32_TRUE@sim-erc32-uninstall-local
:
4882 @SIM_ENABLE_ARCH_erc32_TRUE@
rm -f
$(DESTDIR
)$(bindir)/sis
4883 @SIM_ENABLE_ARCH_examples_TRUE@
$(example_synacor_libsim_a_OBJECTS
) $(example_synacor_libsim_a_LIBADD
): example-synacor
/hw-config.h
4885 @SIM_ENABLE_ARCH_examples_TRUE@example-synacor
/%.o
: common
/%.c
4886 @SIM_ENABLE_ARCH_examples_TRUE@
$(AM_V_at
)$(MAKE
) $(AM_MAKEFLAGS
) -C
$(@D
) $(@F
)
4887 @SIM_ENABLE_ARCH_frv_TRUE@
$(frv_libsim_a_OBJECTS
) $(frv_libsim_a_LIBADD
): frv
/hw-config.h
4889 @SIM_ENABLE_ARCH_frv_TRUE@frv
/%.o
: common
/%.c
4890 @SIM_ENABLE_ARCH_frv_TRUE@
$(AM_V_at
)$(MAKE
) $(AM_MAKEFLAGS
) -C
$(@D
) $(@F
)
4891 @SIM_ENABLE_ARCH_frv_TRUE@frv
/modules.c
: |
$(frv_BUILD_OUTPUTS
)
4893 @SIM_ENABLE_ARCH_frv_TRUE@frv
/mloop.c frv
/eng.h
: frv
/stamp-mloop
; @true
4894 @SIM_ENABLE_ARCH_frv_TRUE@frv
/stamp-mloop
: $(srccom
)/genmloop.sh frv
/mloop.in
4895 @SIM_ENABLE_ARCH_frv_TRUE@
$(AM_V_GEN
)$(SHELL
) $(srccom
)/genmloop.sh
-shell $(SHELL
) \
4896 @SIM_ENABLE_ARCH_frv_TRUE@
-mono
-scache
-parallel-generic-write
-parallel-only \
4897 @SIM_ENABLE_ARCH_frv_TRUE@
-cpu frvbf \
4898 @SIM_ENABLE_ARCH_frv_TRUE@
-infile
$(srcdir)/frv
/mloop.in
-outfile-prefix frv
/
4899 @SIM_ENABLE_ARCH_frv_TRUE@
$(AM_V_at
)$(SHELL
) $(srcroot
)/move-if-change frv
/eng.hin frv
/eng.h
4900 @SIM_ENABLE_ARCH_frv_TRUE@
$(AM_V_at
)$(SHELL
) $(srcroot
)/move-if-change frv
/mloop.cin frv
/mloop.c
4901 @SIM_ENABLE_ARCH_frv_TRUE@
$(AM_V_at
)touch
$@
4903 @SIM_ENABLE_ARCH_frv_TRUE@frv
/cgen
: frv
/cgen-arch frv
/cgen-cpu-decode
4905 @SIM_ENABLE_ARCH_frv_TRUE@frv
/cgen-arch
:
4906 @SIM_ENABLE_ARCH_frv_TRUE@
$(AM_V_GEN
)mach
=all FLAGS
="with-scache"; $(CGEN_GEN_ARCH
)
4907 @SIM_ENABLE_ARCH_frv_TRUE@frv
/arch.h frv
/arch.c frv
/cpuall.h
: @CGEN_MAINT@ frv
/cgen-arch
4909 @SIM_ENABLE_ARCH_frv_TRUE@frv
/cgen-cpu-decode
:
4910 @SIM_ENABLE_ARCH_frv_TRUE@
$(AM_V_GEN
)cpu
=frvbf mach
=frv
,fr550
,fr500
,fr450
,fr400
,tomcat
,simple FLAGS
="with-scache with-profile=fn with-generic-write with-parallel-only" EXTRAFILES
="$(CGEN_CPU_SEM)"; $(CGEN_GEN_CPU_DECODE
)
4911 @SIM_ENABLE_ARCH_frv_TRUE@frv
/cpu.h frv
/sem.c frv
/model.c frv
/decode.c frv
/decode.h
: @CGEN_MAINT@ frv
/cgen-cpu-decode
4912 @SIM_ENABLE_ARCH_ft32_TRUE@
$(ft32_libsim_a_OBJECTS
) $(ft32_libsim_a_LIBADD
): ft32
/hw-config.h
4914 @SIM_ENABLE_ARCH_ft32_TRUE@ft32
/%.o
: common
/%.c
4915 @SIM_ENABLE_ARCH_ft32_TRUE@
$(AM_V_at
)$(MAKE
) $(AM_MAKEFLAGS
) -C
$(@D
) $(@F
)
4916 @SIM_ENABLE_ARCH_h8300_TRUE@
$(h8300_libsim_a_OBJECTS
) $(h8300_libsim_a_LIBADD
): h8300
/hw-config.h
4918 @SIM_ENABLE_ARCH_h8300_TRUE@h8300
/%.o
: common
/%.c
4919 @SIM_ENABLE_ARCH_h8300_TRUE@
$(AM_V_at
)$(MAKE
) $(AM_MAKEFLAGS
) -C
$(@D
) $(@F
)
4920 @SIM_ENABLE_ARCH_iq2000_TRUE@
$(iq2000_libsim_a_OBJECTS
) $(iq2000_libsim_a_LIBADD
): iq2000
/hw-config.h
4922 @SIM_ENABLE_ARCH_iq2000_TRUE@iq2000
/%.o
: common
/%.c
4923 @SIM_ENABLE_ARCH_iq2000_TRUE@
$(AM_V_at
)$(MAKE
) $(AM_MAKEFLAGS
) -C
$(@D
) $(@F
)
4924 @SIM_ENABLE_ARCH_iq2000_TRUE@iq2000
/modules.c
: |
$(iq2000_BUILD_OUTPUTS
)
4926 @SIM_ENABLE_ARCH_iq2000_TRUE@iq2000
/mloop.c iq2000
/eng.h
: iq2000
/stamp-mloop
; @true
4927 @SIM_ENABLE_ARCH_iq2000_TRUE@iq2000
/stamp-mloop
: $(srccom
)/genmloop.sh iq2000
/mloop.in
4928 @SIM_ENABLE_ARCH_iq2000_TRUE@
$(AM_V_GEN
)$(SHELL
) $(srccom
)/genmloop.sh
-shell $(SHELL
) \
4929 @SIM_ENABLE_ARCH_iq2000_TRUE@
-mono
-fast
-pbb
-switch sem-switch.c \
4930 @SIM_ENABLE_ARCH_iq2000_TRUE@
-cpu iq2000bf \
4931 @SIM_ENABLE_ARCH_iq2000_TRUE@
-infile
$(srcdir)/iq2000
/mloop.in
-outfile-prefix iq2000
/
4932 @SIM_ENABLE_ARCH_iq2000_TRUE@
$(AM_V_at
)$(SHELL
) $(srcroot
)/move-if-change iq2000
/eng.hin iq2000
/eng.h
4933 @SIM_ENABLE_ARCH_iq2000_TRUE@
$(AM_V_at
)$(SHELL
) $(srcroot
)/move-if-change iq2000
/mloop.cin iq2000
/mloop.c
4934 @SIM_ENABLE_ARCH_iq2000_TRUE@
$(AM_V_at
)touch
$@
4936 @SIM_ENABLE_ARCH_iq2000_TRUE@iq2000
/cgen
: iq2000
/cgen-arch iq2000
/cgen-cpu-decode
4938 @SIM_ENABLE_ARCH_iq2000_TRUE@iq2000
/cgen-arch
:
4939 @SIM_ENABLE_ARCH_iq2000_TRUE@
$(AM_V_GEN
)mach
=iq2000 FLAGS
="with-scache with-profile=fn"; $(CGEN_GEN_ARCH
)
4940 @SIM_ENABLE_ARCH_iq2000_TRUE@iq2000
/arch.h iq2000
/arch.c iq2000
/cpuall.h
: @CGEN_MAINT@ iq2000
/cgen-arch
4942 @SIM_ENABLE_ARCH_iq2000_TRUE@iq2000
/cgen-cpu-decode
:
4943 @SIM_ENABLE_ARCH_iq2000_TRUE@
$(AM_V_GEN
)cpu
=iq2000bf mach
=iq2000 FLAGS
="with-scache with-profile=fn" EXTRAFILES
="$(CGEN_CPU_SEM) $(CGEN_CPU_SEMSW)"; $(CGEN_GEN_CPU_DECODE
)
4944 @SIM_ENABLE_ARCH_iq2000_TRUE@iq2000
/cpu.h iq2000
/sem.c iq2000
/sem-switch.c iq2000
/model.c iq2000
/decode.c iq2000
/decode.h
: @CGEN_MAINT@ iq2000
/cgen-cpu-decode
4945 @SIM_ENABLE_ARCH_lm32_TRUE@
$(lm32_libsim_a_OBJECTS
) $(lm32_libsim_a_LIBADD
): lm32
/hw-config.h
4947 @SIM_ENABLE_ARCH_lm32_TRUE@lm32
/%.o
: lm32
/%.c
4948 @SIM_ENABLE_ARCH_lm32_TRUE@
$(AM_V_at
)$(MAKE
) $(AM_MAKEFLAGS
) -C
$(@D
) $(@F
)
4950 @SIM_ENABLE_ARCH_lm32_TRUE@lm32
/%.o
: common
/%.c
4951 @SIM_ENABLE_ARCH_lm32_TRUE@
$(AM_V_at
)$(MAKE
) $(AM_MAKEFLAGS
) -C
$(@D
) $(@F
)
4952 @SIM_ENABLE_ARCH_lm32_TRUE@lm32
/modules.c
: |
$(lm32_BUILD_OUTPUTS
)
4954 @SIM_ENABLE_ARCH_lm32_TRUE@lm32
/mloop.c lm32
/eng.h
: lm32
/stamp-mloop
; @true
4955 @SIM_ENABLE_ARCH_lm32_TRUE@lm32
/stamp-mloop
: $(srccom
)/genmloop.sh lm32
/mloop.in
4956 @SIM_ENABLE_ARCH_lm32_TRUE@
$(AM_V_GEN
)$(SHELL
) $(srccom
)/genmloop.sh
-shell $(SHELL
) \
4957 @SIM_ENABLE_ARCH_lm32_TRUE@
-mono
-fast
-pbb
-switch sem-switch.c \
4958 @SIM_ENABLE_ARCH_lm32_TRUE@
-cpu lm32bf \
4959 @SIM_ENABLE_ARCH_lm32_TRUE@
-infile
$(srcdir)/lm32
/mloop.in
-outfile-prefix lm32
/
4960 @SIM_ENABLE_ARCH_lm32_TRUE@
$(AM_V_at
)$(SHELL
) $(srcroot
)/move-if-change lm32
/eng.hin lm32
/eng.h
4961 @SIM_ENABLE_ARCH_lm32_TRUE@
$(AM_V_at
)$(SHELL
) $(srcroot
)/move-if-change lm32
/mloop.cin lm32
/mloop.c
4962 @SIM_ENABLE_ARCH_lm32_TRUE@
$(AM_V_at
)touch
$@
4964 @SIM_ENABLE_ARCH_lm32_TRUE@lm32
/cgen
: lm32
/cgen-arch lm32
/cgen-cpu-decode
4966 @SIM_ENABLE_ARCH_lm32_TRUE@lm32
/cgen-arch
:
4967 @SIM_ENABLE_ARCH_lm32_TRUE@
$(AM_V_GEN
)mach
=all FLAGS
="with-scache with-profile=fn"; $(CGEN_GEN_ARCH
)
4968 @SIM_ENABLE_ARCH_lm32_TRUE@lm32
/arch.h lm32
/arch.c lm32
/cpuall.h
: @CGEN_MAINT@ lm32
/cgen-arch
4970 @SIM_ENABLE_ARCH_lm32_TRUE@lm32
/cgen-cpu-decode
:
4971 @SIM_ENABLE_ARCH_lm32_TRUE@
$(AM_V_GEN
)cpu
=lm32bf mach
=lm32 FLAGS
="with-scache with-profile=fn" EXTRAFILES
="$(CGEN_CPU_SEM) $(CGEN_CPU_SEMSW)"; $(CGEN_GEN_CPU_DECODE
)
4972 @SIM_ENABLE_ARCH_lm32_TRUE@lm32
/cpu.h lm32
/sem.c lm32
/sem-switch.c lm32
/model.c lm32
/decode.c lm32
/decode.h
: @CGEN_MAINT@ lm32
/cgen-cpu-decode
4973 @SIM_ENABLE_ARCH_m32c_TRUE@
$(m32c_libsim_a_OBJECTS
) $(m32c_libsim_a_LIBADD
): m32c
/hw-config.h
4975 @SIM_ENABLE_ARCH_m32c_TRUE@m32c
/%.o
: m32c
/%.c
4976 @SIM_ENABLE_ARCH_m32c_TRUE@
$(AM_V_at
)$(MAKE
) $(AM_MAKEFLAGS
) -C
$(@D
) $(@F
)
4978 @SIM_ENABLE_ARCH_m32c_TRUE@m32c
/%.o
: common
/%.c
4979 @SIM_ENABLE_ARCH_m32c_TRUE@
$(AM_V_at
)$(MAKE
) $(AM_MAKEFLAGS
) -C
$(@D
) $(@F
)
4980 @SIM_ENABLE_ARCH_m32c_TRUE@m32c
/modules.c
: |
$(m32c_BUILD_OUTPUTS
)
4982 # These rules are copied from automake, but tweaked to use FOR_BUILD variables.
4983 @SIM_ENABLE_ARCH_m32c_TRUE@m32c
/opc2c
$(EXEEXT
): $(m32c_opc2c_OBJECTS
) $(m32c_opc2c_DEPENDENCIES
) m32c
/$(am__dirstamp
)
4984 @SIM_ENABLE_ARCH_m32c_TRUE@
$(AM_V_CCLD
)$(LINK_FOR_BUILD
) $(m32c_opc2c_OBJECTS
) $(m32c_opc2c_LDADD
)
4986 # opc2c is a build-time only tool. Override the default rules for it.
4987 @SIM_ENABLE_ARCH_m32c_TRUE@m32c
/opc2c.o
: m32c
/opc2c.c
4988 @SIM_ENABLE_ARCH_m32c_TRUE@
$(AM_V_CC
)$(COMPILE_FOR_BUILD
) -c
$< -o
$@
4990 @SIM_ENABLE_ARCH_m32c_TRUE@m32c
/m32c.c
: m32c
/m32c.opc m32c
/opc2c
$(EXEEXT
)
4991 @SIM_ENABLE_ARCH_m32c_TRUE@
$(AM_V_GEN
)$(m32c_OPC2C_RUN
) -l
$@.log
$< > $@.tmp
4992 @SIM_ENABLE_ARCH_m32c_TRUE@
$(AM_V_at
)mv
$@.tmp
$@
4994 @SIM_ENABLE_ARCH_m32c_TRUE@m32c
/r8c.c
: m32c
/r8c.opc m32c
/opc2c
$(EXEEXT
)
4995 @SIM_ENABLE_ARCH_m32c_TRUE@
$(AM_V_GEN
)$(m32c_OPC2C_RUN
) -l
$@.log
$< > $@.tmp
4996 @SIM_ENABLE_ARCH_m32c_TRUE@
$(AM_V_at
)mv
$@.tmp
$@
4997 @SIM_ENABLE_ARCH_m32r_TRUE@
$(m32r_libsim_a_OBJECTS
) $(m32r_libsim_a_LIBADD
): m32r
/hw-config.h
4999 @SIM_ENABLE_ARCH_m32r_TRUE@m32r
/%.o
: m32r
/%.c
5000 @SIM_ENABLE_ARCH_m32r_TRUE@
$(AM_V_at
)$(MAKE
) $(AM_MAKEFLAGS
) -C
$(@D
) $(@F
)
5002 @SIM_ENABLE_ARCH_m32r_TRUE@m32r
/%.o
: common
/%.c
5003 @SIM_ENABLE_ARCH_m32r_TRUE@
$(AM_V_at
)$(MAKE
) $(AM_MAKEFLAGS
) -C
$(@D
) $(@F
)
5004 @SIM_ENABLE_ARCH_m32r_TRUE@m32r
/modules.c
: |
$(m32r_BUILD_OUTPUTS
)
5006 @SIM_ENABLE_ARCH_m32r_TRUE@m32r
/mloop.c m32r
/eng.h
: m32r
/stamp-mloop
; @true
5007 @SIM_ENABLE_ARCH_m32r_TRUE@m32r
/stamp-mloop
: $(srccom
)/genmloop.sh m32r
/mloop.in
5008 @SIM_ENABLE_ARCH_m32r_TRUE@
$(AM_V_GEN
)$(SHELL
) $(srccom
)/genmloop.sh
-shell $(SHELL
) \
5009 @SIM_ENABLE_ARCH_m32r_TRUE@
-mono
-fast
-pbb
-switch sem-switch.c \
5010 @SIM_ENABLE_ARCH_m32r_TRUE@
-cpu m32rbf \
5011 @SIM_ENABLE_ARCH_m32r_TRUE@
-infile
$(srcdir)/m32r
/mloop.in
-outfile-prefix m32r
/
5012 @SIM_ENABLE_ARCH_m32r_TRUE@
$(AM_V_at
)$(SHELL
) $(srcroot
)/move-if-change m32r
/eng.hin m32r
/eng.h
5013 @SIM_ENABLE_ARCH_m32r_TRUE@
$(AM_V_at
)$(SHELL
) $(srcroot
)/move-if-change m32r
/mloop.cin m32r
/mloop.c
5014 @SIM_ENABLE_ARCH_m32r_TRUE@
$(AM_V_at
)touch
$@
5016 @SIM_ENABLE_ARCH_m32r_TRUE@m32r
/mloopx.c m32r
/engx.h
: m32r
/stamp-mloop
; @true
5017 @SIM_ENABLE_ARCH_m32r_TRUE@m32r
/stamp-mloop-x
: $(srccom
)/genmloop.sh m32r
/mloop.in
5018 @SIM_ENABLE_ARCH_m32r_TRUE@
$(AM_V_GEN
)$(SHELL
) $(srccom
)/genmloop.sh
-shell $(SHELL
) \
5019 @SIM_ENABLE_ARCH_m32r_TRUE@
-mono
-no-fast
-pbb
-parallel-write
-switch semx-switch.c \
5020 @SIM_ENABLE_ARCH_m32r_TRUE@
-cpu m32rxf \
5021 @SIM_ENABLE_ARCH_m32r_TRUE@
-infile
$(srcdir)/m32r
/mloopx.in
-outfile-prefix m32r
/ -outfile-suffix x
5022 @SIM_ENABLE_ARCH_m32r_TRUE@
$(AM_V_at
)$(SHELL
) $(srcroot
)/move-if-change m32r
/engx.hin m32r
/engx.h
5023 @SIM_ENABLE_ARCH_m32r_TRUE@
$(AM_V_at
)$(SHELL
) $(srcroot
)/move-if-change m32r
/mloopx.cin m32r
/mloopx.c
5024 @SIM_ENABLE_ARCH_m32r_TRUE@
$(AM_V_at
)touch
$@
5026 @SIM_ENABLE_ARCH_m32r_TRUE@m32r
/mloop2.c m32r
/eng2.h
: m32r
/stamp-mloop
; @true
5027 @SIM_ENABLE_ARCH_m32r_TRUE@m32r
/stamp-mloop-2
: $(srccom
)/genmloop.sh m32r
/mloop.in
5028 @SIM_ENABLE_ARCH_m32r_TRUE@
$(AM_V_GEN
)$(SHELL
) $(srccom
)/genmloop.sh
-shell $(SHELL
) \
5029 @SIM_ENABLE_ARCH_m32r_TRUE@
-mono
-no-fast
-pbb
-parallel-write
-switch sem2-switch.c \
5030 @SIM_ENABLE_ARCH_m32r_TRUE@
-cpu m32r2f \
5031 @SIM_ENABLE_ARCH_m32r_TRUE@
-infile
$(srcdir)/m32r
/mloop2.in
-outfile-prefix m32r
/ -outfile-suffix
2
5032 @SIM_ENABLE_ARCH_m32r_TRUE@
$(AM_V_at
)$(SHELL
) $(srcroot
)/move-if-change m32r
/eng2.hin m32r
/eng2.h
5033 @SIM_ENABLE_ARCH_m32r_TRUE@
$(AM_V_at
)$(SHELL
) $(srcroot
)/move-if-change m32r
/mloop2.cin m32r
/mloop2.c
5034 @SIM_ENABLE_ARCH_m32r_TRUE@
$(AM_V_at
)touch
$@
5036 @SIM_ENABLE_ARCH_m32r_TRUE@m32r
/cgen
: m32r
/cgen-arch m32r
/cgen-cpu-decode m32r
/cgen-cpu-decode-x m32r
/cgen-cpu-decode-2
5038 @SIM_ENABLE_ARCH_m32r_TRUE@m32r
/cgen-arch
:
5039 @SIM_ENABLE_ARCH_m32r_TRUE@
$(AM_V_GEN
)mach
=all FLAGS
="with-scache with-profile=fn"; $(CGEN_GEN_ARCH
)
5040 @SIM_ENABLE_ARCH_m32r_TRUE@m32r
/arch.h m32r
/arch.c m32r
/cpuall.h
: @CGEN_MAINT@ m32r
/cgen-arch
5042 @SIM_ENABLE_ARCH_m32r_TRUE@m32r
/cgen-cpu-decode
:
5043 @SIM_ENABLE_ARCH_m32r_TRUE@
$(AM_V_GEN
)cpu
=m32rbf mach
=m32r FLAGS
="with-scache with-profile=fn" EXTRAFILES
="$(CGEN_CPU_SEM) $(CGEN_CPU_SEMSW)"; $(CGEN_GEN_CPU_DECODE
)
5044 @SIM_ENABLE_ARCH_m32r_TRUE@m32r
/cpu.h m32r
/sem.c m32r
/sem-switch.c m32r
/model.c m32r
/decode.c m32r
/decode.h
: @CGEN_MAINT@ m32r
/cgen-cpu-decode
5046 @SIM_ENABLE_ARCH_m32r_TRUE@m32r
/cgen-cpu-decode-x
:
5047 @SIM_ENABLE_ARCH_m32r_TRUE@
$(AM_V_GEN
)cpu
=m32rxf mach
=m32rx SUFFIX
=x FLAGS
="with-scache with-profile=fn" EXTRAFILES
="$(CGEN_CPU_SEMSW)"; $(CGEN_GEN_CPU_DECODE
)
5048 @SIM_ENABLE_ARCH_m32r_TRUE@m32r
/cpux.h m32r
/semx-switch.c m32r
/modelx.c m32r
/decodex.c m32r
/decodex.h
: @CGEN_MAINT@ m32r
/cgen-cpu-decode-x
5050 @SIM_ENABLE_ARCH_m32r_TRUE@m32r
/cgen-cpu-decode-2
:
5051 @SIM_ENABLE_ARCH_m32r_TRUE@
$(AM_V_GEN
)cpu
=m32r2f mach
=m32r2 SUFFIX
=2 FLAGS
="with-scache with-profile=fn" EXTRAFILES
="$(CGEN_CPU_SEMSW)"; $(CGEN_GEN_CPU_DECODE
)
5052 @SIM_ENABLE_ARCH_m32r_TRUE@m32r
/cpu2.h m32r
/sem2-switch.c m32r
/model2.c m32r
/decode2.c m32r
/decode2.h
: @CGEN_MAINT@ m32r
/cgen-cpu-decode-2
5053 @SIM_ENABLE_ARCH_m68hc11_TRUE@
$(m68hc11_libsim_a_OBJECTS
) $(m68hc11_libsim_a_LIBADD
): m68hc11
/hw-config.h
5055 @SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11
/%.o
: m68hc11
/%.c
5056 @SIM_ENABLE_ARCH_m68hc11_TRUE@
$(AM_V_at
)$(MAKE
) $(AM_MAKEFLAGS
) -C
$(@D
) $(@F
)
5058 @SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11
/%.o
: common
/%.c
5059 @SIM_ENABLE_ARCH_m68hc11_TRUE@
$(AM_V_at
)$(MAKE
) $(AM_MAKEFLAGS
) -C
$(@D
) $(@F
)
5060 @SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11
/modules.c
: |
$(m68hc11_BUILD_OUTPUTS
)
5062 # These rules are copied from automake, but tweaked to use FOR_BUILD variables.
5063 @SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11
/gencode
$(EXEEXT
): $(m68hc11_gencode_OBJECTS
) $(m68hc11_gencode_DEPENDENCIES
) m68hc11
/$(am__dirstamp
)
5064 @SIM_ENABLE_ARCH_m68hc11_TRUE@
$(AM_V_CCLD
)$(LINK_FOR_BUILD
) $(m68hc11_gencode_OBJECTS
) $(m68hc11_gencode_LDADD
)
5066 # gencode is a build-time only tool. Override the default rules for it.
5067 @SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11
/gencode.o
: m68hc11
/gencode.c
5068 @SIM_ENABLE_ARCH_m68hc11_TRUE@
$(AM_V_CC
)$(COMPILE_FOR_BUILD
) -c
$< -o
$@
5070 @SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11
/m68hc11int.c
: m68hc11
/gencode
$(EXEEXT
)
5071 @SIM_ENABLE_ARCH_m68hc11_TRUE@
$(AM_V_GEN
)$< -m6811
>$@
5073 @SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11
/m68hc12int.c
: m68hc11
/gencode
$(EXEEXT
)
5074 @SIM_ENABLE_ARCH_m68hc11_TRUE@
$(AM_V_GEN
)$< -m6812
>$@
5075 @SIM_ENABLE_ARCH_mcore_TRUE@
$(mcore_libsim_a_OBJECTS
) $(mcore_libsim_a_LIBADD
): mcore
/hw-config.h
5077 @SIM_ENABLE_ARCH_mcore_TRUE@mcore
/%.o
: mcore
/%.c
5078 @SIM_ENABLE_ARCH_mcore_TRUE@
$(AM_V_at
)$(MAKE
) $(AM_MAKEFLAGS
) -C
$(@D
) $(@F
)
5080 @SIM_ENABLE_ARCH_mcore_TRUE@mcore
/%.o
: common
/%.c
5081 @SIM_ENABLE_ARCH_mcore_TRUE@
$(AM_V_at
)$(MAKE
) $(AM_MAKEFLAGS
) -C
$(@D
) $(@F
)
5082 @SIM_ENABLE_ARCH_microblaze_TRUE@
$(microblaze_libsim_a_OBJECTS
) $(microblaze_libsim_a_LIBADD
): microblaze
/hw-config.h
5084 @SIM_ENABLE_ARCH_microblaze_TRUE@microblaze
/%.o
: microblaze
/%.c
5085 @SIM_ENABLE_ARCH_microblaze_TRUE@
$(AM_V_at
)$(MAKE
) $(AM_MAKEFLAGS
) -C
$(@D
) $(@F
)
5087 @SIM_ENABLE_ARCH_microblaze_TRUE@microblaze
/%.o
: common
/%.c
5088 @SIM_ENABLE_ARCH_microblaze_TRUE@
$(AM_V_at
)$(MAKE
) $(AM_MAKEFLAGS
) -C
$(@D
) $(@F
)
5089 @SIM_ENABLE_ARCH_mips_TRUE@
$(mips_libsim_a_OBJECTS
) $(mips_libsim_a_LIBADD
): mips
/hw-config.h
5091 @SIM_ENABLE_ARCH_mips_TRUE@mips
/%.o
: mips
/%.c
5092 @SIM_ENABLE_ARCH_mips_TRUE@
$(AM_V_at
)$(MAKE
) $(AM_MAKEFLAGS
) -C
$(@D
) $(@F
)
5094 @SIM_ENABLE_ARCH_mips_TRUE@mips
/%.o
: common
/%.c
5095 @SIM_ENABLE_ARCH_mips_TRUE@
$(AM_V_at
)$(MAKE
) $(AM_MAKEFLAGS
) -C
$(@D
) $(@F
)
5096 @SIM_ENABLE_ARCH_mips_TRUE@mips
/modules.c
: |
$(mips_BUILD_OUTPUTS
)
5098 @SIM_ENABLE_ARCH_mips_TRUE@
$(mips_BUILT_SRC_FROM_IGEN_ITABLE
): mips
/stamp-igen-itable
5099 @SIM_ENABLE_ARCH_mips_TRUE@
$(mips_BUILT_SRC_FROM_GEN_MODE_SINGLE
): mips
/stamp-gen-mode-single
5100 @SIM_ENABLE_ARCH_mips_TRUE@
$(mips_BUILT_SRC_FROM_GEN_MODE_M16_M16
): mips
/stamp-gen-mode-m16-m16
5101 @SIM_ENABLE_ARCH_mips_TRUE@
$(mips_BUILT_SRC_FROM_GEN_MODE_M16_M32
): mips
/stamp-gen-mode-m16-m32
5102 @SIM_ENABLE_ARCH_mips_TRUE@
$(SIM_MIPS_MULTI_SRC
): mips
/stamp-gen-mode-multi-igen mips
/stamp-gen-mode-multi-run
5104 @SIM_ENABLE_ARCH_mips_TRUE@mips
/stamp-igen-itable
: $(mips_IGEN_INSN
) $(mips_IGEN_INSN_INC
) $(IGEN
)
5105 @SIM_ENABLE_ARCH_mips_TRUE@
$(AM_V_GEN
)$(IGEN_RUN
) \
5106 @SIM_ENABLE_ARCH_mips_TRUE@
$(mips_IGEN_TRACE
) \
5107 @SIM_ENABLE_ARCH_mips_TRUE@
-I
$(srcdir)/mips \
5108 @SIM_ENABLE_ARCH_mips_TRUE@
-Werror \
5109 @SIM_ENABLE_ARCH_mips_TRUE@
-Wnodiscard \
5110 @SIM_ENABLE_ARCH_mips_TRUE@
-Wnowidth \
5111 @SIM_ENABLE_ARCH_mips_TRUE@
-Wnounimplemented \
5112 @SIM_ENABLE_ARCH_mips_TRUE@
$(SIM_MIPS_IGEN_ITABLE_FLAGS
) \
5113 @SIM_ENABLE_ARCH_mips_TRUE@
-G gen-direct-access \
5114 @SIM_ENABLE_ARCH_mips_TRUE@
-G gen-zero-r0 \
5115 @SIM_ENABLE_ARCH_mips_TRUE@
-i
$(mips_IGEN_INSN
) \
5116 @SIM_ENABLE_ARCH_mips_TRUE@
-n itable.h
-ht mips
/itable.h \
5117 @SIM_ENABLE_ARCH_mips_TRUE@
-n itable.c
-t mips
/itable.c
5118 @SIM_ENABLE_ARCH_mips_TRUE@
$(AM_V_at
)touch
$@
5120 @SIM_ENABLE_ARCH_mips_TRUE@mips
/stamp-gen-mode-single
: $(mips_IGEN_INSN
) $(mips_IGEN_INSN_INC
) $(mips_IGEN_DC
) $(IGEN
)
5121 @SIM_ENABLE_ARCH_mips_TRUE@
$(AM_V_GEN
)$(IGEN_RUN
) \
5122 @SIM_ENABLE_ARCH_mips_TRUE@
$(mips_IGEN_TRACE
) \
5123 @SIM_ENABLE_ARCH_mips_TRUE@
-I
$(srcdir)/mips \
5124 @SIM_ENABLE_ARCH_mips_TRUE@
-Werror \
5125 @SIM_ENABLE_ARCH_mips_TRUE@
-Wnodiscard \
5126 @SIM_ENABLE_ARCH_mips_TRUE@
$(SIM_MIPS_SINGLE_FLAGS
) \
5127 @SIM_ENABLE_ARCH_mips_TRUE@
-G gen-direct-access \
5128 @SIM_ENABLE_ARCH_mips_TRUE@
-G gen-zero-r0 \
5129 @SIM_ENABLE_ARCH_mips_TRUE@
-B
32 \
5130 @SIM_ENABLE_ARCH_mips_TRUE@
-H
31 \
5131 @SIM_ENABLE_ARCH_mips_TRUE@
-i
$(mips_IGEN_INSN
) \
5132 @SIM_ENABLE_ARCH_mips_TRUE@
-o
$(mips_IGEN_DC
) \
5133 @SIM_ENABLE_ARCH_mips_TRUE@
-x \
5134 @SIM_ENABLE_ARCH_mips_TRUE@
-n icache.h
-hc mips
/icache.h \
5135 @SIM_ENABLE_ARCH_mips_TRUE@
-n icache.c
-c mips
/icache.c \
5136 @SIM_ENABLE_ARCH_mips_TRUE@
-n semantics.h
-hs mips
/semantics.h \
5137 @SIM_ENABLE_ARCH_mips_TRUE@
-n semantics.c
-s mips
/semantics.c \
5138 @SIM_ENABLE_ARCH_mips_TRUE@
-n idecode.h
-hd mips
/idecode.h \
5139 @SIM_ENABLE_ARCH_mips_TRUE@
-n idecode.c
-d mips
/idecode.c \
5140 @SIM_ENABLE_ARCH_mips_TRUE@
-n model.h
-hm mips
/model.h \
5141 @SIM_ENABLE_ARCH_mips_TRUE@
-n model.c
-m mips
/model.c \
5142 @SIM_ENABLE_ARCH_mips_TRUE@
-n support.h
-hf mips
/support.h \
5143 @SIM_ENABLE_ARCH_mips_TRUE@
-n support.c
-f mips
/support.c \
5144 @SIM_ENABLE_ARCH_mips_TRUE@
-n engine.h
-he mips
/engine.h \
5145 @SIM_ENABLE_ARCH_mips_TRUE@
-n engine.c
-e mips
/engine.c \
5146 @SIM_ENABLE_ARCH_mips_TRUE@
-n irun.c
-r mips
/irun.c
5147 @SIM_ENABLE_ARCH_mips_TRUE@
$(AM_V_at
)touch
$@
5149 @SIM_ENABLE_ARCH_mips_TRUE@mips
/stamp-gen-mode-m16-m16
: $(mips_IGEN_INSN
) $(mips_IGEN_INSN_INC
) $(mips_M16_DC
) $(IGEN
)
5150 @SIM_ENABLE_ARCH_mips_TRUE@
$(AM_V_GEN
)$(IGEN_RUN
) \
5151 @SIM_ENABLE_ARCH_mips_TRUE@
$(mips_IGEN_TRACE
) \
5152 @SIM_ENABLE_ARCH_mips_TRUE@
-I
$(srcdir)/mips \
5153 @SIM_ENABLE_ARCH_mips_TRUE@
-Werror \
5154 @SIM_ENABLE_ARCH_mips_TRUE@
-Wnodiscard \
5155 @SIM_ENABLE_ARCH_mips_TRUE@
$(SIM_MIPS_M16_FLAGS
) \
5156 @SIM_ENABLE_ARCH_mips_TRUE@
-G gen-direct-access \
5157 @SIM_ENABLE_ARCH_mips_TRUE@
-G gen-zero-r0 \
5158 @SIM_ENABLE_ARCH_mips_TRUE@
-B
16 \
5159 @SIM_ENABLE_ARCH_mips_TRUE@
-H
15 \
5160 @SIM_ENABLE_ARCH_mips_TRUE@
-i
$(mips_IGEN_INSN
) \
5161 @SIM_ENABLE_ARCH_mips_TRUE@
-o
$(mips_M16_DC
) \
5162 @SIM_ENABLE_ARCH_mips_TRUE@
-P m16_ \
5163 @SIM_ENABLE_ARCH_mips_TRUE@
-x \
5164 @SIM_ENABLE_ARCH_mips_TRUE@
-n m16_icache.h
-hc mips
/m16_icache.h \
5165 @SIM_ENABLE_ARCH_mips_TRUE@
-n m16_icache.c
-c mips
/m16_icache.c \
5166 @SIM_ENABLE_ARCH_mips_TRUE@
-n m16_semantics.h
-hs mips
/m16_semantics.h \
5167 @SIM_ENABLE_ARCH_mips_TRUE@
-n m16_semantics.c
-s mips
/m16_semantics.c \
5168 @SIM_ENABLE_ARCH_mips_TRUE@
-n m16_idecode.h
-hd mips
/m16_idecode.h \
5169 @SIM_ENABLE_ARCH_mips_TRUE@
-n m16_idecode.c
-d mips
/m16_idecode.c \
5170 @SIM_ENABLE_ARCH_mips_TRUE@
-n m16_model.h
-hm mips
/m16_model.h \
5171 @SIM_ENABLE_ARCH_mips_TRUE@
-n m16_model.c
-m mips
/m16_model.c \
5172 @SIM_ENABLE_ARCH_mips_TRUE@
-n m16_support.h
-hf mips
/m16_support.h \
5173 @SIM_ENABLE_ARCH_mips_TRUE@
-n m16_support.c
-f mips
/m16_support.c
5174 @SIM_ENABLE_ARCH_mips_TRUE@
$(AM_V_at
)touch
$@
5176 @SIM_ENABLE_ARCH_mips_TRUE@mips
/stamp-gen-mode-m16-m32
: $(mips_IGEN_INSN
) $(mips_IGEN_INSN_INC
) $(mips_IGEN_DC
) $(IGEN
)
5177 @SIM_ENABLE_ARCH_mips_TRUE@
$(AM_V_GEN
)$(IGEN_RUN
) \
5178 @SIM_ENABLE_ARCH_mips_TRUE@
$(mips_IGEN_TRACE
) \
5179 @SIM_ENABLE_ARCH_mips_TRUE@
-I
$(srcdir)/mips \
5180 @SIM_ENABLE_ARCH_mips_TRUE@
-Werror \
5181 @SIM_ENABLE_ARCH_mips_TRUE@
-Wnodiscard \
5182 @SIM_ENABLE_ARCH_mips_TRUE@
$(SIM_MIPS_SINGLE_FLAGS
) \
5183 @SIM_ENABLE_ARCH_mips_TRUE@
-G gen-direct-access \
5184 @SIM_ENABLE_ARCH_mips_TRUE@
-G gen-zero-r0 \
5185 @SIM_ENABLE_ARCH_mips_TRUE@
-B
32 \
5186 @SIM_ENABLE_ARCH_mips_TRUE@
-H
31 \
5187 @SIM_ENABLE_ARCH_mips_TRUE@
-i
$(mips_IGEN_INSN
) \
5188 @SIM_ENABLE_ARCH_mips_TRUE@
-o
$(mips_IGEN_DC
) \
5189 @SIM_ENABLE_ARCH_mips_TRUE@
-P m32_ \
5190 @SIM_ENABLE_ARCH_mips_TRUE@
-x \
5191 @SIM_ENABLE_ARCH_mips_TRUE@
-n m32_icache.h
-hc mips
/m32_icache.h \
5192 @SIM_ENABLE_ARCH_mips_TRUE@
-n m32_icache.c
-c mips
/m32_icache.c \
5193 @SIM_ENABLE_ARCH_mips_TRUE@
-n m32_semantics.h
-hs mips
/m32_semantics.h \
5194 @SIM_ENABLE_ARCH_mips_TRUE@
-n m32_semantics.c
-s mips
/m32_semantics.c \
5195 @SIM_ENABLE_ARCH_mips_TRUE@
-n m32_idecode.h
-hd mips
/m32_idecode.h \
5196 @SIM_ENABLE_ARCH_mips_TRUE@
-n m32_idecode.c
-d mips
/m32_idecode.c \
5197 @SIM_ENABLE_ARCH_mips_TRUE@
-n m32_model.h
-hm mips
/m32_model.h \
5198 @SIM_ENABLE_ARCH_mips_TRUE@
-n m32_model.c
-m mips
/m32_model.c \
5199 @SIM_ENABLE_ARCH_mips_TRUE@
-n m32_support.h
-hf mips
/m32_support.h \
5200 @SIM_ENABLE_ARCH_mips_TRUE@
-n m32_support.c
-f mips
/m32_support.c
5201 @SIM_ENABLE_ARCH_mips_TRUE@
$(AM_V_at
)touch
$@
5203 @SIM_ENABLE_ARCH_mips_TRUE@mips
/stamp-gen-mode-multi-igen
: $(mips_IGEN_INSN
) $(mips_IGEN_INSN_INC
) $(mips_IGEN_DC
) $(mips_M16_DC
) $(mips_MICROMIPS32_DC
) $(mips_MICROMIPS16_DC
) $(IGEN
)
5204 @SIM_ENABLE_ARCH_mips_TRUE@
$(AM_V_GEN
)\
5205 @SIM_ENABLE_ARCH_mips_TRUE@ for t in
$(SIM_MIPS_MULTI_IGEN_CONFIGS
); do \
5206 @SIM_ENABLE_ARCH_mips_TRUE@ p
=`echo $${t} | sed -e 's/:.*//'` ; \
5207 @SIM_ENABLE_ARCH_mips_TRUE@ m
=`echo $${t} | sed -e 's/.*:\(.*\):.*/\1/'` ; \
5208 @SIM_ENABLE_ARCH_mips_TRUE@ f
=`echo $${t} | sed -e 's/.*://'` ; \
5209 @SIM_ENABLE_ARCH_mips_TRUE@ case
$${p} in \
5210 @SIM_ENABLE_ARCH_mips_TRUE@ micromips16
*) \
5211 @SIM_ENABLE_ARCH_mips_TRUE@ e
="-B 16 -H 15 -o $(mips_MICROMIPS16_DC) -F 16" ;; \
5212 @SIM_ENABLE_ARCH_mips_TRUE@ micromips32
* | micromips64
*) \
5213 @SIM_ENABLE_ARCH_mips_TRUE@ e
="-B 32 -H 31 -o $(mips_MICROMIPS32_DC) -F $${f}" ;; \
5214 @SIM_ENABLE_ARCH_mips_TRUE@ micromips_m32
*) \
5215 @SIM_ENABLE_ARCH_mips_TRUE@ e
="-B 32 -H 31 -o $(mips_IGEN_DC) -F $${f}"; \
5216 @SIM_ENABLE_ARCH_mips_TRUE@ m
="mips32r2,mips3d,mdmx,dsp,dsp2,smartmips" ;; \
5217 @SIM_ENABLE_ARCH_mips_TRUE@ micromips_m64
*) \
5218 @SIM_ENABLE_ARCH_mips_TRUE@ e
="-B 32 -H 31 -o $(mips_IGEN_DC) -F $${f}"; \
5219 @SIM_ENABLE_ARCH_mips_TRUE@ m
="mips64r2,mips3d,mdmx,dsp,dsp2,smartmips" ;; \
5220 @SIM_ENABLE_ARCH_mips_TRUE@ m16
*) \
5221 @SIM_ENABLE_ARCH_mips_TRUE@ e
="-B 16 -H 15 -o $(mips_M16_DC) -F 16" ;; \
5222 @SIM_ENABLE_ARCH_mips_TRUE@
*) \
5223 @SIM_ENABLE_ARCH_mips_TRUE@ e
="-B 32 -H 31 -o $(mips_IGEN_DC) -F $${f}" ;; \
5224 @SIM_ENABLE_ARCH_mips_TRUE@ esac
; \
5225 @SIM_ENABLE_ARCH_mips_TRUE@
$(IGEN_RUN
) \
5226 @SIM_ENABLE_ARCH_mips_TRUE@
$(mips_IGEN_TRACE
) \
5227 @SIM_ENABLE_ARCH_mips_TRUE@
$${e} \
5228 @SIM_ENABLE_ARCH_mips_TRUE@
-I
$(srcdir)/mips \
5229 @SIM_ENABLE_ARCH_mips_TRUE@
-Werror \
5230 @SIM_ENABLE_ARCH_mips_TRUE@
-Wnodiscard \
5231 @SIM_ENABLE_ARCH_mips_TRUE@
-M
$${m} \
5232 @SIM_ENABLE_ARCH_mips_TRUE@
-G gen-direct-access \
5233 @SIM_ENABLE_ARCH_mips_TRUE@
-G gen-zero-r0 \
5234 @SIM_ENABLE_ARCH_mips_TRUE@
-i
$(mips_IGEN_INSN
) \
5235 @SIM_ENABLE_ARCH_mips_TRUE@
-P
$${p}_ \
5236 @SIM_ENABLE_ARCH_mips_TRUE@
-x \
5237 @SIM_ENABLE_ARCH_mips_TRUE@
-n
$${p}_icache.h
-hc mips
/$${p}_icache.h \
5238 @SIM_ENABLE_ARCH_mips_TRUE@
-n
$${p}_icache.c
-c mips
/$${p}_icache.c \
5239 @SIM_ENABLE_ARCH_mips_TRUE@
-n
$${p}_semantics.h
-hs mips
/$${p}_semantics.h \
5240 @SIM_ENABLE_ARCH_mips_TRUE@
-n
$${p}_semantics.c
-s mips
/$${p}_semantics.c \
5241 @SIM_ENABLE_ARCH_mips_TRUE@
-n
$${p}_idecode.h
-hd mips
/$${p}_idecode.h \
5242 @SIM_ENABLE_ARCH_mips_TRUE@
-n
$${p}_idecode.c
-d mips
/$${p}_idecode.c \
5243 @SIM_ENABLE_ARCH_mips_TRUE@
-n
$${p}_model.h
-hm mips
/$${p}_model.h \
5244 @SIM_ENABLE_ARCH_mips_TRUE@
-n
$${p}_model.c
-m mips
/$${p}_model.c \
5245 @SIM_ENABLE_ARCH_mips_TRUE@
-n
$${p}_support.h
-hf mips
/$${p}_support.h \
5246 @SIM_ENABLE_ARCH_mips_TRUE@
-n
$${p}_support.c
-f mips
/$${p}_support.c \
5247 @SIM_ENABLE_ARCH_mips_TRUE@
-n
$${p}_engine.h
-he mips
/$${p}_engine.h \
5248 @SIM_ENABLE_ARCH_mips_TRUE@
-n
$${p}_engine.c
-e mips
/$${p}_engine.c \
5249 @SIM_ENABLE_ARCH_mips_TRUE@ || exit
; \
5250 @SIM_ENABLE_ARCH_mips_TRUE@ done
5251 @SIM_ENABLE_ARCH_mips_TRUE@
$(AM_V_at
)touch
$@
5253 @SIM_ENABLE_ARCH_mips_TRUE@mips
/stamp-gen-mode-multi-run
: mips
/m16run.c mips
/micromipsrun.c
5254 @SIM_ENABLE_ARCH_mips_TRUE@
$(AM_V_GEN
)\
5255 @SIM_ENABLE_ARCH_mips_TRUE@ for t in
$(SIM_MIPS_MULTI_IGEN_CONFIGS
); do \
5256 @SIM_ENABLE_ARCH_mips_TRUE@ case
$${t} in \
5257 @SIM_ENABLE_ARCH_mips_TRUE@ m16
*) \
5258 @SIM_ENABLE_ARCH_mips_TRUE@ m
=`echo $${t} | sed -e 's/^m16//' -e 's/:.*//'`; \
5259 @SIM_ENABLE_ARCH_mips_TRUE@ o
=mips
/m16
$${m}_run.c
; \
5260 @SIM_ENABLE_ARCH_mips_TRUE@ sed
< $(srcdir)/mips
/m16run.c
> $$o.tmp \
5261 @SIM_ENABLE_ARCH_mips_TRUE@
-e
"s/^sim_/m16$${m}_/" \
5262 @SIM_ENABLE_ARCH_mips_TRUE@
-e
"/include/s/sim-engine/m16$${m}_engine/" \
5263 @SIM_ENABLE_ARCH_mips_TRUE@
-e
"s/m16_/m16$${m}_/" \
5264 @SIM_ENABLE_ARCH_mips_TRUE@
-e
"s/m32_/m32$${m}_/" \
5265 @SIM_ENABLE_ARCH_mips_TRUE@ || exit
1; \
5266 @SIM_ENABLE_ARCH_mips_TRUE@
$(SHELL
) $(srcroot
)/move-if-change
$$o.tmp
$$o; \
5267 @SIM_ENABLE_ARCH_mips_TRUE@
;;\
5268 @SIM_ENABLE_ARCH_mips_TRUE@ micromips32
*) \
5269 @SIM_ENABLE_ARCH_mips_TRUE@ m
=`echo $${t} | sed -e 's/^micromips32//' -e 's/:.*//'`; \
5270 @SIM_ENABLE_ARCH_mips_TRUE@ o
=mips
/micromips
$${m}_run.c
; \
5271 @SIM_ENABLE_ARCH_mips_TRUE@ sed
< $(srcdir)/mips
/micromipsrun.c
> $$o.tmp \
5272 @SIM_ENABLE_ARCH_mips_TRUE@
-e
"s/^sim_/micromips32$${m}_/" \
5273 @SIM_ENABLE_ARCH_mips_TRUE@
-e
"/include/s/sim-engine/micromips32$${m}_engine/" \
5274 @SIM_ENABLE_ARCH_mips_TRUE@
-e
"s/micromips16_/micromips16$${m}_/" \
5275 @SIM_ENABLE_ARCH_mips_TRUE@
-e
"s/micromips32_/micromips32$${m}_/" \
5276 @SIM_ENABLE_ARCH_mips_TRUE@
-e
"s/m32_/m32$${m}_/" \
5277 @SIM_ENABLE_ARCH_mips_TRUE@ || exit
1; \
5278 @SIM_ENABLE_ARCH_mips_TRUE@
$(SHELL
) $(srcroot
)/move-if-change
$$o.tmp
$$o; \
5279 @SIM_ENABLE_ARCH_mips_TRUE@
;;\
5280 @SIM_ENABLE_ARCH_mips_TRUE@ micromips64
*) \
5281 @SIM_ENABLE_ARCH_mips_TRUE@ m
=`echo $${t} | sed -e 's/^micromips64//' -e 's/:.*//'`; \
5282 @SIM_ENABLE_ARCH_mips_TRUE@ o
=mips
/micromips
$${m}_run.c
; \
5283 @SIM_ENABLE_ARCH_mips_TRUE@ sed
< $(srcdir)/mips
/micromipsrun.c
> $$o.tmp \
5284 @SIM_ENABLE_ARCH_mips_TRUE@
-e
"s/^sim_/micromips64$${m}_/" \
5285 @SIM_ENABLE_ARCH_mips_TRUE@
-e
"/include/s/sim-engine/micromips64$${m}_engine/" \
5286 @SIM_ENABLE_ARCH_mips_TRUE@
-e
"s/micromips16_/micromips16$${m}_/" \
5287 @SIM_ENABLE_ARCH_mips_TRUE@
-e
"s/micromips32_/micromips64$${m}_/" \
5288 @SIM_ENABLE_ARCH_mips_TRUE@
-e
"s/m32_/m64$${m}_/" \
5289 @SIM_ENABLE_ARCH_mips_TRUE@ || exit
1; \
5290 @SIM_ENABLE_ARCH_mips_TRUE@
$(SHELL
) $(srcroot
)/move-if-change
$$o.tmp
$$o; \
5291 @SIM_ENABLE_ARCH_mips_TRUE@
;;\
5292 @SIM_ENABLE_ARCH_mips_TRUE@ esac \
5293 @SIM_ENABLE_ARCH_mips_TRUE@ done
5294 @SIM_ENABLE_ARCH_mips_TRUE@
$(AM_V_at
)touch
$@
5295 @SIM_ENABLE_ARCH_mn10300_TRUE@
$(mn10300_libsim_a_OBJECTS
) $(mn10300_libsim_a_LIBADD
): mn10300
/hw-config.h
5297 @SIM_ENABLE_ARCH_mn10300_TRUE@mn10300
/%.o
: mn10300
/%.c
5298 @SIM_ENABLE_ARCH_mn10300_TRUE@
$(AM_V_at
)$(MAKE
) $(AM_MAKEFLAGS
) -C
$(@D
) $(@F
)
5300 @SIM_ENABLE_ARCH_mn10300_TRUE@mn10300
/%.o
: common
/%.c
5301 @SIM_ENABLE_ARCH_mn10300_TRUE@
$(AM_V_at
)$(MAKE
) $(AM_MAKEFLAGS
) -C
$(@D
) $(@F
)
5302 @SIM_ENABLE_ARCH_mn10300_TRUE@mn10300
/modules.c
: |
$(mn10300_BUILD_OUTPUTS
)
5304 @SIM_ENABLE_ARCH_mn10300_TRUE@
$(mn10300_BUILT_SRC_FROM_IGEN
): mn10300
/stamp-igen
5305 @SIM_ENABLE_ARCH_mn10300_TRUE@mn10300
/stamp-igen
: $(mn10300_IGEN_INSN
) $(mn10300_IGEN_INSN_INC
) $(mn10300_IGEN_DC
) $(IGEN
)
5306 @SIM_ENABLE_ARCH_mn10300_TRUE@
$(AM_V_GEN
)$(IGEN_RUN
) \
5307 @SIM_ENABLE_ARCH_mn10300_TRUE@
$(mn10300_IGEN_TRACE
) \
5308 @SIM_ENABLE_ARCH_mn10300_TRUE@
-G gen-direct-access \
5309 @SIM_ENABLE_ARCH_mn10300_TRUE@
-M mn10300
,am33
-G gen-multi-sim
=am33 \
5310 @SIM_ENABLE_ARCH_mn10300_TRUE@
-M am33_2 \
5311 @SIM_ENABLE_ARCH_mn10300_TRUE@
-I
$(srcdir)/mn10300 \
5312 @SIM_ENABLE_ARCH_mn10300_TRUE@
-i
$(mn10300_IGEN_INSN
) \
5313 @SIM_ENABLE_ARCH_mn10300_TRUE@
-o
$(mn10300_IGEN_DC
) \
5314 @SIM_ENABLE_ARCH_mn10300_TRUE@
-x \
5315 @SIM_ENABLE_ARCH_mn10300_TRUE@
-n icache.h
-hc mn10300
/icache.h \
5316 @SIM_ENABLE_ARCH_mn10300_TRUE@
-n icache.c
-c mn10300
/icache.c \
5317 @SIM_ENABLE_ARCH_mn10300_TRUE@
-n semantics.h
-hs mn10300
/semantics.h \
5318 @SIM_ENABLE_ARCH_mn10300_TRUE@
-n semantics.c
-s mn10300
/semantics.c \
5319 @SIM_ENABLE_ARCH_mn10300_TRUE@
-n idecode.h
-hd mn10300
/idecode.h \
5320 @SIM_ENABLE_ARCH_mn10300_TRUE@
-n idecode.c
-d mn10300
/idecode.c \
5321 @SIM_ENABLE_ARCH_mn10300_TRUE@
-n model.h
-hm mn10300
/model.h \
5322 @SIM_ENABLE_ARCH_mn10300_TRUE@
-n model.c
-m mn10300
/model.c \
5323 @SIM_ENABLE_ARCH_mn10300_TRUE@
-n support.h
-hf mn10300
/support.h \
5324 @SIM_ENABLE_ARCH_mn10300_TRUE@
-n support.c
-f mn10300
/support.c \
5325 @SIM_ENABLE_ARCH_mn10300_TRUE@
-n itable.h
-ht mn10300
/itable.h \
5326 @SIM_ENABLE_ARCH_mn10300_TRUE@
-n itable.c
-t mn10300
/itable.c \
5327 @SIM_ENABLE_ARCH_mn10300_TRUE@
-n engine.h
-he mn10300
/engine.h \
5328 @SIM_ENABLE_ARCH_mn10300_TRUE@
-n engine.c
-e mn10300
/engine.c \
5329 @SIM_ENABLE_ARCH_mn10300_TRUE@
-n irun.c
-r mn10300
/irun.c
5330 @SIM_ENABLE_ARCH_mn10300_TRUE@
$(AM_V_at
)touch
$@
5331 @SIM_ENABLE_ARCH_moxie_TRUE@
$(moxie_libsim_a_OBJECTS
) $(moxie_libsim_a_LIBADD
): moxie
/hw-config.h
5333 @SIM_ENABLE_ARCH_moxie_TRUE@moxie
/%.o
: moxie
/%.c
5334 @SIM_ENABLE_ARCH_moxie_TRUE@
$(AM_V_at
)$(MAKE
) $(AM_MAKEFLAGS
) -C
$(@D
) $(@F
)
5336 @SIM_ENABLE_ARCH_moxie_TRUE@moxie
/%.o
: common
/%.c
5337 @SIM_ENABLE_ARCH_moxie_TRUE@
$(AM_V_at
)$(MAKE
) $(AM_MAKEFLAGS
) -C
$(@D
) $(@F
)
5339 @SIM_ENABLE_ARCH_moxie_TRUE@moxie
/moxie-gdb.dtb
: @MAINT@ moxie
/moxie-gdb.dts moxie
/$(am__dirstamp
)
5340 @SIM_ENABLE_ARCH_moxie_TRUE@
$(AM_V_GEN
) \
5341 @SIM_ENABLE_ARCH_moxie_TRUE@ if
test "x$(DTC)" != x
; then \
5342 @SIM_ENABLE_ARCH_moxie_TRUE@
$(DTC
) -O dtb
-o
$@.tmp
${srcdir}/moxie
/moxie-gdb.dts || exit
1; \
5343 @SIM_ENABLE_ARCH_moxie_TRUE@
$(SHELL
) $(srcroot
)/move-if-change
$@.tmp
${srcdir}/moxie
/moxie-gdb.dtb || exit
1; \
5344 @SIM_ENABLE_ARCH_moxie_TRUE@ touch
${srcdir}/moxie
/moxie-gdb.dtb
; \
5345 @SIM_ENABLE_ARCH_moxie_TRUE@
else \
5346 @SIM_ENABLE_ARCH_moxie_TRUE@ echo
"Could not update the moxie-gdb.dtb file because the device "; \
5347 @SIM_ENABLE_ARCH_moxie_TRUE@ echo
"tree compiler tool (dtc) is missing. Install the tool to "; \
5348 @SIM_ENABLE_ARCH_moxie_TRUE@ echo
"update the device tree blob."; \
5349 @SIM_ENABLE_ARCH_moxie_TRUE@ fi
5350 @SIM_ENABLE_ARCH_msp430_TRUE@
$(msp430_libsim_a_OBJECTS
) $(msp430_libsim_a_LIBADD
): msp430
/hw-config.h
5352 @SIM_ENABLE_ARCH_msp430_TRUE@msp430
/%.o
: msp430
/%.c
5353 @SIM_ENABLE_ARCH_msp430_TRUE@
$(AM_V_at
)$(MAKE
) $(AM_MAKEFLAGS
) -C
$(@D
) $(@F
)
5355 @SIM_ENABLE_ARCH_msp430_TRUE@msp430
/%.o
: common
/%.c
5356 @SIM_ENABLE_ARCH_msp430_TRUE@
$(AM_V_at
)$(MAKE
) $(AM_MAKEFLAGS
) -C
$(@D
) $(@F
)
5357 @SIM_ENABLE_ARCH_or1k_TRUE@
$(or1k_libsim_a_OBJECTS
) $(or1k_libsim_a_LIBADD
): or1k
/hw-config.h
5359 @SIM_ENABLE_ARCH_or1k_TRUE@or1k
/%.o
: or1k
/%.c
5360 @SIM_ENABLE_ARCH_or1k_TRUE@
$(AM_V_at
)$(MAKE
) $(AM_MAKEFLAGS
) -C
$(@D
) $(@F
)
5362 @SIM_ENABLE_ARCH_or1k_TRUE@or1k
/%.o
: common
/%.c
5363 @SIM_ENABLE_ARCH_or1k_TRUE@
$(AM_V_at
)$(MAKE
) $(AM_MAKEFLAGS
) -C
$(@D
) $(@F
)
5364 @SIM_ENABLE_ARCH_or1k_TRUE@or1k
/modules.c
: |
$(or1k_BUILD_OUTPUTS
)
5366 @SIM_ENABLE_ARCH_or1k_TRUE@or1k
/mloop.c or1k
/eng.h
: or1k
/stamp-mloop
; @true
5367 @SIM_ENABLE_ARCH_or1k_TRUE@or1k
/stamp-mloop
: $(srccom
)/genmloop.sh or1k
/mloop.in
5368 @SIM_ENABLE_ARCH_or1k_TRUE@
$(AM_V_GEN
)$(SHELL
) $(srccom
)/genmloop.sh
-shell $(SHELL
) \
5369 @SIM_ENABLE_ARCH_or1k_TRUE@
-mono
-fast
-pbb
-switch sem-switch.c \
5370 @SIM_ENABLE_ARCH_or1k_TRUE@
-cpu or1k32bf \
5371 @SIM_ENABLE_ARCH_or1k_TRUE@
-infile
$(srcdir)/or1k
/mloop.in
-outfile-prefix or1k
/
5372 @SIM_ENABLE_ARCH_or1k_TRUE@
$(AM_V_at
)$(SHELL
) $(srcroot
)/move-if-change or1k
/eng.hin or1k
/eng.h
5373 @SIM_ENABLE_ARCH_or1k_TRUE@
$(AM_V_at
)$(SHELL
) $(srcroot
)/move-if-change or1k
/mloop.cin or1k
/mloop.c
5374 @SIM_ENABLE_ARCH_or1k_TRUE@
$(AM_V_at
)touch
$@
5376 @SIM_ENABLE_ARCH_or1k_TRUE@or1k
/cgen
: or1k
/cgen-arch or1k
/cgen-cpu-decode
5378 @SIM_ENABLE_ARCH_or1k_TRUE@or1k
/cgen-arch
:
5379 @SIM_ENABLE_ARCH_or1k_TRUE@
$(AM_V_GEN
)mach
=or32
,or32nd FLAGS
="with-scache"; $(CGEN_GEN_ARCH
)
5380 @SIM_ENABLE_ARCH_or1k_TRUE@or1k
/arch.h or1k
/arch.c or1k
/cpuall.h
: @CGEN_MAINT@ or1k
/cgen-arch
5382 @SIM_ENABLE_ARCH_or1k_TRUE@or1k
/cgen-cpu-decode
:
5383 @SIM_ENABLE_ARCH_or1k_TRUE@
$(AM_V_GEN
)cpu
=or1k32bf mach
=or32
,or32nd FLAGS
="with-scache" EXTRAFILES
="$(CGEN_CPU_SEM) $(CGEN_CPU_SEMSW)"; $(CGEN_GEN_CPU_DECODE
)
5384 @SIM_ENABLE_ARCH_or1k_TRUE@or1k
/cpu.h or1k
/cpu.c or1k
/model.c or1k
/sem.c or1k
/sem-switch.c or1k
/decode.c or1k
/decode.h
: @CGEN_MAINT@ or1k
/cgen-cpu-decode
5386 @SIM_ENABLE_ARCH_ppc_TRUE@ppc
/psim
$(EXEEXT
): ppc
/run
$(EXEEXT
)
5387 @SIM_ENABLE_ARCH_ppc_TRUE@
$(AM_V_GEN
)ln
$< $@
2>/dev
/null ||
$(LN_S
) $< $@
2>/dev
/null || cp
-p
$< $@
5389 @SIM_ENABLE_ARCH_ppc_TRUE@ppc
/%.o
: ppc
/%.c | ppc
/libsim.a
$(SIM_ALL_RECURSIVE_DEPS
)
5390 @SIM_ENABLE_ARCH_ppc_TRUE@
$(MAKE
) $(AM_MAKEFLAGS
) -C
$(@D
) $(@F
)
5392 @SIM_ENABLE_ARCH_ppc_TRUE@ppc
/spreg.c
: @MAINT@ ppc
/ppc-spr-table ppc
/spreg-gen.py ppc
/$(am__dirstamp
)
5393 @SIM_ENABLE_ARCH_ppc_TRUE@
$(AM_V_GEN
)$(srcdir)/ppc
/spreg-gen.py
--source
$@.tmp
5394 @SIM_ENABLE_ARCH_ppc_TRUE@
$(AM_V_at
)$(SHELL
) $(srcroot
)/move-if-change
$@.tmp
$(srcdir)/ppc
/spreg.c
5395 @SIM_ENABLE_ARCH_ppc_TRUE@
$(AM_V_at
)touch
$(srcdir)/ppc
/spreg.c
5397 @SIM_ENABLE_ARCH_ppc_TRUE@ppc
/spreg.h
: @MAINT@ ppc
/ppc-spr-table ppc
/spreg-gen.py ppc
/$(am__dirstamp
)
5398 @SIM_ENABLE_ARCH_ppc_TRUE@
$(AM_V_GEN
)$(srcdir)/ppc
/spreg-gen.py
--header
$@.tmp
5399 @SIM_ENABLE_ARCH_ppc_TRUE@
$(AM_V_at
)$(SHELL
) $(srcroot
)/move-if-change
$@.tmp
$(srcdir)/ppc
/spreg.h
5400 @SIM_ENABLE_ARCH_ppc_TRUE@
$(AM_V_at
)touch
$(srcdir)/ppc
/spreg.h
5401 @SIM_ENABLE_ARCH_pru_TRUE@
$(pru_libsim_a_OBJECTS
) $(pru_libsim_a_LIBADD
): pru
/hw-config.h
5403 @SIM_ENABLE_ARCH_pru_TRUE@pru
/%.o
: pru
/%.c
5404 @SIM_ENABLE_ARCH_pru_TRUE@
$(AM_V_at
)$(MAKE
) $(AM_MAKEFLAGS
) -C
$(@D
) $(@F
)
5406 @SIM_ENABLE_ARCH_pru_TRUE@pru
/%.o
: common
/%.c
5407 @SIM_ENABLE_ARCH_pru_TRUE@
$(AM_V_at
)$(MAKE
) $(AM_MAKEFLAGS
) -C
$(@D
) $(@F
)
5408 @SIM_ENABLE_ARCH_riscv_TRUE@
$(riscv_libsim_a_OBJECTS
) $(riscv_libsim_a_LIBADD
): riscv
/hw-config.h
5410 @SIM_ENABLE_ARCH_riscv_TRUE@riscv
/%.o
: riscv
/%.c
5411 @SIM_ENABLE_ARCH_riscv_TRUE@
$(AM_V_at
)$(MAKE
) $(AM_MAKEFLAGS
) -C
$(@D
) $(@F
)
5413 @SIM_ENABLE_ARCH_riscv_TRUE@riscv
/%.o
: common
/%.c
5414 @SIM_ENABLE_ARCH_riscv_TRUE@
$(AM_V_at
)$(MAKE
) $(AM_MAKEFLAGS
) -C
$(@D
) $(@F
)
5415 @SIM_ENABLE_ARCH_rl78_TRUE@
$(rl78_libsim_a_OBJECTS
) $(rl78_libsim_a_LIBADD
): rl78
/hw-config.h
5417 @SIM_ENABLE_ARCH_rl78_TRUE@rl78
/%.o
: rl78
/%.c
5418 @SIM_ENABLE_ARCH_rl78_TRUE@
$(AM_V_at
)$(MAKE
) $(AM_MAKEFLAGS
) -C
$(@D
) $(@F
)
5420 @SIM_ENABLE_ARCH_rl78_TRUE@rl78
/%.o
: common
/%.c
5421 @SIM_ENABLE_ARCH_rl78_TRUE@
$(AM_V_at
)$(MAKE
) $(AM_MAKEFLAGS
) -C
$(@D
) $(@F
)
5422 @SIM_ENABLE_ARCH_rx_TRUE@
$(rx_libsim_a_OBJECTS
) $(rx_libsim_a_LIBADD
): rx
/hw-config.h
5424 @SIM_ENABLE_ARCH_rx_TRUE@rx
/%.o
: rx
/%.c
5425 @SIM_ENABLE_ARCH_rx_TRUE@
$(AM_V_at
)$(MAKE
) $(AM_MAKEFLAGS
) -C
$(@D
) $(@F
)
5427 @SIM_ENABLE_ARCH_rx_TRUE@rx
/%.o
: common
/%.c
5428 @SIM_ENABLE_ARCH_rx_TRUE@
$(AM_V_at
)$(MAKE
) $(AM_MAKEFLAGS
) -C
$(@D
) $(@F
)
5429 @SIM_ENABLE_ARCH_sh_TRUE@
$(sh_libsim_a_OBJECTS
) $(sh_libsim_a_LIBADD
): sh
/hw-config.h
5431 @SIM_ENABLE_ARCH_sh_TRUE@sh
/%.o
: sh
/%.c
5432 @SIM_ENABLE_ARCH_sh_TRUE@
$(AM_V_at
)$(MAKE
) $(AM_MAKEFLAGS
) -C
$(@D
) $(@F
)
5434 @SIM_ENABLE_ARCH_sh_TRUE@sh
/%.o
: common
/%.c
5435 @SIM_ENABLE_ARCH_sh_TRUE@
$(AM_V_at
)$(MAKE
) $(AM_MAKEFLAGS
) -C
$(@D
) $(@F
)
5436 @SIM_ENABLE_ARCH_sh_TRUE@sh
/modules.c
: |
$(sh_BUILD_OUTPUTS
)
5438 # These rules are copied from automake, but tweaked to use FOR_BUILD variables.
5439 @SIM_ENABLE_ARCH_sh_TRUE@sh
/gencode
$(EXEEXT
): $(sh_gencode_OBJECTS
) $(sh_gencode_DEPENDENCIES
) sh
/$(am__dirstamp
)
5440 @SIM_ENABLE_ARCH_sh_TRUE@
$(AM_V_CCLD
)$(LINK_FOR_BUILD
) $(sh_gencode_OBJECTS
) $(sh_gencode_LDADD
)
5442 # gencode is a build-time only tool. Override the default rules for it.
5443 @SIM_ENABLE_ARCH_sh_TRUE@sh
/gencode.o
: sh
/gencode.c
5444 @SIM_ENABLE_ARCH_sh_TRUE@
$(AM_V_CC
)$(COMPILE_FOR_BUILD
) -c
$< -o
$@
5446 @SIM_ENABLE_ARCH_sh_TRUE@sh
/code.c
: sh
/gencode
$(EXEEXT
)
5447 @SIM_ENABLE_ARCH_sh_TRUE@
$(AM_V_GEN
)$< -x
>$@
5449 @SIM_ENABLE_ARCH_sh_TRUE@sh
/ppi.c
: sh
/gencode
$(EXEEXT
)
5450 @SIM_ENABLE_ARCH_sh_TRUE@
$(AM_V_GEN
)$< -p
>$@
5452 @SIM_ENABLE_ARCH_sh_TRUE@sh
/table.c
: sh
/gencode
$(EXEEXT
)
5453 @SIM_ENABLE_ARCH_sh_TRUE@
$(AM_V_GEN
)$< -s
>$@
5454 @SIM_ENABLE_ARCH_v850_TRUE@
$(v850_libsim_a_OBJECTS
) $(v850_libsim_a_LIBADD
): v850
/hw-config.h
5456 @SIM_ENABLE_ARCH_v850_TRUE@v850
/%.o
: v850
/%.c
5457 @SIM_ENABLE_ARCH_v850_TRUE@
$(AM_V_at
)$(MAKE
) $(AM_MAKEFLAGS
) -C
$(@D
) $(@F
)
5459 @SIM_ENABLE_ARCH_v850_TRUE@v850
/%.o
: common
/%.c
5460 @SIM_ENABLE_ARCH_v850_TRUE@
$(AM_V_at
)$(MAKE
) $(AM_MAKEFLAGS
) -C
$(@D
) $(@F
)
5461 @SIM_ENABLE_ARCH_v850_TRUE@v850
/modules.c
: |
$(v850_BUILD_OUTPUTS
)
5463 @SIM_ENABLE_ARCH_v850_TRUE@
$(v850_BUILT_SRC_FROM_IGEN
): v850
/stamp-igen
5464 @SIM_ENABLE_ARCH_v850_TRUE@v850
/stamp-igen
: $(v850_IGEN_INSN
) $(v850_IGEN_DC
) $(IGEN
)
5465 @SIM_ENABLE_ARCH_v850_TRUE@
$(AM_V_GEN
)$(IGEN_RUN
) \
5466 @SIM_ENABLE_ARCH_v850_TRUE@
$(v850_IGEN_TRACE
) \
5467 @SIM_ENABLE_ARCH_v850_TRUE@
-G gen-direct-access \
5468 @SIM_ENABLE_ARCH_v850_TRUE@
-G gen-zero-r0 \
5469 @SIM_ENABLE_ARCH_v850_TRUE@
-i
$(v850_IGEN_INSN
) \
5470 @SIM_ENABLE_ARCH_v850_TRUE@
-o
$(v850_IGEN_DC
) \
5471 @SIM_ENABLE_ARCH_v850_TRUE@
-x \
5472 @SIM_ENABLE_ARCH_v850_TRUE@
-n icache.h
-hc v850
/icache.h \
5473 @SIM_ENABLE_ARCH_v850_TRUE@
-n icache.c
-c v850
/icache.c \
5474 @SIM_ENABLE_ARCH_v850_TRUE@
-n semantics.h
-hs v850
/semantics.h \
5475 @SIM_ENABLE_ARCH_v850_TRUE@
-n semantics.c
-s v850
/semantics.c \
5476 @SIM_ENABLE_ARCH_v850_TRUE@
-n idecode.h
-hd v850
/idecode.h \
5477 @SIM_ENABLE_ARCH_v850_TRUE@
-n idecode.c
-d v850
/idecode.c \
5478 @SIM_ENABLE_ARCH_v850_TRUE@
-n model.h
-hm v850
/model.h \
5479 @SIM_ENABLE_ARCH_v850_TRUE@
-n model.c
-m v850
/model.c \
5480 @SIM_ENABLE_ARCH_v850_TRUE@
-n support.h
-hf v850
/support.h \
5481 @SIM_ENABLE_ARCH_v850_TRUE@
-n support.c
-f v850
/support.c \
5482 @SIM_ENABLE_ARCH_v850_TRUE@
-n itable.h
-ht v850
/itable.h \
5483 @SIM_ENABLE_ARCH_v850_TRUE@
-n itable.c
-t v850
/itable.c \
5484 @SIM_ENABLE_ARCH_v850_TRUE@
-n engine.h
-he v850
/engine.h \
5485 @SIM_ENABLE_ARCH_v850_TRUE@
-n engine.c
-e v850
/engine.c \
5486 @SIM_ENABLE_ARCH_v850_TRUE@
-n irun.c
-r v850
/irun.c
5487 @SIM_ENABLE_ARCH_v850_TRUE@
$(AM_V_at
)touch
$@
5489 all-recursive
: $(SIM_ALL_RECURSIVE_DEPS
)
5491 install-data-local
: installdirs $(SIM_INSTALL_DATA_LOCAL_DEPS
)
5492 $(AM_V_at
)$(MKDIR_P
) $(DESTDIR
)$(libdir)
5493 lib
=`echo sim | sed '$(program_transform_name)'`; \
5494 for d in
$(SIM_ENABLED_ARCHES
); do \
5496 [ "$(SIM_PRIMARY_TARGET)" = "$$d" ] || n
="$$n-$$d"; \
5498 $(INSTALL_DATA
) $$d/libsim.a
$(DESTDIR
)$(libdir)/$$n || exit
1; \
5501 install-exec-local
: installdirs $(SIM_INSTALL_EXEC_LOCAL_DEPS
)
5502 $(AM_V_at
)$(MKDIR_P
) $(DESTDIR
)$(bindir)
5503 run
=`echo run | sed '$(program_transform_name)'`; \
5504 for d in
$(SIM_ENABLED_ARCHES
); do \
5506 [ "$(SIM_PRIMARY_TARGET)" = "$$d" ] || n
="$$n-$$d"; \
5507 $(LIBTOOL
) --mode
=install \
5508 $(INSTALL_PROGRAM
) $$d/run
$(EXEEXT
) $(DESTDIR
)$(bindir)/$$n$(EXEEXT
) || exit
1; \
5511 uninstall-local
: $(SIM_UNINSTALL_LOCAL_DEPS
)
5512 rm -f
$(DESTDIR
)$(bindir)/run
$(DESTDIR
)$(libdir)/libsim.a
5513 for d in
$(SIM_ENABLED_ARCHES
); do \
5514 rm -f
$(DESTDIR
)$(bindir)/run-
$$d $(DESTDIR
)$(libdir)/libsim-
$$d.a
; \
5517 # Tell versions [3.59,3.63) of GNU make to not export all variables.
5518 # Otherwise a system limit (for SysV at least) may be exceeded.