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1 # Makefile.in generated by automake 1.15.1 from Makefile.am.
2 # @configure_input@
3
4 # Copyright (C) 1994-2017 Free Software Foundation, Inc.
5
6 # This Makefile.in is free software; the Free Software Foundation
7 # gives unlimited permission to copy and/or distribute it,
8 # with or without modifications, as long as this notice is preserved.
9
10 # This program is distributed in the hope that it will be useful,
11 # but WITHOUT ANY WARRANTY, to the extent permitted by law; without
12 # even the implied warranty of MERCHANTABILITY or FITNESS FOR A
13 # PARTICULAR PURPOSE.
14
15 @SET_MAKE@
16
17 # Copyright (C) 1993-2023 Free Software Foundation, Inc.
18 #
19 # This program is free software; you can redistribute it and/or modify
20 # it under the terms of the GNU General Public License as published by
21 # the Free Software Foundation; either version 3 of the License, or
22 # (at your option) any later version.
23 #
24 # This program is distributed in the hope that it will be useful,
25 # but WITHOUT ANY WARRANTY; without even the implied warranty of
26 # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
27 # GNU General Public License for more details.
28 #
29 # You should have received a copy of the GNU General Public License
30 # along with this program. If not, see <http://www.gnu.org/licenses/>.
31
32
33
34
35 VPATH = @srcdir@
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100 transform = $(program_transform_name)
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102 PRE_INSTALL = :
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125 $(am__EXEEXT_7)
126 @ENABLE_SIM_TRUE@am__append_1 = \
127 @ENABLE_SIM_TRUE@ $(srcroot)/include/sim/callback.h \
128 @ENABLE_SIM_TRUE@ $(srcroot)/include/sim/sim.h
129
130 @SIM_ENABLE_HW_TRUE@am__append_2 = \
131 @SIM_ENABLE_HW_TRUE@ $(SIM_COMMON_HW_OBJS) \
132 @SIM_ENABLE_HW_TRUE@ $(SIM_HW_SOCKSER)
133
134 @SIM_ENABLE_HW_TRUE@am__append_3 = SIM_HW_DEVICES_="$(SIM_HW_DEVICES)"
135 @SIM_ENABLE_IGEN_TRUE@am__append_4 = $(IGEN)
136 @SIM_ENABLE_IGEN_TRUE@am__append_5 = igen/libigen.a
137 @SIM_ENABLE_IGEN_TRUE@am__append_6 = $(igen_IGEN_TOOLS)
138 @SIM_ENABLE_IGEN_TRUE@am__append_7 = $(igen_IGEN_TOOLS)
139 TESTS = testsuite/common/bits32m0$(EXEEXT) \
140 testsuite/common/bits32m31$(EXEEXT) \
141 testsuite/common/bits64m0$(EXEEXT) \
142 testsuite/common/bits64m63$(EXEEXT) \
143 testsuite/common/alu-tst$(EXEEXT)
144 @SIM_ENABLE_ARCH_aarch64_TRUE@am__append_8 = aarch64/libsim.a
145 @SIM_ENABLE_ARCH_aarch64_TRUE@am__append_9 = aarch64/run
146 @SIM_ENABLE_ARCH_arm_TRUE@am__append_10 = arm/libsim.a
147 @SIM_ENABLE_ARCH_arm_TRUE@am__append_11 = arm/run
148 @SIM_ENABLE_ARCH_avr_TRUE@am__append_12 = avr/libsim.a
149 @SIM_ENABLE_ARCH_avr_TRUE@am__append_13 = avr/run
150 @SIM_ENABLE_ARCH_bfin_TRUE@am__append_14 = bfin/libsim.a
151 @SIM_ENABLE_ARCH_bfin_TRUE@am__append_15 = bfin/run
152 @SIM_ENABLE_ARCH_bfin_TRUE@am__append_16 = bfin_SIM_EXTRA_HW_DEVICES="$(bfin_SIM_EXTRA_HW_DEVICES)"
153 @SIM_ENABLE_ARCH_bpf_TRUE@am__append_17 = bpf/libsim.a
154 @SIM_ENABLE_ARCH_bpf_TRUE@am__append_18 = bpf/run
155 @SIM_ENABLE_ARCH_bpf_TRUE@am__append_19 = \
156 @SIM_ENABLE_ARCH_bpf_TRUE@ bpf/eng-le.h \
157 @SIM_ENABLE_ARCH_bpf_TRUE@ bpf/eng-be.h
158
159 @SIM_ENABLE_ARCH_bpf_TRUE@am__append_20 = $(bpf_BUILD_OUTPUTS)
160 @SIM_ENABLE_ARCH_bpf_TRUE@am__append_21 = $(bpf_BUILD_OUTPUTS)
161 @SIM_ENABLE_ARCH_cr16_TRUE@am__append_22 = cr16/libsim.a
162 @SIM_ENABLE_ARCH_cr16_TRUE@am__append_23 = cr16/run
163 @SIM_ENABLE_ARCH_cr16_TRUE@am__append_24 = cr16/simops.h
164 @SIM_ENABLE_ARCH_cr16_TRUE@am__append_25 = $(cr16_BUILD_OUTPUTS)
165 @SIM_ENABLE_ARCH_cr16_TRUE@am__append_26 = cr16/gencode
166 @SIM_ENABLE_ARCH_cr16_TRUE@am__append_27 = $(cr16_BUILD_OUTPUTS)
167 @SIM_ENABLE_ARCH_cris_TRUE@am__append_28 = cris/libsim.a
168 @SIM_ENABLE_ARCH_cris_TRUE@am__append_29 = cris/run
169 @SIM_ENABLE_ARCH_cris_TRUE@am__append_30 = cris_SIM_EXTRA_HW_DEVICES="$(cris_SIM_EXTRA_HW_DEVICES)"
170 @SIM_ENABLE_ARCH_cris_TRUE@am__append_31 = cris/rvdummy
171 @SIM_ENABLE_ARCH_cris_TRUE@am__append_32 = \
172 @SIM_ENABLE_ARCH_cris_TRUE@ cris/engv10.h \
173 @SIM_ENABLE_ARCH_cris_TRUE@ cris/engv32.h
174
175 @SIM_ENABLE_ARCH_cris_TRUE@am__append_33 = $(cris_BUILD_OUTPUTS)
176 @SIM_ENABLE_ARCH_cris_TRUE@am__append_34 = $(cris_BUILD_OUTPUTS)
177 @SIM_ENABLE_ARCH_d10v_TRUE@am__append_35 = d10v/libsim.a
178 @SIM_ENABLE_ARCH_d10v_TRUE@am__append_36 = d10v/run
179 @SIM_ENABLE_ARCH_d10v_TRUE@am__append_37 = d10v/simops.h
180 @SIM_ENABLE_ARCH_d10v_TRUE@am__append_38 = $(d10v_BUILD_OUTPUTS)
181 @SIM_ENABLE_ARCH_d10v_TRUE@am__append_39 = d10v/gencode
182 @SIM_ENABLE_ARCH_d10v_TRUE@am__append_40 = $(d10v_BUILD_OUTPUTS)
183 @SIM_ENABLE_ARCH_erc32_TRUE@am__append_41 = erc32/libsim.a
184 @SIM_ENABLE_ARCH_erc32_TRUE@am__append_42 = erc32/run erc32/sis
185 @SIM_ENABLE_ARCH_erc32_TRUE@am__append_43 = sim-%D-install-exec-local
186 @SIM_ENABLE_ARCH_erc32_TRUE@am__append_44 = sim-erc32-uninstall-local
187 @SIM_ENABLE_ARCH_examples_TRUE@am__append_45 = example-synacor/libsim.a
188 @SIM_ENABLE_ARCH_examples_TRUE@am__append_46 = example-synacor/run
189 @SIM_ENABLE_ARCH_frv_TRUE@am__append_47 = frv/libsim.a
190 @SIM_ENABLE_ARCH_frv_TRUE@am__append_48 = frv/run
191 @SIM_ENABLE_ARCH_frv_TRUE@am__append_49 = frv/eng.h
192 @SIM_ENABLE_ARCH_frv_TRUE@am__append_50 = $(frv_BUILD_OUTPUTS)
193 @SIM_ENABLE_ARCH_frv_TRUE@am__append_51 = $(frv_BUILD_OUTPUTS)
194 @SIM_ENABLE_ARCH_ft32_TRUE@am__append_52 = ft32/libsim.a
195 @SIM_ENABLE_ARCH_ft32_TRUE@am__append_53 = ft32/run
196 @SIM_ENABLE_ARCH_h8300_TRUE@am__append_54 = h8300/libsim.a
197 @SIM_ENABLE_ARCH_h8300_TRUE@am__append_55 = h8300/run
198 @SIM_ENABLE_ARCH_iq2000_TRUE@am__append_56 = iq2000/libsim.a
199 @SIM_ENABLE_ARCH_iq2000_TRUE@am__append_57 = iq2000/run
200 @SIM_ENABLE_ARCH_iq2000_TRUE@am__append_58 = iq2000/eng.h
201 @SIM_ENABLE_ARCH_iq2000_TRUE@am__append_59 = $(iq2000_BUILD_OUTPUTS)
202 @SIM_ENABLE_ARCH_iq2000_TRUE@am__append_60 = $(iq2000_BUILD_OUTPUTS)
203 @SIM_ENABLE_ARCH_lm32_TRUE@am__append_61 = lm32/libsim.a
204 @SIM_ENABLE_ARCH_lm32_TRUE@am__append_62 = lm32/run
205 @SIM_ENABLE_ARCH_lm32_TRUE@am__append_63 = lm32_SIM_EXTRA_HW_DEVICES="$(lm32_SIM_EXTRA_HW_DEVICES)"
206 @SIM_ENABLE_ARCH_lm32_TRUE@am__append_64 = lm32/eng.h
207 @SIM_ENABLE_ARCH_lm32_TRUE@am__append_65 = $(lm32_BUILD_OUTPUTS)
208 @SIM_ENABLE_ARCH_lm32_TRUE@am__append_66 = $(lm32_BUILD_OUTPUTS)
209 @SIM_ENABLE_ARCH_m32c_TRUE@am__append_67 = m32c/libsim.a
210 @SIM_ENABLE_ARCH_m32c_TRUE@am__append_68 = m32c/run
211 @SIM_ENABLE_ARCH_m32c_TRUE@am__append_69 = $(m32c_BUILD_OUTPUTS)
212 @SIM_ENABLE_ARCH_m32c_TRUE@am__append_70 = m32c/opc2c
213 @SIM_ENABLE_ARCH_m32c_TRUE@am__append_71 = \
214 @SIM_ENABLE_ARCH_m32c_TRUE@ $(m32c_BUILD_OUTPUTS) \
215 @SIM_ENABLE_ARCH_m32c_TRUE@ m32c/m32c.c.log \
216 @SIM_ENABLE_ARCH_m32c_TRUE@ m32c/r8c.c.log
217
218 @SIM_ENABLE_ARCH_m32r_TRUE@am__append_72 = m32r/libsim.a
219 @SIM_ENABLE_ARCH_m32r_TRUE@am__append_73 = m32r/run
220 @SIM_ENABLE_ARCH_m32r_TRUE@am__append_74 = m32r_SIM_EXTRA_HW_DEVICES="$(m32r_SIM_EXTRA_HW_DEVICES)"
221 @SIM_ENABLE_ARCH_m32r_TRUE@am__append_75 = \
222 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r/eng.h \
223 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r/engx.h \
224 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r/eng2.h
225
226 @SIM_ENABLE_ARCH_m32r_TRUE@am__append_76 = $(m32r_BUILD_OUTPUTS)
227 @SIM_ENABLE_ARCH_m32r_TRUE@am__append_77 = $(m32r_BUILD_OUTPUTS)
228 @SIM_ENABLE_ARCH_m68hc11_TRUE@am__append_78 = m68hc11/libsim.a
229 @SIM_ENABLE_ARCH_m68hc11_TRUE@am__append_79 = m68hc11/run
230 @SIM_ENABLE_ARCH_m68hc11_TRUE@am__append_80 = m68hc11_SIM_EXTRA_HW_DEVICES="$(m68hc11_SIM_EXTRA_HW_DEVICES)"
231 @SIM_ENABLE_ARCH_m68hc11_TRUE@am__append_81 = $(m68hc11_BUILD_OUTPUTS)
232 @SIM_ENABLE_ARCH_m68hc11_TRUE@am__append_82 = m68hc11/gencode
233 @SIM_ENABLE_ARCH_m68hc11_TRUE@am__append_83 = $(m68hc11_BUILD_OUTPUTS)
234 @SIM_ENABLE_ARCH_mcore_TRUE@am__append_84 = mcore/libsim.a
235 @SIM_ENABLE_ARCH_mcore_TRUE@am__append_85 = mcore/run
236 @SIM_ENABLE_ARCH_microblaze_TRUE@am__append_86 = microblaze/run
237 @SIM_ENABLE_ARCH_mips_TRUE@am__append_87 = mips/run
238 @SIM_ENABLE_ARCH_mips_TRUE@am__append_88 = mips_SIM_EXTRA_HW_DEVICES="$(mips_SIM_EXTRA_HW_DEVICES)"
239 @SIM_ENABLE_ARCH_mips_TRUE@am__append_89 = mips/itable.h \
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244
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248 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@ mips/stamp-gen-mode-m16-m16 \
249 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@ mips/stamp-gen-mode-m16-m32
250
251 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_MULTI_TRUE@am__append_92 = \
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253 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_MULTI_TRUE@ mips/stamp-gen-mode-multi-igen \
254 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_MULTI_TRUE@ mips/stamp-gen-mode-multi-run
255
256 @SIM_ENABLE_ARCH_mips_TRUE@am__append_93 = $(mips_BUILD_OUTPUTS)
257 @SIM_ENABLE_ARCH_mips_TRUE@am__append_94 = $(mips_BUILD_OUTPUTS)
258 @SIM_ENABLE_ARCH_mips_TRUE@am__append_95 = mips/multi-include.h mips/multi-run.c
259 @SIM_ENABLE_ARCH_mn10300_TRUE@am__append_96 = mn10300/run
260 @SIM_ENABLE_ARCH_mn10300_TRUE@am__append_97 = mn10300_SIM_EXTRA_HW_DEVICES="$(mn10300_SIM_EXTRA_HW_DEVICES)"
261 @SIM_ENABLE_ARCH_mn10300_TRUE@am__append_98 = \
262 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/icache.h \
263 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/idecode.h \
264 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/semantics.h \
265 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/model.h \
266 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/support.h \
267 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/itable.h \
268 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/engine.h
269
270 @SIM_ENABLE_ARCH_mn10300_TRUE@am__append_99 = $(mn10300_BUILD_OUTPUTS)
271 @SIM_ENABLE_ARCH_mn10300_TRUE@am__append_100 = $(mn10300_BUILD_OUTPUTS)
272 @SIM_ENABLE_ARCH_moxie_TRUE@am__append_101 = moxie/run
273 @SIM_ENABLE_ARCH_msp430_TRUE@am__append_102 = msp430/run
274 @SIM_ENABLE_ARCH_or1k_TRUE@am__append_103 = or1k/run
275 @SIM_ENABLE_ARCH_or1k_TRUE@am__append_104 = or1k/eng.h
276 @SIM_ENABLE_ARCH_or1k_TRUE@am__append_105 = $(or1k_BUILD_OUTPUTS)
277 @SIM_ENABLE_ARCH_or1k_TRUE@am__append_106 = $(or1k_BUILD_OUTPUTS)
278 @SIM_ENABLE_ARCH_ppc_TRUE@am__append_107 = ppc/run ppc/psim
279 @SIM_ENABLE_ARCH_pru_TRUE@am__append_108 = pru/run
280 @SIM_ENABLE_ARCH_riscv_TRUE@am__append_109 = riscv/run
281 @SIM_ENABLE_ARCH_rl78_TRUE@am__append_110 = rl78/run
282 @SIM_ENABLE_ARCH_rx_TRUE@am__append_111 = rx/run
283 @SIM_ENABLE_ARCH_sh_TRUE@am__append_112 = sh/run
284 @SIM_ENABLE_ARCH_sh_TRUE@am__append_113 = \
285 @SIM_ENABLE_ARCH_sh_TRUE@ sh/code.c \
286 @SIM_ENABLE_ARCH_sh_TRUE@ sh/ppi.c
287
288 @SIM_ENABLE_ARCH_sh_TRUE@am__append_114 = $(sh_BUILD_OUTPUTS)
289 @SIM_ENABLE_ARCH_sh_TRUE@am__append_115 = sh/gencode
290 @SIM_ENABLE_ARCH_sh_TRUE@am__append_116 = $(sh_BUILD_OUTPUTS)
291 @SIM_ENABLE_ARCH_v850_TRUE@am__append_117 = v850/run
292 @SIM_ENABLE_ARCH_v850_TRUE@am__append_118 = \
293 @SIM_ENABLE_ARCH_v850_TRUE@ v850/icache.h \
294 @SIM_ENABLE_ARCH_v850_TRUE@ v850/idecode.h \
295 @SIM_ENABLE_ARCH_v850_TRUE@ v850/semantics.h \
296 @SIM_ENABLE_ARCH_v850_TRUE@ v850/model.h \
297 @SIM_ENABLE_ARCH_v850_TRUE@ v850/support.h \
298 @SIM_ENABLE_ARCH_v850_TRUE@ v850/itable.h \
299 @SIM_ENABLE_ARCH_v850_TRUE@ v850/engine.h
300
301 @SIM_ENABLE_ARCH_v850_TRUE@am__append_119 = $(v850_BUILD_OUTPUTS)
302 @SIM_ENABLE_ARCH_v850_TRUE@am__append_120 = $(v850_BUILD_OUTPUTS)
303 subdir = .
304 ACLOCAL_M4 = $(top_srcdir)/aclocal.m4
305 am__aclocal_m4_deps = $(top_srcdir)/../config/acx.m4 \
306 $(top_srcdir)/../config/depstand.m4 \
307 $(top_srcdir)/../config/lead-dot.m4 \
308 $(top_srcdir)/../config/override.m4 \
309 $(top_srcdir)/../config/pkg.m4 $(top_srcdir)/../libtool.m4 \
310 $(top_srcdir)/../ltoptions.m4 $(top_srcdir)/../ltsugar.m4 \
311 $(top_srcdir)/../ltversion.m4 $(top_srcdir)/../lt~obsolete.m4 \
312 $(top_srcdir)/m4/sim_ac_option_alignment.m4 \
313 $(top_srcdir)/m4/sim_ac_option_assert.m4 \
314 $(top_srcdir)/m4/sim_ac_option_cgen_maint.m4 \
315 $(top_srcdir)/m4/sim_ac_option_debug.m4 \
316 $(top_srcdir)/m4/sim_ac_option_endian.m4 \
317 $(top_srcdir)/m4/sim_ac_option_environment.m4 \
318 $(top_srcdir)/m4/sim_ac_option_hardware.m4 \
319 $(top_srcdir)/m4/sim_ac_option_inline.m4 \
320 $(top_srcdir)/m4/sim_ac_option_profile.m4 \
321 $(top_srcdir)/m4/sim_ac_option_reserved_bits.m4 \
322 $(top_srcdir)/m4/sim_ac_option_scache.m4 \
323 $(top_srcdir)/m4/sim_ac_option_smp.m4 \
324 $(top_srcdir)/m4/sim_ac_option_stdio.m4 \
325 $(top_srcdir)/m4/sim_ac_option_trace.m4 \
326 $(top_srcdir)/m4/sim_ac_option_warnings.m4 \
327 $(top_srcdir)/m4/sim_ac_platform.m4 \
328 $(top_srcdir)/m4/sim_ac_toolchain.m4 \
329 $(top_srcdir)/frv/acinclude.m4 $(top_srcdir)/mips/acinclude.m4 \
330 $(top_srcdir)/riscv/acinclude.m4 $(top_srcdir)/rx/acinclude.m4 \
331 $(top_srcdir)/configure.ac
332 am__configure_deps = $(am__aclocal_m4_deps) $(CONFIGURE_DEPENDENCIES) \
333 $(ACLOCAL_M4)
334 DIST_COMMON = $(srcdir)/Makefile.am $(top_srcdir)/configure \
335 $(am__configure_deps) $(am__pkginclude_HEADERS_DIST)
336 am__CONFIG_DISTCLEAN_FILES = config.status config.cache config.log \
337 configure.lineno config.status.lineno
338 mkinstalldirs = $(SHELL) $(top_srcdir)/../mkinstalldirs
339 CONFIG_HEADER = config.h
340 CONFIG_CLEAN_FILES = Make-common.sim aarch64/Makefile.sim \
341 aarch64/.gdbinit arm/Makefile.sim arm/.gdbinit \
342 avr/Makefile.sim avr/.gdbinit bfin/Makefile.sim bfin/.gdbinit \
343 bpf/Makefile.sim bpf/.gdbinit cr16/Makefile.sim cr16/.gdbinit \
344 cris/Makefile.sim cris/.gdbinit d10v/Makefile.sim \
345 d10v/.gdbinit frv/Makefile.sim frv/.gdbinit ft32/Makefile.sim \
346 ft32/.gdbinit h8300/Makefile.sim h8300/.gdbinit \
347 iq2000/Makefile.sim iq2000/.gdbinit lm32/Makefile.sim \
348 lm32/.gdbinit m32c/Makefile.sim m32c/.gdbinit \
349 m32r/Makefile.sim m32r/.gdbinit m68hc11/Makefile.sim \
350 m68hc11/.gdbinit mcore/Makefile.sim mcore/.gdbinit \
351 microblaze/Makefile.sim microblaze/.gdbinit mips/Makefile.sim \
352 mips/.gdbinit mn10300/Makefile.sim mn10300/.gdbinit \
353 moxie/Makefile.sim moxie/.gdbinit msp430/Makefile.sim \
354 msp430/.gdbinit or1k/Makefile.sim or1k/.gdbinit ppc/.gdbinit \
355 pru/Makefile.sim pru/.gdbinit riscv/Makefile.sim \
356 riscv/.gdbinit rl78/Makefile.sim rl78/.gdbinit rx/Makefile.sim \
357 rx/.gdbinit sh/Makefile.sim sh/.gdbinit erc32/Makefile.sim \
358 erc32/.gdbinit v850/Makefile.sim v850/.gdbinit \
359 example-synacor/Makefile.sim example-synacor/.gdbinit \
360 arch-subdir.mk .gdbinit
361 CONFIG_CLEAN_VPATH_FILES =
362 LIBRARIES = $(noinst_LIBRARIES)
363 ARFLAGS = cru
364 AM_V_AR = $(am__v_AR_@AM_V@)
365 am__v_AR_ = $(am__v_AR_@AM_DEFAULT_V@)
366 am__v_AR_0 = @echo " AR " $@;
367 am__v_AR_1 =
368 aarch64_libsim_a_AR = $(AR) $(ARFLAGS)
369 @SIM_ENABLE_ARCH_aarch64_TRUE@aarch64_libsim_a_DEPENDENCIES = \
370 @SIM_ENABLE_ARCH_aarch64_TRUE@ $(patsubst \
371 @SIM_ENABLE_ARCH_aarch64_TRUE@ %,aarch64/%,$(SIM_NEW_COMMON_OBJS)) \
372 @SIM_ENABLE_ARCH_aarch64_TRUE@ $(patsubst \
373 @SIM_ENABLE_ARCH_aarch64_TRUE@ %,aarch64/dv-%.o,$(SIM_HW_DEVICES)) \
374 @SIM_ENABLE_ARCH_aarch64_TRUE@ aarch64/cpustate.o \
375 @SIM_ENABLE_ARCH_aarch64_TRUE@ aarch64/interp.o \
376 @SIM_ENABLE_ARCH_aarch64_TRUE@ aarch64/memory.o \
377 @SIM_ENABLE_ARCH_aarch64_TRUE@ aarch64/modules.o \
378 @SIM_ENABLE_ARCH_aarch64_TRUE@ aarch64/sim-resume.o \
379 @SIM_ENABLE_ARCH_aarch64_TRUE@ aarch64/simulator.o
380 am_aarch64_libsim_a_OBJECTS =
381 aarch64_libsim_a_OBJECTS = $(am_aarch64_libsim_a_OBJECTS)
382 am__dirstamp = $(am__leading_dot)dirstamp
383 arm_libsim_a_AR = $(AR) $(ARFLAGS)
384 @SIM_ENABLE_ARCH_arm_TRUE@arm_libsim_a_DEPENDENCIES = arm/wrapper.o \
385 @SIM_ENABLE_ARCH_arm_TRUE@ $(patsubst \
386 @SIM_ENABLE_ARCH_arm_TRUE@ %,arm/%,$(SIM_NEW_COMMON_OBJS)) \
387 @SIM_ENABLE_ARCH_arm_TRUE@ $(patsubst \
388 @SIM_ENABLE_ARCH_arm_TRUE@ %,arm/dv-%.o,$(SIM_HW_DEVICES)) \
389 @SIM_ENABLE_ARCH_arm_TRUE@ arm/armemu.o arm/armemu32.o \
390 @SIM_ENABLE_ARCH_arm_TRUE@ arm/arminit.o arm/armos.o \
391 @SIM_ENABLE_ARCH_arm_TRUE@ arm/armsupp.o arm/armvirt.o \
392 @SIM_ENABLE_ARCH_arm_TRUE@ arm/thumbemu.o arm/armcopro.o \
393 @SIM_ENABLE_ARCH_arm_TRUE@ arm/maverick.o arm/iwmmxt.o \
394 @SIM_ENABLE_ARCH_arm_TRUE@ arm/modules.o
395 am_arm_libsim_a_OBJECTS =
396 arm_libsim_a_OBJECTS = $(am_arm_libsim_a_OBJECTS)
397 avr_libsim_a_AR = $(AR) $(ARFLAGS)
398 @SIM_ENABLE_ARCH_avr_TRUE@avr_libsim_a_DEPENDENCIES = avr/interp.o \
399 @SIM_ENABLE_ARCH_avr_TRUE@ $(patsubst \
400 @SIM_ENABLE_ARCH_avr_TRUE@ %,avr/%,$(SIM_NEW_COMMON_OBJS)) \
401 @SIM_ENABLE_ARCH_avr_TRUE@ $(patsubst \
402 @SIM_ENABLE_ARCH_avr_TRUE@ %,avr/dv-%.o,$(SIM_HW_DEVICES)) \
403 @SIM_ENABLE_ARCH_avr_TRUE@ avr/modules.o avr/sim-resume.o
404 am_avr_libsim_a_OBJECTS =
405 avr_libsim_a_OBJECTS = $(am_avr_libsim_a_OBJECTS)
406 bfin_libsim_a_AR = $(AR) $(ARFLAGS)
407 @SIM_ENABLE_ARCH_bfin_TRUE@bfin_libsim_a_DEPENDENCIES = $(patsubst \
408 @SIM_ENABLE_ARCH_bfin_TRUE@ %,bfin/%,$(SIM_NEW_COMMON_OBJS)) \
409 @SIM_ENABLE_ARCH_bfin_TRUE@ $(patsubst \
410 @SIM_ENABLE_ARCH_bfin_TRUE@ %,bfin/dv-%.o,$(SIM_HW_DEVICES)) \
411 @SIM_ENABLE_ARCH_bfin_TRUE@ $(patsubst \
412 @SIM_ENABLE_ARCH_bfin_TRUE@ %,bfin/dv-%.o,$(bfin_SIM_EXTRA_HW_DEVICES)) \
413 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin/bfin-sim.o bfin/devices.o \
414 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin/gui.o bfin/interp.o \
415 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin/machs.o bfin/modules.o \
416 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin/sim-resume.o
417 am_bfin_libsim_a_OBJECTS =
418 bfin_libsim_a_OBJECTS = $(am_bfin_libsim_a_OBJECTS)
419 bpf_libsim_a_AR = $(AR) $(ARFLAGS)
420 @SIM_ENABLE_ARCH_bpf_TRUE@bpf_libsim_a_DEPENDENCIES = $(patsubst \
421 @SIM_ENABLE_ARCH_bpf_TRUE@ %,bpf/%,$(SIM_NEW_COMMON_OBJS)) \
422 @SIM_ENABLE_ARCH_bpf_TRUE@ $(patsubst \
423 @SIM_ENABLE_ARCH_bpf_TRUE@ %,bpf/dv-%.o,$(SIM_HW_DEVICES)) \
424 @SIM_ENABLE_ARCH_bpf_TRUE@ bpf/modules.o bpf/cgen-run.o \
425 @SIM_ENABLE_ARCH_bpf_TRUE@ bpf/cgen-scache.o bpf/cgen-trace.o \
426 @SIM_ENABLE_ARCH_bpf_TRUE@ bpf/cgen-utils.o bpf/arch.o \
427 @SIM_ENABLE_ARCH_bpf_TRUE@ bpf/cpu.o bpf/decode-le.o \
428 @SIM_ENABLE_ARCH_bpf_TRUE@ bpf/decode-be.o bpf/sem-le.o \
429 @SIM_ENABLE_ARCH_bpf_TRUE@ bpf/sem-be.o bpf/mloop-le.o \
430 @SIM_ENABLE_ARCH_bpf_TRUE@ bpf/mloop-be.o bpf/bpf.o \
431 @SIM_ENABLE_ARCH_bpf_TRUE@ bpf/bpf-helpers.o bpf/sim-if.o \
432 @SIM_ENABLE_ARCH_bpf_TRUE@ bpf/traps.o
433 am_bpf_libsim_a_OBJECTS =
434 bpf_libsim_a_OBJECTS = $(am_bpf_libsim_a_OBJECTS)
435 common_libcommon_a_AR = $(AR) $(ARFLAGS)
436 common_libcommon_a_LIBADD =
437 am_common_libcommon_a_OBJECTS = common/callback.$(OBJEXT) \
438 common/portability.$(OBJEXT) common/sim-load.$(OBJEXT) \
439 common/syscall.$(OBJEXT) common/target-newlib-errno.$(OBJEXT) \
440 common/target-newlib-open.$(OBJEXT) \
441 common/target-newlib-signal.$(OBJEXT) \
442 common/target-newlib-syscall.$(OBJEXT) \
443 common/version.$(OBJEXT)
444 common_libcommon_a_OBJECTS = $(am_common_libcommon_a_OBJECTS)
445 cr16_libsim_a_AR = $(AR) $(ARFLAGS)
446 @SIM_ENABLE_ARCH_cr16_TRUE@cr16_libsim_a_DEPENDENCIES = \
447 @SIM_ENABLE_ARCH_cr16_TRUE@ $(common_libcommon_a_OBJECTS) \
448 @SIM_ENABLE_ARCH_cr16_TRUE@ $(patsubst \
449 @SIM_ENABLE_ARCH_cr16_TRUE@ %,cr16/%,$(SIM_NEW_COMMON_OBJS)) \
450 @SIM_ENABLE_ARCH_cr16_TRUE@ $(patsubst \
451 @SIM_ENABLE_ARCH_cr16_TRUE@ %,cr16/dv-%.o,$(SIM_HW_DEVICES)) \
452 @SIM_ENABLE_ARCH_cr16_TRUE@ cr16/interp.o cr16/modules.o \
453 @SIM_ENABLE_ARCH_cr16_TRUE@ cr16/sim-resume.o cr16/simops.o \
454 @SIM_ENABLE_ARCH_cr16_TRUE@ cr16/table.o
455 am_cr16_libsim_a_OBJECTS =
456 cr16_libsim_a_OBJECTS = $(am_cr16_libsim_a_OBJECTS)
457 cris_libsim_a_AR = $(AR) $(ARFLAGS)
458 @SIM_ENABLE_ARCH_cris_TRUE@cris_libsim_a_DEPENDENCIES = \
459 @SIM_ENABLE_ARCH_cris_TRUE@ $(common_libcommon_a_OBJECTS) \
460 @SIM_ENABLE_ARCH_cris_TRUE@ $(patsubst \
461 @SIM_ENABLE_ARCH_cris_TRUE@ %,cris/%,$(SIM_NEW_COMMON_OBJS)) \
462 @SIM_ENABLE_ARCH_cris_TRUE@ $(patsubst \
463 @SIM_ENABLE_ARCH_cris_TRUE@ %,cris/dv-%.o,$(SIM_HW_DEVICES)) \
464 @SIM_ENABLE_ARCH_cris_TRUE@ $(patsubst \
465 @SIM_ENABLE_ARCH_cris_TRUE@ %,cris/dv-%.o,$(cris_SIM_EXTRA_HW_DEVICES)) \
466 @SIM_ENABLE_ARCH_cris_TRUE@ cris/modules.o cris/cgen-run.o \
467 @SIM_ENABLE_ARCH_cris_TRUE@ cris/cgen-scache.o \
468 @SIM_ENABLE_ARCH_cris_TRUE@ cris/cgen-trace.o cris/cgen-utils.o \
469 @SIM_ENABLE_ARCH_cris_TRUE@ cris/arch.o cris/crisv10f.o \
470 @SIM_ENABLE_ARCH_cris_TRUE@ cris/cpuv10.o cris/decodev10.o \
471 @SIM_ENABLE_ARCH_cris_TRUE@ cris/modelv10.o cris/mloopv10f.o \
472 @SIM_ENABLE_ARCH_cris_TRUE@ cris/crisv32f.o cris/cpuv32.o \
473 @SIM_ENABLE_ARCH_cris_TRUE@ cris/decodev32.o cris/modelv32.o \
474 @SIM_ENABLE_ARCH_cris_TRUE@ cris/mloopv32f.o cris/sim-if.o \
475 @SIM_ENABLE_ARCH_cris_TRUE@ cris/traps.o
476 am_cris_libsim_a_OBJECTS =
477 cris_libsim_a_OBJECTS = $(am_cris_libsim_a_OBJECTS)
478 d10v_libsim_a_AR = $(AR) $(ARFLAGS)
479 @SIM_ENABLE_ARCH_d10v_TRUE@d10v_libsim_a_DEPENDENCIES = \
480 @SIM_ENABLE_ARCH_d10v_TRUE@ $(common_libcommon_a_OBJECTS) \
481 @SIM_ENABLE_ARCH_d10v_TRUE@ d10v/interp.o $(patsubst \
482 @SIM_ENABLE_ARCH_d10v_TRUE@ %,d10v/%,$(SIM_NEW_COMMON_OBJS)) \
483 @SIM_ENABLE_ARCH_d10v_TRUE@ $(patsubst \
484 @SIM_ENABLE_ARCH_d10v_TRUE@ %,d10v/dv-%.o,$(SIM_HW_DEVICES)) \
485 @SIM_ENABLE_ARCH_d10v_TRUE@ d10v/endian.o d10v/modules.o \
486 @SIM_ENABLE_ARCH_d10v_TRUE@ d10v/sim-resume.o d10v/simops.o \
487 @SIM_ENABLE_ARCH_d10v_TRUE@ d10v/table.o
488 am_d10v_libsim_a_OBJECTS =
489 d10v_libsim_a_OBJECTS = $(am_d10v_libsim_a_OBJECTS)
490 erc32_libsim_a_AR = $(AR) $(ARFLAGS)
491 @SIM_ENABLE_ARCH_erc32_TRUE@erc32_libsim_a_DEPENDENCIES = \
492 @SIM_ENABLE_ARCH_erc32_TRUE@ $(common_libcommon_a_OBJECTS) \
493 @SIM_ENABLE_ARCH_erc32_TRUE@ erc32/erc32.o erc32/exec.o \
494 @SIM_ENABLE_ARCH_erc32_TRUE@ erc32/float.o erc32/func.o \
495 @SIM_ENABLE_ARCH_erc32_TRUE@ erc32/help.o erc32/interf.o \
496 @SIM_ENABLE_ARCH_erc32_TRUE@ erc32/modules.o
497 am_erc32_libsim_a_OBJECTS =
498 erc32_libsim_a_OBJECTS = $(am_erc32_libsim_a_OBJECTS)
499 example_synacor_libsim_a_AR = $(AR) $(ARFLAGS)
500 @SIM_ENABLE_ARCH_examples_TRUE@example_synacor_libsim_a_DEPENDENCIES = \
501 @SIM_ENABLE_ARCH_examples_TRUE@ $(common_libcommon_a_OBJECTS) \
502 @SIM_ENABLE_ARCH_examples_TRUE@ $(patsubst \
503 @SIM_ENABLE_ARCH_examples_TRUE@ %,example-synacor/%,$(SIM_NEW_COMMON_OBJS)) \
504 @SIM_ENABLE_ARCH_examples_TRUE@ $(patsubst \
505 @SIM_ENABLE_ARCH_examples_TRUE@ %,example-synacor/dv-%.o,$(SIM_HW_DEVICES)) \
506 @SIM_ENABLE_ARCH_examples_TRUE@ example-synacor/interp.o \
507 @SIM_ENABLE_ARCH_examples_TRUE@ example-synacor/modules.o \
508 @SIM_ENABLE_ARCH_examples_TRUE@ example-synacor/sim-main.o \
509 @SIM_ENABLE_ARCH_examples_TRUE@ example-synacor/sim-resume.o
510 am_example_synacor_libsim_a_OBJECTS =
511 example_synacor_libsim_a_OBJECTS = \
512 $(am_example_synacor_libsim_a_OBJECTS)
513 frv_libsim_a_AR = $(AR) $(ARFLAGS)
514 @SIM_ENABLE_ARCH_frv_TRUE@frv_libsim_a_DEPENDENCIES = \
515 @SIM_ENABLE_ARCH_frv_TRUE@ $(common_libcommon_a_OBJECTS) \
516 @SIM_ENABLE_ARCH_frv_TRUE@ $(patsubst \
517 @SIM_ENABLE_ARCH_frv_TRUE@ %,frv/%,$(SIM_NEW_COMMON_OBJS)) \
518 @SIM_ENABLE_ARCH_frv_TRUE@ $(patsubst \
519 @SIM_ENABLE_ARCH_frv_TRUE@ %,frv/dv-%.o,$(SIM_HW_DEVICES)) \
520 @SIM_ENABLE_ARCH_frv_TRUE@ frv/modules.o frv/cgen-accfp.o \
521 @SIM_ENABLE_ARCH_frv_TRUE@ frv/cgen-fpu.o frv/cgen-run.o \
522 @SIM_ENABLE_ARCH_frv_TRUE@ frv/cgen-scache.o frv/cgen-trace.o \
523 @SIM_ENABLE_ARCH_frv_TRUE@ frv/cgen-utils.o frv/arch.o \
524 @SIM_ENABLE_ARCH_frv_TRUE@ frv/cgen-par.o frv/cpu.o \
525 @SIM_ENABLE_ARCH_frv_TRUE@ frv/decode.o frv/frv.o frv/mloop.o \
526 @SIM_ENABLE_ARCH_frv_TRUE@ frv/model.o frv/sem.o frv/cache.o \
527 @SIM_ENABLE_ARCH_frv_TRUE@ frv/interrupts.o frv/memory.o \
528 @SIM_ENABLE_ARCH_frv_TRUE@ frv/options.o frv/pipeline.o \
529 @SIM_ENABLE_ARCH_frv_TRUE@ frv/profile.o frv/profile-fr400.o \
530 @SIM_ENABLE_ARCH_frv_TRUE@ frv/profile-fr450.o \
531 @SIM_ENABLE_ARCH_frv_TRUE@ frv/profile-fr500.o \
532 @SIM_ENABLE_ARCH_frv_TRUE@ frv/profile-fr550.o frv/registers.o \
533 @SIM_ENABLE_ARCH_frv_TRUE@ frv/reset.o frv/sim-if.o frv/traps.o
534 am_frv_libsim_a_OBJECTS =
535 frv_libsim_a_OBJECTS = $(am_frv_libsim_a_OBJECTS)
536 ft32_libsim_a_AR = $(AR) $(ARFLAGS)
537 @SIM_ENABLE_ARCH_ft32_TRUE@ft32_libsim_a_DEPENDENCIES = \
538 @SIM_ENABLE_ARCH_ft32_TRUE@ $(common_libcommon_a_OBJECTS) \
539 @SIM_ENABLE_ARCH_ft32_TRUE@ $(patsubst \
540 @SIM_ENABLE_ARCH_ft32_TRUE@ %,ft32/%,$(SIM_NEW_COMMON_OBJS)) \
541 @SIM_ENABLE_ARCH_ft32_TRUE@ $(patsubst \
542 @SIM_ENABLE_ARCH_ft32_TRUE@ %,ft32/dv-%.o,$(SIM_HW_DEVICES)) \
543 @SIM_ENABLE_ARCH_ft32_TRUE@ ft32/interp.o ft32/modules.o \
544 @SIM_ENABLE_ARCH_ft32_TRUE@ ft32/sim-resume.o
545 am_ft32_libsim_a_OBJECTS =
546 ft32_libsim_a_OBJECTS = $(am_ft32_libsim_a_OBJECTS)
547 h8300_libsim_a_AR = $(AR) $(ARFLAGS)
548 @SIM_ENABLE_ARCH_h8300_TRUE@h8300_libsim_a_DEPENDENCIES = \
549 @SIM_ENABLE_ARCH_h8300_TRUE@ $(common_libcommon_a_OBJECTS) \
550 @SIM_ENABLE_ARCH_h8300_TRUE@ h8300/compile.o $(patsubst \
551 @SIM_ENABLE_ARCH_h8300_TRUE@ %,h8300/%,$(SIM_NEW_COMMON_OBJS)) \
552 @SIM_ENABLE_ARCH_h8300_TRUE@ $(patsubst \
553 @SIM_ENABLE_ARCH_h8300_TRUE@ %,h8300/dv-%.o,$(SIM_HW_DEVICES)) \
554 @SIM_ENABLE_ARCH_h8300_TRUE@ h8300/modules.o h8300/sim-resume.o
555 am_h8300_libsim_a_OBJECTS =
556 h8300_libsim_a_OBJECTS = $(am_h8300_libsim_a_OBJECTS)
557 igen_libigen_a_AR = $(AR) $(ARFLAGS)
558 igen_libigen_a_LIBADD =
559 @SIM_ENABLE_IGEN_TRUE@am_igen_libigen_a_OBJECTS = \
560 @SIM_ENABLE_IGEN_TRUE@ igen/table.$(OBJEXT) igen/lf.$(OBJEXT) \
561 @SIM_ENABLE_IGEN_TRUE@ igen/misc.$(OBJEXT) \
562 @SIM_ENABLE_IGEN_TRUE@ igen/filter_host.$(OBJEXT) \
563 @SIM_ENABLE_IGEN_TRUE@ igen/ld-decode.$(OBJEXT) \
564 @SIM_ENABLE_IGEN_TRUE@ igen/ld-cache.$(OBJEXT) \
565 @SIM_ENABLE_IGEN_TRUE@ igen/filter.$(OBJEXT) \
566 @SIM_ENABLE_IGEN_TRUE@ igen/ld-insn.$(OBJEXT) \
567 @SIM_ENABLE_IGEN_TRUE@ igen/gen-model.$(OBJEXT) \
568 @SIM_ENABLE_IGEN_TRUE@ igen/gen-itable.$(OBJEXT) \
569 @SIM_ENABLE_IGEN_TRUE@ igen/gen-icache.$(OBJEXT) \
570 @SIM_ENABLE_IGEN_TRUE@ igen/gen-semantics.$(OBJEXT) \
571 @SIM_ENABLE_IGEN_TRUE@ igen/gen-idecode.$(OBJEXT) \
572 @SIM_ENABLE_IGEN_TRUE@ igen/gen-support.$(OBJEXT) \
573 @SIM_ENABLE_IGEN_TRUE@ igen/gen-engine.$(OBJEXT) \
574 @SIM_ENABLE_IGEN_TRUE@ igen/gen.$(OBJEXT)
575 igen_libigen_a_OBJECTS = $(am_igen_libigen_a_OBJECTS)
576 iq2000_libsim_a_AR = $(AR) $(ARFLAGS)
577 @SIM_ENABLE_ARCH_iq2000_TRUE@iq2000_libsim_a_DEPENDENCIES = \
578 @SIM_ENABLE_ARCH_iq2000_TRUE@ $(common_libcommon_a_OBJECTS) \
579 @SIM_ENABLE_ARCH_iq2000_TRUE@ $(patsubst \
580 @SIM_ENABLE_ARCH_iq2000_TRUE@ %,iq2000/%,$(SIM_NEW_COMMON_OBJS)) \
581 @SIM_ENABLE_ARCH_iq2000_TRUE@ $(patsubst \
582 @SIM_ENABLE_ARCH_iq2000_TRUE@ %,iq2000/dv-%.o,$(SIM_HW_DEVICES)) \
583 @SIM_ENABLE_ARCH_iq2000_TRUE@ iq2000/modules.o \
584 @SIM_ENABLE_ARCH_iq2000_TRUE@ iq2000/cgen-run.o \
585 @SIM_ENABLE_ARCH_iq2000_TRUE@ iq2000/cgen-scache.o \
586 @SIM_ENABLE_ARCH_iq2000_TRUE@ iq2000/cgen-trace.o \
587 @SIM_ENABLE_ARCH_iq2000_TRUE@ iq2000/cgen-utils.o iq2000/arch.o \
588 @SIM_ENABLE_ARCH_iq2000_TRUE@ iq2000/cpu.o iq2000/decode.o \
589 @SIM_ENABLE_ARCH_iq2000_TRUE@ iq2000/iq2000.o iq2000/sem.o \
590 @SIM_ENABLE_ARCH_iq2000_TRUE@ iq2000/mloop.o iq2000/model.o \
591 @SIM_ENABLE_ARCH_iq2000_TRUE@ iq2000/sim-if.o
592 am_iq2000_libsim_a_OBJECTS =
593 iq2000_libsim_a_OBJECTS = $(am_iq2000_libsim_a_OBJECTS)
594 lm32_libsim_a_AR = $(AR) $(ARFLAGS)
595 @SIM_ENABLE_ARCH_lm32_TRUE@lm32_libsim_a_DEPENDENCIES = \
596 @SIM_ENABLE_ARCH_lm32_TRUE@ $(common_libcommon_a_OBJECTS) \
597 @SIM_ENABLE_ARCH_lm32_TRUE@ $(patsubst \
598 @SIM_ENABLE_ARCH_lm32_TRUE@ %,lm32/%,$(SIM_NEW_COMMON_OBJS)) \
599 @SIM_ENABLE_ARCH_lm32_TRUE@ $(patsubst \
600 @SIM_ENABLE_ARCH_lm32_TRUE@ %,lm32/dv-%.o,$(SIM_HW_DEVICES)) \
601 @SIM_ENABLE_ARCH_lm32_TRUE@ $(patsubst \
602 @SIM_ENABLE_ARCH_lm32_TRUE@ %,lm32/dv-%.o,$(lm32_SIM_EXTRA_HW_DEVICES)) \
603 @SIM_ENABLE_ARCH_lm32_TRUE@ lm32/modules.o lm32/cgen-run.o \
604 @SIM_ENABLE_ARCH_lm32_TRUE@ lm32/cgen-scache.o \
605 @SIM_ENABLE_ARCH_lm32_TRUE@ lm32/cgen-trace.o lm32/cgen-utils.o \
606 @SIM_ENABLE_ARCH_lm32_TRUE@ lm32/arch.o lm32/cpu.o \
607 @SIM_ENABLE_ARCH_lm32_TRUE@ lm32/decode.o lm32/sem.o \
608 @SIM_ENABLE_ARCH_lm32_TRUE@ lm32/mloop.o lm32/model.o \
609 @SIM_ENABLE_ARCH_lm32_TRUE@ lm32/lm32.o lm32/sim-if.o \
610 @SIM_ENABLE_ARCH_lm32_TRUE@ lm32/traps.o lm32/user.o
611 am_lm32_libsim_a_OBJECTS =
612 lm32_libsim_a_OBJECTS = $(am_lm32_libsim_a_OBJECTS)
613 m32c_libsim_a_AR = $(AR) $(ARFLAGS)
614 @SIM_ENABLE_ARCH_m32c_TRUE@m32c_libsim_a_DEPENDENCIES = \
615 @SIM_ENABLE_ARCH_m32c_TRUE@ $(common_libcommon_a_OBJECTS) \
616 @SIM_ENABLE_ARCH_m32c_TRUE@ m32c/gdb-if.o m32c/int.o \
617 @SIM_ENABLE_ARCH_m32c_TRUE@ m32c/load.o m32c/m32c.o m32c/mem.o \
618 @SIM_ENABLE_ARCH_m32c_TRUE@ m32c/misc.o m32c/modules.o \
619 @SIM_ENABLE_ARCH_m32c_TRUE@ m32c/r8c.o m32c/reg.o \
620 @SIM_ENABLE_ARCH_m32c_TRUE@ m32c/srcdest.o m32c/syscalls.o \
621 @SIM_ENABLE_ARCH_m32c_TRUE@ m32c/trace.o
622 am_m32c_libsim_a_OBJECTS =
623 m32c_libsim_a_OBJECTS = $(am_m32c_libsim_a_OBJECTS)
624 m32r_libsim_a_AR = $(AR) $(ARFLAGS)
625 @SIM_ENABLE_ARCH_m32r_TRUE@m32r_libsim_a_DEPENDENCIES = \
626 @SIM_ENABLE_ARCH_m32r_TRUE@ $(common_libcommon_a_OBJECTS) \
627 @SIM_ENABLE_ARCH_m32r_TRUE@ $(patsubst \
628 @SIM_ENABLE_ARCH_m32r_TRUE@ %,m32r/%,$(SIM_NEW_COMMON_OBJS)) \
629 @SIM_ENABLE_ARCH_m32r_TRUE@ $(patsubst \
630 @SIM_ENABLE_ARCH_m32r_TRUE@ %,m32r/dv-%.o,$(SIM_HW_DEVICES)) \
631 @SIM_ENABLE_ARCH_m32r_TRUE@ $(patsubst \
632 @SIM_ENABLE_ARCH_m32r_TRUE@ %,m32r/dv-%.o,$(m32r_SIM_EXTRA_HW_DEVICES)) \
633 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r/modules.o m32r/cgen-run.o \
634 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r/cgen-scache.o \
635 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r/cgen-trace.o m32r/cgen-utils.o \
636 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r/arch.o m32r/m32r.o m32r/cpu.o \
637 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r/decode.o m32r/sem.o \
638 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r/model.o m32r/mloop.o \
639 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r/m32rx.o m32r/cpux.o \
640 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r/decodex.o m32r/modelx.o \
641 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r/mloopx.o m32r/m32r2.o \
642 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r/cpu2.o m32r/decode2.o \
643 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r/model2.o m32r/mloop2.o \
644 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r/sim-if.o m32r/traps.o
645 am_m32r_libsim_a_OBJECTS =
646 m32r_libsim_a_OBJECTS = $(am_m32r_libsim_a_OBJECTS)
647 m68hc11_libsim_a_AR = $(AR) $(ARFLAGS)
648 @SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11_libsim_a_DEPENDENCIES = \
649 @SIM_ENABLE_ARCH_m68hc11_TRUE@ $(common_libcommon_a_OBJECTS) \
650 @SIM_ENABLE_ARCH_m68hc11_TRUE@ m68hc11/interp.o \
651 @SIM_ENABLE_ARCH_m68hc11_TRUE@ m68hc11/m68hc11int.o \
652 @SIM_ENABLE_ARCH_m68hc11_TRUE@ m68hc11/m68hc12int.o \
653 @SIM_ENABLE_ARCH_m68hc11_TRUE@ m68hc11/emulos.o \
654 @SIM_ENABLE_ARCH_m68hc11_TRUE@ m68hc11/interrupts.o \
655 @SIM_ENABLE_ARCH_m68hc11_TRUE@ m68hc11/m68hc11_sim.o $(patsubst \
656 @SIM_ENABLE_ARCH_m68hc11_TRUE@ %,m68hc11/%,$(SIM_NEW_COMMON_OBJS)) \
657 @SIM_ENABLE_ARCH_m68hc11_TRUE@ $(patsubst \
658 @SIM_ENABLE_ARCH_m68hc11_TRUE@ %,m68hc11/dv-%.o,$(SIM_HW_DEVICES)) \
659 @SIM_ENABLE_ARCH_m68hc11_TRUE@ $(patsubst \
660 @SIM_ENABLE_ARCH_m68hc11_TRUE@ %,m68hc11/dv-%.o,$(m68hc11_SIM_EXTRA_HW_DEVICES)) \
661 @SIM_ENABLE_ARCH_m68hc11_TRUE@ m68hc11/modules.o \
662 @SIM_ENABLE_ARCH_m68hc11_TRUE@ m68hc11/sim-resume.o
663 am_m68hc11_libsim_a_OBJECTS =
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665 mcore_libsim_a_AR = $(AR) $(ARFLAGS)
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667 @SIM_ENABLE_ARCH_mcore_TRUE@ $(common_libcommon_a_OBJECTS) \
668 @SIM_ENABLE_ARCH_mcore_TRUE@ mcore/interp.o $(patsubst \
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670 @SIM_ENABLE_ARCH_mcore_TRUE@ $(patsubst \
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676 @SIM_ENABLE_IGEN_TRUE@ igen/gen$(EXEEXT) igen/ld-cache$(EXEEXT) \
677 @SIM_ENABLE_IGEN_TRUE@ igen/ld-decode$(EXEEXT) \
678 @SIM_ENABLE_IGEN_TRUE@ igen/ld-insn$(EXEEXT) \
679 @SIM_ENABLE_IGEN_TRUE@ igen/table$(EXEEXT)
680 @SIM_ENABLE_IGEN_TRUE@am__EXEEXT_2 = $(am__EXEEXT_1)
681 @SIM_ENABLE_ARCH_cr16_TRUE@am__EXEEXT_3 = cr16/gencode$(EXEEXT)
682 @SIM_ENABLE_ARCH_d10v_TRUE@am__EXEEXT_4 = d10v/gencode$(EXEEXT)
683 @SIM_ENABLE_ARCH_m32c_TRUE@am__EXEEXT_5 = m32c/opc2c$(EXEEXT)
684 @SIM_ENABLE_ARCH_m68hc11_TRUE@am__EXEEXT_6 = m68hc11/gencode$(EXEEXT)
685 @SIM_ENABLE_ARCH_sh_TRUE@am__EXEEXT_7 = sh/gencode$(EXEEXT)
686 am__EXEEXT_8 = testsuite/common/bits32m0$(EXEEXT) \
687 testsuite/common/bits32m31$(EXEEXT) \
688 testsuite/common/bits64m0$(EXEEXT) \
689 testsuite/common/bits64m63$(EXEEXT) \
690 testsuite/common/alu-tst$(EXEEXT)
691 @SIM_ENABLE_ARCH_cris_TRUE@am__EXEEXT_9 = cris/rvdummy$(EXEEXT)
692 @SIM_ENABLE_ARCH_aarch64_TRUE@am__EXEEXT_10 = aarch64/run$(EXEEXT)
693 @SIM_ENABLE_ARCH_arm_TRUE@am__EXEEXT_11 = arm/run$(EXEEXT)
694 @SIM_ENABLE_ARCH_avr_TRUE@am__EXEEXT_12 = avr/run$(EXEEXT)
695 @SIM_ENABLE_ARCH_bfin_TRUE@am__EXEEXT_13 = bfin/run$(EXEEXT)
696 @SIM_ENABLE_ARCH_bpf_TRUE@am__EXEEXT_14 = bpf/run$(EXEEXT)
697 @SIM_ENABLE_ARCH_cr16_TRUE@am__EXEEXT_15 = cr16/run$(EXEEXT)
698 @SIM_ENABLE_ARCH_cris_TRUE@am__EXEEXT_16 = cris/run$(EXEEXT)
699 @SIM_ENABLE_ARCH_d10v_TRUE@am__EXEEXT_17 = d10v/run$(EXEEXT)
700 @SIM_ENABLE_ARCH_erc32_TRUE@am__EXEEXT_18 = erc32/run$(EXEEXT) \
701 @SIM_ENABLE_ARCH_erc32_TRUE@ erc32/sis$(EXEEXT)
702 @SIM_ENABLE_ARCH_examples_TRUE@am__EXEEXT_19 = \
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705 @SIM_ENABLE_ARCH_ft32_TRUE@am__EXEEXT_21 = ft32/run$(EXEEXT)
706 @SIM_ENABLE_ARCH_h8300_TRUE@am__EXEEXT_22 = h8300/run$(EXEEXT)
707 @SIM_ENABLE_ARCH_iq2000_TRUE@am__EXEEXT_23 = iq2000/run$(EXEEXT)
708 @SIM_ENABLE_ARCH_lm32_TRUE@am__EXEEXT_24 = lm32/run$(EXEEXT)
709 @SIM_ENABLE_ARCH_m32c_TRUE@am__EXEEXT_25 = m32c/run$(EXEEXT)
710 @SIM_ENABLE_ARCH_m32r_TRUE@am__EXEEXT_26 = m32r/run$(EXEEXT)
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712 @SIM_ENABLE_ARCH_mcore_TRUE@am__EXEEXT_28 = mcore/run$(EXEEXT)
713 @SIM_ENABLE_ARCH_microblaze_TRUE@am__EXEEXT_29 = \
714 @SIM_ENABLE_ARCH_microblaze_TRUE@ microblaze/run$(EXEEXT)
715 @SIM_ENABLE_ARCH_mips_TRUE@am__EXEEXT_30 = mips/run$(EXEEXT)
716 @SIM_ENABLE_ARCH_mn10300_TRUE@am__EXEEXT_31 = mn10300/run$(EXEEXT)
717 @SIM_ENABLE_ARCH_moxie_TRUE@am__EXEEXT_32 = moxie/run$(EXEEXT)
718 @SIM_ENABLE_ARCH_msp430_TRUE@am__EXEEXT_33 = msp430/run$(EXEEXT)
719 @SIM_ENABLE_ARCH_or1k_TRUE@am__EXEEXT_34 = or1k/run$(EXEEXT)
720 @SIM_ENABLE_ARCH_ppc_TRUE@am__EXEEXT_35 = ppc/run$(EXEEXT) \
721 @SIM_ENABLE_ARCH_ppc_TRUE@ ppc/psim$(EXEEXT)
722 @SIM_ENABLE_ARCH_pru_TRUE@am__EXEEXT_36 = pru/run$(EXEEXT)
723 @SIM_ENABLE_ARCH_riscv_TRUE@am__EXEEXT_37 = riscv/run$(EXEEXT)
724 @SIM_ENABLE_ARCH_rl78_TRUE@am__EXEEXT_38 = rl78/run$(EXEEXT)
725 @SIM_ENABLE_ARCH_rx_TRUE@am__EXEEXT_39 = rx/run$(EXEEXT)
726 @SIM_ENABLE_ARCH_sh_TRUE@am__EXEEXT_40 = sh/run$(EXEEXT)
727 @SIM_ENABLE_ARCH_v850_TRUE@am__EXEEXT_41 = v850/run$(EXEEXT)
728 PROGRAMS = $(noinst_PROGRAMS)
729 am_aarch64_run_OBJECTS =
730 aarch64_run_OBJECTS = $(am_aarch64_run_OBJECTS)
731 am__DEPENDENCIES_1 = $(BFD_LIB) $(OPCODES_LIB) $(LIBIBERTY_LIB)
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733 @SIM_ENABLE_ARCH_aarch64_TRUE@ aarch64/nrun.o aarch64/libsim.a \
734 @SIM_ENABLE_ARCH_aarch64_TRUE@ $(am__DEPENDENCIES_1)
735 AM_V_lt = $(am__v_lt_@AM_V@)
736 am__v_lt_ = $(am__v_lt_@AM_DEFAULT_V@)
737 am__v_lt_0 = --silent
738 am__v_lt_1 =
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743 am_avr_run_OBJECTS =
744 avr_run_OBJECTS = $(am_avr_run_OBJECTS)
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770 cris_rvdummy_OBJECTS = $(am_cris_rvdummy_OBJECTS)
771 @SIM_ENABLE_ARCH_cris_TRUE@cris_rvdummy_DEPENDENCIES = \
772 @SIM_ENABLE_ARCH_cris_TRUE@ $(LIBIBERTY_LIB)
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776 @SIM_ENABLE_ARCH_d10v_TRUE@d10v_gencode_DEPENDENCIES = \
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781 @SIM_ENABLE_ARCH_d10v_TRUE@ d10v/libsim.a $(am__DEPENDENCIES_1)
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788 @SIM_ENABLE_ARCH_erc32_TRUE@ $(am__DEPENDENCIES_2) \
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790 erc32_sis_SOURCES = erc32/sis.c
791 erc32_sis_OBJECTS = erc32/sis.$(OBJEXT)
792 erc32_sis_LDADD = $(LDADD)
793 am_example_synacor_run_OBJECTS =
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795 @SIM_ENABLE_ARCH_examples_TRUE@example_synacor_run_DEPENDENCIES = \
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803 am_ft32_run_OBJECTS =
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806 @SIM_ENABLE_ARCH_ft32_TRUE@ ft32/libsim.a $(am__DEPENDENCIES_1)
807 am_h8300_run_OBJECTS =
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809 @SIM_ENABLE_ARCH_h8300_TRUE@h8300_run_DEPENDENCIES = h8300/nrun.o \
810 @SIM_ENABLE_ARCH_h8300_TRUE@ h8300/libsim.a \
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813 igen_filter_OBJECTS = $(am_igen_filter_OBJECTS)
814 @SIM_ENABLE_IGEN_TRUE@igen_filter_DEPENDENCIES = igen/filter-main.o \
815 @SIM_ENABLE_IGEN_TRUE@ igen/libigen.a
816 am_igen_gen_OBJECTS =
817 igen_gen_OBJECTS = $(am_igen_gen_OBJECTS)
818 @SIM_ENABLE_IGEN_TRUE@igen_gen_DEPENDENCIES = igen/gen-main.o \
819 @SIM_ENABLE_IGEN_TRUE@ igen/libigen.a
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981 $(CPPFLAGS) $(AM_CFLAGS) $(CFLAGS)
982 LTCOMPILE = $(LIBTOOL) $(AM_V_lt) --tag=CC $(AM_LIBTOOLFLAGS) \
983 $(LIBTOOLFLAGS) --mode=compile $(CC) $(DEFS) \
984 $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) \
985 $(AM_CFLAGS) $(CFLAGS)
986 AM_V_CC = $(am__v_CC_@AM_V@)
987 am__v_CC_ = $(am__v_CC_@AM_DEFAULT_V@)
988 am__v_CC_0 = @echo " CC " $@;
989 am__v_CC_1 =
990 CCLD = $(CC)
991 LINK = $(LIBTOOL) $(AM_V_lt) --tag=CC $(AM_LIBTOOLFLAGS) \
992 $(LIBTOOLFLAGS) --mode=link $(CCLD) $(AM_CFLAGS) $(CFLAGS) \
993 $(AM_LDFLAGS) $(LDFLAGS) -o $@
994 AM_V_CCLD = $(am__v_CCLD_@AM_V@)
995 am__v_CCLD_ = $(am__v_CCLD_@AM_DEFAULT_V@)
996 am__v_CCLD_0 = @echo " CCLD " $@;
997 am__v_CCLD_1 =
998 SOURCES = $(aarch64_libsim_a_SOURCES) $(arm_libsim_a_SOURCES) \
999 $(avr_libsim_a_SOURCES) $(bfin_libsim_a_SOURCES) \
1000 $(bpf_libsim_a_SOURCES) $(common_libcommon_a_SOURCES) \
1001 $(cr16_libsim_a_SOURCES) $(cris_libsim_a_SOURCES) \
1002 $(d10v_libsim_a_SOURCES) $(erc32_libsim_a_SOURCES) \
1003 $(example_synacor_libsim_a_SOURCES) $(frv_libsim_a_SOURCES) \
1004 $(ft32_libsim_a_SOURCES) $(h8300_libsim_a_SOURCES) \
1005 $(igen_libigen_a_SOURCES) $(iq2000_libsim_a_SOURCES) \
1006 $(lm32_libsim_a_SOURCES) $(m32c_libsim_a_SOURCES) \
1007 $(m32r_libsim_a_SOURCES) $(m68hc11_libsim_a_SOURCES) \
1008 $(mcore_libsim_a_SOURCES) $(aarch64_run_SOURCES) \
1009 $(arm_run_SOURCES) $(avr_run_SOURCES) $(bfin_run_SOURCES) \
1010 $(bpf_run_SOURCES) $(cr16_gencode_SOURCES) $(cr16_run_SOURCES) \
1011 $(cris_run_SOURCES) $(cris_rvdummy_SOURCES) \
1012 $(d10v_gencode_SOURCES) $(d10v_run_SOURCES) \
1013 $(erc32_run_SOURCES) erc32/sis.c \
1014 $(example_synacor_run_SOURCES) $(frv_run_SOURCES) \
1015 $(ft32_run_SOURCES) $(h8300_run_SOURCES) \
1016 $(igen_filter_SOURCES) $(igen_gen_SOURCES) \
1017 $(igen_igen_SOURCES) $(igen_ld_cache_SOURCES) \
1018 $(igen_ld_decode_SOURCES) $(igen_ld_insn_SOURCES) \
1019 $(igen_table_SOURCES) $(iq2000_run_SOURCES) \
1020 $(lm32_run_SOURCES) $(m32c_opc2c_SOURCES) $(m32c_run_SOURCES) \
1021 $(m32r_run_SOURCES) $(m68hc11_gencode_SOURCES) \
1022 $(m68hc11_run_SOURCES) $(mcore_run_SOURCES) \
1023 $(microblaze_run_SOURCES) $(mips_run_SOURCES) \
1024 $(mn10300_run_SOURCES) $(moxie_run_SOURCES) \
1025 $(msp430_run_SOURCES) $(or1k_run_SOURCES) ppc/psim.c \
1026 $(ppc_run_SOURCES) $(pru_run_SOURCES) $(riscv_run_SOURCES) \
1027 $(rl78_run_SOURCES) $(rx_run_SOURCES) $(sh_gencode_SOURCES) \
1028 $(sh_run_SOURCES) testsuite/common/alu-tst.c \
1029 testsuite/common/bits-gen.c testsuite/common/bits32m0.c \
1030 testsuite/common/bits32m31.c testsuite/common/bits64m0.c \
1031 testsuite/common/bits64m63.c testsuite/common/fpu-tst.c \
1032 $(v850_run_SOURCES)
1033 RECURSIVE_TARGETS = all-recursive check-recursive cscopelist-recursive \
1034 ctags-recursive dvi-recursive html-recursive info-recursive \
1035 install-data-recursive install-dvi-recursive \
1036 install-exec-recursive install-html-recursive \
1037 install-info-recursive install-pdf-recursive \
1038 install-ps-recursive install-recursive installcheck-recursive \
1039 installdirs-recursive pdf-recursive ps-recursive \
1040 tags-recursive uninstall-recursive
1041 am__can_run_installinfo = \
1042 case $$AM_UPDATE_INFO_DIR in \
1043 n|no|NO) false;; \
1044 *) (install-info --version) >/dev/null 2>&1;; \
1045 esac
1046 am__vpath_adj_setup = srcdirstrip=`echo "$(srcdir)" | sed 's|.|.|g'`;
1047 am__vpath_adj = case $$p in \
1048 $(srcdir)/*) f=`echo "$$p" | sed "s|^$$srcdirstrip/||"`;; \
1049 *) f=$$p;; \
1050 esac;
1051 am__strip_dir = f=`echo $$p | sed -e 's|^.*/||'`;
1052 am__install_max = 40
1053 am__nobase_strip_setup = \
1054 srcdirstrip=`echo "$(srcdir)" | sed 's/[].[^$$\\*|]/\\\\&/g'`
1055 am__nobase_strip = \
1056 for p in $$list; do echo "$$p"; done | sed -e "s|$$srcdirstrip/||"
1057 am__nobase_list = $(am__nobase_strip_setup); \
1058 for p in $$list; do echo "$$p $$p"; done | \
1059 sed "s| $$srcdirstrip/| |;"' / .*\//!s/ .*/ ./; s,\( .*\)/[^/]*$$,\1,' | \
1060 $(AWK) 'BEGIN { files["."] = "" } { files[$$2] = files[$$2] " " $$1; \
1061 if (++n[$$2] == $(am__install_max)) \
1062 { print $$2, files[$$2]; n[$$2] = 0; files[$$2] = "" } } \
1063 END { for (dir in files) print dir, files[dir] }'
1064 am__base_list = \
1065 sed '$$!N;$$!N;$$!N;$$!N;$$!N;$$!N;$$!N;s/\n/ /g' | \
1066 sed '$$!N;$$!N;$$!N;$$!N;s/\n/ /g'
1067 am__uninstall_files_from_dir = { \
1068 test -z "$$files" \
1069 || { test ! -d "$$dir" && test ! -f "$$dir" && test ! -r "$$dir"; } \
1070 || { echo " ( cd '$$dir' && rm -f" $$files ")"; \
1071 $(am__cd) "$$dir" && rm -f $$files; }; \
1072 }
1073 am__installdirs = "$(DESTDIR)$(armdocdir)" "$(DESTDIR)$(dtbdir)" \
1074 "$(DESTDIR)$(erc32docdir)" "$(DESTDIR)$(frvdocdir)" \
1075 "$(DESTDIR)$(or1kdocdir)" "$(DESTDIR)$(ppcdocdir)" \
1076 "$(DESTDIR)$(rxdocdir)" "$(DESTDIR)$(pkgincludedir)"
1077 DATA = $(armdoc_DATA) $(dtb_DATA) $(erc32doc_DATA) $(frvdoc_DATA) \
1078 $(or1kdoc_DATA) $(ppcdoc_DATA) $(rxdoc_DATA)
1079 am__pkginclude_HEADERS_DIST = $(srcroot)/include/sim/callback.h \
1080 $(srcroot)/include/sim/sim.h
1081 HEADERS = $(pkginclude_HEADERS)
1082 RECURSIVE_CLEAN_TARGETS = mostlyclean-recursive clean-recursive \
1083 distclean-recursive maintainer-clean-recursive
1084 am__recursive_targets = \
1085 $(RECURSIVE_TARGETS) \
1086 $(RECURSIVE_CLEAN_TARGETS) \
1087 $(am__extra_recursive_targets)
1088 AM_RECURSIVE_TARGETS = $(am__recursive_targets:-recursive=) TAGS CTAGS \
1089 cscope check recheck
1090 am__tagged_files = $(HEADERS) $(SOURCES) $(TAGS_FILES) \
1091 $(LISP)config.h.in
1092 # Read a list of newline-separated strings from the standard input,
1093 # and print each of them once, without duplicates. Input order is
1094 # *not* preserved.
1095 am__uniquify_input = $(AWK) '\
1096 BEGIN { nonempty = 0; } \
1097 { items[$$0] = 1; nonempty = 1; } \
1098 END { if (nonempty) { for (i in items) print i; }; } \
1099 '
1100 # Make sure the list of sources is unique. This is necessary because,
1101 # e.g., the same source file might be shared among _SOURCES variables
1102 # for different programs/libraries.
1103 am__define_uniq_tagged_files = \
1104 list='$(am__tagged_files)'; \
1105 unique=`for i in $$list; do \
1106 if test -f "$$i"; then echo $$i; else echo $(srcdir)/$$i; fi; \
1107 done | $(am__uniquify_input)`
1108 ETAGS = etags
1109 CTAGS = ctags
1110 CSCOPE = cscope
1111 DEJATOOL = $(PACKAGE)
1112 RUNTESTDEFAULTFLAGS = --tool $$tool --srcdir $$srcdir
1113 EXPECT = expect
1114 RUNTEST = runtest
1115 am__tty_colors_dummy = \
1116 mgn= red= grn= lgn= blu= brg= std=; \
1117 am__color_tests=no
1118 am__tty_colors = { \
1119 $(am__tty_colors_dummy); \
1120 if test "X$(AM_COLOR_TESTS)" = Xno; then \
1121 am__color_tests=no; \
1122 elif test "X$(AM_COLOR_TESTS)" = Xalways; then \
1123 am__color_tests=yes; \
1124 elif test "X$$TERM" != Xdumb && { test -t 1; } 2>/dev/null; then \
1125 am__color_tests=yes; \
1126 fi; \
1127 if test $$am__color_tests = yes; then \
1128 red='\e[0;31m'; \
1129 grn='\e[0;32m'; \
1130 lgn='\e[1;32m'; \
1131 blu='\e[1;34m'; \
1132 mgn='\e[0;35m'; \
1133 brg='\e[1m'; \
1134 std='\e[m'; \
1135 fi; \
1136 }
1137 am__recheck_rx = ^[ ]*:recheck:[ ]*
1138 am__global_test_result_rx = ^[ ]*:global-test-result:[ ]*
1139 am__copy_in_global_log_rx = ^[ ]*:copy-in-global-log:[ ]*
1140 # A command that, given a newline-separated list of test names on the
1141 # standard input, print the name of the tests that are to be re-run
1142 # upon "make recheck".
1143 am__list_recheck_tests = $(AWK) '{ \
1144 recheck = 1; \
1145 while ((rc = (getline line < ($$0 ".trs"))) != 0) \
1146 { \
1147 if (rc < 0) \
1148 { \
1149 if ((getline line2 < ($$0 ".log")) < 0) \
1150 recheck = 0; \
1151 break; \
1152 } \
1153 else if (line ~ /$(am__recheck_rx)[nN][Oo]/) \
1154 { \
1155 recheck = 0; \
1156 break; \
1157 } \
1158 else if (line ~ /$(am__recheck_rx)[yY][eE][sS]/) \
1159 { \
1160 break; \
1161 } \
1162 }; \
1163 if (recheck) \
1164 print $$0; \
1165 close ($$0 ".trs"); \
1166 close ($$0 ".log"); \
1167 }'
1168 # A command that, given a newline-separated list of test names on the
1169 # standard input, create the global log from their .trs and .log files.
1170 am__create_global_log = $(AWK) ' \
1171 function fatal(msg) \
1172 { \
1173 print "fatal: making $@: " msg | "cat >&2"; \
1174 exit 1; \
1175 } \
1176 function rst_section(header) \
1177 { \
1178 print header; \
1179 len = length(header); \
1180 for (i = 1; i <= len; i = i + 1) \
1181 printf "="; \
1182 printf "\n\n"; \
1183 } \
1184 { \
1185 copy_in_global_log = 1; \
1186 global_test_result = "RUN"; \
1187 while ((rc = (getline line < ($$0 ".trs"))) != 0) \
1188 { \
1189 if (rc < 0) \
1190 fatal("failed to read from " $$0 ".trs"); \
1191 if (line ~ /$(am__global_test_result_rx)/) \
1192 { \
1193 sub("$(am__global_test_result_rx)", "", line); \
1194 sub("[ ]*$$", "", line); \
1195 global_test_result = line; \
1196 } \
1197 else if (line ~ /$(am__copy_in_global_log_rx)[nN][oO]/) \
1198 copy_in_global_log = 0; \
1199 }; \
1200 if (copy_in_global_log) \
1201 { \
1202 rst_section(global_test_result ": " $$0); \
1203 while ((rc = (getline line < ($$0 ".log"))) != 0) \
1204 { \
1205 if (rc < 0) \
1206 fatal("failed to read from " $$0 ".log"); \
1207 print line; \
1208 }; \
1209 printf "\n"; \
1210 }; \
1211 close ($$0 ".trs"); \
1212 close ($$0 ".log"); \
1213 }'
1214 # Restructured Text title.
1215 am__rst_title = { sed 's/.*/ & /;h;s/./=/g;p;x;s/ *$$//;p;g' && echo; }
1216 # Solaris 10 'make', and several other traditional 'make' implementations,
1217 # pass "-e" to $(SHELL), and POSIX 2008 even requires this. Work around it
1218 # by disabling -e (using the XSI extension "set +e") if it's set.
1219 am__sh_e_setup = case $$- in *e*) set +e;; esac
1220 # Default flags passed to test drivers.
1221 am__common_driver_flags = \
1222 --color-tests "$$am__color_tests" \
1223 --enable-hard-errors "$$am__enable_hard_errors" \
1224 --expect-failure "$$am__expect_failure"
1225 # To be inserted before the command running the test. Creates the
1226 # directory for the log if needed. Stores in $dir the directory
1227 # containing $f, in $tst the test, in $log the log. Executes the
1228 # developer- defined test setup AM_TESTS_ENVIRONMENT (if any), and
1229 # passes TESTS_ENVIRONMENT. Set up options for the wrapper that
1230 # will run the test scripts (or their associated LOG_COMPILER, if
1231 # thy have one).
1232 am__check_pre = \
1233 $(am__sh_e_setup); \
1234 $(am__vpath_adj_setup) $(am__vpath_adj) \
1235 $(am__tty_colors); \
1236 srcdir=$(srcdir); export srcdir; \
1237 case "$@" in \
1238 */*) am__odir=`echo "./$@" | sed 's|/[^/]*$$||'`;; \
1239 *) am__odir=.;; \
1240 esac; \
1241 test "x$$am__odir" = x"." || test -d "$$am__odir" \
1242 || $(MKDIR_P) "$$am__odir" || exit $$?; \
1243 if test -f "./$$f"; then dir=./; \
1244 elif test -f "$$f"; then dir=; \
1245 else dir="$(srcdir)/"; fi; \
1246 tst=$$dir$$f; log='$@'; \
1247 if test -n '$(DISABLE_HARD_ERRORS)'; then \
1248 am__enable_hard_errors=no; \
1249 else \
1250 am__enable_hard_errors=yes; \
1251 fi; \
1252 case " $(XFAIL_TESTS) " in \
1253 *[\ \ ]$$f[\ \ ]* | *[\ \ ]$$dir$$f[\ \ ]*) \
1254 am__expect_failure=yes;; \
1255 *) \
1256 am__expect_failure=no;; \
1257 esac; \
1258 $(AM_TESTS_ENVIRONMENT) $(TESTS_ENVIRONMENT)
1259 # A shell command to get the names of the tests scripts with any registered
1260 # extension removed (i.e., equivalently, the names of the test logs, with
1261 # the '.log' extension removed). The result is saved in the shell variable
1262 # '$bases'. This honors runtime overriding of TESTS and TEST_LOGS. Sadly,
1263 # we cannot use something simpler, involving e.g., "$(TEST_LOGS:.log=)",
1264 # since that might cause problem with VPATH rewrites for suffix-less tests.
1265 # See also 'test-harness-vpath-rewrite.sh' and 'test-trs-basic.sh'.
1266 am__set_TESTS_bases = \
1267 bases='$(TEST_LOGS)'; \
1268 bases=`for i in $$bases; do echo $$i; done | sed 's/\.log$$//'`; \
1269 bases=`echo $$bases`
1270 RECHECK_LOGS = $(TEST_LOGS)
1271 TEST_SUITE_LOG = test-suite.log
1272 TEST_EXTENSIONS = @EXEEXT@ .test
1273 LOG_DRIVER = $(SHELL) $(top_srcdir)/../test-driver
1274 LOG_COMPILE = $(LOG_COMPILER) $(AM_LOG_FLAGS) $(LOG_FLAGS)
1275 am__set_b = \
1276 case '$@' in \
1277 */*) \
1278 case '$*' in \
1279 */*) b='$*';; \
1280 *) b=`echo '$@' | sed 's/\.log$$//'`; \
1281 esac;; \
1282 *) \
1283 b='$*';; \
1284 esac
1285 am__test_logs1 = $(TESTS:=.log)
1286 am__test_logs2 = $(am__test_logs1:@EXEEXT@.log=.log)
1287 TEST_LOGS = $(am__test_logs2:.test.log=.log)
1288 TEST_LOG_DRIVER = $(SHELL) $(top_srcdir)/../test-driver
1289 TEST_LOG_COMPILE = $(TEST_LOG_COMPILER) $(AM_TEST_LOG_FLAGS) \
1290 $(TEST_LOG_FLAGS)
1291 DIST_SUBDIRS = $(SUBDIRS)
1292 ACLOCAL = @ACLOCAL@
1293 AMTAR = @AMTAR@
1294 AM_DEFAULT_VERBOSITY = @AM_DEFAULT_VERBOSITY@
1295 AR = @AR@
1296 AR_FOR_BUILD = @AR_FOR_BUILD@
1297 AS_FOR_TARGET = @AS_FOR_TARGET@
1298 AS_FOR_TARGET_AARCH64 = @AS_FOR_TARGET_AARCH64@
1299 AS_FOR_TARGET_ARM = @AS_FOR_TARGET_ARM@
1300 AS_FOR_TARGET_AVR = @AS_FOR_TARGET_AVR@
1301 AS_FOR_TARGET_BFIN = @AS_FOR_TARGET_BFIN@
1302 AS_FOR_TARGET_BPF = @AS_FOR_TARGET_BPF@
1303 AS_FOR_TARGET_CR16 = @AS_FOR_TARGET_CR16@
1304 AS_FOR_TARGET_CRIS = @AS_FOR_TARGET_CRIS@
1305 AS_FOR_TARGET_D10V = @AS_FOR_TARGET_D10V@
1306 AS_FOR_TARGET_ERC32 = @AS_FOR_TARGET_ERC32@
1307 AS_FOR_TARGET_EXAMPLE_SYNACOR = @AS_FOR_TARGET_EXAMPLE_SYNACOR@
1308 AS_FOR_TARGET_FRV = @AS_FOR_TARGET_FRV@
1309 AS_FOR_TARGET_FT32 = @AS_FOR_TARGET_FT32@
1310 AS_FOR_TARGET_H8300 = @AS_FOR_TARGET_H8300@
1311 AS_FOR_TARGET_IQ2000 = @AS_FOR_TARGET_IQ2000@
1312 AS_FOR_TARGET_LM32 = @AS_FOR_TARGET_LM32@
1313 AS_FOR_TARGET_M32C = @AS_FOR_TARGET_M32C@
1314 AS_FOR_TARGET_M32R = @AS_FOR_TARGET_M32R@
1315 AS_FOR_TARGET_M68HC11 = @AS_FOR_TARGET_M68HC11@
1316 AS_FOR_TARGET_MCORE = @AS_FOR_TARGET_MCORE@
1317 AS_FOR_TARGET_MICROBLAZE = @AS_FOR_TARGET_MICROBLAZE@
1318 AS_FOR_TARGET_MIPS = @AS_FOR_TARGET_MIPS@
1319 AS_FOR_TARGET_MN10300 = @AS_FOR_TARGET_MN10300@
1320 AS_FOR_TARGET_MOXIE = @AS_FOR_TARGET_MOXIE@
1321 AS_FOR_TARGET_MSP430 = @AS_FOR_TARGET_MSP430@
1322 AS_FOR_TARGET_OR1K = @AS_FOR_TARGET_OR1K@
1323 AS_FOR_TARGET_PPC = @AS_FOR_TARGET_PPC@
1324 AS_FOR_TARGET_PRU = @AS_FOR_TARGET_PRU@
1325 AS_FOR_TARGET_RISCV = @AS_FOR_TARGET_RISCV@
1326 AS_FOR_TARGET_RL78 = @AS_FOR_TARGET_RL78@
1327 AS_FOR_TARGET_RX = @AS_FOR_TARGET_RX@
1328 AS_FOR_TARGET_SH = @AS_FOR_TARGET_SH@
1329 AS_FOR_TARGET_V850 = @AS_FOR_TARGET_V850@
1330 AUTOCONF = @AUTOCONF@
1331 AUTOHEADER = @AUTOHEADER@
1332 AUTOMAKE = @AUTOMAKE@
1333 AWK = @AWK@
1334 CC = @CC@
1335 CCDEPMODE = @CCDEPMODE@
1336 CC_FOR_BUILD = @CC_FOR_BUILD@
1337 CC_FOR_TARGET = @CC_FOR_TARGET@
1338 CC_FOR_TARGET_AARCH64 = @CC_FOR_TARGET_AARCH64@
1339 CC_FOR_TARGET_ARM = @CC_FOR_TARGET_ARM@
1340 CC_FOR_TARGET_AVR = @CC_FOR_TARGET_AVR@
1341 CC_FOR_TARGET_BFIN = @CC_FOR_TARGET_BFIN@
1342 CC_FOR_TARGET_BPF = @CC_FOR_TARGET_BPF@
1343 CC_FOR_TARGET_CR16 = @CC_FOR_TARGET_CR16@
1344 CC_FOR_TARGET_CRIS = @CC_FOR_TARGET_CRIS@
1345 CC_FOR_TARGET_D10V = @CC_FOR_TARGET_D10V@
1346 CC_FOR_TARGET_ERC32 = @CC_FOR_TARGET_ERC32@
1347 CC_FOR_TARGET_EXAMPLE_SYNACOR = @CC_FOR_TARGET_EXAMPLE_SYNACOR@
1348 CC_FOR_TARGET_FRV = @CC_FOR_TARGET_FRV@
1349 CC_FOR_TARGET_FT32 = @CC_FOR_TARGET_FT32@
1350 CC_FOR_TARGET_H8300 = @CC_FOR_TARGET_H8300@
1351 CC_FOR_TARGET_IQ2000 = @CC_FOR_TARGET_IQ2000@
1352 CC_FOR_TARGET_LM32 = @CC_FOR_TARGET_LM32@
1353 CC_FOR_TARGET_M32C = @CC_FOR_TARGET_M32C@
1354 CC_FOR_TARGET_M32R = @CC_FOR_TARGET_M32R@
1355 CC_FOR_TARGET_M68HC11 = @CC_FOR_TARGET_M68HC11@
1356 CC_FOR_TARGET_MCORE = @CC_FOR_TARGET_MCORE@
1357 CC_FOR_TARGET_MICROBLAZE = @CC_FOR_TARGET_MICROBLAZE@
1358 CC_FOR_TARGET_MIPS = @CC_FOR_TARGET_MIPS@
1359 CC_FOR_TARGET_MN10300 = @CC_FOR_TARGET_MN10300@
1360 CC_FOR_TARGET_MOXIE = @CC_FOR_TARGET_MOXIE@
1361 CC_FOR_TARGET_MSP430 = @CC_FOR_TARGET_MSP430@
1362 CC_FOR_TARGET_OR1K = @CC_FOR_TARGET_OR1K@
1363 CC_FOR_TARGET_PPC = @CC_FOR_TARGET_PPC@
1364 CC_FOR_TARGET_PRU = @CC_FOR_TARGET_PRU@
1365 CC_FOR_TARGET_RISCV = @CC_FOR_TARGET_RISCV@
1366 CC_FOR_TARGET_RL78 = @CC_FOR_TARGET_RL78@
1367 CC_FOR_TARGET_RX = @CC_FOR_TARGET_RX@
1368 CC_FOR_TARGET_SH = @CC_FOR_TARGET_SH@
1369 CC_FOR_TARGET_V850 = @CC_FOR_TARGET_V850@
1370 CFLAGS = @CFLAGS@
1371 CFLAGS_FOR_BUILD = @CFLAGS_FOR_BUILD@
1372 CGEN_MAINT = @CGEN_MAINT@
1373 CPP = @CPP@
1374 CPPFLAGS = @CPPFLAGS@
1375 CPPFLAGS_FOR_BUILD = @CPPFLAGS_FOR_BUILD@
1376 CYGPATH_W = @CYGPATH_W@
1377 C_DIALECT = @C_DIALECT@
1378 DEFS = @DEFS@
1379 DEPDIR = @DEPDIR@
1380 DSYMUTIL = @DSYMUTIL@
1381 DTC = @DTC@
1382 DUMPBIN = @DUMPBIN@
1383 ECHO_C = @ECHO_C@
1384 ECHO_N = @ECHO_N@
1385 ECHO_T = @ECHO_T@
1386 EGREP = @EGREP@
1387 EXEEXT = @EXEEXT@
1388 FGREP = @FGREP@
1389 GREP = @GREP@
1390 IGEN_FLAGS_SMP = @IGEN_FLAGS_SMP@
1391 INSTALL = @INSTALL@
1392 INSTALL_DATA = @INSTALL_DATA@
1393 INSTALL_PROGRAM = @INSTALL_PROGRAM@
1394 INSTALL_SCRIPT = @INSTALL_SCRIPT@
1395 INSTALL_STRIP_PROGRAM = @INSTALL_STRIP_PROGRAM@
1396 LD = @LD@
1397 LDFLAGS = @LDFLAGS@
1398 LDFLAGS_FOR_BUILD = @LDFLAGS_FOR_BUILD@
1399 LD_FOR_TARGET = @LD_FOR_TARGET@
1400 LD_FOR_TARGET_AARCH64 = @LD_FOR_TARGET_AARCH64@
1401 LD_FOR_TARGET_ARM = @LD_FOR_TARGET_ARM@
1402 LD_FOR_TARGET_AVR = @LD_FOR_TARGET_AVR@
1403 LD_FOR_TARGET_BFIN = @LD_FOR_TARGET_BFIN@
1404 LD_FOR_TARGET_BPF = @LD_FOR_TARGET_BPF@
1405 LD_FOR_TARGET_CR16 = @LD_FOR_TARGET_CR16@
1406 LD_FOR_TARGET_CRIS = @LD_FOR_TARGET_CRIS@
1407 LD_FOR_TARGET_D10V = @LD_FOR_TARGET_D10V@
1408 LD_FOR_TARGET_ERC32 = @LD_FOR_TARGET_ERC32@
1409 LD_FOR_TARGET_EXAMPLE_SYNACOR = @LD_FOR_TARGET_EXAMPLE_SYNACOR@
1410 LD_FOR_TARGET_FRV = @LD_FOR_TARGET_FRV@
1411 LD_FOR_TARGET_FT32 = @LD_FOR_TARGET_FT32@
1412 LD_FOR_TARGET_H8300 = @LD_FOR_TARGET_H8300@
1413 LD_FOR_TARGET_IQ2000 = @LD_FOR_TARGET_IQ2000@
1414 LD_FOR_TARGET_LM32 = @LD_FOR_TARGET_LM32@
1415 LD_FOR_TARGET_M32C = @LD_FOR_TARGET_M32C@
1416 LD_FOR_TARGET_M32R = @LD_FOR_TARGET_M32R@
1417 LD_FOR_TARGET_M68HC11 = @LD_FOR_TARGET_M68HC11@
1418 LD_FOR_TARGET_MCORE = @LD_FOR_TARGET_MCORE@
1419 LD_FOR_TARGET_MICROBLAZE = @LD_FOR_TARGET_MICROBLAZE@
1420 LD_FOR_TARGET_MIPS = @LD_FOR_TARGET_MIPS@
1421 LD_FOR_TARGET_MN10300 = @LD_FOR_TARGET_MN10300@
1422 LD_FOR_TARGET_MOXIE = @LD_FOR_TARGET_MOXIE@
1423 LD_FOR_TARGET_MSP430 = @LD_FOR_TARGET_MSP430@
1424 LD_FOR_TARGET_OR1K = @LD_FOR_TARGET_OR1K@
1425 LD_FOR_TARGET_PPC = @LD_FOR_TARGET_PPC@
1426 LD_FOR_TARGET_PRU = @LD_FOR_TARGET_PRU@
1427 LD_FOR_TARGET_RISCV = @LD_FOR_TARGET_RISCV@
1428 LD_FOR_TARGET_RL78 = @LD_FOR_TARGET_RL78@
1429 LD_FOR_TARGET_RX = @LD_FOR_TARGET_RX@
1430 LD_FOR_TARGET_SH = @LD_FOR_TARGET_SH@
1431 LD_FOR_TARGET_V850 = @LD_FOR_TARGET_V850@
1432 LIBOBJS = @LIBOBJS@
1433 LIBS = @LIBS@
1434 LIBTOOL = @LIBTOOL@
1435 LIPO = @LIPO@
1436 LN_S = @LN_S@
1437 LTLIBOBJS = @LTLIBOBJS@
1438 MAINT = @MAINT@
1439 MAKEINFO = @MAKEINFO@
1440 MKDIR_P = @MKDIR_P@
1441 NM = @NM@
1442 NMEDIT = @NMEDIT@
1443 OBJDUMP = @OBJDUMP@
1444 OBJEXT = @OBJEXT@
1445 OTOOL = @OTOOL@
1446 OTOOL64 = @OTOOL64@
1447 PACKAGE = @PACKAGE@
1448 PACKAGE_BUGREPORT = @PACKAGE_BUGREPORT@
1449 PACKAGE_NAME = @PACKAGE_NAME@
1450 PACKAGE_STRING = @PACKAGE_STRING@
1451 PACKAGE_TARNAME = @PACKAGE_TARNAME@
1452 PACKAGE_URL = @PACKAGE_URL@
1453 PACKAGE_VERSION = @PACKAGE_VERSION@
1454 PATH_SEPARATOR = @PATH_SEPARATOR@
1455 PKGVERSION = @PKGVERSION@
1456 PKG_CONFIG = @PKG_CONFIG@
1457 PKG_CONFIG_LIBDIR = @PKG_CONFIG_LIBDIR@
1458 PKG_CONFIG_PATH = @PKG_CONFIG_PATH@
1459 RANLIB = @RANLIB@
1460 RANLIB_FOR_BUILD = @RANLIB_FOR_BUILD@
1461 READLINE_CFLAGS = @READLINE_CFLAGS@
1462 READLINE_LIB = @READLINE_LIB@
1463 REPORT_BUGS_TEXI = @REPORT_BUGS_TEXI@
1464 REPORT_BUGS_TO = @REPORT_BUGS_TO@
1465 SDL_CFLAGS = @SDL_CFLAGS@
1466 SDL_LIBS = @SDL_LIBS@
1467 SED = @SED@
1468 SET_MAKE = @SET_MAKE@
1469 SHELL = @SHELL@
1470 SIM_COMMON_BUILD_FALSE = @SIM_COMMON_BUILD_FALSE@
1471 SIM_COMMON_BUILD_TRUE = @SIM_COMMON_BUILD_TRUE@
1472 SIM_ENABLED_ARCHES = @SIM_ENABLED_ARCHES@
1473 SIM_FRV_TRAPDUMP_FLAGS = @SIM_FRV_TRAPDUMP_FLAGS@
1474 SIM_HW_CFLAGS = @SIM_HW_CFLAGS@
1475 SIM_HW_SOCKSER = @SIM_HW_SOCKSER@
1476 SIM_INLINE = @SIM_INLINE@
1477 SIM_MIPS_BITSIZE = @SIM_MIPS_BITSIZE@
1478 SIM_MIPS_FPU_BITSIZE = @SIM_MIPS_FPU_BITSIZE@
1479 SIM_MIPS_GEN = @SIM_MIPS_GEN@
1480 SIM_MIPS_IGEN_ITABLE_FLAGS = @SIM_MIPS_IGEN_ITABLE_FLAGS@
1481 SIM_MIPS_M16_FLAGS = @SIM_MIPS_M16_FLAGS@
1482 SIM_MIPS_MULTI_IGEN_CONFIGS = @SIM_MIPS_MULTI_IGEN_CONFIGS@
1483 SIM_MIPS_MULTI_OBJ = @SIM_MIPS_MULTI_OBJ@
1484 SIM_MIPS_MULTI_SRC = @SIM_MIPS_MULTI_SRC@
1485 SIM_MIPS_SINGLE_FLAGS = @SIM_MIPS_SINGLE_FLAGS@
1486 SIM_MIPS_SUBTARGET = @SIM_MIPS_SUBTARGET@
1487 SIM_PRIMARY_TARGET = @SIM_PRIMARY_TARGET@
1488 SIM_RISCV_BITSIZE = @SIM_RISCV_BITSIZE@
1489 SIM_RX_CYCLE_ACCURATE_FLAGS = @SIM_RX_CYCLE_ACCURATE_FLAGS@
1490 SIM_SUBDIRS = @SIM_SUBDIRS@
1491 SIM_TOOLCHAIN_VARS = @SIM_TOOLCHAIN_VARS@
1492 STRIP = @STRIP@
1493 TERMCAP_LIB = @TERMCAP_LIB@
1494 VERSION = @VERSION@
1495 WARN_CFLAGS = @WARN_CFLAGS@
1496 WERROR_CFLAGS = @WERROR_CFLAGS@
1497 abs_builddir = @abs_builddir@
1498 abs_srcdir = @abs_srcdir@
1499 abs_top_builddir = @abs_top_builddir@
1500 abs_top_srcdir = @abs_top_srcdir@
1501 ac_ct_CC = @ac_ct_CC@
1502 ac_ct_DUMPBIN = @ac_ct_DUMPBIN@
1503 am__include = @am__include@
1504 am__leading_dot = @am__leading_dot@
1505 am__quote = @am__quote@
1506 am__tar = @am__tar@
1507 am__untar = @am__untar@
1508 bindir = @bindir@
1509 build = @build@
1510 build_alias = @build_alias@
1511 build_cpu = @build_cpu@
1512 build_os = @build_os@
1513 build_vendor = @build_vendor@
1514 builddir = @builddir@
1515 cgen = @cgen@
1516 cgendir = @cgendir@
1517 datadir = @datadir@
1518 datarootdir = @datarootdir@
1519 docdir = @docdir@
1520 dvidir = @dvidir@
1521 exec_prefix = @exec_prefix@
1522 host = @host@
1523 host_alias = @host_alias@
1524 host_cpu = @host_cpu@
1525 host_os = @host_os@
1526 host_vendor = @host_vendor@
1527 htmldir = @htmldir@
1528 includedir = @includedir@
1529 infodir = @infodir@
1530 install_sh = @install_sh@
1531 libdir = @libdir@
1532 libexecdir = @libexecdir@
1533 localedir = @localedir@
1534 localstatedir = @localstatedir@
1535 mandir = @mandir@
1536 mkdir_p = @mkdir_p@
1537 oldincludedir = @oldincludedir@
1538 pdfdir = @pdfdir@
1539 prefix = @prefix@
1540 program_transform_name = @program_transform_name@
1541 psdir = @psdir@
1542 sbindir = @sbindir@
1543 sharedstatedir = @sharedstatedir@
1544 sim_bitsize = @sim_bitsize@
1545 sim_float = @sim_float@
1546 srcdir = @srcdir@
1547 subdirs = @subdirs@
1548 sysconfdir = @sysconfdir@
1549 target = @target@
1550 target_alias = @target_alias@
1551 target_cpu = @target_cpu@
1552 target_os = @target_os@
1553 target_vendor = @target_vendor@
1554 top_build_prefix = @top_build_prefix@
1555 top_builddir = @top_builddir@
1556 top_srcdir = @top_srcdir@
1557 AUTOMAKE_OPTIONS = dejagnu foreign no-dist subdir-objects
1558 ACLOCAL_AMFLAGS = -Im4 -I.. -I../config
1559 GNULIB_PARENT_DIR = ..
1560 srccom = $(srcdir)/common
1561 srcroot = $(srcdir)/..
1562 SUBDIRS = @subdirs@ $(SIM_SUBDIRS)
1563 AM_MAKEFLAGS = SIM_NEW_COMMON_OBJS_="$(SIM_NEW_COMMON_OBJS)" \
1564 $(am__append_3) $(am__append_16) $(am__append_30) \
1565 $(am__append_63) $(am__append_74) $(am__append_80) \
1566 $(am__append_88) $(am__append_97)
1567 pkginclude_HEADERS = $(am__append_1)
1568 noinst_LIBRARIES = common/libcommon.a $(am__append_5) $(am__append_8) \
1569 $(am__append_10) $(am__append_12) $(am__append_14) \
1570 $(am__append_17) $(am__append_22) $(am__append_28) \
1571 $(am__append_35) $(am__append_41) $(am__append_45) \
1572 $(am__append_47) $(am__append_52) $(am__append_54) \
1573 $(am__append_56) $(am__append_61) $(am__append_67) \
1574 $(am__append_72) $(am__append_78) $(am__append_84)
1575 BUILT_SOURCES = $(am__append_19) $(am__append_24) $(am__append_32) \
1576 $(am__append_37) $(am__append_49) $(am__append_58) \
1577 $(am__append_64) $(am__append_75) $(am__append_89) \
1578 $(am__append_98) $(am__append_104) $(am__append_113) \
1579 $(am__append_118)
1580 CLEANFILES = common/version.c common/version.c-stamp \
1581 testsuite/common/bits-gen testsuite/common/bits32m0.c \
1582 testsuite/common/bits32m31.c testsuite/common/bits64m0.c \
1583 testsuite/common/bits64m63.c
1584 DISTCLEANFILES = $(am__append_95)
1585 MOSTLYCLEANFILES = core $(common_HW_CONFIG_H_TARGETS) $(patsubst \
1586 %,%/stamp-hw,$(SIM_ENABLED_ARCHES)) \
1587 $(common_GEN_MODULES_C_TARGETS) $(patsubst \
1588 %,%/stamp-modules,$(SIM_ENABLED_ARCHES)) $(am__append_7) \
1589 site-sim-config.exp testrun.log testrun.sum $(am__append_21) \
1590 $(am__append_27) $(am__append_34) $(am__append_40) \
1591 $(am__append_51) $(am__append_60) $(am__append_66) \
1592 $(am__append_71) $(am__append_77) $(am__append_83) \
1593 $(am__append_94) $(am__append_100) $(am__append_106) \
1594 $(am__append_116) $(am__append_120)
1595 AM_CFLAGS = $(WERROR_CFLAGS) $(WARN_CFLAGS)
1596 AM_CPPFLAGS = $(INCGNU) -I$(srcroot)/include -I../bfd -I.. \
1597 $(SIM_HW_CFLAGS) $(SIM_INLINE) -I$(srcdir)/common \
1598 -DSIM_COMMON_BUILD
1599 AM_CPPFLAGS_FOR_BUILD = -I$(srcroot)/include $(SIM_HW_CFLAGS) \
1600 $(SIM_INLINE) -I$(srcdir)/common
1601 COMPILE_FOR_BUILD = $(CC_FOR_BUILD) $(AM_CPPFLAGS_FOR_BUILD) $(CPPFLAGS_FOR_BUILD) $(CFLAGS_FOR_BUILD)
1602 LINK_FOR_BUILD = $(CC_FOR_BUILD) $(CFLAGS_FOR_BUILD) $(LDFLAGS_FOR_BUILD) -o $@
1603 SIM_ALL_RECURSIVE_DEPS = common/libcommon.a \
1604 $(common_HW_CONFIG_H_TARGETS) $(common_GEN_MODULES_C_TARGETS) \
1605 $(am__append_4) $(am__append_20) $(am__append_25) \
1606 $(am__append_33) $(am__append_38) $(am__append_50) \
1607 $(am__append_59) $(am__append_65) $(am__append_69) \
1608 $(am__append_76) $(am__append_81) $(am__append_93) \
1609 $(am__append_99) $(am__append_105) $(am__append_114) \
1610 $(am__append_119)
1611 SIM_INSTALL_DATA_LOCAL_DEPS =
1612 SIM_INSTALL_EXEC_LOCAL_DEPS = $(am__append_43)
1613 SIM_UNINSTALL_LOCAL_DEPS = $(am__append_44)
1614 common_libcommon_a_SOURCES = \
1615 common/callback.c \
1616 common/portability.c \
1617 common/sim-load.c \
1618 common/syscall.c \
1619 common/target-newlib-errno.c \
1620 common/target-newlib-open.c \
1621 common/target-newlib-signal.c \
1622 common/target-newlib-syscall.c \
1623 common/version.c
1624
1625 SIM_COMMON_HW_OBJS = \
1626 hw-alloc.o \
1627 hw-base.o \
1628 hw-device.o \
1629 hw-events.o \
1630 hw-handles.o \
1631 hw-instances.o \
1632 hw-ports.o \
1633 hw-properties.o \
1634 hw-tree.o \
1635 sim-hw.o
1636
1637 SIM_NEW_COMMON_OBJS = sim-arange.o sim-bits.o sim-close.o \
1638 sim-command.o sim-config.o sim-core.o sim-cpu.o sim-endian.o \
1639 sim-engine.o sim-events.o sim-fpu.o sim-hload.o sim-hrw.o \
1640 sim-io.o sim-info.o sim-memopt.o sim-model.o sim-module.o \
1641 sim-options.o sim-profile.o sim-reason.o sim-reg.o \
1642 sim-signal.o sim-stop.o sim-syscall.o sim-trace.o sim-utils.o \
1643 sim-watch.o $(am__append_2)
1644 SIM_HW_DEVICES = cfi core pal glue
1645 common_HW_CONFIG_H_TARGETS = $(patsubst %,%/hw-config.h,$(SIM_ENABLED_ARCHES))
1646 am_arch_d = $(subst -,_,$(@D))
1647 GEN_MODULES_C_SRCS = \
1648 $(wildcard \
1649 $(patsubst %.o,$(abs_srcdir)/%.c,$($(am_arch_d)_libsim_a_OBJECTS) $($(am_arch_d)_libsim_a_LIBADD)) \
1650 $(filter-out %.o,$(patsubst $(@D)/%.o,$(abs_srcdir)/common/%.c,$($(am_arch_d)_libsim_a_LIBADD))))
1651
1652 common_GEN_MODULES_C_TARGETS = $(patsubst %,%/modules.c,$(filter-out ppc,$(SIM_ENABLED_ARCHES)))
1653 LIBIBERTY_LIB = ../libiberty/libiberty.a
1654 BFD_LIB = ../bfd/libbfd.la
1655 OPCODES_LIB = ../opcodes/libopcodes.la
1656 SIM_COMMON_LIBS = \
1657 $(BFD_LIB) \
1658 $(OPCODES_LIB) \
1659 $(LIBIBERTY_LIB) \
1660 $(LIBGNU) \
1661 $(LIBGNU_EXTRA_LIBS)
1662
1663 GUILE = $(or $(wildcard ../guile/libguile/guile),guile)
1664 CGEN = "$(GUILE) -l $(cgendir)/guile.scm -s"
1665 CGENFLAGS = -v
1666 CGEN_CPU_DIR = $(cgendir)/cpu
1667 CPU_DIR = $(srcroot)/cpu
1668 CGEN_ARCHFILE = $(CPU_DIR)/$(@D).cpu
1669 CGEN_READ_SCM = $(cgendir)/sim.scm
1670 CGEN_ARCH_SCM = $(cgendir)/sim-arch.scm
1671 CGEN_CPU_SCM = $(cgendir)/sim-cpu.scm $(cgendir)/sim-model.scm
1672 CGEN_DECODE_SCM = $(cgendir)/sim-decode.scm
1673 CGEN_DESC_SCM = $(cgendir)/desc.scm $(cgendir)/desc-cpu.scm
1674 CGEN_CPU_EXTR = /extr/
1675 CGEN_CPU_READ = /read/
1676 CGEN_CPU_WRITE = /write/
1677 CGEN_CPU_SEM = /sem/
1678 CGEN_CPU_SEMSW = /semsw/
1679 CGEN_WRAPPER = $(srccom)/cgen.sh
1680 CGEN_GEN_ARCH = \
1681 $(SHELL) $(CGEN_WRAPPER) arch $(srcdir)/$(@D) \
1682 $(CGEN) $(cgendir) "$(CGENFLAGS)" \
1683 $(@D) "$$FLAGS" ignored "$$isa" $$mach ignored \
1684 $(CGEN_ARCHFILE) ignored
1685
1686 CGEN_GEN_CPU = \
1687 $(SHELL) $(CGEN_WRAPPER) cpu $(srcdir)/$(@D) \
1688 $(CGEN) $(cgendir) "$(CGENFLAGS)" \
1689 $(@D) "$$FLAGS" $$cpu "$$isa" $$mach "$$SUFFIX" \
1690 $(CGEN_ARCHFILE) "$$EXTRAFILES"
1691
1692 CGEN_GEN_DEFS = \
1693 $(SHELL) $(CGEN_WRAPPER) defs $(srcdir)/$(@D) \
1694 $(CGEN) $(cgendir) "$(CGENFLAGS)" \
1695 $(@D) "$$FLAGS" $$cpu "$$isa" $$mach "$$SUFFIX" \
1696 $(CGEN_ARCHFILE) ignored
1697
1698 CGEN_GEN_DECODE = \
1699 $(SHELL) $(CGEN_WRAPPER) decode $(srcdir)/$(@D) \
1700 $(CGEN) $(cgendir) "$(CGENFLAGS)" \
1701 $(@D) "$$FLAGS" $$cpu "$$isa" $$mach "$$SUFFIX" \
1702 $(CGEN_ARCHFILE) "$$EXTRAFILES"
1703
1704 CGEN_GEN_CPU_DECODE = \
1705 $(SHELL) $(CGEN_WRAPPER) cpu-decode $(srcdir)/$(@D) \
1706 $(CGEN) $(cgendir) "$(CGENFLAGS)" \
1707 $(@D) "$$FLAGS" $$cpu "$$isa" $$mach "$$SUFFIX" \
1708 $(CGEN_ARCHFILE) "$$EXTRAFILES"
1709
1710 CGEN_GEN_CPU_DESC = \
1711 $(SHELL) $(CGEN_WRAPPER) desc $(srcdir)/$(@D) \
1712 $(CGEN) $(cgendir) "$(CGENFLAGS)" \
1713 $(@D) "$$FLAGS" $$cpu "$$isa" $$mach "$$SUFFIX" \
1714 $(CGEN_ARCHFILE) ignored $$opcfile
1715
1716
1717 # igen leaks memory, and therefore makes AddressSanitizer unhappy. Disable
1718 # leak detection while running it.
1719 @SIM_ENABLE_IGEN_TRUE@IGEN = igen/igen$(EXEEXT)
1720 @SIM_ENABLE_IGEN_TRUE@IGEN_RUN = ASAN_OPTIONS=detect_leaks=0 $(IGEN) $(IGEN_FLAGS_SMP)
1721 @SIM_ENABLE_IGEN_TRUE@igen_libigen_a_SOURCES = \
1722 @SIM_ENABLE_IGEN_TRUE@ igen/table.c \
1723 @SIM_ENABLE_IGEN_TRUE@ igen/lf.c \
1724 @SIM_ENABLE_IGEN_TRUE@ igen/misc.c \
1725 @SIM_ENABLE_IGEN_TRUE@ igen/filter_host.c \
1726 @SIM_ENABLE_IGEN_TRUE@ igen/ld-decode.c \
1727 @SIM_ENABLE_IGEN_TRUE@ igen/ld-cache.c \
1728 @SIM_ENABLE_IGEN_TRUE@ igen/filter.c \
1729 @SIM_ENABLE_IGEN_TRUE@ igen/ld-insn.c \
1730 @SIM_ENABLE_IGEN_TRUE@ igen/gen-model.c \
1731 @SIM_ENABLE_IGEN_TRUE@ igen/gen-itable.c \
1732 @SIM_ENABLE_IGEN_TRUE@ igen/gen-icache.c \
1733 @SIM_ENABLE_IGEN_TRUE@ igen/gen-semantics.c \
1734 @SIM_ENABLE_IGEN_TRUE@ igen/gen-idecode.c \
1735 @SIM_ENABLE_IGEN_TRUE@ igen/gen-support.c \
1736 @SIM_ENABLE_IGEN_TRUE@ igen/gen-engine.c \
1737 @SIM_ENABLE_IGEN_TRUE@ igen/gen.c
1738
1739 @SIM_ENABLE_IGEN_TRUE@igen_igen_SOURCES = igen/igen.c
1740 @SIM_ENABLE_IGEN_TRUE@igen_igen_LDADD = igen/libigen.a
1741 @SIM_ENABLE_IGEN_TRUE@igen_filter_SOURCES =
1742 @SIM_ENABLE_IGEN_TRUE@igen_filter_LDADD = igen/filter-main.o igen/libigen.a
1743 @SIM_ENABLE_IGEN_TRUE@igen_gen_SOURCES =
1744 @SIM_ENABLE_IGEN_TRUE@igen_gen_LDADD = igen/gen-main.o igen/libigen.a
1745 @SIM_ENABLE_IGEN_TRUE@igen_ld_cache_SOURCES =
1746 @SIM_ENABLE_IGEN_TRUE@igen_ld_cache_LDADD = igen/ld-cache-main.o igen/libigen.a
1747 @SIM_ENABLE_IGEN_TRUE@igen_ld_decode_SOURCES =
1748 @SIM_ENABLE_IGEN_TRUE@igen_ld_decode_LDADD = igen/ld-decode-main.o igen/libigen.a
1749 @SIM_ENABLE_IGEN_TRUE@igen_ld_insn_SOURCES =
1750 @SIM_ENABLE_IGEN_TRUE@igen_ld_insn_LDADD = igen/ld-insn-main.o igen/libigen.a
1751 @SIM_ENABLE_IGEN_TRUE@igen_table_SOURCES =
1752 @SIM_ENABLE_IGEN_TRUE@igen_table_LDADD = igen/table-main.o igen/libigen.a
1753 @SIM_ENABLE_IGEN_TRUE@igen_IGEN_TOOLS = \
1754 @SIM_ENABLE_IGEN_TRUE@ $(IGEN) \
1755 @SIM_ENABLE_IGEN_TRUE@ igen/filter \
1756 @SIM_ENABLE_IGEN_TRUE@ igen/gen \
1757 @SIM_ENABLE_IGEN_TRUE@ igen/ld-cache \
1758 @SIM_ENABLE_IGEN_TRUE@ igen/ld-decode \
1759 @SIM_ENABLE_IGEN_TRUE@ igen/ld-insn \
1760 @SIM_ENABLE_IGEN_TRUE@ igen/table
1761
1762 EXTRA_DEJAGNU_SITE_CONFIG = site-sim-config.exp
1763
1764 # Custom verbose test variables that automake doesn't provide (yet?).
1765 AM_V_RUNTEST = $(AM_V_RUNTEST_@AM_V@)
1766 AM_V_RUNTEST_ = $(AM_V_RUNTEST_@AM_DEFAULT_V@)
1767 AM_V_RUNTEST_0 = @echo " RUNTEST $(RUNTESTFLAGS) $*";
1768 AM_V_RUNTEST_1 =
1769 DO_RUNTEST = \
1770 LC_ALL=C; export LC_ALL; \
1771 EXPECT=${EXPECT} ; export EXPECT ; \
1772 runtest=$(RUNTEST); \
1773 $$runtest $(RUNTESTFLAGS)
1774
1775 testsuite_common_CPPFLAGS = \
1776 -I$(srcdir)/common \
1777 -I$(srcroot)/include \
1778 -I../bfd
1779
1780 @SIM_ENABLE_ARCH_aarch64_TRUE@aarch64_libsim_a_SOURCES =
1781 @SIM_ENABLE_ARCH_aarch64_TRUE@aarch64_libsim_a_LIBADD = \
1782 @SIM_ENABLE_ARCH_aarch64_TRUE@ $(common_libcommon_a_OBJECTS) \
1783 @SIM_ENABLE_ARCH_aarch64_TRUE@ $(patsubst %,aarch64/%,$(SIM_NEW_COMMON_OBJS)) \
1784 @SIM_ENABLE_ARCH_aarch64_TRUE@ $(patsubst %,aarch64/dv-%.o,$(SIM_HW_DEVICES)) \
1785 @SIM_ENABLE_ARCH_aarch64_TRUE@ aarch64/cpustate.o \
1786 @SIM_ENABLE_ARCH_aarch64_TRUE@ aarch64/interp.o \
1787 @SIM_ENABLE_ARCH_aarch64_TRUE@ aarch64/memory.o \
1788 @SIM_ENABLE_ARCH_aarch64_TRUE@ aarch64/modules.o \
1789 @SIM_ENABLE_ARCH_aarch64_TRUE@ aarch64/sim-resume.o \
1790 @SIM_ENABLE_ARCH_aarch64_TRUE@ aarch64/simulator.o
1791
1792 @SIM_ENABLE_ARCH_aarch64_TRUE@aarch64_run_SOURCES =
1793 @SIM_ENABLE_ARCH_aarch64_TRUE@aarch64_run_LDADD = \
1794 @SIM_ENABLE_ARCH_aarch64_TRUE@ aarch64/nrun.o \
1795 @SIM_ENABLE_ARCH_aarch64_TRUE@ aarch64/libsim.a \
1796 @SIM_ENABLE_ARCH_aarch64_TRUE@ $(SIM_COMMON_LIBS)
1797
1798 @SIM_ENABLE_ARCH_arm_TRUE@arm_libsim_a_SOURCES =
1799 @SIM_ENABLE_ARCH_arm_TRUE@arm_libsim_a_LIBADD = \
1800 @SIM_ENABLE_ARCH_arm_TRUE@ $(common_libcommon_a_OBJECTS) \
1801 @SIM_ENABLE_ARCH_arm_TRUE@ arm/wrapper.o \
1802 @SIM_ENABLE_ARCH_arm_TRUE@ $(patsubst %,arm/%,$(SIM_NEW_COMMON_OBJS)) \
1803 @SIM_ENABLE_ARCH_arm_TRUE@ $(patsubst %,arm/dv-%.o,$(SIM_HW_DEVICES)) \
1804 @SIM_ENABLE_ARCH_arm_TRUE@ arm/armemu.o \
1805 @SIM_ENABLE_ARCH_arm_TRUE@ arm/armemu32.o arm/arminit.o arm/armos.o arm/armsupp.o \
1806 @SIM_ENABLE_ARCH_arm_TRUE@ arm/armvirt.o arm/thumbemu.o \
1807 @SIM_ENABLE_ARCH_arm_TRUE@ arm/armcopro.o arm/maverick.o arm/iwmmxt.o \
1808 @SIM_ENABLE_ARCH_arm_TRUE@ arm/modules.o
1809
1810 @SIM_ENABLE_ARCH_arm_TRUE@arm_run_SOURCES =
1811 @SIM_ENABLE_ARCH_arm_TRUE@arm_run_LDADD = \
1812 @SIM_ENABLE_ARCH_arm_TRUE@ arm/nrun.o \
1813 @SIM_ENABLE_ARCH_arm_TRUE@ arm/libsim.a \
1814 @SIM_ENABLE_ARCH_arm_TRUE@ $(SIM_COMMON_LIBS)
1815
1816 @SIM_ENABLE_ARCH_arm_TRUE@armdocdir = $(docdir)/arm
1817 @SIM_ENABLE_ARCH_arm_TRUE@armdoc_DATA = arm/README
1818 @SIM_ENABLE_ARCH_avr_TRUE@avr_libsim_a_SOURCES =
1819 @SIM_ENABLE_ARCH_avr_TRUE@avr_libsim_a_LIBADD = \
1820 @SIM_ENABLE_ARCH_avr_TRUE@ $(common_libcommon_a_OBJECTS) \
1821 @SIM_ENABLE_ARCH_avr_TRUE@ avr/interp.o \
1822 @SIM_ENABLE_ARCH_avr_TRUE@ $(patsubst %,avr/%,$(SIM_NEW_COMMON_OBJS)) \
1823 @SIM_ENABLE_ARCH_avr_TRUE@ $(patsubst %,avr/dv-%.o,$(SIM_HW_DEVICES)) \
1824 @SIM_ENABLE_ARCH_avr_TRUE@ avr/modules.o \
1825 @SIM_ENABLE_ARCH_avr_TRUE@ avr/sim-resume.o
1826
1827 @SIM_ENABLE_ARCH_avr_TRUE@avr_run_SOURCES =
1828 @SIM_ENABLE_ARCH_avr_TRUE@avr_run_LDADD = \
1829 @SIM_ENABLE_ARCH_avr_TRUE@ avr/nrun.o \
1830 @SIM_ENABLE_ARCH_avr_TRUE@ avr/libsim.a \
1831 @SIM_ENABLE_ARCH_avr_TRUE@ $(SIM_COMMON_LIBS)
1832
1833 @SIM_ENABLE_ARCH_bfin_TRUE@bfin_libsim_a_SOURCES =
1834 @SIM_ENABLE_ARCH_bfin_TRUE@bfin_libsim_a_LIBADD = \
1835 @SIM_ENABLE_ARCH_bfin_TRUE@ $(common_libcommon_a_OBJECTS) \
1836 @SIM_ENABLE_ARCH_bfin_TRUE@ $(patsubst %,bfin/%,$(SIM_NEW_COMMON_OBJS)) \
1837 @SIM_ENABLE_ARCH_bfin_TRUE@ $(patsubst %,bfin/dv-%.o,$(SIM_HW_DEVICES)) \
1838 @SIM_ENABLE_ARCH_bfin_TRUE@ $(patsubst %,bfin/dv-%.o,$(bfin_SIM_EXTRA_HW_DEVICES)) \
1839 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin/bfin-sim.o \
1840 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin/devices.o \
1841 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin/gui.o \
1842 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin/interp.o \
1843 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin/machs.o \
1844 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin/modules.o \
1845 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin/sim-resume.o
1846
1847 @SIM_ENABLE_ARCH_bfin_TRUE@bfin_run_SOURCES =
1848 @SIM_ENABLE_ARCH_bfin_TRUE@bfin_run_LDADD = \
1849 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin/nrun.o \
1850 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin/libsim.a \
1851 @SIM_ENABLE_ARCH_bfin_TRUE@ $(SIM_COMMON_LIBS)
1852
1853 @SIM_ENABLE_ARCH_bfin_TRUE@bfin_SIM_EXTRA_HW_DEVICES = \
1854 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_cec \
1855 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_ctimer \
1856 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_dma \
1857 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_dmac \
1858 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_ebiu_amc \
1859 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_ebiu_ddrc \
1860 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_ebiu_sdc \
1861 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_emac \
1862 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_eppi \
1863 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_evt \
1864 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_gpio \
1865 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_gpio2 \
1866 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_gptimer \
1867 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_jtag \
1868 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_mmu \
1869 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_nfc \
1870 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_otp \
1871 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_pfmon \
1872 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_pint \
1873 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_pll \
1874 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_ppi \
1875 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_rtc \
1876 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_sic \
1877 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_spi \
1878 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_trace \
1879 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_twi \
1880 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_uart \
1881 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_uart2 \
1882 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_wdog \
1883 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_wp \
1884 @SIM_ENABLE_ARCH_bfin_TRUE@ eth_phy
1885
1886 @SIM_ENABLE_ARCH_bpf_TRUE@bpf_libsim_a_SOURCES =
1887 @SIM_ENABLE_ARCH_bpf_TRUE@bpf_libsim_a_LIBADD = \
1888 @SIM_ENABLE_ARCH_bpf_TRUE@ $(common_libcommon_a_OBJECTS) \
1889 @SIM_ENABLE_ARCH_bpf_TRUE@ $(patsubst %,bpf/%,$(SIM_NEW_COMMON_OBJS)) \
1890 @SIM_ENABLE_ARCH_bpf_TRUE@ $(patsubst %,bpf/dv-%.o,$(SIM_HW_DEVICES)) \
1891 @SIM_ENABLE_ARCH_bpf_TRUE@ bpf/modules.o \
1892 @SIM_ENABLE_ARCH_bpf_TRUE@ \
1893 @SIM_ENABLE_ARCH_bpf_TRUE@ bpf/cgen-run.o \
1894 @SIM_ENABLE_ARCH_bpf_TRUE@ bpf/cgen-scache.o \
1895 @SIM_ENABLE_ARCH_bpf_TRUE@ bpf/cgen-trace.o \
1896 @SIM_ENABLE_ARCH_bpf_TRUE@ bpf/cgen-utils.o \
1897 @SIM_ENABLE_ARCH_bpf_TRUE@ \
1898 @SIM_ENABLE_ARCH_bpf_TRUE@ bpf/arch.o \
1899 @SIM_ENABLE_ARCH_bpf_TRUE@ bpf/cpu.o \
1900 @SIM_ENABLE_ARCH_bpf_TRUE@ bpf/decode-le.o \
1901 @SIM_ENABLE_ARCH_bpf_TRUE@ bpf/decode-be.o \
1902 @SIM_ENABLE_ARCH_bpf_TRUE@ bpf/sem-le.o \
1903 @SIM_ENABLE_ARCH_bpf_TRUE@ bpf/sem-be.o \
1904 @SIM_ENABLE_ARCH_bpf_TRUE@ bpf/mloop-le.o \
1905 @SIM_ENABLE_ARCH_bpf_TRUE@ bpf/mloop-be.o \
1906 @SIM_ENABLE_ARCH_bpf_TRUE@ \
1907 @SIM_ENABLE_ARCH_bpf_TRUE@ bpf/bpf.o \
1908 @SIM_ENABLE_ARCH_bpf_TRUE@ bpf/bpf-helpers.o \
1909 @SIM_ENABLE_ARCH_bpf_TRUE@ bpf/sim-if.o \
1910 @SIM_ENABLE_ARCH_bpf_TRUE@ bpf/traps.o
1911
1912 @SIM_ENABLE_ARCH_bpf_TRUE@bpf_run_SOURCES =
1913 @SIM_ENABLE_ARCH_bpf_TRUE@bpf_run_LDADD = \
1914 @SIM_ENABLE_ARCH_bpf_TRUE@ bpf/nrun.o \
1915 @SIM_ENABLE_ARCH_bpf_TRUE@ bpf/libsim.a \
1916 @SIM_ENABLE_ARCH_bpf_TRUE@ $(SIM_COMMON_LIBS)
1917
1918 @SIM_ENABLE_ARCH_bpf_TRUE@bpf_BUILD_OUTPUTS = \
1919 @SIM_ENABLE_ARCH_bpf_TRUE@ bpf/mloop-le.c \
1920 @SIM_ENABLE_ARCH_bpf_TRUE@ bpf/stamp-mloop-le \
1921 @SIM_ENABLE_ARCH_bpf_TRUE@ bpf/mloop-be.c \
1922 @SIM_ENABLE_ARCH_bpf_TRUE@ bpf/stamp-mloop-be
1923
1924 @SIM_ENABLE_ARCH_cr16_TRUE@cr16_libsim_a_SOURCES =
1925 @SIM_ENABLE_ARCH_cr16_TRUE@cr16_libsim_a_LIBADD = \
1926 @SIM_ENABLE_ARCH_cr16_TRUE@ $(common_libcommon_a_OBJECTS) \
1927 @SIM_ENABLE_ARCH_cr16_TRUE@ $(patsubst %,cr16/%,$(SIM_NEW_COMMON_OBJS)) \
1928 @SIM_ENABLE_ARCH_cr16_TRUE@ $(patsubst %,cr16/dv-%.o,$(SIM_HW_DEVICES)) \
1929 @SIM_ENABLE_ARCH_cr16_TRUE@ cr16/interp.o \
1930 @SIM_ENABLE_ARCH_cr16_TRUE@ cr16/modules.o \
1931 @SIM_ENABLE_ARCH_cr16_TRUE@ cr16/sim-resume.o \
1932 @SIM_ENABLE_ARCH_cr16_TRUE@ cr16/simops.o \
1933 @SIM_ENABLE_ARCH_cr16_TRUE@ cr16/table.o
1934
1935 @SIM_ENABLE_ARCH_cr16_TRUE@cr16_run_SOURCES =
1936 @SIM_ENABLE_ARCH_cr16_TRUE@cr16_run_LDADD = \
1937 @SIM_ENABLE_ARCH_cr16_TRUE@ cr16/nrun.o \
1938 @SIM_ENABLE_ARCH_cr16_TRUE@ cr16/libsim.a \
1939 @SIM_ENABLE_ARCH_cr16_TRUE@ $(SIM_COMMON_LIBS)
1940
1941 @SIM_ENABLE_ARCH_cr16_TRUE@cr16_BUILD_OUTPUTS = \
1942 @SIM_ENABLE_ARCH_cr16_TRUE@ cr16/gencode$(EXEEXT) \
1943 @SIM_ENABLE_ARCH_cr16_TRUE@ cr16/table.c
1944
1945 @SIM_ENABLE_ARCH_cr16_TRUE@cr16_gencode_SOURCES = cr16/gencode.c
1946 @SIM_ENABLE_ARCH_cr16_TRUE@cr16_gencode_LDADD = cr16/cr16-opc.o
1947 @SIM_ENABLE_ARCH_cris_TRUE@cris_libsim_a_SOURCES =
1948 @SIM_ENABLE_ARCH_cris_TRUE@cris_libsim_a_LIBADD = \
1949 @SIM_ENABLE_ARCH_cris_TRUE@ $(common_libcommon_a_OBJECTS) \
1950 @SIM_ENABLE_ARCH_cris_TRUE@ $(patsubst %,cris/%,$(SIM_NEW_COMMON_OBJS)) \
1951 @SIM_ENABLE_ARCH_cris_TRUE@ $(patsubst %,cris/dv-%.o,$(SIM_HW_DEVICES)) \
1952 @SIM_ENABLE_ARCH_cris_TRUE@ $(patsubst %,cris/dv-%.o,$(cris_SIM_EXTRA_HW_DEVICES)) \
1953 @SIM_ENABLE_ARCH_cris_TRUE@ cris/modules.o \
1954 @SIM_ENABLE_ARCH_cris_TRUE@ \
1955 @SIM_ENABLE_ARCH_cris_TRUE@ cris/cgen-run.o \
1956 @SIM_ENABLE_ARCH_cris_TRUE@ cris/cgen-scache.o \
1957 @SIM_ENABLE_ARCH_cris_TRUE@ cris/cgen-trace.o \
1958 @SIM_ENABLE_ARCH_cris_TRUE@ cris/cgen-utils.o \
1959 @SIM_ENABLE_ARCH_cris_TRUE@ \
1960 @SIM_ENABLE_ARCH_cris_TRUE@ cris/arch.o \
1961 @SIM_ENABLE_ARCH_cris_TRUE@ cris/crisv10f.o \
1962 @SIM_ENABLE_ARCH_cris_TRUE@ cris/cpuv10.o \
1963 @SIM_ENABLE_ARCH_cris_TRUE@ cris/decodev10.o \
1964 @SIM_ENABLE_ARCH_cris_TRUE@ cris/modelv10.o \
1965 @SIM_ENABLE_ARCH_cris_TRUE@ cris/mloopv10f.o \
1966 @SIM_ENABLE_ARCH_cris_TRUE@ cris/crisv32f.o \
1967 @SIM_ENABLE_ARCH_cris_TRUE@ cris/cpuv32.o \
1968 @SIM_ENABLE_ARCH_cris_TRUE@ cris/decodev32.o \
1969 @SIM_ENABLE_ARCH_cris_TRUE@ cris/modelv32.o \
1970 @SIM_ENABLE_ARCH_cris_TRUE@ cris/mloopv32f.o \
1971 @SIM_ENABLE_ARCH_cris_TRUE@ \
1972 @SIM_ENABLE_ARCH_cris_TRUE@ cris/sim-if.o \
1973 @SIM_ENABLE_ARCH_cris_TRUE@ cris/traps.o
1974
1975 @SIM_ENABLE_ARCH_cris_TRUE@cris_run_SOURCES =
1976 @SIM_ENABLE_ARCH_cris_TRUE@cris_run_LDADD = \
1977 @SIM_ENABLE_ARCH_cris_TRUE@ cris/nrun.o \
1978 @SIM_ENABLE_ARCH_cris_TRUE@ cris/libsim.a \
1979 @SIM_ENABLE_ARCH_cris_TRUE@ $(SIM_COMMON_LIBS)
1980
1981 @SIM_ENABLE_ARCH_cris_TRUE@cris_SIM_EXTRA_HW_DEVICES = rv cris cris_900000xx
1982 @SIM_ENABLE_ARCH_cris_TRUE@cris_rvdummy_SOURCES = cris/rvdummy.c
1983 @SIM_ENABLE_ARCH_cris_TRUE@cris_rvdummy_LDADD = $(LIBIBERTY_LIB)
1984 @SIM_ENABLE_ARCH_cris_TRUE@cris_BUILD_OUTPUTS = \
1985 @SIM_ENABLE_ARCH_cris_TRUE@ cris/mloopv10f.c \
1986 @SIM_ENABLE_ARCH_cris_TRUE@ cris/stamp-mloop-v10f \
1987 @SIM_ENABLE_ARCH_cris_TRUE@ cris/mloopv32f.c \
1988 @SIM_ENABLE_ARCH_cris_TRUE@ cris/stamp-mloop-v32f
1989
1990 @SIM_ENABLE_ARCH_d10v_TRUE@d10v_libsim_a_SOURCES =
1991 @SIM_ENABLE_ARCH_d10v_TRUE@d10v_libsim_a_LIBADD = \
1992 @SIM_ENABLE_ARCH_d10v_TRUE@ $(common_libcommon_a_OBJECTS) \
1993 @SIM_ENABLE_ARCH_d10v_TRUE@ d10v/interp.o \
1994 @SIM_ENABLE_ARCH_d10v_TRUE@ $(patsubst %,d10v/%,$(SIM_NEW_COMMON_OBJS)) \
1995 @SIM_ENABLE_ARCH_d10v_TRUE@ $(patsubst %,d10v/dv-%.o,$(SIM_HW_DEVICES)) \
1996 @SIM_ENABLE_ARCH_d10v_TRUE@ d10v/endian.o \
1997 @SIM_ENABLE_ARCH_d10v_TRUE@ d10v/modules.o \
1998 @SIM_ENABLE_ARCH_d10v_TRUE@ d10v/sim-resume.o \
1999 @SIM_ENABLE_ARCH_d10v_TRUE@ d10v/simops.o \
2000 @SIM_ENABLE_ARCH_d10v_TRUE@ d10v/table.o
2001
2002 @SIM_ENABLE_ARCH_d10v_TRUE@d10v_run_SOURCES =
2003 @SIM_ENABLE_ARCH_d10v_TRUE@d10v_run_LDADD = \
2004 @SIM_ENABLE_ARCH_d10v_TRUE@ d10v/nrun.o \
2005 @SIM_ENABLE_ARCH_d10v_TRUE@ d10v/libsim.a \
2006 @SIM_ENABLE_ARCH_d10v_TRUE@ $(SIM_COMMON_LIBS)
2007
2008 @SIM_ENABLE_ARCH_d10v_TRUE@d10v_BUILD_OUTPUTS = \
2009 @SIM_ENABLE_ARCH_d10v_TRUE@ d10v/gencode$(EXEEXT) \
2010 @SIM_ENABLE_ARCH_d10v_TRUE@ d10v/table.c
2011
2012 @SIM_ENABLE_ARCH_d10v_TRUE@d10v_gencode_SOURCES = d10v/gencode.c
2013 @SIM_ENABLE_ARCH_d10v_TRUE@d10v_gencode_LDADD = d10v/d10v-opc.o
2014 @SIM_ENABLE_ARCH_erc32_TRUE@erc32_libsim_a_SOURCES =
2015 @SIM_ENABLE_ARCH_erc32_TRUE@erc32_libsim_a_LIBADD = \
2016 @SIM_ENABLE_ARCH_erc32_TRUE@ $(common_libcommon_a_OBJECTS) \
2017 @SIM_ENABLE_ARCH_erc32_TRUE@ erc32/erc32.o \
2018 @SIM_ENABLE_ARCH_erc32_TRUE@ erc32/exec.o \
2019 @SIM_ENABLE_ARCH_erc32_TRUE@ erc32/float.o \
2020 @SIM_ENABLE_ARCH_erc32_TRUE@ erc32/func.o \
2021 @SIM_ENABLE_ARCH_erc32_TRUE@ erc32/help.o \
2022 @SIM_ENABLE_ARCH_erc32_TRUE@ erc32/interf.o \
2023 @SIM_ENABLE_ARCH_erc32_TRUE@ erc32/modules.o
2024
2025 @SIM_ENABLE_ARCH_erc32_TRUE@erc32_run_SOURCES =
2026 @SIM_ENABLE_ARCH_erc32_TRUE@erc32_run_LDADD = \
2027 @SIM_ENABLE_ARCH_erc32_TRUE@ erc32/sis.o \
2028 @SIM_ENABLE_ARCH_erc32_TRUE@ erc32/libsim.a \
2029 @SIM_ENABLE_ARCH_erc32_TRUE@ $(SIM_COMMON_LIBS) $(READLINE_LIB) $(TERMCAP_LIB)
2030
2031 @SIM_ENABLE_ARCH_erc32_TRUE@erc32docdir = $(docdir)/erc32
2032 @SIM_ENABLE_ARCH_erc32_TRUE@erc32doc_DATA = erc32/README.erc32 erc32/README.gdb erc32/README.sis
2033 @SIM_ENABLE_ARCH_examples_TRUE@example_synacor_libsim_a_SOURCES =
2034 @SIM_ENABLE_ARCH_examples_TRUE@example_synacor_libsim_a_LIBADD = \
2035 @SIM_ENABLE_ARCH_examples_TRUE@ $(common_libcommon_a_OBJECTS) \
2036 @SIM_ENABLE_ARCH_examples_TRUE@ $(patsubst %,example-synacor/%,$(SIM_NEW_COMMON_OBJS)) \
2037 @SIM_ENABLE_ARCH_examples_TRUE@ $(patsubst %,example-synacor/dv-%.o,$(SIM_HW_DEVICES)) \
2038 @SIM_ENABLE_ARCH_examples_TRUE@ example-synacor/interp.o \
2039 @SIM_ENABLE_ARCH_examples_TRUE@ example-synacor/modules.o \
2040 @SIM_ENABLE_ARCH_examples_TRUE@ example-synacor/sim-main.o \
2041 @SIM_ENABLE_ARCH_examples_TRUE@ example-synacor/sim-resume.o
2042
2043 @SIM_ENABLE_ARCH_examples_TRUE@example_synacor_run_SOURCES =
2044 @SIM_ENABLE_ARCH_examples_TRUE@example_synacor_run_LDADD = \
2045 @SIM_ENABLE_ARCH_examples_TRUE@ example-synacor/nrun.o \
2046 @SIM_ENABLE_ARCH_examples_TRUE@ example-synacor/libsim.a \
2047 @SIM_ENABLE_ARCH_examples_TRUE@ $(SIM_COMMON_LIBS)
2048
2049 @SIM_ENABLE_ARCH_frv_TRUE@frv_libsim_a_SOURCES =
2050 @SIM_ENABLE_ARCH_frv_TRUE@frv_libsim_a_LIBADD = \
2051 @SIM_ENABLE_ARCH_frv_TRUE@ $(common_libcommon_a_OBJECTS) \
2052 @SIM_ENABLE_ARCH_frv_TRUE@ $(patsubst %,frv/%,$(SIM_NEW_COMMON_OBJS)) \
2053 @SIM_ENABLE_ARCH_frv_TRUE@ $(patsubst %,frv/dv-%.o,$(SIM_HW_DEVICES)) \
2054 @SIM_ENABLE_ARCH_frv_TRUE@ frv/modules.o \
2055 @SIM_ENABLE_ARCH_frv_TRUE@ \
2056 @SIM_ENABLE_ARCH_frv_TRUE@ frv/cgen-accfp.o \
2057 @SIM_ENABLE_ARCH_frv_TRUE@ frv/cgen-fpu.o \
2058 @SIM_ENABLE_ARCH_frv_TRUE@ frv/cgen-run.o \
2059 @SIM_ENABLE_ARCH_frv_TRUE@ frv/cgen-scache.o \
2060 @SIM_ENABLE_ARCH_frv_TRUE@ frv/cgen-trace.o \
2061 @SIM_ENABLE_ARCH_frv_TRUE@ frv/cgen-utils.o \
2062 @SIM_ENABLE_ARCH_frv_TRUE@ \
2063 @SIM_ENABLE_ARCH_frv_TRUE@ frv/arch.o \
2064 @SIM_ENABLE_ARCH_frv_TRUE@ frv/cgen-par.o \
2065 @SIM_ENABLE_ARCH_frv_TRUE@ frv/cpu.o \
2066 @SIM_ENABLE_ARCH_frv_TRUE@ frv/decode.o \
2067 @SIM_ENABLE_ARCH_frv_TRUE@ frv/frv.o \
2068 @SIM_ENABLE_ARCH_frv_TRUE@ frv/mloop.o \
2069 @SIM_ENABLE_ARCH_frv_TRUE@ frv/model.o \
2070 @SIM_ENABLE_ARCH_frv_TRUE@ frv/sem.o \
2071 @SIM_ENABLE_ARCH_frv_TRUE@ \
2072 @SIM_ENABLE_ARCH_frv_TRUE@ frv/cache.o \
2073 @SIM_ENABLE_ARCH_frv_TRUE@ frv/interrupts.o \
2074 @SIM_ENABLE_ARCH_frv_TRUE@ frv/memory.o \
2075 @SIM_ENABLE_ARCH_frv_TRUE@ frv/options.o \
2076 @SIM_ENABLE_ARCH_frv_TRUE@ frv/pipeline.o \
2077 @SIM_ENABLE_ARCH_frv_TRUE@ frv/profile.o \
2078 @SIM_ENABLE_ARCH_frv_TRUE@ frv/profile-fr400.o \
2079 @SIM_ENABLE_ARCH_frv_TRUE@ frv/profile-fr450.o \
2080 @SIM_ENABLE_ARCH_frv_TRUE@ frv/profile-fr500.o \
2081 @SIM_ENABLE_ARCH_frv_TRUE@ frv/profile-fr550.o \
2082 @SIM_ENABLE_ARCH_frv_TRUE@ frv/registers.o \
2083 @SIM_ENABLE_ARCH_frv_TRUE@ frv/reset.o \
2084 @SIM_ENABLE_ARCH_frv_TRUE@ frv/sim-if.o \
2085 @SIM_ENABLE_ARCH_frv_TRUE@ frv/traps.o
2086
2087 @SIM_ENABLE_ARCH_frv_TRUE@frv_run_SOURCES =
2088 @SIM_ENABLE_ARCH_frv_TRUE@frv_run_LDADD = \
2089 @SIM_ENABLE_ARCH_frv_TRUE@ frv/nrun.o \
2090 @SIM_ENABLE_ARCH_frv_TRUE@ frv/libsim.a \
2091 @SIM_ENABLE_ARCH_frv_TRUE@ $(SIM_COMMON_LIBS)
2092
2093 @SIM_ENABLE_ARCH_frv_TRUE@frvdocdir = $(docdir)/frv
2094 @SIM_ENABLE_ARCH_frv_TRUE@frvdoc_DATA = frv/README
2095 @SIM_ENABLE_ARCH_frv_TRUE@frv_BUILD_OUTPUTS = \
2096 @SIM_ENABLE_ARCH_frv_TRUE@ frv/mloop.c \
2097 @SIM_ENABLE_ARCH_frv_TRUE@ frv/stamp-mloop
2098
2099 @SIM_ENABLE_ARCH_ft32_TRUE@ft32_libsim_a_SOURCES =
2100 @SIM_ENABLE_ARCH_ft32_TRUE@ft32_libsim_a_LIBADD = \
2101 @SIM_ENABLE_ARCH_ft32_TRUE@ $(common_libcommon_a_OBJECTS) \
2102 @SIM_ENABLE_ARCH_ft32_TRUE@ $(patsubst %,ft32/%,$(SIM_NEW_COMMON_OBJS)) \
2103 @SIM_ENABLE_ARCH_ft32_TRUE@ $(patsubst %,ft32/dv-%.o,$(SIM_HW_DEVICES)) \
2104 @SIM_ENABLE_ARCH_ft32_TRUE@ ft32/interp.o \
2105 @SIM_ENABLE_ARCH_ft32_TRUE@ ft32/modules.o \
2106 @SIM_ENABLE_ARCH_ft32_TRUE@ ft32/sim-resume.o
2107
2108 @SIM_ENABLE_ARCH_ft32_TRUE@ft32_run_SOURCES =
2109 @SIM_ENABLE_ARCH_ft32_TRUE@ft32_run_LDADD = \
2110 @SIM_ENABLE_ARCH_ft32_TRUE@ ft32/nrun.o \
2111 @SIM_ENABLE_ARCH_ft32_TRUE@ ft32/libsim.a \
2112 @SIM_ENABLE_ARCH_ft32_TRUE@ $(SIM_COMMON_LIBS)
2113
2114 @SIM_ENABLE_ARCH_h8300_TRUE@h8300_libsim_a_SOURCES =
2115 @SIM_ENABLE_ARCH_h8300_TRUE@h8300_libsim_a_LIBADD = \
2116 @SIM_ENABLE_ARCH_h8300_TRUE@ $(common_libcommon_a_OBJECTS) \
2117 @SIM_ENABLE_ARCH_h8300_TRUE@ h8300/compile.o \
2118 @SIM_ENABLE_ARCH_h8300_TRUE@ $(patsubst %,h8300/%,$(SIM_NEW_COMMON_OBJS)) \
2119 @SIM_ENABLE_ARCH_h8300_TRUE@ $(patsubst %,h8300/dv-%.o,$(SIM_HW_DEVICES)) \
2120 @SIM_ENABLE_ARCH_h8300_TRUE@ h8300/modules.o \
2121 @SIM_ENABLE_ARCH_h8300_TRUE@ h8300/sim-resume.o
2122
2123 @SIM_ENABLE_ARCH_h8300_TRUE@h8300_run_SOURCES =
2124 @SIM_ENABLE_ARCH_h8300_TRUE@h8300_run_LDADD = \
2125 @SIM_ENABLE_ARCH_h8300_TRUE@ h8300/nrun.o \
2126 @SIM_ENABLE_ARCH_h8300_TRUE@ h8300/libsim.a \
2127 @SIM_ENABLE_ARCH_h8300_TRUE@ $(SIM_COMMON_LIBS)
2128
2129 @SIM_ENABLE_ARCH_iq2000_TRUE@iq2000_libsim_a_SOURCES =
2130 @SIM_ENABLE_ARCH_iq2000_TRUE@iq2000_libsim_a_LIBADD = \
2131 @SIM_ENABLE_ARCH_iq2000_TRUE@ $(common_libcommon_a_OBJECTS) \
2132 @SIM_ENABLE_ARCH_iq2000_TRUE@ $(patsubst %,iq2000/%,$(SIM_NEW_COMMON_OBJS)) \
2133 @SIM_ENABLE_ARCH_iq2000_TRUE@ $(patsubst %,iq2000/dv-%.o,$(SIM_HW_DEVICES)) \
2134 @SIM_ENABLE_ARCH_iq2000_TRUE@ iq2000/modules.o \
2135 @SIM_ENABLE_ARCH_iq2000_TRUE@ \
2136 @SIM_ENABLE_ARCH_iq2000_TRUE@ iq2000/cgen-run.o \
2137 @SIM_ENABLE_ARCH_iq2000_TRUE@ iq2000/cgen-scache.o \
2138 @SIM_ENABLE_ARCH_iq2000_TRUE@ iq2000/cgen-trace.o \
2139 @SIM_ENABLE_ARCH_iq2000_TRUE@ iq2000/cgen-utils.o \
2140 @SIM_ENABLE_ARCH_iq2000_TRUE@ \
2141 @SIM_ENABLE_ARCH_iq2000_TRUE@ iq2000/arch.o \
2142 @SIM_ENABLE_ARCH_iq2000_TRUE@ iq2000/cpu.o \
2143 @SIM_ENABLE_ARCH_iq2000_TRUE@ iq2000/decode.o \
2144 @SIM_ENABLE_ARCH_iq2000_TRUE@ iq2000/iq2000.o \
2145 @SIM_ENABLE_ARCH_iq2000_TRUE@ iq2000/sem.o \
2146 @SIM_ENABLE_ARCH_iq2000_TRUE@ iq2000/mloop.o \
2147 @SIM_ENABLE_ARCH_iq2000_TRUE@ iq2000/model.o \
2148 @SIM_ENABLE_ARCH_iq2000_TRUE@ \
2149 @SIM_ENABLE_ARCH_iq2000_TRUE@ iq2000/sim-if.o
2150
2151 @SIM_ENABLE_ARCH_iq2000_TRUE@iq2000_run_SOURCES =
2152 @SIM_ENABLE_ARCH_iq2000_TRUE@iq2000_run_LDADD = \
2153 @SIM_ENABLE_ARCH_iq2000_TRUE@ iq2000/nrun.o \
2154 @SIM_ENABLE_ARCH_iq2000_TRUE@ iq2000/libsim.a \
2155 @SIM_ENABLE_ARCH_iq2000_TRUE@ $(SIM_COMMON_LIBS)
2156
2157 @SIM_ENABLE_ARCH_iq2000_TRUE@iq2000_BUILD_OUTPUTS = \
2158 @SIM_ENABLE_ARCH_iq2000_TRUE@ iq2000/mloop.c \
2159 @SIM_ENABLE_ARCH_iq2000_TRUE@ iq2000/stamp-mloop
2160
2161 @SIM_ENABLE_ARCH_lm32_TRUE@lm32_libsim_a_SOURCES =
2162 @SIM_ENABLE_ARCH_lm32_TRUE@lm32_libsim_a_LIBADD = \
2163 @SIM_ENABLE_ARCH_lm32_TRUE@ $(common_libcommon_a_OBJECTS) \
2164 @SIM_ENABLE_ARCH_lm32_TRUE@ $(patsubst %,lm32/%,$(SIM_NEW_COMMON_OBJS)) \
2165 @SIM_ENABLE_ARCH_lm32_TRUE@ $(patsubst %,lm32/dv-%.o,$(SIM_HW_DEVICES)) \
2166 @SIM_ENABLE_ARCH_lm32_TRUE@ $(patsubst %,lm32/dv-%.o,$(lm32_SIM_EXTRA_HW_DEVICES)) \
2167 @SIM_ENABLE_ARCH_lm32_TRUE@ lm32/modules.o \
2168 @SIM_ENABLE_ARCH_lm32_TRUE@ \
2169 @SIM_ENABLE_ARCH_lm32_TRUE@ lm32/cgen-run.o \
2170 @SIM_ENABLE_ARCH_lm32_TRUE@ lm32/cgen-scache.o \
2171 @SIM_ENABLE_ARCH_lm32_TRUE@ lm32/cgen-trace.o \
2172 @SIM_ENABLE_ARCH_lm32_TRUE@ lm32/cgen-utils.o \
2173 @SIM_ENABLE_ARCH_lm32_TRUE@ \
2174 @SIM_ENABLE_ARCH_lm32_TRUE@ lm32/arch.o \
2175 @SIM_ENABLE_ARCH_lm32_TRUE@ lm32/cpu.o \
2176 @SIM_ENABLE_ARCH_lm32_TRUE@ lm32/decode.o \
2177 @SIM_ENABLE_ARCH_lm32_TRUE@ lm32/sem.o \
2178 @SIM_ENABLE_ARCH_lm32_TRUE@ lm32/mloop.o \
2179 @SIM_ENABLE_ARCH_lm32_TRUE@ lm32/model.o \
2180 @SIM_ENABLE_ARCH_lm32_TRUE@ \
2181 @SIM_ENABLE_ARCH_lm32_TRUE@ lm32/lm32.o \
2182 @SIM_ENABLE_ARCH_lm32_TRUE@ lm32/sim-if.o \
2183 @SIM_ENABLE_ARCH_lm32_TRUE@ lm32/traps.o \
2184 @SIM_ENABLE_ARCH_lm32_TRUE@ lm32/user.o
2185
2186 @SIM_ENABLE_ARCH_lm32_TRUE@lm32_run_SOURCES =
2187 @SIM_ENABLE_ARCH_lm32_TRUE@lm32_run_LDADD = \
2188 @SIM_ENABLE_ARCH_lm32_TRUE@ lm32/nrun.o \
2189 @SIM_ENABLE_ARCH_lm32_TRUE@ lm32/libsim.a \
2190 @SIM_ENABLE_ARCH_lm32_TRUE@ $(SIM_COMMON_LIBS)
2191
2192 @SIM_ENABLE_ARCH_lm32_TRUE@lm32_SIM_EXTRA_HW_DEVICES = lm32cpu lm32timer lm32uart
2193 @SIM_ENABLE_ARCH_lm32_TRUE@lm32_BUILD_OUTPUTS = \
2194 @SIM_ENABLE_ARCH_lm32_TRUE@ lm32/mloop.c \
2195 @SIM_ENABLE_ARCH_lm32_TRUE@ lm32/stamp-mloop
2196
2197 @SIM_ENABLE_ARCH_m32c_TRUE@m32c_libsim_a_SOURCES =
2198 @SIM_ENABLE_ARCH_m32c_TRUE@m32c_libsim_a_LIBADD = \
2199 @SIM_ENABLE_ARCH_m32c_TRUE@ $(common_libcommon_a_OBJECTS) \
2200 @SIM_ENABLE_ARCH_m32c_TRUE@ m32c/gdb-if.o \
2201 @SIM_ENABLE_ARCH_m32c_TRUE@ m32c/int.o \
2202 @SIM_ENABLE_ARCH_m32c_TRUE@ m32c/load.o \
2203 @SIM_ENABLE_ARCH_m32c_TRUE@ m32c/m32c.o \
2204 @SIM_ENABLE_ARCH_m32c_TRUE@ m32c/mem.o \
2205 @SIM_ENABLE_ARCH_m32c_TRUE@ m32c/misc.o \
2206 @SIM_ENABLE_ARCH_m32c_TRUE@ m32c/modules.o \
2207 @SIM_ENABLE_ARCH_m32c_TRUE@ m32c/r8c.o \
2208 @SIM_ENABLE_ARCH_m32c_TRUE@ m32c/reg.o \
2209 @SIM_ENABLE_ARCH_m32c_TRUE@ m32c/srcdest.o \
2210 @SIM_ENABLE_ARCH_m32c_TRUE@ m32c/syscalls.o \
2211 @SIM_ENABLE_ARCH_m32c_TRUE@ m32c/trace.o
2212
2213 @SIM_ENABLE_ARCH_m32c_TRUE@m32c_run_SOURCES =
2214 @SIM_ENABLE_ARCH_m32c_TRUE@m32c_run_LDADD = \
2215 @SIM_ENABLE_ARCH_m32c_TRUE@ m32c/main.o \
2216 @SIM_ENABLE_ARCH_m32c_TRUE@ m32c/libsim.a \
2217 @SIM_ENABLE_ARCH_m32c_TRUE@ $(SIM_COMMON_LIBS)
2218
2219 @SIM_ENABLE_ARCH_m32c_TRUE@m32c_BUILD_OUTPUTS = \
2220 @SIM_ENABLE_ARCH_m32c_TRUE@ m32c/opc2c$(EXEEXT) \
2221 @SIM_ENABLE_ARCH_m32c_TRUE@ m32c/m32c.c \
2222 @SIM_ENABLE_ARCH_m32c_TRUE@ m32c/r8c.c
2223
2224 @SIM_ENABLE_ARCH_m32c_TRUE@m32c_opc2c_SOURCES = m32c/opc2c.c
2225
2226 # opc2c leaks memory, and therefore makes AddressSanitizer unhappy. Disable
2227 # leak detection while running it.
2228 @SIM_ENABLE_ARCH_m32c_TRUE@m32c_OPC2C_RUN = ASAN_OPTIONS=detect_leaks=0 m32c/opc2c$(EXEEXT)
2229 @SIM_ENABLE_ARCH_m32r_TRUE@m32r_libsim_a_SOURCES =
2230 @SIM_ENABLE_ARCH_m32r_TRUE@m32r_libsim_a_LIBADD = \
2231 @SIM_ENABLE_ARCH_m32r_TRUE@ $(common_libcommon_a_OBJECTS) \
2232 @SIM_ENABLE_ARCH_m32r_TRUE@ $(patsubst %,m32r/%,$(SIM_NEW_COMMON_OBJS)) \
2233 @SIM_ENABLE_ARCH_m32r_TRUE@ $(patsubst %,m32r/dv-%.o,$(SIM_HW_DEVICES)) \
2234 @SIM_ENABLE_ARCH_m32r_TRUE@ $(patsubst %,m32r/dv-%.o,$(m32r_SIM_EXTRA_HW_DEVICES)) \
2235 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r/modules.o \
2236 @SIM_ENABLE_ARCH_m32r_TRUE@ \
2237 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r/cgen-run.o \
2238 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r/cgen-scache.o \
2239 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r/cgen-trace.o \
2240 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r/cgen-utils.o \
2241 @SIM_ENABLE_ARCH_m32r_TRUE@ \
2242 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r/arch.o \
2243 @SIM_ENABLE_ARCH_m32r_TRUE@ \
2244 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r/m32r.o \
2245 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r/cpu.o \
2246 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r/decode.o \
2247 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r/sem.o \
2248 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r/model.o \
2249 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r/mloop.o \
2250 @SIM_ENABLE_ARCH_m32r_TRUE@ \
2251 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r/m32rx.o \
2252 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r/cpux.o \
2253 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r/decodex.o \
2254 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r/modelx.o \
2255 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r/mloopx.o \
2256 @SIM_ENABLE_ARCH_m32r_TRUE@ \
2257 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r/m32r2.o \
2258 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r/cpu2.o \
2259 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r/decode2.o \
2260 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r/model2.o \
2261 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r/mloop2.o \
2262 @SIM_ENABLE_ARCH_m32r_TRUE@ \
2263 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r/sim-if.o \
2264 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r/traps.o
2265
2266 @SIM_ENABLE_ARCH_m32r_TRUE@m32r_run_SOURCES =
2267 @SIM_ENABLE_ARCH_m32r_TRUE@m32r_run_LDADD = \
2268 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r/nrun.o \
2269 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r/libsim.a \
2270 @SIM_ENABLE_ARCH_m32r_TRUE@ $(SIM_COMMON_LIBS)
2271
2272 @SIM_ENABLE_ARCH_m32r_TRUE@m32r_SIM_EXTRA_HW_DEVICES = m32r_cache m32r_uart
2273 @SIM_ENABLE_ARCH_m32r_TRUE@m32r_BUILD_OUTPUTS = \
2274 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r/mloop.c \
2275 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r/stamp-mloop \
2276 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r/mloopx.c \
2277 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r/stamp-mloop-x \
2278 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r/mloop2.c \
2279 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r/stamp-mloop-2
2280
2281 @SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11_libsim_a_SOURCES =
2282 @SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11_libsim_a_LIBADD = \
2283 @SIM_ENABLE_ARCH_m68hc11_TRUE@ $(common_libcommon_a_OBJECTS) \
2284 @SIM_ENABLE_ARCH_m68hc11_TRUE@ m68hc11/interp.o \
2285 @SIM_ENABLE_ARCH_m68hc11_TRUE@ m68hc11/m68hc11int.o \
2286 @SIM_ENABLE_ARCH_m68hc11_TRUE@ m68hc11/m68hc12int.o \
2287 @SIM_ENABLE_ARCH_m68hc11_TRUE@ m68hc11/emulos.o \
2288 @SIM_ENABLE_ARCH_m68hc11_TRUE@ m68hc11/interrupts.o \
2289 @SIM_ENABLE_ARCH_m68hc11_TRUE@ m68hc11/m68hc11_sim.o \
2290 @SIM_ENABLE_ARCH_m68hc11_TRUE@ $(patsubst %,m68hc11/%,$(SIM_NEW_COMMON_OBJS)) \
2291 @SIM_ENABLE_ARCH_m68hc11_TRUE@ $(patsubst %,m68hc11/dv-%.o,$(SIM_HW_DEVICES)) \
2292 @SIM_ENABLE_ARCH_m68hc11_TRUE@ $(patsubst %,m68hc11/dv-%.o,$(m68hc11_SIM_EXTRA_HW_DEVICES)) \
2293 @SIM_ENABLE_ARCH_m68hc11_TRUE@ m68hc11/modules.o \
2294 @SIM_ENABLE_ARCH_m68hc11_TRUE@ m68hc11/sim-resume.o
2295
2296 @SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11_run_SOURCES =
2297 @SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11_run_LDADD = \
2298 @SIM_ENABLE_ARCH_m68hc11_TRUE@ m68hc11/nrun.o \
2299 @SIM_ENABLE_ARCH_m68hc11_TRUE@ m68hc11/libsim.a \
2300 @SIM_ENABLE_ARCH_m68hc11_TRUE@ $(SIM_COMMON_LIBS)
2301
2302 @SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11_SIM_EXTRA_HW_DEVICES = m68hc11 m68hc11sio m68hc11eepr m68hc11tim m68hc11spi nvram
2303 @SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11_BUILD_OUTPUTS = \
2304 @SIM_ENABLE_ARCH_m68hc11_TRUE@ m68hc11/gencode$(EXEEXT) \
2305 @SIM_ENABLE_ARCH_m68hc11_TRUE@ m68hc11/m68hc11int.c \
2306 @SIM_ENABLE_ARCH_m68hc11_TRUE@ m68hc11/m68hc12int.c
2307
2308 @SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11_gencode_SOURCES = m68hc11/gencode.c
2309 @SIM_ENABLE_ARCH_mcore_TRUE@mcore_libsim_a_SOURCES =
2310 @SIM_ENABLE_ARCH_mcore_TRUE@mcore_libsim_a_LIBADD = \
2311 @SIM_ENABLE_ARCH_mcore_TRUE@ $(common_libcommon_a_OBJECTS) \
2312 @SIM_ENABLE_ARCH_mcore_TRUE@ mcore/interp.o \
2313 @SIM_ENABLE_ARCH_mcore_TRUE@ $(patsubst %,mcore/%,$(SIM_NEW_COMMON_OBJS)) \
2314 @SIM_ENABLE_ARCH_mcore_TRUE@ $(patsubst %,mcore/dv-%.o,$(SIM_HW_DEVICES)) \
2315 @SIM_ENABLE_ARCH_mcore_TRUE@ mcore/modules.o \
2316 @SIM_ENABLE_ARCH_mcore_TRUE@ mcore/sim-resume.o
2317
2318 @SIM_ENABLE_ARCH_mcore_TRUE@mcore_run_SOURCES =
2319 @SIM_ENABLE_ARCH_mcore_TRUE@mcore_run_LDADD = \
2320 @SIM_ENABLE_ARCH_mcore_TRUE@ mcore/nrun.o \
2321 @SIM_ENABLE_ARCH_mcore_TRUE@ mcore/libsim.a \
2322 @SIM_ENABLE_ARCH_mcore_TRUE@ $(SIM_COMMON_LIBS)
2323
2324 @SIM_ENABLE_ARCH_microblaze_TRUE@microblaze_run_SOURCES =
2325 @SIM_ENABLE_ARCH_microblaze_TRUE@microblaze_run_LDADD = \
2326 @SIM_ENABLE_ARCH_microblaze_TRUE@ microblaze/nrun.o \
2327 @SIM_ENABLE_ARCH_microblaze_TRUE@ microblaze/libsim.a \
2328 @SIM_ENABLE_ARCH_microblaze_TRUE@ $(SIM_COMMON_LIBS)
2329
2330 @SIM_ENABLE_ARCH_mips_TRUE@mips_run_SOURCES =
2331 @SIM_ENABLE_ARCH_mips_TRUE@mips_run_LDADD = \
2332 @SIM_ENABLE_ARCH_mips_TRUE@ mips/nrun.o \
2333 @SIM_ENABLE_ARCH_mips_TRUE@ mips/libsim.a \
2334 @SIM_ENABLE_ARCH_mips_TRUE@ $(SIM_COMMON_LIBS)
2335
2336 @SIM_ENABLE_ARCH_mips_TRUE@mips_SIM_EXTRA_HW_DEVICES = tx3904cpu tx3904irc tx3904tmr tx3904sio
2337 @SIM_ENABLE_ARCH_mips_TRUE@mips_BUILT_SRC_FROM_IGEN_ITABLE = \
2338 @SIM_ENABLE_ARCH_mips_TRUE@ mips/itable.h \
2339 @SIM_ENABLE_ARCH_mips_TRUE@ mips/itable.c
2340
2341 @SIM_ENABLE_ARCH_mips_TRUE@mips_BUILT_SRC_FROM_GEN_MODE_SINGLE = \
2342 @SIM_ENABLE_ARCH_mips_TRUE@ mips/icache.h \
2343 @SIM_ENABLE_ARCH_mips_TRUE@ mips/icache.c \
2344 @SIM_ENABLE_ARCH_mips_TRUE@ mips/idecode.h \
2345 @SIM_ENABLE_ARCH_mips_TRUE@ mips/idecode.c \
2346 @SIM_ENABLE_ARCH_mips_TRUE@ mips/semantics.h \
2347 @SIM_ENABLE_ARCH_mips_TRUE@ mips/semantics.c \
2348 @SIM_ENABLE_ARCH_mips_TRUE@ mips/model.h \
2349 @SIM_ENABLE_ARCH_mips_TRUE@ mips/model.c \
2350 @SIM_ENABLE_ARCH_mips_TRUE@ mips/support.h \
2351 @SIM_ENABLE_ARCH_mips_TRUE@ mips/support.c \
2352 @SIM_ENABLE_ARCH_mips_TRUE@ mips/engine.h \
2353 @SIM_ENABLE_ARCH_mips_TRUE@ mips/engine.c \
2354 @SIM_ENABLE_ARCH_mips_TRUE@ mips/irun.c
2355
2356 @SIM_ENABLE_ARCH_mips_TRUE@mips_BUILT_SRC_FROM_GEN_MODE_M16_M16 = \
2357 @SIM_ENABLE_ARCH_mips_TRUE@ mips/m16_icache.h \
2358 @SIM_ENABLE_ARCH_mips_TRUE@ mips/m16_icache.c \
2359 @SIM_ENABLE_ARCH_mips_TRUE@ mips/m16_idecode.h \
2360 @SIM_ENABLE_ARCH_mips_TRUE@ mips/m16_idecode.c \
2361 @SIM_ENABLE_ARCH_mips_TRUE@ mips/m16_semantics.h \
2362 @SIM_ENABLE_ARCH_mips_TRUE@ mips/m16_semantics.c \
2363 @SIM_ENABLE_ARCH_mips_TRUE@ mips/m16_model.h \
2364 @SIM_ENABLE_ARCH_mips_TRUE@ mips/m16_model.c \
2365 @SIM_ENABLE_ARCH_mips_TRUE@ mips/m16_support.h \
2366 @SIM_ENABLE_ARCH_mips_TRUE@ mips/m16_support.c \
2367 @SIM_ENABLE_ARCH_mips_TRUE@mips_BUILT_SRC_FROM_GEN_MODE_M16_M32 = \
2368 @SIM_ENABLE_ARCH_mips_TRUE@ mips/m32_icache.h \
2369 @SIM_ENABLE_ARCH_mips_TRUE@ mips/m32_icache.c \
2370 @SIM_ENABLE_ARCH_mips_TRUE@ mips/m32_idecode.h \
2371 @SIM_ENABLE_ARCH_mips_TRUE@ mips/m32_idecode.c \
2372 @SIM_ENABLE_ARCH_mips_TRUE@ mips/m32_semantics.h \
2373 @SIM_ENABLE_ARCH_mips_TRUE@ mips/m32_semantics.c \
2374 @SIM_ENABLE_ARCH_mips_TRUE@ mips/m32_model.h \
2375 @SIM_ENABLE_ARCH_mips_TRUE@ mips/m32_model.c \
2376 @SIM_ENABLE_ARCH_mips_TRUE@ mips/m32_support.h \
2377 @SIM_ENABLE_ARCH_mips_TRUE@ mips/m32_support.c
2378
2379 @SIM_ENABLE_ARCH_mips_TRUE@mips_BUILD_OUTPUTS = \
2380 @SIM_ENABLE_ARCH_mips_TRUE@ $(mips_BUILT_SRC_FROM_IGEN_ITABLE) \
2381 @SIM_ENABLE_ARCH_mips_TRUE@ mips/stamp-igen-itable \
2382 @SIM_ENABLE_ARCH_mips_TRUE@ $(am__append_90) $(am__append_91) \
2383 @SIM_ENABLE_ARCH_mips_TRUE@ $(am__append_92)
2384 @SIM_ENABLE_ARCH_mips_TRUE@mips_IGEN_TRACE = # -G omit-line-numbers # -G trace-rule-selection -G trace-rule-rejection -G trace-entries # -G trace-all
2385 @SIM_ENABLE_ARCH_mips_TRUE@mips_IGEN_INSN = $(srcdir)/mips/mips.igen
2386 @SIM_ENABLE_ARCH_mips_TRUE@mips_IGEN_INSN_INC = \
2387 @SIM_ENABLE_ARCH_mips_TRUE@ mips/dsp.igen \
2388 @SIM_ENABLE_ARCH_mips_TRUE@ mips/dsp2.igen \
2389 @SIM_ENABLE_ARCH_mips_TRUE@ mips/m16.igen \
2390 @SIM_ENABLE_ARCH_mips_TRUE@ mips/m16e.igen \
2391 @SIM_ENABLE_ARCH_mips_TRUE@ mips/mdmx.igen \
2392 @SIM_ENABLE_ARCH_mips_TRUE@ mips/micromipsdsp.igen \
2393 @SIM_ENABLE_ARCH_mips_TRUE@ mips/micromips.igen \
2394 @SIM_ENABLE_ARCH_mips_TRUE@ mips/mips3264r2.igen \
2395 @SIM_ENABLE_ARCH_mips_TRUE@ mips/mips3264r6.igen \
2396 @SIM_ENABLE_ARCH_mips_TRUE@ mips/mips3d.igen \
2397 @SIM_ENABLE_ARCH_mips_TRUE@ mips/sb1.igen \
2398 @SIM_ENABLE_ARCH_mips_TRUE@ mips/tx.igen \
2399 @SIM_ENABLE_ARCH_mips_TRUE@ mips/vr.igen
2400
2401 @SIM_ENABLE_ARCH_mips_TRUE@mips_IGEN_DC = $(srcdir)/mips/mips.dc
2402 @SIM_ENABLE_ARCH_mips_TRUE@mips_M16_DC = $(srcdir)/mips/m16.dc
2403 @SIM_ENABLE_ARCH_mips_TRUE@mips_MICROMIPS32_DC = $(srcdir)/mips/micromips.dc
2404 @SIM_ENABLE_ARCH_mips_TRUE@mips_MICROMIPS16_DC = $(srcdir)/mips/micromips16.dc
2405 @SIM_ENABLE_ARCH_mn10300_TRUE@mn10300_run_SOURCES =
2406 @SIM_ENABLE_ARCH_mn10300_TRUE@mn10300_run_LDADD = \
2407 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/nrun.o \
2408 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/libsim.a \
2409 @SIM_ENABLE_ARCH_mn10300_TRUE@ $(SIM_COMMON_LIBS)
2410
2411 @SIM_ENABLE_ARCH_mn10300_TRUE@mn10300_SIM_EXTRA_HW_DEVICES = mn103cpu mn103int mn103tim mn103ser mn103iop
2412 @SIM_ENABLE_ARCH_mn10300_TRUE@mn10300_BUILT_SRC_FROM_IGEN = \
2413 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/icache.h \
2414 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/icache.c \
2415 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/idecode.h \
2416 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/idecode.c \
2417 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/semantics.h \
2418 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/semantics.c \
2419 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/model.h \
2420 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/model.c \
2421 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/support.h \
2422 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/support.c \
2423 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/itable.h \
2424 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/itable.c \
2425 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/engine.h \
2426 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/engine.c \
2427 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/irun.c
2428
2429 @SIM_ENABLE_ARCH_mn10300_TRUE@mn10300_BUILD_OUTPUTS = \
2430 @SIM_ENABLE_ARCH_mn10300_TRUE@ $(mn10300_BUILT_SRC_FROM_IGEN) \
2431 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/stamp-igen
2432
2433 @SIM_ENABLE_ARCH_mn10300_TRUE@mn10300_IGEN_TRACE = # -G omit-line-numbers # -G trace-rule-selection -G trace-rule-rejection -G trace-entries
2434 @SIM_ENABLE_ARCH_mn10300_TRUE@mn10300_IGEN_INSN = $(srcdir)/mn10300/mn10300.igen
2435 @SIM_ENABLE_ARCH_mn10300_TRUE@mn10300_IGEN_INSN_INC = mn10300/am33.igen mn10300/am33-2.igen
2436 @SIM_ENABLE_ARCH_mn10300_TRUE@mn10300_IGEN_DC = $(srcdir)/mn10300/mn10300.dc
2437 @SIM_ENABLE_ARCH_moxie_TRUE@moxie_run_SOURCES =
2438 @SIM_ENABLE_ARCH_moxie_TRUE@moxie_run_LDADD = \
2439 @SIM_ENABLE_ARCH_moxie_TRUE@ moxie/nrun.o \
2440 @SIM_ENABLE_ARCH_moxie_TRUE@ moxie/libsim.a \
2441 @SIM_ENABLE_ARCH_moxie_TRUE@ $(SIM_COMMON_LIBS)
2442
2443 @SIM_ENABLE_ARCH_moxie_TRUE@dtbdir = $(datadir)/gdb/dtb
2444 @SIM_ENABLE_ARCH_moxie_TRUE@dtb_DATA = moxie/moxie-gdb.dtb
2445 @SIM_ENABLE_ARCH_msp430_TRUE@msp430_run_SOURCES =
2446 @SIM_ENABLE_ARCH_msp430_TRUE@msp430_run_LDADD = \
2447 @SIM_ENABLE_ARCH_msp430_TRUE@ msp430/nrun.o \
2448 @SIM_ENABLE_ARCH_msp430_TRUE@ msp430/libsim.a \
2449 @SIM_ENABLE_ARCH_msp430_TRUE@ $(SIM_COMMON_LIBS)
2450
2451 @SIM_ENABLE_ARCH_or1k_TRUE@or1k_run_SOURCES =
2452 @SIM_ENABLE_ARCH_or1k_TRUE@or1k_run_LDADD = \
2453 @SIM_ENABLE_ARCH_or1k_TRUE@ or1k/nrun.o \
2454 @SIM_ENABLE_ARCH_or1k_TRUE@ or1k/libsim.a \
2455 @SIM_ENABLE_ARCH_or1k_TRUE@ $(SIM_COMMON_LIBS)
2456
2457 @SIM_ENABLE_ARCH_or1k_TRUE@or1kdocdir = $(docdir)/or1k
2458 @SIM_ENABLE_ARCH_or1k_TRUE@or1kdoc_DATA = or1k/README
2459 @SIM_ENABLE_ARCH_or1k_TRUE@or1k_BUILD_OUTPUTS = \
2460 @SIM_ENABLE_ARCH_or1k_TRUE@ or1k/mloop.c \
2461 @SIM_ENABLE_ARCH_or1k_TRUE@ or1k/stamp-mloop
2462
2463 @SIM_ENABLE_ARCH_ppc_TRUE@ppc_run_SOURCES =
2464 @SIM_ENABLE_ARCH_ppc_TRUE@ppc_run_LDADD = \
2465 @SIM_ENABLE_ARCH_ppc_TRUE@ ppc/main.o \
2466 @SIM_ENABLE_ARCH_ppc_TRUE@ ppc/libsim.a \
2467 @SIM_ENABLE_ARCH_ppc_TRUE@ $(SIM_COMMON_LIBS)
2468
2469 @SIM_ENABLE_ARCH_ppc_TRUE@ppcdocdir = $(docdir)/ppc
2470 @SIM_ENABLE_ARCH_ppc_TRUE@ppcdoc_DATA = ppc/BUGS ppc/INSTALL ppc/README ppc/RUN
2471 @SIM_ENABLE_ARCH_pru_TRUE@pru_run_SOURCES =
2472 @SIM_ENABLE_ARCH_pru_TRUE@pru_run_LDADD = \
2473 @SIM_ENABLE_ARCH_pru_TRUE@ pru/nrun.o \
2474 @SIM_ENABLE_ARCH_pru_TRUE@ pru/libsim.a \
2475 @SIM_ENABLE_ARCH_pru_TRUE@ $(SIM_COMMON_LIBS)
2476
2477 @SIM_ENABLE_ARCH_riscv_TRUE@riscv_run_SOURCES =
2478 @SIM_ENABLE_ARCH_riscv_TRUE@riscv_run_LDADD = \
2479 @SIM_ENABLE_ARCH_riscv_TRUE@ riscv/nrun.o \
2480 @SIM_ENABLE_ARCH_riscv_TRUE@ riscv/libsim.a \
2481 @SIM_ENABLE_ARCH_riscv_TRUE@ $(SIM_COMMON_LIBS)
2482
2483 @SIM_ENABLE_ARCH_rl78_TRUE@rl78_run_SOURCES =
2484 @SIM_ENABLE_ARCH_rl78_TRUE@rl78_run_LDADD = \
2485 @SIM_ENABLE_ARCH_rl78_TRUE@ rl78/main.o \
2486 @SIM_ENABLE_ARCH_rl78_TRUE@ rl78/libsim.a \
2487 @SIM_ENABLE_ARCH_rl78_TRUE@ $(SIM_COMMON_LIBS)
2488
2489 @SIM_ENABLE_ARCH_rx_TRUE@rx_run_SOURCES =
2490 @SIM_ENABLE_ARCH_rx_TRUE@rx_run_LDADD = \
2491 @SIM_ENABLE_ARCH_rx_TRUE@ rx/main.o \
2492 @SIM_ENABLE_ARCH_rx_TRUE@ rx/libsim.a \
2493 @SIM_ENABLE_ARCH_rx_TRUE@ $(SIM_COMMON_LIBS)
2494
2495 @SIM_ENABLE_ARCH_rx_TRUE@rxdocdir = $(docdir)/rx
2496 @SIM_ENABLE_ARCH_rx_TRUE@rxdoc_DATA = rx/README.txt
2497 @SIM_ENABLE_ARCH_sh_TRUE@sh_run_SOURCES =
2498 @SIM_ENABLE_ARCH_sh_TRUE@sh_run_LDADD = \
2499 @SIM_ENABLE_ARCH_sh_TRUE@ sh/nrun.o \
2500 @SIM_ENABLE_ARCH_sh_TRUE@ sh/libsim.a \
2501 @SIM_ENABLE_ARCH_sh_TRUE@ $(SIM_COMMON_LIBS)
2502
2503 @SIM_ENABLE_ARCH_sh_TRUE@sh_BUILD_OUTPUTS = \
2504 @SIM_ENABLE_ARCH_sh_TRUE@ sh/gencode$(EXEEXT) \
2505 @SIM_ENABLE_ARCH_sh_TRUE@ sh/table.c
2506
2507 @SIM_ENABLE_ARCH_sh_TRUE@sh_gencode_SOURCES = sh/gencode.c
2508 @SIM_ENABLE_ARCH_v850_TRUE@v850_run_SOURCES =
2509 @SIM_ENABLE_ARCH_v850_TRUE@v850_run_LDADD = \
2510 @SIM_ENABLE_ARCH_v850_TRUE@ v850/nrun.o \
2511 @SIM_ENABLE_ARCH_v850_TRUE@ v850/libsim.a \
2512 @SIM_ENABLE_ARCH_v850_TRUE@ $(SIM_COMMON_LIBS)
2513
2514 @SIM_ENABLE_ARCH_v850_TRUE@v850_BUILT_SRC_FROM_IGEN = \
2515 @SIM_ENABLE_ARCH_v850_TRUE@ v850/icache.h \
2516 @SIM_ENABLE_ARCH_v850_TRUE@ v850/icache.c \
2517 @SIM_ENABLE_ARCH_v850_TRUE@ v850/idecode.h \
2518 @SIM_ENABLE_ARCH_v850_TRUE@ v850/idecode.c \
2519 @SIM_ENABLE_ARCH_v850_TRUE@ v850/semantics.h \
2520 @SIM_ENABLE_ARCH_v850_TRUE@ v850/semantics.c \
2521 @SIM_ENABLE_ARCH_v850_TRUE@ v850/model.h \
2522 @SIM_ENABLE_ARCH_v850_TRUE@ v850/model.c \
2523 @SIM_ENABLE_ARCH_v850_TRUE@ v850/support.h \
2524 @SIM_ENABLE_ARCH_v850_TRUE@ v850/support.c \
2525 @SIM_ENABLE_ARCH_v850_TRUE@ v850/itable.h \
2526 @SIM_ENABLE_ARCH_v850_TRUE@ v850/itable.c \
2527 @SIM_ENABLE_ARCH_v850_TRUE@ v850/engine.h \
2528 @SIM_ENABLE_ARCH_v850_TRUE@ v850/engine.c \
2529 @SIM_ENABLE_ARCH_v850_TRUE@ v850/irun.c
2530
2531 @SIM_ENABLE_ARCH_v850_TRUE@v850_BUILD_OUTPUTS = \
2532 @SIM_ENABLE_ARCH_v850_TRUE@ $(v850_BUILT_SRC_FROM_IGEN) \
2533 @SIM_ENABLE_ARCH_v850_TRUE@ v850/stamp-igen
2534
2535 @SIM_ENABLE_ARCH_v850_TRUE@v850_IGEN_TRACE = # -G omit-line-numbers # -G trace-rule-selection -G trace-rule-rejection -G trace-entries
2536 @SIM_ENABLE_ARCH_v850_TRUE@v850_IGEN_INSN = $(srcdir)/v850/v850.igen
2537 @SIM_ENABLE_ARCH_v850_TRUE@v850_IGEN_DC = $(srcdir)/v850/v850.dc
2538 all: $(BUILT_SOURCES) config.h
2539 $(MAKE) $(AM_MAKEFLAGS) all-recursive
2540
2541 .SUFFIXES:
2542 .SUFFIXES: .c .lo .log .o .obj .test .test$(EXEEXT) .trs
2543 am--refresh: Makefile
2544 @:
2545 $(srcdir)/Makefile.in: @MAINTAINER_MODE_TRUE@ $(srcdir)/Makefile.am $(srcdir)/common/local.mk $(srcdir)/igen/local.mk $(srcdir)/testsuite/local.mk $(srcdir)/testsuite/common/local.mk $(srcdir)/aarch64/local.mk $(srcdir)/arm/local.mk $(srcdir)/avr/local.mk $(srcdir)/bfin/local.mk $(srcdir)/bpf/local.mk $(srcdir)/cr16/local.mk $(srcdir)/cris/local.mk $(srcdir)/d10v/local.mk $(srcdir)/erc32/local.mk $(srcdir)/example-synacor/local.mk $(srcdir)/frv/local.mk $(srcdir)/ft32/local.mk $(srcdir)/h8300/local.mk $(srcdir)/iq2000/local.mk $(srcdir)/lm32/local.mk $(srcdir)/m32c/local.mk $(srcdir)/m32r/local.mk $(srcdir)/m68hc11/local.mk $(srcdir)/mcore/local.mk $(srcdir)/microblaze/local.mk $(srcdir)/mips/local.mk $(srcdir)/mn10300/local.mk $(srcdir)/moxie/local.mk $(srcdir)/msp430/local.mk $(srcdir)/or1k/local.mk $(srcdir)/ppc/local.mk $(srcdir)/pru/local.mk $(srcdir)/riscv/local.mk $(srcdir)/rl78/local.mk $(srcdir)/rx/local.mk $(srcdir)/sh/local.mk $(srcdir)/v850/local.mk $(am__configure_deps)
2546 @for dep in $?; do \
2547 case '$(am__configure_deps)' in \
2548 *$$dep*) \
2549 echo ' cd $(srcdir) && $(AUTOMAKE) --foreign'; \
2550 $(am__cd) $(srcdir) && $(AUTOMAKE) --foreign \
2551 && exit 0; \
2552 exit 1;; \
2553 esac; \
2554 done; \
2555 echo ' cd $(top_srcdir) && $(AUTOMAKE) --foreign Makefile'; \
2556 $(am__cd) $(top_srcdir) && \
2557 $(AUTOMAKE) --foreign Makefile
2558 Makefile: $(srcdir)/Makefile.in $(top_builddir)/config.status
2559 @case '$?' in \
2560 *config.status*) \
2561 echo ' $(SHELL) ./config.status'; \
2562 $(SHELL) ./config.status;; \
2563 *) \
2564 echo ' cd $(top_builddir) && $(SHELL) ./config.status $@ $(am__depfiles_maybe)'; \
2565 cd $(top_builddir) && $(SHELL) ./config.status $@ $(am__depfiles_maybe);; \
2566 esac;
2567 $(srcdir)/common/local.mk $(srcdir)/igen/local.mk $(srcdir)/testsuite/local.mk $(srcdir)/testsuite/common/local.mk $(srcdir)/aarch64/local.mk $(srcdir)/arm/local.mk $(srcdir)/avr/local.mk $(srcdir)/bfin/local.mk $(srcdir)/bpf/local.mk $(srcdir)/cr16/local.mk $(srcdir)/cris/local.mk $(srcdir)/d10v/local.mk $(srcdir)/erc32/local.mk $(srcdir)/example-synacor/local.mk $(srcdir)/frv/local.mk $(srcdir)/ft32/local.mk $(srcdir)/h8300/local.mk $(srcdir)/iq2000/local.mk $(srcdir)/lm32/local.mk $(srcdir)/m32c/local.mk $(srcdir)/m32r/local.mk $(srcdir)/m68hc11/local.mk $(srcdir)/mcore/local.mk $(srcdir)/microblaze/local.mk $(srcdir)/mips/local.mk $(srcdir)/mn10300/local.mk $(srcdir)/moxie/local.mk $(srcdir)/msp430/local.mk $(srcdir)/or1k/local.mk $(srcdir)/ppc/local.mk $(srcdir)/pru/local.mk $(srcdir)/riscv/local.mk $(srcdir)/rl78/local.mk $(srcdir)/rx/local.mk $(srcdir)/sh/local.mk $(srcdir)/v850/local.mk $(am__empty):
2568
2569 $(top_builddir)/config.status: $(top_srcdir)/configure $(CONFIG_STATUS_DEPENDENCIES)
2570 $(SHELL) ./config.status --recheck
2571
2572 $(top_srcdir)/configure: @MAINTAINER_MODE_TRUE@ $(am__configure_deps)
2573 $(am__cd) $(srcdir) && $(AUTOCONF)
2574 $(ACLOCAL_M4): @MAINTAINER_MODE_TRUE@ $(am__aclocal_m4_deps)
2575 $(am__cd) $(srcdir) && $(ACLOCAL) $(ACLOCAL_AMFLAGS)
2576 $(am__aclocal_m4_deps):
2577
2578 config.h: stamp-h1
2579 @test -f $@ || rm -f stamp-h1
2580 @test -f $@ || $(MAKE) $(AM_MAKEFLAGS) stamp-h1
2581
2582 stamp-h1: $(srcdir)/config.h.in $(top_builddir)/config.status
2583 @rm -f stamp-h1
2584 cd $(top_builddir) && $(SHELL) ./config.status config.h
2585 $(srcdir)/config.h.in: @MAINTAINER_MODE_TRUE@ $(am__configure_deps)
2586 ($(am__cd) $(top_srcdir) && $(AUTOHEADER))
2587 rm -f stamp-h1
2588 touch $@
2589
2590 distclean-hdr:
2591 -rm -f config.h stamp-h1
2592 Make-common.sim: $(top_builddir)/config.status $(top_srcdir)/common/Make-common.in
2593 cd $(top_builddir) && $(SHELL) ./config.status $@
2594 aarch64/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/aarch64/Makefile.in
2595 cd $(top_builddir) && $(SHELL) ./config.status $@
2596 aarch64/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
2597 cd $(top_builddir) && $(SHELL) ./config.status $@
2598 arm/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/arm/Makefile.in
2599 cd $(top_builddir) && $(SHELL) ./config.status $@
2600 arm/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
2601 cd $(top_builddir) && $(SHELL) ./config.status $@
2602 avr/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/avr/Makefile.in
2603 cd $(top_builddir) && $(SHELL) ./config.status $@
2604 avr/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
2605 cd $(top_builddir) && $(SHELL) ./config.status $@
2606 bfin/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/bfin/Makefile.in
2607 cd $(top_builddir) && $(SHELL) ./config.status $@
2608 bfin/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
2609 cd $(top_builddir) && $(SHELL) ./config.status $@
2610 bpf/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/bpf/Makefile.in
2611 cd $(top_builddir) && $(SHELL) ./config.status $@
2612 bpf/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
2613 cd $(top_builddir) && $(SHELL) ./config.status $@
2614 cr16/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/cr16/Makefile.in
2615 cd $(top_builddir) && $(SHELL) ./config.status $@
2616 cr16/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
2617 cd $(top_builddir) && $(SHELL) ./config.status $@
2618 cris/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/cris/Makefile.in
2619 cd $(top_builddir) && $(SHELL) ./config.status $@
2620 cris/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
2621 cd $(top_builddir) && $(SHELL) ./config.status $@
2622 d10v/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/d10v/Makefile.in
2623 cd $(top_builddir) && $(SHELL) ./config.status $@
2624 d10v/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
2625 cd $(top_builddir) && $(SHELL) ./config.status $@
2626 frv/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/frv/Makefile.in
2627 cd $(top_builddir) && $(SHELL) ./config.status $@
2628 frv/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
2629 cd $(top_builddir) && $(SHELL) ./config.status $@
2630 ft32/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/ft32/Makefile.in
2631 cd $(top_builddir) && $(SHELL) ./config.status $@
2632 ft32/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
2633 cd $(top_builddir) && $(SHELL) ./config.status $@
2634 h8300/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/h8300/Makefile.in
2635 cd $(top_builddir) && $(SHELL) ./config.status $@
2636 h8300/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
2637 cd $(top_builddir) && $(SHELL) ./config.status $@
2638 iq2000/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/iq2000/Makefile.in
2639 cd $(top_builddir) && $(SHELL) ./config.status $@
2640 iq2000/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
2641 cd $(top_builddir) && $(SHELL) ./config.status $@
2642 lm32/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/lm32/Makefile.in
2643 cd $(top_builddir) && $(SHELL) ./config.status $@
2644 lm32/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
2645 cd $(top_builddir) && $(SHELL) ./config.status $@
2646 m32c/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/m32c/Makefile.in
2647 cd $(top_builddir) && $(SHELL) ./config.status $@
2648 m32c/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
2649 cd $(top_builddir) && $(SHELL) ./config.status $@
2650 m32r/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/m32r/Makefile.in
2651 cd $(top_builddir) && $(SHELL) ./config.status $@
2652 m32r/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
2653 cd $(top_builddir) && $(SHELL) ./config.status $@
2654 m68hc11/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/m68hc11/Makefile.in
2655 cd $(top_builddir) && $(SHELL) ./config.status $@
2656 m68hc11/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
2657 cd $(top_builddir) && $(SHELL) ./config.status $@
2658 mcore/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/mcore/Makefile.in
2659 cd $(top_builddir) && $(SHELL) ./config.status $@
2660 mcore/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
2661 cd $(top_builddir) && $(SHELL) ./config.status $@
2662 microblaze/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/microblaze/Makefile.in
2663 cd $(top_builddir) && $(SHELL) ./config.status $@
2664 microblaze/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
2665 cd $(top_builddir) && $(SHELL) ./config.status $@
2666 mips/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/mips/Makefile.in
2667 cd $(top_builddir) && $(SHELL) ./config.status $@
2668 mips/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
2669 cd $(top_builddir) && $(SHELL) ./config.status $@
2670 mn10300/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/mn10300/Makefile.in
2671 cd $(top_builddir) && $(SHELL) ./config.status $@
2672 mn10300/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
2673 cd $(top_builddir) && $(SHELL) ./config.status $@
2674 moxie/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/moxie/Makefile.in
2675 cd $(top_builddir) && $(SHELL) ./config.status $@
2676 moxie/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
2677 cd $(top_builddir) && $(SHELL) ./config.status $@
2678 msp430/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/msp430/Makefile.in
2679 cd $(top_builddir) && $(SHELL) ./config.status $@
2680 msp430/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
2681 cd $(top_builddir) && $(SHELL) ./config.status $@
2682 or1k/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/or1k/Makefile.in
2683 cd $(top_builddir) && $(SHELL) ./config.status $@
2684 or1k/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
2685 cd $(top_builddir) && $(SHELL) ./config.status $@
2686 ppc/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
2687 cd $(top_builddir) && $(SHELL) ./config.status $@
2688 pru/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/pru/Makefile.in
2689 cd $(top_builddir) && $(SHELL) ./config.status $@
2690 pru/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
2691 cd $(top_builddir) && $(SHELL) ./config.status $@
2692 riscv/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/riscv/Makefile.in
2693 cd $(top_builddir) && $(SHELL) ./config.status $@
2694 riscv/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
2695 cd $(top_builddir) && $(SHELL) ./config.status $@
2696 rl78/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/rl78/Makefile.in
2697 cd $(top_builddir) && $(SHELL) ./config.status $@
2698 rl78/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
2699 cd $(top_builddir) && $(SHELL) ./config.status $@
2700 rx/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/rx/Makefile.in
2701 cd $(top_builddir) && $(SHELL) ./config.status $@
2702 rx/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
2703 cd $(top_builddir) && $(SHELL) ./config.status $@
2704 sh/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/sh/Makefile.in
2705 cd $(top_builddir) && $(SHELL) ./config.status $@
2706 sh/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
2707 cd $(top_builddir) && $(SHELL) ./config.status $@
2708 erc32/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/erc32/Makefile.in
2709 cd $(top_builddir) && $(SHELL) ./config.status $@
2710 erc32/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
2711 cd $(top_builddir) && $(SHELL) ./config.status $@
2712 v850/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/v850/Makefile.in
2713 cd $(top_builddir) && $(SHELL) ./config.status $@
2714 v850/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
2715 cd $(top_builddir) && $(SHELL) ./config.status $@
2716 example-synacor/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/example-synacor/Makefile.in
2717 cd $(top_builddir) && $(SHELL) ./config.status $@
2718 example-synacor/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
2719 cd $(top_builddir) && $(SHELL) ./config.status $@
2720 arch-subdir.mk: $(top_builddir)/config.status $(srcdir)/arch-subdir.mk.in
2721 cd $(top_builddir) && $(SHELL) ./config.status $@
2722 .gdbinit: $(top_builddir)/config.status $(srcdir)/gdbinit.in
2723 cd $(top_builddir) && $(SHELL) ./config.status $@
2724
2725 clean-noinstLIBRARIES:
2726 -test -z "$(noinst_LIBRARIES)" || rm -f $(noinst_LIBRARIES)
2727 aarch64/$(am__dirstamp):
2728 @$(MKDIR_P) aarch64
2729 @: > aarch64/$(am__dirstamp)
2730
2731 aarch64/libsim.a: $(aarch64_libsim_a_OBJECTS) $(aarch64_libsim_a_DEPENDENCIES) $(EXTRA_aarch64_libsim_a_DEPENDENCIES) aarch64/$(am__dirstamp)
2732 $(AM_V_at)-rm -f aarch64/libsim.a
2733 $(AM_V_AR)$(aarch64_libsim_a_AR) aarch64/libsim.a $(aarch64_libsim_a_OBJECTS) $(aarch64_libsim_a_LIBADD)
2734 $(AM_V_at)$(RANLIB) aarch64/libsim.a
2735 arm/$(am__dirstamp):
2736 @$(MKDIR_P) arm
2737 @: > arm/$(am__dirstamp)
2738
2739 arm/libsim.a: $(arm_libsim_a_OBJECTS) $(arm_libsim_a_DEPENDENCIES) $(EXTRA_arm_libsim_a_DEPENDENCIES) arm/$(am__dirstamp)
2740 $(AM_V_at)-rm -f arm/libsim.a
2741 $(AM_V_AR)$(arm_libsim_a_AR) arm/libsim.a $(arm_libsim_a_OBJECTS) $(arm_libsim_a_LIBADD)
2742 $(AM_V_at)$(RANLIB) arm/libsim.a
2743 avr/$(am__dirstamp):
2744 @$(MKDIR_P) avr
2745 @: > avr/$(am__dirstamp)
2746
2747 avr/libsim.a: $(avr_libsim_a_OBJECTS) $(avr_libsim_a_DEPENDENCIES) $(EXTRA_avr_libsim_a_DEPENDENCIES) avr/$(am__dirstamp)
2748 $(AM_V_at)-rm -f avr/libsim.a
2749 $(AM_V_AR)$(avr_libsim_a_AR) avr/libsim.a $(avr_libsim_a_OBJECTS) $(avr_libsim_a_LIBADD)
2750 $(AM_V_at)$(RANLIB) avr/libsim.a
2751 bfin/$(am__dirstamp):
2752 @$(MKDIR_P) bfin
2753 @: > bfin/$(am__dirstamp)
2754
2755 bfin/libsim.a: $(bfin_libsim_a_OBJECTS) $(bfin_libsim_a_DEPENDENCIES) $(EXTRA_bfin_libsim_a_DEPENDENCIES) bfin/$(am__dirstamp)
2756 $(AM_V_at)-rm -f bfin/libsim.a
2757 $(AM_V_AR)$(bfin_libsim_a_AR) bfin/libsim.a $(bfin_libsim_a_OBJECTS) $(bfin_libsim_a_LIBADD)
2758 $(AM_V_at)$(RANLIB) bfin/libsim.a
2759 bpf/$(am__dirstamp):
2760 @$(MKDIR_P) bpf
2761 @: > bpf/$(am__dirstamp)
2762
2763 bpf/libsim.a: $(bpf_libsim_a_OBJECTS) $(bpf_libsim_a_DEPENDENCIES) $(EXTRA_bpf_libsim_a_DEPENDENCIES) bpf/$(am__dirstamp)
2764 $(AM_V_at)-rm -f bpf/libsim.a
2765 $(AM_V_AR)$(bpf_libsim_a_AR) bpf/libsim.a $(bpf_libsim_a_OBJECTS) $(bpf_libsim_a_LIBADD)
2766 $(AM_V_at)$(RANLIB) bpf/libsim.a
2767 common/$(am__dirstamp):
2768 @$(MKDIR_P) common
2769 @: > common/$(am__dirstamp)
2770 common/$(DEPDIR)/$(am__dirstamp):
2771 @$(MKDIR_P) common/$(DEPDIR)
2772 @: > common/$(DEPDIR)/$(am__dirstamp)
2773 common/callback.$(OBJEXT): common/$(am__dirstamp) \
2774 common/$(DEPDIR)/$(am__dirstamp)
2775 common/portability.$(OBJEXT): common/$(am__dirstamp) \
2776 common/$(DEPDIR)/$(am__dirstamp)
2777 common/sim-load.$(OBJEXT): common/$(am__dirstamp) \
2778 common/$(DEPDIR)/$(am__dirstamp)
2779 common/syscall.$(OBJEXT): common/$(am__dirstamp) \
2780 common/$(DEPDIR)/$(am__dirstamp)
2781 common/target-newlib-errno.$(OBJEXT): common/$(am__dirstamp) \
2782 common/$(DEPDIR)/$(am__dirstamp)
2783 common/target-newlib-open.$(OBJEXT): common/$(am__dirstamp) \
2784 common/$(DEPDIR)/$(am__dirstamp)
2785 common/target-newlib-signal.$(OBJEXT): common/$(am__dirstamp) \
2786 common/$(DEPDIR)/$(am__dirstamp)
2787 common/target-newlib-syscall.$(OBJEXT): common/$(am__dirstamp) \
2788 common/$(DEPDIR)/$(am__dirstamp)
2789 common/version.$(OBJEXT): common/$(am__dirstamp) \
2790 common/$(DEPDIR)/$(am__dirstamp)
2791
2792 common/libcommon.a: $(common_libcommon_a_OBJECTS) $(common_libcommon_a_DEPENDENCIES) $(EXTRA_common_libcommon_a_DEPENDENCIES) common/$(am__dirstamp)
2793 $(AM_V_at)-rm -f common/libcommon.a
2794 $(AM_V_AR)$(common_libcommon_a_AR) common/libcommon.a $(common_libcommon_a_OBJECTS) $(common_libcommon_a_LIBADD)
2795 $(AM_V_at)$(RANLIB) common/libcommon.a
2796 cr16/$(am__dirstamp):
2797 @$(MKDIR_P) cr16
2798 @: > cr16/$(am__dirstamp)
2799
2800 cr16/libsim.a: $(cr16_libsim_a_OBJECTS) $(cr16_libsim_a_DEPENDENCIES) $(EXTRA_cr16_libsim_a_DEPENDENCIES) cr16/$(am__dirstamp)
2801 $(AM_V_at)-rm -f cr16/libsim.a
2802 $(AM_V_AR)$(cr16_libsim_a_AR) cr16/libsim.a $(cr16_libsim_a_OBJECTS) $(cr16_libsim_a_LIBADD)
2803 $(AM_V_at)$(RANLIB) cr16/libsim.a
2804 cris/$(am__dirstamp):
2805 @$(MKDIR_P) cris
2806 @: > cris/$(am__dirstamp)
2807
2808 cris/libsim.a: $(cris_libsim_a_OBJECTS) $(cris_libsim_a_DEPENDENCIES) $(EXTRA_cris_libsim_a_DEPENDENCIES) cris/$(am__dirstamp)
2809 $(AM_V_at)-rm -f cris/libsim.a
2810 $(AM_V_AR)$(cris_libsim_a_AR) cris/libsim.a $(cris_libsim_a_OBJECTS) $(cris_libsim_a_LIBADD)
2811 $(AM_V_at)$(RANLIB) cris/libsim.a
2812 d10v/$(am__dirstamp):
2813 @$(MKDIR_P) d10v
2814 @: > d10v/$(am__dirstamp)
2815
2816 d10v/libsim.a: $(d10v_libsim_a_OBJECTS) $(d10v_libsim_a_DEPENDENCIES) $(EXTRA_d10v_libsim_a_DEPENDENCIES) d10v/$(am__dirstamp)
2817 $(AM_V_at)-rm -f d10v/libsim.a
2818 $(AM_V_AR)$(d10v_libsim_a_AR) d10v/libsim.a $(d10v_libsim_a_OBJECTS) $(d10v_libsim_a_LIBADD)
2819 $(AM_V_at)$(RANLIB) d10v/libsim.a
2820 erc32/$(am__dirstamp):
2821 @$(MKDIR_P) erc32
2822 @: > erc32/$(am__dirstamp)
2823
2824 erc32/libsim.a: $(erc32_libsim_a_OBJECTS) $(erc32_libsim_a_DEPENDENCIES) $(EXTRA_erc32_libsim_a_DEPENDENCIES) erc32/$(am__dirstamp)
2825 $(AM_V_at)-rm -f erc32/libsim.a
2826 $(AM_V_AR)$(erc32_libsim_a_AR) erc32/libsim.a $(erc32_libsim_a_OBJECTS) $(erc32_libsim_a_LIBADD)
2827 $(AM_V_at)$(RANLIB) erc32/libsim.a
2828 example-synacor/$(am__dirstamp):
2829 @$(MKDIR_P) example-synacor
2830 @: > example-synacor/$(am__dirstamp)
2831
2832 example-synacor/libsim.a: $(example_synacor_libsim_a_OBJECTS) $(example_synacor_libsim_a_DEPENDENCIES) $(EXTRA_example_synacor_libsim_a_DEPENDENCIES) example-synacor/$(am__dirstamp)
2833 $(AM_V_at)-rm -f example-synacor/libsim.a
2834 $(AM_V_AR)$(example_synacor_libsim_a_AR) example-synacor/libsim.a $(example_synacor_libsim_a_OBJECTS) $(example_synacor_libsim_a_LIBADD)
2835 $(AM_V_at)$(RANLIB) example-synacor/libsim.a
2836 frv/$(am__dirstamp):
2837 @$(MKDIR_P) frv
2838 @: > frv/$(am__dirstamp)
2839
2840 frv/libsim.a: $(frv_libsim_a_OBJECTS) $(frv_libsim_a_DEPENDENCIES) $(EXTRA_frv_libsim_a_DEPENDENCIES) frv/$(am__dirstamp)
2841 $(AM_V_at)-rm -f frv/libsim.a
2842 $(AM_V_AR)$(frv_libsim_a_AR) frv/libsim.a $(frv_libsim_a_OBJECTS) $(frv_libsim_a_LIBADD)
2843 $(AM_V_at)$(RANLIB) frv/libsim.a
2844 ft32/$(am__dirstamp):
2845 @$(MKDIR_P) ft32
2846 @: > ft32/$(am__dirstamp)
2847
2848 ft32/libsim.a: $(ft32_libsim_a_OBJECTS) $(ft32_libsim_a_DEPENDENCIES) $(EXTRA_ft32_libsim_a_DEPENDENCIES) ft32/$(am__dirstamp)
2849 $(AM_V_at)-rm -f ft32/libsim.a
2850 $(AM_V_AR)$(ft32_libsim_a_AR) ft32/libsim.a $(ft32_libsim_a_OBJECTS) $(ft32_libsim_a_LIBADD)
2851 $(AM_V_at)$(RANLIB) ft32/libsim.a
2852 h8300/$(am__dirstamp):
2853 @$(MKDIR_P) h8300
2854 @: > h8300/$(am__dirstamp)
2855
2856 h8300/libsim.a: $(h8300_libsim_a_OBJECTS) $(h8300_libsim_a_DEPENDENCIES) $(EXTRA_h8300_libsim_a_DEPENDENCIES) h8300/$(am__dirstamp)
2857 $(AM_V_at)-rm -f h8300/libsim.a
2858 $(AM_V_AR)$(h8300_libsim_a_AR) h8300/libsim.a $(h8300_libsim_a_OBJECTS) $(h8300_libsim_a_LIBADD)
2859 $(AM_V_at)$(RANLIB) h8300/libsim.a
2860 igen/$(am__dirstamp):
2861 @$(MKDIR_P) igen
2862 @: > igen/$(am__dirstamp)
2863 igen/$(DEPDIR)/$(am__dirstamp):
2864 @$(MKDIR_P) igen/$(DEPDIR)
2865 @: > igen/$(DEPDIR)/$(am__dirstamp)
2866 igen/table.$(OBJEXT): igen/$(am__dirstamp) \
2867 igen/$(DEPDIR)/$(am__dirstamp)
2868 igen/lf.$(OBJEXT): igen/$(am__dirstamp) igen/$(DEPDIR)/$(am__dirstamp)
2869 igen/misc.$(OBJEXT): igen/$(am__dirstamp) \
2870 igen/$(DEPDIR)/$(am__dirstamp)
2871 igen/filter_host.$(OBJEXT): igen/$(am__dirstamp) \
2872 igen/$(DEPDIR)/$(am__dirstamp)
2873 igen/ld-decode.$(OBJEXT): igen/$(am__dirstamp) \
2874 igen/$(DEPDIR)/$(am__dirstamp)
2875 igen/ld-cache.$(OBJEXT): igen/$(am__dirstamp) \
2876 igen/$(DEPDIR)/$(am__dirstamp)
2877 igen/filter.$(OBJEXT): igen/$(am__dirstamp) \
2878 igen/$(DEPDIR)/$(am__dirstamp)
2879 igen/ld-insn.$(OBJEXT): igen/$(am__dirstamp) \
2880 igen/$(DEPDIR)/$(am__dirstamp)
2881 igen/gen-model.$(OBJEXT): igen/$(am__dirstamp) \
2882 igen/$(DEPDIR)/$(am__dirstamp)
2883 igen/gen-itable.$(OBJEXT): igen/$(am__dirstamp) \
2884 igen/$(DEPDIR)/$(am__dirstamp)
2885 igen/gen-icache.$(OBJEXT): igen/$(am__dirstamp) \
2886 igen/$(DEPDIR)/$(am__dirstamp)
2887 igen/gen-semantics.$(OBJEXT): igen/$(am__dirstamp) \
2888 igen/$(DEPDIR)/$(am__dirstamp)
2889 igen/gen-idecode.$(OBJEXT): igen/$(am__dirstamp) \
2890 igen/$(DEPDIR)/$(am__dirstamp)
2891 igen/gen-support.$(OBJEXT): igen/$(am__dirstamp) \
2892 igen/$(DEPDIR)/$(am__dirstamp)
2893 igen/gen-engine.$(OBJEXT): igen/$(am__dirstamp) \
2894 igen/$(DEPDIR)/$(am__dirstamp)
2895 igen/gen.$(OBJEXT): igen/$(am__dirstamp) \
2896 igen/$(DEPDIR)/$(am__dirstamp)
2897
2898 @SIM_ENABLE_IGEN_FALSE@igen/libigen.a: $(igen_libigen_a_OBJECTS) $(igen_libigen_a_DEPENDENCIES) $(EXTRA_igen_libigen_a_DEPENDENCIES) igen/$(am__dirstamp)
2899 @SIM_ENABLE_IGEN_FALSE@ $(AM_V_at)-rm -f igen/libigen.a
2900 @SIM_ENABLE_IGEN_FALSE@ $(AM_V_AR)$(igen_libigen_a_AR) igen/libigen.a $(igen_libigen_a_OBJECTS) $(igen_libigen_a_LIBADD)
2901 @SIM_ENABLE_IGEN_FALSE@ $(AM_V_at)$(RANLIB) igen/libigen.a
2902 iq2000/$(am__dirstamp):
2903 @$(MKDIR_P) iq2000
2904 @: > iq2000/$(am__dirstamp)
2905
2906 iq2000/libsim.a: $(iq2000_libsim_a_OBJECTS) $(iq2000_libsim_a_DEPENDENCIES) $(EXTRA_iq2000_libsim_a_DEPENDENCIES) iq2000/$(am__dirstamp)
2907 $(AM_V_at)-rm -f iq2000/libsim.a
2908 $(AM_V_AR)$(iq2000_libsim_a_AR) iq2000/libsim.a $(iq2000_libsim_a_OBJECTS) $(iq2000_libsim_a_LIBADD)
2909 $(AM_V_at)$(RANLIB) iq2000/libsim.a
2910 lm32/$(am__dirstamp):
2911 @$(MKDIR_P) lm32
2912 @: > lm32/$(am__dirstamp)
2913
2914 lm32/libsim.a: $(lm32_libsim_a_OBJECTS) $(lm32_libsim_a_DEPENDENCIES) $(EXTRA_lm32_libsim_a_DEPENDENCIES) lm32/$(am__dirstamp)
2915 $(AM_V_at)-rm -f lm32/libsim.a
2916 $(AM_V_AR)$(lm32_libsim_a_AR) lm32/libsim.a $(lm32_libsim_a_OBJECTS) $(lm32_libsim_a_LIBADD)
2917 $(AM_V_at)$(RANLIB) lm32/libsim.a
2918 m32c/$(am__dirstamp):
2919 @$(MKDIR_P) m32c
2920 @: > m32c/$(am__dirstamp)
2921
2922 m32c/libsim.a: $(m32c_libsim_a_OBJECTS) $(m32c_libsim_a_DEPENDENCIES) $(EXTRA_m32c_libsim_a_DEPENDENCIES) m32c/$(am__dirstamp)
2923 $(AM_V_at)-rm -f m32c/libsim.a
2924 $(AM_V_AR)$(m32c_libsim_a_AR) m32c/libsim.a $(m32c_libsim_a_OBJECTS) $(m32c_libsim_a_LIBADD)
2925 $(AM_V_at)$(RANLIB) m32c/libsim.a
2926 m32r/$(am__dirstamp):
2927 @$(MKDIR_P) m32r
2928 @: > m32r/$(am__dirstamp)
2929
2930 m32r/libsim.a: $(m32r_libsim_a_OBJECTS) $(m32r_libsim_a_DEPENDENCIES) $(EXTRA_m32r_libsim_a_DEPENDENCIES) m32r/$(am__dirstamp)
2931 $(AM_V_at)-rm -f m32r/libsim.a
2932 $(AM_V_AR)$(m32r_libsim_a_AR) m32r/libsim.a $(m32r_libsim_a_OBJECTS) $(m32r_libsim_a_LIBADD)
2933 $(AM_V_at)$(RANLIB) m32r/libsim.a
2934 m68hc11/$(am__dirstamp):
2935 @$(MKDIR_P) m68hc11
2936 @: > m68hc11/$(am__dirstamp)
2937
2938 m68hc11/libsim.a: $(m68hc11_libsim_a_OBJECTS) $(m68hc11_libsim_a_DEPENDENCIES) $(EXTRA_m68hc11_libsim_a_DEPENDENCIES) m68hc11/$(am__dirstamp)
2939 $(AM_V_at)-rm -f m68hc11/libsim.a
2940 $(AM_V_AR)$(m68hc11_libsim_a_AR) m68hc11/libsim.a $(m68hc11_libsim_a_OBJECTS) $(m68hc11_libsim_a_LIBADD)
2941 $(AM_V_at)$(RANLIB) m68hc11/libsim.a
2942 mcore/$(am__dirstamp):
2943 @$(MKDIR_P) mcore
2944 @: > mcore/$(am__dirstamp)
2945
2946 mcore/libsim.a: $(mcore_libsim_a_OBJECTS) $(mcore_libsim_a_DEPENDENCIES) $(EXTRA_mcore_libsim_a_DEPENDENCIES) mcore/$(am__dirstamp)
2947 $(AM_V_at)-rm -f mcore/libsim.a
2948 $(AM_V_AR)$(mcore_libsim_a_AR) mcore/libsim.a $(mcore_libsim_a_OBJECTS) $(mcore_libsim_a_LIBADD)
2949 $(AM_V_at)$(RANLIB) mcore/libsim.a
2950
2951 clean-checkPROGRAMS:
2952 @list='$(check_PROGRAMS)'; test -n "$$list" || exit 0; \
2953 echo " rm -f" $$list; \
2954 rm -f $$list || exit $$?; \
2955 test -n "$(EXEEXT)" || exit 0; \
2956 list=`for p in $$list; do echo "$$p"; done | sed 's/$(EXEEXT)$$//'`; \
2957 echo " rm -f" $$list; \
2958 rm -f $$list
2959
2960 clean-noinstPROGRAMS:
2961 @list='$(noinst_PROGRAMS)'; test -n "$$list" || exit 0; \
2962 echo " rm -f" $$list; \
2963 rm -f $$list || exit $$?; \
2964 test -n "$(EXEEXT)" || exit 0; \
2965 list=`for p in $$list; do echo "$$p"; done | sed 's/$(EXEEXT)$$//'`; \
2966 echo " rm -f" $$list; \
2967 rm -f $$list
2968
2969 aarch64/run$(EXEEXT): $(aarch64_run_OBJECTS) $(aarch64_run_DEPENDENCIES) $(EXTRA_aarch64_run_DEPENDENCIES) aarch64/$(am__dirstamp)
2970 @rm -f aarch64/run$(EXEEXT)
2971 $(AM_V_CCLD)$(LINK) $(aarch64_run_OBJECTS) $(aarch64_run_LDADD) $(LIBS)
2972
2973 arm/run$(EXEEXT): $(arm_run_OBJECTS) $(arm_run_DEPENDENCIES) $(EXTRA_arm_run_DEPENDENCIES) arm/$(am__dirstamp)
2974 @rm -f arm/run$(EXEEXT)
2975 $(AM_V_CCLD)$(LINK) $(arm_run_OBJECTS) $(arm_run_LDADD) $(LIBS)
2976
2977 avr/run$(EXEEXT): $(avr_run_OBJECTS) $(avr_run_DEPENDENCIES) $(EXTRA_avr_run_DEPENDENCIES) avr/$(am__dirstamp)
2978 @rm -f avr/run$(EXEEXT)
2979 $(AM_V_CCLD)$(LINK) $(avr_run_OBJECTS) $(avr_run_LDADD) $(LIBS)
2980
2981 bfin/run$(EXEEXT): $(bfin_run_OBJECTS) $(bfin_run_DEPENDENCIES) $(EXTRA_bfin_run_DEPENDENCIES) bfin/$(am__dirstamp)
2982 @rm -f bfin/run$(EXEEXT)
2983 $(AM_V_CCLD)$(LINK) $(bfin_run_OBJECTS) $(bfin_run_LDADD) $(LIBS)
2984
2985 bpf/run$(EXEEXT): $(bpf_run_OBJECTS) $(bpf_run_DEPENDENCIES) $(EXTRA_bpf_run_DEPENDENCIES) bpf/$(am__dirstamp)
2986 @rm -f bpf/run$(EXEEXT)
2987 $(AM_V_CCLD)$(LINK) $(bpf_run_OBJECTS) $(bpf_run_LDADD) $(LIBS)
2988 cr16/$(DEPDIR)/$(am__dirstamp):
2989 @$(MKDIR_P) cr16/$(DEPDIR)
2990 @: > cr16/$(DEPDIR)/$(am__dirstamp)
2991 cr16/gencode.$(OBJEXT): cr16/$(am__dirstamp) \
2992 cr16/$(DEPDIR)/$(am__dirstamp)
2993
2994 @SIM_ENABLE_ARCH_cr16_FALSE@cr16/gencode$(EXEEXT): $(cr16_gencode_OBJECTS) $(cr16_gencode_DEPENDENCIES) $(EXTRA_cr16_gencode_DEPENDENCIES) cr16/$(am__dirstamp)
2995 @SIM_ENABLE_ARCH_cr16_FALSE@ @rm -f cr16/gencode$(EXEEXT)
2996 @SIM_ENABLE_ARCH_cr16_FALSE@ $(AM_V_CCLD)$(LINK) $(cr16_gencode_OBJECTS) $(cr16_gencode_LDADD) $(LIBS)
2997
2998 cr16/run$(EXEEXT): $(cr16_run_OBJECTS) $(cr16_run_DEPENDENCIES) $(EXTRA_cr16_run_DEPENDENCIES) cr16/$(am__dirstamp)
2999 @rm -f cr16/run$(EXEEXT)
3000 $(AM_V_CCLD)$(LINK) $(cr16_run_OBJECTS) $(cr16_run_LDADD) $(LIBS)
3001
3002 cris/run$(EXEEXT): $(cris_run_OBJECTS) $(cris_run_DEPENDENCIES) $(EXTRA_cris_run_DEPENDENCIES) cris/$(am__dirstamp)
3003 @rm -f cris/run$(EXEEXT)
3004 $(AM_V_CCLD)$(LINK) $(cris_run_OBJECTS) $(cris_run_LDADD) $(LIBS)
3005 cris/$(DEPDIR)/$(am__dirstamp):
3006 @$(MKDIR_P) cris/$(DEPDIR)
3007 @: > cris/$(DEPDIR)/$(am__dirstamp)
3008 cris/rvdummy.$(OBJEXT): cris/$(am__dirstamp) \
3009 cris/$(DEPDIR)/$(am__dirstamp)
3010
3011 cris/rvdummy$(EXEEXT): $(cris_rvdummy_OBJECTS) $(cris_rvdummy_DEPENDENCIES) $(EXTRA_cris_rvdummy_DEPENDENCIES) cris/$(am__dirstamp)
3012 @rm -f cris/rvdummy$(EXEEXT)
3013 $(AM_V_CCLD)$(LINK) $(cris_rvdummy_OBJECTS) $(cris_rvdummy_LDADD) $(LIBS)
3014 d10v/$(DEPDIR)/$(am__dirstamp):
3015 @$(MKDIR_P) d10v/$(DEPDIR)
3016 @: > d10v/$(DEPDIR)/$(am__dirstamp)
3017 d10v/gencode.$(OBJEXT): d10v/$(am__dirstamp) \
3018 d10v/$(DEPDIR)/$(am__dirstamp)
3019
3020 @SIM_ENABLE_ARCH_d10v_FALSE@d10v/gencode$(EXEEXT): $(d10v_gencode_OBJECTS) $(d10v_gencode_DEPENDENCIES) $(EXTRA_d10v_gencode_DEPENDENCIES) d10v/$(am__dirstamp)
3021 @SIM_ENABLE_ARCH_d10v_FALSE@ @rm -f d10v/gencode$(EXEEXT)
3022 @SIM_ENABLE_ARCH_d10v_FALSE@ $(AM_V_CCLD)$(LINK) $(d10v_gencode_OBJECTS) $(d10v_gencode_LDADD) $(LIBS)
3023
3024 d10v/run$(EXEEXT): $(d10v_run_OBJECTS) $(d10v_run_DEPENDENCIES) $(EXTRA_d10v_run_DEPENDENCIES) d10v/$(am__dirstamp)
3025 @rm -f d10v/run$(EXEEXT)
3026 $(AM_V_CCLD)$(LINK) $(d10v_run_OBJECTS) $(d10v_run_LDADD) $(LIBS)
3027
3028 erc32/run$(EXEEXT): $(erc32_run_OBJECTS) $(erc32_run_DEPENDENCIES) $(EXTRA_erc32_run_DEPENDENCIES) erc32/$(am__dirstamp)
3029 @rm -f erc32/run$(EXEEXT)
3030 $(AM_V_CCLD)$(LINK) $(erc32_run_OBJECTS) $(erc32_run_LDADD) $(LIBS)
3031 erc32/$(DEPDIR)/$(am__dirstamp):
3032 @$(MKDIR_P) erc32/$(DEPDIR)
3033 @: > erc32/$(DEPDIR)/$(am__dirstamp)
3034 erc32/sis.$(OBJEXT): erc32/$(am__dirstamp) \
3035 erc32/$(DEPDIR)/$(am__dirstamp)
3036
3037 @SIM_ENABLE_ARCH_erc32_FALSE@erc32/sis$(EXEEXT): $(erc32_sis_OBJECTS) $(erc32_sis_DEPENDENCIES) $(EXTRA_erc32_sis_DEPENDENCIES) erc32/$(am__dirstamp)
3038 @SIM_ENABLE_ARCH_erc32_FALSE@ @rm -f erc32/sis$(EXEEXT)
3039 @SIM_ENABLE_ARCH_erc32_FALSE@ $(AM_V_CCLD)$(LINK) $(erc32_sis_OBJECTS) $(erc32_sis_LDADD) $(LIBS)
3040
3041 example-synacor/run$(EXEEXT): $(example_synacor_run_OBJECTS) $(example_synacor_run_DEPENDENCIES) $(EXTRA_example_synacor_run_DEPENDENCIES) example-synacor/$(am__dirstamp)
3042 @rm -f example-synacor/run$(EXEEXT)
3043 $(AM_V_CCLD)$(LINK) $(example_synacor_run_OBJECTS) $(example_synacor_run_LDADD) $(LIBS)
3044
3045 frv/run$(EXEEXT): $(frv_run_OBJECTS) $(frv_run_DEPENDENCIES) $(EXTRA_frv_run_DEPENDENCIES) frv/$(am__dirstamp)
3046 @rm -f frv/run$(EXEEXT)
3047 $(AM_V_CCLD)$(LINK) $(frv_run_OBJECTS) $(frv_run_LDADD) $(LIBS)
3048
3049 ft32/run$(EXEEXT): $(ft32_run_OBJECTS) $(ft32_run_DEPENDENCIES) $(EXTRA_ft32_run_DEPENDENCIES) ft32/$(am__dirstamp)
3050 @rm -f ft32/run$(EXEEXT)
3051 $(AM_V_CCLD)$(LINK) $(ft32_run_OBJECTS) $(ft32_run_LDADD) $(LIBS)
3052
3053 h8300/run$(EXEEXT): $(h8300_run_OBJECTS) $(h8300_run_DEPENDENCIES) $(EXTRA_h8300_run_DEPENDENCIES) h8300/$(am__dirstamp)
3054 @rm -f h8300/run$(EXEEXT)
3055 $(AM_V_CCLD)$(LINK) $(h8300_run_OBJECTS) $(h8300_run_LDADD) $(LIBS)
3056
3057 igen/filter$(EXEEXT): $(igen_filter_OBJECTS) $(igen_filter_DEPENDENCIES) $(EXTRA_igen_filter_DEPENDENCIES) igen/$(am__dirstamp)
3058 @rm -f igen/filter$(EXEEXT)
3059 $(AM_V_CCLD)$(LINK) $(igen_filter_OBJECTS) $(igen_filter_LDADD) $(LIBS)
3060
3061 igen/gen$(EXEEXT): $(igen_gen_OBJECTS) $(igen_gen_DEPENDENCIES) $(EXTRA_igen_gen_DEPENDENCIES) igen/$(am__dirstamp)
3062 @rm -f igen/gen$(EXEEXT)
3063 $(AM_V_CCLD)$(LINK) $(igen_gen_OBJECTS) $(igen_gen_LDADD) $(LIBS)
3064 igen/igen.$(OBJEXT): igen/$(am__dirstamp) \
3065 igen/$(DEPDIR)/$(am__dirstamp)
3066
3067 @SIM_ENABLE_IGEN_FALSE@igen/igen$(EXEEXT): $(igen_igen_OBJECTS) $(igen_igen_DEPENDENCIES) $(EXTRA_igen_igen_DEPENDENCIES) igen/$(am__dirstamp)
3068 @SIM_ENABLE_IGEN_FALSE@ @rm -f igen/igen$(EXEEXT)
3069 @SIM_ENABLE_IGEN_FALSE@ $(AM_V_CCLD)$(LINK) $(igen_igen_OBJECTS) $(igen_igen_LDADD) $(LIBS)
3070
3071 igen/ld-cache$(EXEEXT): $(igen_ld_cache_OBJECTS) $(igen_ld_cache_DEPENDENCIES) $(EXTRA_igen_ld_cache_DEPENDENCIES) igen/$(am__dirstamp)
3072 @rm -f igen/ld-cache$(EXEEXT)
3073 $(AM_V_CCLD)$(LINK) $(igen_ld_cache_OBJECTS) $(igen_ld_cache_LDADD) $(LIBS)
3074
3075 igen/ld-decode$(EXEEXT): $(igen_ld_decode_OBJECTS) $(igen_ld_decode_DEPENDENCIES) $(EXTRA_igen_ld_decode_DEPENDENCIES) igen/$(am__dirstamp)
3076 @rm -f igen/ld-decode$(EXEEXT)
3077 $(AM_V_CCLD)$(LINK) $(igen_ld_decode_OBJECTS) $(igen_ld_decode_LDADD) $(LIBS)
3078
3079 igen/ld-insn$(EXEEXT): $(igen_ld_insn_OBJECTS) $(igen_ld_insn_DEPENDENCIES) $(EXTRA_igen_ld_insn_DEPENDENCIES) igen/$(am__dirstamp)
3080 @rm -f igen/ld-insn$(EXEEXT)
3081 $(AM_V_CCLD)$(LINK) $(igen_ld_insn_OBJECTS) $(igen_ld_insn_LDADD) $(LIBS)
3082
3083 igen/table$(EXEEXT): $(igen_table_OBJECTS) $(igen_table_DEPENDENCIES) $(EXTRA_igen_table_DEPENDENCIES) igen/$(am__dirstamp)
3084 @rm -f igen/table$(EXEEXT)
3085 $(AM_V_CCLD)$(LINK) $(igen_table_OBJECTS) $(igen_table_LDADD) $(LIBS)
3086
3087 iq2000/run$(EXEEXT): $(iq2000_run_OBJECTS) $(iq2000_run_DEPENDENCIES) $(EXTRA_iq2000_run_DEPENDENCIES) iq2000/$(am__dirstamp)
3088 @rm -f iq2000/run$(EXEEXT)
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3412 if test -f "$$p"; then d=; else d="$(srcdir)/"; fi; \
3413 echo "$$d$$p"; \
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3415 while read files; do \
3416 echo " $(INSTALL_DATA) $$files '$(DESTDIR)$(dtbdir)'"; \
3417 $(INSTALL_DATA) $$files "$(DESTDIR)$(dtbdir)" || exit $$?; \
3418 done
3419
3420 uninstall-dtbDATA:
3421 @$(NORMAL_UNINSTALL)
3422 @list='$(dtb_DATA)'; test -n "$(dtbdir)" || list=; \
3423 files=`for p in $$list; do echo $$p; done | sed -e 's|^.*/||'`; \
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3425 install-erc32docDATA: $(erc32doc_DATA)
3426 @$(NORMAL_INSTALL)
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3430 $(MKDIR_P) "$(DESTDIR)$(erc32docdir)" || exit 1; \
3431 fi; \
3432 for p in $$list; do \
3433 if test -f "$$p"; then d=; else d="$(srcdir)/"; fi; \
3434 echo "$$d$$p"; \
3435 done | $(am__base_list) | \
3436 while read files; do \
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3438 $(INSTALL_DATA) $$files "$(DESTDIR)$(erc32docdir)" || exit $$?; \
3439 done
3440
3441 uninstall-erc32docDATA:
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3446 install-frvdocDATA: $(frvdoc_DATA)
3447 @$(NORMAL_INSTALL)
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3450 echo " $(MKDIR_P) '$(DESTDIR)$(frvdocdir)'"; \
3451 $(MKDIR_P) "$(DESTDIR)$(frvdocdir)" || exit 1; \
3452 fi; \
3453 for p in $$list; do \
3454 if test -f "$$p"; then d=; else d="$(srcdir)/"; fi; \
3455 echo "$$d$$p"; \
3456 done | $(am__base_list) | \
3457 while read files; do \
3458 echo " $(INSTALL_DATA) $$files '$(DESTDIR)$(frvdocdir)'"; \
3459 $(INSTALL_DATA) $$files "$(DESTDIR)$(frvdocdir)" || exit $$?; \
3460 done
3461
3462 uninstall-frvdocDATA:
3463 @$(NORMAL_UNINSTALL)
3464 @list='$(frvdoc_DATA)'; test -n "$(frvdocdir)" || list=; \
3465 files=`for p in $$list; do echo $$p; done | sed -e 's|^.*/||'`; \
3466 dir='$(DESTDIR)$(frvdocdir)'; $(am__uninstall_files_from_dir)
3467 install-or1kdocDATA: $(or1kdoc_DATA)
3468 @$(NORMAL_INSTALL)
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3470 if test -n "$$list"; then \
3471 echo " $(MKDIR_P) '$(DESTDIR)$(or1kdocdir)'"; \
3472 $(MKDIR_P) "$(DESTDIR)$(or1kdocdir)" || exit 1; \
3473 fi; \
3474 for p in $$list; do \
3475 if test -f "$$p"; then d=; else d="$(srcdir)/"; fi; \
3476 echo "$$d$$p"; \
3477 done | $(am__base_list) | \
3478 while read files; do \
3479 echo " $(INSTALL_DATA) $$files '$(DESTDIR)$(or1kdocdir)'"; \
3480 $(INSTALL_DATA) $$files "$(DESTDIR)$(or1kdocdir)" || exit $$?; \
3481 done
3482
3483 uninstall-or1kdocDATA:
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3485 @list='$(or1kdoc_DATA)'; test -n "$(or1kdocdir)" || list=; \
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3488 install-ppcdocDATA: $(ppcdoc_DATA)
3489 @$(NORMAL_INSTALL)
3490 @list='$(ppcdoc_DATA)'; test -n "$(ppcdocdir)" || list=; \
3491 if test -n "$$list"; then \
3492 echo " $(MKDIR_P) '$(DESTDIR)$(ppcdocdir)'"; \
3493 $(MKDIR_P) "$(DESTDIR)$(ppcdocdir)" || exit 1; \
3494 fi; \
3495 for p in $$list; do \
3496 if test -f "$$p"; then d=; else d="$(srcdir)/"; fi; \
3497 echo "$$d$$p"; \
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3499 while read files; do \
3500 echo " $(INSTALL_DATA) $$files '$(DESTDIR)$(ppcdocdir)'"; \
3501 $(INSTALL_DATA) $$files "$(DESTDIR)$(ppcdocdir)" || exit $$?; \
3502 done
3503
3504 uninstall-ppcdocDATA:
3505 @$(NORMAL_UNINSTALL)
3506 @list='$(ppcdoc_DATA)'; test -n "$(ppcdocdir)" || list=; \
3507 files=`for p in $$list; do echo $$p; done | sed -e 's|^.*/||'`; \
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3509 install-rxdocDATA: $(rxdoc_DATA)
3510 @$(NORMAL_INSTALL)
3511 @list='$(rxdoc_DATA)'; test -n "$(rxdocdir)" || list=; \
3512 if test -n "$$list"; then \
3513 echo " $(MKDIR_P) '$(DESTDIR)$(rxdocdir)'"; \
3514 $(MKDIR_P) "$(DESTDIR)$(rxdocdir)" || exit 1; \
3515 fi; \
3516 for p in $$list; do \
3517 if test -f "$$p"; then d=; else d="$(srcdir)/"; fi; \
3518 echo "$$d$$p"; \
3519 done | $(am__base_list) | \
3520 while read files; do \
3521 echo " $(INSTALL_DATA) $$files '$(DESTDIR)$(rxdocdir)'"; \
3522 $(INSTALL_DATA) $$files "$(DESTDIR)$(rxdocdir)" || exit $$?; \
3523 done
3524
3525 uninstall-rxdocDATA:
3526 @$(NORMAL_UNINSTALL)
3527 @list='$(rxdoc_DATA)'; test -n "$(rxdocdir)" || list=; \
3528 files=`for p in $$list; do echo $$p; done | sed -e 's|^.*/||'`; \
3529 dir='$(DESTDIR)$(rxdocdir)'; $(am__uninstall_files_from_dir)
3530 install-pkgincludeHEADERS: $(pkginclude_HEADERS)
3531 @$(NORMAL_INSTALL)
3532 @list='$(pkginclude_HEADERS)'; test -n "$(pkgincludedir)" || list=; \
3533 if test -n "$$list"; then \
3534 echo " $(MKDIR_P) '$(DESTDIR)$(pkgincludedir)'"; \
3535 $(MKDIR_P) "$(DESTDIR)$(pkgincludedir)" || exit 1; \
3536 fi; \
3537 for p in $$list; do \
3538 if test -f "$$p"; then d=; else d="$(srcdir)/"; fi; \
3539 echo "$$d$$p"; \
3540 done | $(am__base_list) | \
3541 while read files; do \
3542 echo " $(INSTALL_HEADER) $$files '$(DESTDIR)$(pkgincludedir)'"; \
3543 $(INSTALL_HEADER) $$files "$(DESTDIR)$(pkgincludedir)" || exit $$?; \
3544 done
3545
3546 uninstall-pkgincludeHEADERS:
3547 @$(NORMAL_UNINSTALL)
3548 @list='$(pkginclude_HEADERS)'; test -n "$(pkgincludedir)" || list=; \
3549 files=`for p in $$list; do echo $$p; done | sed -e 's|^.*/||'`; \
3550 dir='$(DESTDIR)$(pkgincludedir)'; $(am__uninstall_files_from_dir)
3551
3552 # This directory's subdirectories are mostly independent; you can cd
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3554 # To change the values of 'make' variables: instead of editing Makefiles,
3555 # (1) if the variable is set in 'config.status', edit 'config.status'
3556 # (which will cause the Makefiles to be regenerated when you run 'make');
3557 # (2) otherwise, pass the desired values on the 'make' command line.
3558 $(am__recursive_targets):
3559 @fail=; \
3560 if $(am__make_keepgoing); then \
3561 failcom='fail=yes'; \
3562 else \
3563 failcom='exit 1'; \
3564 fi; \
3565 dot_seen=no; \
3566 target=`echo $@ | sed s/-recursive//`; \
3567 case "$@" in \
3568 distclean-* | maintainer-clean-*) list='$(DIST_SUBDIRS)' ;; \
3569 *) list='$(SUBDIRS)' ;; \
3570 esac; \
3571 for subdir in $$list; do \
3572 echo "Making $$target in $$subdir"; \
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3574 dot_seen=yes; \
3575 local_target="$$target-am"; \
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3579 ($(am__cd) $$subdir && $(MAKE) $(AM_MAKEFLAGS) $$local_target) \
3580 || eval $$failcom; \
3581 done; \
3582 if test "$$dot_seen" = "no"; then \
3583 $(MAKE) $(AM_MAKEFLAGS) "$$target-am" || exit 1; \
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3585
3586 ID: $(am__tagged_files)
3587 $(am__define_uniq_tagged_files); mkid -fID $$unique
3588 tags: tags-recursive
3589 TAGS: tags
3590
3591 tags-am: $(TAGS_DEPENDENCIES) $(am__tagged_files)
3592 set x; \
3593 here=`pwd`; \
3594 if ($(ETAGS) --etags-include --version) >/dev/null 2>&1; then \
3595 include_option=--etags-include; \
3596 empty_fix=.; \
3597 else \
3598 include_option=--include; \
3599 empty_fix=; \
3600 fi; \
3601 list='$(SUBDIRS)'; for subdir in $$list; do \
3602 if test "$$subdir" = .; then :; else \
3603 test ! -f $$subdir/TAGS || \
3604 set "$$@" "$$include_option=$$here/$$subdir/TAGS"; \
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3607 $(am__define_uniq_tagged_files); \
3608 shift; \
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3610 test -n "$$unique" || unique=$$empty_fix; \
3611 if test $$# -gt 0; then \
3612 $(ETAGS) $(ETAGSFLAGS) $(AM_ETAGSFLAGS) $(ETAGS_ARGS) \
3613 "$$@" $$unique; \
3614 else \
3615 $(ETAGS) $(ETAGSFLAGS) $(AM_ETAGSFLAGS) $(ETAGS_ARGS) \
3616 $$unique; \
3617 fi; \
3618 fi
3619 ctags: ctags-recursive
3620
3621 CTAGS: ctags
3622 ctags-am: $(TAGS_DEPENDENCIES) $(am__tagged_files)
3623 $(am__define_uniq_tagged_files); \
3624 test -z "$(CTAGS_ARGS)$$unique" \
3625 || $(CTAGS) $(CTAGSFLAGS) $(AM_CTAGSFLAGS) $(CTAGS_ARGS) \
3626 $$unique
3627
3628 GTAGS:
3629 here=`$(am__cd) $(top_builddir) && pwd` \
3630 && $(am__cd) $(top_srcdir) \
3631 && gtags -i $(GTAGS_ARGS) "$$here"
3632 cscope: cscope.files
3633 test ! -s cscope.files \
3634 || $(CSCOPE) -b -q $(AM_CSCOPEFLAGS) $(CSCOPEFLAGS) -i cscope.files $(CSCOPE_ARGS)
3635 clean-cscope:
3636 -rm -f cscope.files
3637 cscope.files: clean-cscope cscopelist
3638 cscopelist: cscopelist-recursive
3639
3640 cscopelist-am: $(am__tagged_files)
3641 list='$(am__tagged_files)'; \
3642 case "$(srcdir)" in \
3643 [\\/]* | ?:[\\/]*) sdir="$(srcdir)" ;; \
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3646 for i in $$list; do \
3647 if test -f "$$i"; then \
3648 echo "$(subdir)/$$i"; \
3649 else \
3650 echo "$$sdir/$$i"; \
3651 fi; \
3652 done >> $(top_builddir)/cscope.files
3653
3654 distclean-tags:
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3656 -rm -f cscope.out cscope.in.out cscope.po.out cscope.files
3657 site.exp: Makefile $(EXTRA_DEJAGNU_SITE_CONFIG)
3658 @echo 'Making a new site.exp file ...'
3659 @echo '## these variables are automatically generated by make ##' >site.tmp
3660 @echo '# Do not edit here. If you wish to override these values' >>site.tmp
3661 @echo '# edit the last section' >>site.tmp
3662 @echo 'set srcdir "$(srcdir)"' >>site.tmp
3663 @echo "set objdir `pwd`" >>site.tmp
3664 @echo 'set build_alias "$(build_alias)"' >>site.tmp
3665 @echo 'set build_triplet $(build_triplet)' >>site.tmp
3666 @echo 'set host_alias "$(host_alias)"' >>site.tmp
3667 @echo 'set host_triplet $(host_triplet)' >>site.tmp
3668 @echo 'set target_alias "$(target_alias)"' >>site.tmp
3669 @echo 'set target_triplet $(target_triplet)' >>site.tmp
3670 @list='$(EXTRA_DEJAGNU_SITE_CONFIG)'; for f in $$list; do \
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3674 || exit 1; \
3675 done >> site.tmp
3676 @echo "## End of auto-generated content; you can edit from here. ##" >> site.tmp
3677 @if test -f site.exp; then \
3678 sed -e '1,/^## End of auto-generated content.*##/d' site.exp >> site.tmp; \
3679 fi
3680 @-rm -f site.bak
3681 @test ! -f site.exp || mv site.exp site.bak
3682 @mv site.tmp site.exp
3683
3684 distclean-DEJAGNU:
3685 -rm -f site.exp site.bak
3686 -l='$(DEJATOOL)'; for tool in $$l; do \
3687 rm -f $$tool.sum $$tool.log; \
3688 done
3689
3690 # Recover from deleted '.trs' file; this should ensure that
3691 # "rm -f foo.log; make foo.trs" re-run 'foo.test', and re-create
3692 # both 'foo.log' and 'foo.trs'. Break the recipe in two subshells
3693 # to avoid problems with "make -n".
3694 .log.trs:
3695 rm -f $< $@
3696 $(MAKE) $(AM_MAKEFLAGS) $<
3697
3698 # Leading 'am--fnord' is there to ensure the list of targets does not
3699 # expand to empty, as could happen e.g. with make check TESTS=''.
3700 am--fnord $(TEST_LOGS) $(TEST_LOGS:.log=.trs): $(am__force_recheck)
3701 am--force-recheck:
3702 @:
3703
3704 $(TEST_SUITE_LOG): $(TEST_LOGS)
3705 @$(am__set_TESTS_bases); \
3706 am__f_ok () { test -f "$$1" && test -r "$$1"; }; \
3707 redo_bases=`for i in $$bases; do \
3708 am__f_ok $$i.trs && am__f_ok $$i.log || echo $$i; \
3709 done`; \
3710 if test -n "$$redo_bases"; then \
3711 redo_logs=`for i in $$redo_bases; do echo $$i.log; done`; \
3712 redo_results=`for i in $$redo_bases; do echo $$i.trs; done`; \
3713 if $(am__make_dryrun); then :; else \
3714 rm -f $$redo_logs && rm -f $$redo_results || exit 1; \
3715 fi; \
3716 fi; \
3717 if test -n "$$am__remaking_logs"; then \
3718 echo "fatal: making $(TEST_SUITE_LOG): possible infinite" \
3719 "recursion detected" >&2; \
3720 elif test -n "$$redo_logs"; then \
3721 am__remaking_logs=yes $(MAKE) $(AM_MAKEFLAGS) $$redo_logs; \
3722 fi; \
3723 if $(am__make_dryrun); then :; else \
3724 st=0; \
3725 errmsg="fatal: making $(TEST_SUITE_LOG): failed to create"; \
3726 for i in $$redo_bases; do \
3727 test -f $$i.trs && test -r $$i.trs \
3728 || { echo "$$errmsg $$i.trs" >&2; st=1; }; \
3729 test -f $$i.log && test -r $$i.log \
3730 || { echo "$$errmsg $$i.log" >&2; st=1; }; \
3731 done; \
3732 test $$st -eq 0 || exit 1; \
3733 fi
3734 @$(am__sh_e_setup); $(am__tty_colors); $(am__set_TESTS_bases); \
3735 ws='[ ]'; \
3736 results=`for b in $$bases; do echo $$b.trs; done`; \
3737 test -n "$$results" || results=/dev/null; \
3738 all=` grep "^$$ws*:test-result:" $$results | wc -l`; \
3739 pass=` grep "^$$ws*:test-result:$$ws*PASS" $$results | wc -l`; \
3740 fail=` grep "^$$ws*:test-result:$$ws*FAIL" $$results | wc -l`; \
3741 skip=` grep "^$$ws*:test-result:$$ws*SKIP" $$results | wc -l`; \
3742 xfail=`grep "^$$ws*:test-result:$$ws*XFAIL" $$results | wc -l`; \
3743 xpass=`grep "^$$ws*:test-result:$$ws*XPASS" $$results | wc -l`; \
3744 error=`grep "^$$ws*:test-result:$$ws*ERROR" $$results | wc -l`; \
3745 if test `expr $$fail + $$xpass + $$error` -eq 0; then \
3746 success=true; \
3747 else \
3748 success=false; \
3749 fi; \
3750 br='==================='; br=$$br$$br$$br$$br; \
3751 result_count () \
3752 { \
3753 if test x"$$1" = x"--maybe-color"; then \
3754 maybe_colorize=yes; \
3755 elif test x"$$1" = x"--no-color"; then \
3756 maybe_colorize=no; \
3757 else \
3758 echo "$@: invalid 'result_count' usage" >&2; exit 4; \
3759 fi; \
3760 shift; \
3761 desc=$$1 count=$$2; \
3762 if test $$maybe_colorize = yes && test $$count -gt 0; then \
3763 color_start=$$3 color_end=$$std; \
3764 else \
3765 color_start= color_end=; \
3766 fi; \
3767 echo "$${color_start}# $$desc $$count$${color_end}"; \
3768 }; \
3769 create_testsuite_report () \
3770 { \
3771 result_count $$1 "TOTAL:" $$all "$$brg"; \
3772 result_count $$1 "PASS: " $$pass "$$grn"; \
3773 result_count $$1 "SKIP: " $$skip "$$blu"; \
3774 result_count $$1 "XFAIL:" $$xfail "$$lgn"; \
3775 result_count $$1 "FAIL: " $$fail "$$red"; \
3776 result_count $$1 "XPASS:" $$xpass "$$red"; \
3777 result_count $$1 "ERROR:" $$error "$$mgn"; \
3778 }; \
3779 { \
3780 echo "$(PACKAGE_STRING): $(subdir)/$(TEST_SUITE_LOG)" | \
3781 $(am__rst_title); \
3782 create_testsuite_report --no-color; \
3783 echo; \
3784 echo ".. contents:: :depth: 2"; \
3785 echo; \
3786 for b in $$bases; do echo $$b; done \
3787 | $(am__create_global_log); \
3788 } >$(TEST_SUITE_LOG).tmp || exit 1; \
3789 mv $(TEST_SUITE_LOG).tmp $(TEST_SUITE_LOG); \
3790 if $$success; then \
3791 col="$$grn"; \
3792 else \
3793 col="$$red"; \
3794 test x"$$VERBOSE" = x || cat $(TEST_SUITE_LOG); \
3795 fi; \
3796 echo "$${col}$$br$${std}"; \
3797 echo "$${col}Testsuite summary for $(PACKAGE_STRING)$${std}"; \
3798 echo "$${col}$$br$${std}"; \
3799 create_testsuite_report --maybe-color; \
3800 echo "$$col$$br$$std"; \
3801 if $$success; then :; else \
3802 echo "$${col}See $(subdir)/$(TEST_SUITE_LOG)$${std}"; \
3803 if test -n "$(PACKAGE_BUGREPORT)"; then \
3804 echo "$${col}Please report to $(PACKAGE_BUGREPORT)$${std}"; \
3805 fi; \
3806 echo "$$col$$br$$std"; \
3807 fi; \
3808 $$success || exit 1
3809
3810 check-TESTS:
3811 @list='$(RECHECK_LOGS)'; test -z "$$list" || rm -f $$list
3812 @list='$(RECHECK_LOGS:.log=.trs)'; test -z "$$list" || rm -f $$list
3813 @test -z "$(TEST_SUITE_LOG)" || rm -f $(TEST_SUITE_LOG)
3814 @set +e; $(am__set_TESTS_bases); \
3815 log_list=`for i in $$bases; do echo $$i.log; done`; \
3816 trs_list=`for i in $$bases; do echo $$i.trs; done`; \
3817 log_list=`echo $$log_list`; trs_list=`echo $$trs_list`; \
3818 $(MAKE) $(AM_MAKEFLAGS) $(TEST_SUITE_LOG) TEST_LOGS="$$log_list"; \
3819 exit $$?;
3820 recheck: all $(check_PROGRAMS)
3821 @test -z "$(TEST_SUITE_LOG)" || rm -f $(TEST_SUITE_LOG)
3822 @set +e; $(am__set_TESTS_bases); \
3823 bases=`for i in $$bases; do echo $$i; done \
3824 | $(am__list_recheck_tests)` || exit 1; \
3825 log_list=`for i in $$bases; do echo $$i.log; done`; \
3826 log_list=`echo $$log_list`; \
3827 $(MAKE) $(AM_MAKEFLAGS) $(TEST_SUITE_LOG) \
3828 am__force_recheck=am--force-recheck \
3829 TEST_LOGS="$$log_list"; \
3830 exit $$?
3831 testsuite/common/bits32m0.log: testsuite/common/bits32m0$(EXEEXT)
3832 @p='testsuite/common/bits32m0$(EXEEXT)'; \
3833 b='testsuite/common/bits32m0'; \
3834 $(am__check_pre) $(LOG_DRIVER) --test-name "$$f" \
3835 --log-file $$b.log --trs-file $$b.trs \
3836 $(am__common_driver_flags) $(AM_LOG_DRIVER_FLAGS) $(LOG_DRIVER_FLAGS) -- $(LOG_COMPILE) \
3837 "$$tst" $(AM_TESTS_FD_REDIRECT)
3838 testsuite/common/bits32m31.log: testsuite/common/bits32m31$(EXEEXT)
3839 @p='testsuite/common/bits32m31$(EXEEXT)'; \
3840 b='testsuite/common/bits32m31'; \
3841 $(am__check_pre) $(LOG_DRIVER) --test-name "$$f" \
3842 --log-file $$b.log --trs-file $$b.trs \
3843 $(am__common_driver_flags) $(AM_LOG_DRIVER_FLAGS) $(LOG_DRIVER_FLAGS) -- $(LOG_COMPILE) \
3844 "$$tst" $(AM_TESTS_FD_REDIRECT)
3845 testsuite/common/bits64m0.log: testsuite/common/bits64m0$(EXEEXT)
3846 @p='testsuite/common/bits64m0$(EXEEXT)'; \
3847 b='testsuite/common/bits64m0'; \
3848 $(am__check_pre) $(LOG_DRIVER) --test-name "$$f" \
3849 --log-file $$b.log --trs-file $$b.trs \
3850 $(am__common_driver_flags) $(AM_LOG_DRIVER_FLAGS) $(LOG_DRIVER_FLAGS) -- $(LOG_COMPILE) \
3851 "$$tst" $(AM_TESTS_FD_REDIRECT)
3852 testsuite/common/bits64m63.log: testsuite/common/bits64m63$(EXEEXT)
3853 @p='testsuite/common/bits64m63$(EXEEXT)'; \
3854 b='testsuite/common/bits64m63'; \
3855 $(am__check_pre) $(LOG_DRIVER) --test-name "$$f" \
3856 --log-file $$b.log --trs-file $$b.trs \
3857 $(am__common_driver_flags) $(AM_LOG_DRIVER_FLAGS) $(LOG_DRIVER_FLAGS) -- $(LOG_COMPILE) \
3858 "$$tst" $(AM_TESTS_FD_REDIRECT)
3859 testsuite/common/alu-tst.log: testsuite/common/alu-tst$(EXEEXT)
3860 @p='testsuite/common/alu-tst$(EXEEXT)'; \
3861 b='testsuite/common/alu-tst'; \
3862 $(am__check_pre) $(LOG_DRIVER) --test-name "$$f" \
3863 --log-file $$b.log --trs-file $$b.trs \
3864 $(am__common_driver_flags) $(AM_LOG_DRIVER_FLAGS) $(LOG_DRIVER_FLAGS) -- $(LOG_COMPILE) \
3865 "$$tst" $(AM_TESTS_FD_REDIRECT)
3866 .test.log:
3867 @p='$<'; \
3868 $(am__set_b); \
3869 $(am__check_pre) $(TEST_LOG_DRIVER) --test-name "$$f" \
3870 --log-file $$b.log --trs-file $$b.trs \
3871 $(am__common_driver_flags) $(AM_TEST_LOG_DRIVER_FLAGS) $(TEST_LOG_DRIVER_FLAGS) -- $(TEST_LOG_COMPILE) \
3872 "$$tst" $(AM_TESTS_FD_REDIRECT)
3873 @am__EXEEXT_TRUE@.test$(EXEEXT).log:
3874 @am__EXEEXT_TRUE@ @p='$<'; \
3875 @am__EXEEXT_TRUE@ $(am__set_b); \
3876 @am__EXEEXT_TRUE@ $(am__check_pre) $(TEST_LOG_DRIVER) --test-name "$$f" \
3877 @am__EXEEXT_TRUE@ --log-file $$b.log --trs-file $$b.trs \
3878 @am__EXEEXT_TRUE@ $(am__common_driver_flags) $(AM_TEST_LOG_DRIVER_FLAGS) $(TEST_LOG_DRIVER_FLAGS) -- $(TEST_LOG_COMPILE) \
3879 @am__EXEEXT_TRUE@ "$$tst" $(AM_TESTS_FD_REDIRECT)
3880 check-am: all-am
3881 $(MAKE) $(AM_MAKEFLAGS) $(check_PROGRAMS)
3882 $(MAKE) $(AM_MAKEFLAGS) check-DEJAGNU check-TESTS
3883 check: $(BUILT_SOURCES)
3884 $(MAKE) $(AM_MAKEFLAGS) check-recursive
3885 all-am: Makefile $(LIBRARIES) $(PROGRAMS) $(DATA) $(HEADERS) config.h
3886 installdirs: installdirs-recursive
3887 installdirs-am:
3888 for dir in "$(DESTDIR)$(armdocdir)" "$(DESTDIR)$(dtbdir)" "$(DESTDIR)$(erc32docdir)" "$(DESTDIR)$(frvdocdir)" "$(DESTDIR)$(or1kdocdir)" "$(DESTDIR)$(ppcdocdir)" "$(DESTDIR)$(rxdocdir)" "$(DESTDIR)$(pkgincludedir)"; do \
3889 test -z "$$dir" || $(MKDIR_P) "$$dir"; \
3890 done
3891 install: $(BUILT_SOURCES)
3892 $(MAKE) $(AM_MAKEFLAGS) install-recursive
3893 install-exec: install-exec-recursive
3894 install-data: install-data-recursive
3895 uninstall: uninstall-recursive
3896
3897 install-am: all-am
3898 @$(MAKE) $(AM_MAKEFLAGS) install-exec-am install-data-am
3899
3900 installcheck: installcheck-recursive
3901 install-strip:
3902 if test -z '$(STRIP)'; then \
3903 $(MAKE) $(AM_MAKEFLAGS) INSTALL_PROGRAM="$(INSTALL_STRIP_PROGRAM)" \
3904 install_sh_PROGRAM="$(INSTALL_STRIP_PROGRAM)" INSTALL_STRIP_FLAG=-s \
3905 install; \
3906 else \
3907 $(MAKE) $(AM_MAKEFLAGS) INSTALL_PROGRAM="$(INSTALL_STRIP_PROGRAM)" \
3908 install_sh_PROGRAM="$(INSTALL_STRIP_PROGRAM)" INSTALL_STRIP_FLAG=-s \
3909 "INSTALL_PROGRAM_ENV=STRIPPROG='$(STRIP)'" install; \
3910 fi
3911 mostlyclean-generic:
3912 -test -z "$(MOSTLYCLEANFILES)" || rm -f $(MOSTLYCLEANFILES)
3913 -test -z "$(TEST_LOGS)" || rm -f $(TEST_LOGS)
3914 -test -z "$(TEST_LOGS:.log=.trs)" || rm -f $(TEST_LOGS:.log=.trs)
3915 -test -z "$(TEST_SUITE_LOG)" || rm -f $(TEST_SUITE_LOG)
3916
3917 clean-generic:
3918 -test -z "$(CLEANFILES)" || rm -f $(CLEANFILES)
3919
3920 distclean-generic:
3921 -test -z "$(CONFIG_CLEAN_FILES)" || rm -f $(CONFIG_CLEAN_FILES)
3922 -test . = "$(srcdir)" || test -z "$(CONFIG_CLEAN_VPATH_FILES)" || rm -f $(CONFIG_CLEAN_VPATH_FILES)
3923 -rm -f aarch64/$(am__dirstamp)
3924 -rm -f arm/$(am__dirstamp)
3925 -rm -f avr/$(am__dirstamp)
3926 -rm -f bfin/$(am__dirstamp)
3927 -rm -f bpf/$(am__dirstamp)
3928 -rm -f common/$(DEPDIR)/$(am__dirstamp)
3929 -rm -f common/$(am__dirstamp)
3930 -rm -f cr16/$(DEPDIR)/$(am__dirstamp)
3931 -rm -f cr16/$(am__dirstamp)
3932 -rm -f cris/$(DEPDIR)/$(am__dirstamp)
3933 -rm -f cris/$(am__dirstamp)
3934 -rm -f d10v/$(DEPDIR)/$(am__dirstamp)
3935 -rm -f d10v/$(am__dirstamp)
3936 -rm -f erc32/$(DEPDIR)/$(am__dirstamp)
3937 -rm -f erc32/$(am__dirstamp)
3938 -rm -f example-synacor/$(am__dirstamp)
3939 -rm -f frv/$(am__dirstamp)
3940 -rm -f ft32/$(am__dirstamp)
3941 -rm -f h8300/$(am__dirstamp)
3942 -rm -f igen/$(DEPDIR)/$(am__dirstamp)
3943 -rm -f igen/$(am__dirstamp)
3944 -rm -f iq2000/$(am__dirstamp)
3945 -rm -f lm32/$(am__dirstamp)
3946 -rm -f m32c/$(DEPDIR)/$(am__dirstamp)
3947 -rm -f m32c/$(am__dirstamp)
3948 -rm -f m32r/$(am__dirstamp)
3949 -rm -f m68hc11/$(DEPDIR)/$(am__dirstamp)
3950 -rm -f m68hc11/$(am__dirstamp)
3951 -rm -f mcore/$(am__dirstamp)
3952 -rm -f microblaze/$(am__dirstamp)
3953 -rm -f mips/$(am__dirstamp)
3954 -rm -f mn10300/$(am__dirstamp)
3955 -rm -f moxie/$(am__dirstamp)
3956 -rm -f msp430/$(am__dirstamp)
3957 -rm -f or1k/$(am__dirstamp)
3958 -rm -f ppc/$(DEPDIR)/$(am__dirstamp)
3959 -rm -f ppc/$(am__dirstamp)
3960 -rm -f pru/$(am__dirstamp)
3961 -rm -f riscv/$(am__dirstamp)
3962 -rm -f rl78/$(am__dirstamp)
3963 -rm -f rx/$(am__dirstamp)
3964 -rm -f sh/$(DEPDIR)/$(am__dirstamp)
3965 -rm -f sh/$(am__dirstamp)
3966 -rm -f testsuite/common/$(DEPDIR)/$(am__dirstamp)
3967 -rm -f testsuite/common/$(am__dirstamp)
3968 -rm -f v850/$(am__dirstamp)
3969 -test -z "$(DISTCLEANFILES)" || rm -f $(DISTCLEANFILES)
3970
3971 maintainer-clean-generic:
3972 @echo "This command is intended for maintainers to use"
3973 @echo "it deletes files that may require special tools to rebuild."
3974 -test -z "$(BUILT_SOURCES)" || rm -f $(BUILT_SOURCES)
3975 clean: clean-recursive
3976
3977 clean-am: clean-checkPROGRAMS clean-generic clean-libtool \
3978 clean-noinstLIBRARIES clean-noinstPROGRAMS mostlyclean-am
3979
3980 distclean: distclean-recursive
3981 -rm -f $(am__CONFIG_DISTCLEAN_FILES)
3982 -rm -rf common/$(DEPDIR) cr16/$(DEPDIR) cris/$(DEPDIR) d10v/$(DEPDIR) erc32/$(DEPDIR) igen/$(DEPDIR) m32c/$(DEPDIR) m68hc11/$(DEPDIR) ppc/$(DEPDIR) sh/$(DEPDIR) testsuite/common/$(DEPDIR)
3983 -rm -f Makefile
3984 distclean-am: clean-am distclean-DEJAGNU distclean-compile \
3985 distclean-generic distclean-hdr distclean-libtool \
3986 distclean-tags
3987
3988 dvi: dvi-recursive
3989
3990 dvi-am:
3991
3992 html: html-recursive
3993
3994 html-am:
3995
3996 info: info-recursive
3997
3998 info-am:
3999
4000 install-data-am: install-armdocDATA install-data-local install-dtbDATA \
4001 install-erc32docDATA install-frvdocDATA install-or1kdocDATA \
4002 install-pkgincludeHEADERS install-ppcdocDATA install-rxdocDATA
4003
4004 install-dvi: install-dvi-recursive
4005
4006 install-dvi-am:
4007
4008 install-exec-am: install-exec-local
4009
4010 install-html: install-html-recursive
4011
4012 install-html-am:
4013
4014 install-info: install-info-recursive
4015
4016 install-info-am:
4017
4018 install-man:
4019
4020 install-pdf: install-pdf-recursive
4021
4022 install-pdf-am:
4023
4024 install-ps: install-ps-recursive
4025
4026 install-ps-am:
4027
4028 installcheck-am:
4029
4030 maintainer-clean: maintainer-clean-recursive
4031 -rm -f $(am__CONFIG_DISTCLEAN_FILES)
4032 -rm -rf $(top_srcdir)/autom4te.cache
4033 -rm -rf common/$(DEPDIR) cr16/$(DEPDIR) cris/$(DEPDIR) d10v/$(DEPDIR) erc32/$(DEPDIR) igen/$(DEPDIR) m32c/$(DEPDIR) m68hc11/$(DEPDIR) ppc/$(DEPDIR) sh/$(DEPDIR) testsuite/common/$(DEPDIR)
4034 -rm -f Makefile
4035 maintainer-clean-am: distclean-am maintainer-clean-generic
4036
4037 mostlyclean: mostlyclean-recursive
4038
4039 mostlyclean-am: mostlyclean-compile mostlyclean-generic \
4040 mostlyclean-libtool
4041
4042 pdf: pdf-recursive
4043
4044 pdf-am:
4045
4046 ps: ps-recursive
4047
4048 ps-am:
4049
4050 uninstall-am: uninstall-armdocDATA uninstall-dtbDATA \
4051 uninstall-erc32docDATA uninstall-frvdocDATA uninstall-local \
4052 uninstall-or1kdocDATA uninstall-pkgincludeHEADERS \
4053 uninstall-ppcdocDATA uninstall-rxdocDATA
4054
4055 .MAKE: $(am__recursive_targets) all check check-am install install-am \
4056 install-strip
4057
4058 .PHONY: $(am__recursive_targets) CTAGS GTAGS TAGS all all-am \
4059 am--refresh check check-DEJAGNU check-TESTS check-am clean \
4060 clean-checkPROGRAMS clean-cscope clean-generic clean-libtool \
4061 clean-noinstLIBRARIES clean-noinstPROGRAMS cscope \
4062 cscopelist-am ctags ctags-am distclean distclean-DEJAGNU \
4063 distclean-compile distclean-generic distclean-hdr \
4064 distclean-libtool distclean-tags dvi dvi-am html html-am info \
4065 info-am install install-am install-armdocDATA install-data \
4066 install-data-am install-data-local install-dtbDATA install-dvi \
4067 install-dvi-am install-erc32docDATA install-exec \
4068 install-exec-am install-exec-local install-frvdocDATA \
4069 install-html install-html-am install-info install-info-am \
4070 install-man install-or1kdocDATA install-pdf install-pdf-am \
4071 install-pkgincludeHEADERS install-ppcdocDATA install-ps \
4072 install-ps-am install-rxdocDATA install-strip installcheck \
4073 installcheck-am installdirs installdirs-am maintainer-clean \
4074 maintainer-clean-generic mostlyclean mostlyclean-compile \
4075 mostlyclean-generic mostlyclean-libtool pdf pdf-am ps ps-am \
4076 recheck tags tags-am uninstall uninstall-am \
4077 uninstall-armdocDATA uninstall-dtbDATA uninstall-erc32docDATA \
4078 uninstall-frvdocDATA uninstall-local uninstall-or1kdocDATA \
4079 uninstall-pkgincludeHEADERS uninstall-ppcdocDATA \
4080 uninstall-rxdocDATA
4081
4082 .PRECIOUS: Makefile
4083
4084 @am__include@ @am__quote@$(GNULIB_PARENT_DIR)/gnulib/Makefile.gnulib.inc@am__quote@
4085
4086 # Generate target constants for newlib/libgloss from its source tree.
4087 # This file is shipped with distributions so we build in the source dir.
4088 # Use `make nltvals' to rebuild.
4089 .PHONY: nltvals
4090 nltvals:
4091 $(srccom)/gennltvals.py --cpp "$(CPP)"
4092
4093 common/version.c: common/version.c-stamp ; @true
4094 common/version.c-stamp: $(srcroot)/gdb/version.in $(srcroot)/bfd/version.h $(srcdir)/common/create-version.sh
4095 $(AM_V_GEN)$(SHELL) $(srcdir)/common/create-version.sh $(srcroot)/gdb $@.tmp
4096 $(AM_V_at)$(SHELL) $(srcroot)/move-if-change $@.tmp $(@:-stamp=)
4097 $(AM_V_at)touch $@
4098
4099 # FIXME This is one very simple-minded way of generating the file hw-config.h.
4100 %/hw-config.h: %/stamp-hw ; @true
4101 %/stamp-hw: Makefile
4102 $(AM_V_GEN)set -e; \
4103 ( \
4104 sim_hw="$(SIM_HW_DEVICES) $($(@D)_SIM_EXTRA_HW_DEVICES)" ; \
4105 echo "/* generated by Makefile */" ; \
4106 printf "extern const struct hw_descriptor dv_%s_descriptor[];\n" $$sim_hw ; \
4107 echo "const struct hw_descriptor * const hw_descriptors[] = {" ; \
4108 printf " dv_%s_descriptor,\n" $$sim_hw ; \
4109 echo " NULL," ; \
4110 echo "};" \
4111 ) > $@.tmp; \
4112 $(SHELL) $(srcroot)/move-if-change $@.tmp $(@D)/hw-config.h; \
4113 touch $@
4114 .PRECIOUS: %/stamp-hw
4115 %/modules.c:
4116 $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) GEN_MODULES_C_SRCS="$(GEN_MODULES_C_SRCS)" -C $(@D) $(@F)
4117
4118 # Alias for developers.
4119 @SIM_ENABLE_IGEN_TRUE@igen: $(IGEN)
4120
4121 # These rules are copied from automake, but tweaked to use FOR_BUILD variables.
4122 @SIM_ENABLE_IGEN_TRUE@igen/libigen.a: $(igen_libigen_a_OBJECTS) $(igen_libigen_a_DEPENDENCIES) $(EXTRA_igen_libigen_a_DEPENDENCIES) igen/$(am__dirstamp)
4123 @SIM_ENABLE_IGEN_TRUE@ $(AM_V_at)-rm -f $@
4124 @SIM_ENABLE_IGEN_TRUE@ $(AM_V_AR)$(AR_FOR_BUILD) $(ARFLAGS) $@ $(igen_libigen_a_OBJECTS) $(igen_libigen_a_LIBADD)
4125 @SIM_ENABLE_IGEN_TRUE@ $(AM_V_at)$(RANLIB_FOR_BUILD) $@
4126
4127 @SIM_ENABLE_IGEN_TRUE@igen/igen$(EXEEXT): $(igen_igen_OBJECTS) $(igen_igen_DEPENDENCIES) igen/$(am__dirstamp)
4128 @SIM_ENABLE_IGEN_TRUE@ $(AM_V_CCLD)$(LINK_FOR_BUILD) $(igen_igen_OBJECTS) $(igen_igen_LDADD)
4129
4130 # igen is a build-time only tool. Override the default rules for it.
4131 @SIM_ENABLE_IGEN_TRUE@igen/%.o: igen/%.c
4132 @SIM_ENABLE_IGEN_TRUE@ $(AM_V_CC)$(COMPILE_FOR_BUILD) -c $< -o $@
4133
4134 # Build some of the files in standalone mode for developers of igen itself.
4135 @SIM_ENABLE_IGEN_TRUE@igen/%-main.o: igen/%.c
4136 @SIM_ENABLE_IGEN_TRUE@ $(AM_V_CC)$(COMPILE_FOR_BUILD) -DMAIN -c $< -o $@
4137
4138 site-sim-config.exp: Makefile
4139 $(AM_V_GEN)( \
4140 echo "set SIM_PRIMARY_TARGET \"$(SIM_PRIMARY_TARGET)\""; \
4141 echo "set builddir \"$(builddir)\""; \
4142 echo "set srcdir \"$(srcdir)/testsuite\""; \
4143 $(foreach V,$(SIM_TOOLCHAIN_VARS),echo "set $(V) \"$($(V))\"";) \
4144 ) > $@
4145
4146 # Ignore dirs that only contain configuration settings.
4147 check/./config/%.exp: ; @true
4148 check/config/%.exp: ; @true
4149 check/./lib/%.exp: ; @true
4150 check/lib/%.exp: ; @true
4151
4152 check/%.exp:
4153 $(AM_V_at)mkdir -p testsuite/$*
4154 $(AM_V_RUNTEST)$(DO_RUNTEST) --objdir testsuite/$* --outdir testsuite/$* $*.exp
4155
4156 check-DEJAGNU-parallel:
4157 $(AM_V_at)( \
4158 set -- `cd $(srcdir)/testsuite && find . -name '*.exp' -printf '%P\n' | sed 's:[.]exp$$::'`; \
4159 $(MAKE) -k `printf 'check/%s.exp ' $$@`; \
4160 ret=$$?; \
4161 set -- `printf 'testsuite/%s/ ' $$@`; \
4162 $(SHELL) $(srcroot)/contrib/dg-extract-results.sh \
4163 `find $$@ -maxdepth 1 -name testrun.sum 2>/dev/null | sort` > testrun.sum; \
4164 $(SHELL) $(srcroot)/contrib/dg-extract-results.sh -L \
4165 `find $$@ -maxdepth 1 -name testrun.log 2>/dev/null | sort` > testrun.log; \
4166 echo; \
4167 $(SED) -n '/^.*===.*Summary.*===/,$$p' testrun.sum; \
4168 exit $$ret)
4169
4170 check-DEJAGNU-single:
4171 $(AM_V_RUNTEST)$(DO_RUNTEST)
4172
4173 # If running a single job, invoking runtest once is faster & has nicer output.
4174 check-DEJAGNU: site.exp
4175 $(AM_V_at)(set -e; \
4176 EXPECT=${EXPECT} ; export EXPECT ; \
4177 runtest=$(RUNTEST); \
4178 if $(SHELL) -c "$$runtest --version" > /dev/null 2>&1; then \
4179 case "$(MAKEFLAGS)" in \
4180 *-j*) $(MAKE) check-DEJAGNU-parallel;; \
4181 *) $(MAKE) check-DEJAGNU-single;; \
4182 esac; \
4183 else \
4184 echo "WARNING: could not find \`runtest'" 1>&2; :;\
4185 fi)
4186
4187 # These tests are build-time only tools. Override the default rules for them.
4188 testsuite/common/%.o: testsuite/common/%.c
4189 $(AM_V_CC)$(COMPILE_FOR_BUILD) $(testsuite_common_CPPFLAGS) -c $< -o $@
4190
4191 testsuite/common/alu-tst$(EXEEXT): $(testsuite_common_alu_tst_OBJECTS) $(testsuite_common_alu_tst_DEPENDENCIES) testsuite/common/$(am__dirstamp)
4192 $(AM_V_CCLD)$(LINK_FOR_BUILD) $(testsuite_common_alu_tst_OBJECTS) $(testsuite_common_alu_tst_LDADD)
4193
4194 testsuite/common/fpu-tst$(EXEEXT): $(testsuite_common_fpu_tst_OBJECTS) $(testsuite_common_fpu_tst_DEPENDENCIES) testsuite/common/$(am__dirstamp)
4195 $(AM_V_CCLD)$(LINK_FOR_BUILD) $(testsuite_common_fpu_tst_OBJECTS) $(testsuite_common_fpu_tst_LDADD)
4196
4197 testsuite/common/bits-gen$(EXEEXT): $(testsuite_common_bits_gen_OBJECTS) $(testsuite_common_bits_gen_DEPENDENCIES) testsuite/common/$(am__dirstamp)
4198 $(AM_V_CCLD)$(LINK_FOR_BUILD) $(testsuite_common_bits_gen_OBJECTS) $(testsuite_common_bits_gen_LDADD)
4199
4200 testsuite/common/bits32m0$(EXEEXT): $(testsuite_common_bits32m0_OBJECTS) $(testsuite_common_bits32m0_DEPENDENCIES) testsuite/common/$(am__dirstamp)
4201 $(AM_V_CCLD)$(LINK_FOR_BUILD) $(testsuite_common_bits32m0_OBJECTS) $(testsuite_common_bits32m0_LDADD)
4202
4203 testsuite/common/bits32m0.c: testsuite/common/bits-gen$(EXEEXT) testsuite/common/bits-tst.c
4204 $(AM_V_GEN)$< 32 0 big > $@.tmp
4205 $(AM_V_at)cat $(srcdir)/testsuite/common/bits-tst.c >> $@.tmp
4206 $(AM_V_at)mv $@.tmp $@
4207
4208 testsuite/common/bits32m31$(EXEEXT): $(testsuite_common_bits32m31_OBJECTS) $(testsuite_common_bits32m31_DEPENDENCIES) testsuite/common/$(am__dirstamp)
4209 $(AM_V_CCLD)$(LINK_FOR_BUILD) $(testsuite_common_bits32m31_OBJECTS) $(testsuite_common_bits32m31_LDADD)
4210
4211 testsuite/common/bits32m31.c: testsuite/common/bits-gen$(EXEEXT) testsuite/common/bits-tst.c
4212 $(AM_V_GEN)$< 32 31 little > $@.tmp
4213 $(AM_V_at)cat $(srcdir)/testsuite/common/bits-tst.c >> $@.tmp
4214 $(AM_V_at)mv $@.tmp $@
4215
4216 testsuite/common/bits64m0$(EXEEXT): $(testsuite_common_bits64m0_OBJECTS) $(testsuite_common_bits64m0_DEPENDENCIES) testsuite/common/$(am__dirstamp)
4217 $(AM_V_CCLD)$(LINK_FOR_BUILD) $(testsuite_common_bits64m0_OBJECTS) $(testsuite_common_bits64m0_LDADD)
4218
4219 testsuite/common/bits64m0.c: testsuite/common/bits-gen$(EXEEXT) testsuite/common/bits-tst.c
4220 $(AM_V_GEN)$< 64 0 big > $@.tmp
4221 $(AM_V_at)cat $(srcdir)/testsuite/common/bits-tst.c >> $@.tmp
4222 $(AM_V_at)mv $@.tmp $@
4223
4224 testsuite/common/bits64m63$(EXEEXT): $(testsuite_common_bits64m63_OBJECTS) $(testsuite_common_bits64m63_DEPENDENCIES) testsuite/common/$(am__dirstamp)
4225 $(AM_V_CCLD)$(LINK_FOR_BUILD) $(testsuite_common_bits64m63_OBJECTS) $(testsuite_common_bits64m63_LDADD)
4226
4227 testsuite/common/bits64m63.c: testsuite/common/bits-gen$(EXEEXT) testsuite/common/bits-tst.c
4228 $(AM_V_GEN)$< 64 63 little > $@.tmp
4229 $(AM_V_at)cat $(srcdir)/testsuite/common/bits-tst.c >> $@.tmp
4230 $(AM_V_at)mv $@.tmp $@
4231 @SIM_ENABLE_ARCH_aarch64_TRUE@$(aarch64_libsim_a_OBJECTS) $(aarch64_libsim_a_LIBADD): aarch64/hw-config.h
4232
4233 @SIM_ENABLE_ARCH_aarch64_TRUE@aarch64/%.o: aarch64/%.c
4234 @SIM_ENABLE_ARCH_aarch64_TRUE@ $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
4235
4236 @SIM_ENABLE_ARCH_aarch64_TRUE@aarch64/%.o: common/%.c
4237 @SIM_ENABLE_ARCH_aarch64_TRUE@ $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
4238 @SIM_ENABLE_ARCH_arm_TRUE@$(arm_libsim_a_OBJECTS) $(arm_libsim_a_LIBADD): arm/hw-config.h
4239
4240 @SIM_ENABLE_ARCH_arm_TRUE@arm/%.o: arm/%.c
4241 @SIM_ENABLE_ARCH_arm_TRUE@ $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
4242
4243 @SIM_ENABLE_ARCH_arm_TRUE@arm/%.o: common/%.c
4244 @SIM_ENABLE_ARCH_arm_TRUE@ $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
4245 @SIM_ENABLE_ARCH_avr_TRUE@$(avr_libsim_a_OBJECTS) $(avr_libsim_a_LIBADD): avr/hw-config.h
4246
4247 @SIM_ENABLE_ARCH_avr_TRUE@avr/%.o: avr/%.c
4248 @SIM_ENABLE_ARCH_avr_TRUE@ $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
4249
4250 @SIM_ENABLE_ARCH_avr_TRUE@avr/%.o: common/%.c
4251 @SIM_ENABLE_ARCH_avr_TRUE@ $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
4252 @SIM_ENABLE_ARCH_bfin_TRUE@$(bfin_libsim_a_OBJECTS) $(bfin_libsim_a_LIBADD): bfin/hw-config.h
4253
4254 @SIM_ENABLE_ARCH_bfin_TRUE@bfin/%.o: bfin/%.c
4255 @SIM_ENABLE_ARCH_bfin_TRUE@ $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
4256
4257 @SIM_ENABLE_ARCH_bfin_TRUE@bfin/%.o: common/%.c
4258 @SIM_ENABLE_ARCH_bfin_TRUE@ $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
4259
4260 @SIM_ENABLE_ARCH_bfin_TRUE@bfin/linux-fixed-code.h: @MAINT@ $(srcdir)/bfin/linux-fixed-code.s bfin/local.mk bfin/$(am__dirstamp)
4261 @SIM_ENABLE_ARCH_bfin_TRUE@ $(AM_V_GEN)$(AS_FOR_TARGET_BFIN) $(srcdir)/bfin/linux-fixed-code.s -o bfin/linux-fixed-code.o
4262 @SIM_ENABLE_ARCH_bfin_TRUE@ $(AM_V_at)(\
4263 @SIM_ENABLE_ARCH_bfin_TRUE@ set -e; \
4264 @SIM_ENABLE_ARCH_bfin_TRUE@ echo "/* DO NOT EDIT: Autogenerated from linux-fixed-code.s. */"; \
4265 @SIM_ENABLE_ARCH_bfin_TRUE@ echo "static const unsigned char bfin_linux_fixed_code[] ="; \
4266 @SIM_ENABLE_ARCH_bfin_TRUE@ echo "{"; \
4267 @SIM_ENABLE_ARCH_bfin_TRUE@ $(OBJDUMP_FOR_TARGET_BFIN) -d -z bfin/linux-fixed-code.o > $@.dis; \
4268 @SIM_ENABLE_ARCH_bfin_TRUE@ sed -n \
4269 @SIM_ENABLE_ARCH_bfin_TRUE@ -e 's:^[^ ]* :0x:' \
4270 @SIM_ENABLE_ARCH_bfin_TRUE@ -e '/^0x/{s: .*::;s: *$$:,:;s: :, 0x:g;p;}' \
4271 @SIM_ENABLE_ARCH_bfin_TRUE@ $@.dis; \
4272 @SIM_ENABLE_ARCH_bfin_TRUE@ rm -f $@.dis; \
4273 @SIM_ENABLE_ARCH_bfin_TRUE@ echo "};" \
4274 @SIM_ENABLE_ARCH_bfin_TRUE@ ) > $@.tmp
4275 @SIM_ENABLE_ARCH_bfin_TRUE@ $(AM_V_at)$(SHELL) $(srcroot)/move-if-change $@.tmp $(srcdir)/bfin/linux-fixed-code.h
4276 @SIM_ENABLE_ARCH_bfin_TRUE@ $(AM_V_at)touch $(srcdir)/bfin/linux-fixed-code.h
4277 @SIM_ENABLE_ARCH_bpf_TRUE@$(bpf_libsim_a_OBJECTS) $(bpf_libsim_a_LIBADD): bpf/hw-config.h
4278
4279 @SIM_ENABLE_ARCH_bpf_TRUE@bpf/%.o: bpf/%.c
4280 @SIM_ENABLE_ARCH_bpf_TRUE@ $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
4281
4282 @SIM_ENABLE_ARCH_bpf_TRUE@bpf/%.o: common/%.c
4283 @SIM_ENABLE_ARCH_bpf_TRUE@ $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
4284 @SIM_ENABLE_ARCH_bpf_TRUE@bpf/modules.c: | $(bpf_BUILD_OUTPUTS)
4285
4286 @SIM_ENABLE_ARCH_bpf_TRUE@bpf/mloop-le.c bpf/eng-le.h: bpf/stamp-mloop-le ; @true
4287 @SIM_ENABLE_ARCH_bpf_TRUE@bpf/stamp-mloop-le: $(srccom)/genmloop.sh bpf/mloop.in
4288 @SIM_ENABLE_ARCH_bpf_TRUE@ $(AM_V_GEN)$(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \
4289 @SIM_ENABLE_ARCH_bpf_TRUE@ -mono -scache -prefix bpfbf_ebpfle -cpu bpfbf \
4290 @SIM_ENABLE_ARCH_bpf_TRUE@ -infile $(srcdir)/bpf/mloop.in \
4291 @SIM_ENABLE_ARCH_bpf_TRUE@ -outfile-prefix bpf/ -outfile-suffix -le
4292 @SIM_ENABLE_ARCH_bpf_TRUE@ $(AM_V_at)$(SHELL) $(srcroot)/move-if-change bpf/eng-le.hin bpf/eng-le.h
4293 @SIM_ENABLE_ARCH_bpf_TRUE@ $(AM_V_at)$(SHELL) $(srcroot)/move-if-change bpf/mloop-le.cin bpf/mloop-le.c
4294 @SIM_ENABLE_ARCH_bpf_TRUE@ $(AM_V_at)touch $@
4295
4296 @SIM_ENABLE_ARCH_bpf_TRUE@bpf/mloop-be.c bpf/eng-be.h: bpf/stamp-mloop-be ; @true
4297 @SIM_ENABLE_ARCH_bpf_TRUE@bpf/stamp-mloop-be: $(srccom)/genmloop.sh bpf/mloop.in
4298 @SIM_ENABLE_ARCH_bpf_TRUE@ $(AM_V_GEN)$(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \
4299 @SIM_ENABLE_ARCH_bpf_TRUE@ -mono -scache -prefix bpfbf_ebpfbe -cpu bpfbf \
4300 @SIM_ENABLE_ARCH_bpf_TRUE@ -infile $(srcdir)/bpf/mloop.in \
4301 @SIM_ENABLE_ARCH_bpf_TRUE@ -outfile-prefix bpf/ -outfile-suffix -be
4302 @SIM_ENABLE_ARCH_bpf_TRUE@ $(AM_V_at)$(SHELL) $(srcroot)/move-if-change bpf/eng-be.hin bpf/eng-be.h
4303 @SIM_ENABLE_ARCH_bpf_TRUE@ $(AM_V_at)$(SHELL) $(srcroot)/move-if-change bpf/mloop-be.cin bpf/mloop-be.c
4304 @SIM_ENABLE_ARCH_bpf_TRUE@ $(AM_V_at)touch $@
4305
4306 @SIM_ENABLE_ARCH_bpf_TRUE@bpf/cgen: bpf/cgen-arch bpf/cgen-cpu bpf/cgen-defs-le bpf/cgen-defs-be bpf/cgen-decode-le bpf/cgen-decode-be
4307
4308 @SIM_ENABLE_ARCH_bpf_TRUE@bpf/cgen-arch:
4309 @SIM_ENABLE_ARCH_bpf_TRUE@ $(AM_V_GEN)mach=bpf cpu=bpfbf FLAGS="with-scache"; $(CGEN_GEN_ARCH)
4310 @SIM_ENABLE_ARCH_bpf_TRUE@bpf/arch.h bpf/arch.c bpf/cpuall.h: @CGEN_MAINT@ bpf/cgen-arch
4311
4312 @SIM_ENABLE_ARCH_bpf_TRUE@bpf/cgen-cpu:
4313 @SIM_ENABLE_ARCH_bpf_TRUE@ $(AM_V_GEN)isa=ebpfle,ebpfbe cpu=bpfbf mach=bpf FLAGS="with-multiple-isa with-scache"; $(CGEN_GEN_CPU)
4314 @SIM_ENABLE_ARCH_bpf_TRUE@ $(AM_V_at)rm -f $(srcdir)/bpf/model.c
4315 @SIM_ENABLE_ARCH_bpf_TRUE@bpf/cpu.h bpf/cpu.c bpf/model.c: @CGEN_MAINT@ bpf/cgen-cpu
4316
4317 @SIM_ENABLE_ARCH_bpf_TRUE@bpf/cgen-defs-le:
4318 @SIM_ENABLE_ARCH_bpf_TRUE@ $(AM_V_GEN)isa=ebpfle cpu=bpfbf mach=bpf FLAGS="with-scache" SUFFIX="-le"; $(CGEN_GEN_DEFS)
4319 @SIM_ENABLE_ARCH_bpf_TRUE@bpf/defs-le.h: @CGEN_MAINT@ bpf/cgen-defs-le
4320
4321 @SIM_ENABLE_ARCH_bpf_TRUE@bpf/cgen-defs-be:
4322 @SIM_ENABLE_ARCH_bpf_TRUE@ $(AM_V_GEN)isa=ebpfbe cpu=bpfbf mach=bpf FLAGS="with-scache" SUFFIX="-be"; $(CGEN_GEN_DEFS)
4323 @SIM_ENABLE_ARCH_bpf_TRUE@bpf/defs-be.h: @CGEN_MAINT@ bpf/cgen-defs-be
4324
4325 @SIM_ENABLE_ARCH_bpf_TRUE@bpf/cgen-decode-le:
4326 @SIM_ENABLE_ARCH_bpf_TRUE@ $(AM_V_GEN)isa=ebpfle cpu=bpfbf mach=bpf FLAGS="with-scache" SUFFIX="-le" EXTRAFILES="$(CGEN_CPU_SEM)"; $(CGEN_GEN_DECODE)
4327 @SIM_ENABLE_ARCH_bpf_TRUE@bpf/sem-le.c bpf/decode-le.c bpf/decode-le.h: @CGEN_MAINT@ bpf/cgen-decode-vle
4328
4329 @SIM_ENABLE_ARCH_bpf_TRUE@bpf/cgen-decode-be:
4330 @SIM_ENABLE_ARCH_bpf_TRUE@ $(AM_V_GEN)isa=ebpfbe cpu=bpfbf mach=bpf FLAGS="with-scache" SUFFIX="-be" EXTRAFILES="$(CGEN_CPU_SEM)"; $(CGEN_GEN_DECODE)
4331 @SIM_ENABLE_ARCH_bpf_TRUE@bpf/sem-be.c bpf/decode-be.c bpf/decode-be.h: @CGEN_MAINT@ bpf/cgen-decode-be
4332 @SIM_ENABLE_ARCH_cr16_TRUE@$(cr16_libsim_a_OBJECTS) $(cr16_libsim_a_LIBADD): cr16/hw-config.h
4333
4334 @SIM_ENABLE_ARCH_cr16_TRUE@cr16/%.o: cr16/%.c
4335 @SIM_ENABLE_ARCH_cr16_TRUE@ $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
4336
4337 @SIM_ENABLE_ARCH_cr16_TRUE@cr16/%.o: common/%.c
4338 @SIM_ENABLE_ARCH_cr16_TRUE@ $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
4339 @SIM_ENABLE_ARCH_cr16_TRUE@cr16/modules.c: | $(cr16_BUILD_OUTPUTS)
4340
4341 # These rules are copied from automake, but tweaked to use FOR_BUILD variables.
4342 @SIM_ENABLE_ARCH_cr16_TRUE@cr16/gencode$(EXEEXT): $(cr16_gencode_OBJECTS) $(cr16_gencode_DEPENDENCIES) cr16/$(am__dirstamp)
4343 @SIM_ENABLE_ARCH_cr16_TRUE@ $(AM_V_CCLD)$(LINK_FOR_BUILD) $(cr16_gencode_OBJECTS) $(cr16_gencode_LDADD)
4344
4345 # gencode is a build-time only tool. Override the default rules for it.
4346 @SIM_ENABLE_ARCH_cr16_TRUE@cr16/gencode.o: cr16/gencode.c
4347 @SIM_ENABLE_ARCH_cr16_TRUE@ $(AM_V_CC)$(COMPILE_FOR_BUILD) -c $< -o $@
4348 @SIM_ENABLE_ARCH_cr16_TRUE@cr16/cr16-opc.o: ../opcodes/cr16-opc.c
4349 @SIM_ENABLE_ARCH_cr16_TRUE@ $(AM_V_CC)$(COMPILE_FOR_BUILD) -c $< -o $@
4350
4351 @SIM_ENABLE_ARCH_cr16_TRUE@cr16/simops.h: cr16/gencode$(EXEEXT)
4352 @SIM_ENABLE_ARCH_cr16_TRUE@ $(AM_V_GEN)$< -h >$@
4353
4354 @SIM_ENABLE_ARCH_cr16_TRUE@cr16/table.c: cr16/gencode$(EXEEXT)
4355 @SIM_ENABLE_ARCH_cr16_TRUE@ $(AM_V_GEN)$< >$@
4356 @SIM_ENABLE_ARCH_cris_TRUE@$(cris_libsim_a_OBJECTS) $(cris_libsim_a_LIBADD): cris/hw-config.h
4357
4358 @SIM_ENABLE_ARCH_cris_TRUE@cris/%.o: cris/%.c
4359 @SIM_ENABLE_ARCH_cris_TRUE@ $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
4360
4361 @SIM_ENABLE_ARCH_cris_TRUE@cris/%.o: common/%.c
4362 @SIM_ENABLE_ARCH_cris_TRUE@ $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
4363 @SIM_ENABLE_ARCH_cris_TRUE@cris/modules.c: | $(cris_BUILD_OUTPUTS)
4364
4365 @SIM_ENABLE_ARCH_cris_TRUE@cris/mloopv10f.c cris/engv10.h: cris/stamp-mloop-v10f ; @true
4366 @SIM_ENABLE_ARCH_cris_TRUE@cris/stamp-mloop-v10f: $(srccom)/genmloop.sh cris/mloop.in
4367 @SIM_ENABLE_ARCH_cris_TRUE@ $(AM_V_GEN)$(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \
4368 @SIM_ENABLE_ARCH_cris_TRUE@ -mono -no-fast -pbb -switch semcrisv10f-switch.c \
4369 @SIM_ENABLE_ARCH_cris_TRUE@ -cpu crisv10f \
4370 @SIM_ENABLE_ARCH_cris_TRUE@ -infile $(srcdir)/cris/mloop.in -outfile-prefix cris/ -outfile-suffix -v10f
4371 @SIM_ENABLE_ARCH_cris_TRUE@ $(AM_V_at)$(SHELL) $(srcroot)/move-if-change cris/eng-v10f.hin cris/engv10.h
4372 @SIM_ENABLE_ARCH_cris_TRUE@ $(AM_V_at)$(SHELL) $(srcroot)/move-if-change cris/mloop-v10f.cin cris/mloopv10f.c
4373 @SIM_ENABLE_ARCH_cris_TRUE@ $(AM_V_at)touch $@
4374
4375 @SIM_ENABLE_ARCH_cris_TRUE@cris/mloopv32f.c cris/engv32.h: cris/stamp-mloop-v32f ; @true
4376 @SIM_ENABLE_ARCH_cris_TRUE@cris/stamp-mloop-v32f: $(srccom)/genmloop.sh cris/mloop.in
4377 @SIM_ENABLE_ARCH_cris_TRUE@ $(AM_V_GEN)$(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \
4378 @SIM_ENABLE_ARCH_cris_TRUE@ -mono -no-fast -pbb -switch semcrisv32f-switch.c \
4379 @SIM_ENABLE_ARCH_cris_TRUE@ -cpu crisv32f \
4380 @SIM_ENABLE_ARCH_cris_TRUE@ -infile $(srcdir)/cris/mloop.in -outfile-prefix cris/ -outfile-suffix -v32f
4381 @SIM_ENABLE_ARCH_cris_TRUE@ $(AM_V_at)$(SHELL) $(srcroot)/move-if-change cris/eng-v32f.hin cris/engv32.h
4382 @SIM_ENABLE_ARCH_cris_TRUE@ $(AM_V_at)$(SHELL) $(srcroot)/move-if-change cris/mloop-v32f.cin cris/mloopv32f.c
4383 @SIM_ENABLE_ARCH_cris_TRUE@ $(AM_V_at)touch $@
4384
4385 @SIM_ENABLE_ARCH_cris_TRUE@cris/cgen: cris/cgen-arch cris/cgen-cpu-decode-v10f cris/cgen-cpu-decode-v32f
4386
4387 @SIM_ENABLE_ARCH_cris_TRUE@cris/cgen-arch:
4388 @SIM_ENABLE_ARCH_cris_TRUE@ $(AM_V_GEN)mach=crisv10,crisv32 FLAGS="with-scache with-profile=fn"; $(CGEN_GEN_ARCH)
4389 @SIM_ENABLE_ARCH_cris_TRUE@cris/arch.h cris/arch.c cris/cpuall.h: @CGEN_MAINT@ cris/cgen-arch
4390
4391 @SIM_ENABLE_ARCH_cris_TRUE@cris/cgen-cpu-decode-v10f:
4392 @SIM_ENABLE_ARCH_cris_TRUE@ $(AM_V_GEN)cpu=crisv10f mach=crisv10 SUFFIX=v10 FLAGS="with-scache with-profile=fn" EXTRAFILES="$(CGEN_CPU_SEMSW)"; $(CGEN_GEN_CPU_DECODE)
4393 @SIM_ENABLE_ARCH_cris_TRUE@ $(AM_V_at)$(SHELL) $(srcroot)/move-if-change $(srcdir)/cris/semv10-switch.c $(srcdir)/cris/semcrisv10f-switch.c
4394 @SIM_ENABLE_ARCH_cris_TRUE@cris/cpuv10.h cris/cpuv10.c cris/semcrisv10f-switch.c cris/modelv10.c cris/decodev10.c cris/decodev10.h: @CGEN_MAINT@ cris/cgen-cpu-decode-v10f
4395
4396 @SIM_ENABLE_ARCH_cris_TRUE@cris/cgen-cpu-decode-v32f:
4397 @SIM_ENABLE_ARCH_cris_TRUE@ $(AM_V_GEN)cpu=crisv32f mach=crisv32 SUFFIX=v32 FLAGS="with-scache with-profile=fn" EXTRAFILES="$(CGEN_CPU_SEMSW)"; $(CGEN_GEN_CPU_DECODE)
4398 @SIM_ENABLE_ARCH_cris_TRUE@ $(AM_V_at)$(SHELL) $(srcroot)/move-if-change $(srcdir)/cris/semv32-switch.c $(srcdir)/cris/semcrisv32f-switch.c
4399 @SIM_ENABLE_ARCH_cris_TRUE@cris/cpuv32.h cris/cpuv32.c cris/semcrisv32f-switch.c cris/modelv32.c cris/decodev32.c cris/decodev32.h: @CGEN_MAINT@ cris/cgen-cpu-decode-v32f
4400 @SIM_ENABLE_ARCH_d10v_TRUE@$(d10v_libsim_a_OBJECTS) $(d10v_libsim_a_LIBADD): d10v/hw-config.h
4401
4402 @SIM_ENABLE_ARCH_d10v_TRUE@d10v/%.o: d10v/%.c
4403 @SIM_ENABLE_ARCH_d10v_TRUE@ $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
4404
4405 @SIM_ENABLE_ARCH_d10v_TRUE@d10v/%.o: common/%.c
4406 @SIM_ENABLE_ARCH_d10v_TRUE@ $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
4407 @SIM_ENABLE_ARCH_d10v_TRUE@d10v/modules.c: | $(d10v_BUILD_OUTPUTS)
4408
4409 # These rules are copied from automake, but tweaked to use FOR_BUILD variables.
4410 @SIM_ENABLE_ARCH_d10v_TRUE@d10v/gencode$(EXEEXT): $(d10v_gencode_OBJECTS) $(d10v_gencode_DEPENDENCIES) d10v/$(am__dirstamp)
4411 @SIM_ENABLE_ARCH_d10v_TRUE@ $(AM_V_CCLD)$(LINK_FOR_BUILD) $(d10v_gencode_OBJECTS) $(d10v_gencode_LDADD)
4412
4413 # gencode is a build-time only tool. Override the default rules for it.
4414 @SIM_ENABLE_ARCH_d10v_TRUE@d10v/gencode.o: d10v/gencode.c
4415 @SIM_ENABLE_ARCH_d10v_TRUE@ $(AM_V_CC)$(COMPILE_FOR_BUILD) -c $< -o $@
4416 @SIM_ENABLE_ARCH_d10v_TRUE@d10v/d10v-opc.o: ../opcodes/d10v-opc.c
4417 @SIM_ENABLE_ARCH_d10v_TRUE@ $(AM_V_CC)$(COMPILE_FOR_BUILD) -c $< -o $@
4418
4419 @SIM_ENABLE_ARCH_d10v_TRUE@d10v/simops.h: d10v/gencode$(EXEEXT)
4420 @SIM_ENABLE_ARCH_d10v_TRUE@ $(AM_V_GEN)$< -h >$@
4421
4422 @SIM_ENABLE_ARCH_d10v_TRUE@d10v/table.c: d10v/gencode$(EXEEXT)
4423 @SIM_ENABLE_ARCH_d10v_TRUE@ $(AM_V_GEN)$< >$@
4424 @SIM_ENABLE_ARCH_erc32_TRUE@$(erc32_libsim_a_OBJECTS) $(erc32_libsim_a_LIBADD): erc32/hw-config.h
4425
4426 @SIM_ENABLE_ARCH_erc32_TRUE@erc32/%.o: erc32/%.c
4427 @SIM_ENABLE_ARCH_erc32_TRUE@ $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
4428
4429 @SIM_ENABLE_ARCH_erc32_TRUE@erc32/%.o: common/%.c
4430 @SIM_ENABLE_ARCH_erc32_TRUE@ $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
4431
4432 @SIM_ENABLE_ARCH_erc32_TRUE@erc32/sis$(EXEEXT): erc32/run$(EXEEXT)
4433 @SIM_ENABLE_ARCH_erc32_TRUE@ $(AM_V_GEN)ln $< $@ 2>/dev/null || $(LN_S) $< $@ 2>/dev/null || cp -p $< $@
4434 @SIM_ENABLE_ARCH_erc32_TRUE@sim-%D-install-exec-local: installdirs
4435 @SIM_ENABLE_ARCH_erc32_TRUE@ $(AM_V_at)$(MKDIR_P) $(DESTDIR)$(bindir)
4436 @SIM_ENABLE_ARCH_erc32_TRUE@ n=`echo sis | sed '$(program_transform_name)'`; \
4437 @SIM_ENABLE_ARCH_erc32_TRUE@ $(LIBTOOL) --mode=install $(INSTALL_PROGRAM) erc32/run$(EXEEXT) $(DESTDIR)$(bindir)/$$n$(EXEEXT)
4438 @SIM_ENABLE_ARCH_erc32_TRUE@sim-erc32-uninstall-local:
4439 @SIM_ENABLE_ARCH_erc32_TRUE@ rm -f $(DESTDIR)$(bindir)/sis
4440 @SIM_ENABLE_ARCH_examples_TRUE@$(example_synacor_libsim_a_OBJECTS) $(example_synacor_libsim_a_LIBADD): example-synacor/hw-config.h
4441
4442 @SIM_ENABLE_ARCH_examples_TRUE@example-synacor/%.o: example-synacor/%.c
4443 @SIM_ENABLE_ARCH_examples_TRUE@ $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
4444
4445 @SIM_ENABLE_ARCH_examples_TRUE@example-synacor/%.o: common/%.c
4446 @SIM_ENABLE_ARCH_examples_TRUE@ $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
4447 @SIM_ENABLE_ARCH_frv_TRUE@$(frv_libsim_a_OBJECTS) $(frv_libsim_a_LIBADD): frv/hw-config.h
4448
4449 @SIM_ENABLE_ARCH_frv_TRUE@frv/%.o: frv/%.c
4450 @SIM_ENABLE_ARCH_frv_TRUE@ $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
4451
4452 @SIM_ENABLE_ARCH_frv_TRUE@frv/%.o: common/%.c
4453 @SIM_ENABLE_ARCH_frv_TRUE@ $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
4454 @SIM_ENABLE_ARCH_frv_TRUE@frv/modules.c: | $(frv_BUILD_OUTPUTS)
4455
4456 @SIM_ENABLE_ARCH_frv_TRUE@frv/mloop.c frv/eng.h: frv/stamp-mloop ; @true
4457 @SIM_ENABLE_ARCH_frv_TRUE@frv/stamp-mloop: $(srccom)/genmloop.sh frv/mloop.in
4458 @SIM_ENABLE_ARCH_frv_TRUE@ $(AM_V_GEN)$(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \
4459 @SIM_ENABLE_ARCH_frv_TRUE@ -mono -scache -parallel-generic-write -parallel-only \
4460 @SIM_ENABLE_ARCH_frv_TRUE@ -cpu frvbf \
4461 @SIM_ENABLE_ARCH_frv_TRUE@ -infile $(srcdir)/frv/mloop.in -outfile-prefix frv/
4462 @SIM_ENABLE_ARCH_frv_TRUE@ $(AM_V_at)$(SHELL) $(srcroot)/move-if-change frv/eng.hin frv/eng.h
4463 @SIM_ENABLE_ARCH_frv_TRUE@ $(AM_V_at)$(SHELL) $(srcroot)/move-if-change frv/mloop.cin frv/mloop.c
4464 @SIM_ENABLE_ARCH_frv_TRUE@ $(AM_V_at)touch $@
4465
4466 @SIM_ENABLE_ARCH_frv_TRUE@frv/cgen: frv/cgen-arch frv/cgen-cpu-decode
4467
4468 @SIM_ENABLE_ARCH_frv_TRUE@frv/cgen-arch:
4469 @SIM_ENABLE_ARCH_frv_TRUE@ $(AM_V_GEN)mach=all FLAGS="with-scache"; $(CGEN_GEN_ARCH)
4470 @SIM_ENABLE_ARCH_frv_TRUE@frv/arch.h frv/arch.c frv/cpuall.h: @CGEN_MAINT@ frv/cgen-arch
4471
4472 @SIM_ENABLE_ARCH_frv_TRUE@frv/cgen-cpu-decode:
4473 @SIM_ENABLE_ARCH_frv_TRUE@ $(AM_V_GEN)cpu=frvbf mach=frv,fr550,fr500,fr450,fr400,tomcat,simple FLAGS="with-scache with-profile=fn with-generic-write with-parallel-only" EXTRAFILES="$(CGEN_CPU_SEM)"; $(CGEN_GEN_CPU_DECODE)
4474 @SIM_ENABLE_ARCH_frv_TRUE@frv/cpu.h frv/sem.c frv/model.c frv/decode.c frv/decode.h: @CGEN_MAINT@ frv/cgen-cpu-decode
4475 @SIM_ENABLE_ARCH_ft32_TRUE@$(ft32_libsim_a_OBJECTS) $(ft32_libsim_a_LIBADD): ft32/hw-config.h
4476
4477 @SIM_ENABLE_ARCH_ft32_TRUE@ft32/%.o: ft32/%.c
4478 @SIM_ENABLE_ARCH_ft32_TRUE@ $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
4479
4480 @SIM_ENABLE_ARCH_ft32_TRUE@ft32/%.o: common/%.c
4481 @SIM_ENABLE_ARCH_ft32_TRUE@ $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
4482 @SIM_ENABLE_ARCH_h8300_TRUE@$(h8300_libsim_a_OBJECTS) $(h8300_libsim_a_LIBADD): h8300/hw-config.h
4483
4484 @SIM_ENABLE_ARCH_h8300_TRUE@h8300/%.o: h8300/%.c
4485 @SIM_ENABLE_ARCH_h8300_TRUE@ $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
4486
4487 @SIM_ENABLE_ARCH_h8300_TRUE@h8300/%.o: common/%.c
4488 @SIM_ENABLE_ARCH_h8300_TRUE@ $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
4489 @SIM_ENABLE_ARCH_iq2000_TRUE@$(iq2000_libsim_a_OBJECTS) $(iq2000_libsim_a_LIBADD): iq2000/hw-config.h
4490
4491 @SIM_ENABLE_ARCH_iq2000_TRUE@iq2000/%.o: iq2000/%.c
4492 @SIM_ENABLE_ARCH_iq2000_TRUE@ $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
4493
4494 @SIM_ENABLE_ARCH_iq2000_TRUE@iq2000/%.o: common/%.c
4495 @SIM_ENABLE_ARCH_iq2000_TRUE@ $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
4496 @SIM_ENABLE_ARCH_iq2000_TRUE@iq2000/modules.c: | $(iq2000_BUILD_OUTPUTS)
4497
4498 @SIM_ENABLE_ARCH_iq2000_TRUE@iq2000/mloop.c iq2000/eng.h: iq2000/stamp-mloop ; @true
4499 @SIM_ENABLE_ARCH_iq2000_TRUE@iq2000/stamp-mloop: $(srccom)/genmloop.sh iq2000/mloop.in
4500 @SIM_ENABLE_ARCH_iq2000_TRUE@ $(AM_V_GEN)$(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \
4501 @SIM_ENABLE_ARCH_iq2000_TRUE@ -mono -fast -pbb -switch sem-switch.c \
4502 @SIM_ENABLE_ARCH_iq2000_TRUE@ -cpu iq2000bf \
4503 @SIM_ENABLE_ARCH_iq2000_TRUE@ -infile $(srcdir)/iq2000/mloop.in -outfile-prefix iq2000/
4504 @SIM_ENABLE_ARCH_iq2000_TRUE@ $(AM_V_at)$(SHELL) $(srcroot)/move-if-change iq2000/eng.hin iq2000/eng.h
4505 @SIM_ENABLE_ARCH_iq2000_TRUE@ $(AM_V_at)$(SHELL) $(srcroot)/move-if-change iq2000/mloop.cin iq2000/mloop.c
4506 @SIM_ENABLE_ARCH_iq2000_TRUE@ $(AM_V_at)touch $@
4507
4508 @SIM_ENABLE_ARCH_iq2000_TRUE@iq2000/cgen: iq2000/cgen-arch iq2000/cgen-cpu-decode
4509
4510 @SIM_ENABLE_ARCH_iq2000_TRUE@iq2000/cgen-arch:
4511 @SIM_ENABLE_ARCH_iq2000_TRUE@ $(AM_V_GEN)mach=iq2000 FLAGS="with-scache with-profile=fn"; $(CGEN_GEN_ARCH)
4512 @SIM_ENABLE_ARCH_iq2000_TRUE@iq2000/arch.h iq2000/arch.c iq2000/cpuall.h: @CGEN_MAINT@ iq2000/cgen-arch
4513
4514 @SIM_ENABLE_ARCH_iq2000_TRUE@iq2000/cgen-cpu-decode:
4515 @SIM_ENABLE_ARCH_iq2000_TRUE@ $(AM_V_GEN)cpu=iq2000bf mach=iq2000 FLAGS="with-scache with-profile=fn" EXTRAFILES="$(CGEN_CPU_SEM) $(CGEN_CPU_SEMSW)"; $(CGEN_GEN_CPU_DECODE)
4516 @SIM_ENABLE_ARCH_iq2000_TRUE@iq2000/cpu.h iq2000/sem.c iq2000/sem-switch.c iq2000/model.c iq2000/decode.c iq2000/decode.h: @CGEN_MAINT@ iq2000/cgen-cpu-decode
4517 @SIM_ENABLE_ARCH_lm32_TRUE@$(lm32_libsim_a_OBJECTS) $(lm32_libsim_a_LIBADD): lm32/hw-config.h
4518
4519 @SIM_ENABLE_ARCH_lm32_TRUE@lm32/%.o: lm32/%.c
4520 @SIM_ENABLE_ARCH_lm32_TRUE@ $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
4521
4522 @SIM_ENABLE_ARCH_lm32_TRUE@lm32/%.o: common/%.c
4523 @SIM_ENABLE_ARCH_lm32_TRUE@ $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
4524 @SIM_ENABLE_ARCH_lm32_TRUE@lm32/modules.c: | $(lm32_BUILD_OUTPUTS)
4525
4526 @SIM_ENABLE_ARCH_lm32_TRUE@lm32/mloop.c lm32/eng.h: lm32/stamp-mloop ; @true
4527 @SIM_ENABLE_ARCH_lm32_TRUE@lm32/stamp-mloop: $(srccom)/genmloop.sh lm32/mloop.in
4528 @SIM_ENABLE_ARCH_lm32_TRUE@ $(AM_V_GEN)$(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \
4529 @SIM_ENABLE_ARCH_lm32_TRUE@ -mono -fast -pbb -switch sem-switch.c \
4530 @SIM_ENABLE_ARCH_lm32_TRUE@ -cpu lm32bf \
4531 @SIM_ENABLE_ARCH_lm32_TRUE@ -infile $(srcdir)/lm32/mloop.in -outfile-prefix lm32/
4532 @SIM_ENABLE_ARCH_lm32_TRUE@ $(AM_V_at)$(SHELL) $(srcroot)/move-if-change lm32/eng.hin lm32/eng.h
4533 @SIM_ENABLE_ARCH_lm32_TRUE@ $(AM_V_at)$(SHELL) $(srcroot)/move-if-change lm32/mloop.cin lm32/mloop.c
4534 @SIM_ENABLE_ARCH_lm32_TRUE@ $(AM_V_at)touch $@
4535
4536 @SIM_ENABLE_ARCH_lm32_TRUE@lm32/cgen: lm32/cgen-arch lm32/cgen-cpu-decode
4537
4538 @SIM_ENABLE_ARCH_lm32_TRUE@lm32/cgen-arch:
4539 @SIM_ENABLE_ARCH_lm32_TRUE@ $(AM_V_GEN)mach=all FLAGS="with-scache with-profile=fn"; $(CGEN_GEN_ARCH)
4540 @SIM_ENABLE_ARCH_lm32_TRUE@lm32/arch.h lm32/arch.c lm32/cpuall.h: @CGEN_MAINT@ lm32/cgen-arch
4541
4542 @SIM_ENABLE_ARCH_lm32_TRUE@lm32/cgen-cpu-decode:
4543 @SIM_ENABLE_ARCH_lm32_TRUE@ $(AM_V_GEN)cpu=lm32bf mach=lm32 FLAGS="with-scache with-profile=fn" EXTRAFILES="$(CGEN_CPU_SEM) $(CGEN_CPU_SEMSW)"; $(CGEN_GEN_CPU_DECODE)
4544 @SIM_ENABLE_ARCH_lm32_TRUE@lm32/cpu.h lm32/sem.c lm32/sem-switch.c lm32/model.c lm32/decode.c lm32/decode.h: @CGEN_MAINT@ lm32/cgen-cpu-decode
4545 @SIM_ENABLE_ARCH_m32c_TRUE@$(m32c_libsim_a_OBJECTS) $(m32c_libsim_a_LIBADD): m32c/hw-config.h
4546
4547 @SIM_ENABLE_ARCH_m32c_TRUE@m32c/%.o: m32c/%.c
4548 @SIM_ENABLE_ARCH_m32c_TRUE@ $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
4549
4550 @SIM_ENABLE_ARCH_m32c_TRUE@m32c/%.o: common/%.c
4551 @SIM_ENABLE_ARCH_m32c_TRUE@ $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
4552 @SIM_ENABLE_ARCH_m32c_TRUE@m32c/modules.c: | $(m32c_BUILD_OUTPUTS)
4553
4554 # These rules are copied from automake, but tweaked to use FOR_BUILD variables.
4555 @SIM_ENABLE_ARCH_m32c_TRUE@m32c/opc2c$(EXEEXT): $(m32c_opc2c_OBJECTS) $(m32c_opc2c_DEPENDENCIES) m32c/$(am__dirstamp)
4556 @SIM_ENABLE_ARCH_m32c_TRUE@ $(AM_V_CCLD)$(LINK_FOR_BUILD) $(m32c_opc2c_OBJECTS) $(m32c_opc2c_LDADD)
4557
4558 # opc2c is a build-time only tool. Override the default rules for it.
4559 @SIM_ENABLE_ARCH_m32c_TRUE@m32c/opc2c.o: m32c/opc2c.c
4560 @SIM_ENABLE_ARCH_m32c_TRUE@ $(AM_V_CC)$(COMPILE_FOR_BUILD) -c $< -o $@
4561
4562 @SIM_ENABLE_ARCH_m32c_TRUE@m32c/m32c.c: m32c/m32c.opc m32c/opc2c$(EXEEXT)
4563 @SIM_ENABLE_ARCH_m32c_TRUE@ $(AM_V_GEN)$(m32c_OPC2C_RUN) -l $@.log $< > $@.tmp
4564 @SIM_ENABLE_ARCH_m32c_TRUE@ $(AM_V_at)mv $@.tmp $@
4565
4566 @SIM_ENABLE_ARCH_m32c_TRUE@m32c/r8c.c: m32c/r8c.opc m32c/opc2c$(EXEEXT)
4567 @SIM_ENABLE_ARCH_m32c_TRUE@ $(AM_V_GEN)$(m32c_OPC2C_RUN) -l $@.log $< > $@.tmp
4568 @SIM_ENABLE_ARCH_m32c_TRUE@ $(AM_V_at)mv $@.tmp $@
4569 @SIM_ENABLE_ARCH_m32r_TRUE@$(m32r_libsim_a_OBJECTS) $(m32r_libsim_a_LIBADD): m32r/hw-config.h
4570
4571 @SIM_ENABLE_ARCH_m32r_TRUE@m32r/%.o: m32r/%.c
4572 @SIM_ENABLE_ARCH_m32r_TRUE@ $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
4573
4574 @SIM_ENABLE_ARCH_m32r_TRUE@m32r/%.o: common/%.c
4575 @SIM_ENABLE_ARCH_m32r_TRUE@ $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
4576 @SIM_ENABLE_ARCH_m32r_TRUE@m32r/modules.c: | $(m32r_BUILD_OUTPUTS)
4577
4578 @SIM_ENABLE_ARCH_m32r_TRUE@m32r/mloop.c m32r/eng.h: m32r/stamp-mloop ; @true
4579 @SIM_ENABLE_ARCH_m32r_TRUE@m32r/stamp-mloop: $(srccom)/genmloop.sh m32r/mloop.in
4580 @SIM_ENABLE_ARCH_m32r_TRUE@ $(AM_V_GEN)$(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \
4581 @SIM_ENABLE_ARCH_m32r_TRUE@ -mono -fast -pbb -switch sem-switch.c \
4582 @SIM_ENABLE_ARCH_m32r_TRUE@ -cpu m32rbf \
4583 @SIM_ENABLE_ARCH_m32r_TRUE@ -infile $(srcdir)/m32r/mloop.in -outfile-prefix m32r/
4584 @SIM_ENABLE_ARCH_m32r_TRUE@ $(AM_V_at)$(SHELL) $(srcroot)/move-if-change m32r/eng.hin m32r/eng.h
4585 @SIM_ENABLE_ARCH_m32r_TRUE@ $(AM_V_at)$(SHELL) $(srcroot)/move-if-change m32r/mloop.cin m32r/mloop.c
4586 @SIM_ENABLE_ARCH_m32r_TRUE@ $(AM_V_at)touch $@
4587
4588 @SIM_ENABLE_ARCH_m32r_TRUE@m32r/mloopx.c m32r/engx.h: m32r/stamp-mloop ; @true
4589 @SIM_ENABLE_ARCH_m32r_TRUE@m32r/stamp-mloop-x: $(srccom)/genmloop.sh m32r/mloop.in
4590 @SIM_ENABLE_ARCH_m32r_TRUE@ $(AM_V_GEN)$(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \
4591 @SIM_ENABLE_ARCH_m32r_TRUE@ -mono -no-fast -pbb -parallel-write -switch semx-switch.c \
4592 @SIM_ENABLE_ARCH_m32r_TRUE@ -cpu m32rxf \
4593 @SIM_ENABLE_ARCH_m32r_TRUE@ -infile $(srcdir)/m32r/mloopx.in -outfile-prefix m32r/ -outfile-suffix x
4594 @SIM_ENABLE_ARCH_m32r_TRUE@ $(AM_V_at)$(SHELL) $(srcroot)/move-if-change m32r/engx.hin m32r/engx.h
4595 @SIM_ENABLE_ARCH_m32r_TRUE@ $(AM_V_at)$(SHELL) $(srcroot)/move-if-change m32r/mloopx.cin m32r/mloopx.c
4596 @SIM_ENABLE_ARCH_m32r_TRUE@ $(AM_V_at)touch $@
4597
4598 @SIM_ENABLE_ARCH_m32r_TRUE@m32r/mloop2.c m32r/eng2.h: m32r/stamp-mloop ; @true
4599 @SIM_ENABLE_ARCH_m32r_TRUE@m32r/stamp-mloop-2: $(srccom)/genmloop.sh m32r/mloop.in
4600 @SIM_ENABLE_ARCH_m32r_TRUE@ $(AM_V_GEN)$(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \
4601 @SIM_ENABLE_ARCH_m32r_TRUE@ -mono -no-fast -pbb -parallel-write -switch sem2-switch.c \
4602 @SIM_ENABLE_ARCH_m32r_TRUE@ -cpu m32r2f \
4603 @SIM_ENABLE_ARCH_m32r_TRUE@ -infile $(srcdir)/m32r/mloop2.in -outfile-prefix m32r/ -outfile-suffix 2
4604 @SIM_ENABLE_ARCH_m32r_TRUE@ $(AM_V_at)$(SHELL) $(srcroot)/move-if-change m32r/eng2.hin m32r/eng2.h
4605 @SIM_ENABLE_ARCH_m32r_TRUE@ $(AM_V_at)$(SHELL) $(srcroot)/move-if-change m32r/mloop2.cin m32r/mloop2.c
4606 @SIM_ENABLE_ARCH_m32r_TRUE@ $(AM_V_at)touch $@
4607
4608 @SIM_ENABLE_ARCH_m32r_TRUE@m32r/cgen: m32r/cgen-arch m32r/cgen-cpu-decode m32r/cgen-cpu-decode-x m32r/cgen-cpu-decode-2
4609
4610 @SIM_ENABLE_ARCH_m32r_TRUE@m32r/cgen-arch:
4611 @SIM_ENABLE_ARCH_m32r_TRUE@ $(AM_V_GEN)mach=all FLAGS="with-scache with-profile=fn"; $(CGEN_GEN_ARCH)
4612 @SIM_ENABLE_ARCH_m32r_TRUE@m32r/arch.h m32r/arch.c m32r/cpuall.h: @CGEN_MAINT@ m32r/cgen-arch
4613
4614 @SIM_ENABLE_ARCH_m32r_TRUE@m32r/cgen-cpu-decode:
4615 @SIM_ENABLE_ARCH_m32r_TRUE@ $(AM_V_GEN)cpu=m32rbf mach=m32r FLAGS="with-scache with-profile=fn" EXTRAFILES="$(CGEN_CPU_SEM) $(CGEN_CPU_SEMSW)"; $(CGEN_GEN_CPU_DECODE)
4616 @SIM_ENABLE_ARCH_m32r_TRUE@m32r/cpu.h m32r/sem.c m32r/sem-switch.c m32r/model.c m32r/decode.c m32r/decode.h: @CGEN_MAINT@ m32r/cgen-cpu-decode
4617
4618 @SIM_ENABLE_ARCH_m32r_TRUE@m32r/cgen-cpu-decode-x:
4619 @SIM_ENABLE_ARCH_m32r_TRUE@ $(AM_V_GEN)cpu=m32rxf mach=m32rx SUFFIX=x FLAGS="with-scache with-profile=fn" EXTRAFILES="$(CGEN_CPU_SEMSW)"; $(CGEN_GEN_CPU_DECODE)
4620 @SIM_ENABLE_ARCH_m32r_TRUE@m32r/cpux.h m32r/semx-switch.c m32r/modelx.c m32r/decodex.c m32r/decodex.h: @CGEN_MAINT@ m32r/cgen-cpu-decode-x
4621
4622 @SIM_ENABLE_ARCH_m32r_TRUE@m32r/cgen-cpu-decode-2:
4623 @SIM_ENABLE_ARCH_m32r_TRUE@ $(AM_V_GEN)cpu=m32r2f mach=m32r2 SUFFIX=2 FLAGS="with-scache with-profile=fn" EXTRAFILES="$(CGEN_CPU_SEMSW)"; $(CGEN_GEN_CPU_DECODE)
4624 @SIM_ENABLE_ARCH_m32r_TRUE@m32r/cpu2.h m32r/sem2-switch.c m32r/model2.c m32r/decode2.c m32r/decode2.h: @CGEN_MAINT@ m32r/cgen-cpu-decode-2
4625 @SIM_ENABLE_ARCH_m68hc11_TRUE@$(m68hc11_libsim_a_OBJECTS) $(m68hc11_libsim_a_LIBADD): m68hc11/hw-config.h
4626
4627 @SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11/%.o: m68hc11/%.c
4628 @SIM_ENABLE_ARCH_m68hc11_TRUE@ $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
4629
4630 @SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11/%.o: common/%.c
4631 @SIM_ENABLE_ARCH_m68hc11_TRUE@ $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
4632 @SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11/modules.c: | $(m68hc11_BUILD_OUTPUTS)
4633
4634 # These rules are copied from automake, but tweaked to use FOR_BUILD variables.
4635 @SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11/gencode$(EXEEXT): $(m68hc11_gencode_OBJECTS) $(m68hc11_gencode_DEPENDENCIES) m68hc11/$(am__dirstamp)
4636 @SIM_ENABLE_ARCH_m68hc11_TRUE@ $(AM_V_CCLD)$(LINK_FOR_BUILD) $(m68hc11_gencode_OBJECTS) $(m68hc11_gencode_LDADD)
4637
4638 # gencode is a build-time only tool. Override the default rules for it.
4639 @SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11/gencode.o: m68hc11/gencode.c
4640 @SIM_ENABLE_ARCH_m68hc11_TRUE@ $(AM_V_CC)$(COMPILE_FOR_BUILD) -c $< -o $@
4641
4642 @SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11/m68hc11int.c: m68hc11/gencode$(EXEEXT)
4643 @SIM_ENABLE_ARCH_m68hc11_TRUE@ $(AM_V_GEN)$< -m6811 >$@
4644
4645 @SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11/m68hc12int.c: m68hc11/gencode$(EXEEXT)
4646 @SIM_ENABLE_ARCH_m68hc11_TRUE@ $(AM_V_GEN)$< -m6812 >$@
4647 @SIM_ENABLE_ARCH_mcore_TRUE@$(mcore_libsim_a_OBJECTS) $(mcore_libsim_a_LIBADD): mcore/hw-config.h
4648
4649 @SIM_ENABLE_ARCH_mcore_TRUE@mcore/%.o: mcore/%.c
4650 @SIM_ENABLE_ARCH_mcore_TRUE@ $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
4651
4652 @SIM_ENABLE_ARCH_mcore_TRUE@mcore/%.o: common/%.c
4653 @SIM_ENABLE_ARCH_mcore_TRUE@ $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
4654 @SIM_ENABLE_ARCH_mips_TRUE@mips/modules.c: | $(mips_BUILD_OUTPUTS)
4655
4656 @SIM_ENABLE_ARCH_mips_TRUE@$(mips_BUILT_SRC_FROM_IGEN_ITABLE): mips/stamp-igen-itable
4657 @SIM_ENABLE_ARCH_mips_TRUE@$(mips_BUILT_SRC_FROM_GEN_MODE_SINGLE): mips/stamp-gen-mode-single
4658 @SIM_ENABLE_ARCH_mips_TRUE@$(mips_BUILT_SRC_FROM_GEN_MODE_M16_M16): mips/stamp-gen-mode-m16-m16
4659 @SIM_ENABLE_ARCH_mips_TRUE@$(mips_BUILT_SRC_FROM_GEN_MODE_M16_M32): mips/stamp-gen-mode-m16-m32
4660 @SIM_ENABLE_ARCH_mips_TRUE@$(SIM_MIPS_MULTI_SRC): mips/stamp-gen-mode-multi-igen mips/stamp-gen-mode-multi-run
4661
4662 @SIM_ENABLE_ARCH_mips_TRUE@mips/stamp-igen-itable: $(mips_IGEN_INSN) $(mips_IGEN_INSN_INC) $(IGEN)
4663 @SIM_ENABLE_ARCH_mips_TRUE@ $(AM_V_GEN)$(IGEN_RUN) \
4664 @SIM_ENABLE_ARCH_mips_TRUE@ $(mips_IGEN_TRACE) \
4665 @SIM_ENABLE_ARCH_mips_TRUE@ -I $(srcdir)/mips \
4666 @SIM_ENABLE_ARCH_mips_TRUE@ -Werror \
4667 @SIM_ENABLE_ARCH_mips_TRUE@ -Wnodiscard \
4668 @SIM_ENABLE_ARCH_mips_TRUE@ -Wnowidth \
4669 @SIM_ENABLE_ARCH_mips_TRUE@ -Wnounimplemented \
4670 @SIM_ENABLE_ARCH_mips_TRUE@ $(SIM_MIPS_IGEN_ITABLE_FLAGS) \
4671 @SIM_ENABLE_ARCH_mips_TRUE@ -G gen-direct-access \
4672 @SIM_ENABLE_ARCH_mips_TRUE@ -G gen-zero-r0 \
4673 @SIM_ENABLE_ARCH_mips_TRUE@ -i $(mips_IGEN_INSN) \
4674 @SIM_ENABLE_ARCH_mips_TRUE@ -n itable.h -ht mips/itable.h \
4675 @SIM_ENABLE_ARCH_mips_TRUE@ -n itable.c -t mips/itable.c
4676 @SIM_ENABLE_ARCH_mips_TRUE@ $(AM_V_at)touch $@
4677
4678 @SIM_ENABLE_ARCH_mips_TRUE@mips/stamp-gen-mode-single: $(mips_IGEN_INSN) $(mips_IGEN_INSN_INC) $(mips_IGEN_DC) $(IGEN)
4679 @SIM_ENABLE_ARCH_mips_TRUE@ $(AM_V_GEN)$(IGEN_RUN) \
4680 @SIM_ENABLE_ARCH_mips_TRUE@ $(mips_IGEN_TRACE) \
4681 @SIM_ENABLE_ARCH_mips_TRUE@ -I $(srcdir)/mips \
4682 @SIM_ENABLE_ARCH_mips_TRUE@ -Werror \
4683 @SIM_ENABLE_ARCH_mips_TRUE@ -Wnodiscard \
4684 @SIM_ENABLE_ARCH_mips_TRUE@ $(SIM_MIPS_SINGLE_FLAGS) \
4685 @SIM_ENABLE_ARCH_mips_TRUE@ -G gen-direct-access \
4686 @SIM_ENABLE_ARCH_mips_TRUE@ -G gen-zero-r0 \
4687 @SIM_ENABLE_ARCH_mips_TRUE@ -B 32 \
4688 @SIM_ENABLE_ARCH_mips_TRUE@ -H 31 \
4689 @SIM_ENABLE_ARCH_mips_TRUE@ -i $(mips_IGEN_INSN) \
4690 @SIM_ENABLE_ARCH_mips_TRUE@ -o $(mips_IGEN_DC) \
4691 @SIM_ENABLE_ARCH_mips_TRUE@ -x \
4692 @SIM_ENABLE_ARCH_mips_TRUE@ -n icache.h -hc mips/icache.h \
4693 @SIM_ENABLE_ARCH_mips_TRUE@ -n icache.c -c mips/icache.c \
4694 @SIM_ENABLE_ARCH_mips_TRUE@ -n semantics.h -hs mips/semantics.h \
4695 @SIM_ENABLE_ARCH_mips_TRUE@ -n semantics.c -s mips/semantics.c \
4696 @SIM_ENABLE_ARCH_mips_TRUE@ -n idecode.h -hd mips/idecode.h \
4697 @SIM_ENABLE_ARCH_mips_TRUE@ -n idecode.c -d mips/idecode.c \
4698 @SIM_ENABLE_ARCH_mips_TRUE@ -n model.h -hm mips/model.h \
4699 @SIM_ENABLE_ARCH_mips_TRUE@ -n model.c -m mips/model.c \
4700 @SIM_ENABLE_ARCH_mips_TRUE@ -n support.h -hf mips/support.h \
4701 @SIM_ENABLE_ARCH_mips_TRUE@ -n support.c -f mips/support.c \
4702 @SIM_ENABLE_ARCH_mips_TRUE@ -n engine.h -he mips/engine.h \
4703 @SIM_ENABLE_ARCH_mips_TRUE@ -n engine.c -e mips/engine.c \
4704 @SIM_ENABLE_ARCH_mips_TRUE@ -n irun.c -r mips/irun.c
4705 @SIM_ENABLE_ARCH_mips_TRUE@ $(AM_V_at)touch $@
4706
4707 @SIM_ENABLE_ARCH_mips_TRUE@mips/stamp-gen-mode-m16-m16: $(mips_IGEN_INSN) $(mips_IGEN_INSN_INC) $(mips_M16_DC) $(IGEN)
4708 @SIM_ENABLE_ARCH_mips_TRUE@ $(AM_V_GEN)$(IGEN_RUN) \
4709 @SIM_ENABLE_ARCH_mips_TRUE@ $(mips_IGEN_TRACE) \
4710 @SIM_ENABLE_ARCH_mips_TRUE@ -I $(srcdir)/mips \
4711 @SIM_ENABLE_ARCH_mips_TRUE@ -Werror \
4712 @SIM_ENABLE_ARCH_mips_TRUE@ -Wnodiscard \
4713 @SIM_ENABLE_ARCH_mips_TRUE@ $(SIM_MIPS_M16_FLAGS) \
4714 @SIM_ENABLE_ARCH_mips_TRUE@ -G gen-direct-access \
4715 @SIM_ENABLE_ARCH_mips_TRUE@ -G gen-zero-r0 \
4716 @SIM_ENABLE_ARCH_mips_TRUE@ -B 16 \
4717 @SIM_ENABLE_ARCH_mips_TRUE@ -H 15 \
4718 @SIM_ENABLE_ARCH_mips_TRUE@ -i $(mips_IGEN_INSN) \
4719 @SIM_ENABLE_ARCH_mips_TRUE@ -o $(mips_M16_DC) \
4720 @SIM_ENABLE_ARCH_mips_TRUE@ -P m16_ \
4721 @SIM_ENABLE_ARCH_mips_TRUE@ -x \
4722 @SIM_ENABLE_ARCH_mips_TRUE@ -n m16_icache.h -hc mips/m16_icache.h \
4723 @SIM_ENABLE_ARCH_mips_TRUE@ -n m16_icache.c -c mips/m16_icache.c \
4724 @SIM_ENABLE_ARCH_mips_TRUE@ -n m16_semantics.h -hs mips/m16_semantics.h \
4725 @SIM_ENABLE_ARCH_mips_TRUE@ -n m16_semantics.c -s mips/m16_semantics.c \
4726 @SIM_ENABLE_ARCH_mips_TRUE@ -n m16_idecode.h -hd mips/m16_idecode.h \
4727 @SIM_ENABLE_ARCH_mips_TRUE@ -n m16_idecode.c -d mips/m16_idecode.c \
4728 @SIM_ENABLE_ARCH_mips_TRUE@ -n m16_model.h -hm mips/m16_model.h \
4729 @SIM_ENABLE_ARCH_mips_TRUE@ -n m16_model.c -m mips/m16_model.c \
4730 @SIM_ENABLE_ARCH_mips_TRUE@ -n m16_support.h -hf mips/m16_support.h \
4731 @SIM_ENABLE_ARCH_mips_TRUE@ -n m16_support.c -f mips/m16_support.c
4732 @SIM_ENABLE_ARCH_mips_TRUE@ $(AM_V_at)touch $@
4733
4734 @SIM_ENABLE_ARCH_mips_TRUE@mips/stamp-gen-mode-m16-m32: $(mips_IGEN_INSN) $(mips_IGEN_INSN_INC) $(mips_IGEN_DC) $(IGEN)
4735 @SIM_ENABLE_ARCH_mips_TRUE@ $(AM_V_GEN)$(IGEN_RUN) \
4736 @SIM_ENABLE_ARCH_mips_TRUE@ $(mips_IGEN_TRACE) \
4737 @SIM_ENABLE_ARCH_mips_TRUE@ -I $(srcdir)/mips \
4738 @SIM_ENABLE_ARCH_mips_TRUE@ -Werror \
4739 @SIM_ENABLE_ARCH_mips_TRUE@ -Wnodiscard \
4740 @SIM_ENABLE_ARCH_mips_TRUE@ $(SIM_MIPS_SINGLE_FLAGS) \
4741 @SIM_ENABLE_ARCH_mips_TRUE@ -G gen-direct-access \
4742 @SIM_ENABLE_ARCH_mips_TRUE@ -G gen-zero-r0 \
4743 @SIM_ENABLE_ARCH_mips_TRUE@ -B 32 \
4744 @SIM_ENABLE_ARCH_mips_TRUE@ -H 31 \
4745 @SIM_ENABLE_ARCH_mips_TRUE@ -i $(mips_IGEN_INSN) \
4746 @SIM_ENABLE_ARCH_mips_TRUE@ -o $(mips_IGEN_DC) \
4747 @SIM_ENABLE_ARCH_mips_TRUE@ -P m32_ \
4748 @SIM_ENABLE_ARCH_mips_TRUE@ -x \
4749 @SIM_ENABLE_ARCH_mips_TRUE@ -n m32_icache.h -hc mips/m32_icache.h \
4750 @SIM_ENABLE_ARCH_mips_TRUE@ -n m32_icache.c -c mips/m32_icache.c \
4751 @SIM_ENABLE_ARCH_mips_TRUE@ -n m32_semantics.h -hs mips/m32_semantics.h \
4752 @SIM_ENABLE_ARCH_mips_TRUE@ -n m32_semantics.c -s mips/m32_semantics.c \
4753 @SIM_ENABLE_ARCH_mips_TRUE@ -n m32_idecode.h -hd mips/m32_idecode.h \
4754 @SIM_ENABLE_ARCH_mips_TRUE@ -n m32_idecode.c -d mips/m32_idecode.c \
4755 @SIM_ENABLE_ARCH_mips_TRUE@ -n m32_model.h -hm mips/m32_model.h \
4756 @SIM_ENABLE_ARCH_mips_TRUE@ -n m32_model.c -m mips/m32_model.c \
4757 @SIM_ENABLE_ARCH_mips_TRUE@ -n m32_support.h -hf mips/m32_support.h \
4758 @SIM_ENABLE_ARCH_mips_TRUE@ -n m32_support.c -f mips/m32_support.c
4759 @SIM_ENABLE_ARCH_mips_TRUE@ $(AM_V_at)touch $@
4760
4761 @SIM_ENABLE_ARCH_mips_TRUE@mips/stamp-gen-mode-multi-igen: $(mips_IGEN_INSN) $(mips_IGEN_INSN_INC) $(mips_IGEN_DC) $(mips_M16_DC) $(mips_MICROMIPS32_DC) $(mips_MICROMIPS16_DC) $(IGEN)
4762 @SIM_ENABLE_ARCH_mips_TRUE@ $(AM_V_GEN)\
4763 @SIM_ENABLE_ARCH_mips_TRUE@ for t in $(SIM_MIPS_MULTI_IGEN_CONFIGS); do \
4764 @SIM_ENABLE_ARCH_mips_TRUE@ p=`echo $${t} | sed -e 's/:.*//'` ; \
4765 @SIM_ENABLE_ARCH_mips_TRUE@ m=`echo $${t} | sed -e 's/.*:\(.*\):.*/\1/'` ; \
4766 @SIM_ENABLE_ARCH_mips_TRUE@ f=`echo $${t} | sed -e 's/.*://'` ; \
4767 @SIM_ENABLE_ARCH_mips_TRUE@ case $${p} in \
4768 @SIM_ENABLE_ARCH_mips_TRUE@ micromips16*) \
4769 @SIM_ENABLE_ARCH_mips_TRUE@ e="-B 16 -H 15 -o $(mips_MICROMIPS16_DC) -F 16" ;; \
4770 @SIM_ENABLE_ARCH_mips_TRUE@ micromips32* | micromips64*) \
4771 @SIM_ENABLE_ARCH_mips_TRUE@ e="-B 32 -H 31 -o $(mips_MICROMIPS32_DC) -F $${f}" ;; \
4772 @SIM_ENABLE_ARCH_mips_TRUE@ micromips_m32*) \
4773 @SIM_ENABLE_ARCH_mips_TRUE@ e="-B 32 -H 31 -o $(mips_IGEN_DC) -F $${f}"; \
4774 @SIM_ENABLE_ARCH_mips_TRUE@ m="mips32r2,mips3d,mdmx,dsp,dsp2,smartmips" ;; \
4775 @SIM_ENABLE_ARCH_mips_TRUE@ micromips_m64*) \
4776 @SIM_ENABLE_ARCH_mips_TRUE@ e="-B 32 -H 31 -o $(mips_IGEN_DC) -F $${f}"; \
4777 @SIM_ENABLE_ARCH_mips_TRUE@ m="mips64r2,mips3d,mdmx,dsp,dsp2,smartmips" ;; \
4778 @SIM_ENABLE_ARCH_mips_TRUE@ m16*) \
4779 @SIM_ENABLE_ARCH_mips_TRUE@ e="-B 16 -H 15 -o $(mips_M16_DC) -F 16" ;; \
4780 @SIM_ENABLE_ARCH_mips_TRUE@ *) \
4781 @SIM_ENABLE_ARCH_mips_TRUE@ e="-B 32 -H 31 -o $(mips_IGEN_DC) -F $${f}" ;; \
4782 @SIM_ENABLE_ARCH_mips_TRUE@ esac; \
4783 @SIM_ENABLE_ARCH_mips_TRUE@ $(IGEN_RUN) \
4784 @SIM_ENABLE_ARCH_mips_TRUE@ $(mips_IGEN_TRACE) \
4785 @SIM_ENABLE_ARCH_mips_TRUE@ $${e} \
4786 @SIM_ENABLE_ARCH_mips_TRUE@ -I $(srcdir)/mips \
4787 @SIM_ENABLE_ARCH_mips_TRUE@ -Werror \
4788 @SIM_ENABLE_ARCH_mips_TRUE@ -Wnodiscard \
4789 @SIM_ENABLE_ARCH_mips_TRUE@ -M $${m} \
4790 @SIM_ENABLE_ARCH_mips_TRUE@ -G gen-direct-access \
4791 @SIM_ENABLE_ARCH_mips_TRUE@ -G gen-zero-r0 \
4792 @SIM_ENABLE_ARCH_mips_TRUE@ -i $(mips_IGEN_INSN) \
4793 @SIM_ENABLE_ARCH_mips_TRUE@ -P $${p}_ \
4794 @SIM_ENABLE_ARCH_mips_TRUE@ -x \
4795 @SIM_ENABLE_ARCH_mips_TRUE@ -n $${p}_icache.h -hc mips/$${p}_icache.h \
4796 @SIM_ENABLE_ARCH_mips_TRUE@ -n $${p}_icache.c -c mips/$${p}_icache.c \
4797 @SIM_ENABLE_ARCH_mips_TRUE@ -n $${p}_semantics.h -hs mips/$${p}_semantics.h \
4798 @SIM_ENABLE_ARCH_mips_TRUE@ -n $${p}_semantics.c -s mips/$${p}_semantics.c \
4799 @SIM_ENABLE_ARCH_mips_TRUE@ -n $${p}_idecode.h -hd mips/$${p}_idecode.h \
4800 @SIM_ENABLE_ARCH_mips_TRUE@ -n $${p}_idecode.c -d mips/$${p}_idecode.c \
4801 @SIM_ENABLE_ARCH_mips_TRUE@ -n $${p}_model.h -hm mips/$${p}_model.h \
4802 @SIM_ENABLE_ARCH_mips_TRUE@ -n $${p}_model.c -m mips/$${p}_model.c \
4803 @SIM_ENABLE_ARCH_mips_TRUE@ -n $${p}_support.h -hf mips/$${p}_support.h \
4804 @SIM_ENABLE_ARCH_mips_TRUE@ -n $${p}_support.c -f mips/$${p}_support.c \
4805 @SIM_ENABLE_ARCH_mips_TRUE@ -n $${p}_engine.h -he mips/$${p}_engine.h \
4806 @SIM_ENABLE_ARCH_mips_TRUE@ -n $${p}_engine.c -e mips/$${p}_engine.c \
4807 @SIM_ENABLE_ARCH_mips_TRUE@ || exit; \
4808 @SIM_ENABLE_ARCH_mips_TRUE@ done
4809 @SIM_ENABLE_ARCH_mips_TRUE@ $(AM_V_at)touch $@
4810
4811 @SIM_ENABLE_ARCH_mips_TRUE@mips/stamp-gen-mode-multi-run: mips/m16run.c mips/micromipsrun.c
4812 @SIM_ENABLE_ARCH_mips_TRUE@ $(AM_V_GEN)\
4813 @SIM_ENABLE_ARCH_mips_TRUE@ for t in $(SIM_MIPS_MULTI_IGEN_CONFIGS); do \
4814 @SIM_ENABLE_ARCH_mips_TRUE@ case $${t} in \
4815 @SIM_ENABLE_ARCH_mips_TRUE@ m16*) \
4816 @SIM_ENABLE_ARCH_mips_TRUE@ m=`echo $${t} | sed -e 's/^m16//' -e 's/:.*//'`; \
4817 @SIM_ENABLE_ARCH_mips_TRUE@ o=mips/m16$${m}_run.c; \
4818 @SIM_ENABLE_ARCH_mips_TRUE@ sed < $(srcdir)/mips/m16run.c > $$o.tmp \
4819 @SIM_ENABLE_ARCH_mips_TRUE@ -e "s/^sim_/m16$${m}_/" \
4820 @SIM_ENABLE_ARCH_mips_TRUE@ -e "/include/s/sim-engine/m16$${m}_engine/" \
4821 @SIM_ENABLE_ARCH_mips_TRUE@ -e "s/m16_/m16$${m}_/" \
4822 @SIM_ENABLE_ARCH_mips_TRUE@ -e "s/m32_/m32$${m}_/" \
4823 @SIM_ENABLE_ARCH_mips_TRUE@ || exit 1; \
4824 @SIM_ENABLE_ARCH_mips_TRUE@ $(SHELL) $(srcroot)/move-if-change $$o.tmp $$o; \
4825 @SIM_ENABLE_ARCH_mips_TRUE@ ;;\
4826 @SIM_ENABLE_ARCH_mips_TRUE@ micromips32*) \
4827 @SIM_ENABLE_ARCH_mips_TRUE@ m=`echo $${t} | sed -e 's/^micromips32//' -e 's/:.*//'`; \
4828 @SIM_ENABLE_ARCH_mips_TRUE@ o=mips/micromips$${m}_run.c; \
4829 @SIM_ENABLE_ARCH_mips_TRUE@ sed < $(srcdir)/mips/micromipsrun.c > $$o.tmp \
4830 @SIM_ENABLE_ARCH_mips_TRUE@ -e "s/^sim_/micromips32$${m}_/" \
4831 @SIM_ENABLE_ARCH_mips_TRUE@ -e "/include/s/sim-engine/micromips32$${m}_engine/" \
4832 @SIM_ENABLE_ARCH_mips_TRUE@ -e "s/micromips16_/micromips16$${m}_/" \
4833 @SIM_ENABLE_ARCH_mips_TRUE@ -e "s/micromips32_/micromips32$${m}_/" \
4834 @SIM_ENABLE_ARCH_mips_TRUE@ -e "s/m32_/m32$${m}_/" \
4835 @SIM_ENABLE_ARCH_mips_TRUE@ || exit 1; \
4836 @SIM_ENABLE_ARCH_mips_TRUE@ $(SHELL) $(srcroot)/move-if-change $$o.tmp $$o; \
4837 @SIM_ENABLE_ARCH_mips_TRUE@ ;;\
4838 @SIM_ENABLE_ARCH_mips_TRUE@ micromips64*) \
4839 @SIM_ENABLE_ARCH_mips_TRUE@ m=`echo $${t} | sed -e 's/^micromips64//' -e 's/:.*//'`; \
4840 @SIM_ENABLE_ARCH_mips_TRUE@ o=mips/micromips$${m}_run.c; \
4841 @SIM_ENABLE_ARCH_mips_TRUE@ sed < $(srcdir)/mips/micromipsrun.c > $$o.tmp \
4842 @SIM_ENABLE_ARCH_mips_TRUE@ -e "s/^sim_/micromips64$${m}_/" \
4843 @SIM_ENABLE_ARCH_mips_TRUE@ -e "/include/s/sim-engine/micromips64$${m}_engine/" \
4844 @SIM_ENABLE_ARCH_mips_TRUE@ -e "s/micromips16_/micromips16$${m}_/" \
4845 @SIM_ENABLE_ARCH_mips_TRUE@ -e "s/micromips32_/micromips64$${m}_/" \
4846 @SIM_ENABLE_ARCH_mips_TRUE@ -e "s/m32_/m64$${m}_/" \
4847 @SIM_ENABLE_ARCH_mips_TRUE@ || exit 1; \
4848 @SIM_ENABLE_ARCH_mips_TRUE@ $(SHELL) $(srcroot)/move-if-change $$o.tmp $$o; \
4849 @SIM_ENABLE_ARCH_mips_TRUE@ ;;\
4850 @SIM_ENABLE_ARCH_mips_TRUE@ esac \
4851 @SIM_ENABLE_ARCH_mips_TRUE@ done
4852 @SIM_ENABLE_ARCH_mips_TRUE@ $(AM_V_at)touch $@
4853 @SIM_ENABLE_ARCH_mn10300_TRUE@mn10300/modules.c: | $(mn10300_BUILD_OUTPUTS)
4854
4855 @SIM_ENABLE_ARCH_mn10300_TRUE@$(mn10300_BUILT_SRC_FROM_IGEN): mn10300/stamp-igen
4856 @SIM_ENABLE_ARCH_mn10300_TRUE@mn10300/stamp-igen: $(mn10300_IGEN_INSN) $(mn10300_IGEN_INSN_INC) $(mn10300_IGEN_DC) $(IGEN)
4857 @SIM_ENABLE_ARCH_mn10300_TRUE@ $(AM_V_GEN)$(IGEN_RUN) \
4858 @SIM_ENABLE_ARCH_mn10300_TRUE@ $(mn10300_IGEN_TRACE) \
4859 @SIM_ENABLE_ARCH_mn10300_TRUE@ -G gen-direct-access \
4860 @SIM_ENABLE_ARCH_mn10300_TRUE@ -M mn10300,am33 -G gen-multi-sim=am33 \
4861 @SIM_ENABLE_ARCH_mn10300_TRUE@ -M am33_2 \
4862 @SIM_ENABLE_ARCH_mn10300_TRUE@ -I $(srcdir)/mn10300 \
4863 @SIM_ENABLE_ARCH_mn10300_TRUE@ -i $(mn10300_IGEN_INSN) \
4864 @SIM_ENABLE_ARCH_mn10300_TRUE@ -o $(mn10300_IGEN_DC) \
4865 @SIM_ENABLE_ARCH_mn10300_TRUE@ -x \
4866 @SIM_ENABLE_ARCH_mn10300_TRUE@ -n icache.h -hc mn10300/icache.h \
4867 @SIM_ENABLE_ARCH_mn10300_TRUE@ -n icache.c -c mn10300/icache.c \
4868 @SIM_ENABLE_ARCH_mn10300_TRUE@ -n semantics.h -hs mn10300/semantics.h \
4869 @SIM_ENABLE_ARCH_mn10300_TRUE@ -n semantics.c -s mn10300/semantics.c \
4870 @SIM_ENABLE_ARCH_mn10300_TRUE@ -n idecode.h -hd mn10300/idecode.h \
4871 @SIM_ENABLE_ARCH_mn10300_TRUE@ -n idecode.c -d mn10300/idecode.c \
4872 @SIM_ENABLE_ARCH_mn10300_TRUE@ -n model.h -hm mn10300/model.h \
4873 @SIM_ENABLE_ARCH_mn10300_TRUE@ -n model.c -m mn10300/model.c \
4874 @SIM_ENABLE_ARCH_mn10300_TRUE@ -n support.h -hf mn10300/support.h \
4875 @SIM_ENABLE_ARCH_mn10300_TRUE@ -n support.c -f mn10300/support.c \
4876 @SIM_ENABLE_ARCH_mn10300_TRUE@ -n itable.h -ht mn10300/itable.h \
4877 @SIM_ENABLE_ARCH_mn10300_TRUE@ -n itable.c -t mn10300/itable.c \
4878 @SIM_ENABLE_ARCH_mn10300_TRUE@ -n engine.h -he mn10300/engine.h \
4879 @SIM_ENABLE_ARCH_mn10300_TRUE@ -n engine.c -e mn10300/engine.c \
4880 @SIM_ENABLE_ARCH_mn10300_TRUE@ -n irun.c -r mn10300/irun.c
4881 @SIM_ENABLE_ARCH_mn10300_TRUE@ $(AM_V_at)touch $@
4882
4883 @SIM_ENABLE_ARCH_moxie_TRUE@moxie/moxie-gdb.dtb: @MAINT@ moxie/moxie-gdb.dts moxie/$(am__dirstamp)
4884 @SIM_ENABLE_ARCH_moxie_TRUE@ $(AM_V_GEN) \
4885 @SIM_ENABLE_ARCH_moxie_TRUE@ if test "x$(DTC)" != x; then \
4886 @SIM_ENABLE_ARCH_moxie_TRUE@ $(DTC) -O dtb -o $@.tmp ${srcdir}/moxie/moxie-gdb.dts || exit 1; \
4887 @SIM_ENABLE_ARCH_moxie_TRUE@ $(SHELL) $(srcroot)/move-if-change $@.tmp ${srcdir}/moxie/moxie-gdb.dtb || exit 1; \
4888 @SIM_ENABLE_ARCH_moxie_TRUE@ touch ${srcdir}/moxie/moxie-gdb.dtb; \
4889 @SIM_ENABLE_ARCH_moxie_TRUE@ else \
4890 @SIM_ENABLE_ARCH_moxie_TRUE@ echo "Could not update the moxie-gdb.dtb file because the device "; \
4891 @SIM_ENABLE_ARCH_moxie_TRUE@ echo "tree compiler tool (dtc) is missing. Install the tool to "; \
4892 @SIM_ENABLE_ARCH_moxie_TRUE@ echo "update the device tree blob."; \
4893 @SIM_ENABLE_ARCH_moxie_TRUE@ fi
4894 @SIM_ENABLE_ARCH_or1k_TRUE@or1k/modules.c: | $(or1k_BUILD_OUTPUTS)
4895
4896 @SIM_ENABLE_ARCH_or1k_TRUE@or1k/mloop.c or1k/eng.h: or1k/stamp-mloop ; @true
4897 @SIM_ENABLE_ARCH_or1k_TRUE@or1k/stamp-mloop: $(srccom)/genmloop.sh or1k/mloop.in
4898 @SIM_ENABLE_ARCH_or1k_TRUE@ $(AM_V_GEN)$(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \
4899 @SIM_ENABLE_ARCH_or1k_TRUE@ -mono -fast -pbb -switch sem-switch.c \
4900 @SIM_ENABLE_ARCH_or1k_TRUE@ -cpu or1k32bf \
4901 @SIM_ENABLE_ARCH_or1k_TRUE@ -infile $(srcdir)/or1k/mloop.in -outfile-prefix or1k/
4902 @SIM_ENABLE_ARCH_or1k_TRUE@ $(AM_V_at)$(SHELL) $(srcroot)/move-if-change or1k/eng.hin or1k/eng.h
4903 @SIM_ENABLE_ARCH_or1k_TRUE@ $(AM_V_at)$(SHELL) $(srcroot)/move-if-change or1k/mloop.cin or1k/mloop.c
4904 @SIM_ENABLE_ARCH_or1k_TRUE@ $(AM_V_at)touch $@
4905
4906 @SIM_ENABLE_ARCH_or1k_TRUE@or1k/cgen: or1k/cgen-arch or1k/cgen-cpu-decode
4907
4908 @SIM_ENABLE_ARCH_or1k_TRUE@or1k/cgen-arch:
4909 @SIM_ENABLE_ARCH_or1k_TRUE@ $(AM_V_GEN)mach=or32,or32nd FLAGS="with-scache"; $(CGEN_GEN_ARCH)
4910 @SIM_ENABLE_ARCH_or1k_TRUE@or1k/arch.h or1k/arch.c or1k/cpuall.h: @CGEN_MAINT@ or1k/cgen-arch
4911
4912 @SIM_ENABLE_ARCH_or1k_TRUE@or1k/cgen-cpu-decode:
4913 @SIM_ENABLE_ARCH_or1k_TRUE@ $(AM_V_GEN)cpu=or1k32bf mach=or32,or32nd FLAGS="with-scache" EXTRAFILES="$(CGEN_CPU_SEM) $(CGEN_CPU_SEMSW)"; $(CGEN_GEN_CPU_DECODE)
4914 @SIM_ENABLE_ARCH_or1k_TRUE@or1k/cpu.h or1k/cpu.c or1k/model.c or1k/sem.c or1k/sem-switch.c or1k/decode.c or1k/decode.h: @CGEN_MAINT@ or1k/cgen-cpu-decode
4915
4916 @SIM_ENABLE_ARCH_ppc_TRUE@ppc/psim$(EXEEXT): ppc/run$(EXEEXT)
4917 @SIM_ENABLE_ARCH_ppc_TRUE@ $(AM_V_GEN)ln $< $@ 2>/dev/null || $(LN_S) $< $@ 2>/dev/null || cp -p $< $@
4918
4919 @SIM_ENABLE_ARCH_ppc_TRUE@ppc/%.o: ppc/%.c | ppc/libsim.a $(SIM_ALL_RECURSIVE_DEPS)
4920 @SIM_ENABLE_ARCH_ppc_TRUE@ $(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
4921
4922 @SIM_ENABLE_ARCH_ppc_TRUE@ppc/spreg.c: @MAINT@ ppc/ppc-spr-table ppc/spreg-gen.py ppc/$(am__dirstamp)
4923 @SIM_ENABLE_ARCH_ppc_TRUE@ $(AM_V_GEN)$(srcdir)/ppc/spreg-gen.py --source $@.tmp
4924 @SIM_ENABLE_ARCH_ppc_TRUE@ $(AM_V_at)$(SHELL) $(srcroot)/move-if-change $@.tmp $(srcdir)/ppc/spreg.c
4925 @SIM_ENABLE_ARCH_ppc_TRUE@ $(AM_V_at)touch $(srcdir)/ppc/spreg.c
4926
4927 @SIM_ENABLE_ARCH_ppc_TRUE@ppc/spreg.h: @MAINT@ ppc/ppc-spr-table ppc/spreg-gen.py ppc/$(am__dirstamp)
4928 @SIM_ENABLE_ARCH_ppc_TRUE@ $(AM_V_GEN)$(srcdir)/ppc/spreg-gen.py --header $@.tmp
4929 @SIM_ENABLE_ARCH_ppc_TRUE@ $(AM_V_at)$(SHELL) $(srcroot)/move-if-change $@.tmp $(srcdir)/ppc/spreg.h
4930 @SIM_ENABLE_ARCH_ppc_TRUE@ $(AM_V_at)touch $(srcdir)/ppc/spreg.h
4931
4932 @SIM_ENABLE_ARCH_rl78_TRUE@rl78/%.o: rl78/%.c | rl78/libsim.a $(SIM_ALL_RECURSIVE_DEPS)
4933 @SIM_ENABLE_ARCH_rl78_TRUE@ $(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
4934
4935 @SIM_ENABLE_ARCH_rx_TRUE@rx/%.o: rx/%.c | rx/libsim.a $(SIM_ALL_RECURSIVE_DEPS)
4936 @SIM_ENABLE_ARCH_rx_TRUE@ $(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
4937 @SIM_ENABLE_ARCH_sh_TRUE@sh/modules.c: | $(sh_BUILD_OUTPUTS)
4938
4939 # These rules are copied from automake, but tweaked to use FOR_BUILD variables.
4940 @SIM_ENABLE_ARCH_sh_TRUE@sh/gencode$(EXEEXT): $(sh_gencode_OBJECTS) $(sh_gencode_DEPENDENCIES) sh/$(am__dirstamp)
4941 @SIM_ENABLE_ARCH_sh_TRUE@ $(AM_V_CCLD)$(LINK_FOR_BUILD) $(sh_gencode_OBJECTS) $(sh_gencode_LDADD)
4942
4943 # gencode is a build-time only tool. Override the default rules for it.
4944 @SIM_ENABLE_ARCH_sh_TRUE@sh/gencode.o: sh/gencode.c
4945 @SIM_ENABLE_ARCH_sh_TRUE@ $(AM_V_CC)$(COMPILE_FOR_BUILD) -c $< -o $@
4946
4947 @SIM_ENABLE_ARCH_sh_TRUE@sh/code.c: sh/gencode$(EXEEXT)
4948 @SIM_ENABLE_ARCH_sh_TRUE@ $(AM_V_GEN)$< -x >$@
4949
4950 @SIM_ENABLE_ARCH_sh_TRUE@sh/ppi.c: sh/gencode$(EXEEXT)
4951 @SIM_ENABLE_ARCH_sh_TRUE@ $(AM_V_GEN)$< -p >$@
4952
4953 @SIM_ENABLE_ARCH_sh_TRUE@sh/table.c: sh/gencode$(EXEEXT)
4954 @SIM_ENABLE_ARCH_sh_TRUE@ $(AM_V_GEN)$< -s >$@
4955 @SIM_ENABLE_ARCH_v850_TRUE@v850/modules.c: | $(v850_BUILD_OUTPUTS)
4956
4957 @SIM_ENABLE_ARCH_v850_TRUE@$(v850_BUILT_SRC_FROM_IGEN): v850/stamp-igen
4958 @SIM_ENABLE_ARCH_v850_TRUE@v850/stamp-igen: $(v850_IGEN_INSN) $(v850_IGEN_DC) $(IGEN)
4959 @SIM_ENABLE_ARCH_v850_TRUE@ $(AM_V_GEN)$(IGEN_RUN) \
4960 @SIM_ENABLE_ARCH_v850_TRUE@ $(v850_IGEN_TRACE) \
4961 @SIM_ENABLE_ARCH_v850_TRUE@ -G gen-direct-access \
4962 @SIM_ENABLE_ARCH_v850_TRUE@ -G gen-zero-r0 \
4963 @SIM_ENABLE_ARCH_v850_TRUE@ -i $(v850_IGEN_INSN) \
4964 @SIM_ENABLE_ARCH_v850_TRUE@ -o $(v850_IGEN_DC) \
4965 @SIM_ENABLE_ARCH_v850_TRUE@ -x \
4966 @SIM_ENABLE_ARCH_v850_TRUE@ -n icache.h -hc v850/icache.h \
4967 @SIM_ENABLE_ARCH_v850_TRUE@ -n icache.c -c v850/icache.c \
4968 @SIM_ENABLE_ARCH_v850_TRUE@ -n semantics.h -hs v850/semantics.h \
4969 @SIM_ENABLE_ARCH_v850_TRUE@ -n semantics.c -s v850/semantics.c \
4970 @SIM_ENABLE_ARCH_v850_TRUE@ -n idecode.h -hd v850/idecode.h \
4971 @SIM_ENABLE_ARCH_v850_TRUE@ -n idecode.c -d v850/idecode.c \
4972 @SIM_ENABLE_ARCH_v850_TRUE@ -n model.h -hm v850/model.h \
4973 @SIM_ENABLE_ARCH_v850_TRUE@ -n model.c -m v850/model.c \
4974 @SIM_ENABLE_ARCH_v850_TRUE@ -n support.h -hf v850/support.h \
4975 @SIM_ENABLE_ARCH_v850_TRUE@ -n support.c -f v850/support.c \
4976 @SIM_ENABLE_ARCH_v850_TRUE@ -n itable.h -ht v850/itable.h \
4977 @SIM_ENABLE_ARCH_v850_TRUE@ -n itable.c -t v850/itable.c \
4978 @SIM_ENABLE_ARCH_v850_TRUE@ -n engine.h -he v850/engine.h \
4979 @SIM_ENABLE_ARCH_v850_TRUE@ -n engine.c -e v850/engine.c \
4980 @SIM_ENABLE_ARCH_v850_TRUE@ -n irun.c -r v850/irun.c
4981 @SIM_ENABLE_ARCH_v850_TRUE@ $(AM_V_at)touch $@
4982
4983 %/libsim.a: | $(SIM_ALL_RECURSIVE_DEPS)
4984 $(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
4985
4986 %/nrun.o: common/nrun.c | %/libsim.a $(SIM_ALL_RECURSIVE_DEPS)
4987 $(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
4988
4989 all-recursive: $(SIM_ALL_RECURSIVE_DEPS)
4990
4991 install-data-local: installdirs $(SIM_INSTALL_DATA_LOCAL_DEPS)
4992 $(AM_V_at)$(MKDIR_P) $(DESTDIR)$(libdir)
4993 lib=`echo sim | sed '$(program_transform_name)'`; \
4994 for d in $(SIM_ENABLED_ARCHES); do \
4995 n="$$lib"; \
4996 [ "$(SIM_PRIMARY_TARGET)" = "$$d" ] || n="$$n-$$d"; \
4997 n="lib$$n.a"; \
4998 $(INSTALL_DATA) $$d/libsim.a $(DESTDIR)$(libdir)/$$n || exit 1; \
4999 done
5000
5001 install-exec-local: installdirs $(SIM_INSTALL_EXEC_LOCAL_DEPS)
5002 $(AM_V_at)$(MKDIR_P) $(DESTDIR)$(bindir)
5003 run=`echo run | sed '$(program_transform_name)'`; \
5004 for d in $(SIM_ENABLED_ARCHES); do \
5005 n="$$run"; \
5006 [ "$(SIM_PRIMARY_TARGET)" = "$$d" ] || n="$$n-$$d"; \
5007 $(LIBTOOL) --mode=install \
5008 $(INSTALL_PROGRAM) $$d/run$(EXEEXT) $(DESTDIR)$(bindir)/$$n$(EXEEXT) || exit 1; \
5009 done
5010
5011 uninstall-local: $(SIM_UNINSTALL_LOCAL_DEPS)
5012 rm -f $(DESTDIR)$(bindir)/run $(DESTDIR)$(libdir)/libsim.a
5013 for d in $(SIM_ENABLED_ARCHES); do \
5014 rm -f $(DESTDIR)$(bindir)/run-$$d $(DESTDIR)$(libdir)/libsim-$$d.a; \
5015 done
5016
5017 # Tell versions [3.59,3.63) of GNU make to not export all variables.
5018 # Otherwise a system limit (for SysV at least) may be exceeded.
5019 .NOEXPORT: