1 # Makefile.in generated by automake 1.15.1 from Makefile.am.
4 # Copyright (C) 1994-2017 Free Software Foundation, Inc.
6 # This Makefile.in is free software; the Free Software Foundation
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11 # but WITHOUT ANY WARRANTY, to the extent permitted by law; without
12 # even the implied warranty of MERCHANTABILITY or FITNESS FOR A
17 # Copyright (C) 1993-2023 Free Software Foundation, Inc.
19 # This program is free software; you can redistribute it and/or modify
20 # it under the terms of the GNU General Public License as published by
21 # the Free Software Foundation; either version 3 of the License, or
22 # (at your option) any later version.
24 # This program is distributed in the hope that it will be useful,
25 # but WITHOUT ANY WARRANTY; without even the implied warranty of
26 # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
27 # GNU General Public License for more details.
29 # You should have received a copy of the GNU General Public License
30 # along with this program. If not, see <http://www.gnu.org/licenses/>.
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124 $(am__EXEEXT_4
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126 @ENABLE_SIM_TRUE@am__append_1
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127 @ENABLE_SIM_TRUE@
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131 @SIM_ENABLE_HW_TRUE@
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132 @SIM_ENABLE_HW_TRUE@
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134 @SIM_ENABLE_IGEN_TRUE@am__append_3
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136 @SIM_ENABLE_IGEN_TRUE@am__append_5
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138 testsuite
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142 @SIM_ENABLE_ARCH_aarch64_TRUE@am__append_6
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143 @SIM_ENABLE_ARCH_aarch64_TRUE@am__append_7
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144 @SIM_ENABLE_ARCH_arm_TRUE@am__append_8
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/libsim.a
145 @SIM_ENABLE_ARCH_arm_TRUE@am__append_9
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146 @SIM_ENABLE_ARCH_avr_TRUE@am__append_10
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/libsim.a
147 @SIM_ENABLE_ARCH_avr_TRUE@am__append_11
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148 @SIM_ENABLE_ARCH_bfin_TRUE@am__append_12
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/libsim.a
149 @SIM_ENABLE_ARCH_bfin_TRUE@am__append_13
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150 @SIM_ENABLE_ARCH_bpf_TRUE@am__append_14
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151 @SIM_ENABLE_ARCH_bpf_TRUE@am__append_15
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152 @SIM_ENABLE_ARCH_bpf_TRUE@am__append_16
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153 @SIM_ENABLE_ARCH_bpf_TRUE@ bpf
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154 @SIM_ENABLE_ARCH_bpf_TRUE@ bpf
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156 @SIM_ENABLE_ARCH_bpf_TRUE@am__append_17
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157 @SIM_ENABLE_ARCH_bpf_TRUE@am__append_18
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158 @SIM_ENABLE_ARCH_cr16_TRUE@am__append_19
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/libsim.a
159 @SIM_ENABLE_ARCH_cr16_TRUE@am__append_20
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160 @SIM_ENABLE_ARCH_cr16_TRUE@am__append_21
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/simops.h
161 @SIM_ENABLE_ARCH_cr16_TRUE@am__append_22
= $(cr16_BUILD_OUTPUTS
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162 @SIM_ENABLE_ARCH_cr16_TRUE@am__append_23
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/gencode
163 @SIM_ENABLE_ARCH_cr16_TRUE@am__append_24
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164 @SIM_ENABLE_ARCH_cris_TRUE@am__append_25
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165 @SIM_ENABLE_ARCH_cris_TRUE@am__append_26
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166 @SIM_ENABLE_ARCH_cris_TRUE@am__append_27
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167 @SIM_ENABLE_ARCH_cris_TRUE@am__append_28
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168 @SIM_ENABLE_ARCH_cris_TRUE@ cris
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169 @SIM_ENABLE_ARCH_cris_TRUE@ cris
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171 @SIM_ENABLE_ARCH_cris_TRUE@am__append_29
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172 @SIM_ENABLE_ARCH_cris_TRUE@am__append_30
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173 @SIM_ENABLE_ARCH_d10v_TRUE@am__append_31
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174 @SIM_ENABLE_ARCH_d10v_TRUE@am__append_32
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175 @SIM_ENABLE_ARCH_d10v_TRUE@am__append_33
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176 @SIM_ENABLE_ARCH_d10v_TRUE@am__append_34
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177 @SIM_ENABLE_ARCH_d10v_TRUE@am__append_35
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178 @SIM_ENABLE_ARCH_d10v_TRUE@am__append_36
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179 @SIM_ENABLE_ARCH_erc32_TRUE@am__append_37
= erc32
/libsim.a
180 @SIM_ENABLE_ARCH_erc32_TRUE@am__append_38
= erc32
/run erc32
/sis
181 @SIM_ENABLE_ARCH_erc32_TRUE@am__append_39
= sim-
%D-install-exec-local
182 @SIM_ENABLE_ARCH_erc32_TRUE@am__append_40
= sim-erc32-uninstall-local
183 @SIM_ENABLE_ARCH_examples_TRUE@am__append_41
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/libsim.a
184 @SIM_ENABLE_ARCH_examples_TRUE@am__append_42
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/run
185 @SIM_ENABLE_ARCH_frv_TRUE@am__append_43
= frv
/libsim.a
186 @SIM_ENABLE_ARCH_frv_TRUE@am__append_44
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187 @SIM_ENABLE_ARCH_frv_TRUE@am__append_45
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/eng.h
188 @SIM_ENABLE_ARCH_frv_TRUE@am__append_46
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189 @SIM_ENABLE_ARCH_frv_TRUE@am__append_47
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190 @SIM_ENABLE_ARCH_ft32_TRUE@am__append_48
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191 @SIM_ENABLE_ARCH_ft32_TRUE@am__append_49
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192 @SIM_ENABLE_ARCH_h8300_TRUE@am__append_50
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/libsim.a
193 @SIM_ENABLE_ARCH_h8300_TRUE@am__append_51
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194 @SIM_ENABLE_ARCH_iq2000_TRUE@am__append_52
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/libsim.a
195 @SIM_ENABLE_ARCH_iq2000_TRUE@am__append_53
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196 @SIM_ENABLE_ARCH_iq2000_TRUE@am__append_54
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197 @SIM_ENABLE_ARCH_iq2000_TRUE@am__append_55
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198 @SIM_ENABLE_ARCH_iq2000_TRUE@am__append_56
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199 @SIM_ENABLE_ARCH_lm32_TRUE@am__append_57
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200 @SIM_ENABLE_ARCH_lm32_TRUE@am__append_58
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201 @SIM_ENABLE_ARCH_lm32_TRUE@am__append_59
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202 @SIM_ENABLE_ARCH_lm32_TRUE@am__append_60
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203 @SIM_ENABLE_ARCH_lm32_TRUE@am__append_61
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204 @SIM_ENABLE_ARCH_m32c_TRUE@am__append_62
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205 @SIM_ENABLE_ARCH_m32c_TRUE@am__append_63
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206 @SIM_ENABLE_ARCH_m32c_TRUE@am__append_64
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207 @SIM_ENABLE_ARCH_m32c_TRUE@am__append_65
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208 @SIM_ENABLE_ARCH_m32c_TRUE@am__append_66
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209 @SIM_ENABLE_ARCH_m32c_TRUE@
$(m32c_BUILD_OUTPUTS
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210 @SIM_ENABLE_ARCH_m32c_TRUE@ m32c
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211 @SIM_ENABLE_ARCH_m32c_TRUE@ m32c
/r8c.c.log
213 @SIM_ENABLE_ARCH_m32r_TRUE@am__append_67
= m32r
/libsim.a
214 @SIM_ENABLE_ARCH_m32r_TRUE@am__append_68
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/run
215 @SIM_ENABLE_ARCH_m32r_TRUE@am__append_69
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216 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r
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217 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r
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218 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r
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220 @SIM_ENABLE_ARCH_m32r_TRUE@am__append_70
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221 @SIM_ENABLE_ARCH_m32r_TRUE@am__append_71
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222 @SIM_ENABLE_ARCH_m68hc11_TRUE@am__append_72
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223 @SIM_ENABLE_ARCH_m68hc11_TRUE@am__append_73
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224 @SIM_ENABLE_ARCH_m68hc11_TRUE@am__append_74
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225 @SIM_ENABLE_ARCH_m68hc11_TRUE@am__append_75
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226 @SIM_ENABLE_ARCH_m68hc11_TRUE@am__append_76
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227 @SIM_ENABLE_ARCH_mcore_TRUE@am__append_77
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/libsim.a
228 @SIM_ENABLE_ARCH_mcore_TRUE@am__append_78
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/run
229 @SIM_ENABLE_ARCH_microblaze_TRUE@am__append_79
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/libsim.a
230 @SIM_ENABLE_ARCH_microblaze_TRUE@am__append_80
= microblaze
/run
231 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_SINGLE_TRUE@am__append_81
= \
232 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_SINGLE_TRUE@ mips
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233 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_SINGLE_TRUE@ mips
/itable.o \
234 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_SINGLE_TRUE@ mips
/semantics.o \
235 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_SINGLE_TRUE@ mips
/idecode.o \
236 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_SINGLE_TRUE@ mips
/icache.o \
237 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_SINGLE_TRUE@ mips
/engine.o \
238 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_SINGLE_TRUE@ mips
/irun.o
240 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@am__append_82
= \
241 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@ mips
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242 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@ mips
/m16_semantics.o \
243 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@ mips
/m16_idecode.o \
244 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@ mips
/m16_icache.o \
245 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@ \
246 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@ mips
/m32_support.o \
247 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@ mips
/m32_semantics.o \
248 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@ mips
/m32_idecode.o \
249 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@ mips
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250 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@ \
251 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@ mips
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252 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@ mips
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254 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_MULTI_TRUE@am__append_83
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255 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_MULTI_TRUE@
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256 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_MULTI_TRUE@ mips
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257 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_MULTI_TRUE@ mips
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259 @SIM_ENABLE_ARCH_mips_TRUE@am__append_84
= mips
/libsim.a
260 @SIM_ENABLE_ARCH_mips_TRUE@am__append_85
= mips
/run
261 @SIM_ENABLE_ARCH_mips_TRUE@am__append_86
= mips
/itable.h \
262 @SIM_ENABLE_ARCH_mips_TRUE@
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263 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_SINGLE_TRUE@am__append_87
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264 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_SINGLE_TRUE@
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265 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_SINGLE_TRUE@ mips
/stamp-gen-mode-single
267 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@am__append_88
= \
268 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@
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269 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@
$(mips_BUILT_SRC_FROM_GEN_MODE_M16_M32
) \
270 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@ mips
/stamp-gen-mode-m16-m16 \
271 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@ mips
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273 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_MULTI_TRUE@am__append_89
= \
274 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_MULTI_TRUE@
$(SIM_MIPS_MULTI_SRC
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275 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_MULTI_TRUE@ mips
/stamp-gen-mode-multi-igen \
276 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_MULTI_TRUE@ mips
/stamp-gen-mode-multi-run
278 @SIM_ENABLE_ARCH_mips_TRUE@am__append_90
= $(mips_BUILD_OUTPUTS
)
279 @SIM_ENABLE_ARCH_mips_TRUE@am__append_91
= $(mips_BUILD_OUTPUTS
)
280 @SIM_ENABLE_ARCH_mips_TRUE@am__append_92
= mips
/multi-include.h mips
/multi-run.c
281 @SIM_ENABLE_ARCH_mn10300_TRUE@am__append_93
= mn10300
/libsim.a
282 @SIM_ENABLE_ARCH_mn10300_TRUE@am__append_94
= mn10300
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283 @SIM_ENABLE_ARCH_mn10300_TRUE@am__append_95
= \
284 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300
/icache.h \
285 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300
/idecode.h \
286 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300
/semantics.h \
287 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300
/model.h \
288 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300
/support.h \
289 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300
/itable.h \
290 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300
/engine.h
292 @SIM_ENABLE_ARCH_mn10300_TRUE@am__append_96
= $(mn10300_BUILD_OUTPUTS
)
293 @SIM_ENABLE_ARCH_mn10300_TRUE@am__append_97
= $(mn10300_BUILD_OUTPUTS
)
294 @SIM_ENABLE_ARCH_moxie_TRUE@am__append_98
= moxie
/libsim.a
295 @SIM_ENABLE_ARCH_moxie_TRUE@am__append_99
= moxie
/run
296 @SIM_ENABLE_ARCH_msp430_TRUE@am__append_100
= msp430
/libsim.a
297 @SIM_ENABLE_ARCH_msp430_TRUE@am__append_101
= msp430
/run
298 @SIM_ENABLE_ARCH_or1k_TRUE@am__append_102
= or1k
/libsim.a
299 @SIM_ENABLE_ARCH_or1k_TRUE@am__append_103
= or1k
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300 @SIM_ENABLE_ARCH_or1k_TRUE@am__append_104
= or1k
/eng.h
301 @SIM_ENABLE_ARCH_or1k_TRUE@am__append_105
= $(or1k_BUILD_OUTPUTS
)
302 @SIM_ENABLE_ARCH_or1k_TRUE@am__append_106
= $(or1k_BUILD_OUTPUTS
)
303 @SIM_ENABLE_ARCH_ppc_TRUE@am__append_107
= ppc
/run ppc
/psim
304 @SIM_ENABLE_ARCH_pru_TRUE@am__append_108
= pru
/libsim.a
305 @SIM_ENABLE_ARCH_pru_TRUE@am__append_109
= pru
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306 @SIM_ENABLE_ARCH_riscv_TRUE@am__append_110
= riscv
/libsim.a
307 @SIM_ENABLE_ARCH_riscv_TRUE@am__append_111
= riscv
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308 @SIM_ENABLE_ARCH_rl78_TRUE@am__append_112
= rl78
/libsim.a
309 @SIM_ENABLE_ARCH_rl78_TRUE@am__append_113
= rl78
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310 @SIM_ENABLE_ARCH_rx_TRUE@am__append_114
= rx
/libsim.a
311 @SIM_ENABLE_ARCH_rx_TRUE@am__append_115
= rx
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312 @SIM_ENABLE_ARCH_sh_TRUE@am__append_116
= sh
/libsim.a
313 @SIM_ENABLE_ARCH_sh_TRUE@am__append_117
= sh
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314 @SIM_ENABLE_ARCH_sh_TRUE@am__append_118
= \
315 @SIM_ENABLE_ARCH_sh_TRUE@ sh
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316 @SIM_ENABLE_ARCH_sh_TRUE@ sh
/ppi.c
318 @SIM_ENABLE_ARCH_sh_TRUE@am__append_119
= $(sh_BUILD_OUTPUTS
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319 @SIM_ENABLE_ARCH_sh_TRUE@am__append_120
= sh
/gencode
320 @SIM_ENABLE_ARCH_sh_TRUE@am__append_121
= $(sh_BUILD_OUTPUTS
)
321 @SIM_ENABLE_ARCH_v850_TRUE@am__append_122
= v850
/libsim.a
322 @SIM_ENABLE_ARCH_v850_TRUE@am__append_123
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323 @SIM_ENABLE_ARCH_v850_TRUE@am__append_124
= \
324 @SIM_ENABLE_ARCH_v850_TRUE@ v850
/icache.h \
325 @SIM_ENABLE_ARCH_v850_TRUE@ v850
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326 @SIM_ENABLE_ARCH_v850_TRUE@ v850
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327 @SIM_ENABLE_ARCH_v850_TRUE@ v850
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328 @SIM_ENABLE_ARCH_v850_TRUE@ v850
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329 @SIM_ENABLE_ARCH_v850_TRUE@ v850
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330 @SIM_ENABLE_ARCH_v850_TRUE@ v850
/engine.h
332 @SIM_ENABLE_ARCH_v850_TRUE@am__append_125
= $(v850_BUILD_OUTPUTS
)
333 @SIM_ENABLE_ARCH_v850_TRUE@am__append_126
= $(v850_BUILD_OUTPUTS
)
335 ACLOCAL_M4
= $(top_srcdir
)/aclocal.m4
336 am__aclocal_m4_deps
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)/..
/config
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337 $(top_srcdir
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338 $(top_srcdir
)/..
/config
/lead-dot.m4 \
339 $(top_srcdir
)/..
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$(am__objects_1
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= $(AR
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= $(AR
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= $(AR
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= $(patsubst \
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662 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r
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663 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r
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664 @SIM_ENABLE_ARCH_m32r_TRUE@am_m32r_libsim_a_OBJECTS
= \
665 @SIM_ENABLE_ARCH_m32r_TRUE@
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= $(am_m32r_libsim_a_OBJECTS
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667 m68hc11_libsim_a_AR
= $(AR
) $(ARFLAGS
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= \
669 @SIM_ENABLE_ARCH_m68hc11_TRUE@ m68hc11
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%,m68hc11
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)) \
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$(patsubst \
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)) \
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)) \
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= \
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= $(am_m68hc11_libsim_a_OBJECTS
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685 mcore_libsim_a_AR
= $(AR
) $(ARFLAGS
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= \
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$(patsubst \
688 @SIM_ENABLE_ARCH_mcore_TRUE@
%,mcore
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)) \
689 @SIM_ENABLE_ARCH_mcore_TRUE@
$(patsubst \
690 @SIM_ENABLE_ARCH_mcore_TRUE@
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)) \
691 @SIM_ENABLE_ARCH_mcore_TRUE@ mcore
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692 @SIM_ENABLE_ARCH_mcore_TRUE@am_mcore_libsim_a_OBJECTS
= \
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)
694 mcore_libsim_a_OBJECTS
= $(am_mcore_libsim_a_OBJECTS
)
695 microblaze_libsim_a_AR
= $(AR
) $(ARFLAGS
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= \
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$(patsubst \
699 @SIM_ENABLE_ARCH_microblaze_TRUE@
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)) \
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$(patsubst \
701 @SIM_ENABLE_ARCH_microblaze_TRUE@
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702 @SIM_ENABLE_ARCH_microblaze_TRUE@ microblaze
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704 @SIM_ENABLE_ARCH_microblaze_TRUE@am_microblaze_libsim_a_OBJECTS
= \
705 @SIM_ENABLE_ARCH_microblaze_TRUE@
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706 microblaze_libsim_a_OBJECTS
= $(am_microblaze_libsim_a_OBJECTS
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707 mips_libsim_a_AR
= $(AR
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709 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_MULTI_TRUE@am__DEPENDENCIES_2
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712 @SIM_ENABLE_ARCH_mips_TRUE@am__DEPENDENCIES_3
= $(am__append_81
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$(am__append_82
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715 @SIM_ENABLE_ARCH_mips_TRUE@mips_libsim_a_DEPENDENCIES
= mips
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716 @SIM_ENABLE_ARCH_mips_TRUE@
$(am__DEPENDENCIES_3
) $(patsubst \
717 @SIM_ENABLE_ARCH_mips_TRUE@
%,mips
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719 @SIM_ENABLE_ARCH_mips_TRUE@
%,mips
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)) \
720 @SIM_ENABLE_ARCH_mips_TRUE@
$(patsubst \
721 @SIM_ENABLE_ARCH_mips_TRUE@
%,mips
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)) \
722 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/cp1.o mips
/dsp.o mips
/mdmx.o \
723 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/modules.o mips
/sim-main.o \
724 @SIM_ENABLE_ARCH_mips_TRUE@ mips
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725 @SIM_ENABLE_ARCH_mips_TRUE@am_mips_libsim_a_OBJECTS
= \
726 @SIM_ENABLE_ARCH_mips_TRUE@
$(am__objects_1
)
727 mips_libsim_a_OBJECTS
= $(am_mips_libsim_a_OBJECTS
)
728 mn10300_libsim_a_AR
= $(AR
) $(ARFLAGS
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729 @SIM_ENABLE_ARCH_mn10300_TRUE@mn10300_libsim_a_DEPENDENCIES
= \
730 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300
/itable.o \
731 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300
/semantics.o \
732 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300
/idecode.o \
733 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300
/icache.o \
734 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300
/engine.o mn10300
/irun.o \
735 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300
/support.o
$(patsubst \
736 @SIM_ENABLE_ARCH_mn10300_TRUE@
%,mn10300
/%,$(SIM_NEW_COMMON_OBJS
)) \
737 @SIM_ENABLE_ARCH_mn10300_TRUE@
$(patsubst \
738 @SIM_ENABLE_ARCH_mn10300_TRUE@
%,mn10300
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%.o
,$(SIM_HW_DEVICES
)) \
739 @SIM_ENABLE_ARCH_mn10300_TRUE@
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740 @SIM_ENABLE_ARCH_mn10300_TRUE@
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743 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300
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744 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300
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745 @SIM_ENABLE_ARCH_mn10300_TRUE@am_mn10300_libsim_a_OBJECTS
= \
746 @SIM_ENABLE_ARCH_mn10300_TRUE@
$(am__objects_1
)
747 mn10300_libsim_a_OBJECTS
= $(am_mn10300_libsim_a_OBJECTS
)
748 moxie_libsim_a_AR
= $(AR
) $(ARFLAGS
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749 @SIM_ENABLE_ARCH_moxie_TRUE@moxie_libsim_a_DEPENDENCIES
= $(patsubst \
750 @SIM_ENABLE_ARCH_moxie_TRUE@
%,moxie
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)) \
751 @SIM_ENABLE_ARCH_moxie_TRUE@
$(patsubst \
752 @SIM_ENABLE_ARCH_moxie_TRUE@
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)) \
753 @SIM_ENABLE_ARCH_moxie_TRUE@ moxie
/interp.o moxie
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754 @SIM_ENABLE_ARCH_moxie_TRUE@ moxie
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755 @SIM_ENABLE_ARCH_moxie_TRUE@am_moxie_libsim_a_OBJECTS
= \
756 @SIM_ENABLE_ARCH_moxie_TRUE@
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)
757 moxie_libsim_a_OBJECTS
= $(am_moxie_libsim_a_OBJECTS
)
758 msp430_libsim_a_AR
= $(AR
) $(ARFLAGS
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759 @SIM_ENABLE_ARCH_msp430_TRUE@msp430_libsim_a_DEPENDENCIES
= \
760 @SIM_ENABLE_ARCH_msp430_TRUE@
$(patsubst \
761 @SIM_ENABLE_ARCH_msp430_TRUE@
%,msp430
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)) \
762 @SIM_ENABLE_ARCH_msp430_TRUE@
$(patsubst \
763 @SIM_ENABLE_ARCH_msp430_TRUE@
%,msp430
/dv-
%.o
,$(SIM_HW_DEVICES
)) \
764 @SIM_ENABLE_ARCH_msp430_TRUE@ msp430
/msp430-sim.o \
765 @SIM_ENABLE_ARCH_msp430_TRUE@ msp430
/modules.o \
766 @SIM_ENABLE_ARCH_msp430_TRUE@ msp430
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767 @SIM_ENABLE_ARCH_msp430_TRUE@am_msp430_libsim_a_OBJECTS
= \
768 @SIM_ENABLE_ARCH_msp430_TRUE@
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769 msp430_libsim_a_OBJECTS
= $(am_msp430_libsim_a_OBJECTS
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770 or1k_libsim_a_AR
= $(AR
) $(ARFLAGS
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771 @SIM_ENABLE_ARCH_or1k_TRUE@or1k_libsim_a_DEPENDENCIES
= $(patsubst \
772 @SIM_ENABLE_ARCH_or1k_TRUE@
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$(patsubst \
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775 @SIM_ENABLE_ARCH_or1k_TRUE@ or1k
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777 @SIM_ENABLE_ARCH_or1k_TRUE@ or1k
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778 @SIM_ENABLE_ARCH_or1k_TRUE@ or1k
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779 @SIM_ENABLE_ARCH_or1k_TRUE@ or1k
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780 @SIM_ENABLE_ARCH_or1k_TRUE@ or1k
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/mloop.o \
781 @SIM_ENABLE_ARCH_or1k_TRUE@ or1k
/model.o or1k
/sem.o or1k
/or1k.o \
782 @SIM_ENABLE_ARCH_or1k_TRUE@ or1k
/sim-if.o or1k
/traps.o
783 @SIM_ENABLE_ARCH_or1k_TRUE@am_or1k_libsim_a_OBJECTS
= \
784 @SIM_ENABLE_ARCH_or1k_TRUE@
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)
785 or1k_libsim_a_OBJECTS
= $(am_or1k_libsim_a_OBJECTS
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786 pru_libsim_a_AR
= $(AR
) $(ARFLAGS
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787 @SIM_ENABLE_ARCH_pru_TRUE@pru_libsim_a_DEPENDENCIES
= $(patsubst \
788 @SIM_ENABLE_ARCH_pru_TRUE@
%,pru
/%,$(SIM_NEW_COMMON_OBJS
)) \
789 @SIM_ENABLE_ARCH_pru_TRUE@
$(patsubst \
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%.o
,$(SIM_HW_DEVICES
)) \
791 @SIM_ENABLE_ARCH_pru_TRUE@ pru
/interp.o pru
/modules.o \
792 @SIM_ENABLE_ARCH_pru_TRUE@ pru
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793 @SIM_ENABLE_ARCH_pru_TRUE@am_pru_libsim_a_OBJECTS
= $(am__objects_1
)
794 pru_libsim_a_OBJECTS
= $(am_pru_libsim_a_OBJECTS
)
795 riscv_libsim_a_AR
= $(AR
) $(ARFLAGS
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796 @SIM_ENABLE_ARCH_riscv_TRUE@riscv_libsim_a_DEPENDENCIES
= $(patsubst \
797 @SIM_ENABLE_ARCH_riscv_TRUE@
%,riscv
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$(patsubst \
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%,riscv
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)) \
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/interp.o riscv
/machs.o \
801 @SIM_ENABLE_ARCH_riscv_TRUE@ riscv
/modules.o riscv
/sim-main.o \
802 @SIM_ENABLE_ARCH_riscv_TRUE@ riscv
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803 @SIM_ENABLE_ARCH_riscv_TRUE@am_riscv_libsim_a_OBJECTS
= \
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)
805 riscv_libsim_a_OBJECTS
= $(am_riscv_libsim_a_OBJECTS
)
806 rl78_libsim_a_AR
= $(AR
) $(ARFLAGS
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807 @SIM_ENABLE_ARCH_rl78_TRUE@rl78_libsim_a_DEPENDENCIES
= rl78
/load.o \
808 @SIM_ENABLE_ARCH_rl78_TRUE@ rl78
/mem.o rl78
/cpu.o rl78
/rl78.o \
809 @SIM_ENABLE_ARCH_rl78_TRUE@ rl78
/gdb-if.o rl78
/modules.o \
810 @SIM_ENABLE_ARCH_rl78_TRUE@ rl78
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811 @SIM_ENABLE_ARCH_rl78_TRUE@am_rl78_libsim_a_OBJECTS
= \
812 @SIM_ENABLE_ARCH_rl78_TRUE@
$(am__objects_1
)
813 rl78_libsim_a_OBJECTS
= $(am_rl78_libsim_a_OBJECTS
)
814 rx_libsim_a_AR
= $(AR
) $(ARFLAGS
)
815 @SIM_ENABLE_ARCH_rx_TRUE@rx_libsim_a_DEPENDENCIES
= rx
/fpu.o rx
/load.o \
816 @SIM_ENABLE_ARCH_rx_TRUE@ rx
/mem.o rx
/misc.o rx
/reg.o rx
/rx.o \
817 @SIM_ENABLE_ARCH_rx_TRUE@ rx
/syscalls.o rx
/trace.o rx
/gdb-if.o \
818 @SIM_ENABLE_ARCH_rx_TRUE@ rx
/err.o rx
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819 @SIM_ENABLE_ARCH_rx_TRUE@am_rx_libsim_a_OBJECTS
= $(am__objects_1
)
820 rx_libsim_a_OBJECTS
= $(am_rx_libsim_a_OBJECTS
)
821 sh_libsim_a_AR
= $(AR
) $(ARFLAGS
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822 @SIM_ENABLE_ARCH_sh_TRUE@sh_libsim_a_DEPENDENCIES
= sh
/interp.o \
823 @SIM_ENABLE_ARCH_sh_TRUE@
$(patsubst \
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%,sh
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)) \
825 @SIM_ENABLE_ARCH_sh_TRUE@
$(patsubst \
826 @SIM_ENABLE_ARCH_sh_TRUE@
%,sh
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%.o
,$(SIM_HW_DEVICES
)) \
827 @SIM_ENABLE_ARCH_sh_TRUE@ sh
/modules.o sh
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= $(am__objects_1
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829 sh_libsim_a_OBJECTS
= $(am_sh_libsim_a_OBJECTS
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830 v850_libsim_a_AR
= $(AR
) $(ARFLAGS
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831 @SIM_ENABLE_ARCH_v850_TRUE@v850_libsim_a_DEPENDENCIES
= $(patsubst \
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%,v850
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833 @SIM_ENABLE_ARCH_v850_TRUE@
$(patsubst \
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)) \
835 @SIM_ENABLE_ARCH_v850_TRUE@ v850
/simops.o v850
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836 @SIM_ENABLE_ARCH_v850_TRUE@ v850
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837 @SIM_ENABLE_ARCH_v850_TRUE@ v850
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838 @SIM_ENABLE_ARCH_v850_TRUE@ v850
/engine.o v850
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839 @SIM_ENABLE_ARCH_v850_TRUE@ v850
/support.o v850
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840 @SIM_ENABLE_ARCH_v850_TRUE@ v850
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841 @SIM_ENABLE_ARCH_v850_TRUE@am_v850_libsim_a_OBJECTS
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)
843 v850_libsim_a_OBJECTS
= $(am_v850_libsim_a_OBJECTS
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844 @SIM_ENABLE_IGEN_TRUE@am__EXEEXT_1
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) igen
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845 @SIM_ENABLE_IGEN_TRUE@ igen
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) igen
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846 @SIM_ENABLE_IGEN_TRUE@ igen
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$(EXEEXT
) \
847 @SIM_ENABLE_IGEN_TRUE@ igen
/ld-insn
$(EXEEXT
) \
848 @SIM_ENABLE_IGEN_TRUE@ igen
/table
$(EXEEXT
)
849 @SIM_ENABLE_IGEN_TRUE@am__EXEEXT_2
= $(am__EXEEXT_1
)
850 @SIM_ENABLE_ARCH_cr16_TRUE@am__EXEEXT_3
= cr16
/gencode
$(EXEEXT
)
851 @SIM_ENABLE_ARCH_d10v_TRUE@am__EXEEXT_4
= d10v
/gencode
$(EXEEXT
)
852 @SIM_ENABLE_ARCH_m32c_TRUE@am__EXEEXT_5
= m32c
/opc2c
$(EXEEXT
)
853 @SIM_ENABLE_ARCH_m68hc11_TRUE@am__EXEEXT_6
= m68hc11
/gencode
$(EXEEXT
)
854 @SIM_ENABLE_ARCH_sh_TRUE@am__EXEEXT_7
= sh
/gencode
$(EXEEXT
)
855 am__EXEEXT_8
= testsuite
/common
/bits32m0
$(EXEEXT
) \
856 testsuite
/common
/bits32m31
$(EXEEXT
) \
857 testsuite
/common
/bits64m0
$(EXEEXT
) \
858 testsuite
/common
/bits64m63
$(EXEEXT
) \
859 testsuite
/common
/alu-tst
$(EXEEXT
)
860 @SIM_ENABLE_ARCH_cris_TRUE@am__EXEEXT_9
= cris
/rvdummy
$(EXEEXT
)
861 @SIM_ENABLE_ARCH_aarch64_TRUE@am__EXEEXT_10
= aarch64
/run
$(EXEEXT
)
862 @SIM_ENABLE_ARCH_arm_TRUE@am__EXEEXT_11
= arm
/run
$(EXEEXT
)
863 @SIM_ENABLE_ARCH_avr_TRUE@am__EXEEXT_12
= avr
/run
$(EXEEXT
)
864 @SIM_ENABLE_ARCH_bfin_TRUE@am__EXEEXT_13
= bfin
/run
$(EXEEXT
)
865 @SIM_ENABLE_ARCH_bpf_TRUE@am__EXEEXT_14
= bpf
/run
$(EXEEXT
)
866 @SIM_ENABLE_ARCH_cr16_TRUE@am__EXEEXT_15
= cr16
/run
$(EXEEXT
)
867 @SIM_ENABLE_ARCH_cris_TRUE@am__EXEEXT_16
= cris
/run
$(EXEEXT
)
868 @SIM_ENABLE_ARCH_d10v_TRUE@am__EXEEXT_17
= d10v
/run
$(EXEEXT
)
869 @SIM_ENABLE_ARCH_erc32_TRUE@am__EXEEXT_18
= erc32
/run
$(EXEEXT
) \
870 @SIM_ENABLE_ARCH_erc32_TRUE@ erc32
/sis
$(EXEEXT
)
871 @SIM_ENABLE_ARCH_examples_TRUE@am__EXEEXT_19
= \
872 @SIM_ENABLE_ARCH_examples_TRUE@ example-synacor
/run
$(EXEEXT
)
873 @SIM_ENABLE_ARCH_frv_TRUE@am__EXEEXT_20
= frv
/run
$(EXEEXT
)
874 @SIM_ENABLE_ARCH_ft32_TRUE@am__EXEEXT_21
= ft32
/run
$(EXEEXT
)
875 @SIM_ENABLE_ARCH_h8300_TRUE@am__EXEEXT_22
= h8300
/run
$(EXEEXT
)
876 @SIM_ENABLE_ARCH_iq2000_TRUE@am__EXEEXT_23
= iq2000
/run
$(EXEEXT
)
877 @SIM_ENABLE_ARCH_lm32_TRUE@am__EXEEXT_24
= lm32
/run
$(EXEEXT
)
878 @SIM_ENABLE_ARCH_m32c_TRUE@am__EXEEXT_25
= m32c
/run
$(EXEEXT
)
879 @SIM_ENABLE_ARCH_m32r_TRUE@am__EXEEXT_26
= m32r
/run
$(EXEEXT
)
880 @SIM_ENABLE_ARCH_m68hc11_TRUE@am__EXEEXT_27
= m68hc11
/run
$(EXEEXT
)
881 @SIM_ENABLE_ARCH_mcore_TRUE@am__EXEEXT_28
= mcore
/run
$(EXEEXT
)
882 @SIM_ENABLE_ARCH_microblaze_TRUE@am__EXEEXT_29
= \
883 @SIM_ENABLE_ARCH_microblaze_TRUE@ microblaze
/run
$(EXEEXT
)
884 @SIM_ENABLE_ARCH_mips_TRUE@am__EXEEXT_30
= mips
/run
$(EXEEXT
)
885 @SIM_ENABLE_ARCH_mn10300_TRUE@am__EXEEXT_31
= mn10300
/run
$(EXEEXT
)
886 @SIM_ENABLE_ARCH_moxie_TRUE@am__EXEEXT_32
= moxie
/run
$(EXEEXT
)
887 @SIM_ENABLE_ARCH_msp430_TRUE@am__EXEEXT_33
= msp430
/run
$(EXEEXT
)
888 @SIM_ENABLE_ARCH_or1k_TRUE@am__EXEEXT_34
= or1k
/run
$(EXEEXT
)
889 @SIM_ENABLE_ARCH_ppc_TRUE@am__EXEEXT_35
= ppc
/run
$(EXEEXT
) \
890 @SIM_ENABLE_ARCH_ppc_TRUE@ ppc
/psim
$(EXEEXT
)
891 @SIM_ENABLE_ARCH_pru_TRUE@am__EXEEXT_36
= pru
/run
$(EXEEXT
)
892 @SIM_ENABLE_ARCH_riscv_TRUE@am__EXEEXT_37
= riscv
/run
$(EXEEXT
)
893 @SIM_ENABLE_ARCH_rl78_TRUE@am__EXEEXT_38
= rl78
/run
$(EXEEXT
)
894 @SIM_ENABLE_ARCH_rx_TRUE@am__EXEEXT_39
= rx
/run
$(EXEEXT
)
895 @SIM_ENABLE_ARCH_sh_TRUE@am__EXEEXT_40
= sh
/run
$(EXEEXT
)
896 @SIM_ENABLE_ARCH_v850_TRUE@am__EXEEXT_41
= v850
/run
$(EXEEXT
)
897 PROGRAMS
= $(noinst_PROGRAMS
)
898 am_aarch64_run_OBJECTS
=
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= $(am_aarch64_run_OBJECTS
)
900 am__DEPENDENCIES_4
= $(BFD_LIB
) $(OPCODES_LIB
) $(LIBIBERTY_LIB
)
901 @SIM_ENABLE_ARCH_aarch64_TRUE@aarch64_run_DEPENDENCIES
= \
902 @SIM_ENABLE_ARCH_aarch64_TRUE@ aarch64
/nrun.o aarch64
/libsim.a \
903 @SIM_ENABLE_ARCH_aarch64_TRUE@
$(am__DEPENDENCIES_4
)
904 AM_V_lt
= $(am__v_lt_@AM_V@
)
905 am__v_lt_
= $(am__v_lt_@AM_DEFAULT_V@
)
906 am__v_lt_0
= --silent
909 arm_run_OBJECTS
= $(am_arm_run_OBJECTS
)
910 @SIM_ENABLE_ARCH_arm_TRUE@arm_run_DEPENDENCIES
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/nrun.o \
911 @SIM_ENABLE_ARCH_arm_TRUE@ arm
/libsim.a
$(am__DEPENDENCIES_4
)
913 avr_run_OBJECTS
= $(am_avr_run_OBJECTS
)
914 @SIM_ENABLE_ARCH_avr_TRUE@avr_run_DEPENDENCIES
= avr
/nrun.o \
915 @SIM_ENABLE_ARCH_avr_TRUE@ avr
/libsim.a
$(am__DEPENDENCIES_4
)
916 am_bfin_run_OBJECTS
=
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= $(am_bfin_run_OBJECTS
)
918 @SIM_ENABLE_ARCH_bfin_TRUE@bfin_run_DEPENDENCIES
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/nrun.o \
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/libsim.a
$(am__DEPENDENCIES_4
)
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= $(am_bpf_run_OBJECTS
)
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/nrun.o \
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/libsim.a
$(am__DEPENDENCIES_4
)
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/gencode.
$(OBJEXT
)
926 cr16_gencode_OBJECTS
= $(am_cr16_gencode_OBJECTS
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= \
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/cr16-opc.o
929 am_cr16_run_OBJECTS
=
930 cr16_run_OBJECTS
= $(am_cr16_run_OBJECTS
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931 @SIM_ENABLE_ARCH_cr16_TRUE@cr16_run_DEPENDENCIES
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/nrun.o \
932 @SIM_ENABLE_ARCH_cr16_TRUE@ cr16
/libsim.a
$(am__DEPENDENCIES_4
)
933 am_cris_run_OBJECTS
=
934 cris_run_OBJECTS
= $(am_cris_run_OBJECTS
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935 @SIM_ENABLE_ARCH_cris_TRUE@cris_run_DEPENDENCIES
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/nrun.o \
936 @SIM_ENABLE_ARCH_cris_TRUE@ cris
/libsim.a
$(am__DEPENDENCIES_4
)
937 @SIM_ENABLE_ARCH_cris_TRUE@am_cris_rvdummy_OBJECTS
= \
938 @SIM_ENABLE_ARCH_cris_TRUE@ cris
/rvdummy.
$(OBJEXT
)
939 cris_rvdummy_OBJECTS
= $(am_cris_rvdummy_OBJECTS
)
940 @SIM_ENABLE_ARCH_cris_TRUE@cris_rvdummy_DEPENDENCIES
= \
941 @SIM_ENABLE_ARCH_cris_TRUE@
$(LIBIBERTY_LIB
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942 @SIM_ENABLE_ARCH_d10v_TRUE@am_d10v_gencode_OBJECTS
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943 @SIM_ENABLE_ARCH_d10v_TRUE@ d10v
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$(OBJEXT
)
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= $(am_d10v_gencode_OBJECTS
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945 @SIM_ENABLE_ARCH_d10v_TRUE@d10v_gencode_DEPENDENCIES
= \
946 @SIM_ENABLE_ARCH_d10v_TRUE@ d10v
/d10v-opc.o
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949 @SIM_ENABLE_ARCH_d10v_TRUE@d10v_run_DEPENDENCIES
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/nrun.o \
950 @SIM_ENABLE_ARCH_d10v_TRUE@ d10v
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$(am__DEPENDENCIES_4
)
951 am_erc32_run_OBJECTS
=
952 erc32_run_OBJECTS
= $(am_erc32_run_OBJECTS
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953 @SIM_ENABLE_ARCH_erc32_TRUE@erc32_run_DEPENDENCIES
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/sis.o \
954 @SIM_ENABLE_ARCH_erc32_TRUE@ erc32
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955 @SIM_ENABLE_ARCH_erc32_TRUE@
$(am__DEPENDENCIES_4
) \
956 @SIM_ENABLE_ARCH_erc32_TRUE@
$(am__DEPENDENCIES_1
) \
957 @SIM_ENABLE_ARCH_erc32_TRUE@
$(am__DEPENDENCIES_1
)
958 erc32_sis_SOURCES
= erc32
/sis.c
959 erc32_sis_OBJECTS
= erc32
/sis.
$(OBJEXT
)
960 erc32_sis_LDADD
= $(LDADD
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961 am_example_synacor_run_OBJECTS
=
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= $(am_example_synacor_run_OBJECTS
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963 @SIM_ENABLE_ARCH_examples_TRUE@example_synacor_run_DEPENDENCIES
= \
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/nrun.o \
965 @SIM_ENABLE_ARCH_examples_TRUE@ example-synacor
/libsim.a \
966 @SIM_ENABLE_ARCH_examples_TRUE@
$(am__DEPENDENCIES_4
)
968 frv_run_OBJECTS
= $(am_frv_run_OBJECTS
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969 @SIM_ENABLE_ARCH_frv_TRUE@frv_run_DEPENDENCIES
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/nrun.o \
970 @SIM_ENABLE_ARCH_frv_TRUE@ frv
/libsim.a
$(am__DEPENDENCIES_4
)
971 am_ft32_run_OBJECTS
=
972 ft32_run_OBJECTS
= $(am_ft32_run_OBJECTS
)
973 @SIM_ENABLE_ARCH_ft32_TRUE@ft32_run_DEPENDENCIES
= ft32
/nrun.o \
974 @SIM_ENABLE_ARCH_ft32_TRUE@ ft32
/libsim.a
$(am__DEPENDENCIES_4
)
975 am_h8300_run_OBJECTS
=
976 h8300_run_OBJECTS
= $(am_h8300_run_OBJECTS
)
977 @SIM_ENABLE_ARCH_h8300_TRUE@h8300_run_DEPENDENCIES
= h8300
/nrun.o \
978 @SIM_ENABLE_ARCH_h8300_TRUE@ h8300
/libsim.a \
979 @SIM_ENABLE_ARCH_h8300_TRUE@
$(am__DEPENDENCIES_4
)
980 am_igen_filter_OBJECTS
=
981 igen_filter_OBJECTS
= $(am_igen_filter_OBJECTS
)
982 @SIM_ENABLE_IGEN_TRUE@igen_filter_DEPENDENCIES
= igen
/filter-main.o \
983 @SIM_ENABLE_IGEN_TRUE@ igen
/libigen.a
984 am_igen_gen_OBJECTS
=
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= $(am_igen_gen_OBJECTS
)
986 @SIM_ENABLE_IGEN_TRUE@igen_gen_DEPENDENCIES
= igen
/gen-main.o \
987 @SIM_ENABLE_IGEN_TRUE@ igen
/libigen.a
988 @SIM_ENABLE_IGEN_TRUE@am_igen_igen_OBJECTS
= igen
/igen.
$(OBJEXT
)
989 igen_igen_OBJECTS
= $(am_igen_igen_OBJECTS
)
990 @SIM_ENABLE_IGEN_TRUE@igen_igen_DEPENDENCIES
= igen
/libigen.a
991 am_igen_ld_cache_OBJECTS
=
992 igen_ld_cache_OBJECTS
= $(am_igen_ld_cache_OBJECTS
)
993 @SIM_ENABLE_IGEN_TRUE@igen_ld_cache_DEPENDENCIES
= \
994 @SIM_ENABLE_IGEN_TRUE@ igen
/ld-cache-main.o igen
/libigen.a
995 am_igen_ld_decode_OBJECTS
=
996 igen_ld_decode_OBJECTS
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997 @SIM_ENABLE_IGEN_TRUE@igen_ld_decode_DEPENDENCIES
= \
998 @SIM_ENABLE_IGEN_TRUE@ igen
/ld-decode-main.o igen
/libigen.a
999 am_igen_ld_insn_OBJECTS
=
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= $(am_igen_ld_insn_OBJECTS
)
1001 @SIM_ENABLE_IGEN_TRUE@igen_ld_insn_DEPENDENCIES
= igen
/ld-insn-main.o \
1002 @SIM_ENABLE_IGEN_TRUE@ igen
/libigen.a
1003 am_igen_table_OBJECTS
=
1004 igen_table_OBJECTS
= $(am_igen_table_OBJECTS
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1005 @SIM_ENABLE_IGEN_TRUE@igen_table_DEPENDENCIES
= igen
/table-main.o \
1006 @SIM_ENABLE_IGEN_TRUE@ igen
/libigen.a
1007 am_iq2000_run_OBJECTS
=
1008 iq2000_run_OBJECTS
= $(am_iq2000_run_OBJECTS
)
1009 @SIM_ENABLE_ARCH_iq2000_TRUE@iq2000_run_DEPENDENCIES
= iq2000
/nrun.o \
1010 @SIM_ENABLE_ARCH_iq2000_TRUE@ iq2000
/libsim.a \
1011 @SIM_ENABLE_ARCH_iq2000_TRUE@
$(am__DEPENDENCIES_4
)
1012 am_lm32_run_OBJECTS
=
1013 lm32_run_OBJECTS
= $(am_lm32_run_OBJECTS
)
1014 @SIM_ENABLE_ARCH_lm32_TRUE@lm32_run_DEPENDENCIES
= lm32
/nrun.o \
1015 @SIM_ENABLE_ARCH_lm32_TRUE@ lm32
/libsim.a
$(am__DEPENDENCIES_4
)
1016 @SIM_ENABLE_ARCH_m32c_TRUE@am_m32c_opc2c_OBJECTS
= \
1017 @SIM_ENABLE_ARCH_m32c_TRUE@ m32c
/opc2c.
$(OBJEXT
)
1018 m32c_opc2c_OBJECTS
= $(am_m32c_opc2c_OBJECTS
)
1019 m32c_opc2c_LDADD
= $(LDADD
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1020 am_m32c_run_OBJECTS
=
1021 m32c_run_OBJECTS
= $(am_m32c_run_OBJECTS
)
1022 @SIM_ENABLE_ARCH_m32c_TRUE@m32c_run_DEPENDENCIES
= m32c
/main.o \
1023 @SIM_ENABLE_ARCH_m32c_TRUE@ m32c
/libsim.a
$(am__DEPENDENCIES_4
)
1024 am_m32r_run_OBJECTS
=
1025 m32r_run_OBJECTS
= $(am_m32r_run_OBJECTS
)
1026 @SIM_ENABLE_ARCH_m32r_TRUE@m32r_run_DEPENDENCIES
= m32r
/nrun.o \
1027 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r
/libsim.a
$(am__DEPENDENCIES_4
)
1028 @SIM_ENABLE_ARCH_m68hc11_TRUE@am_m68hc11_gencode_OBJECTS
= \
1029 @SIM_ENABLE_ARCH_m68hc11_TRUE@ m68hc11
/gencode.
$(OBJEXT
)
1030 m68hc11_gencode_OBJECTS
= $(am_m68hc11_gencode_OBJECTS
)
1031 m68hc11_gencode_LDADD
= $(LDADD
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1032 am_m68hc11_run_OBJECTS
=
1033 m68hc11_run_OBJECTS
= $(am_m68hc11_run_OBJECTS
)
1034 @SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11_run_DEPENDENCIES
= \
1035 @SIM_ENABLE_ARCH_m68hc11_TRUE@ m68hc11
/nrun.o m68hc11
/libsim.a \
1036 @SIM_ENABLE_ARCH_m68hc11_TRUE@
$(am__DEPENDENCIES_4
)
1037 am_mcore_run_OBJECTS
=
1038 mcore_run_OBJECTS
= $(am_mcore_run_OBJECTS
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1039 @SIM_ENABLE_ARCH_mcore_TRUE@mcore_run_DEPENDENCIES
= mcore
/nrun.o \
1040 @SIM_ENABLE_ARCH_mcore_TRUE@ mcore
/libsim.a \
1041 @SIM_ENABLE_ARCH_mcore_TRUE@
$(am__DEPENDENCIES_4
)
1042 am_microblaze_run_OBJECTS
=
1043 microblaze_run_OBJECTS
= $(am_microblaze_run_OBJECTS
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1044 @SIM_ENABLE_ARCH_microblaze_TRUE@microblaze_run_DEPENDENCIES
= \
1045 @SIM_ENABLE_ARCH_microblaze_TRUE@ microblaze
/nrun.o \
1046 @SIM_ENABLE_ARCH_microblaze_TRUE@ microblaze
/libsim.a \
1047 @SIM_ENABLE_ARCH_microblaze_TRUE@
$(am__DEPENDENCIES_4
)
1048 am_mips_run_OBJECTS
=
1049 mips_run_OBJECTS
= $(am_mips_run_OBJECTS
)
1050 @SIM_ENABLE_ARCH_mips_TRUE@mips_run_DEPENDENCIES
= mips
/nrun.o \
1051 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/libsim.a
$(am__DEPENDENCIES_4
)
1052 am_mn10300_run_OBJECTS
=
1053 mn10300_run_OBJECTS
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1054 @SIM_ENABLE_ARCH_mn10300_TRUE@mn10300_run_DEPENDENCIES
= \
1055 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300
/nrun.o mn10300
/libsim.a \
1056 @SIM_ENABLE_ARCH_mn10300_TRUE@
$(am__DEPENDENCIES_4
)
1057 am_moxie_run_OBJECTS
=
1058 moxie_run_OBJECTS
= $(am_moxie_run_OBJECTS
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1059 @SIM_ENABLE_ARCH_moxie_TRUE@moxie_run_DEPENDENCIES
= moxie
/nrun.o \
1060 @SIM_ENABLE_ARCH_moxie_TRUE@ moxie
/libsim.a \
1061 @SIM_ENABLE_ARCH_moxie_TRUE@
$(am__DEPENDENCIES_4
)
1062 am_msp430_run_OBJECTS
=
1063 msp430_run_OBJECTS
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)
1064 @SIM_ENABLE_ARCH_msp430_TRUE@msp430_run_DEPENDENCIES
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/nrun.o \
1065 @SIM_ENABLE_ARCH_msp430_TRUE@ msp430
/libsim.a \
1066 @SIM_ENABLE_ARCH_msp430_TRUE@
$(am__DEPENDENCIES_4
)
1067 am_or1k_run_OBJECTS
=
1068 or1k_run_OBJECTS
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)
1069 @SIM_ENABLE_ARCH_or1k_TRUE@or1k_run_DEPENDENCIES
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/nrun.o \
1070 @SIM_ENABLE_ARCH_or1k_TRUE@ or1k
/libsim.a
$(am__DEPENDENCIES_4
)
1071 ppc_psim_SOURCES
= ppc
/psim.c
1072 ppc_psim_OBJECTS
= ppc
/psim.
$(OBJEXT
)
1073 ppc_psim_LDADD
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)
1074 am_ppc_run_OBJECTS
=
1075 ppc_run_OBJECTS
= $(am_ppc_run_OBJECTS
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1076 @SIM_ENABLE_ARCH_ppc_TRUE@ppc_run_DEPENDENCIES
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/main.o \
1077 @SIM_ENABLE_ARCH_ppc_TRUE@ ppc
/libsim.a
$(am__DEPENDENCIES_4
)
1078 am_pru_run_OBJECTS
=
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1080 @SIM_ENABLE_ARCH_pru_TRUE@pru_run_DEPENDENCIES
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/nrun.o \
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/libsim.a
$(am__DEPENDENCIES_4
)
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=
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/nrun.o \
1085 @SIM_ENABLE_ARCH_riscv_TRUE@ riscv
/libsim.a \
1086 @SIM_ENABLE_ARCH_riscv_TRUE@
$(am__DEPENDENCIES_4
)
1087 am_rl78_run_OBJECTS
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1089 @SIM_ENABLE_ARCH_rl78_TRUE@rl78_run_DEPENDENCIES
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/main.o \
1090 @SIM_ENABLE_ARCH_rl78_TRUE@ rl78
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$(am__DEPENDENCIES_4
)
1092 rx_run_OBJECTS
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/libsim.a \
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$(am__DEPENDENCIES_4
)
1095 @SIM_ENABLE_ARCH_sh_TRUE@am_sh_gencode_OBJECTS
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/gencode.
$(OBJEXT
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1097 sh_gencode_LDADD
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1099 sh_run_OBJECTS
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1100 @SIM_ENABLE_ARCH_sh_TRUE@sh_run_DEPENDENCIES
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/nrun.o sh
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1101 @SIM_ENABLE_ARCH_sh_TRUE@
$(am__DEPENDENCIES_4
)
1102 testsuite_common_alu_tst_SOURCES
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/common
/alu-tst.c
1103 testsuite_common_alu_tst_OBJECTS
= testsuite
/common
/alu-tst.
$(OBJEXT
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1104 testsuite_common_alu_tst_LDADD
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)
1105 testsuite_common_bits_gen_SOURCES
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/common
/bits-gen.c
1106 testsuite_common_bits_gen_OBJECTS
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$(OBJEXT
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1108 testsuite_common_bits_gen_LDADD
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1109 testsuite_common_bits32m0_SOURCES
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/common
/bits32m0.c
1110 testsuite_common_bits32m0_OBJECTS
= \
1111 testsuite
/common
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$(OBJEXT
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1112 testsuite_common_bits32m0_LDADD
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1113 testsuite_common_bits32m31_SOURCES
= testsuite
/common
/bits32m31.c
1114 testsuite_common_bits32m31_OBJECTS
= \
1115 testsuite
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$(OBJEXT
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1116 testsuite_common_bits32m31_LDADD
= $(LDADD
)
1117 testsuite_common_bits64m0_SOURCES
= testsuite
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/bits64m0.c
1118 testsuite_common_bits64m0_OBJECTS
= \
1119 testsuite
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$(OBJEXT
)
1120 testsuite_common_bits64m0_LDADD
= $(LDADD
)
1121 testsuite_common_bits64m63_SOURCES
= testsuite
/common
/bits64m63.c
1122 testsuite_common_bits64m63_OBJECTS
= \
1123 testsuite
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/bits64m63.
$(OBJEXT
)
1124 testsuite_common_bits64m63_LDADD
= $(LDADD
)
1125 testsuite_common_fpu_tst_SOURCES
= testsuite
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1126 testsuite_common_fpu_tst_OBJECTS
= testsuite
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$(OBJEXT
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1127 testsuite_common_fpu_tst_LDADD
= $(LDADD
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1128 am_v850_run_OBJECTS
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1129 v850_run_OBJECTS
= $(am_v850_run_OBJECTS
)
1130 @SIM_ENABLE_ARCH_v850_TRUE@v850_run_DEPENDENCIES
= v850
/nrun.o \
1131 @SIM_ENABLE_ARCH_v850_TRUE@ v850
/libsim.a
$(am__DEPENDENCIES_4
)
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= $(am__v_P_@AM_V@
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1133 am__v_P_
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)
1136 AM_V_GEN
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)
1137 am__v_GEN_
= $(am__v_GEN_@AM_DEFAULT_V@
)
1138 am__v_GEN_0
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;
1140 AM_V_at
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)
1141 am__v_at_
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1144 DEFAULT_INCLUDES
= -I.@am__isrc@
1145 depcomp
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1146 am__depfiles_maybe
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1148 COMPILE
= $(CC
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1149 $(CPPFLAGS
) $(AM_CFLAGS
) $(CFLAGS
)
1150 LTCOMPILE
= $(LIBTOOL
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1151 $(LIBTOOLFLAGS
) --mode
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$(CC
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1152 $(DEFAULT_INCLUDES
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1153 $(AM_CFLAGS
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1154 AM_V_CC
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1155 am__v_CC_
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1168 $(bpf_libsim_a_SOURCES
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1169 $(cr16_libsim_a_SOURCES
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1170 $(d10v_libsim_a_SOURCES
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1173 $(igen_libigen_a_SOURCES
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1177 $(mips_libsim_a_SOURCES
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1178 $(moxie_libsim_a_SOURCES
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1179 $(or1k_libsim_a_SOURCES
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1180 $(riscv_libsim_a_SOURCES
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1181 $(rx_libsim_a_SOURCES
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1182 $(v850_libsim_a_SOURCES
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1184 $(bpf_run_SOURCES
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1185 $(cris_run_SOURCES
) $(cris_rvdummy_SOURCES
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1186 $(d10v_gencode_SOURCES
) $(d10v_run_SOURCES
) \
1187 $(erc32_run_SOURCES
) erc32
/sis.c \
1188 $(example_synacor_run_SOURCES
) $(frv_run_SOURCES
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1189 $(ft32_run_SOURCES
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1190 $(igen_filter_SOURCES
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1192 $(igen_ld_decode_SOURCES
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1193 $(igen_table_SOURCES
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1195 $(m32r_run_SOURCES
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1196 $(m68hc11_run_SOURCES
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) \
1197 $(microblaze_run_SOURCES
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1198 $(mn10300_run_SOURCES
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1199 $(msp430_run_SOURCES
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1200 $(ppc_run_SOURCES
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1201 $(rl78_run_SOURCES
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1202 $(sh_run_SOURCES
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1203 testsuite
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1204 testsuite
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1205 testsuite
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1208 ctags-recursive dvi-recursive html-recursive info-recursive \
1209 install-data-recursive install-dvi-recursive \
1210 install-exec-recursive install-html-recursive \
1211 install-info-recursive install-pdf-recursive \
1212 install-ps-recursive install-recursive installcheck-recursive \
1213 installdirs-recursive pdf-recursive ps-recursive \
1214 tags-recursive uninstall-recursive
1215 am__can_run_installinfo
= \
1216 case
$$AM_UPDATE_INFO_DIR in \
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1229 am__nobase_strip
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1230 for p in
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1231 am__nobase_list
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1233 sed
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1234 $(AWK
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1236 { print $$2, files[$$2]; n[$$2] = 0; files[$$2] = "" } } \
1237 END { for (dir in files) print dir, files[dir] }'
1239 sed
'$$!N;$$!N;$$!N;$$!N;$$!N;$$!N;$$!N;s/\n/ /g' | \
1240 sed
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1241 am__uninstall_files_from_dir
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1243 ||
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1245 $(am__cd
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1247 am__installdirs
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1248 "$(DESTDIR)$(erc32docdir)" "$(DESTDIR)$(frvdocdir)" \
1249 "$(DESTDIR)$(or1kdocdir)" "$(DESTDIR)$(ppcdocdir)" \
1250 "$(DESTDIR)$(rxdocdir)" "$(DESTDIR)$(pkgincludedir)"
1251 DATA
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1252 $(or1kdoc_DATA
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1253 am__pkginclude_HEADERS_DIST
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1254 $(srcroot
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1255 HEADERS
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1256 RECURSIVE_CLEAN_TARGETS
= mostlyclean-recursive clean-recursive \
1257 distclean-recursive maintainer-clean-recursive
1258 am__recursive_targets
= \
1259 $(RECURSIVE_TARGETS
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1260 $(RECURSIVE_CLEAN_TARGETS
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1261 $(am__extra_recursive_targets
)
1262 AM_RECURSIVE_TARGETS
= $(am__recursive_targets
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1263 cscope
check recheck
1264 am__tagged_files
= $(HEADERS
) $(SOURCES
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1266 # Read a list of newline-separated strings from the standard input,
1267 # and print each of them once, without duplicates. Input order is
1269 am__uniquify_input
= $(AWK
) '\
1270 BEGIN { nonempty = 0; } \
1271 { items[$$0] = 1; nonempty = 1; } \
1272 END { if (nonempty) { for (i in items) print i; }; } \
1274 # Make sure the list of sources is unique. This is necessary because,
1275 # e.g., the same source file might be shared among _SOURCES variables
1276 # for different programs/libraries.
1277 am__define_uniq_tagged_files
= \
1278 list
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1279 unique
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1280 if test -f "$$i"; then echo $$i; else echo $(srcdir)/$$i; fi; \
1281 done | $(am__uniquify_input)`
1285 DEJATOOL
= $(PACKAGE
)
1286 RUNTESTDEFAULTFLAGS
= --tool
$$tool --srcdir $$srcdir
1289 am__tty_colors_dummy
= \
1290 mgn
= red
= grn
= lgn
= blu
= brg
= std
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1292 am__tty_colors
= { \
1293 $(am__tty_colors_dummy
); \
1294 if
test "X$(AM_COLOR_TESTS)" = Xno
; then \
1295 am__color_tests
=no
; \
1296 elif
test "X$(AM_COLOR_TESTS)" = Xalways
; then \
1297 am__color_tests
=yes
; \
1298 elif
test "X$$TERM" != Xdumb
&& { test -t
1; } 2>/dev
/null
; then \
1299 am__color_tests
=yes
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1301 if
test $$am__color_tests = yes
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1311 am__recheck_rx
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[ ]*:recheck
:[ ]*
1312 am__global_test_result_rx
= ^
[ ]*:global-test-result
:[ ]*
1313 am__copy_in_global_log_rx
= ^
[ ]*:copy-in-global-log
:[ ]*
1314 # A command that, given a newline-separated list of test names on the
1315 # standard input, print the name of the tests that are to be re-run
1316 # upon "make recheck".
1317 am__list_recheck_tests
= $(AWK
) '{ \
1319 while ((rc = (getline line < ($$0 ".trs"))) != 0) \
1323 if ((getline line2 < ($$0 ".log")) < 0) \
1327 else if (line ~ /$(am__recheck_rx)[nN][Oo]/) \
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1339 close ($$0 ".trs"); \
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1342 # A command that, given a newline-separated list of test names on the
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1344 am__create_global_log
= $(AWK
) ' \
1345 function fatal(msg) \
1347 print "fatal: making $@: " msg | "cat >&2"; \
1350 function rst_section(header) \
1353 len = length(header); \
1354 for (i = 1; i <= len; i = i + 1) \
1359 copy_in_global_log = 1; \
1360 global_test_result = "RUN"; \
1361 while ((rc = (getline line < ($$0 ".trs"))) != 0) \
1364 fatal("failed to read from " $$0 ".trs"); \
1365 if (line ~ /$(am__global_test_result_rx)/) \
1367 sub("$(am__global_test_result_rx)", "", line); \
1368 sub("[ ]*$$", "", line); \
1369 global_test_result = line; \
1371 else if (line ~ /$(am__copy_in_global_log_rx)[nN][oO]/) \
1372 copy_in_global_log = 0; \
1374 if (copy_in_global_log) \
1376 rst_section(global_test_result ": " $$0); \
1377 while ((rc = (getline line < ($$0 ".log"))) != 0) \
1380 fatal("failed to read from " $$0 ".log"); \
1385 close ($$0 ".trs"); \
1386 close ($$0 ".log"); \
1388 # Restructured Text title.
1389 am__rst_title
= { sed
's/.*/ & /;h;s/./=/g;p;x;s/ *$$//;p;g' && echo
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1390 # Solaris 10 'make', and several other traditional 'make' implementations,
1391 # pass "-e" to $(SHELL), and POSIX 2008 even requires this. Work around it
1392 # by disabling -e (using the XSI extension "set +e") if it's set.
1393 am__sh_e_setup
= case
$$- in
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*) set
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1394 # Default flags passed to test drivers.
1395 am__common_driver_flags
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1396 --color-tests
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1397 --enable-hard-errors
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1398 --expect-failure
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1399 # To be inserted before the command running the test. Creates the
1400 # directory for the log if needed. Stores in $dir the directory
1401 # containing $f, in $tst the test, in $log the log. Executes the
1402 # developer- defined test setup AM_TESTS_ENVIRONMENT (if any), and
1403 # passes TESTS_ENVIRONMENT. Set up options for the wrapper that
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1407 $(am__sh_e_setup
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1408 $(am__vpath_adj_setup
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) \
1409 $(am__tty_colors
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1410 srcdir=$(srcdir); export srcdir; \
1412 */*) am__odir
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1415 test "x$$am__odir" = x
"." ||
test -d
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1416 ||
$(MKDIR_P
) "$$am__odir" || exit
$$?
; \
1417 if
test -f
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/; \
1418 elif
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1420 tst
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1422 am__enable_hard_errors
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1424 am__enable_hard_errors
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; \
1426 case
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1427 *[\ \
]$$f[\ \
]* |
*[\ \
]$$dir$$f[\ \
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1428 am__expect_failure
=yes
;; \
1430 am__expect_failure
=no
;; \
1432 $(AM_TESTS_ENVIRONMENT
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)
1433 # A shell command to get the names of the tests scripts with any registered
1434 # extension removed (i.e., equivalently, the names of the test logs, with
1435 # the '.log' extension removed). The result is saved in the shell variable
1436 # '$bases'. This honors runtime overriding of TESTS and TEST_LOGS. Sadly,
1437 # we cannot use something simpler, involving e.g., "$(TEST_LOGS:.log=)",
1438 # since that might cause problem with VPATH rewrites for suffix-less tests.
1439 # See also 'test-harness-vpath-rewrite.sh' and 'test-trs-basic.sh'.
1440 am__set_TESTS_bases
= \
1441 bases
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1442 bases
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1443 bases
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1444 RECHECK_LOGS
= $(TEST_LOGS
)
1445 TEST_SUITE_LOG
= test-suite.log
1446 TEST_EXTENSIONS
= @EXEEXT@ .
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1447 LOG_DRIVER
= $(SHELL
) $(top_srcdir
)/..
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1448 LOG_COMPILE
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1454 *) b
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1460 am__test_logs2
= $(am__test_logs1
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1461 TEST_LOGS
= $(am__test_logs2
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test.log
=.log
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1462 TEST_LOG_DRIVER
= $(SHELL
) $(top_srcdir
)/..
/test-driver
1463 TEST_LOG_COMPILE
= $(TEST_LOG_COMPILER
) $(AM_TEST_LOG_FLAGS
) \
1465 DIST_SUBDIRS
= $(SUBDIRS
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1468 AM_DEFAULT_VERBOSITY
= @AM_DEFAULT_VERBOSITY@
1470 AR_FOR_BUILD
= @AR_FOR_BUILD@
1471 AS_FOR_TARGET
= @AS_FOR_TARGET@
1472 AS_FOR_TARGET_AARCH64
= @AS_FOR_TARGET_AARCH64@
1473 AS_FOR_TARGET_ARM
= @AS_FOR_TARGET_ARM@
1474 AS_FOR_TARGET_AVR
= @AS_FOR_TARGET_AVR@
1475 AS_FOR_TARGET_BFIN
= @AS_FOR_TARGET_BFIN@
1476 AS_FOR_TARGET_BPF
= @AS_FOR_TARGET_BPF@
1477 AS_FOR_TARGET_CR16
= @AS_FOR_TARGET_CR16@
1478 AS_FOR_TARGET_CRIS
= @AS_FOR_TARGET_CRIS@
1479 AS_FOR_TARGET_D10V
= @AS_FOR_TARGET_D10V@
1480 AS_FOR_TARGET_ERC32
= @AS_FOR_TARGET_ERC32@
1481 AS_FOR_TARGET_EXAMPLE_SYNACOR
= @AS_FOR_TARGET_EXAMPLE_SYNACOR@
1482 AS_FOR_TARGET_FRV
= @AS_FOR_TARGET_FRV@
1483 AS_FOR_TARGET_FT32
= @AS_FOR_TARGET_FT32@
1484 AS_FOR_TARGET_H8300
= @AS_FOR_TARGET_H8300@
1485 AS_FOR_TARGET_IQ2000
= @AS_FOR_TARGET_IQ2000@
1486 AS_FOR_TARGET_LM32
= @AS_FOR_TARGET_LM32@
1487 AS_FOR_TARGET_M32C
= @AS_FOR_TARGET_M32C@
1488 AS_FOR_TARGET_M32R
= @AS_FOR_TARGET_M32R@
1489 AS_FOR_TARGET_M68HC11
= @AS_FOR_TARGET_M68HC11@
1490 AS_FOR_TARGET_MCORE
= @AS_FOR_TARGET_MCORE@
1491 AS_FOR_TARGET_MICROBLAZE
= @AS_FOR_TARGET_MICROBLAZE@
1492 AS_FOR_TARGET_MIPS
= @AS_FOR_TARGET_MIPS@
1493 AS_FOR_TARGET_MN10300
= @AS_FOR_TARGET_MN10300@
1494 AS_FOR_TARGET_MOXIE
= @AS_FOR_TARGET_MOXIE@
1495 AS_FOR_TARGET_MSP430
= @AS_FOR_TARGET_MSP430@
1496 AS_FOR_TARGET_OR1K
= @AS_FOR_TARGET_OR1K@
1497 AS_FOR_TARGET_PPC
= @AS_FOR_TARGET_PPC@
1498 AS_FOR_TARGET_PRU
= @AS_FOR_TARGET_PRU@
1499 AS_FOR_TARGET_RISCV
= @AS_FOR_TARGET_RISCV@
1500 AS_FOR_TARGET_RL78
= @AS_FOR_TARGET_RL78@
1501 AS_FOR_TARGET_RX
= @AS_FOR_TARGET_RX@
1502 AS_FOR_TARGET_SH
= @AS_FOR_TARGET_SH@
1503 AS_FOR_TARGET_V850
= @AS_FOR_TARGET_V850@
1504 AUTOCONF
= @AUTOCONF@
1505 AUTOHEADER
= @AUTOHEADER@
1506 AUTOMAKE
= @AUTOMAKE@
1509 CCDEPMODE
= @CCDEPMODE@
1510 CC_FOR_BUILD
= @CC_FOR_BUILD@
1511 CC_FOR_TARGET
= @CC_FOR_TARGET@
1512 CC_FOR_TARGET_AARCH64
= @CC_FOR_TARGET_AARCH64@
1513 CC_FOR_TARGET_ARM
= @CC_FOR_TARGET_ARM@
1514 CC_FOR_TARGET_AVR
= @CC_FOR_TARGET_AVR@
1515 CC_FOR_TARGET_BFIN
= @CC_FOR_TARGET_BFIN@
1516 CC_FOR_TARGET_BPF
= @CC_FOR_TARGET_BPF@
1517 CC_FOR_TARGET_CR16
= @CC_FOR_TARGET_CR16@
1518 CC_FOR_TARGET_CRIS
= @CC_FOR_TARGET_CRIS@
1519 CC_FOR_TARGET_D10V
= @CC_FOR_TARGET_D10V@
1520 CC_FOR_TARGET_ERC32
= @CC_FOR_TARGET_ERC32@
1521 CC_FOR_TARGET_EXAMPLE_SYNACOR
= @CC_FOR_TARGET_EXAMPLE_SYNACOR@
1522 CC_FOR_TARGET_FRV
= @CC_FOR_TARGET_FRV@
1523 CC_FOR_TARGET_FT32
= @CC_FOR_TARGET_FT32@
1524 CC_FOR_TARGET_H8300
= @CC_FOR_TARGET_H8300@
1525 CC_FOR_TARGET_IQ2000
= @CC_FOR_TARGET_IQ2000@
1526 CC_FOR_TARGET_LM32
= @CC_FOR_TARGET_LM32@
1527 CC_FOR_TARGET_M32C
= @CC_FOR_TARGET_M32C@
1528 CC_FOR_TARGET_M32R
= @CC_FOR_TARGET_M32R@
1529 CC_FOR_TARGET_M68HC11
= @CC_FOR_TARGET_M68HC11@
1530 CC_FOR_TARGET_MCORE
= @CC_FOR_TARGET_MCORE@
1531 CC_FOR_TARGET_MICROBLAZE
= @CC_FOR_TARGET_MICROBLAZE@
1532 CC_FOR_TARGET_MIPS
= @CC_FOR_TARGET_MIPS@
1533 CC_FOR_TARGET_MN10300
= @CC_FOR_TARGET_MN10300@
1534 CC_FOR_TARGET_MOXIE
= @CC_FOR_TARGET_MOXIE@
1535 CC_FOR_TARGET_MSP430
= @CC_FOR_TARGET_MSP430@
1536 CC_FOR_TARGET_OR1K
= @CC_FOR_TARGET_OR1K@
1537 CC_FOR_TARGET_PPC
= @CC_FOR_TARGET_PPC@
1538 CC_FOR_TARGET_PRU
= @CC_FOR_TARGET_PRU@
1539 CC_FOR_TARGET_RISCV
= @CC_FOR_TARGET_RISCV@
1540 CC_FOR_TARGET_RL78
= @CC_FOR_TARGET_RL78@
1541 CC_FOR_TARGET_RX
= @CC_FOR_TARGET_RX@
1542 CC_FOR_TARGET_SH
= @CC_FOR_TARGET_SH@
1543 CC_FOR_TARGET_V850
= @CC_FOR_TARGET_V850@
1545 CFLAGS_FOR_BUILD
= @CFLAGS_FOR_BUILD@
1546 CGEN_MAINT
= @CGEN_MAINT@
1548 CPPFLAGS
= @CPPFLAGS@
1549 CPPFLAGS_FOR_BUILD
= @CPPFLAGS_FOR_BUILD@
1550 CYGPATH_W
= @CYGPATH_W@
1551 C_DIALECT
= @C_DIALECT@
1554 DSYMUTIL
= @DSYMUTIL@
1564 IGEN_FLAGS_SMP
= @IGEN_FLAGS_SMP@
1566 INSTALL_DATA
= @INSTALL_DATA@
1567 INSTALL_PROGRAM
= @INSTALL_PROGRAM@
1568 INSTALL_SCRIPT
= @INSTALL_SCRIPT@
1569 INSTALL_STRIP_PROGRAM
= @INSTALL_STRIP_PROGRAM@
1572 LDFLAGS_FOR_BUILD
= @LDFLAGS_FOR_BUILD@
1573 LD_FOR_TARGET
= @LD_FOR_TARGET@
1574 LD_FOR_TARGET_AARCH64
= @LD_FOR_TARGET_AARCH64@
1575 LD_FOR_TARGET_ARM
= @LD_FOR_TARGET_ARM@
1576 LD_FOR_TARGET_AVR
= @LD_FOR_TARGET_AVR@
1577 LD_FOR_TARGET_BFIN
= @LD_FOR_TARGET_BFIN@
1578 LD_FOR_TARGET_BPF
= @LD_FOR_TARGET_BPF@
1579 LD_FOR_TARGET_CR16
= @LD_FOR_TARGET_CR16@
1580 LD_FOR_TARGET_CRIS
= @LD_FOR_TARGET_CRIS@
1581 LD_FOR_TARGET_D10V
= @LD_FOR_TARGET_D10V@
1582 LD_FOR_TARGET_ERC32
= @LD_FOR_TARGET_ERC32@
1583 LD_FOR_TARGET_EXAMPLE_SYNACOR
= @LD_FOR_TARGET_EXAMPLE_SYNACOR@
1584 LD_FOR_TARGET_FRV
= @LD_FOR_TARGET_FRV@
1585 LD_FOR_TARGET_FT32
= @LD_FOR_TARGET_FT32@
1586 LD_FOR_TARGET_H8300
= @LD_FOR_TARGET_H8300@
1587 LD_FOR_TARGET_IQ2000
= @LD_FOR_TARGET_IQ2000@
1588 LD_FOR_TARGET_LM32
= @LD_FOR_TARGET_LM32@
1589 LD_FOR_TARGET_M32C
= @LD_FOR_TARGET_M32C@
1590 LD_FOR_TARGET_M32R
= @LD_FOR_TARGET_M32R@
1591 LD_FOR_TARGET_M68HC11
= @LD_FOR_TARGET_M68HC11@
1592 LD_FOR_TARGET_MCORE
= @LD_FOR_TARGET_MCORE@
1593 LD_FOR_TARGET_MICROBLAZE
= @LD_FOR_TARGET_MICROBLAZE@
1594 LD_FOR_TARGET_MIPS
= @LD_FOR_TARGET_MIPS@
1595 LD_FOR_TARGET_MN10300
= @LD_FOR_TARGET_MN10300@
1596 LD_FOR_TARGET_MOXIE
= @LD_FOR_TARGET_MOXIE@
1597 LD_FOR_TARGET_MSP430
= @LD_FOR_TARGET_MSP430@
1598 LD_FOR_TARGET_OR1K
= @LD_FOR_TARGET_OR1K@
1599 LD_FOR_TARGET_PPC
= @LD_FOR_TARGET_PPC@
1600 LD_FOR_TARGET_PRU
= @LD_FOR_TARGET_PRU@
1601 LD_FOR_TARGET_RISCV
= @LD_FOR_TARGET_RISCV@
1602 LD_FOR_TARGET_RL78
= @LD_FOR_TARGET_RL78@
1603 LD_FOR_TARGET_RX
= @LD_FOR_TARGET_RX@
1604 LD_FOR_TARGET_SH
= @LD_FOR_TARGET_SH@
1605 LD_FOR_TARGET_V850
= @LD_FOR_TARGET_V850@
1611 LTLIBOBJS
= @LTLIBOBJS@
1613 MAKEINFO
= @MAKEINFO@
1622 PACKAGE_BUGREPORT
= @PACKAGE_BUGREPORT@
1623 PACKAGE_NAME
= @PACKAGE_NAME@
1624 PACKAGE_STRING
= @PACKAGE_STRING@
1625 PACKAGE_TARNAME
= @PACKAGE_TARNAME@
1626 PACKAGE_URL
= @PACKAGE_URL@
1627 PACKAGE_VERSION
= @PACKAGE_VERSION@
1628 PATH_SEPARATOR
= @PATH_SEPARATOR@
1629 PKGVERSION
= @PKGVERSION@
1630 PKG_CONFIG
= @PKG_CONFIG@
1631 PKG_CONFIG_LIBDIR
= @PKG_CONFIG_LIBDIR@
1632 PKG_CONFIG_PATH
= @PKG_CONFIG_PATH@
1634 RANLIB_FOR_BUILD
= @RANLIB_FOR_BUILD@
1635 READLINE_CFLAGS
= @READLINE_CFLAGS@
1636 READLINE_LIB
= @READLINE_LIB@
1637 REPORT_BUGS_TEXI
= @REPORT_BUGS_TEXI@
1638 REPORT_BUGS_TO
= @REPORT_BUGS_TO@
1639 SDL_CFLAGS
= @SDL_CFLAGS@
1640 SDL_LIBS
= @SDL_LIBS@
1642 SET_MAKE
= @SET_MAKE@
1644 SIM_ENABLED_ARCHES
= @SIM_ENABLED_ARCHES@
1645 SIM_FRV_TRAPDUMP_FLAGS
= @SIM_FRV_TRAPDUMP_FLAGS@
1646 SIM_HW_CFLAGS
= @SIM_HW_CFLAGS@
1647 SIM_HW_SOCKSER
= @SIM_HW_SOCKSER@
1648 SIM_INLINE
= @SIM_INLINE@
1649 SIM_MIPS_BITSIZE
= @SIM_MIPS_BITSIZE@
1650 SIM_MIPS_FPU_BITSIZE
= @SIM_MIPS_FPU_BITSIZE@
1651 SIM_MIPS_GEN
= @SIM_MIPS_GEN@
1652 SIM_MIPS_IGEN_ITABLE_FLAGS
= @SIM_MIPS_IGEN_ITABLE_FLAGS@
1653 SIM_MIPS_M16_FLAGS
= @SIM_MIPS_M16_FLAGS@
1654 SIM_MIPS_MULTI_IGEN_CONFIGS
= @SIM_MIPS_MULTI_IGEN_CONFIGS@
1655 SIM_MIPS_MULTI_OBJ
= @SIM_MIPS_MULTI_OBJ@
1656 SIM_MIPS_MULTI_SRC
= @SIM_MIPS_MULTI_SRC@
1657 SIM_MIPS_SINGLE_FLAGS
= @SIM_MIPS_SINGLE_FLAGS@
1658 SIM_MIPS_SUBTARGET
= @SIM_MIPS_SUBTARGET@
1659 SIM_PRIMARY_TARGET
= @SIM_PRIMARY_TARGET@
1660 SIM_RISCV_BITSIZE
= @SIM_RISCV_BITSIZE@
1661 SIM_RX_CYCLE_ACCURATE_FLAGS
= @SIM_RX_CYCLE_ACCURATE_FLAGS@
1662 SIM_TOOLCHAIN_VARS
= @SIM_TOOLCHAIN_VARS@
1664 TERMCAP_LIB
= @TERMCAP_LIB@
1666 WARN_CFLAGS
= @WARN_CFLAGS@
1667 WERROR_CFLAGS
= @WERROR_CFLAGS@
1668 abs_builddir
= @abs_builddir@
1669 abs_srcdir
= @abs_srcdir@
1670 abs_top_builddir
= @abs_top_builddir@
1671 abs_top_srcdir
= @abs_top_srcdir@
1672 ac_ct_CC
= @ac_ct_CC@
1673 ac_ct_DUMPBIN
= @ac_ct_DUMPBIN@
1674 am__include
= @am__include@
1675 am__leading_dot
= @am__leading_dot@
1676 am__quote
= @am__quote@
1678 am__untar
= @am__untar@
1681 build_alias
= @build_alias@
1682 build_cpu
= @build_cpu@
1683 build_os
= @build_os@
1684 build_vendor
= @build_vendor@
1685 builddir
= @builddir@
1689 datarootdir
= @datarootdir@
1692 exec_prefix = @
exec_prefix@
1694 host_alias
= @host_alias@
1695 host_cpu
= @host_cpu@
1697 host_vendor
= @host_vendor@
1699 includedir = @
includedir@
1701 install_sh
= @install_sh@
1703 libexecdir
= @libexecdir@
1704 localedir
= @localedir@
1705 localstatedir
= @localstatedir@
1708 oldincludedir = @
oldincludedir@
1711 program_transform_name
= @program_transform_name@
1714 sharedstatedir
= @sharedstatedir@
1717 sysconfdir
= @sysconfdir@
1719 target_alias
= @target_alias@
1720 target_cpu
= @target_cpu@
1721 target_os
= @target_os@
1722 target_vendor
= @target_vendor@
1723 top_build_prefix
= @top_build_prefix@
1724 top_builddir
= @top_builddir@
1725 top_srcdir
= @top_srcdir@
1726 AUTOMAKE_OPTIONS
= dejagnu foreign no-dist subdir-objects
1727 ACLOCAL_AMFLAGS
= -Im4
-I..
-I..
/config
1728 GNULIB_PARENT_DIR
= ..
1729 srccom
= $(srcdir)/common
1730 srcroot
= $(srcdir)/..
1732 pkginclude_HEADERS
= $(am__append_1
)
1733 noinst_LIBRARIES
= common
/libcommon.a
$(am__append_3
) $(am__append_6
) \
1734 $(am__append_8
) $(am__append_10
) $(am__append_12
) \
1735 $(am__append_14
) $(am__append_19
) $(am__append_25
) \
1736 $(am__append_31
) $(am__append_37
) $(am__append_41
) \
1737 $(am__append_43
) $(am__append_48
) $(am__append_50
) \
1738 $(am__append_52
) $(am__append_57
) $(am__append_62
) \
1739 $(am__append_67
) $(am__append_72
) $(am__append_77
) \
1740 $(am__append_79
) $(am__append_84
) $(am__append_93
) \
1741 $(am__append_98
) $(am__append_100
) $(am__append_102
) \
1742 $(am__append_108
) $(am__append_110
) $(am__append_112
) \
1743 $(am__append_114
) $(am__append_116
) $(am__append_122
)
1744 BUILT_SOURCES
= $(am__append_16
) $(am__append_21
) $(am__append_28
) \
1745 $(am__append_33
) $(am__append_45
) $(am__append_54
) \
1746 $(am__append_59
) $(am__append_69
) $(am__append_86
) \
1747 $(am__append_95
) $(am__append_104
) $(am__append_118
) \
1749 CLEANFILES
= common
/version.c common
/version.c-stamp \
1750 testsuite
/common
/bits-gen testsuite
/common
/bits32m0.c \
1751 testsuite
/common
/bits32m31.c testsuite
/common
/bits64m0.c \
1752 testsuite
/common
/bits64m63.c
1753 DISTCLEANFILES
= $(am__append_92
)
1754 MOSTLYCLEANFILES
= core
$(SIM_ENABLED_ARCHES
:%=%/*.o
) \
1755 $(SIM_ENABLED_ARCHES
:%=%/hw-config.h
) \
1756 $(SIM_ENABLED_ARCHES
:%=%/stamp-hw
) \
1757 $(common_GEN_MODULES_C_TARGETS
) $(patsubst \
1758 %,%/stamp-modules
,$(SIM_ENABLED_ARCHES
)) $(am__append_5
) \
1759 site-sim-config.exp testrun.log testrun.sum
$(am__append_18
) \
1760 $(am__append_24
) $(am__append_30
) $(am__append_36
) \
1761 $(am__append_47
) $(am__append_56
) $(am__append_61
) \
1762 $(am__append_66
) $(am__append_71
) $(am__append_76
) \
1763 $(am__append_91
) $(am__append_97
) $(am__append_106
) \
1764 $(am__append_121
) $(am__append_126
)
1768 $(AM_CFLAGS_
$(subst -,_
,$(@D
))) \
1769 $(AM_CFLAGS_
$(subst -,_
,$(@D
)_
$(@F
)))
1771 AM_CPPFLAGS
= $(INCGNU
) -I
$(srcroot
) -I
$(srcroot
)/include -I..
/bfd \
1772 -I..
-I
$(@D
) -I
$(srcdir)/$(@D
) $(SIM_HW_CFLAGS
) $(SIM_INLINE
) \
1773 $(AM_CPPFLAGS_
$(subst -,_
,$(@D
))) $(AM_CPPFLAGS_
$(subst \
1774 -,_
,$(@D
)_
$(@F
))) -I
$(srcdir)/common
-DSIM_TOPDIR_BUILD
1775 AM_CPPFLAGS_FOR_BUILD
= -I
$(srcroot
)/include $(SIM_HW_CFLAGS
) \
1776 $(SIM_INLINE
) -I
$(srcdir)/common
1777 COMPILE_FOR_BUILD
= $(CC_FOR_BUILD
) $(AM_CPPFLAGS_FOR_BUILD
) $(CPPFLAGS_FOR_BUILD
) $(CFLAGS_FOR_BUILD
)
1778 LINK_FOR_BUILD
= $(CC_FOR_BUILD
) $(CFLAGS_FOR_BUILD
) $(LDFLAGS_FOR_BUILD
) -o
$@
1779 SIM_ALL_RECURSIVE_DEPS
= common
/libcommon.a \
1780 $(common_GEN_MODULES_C_TARGETS
) $(am__append_17
) \
1781 $(am__append_22
) $(am__append_29
) $(am__append_34
) \
1782 $(am__append_46
) $(am__append_55
) $(am__append_60
) \
1783 $(am__append_64
) $(am__append_70
) $(am__append_74
) \
1784 $(am__append_90
) $(am__append_96
) $(am__append_105
) \
1785 $(am__append_119
) $(am__append_125
)
1786 SIM_INSTALL_DATA_LOCAL_DEPS
=
1787 SIM_INSTALL_EXEC_LOCAL_DEPS
= $(am__append_39
)
1788 SIM_UNINSTALL_LOCAL_DEPS
= $(am__append_40
)
1789 SIM_DEPBASE
= $(@D
)/$(DEPDIR
)/$(@F
:.o
=)
1791 $(AM_V_CC
)$(COMPILE
) -MT
$@
-MD
-MP
-MF
$(SIM_DEPBASE
).Tpo
-c
-o
$@
$< && \
1792 $(am__mv
) $(SIM_DEPBASE
).Tpo
$(SIM_DEPBASE
).Po
1794 AM_CPPFLAGS_common
= -DSIM_COMMON_BUILD
1795 common_libcommon_a_SOURCES
= \
1797 common
/portability.c \
1800 common
/target-newlib-errno.c \
1801 common
/target-newlib-open.c \
1802 common
/target-newlib-signal.c \
1803 common
/target-newlib-syscall.c \
1806 SIM_COMMON_HW_OBJS
= \
1818 SIM_NEW_COMMON_OBJS
= sim-arange.o sim-bits.o sim-close.o \
1819 sim-command.o sim-config.o sim-core.o sim-cpu.o sim-endian.o \
1820 sim-engine.o sim-events.o sim-fpu.o sim-hload.o sim-hrw.o \
1821 sim-io.o sim-info.o sim-memopt.o sim-model.o sim-module.o \
1822 sim-options.o sim-profile.o sim-reason.o sim-reg.o \
1823 sim-signal.o sim-stop.o sim-syscall.o sim-trace.o sim-utils.o \
1824 sim-watch.o
$(am__append_2
)
1825 SIM_HW_DEVICES
= cfi core pal glue
1826 am_arch_d
= $(subst -,_
,$(@D
))
1827 GEN_MODULES_C_SRCS
= \
1829 $(patsubst %,$(srcdir)/%,$($(am_arch_d
)_libsim_a_SOURCES
)) \
1830 $(patsubst %.o
,$(srcdir)/%.c
,$($(am_arch_d
)_libsim_a_OBJECTS
) $($(am_arch_d
)_libsim_a_LIBADD
)) \
1831 $(filter-out %.o
,$(patsubst $(@D
)/%.o
,$(srcdir)/common
/%.c
,$($(am_arch_d
)_libsim_a_LIBADD
))))
1833 common_GEN_MODULES_C_TARGETS
= $(patsubst %,%/modules.c
,$(filter-out ppc
,$(SIM_ENABLED_ARCHES
)))
1834 LIBIBERTY_LIB
= ..
/libiberty
/libiberty.a
1835 BFD_LIB
= ..
/bfd
/libbfd.la
1836 OPCODES_LIB
= ..
/opcodes
/libopcodes.la
1842 $(LIBGNU_EXTRA_LIBS
)
1844 GUILE
= $(or
$(wildcard ..
/guile
/libguile
/guile
),guile
)
1845 CGEN
= "$(GUILE) -l $(cgendir)/guile.scm -s"
1847 CGEN_CPU_DIR
= $(cgendir
)/cpu
1848 CPU_DIR
= $(srcroot
)/cpu
1849 CGEN_ARCHFILE
= $(CPU_DIR
)/$(@D
).cpu
1850 CGEN_READ_SCM
= $(cgendir
)/sim.scm
1851 CGEN_ARCH_SCM
= $(cgendir
)/sim-arch.scm
1852 CGEN_CPU_SCM
= $(cgendir
)/sim-cpu.scm
$(cgendir
)/sim-model.scm
1853 CGEN_DECODE_SCM
= $(cgendir
)/sim-decode.scm
1854 CGEN_DESC_SCM
= $(cgendir
)/desc.scm
$(cgendir
)/desc-cpu.scm
1855 CGEN_CPU_EXTR
= /extr
/
1856 CGEN_CPU_READ
= /read
/
1857 CGEN_CPU_WRITE
= /write
/
1858 CGEN_CPU_SEM
= /sem
/
1859 CGEN_CPU_SEMSW
= /semsw
/
1860 CGEN_WRAPPER
= $(srccom
)/cgen.sh
1862 $(SHELL
) $(CGEN_WRAPPER
) arch
$(srcdir)/$(@D
) \
1863 $(CGEN
) $(cgendir
) "$(CGENFLAGS)" \
1864 $(@D
) "$$FLAGS" ignored
"$$isa" $$mach ignored \
1865 $(CGEN_ARCHFILE
) ignored
1868 $(SHELL
) $(CGEN_WRAPPER
) cpu
$(srcdir)/$(@D
) \
1869 $(CGEN
) $(cgendir
) "$(CGENFLAGS)" \
1870 $(@D
) "$$FLAGS" $$cpu "$$isa" $$mach "$$SUFFIX" \
1871 $(CGEN_ARCHFILE
) "$$EXTRAFILES"
1874 $(SHELL
) $(CGEN_WRAPPER
) defs
$(srcdir)/$(@D
) \
1875 $(CGEN
) $(cgendir
) "$(CGENFLAGS)" \
1876 $(@D
) "$$FLAGS" $$cpu "$$isa" $$mach "$$SUFFIX" \
1877 $(CGEN_ARCHFILE
) ignored
1880 $(SHELL
) $(CGEN_WRAPPER
) decode
$(srcdir)/$(@D
) \
1881 $(CGEN
) $(cgendir
) "$(CGENFLAGS)" \
1882 $(@D
) "$$FLAGS" $$cpu "$$isa" $$mach "$$SUFFIX" \
1883 $(CGEN_ARCHFILE
) "$$EXTRAFILES"
1885 CGEN_GEN_CPU_DECODE
= \
1886 $(SHELL
) $(CGEN_WRAPPER
) cpu-decode
$(srcdir)/$(@D
) \
1887 $(CGEN
) $(cgendir
) "$(CGENFLAGS)" \
1888 $(@D
) "$$FLAGS" $$cpu "$$isa" $$mach "$$SUFFIX" \
1889 $(CGEN_ARCHFILE
) "$$EXTRAFILES"
1891 CGEN_GEN_CPU_DESC
= \
1892 $(SHELL
) $(CGEN_WRAPPER
) desc
$(srcdir)/$(@D
) \
1893 $(CGEN
) $(cgendir
) "$(CGENFLAGS)" \
1894 $(@D
) "$$FLAGS" $$cpu "$$isa" $$mach "$$SUFFIX" \
1895 $(CGEN_ARCHFILE
) ignored
$$opcfile
1898 # igen leaks memory, and therefore makes AddressSanitizer unhappy. Disable
1899 # leak detection while running it.
1900 @SIM_ENABLE_IGEN_TRUE@IGEN
= igen
/igen
$(EXEEXT
)
1901 @SIM_ENABLE_IGEN_TRUE@IGEN_RUN
= ASAN_OPTIONS
=detect_leaks
=0 $(IGEN
) $(IGEN_FLAGS_SMP
)
1902 @SIM_ENABLE_IGEN_TRUE@igen_libigen_a_SOURCES
= \
1903 @SIM_ENABLE_IGEN_TRUE@ igen
/table.c \
1904 @SIM_ENABLE_IGEN_TRUE@ igen
/lf.c \
1905 @SIM_ENABLE_IGEN_TRUE@ igen
/misc.c \
1906 @SIM_ENABLE_IGEN_TRUE@ igen
/filter_host.c \
1907 @SIM_ENABLE_IGEN_TRUE@ igen
/ld-decode.c \
1908 @SIM_ENABLE_IGEN_TRUE@ igen
/ld-cache.c \
1909 @SIM_ENABLE_IGEN_TRUE@ igen
/filter.c \
1910 @SIM_ENABLE_IGEN_TRUE@ igen
/ld-insn.c \
1911 @SIM_ENABLE_IGEN_TRUE@ igen
/gen-model.c \
1912 @SIM_ENABLE_IGEN_TRUE@ igen
/gen-itable.c \
1913 @SIM_ENABLE_IGEN_TRUE@ igen
/gen-icache.c \
1914 @SIM_ENABLE_IGEN_TRUE@ igen
/gen-semantics.c \
1915 @SIM_ENABLE_IGEN_TRUE@ igen
/gen-idecode.c \
1916 @SIM_ENABLE_IGEN_TRUE@ igen
/gen-support.c \
1917 @SIM_ENABLE_IGEN_TRUE@ igen
/gen-engine.c \
1918 @SIM_ENABLE_IGEN_TRUE@ igen
/gen.c
1920 @SIM_ENABLE_IGEN_TRUE@igen_igen_SOURCES
= igen
/igen.c
1921 @SIM_ENABLE_IGEN_TRUE@igen_igen_LDADD
= igen
/libigen.a
1922 @SIM_ENABLE_IGEN_TRUE@igen_filter_SOURCES
=
1923 @SIM_ENABLE_IGEN_TRUE@igen_filter_LDADD
= igen
/filter-main.o igen
/libigen.a
1924 @SIM_ENABLE_IGEN_TRUE@igen_gen_SOURCES
=
1925 @SIM_ENABLE_IGEN_TRUE@igen_gen_LDADD
= igen
/gen-main.o igen
/libigen.a
1926 @SIM_ENABLE_IGEN_TRUE@igen_ld_cache_SOURCES
=
1927 @SIM_ENABLE_IGEN_TRUE@igen_ld_cache_LDADD
= igen
/ld-cache-main.o igen
/libigen.a
1928 @SIM_ENABLE_IGEN_TRUE@igen_ld_decode_SOURCES
=
1929 @SIM_ENABLE_IGEN_TRUE@igen_ld_decode_LDADD
= igen
/ld-decode-main.o igen
/libigen.a
1930 @SIM_ENABLE_IGEN_TRUE@igen_ld_insn_SOURCES
=
1931 @SIM_ENABLE_IGEN_TRUE@igen_ld_insn_LDADD
= igen
/ld-insn-main.o igen
/libigen.a
1932 @SIM_ENABLE_IGEN_TRUE@igen_table_SOURCES
=
1933 @SIM_ENABLE_IGEN_TRUE@igen_table_LDADD
= igen
/table-main.o igen
/libigen.a
1934 @SIM_ENABLE_IGEN_TRUE@igen_IGEN_TOOLS
= \
1935 @SIM_ENABLE_IGEN_TRUE@
$(IGEN
) \
1936 @SIM_ENABLE_IGEN_TRUE@ igen
/filter \
1937 @SIM_ENABLE_IGEN_TRUE@ igen
/gen \
1938 @SIM_ENABLE_IGEN_TRUE@ igen
/ld-cache \
1939 @SIM_ENABLE_IGEN_TRUE@ igen
/ld-decode \
1940 @SIM_ENABLE_IGEN_TRUE@ igen
/ld-insn \
1941 @SIM_ENABLE_IGEN_TRUE@ igen
/table
1943 EXTRA_DEJAGNU_SITE_CONFIG
= site-sim-config.exp
1945 # Custom verbose test variables that automake doesn't provide (yet?).
1946 AM_V_RUNTEST
= $(AM_V_RUNTEST_@AM_V@
)
1947 AM_V_RUNTEST_
= $(AM_V_RUNTEST_@AM_DEFAULT_V@
)
1948 AM_V_RUNTEST_0
= @echo
" RUNTEST $(RUNTESTFLAGS) $*";
1951 LC_ALL
=C
; export LC_ALL
; \
1952 EXPECT
=${EXPECT} ; export EXPECT
; \
1953 runtest
=$(RUNTEST
); \
1954 $$runtest $(RUNTESTFLAGS
)
1956 testsuite_common_CPPFLAGS
= \
1957 -I
$(srcdir)/common \
1958 -I
$(srcroot
)/include \
1961 @SIM_ENABLE_ARCH_aarch64_TRUE@aarch64_libsim_a_SOURCES
= \
1962 @SIM_ENABLE_ARCH_aarch64_TRUE@
$(common_libcommon_a_SOURCES
)
1964 @SIM_ENABLE_ARCH_aarch64_TRUE@aarch64_libsim_a_LIBADD
= \
1965 @SIM_ENABLE_ARCH_aarch64_TRUE@
$(patsubst %,aarch64
/%,$(SIM_NEW_COMMON_OBJS
)) \
1966 @SIM_ENABLE_ARCH_aarch64_TRUE@
$(patsubst %,aarch64
/dv-
%.o
,$(SIM_HW_DEVICES
)) \
1967 @SIM_ENABLE_ARCH_aarch64_TRUE@ aarch64
/cpustate.o \
1968 @SIM_ENABLE_ARCH_aarch64_TRUE@ aarch64
/interp.o \
1969 @SIM_ENABLE_ARCH_aarch64_TRUE@ aarch64
/memory.o \
1970 @SIM_ENABLE_ARCH_aarch64_TRUE@ aarch64
/modules.o \
1971 @SIM_ENABLE_ARCH_aarch64_TRUE@ aarch64
/sim-resume.o \
1972 @SIM_ENABLE_ARCH_aarch64_TRUE@ aarch64
/simulator.o
1974 @SIM_ENABLE_ARCH_aarch64_TRUE@aarch64_run_SOURCES
=
1975 @SIM_ENABLE_ARCH_aarch64_TRUE@aarch64_run_LDADD
= \
1976 @SIM_ENABLE_ARCH_aarch64_TRUE@ aarch64
/nrun.o \
1977 @SIM_ENABLE_ARCH_aarch64_TRUE@ aarch64
/libsim.a \
1978 @SIM_ENABLE_ARCH_aarch64_TRUE@
$(SIM_COMMON_LIBS
)
1980 @SIM_ENABLE_ARCH_arm_TRUE@AM_CPPFLAGS_arm
= -DMODET
1981 @SIM_ENABLE_ARCH_arm_TRUE@arm_libsim_a_SOURCES
= \
1982 @SIM_ENABLE_ARCH_arm_TRUE@
$(common_libcommon_a_SOURCES
)
1984 @SIM_ENABLE_ARCH_arm_TRUE@arm_libsim_a_LIBADD
= \
1985 @SIM_ENABLE_ARCH_arm_TRUE@ arm
/wrapper.o \
1986 @SIM_ENABLE_ARCH_arm_TRUE@
$(patsubst %,arm
/%,$(SIM_NEW_COMMON_OBJS
)) \
1987 @SIM_ENABLE_ARCH_arm_TRUE@
$(patsubst %,arm
/dv-
%.o
,$(SIM_HW_DEVICES
)) \
1988 @SIM_ENABLE_ARCH_arm_TRUE@ arm
/armemu.o \
1989 @SIM_ENABLE_ARCH_arm_TRUE@ arm
/armemu32.o arm
/arminit.o arm
/armos.o arm
/armsupp.o \
1990 @SIM_ENABLE_ARCH_arm_TRUE@ arm
/armvirt.o arm
/thumbemu.o \
1991 @SIM_ENABLE_ARCH_arm_TRUE@ arm
/armcopro.o arm
/maverick.o arm
/iwmmxt.o \
1992 @SIM_ENABLE_ARCH_arm_TRUE@ arm
/modules.o
1994 @SIM_ENABLE_ARCH_arm_TRUE@arm_run_SOURCES
=
1995 @SIM_ENABLE_ARCH_arm_TRUE@arm_run_LDADD
= \
1996 @SIM_ENABLE_ARCH_arm_TRUE@ arm
/nrun.o \
1997 @SIM_ENABLE_ARCH_arm_TRUE@ arm
/libsim.a \
1998 @SIM_ENABLE_ARCH_arm_TRUE@
$(SIM_COMMON_LIBS
)
2000 @SIM_ENABLE_ARCH_arm_TRUE@armdocdir
= $(docdir
)/arm
2001 @SIM_ENABLE_ARCH_arm_TRUE@armdoc_DATA
= arm
/README
2002 @SIM_ENABLE_ARCH_avr_TRUE@avr_libsim_a_SOURCES
= \
2003 @SIM_ENABLE_ARCH_avr_TRUE@
$(common_libcommon_a_SOURCES
)
2005 @SIM_ENABLE_ARCH_avr_TRUE@avr_libsim_a_LIBADD
= \
2006 @SIM_ENABLE_ARCH_avr_TRUE@ avr
/interp.o \
2007 @SIM_ENABLE_ARCH_avr_TRUE@
$(patsubst %,avr
/%,$(SIM_NEW_COMMON_OBJS
)) \
2008 @SIM_ENABLE_ARCH_avr_TRUE@
$(patsubst %,avr
/dv-
%.o
,$(SIM_HW_DEVICES
)) \
2009 @SIM_ENABLE_ARCH_avr_TRUE@ avr
/modules.o \
2010 @SIM_ENABLE_ARCH_avr_TRUE@ avr
/sim-resume.o
2012 @SIM_ENABLE_ARCH_avr_TRUE@avr_run_SOURCES
=
2013 @SIM_ENABLE_ARCH_avr_TRUE@avr_run_LDADD
= \
2014 @SIM_ENABLE_ARCH_avr_TRUE@ avr
/nrun.o \
2015 @SIM_ENABLE_ARCH_avr_TRUE@ avr
/libsim.a \
2016 @SIM_ENABLE_ARCH_avr_TRUE@
$(SIM_COMMON_LIBS
)
2018 @SIM_ENABLE_ARCH_bfin_TRUE@AM_CPPFLAGS_bfin
= $(SDL_CFLAGS
)
2019 @SIM_ENABLE_ARCH_bfin_TRUE@bfin_libsim_a_SOURCES
= \
2020 @SIM_ENABLE_ARCH_bfin_TRUE@
$(common_libcommon_a_SOURCES
)
2022 @SIM_ENABLE_ARCH_bfin_TRUE@bfin_libsim_a_LIBADD
= \
2023 @SIM_ENABLE_ARCH_bfin_TRUE@
$(patsubst %,bfin
/%,$(SIM_NEW_COMMON_OBJS
)) \
2024 @SIM_ENABLE_ARCH_bfin_TRUE@
$(patsubst %,bfin
/dv-
%.o
,$(SIM_HW_DEVICES
)) \
2025 @SIM_ENABLE_ARCH_bfin_TRUE@
$(patsubst %,bfin
/dv-
%.o
,$(bfin_SIM_EXTRA_HW_DEVICES
)) \
2026 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin
/bfin-sim.o \
2027 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin
/devices.o \
2028 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin
/gui.o \
2029 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin
/interp.o \
2030 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin
/machs.o \
2031 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin
/modules.o \
2032 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin
/sim-resume.o
2034 @SIM_ENABLE_ARCH_bfin_TRUE@bfin_run_SOURCES
=
2035 @SIM_ENABLE_ARCH_bfin_TRUE@bfin_run_LDADD
= \
2036 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin
/nrun.o \
2037 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin
/libsim.a \
2038 @SIM_ENABLE_ARCH_bfin_TRUE@
$(SIM_COMMON_LIBS
)
2040 @SIM_ENABLE_ARCH_bfin_TRUE@bfin_SIM_EXTRA_HW_DEVICES
= \
2041 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_cec \
2042 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_ctimer \
2043 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_dma \
2044 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_dmac \
2045 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_ebiu_amc \
2046 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_ebiu_ddrc \
2047 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_ebiu_sdc \
2048 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_emac \
2049 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_eppi \
2050 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_evt \
2051 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_gpio \
2052 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_gpio2 \
2053 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_gptimer \
2054 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_jtag \
2055 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_mmu \
2056 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_nfc \
2057 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_otp \
2058 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_pfmon \
2059 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_pint \
2060 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_pll \
2061 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_ppi \
2062 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_rtc \
2063 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_sic \
2064 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_spi \
2065 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_trace \
2066 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_twi \
2067 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_uart \
2068 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_uart2 \
2069 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_wdog \
2070 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_wp \
2071 @SIM_ENABLE_ARCH_bfin_TRUE@ eth_phy
2073 @SIM_ENABLE_ARCH_bpf_TRUE@AM_CPPFLAGS_bpf
= -DWITH_TARGET_WORD_BITSIZE
=64
2074 @SIM_ENABLE_ARCH_bpf_TRUE@AM_CPPFLAGS_bpf_mloop_le.o
= -DWANT_ISA_EBPFLE
2075 @SIM_ENABLE_ARCH_bpf_TRUE@AM_CPPFLAGS_bpf_mloop_be.o
= -DWANT_ISA_EBPFBE
2076 @SIM_ENABLE_ARCH_bpf_TRUE@AM_CPPFLAGS_bpf_decode_le.o
= -DWANT_ISA_EBPFLE
2077 @SIM_ENABLE_ARCH_bpf_TRUE@AM_CPPFLAGS_bpf_decode_be.o
= -DWANT_ISA_EBPFBE
2078 @SIM_ENABLE_ARCH_bpf_TRUE@AM_CPPFLAGS_bpf_sem_le.o
= -DWANT_ISA_EBPFLE
2079 @SIM_ENABLE_ARCH_bpf_TRUE@AM_CPPFLAGS_bpf_sem_be.o
= -DWANT_ISA_EBPFBE
2080 @SIM_ENABLE_ARCH_bpf_TRUE@bpf_libsim_a_SOURCES
= \
2081 @SIM_ENABLE_ARCH_bpf_TRUE@
$(common_libcommon_a_SOURCES
)
2083 @SIM_ENABLE_ARCH_bpf_TRUE@bpf_libsim_a_LIBADD
= \
2084 @SIM_ENABLE_ARCH_bpf_TRUE@
$(patsubst %,bpf
/%,$(SIM_NEW_COMMON_OBJS
)) \
2085 @SIM_ENABLE_ARCH_bpf_TRUE@
$(patsubst %,bpf
/dv-
%.o
,$(SIM_HW_DEVICES
)) \
2086 @SIM_ENABLE_ARCH_bpf_TRUE@ bpf
/modules.o \
2087 @SIM_ENABLE_ARCH_bpf_TRUE@ \
2088 @SIM_ENABLE_ARCH_bpf_TRUE@ bpf
/cgen-run.o \
2089 @SIM_ENABLE_ARCH_bpf_TRUE@ bpf
/cgen-scache.o \
2090 @SIM_ENABLE_ARCH_bpf_TRUE@ bpf
/cgen-trace.o \
2091 @SIM_ENABLE_ARCH_bpf_TRUE@ bpf
/cgen-utils.o \
2092 @SIM_ENABLE_ARCH_bpf_TRUE@ \
2093 @SIM_ENABLE_ARCH_bpf_TRUE@ bpf
/arch.o \
2094 @SIM_ENABLE_ARCH_bpf_TRUE@ bpf
/cpu.o \
2095 @SIM_ENABLE_ARCH_bpf_TRUE@ bpf
/decode-le.o \
2096 @SIM_ENABLE_ARCH_bpf_TRUE@ bpf
/decode-be.o \
2097 @SIM_ENABLE_ARCH_bpf_TRUE@ bpf
/sem-le.o \
2098 @SIM_ENABLE_ARCH_bpf_TRUE@ bpf
/sem-be.o \
2099 @SIM_ENABLE_ARCH_bpf_TRUE@ bpf
/mloop-le.o \
2100 @SIM_ENABLE_ARCH_bpf_TRUE@ bpf
/mloop-be.o \
2101 @SIM_ENABLE_ARCH_bpf_TRUE@ \
2102 @SIM_ENABLE_ARCH_bpf_TRUE@ bpf
/bpf.o \
2103 @SIM_ENABLE_ARCH_bpf_TRUE@ bpf
/bpf-helpers.o \
2104 @SIM_ENABLE_ARCH_bpf_TRUE@ bpf
/sim-if.o \
2105 @SIM_ENABLE_ARCH_bpf_TRUE@ bpf
/traps.o
2107 @SIM_ENABLE_ARCH_bpf_TRUE@bpf_run_SOURCES
=
2108 @SIM_ENABLE_ARCH_bpf_TRUE@bpf_run_LDADD
= \
2109 @SIM_ENABLE_ARCH_bpf_TRUE@ bpf
/nrun.o \
2110 @SIM_ENABLE_ARCH_bpf_TRUE@ bpf
/libsim.a \
2111 @SIM_ENABLE_ARCH_bpf_TRUE@
$(SIM_COMMON_LIBS
)
2113 @SIM_ENABLE_ARCH_bpf_TRUE@bpf_BUILD_OUTPUTS
= \
2114 @SIM_ENABLE_ARCH_bpf_TRUE@ bpf
/mloop-le.c \
2115 @SIM_ENABLE_ARCH_bpf_TRUE@ bpf
/stamp-mloop-le \
2116 @SIM_ENABLE_ARCH_bpf_TRUE@ bpf
/mloop-be.c \
2117 @SIM_ENABLE_ARCH_bpf_TRUE@ bpf
/stamp-mloop-be
2119 @SIM_ENABLE_ARCH_cr16_TRUE@cr16_libsim_a_SOURCES
= \
2120 @SIM_ENABLE_ARCH_cr16_TRUE@
$(common_libcommon_a_SOURCES
)
2122 @SIM_ENABLE_ARCH_cr16_TRUE@cr16_libsim_a_LIBADD
= \
2123 @SIM_ENABLE_ARCH_cr16_TRUE@
$(patsubst %,cr16
/%,$(SIM_NEW_COMMON_OBJS
)) \
2124 @SIM_ENABLE_ARCH_cr16_TRUE@
$(patsubst %,cr16
/dv-
%.o
,$(SIM_HW_DEVICES
)) \
2125 @SIM_ENABLE_ARCH_cr16_TRUE@ cr16
/interp.o \
2126 @SIM_ENABLE_ARCH_cr16_TRUE@ cr16
/modules.o \
2127 @SIM_ENABLE_ARCH_cr16_TRUE@ cr16
/sim-resume.o \
2128 @SIM_ENABLE_ARCH_cr16_TRUE@ cr16
/simops.o \
2129 @SIM_ENABLE_ARCH_cr16_TRUE@ cr16
/table.o
2131 @SIM_ENABLE_ARCH_cr16_TRUE@cr16_run_SOURCES
=
2132 @SIM_ENABLE_ARCH_cr16_TRUE@cr16_run_LDADD
= \
2133 @SIM_ENABLE_ARCH_cr16_TRUE@ cr16
/nrun.o \
2134 @SIM_ENABLE_ARCH_cr16_TRUE@ cr16
/libsim.a \
2135 @SIM_ENABLE_ARCH_cr16_TRUE@
$(SIM_COMMON_LIBS
)
2137 @SIM_ENABLE_ARCH_cr16_TRUE@cr16_BUILD_OUTPUTS
= \
2138 @SIM_ENABLE_ARCH_cr16_TRUE@ cr16
/gencode
$(EXEEXT
) \
2139 @SIM_ENABLE_ARCH_cr16_TRUE@ cr16
/table.c
2141 @SIM_ENABLE_ARCH_cr16_TRUE@cr16_gencode_SOURCES
= cr16
/gencode.c
2142 @SIM_ENABLE_ARCH_cr16_TRUE@cr16_gencode_LDADD
= cr16
/cr16-opc.o
2143 @SIM_ENABLE_ARCH_cris_TRUE@cris_libsim_a_SOURCES
= \
2144 @SIM_ENABLE_ARCH_cris_TRUE@
$(common_libcommon_a_SOURCES
)
2146 @SIM_ENABLE_ARCH_cris_TRUE@cris_libsim_a_LIBADD
= \
2147 @SIM_ENABLE_ARCH_cris_TRUE@
$(patsubst %,cris
/%,$(SIM_NEW_COMMON_OBJS
)) \
2148 @SIM_ENABLE_ARCH_cris_TRUE@
$(patsubst %,cris
/dv-
%.o
,$(SIM_HW_DEVICES
)) \
2149 @SIM_ENABLE_ARCH_cris_TRUE@
$(patsubst %,cris
/dv-
%.o
,$(cris_SIM_EXTRA_HW_DEVICES
)) \
2150 @SIM_ENABLE_ARCH_cris_TRUE@ cris
/modules.o \
2151 @SIM_ENABLE_ARCH_cris_TRUE@ \
2152 @SIM_ENABLE_ARCH_cris_TRUE@ cris
/cgen-run.o \
2153 @SIM_ENABLE_ARCH_cris_TRUE@ cris
/cgen-scache.o \
2154 @SIM_ENABLE_ARCH_cris_TRUE@ cris
/cgen-trace.o \
2155 @SIM_ENABLE_ARCH_cris_TRUE@ cris
/cgen-utils.o \
2156 @SIM_ENABLE_ARCH_cris_TRUE@ \
2157 @SIM_ENABLE_ARCH_cris_TRUE@ cris
/arch.o \
2158 @SIM_ENABLE_ARCH_cris_TRUE@ cris
/crisv10f.o \
2159 @SIM_ENABLE_ARCH_cris_TRUE@ cris
/cpuv10.o \
2160 @SIM_ENABLE_ARCH_cris_TRUE@ cris
/decodev10.o \
2161 @SIM_ENABLE_ARCH_cris_TRUE@ cris
/modelv10.o \
2162 @SIM_ENABLE_ARCH_cris_TRUE@ cris
/mloopv10f.o \
2163 @SIM_ENABLE_ARCH_cris_TRUE@ cris
/crisv32f.o \
2164 @SIM_ENABLE_ARCH_cris_TRUE@ cris
/cpuv32.o \
2165 @SIM_ENABLE_ARCH_cris_TRUE@ cris
/decodev32.o \
2166 @SIM_ENABLE_ARCH_cris_TRUE@ cris
/modelv32.o \
2167 @SIM_ENABLE_ARCH_cris_TRUE@ cris
/mloopv32f.o \
2168 @SIM_ENABLE_ARCH_cris_TRUE@ \
2169 @SIM_ENABLE_ARCH_cris_TRUE@ cris
/sim-if.o \
2170 @SIM_ENABLE_ARCH_cris_TRUE@ cris
/traps.o
2172 @SIM_ENABLE_ARCH_cris_TRUE@cris_run_SOURCES
=
2173 @SIM_ENABLE_ARCH_cris_TRUE@cris_run_LDADD
= \
2174 @SIM_ENABLE_ARCH_cris_TRUE@ cris
/nrun.o \
2175 @SIM_ENABLE_ARCH_cris_TRUE@ cris
/libsim.a \
2176 @SIM_ENABLE_ARCH_cris_TRUE@
$(SIM_COMMON_LIBS
)
2178 @SIM_ENABLE_ARCH_cris_TRUE@cris_SIM_EXTRA_HW_DEVICES
= rv cris cris_900000xx
2179 @SIM_ENABLE_ARCH_cris_TRUE@cris_rvdummy_SOURCES
= cris
/rvdummy.c
2180 @SIM_ENABLE_ARCH_cris_TRUE@cris_rvdummy_LDADD
= $(LIBIBERTY_LIB
)
2181 @SIM_ENABLE_ARCH_cris_TRUE@cris_BUILD_OUTPUTS
= \
2182 @SIM_ENABLE_ARCH_cris_TRUE@ cris
/mloopv10f.c \
2183 @SIM_ENABLE_ARCH_cris_TRUE@ cris
/stamp-mloop-v10f \
2184 @SIM_ENABLE_ARCH_cris_TRUE@ cris
/mloopv32f.c \
2185 @SIM_ENABLE_ARCH_cris_TRUE@ cris
/stamp-mloop-v32f
2187 @SIM_ENABLE_ARCH_d10v_TRUE@d10v_libsim_a_SOURCES
= \
2188 @SIM_ENABLE_ARCH_d10v_TRUE@
$(common_libcommon_a_SOURCES
)
2190 @SIM_ENABLE_ARCH_d10v_TRUE@d10v_libsim_a_LIBADD
= \
2191 @SIM_ENABLE_ARCH_d10v_TRUE@ d10v
/interp.o \
2192 @SIM_ENABLE_ARCH_d10v_TRUE@
$(patsubst %,d10v
/%,$(SIM_NEW_COMMON_OBJS
)) \
2193 @SIM_ENABLE_ARCH_d10v_TRUE@
$(patsubst %,d10v
/dv-
%.o
,$(SIM_HW_DEVICES
)) \
2194 @SIM_ENABLE_ARCH_d10v_TRUE@ d10v
/endian.o \
2195 @SIM_ENABLE_ARCH_d10v_TRUE@ d10v
/modules.o \
2196 @SIM_ENABLE_ARCH_d10v_TRUE@ d10v
/sim-resume.o \
2197 @SIM_ENABLE_ARCH_d10v_TRUE@ d10v
/simops.o \
2198 @SIM_ENABLE_ARCH_d10v_TRUE@ d10v
/table.o
2200 @SIM_ENABLE_ARCH_d10v_TRUE@d10v_run_SOURCES
=
2201 @SIM_ENABLE_ARCH_d10v_TRUE@d10v_run_LDADD
= \
2202 @SIM_ENABLE_ARCH_d10v_TRUE@ d10v
/nrun.o \
2203 @SIM_ENABLE_ARCH_d10v_TRUE@ d10v
/libsim.a \
2204 @SIM_ENABLE_ARCH_d10v_TRUE@
$(SIM_COMMON_LIBS
)
2206 @SIM_ENABLE_ARCH_d10v_TRUE@d10v_BUILD_OUTPUTS
= \
2207 @SIM_ENABLE_ARCH_d10v_TRUE@ d10v
/gencode
$(EXEEXT
) \
2208 @SIM_ENABLE_ARCH_d10v_TRUE@ d10v
/table.c
2210 @SIM_ENABLE_ARCH_d10v_TRUE@d10v_gencode_SOURCES
= d10v
/gencode.c
2211 @SIM_ENABLE_ARCH_d10v_TRUE@d10v_gencode_LDADD
= d10v
/d10v-opc.o
2212 @SIM_ENABLE_ARCH_erc32_TRUE@READLINE_SRC
= $(srcroot
)/readline
/readline
2213 @SIM_ENABLE_ARCH_erc32_TRUE@AM_CPPFLAGS_erc32
= $(READLINE_CFLAGS
) \
2214 @SIM_ENABLE_ARCH_erc32_TRUE@
-DFAST_UART
2215 @SIM_ENABLE_ARCH_erc32_TRUE@erc32_libsim_a_SOURCES
= \
2216 @SIM_ENABLE_ARCH_erc32_TRUE@
$(common_libcommon_a_SOURCES
)
2218 @SIM_ENABLE_ARCH_erc32_TRUE@erc32_libsim_a_LIBADD
= \
2219 @SIM_ENABLE_ARCH_erc32_TRUE@ erc32
/erc32.o \
2220 @SIM_ENABLE_ARCH_erc32_TRUE@ erc32
/exec.o \
2221 @SIM_ENABLE_ARCH_erc32_TRUE@ erc32
/float.o \
2222 @SIM_ENABLE_ARCH_erc32_TRUE@ erc32
/func.o \
2223 @SIM_ENABLE_ARCH_erc32_TRUE@ erc32
/help.o \
2224 @SIM_ENABLE_ARCH_erc32_TRUE@ erc32
/interf.o \
2225 @SIM_ENABLE_ARCH_erc32_TRUE@ erc32
/modules.o
2227 @SIM_ENABLE_ARCH_erc32_TRUE@erc32_run_SOURCES
=
2228 @SIM_ENABLE_ARCH_erc32_TRUE@erc32_run_LDADD
= \
2229 @SIM_ENABLE_ARCH_erc32_TRUE@ erc32
/sis.o \
2230 @SIM_ENABLE_ARCH_erc32_TRUE@ erc32
/libsim.a \
2231 @SIM_ENABLE_ARCH_erc32_TRUE@
$(SIM_COMMON_LIBS
) $(READLINE_LIB
) $(TERMCAP_LIB
)
2233 @SIM_ENABLE_ARCH_erc32_TRUE@erc32docdir
= $(docdir
)/erc32
2234 @SIM_ENABLE_ARCH_erc32_TRUE@erc32doc_DATA
= erc32
/README.erc32 erc32
/README.gdb erc32
/README.sis
2235 @SIM_ENABLE_ARCH_examples_TRUE@example_synacor_libsim_a_SOURCES
= \
2236 @SIM_ENABLE_ARCH_examples_TRUE@
$(common_libcommon_a_SOURCES
)
2238 @SIM_ENABLE_ARCH_examples_TRUE@example_synacor_libsim_a_LIBADD
= \
2239 @SIM_ENABLE_ARCH_examples_TRUE@
$(patsubst %,example-synacor
/%,$(SIM_NEW_COMMON_OBJS
)) \
2240 @SIM_ENABLE_ARCH_examples_TRUE@
$(patsubst %,example-synacor
/dv-
%.o
,$(SIM_HW_DEVICES
)) \
2241 @SIM_ENABLE_ARCH_examples_TRUE@ example-synacor
/interp.o \
2242 @SIM_ENABLE_ARCH_examples_TRUE@ example-synacor
/modules.o \
2243 @SIM_ENABLE_ARCH_examples_TRUE@ example-synacor
/sim-main.o \
2244 @SIM_ENABLE_ARCH_examples_TRUE@ example-synacor
/sim-resume.o
2246 @SIM_ENABLE_ARCH_examples_TRUE@example_synacor_run_SOURCES
=
2247 @SIM_ENABLE_ARCH_examples_TRUE@example_synacor_run_LDADD
= \
2248 @SIM_ENABLE_ARCH_examples_TRUE@ example-synacor
/nrun.o \
2249 @SIM_ENABLE_ARCH_examples_TRUE@ example-synacor
/libsim.a \
2250 @SIM_ENABLE_ARCH_examples_TRUE@
$(SIM_COMMON_LIBS
)
2252 @SIM_ENABLE_ARCH_frv_TRUE@AM_CPPFLAGS_frv
= $(SIM_FRV_TRAPDUMP_FLAGS
)
2253 @SIM_ENABLE_ARCH_frv_TRUE@AM_CFLAGS_frv_memory.o
= -Wno-error
2254 @SIM_ENABLE_ARCH_frv_TRUE@AM_CFLAGS_frv_sem.o
= -Wno-error
2255 @SIM_ENABLE_ARCH_frv_TRUE@frv_libsim_a_SOURCES
= \
2256 @SIM_ENABLE_ARCH_frv_TRUE@
$(common_libcommon_a_SOURCES
)
2258 @SIM_ENABLE_ARCH_frv_TRUE@frv_libsim_a_LIBADD
= \
2259 @SIM_ENABLE_ARCH_frv_TRUE@
$(patsubst %,frv
/%,$(SIM_NEW_COMMON_OBJS
)) \
2260 @SIM_ENABLE_ARCH_frv_TRUE@
$(patsubst %,frv
/dv-
%.o
,$(SIM_HW_DEVICES
)) \
2261 @SIM_ENABLE_ARCH_frv_TRUE@ frv
/modules.o \
2262 @SIM_ENABLE_ARCH_frv_TRUE@ \
2263 @SIM_ENABLE_ARCH_frv_TRUE@ frv
/cgen-accfp.o \
2264 @SIM_ENABLE_ARCH_frv_TRUE@ frv
/cgen-fpu.o \
2265 @SIM_ENABLE_ARCH_frv_TRUE@ frv
/cgen-run.o \
2266 @SIM_ENABLE_ARCH_frv_TRUE@ frv
/cgen-scache.o \
2267 @SIM_ENABLE_ARCH_frv_TRUE@ frv
/cgen-trace.o \
2268 @SIM_ENABLE_ARCH_frv_TRUE@ frv
/cgen-utils.o \
2269 @SIM_ENABLE_ARCH_frv_TRUE@ \
2270 @SIM_ENABLE_ARCH_frv_TRUE@ frv
/arch.o \
2271 @SIM_ENABLE_ARCH_frv_TRUE@ frv
/cgen-par.o \
2272 @SIM_ENABLE_ARCH_frv_TRUE@ frv
/cpu.o \
2273 @SIM_ENABLE_ARCH_frv_TRUE@ frv
/decode.o \
2274 @SIM_ENABLE_ARCH_frv_TRUE@ frv
/frv.o \
2275 @SIM_ENABLE_ARCH_frv_TRUE@ frv
/mloop.o \
2276 @SIM_ENABLE_ARCH_frv_TRUE@ frv
/model.o \
2277 @SIM_ENABLE_ARCH_frv_TRUE@ frv
/sem.o \
2278 @SIM_ENABLE_ARCH_frv_TRUE@ \
2279 @SIM_ENABLE_ARCH_frv_TRUE@ frv
/cache.o \
2280 @SIM_ENABLE_ARCH_frv_TRUE@ frv
/interrupts.o \
2281 @SIM_ENABLE_ARCH_frv_TRUE@ frv
/memory.o \
2282 @SIM_ENABLE_ARCH_frv_TRUE@ frv
/options.o \
2283 @SIM_ENABLE_ARCH_frv_TRUE@ frv
/pipeline.o \
2284 @SIM_ENABLE_ARCH_frv_TRUE@ frv
/profile.o \
2285 @SIM_ENABLE_ARCH_frv_TRUE@ frv
/profile-fr400.o \
2286 @SIM_ENABLE_ARCH_frv_TRUE@ frv
/profile-fr450.o \
2287 @SIM_ENABLE_ARCH_frv_TRUE@ frv
/profile-fr500.o \
2288 @SIM_ENABLE_ARCH_frv_TRUE@ frv
/profile-fr550.o \
2289 @SIM_ENABLE_ARCH_frv_TRUE@ frv
/registers.o \
2290 @SIM_ENABLE_ARCH_frv_TRUE@ frv
/reset.o \
2291 @SIM_ENABLE_ARCH_frv_TRUE@ frv
/sim-if.o \
2292 @SIM_ENABLE_ARCH_frv_TRUE@ frv
/traps.o
2294 @SIM_ENABLE_ARCH_frv_TRUE@frv_run_SOURCES
=
2295 @SIM_ENABLE_ARCH_frv_TRUE@frv_run_LDADD
= \
2296 @SIM_ENABLE_ARCH_frv_TRUE@ frv
/nrun.o \
2297 @SIM_ENABLE_ARCH_frv_TRUE@ frv
/libsim.a \
2298 @SIM_ENABLE_ARCH_frv_TRUE@
$(SIM_COMMON_LIBS
)
2300 @SIM_ENABLE_ARCH_frv_TRUE@frvdocdir
= $(docdir
)/frv
2301 @SIM_ENABLE_ARCH_frv_TRUE@frvdoc_DATA
= frv
/README
2302 @SIM_ENABLE_ARCH_frv_TRUE@frv_BUILD_OUTPUTS
= \
2303 @SIM_ENABLE_ARCH_frv_TRUE@ frv
/mloop.c \
2304 @SIM_ENABLE_ARCH_frv_TRUE@ frv
/stamp-mloop
2306 @SIM_ENABLE_ARCH_ft32_TRUE@ft32_libsim_a_SOURCES
= \
2307 @SIM_ENABLE_ARCH_ft32_TRUE@
$(common_libcommon_a_SOURCES
)
2309 @SIM_ENABLE_ARCH_ft32_TRUE@ft32_libsim_a_LIBADD
= \
2310 @SIM_ENABLE_ARCH_ft32_TRUE@
$(patsubst %,ft32
/%,$(SIM_NEW_COMMON_OBJS
)) \
2311 @SIM_ENABLE_ARCH_ft32_TRUE@
$(patsubst %,ft32
/dv-
%.o
,$(SIM_HW_DEVICES
)) \
2312 @SIM_ENABLE_ARCH_ft32_TRUE@ ft32
/interp.o \
2313 @SIM_ENABLE_ARCH_ft32_TRUE@ ft32
/modules.o \
2314 @SIM_ENABLE_ARCH_ft32_TRUE@ ft32
/sim-resume.o
2316 @SIM_ENABLE_ARCH_ft32_TRUE@ft32_run_SOURCES
=
2317 @SIM_ENABLE_ARCH_ft32_TRUE@ft32_run_LDADD
= \
2318 @SIM_ENABLE_ARCH_ft32_TRUE@ ft32
/nrun.o \
2319 @SIM_ENABLE_ARCH_ft32_TRUE@ ft32
/libsim.a \
2320 @SIM_ENABLE_ARCH_ft32_TRUE@
$(SIM_COMMON_LIBS
)
2322 @SIM_ENABLE_ARCH_h8300_TRUE@h8300_libsim_a_SOURCES
= \
2323 @SIM_ENABLE_ARCH_h8300_TRUE@
$(common_libcommon_a_SOURCES
)
2325 @SIM_ENABLE_ARCH_h8300_TRUE@h8300_libsim_a_LIBADD
= \
2326 @SIM_ENABLE_ARCH_h8300_TRUE@ h8300
/compile.o \
2327 @SIM_ENABLE_ARCH_h8300_TRUE@
$(patsubst %,h8300
/%,$(SIM_NEW_COMMON_OBJS
)) \
2328 @SIM_ENABLE_ARCH_h8300_TRUE@
$(patsubst %,h8300
/dv-
%.o
,$(SIM_HW_DEVICES
)) \
2329 @SIM_ENABLE_ARCH_h8300_TRUE@ h8300
/modules.o \
2330 @SIM_ENABLE_ARCH_h8300_TRUE@ h8300
/sim-resume.o
2332 @SIM_ENABLE_ARCH_h8300_TRUE@h8300_run_SOURCES
=
2333 @SIM_ENABLE_ARCH_h8300_TRUE@h8300_run_LDADD
= \
2334 @SIM_ENABLE_ARCH_h8300_TRUE@ h8300
/nrun.o \
2335 @SIM_ENABLE_ARCH_h8300_TRUE@ h8300
/libsim.a \
2336 @SIM_ENABLE_ARCH_h8300_TRUE@
$(SIM_COMMON_LIBS
)
2338 @SIM_ENABLE_ARCH_iq2000_TRUE@iq2000_libsim_a_SOURCES
= \
2339 @SIM_ENABLE_ARCH_iq2000_TRUE@
$(common_libcommon_a_SOURCES
)
2341 @SIM_ENABLE_ARCH_iq2000_TRUE@iq2000_libsim_a_LIBADD
= \
2342 @SIM_ENABLE_ARCH_iq2000_TRUE@
$(patsubst %,iq2000
/%,$(SIM_NEW_COMMON_OBJS
)) \
2343 @SIM_ENABLE_ARCH_iq2000_TRUE@
$(patsubst %,iq2000
/dv-
%.o
,$(SIM_HW_DEVICES
)) \
2344 @SIM_ENABLE_ARCH_iq2000_TRUE@ iq2000
/modules.o \
2345 @SIM_ENABLE_ARCH_iq2000_TRUE@ \
2346 @SIM_ENABLE_ARCH_iq2000_TRUE@ iq2000
/cgen-run.o \
2347 @SIM_ENABLE_ARCH_iq2000_TRUE@ iq2000
/cgen-scache.o \
2348 @SIM_ENABLE_ARCH_iq2000_TRUE@ iq2000
/cgen-trace.o \
2349 @SIM_ENABLE_ARCH_iq2000_TRUE@ iq2000
/cgen-utils.o \
2350 @SIM_ENABLE_ARCH_iq2000_TRUE@ \
2351 @SIM_ENABLE_ARCH_iq2000_TRUE@ iq2000
/arch.o \
2352 @SIM_ENABLE_ARCH_iq2000_TRUE@ iq2000
/cpu.o \
2353 @SIM_ENABLE_ARCH_iq2000_TRUE@ iq2000
/decode.o \
2354 @SIM_ENABLE_ARCH_iq2000_TRUE@ iq2000
/iq2000.o \
2355 @SIM_ENABLE_ARCH_iq2000_TRUE@ iq2000
/sem.o \
2356 @SIM_ENABLE_ARCH_iq2000_TRUE@ iq2000
/mloop.o \
2357 @SIM_ENABLE_ARCH_iq2000_TRUE@ iq2000
/model.o \
2358 @SIM_ENABLE_ARCH_iq2000_TRUE@ \
2359 @SIM_ENABLE_ARCH_iq2000_TRUE@ iq2000
/sim-if.o
2361 @SIM_ENABLE_ARCH_iq2000_TRUE@iq2000_run_SOURCES
=
2362 @SIM_ENABLE_ARCH_iq2000_TRUE@iq2000_run_LDADD
= \
2363 @SIM_ENABLE_ARCH_iq2000_TRUE@ iq2000
/nrun.o \
2364 @SIM_ENABLE_ARCH_iq2000_TRUE@ iq2000
/libsim.a \
2365 @SIM_ENABLE_ARCH_iq2000_TRUE@
$(SIM_COMMON_LIBS
)
2367 @SIM_ENABLE_ARCH_iq2000_TRUE@iq2000_BUILD_OUTPUTS
= \
2368 @SIM_ENABLE_ARCH_iq2000_TRUE@ iq2000
/mloop.c \
2369 @SIM_ENABLE_ARCH_iq2000_TRUE@ iq2000
/stamp-mloop
2371 @SIM_ENABLE_ARCH_lm32_TRUE@lm32_libsim_a_SOURCES
= \
2372 @SIM_ENABLE_ARCH_lm32_TRUE@
$(common_libcommon_a_SOURCES
)
2374 @SIM_ENABLE_ARCH_lm32_TRUE@lm32_libsim_a_LIBADD
= \
2375 @SIM_ENABLE_ARCH_lm32_TRUE@
$(patsubst %,lm32
/%,$(SIM_NEW_COMMON_OBJS
)) \
2376 @SIM_ENABLE_ARCH_lm32_TRUE@
$(patsubst %,lm32
/dv-
%.o
,$(SIM_HW_DEVICES
)) \
2377 @SIM_ENABLE_ARCH_lm32_TRUE@
$(patsubst %,lm32
/dv-
%.o
,$(lm32_SIM_EXTRA_HW_DEVICES
)) \
2378 @SIM_ENABLE_ARCH_lm32_TRUE@ lm32
/modules.o \
2379 @SIM_ENABLE_ARCH_lm32_TRUE@ \
2380 @SIM_ENABLE_ARCH_lm32_TRUE@ lm32
/cgen-run.o \
2381 @SIM_ENABLE_ARCH_lm32_TRUE@ lm32
/cgen-scache.o \
2382 @SIM_ENABLE_ARCH_lm32_TRUE@ lm32
/cgen-trace.o \
2383 @SIM_ENABLE_ARCH_lm32_TRUE@ lm32
/cgen-utils.o \
2384 @SIM_ENABLE_ARCH_lm32_TRUE@ \
2385 @SIM_ENABLE_ARCH_lm32_TRUE@ lm32
/arch.o \
2386 @SIM_ENABLE_ARCH_lm32_TRUE@ lm32
/cpu.o \
2387 @SIM_ENABLE_ARCH_lm32_TRUE@ lm32
/decode.o \
2388 @SIM_ENABLE_ARCH_lm32_TRUE@ lm32
/sem.o \
2389 @SIM_ENABLE_ARCH_lm32_TRUE@ lm32
/mloop.o \
2390 @SIM_ENABLE_ARCH_lm32_TRUE@ lm32
/model.o \
2391 @SIM_ENABLE_ARCH_lm32_TRUE@ \
2392 @SIM_ENABLE_ARCH_lm32_TRUE@ lm32
/lm32.o \
2393 @SIM_ENABLE_ARCH_lm32_TRUE@ lm32
/sim-if.o \
2394 @SIM_ENABLE_ARCH_lm32_TRUE@ lm32
/traps.o \
2395 @SIM_ENABLE_ARCH_lm32_TRUE@ lm32
/user.o
2397 @SIM_ENABLE_ARCH_lm32_TRUE@lm32_run_SOURCES
=
2398 @SIM_ENABLE_ARCH_lm32_TRUE@lm32_run_LDADD
= \
2399 @SIM_ENABLE_ARCH_lm32_TRUE@ lm32
/nrun.o \
2400 @SIM_ENABLE_ARCH_lm32_TRUE@ lm32
/libsim.a \
2401 @SIM_ENABLE_ARCH_lm32_TRUE@
$(SIM_COMMON_LIBS
)
2403 @SIM_ENABLE_ARCH_lm32_TRUE@lm32_SIM_EXTRA_HW_DEVICES
= lm32cpu lm32timer lm32uart
2404 @SIM_ENABLE_ARCH_lm32_TRUE@lm32_BUILD_OUTPUTS
= \
2405 @SIM_ENABLE_ARCH_lm32_TRUE@ lm32
/mloop.c \
2406 @SIM_ENABLE_ARCH_lm32_TRUE@ lm32
/stamp-mloop
2408 @SIM_ENABLE_ARCH_m32c_TRUE@AM_CPPFLAGS_m32c
= -DTIMER_A
2409 @SIM_ENABLE_ARCH_m32c_TRUE@m32c_libsim_a_SOURCES
= \
2410 @SIM_ENABLE_ARCH_m32c_TRUE@
$(common_libcommon_a_SOURCES
)
2412 @SIM_ENABLE_ARCH_m32c_TRUE@m32c_libsim_a_LIBADD
= \
2413 @SIM_ENABLE_ARCH_m32c_TRUE@ m32c
/gdb-if.o \
2414 @SIM_ENABLE_ARCH_m32c_TRUE@ m32c
/int.o \
2415 @SIM_ENABLE_ARCH_m32c_TRUE@ m32c
/load.o \
2416 @SIM_ENABLE_ARCH_m32c_TRUE@ m32c
/m32c.o \
2417 @SIM_ENABLE_ARCH_m32c_TRUE@ m32c
/mem.o \
2418 @SIM_ENABLE_ARCH_m32c_TRUE@ m32c
/misc.o \
2419 @SIM_ENABLE_ARCH_m32c_TRUE@ m32c
/modules.o \
2420 @SIM_ENABLE_ARCH_m32c_TRUE@ m32c
/r8c.o \
2421 @SIM_ENABLE_ARCH_m32c_TRUE@ m32c
/reg.o \
2422 @SIM_ENABLE_ARCH_m32c_TRUE@ m32c
/srcdest.o \
2423 @SIM_ENABLE_ARCH_m32c_TRUE@ m32c
/syscalls.o \
2424 @SIM_ENABLE_ARCH_m32c_TRUE@ m32c
/trace.o
2426 @SIM_ENABLE_ARCH_m32c_TRUE@m32c_run_SOURCES
=
2427 @SIM_ENABLE_ARCH_m32c_TRUE@m32c_run_LDADD
= \
2428 @SIM_ENABLE_ARCH_m32c_TRUE@ m32c
/main.o \
2429 @SIM_ENABLE_ARCH_m32c_TRUE@ m32c
/libsim.a \
2430 @SIM_ENABLE_ARCH_m32c_TRUE@
$(SIM_COMMON_LIBS
)
2432 @SIM_ENABLE_ARCH_m32c_TRUE@m32c_BUILD_OUTPUTS
= \
2433 @SIM_ENABLE_ARCH_m32c_TRUE@ m32c
/opc2c
$(EXEEXT
) \
2434 @SIM_ENABLE_ARCH_m32c_TRUE@ m32c
/m32c.c \
2435 @SIM_ENABLE_ARCH_m32c_TRUE@ m32c
/r8c.c
2437 @SIM_ENABLE_ARCH_m32c_TRUE@m32c_opc2c_SOURCES
= m32c
/opc2c.c
2439 # opc2c leaks memory, and therefore makes AddressSanitizer unhappy. Disable
2440 # leak detection while running it.
2441 @SIM_ENABLE_ARCH_m32c_TRUE@m32c_OPC2C_RUN
= ASAN_OPTIONS
=detect_leaks
=0 m32c
/opc2c
$(EXEEXT
)
2442 @SIM_ENABLE_ARCH_m32r_TRUE@AM_CFLAGS_m32r_cpu.o
= -Wno-error
2443 @SIM_ENABLE_ARCH_m32r_TRUE@AM_CFLAGS_m32r_cpu2.o
= -Wno-error
2444 @SIM_ENABLE_ARCH_m32r_TRUE@AM_CFLAGS_m32r_cpux.o
= -Wno-error
2445 @SIM_ENABLE_ARCH_m32r_TRUE@AM_CFLAGS_m32r_m32r.o
= -Wno-error
2446 @SIM_ENABLE_ARCH_m32r_TRUE@AM_CFLAGS_m32r_m32r2.o
= -Wno-error
2447 @SIM_ENABLE_ARCH_m32r_TRUE@AM_CFLAGS_m32r_m32rx.o
= -Wno-error
2448 @SIM_ENABLE_ARCH_m32r_TRUE@AM_CFLAGS_m32r_mloop.o
= -Wno-error
2449 @SIM_ENABLE_ARCH_m32r_TRUE@AM_CFLAGS_m32r_mloop2.o
= -Wno-error
2450 @SIM_ENABLE_ARCH_m32r_TRUE@AM_CFLAGS_m32r_mloopx.o
= -Wno-error
2451 @SIM_ENABLE_ARCH_m32r_TRUE@AM_CFLAGS_m32r_sem.o
= -Wno-error
2452 @SIM_ENABLE_ARCH_m32r_TRUE@AM_CFLAGS_m32r_sim_if.o
= -Wno-error
2453 @SIM_ENABLE_ARCH_m32r_TRUE@AM_CFLAGS_m32r_traps.o
= -Wno-error
2454 @SIM_ENABLE_ARCH_m32r_TRUE@m32r_libsim_a_SOURCES
= \
2455 @SIM_ENABLE_ARCH_m32r_TRUE@
$(common_libcommon_a_SOURCES
)
2457 @SIM_ENABLE_ARCH_m32r_TRUE@m32r_libsim_a_LIBADD
= \
2458 @SIM_ENABLE_ARCH_m32r_TRUE@
$(patsubst %,m32r
/%,$(SIM_NEW_COMMON_OBJS
)) \
2459 @SIM_ENABLE_ARCH_m32r_TRUE@
$(patsubst %,m32r
/dv-
%.o
,$(SIM_HW_DEVICES
)) \
2460 @SIM_ENABLE_ARCH_m32r_TRUE@
$(patsubst %,m32r
/dv-
%.o
,$(m32r_SIM_EXTRA_HW_DEVICES
)) \
2461 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r
/modules.o \
2462 @SIM_ENABLE_ARCH_m32r_TRUE@ \
2463 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r
/cgen-run.o \
2464 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r
/cgen-scache.o \
2465 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r
/cgen-trace.o \
2466 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r
/cgen-utils.o \
2467 @SIM_ENABLE_ARCH_m32r_TRUE@ \
2468 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r
/arch.o \
2469 @SIM_ENABLE_ARCH_m32r_TRUE@ \
2470 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r
/m32r.o \
2471 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r
/cpu.o \
2472 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r
/decode.o \
2473 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r
/sem.o \
2474 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r
/model.o \
2475 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r
/mloop.o \
2476 @SIM_ENABLE_ARCH_m32r_TRUE@ \
2477 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r
/m32rx.o \
2478 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r
/cpux.o \
2479 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r
/decodex.o \
2480 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r
/modelx.o \
2481 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r
/mloopx.o \
2482 @SIM_ENABLE_ARCH_m32r_TRUE@ \
2483 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r
/m32r2.o \
2484 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r
/cpu2.o \
2485 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r
/decode2.o \
2486 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r
/model2.o \
2487 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r
/mloop2.o \
2488 @SIM_ENABLE_ARCH_m32r_TRUE@ \
2489 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r
/sim-if.o \
2490 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r
/traps.o
2492 @SIM_ENABLE_ARCH_m32r_TRUE@m32r_run_SOURCES
=
2493 @SIM_ENABLE_ARCH_m32r_TRUE@m32r_run_LDADD
= \
2494 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r
/nrun.o \
2495 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r
/libsim.a \
2496 @SIM_ENABLE_ARCH_m32r_TRUE@
$(SIM_COMMON_LIBS
)
2498 @SIM_ENABLE_ARCH_m32r_TRUE@m32r_SIM_EXTRA_HW_DEVICES
= m32r_cache m32r_uart
2499 @SIM_ENABLE_ARCH_m32r_TRUE@m32r_BUILD_OUTPUTS
= \
2500 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r
/mloop.c \
2501 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r
/stamp-mloop \
2502 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r
/mloopx.c \
2503 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r
/stamp-mloop-x \
2504 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r
/mloop2.c \
2505 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r
/stamp-mloop-2
2507 @SIM_ENABLE_ARCH_m68hc11_TRUE@AM_CPPFLAGS_m68hc11
= \
2508 @SIM_ENABLE_ARCH_m68hc11_TRUE@
-DWITH_TARGET_WORD_BITSIZE
=32 \
2509 @SIM_ENABLE_ARCH_m68hc11_TRUE@
-DWITH_TARGET_CELL_BITSIZE
=32 \
2510 @SIM_ENABLE_ARCH_m68hc11_TRUE@
-DWITH_TARGET_ADDRESS_BITSIZE
=32 \
2511 @SIM_ENABLE_ARCH_m68hc11_TRUE@
-DWITH_TARGET_WORD_MSB
=31
2513 @SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11_libsim_a_SOURCES
= \
2514 @SIM_ENABLE_ARCH_m68hc11_TRUE@
$(common_libcommon_a_SOURCES
)
2516 @SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11_libsim_a_LIBADD
= \
2517 @SIM_ENABLE_ARCH_m68hc11_TRUE@ m68hc11
/interp.o \
2518 @SIM_ENABLE_ARCH_m68hc11_TRUE@ m68hc11
/m68hc11int.o \
2519 @SIM_ENABLE_ARCH_m68hc11_TRUE@ m68hc11
/m68hc12int.o \
2520 @SIM_ENABLE_ARCH_m68hc11_TRUE@ m68hc11
/emulos.o \
2521 @SIM_ENABLE_ARCH_m68hc11_TRUE@ m68hc11
/interrupts.o \
2522 @SIM_ENABLE_ARCH_m68hc11_TRUE@ m68hc11
/m68hc11_sim.o \
2523 @SIM_ENABLE_ARCH_m68hc11_TRUE@
$(patsubst %,m68hc11
/%,$(SIM_NEW_COMMON_OBJS
)) \
2524 @SIM_ENABLE_ARCH_m68hc11_TRUE@
$(patsubst %,m68hc11
/dv-
%.o
,$(SIM_HW_DEVICES
)) \
2525 @SIM_ENABLE_ARCH_m68hc11_TRUE@
$(patsubst %,m68hc11
/dv-
%.o
,$(m68hc11_SIM_EXTRA_HW_DEVICES
)) \
2526 @SIM_ENABLE_ARCH_m68hc11_TRUE@ m68hc11
/modules.o \
2527 @SIM_ENABLE_ARCH_m68hc11_TRUE@ m68hc11
/sim-resume.o
2529 @SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11_run_SOURCES
=
2530 @SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11_run_LDADD
= \
2531 @SIM_ENABLE_ARCH_m68hc11_TRUE@ m68hc11
/nrun.o \
2532 @SIM_ENABLE_ARCH_m68hc11_TRUE@ m68hc11
/libsim.a \
2533 @SIM_ENABLE_ARCH_m68hc11_TRUE@
$(SIM_COMMON_LIBS
)
2535 @SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11_SIM_EXTRA_HW_DEVICES
= m68hc11 m68hc11sio m68hc11eepr m68hc11tim m68hc11spi nvram
2536 @SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11_BUILD_OUTPUTS
= \
2537 @SIM_ENABLE_ARCH_m68hc11_TRUE@ m68hc11
/gencode
$(EXEEXT
) \
2538 @SIM_ENABLE_ARCH_m68hc11_TRUE@ m68hc11
/m68hc11int.c \
2539 @SIM_ENABLE_ARCH_m68hc11_TRUE@ m68hc11
/m68hc12int.c
2541 @SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11_gencode_SOURCES
= m68hc11
/gencode.c
2542 @SIM_ENABLE_ARCH_mcore_TRUE@mcore_libsim_a_SOURCES
= \
2543 @SIM_ENABLE_ARCH_mcore_TRUE@
$(common_libcommon_a_SOURCES
)
2545 @SIM_ENABLE_ARCH_mcore_TRUE@mcore_libsim_a_LIBADD
= \
2546 @SIM_ENABLE_ARCH_mcore_TRUE@ mcore
/interp.o \
2547 @SIM_ENABLE_ARCH_mcore_TRUE@
$(patsubst %,mcore
/%,$(SIM_NEW_COMMON_OBJS
)) \
2548 @SIM_ENABLE_ARCH_mcore_TRUE@
$(patsubst %,mcore
/dv-
%.o
,$(SIM_HW_DEVICES
)) \
2549 @SIM_ENABLE_ARCH_mcore_TRUE@ mcore
/modules.o \
2550 @SIM_ENABLE_ARCH_mcore_TRUE@ mcore
/sim-resume.o
2552 @SIM_ENABLE_ARCH_mcore_TRUE@mcore_run_SOURCES
=
2553 @SIM_ENABLE_ARCH_mcore_TRUE@mcore_run_LDADD
= \
2554 @SIM_ENABLE_ARCH_mcore_TRUE@ mcore
/nrun.o \
2555 @SIM_ENABLE_ARCH_mcore_TRUE@ mcore
/libsim.a \
2556 @SIM_ENABLE_ARCH_mcore_TRUE@
$(SIM_COMMON_LIBS
)
2558 @SIM_ENABLE_ARCH_microblaze_TRUE@microblaze_libsim_a_SOURCES
= \
2559 @SIM_ENABLE_ARCH_microblaze_TRUE@
$(common_libcommon_a_SOURCES
)
2561 @SIM_ENABLE_ARCH_microblaze_TRUE@microblaze_libsim_a_LIBADD
= \
2562 @SIM_ENABLE_ARCH_microblaze_TRUE@ microblaze
/interp.o \
2563 @SIM_ENABLE_ARCH_microblaze_TRUE@
$(patsubst %,microblaze
/%,$(SIM_NEW_COMMON_OBJS
)) \
2564 @SIM_ENABLE_ARCH_microblaze_TRUE@
$(patsubst %,microblaze
/dv-
%.o
,$(SIM_HW_DEVICES
)) \
2565 @SIM_ENABLE_ARCH_microblaze_TRUE@ microblaze
/modules.o \
2566 @SIM_ENABLE_ARCH_microblaze_TRUE@ microblaze
/sim-resume.o
2568 @SIM_ENABLE_ARCH_microblaze_TRUE@microblaze_run_SOURCES
=
2569 @SIM_ENABLE_ARCH_microblaze_TRUE@microblaze_run_LDADD
= \
2570 @SIM_ENABLE_ARCH_microblaze_TRUE@ microblaze
/nrun.o \
2571 @SIM_ENABLE_ARCH_microblaze_TRUE@ microblaze
/libsim.a \
2572 @SIM_ENABLE_ARCH_microblaze_TRUE@
$(SIM_COMMON_LIBS
)
2574 @SIM_ENABLE_ARCH_mips_TRUE@AM_CPPFLAGS_mips
= \
2575 @SIM_ENABLE_ARCH_mips_TRUE@ @SIM_MIPS_SUBTARGET@ \
2576 @SIM_ENABLE_ARCH_mips_TRUE@
-DWITH_TARGET_WORD_BITSIZE
=@SIM_MIPS_BITSIZE@
-DWITH_TARGET_WORD_MSB
=WITH_TARGET_WORD_BITSIZE-1 \
2577 @SIM_ENABLE_ARCH_mips_TRUE@
-DWITH_FLOATING_POINT
=HARD_FLOATING_POINT
-DWITH_TARGET_FLOATING_POINT_BITSIZE
=@SIM_MIPS_FPU_BITSIZE@
2579 @SIM_ENABLE_ARCH_mips_TRUE@mips_GEN_OBJ
= $(am__append_81
) \
2580 @SIM_ENABLE_ARCH_mips_TRUE@
$(am__append_82
) $(am__append_83
)
2581 @SIM_ENABLE_ARCH_mips_TRUE@mips_libsim_a_SOURCES
= \
2582 @SIM_ENABLE_ARCH_mips_TRUE@
$(common_libcommon_a_SOURCES
)
2584 @SIM_ENABLE_ARCH_mips_TRUE@mips_libsim_a_LIBADD
= \
2585 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/interp.o \
2586 @SIM_ENABLE_ARCH_mips_TRUE@
$(mips_GEN_OBJ
) \
2587 @SIM_ENABLE_ARCH_mips_TRUE@
$(patsubst %,mips
/%,$(SIM_NEW_COMMON_OBJS
)) \
2588 @SIM_ENABLE_ARCH_mips_TRUE@
$(patsubst %,mips
/dv-
%.o
,$(SIM_HW_DEVICES
)) \
2589 @SIM_ENABLE_ARCH_mips_TRUE@
$(patsubst %,mips
/dv-
%.o
,$(mips_SIM_EXTRA_HW_DEVICES
)) \
2590 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/cp1.o \
2591 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/dsp.o \
2592 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/mdmx.o \
2593 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/modules.o \
2594 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/sim-main.o \
2595 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/sim-resume.o
2597 @SIM_ENABLE_ARCH_mips_TRUE@EXTRA_mips_libsim_a_DEPENDENCIES
= $(SIM_MIPS_MULTI_OBJ
)
2598 @SIM_ENABLE_ARCH_mips_TRUE@mips_run_SOURCES
=
2599 @SIM_ENABLE_ARCH_mips_TRUE@mips_run_LDADD
= \
2600 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/nrun.o \
2601 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/libsim.a \
2602 @SIM_ENABLE_ARCH_mips_TRUE@
$(SIM_COMMON_LIBS
)
2604 @SIM_ENABLE_ARCH_mips_TRUE@mips_SIM_EXTRA_HW_DEVICES
= tx3904cpu tx3904irc tx3904tmr tx3904sio
2605 @SIM_ENABLE_ARCH_mips_TRUE@mips_BUILT_SRC_FROM_IGEN_ITABLE
= \
2606 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/itable.h \
2607 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/itable.c
2609 @SIM_ENABLE_ARCH_mips_TRUE@mips_BUILT_SRC_FROM_GEN_MODE_SINGLE
= \
2610 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/icache.h \
2611 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/icache.c \
2612 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/idecode.h \
2613 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/idecode.c \
2614 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/semantics.h \
2615 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/semantics.c \
2616 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/model.h \
2617 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/model.c \
2618 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/support.h \
2619 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/support.c \
2620 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/engine.h \
2621 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/engine.c \
2622 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/irun.c
2624 @SIM_ENABLE_ARCH_mips_TRUE@mips_BUILT_SRC_FROM_GEN_MODE_M16_M16
= \
2625 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/m16_icache.h \
2626 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/m16_icache.c \
2627 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/m16_idecode.h \
2628 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/m16_idecode.c \
2629 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/m16_semantics.h \
2630 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/m16_semantics.c \
2631 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/m16_model.h \
2632 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/m16_model.c \
2633 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/m16_support.h \
2634 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/m16_support.c \
2635 @SIM_ENABLE_ARCH_mips_TRUE@mips_BUILT_SRC_FROM_GEN_MODE_M16_M32
= \
2636 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/m32_icache.h \
2637 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/m32_icache.c \
2638 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/m32_idecode.h \
2639 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/m32_idecode.c \
2640 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/m32_semantics.h \
2641 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/m32_semantics.c \
2642 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/m32_model.h \
2643 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/m32_model.c \
2644 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/m32_support.h \
2645 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/m32_support.c
2647 @SIM_ENABLE_ARCH_mips_TRUE@mips_BUILD_OUTPUTS
= \
2648 @SIM_ENABLE_ARCH_mips_TRUE@
$(mips_BUILT_SRC_FROM_IGEN_ITABLE
) \
2649 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/stamp-igen-itable \
2650 @SIM_ENABLE_ARCH_mips_TRUE@
$(am__append_87
) $(am__append_88
) \
2651 @SIM_ENABLE_ARCH_mips_TRUE@
$(am__append_89
)
2652 @SIM_ENABLE_ARCH_mips_TRUE@mips_IGEN_TRACE
= # -G omit-line-numbers # -G trace-rule-selection -G trace-rule-rejection -G trace-entries # -G trace-all
2653 @SIM_ENABLE_ARCH_mips_TRUE@mips_IGEN_INSN
= $(srcdir)/mips
/mips.igen
2654 @SIM_ENABLE_ARCH_mips_TRUE@mips_IGEN_INSN_INC
= \
2655 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/dsp.igen \
2656 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/dsp2.igen \
2657 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/m16.igen \
2658 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/m16e.igen \
2659 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/mdmx.igen \
2660 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/micromipsdsp.igen \
2661 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/micromips.igen \
2662 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/mips3264r2.igen \
2663 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/mips3264r6.igen \
2664 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/mips3d.igen \
2665 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/sb1.igen \
2666 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/tx.igen \
2667 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/vr.igen
2669 @SIM_ENABLE_ARCH_mips_TRUE@mips_IGEN_DC
= $(srcdir)/mips
/mips.dc
2670 @SIM_ENABLE_ARCH_mips_TRUE@mips_M16_DC
= $(srcdir)/mips
/m16.dc
2671 @SIM_ENABLE_ARCH_mips_TRUE@mips_MICROMIPS32_DC
= $(srcdir)/mips
/micromips.dc
2672 @SIM_ENABLE_ARCH_mips_TRUE@mips_MICROMIPS16_DC
= $(srcdir)/mips
/micromips16.dc
2673 @SIM_ENABLE_ARCH_mn10300_TRUE@AM_CPPFLAGS_mn10300
= \
2674 @SIM_ENABLE_ARCH_mn10300_TRUE@
-DPOLL_QUIT_INTERVAL
=0x20 \
2675 @SIM_ENABLE_ARCH_mn10300_TRUE@
-DWITH_TARGET_WORD_BITSIZE
=32 -DWITH_TARGET_WORD_MSB
=31
2677 @SIM_ENABLE_ARCH_mn10300_TRUE@mn10300_libsim_a_SOURCES
= \
2678 @SIM_ENABLE_ARCH_mn10300_TRUE@
$(common_libcommon_a_SOURCES
)
2680 @SIM_ENABLE_ARCH_mn10300_TRUE@mn10300_libsim_a_LIBADD
= \
2681 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300
/itable.o \
2682 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300
/semantics.o \
2683 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300
/idecode.o \
2684 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300
/icache.o \
2685 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300
/engine.o \
2686 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300
/irun.o \
2687 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300
/support.o \
2688 @SIM_ENABLE_ARCH_mn10300_TRUE@
$(patsubst %,mn10300
/%,$(SIM_NEW_COMMON_OBJS
)) \
2689 @SIM_ENABLE_ARCH_mn10300_TRUE@
$(patsubst %,mn10300
/dv-
%.o
,$(SIM_HW_DEVICES
)) \
2690 @SIM_ENABLE_ARCH_mn10300_TRUE@
$(patsubst %,mn10300
/dv-
%.o
,$(mn10300_SIM_EXTRA_HW_DEVICES
)) \
2691 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300
/interp.o \
2692 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300
/modules.o \
2693 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300
/op_utils.o \
2694 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300
/sim-resume.o
2696 @SIM_ENABLE_ARCH_mn10300_TRUE@mn10300_run_SOURCES
=
2697 @SIM_ENABLE_ARCH_mn10300_TRUE@mn10300_run_LDADD
= \
2698 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300
/nrun.o \
2699 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300
/libsim.a \
2700 @SIM_ENABLE_ARCH_mn10300_TRUE@
$(SIM_COMMON_LIBS
)
2702 @SIM_ENABLE_ARCH_mn10300_TRUE@mn10300_SIM_EXTRA_HW_DEVICES
= mn103cpu mn103int mn103tim mn103ser mn103iop
2703 @SIM_ENABLE_ARCH_mn10300_TRUE@mn10300_BUILT_SRC_FROM_IGEN
= \
2704 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300
/icache.h \
2705 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300
/icache.c \
2706 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300
/idecode.h \
2707 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300
/idecode.c \
2708 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300
/semantics.h \
2709 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300
/semantics.c \
2710 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300
/model.h \
2711 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300
/model.c \
2712 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300
/support.h \
2713 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300
/support.c \
2714 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300
/itable.h \
2715 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300
/itable.c \
2716 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300
/engine.h \
2717 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300
/engine.c \
2718 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300
/irun.c
2720 @SIM_ENABLE_ARCH_mn10300_TRUE@mn10300_BUILD_OUTPUTS
= \
2721 @SIM_ENABLE_ARCH_mn10300_TRUE@
$(mn10300_BUILT_SRC_FROM_IGEN
) \
2722 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300
/stamp-igen
2724 @SIM_ENABLE_ARCH_mn10300_TRUE@mn10300_IGEN_TRACE
= # -G omit-line-numbers # -G trace-rule-selection -G trace-rule-rejection -G trace-entries
2725 @SIM_ENABLE_ARCH_mn10300_TRUE@mn10300_IGEN_INSN
= $(srcdir)/mn10300
/mn10300.igen
2726 @SIM_ENABLE_ARCH_mn10300_TRUE@mn10300_IGEN_INSN_INC
= mn10300
/am33.igen mn10300
/am33-2.igen
2727 @SIM_ENABLE_ARCH_mn10300_TRUE@mn10300_IGEN_DC
= $(srcdir)/mn10300
/mn10300.dc
2728 @SIM_ENABLE_ARCH_moxie_TRUE@AM_CPPFLAGS_moxie
= -DDTB
="\"$(dtbdir)/moxie-gdb.dtb\""
2729 @SIM_ENABLE_ARCH_moxie_TRUE@moxie_libsim_a_SOURCES
= \
2730 @SIM_ENABLE_ARCH_moxie_TRUE@
$(common_libcommon_a_SOURCES
)
2732 @SIM_ENABLE_ARCH_moxie_TRUE@moxie_libsim_a_LIBADD
= \
2733 @SIM_ENABLE_ARCH_moxie_TRUE@
$(patsubst %,moxie
/%,$(SIM_NEW_COMMON_OBJS
)) \
2734 @SIM_ENABLE_ARCH_moxie_TRUE@
$(patsubst %,moxie
/dv-
%.o
,$(SIM_HW_DEVICES
)) \
2735 @SIM_ENABLE_ARCH_moxie_TRUE@ moxie
/interp.o \
2736 @SIM_ENABLE_ARCH_moxie_TRUE@ moxie
/modules.o \
2737 @SIM_ENABLE_ARCH_moxie_TRUE@ moxie
/sim-resume.o
2739 @SIM_ENABLE_ARCH_moxie_TRUE@moxie_run_SOURCES
=
2740 @SIM_ENABLE_ARCH_moxie_TRUE@moxie_run_LDADD
= \
2741 @SIM_ENABLE_ARCH_moxie_TRUE@ moxie
/nrun.o \
2742 @SIM_ENABLE_ARCH_moxie_TRUE@ moxie
/libsim.a \
2743 @SIM_ENABLE_ARCH_moxie_TRUE@
$(SIM_COMMON_LIBS
)
2745 @SIM_ENABLE_ARCH_moxie_TRUE@dtbdir
= $(datadir)/gdb
/dtb
2746 @SIM_ENABLE_ARCH_moxie_TRUE@dtb_DATA
= moxie
/moxie-gdb.dtb
2747 @SIM_ENABLE_ARCH_msp430_TRUE@msp430_libsim_a_SOURCES
= \
2748 @SIM_ENABLE_ARCH_msp430_TRUE@
$(common_libcommon_a_SOURCES
)
2750 @SIM_ENABLE_ARCH_msp430_TRUE@msp430_libsim_a_LIBADD
= \
2751 @SIM_ENABLE_ARCH_msp430_TRUE@
$(patsubst %,msp430
/%,$(SIM_NEW_COMMON_OBJS
)) \
2752 @SIM_ENABLE_ARCH_msp430_TRUE@
$(patsubst %,msp430
/dv-
%.o
,$(SIM_HW_DEVICES
)) \
2753 @SIM_ENABLE_ARCH_msp430_TRUE@ msp430
/msp430-sim.o \
2754 @SIM_ENABLE_ARCH_msp430_TRUE@ msp430
/modules.o \
2755 @SIM_ENABLE_ARCH_msp430_TRUE@ msp430
/sim-resume.o
2757 @SIM_ENABLE_ARCH_msp430_TRUE@msp430_run_SOURCES
=
2758 @SIM_ENABLE_ARCH_msp430_TRUE@msp430_run_LDADD
= \
2759 @SIM_ENABLE_ARCH_msp430_TRUE@ msp430
/nrun.o \
2760 @SIM_ENABLE_ARCH_msp430_TRUE@ msp430
/libsim.a \
2761 @SIM_ENABLE_ARCH_msp430_TRUE@
$(SIM_COMMON_LIBS
)
2763 @SIM_ENABLE_ARCH_or1k_TRUE@AM_CPPFLAGS_or1k
= -DWITH_TARGET_WORD_BITSIZE
=32 -DWITH_TARGET_WORD_MSB
=31
2764 @SIM_ENABLE_ARCH_or1k_TRUE@or1k_libsim_a_SOURCES
= \
2765 @SIM_ENABLE_ARCH_or1k_TRUE@
$(common_libcommon_a_SOURCES
)
2767 @SIM_ENABLE_ARCH_or1k_TRUE@or1k_libsim_a_LIBADD
= \
2768 @SIM_ENABLE_ARCH_or1k_TRUE@
$(patsubst %,or1k
/%,$(SIM_NEW_COMMON_OBJS
)) \
2769 @SIM_ENABLE_ARCH_or1k_TRUE@
$(patsubst %,or1k
/dv-
%.o
,$(SIM_HW_DEVICES
)) \
2770 @SIM_ENABLE_ARCH_or1k_TRUE@ or1k
/modules.o \
2771 @SIM_ENABLE_ARCH_or1k_TRUE@ \
2772 @SIM_ENABLE_ARCH_or1k_TRUE@ or1k
/cgen-accfp.o \
2773 @SIM_ENABLE_ARCH_or1k_TRUE@ or1k
/cgen-fpu.o \
2774 @SIM_ENABLE_ARCH_or1k_TRUE@ or1k
/cgen-run.o \
2775 @SIM_ENABLE_ARCH_or1k_TRUE@ or1k
/cgen-scache.o \
2776 @SIM_ENABLE_ARCH_or1k_TRUE@ or1k
/cgen-trace.o \
2777 @SIM_ENABLE_ARCH_or1k_TRUE@ or1k
/cgen-utils.o \
2778 @SIM_ENABLE_ARCH_or1k_TRUE@ \
2779 @SIM_ENABLE_ARCH_or1k_TRUE@ or1k
/arch.o \
2780 @SIM_ENABLE_ARCH_or1k_TRUE@ or1k
/cpu.o \
2781 @SIM_ENABLE_ARCH_or1k_TRUE@ or1k
/decode.o \
2782 @SIM_ENABLE_ARCH_or1k_TRUE@ or1k
/mloop.o \
2783 @SIM_ENABLE_ARCH_or1k_TRUE@ or1k
/model.o \
2784 @SIM_ENABLE_ARCH_or1k_TRUE@ or1k
/sem.o \
2785 @SIM_ENABLE_ARCH_or1k_TRUE@ \
2786 @SIM_ENABLE_ARCH_or1k_TRUE@ or1k
/or1k.o \
2787 @SIM_ENABLE_ARCH_or1k_TRUE@ or1k
/sim-if.o \
2788 @SIM_ENABLE_ARCH_or1k_TRUE@ or1k
/traps.o
2790 @SIM_ENABLE_ARCH_or1k_TRUE@or1k_run_SOURCES
=
2791 @SIM_ENABLE_ARCH_or1k_TRUE@or1k_run_LDADD
= \
2792 @SIM_ENABLE_ARCH_or1k_TRUE@ or1k
/nrun.o \
2793 @SIM_ENABLE_ARCH_or1k_TRUE@ or1k
/libsim.a \
2794 @SIM_ENABLE_ARCH_or1k_TRUE@
$(SIM_COMMON_LIBS
)
2796 @SIM_ENABLE_ARCH_or1k_TRUE@or1kdocdir
= $(docdir
)/or1k
2797 @SIM_ENABLE_ARCH_or1k_TRUE@or1kdoc_DATA
= or1k
/README
2798 @SIM_ENABLE_ARCH_or1k_TRUE@or1k_BUILD_OUTPUTS
= \
2799 @SIM_ENABLE_ARCH_or1k_TRUE@ or1k
/mloop.c \
2800 @SIM_ENABLE_ARCH_or1k_TRUE@ or1k
/stamp-mloop
2802 @SIM_ENABLE_ARCH_ppc_TRUE@ppc_run_SOURCES
=
2803 @SIM_ENABLE_ARCH_ppc_TRUE@ppc_run_LDADD
= \
2804 @SIM_ENABLE_ARCH_ppc_TRUE@ ppc
/main.o \
2805 @SIM_ENABLE_ARCH_ppc_TRUE@ ppc
/libsim.a \
2806 @SIM_ENABLE_ARCH_ppc_TRUE@
$(SIM_COMMON_LIBS
)
2808 @SIM_ENABLE_ARCH_ppc_TRUE@ppcdocdir
= $(docdir
)/ppc
2809 @SIM_ENABLE_ARCH_ppc_TRUE@ppcdoc_DATA
= ppc
/BUGS ppc
/INSTALL ppc
/README ppc
/RUN
2810 @SIM_ENABLE_ARCH_pru_TRUE@pru_libsim_a_SOURCES
= \
2811 @SIM_ENABLE_ARCH_pru_TRUE@
$(common_libcommon_a_SOURCES
)
2813 @SIM_ENABLE_ARCH_pru_TRUE@pru_libsim_a_LIBADD
= \
2814 @SIM_ENABLE_ARCH_pru_TRUE@
$(patsubst %,pru
/%,$(SIM_NEW_COMMON_OBJS
)) \
2815 @SIM_ENABLE_ARCH_pru_TRUE@
$(patsubst %,pru
/dv-
%.o
,$(SIM_HW_DEVICES
)) \
2816 @SIM_ENABLE_ARCH_pru_TRUE@ pru
/interp.o \
2817 @SIM_ENABLE_ARCH_pru_TRUE@ pru
/modules.o \
2818 @SIM_ENABLE_ARCH_pru_TRUE@ pru
/sim-resume.o
2820 @SIM_ENABLE_ARCH_pru_TRUE@pru_run_SOURCES
=
2821 @SIM_ENABLE_ARCH_pru_TRUE@pru_run_LDADD
= \
2822 @SIM_ENABLE_ARCH_pru_TRUE@ pru
/nrun.o \
2823 @SIM_ENABLE_ARCH_pru_TRUE@ pru
/libsim.a \
2824 @SIM_ENABLE_ARCH_pru_TRUE@
$(SIM_COMMON_LIBS
)
2826 @SIM_ENABLE_ARCH_riscv_TRUE@AM_CPPFLAGS_riscv
= -DWITH_TARGET_WORD_BITSIZE
=$(SIM_RISCV_BITSIZE
)
2827 @SIM_ENABLE_ARCH_riscv_TRUE@riscv_libsim_a_SOURCES
= \
2828 @SIM_ENABLE_ARCH_riscv_TRUE@
$(common_libcommon_a_SOURCES
)
2830 @SIM_ENABLE_ARCH_riscv_TRUE@riscv_libsim_a_LIBADD
= \
2831 @SIM_ENABLE_ARCH_riscv_TRUE@
$(patsubst %,riscv
/%,$(SIM_NEW_COMMON_OBJS
)) \
2832 @SIM_ENABLE_ARCH_riscv_TRUE@
$(patsubst %,riscv
/dv-
%.o
,$(SIM_HW_DEVICES
)) \
2833 @SIM_ENABLE_ARCH_riscv_TRUE@ riscv
/interp.o \
2834 @SIM_ENABLE_ARCH_riscv_TRUE@ riscv
/machs.o \
2835 @SIM_ENABLE_ARCH_riscv_TRUE@ riscv
/modules.o \
2836 @SIM_ENABLE_ARCH_riscv_TRUE@ riscv
/sim-main.o \
2837 @SIM_ENABLE_ARCH_riscv_TRUE@ riscv
/sim-resume.o
2839 @SIM_ENABLE_ARCH_riscv_TRUE@riscv_run_SOURCES
=
2840 @SIM_ENABLE_ARCH_riscv_TRUE@riscv_run_LDADD
= \
2841 @SIM_ENABLE_ARCH_riscv_TRUE@ riscv
/nrun.o \
2842 @SIM_ENABLE_ARCH_riscv_TRUE@ riscv
/libsim.a \
2843 @SIM_ENABLE_ARCH_riscv_TRUE@
$(SIM_COMMON_LIBS
)
2845 @SIM_ENABLE_ARCH_rl78_TRUE@rl78_libsim_a_SOURCES
= \
2846 @SIM_ENABLE_ARCH_rl78_TRUE@
$(common_libcommon_a_SOURCES
)
2848 @SIM_ENABLE_ARCH_rl78_TRUE@rl78_libsim_a_LIBADD
= \
2849 @SIM_ENABLE_ARCH_rl78_TRUE@ rl78
/load.o \
2850 @SIM_ENABLE_ARCH_rl78_TRUE@ rl78
/mem.o \
2851 @SIM_ENABLE_ARCH_rl78_TRUE@ rl78
/cpu.o \
2852 @SIM_ENABLE_ARCH_rl78_TRUE@ rl78
/rl78.o \
2853 @SIM_ENABLE_ARCH_rl78_TRUE@ rl78
/gdb-if.o \
2854 @SIM_ENABLE_ARCH_rl78_TRUE@ rl78
/modules.o \
2855 @SIM_ENABLE_ARCH_rl78_TRUE@ rl78
/trace.o
2857 @SIM_ENABLE_ARCH_rl78_TRUE@rl78_run_SOURCES
=
2858 @SIM_ENABLE_ARCH_rl78_TRUE@rl78_run_LDADD
= \
2859 @SIM_ENABLE_ARCH_rl78_TRUE@ rl78
/main.o \
2860 @SIM_ENABLE_ARCH_rl78_TRUE@ rl78
/libsim.a \
2861 @SIM_ENABLE_ARCH_rl78_TRUE@
$(SIM_COMMON_LIBS
)
2863 @SIM_ENABLE_ARCH_rx_TRUE@AM_CPPFLAGS_rx
= $(SIM_RX_CYCLE_ACCURATE_FLAGS
)
2864 @SIM_ENABLE_ARCH_rx_TRUE@rx_libsim_a_SOURCES
= \
2865 @SIM_ENABLE_ARCH_rx_TRUE@
$(common_libcommon_a_SOURCES
)
2867 @SIM_ENABLE_ARCH_rx_TRUE@rx_libsim_a_LIBADD
= \
2868 @SIM_ENABLE_ARCH_rx_TRUE@ rx
/fpu.o \
2869 @SIM_ENABLE_ARCH_rx_TRUE@ rx
/load.o \
2870 @SIM_ENABLE_ARCH_rx_TRUE@ rx
/mem.o \
2871 @SIM_ENABLE_ARCH_rx_TRUE@ rx
/misc.o \
2872 @SIM_ENABLE_ARCH_rx_TRUE@ rx
/reg.o \
2873 @SIM_ENABLE_ARCH_rx_TRUE@ rx
/rx.o \
2874 @SIM_ENABLE_ARCH_rx_TRUE@ rx
/syscalls.o \
2875 @SIM_ENABLE_ARCH_rx_TRUE@ rx
/trace.o \
2876 @SIM_ENABLE_ARCH_rx_TRUE@ rx
/gdb-if.o \
2877 @SIM_ENABLE_ARCH_rx_TRUE@ rx
/err.o \
2878 @SIM_ENABLE_ARCH_rx_TRUE@ rx
/modules.o
2880 @SIM_ENABLE_ARCH_rx_TRUE@rx_run_SOURCES
=
2881 @SIM_ENABLE_ARCH_rx_TRUE@rx_run_LDADD
= \
2882 @SIM_ENABLE_ARCH_rx_TRUE@ rx
/main.o \
2883 @SIM_ENABLE_ARCH_rx_TRUE@ rx
/libsim.a \
2884 @SIM_ENABLE_ARCH_rx_TRUE@
$(SIM_COMMON_LIBS
)
2886 @SIM_ENABLE_ARCH_rx_TRUE@rxdocdir
= $(docdir
)/rx
2887 @SIM_ENABLE_ARCH_rx_TRUE@rxdoc_DATA
= rx
/README.txt
2888 @SIM_ENABLE_ARCH_sh_TRUE@sh_libsim_a_SOURCES
= \
2889 @SIM_ENABLE_ARCH_sh_TRUE@
$(common_libcommon_a_SOURCES
)
2891 @SIM_ENABLE_ARCH_sh_TRUE@sh_libsim_a_LIBADD
= \
2892 @SIM_ENABLE_ARCH_sh_TRUE@ sh
/interp.o \
2893 @SIM_ENABLE_ARCH_sh_TRUE@
$(patsubst %,sh
/%,$(SIM_NEW_COMMON_OBJS
)) \
2894 @SIM_ENABLE_ARCH_sh_TRUE@
$(patsubst %,sh
/dv-
%.o
,$(SIM_HW_DEVICES
)) \
2895 @SIM_ENABLE_ARCH_sh_TRUE@ sh
/modules.o \
2896 @SIM_ENABLE_ARCH_sh_TRUE@ sh
/table.o
2898 @SIM_ENABLE_ARCH_sh_TRUE@sh_run_SOURCES
=
2899 @SIM_ENABLE_ARCH_sh_TRUE@sh_run_LDADD
= \
2900 @SIM_ENABLE_ARCH_sh_TRUE@ sh
/nrun.o \
2901 @SIM_ENABLE_ARCH_sh_TRUE@ sh
/libsim.a \
2902 @SIM_ENABLE_ARCH_sh_TRUE@
$(SIM_COMMON_LIBS
)
2904 @SIM_ENABLE_ARCH_sh_TRUE@sh_BUILD_OUTPUTS
= \
2905 @SIM_ENABLE_ARCH_sh_TRUE@ sh
/gencode
$(EXEEXT
) \
2906 @SIM_ENABLE_ARCH_sh_TRUE@ sh
/table.c
2908 @SIM_ENABLE_ARCH_sh_TRUE@sh_gencode_SOURCES
= sh
/gencode.c
2909 @SIM_ENABLE_ARCH_v850_TRUE@AM_CPPFLAGS_v850
= -DWITH_TARGET_WORD_BITSIZE
=32 -DWITH_TARGET_WORD_MSB
=31
2910 @SIM_ENABLE_ARCH_v850_TRUE@v850_libsim_a_SOURCES
= \
2911 @SIM_ENABLE_ARCH_v850_TRUE@
$(common_libcommon_a_SOURCES
)
2913 @SIM_ENABLE_ARCH_v850_TRUE@v850_libsim_a_LIBADD
= \
2914 @SIM_ENABLE_ARCH_v850_TRUE@
$(patsubst %,v850
/%,$(SIM_NEW_COMMON_OBJS
)) \
2915 @SIM_ENABLE_ARCH_v850_TRUE@
$(patsubst %,v850
/dv-
%.o
,$(SIM_HW_DEVICES
)) \
2916 @SIM_ENABLE_ARCH_v850_TRUE@ v850
/simops.o \
2917 @SIM_ENABLE_ARCH_v850_TRUE@ v850
/interp.o \
2918 @SIM_ENABLE_ARCH_v850_TRUE@ v850
/itable.o \
2919 @SIM_ENABLE_ARCH_v850_TRUE@ v850
/semantics.o \
2920 @SIM_ENABLE_ARCH_v850_TRUE@ v850
/idecode.o \
2921 @SIM_ENABLE_ARCH_v850_TRUE@ v850
/icache.o \
2922 @SIM_ENABLE_ARCH_v850_TRUE@ v850
/engine.o \
2923 @SIM_ENABLE_ARCH_v850_TRUE@ v850
/irun.o \
2924 @SIM_ENABLE_ARCH_v850_TRUE@ v850
/support.o \
2925 @SIM_ENABLE_ARCH_v850_TRUE@ v850
/modules.o \
2926 @SIM_ENABLE_ARCH_v850_TRUE@ v850
/sim-resume.o
2928 @SIM_ENABLE_ARCH_v850_TRUE@v850_run_SOURCES
=
2929 @SIM_ENABLE_ARCH_v850_TRUE@v850_run_LDADD
= \
2930 @SIM_ENABLE_ARCH_v850_TRUE@ v850
/nrun.o \
2931 @SIM_ENABLE_ARCH_v850_TRUE@ v850
/libsim.a \
2932 @SIM_ENABLE_ARCH_v850_TRUE@
$(SIM_COMMON_LIBS
)
2934 @SIM_ENABLE_ARCH_v850_TRUE@v850_BUILT_SRC_FROM_IGEN
= \
2935 @SIM_ENABLE_ARCH_v850_TRUE@ v850
/icache.h \
2936 @SIM_ENABLE_ARCH_v850_TRUE@ v850
/icache.c \
2937 @SIM_ENABLE_ARCH_v850_TRUE@ v850
/idecode.h \
2938 @SIM_ENABLE_ARCH_v850_TRUE@ v850
/idecode.c \
2939 @SIM_ENABLE_ARCH_v850_TRUE@ v850
/semantics.h \
2940 @SIM_ENABLE_ARCH_v850_TRUE@ v850
/semantics.c \
2941 @SIM_ENABLE_ARCH_v850_TRUE@ v850
/model.h \
2942 @SIM_ENABLE_ARCH_v850_TRUE@ v850
/model.c \
2943 @SIM_ENABLE_ARCH_v850_TRUE@ v850
/support.h \
2944 @SIM_ENABLE_ARCH_v850_TRUE@ v850
/support.c \
2945 @SIM_ENABLE_ARCH_v850_TRUE@ v850
/itable.h \
2946 @SIM_ENABLE_ARCH_v850_TRUE@ v850
/itable.c \
2947 @SIM_ENABLE_ARCH_v850_TRUE@ v850
/engine.h \
2948 @SIM_ENABLE_ARCH_v850_TRUE@ v850
/engine.c \
2949 @SIM_ENABLE_ARCH_v850_TRUE@ v850
/irun.c
2951 @SIM_ENABLE_ARCH_v850_TRUE@v850_BUILD_OUTPUTS
= \
2952 @SIM_ENABLE_ARCH_v850_TRUE@
$(v850_BUILT_SRC_FROM_IGEN
) \
2953 @SIM_ENABLE_ARCH_v850_TRUE@ v850
/stamp-igen
2955 @SIM_ENABLE_ARCH_v850_TRUE@v850_IGEN_TRACE
= # -G omit-line-numbers # -G trace-rule-selection -G trace-rule-rejection -G trace-entries
2956 @SIM_ENABLE_ARCH_v850_TRUE@v850_IGEN_INSN
= $(srcdir)/v850
/v850.igen
2957 @SIM_ENABLE_ARCH_v850_TRUE@v850_IGEN_DC
= $(srcdir)/v850
/v850.dc
2958 all: $(BUILT_SOURCES
) config.h
2959 $(MAKE
) $(AM_MAKEFLAGS
) all-recursive
2962 .SUFFIXES
: .c .lo .log .o .obj .
test .
test$(EXEEXT
) .trs
2963 am--refresh
: Makefile
2965 $(srcdir)/Makefile.in
: @MAINTAINER_MODE_TRUE@
$(srcdir)/Makefile.am
$(srcdir)/common
/local.mk
$(srcdir)/igen
/local.mk
$(srcdir)/testsuite
/local.mk
$(srcdir)/testsuite
/common
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$(srcdir)/aarch64
/local.mk
$(srcdir)/arm
/local.mk
$(srcdir)/avr
/local.mk
$(srcdir)/bfin
/local.mk
$(srcdir)/bpf
/local.mk
$(srcdir)/cr16
/local.mk
$(srcdir)/cris
/local.mk
$(srcdir)/d10v
/local.mk
$(srcdir)/erc32
/local.mk
$(srcdir)/example-synacor
/local.mk
$(srcdir)/frv
/local.mk
$(srcdir)/ft32
/local.mk
$(srcdir)/h8300
/local.mk
$(srcdir)/iq2000
/local.mk
$(srcdir)/lm32
/local.mk
$(srcdir)/m32c
/local.mk
$(srcdir)/m32r
/local.mk
$(srcdir)/m68hc11
/local.mk
$(srcdir)/mcore
/local.mk
$(srcdir)/microblaze
/local.mk
$(srcdir)/mips
/local.mk
$(srcdir)/mn10300
/local.mk
$(srcdir)/moxie
/local.mk
$(srcdir)/msp430
/local.mk
$(srcdir)/or1k
/local.mk
$(srcdir)/ppc
/local.mk
$(srcdir)/pru
/local.mk
$(srcdir)/riscv
/local.mk
$(srcdir)/rl78
/local.mk
$(srcdir)/rx
/local.mk
$(srcdir)/sh
/local.mk
$(srcdir)/v850
/local.mk
$(am__configure_deps
)
2966 @for dep in
$?
; do \
2967 case
'$(am__configure_deps)' in \
2969 echo
' cd $(srcdir) && $(AUTOMAKE) --foreign'; \
2970 $(am__cd
) $(srcdir) && $(AUTOMAKE
) --foreign \
2975 echo
' cd $(top_srcdir) && $(AUTOMAKE) --foreign Makefile'; \
2976 $(am__cd
) $(top_srcdir
) && \
2977 $(AUTOMAKE
) --foreign Makefile
2978 Makefile
: $(srcdir)/Makefile.in
$(top_builddir
)/config.status
2981 echo
' $(SHELL) ./config.status'; \
2982 $(SHELL
) .
/config.status
;; \
2984 echo
' cd $(top_builddir) && $(SHELL) ./config.status $@ $(am__depfiles_maybe)'; \
2985 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
$(am__depfiles_maybe
);; \
2987 $(srcdir)/common
/local.mk
$(srcdir)/igen
/local.mk
$(srcdir)/testsuite
/local.mk
$(srcdir)/testsuite
/common
/local.mk
$(srcdir)/aarch64
/local.mk
$(srcdir)/arm
/local.mk
$(srcdir)/avr
/local.mk
$(srcdir)/bfin
/local.mk
$(srcdir)/bpf
/local.mk
$(srcdir)/cr16
/local.mk
$(srcdir)/cris
/local.mk
$(srcdir)/d10v
/local.mk
$(srcdir)/erc32
/local.mk
$(srcdir)/example-synacor
/local.mk
$(srcdir)/frv
/local.mk
$(srcdir)/ft32
/local.mk
$(srcdir)/h8300
/local.mk
$(srcdir)/iq2000
/local.mk
$(srcdir)/lm32
/local.mk
$(srcdir)/m32c
/local.mk
$(srcdir)/m32r
/local.mk
$(srcdir)/m68hc11
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$(srcdir)/mcore
/local.mk
$(srcdir)/microblaze
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$(srcdir)/mips
/local.mk
$(srcdir)/mn10300
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$(srcdir)/moxie
/local.mk
$(srcdir)/msp430
/local.mk
$(srcdir)/or1k
/local.mk
$(srcdir)/ppc
/local.mk
$(srcdir)/pru
/local.mk
$(srcdir)/riscv
/local.mk
$(srcdir)/rl78
/local.mk
$(srcdir)/rx
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$(srcdir)/sh
/local.mk
$(srcdir)/v850
/local.mk
$(am__empty
):
2989 $(top_builddir
)/config.status
: $(top_srcdir
)/configure
$(CONFIG_STATUS_DEPENDENCIES
)
2990 $(SHELL
) .
/config.status
--recheck
2992 $(top_srcdir
)/configure
: @MAINTAINER_MODE_TRUE@
$(am__configure_deps
)
2993 $(am__cd
) $(srcdir) && $(AUTOCONF
)
2994 $(ACLOCAL_M4
): @MAINTAINER_MODE_TRUE@
$(am__aclocal_m4_deps
)
2995 $(am__cd
) $(srcdir) && $(ACLOCAL
) $(ACLOCAL_AMFLAGS
)
2996 $(am__aclocal_m4_deps
):
2999 @
test -f
$@ ||
rm -f stamp-h1
3000 @
test -f
$@ ||
$(MAKE
) $(AM_MAKEFLAGS
) stamp-h1
3002 stamp-h1
: $(srcdir)/config.h.in
$(top_builddir
)/config.status
3004 cd
$(top_builddir
) && $(SHELL
) .
/config.status config.h
3005 $(srcdir)/config.h.in
: @MAINTAINER_MODE_TRUE@
$(am__configure_deps
)
3006 ($(am__cd
) $(top_srcdir
) && $(AUTOHEADER
))
3011 -rm -f config.h stamp-h1
3012 aarch64
/.gdbinit
: $(top_builddir
)/config.status
$(top_srcdir
)/common
/gdbinit.in
3013 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
3014 arm
/.gdbinit
: $(top_builddir
)/config.status
$(top_srcdir
)/common
/gdbinit.in
3015 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
3016 avr
/.gdbinit
: $(top_builddir
)/config.status
$(top_srcdir
)/common
/gdbinit.in
3017 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
3018 bfin
/.gdbinit
: $(top_builddir
)/config.status
$(top_srcdir
)/common
/gdbinit.in
3019 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
3020 bpf
/.gdbinit
: $(top_builddir
)/config.status
$(top_srcdir
)/common
/gdbinit.in
3021 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
3022 cr16
/.gdbinit
: $(top_builddir
)/config.status
$(top_srcdir
)/common
/gdbinit.in
3023 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
3024 cris
/.gdbinit
: $(top_builddir
)/config.status
$(top_srcdir
)/common
/gdbinit.in
3025 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
3026 d10v
/.gdbinit
: $(top_builddir
)/config.status
$(top_srcdir
)/common
/gdbinit.in
3027 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
3028 frv
/.gdbinit
: $(top_builddir
)/config.status
$(top_srcdir
)/common
/gdbinit.in
3029 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
3030 ft32
/.gdbinit
: $(top_builddir
)/config.status
$(top_srcdir
)/common
/gdbinit.in
3031 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
3032 h8300
/.gdbinit
: $(top_builddir
)/config.status
$(top_srcdir
)/common
/gdbinit.in
3033 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
3034 iq2000
/.gdbinit
: $(top_builddir
)/config.status
$(top_srcdir
)/common
/gdbinit.in
3035 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
3036 lm32
/.gdbinit
: $(top_builddir
)/config.status
$(top_srcdir
)/common
/gdbinit.in
3037 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
3038 m32c
/.gdbinit
: $(top_builddir
)/config.status
$(top_srcdir
)/common
/gdbinit.in
3039 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
3040 m32r
/.gdbinit
: $(top_builddir
)/config.status
$(top_srcdir
)/common
/gdbinit.in
3041 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
3042 m68hc11
/.gdbinit
: $(top_builddir
)/config.status
$(top_srcdir
)/common
/gdbinit.in
3043 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
3044 mcore
/.gdbinit
: $(top_builddir
)/config.status
$(top_srcdir
)/common
/gdbinit.in
3045 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
3046 microblaze
/.gdbinit
: $(top_builddir
)/config.status
$(top_srcdir
)/common
/gdbinit.in
3047 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
3048 mips
/.gdbinit
: $(top_builddir
)/config.status
$(top_srcdir
)/common
/gdbinit.in
3049 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
3050 mn10300
/.gdbinit
: $(top_builddir
)/config.status
$(top_srcdir
)/common
/gdbinit.in
3051 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
3052 moxie
/.gdbinit
: $(top_builddir
)/config.status
$(top_srcdir
)/common
/gdbinit.in
3053 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
3054 msp430
/.gdbinit
: $(top_builddir
)/config.status
$(top_srcdir
)/common
/gdbinit.in
3055 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
3056 or1k
/.gdbinit
: $(top_builddir
)/config.status
$(top_srcdir
)/common
/gdbinit.in
3057 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
3058 ppc
/.gdbinit
: $(top_builddir
)/config.status
$(top_srcdir
)/common
/gdbinit.in
3059 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
3060 pru
/.gdbinit
: $(top_builddir
)/config.status
$(top_srcdir
)/common
/gdbinit.in
3061 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
3062 riscv
/.gdbinit
: $(top_builddir
)/config.status
$(top_srcdir
)/common
/gdbinit.in
3063 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
3064 rl78
/.gdbinit
: $(top_builddir
)/config.status
$(top_srcdir
)/common
/gdbinit.in
3065 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
3066 rx
/.gdbinit
: $(top_builddir
)/config.status
$(top_srcdir
)/common
/gdbinit.in
3067 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
3068 sh
/.gdbinit
: $(top_builddir
)/config.status
$(top_srcdir
)/common
/gdbinit.in
3069 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
3070 erc32
/.gdbinit
: $(top_builddir
)/config.status
$(top_srcdir
)/common
/gdbinit.in
3071 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
3072 v850
/.gdbinit
: $(top_builddir
)/config.status
$(top_srcdir
)/common
/gdbinit.in
3073 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
3074 example-synacor
/.gdbinit
: $(top_builddir
)/config.status
$(top_srcdir
)/common
/gdbinit.in
3075 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
3076 arch-subdir.mk
: $(top_builddir
)/config.status
$(srcdir)/arch-subdir.mk.in
3077 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
3078 .gdbinit
: $(top_builddir
)/config.status
$(srcdir)/gdbinit.in
3079 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
3081 clean-noinstLIBRARIES
:
3082 -test -z
"$(noinst_LIBRARIES)" ||
rm -f
$(noinst_LIBRARIES
)
3083 common
/$(am__dirstamp
):
3085 @
: > common
/$(am__dirstamp
)
3086 common
/$(DEPDIR
)/$(am__dirstamp
):
3087 @
$(MKDIR_P
) common
/$(DEPDIR
)
3088 @
: > common
/$(DEPDIR
)/$(am__dirstamp
)
3089 common
/callback.
$(OBJEXT
): common
/$(am__dirstamp
) \
3090 common
/$(DEPDIR
)/$(am__dirstamp
)
3091 common
/portability.
$(OBJEXT
): common
/$(am__dirstamp
) \
3092 common
/$(DEPDIR
)/$(am__dirstamp
)
3093 common
/sim-load.
$(OBJEXT
): common
/$(am__dirstamp
) \
3094 common
/$(DEPDIR
)/$(am__dirstamp
)
3095 common
/syscall.
$(OBJEXT
): common
/$(am__dirstamp
) \
3096 common
/$(DEPDIR
)/$(am__dirstamp
)
3097 common
/target-newlib-errno.
$(OBJEXT
): common
/$(am__dirstamp
) \
3098 common
/$(DEPDIR
)/$(am__dirstamp
)
3099 common
/target-newlib-open.
$(OBJEXT
): common
/$(am__dirstamp
) \
3100 common
/$(DEPDIR
)/$(am__dirstamp
)
3101 common
/target-newlib-signal.
$(OBJEXT
): common
/$(am__dirstamp
) \
3102 common
/$(DEPDIR
)/$(am__dirstamp
)
3103 common
/target-newlib-syscall.
$(OBJEXT
): common
/$(am__dirstamp
) \
3104 common
/$(DEPDIR
)/$(am__dirstamp
)
3105 common
/version.
$(OBJEXT
): common
/$(am__dirstamp
) \
3106 common
/$(DEPDIR
)/$(am__dirstamp
)
3107 aarch64
/$(am__dirstamp
):
3109 @
: > aarch64
/$(am__dirstamp
)
3111 aarch64
/libsim.a
: $(aarch64_libsim_a_OBJECTS
) $(aarch64_libsim_a_DEPENDENCIES
) $(EXTRA_aarch64_libsim_a_DEPENDENCIES
) aarch64
/$(am__dirstamp
)
3112 $(AM_V_at
)-rm -f aarch64
/libsim.a
3113 $(AM_V_AR
)$(aarch64_libsim_a_AR
) aarch64
/libsim.a
$(aarch64_libsim_a_OBJECTS
) $(aarch64_libsim_a_LIBADD
)
3114 $(AM_V_at
)$(RANLIB
) aarch64
/libsim.a
3115 arm
/$(am__dirstamp
):
3117 @
: > arm
/$(am__dirstamp
)
3119 arm
/libsim.a
: $(arm_libsim_a_OBJECTS
) $(arm_libsim_a_DEPENDENCIES
) $(EXTRA_arm_libsim_a_DEPENDENCIES
) arm
/$(am__dirstamp
)
3120 $(AM_V_at
)-rm -f arm
/libsim.a
3121 $(AM_V_AR
)$(arm_libsim_a_AR
) arm
/libsim.a
$(arm_libsim_a_OBJECTS
) $(arm_libsim_a_LIBADD
)
3122 $(AM_V_at
)$(RANLIB
) arm
/libsim.a
3123 avr
/$(am__dirstamp
):
3125 @
: > avr
/$(am__dirstamp
)
3127 avr
/libsim.a
: $(avr_libsim_a_OBJECTS
) $(avr_libsim_a_DEPENDENCIES
) $(EXTRA_avr_libsim_a_DEPENDENCIES
) avr
/$(am__dirstamp
)
3128 $(AM_V_at
)-rm -f avr
/libsim.a
3129 $(AM_V_AR
)$(avr_libsim_a_AR
) avr
/libsim.a
$(avr_libsim_a_OBJECTS
) $(avr_libsim_a_LIBADD
)
3130 $(AM_V_at
)$(RANLIB
) avr
/libsim.a
3131 bfin
/$(am__dirstamp
):
3133 @
: > bfin
/$(am__dirstamp
)
3135 bfin
/libsim.a
: $(bfin_libsim_a_OBJECTS
) $(bfin_libsim_a_DEPENDENCIES
) $(EXTRA_bfin_libsim_a_DEPENDENCIES
) bfin
/$(am__dirstamp
)
3136 $(AM_V_at
)-rm -f bfin
/libsim.a
3137 $(AM_V_AR
)$(bfin_libsim_a_AR
) bfin
/libsim.a
$(bfin_libsim_a_OBJECTS
) $(bfin_libsim_a_LIBADD
)
3138 $(AM_V_at
)$(RANLIB
) bfin
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3139 bpf
/$(am__dirstamp
):
3141 @
: > bpf
/$(am__dirstamp
)
3143 bpf
/libsim.a
: $(bpf_libsim_a_OBJECTS
) $(bpf_libsim_a_DEPENDENCIES
) $(EXTRA_bpf_libsim_a_DEPENDENCIES
) bpf
/$(am__dirstamp
)
3144 $(AM_V_at
)-rm -f bpf
/libsim.a
3145 $(AM_V_AR
)$(bpf_libsim_a_AR
) bpf
/libsim.a
$(bpf_libsim_a_OBJECTS
) $(bpf_libsim_a_LIBADD
)
3146 $(AM_V_at
)$(RANLIB
) bpf
/libsim.a
3148 common
/libcommon.a
: $(common_libcommon_a_OBJECTS
) $(common_libcommon_a_DEPENDENCIES
) $(EXTRA_common_libcommon_a_DEPENDENCIES
) common
/$(am__dirstamp
)
3149 $(AM_V_at
)-rm -f common
/libcommon.a
3150 $(AM_V_AR
)$(common_libcommon_a_AR
) common
/libcommon.a
$(common_libcommon_a_OBJECTS
) $(common_libcommon_a_LIBADD
)
3151 $(AM_V_at
)$(RANLIB
) common
/libcommon.a
3152 cr16
/$(am__dirstamp
):
3154 @
: > cr16
/$(am__dirstamp
)
3156 cr16
/libsim.a
: $(cr16_libsim_a_OBJECTS
) $(cr16_libsim_a_DEPENDENCIES
) $(EXTRA_cr16_libsim_a_DEPENDENCIES
) cr16
/$(am__dirstamp
)
3157 $(AM_V_at
)-rm -f cr16
/libsim.a
3158 $(AM_V_AR
)$(cr16_libsim_a_AR
) cr16
/libsim.a
$(cr16_libsim_a_OBJECTS
) $(cr16_libsim_a_LIBADD
)
3159 $(AM_V_at
)$(RANLIB
) cr16
/libsim.a
3160 cris
/$(am__dirstamp
):
3162 @
: > cris
/$(am__dirstamp
)
3164 cris
/libsim.a
: $(cris_libsim_a_OBJECTS
) $(cris_libsim_a_DEPENDENCIES
) $(EXTRA_cris_libsim_a_DEPENDENCIES
) cris
/$(am__dirstamp
)
3165 $(AM_V_at
)-rm -f cris
/libsim.a
3166 $(AM_V_AR
)$(cris_libsim_a_AR
) cris
/libsim.a
$(cris_libsim_a_OBJECTS
) $(cris_libsim_a_LIBADD
)
3167 $(AM_V_at
)$(RANLIB
) cris
/libsim.a
3168 d10v
/$(am__dirstamp
):
3170 @
: > d10v
/$(am__dirstamp
)
3172 d10v
/libsim.a
: $(d10v_libsim_a_OBJECTS
) $(d10v_libsim_a_DEPENDENCIES
) $(EXTRA_d10v_libsim_a_DEPENDENCIES
) d10v
/$(am__dirstamp
)
3173 $(AM_V_at
)-rm -f d10v
/libsim.a
3174 $(AM_V_AR
)$(d10v_libsim_a_AR
) d10v
/libsim.a
$(d10v_libsim_a_OBJECTS
) $(d10v_libsim_a_LIBADD
)
3175 $(AM_V_at
)$(RANLIB
) d10v
/libsim.a
3176 erc32
/$(am__dirstamp
):
3178 @
: > erc32
/$(am__dirstamp
)
3180 erc32
/libsim.a
: $(erc32_libsim_a_OBJECTS
) $(erc32_libsim_a_DEPENDENCIES
) $(EXTRA_erc32_libsim_a_DEPENDENCIES
) erc32
/$(am__dirstamp
)
3181 $(AM_V_at
)-rm -f erc32
/libsim.a
3182 $(AM_V_AR
)$(erc32_libsim_a_AR
) erc32
/libsim.a
$(erc32_libsim_a_OBJECTS
) $(erc32_libsim_a_LIBADD
)
3183 $(AM_V_at
)$(RANLIB
) erc32
/libsim.a
3184 example-synacor
/$(am__dirstamp
):
3185 @
$(MKDIR_P
) example-synacor
3186 @
: > example-synacor
/$(am__dirstamp
)
3188 example-synacor
/libsim.a
: $(example_synacor_libsim_a_OBJECTS
) $(example_synacor_libsim_a_DEPENDENCIES
) $(EXTRA_example_synacor_libsim_a_DEPENDENCIES
) example-synacor
/$(am__dirstamp
)
3189 $(AM_V_at
)-rm -f example-synacor
/libsim.a
3190 $(AM_V_AR
)$(example_synacor_libsim_a_AR
) example-synacor
/libsim.a
$(example_synacor_libsim_a_OBJECTS
) $(example_synacor_libsim_a_LIBADD
)
3191 $(AM_V_at
)$(RANLIB
) example-synacor
/libsim.a
3192 frv
/$(am__dirstamp
):
3194 @
: > frv
/$(am__dirstamp
)
3196 frv
/libsim.a
: $(frv_libsim_a_OBJECTS
) $(frv_libsim_a_DEPENDENCIES
) $(EXTRA_frv_libsim_a_DEPENDENCIES
) frv
/$(am__dirstamp
)
3197 $(AM_V_at
)-rm -f frv
/libsim.a
3198 $(AM_V_AR
)$(frv_libsim_a_AR
) frv
/libsim.a
$(frv_libsim_a_OBJECTS
) $(frv_libsim_a_LIBADD
)
3199 $(AM_V_at
)$(RANLIB
) frv
/libsim.a
3200 ft32
/$(am__dirstamp
):
3202 @
: > ft32
/$(am__dirstamp
)
3204 ft32
/libsim.a
: $(ft32_libsim_a_OBJECTS
) $(ft32_libsim_a_DEPENDENCIES
) $(EXTRA_ft32_libsim_a_DEPENDENCIES
) ft32
/$(am__dirstamp
)
3205 $(AM_V_at
)-rm -f ft32
/libsim.a
3206 $(AM_V_AR
)$(ft32_libsim_a_AR
) ft32
/libsim.a
$(ft32_libsim_a_OBJECTS
) $(ft32_libsim_a_LIBADD
)
3207 $(AM_V_at
)$(RANLIB
) ft32
/libsim.a
3208 h8300
/$(am__dirstamp
):
3210 @
: > h8300
/$(am__dirstamp
)
3212 h8300
/libsim.a
: $(h8300_libsim_a_OBJECTS
) $(h8300_libsim_a_DEPENDENCIES
) $(EXTRA_h8300_libsim_a_DEPENDENCIES
) h8300
/$(am__dirstamp
)
3213 $(AM_V_at
)-rm -f h8300
/libsim.a
3214 $(AM_V_AR
)$(h8300_libsim_a_AR
) h8300
/libsim.a
$(h8300_libsim_a_OBJECTS
) $(h8300_libsim_a_LIBADD
)
3215 $(AM_V_at
)$(RANLIB
) h8300
/libsim.a
3216 igen
/$(am__dirstamp
):
3218 @
: > igen
/$(am__dirstamp
)
3219 igen
/$(DEPDIR
)/$(am__dirstamp
):
3220 @
$(MKDIR_P
) igen
/$(DEPDIR
)
3221 @
: > igen
/$(DEPDIR
)/$(am__dirstamp
)
3222 igen
/table.
$(OBJEXT
): igen
/$(am__dirstamp
) \
3223 igen
/$(DEPDIR
)/$(am__dirstamp
)
3224 igen
/lf.
$(OBJEXT
): igen
/$(am__dirstamp
) igen
/$(DEPDIR
)/$(am__dirstamp
)
3225 igen
/misc.
$(OBJEXT
): igen
/$(am__dirstamp
) \
3226 igen
/$(DEPDIR
)/$(am__dirstamp
)
3227 igen
/filter_host.
$(OBJEXT
): igen
/$(am__dirstamp
) \
3228 igen
/$(DEPDIR
)/$(am__dirstamp
)
3229 igen
/ld-decode.
$(OBJEXT
): igen
/$(am__dirstamp
) \
3230 igen
/$(DEPDIR
)/$(am__dirstamp
)
3231 igen
/ld-cache.
$(OBJEXT
): igen
/$(am__dirstamp
) \
3232 igen
/$(DEPDIR
)/$(am__dirstamp
)
3233 igen
/filter.
$(OBJEXT
): igen
/$(am__dirstamp
) \
3234 igen
/$(DEPDIR
)/$(am__dirstamp
)
3235 igen
/ld-insn.
$(OBJEXT
): igen
/$(am__dirstamp
) \
3236 igen
/$(DEPDIR
)/$(am__dirstamp
)
3237 igen
/gen-model.
$(OBJEXT
): igen
/$(am__dirstamp
) \
3238 igen
/$(DEPDIR
)/$(am__dirstamp
)
3239 igen
/gen-itable.
$(OBJEXT
): igen
/$(am__dirstamp
) \
3240 igen
/$(DEPDIR
)/$(am__dirstamp
)
3241 igen
/gen-icache.
$(OBJEXT
): igen
/$(am__dirstamp
) \
3242 igen
/$(DEPDIR
)/$(am__dirstamp
)
3243 igen
/gen-semantics.
$(OBJEXT
): igen
/$(am__dirstamp
) \
3244 igen
/$(DEPDIR
)/$(am__dirstamp
)
3245 igen
/gen-idecode.
$(OBJEXT
): igen
/$(am__dirstamp
) \
3246 igen
/$(DEPDIR
)/$(am__dirstamp
)
3247 igen
/gen-support.
$(OBJEXT
): igen
/$(am__dirstamp
) \
3248 igen
/$(DEPDIR
)/$(am__dirstamp
)
3249 igen
/gen-engine.
$(OBJEXT
): igen
/$(am__dirstamp
) \
3250 igen
/$(DEPDIR
)/$(am__dirstamp
)
3251 igen
/gen.
$(OBJEXT
): igen
/$(am__dirstamp
) \
3252 igen
/$(DEPDIR
)/$(am__dirstamp
)
3254 @SIM_ENABLE_IGEN_FALSE@igen
/libigen.a
: $(igen_libigen_a_OBJECTS
) $(igen_libigen_a_DEPENDENCIES
) $(EXTRA_igen_libigen_a_DEPENDENCIES
) igen
/$(am__dirstamp
)
3255 @SIM_ENABLE_IGEN_FALSE@
$(AM_V_at
)-rm -f igen
/libigen.a
3256 @SIM_ENABLE_IGEN_FALSE@
$(AM_V_AR
)$(igen_libigen_a_AR
) igen
/libigen.a
$(igen_libigen_a_OBJECTS
) $(igen_libigen_a_LIBADD
)
3257 @SIM_ENABLE_IGEN_FALSE@
$(AM_V_at
)$(RANLIB
) igen
/libigen.a
3258 iq2000
/$(am__dirstamp
):
3260 @
: > iq2000
/$(am__dirstamp
)
3262 iq2000
/libsim.a
: $(iq2000_libsim_a_OBJECTS
) $(iq2000_libsim_a_DEPENDENCIES
) $(EXTRA_iq2000_libsim_a_DEPENDENCIES
) iq2000
/$(am__dirstamp
)
3263 $(AM_V_at
)-rm -f iq2000
/libsim.a
3264 $(AM_V_AR
)$(iq2000_libsim_a_AR
) iq2000
/libsim.a
$(iq2000_libsim_a_OBJECTS
) $(iq2000_libsim_a_LIBADD
)
3265 $(AM_V_at
)$(RANLIB
) iq2000
/libsim.a
3266 lm32
/$(am__dirstamp
):
3268 @
: > lm32
/$(am__dirstamp
)
3270 lm32
/libsim.a
: $(lm32_libsim_a_OBJECTS
) $(lm32_libsim_a_DEPENDENCIES
) $(EXTRA_lm32_libsim_a_DEPENDENCIES
) lm32
/$(am__dirstamp
)
3271 $(AM_V_at
)-rm -f lm32
/libsim.a
3272 $(AM_V_AR
)$(lm32_libsim_a_AR
) lm32
/libsim.a
$(lm32_libsim_a_OBJECTS
) $(lm32_libsim_a_LIBADD
)
3273 $(AM_V_at
)$(RANLIB
) lm32
/libsim.a
3274 m32c
/$(am__dirstamp
):
3276 @
: > m32c
/$(am__dirstamp
)
3278 m32c
/libsim.a
: $(m32c_libsim_a_OBJECTS
) $(m32c_libsim_a_DEPENDENCIES
) $(EXTRA_m32c_libsim_a_DEPENDENCIES
) m32c
/$(am__dirstamp
)
3279 $(AM_V_at
)-rm -f m32c
/libsim.a
3280 $(AM_V_AR
)$(m32c_libsim_a_AR
) m32c
/libsim.a
$(m32c_libsim_a_OBJECTS
) $(m32c_libsim_a_LIBADD
)
3281 $(AM_V_at
)$(RANLIB
) m32c
/libsim.a
3282 m32r
/$(am__dirstamp
):
3284 @
: > m32r
/$(am__dirstamp
)
3286 m32r
/libsim.a
: $(m32r_libsim_a_OBJECTS
) $(m32r_libsim_a_DEPENDENCIES
) $(EXTRA_m32r_libsim_a_DEPENDENCIES
) m32r
/$(am__dirstamp
)
3287 $(AM_V_at
)-rm -f m32r
/libsim.a
3288 $(AM_V_AR
)$(m32r_libsim_a_AR
) m32r
/libsim.a
$(m32r_libsim_a_OBJECTS
) $(m32r_libsim_a_LIBADD
)
3289 $(AM_V_at
)$(RANLIB
) m32r
/libsim.a
3290 m68hc11
/$(am__dirstamp
):
3292 @
: > m68hc11
/$(am__dirstamp
)
3294 m68hc11
/libsim.a
: $(m68hc11_libsim_a_OBJECTS
) $(m68hc11_libsim_a_DEPENDENCIES
) $(EXTRA_m68hc11_libsim_a_DEPENDENCIES
) m68hc11
/$(am__dirstamp
)
3295 $(AM_V_at
)-rm -f m68hc11
/libsim.a
3296 $(AM_V_AR
)$(m68hc11_libsim_a_AR
) m68hc11
/libsim.a
$(m68hc11_libsim_a_OBJECTS
) $(m68hc11_libsim_a_LIBADD
)
3297 $(AM_V_at
)$(RANLIB
) m68hc11
/libsim.a
3298 mcore
/$(am__dirstamp
):
3300 @
: > mcore
/$(am__dirstamp
)
3302 mcore
/libsim.a
: $(mcore_libsim_a_OBJECTS
) $(mcore_libsim_a_DEPENDENCIES
) $(EXTRA_mcore_libsim_a_DEPENDENCIES
) mcore
/$(am__dirstamp
)
3303 $(AM_V_at
)-rm -f mcore
/libsim.a
3304 $(AM_V_AR
)$(mcore_libsim_a_AR
) mcore
/libsim.a
$(mcore_libsim_a_OBJECTS
) $(mcore_libsim_a_LIBADD
)
3305 $(AM_V_at
)$(RANLIB
) mcore
/libsim.a
3306 microblaze
/$(am__dirstamp
):
3307 @
$(MKDIR_P
) microblaze
3308 @
: > microblaze
/$(am__dirstamp
)
3310 microblaze
/libsim.a
: $(microblaze_libsim_a_OBJECTS
) $(microblaze_libsim_a_DEPENDENCIES
) $(EXTRA_microblaze_libsim_a_DEPENDENCIES
) microblaze
/$(am__dirstamp
)
3311 $(AM_V_at
)-rm -f microblaze
/libsim.a
3312 $(AM_V_AR
)$(microblaze_libsim_a_AR
) microblaze
/libsim.a
$(microblaze_libsim_a_OBJECTS
) $(microblaze_libsim_a_LIBADD
)
3313 $(AM_V_at
)$(RANLIB
) microblaze
/libsim.a
3314 mips
/$(am__dirstamp
):
3316 @
: > mips
/$(am__dirstamp
)
3318 mips
/libsim.a
: $(mips_libsim_a_OBJECTS
) $(mips_libsim_a_DEPENDENCIES
) $(EXTRA_mips_libsim_a_DEPENDENCIES
) mips
/$(am__dirstamp
)
3319 $(AM_V_at
)-rm -f mips
/libsim.a
3320 $(AM_V_AR
)$(mips_libsim_a_AR
) mips
/libsim.a
$(mips_libsim_a_OBJECTS
) $(mips_libsim_a_LIBADD
)
3321 $(AM_V_at
)$(RANLIB
) mips
/libsim.a
3322 mn10300
/$(am__dirstamp
):
3324 @
: > mn10300
/$(am__dirstamp
)
3326 mn10300
/libsim.a
: $(mn10300_libsim_a_OBJECTS
) $(mn10300_libsim_a_DEPENDENCIES
) $(EXTRA_mn10300_libsim_a_DEPENDENCIES
) mn10300
/$(am__dirstamp
)
3327 $(AM_V_at
)-rm -f mn10300
/libsim.a
3328 $(AM_V_AR
)$(mn10300_libsim_a_AR
) mn10300
/libsim.a
$(mn10300_libsim_a_OBJECTS
) $(mn10300_libsim_a_LIBADD
)
3329 $(AM_V_at
)$(RANLIB
) mn10300
/libsim.a
3330 moxie
/$(am__dirstamp
):
3332 @
: > moxie
/$(am__dirstamp
)
3334 moxie
/libsim.a
: $(moxie_libsim_a_OBJECTS
) $(moxie_libsim_a_DEPENDENCIES
) $(EXTRA_moxie_libsim_a_DEPENDENCIES
) moxie
/$(am__dirstamp
)
3335 $(AM_V_at
)-rm -f moxie
/libsim.a
3336 $(AM_V_AR
)$(moxie_libsim_a_AR
) moxie
/libsim.a
$(moxie_libsim_a_OBJECTS
) $(moxie_libsim_a_LIBADD
)
3337 $(AM_V_at
)$(RANLIB
) moxie
/libsim.a
3338 msp430
/$(am__dirstamp
):
3340 @
: > msp430
/$(am__dirstamp
)
3342 msp430
/libsim.a
: $(msp430_libsim_a_OBJECTS
) $(msp430_libsim_a_DEPENDENCIES
) $(EXTRA_msp430_libsim_a_DEPENDENCIES
) msp430
/$(am__dirstamp
)
3343 $(AM_V_at
)-rm -f msp430
/libsim.a
3344 $(AM_V_AR
)$(msp430_libsim_a_AR
) msp430
/libsim.a
$(msp430_libsim_a_OBJECTS
) $(msp430_libsim_a_LIBADD
)
3345 $(AM_V_at
)$(RANLIB
) msp430
/libsim.a
3346 or1k
/$(am__dirstamp
):
3348 @
: > or1k
/$(am__dirstamp
)
3350 or1k
/libsim.a
: $(or1k_libsim_a_OBJECTS
) $(or1k_libsim_a_DEPENDENCIES
) $(EXTRA_or1k_libsim_a_DEPENDENCIES
) or1k
/$(am__dirstamp
)
3351 $(AM_V_at
)-rm -f or1k
/libsim.a
3352 $(AM_V_AR
)$(or1k_libsim_a_AR
) or1k
/libsim.a
$(or1k_libsim_a_OBJECTS
) $(or1k_libsim_a_LIBADD
)
3353 $(AM_V_at
)$(RANLIB
) or1k
/libsim.a
3354 pru
/$(am__dirstamp
):
3356 @
: > pru
/$(am__dirstamp
)
3358 pru
/libsim.a
: $(pru_libsim_a_OBJECTS
) $(pru_libsim_a_DEPENDENCIES
) $(EXTRA_pru_libsim_a_DEPENDENCIES
) pru
/$(am__dirstamp
)
3359 $(AM_V_at
)-rm -f pru
/libsim.a
3360 $(AM_V_AR
)$(pru_libsim_a_AR
) pru
/libsim.a
$(pru_libsim_a_OBJECTS
) $(pru_libsim_a_LIBADD
)
3361 $(AM_V_at
)$(RANLIB
) pru
/libsim.a
3362 riscv
/$(am__dirstamp
):
3364 @
: > riscv
/$(am__dirstamp
)
3366 riscv
/libsim.a
: $(riscv_libsim_a_OBJECTS
) $(riscv_libsim_a_DEPENDENCIES
) $(EXTRA_riscv_libsim_a_DEPENDENCIES
) riscv
/$(am__dirstamp
)
3367 $(AM_V_at
)-rm -f riscv
/libsim.a
3368 $(AM_V_AR
)$(riscv_libsim_a_AR
) riscv
/libsim.a
$(riscv_libsim_a_OBJECTS
) $(riscv_libsim_a_LIBADD
)
3369 $(AM_V_at
)$(RANLIB
) riscv
/libsim.a
3370 rl78
/$(am__dirstamp
):
3372 @
: > rl78
/$(am__dirstamp
)
3374 rl78
/libsim.a
: $(rl78_libsim_a_OBJECTS
) $(rl78_libsim_a_DEPENDENCIES
) $(EXTRA_rl78_libsim_a_DEPENDENCIES
) rl78
/$(am__dirstamp
)
3375 $(AM_V_at
)-rm -f rl78
/libsim.a
3376 $(AM_V_AR
)$(rl78_libsim_a_AR
) rl78
/libsim.a
$(rl78_libsim_a_OBJECTS
) $(rl78_libsim_a_LIBADD
)
3377 $(AM_V_at
)$(RANLIB
) rl78
/libsim.a
3380 @
: > rx
/$(am__dirstamp
)
3382 rx
/libsim.a
: $(rx_libsim_a_OBJECTS
) $(rx_libsim_a_DEPENDENCIES
) $(EXTRA_rx_libsim_a_DEPENDENCIES
) rx
/$(am__dirstamp
)
3383 $(AM_V_at
)-rm -f rx
/libsim.a
3384 $(AM_V_AR
)$(rx_libsim_a_AR
) rx
/libsim.a
$(rx_libsim_a_OBJECTS
) $(rx_libsim_a_LIBADD
)
3385 $(AM_V_at
)$(RANLIB
) rx
/libsim.a
3388 @
: > sh
/$(am__dirstamp
)
3390 sh
/libsim.a
: $(sh_libsim_a_OBJECTS
) $(sh_libsim_a_DEPENDENCIES
) $(EXTRA_sh_libsim_a_DEPENDENCIES
) sh
/$(am__dirstamp
)
3391 $(AM_V_at
)-rm -f sh
/libsim.a
3392 $(AM_V_AR
)$(sh_libsim_a_AR
) sh
/libsim.a
$(sh_libsim_a_OBJECTS
) $(sh_libsim_a_LIBADD
)
3393 $(AM_V_at
)$(RANLIB
) sh
/libsim.a
3394 v850
/$(am__dirstamp
):
3396 @
: > v850
/$(am__dirstamp
)
3398 v850
/libsim.a
: $(v850_libsim_a_OBJECTS
) $(v850_libsim_a_DEPENDENCIES
) $(EXTRA_v850_libsim_a_DEPENDENCIES
) v850
/$(am__dirstamp
)
3399 $(AM_V_at
)-rm -f v850
/libsim.a
3400 $(AM_V_AR
)$(v850_libsim_a_AR
) v850
/libsim.a
$(v850_libsim_a_OBJECTS
) $(v850_libsim_a_LIBADD
)
3401 $(AM_V_at
)$(RANLIB
) v850
/libsim.a
3403 clean-checkPROGRAMS
:
3404 @list
='$(check_PROGRAMS)'; test -n
"$$list" || exit
0; \
3405 echo
" rm -f" $$list; \
3406 rm -f
$$list || exit
$$?
; \
3407 test -n
"$(EXEEXT)" || exit
0; \
3408 list
=`for p in $$list; do echo "$$p"; done | sed 's/$(EXEEXT)$$//'`; \
3409 echo
" rm -f" $$list; \
3412 clean-noinstPROGRAMS
:
3413 @list
='$(noinst_PROGRAMS)'; test -n
"$$list" || exit
0; \
3414 echo
" rm -f" $$list; \
3415 rm -f
$$list || exit
$$?
; \
3416 test -n
"$(EXEEXT)" || exit
0; \
3417 list
=`for p in $$list; do echo "$$p"; done | sed 's/$(EXEEXT)$$//'`; \
3418 echo
" rm -f" $$list; \
3421 aarch64
/run
$(EXEEXT
): $(aarch64_run_OBJECTS
) $(aarch64_run_DEPENDENCIES
) $(EXTRA_aarch64_run_DEPENDENCIES
) aarch64
/$(am__dirstamp
)
3422 @
rm -f aarch64
/run
$(EXEEXT
)
3423 $(AM_V_CCLD
)$(LINK
) $(aarch64_run_OBJECTS
) $(aarch64_run_LDADD
) $(LIBS
)
3425 arm
/run
$(EXEEXT
): $(arm_run_OBJECTS
) $(arm_run_DEPENDENCIES
) $(EXTRA_arm_run_DEPENDENCIES
) arm
/$(am__dirstamp
)
3426 @
rm -f arm
/run
$(EXEEXT
)
3427 $(AM_V_CCLD
)$(LINK
) $(arm_run_OBJECTS
) $(arm_run_LDADD
) $(LIBS
)
3429 avr
/run
$(EXEEXT
): $(avr_run_OBJECTS
) $(avr_run_DEPENDENCIES
) $(EXTRA_avr_run_DEPENDENCIES
) avr
/$(am__dirstamp
)
3430 @
rm -f avr
/run
$(EXEEXT
)
3431 $(AM_V_CCLD
)$(LINK
) $(avr_run_OBJECTS
) $(avr_run_LDADD
) $(LIBS
)
3433 bfin
/run
$(EXEEXT
): $(bfin_run_OBJECTS
) $(bfin_run_DEPENDENCIES
) $(EXTRA_bfin_run_DEPENDENCIES
) bfin
/$(am__dirstamp
)
3434 @
rm -f bfin
/run
$(EXEEXT
)
3435 $(AM_V_CCLD
)$(LINK
) $(bfin_run_OBJECTS
) $(bfin_run_LDADD
) $(LIBS
)
3437 bpf
/run
$(EXEEXT
): $(bpf_run_OBJECTS
) $(bpf_run_DEPENDENCIES
) $(EXTRA_bpf_run_DEPENDENCIES
) bpf
/$(am__dirstamp
)
3438 @
rm -f bpf
/run
$(EXEEXT
)
3439 $(AM_V_CCLD
)$(LINK
) $(bpf_run_OBJECTS
) $(bpf_run_LDADD
) $(LIBS
)
3440 cr16
/$(DEPDIR
)/$(am__dirstamp
):
3441 @
$(MKDIR_P
) cr16
/$(DEPDIR
)
3442 @
: > cr16
/$(DEPDIR
)/$(am__dirstamp
)
3443 cr16
/gencode.
$(OBJEXT
): cr16
/$(am__dirstamp
) \
3444 cr16
/$(DEPDIR
)/$(am__dirstamp
)
3446 @SIM_ENABLE_ARCH_cr16_FALSE@cr16
/gencode
$(EXEEXT
): $(cr16_gencode_OBJECTS
) $(cr16_gencode_DEPENDENCIES
) $(EXTRA_cr16_gencode_DEPENDENCIES
) cr16
/$(am__dirstamp
)
3447 @SIM_ENABLE_ARCH_cr16_FALSE@ @
rm -f cr16
/gencode
$(EXEEXT
)
3448 @SIM_ENABLE_ARCH_cr16_FALSE@
$(AM_V_CCLD
)$(LINK
) $(cr16_gencode_OBJECTS
) $(cr16_gencode_LDADD
) $(LIBS
)
3450 cr16
/run
$(EXEEXT
): $(cr16_run_OBJECTS
) $(cr16_run_DEPENDENCIES
) $(EXTRA_cr16_run_DEPENDENCIES
) cr16
/$(am__dirstamp
)
3451 @
rm -f cr16
/run
$(EXEEXT
)
3452 $(AM_V_CCLD
)$(LINK
) $(cr16_run_OBJECTS
) $(cr16_run_LDADD
) $(LIBS
)
3454 cris
/run
$(EXEEXT
): $(cris_run_OBJECTS
) $(cris_run_DEPENDENCIES
) $(EXTRA_cris_run_DEPENDENCIES
) cris
/$(am__dirstamp
)
3455 @
rm -f cris
/run
$(EXEEXT
)
3456 $(AM_V_CCLD
)$(LINK
) $(cris_run_OBJECTS
) $(cris_run_LDADD
) $(LIBS
)
3457 cris
/$(DEPDIR
)/$(am__dirstamp
):
3458 @
$(MKDIR_P
) cris
/$(DEPDIR
)
3459 @
: > cris
/$(DEPDIR
)/$(am__dirstamp
)
3460 cris
/rvdummy.
$(OBJEXT
): cris
/$(am__dirstamp
) \
3461 cris
/$(DEPDIR
)/$(am__dirstamp
)
3463 cris
/rvdummy
$(EXEEXT
): $(cris_rvdummy_OBJECTS
) $(cris_rvdummy_DEPENDENCIES
) $(EXTRA_cris_rvdummy_DEPENDENCIES
) cris
/$(am__dirstamp
)
3464 @
rm -f cris
/rvdummy
$(EXEEXT
)
3465 $(AM_V_CCLD
)$(LINK
) $(cris_rvdummy_OBJECTS
) $(cris_rvdummy_LDADD
) $(LIBS
)
3466 d10v
/$(DEPDIR
)/$(am__dirstamp
):
3467 @
$(MKDIR_P
) d10v
/$(DEPDIR
)
3468 @
: > d10v
/$(DEPDIR
)/$(am__dirstamp
)
3469 d10v
/gencode.
$(OBJEXT
): d10v
/$(am__dirstamp
) \
3470 d10v
/$(DEPDIR
)/$(am__dirstamp
)
3472 @SIM_ENABLE_ARCH_d10v_FALSE@d10v
/gencode
$(EXEEXT
): $(d10v_gencode_OBJECTS
) $(d10v_gencode_DEPENDENCIES
) $(EXTRA_d10v_gencode_DEPENDENCIES
) d10v
/$(am__dirstamp
)
3473 @SIM_ENABLE_ARCH_d10v_FALSE@ @
rm -f d10v
/gencode
$(EXEEXT
)
3474 @SIM_ENABLE_ARCH_d10v_FALSE@
$(AM_V_CCLD
)$(LINK
) $(d10v_gencode_OBJECTS
) $(d10v_gencode_LDADD
) $(LIBS
)
3476 d10v
/run
$(EXEEXT
): $(d10v_run_OBJECTS
) $(d10v_run_DEPENDENCIES
) $(EXTRA_d10v_run_DEPENDENCIES
) d10v
/$(am__dirstamp
)
3477 @
rm -f d10v
/run
$(EXEEXT
)
3478 $(AM_V_CCLD
)$(LINK
) $(d10v_run_OBJECTS
) $(d10v_run_LDADD
) $(LIBS
)
3480 erc32
/run
$(EXEEXT
): $(erc32_run_OBJECTS
) $(erc32_run_DEPENDENCIES
) $(EXTRA_erc32_run_DEPENDENCIES
) erc32
/$(am__dirstamp
)
3481 @
rm -f erc32
/run
$(EXEEXT
)
3482 $(AM_V_CCLD
)$(LINK
) $(erc32_run_OBJECTS
) $(erc32_run_LDADD
) $(LIBS
)
3483 erc32
/$(DEPDIR
)/$(am__dirstamp
):
3484 @
$(MKDIR_P
) erc32
/$(DEPDIR
)
3485 @
: > erc32
/$(DEPDIR
)/$(am__dirstamp
)
3486 erc32
/sis.
$(OBJEXT
): erc32
/$(am__dirstamp
) \
3487 erc32
/$(DEPDIR
)/$(am__dirstamp
)
3489 @SIM_ENABLE_ARCH_erc32_FALSE@erc32
/sis
$(EXEEXT
): $(erc32_sis_OBJECTS
) $(erc32_sis_DEPENDENCIES
) $(EXTRA_erc32_sis_DEPENDENCIES
) erc32
/$(am__dirstamp
)
3490 @SIM_ENABLE_ARCH_erc32_FALSE@ @
rm -f erc32
/sis
$(EXEEXT
)
3491 @SIM_ENABLE_ARCH_erc32_FALSE@
$(AM_V_CCLD
)$(LINK
) $(erc32_sis_OBJECTS
) $(erc32_sis_LDADD
) $(LIBS
)
3493 example-synacor
/run
$(EXEEXT
): $(example_synacor_run_OBJECTS
) $(example_synacor_run_DEPENDENCIES
) $(EXTRA_example_synacor_run_DEPENDENCIES
) example-synacor
/$(am__dirstamp
)
3494 @
rm -f example-synacor
/run
$(EXEEXT
)
3495 $(AM_V_CCLD
)$(LINK
) $(example_synacor_run_OBJECTS
) $(example_synacor_run_LDADD
) $(LIBS
)
3497 frv
/run
$(EXEEXT
): $(frv_run_OBJECTS
) $(frv_run_DEPENDENCIES
) $(EXTRA_frv_run_DEPENDENCIES
) frv
/$(am__dirstamp
)
3498 @
rm -f frv
/run
$(EXEEXT
)
3499 $(AM_V_CCLD
)$(LINK
) $(frv_run_OBJECTS
) $(frv_run_LDADD
) $(LIBS
)
3501 ft32
/run
$(EXEEXT
): $(ft32_run_OBJECTS
) $(ft32_run_DEPENDENCIES
) $(EXTRA_ft32_run_DEPENDENCIES
) ft32
/$(am__dirstamp
)
3502 @
rm -f ft32
/run
$(EXEEXT
)
3503 $(AM_V_CCLD
)$(LINK
) $(ft32_run_OBJECTS
) $(ft32_run_LDADD
) $(LIBS
)
3505 h8300
/run
$(EXEEXT
): $(h8300_run_OBJECTS
) $(h8300_run_DEPENDENCIES
) $(EXTRA_h8300_run_DEPENDENCIES
) h8300
/$(am__dirstamp
)
3506 @
rm -f h8300
/run
$(EXEEXT
)
3507 $(AM_V_CCLD
)$(LINK
) $(h8300_run_OBJECTS
) $(h8300_run_LDADD
) $(LIBS
)
3509 igen
/filter$(EXEEXT
): $(igen_filter_OBJECTS
) $(igen_filter_DEPENDENCIES
) $(EXTRA_igen_filter_DEPENDENCIES
) igen
/$(am__dirstamp
)
3510 @
rm -f igen
/filter$(EXEEXT
)
3511 $(AM_V_CCLD
)$(LINK
) $(igen_filter_OBJECTS
) $(igen_filter_LDADD
) $(LIBS
)
3513 igen
/gen
$(EXEEXT
): $(igen_gen_OBJECTS
) $(igen_gen_DEPENDENCIES
) $(EXTRA_igen_gen_DEPENDENCIES
) igen
/$(am__dirstamp
)
3514 @
rm -f igen
/gen
$(EXEEXT
)
3515 $(AM_V_CCLD
)$(LINK
) $(igen_gen_OBJECTS
) $(igen_gen_LDADD
) $(LIBS
)
3516 igen
/igen.
$(OBJEXT
): igen
/$(am__dirstamp
) \
3517 igen
/$(DEPDIR
)/$(am__dirstamp
)
3519 @SIM_ENABLE_IGEN_FALSE@igen
/igen
$(EXEEXT
): $(igen_igen_OBJECTS
) $(igen_igen_DEPENDENCIES
) $(EXTRA_igen_igen_DEPENDENCIES
) igen
/$(am__dirstamp
)
3520 @SIM_ENABLE_IGEN_FALSE@ @
rm -f igen
/igen
$(EXEEXT
)
3521 @SIM_ENABLE_IGEN_FALSE@
$(AM_V_CCLD
)$(LINK
) $(igen_igen_OBJECTS
) $(igen_igen_LDADD
) $(LIBS
)
3523 igen
/ld-cache
$(EXEEXT
): $(igen_ld_cache_OBJECTS
) $(igen_ld_cache_DEPENDENCIES
) $(EXTRA_igen_ld_cache_DEPENDENCIES
) igen
/$(am__dirstamp
)
3524 @
rm -f igen
/ld-cache
$(EXEEXT
)
3525 $(AM_V_CCLD
)$(LINK
) $(igen_ld_cache_OBJECTS
) $(igen_ld_cache_LDADD
) $(LIBS
)
3527 igen
/ld-decode
$(EXEEXT
): $(igen_ld_decode_OBJECTS
) $(igen_ld_decode_DEPENDENCIES
) $(EXTRA_igen_ld_decode_DEPENDENCIES
) igen
/$(am__dirstamp
)
3528 @
rm -f igen
/ld-decode
$(EXEEXT
)
3529 $(AM_V_CCLD
)$(LINK
) $(igen_ld_decode_OBJECTS
) $(igen_ld_decode_LDADD
) $(LIBS
)
3531 igen
/ld-insn
$(EXEEXT
): $(igen_ld_insn_OBJECTS
) $(igen_ld_insn_DEPENDENCIES
) $(EXTRA_igen_ld_insn_DEPENDENCIES
) igen
/$(am__dirstamp
)
3532 @
rm -f igen
/ld-insn
$(EXEEXT
)
3533 $(AM_V_CCLD
)$(LINK
) $(igen_ld_insn_OBJECTS
) $(igen_ld_insn_LDADD
) $(LIBS
)
3535 igen
/table
$(EXEEXT
): $(igen_table_OBJECTS
) $(igen_table_DEPENDENCIES
) $(EXTRA_igen_table_DEPENDENCIES
) igen
/$(am__dirstamp
)
3536 @
rm -f igen
/table
$(EXEEXT
)
3537 $(AM_V_CCLD
)$(LINK
) $(igen_table_OBJECTS
) $(igen_table_LDADD
) $(LIBS
)
3539 iq2000
/run
$(EXEEXT
): $(iq2000_run_OBJECTS
) $(iq2000_run_DEPENDENCIES
) $(EXTRA_iq2000_run_DEPENDENCIES
) iq2000
/$(am__dirstamp
)
3540 @
rm -f iq2000
/run
$(EXEEXT
)
3541 $(AM_V_CCLD
)$(LINK
) $(iq2000_run_OBJECTS
) $(iq2000_run_LDADD
) $(LIBS
)
3543 lm32
/run
$(EXEEXT
): $(lm32_run_OBJECTS
) $(lm32_run_DEPENDENCIES
) $(EXTRA_lm32_run_DEPENDENCIES
) lm32
/$(am__dirstamp
)
3544 @
rm -f lm32
/run
$(EXEEXT
)
3545 $(AM_V_CCLD
)$(LINK
) $(lm32_run_OBJECTS
) $(lm32_run_LDADD
) $(LIBS
)
3546 m32c
/$(DEPDIR
)/$(am__dirstamp
):
3547 @
$(MKDIR_P
) m32c
/$(DEPDIR
)
3548 @
: > m32c
/$(DEPDIR
)/$(am__dirstamp
)
3549 m32c
/opc2c.
$(OBJEXT
): m32c
/$(am__dirstamp
) \
3550 m32c
/$(DEPDIR
)/$(am__dirstamp
)
3552 @SIM_ENABLE_ARCH_m32c_FALSE@m32c
/opc2c
$(EXEEXT
): $(m32c_opc2c_OBJECTS
) $(m32c_opc2c_DEPENDENCIES
) $(EXTRA_m32c_opc2c_DEPENDENCIES
) m32c
/$(am__dirstamp
)
3553 @SIM_ENABLE_ARCH_m32c_FALSE@ @
rm -f m32c
/opc2c
$(EXEEXT
)
3554 @SIM_ENABLE_ARCH_m32c_FALSE@
$(AM_V_CCLD
)$(LINK
) $(m32c_opc2c_OBJECTS
) $(m32c_opc2c_LDADD
) $(LIBS
)
3556 m32c
/run
$(EXEEXT
): $(m32c_run_OBJECTS
) $(m32c_run_DEPENDENCIES
) $(EXTRA_m32c_run_DEPENDENCIES
) m32c
/$(am__dirstamp
)
3557 @
rm -f m32c
/run
$(EXEEXT
)
3558 $(AM_V_CCLD
)$(LINK
) $(m32c_run_OBJECTS
) $(m32c_run_LDADD
) $(LIBS
)
3560 m32r
/run
$(EXEEXT
): $(m32r_run_OBJECTS
) $(m32r_run_DEPENDENCIES
) $(EXTRA_m32r_run_DEPENDENCIES
) m32r
/$(am__dirstamp
)
3561 @
rm -f m32r
/run
$(EXEEXT
)
3562 $(AM_V_CCLD
)$(LINK
) $(m32r_run_OBJECTS
) $(m32r_run_LDADD
) $(LIBS
)
3563 m68hc11
/$(DEPDIR
)/$(am__dirstamp
):
3564 @
$(MKDIR_P
) m68hc11
/$(DEPDIR
)
3565 @
: > m68hc11
/$(DEPDIR
)/$(am__dirstamp
)
3566 m68hc11
/gencode.
$(OBJEXT
): m68hc11
/$(am__dirstamp
) \
3567 m68hc11
/$(DEPDIR
)/$(am__dirstamp
)
3569 @SIM_ENABLE_ARCH_m68hc11_FALSE@m68hc11
/gencode
$(EXEEXT
): $(m68hc11_gencode_OBJECTS
) $(m68hc11_gencode_DEPENDENCIES
) $(EXTRA_m68hc11_gencode_DEPENDENCIES
) m68hc11
/$(am__dirstamp
)
3570 @SIM_ENABLE_ARCH_m68hc11_FALSE@ @
rm -f m68hc11
/gencode
$(EXEEXT
)
3571 @SIM_ENABLE_ARCH_m68hc11_FALSE@
$(AM_V_CCLD
)$(LINK
) $(m68hc11_gencode_OBJECTS
) $(m68hc11_gencode_LDADD
) $(LIBS
)
3573 m68hc11
/run
$(EXEEXT
): $(m68hc11_run_OBJECTS
) $(m68hc11_run_DEPENDENCIES
) $(EXTRA_m68hc11_run_DEPENDENCIES
) m68hc11
/$(am__dirstamp
)
3574 @
rm -f m68hc11
/run
$(EXEEXT
)
3575 $(AM_V_CCLD
)$(LINK
) $(m68hc11_run_OBJECTS
) $(m68hc11_run_LDADD
) $(LIBS
)
3577 mcore
/run
$(EXEEXT
): $(mcore_run_OBJECTS
) $(mcore_run_DEPENDENCIES
) $(EXTRA_mcore_run_DEPENDENCIES
) mcore
/$(am__dirstamp
)
3578 @
rm -f mcore
/run
$(EXEEXT
)
3579 $(AM_V_CCLD
)$(LINK
) $(mcore_run_OBJECTS
) $(mcore_run_LDADD
) $(LIBS
)
3581 microblaze
/run
$(EXEEXT
): $(microblaze_run_OBJECTS
) $(microblaze_run_DEPENDENCIES
) $(EXTRA_microblaze_run_DEPENDENCIES
) microblaze
/$(am__dirstamp
)
3582 @
rm -f microblaze
/run
$(EXEEXT
)
3583 $(AM_V_CCLD
)$(LINK
) $(microblaze_run_OBJECTS
) $(microblaze_run_LDADD
) $(LIBS
)
3585 mips
/run
$(EXEEXT
): $(mips_run_OBJECTS
) $(mips_run_DEPENDENCIES
) $(EXTRA_mips_run_DEPENDENCIES
) mips
/$(am__dirstamp
)
3586 @
rm -f mips
/run
$(EXEEXT
)
3587 $(AM_V_CCLD
)$(LINK
) $(mips_run_OBJECTS
) $(mips_run_LDADD
) $(LIBS
)
3589 mn10300
/run
$(EXEEXT
): $(mn10300_run_OBJECTS
) $(mn10300_run_DEPENDENCIES
) $(EXTRA_mn10300_run_DEPENDENCIES
) mn10300
/$(am__dirstamp
)
3590 @
rm -f mn10300
/run
$(EXEEXT
)
3591 $(AM_V_CCLD
)$(LINK
) $(mn10300_run_OBJECTS
) $(mn10300_run_LDADD
) $(LIBS
)
3593 moxie
/run
$(EXEEXT
): $(moxie_run_OBJECTS
) $(moxie_run_DEPENDENCIES
) $(EXTRA_moxie_run_DEPENDENCIES
) moxie
/$(am__dirstamp
)
3594 @
rm -f moxie
/run
$(EXEEXT
)
3595 $(AM_V_CCLD
)$(LINK
) $(moxie_run_OBJECTS
) $(moxie_run_LDADD
) $(LIBS
)
3597 msp430
/run
$(EXEEXT
): $(msp430_run_OBJECTS
) $(msp430_run_DEPENDENCIES
) $(EXTRA_msp430_run_DEPENDENCIES
) msp430
/$(am__dirstamp
)
3598 @
rm -f msp430
/run
$(EXEEXT
)
3599 $(AM_V_CCLD
)$(LINK
) $(msp430_run_OBJECTS
) $(msp430_run_LDADD
) $(LIBS
)
3601 or1k
/run
$(EXEEXT
): $(or1k_run_OBJECTS
) $(or1k_run_DEPENDENCIES
) $(EXTRA_or1k_run_DEPENDENCIES
) or1k
/$(am__dirstamp
)
3602 @
rm -f or1k
/run
$(EXEEXT
)
3603 $(AM_V_CCLD
)$(LINK
) $(or1k_run_OBJECTS
) $(or1k_run_LDADD
) $(LIBS
)
3604 ppc
/$(am__dirstamp
):
3606 @
: > ppc
/$(am__dirstamp
)
3607 ppc
/$(DEPDIR
)/$(am__dirstamp
):
3608 @
$(MKDIR_P
) ppc
/$(DEPDIR
)
3609 @
: > ppc
/$(DEPDIR
)/$(am__dirstamp
)
3610 ppc
/psim.
$(OBJEXT
): ppc
/$(am__dirstamp
) ppc
/$(DEPDIR
)/$(am__dirstamp
)
3612 @SIM_ENABLE_ARCH_ppc_FALSE@ppc
/psim
$(EXEEXT
): $(ppc_psim_OBJECTS
) $(ppc_psim_DEPENDENCIES
) $(EXTRA_ppc_psim_DEPENDENCIES
) ppc
/$(am__dirstamp
)
3613 @SIM_ENABLE_ARCH_ppc_FALSE@ @
rm -f ppc
/psim
$(EXEEXT
)
3614 @SIM_ENABLE_ARCH_ppc_FALSE@
$(AM_V_CCLD
)$(LINK
) $(ppc_psim_OBJECTS
) $(ppc_psim_LDADD
) $(LIBS
)
3616 ppc
/run
$(EXEEXT
): $(ppc_run_OBJECTS
) $(ppc_run_DEPENDENCIES
) $(EXTRA_ppc_run_DEPENDENCIES
) ppc
/$(am__dirstamp
)
3617 @
rm -f ppc
/run
$(EXEEXT
)
3618 $(AM_V_CCLD
)$(LINK
) $(ppc_run_OBJECTS
) $(ppc_run_LDADD
) $(LIBS
)
3620 pru
/run
$(EXEEXT
): $(pru_run_OBJECTS
) $(pru_run_DEPENDENCIES
) $(EXTRA_pru_run_DEPENDENCIES
) pru
/$(am__dirstamp
)
3621 @
rm -f pru
/run
$(EXEEXT
)
3622 $(AM_V_CCLD
)$(LINK
) $(pru_run_OBJECTS
) $(pru_run_LDADD
) $(LIBS
)
3624 riscv
/run
$(EXEEXT
): $(riscv_run_OBJECTS
) $(riscv_run_DEPENDENCIES
) $(EXTRA_riscv_run_DEPENDENCIES
) riscv
/$(am__dirstamp
)
3625 @
rm -f riscv
/run
$(EXEEXT
)
3626 $(AM_V_CCLD
)$(LINK
) $(riscv_run_OBJECTS
) $(riscv_run_LDADD
) $(LIBS
)
3628 rl78
/run
$(EXEEXT
): $(rl78_run_OBJECTS
) $(rl78_run_DEPENDENCIES
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)/$(am__dirstamp
)
4381 -rm -f sh
/$(am__dirstamp
)
4382 -rm -f testsuite
/common
/$(DEPDIR
)/$(am__dirstamp
)
4383 -rm -f testsuite
/common
/$(am__dirstamp
)
4384 -rm -f v850
/$(am__dirstamp
)
4385 -test -z
"$(DISTCLEANFILES)" ||
rm -f
$(DISTCLEANFILES
)
4387 maintainer-clean-generic
:
4388 @echo
"This command is intended for maintainers to use"
4389 @echo
"it deletes files that may require special tools to rebuild."
4390 -test -z
"$(BUILT_SOURCES)" ||
rm -f
$(BUILT_SOURCES
)
4391 clean: clean-recursive
4393 clean-am
: clean-checkPROGRAMS clean-generic clean-libtool \
4394 clean-noinstLIBRARIES clean-noinstPROGRAMS mostlyclean-am
4396 distclean: distclean-recursive
4397 -rm -f
$(am__CONFIG_DISTCLEAN_FILES
)
4398 -rm -rf common
/$(DEPDIR
) cr16
/$(DEPDIR
) cris
/$(DEPDIR
) d10v
/$(DEPDIR
) erc32
/$(DEPDIR
) igen
/$(DEPDIR
) m32c
/$(DEPDIR
) m68hc11
/$(DEPDIR
) ppc
/$(DEPDIR
) sh
/$(DEPDIR
) testsuite
/common
/$(DEPDIR
)
4400 distclean-am
: clean-am distclean-DEJAGNU distclean-compile \
4401 distclean-generic distclean-hdr distclean-libtool \
4408 html
: html-recursive
4412 info: info-recursive
4416 install-data-am
: install-armdocDATA install-data-local install-dtbDATA \
4417 install-erc32docDATA install-frvdocDATA install-or1kdocDATA \
4418 install-pkgincludeHEADERS install-ppcdocDATA install-rxdocDATA
4420 install-dvi
: install-dvi-recursive
4424 install-exec-am
: install-exec-local
4426 install-html
: install-html-recursive
4430 install-info
: install-info-recursive
4436 install-pdf
: install-pdf-recursive
4440 install-ps
: install-ps-recursive
4446 maintainer-clean
: maintainer-clean-recursive
4447 -rm -f
$(am__CONFIG_DISTCLEAN_FILES
)
4448 -rm -rf
$(top_srcdir
)/autom4te.cache
4449 -rm -rf common
/$(DEPDIR
) cr16
/$(DEPDIR
) cris
/$(DEPDIR
) d10v
/$(DEPDIR
) erc32
/$(DEPDIR
) igen
/$(DEPDIR
) m32c
/$(DEPDIR
) m68hc11
/$(DEPDIR
) ppc
/$(DEPDIR
) sh
/$(DEPDIR
) testsuite
/common
/$(DEPDIR
)
4451 maintainer-clean-am
: distclean-am maintainer-clean-generic
4453 mostlyclean: mostlyclean-recursive
4455 mostlyclean-am
: mostlyclean-compile mostlyclean-generic \
4466 uninstall-am
: uninstall-armdocDATA uninstall-dtbDATA \
4467 uninstall-erc32docDATA uninstall-frvdocDATA uninstall-local \
4468 uninstall-or1kdocDATA uninstall-pkgincludeHEADERS \
4469 uninstall-ppcdocDATA uninstall-rxdocDATA
4471 .MAKE
: $(am__recursive_targets
) all check check-am
install install-am \
4474 .PHONY
: $(am__recursive_targets
) CTAGS GTAGS TAGS
all all-am \
4475 am--refresh
check check-DEJAGNU check-TESTS check-am
clean \
4476 clean-checkPROGRAMS clean-cscope clean-generic clean-libtool \
4477 clean-noinstLIBRARIES clean-noinstPROGRAMS cscope \
4478 cscopelist-am ctags ctags-am
distclean distclean-DEJAGNU \
4479 distclean-compile distclean-generic distclean-hdr \
4480 distclean-libtool distclean-tags
dvi dvi-am html html-am
info \
4481 info-am
install install-am install-armdocDATA install-data \
4482 install-data-am install-data-local install-dtbDATA install-dvi \
4483 install-dvi-am install-erc32docDATA install-exec \
4484 install-exec-am install-exec-local install-frvdocDATA \
4485 install-html install-html-am install-info install-info-am \
4486 install-man install-or1kdocDATA install-pdf install-pdf-am \
4487 install-pkgincludeHEADERS install-ppcdocDATA install-ps \
4488 install-ps-am install-rxdocDATA install-strip
installcheck \
4489 installcheck-am
installdirs installdirs-am maintainer-clean \
4490 maintainer-clean-generic
mostlyclean mostlyclean-compile \
4491 mostlyclean-generic mostlyclean-libtool pdf pdf-am ps ps-am \
4492 recheck
tags tags-am
uninstall uninstall-am \
4493 uninstall-armdocDATA uninstall-dtbDATA uninstall-erc32docDATA \
4494 uninstall-frvdocDATA uninstall-local uninstall-or1kdocDATA \
4495 uninstall-pkgincludeHEADERS uninstall-ppcdocDATA \
4500 @am__include@ @am__quote@
$(GNULIB_PARENT_DIR
)/gnulib
/Makefile.gnulib.inc@am__quote@
4502 # Generate target constants for newlib/libgloss from its source tree.
4503 # This file is shipped with distributions so we build in the source dir.
4504 # Use `make nltvals' to rebuild.
4507 $(srccom
)/gennltvals.py
--cpp "$(CPP)"
4509 common
/version.c
: common
/version.c-stamp
; @true
4510 common
/version.c-stamp
: $(srcroot
)/gdb
/version.in
$(srcroot
)/bfd
/version.h
$(srcdir)/common
/create-version.sh
4511 $(AM_V_GEN
)$(SHELL
) $(srcdir)/common
/create-version.sh
$(srcroot
)/gdb
$@.tmp
4512 $(AM_V_at
)$(SHELL
) $(srcroot
)/move-if-change
$@.tmp
$(@
:-stamp
=)
4515 .PRECIOUS
: %/test-hw-events.o
4516 %/test-hw-events.o
: common
/hw-events.c
4517 $(AM_V_CC
)$(COMPILE
) -DMAIN
-c
-o
$@
$<
4518 %/test-hw-events
: %/test-hw-events.o
%/libsim.a
4519 $(AM_V_CCLD
)$(LINK
) -o
$@
$^
$(SIM_COMMON_LIBS
) $(LIBS
)
4521 # FIXME This is one very simple-minded way of generating the file hw-config.h.
4522 %/hw-config.h
: %/stamp-hw
; @true
4523 %/stamp-hw
: Makefile
4524 $(AM_V_GEN
)set
-e
; \
4526 sim_hw
="$(SIM_HW_DEVICES) $($(@D)_SIM_EXTRA_HW_DEVICES)" ; \
4527 echo
"/* generated by Makefile */" ; \
4528 printf
"extern const struct hw_descriptor dv_%s_descriptor[];\n" $$sim_hw ; \
4529 echo
"const struct hw_descriptor * const hw_descriptors[] = {" ; \
4530 printf
" dv_%s_descriptor,\n" $$sim_hw ; \
4534 $(SHELL
) $(srcroot
)/move-if-change
$@.tmp
$(@D
)/hw-config.h
; \
4536 .PRECIOUS
: %/stamp-hw
4537 %/modules.c
: %/stamp-modules
; @true
4538 %/stamp-modules
: Makefile
4539 $(AM_V_GEN
)set
-e
; \
4540 LANG
=C
; export LANG
; \
4541 LC_ALL
=C
; export LC_ALL
; \
4542 sed
-n
-e
'/^sim_install_/{s/^\(sim_install_[a-z_0-9A-Z]*\).*/\1/;p}' $(GEN_MODULES_C_SRCS
) |
sort >$@.l-tmp
; \
4544 echo
'/* Do not modify this file. */'; \
4545 echo
'/* It is created automatically by the Makefile. */'; \
4546 echo
'#include "libiberty.h"'; \
4547 echo
'#include "sim-module.h"'; \
4548 sed
-e
's:\(.*\):extern MODULE_INIT_FN \1;:' $@.l-tmp
; \
4549 echo
'MODULE_INSTALL_FN * const sim_modules_detected[] = {'; \
4550 sed
-e
's:\(.*\): \1,:' $@.l-tmp
; \
4552 echo
'const int sim_modules_detected_len = ARRAY_SIZE (sim_modules_detected);'; \
4554 $(SHELL
) $(srcroot
)/move-if-change
$@.tmp
$(@D
)/modules.c
; \
4557 .PRECIOUS
: %/stamp-modules
4559 # Alias for developers.
4560 @SIM_ENABLE_IGEN_TRUE@igen
: $(IGEN
)
4562 # These rules are copied from automake, but tweaked to use FOR_BUILD variables.
4563 @SIM_ENABLE_IGEN_TRUE@igen
/libigen.a
: $(igen_libigen_a_OBJECTS
) $(igen_libigen_a_DEPENDENCIES
) $(EXTRA_igen_libigen_a_DEPENDENCIES
) igen
/$(am__dirstamp
)
4564 @SIM_ENABLE_IGEN_TRUE@
$(AM_V_at
)-rm -f
$@
4565 @SIM_ENABLE_IGEN_TRUE@
$(AM_V_AR
)$(AR_FOR_BUILD
) $(ARFLAGS
) $@
$(igen_libigen_a_OBJECTS
) $(igen_libigen_a_LIBADD
)
4566 @SIM_ENABLE_IGEN_TRUE@
$(AM_V_at
)$(RANLIB_FOR_BUILD
) $@
4568 @SIM_ENABLE_IGEN_TRUE@igen
/igen
$(EXEEXT
): $(igen_igen_OBJECTS
) $(igen_igen_DEPENDENCIES
) igen
/$(am__dirstamp
)
4569 @SIM_ENABLE_IGEN_TRUE@
$(AM_V_CCLD
)$(LINK_FOR_BUILD
) $(igen_igen_OBJECTS
) $(igen_igen_LDADD
)
4571 # igen is a build-time only tool. Override the default rules for it.
4572 @SIM_ENABLE_IGEN_TRUE@igen
/%.o
: igen
/%.c
4573 @SIM_ENABLE_IGEN_TRUE@
$(AM_V_CC
)$(COMPILE_FOR_BUILD
) -c
$< -o
$@
4575 # Build some of the files in standalone mode for developers of igen itself.
4576 @SIM_ENABLE_IGEN_TRUE@igen
/%-main.o
: igen
/%.c
4577 @SIM_ENABLE_IGEN_TRUE@
$(AM_V_CC
)$(COMPILE_FOR_BUILD
) -DMAIN
-c
$< -o
$@
4579 site-sim-config.exp
: Makefile
4581 echo
"set SIM_PRIMARY_TARGET \"$(SIM_PRIMARY_TARGET)\""; \
4582 echo
"set builddir \"$(builddir)\""; \
4583 echo
"set srcdir \"$(srcdir)/testsuite\""; \
4584 $(foreach V
,$(SIM_TOOLCHAIN_VARS
),echo
"set $(V) \"$($(V))\"";) \
4587 # Ignore dirs that only contain configuration settings.
4588 check/.
/config
/%.exp
: ; @true
4589 check/config
/%.exp
: ; @true
4590 check/.
/lib
/%.exp
: ; @true
4591 check/lib
/%.exp
: ; @true
4594 $(AM_V_at
)mkdir
-p testsuite
/$*
4595 $(AM_V_RUNTEST
)$(DO_RUNTEST
) --objdir testsuite
/$* --outdir testsuite
/$* $*.exp
4597 check-DEJAGNU-parallel
:
4599 set
-- `cd $(srcdir)/testsuite && find . -name '*.exp' -printf '%P\n' | sed 's:[.]exp$$::'`; \
4600 $(MAKE
) -k
`printf 'check/%s.exp ' $$@`; \
4602 set
-- `printf 'testsuite/%s/ ' $$@`; \
4603 $(SHELL
) $(srcroot
)/contrib
/dg-extract-results.sh \
4604 `find $$@ -maxdepth 1 -name testrun.sum 2>/dev/null | sort` > testrun.sum
; \
4605 $(SHELL
) $(srcroot
)/contrib
/dg-extract-results.sh
-L \
4606 `find $$@ -maxdepth 1 -name testrun.log 2>/dev/null | sort` > testrun.log
; \
4608 $(SED
) -n
'/^.*===.*Summary.*===/,$$p' testrun.sum
; \
4611 check-DEJAGNU-single
:
4612 $(AM_V_RUNTEST
)$(DO_RUNTEST
)
4614 # If running a single job, invoking runtest once is faster & has nicer output.
4615 check-DEJAGNU
: site.exp
4616 $(AM_V_at
)(set
-e
; \
4617 EXPECT
=${EXPECT} ; export EXPECT
; \
4618 runtest
=$(RUNTEST
); \
4619 if
$(SHELL
) -c
"$$runtest --version" > /dev
/null
2>&1; then \
4620 case
"$(MAKEFLAGS)" in \
4621 *-j
*) $(MAKE
) check-DEJAGNU-parallel
;; \
4622 *) $(MAKE
) check-DEJAGNU-single
;; \
4625 echo
"WARNING: could not find \`runtest'" 1>&2; :;\
4628 # These tests are build-time only tools. Override the default rules for them.
4629 testsuite
/common
/%.o
: testsuite
/common
/%.c
4630 $(AM_V_CC
)$(COMPILE_FOR_BUILD
) $(testsuite_common_CPPFLAGS
) -c
$< -o
$@
4632 testsuite
/common
/alu-tst
$(EXEEXT
): $(testsuite_common_alu_tst_OBJECTS
) $(testsuite_common_alu_tst_DEPENDENCIES
) testsuite
/common
/$(am__dirstamp
)
4633 $(AM_V_CCLD
)$(LINK_FOR_BUILD
) $(testsuite_common_alu_tst_OBJECTS
) $(testsuite_common_alu_tst_LDADD
)
4635 testsuite
/common
/fpu-tst
$(EXEEXT
): $(testsuite_common_fpu_tst_OBJECTS
) $(testsuite_common_fpu_tst_DEPENDENCIES
) testsuite
/common
/$(am__dirstamp
)
4636 $(AM_V_CCLD
)$(LINK_FOR_BUILD
) $(testsuite_common_fpu_tst_OBJECTS
) $(testsuite_common_fpu_tst_LDADD
)
4638 testsuite
/common
/bits-gen
$(EXEEXT
): $(testsuite_common_bits_gen_OBJECTS
) $(testsuite_common_bits_gen_DEPENDENCIES
) testsuite
/common
/$(am__dirstamp
)
4639 $(AM_V_CCLD
)$(LINK_FOR_BUILD
) $(testsuite_common_bits_gen_OBJECTS
) $(testsuite_common_bits_gen_LDADD
)
4641 testsuite
/common
/bits32m0
$(EXEEXT
): $(testsuite_common_bits32m0_OBJECTS
) $(testsuite_common_bits32m0_DEPENDENCIES
) testsuite
/common
/$(am__dirstamp
)
4642 $(AM_V_CCLD
)$(LINK_FOR_BUILD
) $(testsuite_common_bits32m0_OBJECTS
) $(testsuite_common_bits32m0_LDADD
)
4644 testsuite
/common
/bits32m0.c
: testsuite
/common
/bits-gen
$(EXEEXT
) testsuite
/common
/bits-tst.c
4645 $(AM_V_GEN
)$< 32 0 big
> $@.tmp
4646 $(AM_V_at
)cat
$(srcdir)/testsuite
/common
/bits-tst.c
>> $@.tmp
4647 $(AM_V_at
)mv
$@.tmp
$@
4649 testsuite
/common
/bits32m31
$(EXEEXT
): $(testsuite_common_bits32m31_OBJECTS
) $(testsuite_common_bits32m31_DEPENDENCIES
) testsuite
/common
/$(am__dirstamp
)
4650 $(AM_V_CCLD
)$(LINK_FOR_BUILD
) $(testsuite_common_bits32m31_OBJECTS
) $(testsuite_common_bits32m31_LDADD
)
4652 testsuite
/common
/bits32m31.c
: testsuite
/common
/bits-gen
$(EXEEXT
) testsuite
/common
/bits-tst.c
4653 $(AM_V_GEN
)$< 32 31 little
> $@.tmp
4654 $(AM_V_at
)cat
$(srcdir)/testsuite
/common
/bits-tst.c
>> $@.tmp
4655 $(AM_V_at
)mv
$@.tmp
$@
4657 testsuite
/common
/bits64m0
$(EXEEXT
): $(testsuite_common_bits64m0_OBJECTS
) $(testsuite_common_bits64m0_DEPENDENCIES
) testsuite
/common
/$(am__dirstamp
)
4658 $(AM_V_CCLD
)$(LINK_FOR_BUILD
) $(testsuite_common_bits64m0_OBJECTS
) $(testsuite_common_bits64m0_LDADD
)
4660 testsuite
/common
/bits64m0.c
: testsuite
/common
/bits-gen
$(EXEEXT
) testsuite
/common
/bits-tst.c
4661 $(AM_V_GEN
)$< 64 0 big
> $@.tmp
4662 $(AM_V_at
)cat
$(srcdir)/testsuite
/common
/bits-tst.c
>> $@.tmp
4663 $(AM_V_at
)mv
$@.tmp
$@
4665 testsuite
/common
/bits64m63
$(EXEEXT
): $(testsuite_common_bits64m63_OBJECTS
) $(testsuite_common_bits64m63_DEPENDENCIES
) testsuite
/common
/$(am__dirstamp
)
4666 $(AM_V_CCLD
)$(LINK_FOR_BUILD
) $(testsuite_common_bits64m63_OBJECTS
) $(testsuite_common_bits64m63_LDADD
)
4668 testsuite
/common
/bits64m63.c
: testsuite
/common
/bits-gen
$(EXEEXT
) testsuite
/common
/bits-tst.c
4669 $(AM_V_GEN
)$< 64 63 little
> $@.tmp
4670 $(AM_V_at
)cat
$(srcdir)/testsuite
/common
/bits-tst.c
>> $@.tmp
4671 $(AM_V_at
)mv
$@.tmp
$@
4672 @SIM_ENABLE_ARCH_aarch64_TRUE@
$(aarch64_libsim_a_OBJECTS
) $(aarch64_libsim_a_LIBADD
): aarch64
/hw-config.h
4674 @SIM_ENABLE_ARCH_aarch64_TRUE@aarch64
/%.o
: common
/%.c
; $(SIM_COMPILE
)
4675 @SIM_ENABLE_ARCH_aarch64_TRUE@
-@am__include@ aarch64
/$(DEPDIR
)/*.Po
4676 @SIM_ENABLE_ARCH_arm_TRUE@
$(arm_libsim_a_OBJECTS
) $(arm_libsim_a_LIBADD
): arm
/hw-config.h
4678 @SIM_ENABLE_ARCH_arm_TRUE@arm
/%.o
: common
/%.c
; $(SIM_COMPILE
)
4679 @SIM_ENABLE_ARCH_arm_TRUE@
-@am__include@ arm
/$(DEPDIR
)/*.Po
4680 @SIM_ENABLE_ARCH_avr_TRUE@
$(avr_libsim_a_OBJECTS
) $(avr_libsim_a_LIBADD
): avr
/hw-config.h
4682 @SIM_ENABLE_ARCH_avr_TRUE@avr
/%.o
: common
/%.c
; $(SIM_COMPILE
)
4683 @SIM_ENABLE_ARCH_avr_TRUE@
-@am__include@ avr
/$(DEPDIR
)/*.Po
4684 @SIM_ENABLE_ARCH_bfin_TRUE@
$(bfin_libsim_a_OBJECTS
) $(bfin_libsim_a_LIBADD
): bfin
/hw-config.h
4686 @SIM_ENABLE_ARCH_bfin_TRUE@bfin
/%.o
: common
/%.c
; $(SIM_COMPILE
)
4687 @SIM_ENABLE_ARCH_bfin_TRUE@
-@am__include@ bfin
/$(DEPDIR
)/*.Po
4689 @SIM_ENABLE_ARCH_bfin_TRUE@bfin
/linux-fixed-code.h
: @MAINT@
$(srcdir)/bfin
/linux-fixed-code.s bfin
/local.mk bfin
/$(am__dirstamp
)
4690 @SIM_ENABLE_ARCH_bfin_TRUE@
$(AM_V_GEN
)$(AS_FOR_TARGET_BFIN
) $(srcdir)/bfin
/linux-fixed-code.s
-o bfin
/linux-fixed-code.o
4691 @SIM_ENABLE_ARCH_bfin_TRUE@
$(AM_V_at
)(\
4692 @SIM_ENABLE_ARCH_bfin_TRUE@ set
-e
; \
4693 @SIM_ENABLE_ARCH_bfin_TRUE@ echo
"/* DO NOT EDIT: Autogenerated from linux-fixed-code.s. */"; \
4694 @SIM_ENABLE_ARCH_bfin_TRUE@ echo
"static const unsigned char bfin_linux_fixed_code[] ="; \
4695 @SIM_ENABLE_ARCH_bfin_TRUE@ echo
"{"; \
4696 @SIM_ENABLE_ARCH_bfin_TRUE@
$(OBJDUMP_FOR_TARGET_BFIN
) -d
-z bfin
/linux-fixed-code.o
> $@.dis
; \
4697 @SIM_ENABLE_ARCH_bfin_TRUE@ sed
-n \
4698 @SIM_ENABLE_ARCH_bfin_TRUE@
-e
's:^[^ ]* :0x:' \
4699 @SIM_ENABLE_ARCH_bfin_TRUE@
-e
'/^0x/{s: .*::;s: *$$:,:;s: :, 0x:g;p;}' \
4700 @SIM_ENABLE_ARCH_bfin_TRUE@
$@.dis
; \
4701 @SIM_ENABLE_ARCH_bfin_TRUE@
rm -f
$@.dis
; \
4702 @SIM_ENABLE_ARCH_bfin_TRUE@ echo
"};" \
4703 @SIM_ENABLE_ARCH_bfin_TRUE@
) > $@.tmp
4704 @SIM_ENABLE_ARCH_bfin_TRUE@
$(AM_V_at
)$(SHELL
) $(srcroot
)/move-if-change
$@.tmp
$(srcdir)/bfin
/linux-fixed-code.h
4705 @SIM_ENABLE_ARCH_bfin_TRUE@
$(AM_V_at
)touch
$(srcdir)/bfin
/linux-fixed-code.h
4706 @SIM_ENABLE_ARCH_bpf_TRUE@
$(bpf_libsim_a_OBJECTS
) $(bpf_libsim_a_LIBADD
): bpf
/hw-config.h
4708 @SIM_ENABLE_ARCH_bpf_TRUE@bpf
/%.o
: common
/%.c
; $(SIM_COMPILE
)
4709 @SIM_ENABLE_ARCH_bpf_TRUE@
-@am__include@ bpf
/$(DEPDIR
)/*.Po
4710 @SIM_ENABLE_ARCH_bpf_TRUE@bpf
/modules.c
: |
$(bpf_BUILD_OUTPUTS
)
4712 @SIM_ENABLE_ARCH_bpf_TRUE@bpf
/mloop-le.c bpf
/eng-le.h
: bpf
/stamp-mloop-le
; @true
4713 @SIM_ENABLE_ARCH_bpf_TRUE@bpf
/stamp-mloop-le
: $(srccom
)/genmloop.sh bpf
/mloop.in
4714 @SIM_ENABLE_ARCH_bpf_TRUE@
$(AM_V_GEN
)$(SHELL
) $(srccom
)/genmloop.sh
-shell $(SHELL
) \
4715 @SIM_ENABLE_ARCH_bpf_TRUE@
-mono
-scache
-prefix bpfbf_ebpfle
-cpu bpfbf \
4716 @SIM_ENABLE_ARCH_bpf_TRUE@
-infile
$(srcdir)/bpf
/mloop.in \
4717 @SIM_ENABLE_ARCH_bpf_TRUE@
-outfile-prefix bpf
/ -outfile-suffix
-le
4718 @SIM_ENABLE_ARCH_bpf_TRUE@
$(AM_V_at
)$(SHELL
) $(srcroot
)/move-if-change bpf
/eng-le.hin bpf
/eng-le.h
4719 @SIM_ENABLE_ARCH_bpf_TRUE@
$(AM_V_at
)$(SHELL
) $(srcroot
)/move-if-change bpf
/mloop-le.cin bpf
/mloop-le.c
4720 @SIM_ENABLE_ARCH_bpf_TRUE@
$(AM_V_at
)touch
$@
4722 @SIM_ENABLE_ARCH_bpf_TRUE@bpf
/mloop-be.c bpf
/eng-be.h
: bpf
/stamp-mloop-be
; @true
4723 @SIM_ENABLE_ARCH_bpf_TRUE@bpf
/stamp-mloop-be
: $(srccom
)/genmloop.sh bpf
/mloop.in
4724 @SIM_ENABLE_ARCH_bpf_TRUE@
$(AM_V_GEN
)$(SHELL
) $(srccom
)/genmloop.sh
-shell $(SHELL
) \
4725 @SIM_ENABLE_ARCH_bpf_TRUE@
-mono
-scache
-prefix bpfbf_ebpfbe
-cpu bpfbf \
4726 @SIM_ENABLE_ARCH_bpf_TRUE@
-infile
$(srcdir)/bpf
/mloop.in \
4727 @SIM_ENABLE_ARCH_bpf_TRUE@
-outfile-prefix bpf
/ -outfile-suffix
-be
4728 @SIM_ENABLE_ARCH_bpf_TRUE@
$(AM_V_at
)$(SHELL
) $(srcroot
)/move-if-change bpf
/eng-be.hin bpf
/eng-be.h
4729 @SIM_ENABLE_ARCH_bpf_TRUE@
$(AM_V_at
)$(SHELL
) $(srcroot
)/move-if-change bpf
/mloop-be.cin bpf
/mloop-be.c
4730 @SIM_ENABLE_ARCH_bpf_TRUE@
$(AM_V_at
)touch
$@
4732 @SIM_ENABLE_ARCH_bpf_TRUE@bpf
/cgen
: bpf
/cgen-arch bpf
/cgen-cpu bpf
/cgen-defs-le bpf
/cgen-defs-be bpf
/cgen-decode-le bpf
/cgen-decode-be
4734 @SIM_ENABLE_ARCH_bpf_TRUE@bpf
/cgen-arch
:
4735 @SIM_ENABLE_ARCH_bpf_TRUE@
$(AM_V_GEN
)mach
=bpf cpu
=bpfbf FLAGS
="with-scache"; $(CGEN_GEN_ARCH
)
4736 @SIM_ENABLE_ARCH_bpf_TRUE@bpf
/arch.h bpf
/arch.c bpf
/cpuall.h
: @CGEN_MAINT@ bpf
/cgen-arch
4738 @SIM_ENABLE_ARCH_bpf_TRUE@bpf
/cgen-cpu
:
4739 @SIM_ENABLE_ARCH_bpf_TRUE@
$(AM_V_GEN
)isa
=ebpfle
,ebpfbe cpu
=bpfbf mach
=bpf FLAGS
="with-multiple-isa with-scache"; $(CGEN_GEN_CPU
)
4740 @SIM_ENABLE_ARCH_bpf_TRUE@
$(AM_V_at
)rm -f
$(srcdir)/bpf
/model.c
4741 @SIM_ENABLE_ARCH_bpf_TRUE@bpf
/cpu.h bpf
/cpu.c bpf
/model.c
: @CGEN_MAINT@ bpf
/cgen-cpu
4743 @SIM_ENABLE_ARCH_bpf_TRUE@bpf
/cgen-defs-le
:
4744 @SIM_ENABLE_ARCH_bpf_TRUE@
$(AM_V_GEN
)isa
=ebpfle cpu
=bpfbf mach
=bpf FLAGS
="with-scache" SUFFIX
="-le"; $(CGEN_GEN_DEFS
)
4745 @SIM_ENABLE_ARCH_bpf_TRUE@bpf
/defs-le.h
: @CGEN_MAINT@ bpf
/cgen-defs-le
4747 @SIM_ENABLE_ARCH_bpf_TRUE@bpf
/cgen-defs-be
:
4748 @SIM_ENABLE_ARCH_bpf_TRUE@
$(AM_V_GEN
)isa
=ebpfbe cpu
=bpfbf mach
=bpf FLAGS
="with-scache" SUFFIX
="-be"; $(CGEN_GEN_DEFS
)
4749 @SIM_ENABLE_ARCH_bpf_TRUE@bpf
/defs-be.h
: @CGEN_MAINT@ bpf
/cgen-defs-be
4751 @SIM_ENABLE_ARCH_bpf_TRUE@bpf
/cgen-decode-le
:
4752 @SIM_ENABLE_ARCH_bpf_TRUE@
$(AM_V_GEN
)isa
=ebpfle cpu
=bpfbf mach
=bpf FLAGS
="with-scache" SUFFIX
="-le" EXTRAFILES
="$(CGEN_CPU_SEM)"; $(CGEN_GEN_DECODE
)
4753 @SIM_ENABLE_ARCH_bpf_TRUE@bpf
/sem-le.c bpf
/decode-le.c bpf
/decode-le.h
: @CGEN_MAINT@ bpf
/cgen-decode-vle
4755 @SIM_ENABLE_ARCH_bpf_TRUE@bpf
/cgen-decode-be
:
4756 @SIM_ENABLE_ARCH_bpf_TRUE@
$(AM_V_GEN
)isa
=ebpfbe cpu
=bpfbf mach
=bpf FLAGS
="with-scache" SUFFIX
="-be" EXTRAFILES
="$(CGEN_CPU_SEM)"; $(CGEN_GEN_DECODE
)
4757 @SIM_ENABLE_ARCH_bpf_TRUE@bpf
/sem-be.c bpf
/decode-be.c bpf
/decode-be.h
: @CGEN_MAINT@ bpf
/cgen-decode-be
4758 @SIM_ENABLE_ARCH_cr16_TRUE@
$(cr16_libsim_a_OBJECTS
) $(cr16_libsim_a_LIBADD
): cr16
/hw-config.h
4760 @SIM_ENABLE_ARCH_cr16_TRUE@cr16
/%.o
: common
/%.c
; $(SIM_COMPILE
)
4761 @SIM_ENABLE_ARCH_cr16_TRUE@
-@am__include@ cr16
/$(DEPDIR
)/*.Po
4762 @SIM_ENABLE_ARCH_cr16_TRUE@cr16
/modules.c
: |
$(cr16_BUILD_OUTPUTS
)
4764 # These rules are copied from automake, but tweaked to use FOR_BUILD variables.
4765 @SIM_ENABLE_ARCH_cr16_TRUE@cr16
/gencode
$(EXEEXT
): $(cr16_gencode_OBJECTS
) $(cr16_gencode_DEPENDENCIES
) cr16
/$(am__dirstamp
)
4766 @SIM_ENABLE_ARCH_cr16_TRUE@
$(AM_V_CCLD
)$(LINK_FOR_BUILD
) $(cr16_gencode_OBJECTS
) $(cr16_gencode_LDADD
)
4768 # gencode is a build-time only tool. Override the default rules for it.
4769 @SIM_ENABLE_ARCH_cr16_TRUE@cr16
/gencode.o
: cr16
/gencode.c
4770 @SIM_ENABLE_ARCH_cr16_TRUE@
$(AM_V_CC
)$(COMPILE_FOR_BUILD
) -c
$< -o
$@
4771 @SIM_ENABLE_ARCH_cr16_TRUE@cr16
/cr16-opc.o
: ..
/opcodes
/cr16-opc.c
4772 @SIM_ENABLE_ARCH_cr16_TRUE@
$(AM_V_CC
)$(COMPILE_FOR_BUILD
) -c
$< -o
$@
4774 @SIM_ENABLE_ARCH_cr16_TRUE@cr16
/simops.h
: cr16
/gencode
$(EXEEXT
)
4775 @SIM_ENABLE_ARCH_cr16_TRUE@
$(AM_V_GEN
)$< -h
>$@
4777 @SIM_ENABLE_ARCH_cr16_TRUE@cr16
/table.c
: cr16
/gencode
$(EXEEXT
)
4778 @SIM_ENABLE_ARCH_cr16_TRUE@
$(AM_V_GEN
)$< >$@
4779 @SIM_ENABLE_ARCH_cris_TRUE@
$(cris_libsim_a_OBJECTS
) $(cris_libsim_a_LIBADD
): cris
/hw-config.h
4781 @SIM_ENABLE_ARCH_cris_TRUE@cris
/%.o
: common
/%.c
; $(SIM_COMPILE
)
4782 @SIM_ENABLE_ARCH_cris_TRUE@
-@am__include@ cris
/$(DEPDIR
)/*.Po
4783 @SIM_ENABLE_ARCH_cris_TRUE@cris
/modules.c
: |
$(cris_BUILD_OUTPUTS
)
4785 @SIM_ENABLE_ARCH_cris_TRUE@cris
/mloopv10f.c cris
/engv10.h
: cris
/stamp-mloop-v10f
; @true
4786 @SIM_ENABLE_ARCH_cris_TRUE@cris
/stamp-mloop-v10f
: $(srccom
)/genmloop.sh cris
/mloop.in
4787 @SIM_ENABLE_ARCH_cris_TRUE@
$(AM_V_GEN
)$(SHELL
) $(srccom
)/genmloop.sh
-shell $(SHELL
) \
4788 @SIM_ENABLE_ARCH_cris_TRUE@
-mono
-no-fast
-pbb
-switch semcrisv10f-switch.c \
4789 @SIM_ENABLE_ARCH_cris_TRUE@
-cpu crisv10f \
4790 @SIM_ENABLE_ARCH_cris_TRUE@
-infile
$(srcdir)/cris
/mloop.in
-outfile-prefix cris
/ -outfile-suffix
-v10f
4791 @SIM_ENABLE_ARCH_cris_TRUE@
$(AM_V_at
)$(SHELL
) $(srcroot
)/move-if-change cris
/eng-v10f.hin cris
/engv10.h
4792 @SIM_ENABLE_ARCH_cris_TRUE@
$(AM_V_at
)$(SHELL
) $(srcroot
)/move-if-change cris
/mloop-v10f.cin cris
/mloopv10f.c
4793 @SIM_ENABLE_ARCH_cris_TRUE@
$(AM_V_at
)touch
$@
4795 @SIM_ENABLE_ARCH_cris_TRUE@cris
/mloopv32f.c cris
/engv32.h
: cris
/stamp-mloop-v32f
; @true
4796 @SIM_ENABLE_ARCH_cris_TRUE@cris
/stamp-mloop-v32f
: $(srccom
)/genmloop.sh cris
/mloop.in
4797 @SIM_ENABLE_ARCH_cris_TRUE@
$(AM_V_GEN
)$(SHELL
) $(srccom
)/genmloop.sh
-shell $(SHELL
) \
4798 @SIM_ENABLE_ARCH_cris_TRUE@
-mono
-no-fast
-pbb
-switch semcrisv32f-switch.c \
4799 @SIM_ENABLE_ARCH_cris_TRUE@
-cpu crisv32f \
4800 @SIM_ENABLE_ARCH_cris_TRUE@
-infile
$(srcdir)/cris
/mloop.in
-outfile-prefix cris
/ -outfile-suffix
-v32f
4801 @SIM_ENABLE_ARCH_cris_TRUE@
$(AM_V_at
)$(SHELL
) $(srcroot
)/move-if-change cris
/eng-v32f.hin cris
/engv32.h
4802 @SIM_ENABLE_ARCH_cris_TRUE@
$(AM_V_at
)$(SHELL
) $(srcroot
)/move-if-change cris
/mloop-v32f.cin cris
/mloopv32f.c
4803 @SIM_ENABLE_ARCH_cris_TRUE@
$(AM_V_at
)touch
$@
4805 @SIM_ENABLE_ARCH_cris_TRUE@cris
/cgen
: cris
/cgen-arch cris
/cgen-cpu-decode-v10f cris
/cgen-cpu-decode-v32f
4807 @SIM_ENABLE_ARCH_cris_TRUE@cris
/cgen-arch
:
4808 @SIM_ENABLE_ARCH_cris_TRUE@
$(AM_V_GEN
)mach
=crisv10
,crisv32 FLAGS
="with-scache with-profile=fn"; $(CGEN_GEN_ARCH
)
4809 @SIM_ENABLE_ARCH_cris_TRUE@cris
/arch.h cris
/arch.c cris
/cpuall.h
: @CGEN_MAINT@ cris
/cgen-arch
4811 @SIM_ENABLE_ARCH_cris_TRUE@cris
/cgen-cpu-decode-v10f
:
4812 @SIM_ENABLE_ARCH_cris_TRUE@
$(AM_V_GEN
)cpu
=crisv10f mach
=crisv10 SUFFIX
=v10 FLAGS
="with-scache with-profile=fn" EXTRAFILES
="$(CGEN_CPU_SEMSW)"; $(CGEN_GEN_CPU_DECODE
)
4813 @SIM_ENABLE_ARCH_cris_TRUE@
$(AM_V_at
)$(SHELL
) $(srcroot
)/move-if-change
$(srcdir)/cris
/semv10-switch.c
$(srcdir)/cris
/semcrisv10f-switch.c
4814 @SIM_ENABLE_ARCH_cris_TRUE@cris
/cpuv10.h cris
/cpuv10.c cris
/semcrisv10f-switch.c cris
/modelv10.c cris
/decodev10.c cris
/decodev10.h
: @CGEN_MAINT@ cris
/cgen-cpu-decode-v10f
4816 @SIM_ENABLE_ARCH_cris_TRUE@cris
/cgen-cpu-decode-v32f
:
4817 @SIM_ENABLE_ARCH_cris_TRUE@
$(AM_V_GEN
)cpu
=crisv32f mach
=crisv32 SUFFIX
=v32 FLAGS
="with-scache with-profile=fn" EXTRAFILES
="$(CGEN_CPU_SEMSW)"; $(CGEN_GEN_CPU_DECODE
)
4818 @SIM_ENABLE_ARCH_cris_TRUE@
$(AM_V_at
)$(SHELL
) $(srcroot
)/move-if-change
$(srcdir)/cris
/semv32-switch.c
$(srcdir)/cris
/semcrisv32f-switch.c
4819 @SIM_ENABLE_ARCH_cris_TRUE@cris
/cpuv32.h cris
/cpuv32.c cris
/semcrisv32f-switch.c cris
/modelv32.c cris
/decodev32.c cris
/decodev32.h
: @CGEN_MAINT@ cris
/cgen-cpu-decode-v32f
4820 @SIM_ENABLE_ARCH_d10v_TRUE@
$(d10v_libsim_a_OBJECTS
) $(d10v_libsim_a_LIBADD
): d10v
/hw-config.h
4822 @SIM_ENABLE_ARCH_d10v_TRUE@d10v
/%.o
: common
/%.c
; $(SIM_COMPILE
)
4823 @SIM_ENABLE_ARCH_d10v_TRUE@
-@am__include@ d10v
/$(DEPDIR
)/*.Po
4824 @SIM_ENABLE_ARCH_d10v_TRUE@d10v
/modules.c
: |
$(d10v_BUILD_OUTPUTS
)
4826 # These rules are copied from automake, but tweaked to use FOR_BUILD variables.
4827 @SIM_ENABLE_ARCH_d10v_TRUE@d10v
/gencode
$(EXEEXT
): $(d10v_gencode_OBJECTS
) $(d10v_gencode_DEPENDENCIES
) d10v
/$(am__dirstamp
)
4828 @SIM_ENABLE_ARCH_d10v_TRUE@
$(AM_V_CCLD
)$(LINK_FOR_BUILD
) $(d10v_gencode_OBJECTS
) $(d10v_gencode_LDADD
)
4830 # gencode is a build-time only tool. Override the default rules for it.
4831 @SIM_ENABLE_ARCH_d10v_TRUE@d10v
/gencode.o
: d10v
/gencode.c
4832 @SIM_ENABLE_ARCH_d10v_TRUE@
$(AM_V_CC
)$(COMPILE_FOR_BUILD
) -c
$< -o
$@
4833 @SIM_ENABLE_ARCH_d10v_TRUE@d10v
/d10v-opc.o
: ..
/opcodes
/d10v-opc.c
4834 @SIM_ENABLE_ARCH_d10v_TRUE@
$(AM_V_CC
)$(COMPILE_FOR_BUILD
) -c
$< -o
$@
4836 @SIM_ENABLE_ARCH_d10v_TRUE@d10v
/simops.h
: d10v
/gencode
$(EXEEXT
)
4837 @SIM_ENABLE_ARCH_d10v_TRUE@
$(AM_V_GEN
)$< -h
>$@
4839 @SIM_ENABLE_ARCH_d10v_TRUE@d10v
/table.c
: d10v
/gencode
$(EXEEXT
)
4840 @SIM_ENABLE_ARCH_d10v_TRUE@
$(AM_V_GEN
)$< >$@
4841 @SIM_ENABLE_ARCH_erc32_TRUE@
$(erc32_libsim_a_OBJECTS
) $(erc32_libsim_a_LIBADD
): erc32
/hw-config.h
4843 @SIM_ENABLE_ARCH_erc32_TRUE@erc32
/%.o
: common
/%.c
; $(SIM_COMPILE
)
4844 @SIM_ENABLE_ARCH_erc32_TRUE@
-@am__include@ erc32
/$(DEPDIR
)/*.Po
4846 @SIM_ENABLE_ARCH_erc32_TRUE@erc32
/sis
$(EXEEXT
): erc32
/run
$(EXEEXT
)
4847 @SIM_ENABLE_ARCH_erc32_TRUE@
$(AM_V_GEN
)ln
$< $@
2>/dev
/null ||
$(LN_S
) $< $@
2>/dev
/null || cp
-p
$< $@
4848 @SIM_ENABLE_ARCH_erc32_TRUE@sim-
%D-install-exec-local
: installdirs
4849 @SIM_ENABLE_ARCH_erc32_TRUE@
$(AM_V_at
)$(MKDIR_P
) $(DESTDIR
)$(bindir)
4850 @SIM_ENABLE_ARCH_erc32_TRUE@ n
=`echo sis | sed '$(program_transform_name)'`; \
4851 @SIM_ENABLE_ARCH_erc32_TRUE@
$(LIBTOOL
) --mode
=install $(INSTALL_PROGRAM
) erc32
/run
$(EXEEXT
) $(DESTDIR
)$(bindir)/$$n$(EXEEXT
)
4852 @SIM_ENABLE_ARCH_erc32_TRUE@sim-erc32-uninstall-local
:
4853 @SIM_ENABLE_ARCH_erc32_TRUE@
rm -f
$(DESTDIR
)$(bindir)/sis
4854 @SIM_ENABLE_ARCH_examples_TRUE@
$(example_synacor_libsim_a_OBJECTS
) $(example_synacor_libsim_a_LIBADD
): example-synacor
/hw-config.h
4856 @SIM_ENABLE_ARCH_examples_TRUE@example-synacor
/%.o
: common
/%.c
; $(SIM_COMPILE
)
4857 @SIM_ENABLE_ARCH_examples_TRUE@
-@am__include@ example-synacor
/$(DEPDIR
)/*.Po
4858 @SIM_ENABLE_ARCH_frv_TRUE@
$(frv_libsim_a_OBJECTS
) $(frv_libsim_a_LIBADD
): frv
/hw-config.h
4860 @SIM_ENABLE_ARCH_frv_TRUE@frv
/%.o
: common
/%.c
; $(SIM_COMPILE
)
4861 @SIM_ENABLE_ARCH_frv_TRUE@
-@am__include@ frv
/$(DEPDIR
)/*.Po
4862 @SIM_ENABLE_ARCH_frv_TRUE@frv
/modules.c
: |
$(frv_BUILD_OUTPUTS
)
4864 @SIM_ENABLE_ARCH_frv_TRUE@frv
/mloop.c frv
/eng.h
: frv
/stamp-mloop
; @true
4865 @SIM_ENABLE_ARCH_frv_TRUE@frv
/stamp-mloop
: $(srccom
)/genmloop.sh frv
/mloop.in
4866 @SIM_ENABLE_ARCH_frv_TRUE@
$(AM_V_GEN
)$(SHELL
) $(srccom
)/genmloop.sh
-shell $(SHELL
) \
4867 @SIM_ENABLE_ARCH_frv_TRUE@
-mono
-scache
-parallel-generic-write
-parallel-only \
4868 @SIM_ENABLE_ARCH_frv_TRUE@
-cpu frvbf \
4869 @SIM_ENABLE_ARCH_frv_TRUE@
-infile
$(srcdir)/frv
/mloop.in
-outfile-prefix frv
/
4870 @SIM_ENABLE_ARCH_frv_TRUE@
$(AM_V_at
)$(SHELL
) $(srcroot
)/move-if-change frv
/eng.hin frv
/eng.h
4871 @SIM_ENABLE_ARCH_frv_TRUE@
$(AM_V_at
)$(SHELL
) $(srcroot
)/move-if-change frv
/mloop.cin frv
/mloop.c
4872 @SIM_ENABLE_ARCH_frv_TRUE@
$(AM_V_at
)touch
$@
4874 @SIM_ENABLE_ARCH_frv_TRUE@frv
/cgen
: frv
/cgen-arch frv
/cgen-cpu-decode
4876 @SIM_ENABLE_ARCH_frv_TRUE@frv
/cgen-arch
:
4877 @SIM_ENABLE_ARCH_frv_TRUE@
$(AM_V_GEN
)mach
=all FLAGS
="with-scache"; $(CGEN_GEN_ARCH
)
4878 @SIM_ENABLE_ARCH_frv_TRUE@frv
/arch.h frv
/arch.c frv
/cpuall.h
: @CGEN_MAINT@ frv
/cgen-arch
4880 @SIM_ENABLE_ARCH_frv_TRUE@frv
/cgen-cpu-decode
:
4881 @SIM_ENABLE_ARCH_frv_TRUE@
$(AM_V_GEN
)cpu
=frvbf mach
=frv
,fr550
,fr500
,fr450
,fr400
,tomcat
,simple FLAGS
="with-scache with-profile=fn with-generic-write with-parallel-only" EXTRAFILES
="$(CGEN_CPU_SEM)"; $(CGEN_GEN_CPU_DECODE
)
4882 @SIM_ENABLE_ARCH_frv_TRUE@frv
/cpu.h frv
/sem.c frv
/model.c frv
/decode.c frv
/decode.h
: @CGEN_MAINT@ frv
/cgen-cpu-decode
4883 @SIM_ENABLE_ARCH_ft32_TRUE@
$(ft32_libsim_a_OBJECTS
) $(ft32_libsim_a_LIBADD
): ft32
/hw-config.h
4885 @SIM_ENABLE_ARCH_ft32_TRUE@ft32
/%.o
: common
/%.c
; $(SIM_COMPILE
)
4886 @SIM_ENABLE_ARCH_ft32_TRUE@
-@am__include@ ft32
/$(DEPDIR
)/*.Po
4887 @SIM_ENABLE_ARCH_h8300_TRUE@
$(h8300_libsim_a_OBJECTS
) $(h8300_libsim_a_LIBADD
): h8300
/hw-config.h
4889 @SIM_ENABLE_ARCH_h8300_TRUE@h8300
/%.o
: common
/%.c
; $(SIM_COMPILE
)
4890 @SIM_ENABLE_ARCH_h8300_TRUE@
-@am__include@ h8300
/$(DEPDIR
)/*.Po
4891 @SIM_ENABLE_ARCH_iq2000_TRUE@
$(iq2000_libsim_a_OBJECTS
) $(iq2000_libsim_a_LIBADD
): iq2000
/hw-config.h
4893 @SIM_ENABLE_ARCH_iq2000_TRUE@iq2000
/%.o
: common
/%.c
; $(SIM_COMPILE
)
4894 @SIM_ENABLE_ARCH_iq2000_TRUE@
-@am__include@ iq2000
/$(DEPDIR
)/*.Po
4895 @SIM_ENABLE_ARCH_iq2000_TRUE@iq2000
/modules.c
: |
$(iq2000_BUILD_OUTPUTS
)
4897 @SIM_ENABLE_ARCH_iq2000_TRUE@iq2000
/mloop.c iq2000
/eng.h
: iq2000
/stamp-mloop
; @true
4898 @SIM_ENABLE_ARCH_iq2000_TRUE@iq2000
/stamp-mloop
: $(srccom
)/genmloop.sh iq2000
/mloop.in
4899 @SIM_ENABLE_ARCH_iq2000_TRUE@
$(AM_V_GEN
)$(SHELL
) $(srccom
)/genmloop.sh
-shell $(SHELL
) \
4900 @SIM_ENABLE_ARCH_iq2000_TRUE@
-mono
-fast
-pbb
-switch sem-switch.c \
4901 @SIM_ENABLE_ARCH_iq2000_TRUE@
-cpu iq2000bf \
4902 @SIM_ENABLE_ARCH_iq2000_TRUE@
-infile
$(srcdir)/iq2000
/mloop.in
-outfile-prefix iq2000
/
4903 @SIM_ENABLE_ARCH_iq2000_TRUE@
$(AM_V_at
)$(SHELL
) $(srcroot
)/move-if-change iq2000
/eng.hin iq2000
/eng.h
4904 @SIM_ENABLE_ARCH_iq2000_TRUE@
$(AM_V_at
)$(SHELL
) $(srcroot
)/move-if-change iq2000
/mloop.cin iq2000
/mloop.c
4905 @SIM_ENABLE_ARCH_iq2000_TRUE@
$(AM_V_at
)touch
$@
4907 @SIM_ENABLE_ARCH_iq2000_TRUE@iq2000
/cgen
: iq2000
/cgen-arch iq2000
/cgen-cpu-decode
4909 @SIM_ENABLE_ARCH_iq2000_TRUE@iq2000
/cgen-arch
:
4910 @SIM_ENABLE_ARCH_iq2000_TRUE@
$(AM_V_GEN
)mach
=iq2000 FLAGS
="with-scache with-profile=fn"; $(CGEN_GEN_ARCH
)
4911 @SIM_ENABLE_ARCH_iq2000_TRUE@iq2000
/arch.h iq2000
/arch.c iq2000
/cpuall.h
: @CGEN_MAINT@ iq2000
/cgen-arch
4913 @SIM_ENABLE_ARCH_iq2000_TRUE@iq2000
/cgen-cpu-decode
:
4914 @SIM_ENABLE_ARCH_iq2000_TRUE@
$(AM_V_GEN
)cpu
=iq2000bf mach
=iq2000 FLAGS
="with-scache with-profile=fn" EXTRAFILES
="$(CGEN_CPU_SEM) $(CGEN_CPU_SEMSW)"; $(CGEN_GEN_CPU_DECODE
)
4915 @SIM_ENABLE_ARCH_iq2000_TRUE@iq2000
/cpu.h iq2000
/sem.c iq2000
/sem-switch.c iq2000
/model.c iq2000
/decode.c iq2000
/decode.h
: @CGEN_MAINT@ iq2000
/cgen-cpu-decode
4916 @SIM_ENABLE_ARCH_lm32_TRUE@
$(lm32_libsim_a_OBJECTS
) $(lm32_libsim_a_LIBADD
): lm32
/hw-config.h
4918 @SIM_ENABLE_ARCH_lm32_TRUE@lm32
/%.o
: common
/%.c
; $(SIM_COMPILE
)
4919 @SIM_ENABLE_ARCH_lm32_TRUE@
-@am__include@ lm32
/$(DEPDIR
)/*.Po
4920 @SIM_ENABLE_ARCH_lm32_TRUE@lm32
/modules.c
: |
$(lm32_BUILD_OUTPUTS
)
4922 @SIM_ENABLE_ARCH_lm32_TRUE@lm32
/mloop.c lm32
/eng.h
: lm32
/stamp-mloop
; @true
4923 @SIM_ENABLE_ARCH_lm32_TRUE@lm32
/stamp-mloop
: $(srccom
)/genmloop.sh lm32
/mloop.in
4924 @SIM_ENABLE_ARCH_lm32_TRUE@
$(AM_V_GEN
)$(SHELL
) $(srccom
)/genmloop.sh
-shell $(SHELL
) \
4925 @SIM_ENABLE_ARCH_lm32_TRUE@
-mono
-fast
-pbb
-switch sem-switch.c \
4926 @SIM_ENABLE_ARCH_lm32_TRUE@
-cpu lm32bf \
4927 @SIM_ENABLE_ARCH_lm32_TRUE@
-infile
$(srcdir)/lm32
/mloop.in
-outfile-prefix lm32
/
4928 @SIM_ENABLE_ARCH_lm32_TRUE@
$(AM_V_at
)$(SHELL
) $(srcroot
)/move-if-change lm32
/eng.hin lm32
/eng.h
4929 @SIM_ENABLE_ARCH_lm32_TRUE@
$(AM_V_at
)$(SHELL
) $(srcroot
)/move-if-change lm32
/mloop.cin lm32
/mloop.c
4930 @SIM_ENABLE_ARCH_lm32_TRUE@
$(AM_V_at
)touch
$@
4932 @SIM_ENABLE_ARCH_lm32_TRUE@lm32
/cgen
: lm32
/cgen-arch lm32
/cgen-cpu-decode
4934 @SIM_ENABLE_ARCH_lm32_TRUE@lm32
/cgen-arch
:
4935 @SIM_ENABLE_ARCH_lm32_TRUE@
$(AM_V_GEN
)mach
=all FLAGS
="with-scache with-profile=fn"; $(CGEN_GEN_ARCH
)
4936 @SIM_ENABLE_ARCH_lm32_TRUE@lm32
/arch.h lm32
/arch.c lm32
/cpuall.h
: @CGEN_MAINT@ lm32
/cgen-arch
4938 @SIM_ENABLE_ARCH_lm32_TRUE@lm32
/cgen-cpu-decode
:
4939 @SIM_ENABLE_ARCH_lm32_TRUE@
$(AM_V_GEN
)cpu
=lm32bf mach
=lm32 FLAGS
="with-scache with-profile=fn" EXTRAFILES
="$(CGEN_CPU_SEM) $(CGEN_CPU_SEMSW)"; $(CGEN_GEN_CPU_DECODE
)
4940 @SIM_ENABLE_ARCH_lm32_TRUE@lm32
/cpu.h lm32
/sem.c lm32
/sem-switch.c lm32
/model.c lm32
/decode.c lm32
/decode.h
: @CGEN_MAINT@ lm32
/cgen-cpu-decode
4941 @SIM_ENABLE_ARCH_m32c_TRUE@
$(m32c_libsim_a_OBJECTS
) $(m32c_libsim_a_LIBADD
): m32c
/hw-config.h
4943 @SIM_ENABLE_ARCH_m32c_TRUE@m32c
/%.o
: common
/%.c
; $(SIM_COMPILE
)
4944 @SIM_ENABLE_ARCH_m32c_TRUE@
-@am__include@ m32c
/$(DEPDIR
)/*.Po
4945 @SIM_ENABLE_ARCH_m32c_TRUE@m32c
/modules.c
: |
$(m32c_BUILD_OUTPUTS
)
4947 # These rules are copied from automake, but tweaked to use FOR_BUILD variables.
4948 @SIM_ENABLE_ARCH_m32c_TRUE@m32c
/opc2c
$(EXEEXT
): $(m32c_opc2c_OBJECTS
) $(m32c_opc2c_DEPENDENCIES
) m32c
/$(am__dirstamp
)
4949 @SIM_ENABLE_ARCH_m32c_TRUE@
$(AM_V_CCLD
)$(LINK_FOR_BUILD
) $(m32c_opc2c_OBJECTS
) $(m32c_opc2c_LDADD
)
4951 # opc2c is a build-time only tool. Override the default rules for it.
4952 @SIM_ENABLE_ARCH_m32c_TRUE@m32c
/opc2c.o
: m32c
/opc2c.c
4953 @SIM_ENABLE_ARCH_m32c_TRUE@
$(AM_V_CC
)$(COMPILE_FOR_BUILD
) -c
$< -o
$@
4955 @SIM_ENABLE_ARCH_m32c_TRUE@m32c
/m32c.c
: m32c
/m32c.opc m32c
/opc2c
$(EXEEXT
)
4956 @SIM_ENABLE_ARCH_m32c_TRUE@
$(AM_V_GEN
)$(m32c_OPC2C_RUN
) -l
$@.log
$< > $@.tmp
4957 @SIM_ENABLE_ARCH_m32c_TRUE@
$(AM_V_at
)mv
$@.tmp
$@
4959 @SIM_ENABLE_ARCH_m32c_TRUE@m32c
/r8c.c
: m32c
/r8c.opc m32c
/opc2c
$(EXEEXT
)
4960 @SIM_ENABLE_ARCH_m32c_TRUE@
$(AM_V_GEN
)$(m32c_OPC2C_RUN
) -l
$@.log
$< > $@.tmp
4961 @SIM_ENABLE_ARCH_m32c_TRUE@
$(AM_V_at
)mv
$@.tmp
$@
4962 @SIM_ENABLE_ARCH_m32r_TRUE@
$(m32r_libsim_a_OBJECTS
) $(m32r_libsim_a_LIBADD
): m32r
/hw-config.h
4964 @SIM_ENABLE_ARCH_m32r_TRUE@m32r
/%.o
: common
/%.c
; $(SIM_COMPILE
)
4965 @SIM_ENABLE_ARCH_m32r_TRUE@
-@am__include@ m32r
/$(DEPDIR
)/*.Po
4966 @SIM_ENABLE_ARCH_m32r_TRUE@m32r
/modules.c
: |
$(m32r_BUILD_OUTPUTS
)
4968 @SIM_ENABLE_ARCH_m32r_TRUE@m32r
/mloop.c m32r
/eng.h
: m32r
/stamp-mloop
; @true
4969 @SIM_ENABLE_ARCH_m32r_TRUE@m32r
/stamp-mloop
: $(srccom
)/genmloop.sh m32r
/mloop.in
4970 @SIM_ENABLE_ARCH_m32r_TRUE@
$(AM_V_GEN
)$(SHELL
) $(srccom
)/genmloop.sh
-shell $(SHELL
) \
4971 @SIM_ENABLE_ARCH_m32r_TRUE@
-mono
-fast
-pbb
-switch sem-switch.c \
4972 @SIM_ENABLE_ARCH_m32r_TRUE@
-cpu m32rbf \
4973 @SIM_ENABLE_ARCH_m32r_TRUE@
-infile
$(srcdir)/m32r
/mloop.in
-outfile-prefix m32r
/
4974 @SIM_ENABLE_ARCH_m32r_TRUE@
$(AM_V_at
)$(SHELL
) $(srcroot
)/move-if-change m32r
/eng.hin m32r
/eng.h
4975 @SIM_ENABLE_ARCH_m32r_TRUE@
$(AM_V_at
)$(SHELL
) $(srcroot
)/move-if-change m32r
/mloop.cin m32r
/mloop.c
4976 @SIM_ENABLE_ARCH_m32r_TRUE@
$(AM_V_at
)touch
$@
4978 @SIM_ENABLE_ARCH_m32r_TRUE@m32r
/mloopx.c m32r
/engx.h
: m32r
/stamp-mloop
; @true
4979 @SIM_ENABLE_ARCH_m32r_TRUE@m32r
/stamp-mloop-x
: $(srccom
)/genmloop.sh m32r
/mloop.in
4980 @SIM_ENABLE_ARCH_m32r_TRUE@
$(AM_V_GEN
)$(SHELL
) $(srccom
)/genmloop.sh
-shell $(SHELL
) \
4981 @SIM_ENABLE_ARCH_m32r_TRUE@
-mono
-no-fast
-pbb
-parallel-write
-switch semx-switch.c \
4982 @SIM_ENABLE_ARCH_m32r_TRUE@
-cpu m32rxf \
4983 @SIM_ENABLE_ARCH_m32r_TRUE@
-infile
$(srcdir)/m32r
/mloopx.in
-outfile-prefix m32r
/ -outfile-suffix x
4984 @SIM_ENABLE_ARCH_m32r_TRUE@
$(AM_V_at
)$(SHELL
) $(srcroot
)/move-if-change m32r
/engx.hin m32r
/engx.h
4985 @SIM_ENABLE_ARCH_m32r_TRUE@
$(AM_V_at
)$(SHELL
) $(srcroot
)/move-if-change m32r
/mloopx.cin m32r
/mloopx.c
4986 @SIM_ENABLE_ARCH_m32r_TRUE@
$(AM_V_at
)touch
$@
4988 @SIM_ENABLE_ARCH_m32r_TRUE@m32r
/mloop2.c m32r
/eng2.h
: m32r
/stamp-mloop
; @true
4989 @SIM_ENABLE_ARCH_m32r_TRUE@m32r
/stamp-mloop-2
: $(srccom
)/genmloop.sh m32r
/mloop.in
4990 @SIM_ENABLE_ARCH_m32r_TRUE@
$(AM_V_GEN
)$(SHELL
) $(srccom
)/genmloop.sh
-shell $(SHELL
) \
4991 @SIM_ENABLE_ARCH_m32r_TRUE@
-mono
-no-fast
-pbb
-parallel-write
-switch sem2-switch.c \
4992 @SIM_ENABLE_ARCH_m32r_TRUE@
-cpu m32r2f \
4993 @SIM_ENABLE_ARCH_m32r_TRUE@
-infile
$(srcdir)/m32r
/mloop2.in
-outfile-prefix m32r
/ -outfile-suffix
2
4994 @SIM_ENABLE_ARCH_m32r_TRUE@
$(AM_V_at
)$(SHELL
) $(srcroot
)/move-if-change m32r
/eng2.hin m32r
/eng2.h
4995 @SIM_ENABLE_ARCH_m32r_TRUE@
$(AM_V_at
)$(SHELL
) $(srcroot
)/move-if-change m32r
/mloop2.cin m32r
/mloop2.c
4996 @SIM_ENABLE_ARCH_m32r_TRUE@
$(AM_V_at
)touch
$@
4998 @SIM_ENABLE_ARCH_m32r_TRUE@m32r
/cgen
: m32r
/cgen-arch m32r
/cgen-cpu-decode m32r
/cgen-cpu-decode-x m32r
/cgen-cpu-decode-2
5000 @SIM_ENABLE_ARCH_m32r_TRUE@m32r
/cgen-arch
:
5001 @SIM_ENABLE_ARCH_m32r_TRUE@
$(AM_V_GEN
)mach
=all FLAGS
="with-scache with-profile=fn"; $(CGEN_GEN_ARCH
)
5002 @SIM_ENABLE_ARCH_m32r_TRUE@m32r
/arch.h m32r
/arch.c m32r
/cpuall.h
: @CGEN_MAINT@ m32r
/cgen-arch
5004 @SIM_ENABLE_ARCH_m32r_TRUE@m32r
/cgen-cpu-decode
:
5005 @SIM_ENABLE_ARCH_m32r_TRUE@
$(AM_V_GEN
)cpu
=m32rbf mach
=m32r FLAGS
="with-scache with-profile=fn" EXTRAFILES
="$(CGEN_CPU_SEM) $(CGEN_CPU_SEMSW)"; $(CGEN_GEN_CPU_DECODE
)
5006 @SIM_ENABLE_ARCH_m32r_TRUE@m32r
/cpu.h m32r
/sem.c m32r
/sem-switch.c m32r
/model.c m32r
/decode.c m32r
/decode.h
: @CGEN_MAINT@ m32r
/cgen-cpu-decode
5008 @SIM_ENABLE_ARCH_m32r_TRUE@m32r
/cgen-cpu-decode-x
:
5009 @SIM_ENABLE_ARCH_m32r_TRUE@
$(AM_V_GEN
)cpu
=m32rxf mach
=m32rx SUFFIX
=x FLAGS
="with-scache with-profile=fn" EXTRAFILES
="$(CGEN_CPU_SEMSW)"; $(CGEN_GEN_CPU_DECODE
)
5010 @SIM_ENABLE_ARCH_m32r_TRUE@m32r
/cpux.h m32r
/semx-switch.c m32r
/modelx.c m32r
/decodex.c m32r
/decodex.h
: @CGEN_MAINT@ m32r
/cgen-cpu-decode-x
5012 @SIM_ENABLE_ARCH_m32r_TRUE@m32r
/cgen-cpu-decode-2
:
5013 @SIM_ENABLE_ARCH_m32r_TRUE@
$(AM_V_GEN
)cpu
=m32r2f mach
=m32r2 SUFFIX
=2 FLAGS
="with-scache with-profile=fn" EXTRAFILES
="$(CGEN_CPU_SEMSW)"; $(CGEN_GEN_CPU_DECODE
)
5014 @SIM_ENABLE_ARCH_m32r_TRUE@m32r
/cpu2.h m32r
/sem2-switch.c m32r
/model2.c m32r
/decode2.c m32r
/decode2.h
: @CGEN_MAINT@ m32r
/cgen-cpu-decode-2
5015 @SIM_ENABLE_ARCH_m68hc11_TRUE@
$(m68hc11_libsim_a_OBJECTS
) $(m68hc11_libsim_a_LIBADD
): m68hc11
/hw-config.h
5017 @SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11
/%.o
: common
/%.c
; $(SIM_COMPILE
)
5018 @SIM_ENABLE_ARCH_m68hc11_TRUE@
-@am__include@ m68hc11
/$(DEPDIR
)/*.Po
5019 @SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11
/modules.c
: |
$(m68hc11_BUILD_OUTPUTS
)
5021 # These rules are copied from automake, but tweaked to use FOR_BUILD variables.
5022 @SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11
/gencode
$(EXEEXT
): $(m68hc11_gencode_OBJECTS
) $(m68hc11_gencode_DEPENDENCIES
) m68hc11
/$(am__dirstamp
)
5023 @SIM_ENABLE_ARCH_m68hc11_TRUE@
$(AM_V_CCLD
)$(LINK_FOR_BUILD
) $(m68hc11_gencode_OBJECTS
) $(m68hc11_gencode_LDADD
)
5025 # gencode is a build-time only tool. Override the default rules for it.
5026 @SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11
/gencode.o
: m68hc11
/gencode.c
5027 @SIM_ENABLE_ARCH_m68hc11_TRUE@
$(AM_V_CC
)$(COMPILE_FOR_BUILD
) -c
$< -o
$@
5029 @SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11
/m68hc11int.c
: m68hc11
/gencode
$(EXEEXT
)
5030 @SIM_ENABLE_ARCH_m68hc11_TRUE@
$(AM_V_GEN
)$< -m6811
>$@
5032 @SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11
/m68hc12int.c
: m68hc11
/gencode
$(EXEEXT
)
5033 @SIM_ENABLE_ARCH_m68hc11_TRUE@
$(AM_V_GEN
)$< -m6812
>$@
5034 @SIM_ENABLE_ARCH_mcore_TRUE@
$(mcore_libsim_a_OBJECTS
) $(mcore_libsim_a_LIBADD
): mcore
/hw-config.h
5036 @SIM_ENABLE_ARCH_mcore_TRUE@mcore
/%.o
: common
/%.c
; $(SIM_COMPILE
)
5037 @SIM_ENABLE_ARCH_mcore_TRUE@
-@am__include@ mcore
/$(DEPDIR
)/*.Po
5038 @SIM_ENABLE_ARCH_microblaze_TRUE@
$(microblaze_libsim_a_OBJECTS
) $(microblaze_libsim_a_LIBADD
): microblaze
/hw-config.h
5040 @SIM_ENABLE_ARCH_microblaze_TRUE@microblaze
/%.o
: common
/%.c
; $(SIM_COMPILE
)
5041 @SIM_ENABLE_ARCH_microblaze_TRUE@
-@am__include@ microblaze
/$(DEPDIR
)/*.Po
5042 @SIM_ENABLE_ARCH_mips_TRUE@
$(mips_libsim_a_OBJECTS
) $(mips_libsim_a_LIBADD
): mips
/hw-config.h
5044 @SIM_ENABLE_ARCH_mips_TRUE@mips
/%.o
: common
/%.c
; $(SIM_COMPILE
)
5045 @SIM_ENABLE_ARCH_mips_TRUE@
-@am__include@ mips
/$(DEPDIR
)/*.Po
5046 @SIM_ENABLE_ARCH_mips_TRUE@mips
/modules.c
: |
$(mips_BUILD_OUTPUTS
)
5048 @SIM_ENABLE_ARCH_mips_TRUE@
$(mips_BUILT_SRC_FROM_IGEN_ITABLE
): mips
/stamp-igen-itable
5049 @SIM_ENABLE_ARCH_mips_TRUE@
$(mips_BUILT_SRC_FROM_GEN_MODE_SINGLE
): mips
/stamp-gen-mode-single
5050 @SIM_ENABLE_ARCH_mips_TRUE@
$(mips_BUILT_SRC_FROM_GEN_MODE_M16_M16
): mips
/stamp-gen-mode-m16-m16
5051 @SIM_ENABLE_ARCH_mips_TRUE@
$(mips_BUILT_SRC_FROM_GEN_MODE_M16_M32
): mips
/stamp-gen-mode-m16-m32
5052 @SIM_ENABLE_ARCH_mips_TRUE@
$(SIM_MIPS_MULTI_SRC
): mips
/stamp-gen-mode-multi-igen mips
/stamp-gen-mode-multi-run
5054 @SIM_ENABLE_ARCH_mips_TRUE@mips
/stamp-igen-itable
: $(mips_IGEN_INSN
) $(mips_IGEN_INSN_INC
) $(IGEN
)
5055 @SIM_ENABLE_ARCH_mips_TRUE@
$(AM_V_GEN
)$(IGEN_RUN
) \
5056 @SIM_ENABLE_ARCH_mips_TRUE@
$(mips_IGEN_TRACE
) \
5057 @SIM_ENABLE_ARCH_mips_TRUE@
-I
$(srcdir)/mips \
5058 @SIM_ENABLE_ARCH_mips_TRUE@
-Werror \
5059 @SIM_ENABLE_ARCH_mips_TRUE@
-Wnodiscard \
5060 @SIM_ENABLE_ARCH_mips_TRUE@
-Wnowidth \
5061 @SIM_ENABLE_ARCH_mips_TRUE@
-Wnounimplemented \
5062 @SIM_ENABLE_ARCH_mips_TRUE@
$(SIM_MIPS_IGEN_ITABLE_FLAGS
) \
5063 @SIM_ENABLE_ARCH_mips_TRUE@
-G gen-direct-access \
5064 @SIM_ENABLE_ARCH_mips_TRUE@
-G gen-zero-r0 \
5065 @SIM_ENABLE_ARCH_mips_TRUE@
-i
$(mips_IGEN_INSN
) \
5066 @SIM_ENABLE_ARCH_mips_TRUE@
-n itable.h
-ht mips
/itable.h \
5067 @SIM_ENABLE_ARCH_mips_TRUE@
-n itable.c
-t mips
/itable.c
5068 @SIM_ENABLE_ARCH_mips_TRUE@
$(AM_V_at
)touch
$@
5070 @SIM_ENABLE_ARCH_mips_TRUE@mips
/stamp-gen-mode-single
: $(mips_IGEN_INSN
) $(mips_IGEN_INSN_INC
) $(mips_IGEN_DC
) $(IGEN
)
5071 @SIM_ENABLE_ARCH_mips_TRUE@
$(AM_V_GEN
)$(IGEN_RUN
) \
5072 @SIM_ENABLE_ARCH_mips_TRUE@
$(mips_IGEN_TRACE
) \
5073 @SIM_ENABLE_ARCH_mips_TRUE@
-I
$(srcdir)/mips \
5074 @SIM_ENABLE_ARCH_mips_TRUE@
-Werror \
5075 @SIM_ENABLE_ARCH_mips_TRUE@
-Wnodiscard \
5076 @SIM_ENABLE_ARCH_mips_TRUE@
$(SIM_MIPS_SINGLE_FLAGS
) \
5077 @SIM_ENABLE_ARCH_mips_TRUE@
-G gen-direct-access \
5078 @SIM_ENABLE_ARCH_mips_TRUE@
-G gen-zero-r0 \
5079 @SIM_ENABLE_ARCH_mips_TRUE@
-B
32 \
5080 @SIM_ENABLE_ARCH_mips_TRUE@
-H
31 \
5081 @SIM_ENABLE_ARCH_mips_TRUE@
-i
$(mips_IGEN_INSN
) \
5082 @SIM_ENABLE_ARCH_mips_TRUE@
-o
$(mips_IGEN_DC
) \
5083 @SIM_ENABLE_ARCH_mips_TRUE@
-x \
5084 @SIM_ENABLE_ARCH_mips_TRUE@
-n icache.h
-hc mips
/icache.h \
5085 @SIM_ENABLE_ARCH_mips_TRUE@
-n icache.c
-c mips
/icache.c \
5086 @SIM_ENABLE_ARCH_mips_TRUE@
-n semantics.h
-hs mips
/semantics.h \
5087 @SIM_ENABLE_ARCH_mips_TRUE@
-n semantics.c
-s mips
/semantics.c \
5088 @SIM_ENABLE_ARCH_mips_TRUE@
-n idecode.h
-hd mips
/idecode.h \
5089 @SIM_ENABLE_ARCH_mips_TRUE@
-n idecode.c
-d mips
/idecode.c \
5090 @SIM_ENABLE_ARCH_mips_TRUE@
-n model.h
-hm mips
/model.h \
5091 @SIM_ENABLE_ARCH_mips_TRUE@
-n model.c
-m mips
/model.c \
5092 @SIM_ENABLE_ARCH_mips_TRUE@
-n support.h
-hf mips
/support.h \
5093 @SIM_ENABLE_ARCH_mips_TRUE@
-n support.c
-f mips
/support.c \
5094 @SIM_ENABLE_ARCH_mips_TRUE@
-n engine.h
-he mips
/engine.h \
5095 @SIM_ENABLE_ARCH_mips_TRUE@
-n engine.c
-e mips
/engine.c \
5096 @SIM_ENABLE_ARCH_mips_TRUE@
-n irun.c
-r mips
/irun.c
5097 @SIM_ENABLE_ARCH_mips_TRUE@
$(AM_V_at
)touch
$@
5099 @SIM_ENABLE_ARCH_mips_TRUE@mips
/stamp-gen-mode-m16-m16
: $(mips_IGEN_INSN
) $(mips_IGEN_INSN_INC
) $(mips_M16_DC
) $(IGEN
)
5100 @SIM_ENABLE_ARCH_mips_TRUE@
$(AM_V_GEN
)$(IGEN_RUN
) \
5101 @SIM_ENABLE_ARCH_mips_TRUE@
$(mips_IGEN_TRACE
) \
5102 @SIM_ENABLE_ARCH_mips_TRUE@
-I
$(srcdir)/mips \
5103 @SIM_ENABLE_ARCH_mips_TRUE@
-Werror \
5104 @SIM_ENABLE_ARCH_mips_TRUE@
-Wnodiscard \
5105 @SIM_ENABLE_ARCH_mips_TRUE@
$(SIM_MIPS_M16_FLAGS
) \
5106 @SIM_ENABLE_ARCH_mips_TRUE@
-G gen-direct-access \
5107 @SIM_ENABLE_ARCH_mips_TRUE@
-G gen-zero-r0 \
5108 @SIM_ENABLE_ARCH_mips_TRUE@
-B
16 \
5109 @SIM_ENABLE_ARCH_mips_TRUE@
-H
15 \
5110 @SIM_ENABLE_ARCH_mips_TRUE@
-i
$(mips_IGEN_INSN
) \
5111 @SIM_ENABLE_ARCH_mips_TRUE@
-o
$(mips_M16_DC
) \
5112 @SIM_ENABLE_ARCH_mips_TRUE@
-P m16_ \
5113 @SIM_ENABLE_ARCH_mips_TRUE@
-x \
5114 @SIM_ENABLE_ARCH_mips_TRUE@
-n m16_icache.h
-hc mips
/m16_icache.h \
5115 @SIM_ENABLE_ARCH_mips_TRUE@
-n m16_icache.c
-c mips
/m16_icache.c \
5116 @SIM_ENABLE_ARCH_mips_TRUE@
-n m16_semantics.h
-hs mips
/m16_semantics.h \
5117 @SIM_ENABLE_ARCH_mips_TRUE@
-n m16_semantics.c
-s mips
/m16_semantics.c \
5118 @SIM_ENABLE_ARCH_mips_TRUE@
-n m16_idecode.h
-hd mips
/m16_idecode.h \
5119 @SIM_ENABLE_ARCH_mips_TRUE@
-n m16_idecode.c
-d mips
/m16_idecode.c \
5120 @SIM_ENABLE_ARCH_mips_TRUE@
-n m16_model.h
-hm mips
/m16_model.h \
5121 @SIM_ENABLE_ARCH_mips_TRUE@
-n m16_model.c
-m mips
/m16_model.c \
5122 @SIM_ENABLE_ARCH_mips_TRUE@
-n m16_support.h
-hf mips
/m16_support.h \
5123 @SIM_ENABLE_ARCH_mips_TRUE@
-n m16_support.c
-f mips
/m16_support.c
5124 @SIM_ENABLE_ARCH_mips_TRUE@
$(AM_V_at
)touch
$@
5126 @SIM_ENABLE_ARCH_mips_TRUE@mips
/stamp-gen-mode-m16-m32
: $(mips_IGEN_INSN
) $(mips_IGEN_INSN_INC
) $(mips_IGEN_DC
) $(IGEN
)
5127 @SIM_ENABLE_ARCH_mips_TRUE@
$(AM_V_GEN
)$(IGEN_RUN
) \
5128 @SIM_ENABLE_ARCH_mips_TRUE@
$(mips_IGEN_TRACE
) \
5129 @SIM_ENABLE_ARCH_mips_TRUE@
-I
$(srcdir)/mips \
5130 @SIM_ENABLE_ARCH_mips_TRUE@
-Werror \
5131 @SIM_ENABLE_ARCH_mips_TRUE@
-Wnodiscard \
5132 @SIM_ENABLE_ARCH_mips_TRUE@
$(SIM_MIPS_SINGLE_FLAGS
) \
5133 @SIM_ENABLE_ARCH_mips_TRUE@
-G gen-direct-access \
5134 @SIM_ENABLE_ARCH_mips_TRUE@
-G gen-zero-r0 \
5135 @SIM_ENABLE_ARCH_mips_TRUE@
-B
32 \
5136 @SIM_ENABLE_ARCH_mips_TRUE@
-H
31 \
5137 @SIM_ENABLE_ARCH_mips_TRUE@
-i
$(mips_IGEN_INSN
) \
5138 @SIM_ENABLE_ARCH_mips_TRUE@
-o
$(mips_IGEN_DC
) \
5139 @SIM_ENABLE_ARCH_mips_TRUE@
-P m32_ \
5140 @SIM_ENABLE_ARCH_mips_TRUE@
-x \
5141 @SIM_ENABLE_ARCH_mips_TRUE@
-n m32_icache.h
-hc mips
/m32_icache.h \
5142 @SIM_ENABLE_ARCH_mips_TRUE@
-n m32_icache.c
-c mips
/m32_icache.c \
5143 @SIM_ENABLE_ARCH_mips_TRUE@
-n m32_semantics.h
-hs mips
/m32_semantics.h \
5144 @SIM_ENABLE_ARCH_mips_TRUE@
-n m32_semantics.c
-s mips
/m32_semantics.c \
5145 @SIM_ENABLE_ARCH_mips_TRUE@
-n m32_idecode.h
-hd mips
/m32_idecode.h \
5146 @SIM_ENABLE_ARCH_mips_TRUE@
-n m32_idecode.c
-d mips
/m32_idecode.c \
5147 @SIM_ENABLE_ARCH_mips_TRUE@
-n m32_model.h
-hm mips
/m32_model.h \
5148 @SIM_ENABLE_ARCH_mips_TRUE@
-n m32_model.c
-m mips
/m32_model.c \
5149 @SIM_ENABLE_ARCH_mips_TRUE@
-n m32_support.h
-hf mips
/m32_support.h \
5150 @SIM_ENABLE_ARCH_mips_TRUE@
-n m32_support.c
-f mips
/m32_support.c
5151 @SIM_ENABLE_ARCH_mips_TRUE@
$(AM_V_at
)touch
$@
5153 @SIM_ENABLE_ARCH_mips_TRUE@mips
/stamp-gen-mode-multi-igen
: $(mips_IGEN_INSN
) $(mips_IGEN_INSN_INC
) $(mips_IGEN_DC
) $(mips_M16_DC
) $(mips_MICROMIPS32_DC
) $(mips_MICROMIPS16_DC
) $(IGEN
)
5154 @SIM_ENABLE_ARCH_mips_TRUE@
$(AM_V_GEN
)\
5155 @SIM_ENABLE_ARCH_mips_TRUE@ for t in
$(SIM_MIPS_MULTI_IGEN_CONFIGS
); do \
5156 @SIM_ENABLE_ARCH_mips_TRUE@ p
=`echo $${t} | sed -e 's/:.*//'` ; \
5157 @SIM_ENABLE_ARCH_mips_TRUE@ m
=`echo $${t} | sed -e 's/.*:\(.*\):.*/\1/'` ; \
5158 @SIM_ENABLE_ARCH_mips_TRUE@ f
=`echo $${t} | sed -e 's/.*://'` ; \
5159 @SIM_ENABLE_ARCH_mips_TRUE@ case
$${p} in \
5160 @SIM_ENABLE_ARCH_mips_TRUE@ micromips16
*) \
5161 @SIM_ENABLE_ARCH_mips_TRUE@ e
="-B 16 -H 15 -o $(mips_MICROMIPS16_DC) -F 16" ;; \
5162 @SIM_ENABLE_ARCH_mips_TRUE@ micromips32
* | micromips64
*) \
5163 @SIM_ENABLE_ARCH_mips_TRUE@ e
="-B 32 -H 31 -o $(mips_MICROMIPS32_DC) -F $${f}" ;; \
5164 @SIM_ENABLE_ARCH_mips_TRUE@ micromips_m32
*) \
5165 @SIM_ENABLE_ARCH_mips_TRUE@ e
="-B 32 -H 31 -o $(mips_IGEN_DC) -F $${f}"; \
5166 @SIM_ENABLE_ARCH_mips_TRUE@ m
="mips32r2,mips3d,mdmx,dsp,dsp2,smartmips" ;; \
5167 @SIM_ENABLE_ARCH_mips_TRUE@ micromips_m64
*) \
5168 @SIM_ENABLE_ARCH_mips_TRUE@ e
="-B 32 -H 31 -o $(mips_IGEN_DC) -F $${f}"; \
5169 @SIM_ENABLE_ARCH_mips_TRUE@ m
="mips64r2,mips3d,mdmx,dsp,dsp2,smartmips" ;; \
5170 @SIM_ENABLE_ARCH_mips_TRUE@ m16
*) \
5171 @SIM_ENABLE_ARCH_mips_TRUE@ e
="-B 16 -H 15 -o $(mips_M16_DC) -F 16" ;; \
5172 @SIM_ENABLE_ARCH_mips_TRUE@
*) \
5173 @SIM_ENABLE_ARCH_mips_TRUE@ e
="-B 32 -H 31 -o $(mips_IGEN_DC) -F $${f}" ;; \
5174 @SIM_ENABLE_ARCH_mips_TRUE@ esac
; \
5175 @SIM_ENABLE_ARCH_mips_TRUE@
$(IGEN_RUN
) \
5176 @SIM_ENABLE_ARCH_mips_TRUE@
$(mips_IGEN_TRACE
) \
5177 @SIM_ENABLE_ARCH_mips_TRUE@
$${e} \
5178 @SIM_ENABLE_ARCH_mips_TRUE@
-I
$(srcdir)/mips \
5179 @SIM_ENABLE_ARCH_mips_TRUE@
-Werror \
5180 @SIM_ENABLE_ARCH_mips_TRUE@
-Wnodiscard \
5181 @SIM_ENABLE_ARCH_mips_TRUE@
-M
$${m} \
5182 @SIM_ENABLE_ARCH_mips_TRUE@
-G gen-direct-access \
5183 @SIM_ENABLE_ARCH_mips_TRUE@
-G gen-zero-r0 \
5184 @SIM_ENABLE_ARCH_mips_TRUE@
-i
$(mips_IGEN_INSN
) \
5185 @SIM_ENABLE_ARCH_mips_TRUE@
-P
$${p}_ \
5186 @SIM_ENABLE_ARCH_mips_TRUE@
-x \
5187 @SIM_ENABLE_ARCH_mips_TRUE@
-n
$${p}_icache.h
-hc mips
/$${p}_icache.h \
5188 @SIM_ENABLE_ARCH_mips_TRUE@
-n
$${p}_icache.c
-c mips
/$${p}_icache.c \
5189 @SIM_ENABLE_ARCH_mips_TRUE@
-n
$${p}_semantics.h
-hs mips
/$${p}_semantics.h \
5190 @SIM_ENABLE_ARCH_mips_TRUE@
-n
$${p}_semantics.c
-s mips
/$${p}_semantics.c \
5191 @SIM_ENABLE_ARCH_mips_TRUE@
-n
$${p}_idecode.h
-hd mips
/$${p}_idecode.h \
5192 @SIM_ENABLE_ARCH_mips_TRUE@
-n
$${p}_idecode.c
-d mips
/$${p}_idecode.c \
5193 @SIM_ENABLE_ARCH_mips_TRUE@
-n
$${p}_model.h
-hm mips
/$${p}_model.h \
5194 @SIM_ENABLE_ARCH_mips_TRUE@
-n
$${p}_model.c
-m mips
/$${p}_model.c \
5195 @SIM_ENABLE_ARCH_mips_TRUE@
-n
$${p}_support.h
-hf mips
/$${p}_support.h \
5196 @SIM_ENABLE_ARCH_mips_TRUE@
-n
$${p}_support.c
-f mips
/$${p}_support.c \
5197 @SIM_ENABLE_ARCH_mips_TRUE@
-n
$${p}_engine.h
-he mips
/$${p}_engine.h \
5198 @SIM_ENABLE_ARCH_mips_TRUE@
-n
$${p}_engine.c
-e mips
/$${p}_engine.c \
5199 @SIM_ENABLE_ARCH_mips_TRUE@ || exit
; \
5200 @SIM_ENABLE_ARCH_mips_TRUE@ done
5201 @SIM_ENABLE_ARCH_mips_TRUE@
$(AM_V_at
)touch
$@
5203 @SIM_ENABLE_ARCH_mips_TRUE@mips
/stamp-gen-mode-multi-run
: mips
/m16run.c mips
/micromipsrun.c
5204 @SIM_ENABLE_ARCH_mips_TRUE@
$(AM_V_GEN
)\
5205 @SIM_ENABLE_ARCH_mips_TRUE@ for t in
$(SIM_MIPS_MULTI_IGEN_CONFIGS
); do \
5206 @SIM_ENABLE_ARCH_mips_TRUE@ case
$${t} in \
5207 @SIM_ENABLE_ARCH_mips_TRUE@ m16
*) \
5208 @SIM_ENABLE_ARCH_mips_TRUE@ m
=`echo $${t} | sed -e 's/^m16//' -e 's/:.*//'`; \
5209 @SIM_ENABLE_ARCH_mips_TRUE@ o
=mips
/m16
$${m}_run.c
; \
5210 @SIM_ENABLE_ARCH_mips_TRUE@ sed
< $(srcdir)/mips
/m16run.c
> $$o.tmp \
5211 @SIM_ENABLE_ARCH_mips_TRUE@
-e
"s/^sim_/m16$${m}_/" \
5212 @SIM_ENABLE_ARCH_mips_TRUE@
-e
"/include/s/sim-engine/m16$${m}_engine/" \
5213 @SIM_ENABLE_ARCH_mips_TRUE@
-e
"s/m16_/m16$${m}_/" \
5214 @SIM_ENABLE_ARCH_mips_TRUE@
-e
"s/m32_/m32$${m}_/" \
5215 @SIM_ENABLE_ARCH_mips_TRUE@ || exit
1; \
5216 @SIM_ENABLE_ARCH_mips_TRUE@
$(SHELL
) $(srcroot
)/move-if-change
$$o.tmp
$$o; \
5217 @SIM_ENABLE_ARCH_mips_TRUE@
;;\
5218 @SIM_ENABLE_ARCH_mips_TRUE@ micromips32
*) \
5219 @SIM_ENABLE_ARCH_mips_TRUE@ m
=`echo $${t} | sed -e 's/^micromips32//' -e 's/:.*//'`; \
5220 @SIM_ENABLE_ARCH_mips_TRUE@ o
=mips
/micromips
$${m}_run.c
; \
5221 @SIM_ENABLE_ARCH_mips_TRUE@ sed
< $(srcdir)/mips
/micromipsrun.c
> $$o.tmp \
5222 @SIM_ENABLE_ARCH_mips_TRUE@
-e
"s/^sim_/micromips32$${m}_/" \
5223 @SIM_ENABLE_ARCH_mips_TRUE@
-e
"/include/s/sim-engine/micromips32$${m}_engine/" \
5224 @SIM_ENABLE_ARCH_mips_TRUE@
-e
"s/micromips16_/micromips16$${m}_/" \
5225 @SIM_ENABLE_ARCH_mips_TRUE@
-e
"s/micromips32_/micromips32$${m}_/" \
5226 @SIM_ENABLE_ARCH_mips_TRUE@
-e
"s/m32_/m32$${m}_/" \
5227 @SIM_ENABLE_ARCH_mips_TRUE@ || exit
1; \
5228 @SIM_ENABLE_ARCH_mips_TRUE@
$(SHELL
) $(srcroot
)/move-if-change
$$o.tmp
$$o; \
5229 @SIM_ENABLE_ARCH_mips_TRUE@
;;\
5230 @SIM_ENABLE_ARCH_mips_TRUE@ micromips64
*) \
5231 @SIM_ENABLE_ARCH_mips_TRUE@ m
=`echo $${t} | sed -e 's/^micromips64//' -e 's/:.*//'`; \
5232 @SIM_ENABLE_ARCH_mips_TRUE@ o
=mips
/micromips
$${m}_run.c
; \
5233 @SIM_ENABLE_ARCH_mips_TRUE@ sed
< $(srcdir)/mips
/micromipsrun.c
> $$o.tmp \
5234 @SIM_ENABLE_ARCH_mips_TRUE@
-e
"s/^sim_/micromips64$${m}_/" \
5235 @SIM_ENABLE_ARCH_mips_TRUE@
-e
"/include/s/sim-engine/micromips64$${m}_engine/" \
5236 @SIM_ENABLE_ARCH_mips_TRUE@
-e
"s/micromips16_/micromips16$${m}_/" \
5237 @SIM_ENABLE_ARCH_mips_TRUE@
-e
"s/micromips32_/micromips64$${m}_/" \
5238 @SIM_ENABLE_ARCH_mips_TRUE@
-e
"s/m32_/m64$${m}_/" \
5239 @SIM_ENABLE_ARCH_mips_TRUE@ || exit
1; \
5240 @SIM_ENABLE_ARCH_mips_TRUE@
$(SHELL
) $(srcroot
)/move-if-change
$$o.tmp
$$o; \
5241 @SIM_ENABLE_ARCH_mips_TRUE@
;;\
5242 @SIM_ENABLE_ARCH_mips_TRUE@ esac \
5243 @SIM_ENABLE_ARCH_mips_TRUE@ done
5244 @SIM_ENABLE_ARCH_mips_TRUE@
$(AM_V_at
)touch
$@
5245 @SIM_ENABLE_ARCH_mn10300_TRUE@
$(mn10300_libsim_a_OBJECTS
) $(mn10300_libsim_a_LIBADD
): mn10300
/hw-config.h
5247 @SIM_ENABLE_ARCH_mn10300_TRUE@mn10300
/%.o
: common
/%.c
; $(SIM_COMPILE
)
5248 @SIM_ENABLE_ARCH_mn10300_TRUE@
-@am__include@ mn10300
/$(DEPDIR
)/*.Po
5249 @SIM_ENABLE_ARCH_mn10300_TRUE@mn10300
/modules.c
: |
$(mn10300_BUILD_OUTPUTS
)
5251 @SIM_ENABLE_ARCH_mn10300_TRUE@
$(mn10300_BUILT_SRC_FROM_IGEN
): mn10300
/stamp-igen
5252 @SIM_ENABLE_ARCH_mn10300_TRUE@mn10300
/stamp-igen
: $(mn10300_IGEN_INSN
) $(mn10300_IGEN_INSN_INC
) $(mn10300_IGEN_DC
) $(IGEN
)
5253 @SIM_ENABLE_ARCH_mn10300_TRUE@
$(AM_V_GEN
)$(IGEN_RUN
) \
5254 @SIM_ENABLE_ARCH_mn10300_TRUE@
$(mn10300_IGEN_TRACE
) \
5255 @SIM_ENABLE_ARCH_mn10300_TRUE@
-G gen-direct-access \
5256 @SIM_ENABLE_ARCH_mn10300_TRUE@
-M mn10300
,am33
-G gen-multi-sim
=am33 \
5257 @SIM_ENABLE_ARCH_mn10300_TRUE@
-M am33_2 \
5258 @SIM_ENABLE_ARCH_mn10300_TRUE@
-I
$(srcdir)/mn10300 \
5259 @SIM_ENABLE_ARCH_mn10300_TRUE@
-i
$(mn10300_IGEN_INSN
) \
5260 @SIM_ENABLE_ARCH_mn10300_TRUE@
-o
$(mn10300_IGEN_DC
) \
5261 @SIM_ENABLE_ARCH_mn10300_TRUE@
-x \
5262 @SIM_ENABLE_ARCH_mn10300_TRUE@
-n icache.h
-hc mn10300
/icache.h \
5263 @SIM_ENABLE_ARCH_mn10300_TRUE@
-n icache.c
-c mn10300
/icache.c \
5264 @SIM_ENABLE_ARCH_mn10300_TRUE@
-n semantics.h
-hs mn10300
/semantics.h \
5265 @SIM_ENABLE_ARCH_mn10300_TRUE@
-n semantics.c
-s mn10300
/semantics.c \
5266 @SIM_ENABLE_ARCH_mn10300_TRUE@
-n idecode.h
-hd mn10300
/idecode.h \
5267 @SIM_ENABLE_ARCH_mn10300_TRUE@
-n idecode.c
-d mn10300
/idecode.c \
5268 @SIM_ENABLE_ARCH_mn10300_TRUE@
-n model.h
-hm mn10300
/model.h \
5269 @SIM_ENABLE_ARCH_mn10300_TRUE@
-n model.c
-m mn10300
/model.c \
5270 @SIM_ENABLE_ARCH_mn10300_TRUE@
-n support.h
-hf mn10300
/support.h \
5271 @SIM_ENABLE_ARCH_mn10300_TRUE@
-n support.c
-f mn10300
/support.c \
5272 @SIM_ENABLE_ARCH_mn10300_TRUE@
-n itable.h
-ht mn10300
/itable.h \
5273 @SIM_ENABLE_ARCH_mn10300_TRUE@
-n itable.c
-t mn10300
/itable.c \
5274 @SIM_ENABLE_ARCH_mn10300_TRUE@
-n engine.h
-he mn10300
/engine.h \
5275 @SIM_ENABLE_ARCH_mn10300_TRUE@
-n engine.c
-e mn10300
/engine.c \
5276 @SIM_ENABLE_ARCH_mn10300_TRUE@
-n irun.c
-r mn10300
/irun.c
5277 @SIM_ENABLE_ARCH_mn10300_TRUE@
$(AM_V_at
)touch
$@
5278 @SIM_ENABLE_ARCH_moxie_TRUE@
$(moxie_libsim_a_OBJECTS
) $(moxie_libsim_a_LIBADD
): moxie
/hw-config.h
5280 @SIM_ENABLE_ARCH_moxie_TRUE@moxie
/%.o
: common
/%.c
; $(SIM_COMPILE
)
5281 @SIM_ENABLE_ARCH_moxie_TRUE@
-@am__include@ moxie
/$(DEPDIR
)/*.Po
5283 @SIM_ENABLE_ARCH_moxie_TRUE@moxie
/moxie-gdb.dtb
: @MAINT@ moxie
/moxie-gdb.dts moxie
/$(am__dirstamp
)
5284 @SIM_ENABLE_ARCH_moxie_TRUE@
$(AM_V_GEN
) \
5285 @SIM_ENABLE_ARCH_moxie_TRUE@ if
test "x$(DTC)" != x
; then \
5286 @SIM_ENABLE_ARCH_moxie_TRUE@
$(DTC
) -O dtb
-o
$@.tmp
${srcdir}/moxie
/moxie-gdb.dts || exit
1; \
5287 @SIM_ENABLE_ARCH_moxie_TRUE@
$(SHELL
) $(srcroot
)/move-if-change
$@.tmp
${srcdir}/moxie
/moxie-gdb.dtb || exit
1; \
5288 @SIM_ENABLE_ARCH_moxie_TRUE@ touch
${srcdir}/moxie
/moxie-gdb.dtb
; \
5289 @SIM_ENABLE_ARCH_moxie_TRUE@
else \
5290 @SIM_ENABLE_ARCH_moxie_TRUE@ echo
"Could not update the moxie-gdb.dtb file because the device "; \
5291 @SIM_ENABLE_ARCH_moxie_TRUE@ echo
"tree compiler tool (dtc) is missing. Install the tool to "; \
5292 @SIM_ENABLE_ARCH_moxie_TRUE@ echo
"update the device tree blob."; \
5293 @SIM_ENABLE_ARCH_moxie_TRUE@ fi
5294 @SIM_ENABLE_ARCH_msp430_TRUE@
$(msp430_libsim_a_OBJECTS
) $(msp430_libsim_a_LIBADD
): msp430
/hw-config.h
5296 @SIM_ENABLE_ARCH_msp430_TRUE@msp430
/%.o
: common
/%.c
; $(SIM_COMPILE
)
5297 @SIM_ENABLE_ARCH_msp430_TRUE@
-@am__include@ msp430
/$(DEPDIR
)/*.Po
5298 @SIM_ENABLE_ARCH_or1k_TRUE@
$(or1k_libsim_a_OBJECTS
) $(or1k_libsim_a_LIBADD
): or1k
/hw-config.h
5300 @SIM_ENABLE_ARCH_or1k_TRUE@or1k
/%.o
: common
/%.c
; $(SIM_COMPILE
)
5301 @SIM_ENABLE_ARCH_or1k_TRUE@
-@am__include@ or1k
/$(DEPDIR
)/*.Po
5302 @SIM_ENABLE_ARCH_or1k_TRUE@or1k
/modules.c
: |
$(or1k_BUILD_OUTPUTS
)
5304 @SIM_ENABLE_ARCH_or1k_TRUE@or1k
/mloop.c or1k
/eng.h
: or1k
/stamp-mloop
; @true
5305 @SIM_ENABLE_ARCH_or1k_TRUE@or1k
/stamp-mloop
: $(srccom
)/genmloop.sh or1k
/mloop.in
5306 @SIM_ENABLE_ARCH_or1k_TRUE@
$(AM_V_GEN
)$(SHELL
) $(srccom
)/genmloop.sh
-shell $(SHELL
) \
5307 @SIM_ENABLE_ARCH_or1k_TRUE@
-mono
-fast
-pbb
-switch sem-switch.c \
5308 @SIM_ENABLE_ARCH_or1k_TRUE@
-cpu or1k32bf \
5309 @SIM_ENABLE_ARCH_or1k_TRUE@
-infile
$(srcdir)/or1k
/mloop.in
-outfile-prefix or1k
/
5310 @SIM_ENABLE_ARCH_or1k_TRUE@
$(AM_V_at
)$(SHELL
) $(srcroot
)/move-if-change or1k
/eng.hin or1k
/eng.h
5311 @SIM_ENABLE_ARCH_or1k_TRUE@
$(AM_V_at
)$(SHELL
) $(srcroot
)/move-if-change or1k
/mloop.cin or1k
/mloop.c
5312 @SIM_ENABLE_ARCH_or1k_TRUE@
$(AM_V_at
)touch
$@
5314 @SIM_ENABLE_ARCH_or1k_TRUE@or1k
/cgen
: or1k
/cgen-arch or1k
/cgen-cpu-decode
5316 @SIM_ENABLE_ARCH_or1k_TRUE@or1k
/cgen-arch
:
5317 @SIM_ENABLE_ARCH_or1k_TRUE@
$(AM_V_GEN
)mach
=or32
,or32nd FLAGS
="with-scache"; $(CGEN_GEN_ARCH
)
5318 @SIM_ENABLE_ARCH_or1k_TRUE@or1k
/arch.h or1k
/arch.c or1k
/cpuall.h
: @CGEN_MAINT@ or1k
/cgen-arch
5320 @SIM_ENABLE_ARCH_or1k_TRUE@or1k
/cgen-cpu-decode
:
5321 @SIM_ENABLE_ARCH_or1k_TRUE@
$(AM_V_GEN
)cpu
=or1k32bf mach
=or32
,or32nd FLAGS
="with-scache" EXTRAFILES
="$(CGEN_CPU_SEM) $(CGEN_CPU_SEMSW)"; $(CGEN_GEN_CPU_DECODE
)
5322 @SIM_ENABLE_ARCH_or1k_TRUE@or1k
/cpu.h or1k
/cpu.c or1k
/model.c or1k
/sem.c or1k
/sem-switch.c or1k
/decode.c or1k
/decode.h
: @CGEN_MAINT@ or1k
/cgen-cpu-decode
5324 @SIM_ENABLE_ARCH_ppc_TRUE@ppc
/psim
$(EXEEXT
): ppc
/run
$(EXEEXT
)
5325 @SIM_ENABLE_ARCH_ppc_TRUE@
$(AM_V_GEN
)ln
$< $@
2>/dev
/null ||
$(LN_S
) $< $@
2>/dev
/null || cp
-p
$< $@
5327 @SIM_ENABLE_ARCH_ppc_TRUE@ppc
/%.o
: ppc
/%.c | ppc
/libsim.a
$(SIM_ALL_RECURSIVE_DEPS
)
5328 @SIM_ENABLE_ARCH_ppc_TRUE@
$(MAKE
) $(AM_MAKEFLAGS
) -C
$(@D
) $(@F
)
5330 @SIM_ENABLE_ARCH_ppc_TRUE@ppc
/spreg.c
: @MAINT@ ppc
/ppc-spr-table ppc
/spreg-gen.py ppc
/$(am__dirstamp
)
5331 @SIM_ENABLE_ARCH_ppc_TRUE@
$(AM_V_GEN
)$(srcdir)/ppc
/spreg-gen.py
--source
$@.tmp
5332 @SIM_ENABLE_ARCH_ppc_TRUE@
$(AM_V_at
)$(SHELL
) $(srcroot
)/move-if-change
$@.tmp
$(srcdir)/ppc
/spreg.c
5333 @SIM_ENABLE_ARCH_ppc_TRUE@
$(AM_V_at
)touch
$(srcdir)/ppc
/spreg.c
5335 @SIM_ENABLE_ARCH_ppc_TRUE@ppc
/spreg.h
: @MAINT@ ppc
/ppc-spr-table ppc
/spreg-gen.py ppc
/$(am__dirstamp
)
5336 @SIM_ENABLE_ARCH_ppc_TRUE@
$(AM_V_GEN
)$(srcdir)/ppc
/spreg-gen.py
--header
$@.tmp
5337 @SIM_ENABLE_ARCH_ppc_TRUE@
$(AM_V_at
)$(SHELL
) $(srcroot
)/move-if-change
$@.tmp
$(srcdir)/ppc
/spreg.h
5338 @SIM_ENABLE_ARCH_ppc_TRUE@
$(AM_V_at
)touch
$(srcdir)/ppc
/spreg.h
5339 @SIM_ENABLE_ARCH_pru_TRUE@
$(pru_libsim_a_OBJECTS
) $(pru_libsim_a_LIBADD
): pru
/hw-config.h
5341 @SIM_ENABLE_ARCH_pru_TRUE@pru
/%.o
: common
/%.c
; $(SIM_COMPILE
)
5342 @SIM_ENABLE_ARCH_pru_TRUE@
-@am__include@ pru
/$(DEPDIR
)/*.Po
5343 @SIM_ENABLE_ARCH_riscv_TRUE@
$(riscv_libsim_a_OBJECTS
) $(riscv_libsim_a_LIBADD
): riscv
/hw-config.h
5345 @SIM_ENABLE_ARCH_riscv_TRUE@riscv
/%.o
: common
/%.c
; $(SIM_COMPILE
)
5346 @SIM_ENABLE_ARCH_riscv_TRUE@
-@am__include@ riscv
/$(DEPDIR
)/*.Po
5347 @SIM_ENABLE_ARCH_rl78_TRUE@
$(rl78_libsim_a_OBJECTS
) $(rl78_libsim_a_LIBADD
): rl78
/hw-config.h
5349 @SIM_ENABLE_ARCH_rl78_TRUE@rl78
/%.o
: common
/%.c
; $(SIM_COMPILE
)
5350 @SIM_ENABLE_ARCH_rl78_TRUE@
-@am__include@ rl78
/$(DEPDIR
)/*.Po
5351 @SIM_ENABLE_ARCH_rx_TRUE@
$(rx_libsim_a_OBJECTS
) $(rx_libsim_a_LIBADD
): rx
/hw-config.h
5353 @SIM_ENABLE_ARCH_rx_TRUE@rx
/%.o
: common
/%.c
; $(SIM_COMPILE
)
5354 @SIM_ENABLE_ARCH_rx_TRUE@
-@am__include@ rx
/$(DEPDIR
)/*.Po
5355 @SIM_ENABLE_ARCH_sh_TRUE@
$(sh_libsim_a_OBJECTS
) $(sh_libsim_a_LIBADD
): sh
/hw-config.h
5357 @SIM_ENABLE_ARCH_sh_TRUE@sh
/%.o
: common
/%.c
; $(SIM_COMPILE
)
5358 @SIM_ENABLE_ARCH_sh_TRUE@
-@am__include@ sh
/$(DEPDIR
)/*.Po
5359 @SIM_ENABLE_ARCH_sh_TRUE@sh
/modules.c
: |
$(sh_BUILD_OUTPUTS
)
5361 # These rules are copied from automake, but tweaked to use FOR_BUILD variables.
5362 @SIM_ENABLE_ARCH_sh_TRUE@sh
/gencode
$(EXEEXT
): $(sh_gencode_OBJECTS
) $(sh_gencode_DEPENDENCIES
) sh
/$(am__dirstamp
)
5363 @SIM_ENABLE_ARCH_sh_TRUE@
$(AM_V_CCLD
)$(LINK_FOR_BUILD
) $(sh_gencode_OBJECTS
) $(sh_gencode_LDADD
)
5365 # gencode is a build-time only tool. Override the default rules for it.
5366 @SIM_ENABLE_ARCH_sh_TRUE@sh
/gencode.o
: sh
/gencode.c
5367 @SIM_ENABLE_ARCH_sh_TRUE@
$(AM_V_CC
)$(COMPILE_FOR_BUILD
) -c
$< -o
$@
5369 @SIM_ENABLE_ARCH_sh_TRUE@sh
/code.c
: sh
/gencode
$(EXEEXT
)
5370 @SIM_ENABLE_ARCH_sh_TRUE@
$(AM_V_GEN
)$< -x
>$@
5372 @SIM_ENABLE_ARCH_sh_TRUE@sh
/ppi.c
: sh
/gencode
$(EXEEXT
)
5373 @SIM_ENABLE_ARCH_sh_TRUE@
$(AM_V_GEN
)$< -p
>$@
5375 @SIM_ENABLE_ARCH_sh_TRUE@sh
/table.c
: sh
/gencode
$(EXEEXT
)
5376 @SIM_ENABLE_ARCH_sh_TRUE@
$(AM_V_GEN
)$< -s
>$@
5377 @SIM_ENABLE_ARCH_v850_TRUE@
$(v850_libsim_a_OBJECTS
) $(v850_libsim_a_LIBADD
): v850
/hw-config.h
5379 @SIM_ENABLE_ARCH_v850_TRUE@v850
/%.o
: common
/%.c
; $(SIM_COMPILE
)
5380 @SIM_ENABLE_ARCH_v850_TRUE@
-@am__include@ v850
/$(DEPDIR
)/*.Po
5381 @SIM_ENABLE_ARCH_v850_TRUE@v850
/modules.c
: |
$(v850_BUILD_OUTPUTS
)
5383 @SIM_ENABLE_ARCH_v850_TRUE@
$(v850_BUILT_SRC_FROM_IGEN
): v850
/stamp-igen
5384 @SIM_ENABLE_ARCH_v850_TRUE@v850
/stamp-igen
: $(v850_IGEN_INSN
) $(v850_IGEN_DC
) $(IGEN
)
5385 @SIM_ENABLE_ARCH_v850_TRUE@
$(AM_V_GEN
)$(IGEN_RUN
) \
5386 @SIM_ENABLE_ARCH_v850_TRUE@
$(v850_IGEN_TRACE
) \
5387 @SIM_ENABLE_ARCH_v850_TRUE@
-G gen-direct-access \
5388 @SIM_ENABLE_ARCH_v850_TRUE@
-G gen-zero-r0 \
5389 @SIM_ENABLE_ARCH_v850_TRUE@
-i
$(v850_IGEN_INSN
) \
5390 @SIM_ENABLE_ARCH_v850_TRUE@
-o
$(v850_IGEN_DC
) \
5391 @SIM_ENABLE_ARCH_v850_TRUE@
-x \
5392 @SIM_ENABLE_ARCH_v850_TRUE@
-n icache.h
-hc v850
/icache.h \
5393 @SIM_ENABLE_ARCH_v850_TRUE@
-n icache.c
-c v850
/icache.c \
5394 @SIM_ENABLE_ARCH_v850_TRUE@
-n semantics.h
-hs v850
/semantics.h \
5395 @SIM_ENABLE_ARCH_v850_TRUE@
-n semantics.c
-s v850
/semantics.c \
5396 @SIM_ENABLE_ARCH_v850_TRUE@
-n idecode.h
-hd v850
/idecode.h \
5397 @SIM_ENABLE_ARCH_v850_TRUE@
-n idecode.c
-d v850
/idecode.c \
5398 @SIM_ENABLE_ARCH_v850_TRUE@
-n model.h
-hm v850
/model.h \
5399 @SIM_ENABLE_ARCH_v850_TRUE@
-n model.c
-m v850
/model.c \
5400 @SIM_ENABLE_ARCH_v850_TRUE@
-n support.h
-hf v850
/support.h \
5401 @SIM_ENABLE_ARCH_v850_TRUE@
-n support.c
-f v850
/support.c \
5402 @SIM_ENABLE_ARCH_v850_TRUE@
-n itable.h
-ht v850
/itable.h \
5403 @SIM_ENABLE_ARCH_v850_TRUE@
-n itable.c
-t v850
/itable.c \
5404 @SIM_ENABLE_ARCH_v850_TRUE@
-n engine.h
-he v850
/engine.h \
5405 @SIM_ENABLE_ARCH_v850_TRUE@
-n engine.c
-e v850
/engine.c \
5406 @SIM_ENABLE_ARCH_v850_TRUE@
-n irun.c
-r v850
/irun.c
5407 @SIM_ENABLE_ARCH_v850_TRUE@
$(AM_V_at
)touch
$@
5409 all-recursive
: $(SIM_ALL_RECURSIVE_DEPS
)
5411 install-data-local
: installdirs $(SIM_INSTALL_DATA_LOCAL_DEPS
)
5412 $(AM_V_at
)$(MKDIR_P
) $(DESTDIR
)$(libdir)
5413 lib
=`echo sim | sed '$(program_transform_name)'`; \
5414 for d in
$(SIM_ENABLED_ARCHES
); do \
5416 [ "$(SIM_PRIMARY_TARGET)" = "$$d" ] || n
="$$n-$$d"; \
5418 $(INSTALL_DATA
) $$d/libsim.a
$(DESTDIR
)$(libdir)/$$n || exit
1; \
5421 install-exec-local
: installdirs $(SIM_INSTALL_EXEC_LOCAL_DEPS
)
5422 $(AM_V_at
)$(MKDIR_P
) $(DESTDIR
)$(bindir)
5423 run
=`echo run | sed '$(program_transform_name)'`; \
5424 for d in
$(SIM_ENABLED_ARCHES
); do \
5426 [ "$(SIM_PRIMARY_TARGET)" = "$$d" ] || n
="$$n-$$d"; \
5427 $(LIBTOOL
) --mode
=install \
5428 $(INSTALL_PROGRAM
) $$d/run
$(EXEEXT
) $(DESTDIR
)$(bindir)/$$n$(EXEEXT
) || exit
1; \
5431 uninstall-local
: $(SIM_UNINSTALL_LOCAL_DEPS
)
5432 rm -f
$(DESTDIR
)$(bindir)/run
$(DESTDIR
)$(libdir)/libsim.a
5433 for d in
$(SIM_ENABLED_ARCHES
); do \
5434 rm -f
$(DESTDIR
)$(bindir)/run-
$$d $(DESTDIR
)$(libdir)/libsim-
$$d.a
; \
5437 # Tell versions [3.59,3.63) of GNU make to not export all variables.
5438 # Otherwise a system limit (for SysV at least) may be exceeded.