sim/arm/wrapper.c

   1 /* run front end support for arm
   2    Copyright (C) 1995, 1996, 1997, 2000, 2001, 2002, 2007
   3    Free Software Foundation, Inc.
   4
   5    This file is part of ARM SIM.
   6
   7    GCC is free software; you can redistribute it and/or modify it
   8    under the terms of the GNU General Public License as published
   9    by the Free Software Foundation; either version 2, or (at your
  10    option) any later version.
  11
  12    GCC is distributed in the hope that it will be useful, but
  13    WITHOUT ANY WARRANTY; without even the implied warranty of
  14    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.   See
  15    the GNU General Public License for more details.
  16
  17    You should have received a copy of the GNU General Public
  18    License along with this program; if not, write to the Free
  19    Software Foundation, Inc., 51 Franklin Street - Fifth Floor,
  20    Boston, MA 02110-1301, USA.  */
  21
  22 /* This file provides the interface between the simulator and
  23    run.c and gdb (when the simulator is linked with gdb).
  24    All simulator interaction should go through this file.  */
  25
  26 #include <stdio.h>
  27 #include <stdarg.h>
  28 #include <string.h>
  29 #include <bfd.h>
  30 #include <signal.h>
  31 #include "gdb/callback.h"
  32 #include "gdb/remote-sim.h"
  33 #include "armdefs.h"
  34 #include "armemu.h"
  35 #include "dbg_rdi.h"
  36 #include "ansidecl.h"
  37 #include "sim-utils.h"
  38 #include "run-sim.h"
  39 #include "gdb/sim-arm.h"
  40 #include "gdb/signals.h"
  41
  42 host_callback *sim_callback;
  43
  44 static struct ARMul_State *state;
  45
  46 /* Who is using the simulator.  */
  47 static SIM_OPEN_KIND sim_kind;
  48
  49 /* argv[0] */
  50 static char *myname;
  51
  52 /* Memory size in bytes.  */
  53 static int mem_size = (1 << 21);
  54
  55 /* Non-zero to display start up banner, and maybe other things.  */
  56 static int verbosity;
  57
  58 /* Non-zero to set big endian mode.  */
  59 static int big_endian;
  60
  61 int stop_simulator;
  62
  63 /* Cirrus DSP registers.
  64
  65    We need to define these registers outside of maverick.c because
  66    maverick.c might not be linked in unless --target=arm9e-* in which
  67    case wrapper.c will not compile because it tries to access Cirrus
  68    registers.  This should all go away once we get the Cirrus and ARM
  69    Coprocessor to coexist in armcopro.c-- aldyh.  */
  70
  71 struct maverick_regs
  72 {
  73   union
  74   {
  75     int i;
  76     float f;
  77   } upper;
  78
  79   union
  80   {
  81     int i;
  82     float f;
  83   } lower;
  84 };
  85
  86 union maverick_acc_regs
  87 {
  88   long double ld;               /* Acc registers are 72-bits.  */
  89 };
  90
  91 struct maverick_regs     DSPregs[16];
  92 union maverick_acc_regs  DSPacc[4];
  93 ARMword DSPsc;
  94
  95 static void
  96 init ()
  97 {
  98   static int done;
  99
 100   if (!done)
 101     {
 102       ARMul_EmulateInit ();
 103       state = ARMul_NewState ();
 104       state->bigendSig = (big_endian ? HIGH : LOW);
 105       ARMul_MemoryInit (state, mem_size);
 106       ARMul_OSInit (state);
 107       state->verbose = verbosity;
 108       done = 1;
 109     }
 110 }
 111
 112 /* Set verbosity level of simulator.
 113    This is not intended to produce detailed tracing or debugging information.
 114    Just summaries.  */
 115 /* FIXME: common/run.c doesn't do this yet.  */
 116
 117 void
 118 sim_set_verbose (v)
 119      int v;
 120 {
 121   verbosity = v;
 122 }
 123
 124 /* Set the memory size to SIZE bytes.
 125    Must be called before initializing simulator.  */
 126 /* FIXME: Rename to sim_set_mem_size.  */
 127
 128 void
 129 sim_size (size)
 130      int size;
 131 {
 132   mem_size = size;
 133 }
 134
 135 void
 136 ARMul_ConsolePrint VPARAMS ((ARMul_State * state,
 137                              const char * format,
 138                              ...))
 139 {
 140   va_list ap;
 141
 142   if (state->verbose)
 143     {
 144       va_start (ap, format);
 145       vprintf (format, ap);
 146       va_end (ap);
 147     }
 148 }
 149
 150 ARMword
 151 ARMul_Debug (state, pc, instr)
 152      ARMul_State * state ATTRIBUTE_UNUSED;
 153      ARMword       pc    ATTRIBUTE_UNUSED;
 154      ARMword       instr ATTRIBUTE_UNUSED;
 155 {
 156   return 0;
 157 }
 158
 159 int
 160 sim_write (sd, addr, buffer, size)
 161      SIM_DESC sd ATTRIBUTE_UNUSED;
 162      SIM_ADDR addr;
 163      unsigned char * buffer;
 164      int size;
 165 {
 166   int i;
 167
 168   init ();
 169
 170   for (i = 0; i < size; i++)
 171     ARMul_SafeWriteByte (state, addr + i, buffer[i]);
 172
 173   return size;
 174 }
 175
 176 int
 177 sim_read (sd, addr, buffer, size)
 178      SIM_DESC sd ATTRIBUTE_UNUSED;
 179      SIM_ADDR addr;
 180      unsigned char * buffer;
 181      int size;
 182 {
 183   int i;
 184
 185   init ();
 186
 187   for (i = 0; i < size; i++)
 188     buffer[i] = ARMul_SafeReadByte (state, addr + i);
 189
 190   return size;
 191 }
 192
 193 int
 194 sim_trace (sd)
 195      SIM_DESC sd ATTRIBUTE_UNUSED;
 196 {
 197   (*sim_callback->printf_filtered)
 198     (sim_callback,
 199      "This simulator does not support tracing\n");
 200   return 1;
 201 }
 202
 203 int
 204 sim_stop (sd)
 205      SIM_DESC sd ATTRIBUTE_UNUSED;
 206 {
 207   state->Emulate = STOP;
 208   stop_simulator = 1;
 209   return 1;
 210 }
 211
 212 void
 213 sim_resume (sd, step, siggnal)
 214      SIM_DESC sd ATTRIBUTE_UNUSED;
 215      int step;
 216      int siggnal ATTRIBUTE_UNUSED;
 217 {
 218   state->EndCondition = 0;
 219   stop_simulator = 0;
 220
 221   if (step)
 222     {
 223       state->Reg[15] = ARMul_DoInstr (state);
 224       if (state->EndCondition == 0)
 225         state->EndCondition = RDIError_BreakpointReached;
 226     }
 227   else
 228     {
 229       state->NextInstr = RESUME;        /* treat as PC change */
 230       state->Reg[15] = ARMul_DoProg (state);
 231     }
 232
 233   FLUSHPIPE;
 234 }
 235
 236 SIM_RC
 237 sim_create_inferior (sd, abfd, argv, env)
 238      SIM_DESC sd ATTRIBUTE_UNUSED;
 239      struct bfd * abfd;
 240      char ** argv;
 241      char ** env;
 242 {
 243   int argvlen = 0;
 244   int mach;
 245   char **arg;
 246
 247   if (abfd != NULL)
 248     ARMul_SetPC (state, bfd_get_start_address (abfd));
 249   else
 250     ARMul_SetPC (state, 0);     /* ??? */
 251
 252   mach = bfd_get_mach (abfd);
 253
 254   switch (mach)
 255     {
 256     default:
 257       (*sim_callback->printf_filtered)
 258         (sim_callback,
 259          "Unknown machine type '%d'; please update sim_create_inferior.\n",
 260          mach);
 261       /* fall through */
 262
 263     case 0:
 264       /* We wouldn't set the machine type with earlier toolchains, so we
 265          explicitly select a processor capable of supporting all ARMs in
 266          32bit mode.  */
 267       /* We choose the XScale rather than the iWMMXt, because the iWMMXt
 268          removes the FPE emulator, since it conflicts with its coprocessors.
 269          For the most generic ARM support, we want the FPE emulator in place.  */
 270     case bfd_mach_arm_XScale:
 271       ARMul_SelectProcessor (state, ARM_v5_Prop | ARM_v5e_Prop | ARM_XScale_Prop | ARM_v6_Prop);
 272       break;
 273
 274     case bfd_mach_arm_iWMMXt:
 275       {
 276         extern int SWI_vector_installed;
 277         ARMword i;
 278
 279         if (! SWI_vector_installed)
 280           {
 281             /* Intialise the hardware vectors to zero.  */
 282             if (! SWI_vector_installed)
 283               for (i = ARMul_ResetV; i <= ARMFIQV; i += 4)
 284                 ARMul_WriteWord (state, i, 0);
 285
 286             /* ARM_WriteWord will have detected the write to the SWI vector,
 287                but we want SWI_vector_installed to remain at 0 so that thumb
 288                mode breakpoints will work.  */
 289             SWI_vector_installed = 0;
 290           }
 291       }
 292       ARMul_SelectProcessor (state, ARM_v5_Prop | ARM_v5e_Prop | ARM_XScale_Prop | ARM_iWMMXt_Prop);
 293       break;
 294
 295     case bfd_mach_arm_ep9312:
 296       ARMul_SelectProcessor (state, ARM_v4_Prop | ARM_ep9312_Prop);
 297       break;
 298
 299     case bfd_mach_arm_5:
 300       if (bfd_family_coff (abfd))
 301         {
 302           /* This is a special case in order to support COFF based ARM toolchains.
 303              The COFF header does not have enough room to store all the different
 304              kinds of ARM cpu, so the XScale, v5T and v5TE architectures all default
 305              to v5.  (See coff_set_flags() in bdf/coffcode.h).  So if we see a v5
 306              machine type here, we assume it could be any of the above architectures
 307              and so select the most feature-full.  */
 308           ARMul_SelectProcessor (state, ARM_v5_Prop | ARM_v5e_Prop | ARM_XScale_Prop);
 309           break;
 310         }
 311       /* Otherwise drop through.  */
 312
 313     case bfd_mach_arm_5T:
 314       ARMul_SelectProcessor (state, ARM_v5_Prop);
 315       break;
 316
 317     case bfd_mach_arm_5TE:
 318       ARMul_SelectProcessor (state, ARM_v5_Prop | ARM_v5e_Prop);
 319       break;
 320
 321     case bfd_mach_arm_4:
 322     case bfd_mach_arm_4T:
 323       ARMul_SelectProcessor (state, ARM_v4_Prop);
 324       break;
 325
 326     case bfd_mach_arm_3:
 327     case bfd_mach_arm_3M:
 328       ARMul_SelectProcessor (state, ARM_Lock_Prop);
 329       break;
 330
 331     case bfd_mach_arm_2:
 332     case bfd_mach_arm_2a:
 333       ARMul_SelectProcessor (state, ARM_Fix26_Prop);
 334       break;
 335     }
 336
 337   if (   mach != bfd_mach_arm_3
 338       && mach != bfd_mach_arm_3M
 339       && mach != bfd_mach_arm_2
 340       && mach != bfd_mach_arm_2a)
 341     {
 342       /* Reset mode to ARM.  A gdb user may rerun a program that had entered
 343          THUMB mode from the start and cause the ARM-mode startup code to be
 344          executed in THUMB mode.  */
 345       ARMul_SetCPSR (state, SVC32MODE);
 346     }
 347
 348   if (argv != NULL)
 349     {
 350       /* Set up the command line by laboriously stringing together
 351          the environment carefully picked apart by our caller.  */
 352
 353       /* Free any old stuff.  */
 354       if (state->CommandLine != NULL)
 355         {
 356           free (state->CommandLine);
 357           state->CommandLine = NULL;
 358         }
 359
 360       /* See how much we need.  */
 361       for (arg = argv; *arg != NULL; arg++)
 362         argvlen += strlen (*arg) + 1;
 363
 364       /* Allocate it.  */
 365       state->CommandLine = malloc (argvlen + 1);
 366       if (state->CommandLine != NULL)
 367         {
 368           arg = argv;
 369           state->CommandLine[0] = '\0';
 370
 371           for (arg = argv; *arg != NULL; arg++)
 372             {
 373               strcat (state->CommandLine, *arg);
 374               strcat (state->CommandLine, " ");
 375             }
 376         }
 377     }
 378
 379   if (env != NULL)
 380     {
 381       /* Now see if there's a MEMSIZE spec in the environment.  */
 382       while (*env)
 383         {
 384           if (strncmp (*env, "MEMSIZE=", sizeof ("MEMSIZE=") - 1) == 0)
 385             {
 386               char *end_of_num;
 387
 388               /* Set up memory limit.  */
 389               state->MemSize =
 390                 strtoul (*env + sizeof ("MEMSIZE=") - 1, &end_of_num, 0);
 391             }
 392           env++;
 393         }
 394     }
 395
 396   return SIM_RC_OK;
 397 }
 398
 399 void
 400 sim_info (sd, verbose)
 401      SIM_DESC sd ATTRIBUTE_UNUSED;
 402      int verbose ATTRIBUTE_UNUSED;
 403 {
 404 }
 405
 406 static int
 407 frommem (state, memory)
 408      struct ARMul_State *state;
 409      unsigned char *memory;
 410 {
 411   if (state->bigendSig == HIGH)
 412     return (memory[0] << 24) | (memory[1] << 16)
 413       | (memory[2] << 8) | (memory[3] << 0);
 414   else
 415     return (memory[3] << 24) | (memory[2] << 16)
 416       | (memory[1] << 8) | (memory[0] << 0);
 417 }
 418
 419 static void
 420 tomem (state, memory, val)
 421      struct ARMul_State *state;
 422      unsigned char *memory;
 423      int val;
 424 {
 425   if (state->bigendSig == HIGH)
 426     {
 427       memory[0] = val >> 24;
 428       memory[1] = val >> 16;
 429       memory[2] = val >> 8;
 430       memory[3] = val >> 0;
 431     }
 432   else
 433     {
 434       memory[3] = val >> 24;
 435       memory[2] = val >> 16;
 436       memory[1] = val >> 8;
 437       memory[0] = val >> 0;
 438     }
 439 }
 440
 441 int
 442 sim_store_register (sd, rn, memory, length)
 443      SIM_DESC sd ATTRIBUTE_UNUSED;
 444      int rn;
 445      unsigned char *memory;
 446      int length ATTRIBUTE_UNUSED;
 447 {
 448   init ();
 449
 450   switch ((enum sim_arm_regs) rn)
 451     {
 452     case SIM_ARM_R0_REGNUM:
 453     case SIM_ARM_R1_REGNUM:
 454     case SIM_ARM_R2_REGNUM:
 455     case SIM_ARM_R3_REGNUM:
 456     case SIM_ARM_R4_REGNUM:
 457     case SIM_ARM_R5_REGNUM:
 458     case SIM_ARM_R6_REGNUM:
 459     case SIM_ARM_R7_REGNUM:
 460     case SIM_ARM_R8_REGNUM:
 461     case SIM_ARM_R9_REGNUM:
 462     case SIM_ARM_R10_REGNUM:
 463     case SIM_ARM_R11_REGNUM:
 464     case SIM_ARM_R12_REGNUM:
 465     case SIM_ARM_R13_REGNUM:
 466     case SIM_ARM_R14_REGNUM:
 467     case SIM_ARM_R15_REGNUM: /* PC */
 468     case SIM_ARM_FP0_REGNUM:
 469     case SIM_ARM_FP1_REGNUM:
 470     case SIM_ARM_FP2_REGNUM:
 471     case SIM_ARM_FP3_REGNUM:
 472     case SIM_ARM_FP4_REGNUM:
 473     case SIM_ARM_FP5_REGNUM:
 474     case SIM_ARM_FP6_REGNUM:
 475     case SIM_ARM_FP7_REGNUM:
 476     case SIM_ARM_FPS_REGNUM:
 477       ARMul_SetReg (state, state->Mode, rn, frommem (state, memory));
 478       break;
 479
 480     case SIM_ARM_PS_REGNUM:
 481       state->Cpsr = frommem (state, memory);
 482       ARMul_CPSRAltered (state);
 483       break;
 484
 485     case SIM_ARM_MAVERIC_COP0R0_REGNUM:
 486     case SIM_ARM_MAVERIC_COP0R1_REGNUM:
 487     case SIM_ARM_MAVERIC_COP0R2_REGNUM:
 488     case SIM_ARM_MAVERIC_COP0R3_REGNUM:
 489     case SIM_ARM_MAVERIC_COP0R4_REGNUM:
 490     case SIM_ARM_MAVERIC_COP0R5_REGNUM:
 491     case SIM_ARM_MAVERIC_COP0R6_REGNUM:
 492     case SIM_ARM_MAVERIC_COP0R7_REGNUM:
 493     case SIM_ARM_MAVERIC_COP0R8_REGNUM:
 494     case SIM_ARM_MAVERIC_COP0R9_REGNUM:
 495     case SIM_ARM_MAVERIC_COP0R10_REGNUM:
 496     case SIM_ARM_MAVERIC_COP0R11_REGNUM:
 497     case SIM_ARM_MAVERIC_COP0R12_REGNUM:
 498     case SIM_ARM_MAVERIC_COP0R13_REGNUM:
 499     case SIM_ARM_MAVERIC_COP0R14_REGNUM:
 500     case SIM_ARM_MAVERIC_COP0R15_REGNUM:
 501       memcpy (& DSPregs [rn - SIM_ARM_MAVERIC_COP0R0_REGNUM],
 502               memory, sizeof (struct maverick_regs));
 503       return sizeof (struct maverick_regs);
 504
 505     case SIM_ARM_MAVERIC_DSPSC_REGNUM:
 506       memcpy (&DSPsc, memory, sizeof DSPsc);
 507       return sizeof DSPsc;
 508
 509     case SIM_ARM_IWMMXT_COP0R0_REGNUM:
 510     case SIM_ARM_IWMMXT_COP0R1_REGNUM:
 511     case SIM_ARM_IWMMXT_COP0R2_REGNUM:
 512     case SIM_ARM_IWMMXT_COP0R3_REGNUM:
 513     case SIM_ARM_IWMMXT_COP0R4_REGNUM:
 514     case SIM_ARM_IWMMXT_COP0R5_REGNUM:
 515     case SIM_ARM_IWMMXT_COP0R6_REGNUM:
 516     case SIM_ARM_IWMMXT_COP0R7_REGNUM:
 517     case SIM_ARM_IWMMXT_COP0R8_REGNUM:
 518     case SIM_ARM_IWMMXT_COP0R9_REGNUM:
 519     case SIM_ARM_IWMMXT_COP0R10_REGNUM:
 520     case SIM_ARM_IWMMXT_COP0R11_REGNUM:
 521     case SIM_ARM_IWMMXT_COP0R12_REGNUM:
 522     case SIM_ARM_IWMMXT_COP0R13_REGNUM:
 523     case SIM_ARM_IWMMXT_COP0R14_REGNUM:
 524     case SIM_ARM_IWMMXT_COP0R15_REGNUM:
 525     case SIM_ARM_IWMMXT_COP1R0_REGNUM:
 526     case SIM_ARM_IWMMXT_COP1R1_REGNUM:
 527     case SIM_ARM_IWMMXT_COP1R2_REGNUM:
 528     case SIM_ARM_IWMMXT_COP1R3_REGNUM:
 529     case SIM_ARM_IWMMXT_COP1R4_REGNUM:
 530     case SIM_ARM_IWMMXT_COP1R5_REGNUM:
 531     case SIM_ARM_IWMMXT_COP1R6_REGNUM:
 532     case SIM_ARM_IWMMXT_COP1R7_REGNUM:
 533     case SIM_ARM_IWMMXT_COP1R8_REGNUM:
 534     case SIM_ARM_IWMMXT_COP1R9_REGNUM:
 535     case SIM_ARM_IWMMXT_COP1R10_REGNUM:
 536     case SIM_ARM_IWMMXT_COP1R11_REGNUM:
 537     case SIM_ARM_IWMMXT_COP1R12_REGNUM:
 538     case SIM_ARM_IWMMXT_COP1R13_REGNUM:
 539     case SIM_ARM_IWMMXT_COP1R14_REGNUM:
 540     case SIM_ARM_IWMMXT_COP1R15_REGNUM:
 541       return Store_Iwmmxt_Register (rn - SIM_ARM_IWMMXT_COP0R0_REGNUM, memory);
 542
 543     default:
 544       return 0;
 545     }
 546
 547   return -1;
 548 }
 549
 550 int
 551 sim_fetch_register (sd, rn, memory, length)
 552      SIM_DESC sd ATTRIBUTE_UNUSED;
 553      int rn;
 554      unsigned char *memory;
 555      int length ATTRIBUTE_UNUSED;
 556 {
 557   ARMword regval;
 558
 559   init ();
 560
 561   switch ((enum sim_arm_regs) rn)
 562     {
 563     case SIM_ARM_R0_REGNUM:
 564     case SIM_ARM_R1_REGNUM:
 565     case SIM_ARM_R2_REGNUM:
 566     case SIM_ARM_R3_REGNUM:
 567     case SIM_ARM_R4_REGNUM:
 568     case SIM_ARM_R5_REGNUM:
 569     case SIM_ARM_R6_REGNUM:
 570     case SIM_ARM_R7_REGNUM:
 571     case SIM_ARM_R8_REGNUM:
 572     case SIM_ARM_R9_REGNUM:
 573     case SIM_ARM_R10_REGNUM:
 574     case SIM_ARM_R11_REGNUM:
 575     case SIM_ARM_R12_REGNUM:
 576     case SIM_ARM_R13_REGNUM:
 577     case SIM_ARM_R14_REGNUM:
 578     case SIM_ARM_R15_REGNUM: /* PC */
 579       regval = ARMul_GetReg (state, state->Mode, rn);
 580       break;
 581
 582     case SIM_ARM_FP0_REGNUM:
 583     case SIM_ARM_FP1_REGNUM:
 584     case SIM_ARM_FP2_REGNUM:
 585     case SIM_ARM_FP3_REGNUM:
 586     case SIM_ARM_FP4_REGNUM:
 587     case SIM_ARM_FP5_REGNUM:
 588     case SIM_ARM_FP6_REGNUM:
 589     case SIM_ARM_FP7_REGNUM:
 590     case SIM_ARM_FPS_REGNUM:
 591       memset (memory, 0, length);
 592       return 0;
 593
 594     case SIM_ARM_PS_REGNUM:
 595       regval = ARMul_GetCPSR (state);
 596       break;
 597
 598     case SIM_ARM_MAVERIC_COP0R0_REGNUM:
 599     case SIM_ARM_MAVERIC_COP0R1_REGNUM:
 600     case SIM_ARM_MAVERIC_COP0R2_REGNUM:
 601     case SIM_ARM_MAVERIC_COP0R3_REGNUM:
 602     case SIM_ARM_MAVERIC_COP0R4_REGNUM:
 603     case SIM_ARM_MAVERIC_COP0R5_REGNUM:
 604     case SIM_ARM_MAVERIC_COP0R6_REGNUM:
 605     case SIM_ARM_MAVERIC_COP0R7_REGNUM:
 606     case SIM_ARM_MAVERIC_COP0R8_REGNUM:
 607     case SIM_ARM_MAVERIC_COP0R9_REGNUM:
 608     case SIM_ARM_MAVERIC_COP0R10_REGNUM:
 609     case SIM_ARM_MAVERIC_COP0R11_REGNUM:
 610     case SIM_ARM_MAVERIC_COP0R12_REGNUM:
 611     case SIM_ARM_MAVERIC_COP0R13_REGNUM:
 612     case SIM_ARM_MAVERIC_COP0R14_REGNUM:
 613     case SIM_ARM_MAVERIC_COP0R15_REGNUM:
 614       memcpy (memory, & DSPregs [rn - SIM_ARM_MAVERIC_COP0R0_REGNUM],
 615               sizeof (struct maverick_regs));
 616       return sizeof (struct maverick_regs);
 617
 618     case SIM_ARM_MAVERIC_DSPSC_REGNUM:
 619       memcpy (memory, & DSPsc, sizeof DSPsc);
 620       return sizeof DSPsc;
 621
 622     case SIM_ARM_IWMMXT_COP0R0_REGNUM:
 623     case SIM_ARM_IWMMXT_COP0R1_REGNUM:
 624     case SIM_ARM_IWMMXT_COP0R2_REGNUM:
 625     case SIM_ARM_IWMMXT_COP0R3_REGNUM:
 626     case SIM_ARM_IWMMXT_COP0R4_REGNUM:
 627     case SIM_ARM_IWMMXT_COP0R5_REGNUM:
 628     case SIM_ARM_IWMMXT_COP0R6_REGNUM:
 629     case SIM_ARM_IWMMXT_COP0R7_REGNUM:
 630     case SIM_ARM_IWMMXT_COP0R8_REGNUM:
 631     case SIM_ARM_IWMMXT_COP0R9_REGNUM:
 632     case SIM_ARM_IWMMXT_COP0R10_REGNUM:
 633     case SIM_ARM_IWMMXT_COP0R11_REGNUM:
 634     case SIM_ARM_IWMMXT_COP0R12_REGNUM:
 635     case SIM_ARM_IWMMXT_COP0R13_REGNUM:
 636     case SIM_ARM_IWMMXT_COP0R14_REGNUM:
 637     case SIM_ARM_IWMMXT_COP0R15_REGNUM:
 638     case SIM_ARM_IWMMXT_COP1R0_REGNUM:
 639     case SIM_ARM_IWMMXT_COP1R1_REGNUM:
 640     case SIM_ARM_IWMMXT_COP1R2_REGNUM:
 641     case SIM_ARM_IWMMXT_COP1R3_REGNUM:
 642     case SIM_ARM_IWMMXT_COP1R4_REGNUM:
 643     case SIM_ARM_IWMMXT_COP1R5_REGNUM:
 644     case SIM_ARM_IWMMXT_COP1R6_REGNUM:
 645     case SIM_ARM_IWMMXT_COP1R7_REGNUM:
 646     case SIM_ARM_IWMMXT_COP1R8_REGNUM:
 647     case SIM_ARM_IWMMXT_COP1R9_REGNUM:
 648     case SIM_ARM_IWMMXT_COP1R10_REGNUM:
 649     case SIM_ARM_IWMMXT_COP1R11_REGNUM:
 650     case SIM_ARM_IWMMXT_COP1R12_REGNUM:
 651     case SIM_ARM_IWMMXT_COP1R13_REGNUM:
 652     case SIM_ARM_IWMMXT_COP1R14_REGNUM:
 653     case SIM_ARM_IWMMXT_COP1R15_REGNUM:
 654       return Fetch_Iwmmxt_Register (rn - SIM_ARM_IWMMXT_COP0R0_REGNUM, memory);
 655
 656     default:
 657       return 0;
 658     }
 659
 660   while (length)
 661     {
 662       tomem (state, memory, regval);
 663
 664       length -= 4;
 665       memory += 4;
 666       regval = 0;
 667     }
 668
 669   return -1;
 670 }
 671
 672 #ifdef SIM_TARGET_SWITCHES
 673
 674 static void sim_target_parse_arg_array PARAMS ((char **));
 675
 676 typedef struct
 677 {
 678   char *        swi_option;
 679   unsigned int  swi_mask;
 680 } swi_options;
 681
 682 #define SWI_SWITCH      "--swi-support"
 683
 684 static swi_options options[] =
 685   {
 686     { "none",    0 },
 687     { "demon",   SWI_MASK_DEMON },
 688     { "angel",   SWI_MASK_ANGEL },
 689     { "redboot", SWI_MASK_REDBOOT },
 690     { "all",     -1 },
 691     { "NONE",    0 },
 692     { "DEMON",   SWI_MASK_DEMON },
 693     { "ANGEL",   SWI_MASK_ANGEL },
 694     { "REDBOOT", SWI_MASK_REDBOOT },
 695     { "ALL",     -1 }
 696   };
 697
 698
 699 int
 700 sim_target_parse_command_line (argc, argv)
 701      int argc;
 702      char ** argv;
 703 {
 704   int i;
 705
 706   for (i = 1; i < argc; i++)
 707     {
 708       char * ptr = argv[i];
 709       int arg;
 710
 711       if ((ptr == NULL) || (* ptr != '-'))
 712         break;
 713
 714       if (strncmp (ptr, SWI_SWITCH, sizeof SWI_SWITCH - 1) != 0)
 715         continue;
 716
 717       if (ptr[sizeof SWI_SWITCH - 1] == 0)
 718         {
 719           /* Remove this option from the argv array.  */
 720           for (arg = i; arg < argc; arg ++)
 721             argv[arg] = argv[arg + 1];
 722           argc --;
 723
 724           ptr = argv[i];
 725         }
 726       else
 727         ptr += sizeof SWI_SWITCH;
 728
 729       swi_mask = 0;
 730
 731       while (* ptr)
 732         {
 733           int i;
 734
 735           for (i = sizeof options / sizeof options[0]; i--;)
 736             if (strncmp (ptr, options[i].swi_option,
 737                          strlen (options[i].swi_option)) == 0)
 738               {
 739                 swi_mask |= options[i].swi_mask;
 740                 ptr += strlen (options[i].swi_option);
 741
 742                 if (* ptr == ',')
 743                   ++ ptr;
 744
 745                 break;
 746               }
 747
 748           if (i < 0)
 749             break;
 750         }
 751
 752       if (* ptr != 0)
 753         fprintf (stderr, "Ignoring swi options: %s\n", ptr);
 754
 755       /* Remove this option from the argv array.  */
 756       for (arg = i; arg < argc; arg ++)
 757         argv[arg] = argv[arg + 1];
 758       argc --;
 759       i --;
 760     }
 761   return argc;
 762 }
 763
 764 static void
 765 sim_target_parse_arg_array (argv)
 766      char ** argv;
 767 {
 768   int i;
 769
 770   for (i = 0; argv[i]; i++)
 771     ;
 772
 773   return (void) sim_target_parse_command_line (i, argv);
 774 }
 775
 776 void
 777 sim_target_display_usage ()
 778 {
 779   fprintf (stderr, "%s=<list>  Comma seperated list of SWI protocols to supoport.\n\
 780                 This list can contain: NONE, DEMON, ANGEL, REDBOOT and/or ALL.\n",
 781            SWI_SWITCH);
 782 }
 783 #endif
 784
 785 SIM_DESC
 786 sim_open (kind, ptr, abfd, argv)
 787      SIM_OPEN_KIND kind;
 788      host_callback *ptr;
 789      struct bfd *abfd;
 790      char **argv;
 791 {
 792   sim_kind = kind;
 793   if (myname) free (myname);
 794   myname = (char *) xstrdup (argv[0]);
 795   sim_callback = ptr;
 796
 797 #ifdef SIM_TARGET_SWITCHES
 798   sim_target_parse_arg_array (argv);
 799 #endif
 800
 801   /* Decide upon the endian-ness of the processor.
 802      If we can, get the information from the bfd itself.
 803      Otherwise look to see if we have been given a command
 804      line switch that tells us.  Otherwise default to little endian.  */
 805   if (abfd != NULL)
 806     big_endian = bfd_big_endian (abfd);
 807   else if (argv[1] != NULL)
 808     {
 809       int i;
 810
 811       /* Scan for endian-ness and memory-size switches.  */
 812       for (i = 0; (argv[i] != NULL) && (argv[i][0] != 0); i++)
 813         if (argv[i][0] == '-' && argv[i][1] == 'E')
 814           {
 815             char c;
 816
 817             if ((c = argv[i][2]) == 0)
 818               {
 819                 ++i;
 820                 c = argv[i][0];
 821               }
 822
 823             switch (c)
 824               {
 825               case 0:
 826                 sim_callback->printf_filtered
 827                   (sim_callback, "No argument to -E option provided\n");
 828                 break;
 829
 830               case 'b':
 831               case 'B':
 832                 big_endian = 1;
 833                 break;
 834
 835               case 'l':
 836               case 'L':
 837                 big_endian = 0;
 838                 break;
 839
 840               default:
 841                 sim_callback->printf_filtered
 842                   (sim_callback, "Unrecognised argument to -E option\n");
 843                 break;
 844               }
 845           }
 846         else if (argv[i][0] == '-' && argv[i][1] == 'm')
 847           {
 848             if (argv[i][2] != '\0')
 849               sim_size (atoi (&argv[i][2]));
 850             else if (argv[i + 1] != NULL)
 851               {
 852                 sim_size (atoi (argv[i + 1]));
 853                 i++;
 854               }
 855             else
 856               {
 857                 sim_callback->printf_filtered (sim_callback,
 858                                                "Missing argument to -m option\n");
 859                 return NULL;
 860               }
 861
 862           }
 863     }
 864
 865   return (SIM_DESC) 1;
 866 }
 867
 868 void
 869 sim_close (sd, quitting)
 870      SIM_DESC sd ATTRIBUTE_UNUSED;
 871      int quitting ATTRIBUTE_UNUSED;
 872 {
 873   if (myname)
 874     free (myname);
 875   myname = NULL;
 876 }
 877
 878 SIM_RC
 879 sim_load (sd, prog, abfd, from_tty)
 880      SIM_DESC sd;
 881      char *prog;
 882      bfd *abfd;
 883      int from_tty ATTRIBUTE_UNUSED;
 884 {
 885   bfd *prog_bfd;
 886
 887   prog_bfd = sim_load_file (sd, myname, sim_callback, prog, abfd,
 888                             sim_kind == SIM_OPEN_DEBUG, 0, sim_write);
 889   if (prog_bfd == NULL)
 890     return SIM_RC_FAIL;
 891   ARMul_SetPC (state, bfd_get_start_address (prog_bfd));
 892   if (abfd == NULL)
 893     bfd_close (prog_bfd);
 894   return SIM_RC_OK;
 895 }
 896
 897 void
 898 sim_stop_reason (sd, reason, sigrc)
 899      SIM_DESC sd ATTRIBUTE_UNUSED;
 900      enum sim_stop *reason;
 901      int *sigrc;
 902 {
 903   if (stop_simulator)
 904     {
 905       *reason = sim_stopped;
 906       *sigrc = TARGET_SIGNAL_INT;
 907     }
 908   else if (state->EndCondition == 0)
 909     {
 910       *reason = sim_exited;
 911       *sigrc = state->Reg[0] & 255;
 912     }
 913   else
 914     {
 915       *reason = sim_stopped;
 916       if (state->EndCondition == RDIError_BreakpointReached)
 917         *sigrc = TARGET_SIGNAL_TRAP;
 918       else if (   state->EndCondition == RDIError_DataAbort
 919                || state->EndCondition == RDIError_AddressException)
 920         *sigrc = TARGET_SIGNAL_BUS;
 921       else
 922         *sigrc = 0;
 923     }
 924 }
 925
 926 void
 927 sim_do_command (sd, cmd)
 928      SIM_DESC sd ATTRIBUTE_UNUSED;
 929      char *cmd ATTRIBUTE_UNUSED;
 930 {
 931   (*sim_callback->printf_filtered)
 932     (sim_callback,
 933      "This simulator does not accept any commands.\n");
 934 }
 935
 936 void
 937 sim_set_callbacks (ptr)
 938      host_callback *ptr;
 939 {
 940   sim_callback = ptr;
 941 }