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1 # Makefile template for Configure for the CRIS simulator, based on a mix
2 # of the ones for m32r and i960.
3 #
4 # Copyright (C) 2004-2015 Free Software Foundation, Inc.
5 # Contributed by Axis Communications.
6 #
7 # This program is free software; you can redistribute it and/or modify
8 # it under the terms of the GNU General Public License as published by
9 # the Free Software Foundation; either version 3 of the License, or
10 # (at your option) any later version.
11 #
12 # This program is distributed in the hope that it will be useful,
13 # but WITHOUT ANY WARRANTY; without even the implied warranty of
14 # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 # GNU General Public License for more details.
16 #
17 # You should have received a copy of the GNU General Public License
18 # along with this program. If not, see <http://www.gnu.org/licenses/>.
19
20 ## COMMON_PRE_CONFIG_FRAG
21
22 CRISV10F_OBJS = crisv10f.o cpuv10.o decodev10.o modelv10.o mloopv10f.o
23 CRISV32F_OBJS = crisv32f.o cpuv32.o decodev32.o modelv32.o mloopv32f.o
24
25 CONFIG_DEVICES =
26
27 SIM_OBJS = \
28 $(SIM_NEW_COMMON_OBJS) \
29 sim-cpu.o \
30 sim-hrw.o \
31 sim-model.o \
32 sim-reg.o \
33 cgen-utils.o cgen-trace.o cgen-scache.o \
34 cgen-run.o sim-reason.o sim-engine.o sim-stop.o \
35 sim-if.o arch.o \
36 $(CRISV10F_OBJS) \
37 $(CRISV32F_OBJS) \
38 traps.o devices.o \
39 $(CONFIG_DEVICES) \
40 cris-desc.o
41
42 # Extra headers included by sim-main.h.
43 # FIXME: $(srccom)/cgen-ops.h should be in CGEN_INCLUDE_DEPS.
44 SIM_EXTRA_DEPS = \
45 $(CGEN_INCLUDE_DEPS) $(srccom)/cgen-ops.h \
46 arch.h cpuall.h cris-sim.h cris-desc.h
47
48 SIM_EXTRA_CLEAN = cris-clean
49
50 # This selects the cris newlib/libgloss syscall definitions.
51 NL_TARGET = -DNL_TARGET_cris
52
53 ## COMMON_POST_CONFIG_FRAG
54
55 CGEN_CPU_DIR = $(CGENDIR)/../cpu
56
57 arch = cris
58
59 sim-if.o: sim-if.c $(SIM_MAIN_DEPS) $(sim-core_h) $(sim-options_h)
60
61 # Needs CPU-specific knowledge.
62 dv-cris.o: dv-cris.c $(SIM_MAIN_DEPS) $(sim-core_h)
63
64 # This is the same rule as dv-core.o etc.
65 dv-rv.o: dv-rv.c $(hw_main_headers) $(sim_main_headers)
66
67 arch.o: arch.c $(SIM_MAIN_DEPS)
68
69 traps.o: traps.c targ-vals.h $(SIM_MAIN_DEPS) $(sim-options_h)
70 devices.o: devices.c $(SIM_MAIN_DEPS)
71
72 # rvdummy is just used for testing. It does nothing if
73 # --enable-sim-hardware isn't active.
74
75 all: rvdummy$(EXEEXT)
76
77 check: rvdummy$(EXEEXT)
78
79 rvdummy$(EXEEXT): rvdummy.o $(EXTRA_LIBDEPS)
80 $(CC) $(ALL_CFLAGS) -o rvdummy$(EXEEXT) rvdummy.o $(EXTRA_LIBS)
81
82 rvdummy.o: rvdummy.c config.h tconfig.h $(remote_sim_h) $(callback_h)
83
84 # CRISV10 objs
85
86 CRISV10F_INCLUDE_DEPS = \
87 $(CGEN_MAIN_CPU_DEPS) \
88 cpuv10.h decodev10.h engv10.h
89
90 crisv10f.o: crisv10f.c cris-tmpl.c $(CRISV10F_INCLUDE_DEPS)
91
92 # FIXME: What is mono and what does "Use of `mono' is wip" mean (other
93 # than the apparent; some "mono" feature is work in progress)?
94 mloopv10f.c engv10.h: stamp-v10fmloop
95 stamp-v10fmloop: $(srcdir)/../common/genmloop.sh mloop.in Makefile
96 $(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \
97 -mono -no-fast -pbb -switch semcrisv10f-switch.c \
98 -cpu crisv10f -infile $(srcdir)/mloop.in
99 $(SHELL) $(srcroot)/move-if-change eng.hin engv10.h
100 $(SHELL) $(srcroot)/move-if-change mloop.cin mloopv10f.c
101 touch stamp-v10fmloop
102 mloopv10f.o: mloopv10f.c semcrisv10f-switch.c $(CRISV10F_INCLUDE_DEPS)
103
104 cpuv10.o: cpuv10.c $(CRISV10F_INCLUDE_DEPS)
105 decodev10.o: decodev10.c $(CRISV10F_INCLUDE_DEPS)
106 modelv10.o: modelv10.c $(CRISV10F_INCLUDE_DEPS)
107
108 # CRISV32 objs
109
110 CRISV32F_INCLUDE_DEPS = \
111 $(CGEN_MAIN_CPU_DEPS) \
112 cpuv32.h decodev32.h engv32.h
113
114 crisv32f.o: crisv32f.c cris-tmpl.c $(CRISV32F_INCLUDE_DEPS)
115
116 # FIXME: What is mono and what does "Use of `mono' is wip" mean (other
117 # than the apparent; some "mono" feature is work in progress)?
118 mloopv32f.c engv32.h: stamp-v32fmloop
119 # We depend on stamp-v10fmloop to get serialization to avoid
120 # racing with it for the same temporary file-names when "make -j".
121 stamp-v32fmloop: stamp-v10fmloop $(srcdir)/../common/genmloop.sh mloop.in Makefile
122 $(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \
123 -mono -no-fast -pbb -switch semcrisv32f-switch.c \
124 -cpu crisv32f -infile $(srcdir)/mloop.in
125 $(SHELL) $(srcroot)/move-if-change eng.hin engv32.h
126 $(SHELL) $(srcroot)/move-if-change mloop.cin mloopv32f.c
127 touch stamp-v32fmloop
128 mloopv32f.o: mloopv32f.c semcrisv32f-switch.c $(CRISV32F_INCLUDE_DEPS)
129
130 cpuv32.o: cpuv32.c $(CRISV32F_INCLUDE_DEPS)
131 decodev32.o: decodev32.c $(CRISV32F_INCLUDE_DEPS)
132 modelv32.o: modelv32.c $(CRISV32F_INCLUDE_DEPS)
133
134 cris-clean:
135 for v in 10 32; do \
136 rm -f mloopv$${v}f.c engv$${v}.h stamp-v$${v}fmloop; \
137 rm -f stamp-v$${v}fcpu; \
138 done
139 -rm -f stamp-arch stamp-desc
140 -rm -f tmp-*
141
142 # cgen support, enable with --enable-cgen-maint
143 CGEN_MAINT = ; @true
144 # The following line is commented in or out depending upon --enable-cgen-maint.
145 @CGEN_MAINT@CGEN_MAINT =
146
147 # Useful when making CGEN-generated files manually, without --enable-cgen-maint.
148 stamps: stamp-v10fmloop stamp-v32fmloop stamp-arch stamp-v10fcpu stamp-v32fcpu stamp-desc
149
150 stamp-arch: $(CGEN_READ_SCM) $(CGEN_ARCH_SCM) $(CGEN_CPU_DIR)/cris.cpu Makefile
151 $(MAKE) cgen-arch $(CGEN_FLAGS_TO_PASS) mach=crisv10,crisv32 \
152 archfile=$(CGEN_CPU_DIR)/cris.cpu \
153 FLAGS="with-scache with-profile=fn"
154 touch stamp-arch
155 arch.h arch.c cpuall.h: $(CGEN_MAINT) stamp-arch
156
157 # The sed-hack is supposed to be temporary, until we get CGEN to emit it.
158 stamp-v10fcpu: $(CGEN_READ_SCM) $(CGEN_CPU_SCM) $(CGEN_DECODE_SCM) $(CGEN_CPU_DIR)/cris.cpu Makefile
159 $(MAKE) cgen-cpu-decode $(CGEN_FLAGS_TO_PASS) \
160 archfile=$(CGEN_CPU_DIR)/cris.cpu \
161 cpu=crisv10f mach=crisv10 SUFFIX=v10 FLAGS="with-scache with-profile=fn" EXTRAFILES="$(CGEN_CPU_SEMSW)"
162 $(SHELL) $(srcroot)/move-if-change $(srcdir)/semv10-switch.c $(srcdir)/semcrisv10f-switch.c
163 sed -ne 'p; s/^\(#include "sim-assert.h"\)$$/#include "cgen-ops.h"/p' < $(srcdir)/decodev10.c > decodev10.c.tmp
164 mv decodev10.c.tmp $(srcdir)/decodev10.c
165 touch stamp-v10fcpu
166 cpuv10.h cpuv10.c semcrisv10f-switch.c modelv10.c decodev10.c decodev10.h: $(CGEN_MAINT) stamp-v10fcpu
167
168 stamp-v32fcpu: $(CGEN_READ_SCM) $(CGEN_CPU_SCM) $(CGEN_DECODE_SCM) $(CGEN_CPU_DIR)/cris.cpu Makefile
169 $(MAKE) cgen-cpu-decode $(CGEN_FLAGS_TO_PASS) \
170 archfile=$(CGEN_CPU_DIR)/cris.cpu \
171 cpu=crisv32f mach=crisv32 SUFFIX=v32 FLAGS="with-scache with-profile=fn" EXTRAFILES="$(CGEN_CPU_SEMSW)"
172 $(SHELL) $(srcroot)/move-if-change $(srcdir)/semv32-switch.c $(srcdir)/semcrisv32f-switch.c
173 sed -ne 'p; s/^\(#include "sim-assert.h"\)$$/#include "cgen-ops.h"/p' < $(srcdir)/decodev32.c > decodev32.c.tmp
174 mv decodev32.c.tmp $(srcdir)/decodev32.c
175 touch stamp-v32fcpu
176 cpuv32.h cpuv32.c semcrisv32f-switch.c modelv32.c decodev32.c decodev32.h: $(CGEN_MAINT) stamp-v32fcpu
177
178 stamp-desc: $(CGEN_READ_SCM) $(CGEN_DESC_SCM) $(CGEN_CPU_DIR)/cris.cpu Makefile
179 $(MAKE) cgen-desc $(CGEN_FLAGS_TO_PASS) \
180 archfile=$(CGEN_CPU_DIR)/cris.cpu \
181 cpu=cris mach=all
182 touch stamp-desc
183 cris-desc.c cris-desc.h cris-opc.h: $(CGEN_MAINT) stamp-desc