]>
git.ipfire.org Git - thirdparty/binutils-gdb.git/blob - sim/d10v/interp.c
5 #include "remote-sim.h"
9 #define IMEM_SIZE 18 /* D10V instruction memory size is 18 bits */
10 #define DMEM_SIZE 16 /* Data memory is 64K (but only 32K internal RAM) */
11 #define UMEM_SIZE 17 /* Each unified memory segment is 17 bits */
12 #define UMEM_SEGMENTS 128 /* Number of segments in unified memory region */
14 enum _leftright
{ LEFT_FIRST
, RIGHT_FIRST
};
17 static SIM_OPEN_KIND sim_kind
;
19 host_callback
*d10v_callback
;
20 unsigned long ins_type_counters
[ (int)INS_MAX
];
24 static int init_text_p
= 0;
25 /* non-zero if we opened prog_bfd */
26 static int prog_bfd_was_opened_p
;
32 static long hash
PARAMS ((long insn
, int format
));
33 static struct hash_entry
*lookup_hash
PARAMS ((uint32 ins
, int size
));
34 static void get_operands
PARAMS ((struct simops
*s
, uint32 ins
));
35 static void do_long
PARAMS ((uint32 ins
));
36 static void do_2_short
PARAMS ((uint16 ins1
, uint16 ins2
, enum _leftright leftright
));
37 static void do_parallel
PARAMS ((uint16 ins1
, uint16 ins2
));
38 static char *add_commas
PARAMS ((char *buf
, int sizeof_buf
, unsigned long value
));
39 extern void sim_set_profile
PARAMS ((int n
));
40 extern void sim_set_profile_size
PARAMS ((int n
));
42 #ifdef NEED_UI_LOOP_HOOK
43 /* How often to run the ui_loop update, when in use */
44 #define UI_LOOP_POLL_INTERVAL 0x14000
46 /* Counter for the ui_loop_hook update */
47 static long ui_loop_hook_counter
= UI_LOOP_POLL_INTERVAL
;
49 /* Actual hook to call to run through gdb's gui event loop */
50 extern int (*ui_loop_hook
) PARAMS ((int signo
));
51 #endif /* NEED_UI_LOOP_HOOK */
54 #if defined(__GNUC__) && defined(__OPTIMIZE__)
55 #define INLINE __inline__
64 struct hash_entry
*next
;
71 struct hash_entry hash_table
[MAX_HASH
+1];
78 if (format
& LONG_OPCODE
)
79 return ((insn
& 0x3F000000) >> 24);
81 return((insn
& 0x7E00) >> 9);
84 INLINE
static struct hash_entry
*
85 lookup_hash (ins
, size
)
92 h
= &hash_table
[(ins
& 0x3F000000) >> 24];
94 h
= &hash_table
[(ins
& 0x7E00) >> 9];
96 while ((ins
& h
->mask
) != h
->opcode
|| h
->size
!= size
)
100 (*d10v_callback
->printf_filtered
) (d10v_callback
, "ERROR looking up hash for %x at PC %x\n",ins
, PC
);
109 get_operands (struct simops
*s
, uint32 ins
)
111 int i
, shift
, bits
, flags
;
113 for (i
=0; i
< s
->numops
; i
++)
115 shift
= s
->operands
[3*i
];
116 bits
= s
->operands
[3*i
+1];
117 flags
= s
->operands
[3*i
+2];
118 mask
= 0x7FFFFFFF >> (31 - bits
);
119 OP
[i
] = (ins
>> shift
) & mask
;
121 /* FIXME: for tracing, update values that need to be updated each
122 instruction decode cycle */
123 State
.trace
.psw
= PSW
;
130 if (!init_text_p
&& prog_bfd
!= NULL
)
133 for (s
= prog_bfd
->sections
; s
; s
= s
->next
)
134 if (strcmp (bfd_get_section_name (prog_bfd
, s
), ".text") == 0)
137 text_start
= bfd_get_section_vma (prog_bfd
, s
);
138 text_end
= text_start
+ bfd_section_size (prog_bfd
, s
);
143 return (PC
<< 2) + text_start
;
150 struct hash_entry
*h
;
152 if ((d10v_debug
& DEBUG_INSTRUCTION
) != 0)
153 (*d10v_callback
->printf_filtered
) (d10v_callback
, "do_long 0x%x\n", ins
);
155 h
= lookup_hash (ins
, 1);
156 get_operands (h
->ops
, ins
);
157 State
.ins_type
= INS_LONG
;
158 ins_type_counters
[ (int)State
.ins_type
]++;
163 do_2_short (ins1
, ins2
, leftright
)
165 enum _leftright leftright
;
167 struct hash_entry
*h
;
168 enum _ins_type first
, second
;
171 if ((d10v_debug
& DEBUG_INSTRUCTION
) != 0)
172 (*d10v_callback
->printf_filtered
) (d10v_callback
, "do_2_short 0x%x (%s) -> 0x%x\n",
173 ins1
, (leftright
) ? "left" : "right", ins2
);
176 if (leftright
== LEFT_FIRST
)
180 ins_type_counters
[ (int)INS_LEFTRIGHT
]++;
186 ins_type_counters
[ (int)INS_RIGHTLEFT
]++;
189 /* Issue the first instruction */
190 h
= lookup_hash (ins1
, 0);
191 get_operands (h
->ops
, ins1
);
192 State
.ins_type
= first
;
193 ins_type_counters
[ (int)State
.ins_type
]++;
196 /* Issue the second instruction (if the PC hasn't changed) */
197 if (!State
.pc_changed
&& !State
.exception
)
199 /* finish any existing instructions */
201 h
= lookup_hash (ins2
, 0);
202 get_operands (h
->ops
, ins2
);
203 State
.ins_type
= second
;
204 ins_type_counters
[ (int)State
.ins_type
]++;
205 ins_type_counters
[ (int)INS_CYCLES
]++;
208 else if (!State
.exception
)
209 ins_type_counters
[ (int)INS_COND_JUMP
]++;
213 do_parallel (ins1
, ins2
)
216 struct hash_entry
*h1
, *h2
;
218 if ((d10v_debug
& DEBUG_INSTRUCTION
) != 0)
219 (*d10v_callback
->printf_filtered
) (d10v_callback
, "do_parallel 0x%x || 0x%x\n", ins1
, ins2
);
221 ins_type_counters
[ (int)INS_PARALLEL
]++;
222 h1
= lookup_hash (ins1
, 0);
223 h2
= lookup_hash (ins2
, 0);
225 if (h1
->ops
->exec_type
== PARONLY
)
227 get_operands (h1
->ops
, ins1
);
228 State
.ins_type
= INS_LEFT_COND_TEST
;
229 ins_type_counters
[ (int)State
.ins_type
]++;
233 ins_type_counters
[ (int)INS_COND_TRUE
]++;
234 get_operands (h2
->ops
, ins2
);
235 State
.ins_type
= INS_RIGHT_COND_EXE
;
236 ins_type_counters
[ (int)State
.ins_type
]++;
240 ins_type_counters
[ (int)INS_COND_FALSE
]++;
242 else if (h2
->ops
->exec_type
== PARONLY
)
244 get_operands (h2
->ops
, ins2
);
245 State
.ins_type
= INS_RIGHT_COND_TEST
;
246 ins_type_counters
[ (int)State
.ins_type
]++;
250 ins_type_counters
[ (int)INS_COND_TRUE
]++;
251 get_operands (h1
->ops
, ins1
);
252 State
.ins_type
= INS_LEFT_COND_EXE
;
253 ins_type_counters
[ (int)State
.ins_type
]++;
257 ins_type_counters
[ (int)INS_COND_FALSE
]++;
261 get_operands (h1
->ops
, ins1
);
262 State
.ins_type
= INS_LEFT_PARALLEL
;
263 ins_type_counters
[ (int)State
.ins_type
]++;
265 if (!State
.exception
)
267 get_operands (h2
->ops
, ins2
);
268 State
.ins_type
= INS_RIGHT_PARALLEL
;
269 ins_type_counters
[ (int)State
.ins_type
]++;
276 add_commas(buf
, sizeof_buf
, value
)
282 char *endbuf
= buf
+ sizeof_buf
- 1;
292 *--endbuf
= (value
% 10) + '0';
293 } while ((value
/= 10) != 0);
307 for (i
=0;i
<UMEM_SEGMENTS
;i
++)
311 free (State
.umem
[i
]);
312 State
.umem
[i
] = NULL
;
319 State
.imem
= (uint8
*)calloc(1,1<<IMEM_SIZE
);
320 State
.dmem
= (uint8
*)calloc(1,1<<DMEM_SIZE
);
321 for (i
=1;i
<(UMEM_SEGMENTS
-1);i
++)
322 State
.umem
[i
] = NULL
;
323 State
.umem
[0] = (uint8
*)calloc(1,1<<UMEM_SIZE
);
324 State
.umem
[1] = (uint8
*)calloc(1,1<<UMEM_SIZE
);
325 State
.umem
[2] = (uint8
*)calloc(1,1<<UMEM_SIZE
);
326 State
.umem
[UMEM_SEGMENTS
-1] = (uint8
*)calloc(1,1<<UMEM_SIZE
);
327 if (!State
.imem
|| !State
.dmem
|| !State
.umem
[0] || !State
.umem
[1] || !State
.umem
[2] || !State
.umem
[UMEM_SEGMENTS
-1] )
329 (*d10v_callback
->printf_filtered
) (d10v_callback
, "Memory allocation failed.\n");
334 if ((d10v_debug
& DEBUG_MEMSIZE
) != 0)
337 (*d10v_callback
->printf_filtered
) (d10v_callback
,
338 "Allocated %s bytes instruction memory and\n",
339 add_commas (buffer
, sizeof (buffer
), (1UL<<IMEM_SIZE
)));
341 (*d10v_callback
->printf_filtered
) (d10v_callback
, " %s bytes data memory.\n",
342 add_commas (buffer
, sizeof (buffer
), (1UL<<IMEM_SIZE
)));
347 /* Transfer data to/from simulated memory. Since a bug in either the
348 simulated program or in gdb or the simulator itself may cause a
349 bogus address to be passed in, we need to do some sanity checking
350 on addresses to make sure they are within bounds. When an address
351 fails the bounds check, treat it as a zero length read/write rather
352 than aborting the entire run. */
355 xfer_mem (SIM_ADDR addr
,
356 unsigned char *buffer
,
360 unsigned char *memory
;
361 int segment
= ((addr
>> 24) & 0xff);
362 addr
= (addr
& 0x00ffffff);
365 if ((d10v_debug
& DEBUG_INSTRUCTION
) != 0)
369 (*d10v_callback
->printf_filtered
) (d10v_callback
, "sim_write %d bytes to 0x%02x:%06x\n", size
, segment
, addr
);
373 (*d10v_callback
->printf_filtered
) (d10v_callback
, "sim_read %d bytes from 0x%2x:%6x\n", size
, segment
, addr
);
378 /* to access data, we use the following mapping
379 0x00xxxxxx: Logical data address segment (DMAP translated memory)
380 0x01xxxxxx: Logical instruction address segment (IMAP translated memory)
381 0x10xxxxxx: Physical data memory segment (On-chip data memory)
382 0x11xxxxxx: Physical instruction memory segment (On-chip insn memory)
383 0x12xxxxxx: Phisical unified memory segment (Unified memory)
388 case 0x00: /* DMAP translated memory */
391 for (byte
= 0; byte
< size
; byte
++)
393 uint8
*mem
= dmem_addr (addr
+ byte
);
404 case 0x01: /* IMAP translated memory */
407 for (byte
= 0; byte
< size
; byte
++)
409 uint8
*mem
= imem_addr (addr
+ byte
);
420 case 0x10: /* On-chip data memory */
422 addr
&= ((1 << DMEM_SIZE
) - 1);
423 if ((addr
+ size
) > (1 << DMEM_SIZE
))
425 (*d10v_callback
->printf_filtered
) (d10v_callback
, "ERROR: data address 0x%x is outside range 0-0x%x.\n",
426 addr
+ size
- 1, (1 << DMEM_SIZE
) - 1);
429 memory
= State
.dmem
+ addr
;
433 case 0x11: /* On-chip insn memory */
435 addr
&= ((1 << IMEM_SIZE
) - 1);
436 if ((addr
+ size
) > (1 << IMEM_SIZE
))
438 (*d10v_callback
->printf_filtered
) (d10v_callback
, "ERROR: instruction address 0x%x is outside range 0-0x%x.\n",
439 addr
+ size
- 1, (1 << IMEM_SIZE
) - 1);
442 memory
= State
.imem
+ addr
;
446 case 0x12: /* Unified memory */
448 int startsegment
, startoffset
; /* Segment and offset within segment where xfer starts */
449 int endsegment
, endoffset
; /* Segment and offset within segment where xfer ends */
451 startsegment
= addr
>> UMEM_SIZE
;
452 startoffset
= addr
& ((1 << UMEM_SIZE
) - 1);
453 endsegment
= (addr
+ size
) >> UMEM_SIZE
;
454 endoffset
= (addr
+ size
) & ((1 << UMEM_SIZE
) - 1);
456 /* FIXME: We do not currently implement xfers across segments,
457 so detect this case and fail gracefully. */
459 if ((startsegment
!= endsegment
) && !((endsegment
== (startsegment
+ 1)) && endoffset
== 0))
461 (*d10v_callback
->printf_filtered
) (d10v_callback
, "ERROR: Unimplemented support for transfers across unified memory segment boundaries\n");
464 if (!State
.umem
[startsegment
])
467 if ((d10v_debug
& DEBUG_MEMSIZE
) != 0)
469 (*d10v_callback
->printf_filtered
) (d10v_callback
,"Allocating %s bytes unified memory to region %d\n",
470 add_commas (buffer
, sizeof (buffer
), (1UL<<IMEM_SIZE
)), startsegment
);
473 State
.umem
[startsegment
] = (uint8
*)calloc(1,1<<UMEM_SIZE
);
475 if (!State
.umem
[startsegment
])
477 (*d10v_callback
->printf_filtered
) (d10v_callback
, "ERROR: Memory allocation of 0x%x bytes failed.\n", 1<<UMEM_SIZE
);
480 memory
= State
.umem
[startsegment
] + startoffset
;
486 (*d10v_callback
->printf_filtered
) (d10v_callback
, "ERROR: address 0x%lx is not in valid range\n", (long) addr
);
487 (*d10v_callback
->printf_filtered
) (d10v_callback
, "0x00xxxxxx: Logical data address segment (DMAP translated memory)\n");
488 (*d10v_callback
->printf_filtered
) (d10v_callback
, "0x01xxxxxx: Logical instruction address segment (IMAP translated memory)\n");
489 (*d10v_callback
->printf_filtered
) (d10v_callback
, "0x10xxxxxx: Physical data memory segment (On-chip data memory)\n");
490 (*d10v_callback
->printf_filtered
) (d10v_callback
, "0x11xxxxxx: Physical instruction memory segment (On-chip insn memory)\n");
491 (*d10v_callback
->printf_filtered
) (d10v_callback
, "0x12xxxxxx: Phisical unified memory segment (Unified memory)\n");
498 memcpy (memory
, buffer
, size
);
502 memcpy (buffer
, memory
, size
);
510 sim_write (sd
, addr
, buffer
, size
)
513 unsigned char *buffer
;
516 /* FIXME: this should be performing a virtual transfer */
517 return xfer_mem( addr
, buffer
, size
, 1);
521 sim_read (sd
, addr
, buffer
, size
)
524 unsigned char *buffer
;
527 /* FIXME: this should be performing a virtual transfer */
528 return xfer_mem( addr
, buffer
, size
, 0);
533 sim_open (kind
, callback
, abfd
, argv
)
535 host_callback
*callback
;
540 struct hash_entry
*h
;
541 static int init_p
= 0;
545 d10v_callback
= callback
;
548 for (p
= argv
+ 1; *p
; ++p
)
551 if (strcmp (*p
, "-t") == 0)
555 (*d10v_callback
->printf_filtered
) (d10v_callback
, "ERROR: unsupported option(s): %s\n",*p
);
558 /* put all the opcodes in the hash table */
561 for (s
= Simops
; s
->func
; s
++)
563 h
= &hash_table
[hash(s
->opcode
,s
->format
)];
565 /* go to the last entry in the chain */
571 h
->next
= (struct hash_entry
*) calloc(1,sizeof(struct hash_entry
));
573 perror ("malloc failure");
579 h
->opcode
= s
->opcode
;
580 h
->size
= s
->is_long
;
584 /* reset the processor state */
587 sim_create_inferior ((SIM_DESC
) 1, NULL
, NULL
, NULL
);
589 /* Fudge our descriptor. */
595 sim_close (sd
, quitting
)
599 if (prog_bfd
!= NULL
&& prog_bfd_was_opened_p
)
601 bfd_close (prog_bfd
);
603 prog_bfd_was_opened_p
= 0;
611 (*d10v_callback
->printf_filtered
) (d10v_callback
, "sim_set_profile %d\n",n
);
615 sim_set_profile_size (n
)
618 (*d10v_callback
->printf_filtered
) (d10v_callback
, "sim_set_profile_size %d\n",n
);
632 if ( (addr
& 0xfff0) != 0xff00)
634 (*d10v_callback
->printf_filtered
) (d10v_callback
, "Data address 0x%lx is in I/O space, pc = 0x%lx.\n",
635 (long)addr
, (long)decode_pc ());
636 State
.exception
= SIGBUS
;
639 return State
.dmem
+ addr
;
646 /* instruction memory */
647 return (DMAP
& 0xf) * 0x4000 + State
.imem
+ (addr
- 0x8000);
652 /* this is ugly because we allocate unified memory in 128K segments and */
653 /* dmap addresses 16k segments */
654 seg
= (DMAP
& 0x3ff) >> 3;
655 if (State
.umem
[seg
] == NULL
)
658 (*d10v_callback
->printf_filtered
) (d10v_callback
,"Allocating %d bytes unified memory to region %d\n", 1<<UMEM_SIZE
, seg
);
660 State
.umem
[seg
] = (uint8
*)calloc(1,1<<UMEM_SIZE
);
661 if (!State
.umem
[seg
])
663 (*d10v_callback
->printf_filtered
) (d10v_callback
,
664 "ERROR: alloc failed. unified memory region %d unmapped, pc = 0x%lx\n",
665 seg
, (long)decode_pc ());
666 State
.exception
= SIGBUS
;
669 return State
.umem
[seg
] + (DMAP
& 7) * 0x4000 + (addr
- 0x8000);
672 return State
.dmem
+ addr
;
677 imem_addr (uint32 pc
)
687 return State
.imem
+ pc
;
689 if (State
.umem
[imap
& 0xff] == NULL
)
692 /* Discard upper bit(s) of PC in case IMAP1 selects unified memory. */
693 pc
&= (1 << UMEM_SIZE
) - 1;
695 return State
.umem
[imap
& 0xff] + pc
;
699 static int stop_simulator
= 0;
710 /* Run (or resume) the program. */
712 sim_resume (sd
, step
, siggnal
)
719 /* (*d10v_callback->printf_filtered) (d10v_callback, "sim_resume (%d,%d) PC=0x%x\n",step,siggnal,PC); */
726 iaddr
= imem_addr ((uint32
)PC
<< 2);
729 State
.exception
= SIGBUS
;
733 inst
= get_longword( iaddr
);
735 State
.pc_changed
= 0;
736 ins_type_counters
[ (int)INS_CYCLES
]++;
738 switch (inst
& 0xC0000000)
741 /* long instruction */
742 do_long (inst
& 0x3FFFFFFF);
746 do_2_short ( inst
& 0x7FFF, (inst
& 0x3FFF8000) >> 15, RIGHT_FIRST
);
750 do_2_short ((inst
& 0x3FFF8000) >> 15, inst
& 0x7FFF, LEFT_FIRST
);
753 do_parallel ((inst
& 0x3FFF8000) >> 15, inst
& 0x7FFF);
757 /* If the PC of the current instruction matches RPT_E then
758 schedule a branch to the loop start. If one of those
759 instructions happens to be a branch, than that instruction
761 if (!State
.pc_changed
)
763 if (PSW_RP
&& PC
== RPT_E
)
765 /* Note: The behavour of a branch instruction at RPT_E
766 is implementation dependant, this simulator takes the
767 branch. Branching to RPT_E is valid, the instruction
768 must be executed before the loop is taken. */
777 SET_RPT_C (RPT_C
- 1);
785 /* Check for a breakpoint trap on this instruction. This
786 overrides any pending branches or loops */
787 if (PSW_DB
&& PC
== IBA
)
791 SET_PSW (PSW
& PSW_SM_BIT
);
792 SET_PC (SDBT_VECTOR_START
);
795 /* Writeback all the DATA / PC changes */
798 #ifdef NEED_UI_LOOP_HOOK
799 if (ui_loop_hook
!= NULL
&& ui_loop_hook_counter
-- < 0)
801 ui_loop_hook_counter
= UI_LOOP_POLL_INTERVAL
;
804 #endif /* NEED_UI_LOOP_HOOK */
806 while ( !State
.exception
&& !stop_simulator
);
808 if (step
&& !State
.exception
)
809 State
.exception
= SIGTRAP
;
819 sim_resume (sd
, 0, 0);
824 sim_info (sd
, verbose
)
833 unsigned long left
= ins_type_counters
[ (int)INS_LEFT
] + ins_type_counters
[ (int)INS_LEFT_COND_EXE
];
834 unsigned long left_nops
= ins_type_counters
[ (int)INS_LEFT_NOPS
];
835 unsigned long left_parallel
= ins_type_counters
[ (int)INS_LEFT_PARALLEL
];
836 unsigned long left_cond
= ins_type_counters
[ (int)INS_LEFT_COND_TEST
];
837 unsigned long left_total
= left
+ left_parallel
+ left_cond
+ left_nops
;
839 unsigned long right
= ins_type_counters
[ (int)INS_RIGHT
] + ins_type_counters
[ (int)INS_RIGHT_COND_EXE
];
840 unsigned long right_nops
= ins_type_counters
[ (int)INS_RIGHT_NOPS
];
841 unsigned long right_parallel
= ins_type_counters
[ (int)INS_RIGHT_PARALLEL
];
842 unsigned long right_cond
= ins_type_counters
[ (int)INS_RIGHT_COND_TEST
];
843 unsigned long right_total
= right
+ right_parallel
+ right_cond
+ right_nops
;
845 unsigned long unknown
= ins_type_counters
[ (int)INS_UNKNOWN
];
846 unsigned long ins_long
= ins_type_counters
[ (int)INS_LONG
];
847 unsigned long parallel
= ins_type_counters
[ (int)INS_PARALLEL
];
848 unsigned long leftright
= ins_type_counters
[ (int)INS_LEFTRIGHT
];
849 unsigned long rightleft
= ins_type_counters
[ (int)INS_RIGHTLEFT
];
850 unsigned long cond_true
= ins_type_counters
[ (int)INS_COND_TRUE
];
851 unsigned long cond_false
= ins_type_counters
[ (int)INS_COND_FALSE
];
852 unsigned long cond_jump
= ins_type_counters
[ (int)INS_COND_JUMP
];
853 unsigned long cycles
= ins_type_counters
[ (int)INS_CYCLES
];
854 unsigned long total
= (unknown
+ left_total
+ right_total
+ ins_long
);
856 int size
= strlen (add_commas (buf1
, sizeof (buf1
), total
));
857 int parallel_size
= strlen (add_commas (buf1
, sizeof (buf1
),
858 (left_parallel
> right_parallel
) ? left_parallel
: right_parallel
));
859 int cond_size
= strlen (add_commas (buf1
, sizeof (buf1
), (left_cond
> right_cond
) ? left_cond
: right_cond
));
860 int nop_size
= strlen (add_commas (buf1
, sizeof (buf1
), (left_nops
> right_nops
) ? left_nops
: right_nops
));
861 int normal_size
= strlen (add_commas (buf1
, sizeof (buf1
), (left
> right
) ? left
: right
));
863 (*d10v_callback
->printf_filtered
) (d10v_callback
,
864 "executed %*s left instruction(s), %*s normal, %*s parallel, %*s EXExxx, %*s nops\n",
865 size
, add_commas (buf1
, sizeof (buf1
), left_total
),
866 normal_size
, add_commas (buf2
, sizeof (buf2
), left
),
867 parallel_size
, add_commas (buf3
, sizeof (buf3
), left_parallel
),
868 cond_size
, add_commas (buf4
, sizeof (buf4
), left_cond
),
869 nop_size
, add_commas (buf5
, sizeof (buf5
), left_nops
));
871 (*d10v_callback
->printf_filtered
) (d10v_callback
,
872 "executed %*s right instruction(s), %*s normal, %*s parallel, %*s EXExxx, %*s nops\n",
873 size
, add_commas (buf1
, sizeof (buf1
), right_total
),
874 normal_size
, add_commas (buf2
, sizeof (buf2
), right
),
875 parallel_size
, add_commas (buf3
, sizeof (buf3
), right_parallel
),
876 cond_size
, add_commas (buf4
, sizeof (buf4
), right_cond
),
877 nop_size
, add_commas (buf5
, sizeof (buf5
), right_nops
));
880 (*d10v_callback
->printf_filtered
) (d10v_callback
,
881 "executed %*s long instruction(s)\n",
882 size
, add_commas (buf1
, sizeof (buf1
), ins_long
));
885 (*d10v_callback
->printf_filtered
) (d10v_callback
,
886 "executed %*s parallel instruction(s)\n",
887 size
, add_commas (buf1
, sizeof (buf1
), parallel
));
890 (*d10v_callback
->printf_filtered
) (d10v_callback
,
891 "executed %*s instruction(s) encoded L->R\n",
892 size
, add_commas (buf1
, sizeof (buf1
), leftright
));
895 (*d10v_callback
->printf_filtered
) (d10v_callback
,
896 "executed %*s instruction(s) encoded R->L\n",
897 size
, add_commas (buf1
, sizeof (buf1
), rightleft
));
900 (*d10v_callback
->printf_filtered
) (d10v_callback
,
901 "executed %*s unknown instruction(s)\n",
902 size
, add_commas (buf1
, sizeof (buf1
), unknown
));
905 (*d10v_callback
->printf_filtered
) (d10v_callback
,
906 "executed %*s instruction(s) due to EXExxx condition being true\n",
907 size
, add_commas (buf1
, sizeof (buf1
), cond_true
));
910 (*d10v_callback
->printf_filtered
) (d10v_callback
,
911 "skipped %*s instruction(s) due to EXExxx condition being false\n",
912 size
, add_commas (buf1
, sizeof (buf1
), cond_false
));
915 (*d10v_callback
->printf_filtered
) (d10v_callback
,
916 "skipped %*s instruction(s) due to conditional branch succeeding\n",
917 size
, add_commas (buf1
, sizeof (buf1
), cond_jump
));
919 (*d10v_callback
->printf_filtered
) (d10v_callback
,
920 "executed %*s cycle(s)\n",
921 size
, add_commas (buf1
, sizeof (buf1
), cycles
));
923 (*d10v_callback
->printf_filtered
) (d10v_callback
,
924 "executed %*s total instructions\n",
925 size
, add_commas (buf1
, sizeof (buf1
), total
));
929 sim_create_inferior (sd
, abfd
, argv
, env
)
935 bfd_vma start_address
;
937 /* reset all state information */
938 memset (&State
.regs
, 0, (int)&State
.imem
- (int)&State
.regs
[0]);
942 /* a hack to set r0/r1 with argc/argv */
943 /* some high memory that won't be overwritten by the stack soon */
944 bfd_vma addr
= 0x7C00;
949 int size
= strlen (argv
[i
]) + 1;
950 SW (addr
+ 2*i
, addr
+ p
);
951 sim_write (sd
, addr
+ 0, argv
[i
], size
);
961 start_address
= bfd_get_start_address (abfd
);
963 start_address
= 0xffc0 << 2;
966 (*d10v_callback
->printf_filtered
) (d10v_callback
, "sim_create_inferior: PC=0x%lx\n", (long) start_address
);
968 SET_CREG (PC_CR
, start_address
>> 2);
970 /* cpu resets imap0 to 0 and imap1 to 0x7f, but D10V-EVA board */
971 /* resets imap0 and imap1 to 0x1000. */
991 sim_set_callbacks (p
)
998 sim_stop_reason (sd
, reason
, sigrc
)
1000 enum sim_stop
*reason
;
1003 /* (*d10v_callback->printf_filtered) (d10v_callback, "sim_stop_reason: PC=0x%x\n",PC<<2); */
1005 switch (State
.exception
)
1007 case SIG_D10V_STOP
: /* stop instruction */
1008 *reason
= sim_exited
;
1012 case SIG_D10V_EXIT
: /* exit trap */
1013 *reason
= sim_exited
;
1017 default: /* some signal */
1018 *reason
= sim_stopped
;
1019 if (stop_simulator
&& !State
.exception
)
1022 *sigrc
= State
.exception
;
1030 sim_fetch_register (sd
, rn
, memory
, length
)
1033 unsigned char *memory
;
1037 WRITE_64 (memory
, ACC (rn
-35));
1039 WRITE_16 (memory
, IMAP0
);
1041 WRITE_16 (memory
, IMAP1
);
1043 WRITE_16 (memory
, DMAP
);
1045 WRITE_16 (memory
, CREG (rn
- 16));
1047 WRITE_16 (memory
, GPR (rn
));
1052 sim_store_register (sd
, rn
, memory
, length
)
1055 unsigned char *memory
;
1059 SET_ACC (rn
-35, READ_64 (memory
) & MASK40
);
1061 SET_DMAP( READ_16(memory
) );
1063 SET_IMAP1( READ_16(memory
) );
1065 SET_IMAP0( READ_16(memory
) );
1067 SET_CREG (rn
- 16, READ_16 (memory
));
1069 SET_GPR (rn
, READ_16 (memory
));
1076 sim_do_command (sd
, cmd
)
1080 (*d10v_callback
->printf_filtered
) (d10v_callback
, "sim_do_command: %s\n",cmd
);
1084 sim_load (sd
, prog
, abfd
, from_tty
)
1090 extern bfd
*sim_load_file (); /* ??? Don't know where this should live. */
1092 if (prog_bfd
!= NULL
&& prog_bfd_was_opened_p
)
1094 bfd_close (prog_bfd
);
1095 prog_bfd_was_opened_p
= 0;
1097 prog_bfd
= sim_load_file (sd
, myname
, d10v_callback
, prog
, abfd
,
1098 sim_kind
== SIM_OPEN_DEBUG
,
1099 1/*LMA*/, sim_write
);
1100 if (prog_bfd
== NULL
)
1102 prog_bfd_was_opened_p
= abfd
== NULL
;