sim/d10v/simops.c

   1 #include "d10v_sim.h"
   2 #include "simops.h"
   3
   4 /* #define DEBUG 1 */
   5
   6 /* abs */
   7 void
   8 OP_4607 ()
   9 {
  10 #ifdef DEBUG
  11   printf("   abs\tr%d\n",OP[0]);
  12 #endif
  13   State.F1 = State.F0;
  14   if ((int16)(State.regs[OP[0]]) < 0)
  15     {
  16       State.regs[OP[0]] = -(int16)(State.regs[OP[0]]);
  17       State.F0 = 1;
  18     }
  19   else
  20     State.F0 = 0;
  21 }
  22
  23 /* abs */
  24 void
  25 OP_5607 ()
  26 {
  27   int64 tmp;
  28
  29 #ifdef DEBUG
  30   printf("   abs\ta%d\n",OP[0]);
  31 #endif
  32   State.F1 = State.F0;
  33   if (State.a[OP[0]] < 0 )
  34     {
  35       tmp = -State.a[OP[0]];
  36       if (State.ST)
  37         {
  38           if (tmp > MAX32)
  39             State.a[OP[0]] = MAX32;
  40           else if (tmp < MIN32)
  41             State.a[OP[0]] = MIN32;
  42           else
  43             State.a[OP[0]] = tmp;
  44         }
  45       else
  46         State.a[OP[0]] = tmp;
  47       State.F0 = 1;
  48     }
  49   else
  50     State.F0 = 0;
  51 }
  52
  53 /* add */
  54 void
  55 OP_200 ()
  56 {
  57   uint16 tmp = State.regs[OP[0]];
  58 #ifdef DEBUG
  59   printf("   add\tr%d,r%d\n",OP[0],OP[1]);
  60 #endif
  61   State.regs[OP[0]] += State.regs[OP[1]];
  62   if ( tmp > State.regs[OP[0]])
  63     State.C = 1;
  64   else
  65     State.C = 0;
  66 }
  67
  68 /* add */
  69 void
  70 OP_1201 ()
  71 {
  72   int64 tmp;
  73 #ifdef DEBUG
  74   printf("   add\ta%d,r%d\n",OP[0],OP[1]);
  75 #endif
  76   tmp = State.a[OP[0]] + (SEXT16 (State.regs[OP[1]]) << 16 | State.regs[OP[1]+1]);
  77   if (State.ST)
  78     {
  79       if ( tmp > MAX32)
  80         State.a[OP[0]] = MAX32;
  81       else if ( tmp < MIN32)
  82         State.a[OP[0]] = MIN32;
  83       else
  84         State.a[OP[0]] = tmp;
  85     }
  86   else
  87     State.a[OP[0]] = tmp;
  88 }
  89
  90 /* add */
  91 void
  92 OP_1203 ()
  93 {
  94   int64 tmp;
  95 #ifdef DEBUG
  96   printf("   add\ta%d,a%d\n",OP[0],OP[1]);
  97 #endif
  98   tmp = State.a[OP[0]] + State.a[OP[1]];
  99   if (State.ST)
 100     {
 101       if (tmp > MAX32)
 102         State.a[OP[0]] = MAX32;
 103       else if ( tmp < MIN32)
 104         State.a[OP[0]] = MIN32;
 105       else
 106         State.a[OP[0]] = tmp;
 107     }
 108   else
 109     State.a[OP[0]] = tmp;
 110 }
 111
 112 /* add2w */
 113 void
 114 OP_1200 ()
 115 {
 116   uint32 tmp;
 117   uint32 tmp1 = (State.regs[OP[0]]) << 16 | State.regs[OP[0]+1];
 118   uint32 tmp2 = (State.regs[OP[1]]) << 16 | State.regs[OP[1]+1];
 119 #ifdef DEBUG
 120   printf("   add2w\tr%d,r%d\n",OP[0],OP[1]);
 121 #endif
 122   tmp = tmp1 + tmp2;
 123   if ( (tmp < tmp1) || (tmp < tmp2) )
 124     State.C = 1;
 125   else
 126     State.C = 0;
 127   State.regs[OP[0]] = tmp >> 16;
 128   State.regs[OP[0]+1] = tmp & 0xFFFF;
 129 }
 130
 131 /* add3 */
 132 void
 133 OP_1000000 ()
 134 {
 135   uint16 tmp = State.regs[OP[0]];
 136 #ifdef DEBUG
 137   printf("   add3\tr%d,r%d,0x%x\n",OP[0],OP[1],OP[2]);
 138 #endif
 139   State.regs[OP[0]] = State.regs[OP[1]] + OP[2];
 140   if ( tmp > State.regs[OP[0]])
 141     State.C = 1;
 142   else
 143     State.C = 0;
 144 }
 145
 146 /* addac3 */
 147 void
 148 OP_17000200 ()
 149 {
 150   int64 tmp;
 151 #ifdef DEBUG
 152   printf("   addac3\tr%d,r%d,a%d\n",OP[0],OP[1],OP[2]);
 153 #endif
 154   tmp = State.a[OP[2]] + (SEXT16 (State.regs[OP[1]]) << 16 | State.regs[OP[1]+1]);
 155   State.regs[OP[0]] = (tmp >> 16) & 0xffff;
 156   State.regs[OP[0]+1] = tmp & 0xffff;
 157 }
 158
 159 /* addac3 */
 160 void
 161 OP_17000202 ()
 162 {
 163   int64 tmp;
 164 #ifdef DEBUG
 165   printf("   addac3\tr%d,a%d,a%d\n",OP[0],OP[1],OP[2]);
 166 #endif
 167   tmp = State.a[OP[1]] + State.a[OP[2]];
 168   State.regs[OP[0]] = (tmp >> 16) & 0xffff;
 169   State.regs[OP[0]+1] = tmp & 0xffff;
 170 }
 171
 172 /* addac3s */
 173 void
 174 OP_17001200 ()
 175 {
 176   int64 tmp;
 177 #ifdef DEBUG
 178   printf("   addac3s\tr%d,r%d,a%d\n",OP[0],OP[1],OP[2]);
 179 #endif
 180   State.F1 = State.F0;
 181   tmp = State.a[OP[2]] + (SEXT16 (State.regs[OP[1]]) << 16 | State.regs[OP[1]+1]);
 182   if ( tmp > MAX32)
 183     {
 184       State.regs[OP[0]] = 0x7fff;
 185       State.regs[OP[0]+1] = 0xffff;
 186       State.F0 = 1;
 187     }
 188   else if (tmp < MIN32)
 189     {
 190       State.regs[OP[0]] = 0x8000;
 191       State.regs[OP[0]+1] = 0;
 192       State.F0 = 1;
 193     }
 194   else
 195     {
 196       State.regs[OP[0]] = (tmp >> 16) & 0xffff;
 197       State.regs[OP[0]+1] = tmp & 0xffff;
 198       State.F0 = 0;
 199     }
 200 }
 201
 202 /* addac3s */
 203 void
 204 OP_17001202 ()
 205 {
 206   int64 tmp;
 207 #ifdef DEBUG
 208   printf("   addac3s\tr%d,a%d,a%d\n",OP[0],OP[1],OP[2]);
 209 #endif
 210   State.F1 = State.F0;
 211   tmp = State.a[OP[1]] + State.a[OP[2]];
 212   if ( tmp > MAX32)
 213     {
 214       State.regs[OP[0]] = 0x7fff;
 215       State.regs[OP[0]+1] = 0xffff;
 216       State.F0 = 1;
 217     }
 218   else if (tmp < MIN32)
 219     {
 220       State.regs[OP[0]] = 0x8000;
 221       State.regs[OP[0]+1] = 0;
 222       State.F0 = 1;
 223     }
 224   else
 225     {
 226       State.regs[OP[0]] = (tmp >> 16) & 0xffff;
 227       State.regs[OP[0]+1] = tmp & 0xffff;
 228       State.F0 = 0;
 229     }
 230 }
 231
 232 /* addi */
 233 void
 234 OP_201 ()
 235 {
 236 #ifdef DEBUG
 237   printf("   addi\tr%d,0x%x\n",OP[0],OP[1]);
 238 #endif
 239   State.regs[OP[0]] += OP[1];
 240 }
 241
 242 /* and */
 243 void
 244 OP_C00 ()
 245 {
 246 #ifdef DEBUG
 247   printf("   and\tr%d,r%d\n",OP[0],OP[1]);
 248 #endif
 249   State.regs[OP[0]] &= State.regs[OP[1]];
 250 }
 251
 252 /* and3 */
 253 void
 254 OP_6000000 ()
 255 {
 256 #ifdef DEBUG
 257   printf("   and3\tr%d,r%d,0x%x\n",OP[0],OP[1],OP[2]);
 258 #endif
 259   State.regs[OP[0]] = State.regs[OP[1]] & OP[2];
 260 }
 261
 262 /* bclri */
 263 void
 264 OP_C01 ()
 265 {
 266 #ifdef DEBUG
 267   printf("   bclri\tr%d,%d\n",OP[0],OP[1]);
 268 #endif
 269   State.regs[OP[0]] &= ~(0x8000 >> OP[1]);
 270 }
 271
 272 /* bl.s */
 273 void
 274 OP_4900 ()
 275 {
 276 #ifdef DEBUG
 277   printf("   bl.s\t0x%x\n",OP[0]);
 278 #endif
 279   State.regs[13] = PC+1;
 280   PC += SEXT8 (OP[0]);
 281 }
 282
 283 /* bl.l */
 284 void
 285 OP_24800000 ()
 286 {
 287 #ifdef DEBUG
 288   printf("   bl.l\t0x%x\n",OP[0]);
 289 #endif
 290   State.regs[13] = PC+1;
 291   PC += OP[0];
 292 }
 293
 294 /* bnoti */
 295 void
 296 OP_A01 ()
 297 {
 298 #ifdef DEBUG
 299   printf("   bnoti\tr%d,%d\n",OP[0],OP[1]);
 300 #endif
 301   State.regs[OP[0]] ^= 0x8000 >> OP[1];
 302 }
 303
 304 /* bra.s */
 305 void
 306 OP_4800 ()
 307 {
 308 #ifdef DEBUG
 309   printf("   bra.s\t0x%x\n",OP[0]);
 310 #endif
 311   PC += SEXT8 (OP[0]);
 312 }
 313
 314 /* bra.l */
 315 void
 316 OP_24000000 ()
 317 {
 318 #ifdef DEBUG
 319   printf("   bra.l\t0x%x\n",OP[0]);
 320 #endif
 321   PC += OP[0];
 322 }
 323
 324 /* brf0f.s */
 325 void
 326 OP_4A00 ()
 327 {
 328 #ifdef DEBUG
 329   printf("   brf0f.s\t0x%x\n",OP[0]);
 330 #endif
 331   if (State.F0 == 0)
 332     PC += SEXT8 (OP[0]);
 333 }
 334
 335 /* brf0f.l */
 336 void
 337 OP_25000000 ()
 338 {
 339 #ifdef DEBUG
 340   printf("   brf0f.l\t0x%x\n",OP[0]);
 341 #endif
 342   if (State.F0 == 0)
 343     PC += OP[0];
 344 }
 345
 346 /* brf0t.s */
 347 void
 348 OP_4B00 ()
 349 {
 350 #ifdef DEBUG
 351   printf("   brf0t.s\t0x%x\n",OP[0]);
 352 #endif
 353   if (State.F0)
 354     PC += SEXT8 (OP[0]);
 355 }
 356
 357 /* brf0t.l */
 358 void
 359 OP_25800000 ()
 360 {
 361 #ifdef DEBUG
 362   printf("   brf0t.l\t0x%x\n",OP[0]);
 363 #endif
 364   if (State.F0)
 365     PC += OP[0];
 366 }
 367
 368 /* bseti */
 369 void
 370 OP_801 ()
 371 {
 372 #ifdef DEBUG
 373   printf("   bseti\tr%d,%d\n",OP[0],OP[1]);
 374 #endif
 375   State.regs[OP[0]] |= 0x8000 >> OP[1];
 376 }
 377
 378 /* btsti */
 379 void
 380 OP_E01 ()
 381 {
 382 #ifdef DEBUG
 383   printf("   btsti\tr%d,%d\n",OP[0],OP[1]);
 384 #endif
 385   State.F1 = State.F0;
 386   State.F0 = (State.regs[OP[0]] & (0x8000 >> OP[1])) ? 1 : 0;
 387 }
 388
 389 /* clrac */
 390 void
 391 OP_5601 ()
 392 {
 393 #ifdef DEBUG
 394   printf("   clrac\ta%d\n",OP[0]);
 395 #endif
 396   State.a[OP[0]] = 0;
 397 }
 398
 399 /* cmp */
 400 void
 401 OP_600 ()
 402 {
 403 #ifdef DEBUG
 404   printf("   cmp\tr%d,r%d\n",OP[0],OP[1]);
 405 #endif
 406   State.F1 = State.F0;
 407   State.F0 = ((int16)(State.regs[OP[0]]) < (int16)(State.regs[OP[1]])) ? 1 : 0;
 408 }
 409
 410 /* cmp */
 411 void
 412 OP_1603 ()
 413 {
 414 #ifdef DEBUG
 415   printf("   cmp\ta%d,a%d\n",OP[0],OP[1]);
 416 #endif
 417   State.F1 = State.F0;
 418   State.F0 = (State.a[OP[0]] < State.a[OP[1]]) ? 1 : 0;
 419 }
 420
 421 /* cmpeq */
 422 void
 423 OP_400 ()
 424 {
 425 #ifdef DEBUG
 426   printf("   cmpeq\tr%d,r%d\n",OP[0],OP[1]);
 427 #endif
 428   State.F1 = State.F0;
 429   State.F0 = (State.regs[OP[0]] == State.regs[OP[1]]) ? 1 : 0;
 430 }
 431
 432 /* cmpeq */
 433 void
 434 OP_1403 ()
 435 {
 436 #ifdef DEBUG
 437   printf("   cmpeq\ta%d,a%d\n",OP[0],OP[1]);
 438 #endif
 439   State.F1 = State.F0;
 440   State.F0 = (State.a[OP[0]] == State.a[OP[1]]) ? 1 : 0;
 441 }
 442
 443 /* cmpeqi.s */
 444 void
 445 OP_401 ()
 446 {
 447 #ifdef DEBUG
 448   printf("   cmpeqi.s\tr%d,0x%x\n",OP[0],OP[1]);
 449 #endif
 450   State.F1 = State.F0;
 451   State.F0 = (State.regs[OP[0]] == SEXT4(OP[1])) ? 1 : 0;
 452 }
 453
 454 /* cmpeqi.l */
 455 void
 456 OP_2000000 ()
 457 {
 458 #ifdef DEBUG
 459   printf("   cmpeqi.l\tr%d,0x%x\n",OP[0],OP[1]);
 460 #endif
 461   State.F1 = State.F0;
 462   State.F0 = (State.regs[OP[0]] == OP[1]) ? 1 : 0;
 463 }
 464
 465 /* cmpi.s */
 466 void
 467 OP_601 ()
 468 {
 469 #ifdef DEBUG
 470   printf("   cmpi.s\tr%d,0x%x\n",OP[0],OP[1]);
 471 #endif
 472   State.F1 = State.F0;
 473   State.F0 = ((int16)(State.regs[OP[0]]) < SEXT4(OP[1])) ? 1 : 0;
 474 }
 475
 476 /* cmpi.l */
 477 void
 478 OP_3000000 ()
 479 {
 480 #ifdef DEBUG
 481   printf("   cmpi.l\tr%d,0x%x\n",OP[0],OP[1]);
 482 #endif
 483   State.F1 = State.F0;
 484   State.F0 = ((int16)(State.regs[OP[0]]) < (int16)(OP[1])) ? 1 : 0;
 485 }
 486
 487 /* cmpu */
 488 void
 489 OP_4600 ()
 490 {
 491 #ifdef DEBUG
 492   printf("   cmpu\tr%d,r%d\n",OP[0],OP[1]);
 493 #endif
 494   State.F1 = State.F0;
 495   State.F0 = (State.regs[OP[0]] < State.regs[OP[1]]) ? 1 : 0;
 496 }
 497
 498 /* cmpui */
 499 void
 500 OP_23000000 ()
 501 {
 502 #ifdef DEBUG
 503   printf("   cmpui\tr%d,0x%x\n",OP[0],OP[1]);
 504 #endif
 505   State.F1 = State.F0;
 506   State.F0 = (State.regs[OP[0]] < OP[1]) ? 1 : 0;
 507 }
 508
 509 /* cpfg */
 510 void
 511 OP_4E09 ()
 512 {
 513   uint8 *src, *dst;
 514 #ifdef DEBUG
 515   printf("   cpfg\t%x,%x\n",OP[0],OP[1]);
 516 #endif
 517
 518   if (OP[0] == 0)
 519     dst = &State.F0;
 520   else
 521     dst = &State.F1;
 522
 523   if (OP[1] == 0)
 524     src = &State.F0;
 525   else if (OP[1] == 1)
 526     src = &State.F1;
 527   else
 528     src = &State.C;
 529
 530   *dst = *src;
 531 }
 532
 533 /* dbt */
 534 void
 535 OP_5F20 ()
 536 {
 537   printf("   dbt - NOT IMPLEMENTED\n");
 538 }
 539
 540 /* divs */
 541 void
 542 OP_14002800 ()
 543 {
 544   uint16 foo, tmp, tmpf;
 545 #ifdef DEBUG
 546   printf("   divs\tr%d,r%d\n",OP[0],OP[1]);
 547 #endif
 548   foo = (State.regs[OP[0]] << 1) | (State.regs[OP[0]+1] >> 15);
 549   tmp = (int16)foo - (int16)(State.regs[OP[1]]);
 550   tmpf = (foo >= State.regs[OP[1]]) ? 1 : 0;
 551   State.regs[OP[0]] = (tmpf == 1) ? tmp : foo;
 552   State.regs[OP[0]+1] = (State.regs[OP[0]+1] << 1) | tmpf;
 553 }
 554
 555 /* exef0f */
 556 void
 557 OP_4E04 ()
 558 {
 559 #ifdef DEBUG
 560   printf("   exef0f\n");
 561 #endif
 562   State.exe = (State.F0) ? 0 : 1;
 563 }
 564
 565 /* exef0t */
 566 void
 567 OP_4E24 ()
 568 {
 569 #ifdef DEBUG
 570   printf("   exef0t\n");
 571 #endif
 572   State.exe = State.F0;
 573 }
 574
 575 /* exef1f */
 576 void
 577 OP_4E40 ()
 578 {
 579 #ifdef DEBUG
 580   printf("   exef1f\n");
 581 #endif
 582   State.exe = (State.F1) ? 0 : 1;
 583 }
 584
 585 /* exef1t */
 586 void
 587 OP_4E42 ()
 588 {
 589 #ifdef DEBUG
 590   printf("   exef1t\n");
 591 #endif
 592   State.exe = State.F1;
 593 }
 594
 595 /* exefaf */
 596 void
 597 OP_4E00 ()
 598 {
 599 #ifdef DEBUG
 600   printf("   exefaf\n");
 601 #endif
 602   State.exe = (State.F0 | State.F1) ? 0 : 1;
 603 }
 604
 605 /* exefat */
 606 void
 607 OP_4E02 ()
 608 {
 609 #ifdef DEBUG
 610   printf("   exefat\n");
 611 #endif
 612   State.exe = (State.F0) ? 0 : (State.F1);
 613 }
 614
 615 /* exetaf */
 616 void
 617 OP_4E20 ()
 618 {
 619 #ifdef DEBUG
 620   printf("   exetaf\n");
 621 #endif
 622   State.exe = (State.F1) ? 0 : (State.F0);
 623 }
 624
 625 /* exetat */
 626 void
 627 OP_4E22 ()
 628 {
 629 #ifdef DEBUG
 630   printf("   exetat\n");
 631 #endif
 632   State.exe = (State.F0) ? (State.F1) : 0;
 633 }
 634
 635 /* exp */
 636 void
 637 OP_15002A00 ()
 638 {
 639   uint32 tmp, foo;
 640   int i;
 641
 642 #ifdef DEBUG
 643   printf("   exp\tr%d,r%d\n",OP[0],OP[1]);
 644 #endif
 645   if (((int16)State.regs[OP[1]]) >= 0)
 646     tmp = (State.regs[OP[1]] << 16) | State.regs[OP[1]+1];
 647   else
 648     tmp = ~((State.regs[OP[1]] << 16) | State.regs[OP[1]+1]);
 649
 650   foo = 0x40000000;
 651   for (i=1;i<17;i++)
 652     {
 653       if (tmp & foo)
 654         {
 655           State.regs[OP[0]] = i-1;
 656           return;
 657         }
 658       foo >>= 1;
 659     }
 660   State.regs[OP[0]] = 16;
 661 }
 662
 663 /* exp */
 664 void
 665 OP_15002A02 ()
 666 {
 667   int64 tmp, foo;
 668   int i;
 669 #ifdef DEBUG
 670   printf("   exp\tr%d,a%d\n",OP[0],OP[1]);
 671 #endif
 672   if (State.a[OP[1]] >= 0)
 673     tmp = State.a[OP[1]];
 674   else
 675     tmp = ~(State.a[OP[1]]);
 676
 677   foo = 0x4000000000LL;
 678   for (i=1;i<25;i++)
 679     {
 680       if (tmp & foo)
 681         {
 682           State.regs[OP[0]] = i-9;
 683           return;
 684         }
 685       foo >>= 1;
 686     }
 687   State.regs[OP[0]] = 16;
 688 }
 689
 690 /* jl */
 691 void
 692 OP_4D00 ()
 693 {
 694 #ifdef DEBUG
 695   printf("   jl\t%x\n",OP[0]);
 696 #endif
 697   State.regs[13] = PC+1;
 698   PC = State.regs[OP[0]];
 699 }
 700
 701 /* jmp */
 702 void
 703 OP_4C00 ()
 704 {
 705 #ifdef DEBUG
 706   printf("   jmp\tr%d\n",OP[0]);
 707 #endif
 708   PC = State.regs[OP[0]];
 709 }
 710
 711 /* ld */
 712 void
 713 OP_30000000 ()
 714 {
 715 #ifdef DEBUG
 716   printf("   ld\tr%d,@(0x%x,r%d)\n",OP[0],OP[1],OP[2]);
 717 #endif
 718   State.regs[OP[0]] = RW (OP[1] + State.regs[OP[2]]);
 719 }
 720
 721 /* ld */
 722 void
 723 OP_6401 ()
 724 {
 725 #ifdef DEBUG
 726   printf("   ld\tr%d,@r%d-\n",OP[0],OP[1]);
 727 #endif
 728   State.regs[OP[0]] = RW (State.regs[OP[1]]);
 729   State.regs[OP[1]] -= 2;
 730 }
 731
 732 /* ld */
 733 void
 734 OP_6001 ()
 735 {
 736 #ifdef DEBUG
 737   printf("   ld\tr%d,@r%d+\n",OP[0],OP[1]);
 738 #endif
 739   State.regs[OP[0]] = RW (State.regs[OP[1]]);
 740   State.regs[OP[1]] += 2;
 741 }
 742
 743 /* ld */
 744 void
 745 OP_6000 ()
 746 {
 747 #ifdef DEBUG
 748   printf("   ld\tr%d,@r%d\n",OP[0],OP[1]);
 749 #endif
 750   State.regs[OP[0]] = RW (State.regs[OP[1]]);
 751 }
 752
 753 /* ld2w */
 754 void
 755 OP_31000000 ()
 756 {
 757 #ifdef DEBUG
 758   printf("   ld2w\tr%d,@(0x%x,r%d)\n",OP[0],OP[1],OP[2]);
 759 #endif
 760   State.regs[OP[0]] = RW (OP[1] + State.regs[OP[2]]);
 761   State.regs[OP[0]+1] = RW (OP[1] + State.regs[OP[2]] + 2);
 762 }
 763
 764 /* ld2w */
 765 void
 766 OP_6601 ()
 767 {
 768 #ifdef DEBUG
 769   printf("   ld2w\tr%d,@r%d-\n",OP[0],OP[1]);
 770 #endif
 771   State.regs[OP[0]] = RW (State.regs[OP[1]]);
 772   State.regs[OP[0]+1] = RW (State.regs[OP[1]]+2);
 773   State.regs[OP[1]] -= 4;
 774 }
 775
 776 /* ld2w */
 777 void
 778 OP_6201 ()
 779 {
 780 #ifdef DEBUG
 781   printf("   ld2w\tr%d,@r%d+\n",OP[0],OP[1]);
 782 #endif
 783   State.regs[OP[0]] = RW (State.regs[OP[1]]);
 784   State.regs[OP[0]+1] = RW (State.regs[OP[1]]+2);
 785   State.regs[OP[1]] += 4;
 786 }
 787
 788 /* ld2w */
 789 void
 790 OP_6200 ()
 791 {
 792 #ifdef DEBUG
 793   printf("   ld2w\tr%d,@r%d\n",OP[0],OP[1]);
 794 #endif
 795   State.regs[OP[0]] = RW (State.regs[OP[1]]);
 796   State.regs[OP[0]+1] = RW (State.regs[OP[1]]+2);
 797 }
 798
 799 /* ldb */
 800 void
 801 OP_38000000 ()
 802 {
 803 #ifdef DEBUG
 804   printf("   ldb\tr%d,@(0x%x,r%d)\n",OP[0],OP[1],OP[2]);
 805 #endif
 806   State.regs[OP[0]] = RB (OP[1] + State.regs[OP[2]]);
 807   SEXT8 (State.regs[OP[0]]);
 808 }
 809
 810 /* ldb */
 811 void
 812 OP_7000 ()
 813 {
 814 #ifdef DEBUG
 815   printf("   ldb\tr%d,@r%d\n",OP[0],OP[1]);
 816 #endif
 817   State.regs[OP[0]] = RB (State.regs[OP[1]]);
 818   SEXT8 (State.regs[OP[0]]);
 819 }
 820
 821 /* ldi.s */
 822 void
 823 OP_4001 ()
 824 {
 825 #ifdef DEBUG
 826   printf("   ldi.s\tr%d,%x\n",OP[0],SEXT4(OP[1]));
 827 #endif
 828   State.regs[OP[0]] = SEXT4(OP[1]);
 829 }
 830
 831 /* ldi.l */
 832 void
 833 OP_20000000 ()
 834 {
 835 #ifdef DEBUG
 836   printf("   ldi.l\tr%d,%d\t;0x%x\n",OP[0],OP[1],OP[1]);
 837 #endif
 838   State.regs[OP[0]] = OP[1];
 839 }
 840
 841 /* ldub */
 842 void
 843 OP_39000000 ()
 844 {
 845 #ifdef DEBUG
 846   printf("   ldub\tr%d,@(0x%x,r%d)\n",OP[0],OP[1],OP[2]);
 847 #endif
 848   State.regs[OP[0]] = RB (OP[1] + State.regs[OP[2]]);
 849 }
 850
 851 /* ldub */
 852 void
 853 OP_7200 ()
 854 {
 855 #ifdef DEBUG
 856   printf("   ldub\tr%d,@r%d\n",OP[0],OP[1]);
 857 #endif
 858   State.regs[OP[0]] = RB (State.regs[OP[1]]);
 859 }
 860
 861 /* mac */
 862 void
 863 OP_2A00 ()
 864 {
 865   int64 tmp;
 866 #ifdef DEBUG
 867   printf("   mac\ta%d,r%d,r%d\n",OP[0],OP[1],OP[2]);
 868 #endif
 869   tmp = (int16)(State.regs[OP[1]]) * (int16)(State.regs[OP[2]]);
 870
 871   if (State.FX)
 872     tmp <<= 1;
 873
 874   if (State.ST && tmp > MAX32)
 875     tmp = MAX32;
 876
 877   tmp += State.a[OP[0]];
 878   if (State.ST)
 879     {
 880       if (tmp > MAX32)
 881         State.a[OP[0]] = MAX32;
 882       else if (tmp < MIN32)
 883         State.a[OP[0]] = MIN32;
 884       else
 885         State.a[OP[0]] = tmp;
 886     }
 887   else
 888     State.a[OP[0]] = tmp;
 889 }
 890
 891 /* macsu */
 892 void
 893 OP_1A00 ()
 894 {
 895 #ifdef DEBUG
 896 printf("   macsu\t%x,%x,%x\n",OP[0],OP[1],OP[2]);
 897 #endif
 898 }
 899
 900 /* macu */
 901 void
 902 OP_3A00 ()
 903 {
 904 #ifdef DEBUG
 905 printf("   macu\t%x,%x,%x\n",OP[0],OP[1],OP[2]);
 906 #endif
 907 }
 908
 909 /* max */
 910 void
 911 OP_2600 ()
 912 {
 913 #ifdef DEBUG
 914   printf("   max\tr%d,r%d\n",OP[0],OP[1]);
 915 #endif
 916   State.F1 = State.F0;
 917   if (State.regs[OP[1]] > State.regs[OP[0]])
 918     {
 919       State.regs[OP[0]] = State.regs[OP[1]];
 920       State.F0 = 1;
 921     }
 922   else
 923     State.F0 = 0;
 924 }
 925
 926 /* max */
 927 void
 928 OP_3600 ()
 929 {
 930 #ifdef DEBUG
 931 printf("   max\t%x,%x\n",OP[0],OP[1]);
 932 #endif
 933 }
 934
 935 /* max */
 936 void
 937 OP_3602 ()
 938 {
 939 #ifdef DEBUG
 940 printf("   max\t%x,%x\n",OP[0],OP[1]);
 941 #endif
 942 }
 943
 944 /* min */
 945 void
 946 OP_2601 ()
 947 {
 948 #ifdef DEBUG
 949   printf("   min\tr%d,r%d\n",OP[0],OP[1]);
 950 #endif
 951   State.F1 = State.F0;
 952   if (State.regs[OP[1]] < State.regs[OP[0]])
 953     {
 954       State.regs[OP[0]] = State.regs[OP[1]];
 955       State.F0 = 1;
 956     }
 957   else
 958     State.F0 = 0;
 959 }
 960
 961 /* min */
 962 void
 963 OP_3601 ()
 964 {
 965 #ifdef DEBUG
 966 printf("   min\t%x,%x\n",OP[0],OP[1]);
 967 #endif
 968 }
 969
 970 /* min */
 971 void
 972 OP_3603 ()
 973 {
 974 #ifdef DEBUG
 975 printf("   min\t%x,%x\n",OP[0],OP[1]);
 976 #endif
 977 }
 978
 979 /* msb */
 980 void
 981 OP_2800 ()
 982 {
 983 #ifdef DEBUG
 984 printf("   msb\t%x,%x,%x\n",OP[0],OP[1],OP[2]);
 985 #endif
 986 }
 987
 988 /* msbsu */
 989 void
 990 OP_1800 ()
 991 {
 992 #ifdef DEBUG
 993 printf("   msbsu\t%x,%x,%x\n",OP[0],OP[1],OP[2]);
 994 #endif
 995 }
 996
 997 /* msbu */
 998 void
 999 OP_3800 ()
1000 {
1001 #ifdef DEBUG
1002 printf("   msbu\t%x,%x,%x\n",OP[0],OP[1],OP[2]);
1003 #endif
1004 }
1005
1006 /* mul */
1007 void
1008 OP_2E00 ()
1009 {
1010 #ifdef DEBUG
1011   printf("   mul\tr%d,r%d\n",OP[0],OP[1]);
1012 #endif
1013   State.regs[OP[0]] *= State.regs[OP[1]];
1014 }
1015
1016 /* mulx */
1017 void
1018 OP_2C00 ()
1019 {
1020 #ifdef DEBUG
1021 printf("   mulx\t%x,%x,%x\n",OP[0],OP[1],OP[2]);
1022 #endif
1023 }
1024
1025 /* mulxsu */
1026 void
1027 OP_1C00 ()
1028 {
1029 #ifdef DEBUG
1030 printf("   mulxsu\t%x,%x,%x\n",OP[0],OP[1],OP[2]);
1031 #endif
1032 }
1033
1034 /* mulxu */
1035 void
1036 OP_3C00 ()
1037 {
1038 #ifdef DEBUG
1039 printf("   mulxu\t%x,%x,%x\n",OP[0],OP[1],OP[2]);
1040 #endif
1041 }
1042
1043 /* mv */
1044 void
1045 OP_4000 ()
1046 {
1047 #ifdef DEBUG
1048   printf("   mv\tr%d,r%d\n",OP[0],OP[1]);
1049 #endif
1050   State.regs[OP[0]] = State.regs[OP[1]];
1051 }
1052
1053 /* mv2w */
1054 void
1055 OP_5000 ()
1056 {
1057 #ifdef DEBUG
1058   printf("   mv2w\tr%d,r%d\n",OP[0],OP[1]);
1059 #endif
1060   State.regs[OP[0]] = State.regs[OP[1]];
1061   State.regs[OP[0]+1] = State.regs[OP[1]+1];
1062 }
1063
1064 /* mv2wfac */
1065 void
1066 OP_3E00 ()
1067 {
1068 #ifdef DEBUG
1069   printf("   mv2wfac\tr%d,a%d\n",OP[0],OP[1]);
1070 #endif
1071   State.regs[OP[0]] = (State.a[OP[1]] >> 16) & 0xffff;
1072   State.regs[OP[0]+1] = State.a[OP[1]] & 0xffff;
1073 }
1074
1075 /* mv2wtac */
1076 void
1077 OP_3E01 ()
1078 {
1079 #ifdef DEBUG
1080   printf("   mv2wtac\tr%d,a%d\n",OP[0],OP[1]);
1081 #endif
1082   State.a[OP[1]] = SEXT16 (State.regs[OP[0]]) << 16 | State.regs[OP[0]+1];
1083 }
1084
1085 /* mvac */
1086 void
1087 OP_3E03 ()
1088 {
1089 #ifdef DEBUG
1090   printf("   mvac\ta%d,a%d\n",OP[0],OP[1]);
1091 #endif
1092   State.a[OP[0]] = State.a[OP[1]];
1093 }
1094
1095 /* mvb */
1096 void
1097 OP_5400 ()
1098 {
1099 #ifdef DEBUG
1100   printf("   mvb\tr%d,r%d\n",OP[0],OP[1]);
1101 #endif
1102   State.regs[OP[0]] = SEXT8 (State.regs[OP[1]] & 0xff);
1103 }
1104
1105 /* mvf0f */
1106 void
1107 OP_4400 ()
1108 {
1109 #ifdef DEBUG
1110   printf("   mvf0f\tr%d,r%d\n",OP[0],OP[1]);
1111 #endif
1112   if (State.F0 == 0)
1113     State.regs[OP[0]] = State.regs[OP[1]];
1114 }
1115
1116 /* mvf0t */
1117 void
1118 OP_4401 ()
1119 {
1120 #ifdef DEBUG
1121   printf("   mvf0t\tr%d,r%d\n",OP[0],OP[1]);
1122 #endif
1123   if (State.F0)
1124     State.regs[OP[0]] = State.regs[OP[1]];
1125 }
1126
1127 /* mvfacg */
1128 void
1129 OP_1E04 ()
1130 {
1131 #ifdef DEBUG
1132   printf("   mvfacg\tr%d,a%d\n",OP[0],OP[1]);
1133 #endif
1134   State.regs[OP[0]] = (State.a[OP[1]] >> 32) & 0xff;
1135 }
1136
1137 /* mvfachi */
1138 void
1139 OP_1E00 ()
1140 {
1141 #ifdef DEBUG
1142   printf("   mvfachi\tr%d,a%d\n",OP[0],OP[1]);
1143 #endif
1144   State.regs[OP[0]] = (State.a[OP[1]] >> 16) & 0xffff;
1145 }
1146
1147 /* mvfaclo */
1148 void
1149 OP_1E02 ()
1150 {
1151 #ifdef DEBUG
1152   printf("   mvfaclo\tr%d,a%d\n",OP[0],OP[1]);
1153 #endif
1154   State.regs[OP[0]] = State.a[OP[1]] & 0xffff;
1155 }
1156
1157 /* mvfc */
1158 void
1159 OP_5200 ()
1160 {
1161 #ifdef DEBUG
1162   printf("   mvfc\tr%d,cr%d\n",OP[0],OP[1]);
1163 #endif
1164   if (OP[1] == 0)
1165     {
1166       /* PSW is treated specially */
1167       PSW = 0;
1168       if (State.SM) PSW |= 0x8000;
1169       if (State.EA) PSW |= 0x2000;
1170       if (State.DB) PSW |= 0x1000;
1171       if (State.IE) PSW |= 0x400;
1172       if (State.RP) PSW |= 0x200;
1173       if (State.MD) PSW |= 0x100;
1174       if (State.FX) PSW |= 0x80;
1175       if (State.ST) PSW |= 0x40;
1176       if (State.F0) PSW |= 8;
1177       if (State.F1) PSW |= 4;
1178       if (State.C) PSW |= 1;
1179     }
1180   State.regs[OP[0]] = State.cregs[OP[1]];
1181 }
1182
1183 /* mvtacg */
1184 void
1185 OP_1E41 ()
1186 {
1187 #ifdef DEBUG
1188   printf("   mvtacg\tr%d,a%d\n",OP[0],OP[1]);
1189 #endif
1190   State.a[OP[1]] &= MASK32;
1191   State.a[OP[1]] |= (int64)(State.regs[OP[0]] & 0xff) << 32;
1192 }
1193
1194 /* mvtachi */
1195 void
1196 OP_1E01 ()
1197 {
1198   uint16 tmp;
1199 #ifdef DEBUG
1200   printf("   mvtachi\tr%d,a%d\n",OP[0],OP[1]);
1201 #endif
1202   tmp = State.a[OP[1]] & 0xffff;
1203   State.a[OP[1]] = SEXT16 (State.regs[OP[0]]) << 16 | tmp;
1204   printf("put 0x%llx\n",State.a[OP[1]]);
1205 }
1206
1207 /* mvtaclo */
1208 void
1209 OP_1E21 ()
1210 {
1211 #ifdef DEBUG
1212   printf("   mvtaclo\tr%d,a%d\n",OP[0],OP[1]);
1213 #endif
1214   State.a[OP[1]] = SEXT16 (State.regs[OP[0]]);
1215 }
1216
1217 /* mvtc */
1218 void
1219 OP_5600 ()
1220 {
1221 #ifdef DEBUG
1222   printf("   mvtc\tr%d,cr%d\n",OP[0],OP[1]);
1223 #endif
1224   State.cregs[OP[1]] =  State.regs[OP[0]];
1225   if (OP[1] == 0)
1226     {
1227       /* PSW is treated specially */
1228       State.SM = (PSW & 0x8000) ? 1 : 0;
1229       State.EA = (PSW & 0x2000) ? 1 : 0;
1230       State.DB = (PSW & 0x1000) ? 1 : 0;
1231       State.IE = (PSW & 0x400) ? 1 : 0;
1232       State.RP = (PSW & 0x200) ? 1 : 0;
1233       State.MD = (PSW & 0x100) ? 1 : 0;
1234       State.FX = (PSW & 0x80) ? 1 : 0;
1235       State.ST = (PSW & 0x40) ? 1 : 0;
1236       State.F0 = (PSW & 8) ? 1 : 0;
1237       State.F1 = (PSW & 4) ? 1 : 0;
1238       State.C = PSW & 1;
1239       if (State.ST && !State.FX)
1240         {
1241           fprintf (stderr,"ERROR at PC 0x%x: ST can only be set when FX is set.\n",PC<<2);
1242           exit (1);
1243         }
1244     }
1245 }
1246
1247 /* mvub */
1248 void
1249 OP_5401 ()
1250 {
1251 #ifdef DEBUG
1252   printf("   mvub\tr%d,r%d\n",OP[0],OP[1]);
1253 #endif
1254   State.regs[OP[0]] = State.regs[OP[1]] & 0xff;
1255 }
1256
1257 /* neg */
1258 void
1259 OP_4605 ()
1260 {
1261 #ifdef DEBUG
1262   printf("   neg\tr%d\n",OP[0]);
1263 #endif
1264   State.regs[OP[0]] = 0 - State.regs[OP[0]];
1265 }
1266
1267 /* neg */
1268 void
1269 OP_5605 ()
1270 {
1271   int64 tmp;
1272 #ifdef DEBUG
1273   printf("   neg\ta%d\n",OP[0]);
1274 #endif
1275   tmp = -State.a[OP[0]];
1276   if (State.ST)
1277     {
1278       if ( tmp > MAX32)
1279         State.a[OP[0]] = MAX32;
1280       else if (tmp < MIN32)
1281         State.a[OP[0]] = MIN32;
1282       else
1283         State.a[OP[0]] = tmp;
1284     }
1285   else
1286     State.a[OP[0]] = tmp;
1287 }
1288
1289
1290 /* nop */
1291 void
1292 OP_5E00 ()
1293 {
1294 }
1295
1296 /* not */
1297 void
1298 OP_4603 ()
1299 {
1300 #ifdef DEBUG
1301   printf("   not\tr%d\n",OP[0]);
1302 #endif
1303   State.regs[OP[0]] = ~(State.regs[OP[0]]);
1304 }
1305
1306 /* or */
1307 void
1308 OP_800 ()
1309 {
1310 #ifdef DEBUG
1311   printf("   or\tr%d,r%d\n",OP[0],OP[1]);
1312 #endif
1313   State.regs[OP[0]] |= State.regs[OP[1]];
1314 }
1315
1316 /* or3 */
1317 void
1318 OP_4000000 ()
1319 {
1320 #ifdef DEBUG
1321   printf("   or3\tr%d,r%d,0x%x\n",OP[0],OP[1],OP[2]);
1322 #endif
1323   State.regs[OP[0]] = State.regs[OP[1]] | OP[2];
1324 }
1325
1326 /* rac */
1327 void
1328 OP_5201 ()
1329 {
1330   int64 tmp;
1331   int shift = SEXT3 (OP[2]);
1332 #ifdef DEBUG
1333   printf("   rac\tr%d,a%d,%d\n",OP[0],OP[1],shift);
1334 #endif
1335   State.F1 = State.F0;
1336   if (shift >=0)
1337     tmp = ((State.a[0] << 16) | (State.a[1] & 0xffff)) << shift;
1338   else
1339     tmp = ((State.a[0] << 16) | (State.a[1] & 0xffff)) >> -shift;
1340   tmp = (tmp + 0x8000) >> 16;
1341
1342   if (tmp > MAX32)
1343     {
1344       State.regs[OP[0]] = 0x7fff;
1345       State.regs[OP[0]+1] = 0xffff;
1346       State.F0 = 1;
1347     }
1348   else if (tmp < MIN32)
1349     {
1350       State.regs[OP[0]] = 0x8000;
1351       State.regs[OP[0]+1] = 0;
1352       State.F0 = 1;
1353     }
1354   else
1355     {
1356       State.regs[OP[0]] = (tmp >> 16) & 0xffff;
1357       State.regs[OP[0]+1] = tmp & 0xffff;
1358       State.F0 = 0;
1359     }
1360 }
1361
1362 /* rachi */
1363 void
1364 OP_4201 ()
1365 {
1366   int64 tmp;
1367   int shift = SEXT3 (OP[2]);
1368 #ifdef DEBUG
1369   printf("   rachi\tr%d,a%d,%d\n",OP[0],OP[1],shift);
1370 #endif
1371   State.F1 = State.F0;
1372   if (shift >=0)
1373     tmp = SEXT40 (State.a[1]) << shift;
1374   else
1375     tmp = SEXT40 (State.a[1]) >> -shift;
1376   tmp += 0x8000;
1377   if (tmp > MAX32)
1378     {
1379       State.regs[OP[0]] = 0x7fff;
1380       State.F0 = 1;
1381     }
1382   else if (tmp < 0xfff80000000LL)
1383     {
1384       State.regs[OP[0]] = 0x8000;
1385       State.F0 = 1;
1386     }
1387   else
1388     {
1389       State.regs[OP[0]] = (tmp >> 16) & 0xffff;
1390       State.F0 = 0;
1391     }
1392 }
1393
1394 /* rep */
1395 void
1396 OP_27000000 ()
1397 {
1398 #ifdef DEBUG
1399   printf("   rep\tr%d,0x%x\n",OP[0],OP[1]);
1400 #endif
1401   RPT_S = PC + 1;
1402   RPT_E = PC + OP[1];
1403   RPT_C = State.regs[OP[0]];
1404   State.RP = 1;
1405   if (RPT_C == 0)
1406     {
1407       fprintf (stderr, "ERROR: rep with count=0 is illegal.\n");
1408       exit(1);
1409     }
1410   if (OP[1] < 4)
1411     {
1412       fprintf (stderr, "ERROR: rep must include at least 4 instructions.\n");
1413       exit(1);
1414     }
1415 }
1416
1417 /* repi */
1418 void
1419 OP_2F000000 ()
1420 {
1421 #ifdef DEBUG
1422   printf("   repi\t%d,0x%x\n",OP[0],OP[1]);
1423 #endif
1424   RPT_S = PC + 1;
1425   RPT_E = PC + OP[1];
1426   RPT_C = OP[0];
1427   State.RP = 1;
1428   if (RPT_C == 0)
1429     {
1430       fprintf (stderr, "ERROR: repi with count=0 is illegal.\n");
1431       exit(1);
1432     }
1433   if (OP[1] < 4)
1434     {
1435       fprintf (stderr, "ERROR: repi must include at least 4 instructions.\n");
1436       exit(1);
1437     }
1438 }
1439
1440 /* rtd */
1441 void
1442 OP_5F60 ()
1443 {
1444   printf("   rtd - NOT IMPLEMENTED\n");
1445 }
1446
1447 /* rte */
1448 void
1449 OP_5F40 ()
1450 {
1451 #ifdef DEBUG
1452   printf("   rte\n");
1453 #endif
1454   PC = BPC;
1455   PSW = BPSW;
1456 }
1457
1458 /* sadd */
1459 void
1460 OP_1223 ()
1461 {
1462   int64 tmp;
1463 #ifdef DEBUG
1464   printf("   sadd\ta%d,a%d\n",OP[0],OP[1]);
1465 #endif
1466   tmp = State.a[OP[0]] + (State.a[OP[1]] >> 16);
1467   if (State.ST)
1468     {
1469       if (tmp > MAX32)
1470         State.a[OP[0]] = MAX32;
1471       else if (tmp < MIN32)
1472         State.a[OP[0]] = MIN32;
1473       else
1474         State.a[OP[0]] = tmp;
1475     }
1476   else
1477     State.a[OP[0]] = tmp;
1478 }
1479
1480 /* setf0f */
1481 void
1482 OP_4611 ()
1483 {
1484 #ifdef DEBUG
1485   printf("   setf0f\tr%d\n",OP[0]);
1486 #endif
1487   State.regs[OP[0]] = (State.F0 == 0) ? 1 : 0;
1488 }
1489
1490 /* setf0t */
1491 void
1492 OP_4613 ()
1493 {
1494 #ifdef DEBUG
1495   printf("   setf0t\tr%d\n",OP[0]);
1496 #endif
1497   State.regs[OP[0]] = (State.F0 == 1) ? 1 : 0;
1498 }
1499
1500 /* sleep */
1501 void
1502 OP_5FC0 ()
1503 {
1504 #ifdef DEBUG
1505   printf("   sleep\n");
1506 #endif
1507   State.IE = 1;
1508 }
1509
1510 /* sll */
1511 void
1512 OP_2200 ()
1513 {
1514 #ifdef DEBUG
1515   printf("   sll\tr%d,r%d\n",OP[0],OP[1]);
1516 #endif
1517   State.regs[OP[0]] <<= (State.regs[OP[1]] & 0xf);
1518 }
1519
1520 /* sll */
1521 void
1522 OP_3200 ()
1523 {
1524   int64 tmp;
1525 #ifdef DEBUG
1526   printf("   sll\ta%d,r%d\n",OP[0],OP[1]);
1527 #endif
1528   if (State.regs[OP[1]] & 31 <= 16)
1529     tmp = SEXT40 (State.a[OP[0]]) << (State.regs[OP[1]] & 31);
1530
1531   if (State.ST)
1532     {
1533       if (tmp > MAX32)
1534         State.a[OP[0]] = MAX32;
1535       else if (tmp < 0xffffff80000000LL)
1536         State.a[OP[0]] = MIN32;
1537       else
1538         State.a[OP[0]] = tmp & MASK40;
1539     }
1540   else
1541     State.a[OP[0]] = tmp & MASK40;
1542 }
1543
1544 /* slli */
1545 void
1546 OP_2201 ()
1547 {
1548 #ifdef DEBUG
1549   printf("   slli\tr%d,%d\n",OP[0],OP[1]);
1550 #endif
1551   State.regs[OP[0]] <<= OP[1];
1552 }
1553
1554 /* slli */
1555 void
1556 OP_3201 ()
1557 {
1558   int64 tmp;
1559 #ifdef DEBUG
1560   printf("   slli\ta%d,%d\n",OP[0],OP[1]);
1561 #endif
1562   if (OP[1] == 0)
1563     tmp = SEXT40(State.a[OP[0]]) << 16;
1564   else
1565     tmp = SEXT40(State.a[OP[0]]) << OP[2];
1566
1567   if (State.ST)
1568     {
1569       if (tmp > MAX32)
1570         State.a[OP[0]] = MAX32;
1571       else if (tmp < 0xffffff80000000LL)
1572         State.a[OP[0]] = MIN32;
1573       else
1574         State.a[OP[0]] = tmp & MASK40;
1575     }
1576   else
1577     State.a[OP[0]] = tmp & MASK40;
1578 }
1579
1580 /* slx */
1581 void
1582 OP_460B ()
1583 {
1584   uint16 tmp;
1585 #ifdef DEBUG
1586   printf("   slx\tr%d\n",OP[0]);
1587 #endif
1588   State.regs[OP[0]] = (State.regs[OP[0]] << 1) | State.F0;
1589 }
1590
1591 /* sra */
1592 void
1593 OP_2400 ()
1594 {
1595 #ifdef DEBUG
1596   printf("   sra\tr%d,r%d\n",OP[0],OP[1]);
1597 #endif
1598   State.regs[OP[0]] = ((int16)(State.regs[OP[0]])) >> (State.regs[OP[1]] & 0xf);
1599 }
1600
1601 /* sra */
1602 void
1603 OP_3400 ()
1604 {
1605 #ifdef DEBUG
1606   printf("   sra\ta%d,r%d\n",OP[0],OP[1]);
1607 #endif
1608   if (State.regs[OP[1]] & 31 <= 16)
1609     State.a[OP[0]] >>= (State.regs[OP[1]] & 31);
1610 }
1611
1612 /* srai */
1613 void
1614 OP_2401 ()
1615 {
1616 #ifdef DEBUG
1617   printf("   srai\tr%d,%d\n",OP[0],OP[1]);
1618 #endif
1619   State.regs[OP[0]] = ((int16)(State.regs[OP[0]])) >> OP[1];
1620 }
1621
1622 /* srai */
1623 void
1624 OP_3401 ()
1625 {
1626 #ifdef DEBUG
1627   printf("   srai\ta%d,%d\n",OP[0],OP[1]);
1628 #endif
1629   if (OP[1] == 0)
1630     State.a[OP[0]] >>= 16;
1631   else
1632     State.a[OP[0]] >>= OP[1];
1633 }
1634
1635 /* srl */
1636 void
1637 OP_2000 ()
1638 {
1639 #ifdef DEBUG
1640   printf("   srl\tr%d,r%d\n",OP[0],OP[1]);
1641 #endif
1642   State.regs[OP[0]] >>=  (State.regs[OP[1]] & 0xf);
1643 }
1644
1645 /* srl */
1646 void
1647 OP_3000 ()
1648 {
1649 #ifdef DEBUG
1650   printf("   srl\ta%d,r%d\n",OP[0],OP[1]);
1651 #endif
1652   if (State.regs[OP[1]] & 31 <= 16)
1653     State.a[OP[0]] >>= (State.regs[OP[1]] & 31);
1654 }
1655
1656 /* srli */
1657 void
1658 OP_2001 ()
1659 {
1660 #ifdef DEBUG
1661 printf("   srli\tr%d,%d\n",OP[0],OP[1]);
1662 #endif
1663   State.regs[OP[0]] >>= OP[1];
1664 }
1665
1666 /* srli */
1667 void
1668 OP_3001 ()
1669 {
1670 #ifdef DEBUG
1671   printf("   srli\ta%d,%d\n",OP[0],OP[1]);
1672 #endif
1673   if (OP[1] == 0)
1674     State.a[OP[0]] >>= 16;
1675   else
1676     State.a[OP[0]] >>= OP[1];
1677 }
1678
1679 /* srx */
1680 void
1681 OP_4609 ()
1682 {
1683   uint16 tmp;
1684 #ifdef DEBUG
1685   printf("   srx\tr%d\n",OP[0]);
1686 #endif
1687   tmp = State.F0 << 15;
1688   State.regs[OP[0]] = (State.regs[OP[0]] >> 1) | tmp;
1689 }
1690
1691 /* st */
1692 void
1693 OP_34000000 ()
1694 {
1695 #ifdef DEBUG
1696   printf("   st\tr%d,@(0x%x,r%d)\n",OP[0],OP[1],OP[2]);
1697 #endif
1698   SW (OP[1] + State.regs[OP[2]], State.regs[OP[0]]);
1699 }
1700
1701 /* st */
1702 void
1703 OP_6800 ()
1704 {
1705 #ifdef DEBUG
1706   printf("   st\tr%d,@r%d\n",OP[0],OP[1]);
1707 #endif
1708   SW (State.regs[OP[1]], State.regs[OP[0]]);
1709 }
1710
1711 /* st */
1712 void
1713 OP_6C1F ()
1714 {
1715 #ifdef DEBUG
1716   printf("   st\tr%d,@-r%d\n",OP[0],OP[1]);
1717 #endif
1718   if ( OP[1] != 15 )
1719     {
1720       fprintf (stderr,"ERROR: cannot pre-decrement any registers but r15 (SP).\n");
1721       exit(1);
1722     }
1723   State.regs[OP[1]] -= 2;
1724   SW (State.regs[OP[1]], State.regs[OP[0]]);
1725 }
1726
1727 /* st */
1728 void
1729 OP_6801 ()
1730 {
1731 #ifdef DEBUG
1732   printf("   st\tr%d,@r%d+\n",OP[0],OP[1]);
1733 #endif
1734   SW (State.regs[OP[1]], State.regs[OP[0]]);
1735   State.regs[OP[1]] += 2;
1736 }
1737
1738 /* st */
1739 void
1740 OP_6C01 ()
1741 {
1742 #ifdef DEBUG
1743   printf("   st\tr%d,@r%d-\n",OP[0],OP[1]);
1744 #endif
1745   SW (State.regs[OP[1]], State.regs[OP[0]]);
1746   State.regs[OP[1]] -= 2;
1747 }
1748
1749 /* st2w */
1750 void
1751 OP_35000000 ()
1752 {
1753 #ifdef DEBUG
1754   printf("   st2w\tr%d,@(0x%x,r%d)\n",OP[0],OP[1],OP[2]);
1755 #endif
1756   SW (State.regs[OP[1]]+OP[2], State.regs[OP[0]]);
1757   SW (State.regs[OP[1]]+OP[2]+2, State.regs[OP[0]+1]);
1758 }
1759
1760 /* st2w */
1761 void
1762 OP_6A00 ()
1763 {
1764 #ifdef DEBUG
1765   printf("   st2w\tr%d,@r%d\n",OP[0],OP[1]);
1766 #endif
1767   SW (State.regs[OP[1]],   State.regs[OP[0]]);
1768   SW (State.regs[OP[1]]+2, State.regs[OP[0]+1]);
1769 }
1770
1771 /* st2w */
1772 void
1773 OP_6E1F ()
1774 {
1775 #ifdef DEBUG
1776   printf("   st2w\tr%d,@-r%d\n",OP[0],OP[1]);
1777 #endif
1778   if ( OP[1] != 15 )
1779     {
1780       fprintf (stderr,"ERROR: cannot pre-decrement any registers but r15 (SP).\n");
1781       exit(1);
1782     }
1783   State.regs[OP[1]] -= 4;
1784   SW (State.regs[OP[1]],   State.regs[OP[0]]);
1785   SW (State.regs[OP[1]]+2, State.regs[OP[0]+1]);
1786 }
1787
1788 /* st2w */
1789 void
1790 OP_6A01 ()
1791 {
1792 #ifdef DEBUG
1793   printf("   st2w\tr%d,r%d+\n",OP[0],OP[1]);
1794 #endif
1795   SW (State.regs[OP[1]],   State.regs[OP[0]]);
1796   SW (State.regs[OP[1]]+2, State.regs[OP[0]+1]);
1797   State.regs[OP[1]] += 4;
1798 }
1799
1800 /* st2w */
1801 void
1802 OP_6E01 ()
1803 {
1804 #ifdef DEBUG
1805   printf("   st2w\tr%d,r%d-\n",OP[0],OP[1]);
1806 #endif
1807   SW (State.regs[OP[1]],   State.regs[OP[0]]);
1808   SW (State.regs[OP[1]]+2, State.regs[OP[0]+1]);
1809   State.regs[OP[1]] -= 4;
1810 }
1811
1812 /* stb */
1813 void
1814 OP_3C000000 ()
1815 {
1816 #ifdef DEBUG
1817   printf("   stb\tr%d,@(0x%x,r%d)\n",OP[0],OP[1],OP[2]);
1818 #endif
1819   SB (State.regs[OP[1]]+OP[2], State.regs[OP[0]]);
1820 }
1821
1822 /* stb */
1823 void
1824 OP_7800 ()
1825 {
1826 #ifdef DEBUG
1827   printf("   stb\tr%d,@r%d\n",OP[0],OP[1]);
1828 #endif
1829   SB (State.regs[OP[1]], State.regs[OP[0]]);
1830 }
1831
1832 /* stop */
1833 void
1834 OP_5FE0 ()
1835 {
1836 #ifdef DEBUG
1837   printf("   stop\n");
1838 #endif
1839   exit(1);
1840 }
1841
1842 /* sub */
1843 void
1844 OP_0 ()
1845 {
1846   int32 tmp;
1847 #ifdef DEBUG
1848   printf("   sub\tr%d,r%d\n",OP[0],OP[1]);
1849 #endif
1850   tmp = (int16)State.regs[OP[0]]- (int16)State.regs[OP[1]];
1851   State.C = (tmp & 0xffff0000) ? 1 : 0;
1852   State.regs[OP[0]] = tmp & 0xffff;
1853 }
1854
1855 /* sub */
1856 void
1857 OP_1001 ()
1858 {
1859 #ifdef DEBUG
1860   printf("   sub\ta%d,r%d\n",OP[0],OP[1]);
1861 #endif
1862 }
1863
1864 /* sub */
1865
1866 void
1867 OP_1003 ()
1868 {
1869 #ifdef DEBUG
1870   printf("   sub\ta%d,a%d\n",OP[0],OP[1]);
1871 #endif
1872
1873 }
1874
1875 /* sub2w */
1876 void
1877 OP_1000 ()
1878 {
1879   int64 tmp;
1880   int32 a,b;
1881 #ifdef DEBUG
1882   printf("   sub2w\tr%d,r%d\n",OP[0],OP[1]);
1883 #endif
1884
1885   a = (int32)((State.regs[OP[0]] << 16) | State.regs[OP[0]+1]);
1886   b = (int32)((State.regs[OP[1]] << 16) | State.regs[OP[1]+1]);
1887   tmp = a-b;
1888   State.C = (tmp & 0xffffffff00000000LL) ? 1 : 0;
1889   State.regs[OP[0]] = (tmp >> 16) & 0xffff;
1890   State.regs[OP[0]+1] = tmp & 0xffff;
1891 }
1892
1893 /* subac3 */
1894 void
1895 OP_17000000 ()
1896 {
1897 #ifdef DEBUG
1898 printf("   subac3\t%x,%x,%x\n",OP[0],OP[1],OP[2]);
1899 #endif
1900 }
1901
1902 /* subac3 */
1903 void
1904 OP_17000002 ()
1905 {
1906 #ifdef DEBUG
1907 printf("   subac3\t%x,%x,%x\n",OP[0],OP[1],OP[2]);
1908 #endif
1909 }
1910
1911 /* subac3s */
1912 void
1913 OP_17001000 ()
1914 {
1915 #ifdef DEBUG
1916 printf("   subac3s\t%x,%x,%x\n",OP[0],OP[1],OP[2]);
1917 #endif
1918 }
1919
1920 /* subac3s */
1921 void
1922 OP_17001002 ()
1923 {
1924 #ifdef DEBUG
1925 printf("   subac3s\t%x,%x,%x\n",OP[0],OP[1],OP[2]);
1926 #endif
1927 }
1928
1929 /* subi */
1930 void
1931 OP_1 ()
1932 {
1933   int32 tmp;
1934 #ifdef DEBUG
1935   printf("   subi\tr%d,%d\n",OP[0],OP[1]);
1936 #endif
1937   if (OP[1] == 0)
1938     OP[1] = 16;
1939   tmp = (int16)State.regs[OP[0]] - OP[1];
1940   State.C = (tmp & 0xffff0000) ? 1 : 0;
1941   State.regs[OP[0]] = tmp & 0xffff;
1942 }
1943
1944 /* trap */
1945 void
1946 OP_5F00 ()
1947 {
1948 #ifdef DEBUG
1949   printf("   trap\t%d\n",OP[0]);
1950 #endif
1951
1952   /* for now, trap 0 is used for simulating IO */
1953
1954   if (OP[0] == 0)
1955     {
1956       char *fstr = State.regs[2] + State.imem;
1957       printf (fstr,State.regs[3],State.regs[4],State.regs[5]);
1958     }
1959   else if (OP[0] == 1 )
1960     {
1961       char *fstr = State.regs[2] + State.imem;
1962       puts (fstr);
1963     }
1964 }
1965
1966 /* tst0i */
1967 void
1968 OP_7000000 ()
1969 {
1970 #ifdef DEBUG
1971   printf("   tst0i\tr%d,0x%x\n",OP[0],OP[1]);
1972 #endif
1973   State.F1 = State.F0;
1974   State.F0 = (State.regs[OP[0]] & OP[2]) ? 1 : 0;
1975 }
1976
1977 /* tst1i */
1978 void
1979 OP_F000000 ()
1980 {
1981 #ifdef DEBUG
1982   printf("   tst1i\tr%d,0x%x\n",OP[0],OP[1]);
1983 #endif
1984   State.F1 = State.F0;
1985   State.F0 = (~(State.regs[OP[0]]) & OP[2]) ? 1 : 0;
1986 }
1987
1988 /* wait */
1989 void
1990 OP_5F80 ()
1991 {
1992 #ifdef DEBUG
1993   printf("   wait\n");
1994 #endif
1995   State.IE = 1;
1996 }
1997
1998 /* xor */
1999 void
2000 OP_A00 ()
2001 {
2002 #ifdef DEBUG
2003   printf("   xor\tr%d,r%d\n",OP[0],OP[1]);
2004 #endif
2005   State.regs[OP[0]] ^= State.regs[OP[1]];
2006 }
2007
2008 /* xor3 */
2009 void
2010 OP_5000000 ()
2011 {
2012 #ifdef DEBUG
2013   printf("   xor3\tr%d,r%d,0x%x\n",OP[0],OP[1],OP[2]);
2014 #endif
2015   State.regs[OP[0]] = State.regs[OP[1]] ^ OP[2];
2016 }
2017