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[thirdparty/binutils-gdb.git] / sim / d30v / ChangeLog
1 Thu Sep 2 18:15:53 1999 Andrew Cagney <cagney@b1.cygnus.com>
2
3 * configure: Regenerated to track ../common/aclocal.m4 changes.
4
5 Wed Sep 1 11:38:21 1999 Andrew Cagney <cagney@b1.cygnus.com>
6
7 * d30v-insns: Cast CIA to LONG in printfs.
8
9 Tue Aug 31 01:32:22 1999 Andrew Cagney <cagney@b1.cygnus.com>
10
11 * cpu.h (unqueue_writes): Add declaration.
12
13 1999-05-27 Michael Meissner <meissner@cygnus.com>
14
15 * d30v-insns (do_repeat): Print a warning if a REPEAT or REPEATI
16 instruction loop is too small.
17
18 1999-05-08 Felix Lee <flee@cygnus.com>
19
20 * configure: Regenerated to track ../common/aclocal.m4 changes.
21
22 1999-03-16 Martin Hunt <hunt@cygnus.com>
23 From Frank Ch. Eigler <fche@cygnus.com>
24
25 * cpu.h (mvtsys_left_p): New flag for MVTSYS instruction history.
26 * d30v-insns (mvtsys): Set this flag instead of left_kills_right_p.
27 (do_sath): Detect MVTSYS by new flag.
28 * engine.c (unqueue_writes): Detect MVTSYS by new flag.
29 (do_2_short, do_parallel): Initialize new flag.
30
31 1999-02-26 Frank Ch. Eigler <fche@cygnus.com>
32
33 * tconfig.in (SIM_HANDLES_LMA): Make it so.
34
35 1999-01-12 Frank Ch. Eigler <fche@cygnus.com>
36
37 * engine.c (unqueue_writes): Make PSW conflict resolution code
38 conditional - disable it for MVTSYS || insn case.
39
40 1999-01-11 Frank Ch. Eigler <fche@cygnus.com>
41
42 * d30v-insns (do_sath): Drain PSW write queue before PSW_S_FLAG
43 update.
44 * engine.c (unqueue_writes): Make non-static. Remove PSW_V/VA
45 special case.
46 (do_parallel): Don't drain PSW write queue for MVTSYS || insn.
47
48 1999-01-07 Frank Ch. Eigler <fche@cygnus.com>
49
50 * d30v-insns (do_ld2h): Sign-extend loaded half-words.
51
52 1999-01-05 Frank Ch. Eigler <fche@cygnus.com>
53
54 * d30v-insns (do_ld2h): Read memory in word units.
55 (do_ld4bh): Ditto. Correct sign extension.
56 (do_ld4bhu): Ditto.
57 (do_st2h): Write memory in word units.
58 (do_st4hb): Ditto.
59 (st4hb): Correct mnemonic in igen template.
60
61 1998-12-08 Frank Ch. Eigler <fche@cygnus.com>
62
63 * d30v-insns: (do_ld2h): Don't update R0 nor R1 for double-word insn.
64 (do_ld2w): Ditto.
65 (do_ld4bh): Ditto.
66 (do_ld4bhu): Ditto.
67 (do_mulx2h): Ditto.
68
69 1998-12-03 Frank Ch. Eigler <fche@cygnus.com>
70
71 * d30v-insns (do_repeat): Don't set RP for repeat count 1.
72
73 1998-12-03 Frank Ch. Eigler <fche@cygnus.com>
74
75 * d30v-insns (do_src): Treat shift count -32 naturally instead of
76 producing zero result.
77
78 1998-11-22 Frank Ch. Eigler <fche@cygnus.com>
79
80 * d30v-insns (do_src): Limit SRC shift count to -32 .. 31.
81
82 1998-11-16 Frank Ch. Eigler <fche@cygnus.com>
83
84 * d30v-insns (dbt): Defer PSW/DPSW update with new DID_TRAP code 2.
85 * engine.c (unqueue_writes): Perform DBT processing on PSW/DPSW here.
86
87 1998-11-12 Frank Ch. Eigler <fche@cygnus.com>
88
89 * cpu.h (_sim_cpu): Removed is_delayed_call field, and associated
90 RPT_IS_CALL macro.
91 * sim-calls.c (sim_create_inferior): Don't initialize is_delayed_call.
92 * d30v-insns (do_dbra): Don't clear RPT_IS_CALL. (do_dbrai): Ditto.
93 (do_djmp): Ditto. (do_djmpi): Ditto. (do_repeat): Ditto.
94 * d30v-insns (do_dbsr): Don't set RPT_IS_CALL, but set R62 instead.
95 (do_dbsri): Ditto. (do_djsr): Dito. (do_djsri): Ditto.
96 * engine.c (sim_engine_run): Remove conditional setting of R62 based
97 upon RPT_IS_CALL.
98
99 1998-11-08 Frank Ch. Eigler <fche@cygnus.com>
100
101 * sim-calls.c (sim_open): Add dummy memory range over control
102 register region (0x40000000..0x4000FFFF).
103
104 1998-11-06 Frank Ch. Eigler <fche@cygnus.com>
105
106 * d30v-insns (do_mvfacc): Use loop to limit shift count to 63 .. 0.
107
108 Tue Oct 13 11:01:16 1998 Frank Ch. Eigler <fche@cygnus.com>
109
110 * d30v-insns (do_sra,do_srah,do_srl,do_srlh): Make shift
111 count -32 to produce zero result.
112 (do_src): Ditto for shift count == -64.
113
114 Mon Oct 12 23:04:11 1998 Frank Ch. Eigler <fche@cygnus.com>
115
116 * d30v-insns (ROT): Use 0x1f bit mask for rotate count masking.
117 (do_sra,do_srl): Use loop to limit shift count to -32 .. 31.
118 (do_srah,do_srlh): Use loop to limit shift count to -32 .. 31.
119 (sra2h,srl2h): Use loop to limit shift count to -16 .. 15.
120 (do_src): Use loop to limit shift count to -64 .. 63.
121
122 Fri Oct 9 16:46:52 1998 Doug Evans <devans@canuck.cygnus.com>
123
124 * sim-calls.c (get_insn_name): New fn.
125 (sim_open): Initialize CPU_INSN_NAME,CPU_MAX_INSNS.
126 * sim-main.h (MAX_INSNS,INSN_NAME): Delete.
127
128 Mon Sep 28 10:43:28 1998 Frank Ch. Eigler <fche@cygnus.com>
129
130 * d30v-insns (do_sra,do_srah,do_srl,do_srlh,ROT,do_src): Use
131 correct MSB bit numbers for sign extension masks.
132
133 Fri Sep 25 17:32:27 1998 Frank Ch. Eigler <fche@cygnus.com>
134
135 * engine.c (do_parallel): Unqueue writes if MU instruction was
136 a MVTSYS, as identified by its left_kills_right_p side-effect.
137
138 Fri Sep 25 12:31:34 1998 Frank Ch. Eigler <fche@cygnus.com>
139
140 * d30v-insns (do_sra,do_srah,do_srl,do_srlh,ROT,do_src): Mask
141 shift/rotate counts to number of bits in width of operand; no
142 longer saturate at maxima.
143
144 Tue Jul 14 18:39:23 1998 Frank Ch. Eigler <fche@cygnus.com>
145
146 * cpu.h (left_kills_right_p): New flag for non-branch instructions
147 that, when executed in left slot of a -> sequential pair, kill the
148 right slot.
149 * d30v-insns (mvtsys): Set flag for PSW/PSWh/PSWl/FLAG operands.
150 * engine.c (do_2_short): Respect flag.
151
152 Thu Jun 4 16:48:58 1998 David Taylor <taylor@texas.cygnus.com>
153
154 * d30v-insns (do_trap): don't save the bPSW and PSW based on
155 current values because an instruction done in parallel with
156 the trap might change them, instead set a flag do that
157 unqueue_writes will take care of it.
158 * engine.c (unqueue_writes): finish trap handling
159 * cpu.h (_sim_cpu): add new field did_trap and a macro DID_TRAP
160 to make use of it; set by do_trap, tested and cleared by
161 unqueue_writes.
162
163 Tue May 19 16:07:04 1998 Frank Ch. Eigler <fche@cygnus.com>
164
165 * engine.c (unqueue_writes): Suppress the all enqueued writes to
166 the same flags in PSW except the last.
167
168 Fri May 15 11:38:59 1998 Frank Ch. Eigler <fche@cygnus.com>
169
170 * d30v-insns (RETI): Correct instruction spelling to "reit".
171
172 Thu May 14 09:34:20 1998 Frank Ch. Eigler <fche@cygnus.com>
173
174 * d30v-insns (dbt): Handle DBT at end of repeat block.
175 (do_trap, dbt): Clear PSW_RP if at end of repeat block.
176
177 Thu May 14 07:41:41 1998 Frank Ch. Eigler <fche@cygnus.com>
178
179 * engine.c (sim_engine_run): Trigger DDBT based on previous PC,
180 instead of next PC.
181
182 Wed May 13 11:03:40 1998 Frank Ch. Eigler <fche@cygnus.com>
183
184 * engine.c (sim_engine_run): Move DDBT handling after instruction
185 decode/execute stage.
186
187 Tue May 12 12:14:53 1998 Frank Ch. Eigler <fche@cygnus.com>
188
189 * d30v-insns (do_sat*): Correct "saturate to 0 bits" patch to
190 properly handle negative saturation inputs.
191
192 Tue May 12 11:11:26 1998 Frank Ch. Eigler <fche@cygnus.com>
193
194 * engine.c (sim_engine_run): Decrement RPT_C only under more
195 restricted conditions.
196
197 Mon May 11 17:33:46 1998 Frank Ch. Eigler <fche@cygnus.com>
198
199 * d30v-insns (do_sat*): Make "saturate to 0 bits" pass through data
200 unchanged.
201
202 Mon May 11 16:27:04 1998 Frank Ch. Eigler <fche@cygnus.com>
203
204 * engine.c (sim_engine_run): Implement DDBT (debugger debug trap)
205 functionality.
206
207 Fri May 8 16:44:19 1998 Frank Ch. Eigler <fche@cygnus.com>
208
209 * d30v-insns (do_trap): Set bPC to RPT_S if trap is last
210 instruction in repeat block.
211 (bsr*/jsr*): Set R62 (LINK) to RPT_S if subroutine branch
212 is last instruction in repeat block.
213
214 Fri May 8 11:06:50 1998 Frank Ch. Eigler <fche@cygnus.com>
215
216 * d30v-insns (do_sath): Query/update F4/PSW_S using proper flag
217 macro.
218 * cpu.h (PSW_S_FLAG): New flag number for PSW_S status bit.
219
220 Wed May 6 19:40:56 1998 Doug Evans <devans@canuck.cygnus.com>
221
222 * sim-main.h (INSN_NAME): New arg `cpu'.
223
224 Fri May 1 14:24:30 1998 Andrew Cagney <cagney@b1.cygnus.com>
225
226 * d30v-insns: Fix parameter list to sim_engine_abort.
227
228 Thu Apr 30 14:28:00 1998 Fred Fish <fnf@cygnus.com>
229
230 * d30v-insns (do_sath): Add additional argument that determines
231 whether or not the F4 (PSW_S) bit in the PSW is updated.
232 (SAT2H): Do not update PSW_S bit.
233 (SATHp): Do update PSW_S bit.
234
235 Tue Apr 28 23:36:00 1998 Fred Fish <fnf@cygnus.com>
236
237 * d30v-insns (SRAHp, SRLHp): Immediate values are signed 6 bit
238 values, not 5 bit values.
239
240 Wed Apr 29 12:57:55 1998 Frank Ch. Eigler <fche@cygnus.com>
241
242 * d30v-insns (do_incr): Check modular arithmetic limits after
243 postincrement/postdecrement, rather than before, to match
244 erroneous hardware behavior.
245
246 Tue Apr 28 18:33:31 1998 Geoffrey Noer <noer@cygnus.com>
247
248 * configure: Regenerated to track ../common/aclocal.m4 changes.
249
250 Mon Apr 27 19:42:00 1998 Fred Fish <fnf@cygnus.com>
251
252 * d30v-insns (do_trap): Clear all bits in PSW except SM and DB.
253
254 Mon Apr 27 14:55:00 1998 Fred Fish <fnf@cygnus.com>
255
256 * d30v-insns (do_mulx2h): Low order results go in ra+1, high
257 order in ra.
258
259 Mon Apr 27 14:42:00 1998 Fred Fish <fnf@cygnus.com>
260
261 * d30v-insns (do_mulx2h): Rewrite to do proper 32 bit signed
262 multiply of high and low fields from operands.
263
264 Sun Apr 26 15:31:55 1998 Tom Tromey <tromey@creche>
265
266 * configure: Regenerated to track ../common/aclocal.m4 changes.
267 * config.in: Ditto.
268
269 Sun Apr 26 15:20:20 1998 Tom Tromey <tromey@cygnus.com>
270
271 * acconfig.h: New file.
272 * configure.in: Reverted change of Apr 24; use sinclude again.
273
274 Fri Apr 24 14:16:40 1998 Tom Tromey <tromey@creche>
275
276 * configure: Regenerated to track ../common/aclocal.m4 changes.
277 * config.in: Ditto.
278
279 Fri Apr 24 11:20:00 1998 Tom Tromey <tromey@cygnus.com>
280
281 * configure.in: Don't call sinclude.
282
283 Wed Apr 22 21:23:00 1998 Fred Fish <fnf@cygnus.com>
284
285 * ic-d30v (RbU, RcU): Unsigned versions of Rb and Rc.
286 * d30v-insns (MVTACC): Use new RbU and RcU macros.
287
288 Wed Apr 22 20:52:00 1998 Fred Fish <fnf@cygnus.com>
289
290 * ic-d30v (RbHU,RbLU): Unsigned versions of RbH and RbL.
291 * d30v-insns (SRL2H): Use new RbHU and RbLU macros instead of
292 RbH and RbL.
293
294 Mon Apr 13 16:59:00 1998 Fred Fish <fnf@cygnus.com>
295
296 * d30v-insns (do_srl): Avoid undefined behavior of host compiler
297 when shifting left by more than 31 bits.
298
299 Tue Apr 7 18:09:00 1998 Fred Fish <fnf@cygnus.com>
300
301 * engine.c (sim_engine_run): Remove at_loop_end variable. Add
302 rp_was_set and rpt_c_was_nonzero variables. Major restructuring of
303 code before and after instruction execution to properly handle state
304 of the RP bit in the PSW, the value in RPT_C, and other loop related
305 problems.
306
307 Sat Apr 4 20:36:25 1998 Andrew Cagney <cagney@b1.cygnus.com>
308
309 * configure: Regenerated to track ../common/aclocal.m4 changes.
310
311 Fri Apr 3 15:26:00 1998 Fred Fish <fnf@cygnus.com>
312
313 * d30v-insns (do_trap): Use offset from EIT_VB rather than hardcoded
314 BASE_ADDRESS constant.
315 * cpu.h (BASE_ADDRESS): Remove constant not used any longer.
316
317 Fri Apr 3 14:42:00 1998 Fred Fish <fnf@cygnus.com>
318
319 * cpu.h (EIT_VB): Define macro to access EIT_VB register.
320 (EIT_VB_DEFAULT): Define value of EIT_VB register after reset.
321 * sim-calls.c (sim_create_inferior): Set EIT_VB to EIT_VB_DEFAULT.
322
323 Tue Mar 31 19:00:00 1998 Fred Fish <fnf@cygnus.com>
324
325 * d30v-insns (do_dbrai): RPT_S is cia plus pcdisp rather than
326 just pcdisp.
327
328 Mon Mar 30 20:30:00 1998 Fred Fish <fnf@cygnus.com>
329
330 * engine.c (sim_engine_run): Add at_loop_end. Rework end of loop
331 code to use this to both reset PSW_RP when needed and to set PC
332 to RPT_S for another pass through the loop.
333
334 Mon Mar 30 16:12:00 1998 Fred Fish <fnf@cygnus.com>
335
336 * engine.c (sim_engine_run): Change code that handles RPT_* regs
337 and PSW_RP bit in PSW so that PSW_RP is always set while executing
338 the loop and loop terminates upon completion of the pass for which
339 RPT_C is zero. More closely follow logic in architecture manual.
340
341 Fri Mar 27 16:15:52 1998 Andrew Cagney <cagney@b1.cygnus.com>
342
343 * configure: Regenerated to track ../common/aclocal.m4 changes.
344
345 Wed Mar 25 12:35:29 1998 Andrew Cagney <cagney@b1.cygnus.com>
346
347 * configure: Regenerated to track ../common/aclocal.m4 changes.
348
349 Thu Mar 19 00:25:43 1998 Andrew Cagney <cagney@b1.cygnus.com>
350
351 * sim-calls.c (sim_open): Move memory-region commands back to
352 before the call to sim_parse_args.
353 (d30v_option_handler): Implement extmem-size option using
354 memory-delete and memory-region commands.
355
356 * sim-calls.c (d30v_option_handler): Use ANSI-C argument list,
357 correct number and type of arguments.
358
359 Wed Mar 18 12:38:12 1998 Andrew Cagney <cagney@b1.cygnus.com>
360
361 * configure: Regenerated to track ../common/aclocal.m4 changes.
362
363 Wed Mar 11 13:56:32 1998 Andrew Cagney <cagney@b1.cygnus.com>
364
365 * alu.h (IMEM, MEM, STORE): Replace sim_core_*_map with exec_map,
366 read_map and write_map resp.
367
368 * cpu.c (d30v_read_mem, d30v_write_mem): Ditto.
369
370 Mon Mar 2 13:34:08 1998 Fred Fish <fnf@cygnus.com>
371
372 * d30v-insns (do_repeat): Abort repeat instructions that have
373 a repeat count of zero.
374
375 Fri Feb 27 18:44:12 1998 Doug Evans <devans@canuck.cygnus.com>
376
377 * sim-calls.c (sim_open): Update call to sim_add_option_table.
378
379 Thu Feb 26 18:34:31 1998 Andrew Cagney <cagney@b1.cygnus.com>
380
381 * sim-calls.c (sim_info): Delete.
382
383 Wed Feb 25 14:44:58 1998 Michael Meissner <meissner@cygnus.com>
384
385 * d30v-insns (mvtsys): If moving to EIT_VB register, and with
386 valid bits. Optimize code somewhat.
387
388 * cpu.h (eit_vector_base_cr): New CR we need to special case.
389 (EIT_VALID): Valid bits for EIT_VB register.
390
391 * d30v-insns (mv{f,t}sys): When moving to/from PSWH, the value is
392 in the low 16 bits of the register.
393
394 * d30v-insns (do_sra): Use a common WRITE32_QUEUE to write back
395 results.
396 (do_sr{a,l}h): Do shift in 32 bits, only truncate when writing
397 result back to the registers.
398
399 Tue Feb 24 18:09:52 1998 Fred Fish <fnf@cygnus.com>
400
401 * Makefile.in (tmp-igen): Use -G gen-zero-r0 option to force
402 r0 to always be zero.
403 * cpu.h (GPR_SET): Define.
404
405 Tue Feb 24 14:12:57 1998 Michael Meissner <meissner@cygnus.com>
406
407 * d30v-insns (do_sath): Do saturation in 32 bits, before
408 converting to 16.
409 (sat{,2h,z,hp}): Use imm_5, not imm to get proper zero extend.
410 (do_sath_p): Delete, no longer used.
411 (sathp): Call do_sath, not do_sath_p.
412
413 Mon Feb 23 15:55:14 1998 Michael Meissner <meissner@cygnus.com>
414
415 * d30v-insns (illegal,wrong_slot): Print \n after PC and before we
416 call sim_engine_halt.
417 (sr{a,l}hp): Implement missing instructions.
418 (do_trap): Print high order PSW bits in human readable fashion.
419 (do_{dbra{,i},dbsr{,i},djmp{,i},djsr{,i},repeat}): Set PSW bit RP.
420
421 * alu.h (PSW_SET_QUEUE): New macro to set PSW bits.
422
423 * engine.c (sim_engine_run): Check for RP bit being set, not RPT_C
424 being > 0. If RPT_C is decremented to 0, clear PSW RP bit.
425
426 Fri Feb 20 10:13:34 1998 Fred Fish <fnf@cygnus.com>
427
428 * cpu.h (BASE_ADDRESS): Change from 0xfffff000 to 0xfffff020.
429
430 Tue Feb 17 12:39:52 1998 Andrew Cagney <cagney@b1.cygnus.com>
431
432 * sim-calls.c (sim_store_register, sim_fetch_register): Pass in
433 length parameter. Return -1.
434
435 Fri Feb 6 17:39:54 1998 Michael Meissner <meissner@cygnus.com>
436
437 * d30v-insns (do_dbrai): Correct typo, use shift, not comparison.
438
439 Sun Feb 1 16:47:51 1998 Andrew Cagney <cagney@b1.cygnus.com>
440
441 * configure: Regenerated to track ../common/aclocal.m4 changes.
442
443 Sat Jan 31 18:15:41 1998 Andrew Cagney <cagney@b1.cygnus.com>
444
445 * configure: Regenerated to track ../common/aclocal.m4 changes.
446
447 Fri Jan 30 08:29:20 1998 Andrew Cagney <cagney@b1.cygnus.com>
448
449 * engine.c (sim_engine_run): Add parameter nr_cpus.
450
451 Fri Jan 30 17:09:37 1998 Michael Meissner <meissner@cygnus.com>
452
453 * d30v-insns (jsrtzr): Check for register == 0, not != 0.
454
455 Wed Jan 21 17:52:04 1998 Andrew Cagney <cagney@b1.cygnus.com>
456
457 * engine.c (do_stack_swap): Make type of new_sp unsigned.
458
459 Mon Jan 19 22:26:29 1998 Doug Evans <devans@seba>
460
461 * configure: Regenerated to track ../common/aclocal.m4 changes.
462
463 Mon Jan 5 16:04:17 1998 Andrew Cagney <cagney@sanguine.cygnus.com>
464
465 * sim-calls.c (sim_info): Call profile_print.
466
467 * sim-main.h: Enable instruction profiling.
468
469 Thu Dec 18 12:21:38 1997 Michael Meissner <meissner@cygnus.com>
470
471 * alu.h (ALU{16,32}_END): Change setting PSW to only set the carry
472 and overflow bits. Don't look at the current value of PSW.
473 (PSW_FLAG_SET_QUEUE): Only queue up setting the particular bit in
474 question. Don't look at the current value of PSW.
475
476 * d30v-insns: All instructions that set the PSW, will only queue
477 up the particular bits in question that were set by the
478 instruction. Don't look at the current value of PSW.
479
480 Wed Dec 17 11:41:44 1997 Michael Meissner <meissner@cygnus.com>
481
482 * cpu.h (PSW_VALID): Allow EA/DB to be set in the PSW.
483 (DPSW_VALID): Like PSW_VALID, but it allows the DS bit to be set.
484
485 * engine.c (trace_alu32): When changing BPSW/DPSW, print the
486 special PSW bits.
487
488 * d30v-insns (do_cmp_cc): Fix cmpps and cmpng.
489 (do_cmp{,u}_cc): Print which cc value was used if not in switch
490 statement.
491 (do_cmpu_cc): Remove illegal cases CMPU{EQ,NE,PS,NG}.
492 (mvtsys): When setting BPSW or DPSW, and with DPSW_VALID.
493
494 Tue Dec 16 18:17:26 1997 Michael Meissner <meissner@cygnus.com>
495
496 * d30v-insns (mulx2h): Add missing instruction. Complain if
497 register is not even.
498 (do_{add,sub}h_ppp): Get correct high/low values. Also correctly
499 handle short immediates.
500 (do_ld{2w,4bh}): Don't load r0 if ra == 0.
501
502 * engine.c (d30v_interrupt_event): Remove unused variable
503 (unqueue_writes): Ditto.
504
505 Mon Dec 15 23:17:11 1997 Andrew Cagney <cagney@b1.cygnus.com>
506
507 * configure: Regenerated to track ../common/aclocal.m4 changes.
508 * config.in: Ditto.
509
510 Sat Dec 13 23:40:17 1997 Michael Meissner <meissner@cygnus.com>
511
512 * cpu.h (_write{32,64}): New structures for keeping track of
513 queued writes to registers.
514 (_sim_cpu): Add _write{32,64} structures. Make is_delayed_call
515 unsigned32 also.
516 (WRITE{32,64}*): New macros for queueing up writes to registers.
517
518 * alu.h (ALU16_END): Take field that says whether we are setting
519 the high or low half word. Queue up changes to registers.
520 (ALU32_END): Queue up changes to registers.
521 (PSW_FLAG_SET_QUEUE): Like PSW_FLAG_SET, except queues it up.
522
523 * sim-main.h (do_stack_swap): Remove declaration.
524
525 * engine.c (do_stack_swap): Make static.
526 (unqueue_writes): New function to unqueue all changes to 32 and 64
527 bit registers in order. Implement --trace-alu. Reset high water
528 marks for # of queued registers. If PSW changed, possibly update
529 stack pointer.
530 (do_{long,2_short,parallel}): Unqueue register writes at the
531 appropriate time.
532
533 * d30v-insns: Modify all insns to queue changes to registers,
534 rather than do them immediately so that parallel instructions get
535 the right values for inputs. Rewrite 16 bit operations to be done
536 in terms of masked 32 bit registers. Don't call do_stack_swap any
537 more here.
538
539 Thu Dec 11 10:06:02 1997 Michael Meissner <meissner@cygnus.com>
540
541 * sim-calls.c (d30v_option_handler): Add support for --extmem-size
542 to size external memory.
543 (sim_open): Ditto. Default if no --extmem-size option is 8 meg.
544
545 Wed Dec 10 01:08:24 1997 Jim Blandy <jimb@zwingli.cygnus.com>
546
547 * d30v-insns (do_rot2h): Clip rotate amounts to four bits. The
548 upper bits, and the sign of the rotation amount, are red herrings.
549 (do_sra, do_srl): Handle shifts greater than 32 bits.
550 (do_srah, do_sral): Properly sign-extend value and shift amount.
551 Handle shifts larger than 16 bits.
552
553 Thu Dec 4 09:21:05 1997 Doug Evans <devans@canuck.cygnus.com>
554
555 * configure: Regenerated to track ../common/aclocal.m4 changes.
556
557 Mon Dec 1 15:10:44 1997 Michael Meissner <meissner@cygnus.com>
558
559 * d30v-insns (do_sub2h): For short instruction, correctly
560 dupplicate lower 16 bits of immediate in upper 16 bits.
561 (sat2z): Fix typo that ignored the upper half of the register.
562 (do_satz): If < 0, set *ra to 0, if not call do_sat.
563 (mvtsys): Before setting PSW, and with PSW_VALID.
564
565 * cpu.h (PSW_VALID): Mask for bits in PSW that is valid.
566
567 Mon Dec 1 15:05:03 1997 Andrew Cagney <cagney@b1.cygnus.com>
568
569 * d30v-insns (do_trap): Pacify GCC - correct type of %ld arg in
570 printf, return dummy at end.
571
572 Mon Dec 1 15:05:03 1997 Andrew Cagney <cagney@b1.cygnus.com>
573
574 * d30v-insns (do_add, do_addh_ppp, do_adds): Replace ALU_ADD with
575 ALU_ADDC.
576 (do_addc): Replace ALU_SET_CARRY / ALU_ADD_CA with ALU_ADDC_C.
577 (do_sub, do_subh_ppp): Replace ALU_SUB with ALU_SUBB.
578 (do_subb): Replace ALU_SET_CARRY / ALU_SUB_CA with ALU_SUBB_B.
579
580 * alu.h (ALU16_END): Use ALU16_HAD_CARRY_BORROW instead of
581 ALU16_HAD_CARRY.
582 (ALU32_END): Ditto.
583
584 * sim-main.h (string.h, strings.h): Include.
585
586 * sim-calls.c: Delete inclusion of string.h and strings.h.
587
588 Sun Nov 30 17:29:25 1997 Michael Meissner <meissner@cygnus.com>
589
590 * configure.in (--enable-sim-trapdump): New switch to control
591 whether traps 0..30 dump out the registers or do the real trap.
592 * configure: Regenerate.
593
594 * Makefile.in (SIM_EXTRA_CLFAGS): Add -DTRAPDUMP={0,1} if
595 appropriate --{en,dis}able-sim-trapdump is done.
596
597 * sim-calls.c (OPTION_TRACE_CALL): Rename from OPTION_CALL_TRACE.
598 (OPTION_TRACE_TRAPDUMP): New option for --trace-trapdump.
599 (d30v_option_handler): Add support for --trace-trapdump.
600 (d30v_options): Ditto.
601 (sim_open): Ditto.
602
603 * d30v-insns (do_trap): Do register dump if --trace-trapdump and
604 not the system call trap. Remove support for calling old function
605 sim_io_syscalls.
606
607 Sat Nov 29 18:54:55 1997 Michael Meissner <meissner@cygnus.com>
608
609 * cpu.h (_sim_cpu): Add trace_call_p, trace_action fields.
610 (TRACE_CALL_P): Non-zero if --trace-call.
611 (TRACE_ACTION): Non-zero if there is a tracing action at the end
612 of processing an instruction boundary.
613 (TRACE_ACTION_{CALL,RETURN}): Bits to say trace call & return.
614 (d30v_next_insn): Delete, now trace_action field in cpu state.
615
616 * cpu.c (d30v_next_insn): Delete, now trace_action field in cpu
617 state.
618 (return_occurred): Minimum saved register to check is now 34.
619
620 * engine.c (sim_engine_run): Change call tracing to use
621 trace_action field in cpu state.
622
623 * sim-calls.c (d30v_option_handler): Handle d30v specific options.
624 (d30v_options): D30V specific options. Right now, --trace-call.
625 (sim_open): Register d30v specific options.
626
627 * d30v-insns (call, return insns): Move --trace-debug call/return
628 tracing action to d30v specific --trace-call option.
629
630 Fri Nov 28 20:12:48 1997 Michael Meissner <meissner@cygnus.com>
631
632 * cpu.h (CREG): Rename from CR.
633
634 * d30v-insns (do_{addc,subb}): Explicitly import the carry bit.
635 (do_trap): Use CREG, not CR. Switch to using cb_syscall.
636
637 Thu Nov 27 19:25:43 1997 Michael Meissner <meissner@cygnus.com>
638
639 * cpu.h (ACC): Define as short cut to accumulators.
640
641 * d30v-insns (do_rot): Delete explicit function, use ROT32 to do
642 rotate instruction.
643 (do_trap): Make trap 30 print out accumulators and first 16
644 control registers as well.
645 (do_avg): Sign extend to 64 bit type before doing add/shift.
646 (do_avg2h): Sign extend 16 bit chunks before doing add/shift.
647
648 Wed Nov 26 15:20:24 1997 Doug Evans <devans@canuck.cygnus.com>
649
650 * Makefile.in (NL_TARGET): Define.
651
652 Wed Nov 26 16:55:38 1997 Michael Meissner <meissner@cygnus.com>
653
654 * cpu.h (d30v_next_insn): New flag for things we are supposed to
655 trace between instruction words.
656 ({call,return}_occurred): Remove index argument.
657 (d30v_{read,write}_mem): Add declarations.
658
659 * cpu.c (d30v_next_insn): New flag for things we are supposed to
660 trace between instruction words.
661 ({call,return}_occurred): Remove index argument.
662 (d30v_{read,write}_mem): New functions for reading/writing
663 simulated memory in the new common system call support.
664
665 * d30v-insns: Set emacs C mode.
666 (call/return insns): Set bit to trace call at instruction
667 boundary, rather than doing it here.
668 (do_trap): Set up to use new common system call interface.
669
670 * engine.c (sim_engine_run): If d30v_next_insn is non zero, do
671 function call/return tracing.
672
673 Mon Nov 24 16:40:49 1997 Michael Meissner <meissner@cygnus.com>
674
675 * d30v-insns (bnot): Correctly reset bit in question.
676 (do_trap): Use common system call emulation support, rather than
677 our home grown support.
678
679 Sun Nov 23 22:47:20 1997 Michael Meissner <meissner@cygnus.com>
680
681 * d30v-insns (mvfacc): Immediate field is unsigned, allowing
682 shifts of up to 63 to be encoded. Also do shift signed, rather
683 than unsigned.
684
685 * ic-d30v (IMM_6S): Add field for 6 bit unsigned constants.
686
687 * d30v-insns (cmpu): Short cmpu zero extends immediate, not sign
688 extends.
689
690 Sat Nov 22 19:04:34 1997 Andrew Cagney <cagney@b1.cygnus.com>
691
692 * d30v-insns (illegal, wrong_slot): Replace SIGILL with
693 SIM_SIGILL.
694
695 * sim-calls.c (signal.h): Do not include, replaced by
696 sim-signal.h.
697
698 * sim-main.h (signal.h): Do not include, include sim-signal.h
699 instead.
700
701 Fri Nov 21 09:33:54 1997 Andrew Cagney <cagney@b1.cygnus.com>
702
703 * cpu.c (call_occurred): Use ZALLOC instead of xmalloc.
704 (return_occurred): Use zfree instead of free.
705
706 Wed Nov 19 13:28:09 1997 Michael Meissner <meissner@cygnus.com>
707
708 * Makefile.in ({l,s}_{support,semantics}.o): Depend on the include
709 files in $(ENGINE_H).
710
711 * d30v-insns (do_{add,addc,sub,subb}): ALU_{ADD,SUB}_CA now takes
712 a VAL argument to add/subtract along with the carry.
713
714 Tue Nov 18 15:33:48 1997 Doug Evans <devans@canuck.cygnus.com>
715
716 * Makefile.in (SIM_OBJS): Use $(SIM_NEW_COMMON_OBJS).
717
718 Tue Nov 18 13:56:15 1997 Michael Meissner <meissner@cygnus.com>
719
720 * d30v-insns (do_trap): Change to new system call numbers. Add
721 read emulation.
722
723 Mon Nov 17 14:43:45 1997 Michael Meissner <meissner@cygnus.com>
724
725 * d30v-insns (mulx): Add mulx instruction.
726
727 Sun Nov 16 19:06:56 1997 Michael Meissner <meissner@cygnus.com>
728
729 * cpu.c ({call,return}_occurred): New trace functions to mark
730 function calls and returns and check whether all saved registers
731 really were saved.
732
733 * cpu.h ({call,return}_occurred): Add declaration.
734
735 * d30v-insns ({bsr, jsr} patterns): Call call_occurred if
736 --trace-debug to trace function calls.
737 (jmp register pattern): If this is a jump r62 and --trace-debug,
738 call return_occurred to trace function calls.
739 (bsr{tnz,tzr}): Move setting r62 inside conditional against reg.
740 (do_ld2w): Grab memory in 64-bit chunk, to check alignment.
741 (do_st2w): Ditto.
742
743 Sat Nov 15 20:57:57 1997 Michael Meissner <meissner@cygnus.com>
744
745 * d30v-insns: Undo changes from Nov. 11, allowing for odd register
746 pairs, since the machine doesn't support such usage. Trap on odd
747 registers, rather than give a warning. Keep do_src and do_trap
748 changes.
749
750 Fri Nov 14 11:59:29 1997 Andrew Cagney <cagney@b1.cygnus.com>
751
752 * d30v-insns (do_trap): Pacify compiler warnings for printf calls.
753
754 Tue Nov 11 18:26:03 1997 Michael Meissner <meissner@cygnus.com>
755
756 * d30v-insns (not_r63_reg): Rename from make_even_reg, only check
757 for register being r63. Change callers ld2{h,w}, ld4bh{,u}.
758 (get_reg_not_r63): Rename from get_even_reg, and only check for
759 register r63. Change callers st2{w,h}, st4b.
760 (do_src): Correct register pair for shift left.
761 (do_trap): Temporarily make trap 30 print out the registers.
762
763 Tue Nov 4 08:51:22 1997 Michael Meissner <meissner@cygnus.com>
764
765 * d30v-insns (do_trap): Make trap 31 be used for system calls.
766 Add primitive write and exit system calls.
767
768 * Makefile (FILTER): New make variable to filter out known igen
769 warnings.
770 (tmp-igen): Add $(FILTER) on all 3 invocations of igen to filter
771 out warnings that should be ignored by default.
772
773 Fri Oct 31 19:36:51 1997 Andrew Cagney <cagney@b1.cygnus.com>
774
775 * sim-calls.c (sim_open): Change EIT to memory region.
776
777 Fri Oct 17 16:51:31 1997 Andrew Cagney <cagney@b1.cygnus.com>
778
779 * alu.h (ALU16_END): Get result from ALU16_OVERFLOW_RESULT.
780 (ALU32_END): Get result from ALU32_OVERFLOW_RESULT.
781
782 Fri Oct 3 09:28:00 1997 Andrew Cagney <cagney@b1.cygnus.com>
783
784 * configure: Regenerated to track ../common/aclocal.m4 changes.
785
786 Mon Sep 29 15:23:35 1997 Stu Grossman <grossman@babylon-5.cygnus.com>
787
788 * d30v-insns (MVFSYS MVTSYS): Fix bit patterns so that these
789 instructions get recognised.
790
791 Wed Sep 24 17:38:57 1997 Andrew Cagney <cagney@b1.cygnus.com>
792
793 * configure: Regenerated to track ../common/aclocal.m4 changes.
794
795 Wed Sep 24 17:51:43 1997 Stu Grossman <grossman@babylon-5.cygnus.com>
796
797 * Makefile.in (SIM_OBJS): Add sim-break.o.
798 * (INCLUDE_DEPS): Add tconfig.h.
799 * alu.h (MEM STORE): Change to sim_core_read/write_unaligned to
800 allow for trapping unaligned accesses.
801 * cpu.h: Define SIM_BREAKPOINT as syscall 5 for intrinsic breakpoint
802 mechanism.
803 * d30v-insn (short syscall): Use syscall 5 for breakpoint insn.
804 * sim-calls.c (sim_fetch_register sim_store_register): Implement.
805 * tconfig.in: Define SIM_HAVE_BREAKPOINTS to enable intrinsic
806 breakpoint mechanism.
807
808 Tue Sep 23 11:04:38 1997 Andrew Cagney <cagney@b1.cygnus.com>
809
810 * configure: Regenerated to track ../common/aclocal.m4 changes.
811
812 Tue Sep 23 10:19:51 1997 Andrew Cagney <cagney@b1.cygnus.com>
813
814 * Makefile.in (SIM_WARNINGS, SIM_ALIGNMENT, SIM_ENDIAN,
815 SIM_HOSTENDIAN, SIM_RESERVED_BITS): Delete, moved to common.
816 (SIM_EXTRA_CFLAGS): Update.
817
818 Mon Sep 22 11:46:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
819
820 * configure.in: Specify strict alignment.
821 * configure: Regenerated to track ../common/aclocal.m4 changes.
822
823 Fri Sep 19 17:45:25 1997 Andrew Cagney <cagney@b1.cygnus.com>
824
825 * configure: Regenerated to track ../common/aclocal.m4 changes.
826
827 Mon Sep 15 17:36:15 1997 Andrew Cagney <cagney@b1.cygnus.com>
828
829 * configure: Regenerated to track ../common/aclocal.m4 changes.
830
831 Fri Sep 12 16:13:04 1997 Andrew Cagney <cagney@b1.cygnus.com>
832
833 * sim-calls.c (sim_open): Change memory to
834 internal inst. RAM h'00000000-h'0000ffff (64KB)
835 internal data RAM h'20000000-h'20007fff (32KB)
836 external RAM h'80000000-h'803fffff (4MB)
837 EIT h'fffff000-h'ffffffff
838
839
840 Thu Sep 11 08:59:34 1997 Andrew Cagney <cagney@b1.cygnus.com>
841
842 * Makefile.in (SIM_OBJS): Add sim-hrw.o module.
843
844 * sim-calls.c (sim_read): Delete. use sim-hrw.
845 (sim_write): Delete, use sim-hrw.
846
847
848 Tue Sep 9 01:36:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
849
850 * ic-d30v (imm_5): Update nr args passed to LSMASKED.
851
852 * d30v-insns (do_sat, do_sath, do_sath_p, do_satz, do_satzh): Fix,
853 computing the max sat value incorrectly.
854
855 Thu Sep 4 17:21:23 1997 Doug Evans <dje@seba>
856
857 * configure: Regenerated to track ../common/aclocal.m4 changes.
858
859 Fri Sep 5 09:15:33 1997 Andrew Cagney <cagney@b1.cygnus.com>
860
861 * d30v-insns (do_mac, do_macs, do_msub, do_mulxs): Use explicit
862 type cast instead of SIGNED64 macro.
863
864 Thu Sep 4 10:28:45 1997 Andrew Cagney <cagney@b1.cygnus.com>
865
866 * Makefile.in (SIM_OBJS): Include sim-memopt.o module.
867
868 * sim-calls.c (sim_open): Pass zero modulo arg to sim_core_attach
869 calls.
870 (sim_open): If no memory, use memory commands to establish d30v
871 ram.
872 (d30v_option_handler): Delete, replased by sim-memopt.c.
873 (sim_create_inferior): Call sim_module_init.
874
875 * sim-main.h (struct sim_state): Remove members eit_ram,
876 sizeof_eit_ram, external_ram, baseof_external_ram,
877 sizeof_external_ram. Using generic memory model instead.
878
879 Mon Sep 1 11:04:09 1997 Andrew Cagney <cagney@b1.cygnus.com>
880
881 * sim-calls.c (sim_open): Use sim_state_alloc.
882
883 Sat Aug 30 10:01:51 1997 Andrew Cagney <cagney@b1.cygnus.com>
884
885 * sim-main.h (INVALID_INSTRUCTION_ADDRESS): Define.
886
887 * engine.c (do_2_short): Compare with INVALID_INSTRUCTION_ADDRESS
888 not -1.
889
890 Wed Aug 27 18:13:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
891
892 * configure: Regenerated to track ../common/aclocal.m4 changes.
893 * config.in: Ditto.
894
895 Wed Aug 27 13:41:54 1997 Andrew Cagney <cagney@b1.cygnus.com>
896
897 * sim-calls.c (sim_open): Add call to sim_analyze_program, update
898 call to sim_config.
899
900 * sim-calls.c (sim_create_inferior): Add ABFD argument.
901 Initialize CPU registers including PC.
902 (sim_load): Delete, using sim-hload.
903
904 * Makefile.in (SIM_OBJS): Add sim-hload.o module.
905
906 Mon Aug 25 17:50:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
907
908 * configure: Regenerated to track ../common/aclocal.m4 changes.
909 * config.in: Ditto.
910
911 Mon Aug 25 15:41:44 1997 Andrew Cagney <cagney@b1.cygnus.com>
912
913 * sim-calls.c (sim_open): Add ABFD argument.
914 (sim_open): Move sim_config call to after sim_parse_args.
915 (sim_open): Check sim_config return status.
916
917 Fri Aug 22 16:38:59 1997 Andrew Cagney <cagney@b1.cygnus.com>
918
919 * d30v-insns (do_subh_ppp): Correct name, was do_sub_ppp.
920 (do_subh_ppp): Compute rc=rb-src instead of src-rb.
921 (do_addh_ppp): Ditto.
922
923 Fri Jun 27 14:43:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
924
925 * d30v-insns (mvfsys, mvtsys): Switch instruction encodings, was
926 wrong. Update handling of PSW[DS] bit.
927 (dbt): Fix debug trap address.
928
929 * cpu.h (NR_CONTROL_REGISTERS): Allow the full 64 registers.
930
931 Tue Jun 24 12:41:55 1997 Andrew Cagney <cagney@b1.cygnus.com>
932
933 * d30v-insns (DBT, RTD): Swap the stack after updating the PSW.
934 (DBT): Use PSW_SET to update PSW.
935
936 * alu.h (ALU16_END): Check for 16 bit carry and not 32 bit.
937
938 Tue Jun 24 12:16:14 1997 Andrew Cagney <cagney@b2.cygnus.com>
939
940 * d30v-insns (ppp, ccc, pp, XX, p): Update format functions so
941 that they are of class %s instead of class function.
942
943 Tue Jun 10 12:26:39 1997 Andrew Cagney <cagney@b1.cygnus.com>
944
945 * sim-main.h (engine_error, engine_restart, engine_halt,
946 engine_run_until_stop): Delete prototypes. Functions deleted
947 earlier.
948 (do_interrupt_handler): Add prototype.
949 (sim_state): Add pending_event member to struct.
950
951 * sim-calls.c (sim_open): Configure interrupt handler.
952 * engine.c (d30v_interrupt_event): New function. Deliver external
953 interrupt to processor.
954
955 * d30v-insns (do_stack_swap): Move function from here.
956 * engine.c (do_stack_swap): To here.
957 * sim-main.h (do_stack_swap): Add prototype.
958
959 * cpu.h (registers): Change current_sp to an int.
960 * d30v-insn (do_stack_swap): Update.
961
962 Thu Jun 5 12:54:35 1997 Andrew Cagney <cagney@b1.cygnus.com>
963
964 * d30v-insns (LD*, ST*): Disasemble XX == 0 as immed version of
965 instruction.
966 (str_XXX): Fix case of XX == 3 - return "-".
967
968 Thu Jun 5 12:54:35 1997 Andrew Cagney <cagney@b1.cygnus.com>
969
970 * engine.c (sim_engine_run): Issuing L->R and R->L instructions in
971 wrong order.
972
973 * d30v-insn (CMPUcc imm long): With of RB field should be 6 not
974 three.
975 (MUL, MUL2H, MULHX): X field 01 instead of 10.
976
977 Thu Jun 5 12:54:35 1997 Andrew Cagney <cagney@b1.cygnus.com>
978
979 * d30v-insns (mvtsys): Don't modify DS bit when writing to PSW.
980 (dbt, rtd): New instructions.
981
982 * cpu.h (NR_CONTROL_REGISTERS): Now 15.
983 (debug_program_status_word_cr, debug_program_counter_cr): Add
984 debug control registers. Renumber other control registers.
985 (PSW_DS): New PSW bit.
986 (DPC, DPSW): Define.
987
988 Wed May 28 13:45:47 1997 Andrew Cagney <cagney@b1.cygnus.com>
989
990 * engine.c (sim_engine_run): Check the event queue on every cycle.
991
992 * sim-calls.c (sim_size): Delete.
993 (sim_do_command): Call sim_args_command.
994 (sim_open): Move eit_ram and sizeof_eit_ram to sim_state struct.
995 (simulation): Delete global now depend on sd argument.
996 (sim_open): Initialize sim-watch.
997 (d30v_option_handler): New function, parse mem-size argument.
998
999 Tue May 27 14:03:38 1997 Andrew Cagney <cagney@b1.cygnus.com>
1000
1001 * sim-calls.c (sim_set_callbacks): Delete.
1002 (sim_write): Pass NULL cpu arg to sim_core_write_buffer.
1003
1004 * engine.c (engine_init): Delete. Handled in sim_open.
1005 (engine_create): Ditto.
1006
1007 Tue May 20 10:15:35 1997 Andrew Cagney <cagney@b1.cygnus.com>
1008
1009 * sim-calls.c (sim_open): Add callback argument.
1010 (sim_set_callbacks): Delete SIM_DESC argument.
1011
1012 Mon May 19 14:59:32 1997 Andrew Cagney <cagney@b1.cygnus.com>
1013
1014 * sim-calls.c (sim_open): Set the sim.base magic number.
1015
1016 Fri May 16 15:25:59 1997 Andrew Cagney <cagney@b1.cygnus.com>
1017
1018 * d30v-insns: Replace engine_error with common sim_engine_abort.
1019 * cpu.c (is_condition_ok, is_wrong_slot): Ditto.
1020
1021 * engine.c (engine_run_until_stop): Rename this.
1022 (sim_engine_run): To this. Simplify - most moved to common.
1023
1024 * sim-calls.c (sim_stop_reason, sim_resume, sim_stop):
1025 Delete. Replaced by common code.
1026
1027 * engine.c (engine_error, engine_restart, engine_halt): Ditto.
1028
1029 * sim-main.h (SIM_ENGINE_RESTART_HOOK, SIM_ENGINE_HALT_HOOK):
1030 Define as NOPs.
1031
1032 Mon May 5 23:05:41 1997 Andrew Cagney <cagney@b1.cygnus.com>
1033
1034 * alu.h (IMEM, MEM, STORE): Update to reflect changes to core in
1035 ../common.
1036 * sim-calls.c (sim_open): Ditto.
1037
1038 * alu.h, cpu.h, cpu.c, d30v-insn, dc-short: Clean up copyright
1039 notice.
1040
1041 Fri May 2 12:01:38 1997 Andrew Cagney <cagney@b1.cygnus.com>
1042
1043 * sim-calls.c (sim-options.h, sim-utils.h): Include.
1044 * Makefile.in (sim-calls.o): Add dependencies.
1045
1046 * d30v-insns (address_word): Remove cia argument from support
1047 functions, igen now does this automatically.
1048
1049 * Makefile.in (tmp-igen): Include line number information in
1050 generated files.
1051
1052 * sim-main.h (SIM_DESC): Remove sim_events and sim_core, moved to
1053 simulator base type sim_state_base.
1054 (sim-core.h, sim-events.h, sim-io.h): Replace with #include
1055 "sim-base.h".
1056
1057 * sim-main.h (sim_state): Track recomendations in common
1058 directory.
1059 * cpu.h (sim_cpu): Ditto.
1060 * engine.c (do_2_short, do_parallel): Ditto.
1061 * cpu.h (GPR): Ditto.
1062 * alu.h (MEM, IMEM, STORE): Ditto.
1063 * cpu.c (is_wrong_slot): Ditto.
1064 * ic-d30v (Aa, Ab): Ditto.
1065
1066 Thu Apr 24 00:39:51 1997 Doug Evans <dje@canuck.cygnus.com>
1067
1068 * configure: Regenerated to track ../common/aclocal.m4 changes.
1069 * Makefile.in (SIM_OBJS): Add sim-module.o, sim-profile.o.
1070 * sim-calls.c (sim_open): Call sim_module_uninstall if argument
1071 parsing fails. Call sim_post_argv_init.
1072 (sim_close): Call sim_module_uninstall.
1073
1074 Fri Apr 18 13:44:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
1075
1076 * sim-calls.c (sim_stop): New function.
1077
1078 Thu Apr 17 02:57:55 1997 Doug Evans <dje@canuck.cygnus.com>
1079
1080 * Makefile.in (SIM_OBJS): Add sim-load.o, sim-options.o, sim-trace.o.
1081 (SIM_EXTRA_{LIBS,LIBDEPS,ALL,INSTALL}): Delete.
1082 (SIM_RUN_OBJS): Change from run.o to nrun.o.
1083 * cpu.h (sim_cpu): New member base. Delete members trace, sd.
1084 (cpu_traces): Delete.
1085 * engine.c (engine_init): Set backlink from cpu to state.
1086 * sim-calls.c: #include bfd.h.
1087 (sim_open): Set STATE_OPEN_KIND. Call sim_pre_argv_init,
1088 sim_parse_args.
1089 (sim_load): Return SIM_RC. New arg abfd.
1090 Call sim_load_file to load file into simulator.
1091 (sim_create_inferior): Return SIM_RC. Delete arg start_address.
1092 (sim_trace): Delete.
1093 * sim-main.h (struct sim_state): sim_state_base is typedef now.
1094 (STATE_CPU): Define.
1095
1096 Mon Apr 7 15:45:02 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
1097
1098 * configure: Regenerated to track ../common/aclocal.m4 changes.
1099 * config.in: Ditto.
1100
1101 Wed Apr 2 15:06:28 1997 Doug Evans <dje@canuck.cygnus.com>
1102
1103 * Makefile.in (SIM_EXTRA_DEPS): Define.
1104 (SIM_OBJS): Add sim-utils.o.
1105 (SIM_GEN): Delete tmp-common.
1106 (SIM_EXTRA_CLEAN): Delete clean-common.
1107 (BUILT_SRC_FROM_COMMON): Moved to ../common/Make-common.in.
1108 (tmp-common,clean-common): Delete.
1109 (ENGINE_H): sim-state.h renamed to sim-main.h.
1110 (clean-igen): Delete tmp-insns.
1111
1112 * cpu.c: sim-state.h renamed to sim-main.h.
1113 * engine.c: Likewise.
1114 * sim-calls.c: Likewise.
1115 (zalloc,zfree): Moved to ../common/sim-utils.c.
1116 * sim-main.h: Renamed from sim-state.h.
1117
1118 * sim-calls.c (sim_open): New arg `kind'.
1119
1120 * configure: Regenerated to track ../common/aclocal.m4 changes.
1121
1122 Wed Apr 2 14:34:19 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
1123
1124 * configure: Regenerated to track ../common/aclocal.m4 changes.
1125
1126 Wed Apr 2 11:13:15 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
1127
1128 * Makefile.in (SIM_OBJS): Link in the recently added sim-config.o
1129
1130 * engine.c (current_target_byte_order, current_host_byte_order,
1131 current_environment, current_alignment, current_floating_point,
1132 current_model_issue, current_stdio): Delete, moved to
1133 ../common/sim-config.c
1134
1135 Mon Mar 24 14:50:30 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
1136
1137 * d30v-insns (do_ldw): Load 4 bytes not 2.
1138 (do_incr, LD*, ST*): Increment register not its value.
1139
1140 Mon Mar 24 09:59:53 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
1141
1142 * cpu.c (is_wrong_slot): Ditto.
1143 (is_condition_ok): Ditto.
1144
1145 * sim-calls.c (sim_trace): Ditto.
1146
1147 * engine.c (engine_init): Ditto.
1148 (do_2_short): Ditto.
1149 (engine_run_until_stop): Ditto.
1150
1151 * d30v-insns (void): Update. For functions, remove `SIM_DESC sd'
1152 and `cpu *processor' arguments as igen now handles this.
1153
1154 * cpu.h: Rename struct _cpu to struct _sim_cpu. Rename variable
1155 processor to cpu.
1156
1157 * sim-state.h: Update.
1158
1159 Fri Mar 21 12:52:12 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
1160
1161 * d30v-insns (do_sat): Correct calculation of saturate lower
1162 bound.
1163 (do_sath): Ditto.
1164 (do_satzh, do_satz): Arguments should be signed.
1165
1166 * sim-calls.c (zalloc): Use malloc() instead of xmalloc() for
1167 moment.
1168 (filter_filename): Drop.
1169
1170 * cpu.h (is_wrong_slot): Correct declaration name - was
1171 is_valid_slot.
1172
1173 * engine.c (do_parallel): Plicate GCC.
1174 (engine_error): Ditto.
1175 (engine_run_until_stop): Ditto.
1176 * cpu.c (is_wrong_slot): Ditto.
1177 (is_condition_ok): Ditto.
1178 * sim-calls.c (sim_size): Ditto.
1179 (sim_read): Ditto.
1180 (sim_trace): Ditto.
1181
1182 * engine.h, engine.c (engine_create): Add missing prototype to
1183 header file. Clean up missing variables.
1184
1185 * configure.in (unistd.h, string.h, strings.h): Configure in.
1186 * configure, config.in: Rebuild.
1187
1188 Thu Mar 20 19:40:20 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
1189
1190 * d30v-insns (void): Provide a second emul instruction using a
1191 branch prefix.
1192
1193 Tue Mar 18 20:51:42 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
1194
1195 * d30v-insn (do_sat*): Pass all necessary args.
1196
1197 Tue Mar 18 18:49:10 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
1198
1199 * d30v-insns (SAT*): Issue warning when bit overflow.
1200 (EMUL): Exit with GPR[2] not 2.
1201
1202 Tue Mar 18 14:24:09 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
1203
1204 * sim-state.h: New file rename engine.h.
1205 (sim_state): Rename engine strut to sim_state, rename events and
1206 core members.
1207
1208 * engine.c: Update.
1209 * cpu.h, cpu.c: Ditto.
1210 * alu.h: Ditto.
1211 * d30v-insns: Ditto.
1212 * sim-calls.c: Ditto.
1213
1214 * Makefile.in (sim-*.c): Moved to ../common.
1215
1216 Tue Mar 18 10:39:07 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
1217
1218 * d30v-insns (do_mac): Adding wrong register.
1219 (do_macs): Ditto.
1220 (do_msub): Ditto.
1221 (do_msubs): Ditto.
1222
1223 * ic-d30v: Put back definitions of RaH, RaL, et.al.
1224 (do_sra2h, do_srah): Use.
1225 (do_srl2h, do_srlh): Use.
1226
1227 * d30v-insns (SAT, SAT2H, SATp, SATZ): Implement saturate.
1228
1229 Tue Mar 18 03:01:25 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
1230
1231 * d30v-insns: Specify wild insted of reserved bits.
1232 (void):
1233
1234 Mon Mar 17 15:10:07 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
1235
1236 * configure: Re-generate.
1237
1238 Mon Mar 17 14:35:37 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
1239
1240 * Makefile.in (SIM_EXTRA_CFLAGS), configure.in: Include SIM_*
1241 options. Allow RESERVED_BITS to be configured.
1242 * configure: Re-generate.
1243
1244 * Makefile.in (sim-*.h): Drop, not needed.
1245 (sim-*.c): Make each explicit so that they automatically update.
1246
1247 Sat Mar 15 02:34:30 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
1248
1249 * ic-d30v (imm long): Incorrect calculation.
1250
1251 * d30v-insns (EMUL): Finish exit, write-string emul-call.
1252
1253 * sim-calls.c (sim_trace): Have sim-trace enable basic instruction
1254 tracing.
1255
1256 Sat Mar 15 02:10:31 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
1257
1258 * configure.in: Enable common options - endian, inline and
1259 warnings.
1260 * configure: Regenerate.
1261
1262 Fri Mar 14 16:11:50 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
1263
1264 * Makefile.in (cpu.o): Update dependencies.
1265 * cpu.c (is_condition_ok): Update PSW bit manipulations.
1266
1267 Fri Mar 14 12:49:20 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
1268
1269 * configure.in: Autoconfig m4
1270 * configure: Regenerate.
1271
1272 * Makefile.in: Use m4 to preprocess d30v-insns.
1273 * d30v-insn: Adjust.
1274
1275 Thu Mar 13 12:44:54 1997 Doug Evans <dje@canuck.cygnus.com>
1276
1277 * sim-calls.c (sim_open): New SIM_DESC result. Argument is now
1278 in argv form.
1279 (other sim_*): New SIM_DESC argument.
1280
1281 Wed Mar 12 19:05:45 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
1282
1283 * sim-calls.c (sim_open): Create all the d30v RAM blocks.
1284
1285 * engine.c (engine_run_until_stop): Handle delayed subroutine
1286 call.
1287 * d30v-insn: Ditto.
1288
1289 * ic-d30v: For Rb and Rc always return the value and not the
1290 equation.
1291 * d30v-insn: Use.
1292
1293 * ic-d30v (val_Ra): Returns 0 or RA.
1294 * d30v-insn: Use.
1295
1296 * d30v-insn (make_even_reg, get_even_reg): New functions. Force
1297 the register index to be even, issusing a warning if it was not.
1298 (LD*, ST*): Use.
1299
1300 Wed Mar 12 14:57:26 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
1301
1302 * d30v-insns (do_trap): Implement TRAP instruction.
1303
1304 * alu.h (PSW_F, PSW_FLAG_VAL, PSW_FLAG_SET): New macro, map flag
1305 onto PSW bit.
1306 * ic-d30v: Drop F* expressions.
1307 * d30v-insn: Use more explicit PSW_FLAG_ ops.
1308 * cpu.h (PSW_*): Redo PSW bit values.
1309 * alu.h (ALU*_END): Update. Fix setting of overflow - logic was
1310 backwards.
1311
1312 * d30v-insn (MVFSYS, MVTSYS): Implement.
1313 * cpu.h (PSWH, PSWL): New macros for high, low word of PSW.
1314
1315 Wed Mar 12 14:12:11 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
1316
1317 * cpu.h (RPT_IS_CALL): New macro for processor field
1318 is_delayed_call. That in turn used as a flag to indicate if a
1319 delayed branch or delayed call is to occure.
1320 * d30v-insns (do_dbra): Set/clear RPT_IS_CALL;
1321 (do_dbrai): Ditto.
1322 (do_dbsr): Ditto.
1323 (do_dbsr): Ditto.
1324 (do_djmp): Ditto.
1325 (do_djmpi): Dotto.
1326 (do_djsr): Ditto.
1327 (do_djsri): Ditto.
1328 (void):
1329
1330 * d30v-insn (do_incr): Finish - handle modulo registers.
1331
1332 * d30v-insns (CMPU): Include all possible compare
1333 operations. Issue a warning where op defined by the processor
1334 spec.
1335
1336 Wed Mar 12 13:55:55 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
1337
1338 * d30v-insns: Add a new instruction class _EMUL and a new
1339 instruction EMUL that emulates a few basic IO operations.
1340
1341 * Makefile.in (tmp-igen): Filter in emul instructions.
1342
1343 Fri Mar 7 20:32:13 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
1344
1345 * d30v-insns (void): Fill in the gaps.
1346
1347 Wed Feb 26 09:31:10 1997 Andrew Cagney <cagney@kremvax.tpgi.com.au>
1348
1349 * Makefile.in (tmp-igen): Include ic-d30v in dependencies.
1350
1351 * ic-d30v (cache): Update to use H_word, L_word added to
1352 sim-endian.h.
1353
1354 Tue Feb 25 15:26:51 1997 Andrew Cagney <cagney@kremvax.tpgi.com.au>
1355
1356 * Makefile.in (tmp-igen): Correctly run $(MAKE).
1357
1358 Thu Feb 20 20:30:31 1997 Andrew Cagney <cagney@critters.cygnus.com>
1359
1360 * Makefile.in (FROM_IGEN, FROM_COMMON): Make the igen generated
1361 files dependant on tmp-igen. Define ENGINE_H.
1362
1363 Sun Feb 16 16:42:48 1997 Andrew Cagney <cagney@critters.cygnus.com>
1364
1365 * configure.in: New file - follow Doug Evans instructions.
1366 * Makefile.in: Ditto.
1367