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1 # Makefile template for Configure for the m32r simulator
2 # Copyright (C) 1996-2015 Free Software Foundation, Inc.
3 # Contributed by Cygnus Support.
4 #
5 # This file is part of GDB, the GNU debugger.
6 #
7 # This program is free software; you can redistribute it and/or modify
8 # it under the terms of the GNU General Public License as published by
9 # the Free Software Foundation; either version 3 of the License, or
10 # (at your option) any later version.
11 #
12 # This program is distributed in the hope that it will be useful,
13 # but WITHOUT ANY WARRANTY; without even the implied warranty of
14 # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 # GNU General Public License for more details.
16 #
17 # You should have received a copy of the GNU General Public License
18 # along with this program. If not, see <http://www.gnu.org/licenses/>.
19
20 ## COMMON_PRE_CONFIG_FRAG
21
22 M32R_OBJS = m32r.o cpu.o decode.o sem.o model.o mloop.o
23 M32RX_OBJS = m32rx.o cpux.o decodex.o modelx.o mloopx.o
24 M32R2_OBJS = m32r2.o cpu2.o decode2.o model2.o mloop2.o
25 TRAPS_OBJ = @traps_obj@
26
27 SIM_OBJS = \
28 $(SIM_NEW_COMMON_OBJS) \
29 sim-cpu.o \
30 sim-hload.o \
31 sim-hrw.o \
32 sim-model.o \
33 sim-reg.o \
34 cgen-utils.o cgen-trace.o cgen-scache.o \
35 cgen-run.o sim-reason.o sim-engine.o sim-stop.o \
36 sim-if.o arch.o \
37 $(M32R_OBJS) \
38 $(M32RX_OBJS) \
39 $(M32R2_OBJS) \
40 $(TRAPS_OBJ) \
41 devices.o
42
43 # Extra headers included by sim-main.h.
44 SIM_EXTRA_DEPS = \
45 $(CGEN_INCLUDE_DEPS) \
46 arch.h cpuall.h m32r-sim.h $(srcdir)/../../opcodes/m32r-desc.h
47
48 SIM_EXTRA_CFLAGS = @sim_extra_cflags@
49
50 SIM_EXTRA_CLEAN = m32r-clean
51
52 # This selects the m32r newlib/libgloss syscall definitions.
53 NL_TARGET = -DNL_TARGET_m32r
54
55 ## COMMON_POST_CONFIG_FRAG
56
57 arch = m32r
58
59 sim-if.o: sim-if.c $(SIM_MAIN_DEPS) $(srcdir)/../common/sim-core.h
60
61 arch.o: arch.c $(SIM_MAIN_DEPS)
62
63 traps.o: traps.c targ-vals.h $(SIM_MAIN_DEPS)
64 traps-linux.o: traps.c syscall.h targ-vals.h $(SIM_MAIN_DEPS)
65 devices.o: devices.c $(SIM_MAIN_DEPS)
66
67 # M32R objs
68
69 M32RBF_INCLUDE_DEPS = \
70 $(CGEN_MAIN_CPU_DEPS) \
71 cpu.h decode.h eng.h
72
73 m32r.o: m32r.c $(M32RBF_INCLUDE_DEPS)
74
75 # FIXME: Use of `mono' is wip.
76 mloop.c eng.h: stamp-mloop ; @true
77 stamp-mloop: $(srcdir)/../common/genmloop.sh mloop.in Makefile
78 $(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \
79 -mono -fast -pbb -switch sem-switch.c \
80 -cpu m32rbf -infile $(srcdir)/mloop.in
81 $(SHELL) $(srcroot)/move-if-change eng.hin eng.h
82 $(SHELL) $(srcroot)/move-if-change mloop.cin mloop.c
83 touch stamp-mloop
84 mloop.o: mloop.c sem-switch.c $(M32RBF_INCLUDE_DEPS)
85
86 cpu.o: cpu.c $(M32RBF_INCLUDE_DEPS)
87 decode.o: decode.c $(M32RBF_INCLUDE_DEPS)
88 sem.o: sem.c $(M32RBF_INCLUDE_DEPS)
89 model.o: model.c $(M32RBF_INCLUDE_DEPS)
90
91 # M32RX objs
92
93 M32RXF_INCLUDE_DEPS = \
94 $(CGEN_MAIN_CPU_DEPS) \
95 cpux.h decodex.h engx.h
96
97 m32rx.o: m32rx.c $(M32RXF_INCLUDE_DEPS)
98
99 # FIXME: Use of `mono' is wip.
100 mloopx.c engx.h: stamp-xmloop ; @true
101 stamp-xmloop: $(srcdir)/../common/genmloop.sh mloopx.in Makefile
102 $(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \
103 -mono -no-fast -pbb -parallel-write -switch semx-switch.c \
104 -cpu m32rxf -infile $(srcdir)/mloopx.in \
105 -outfile-suffix x
106 $(SHELL) $(srcroot)/move-if-change engx.hin engx.h
107 $(SHELL) $(srcroot)/move-if-change mloopx.cin mloopx.c
108 touch stamp-xmloop
109 mloopx.o: mloopx.c semx-switch.c $(M32RXF_INCLUDE_DEPS)
110
111 cpux.o: cpux.c $(M32RXF_INCLUDE_DEPS)
112 decodex.o: decodex.c $(M32RXF_INCLUDE_DEPS)
113 semx.o: semx.c $(M32RXF_INCLUDE_DEPS)
114 modelx.o: modelx.c $(M32RXF_INCLUDE_DEPS)
115
116 # M32R2 objs
117
118 M32R2F_INCLUDE_DEPS = \
119 $(CGEN_MAIN_CPU_DEPS) \
120 cpu2.h decode2.h eng2.h
121
122 m32r2.o: m32r2.c $(M32R2F_INCLUDE_DEPS)
123
124 # FIXME: Use of `mono' is wip.
125 mloop2.c eng2.h: stamp-2mloop ; @true
126 stamp-2mloop: $(srcdir)/../common/genmloop.sh mloop2.in Makefile
127 $(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \
128 -mono -no-fast -pbb -parallel-write -switch sem2-switch.c \
129 -cpu m32r2f -infile $(srcdir)/mloop2.in \
130 -outfile-suffix 2
131 $(SHELL) $(srcroot)/move-if-change eng2.hin eng2.h
132 $(SHELL) $(srcroot)/move-if-change mloop2.cin mloop2.c
133 touch stamp-2mloop
134
135 mloop2.o: mloop2.c $(srcdir)/sem2-switch.c $(M32R2F_INCLUDE_DEPS)
136 cpu2.o: cpu2.c $(M32R2F_INCLUDE_DEPS)
137 decode2.o: decode2.c $(M32R2F_INCLUDE_DEPS)
138 sem2.o: sem2.c $(M32R2F_INCLUDE_DEPS)
139 model2.o: model2.c $(M32R2F_INCLUDE_DEPS)
140
141 m32r-clean:
142 rm -f mloop.c eng.h stamp-mloop
143 rm -f mloopx.c engx.h stamp-xmloop
144 rm -f mloop2.c eng2.h stamp-2mloop
145 rm -f stamp-arch stamp-cpu stamp-xcpu stamp-2cpu
146 rm -f tmp-*
147
148 # cgen support, enable with --enable-cgen-maint
149 CGEN_MAINT = ; @true
150 # The following line is commented in or out depending upon --enable-cgen-maint.
151 @CGEN_MAINT@CGEN_MAINT =
152
153 # NOTE: Generated source files are specified as full paths,
154 # e.g. $(srcdir)/arch.c, because make may decide the files live
155 # in objdir otherwise.
156
157 stamp-arch: $(CGEN_READ_SCM) $(CGEN_ARCH_SCM) $(CPU_DIR)/m32r.cpu Makefile
158 $(MAKE) cgen-arch $(CGEN_FLAGS_TO_PASS) mach=all \
159 archfile=$(CPU_DIR)/m32r.cpu \
160 FLAGS="with-scache with-profile=fn"
161 touch stamp-arch
162 $(srcdir)/arch.h $(srcdir)/arch.c $(srcdir)/cpuall.h: $(CGEN_MAINT) stamp-arch
163 @true
164
165 stamp-cpu: $(CGEN_READ_SCM) $(CGEN_CPU_SCM) $(CGEN_DECODE_SCM) $(CPU_DIR)/m32r.cpu Makefile
166 $(MAKE) cgen-cpu-decode $(CGEN_FLAGS_TO_PASS) \
167 cpu=m32rbf mach=m32r SUFFIX= \
168 archfile=$(CPU_DIR)/m32r.cpu \
169 FLAGS="with-scache with-profile=fn" \
170 EXTRAFILES="$(CGEN_CPU_SEM) $(CGEN_CPU_SEMSW)"
171 touch stamp-cpu
172 $(srcdir)/cpu.h $(srcdir)/sem.c $(srcdir)/sem-switch.c $(srcdir)/model.c $(srcdir)/decode.c $(srcdir)/decode.h: $(CGEN_MAINT) stamp-cpu
173 @true
174
175 stamp-xcpu: $(CGEN_READ_SCM) $(CGEN_CPU_SCM) $(CGEN_DECODE_SCM) $(CPU_DIR)/m32r.cpu Makefile
176 $(MAKE) cgen-cpu-decode $(CGEN_FLAGS_TO_PASS) \
177 cpu=m32rxf mach=m32rx SUFFIX=x \
178 archfile=$(CPU_DIR)/m32r.cpu \
179 FLAGS="with-scache with-profile=fn" \
180 EXTRAFILES="$(CGEN_CPU_SEMSW)"
181 touch stamp-xcpu
182 $(srcdir)/cpux.h $(srcdir)/semx-switch.c $(srcdir)/modelx.c $(srcdir)/decodex.c $(srcdir)/decodex.h: $(CGEN_MAINT) stamp-xcpu
183 @true
184
185 stamp-2cpu: $(CGEN_READ_SCM) $(CGEN_CPU_SCM) $(CGEN_DECODE_SCM) $(CPU_DIR)/m32r.cpu Makefile
186 $(MAKE) cgen-cpu-decode $(CGEN_FLAGS_TO_PASS) \
187 cpu=m32r2f mach=m32r2 SUFFIX=2 \
188 archfile=$(CPU_DIR)/m32r.cpu \
189 FLAGS="with-scache with-profile=fn" \
190 EXTRAFILES="$(CGEN_CPU_SEMSW)"
191 touch stamp-2cpu
192 $(srcdir)/cpu2.h $(srcdir)/sem2-switch.c $(srcdir)/model2.c $(srcdir)/decode2.c $(srcdir)/decode2.h: $(CGEN_MAINT) stamp-2cpu
193 @true