1 /* Simulator instruction decoder for m32rbf.
3 THIS FILE IS MACHINE GENERATED WITH CGEN.
5 Copyright (C) 1996, 1997, 1998, 1999 Free Software Foundation, Inc.
7 This file is part of the GNU Simulators.
9 This program is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 2, or (at your option)
14 This program is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
19 You should have received a copy of the GNU General Public License along
20 with this program; if not, write to the Free Software Foundation, Inc.,
21 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
25 #define WANT_CPU m32rbf
26 #define WANT_CPU_M32RBF
29 #include "sim-assert.h"
31 /* FIXME: Need to review choices for the following. */
33 #if WITH_SEM_SWITCH_FULL
36 #define FULL(fn) CONCAT3 (m32rbf,_sem_,fn) ,
40 #if WITH_SEM_SWITCH_FAST
43 #define FAST(fn) CONCAT3 (m32rbf,_semf_,fn) , /* f for fast */
49 /* The INSN_ prefix is not here and is instead part of the `insn' argument
50 to avoid collisions with header files (e.g. `AND' in ansidecl.h). */
51 #define IDX(insn) CONCAT2 (M32RBF_,insn)
52 #define TYPE(insn) CONCAT2 (M32R_,insn)
54 /* The instruction descriptor array.
55 This is computed at runtime. Space for it is not malloc'd to save a
56 teensy bit of cpu in the decoder. Moving it to malloc space is trivial
57 but won't be done until necessary (we don't currently support the runtime
58 addition of instructions nor an SMP machine with different cpus). */
59 static IDESC m32rbf_insn_data
[M32RBF_INSN_MAX
];
61 /* Commas between elements are contained in the macros.
62 Some of these are conditionally compiled out. */
64 static const struct insn_sem m32rbf_insn_sem
[] =
66 { VIRTUAL_INSN_X_INVALID
, IDX (INSN_X_INVALID
), FULL (x_invalid
) FAST (x_invalid
) },
67 { VIRTUAL_INSN_X_AFTER
, IDX (INSN_X_AFTER
), FULL (x_after
) FAST (x_after
) },
68 { VIRTUAL_INSN_X_BEFORE
, IDX (INSN_X_BEFORE
), FULL (x_before
) FAST (x_before
) },
69 { VIRTUAL_INSN_X_CTI_CHAIN
, IDX (INSN_X_CTI_CHAIN
), FULL (x_cti_chain
) FAST (x_cti_chain
) },
70 { VIRTUAL_INSN_X_CHAIN
, IDX (INSN_X_CHAIN
), FULL (x_chain
) FAST (x_chain
) },
71 { VIRTUAL_INSN_X_BEGIN
, IDX (INSN_X_BEGIN
), FULL (x_begin
) FAST (x_begin
) },
72 { TYPE (INSN_ADD
), IDX (INSN_ADD
), FULL (add
) FAST (add
) },
73 { TYPE (INSN_ADD3
), IDX (INSN_ADD3
), FULL (add3
) FAST (add3
) },
74 { TYPE (INSN_AND
), IDX (INSN_AND
), FULL (and) FAST (and) },
75 { TYPE (INSN_AND3
), IDX (INSN_AND3
), FULL (and3
) FAST (and3
) },
76 { TYPE (INSN_OR
), IDX (INSN_OR
), FULL (or) FAST (or) },
77 { TYPE (INSN_OR3
), IDX (INSN_OR3
), FULL (or3
) FAST (or3
) },
78 { TYPE (INSN_XOR
), IDX (INSN_XOR
), FULL (xor) FAST (xor) },
79 { TYPE (INSN_XOR3
), IDX (INSN_XOR3
), FULL (xor3
) FAST (xor3
) },
80 { TYPE (INSN_ADDI
), IDX (INSN_ADDI
), FULL (addi
) FAST (addi
) },
81 { TYPE (INSN_ADDV
), IDX (INSN_ADDV
), FULL (addv
) FAST (addv
) },
82 { TYPE (INSN_ADDV3
), IDX (INSN_ADDV3
), FULL (addv3
) FAST (addv3
) },
83 { TYPE (INSN_ADDX
), IDX (INSN_ADDX
), FULL (addx
) FAST (addx
) },
84 { TYPE (INSN_BC8
), IDX (INSN_BC8
), FULL (bc8
) FAST (bc8
) },
85 { TYPE (INSN_BC24
), IDX (INSN_BC24
), FULL (bc24
) FAST (bc24
) },
86 { TYPE (INSN_BEQ
), IDX (INSN_BEQ
), FULL (beq
) FAST (beq
) },
87 { TYPE (INSN_BEQZ
), IDX (INSN_BEQZ
), FULL (beqz
) FAST (beqz
) },
88 { TYPE (INSN_BGEZ
), IDX (INSN_BGEZ
), FULL (bgez
) FAST (bgez
) },
89 { TYPE (INSN_BGTZ
), IDX (INSN_BGTZ
), FULL (bgtz
) FAST (bgtz
) },
90 { TYPE (INSN_BLEZ
), IDX (INSN_BLEZ
), FULL (blez
) FAST (blez
) },
91 { TYPE (INSN_BLTZ
), IDX (INSN_BLTZ
), FULL (bltz
) FAST (bltz
) },
92 { TYPE (INSN_BNEZ
), IDX (INSN_BNEZ
), FULL (bnez
) FAST (bnez
) },
93 { TYPE (INSN_BL8
), IDX (INSN_BL8
), FULL (bl8
) FAST (bl8
) },
94 { TYPE (INSN_BL24
), IDX (INSN_BL24
), FULL (bl24
) FAST (bl24
) },
95 { TYPE (INSN_BNC8
), IDX (INSN_BNC8
), FULL (bnc8
) FAST (bnc8
) },
96 { TYPE (INSN_BNC24
), IDX (INSN_BNC24
), FULL (bnc24
) FAST (bnc24
) },
97 { TYPE (INSN_BNE
), IDX (INSN_BNE
), FULL (bne
) FAST (bne
) },
98 { TYPE (INSN_BRA8
), IDX (INSN_BRA8
), FULL (bra8
) FAST (bra8
) },
99 { TYPE (INSN_BRA24
), IDX (INSN_BRA24
), FULL (bra24
) FAST (bra24
) },
100 { TYPE (INSN_CMP
), IDX (INSN_CMP
), FULL (cmp
) FAST (cmp
) },
101 { TYPE (INSN_CMPI
), IDX (INSN_CMPI
), FULL (cmpi
) FAST (cmpi
) },
102 { TYPE (INSN_CMPU
), IDX (INSN_CMPU
), FULL (cmpu
) FAST (cmpu
) },
103 { TYPE (INSN_CMPUI
), IDX (INSN_CMPUI
), FULL (cmpui
) FAST (cmpui
) },
104 { TYPE (INSN_DIV
), IDX (INSN_DIV
), FULL (div
) FAST (div
) },
105 { TYPE (INSN_DIVU
), IDX (INSN_DIVU
), FULL (divu
) FAST (divu
) },
106 { TYPE (INSN_REM
), IDX (INSN_REM
), FULL (rem
) FAST (rem
) },
107 { TYPE (INSN_REMU
), IDX (INSN_REMU
), FULL (remu
) FAST (remu
) },
108 { TYPE (INSN_JL
), IDX (INSN_JL
), FULL (jl
) FAST (jl
) },
109 { TYPE (INSN_JMP
), IDX (INSN_JMP
), FULL (jmp
) FAST (jmp
) },
110 { TYPE (INSN_LD
), IDX (INSN_LD
), FULL (ld
) FAST (ld
) },
111 { TYPE (INSN_LD_D
), IDX (INSN_LD_D
), FULL (ld_d
) FAST (ld_d
) },
112 { TYPE (INSN_LDB
), IDX (INSN_LDB
), FULL (ldb
) FAST (ldb
) },
113 { TYPE (INSN_LDB_D
), IDX (INSN_LDB_D
), FULL (ldb_d
) FAST (ldb_d
) },
114 { TYPE (INSN_LDH
), IDX (INSN_LDH
), FULL (ldh
) FAST (ldh
) },
115 { TYPE (INSN_LDH_D
), IDX (INSN_LDH_D
), FULL (ldh_d
) FAST (ldh_d
) },
116 { TYPE (INSN_LDUB
), IDX (INSN_LDUB
), FULL (ldub
) FAST (ldub
) },
117 { TYPE (INSN_LDUB_D
), IDX (INSN_LDUB_D
), FULL (ldub_d
) FAST (ldub_d
) },
118 { TYPE (INSN_LDUH
), IDX (INSN_LDUH
), FULL (lduh
) FAST (lduh
) },
119 { TYPE (INSN_LDUH_D
), IDX (INSN_LDUH_D
), FULL (lduh_d
) FAST (lduh_d
) },
120 { TYPE (INSN_LD_PLUS
), IDX (INSN_LD_PLUS
), FULL (ld_plus
) FAST (ld_plus
) },
121 { TYPE (INSN_LD24
), IDX (INSN_LD24
), FULL (ld24
) FAST (ld24
) },
122 { TYPE (INSN_LDI8
), IDX (INSN_LDI8
), FULL (ldi8
) FAST (ldi8
) },
123 { TYPE (INSN_LDI16
), IDX (INSN_LDI16
), FULL (ldi16
) FAST (ldi16
) },
124 { TYPE (INSN_LOCK
), IDX (INSN_LOCK
), FULL (lock
) FAST (lock
) },
125 { TYPE (INSN_MACHI
), IDX (INSN_MACHI
), FULL (machi
) FAST (machi
) },
126 { TYPE (INSN_MACLO
), IDX (INSN_MACLO
), FULL (maclo
) FAST (maclo
) },
127 { TYPE (INSN_MACWHI
), IDX (INSN_MACWHI
), FULL (macwhi
) FAST (macwhi
) },
128 { TYPE (INSN_MACWLO
), IDX (INSN_MACWLO
), FULL (macwlo
) FAST (macwlo
) },
129 { TYPE (INSN_MUL
), IDX (INSN_MUL
), FULL (mul
) FAST (mul
) },
130 { TYPE (INSN_MULHI
), IDX (INSN_MULHI
), FULL (mulhi
) FAST (mulhi
) },
131 { TYPE (INSN_MULLO
), IDX (INSN_MULLO
), FULL (mullo
) FAST (mullo
) },
132 { TYPE (INSN_MULWHI
), IDX (INSN_MULWHI
), FULL (mulwhi
) FAST (mulwhi
) },
133 { TYPE (INSN_MULWLO
), IDX (INSN_MULWLO
), FULL (mulwlo
) FAST (mulwlo
) },
134 { TYPE (INSN_MV
), IDX (INSN_MV
), FULL (mv
) FAST (mv
) },
135 { TYPE (INSN_MVFACHI
), IDX (INSN_MVFACHI
), FULL (mvfachi
) FAST (mvfachi
) },
136 { TYPE (INSN_MVFACLO
), IDX (INSN_MVFACLO
), FULL (mvfaclo
) FAST (mvfaclo
) },
137 { TYPE (INSN_MVFACMI
), IDX (INSN_MVFACMI
), FULL (mvfacmi
) FAST (mvfacmi
) },
138 { TYPE (INSN_MVFC
), IDX (INSN_MVFC
), FULL (mvfc
) FAST (mvfc
) },
139 { TYPE (INSN_MVTACHI
), IDX (INSN_MVTACHI
), FULL (mvtachi
) FAST (mvtachi
) },
140 { TYPE (INSN_MVTACLO
), IDX (INSN_MVTACLO
), FULL (mvtaclo
) FAST (mvtaclo
) },
141 { TYPE (INSN_MVTC
), IDX (INSN_MVTC
), FULL (mvtc
) FAST (mvtc
) },
142 { TYPE (INSN_NEG
), IDX (INSN_NEG
), FULL (neg
) FAST (neg
) },
143 { TYPE (INSN_NOP
), IDX (INSN_NOP
), FULL (nop
) FAST (nop
) },
144 { TYPE (INSN_NOT
), IDX (INSN_NOT
), FULL (not) FAST (not) },
145 { TYPE (INSN_RAC
), IDX (INSN_RAC
), FULL (rac
) FAST (rac
) },
146 { TYPE (INSN_RACH
), IDX (INSN_RACH
), FULL (rach
) FAST (rach
) },
147 { TYPE (INSN_RTE
), IDX (INSN_RTE
), FULL (rte
) FAST (rte
) },
148 { TYPE (INSN_SETH
), IDX (INSN_SETH
), FULL (seth
) FAST (seth
) },
149 { TYPE (INSN_SLL
), IDX (INSN_SLL
), FULL (sll
) FAST (sll
) },
150 { TYPE (INSN_SLL3
), IDX (INSN_SLL3
), FULL (sll3
) FAST (sll3
) },
151 { TYPE (INSN_SLLI
), IDX (INSN_SLLI
), FULL (slli
) FAST (slli
) },
152 { TYPE (INSN_SRA
), IDX (INSN_SRA
), FULL (sra
) FAST (sra
) },
153 { TYPE (INSN_SRA3
), IDX (INSN_SRA3
), FULL (sra3
) FAST (sra3
) },
154 { TYPE (INSN_SRAI
), IDX (INSN_SRAI
), FULL (srai
) FAST (srai
) },
155 { TYPE (INSN_SRL
), IDX (INSN_SRL
), FULL (srl
) FAST (srl
) },
156 { TYPE (INSN_SRL3
), IDX (INSN_SRL3
), FULL (srl3
) FAST (srl3
) },
157 { TYPE (INSN_SRLI
), IDX (INSN_SRLI
), FULL (srli
) FAST (srli
) },
158 { TYPE (INSN_ST
), IDX (INSN_ST
), FULL (st
) FAST (st
) },
159 { TYPE (INSN_ST_D
), IDX (INSN_ST_D
), FULL (st_d
) FAST (st_d
) },
160 { TYPE (INSN_STB
), IDX (INSN_STB
), FULL (stb
) FAST (stb
) },
161 { TYPE (INSN_STB_D
), IDX (INSN_STB_D
), FULL (stb_d
) FAST (stb_d
) },
162 { TYPE (INSN_STH
), IDX (INSN_STH
), FULL (sth
) FAST (sth
) },
163 { TYPE (INSN_STH_D
), IDX (INSN_STH_D
), FULL (sth_d
) FAST (sth_d
) },
164 { TYPE (INSN_ST_PLUS
), IDX (INSN_ST_PLUS
), FULL (st_plus
) FAST (st_plus
) },
165 { TYPE (INSN_ST_MINUS
), IDX (INSN_ST_MINUS
), FULL (st_minus
) FAST (st_minus
) },
166 { TYPE (INSN_SUB
), IDX (INSN_SUB
), FULL (sub
) FAST (sub
) },
167 { TYPE (INSN_SUBV
), IDX (INSN_SUBV
), FULL (subv
) FAST (subv
) },
168 { TYPE (INSN_SUBX
), IDX (INSN_SUBX
), FULL (subx
) FAST (subx
) },
169 { TYPE (INSN_TRAP
), IDX (INSN_TRAP
), FULL (trap
) FAST (trap
) },
170 { TYPE (INSN_UNLOCK
), IDX (INSN_UNLOCK
), FULL (unlock
) FAST (unlock
) },
173 static const struct insn_sem m32rbf_insn_sem_invalid
=
175 VIRTUAL_INSN_X_INVALID
, IDX (INSN_X_INVALID
), FULL (x_invalid
) FAST (x_invalid
)
184 /* Initialize an IDESC from the compile-time computable parts. */
187 init_idesc (SIM_CPU
*cpu
, IDESC
*id
, const struct insn_sem
*t
)
189 const CGEN_INSN
*insn_table
= CGEN_CPU_INSN_TABLE (CPU_CPU_DESC (cpu
))->init_entries
;
192 if ((int) t
->type
<= 0)
193 id
->idata
= & cgen_virtual_insn_table
[- (int) t
->type
];
195 id
->idata
= & insn_table
[t
->type
];
196 id
->attrs
= CGEN_INSN_ATTRS (id
->idata
);
197 /* Oh my god, a magic number. */
198 id
->length
= CGEN_INSN_BITSIZE (id
->idata
) / 8;
199 #if ! WITH_SEM_SWITCH_FULL
200 id
->sem_full
= t
->sem_full
;
202 #if WITH_FAST && ! WITH_SEM_SWITCH_FAST
203 id
->sem_fast
= t
->sem_fast
;
205 #if WITH_PROFILE_MODEL_P
206 id
->timing
= & MODEL_TIMING (CPU_MODEL (cpu
)) [t
->index
];
208 SIM_DESC sd
= CPU_STATE (cpu
);
209 SIM_ASSERT (t
->index
== id
->timing
->num
);
214 /* Initialize the instruction descriptor table. */
217 m32rbf_init_idesc_table (SIM_CPU
*cpu
)
220 const struct insn_sem
*t
,*tend
;
221 int tabsize
= M32RBF_INSN_MAX
;
222 IDESC
*table
= m32rbf_insn_data
;
224 memset (table
, 0, tabsize
* sizeof (IDESC
));
226 /* First set all entries to the `invalid insn'. */
227 t
= & m32rbf_insn_sem_invalid
;
228 for (id
= table
, tabend
= table
+ tabsize
; id
< tabend
; ++id
)
229 init_idesc (cpu
, id
, t
);
231 /* Now fill in the values for the chosen cpu. */
232 for (t
= m32rbf_insn_sem
, tend
= t
+ sizeof (m32rbf_insn_sem
) / sizeof (*t
);
235 init_idesc (cpu
, & table
[t
->index
], t
);
238 /* Link the IDESC table into the cpu. */
239 CPU_IDESC (cpu
) = table
;
242 /* Given an instruction, return a pointer to its IDESC entry. */
245 m32rbf_decode (SIM_CPU
*current_cpu
, IADDR pc
,
246 CGEN_INSN_INT base_insn
, CGEN_INSN_INT entire_insn
,
249 /* Result of decoder. */
250 M32RBF_INSN_TYPE itype
;
253 CGEN_INSN_INT insn
= base_insn
;
256 unsigned int val
= (((insn
>> 8) & (15 << 4)) | ((insn
>> 4) & (15 << 0)));
259 case 0 : itype
= M32RBF_INSN_SUBV
; goto extract_fmt_addv
;
260 case 1 : itype
= M32RBF_INSN_SUBX
; goto extract_fmt_addx
;
261 case 2 : itype
= M32RBF_INSN_SUB
; goto extract_fmt_add
;
262 case 3 : itype
= M32RBF_INSN_NEG
; goto extract_fmt_mv
;
263 case 4 : itype
= M32RBF_INSN_CMP
; goto extract_fmt_cmp
;
264 case 5 : itype
= M32RBF_INSN_CMPU
; goto extract_fmt_cmp
;
265 case 8 : itype
= M32RBF_INSN_ADDV
; goto extract_fmt_addv
;
266 case 9 : itype
= M32RBF_INSN_ADDX
; goto extract_fmt_addx
;
267 case 10 : itype
= M32RBF_INSN_ADD
; goto extract_fmt_add
;
268 case 11 : itype
= M32RBF_INSN_NOT
; goto extract_fmt_mv
;
269 case 12 : itype
= M32RBF_INSN_AND
; goto extract_fmt_add
;
270 case 13 : itype
= M32RBF_INSN_XOR
; goto extract_fmt_add
;
271 case 14 : itype
= M32RBF_INSN_OR
; goto extract_fmt_add
;
272 case 16 : itype
= M32RBF_INSN_SRL
; goto extract_fmt_add
;
273 case 18 : itype
= M32RBF_INSN_SRA
; goto extract_fmt_add
;
274 case 20 : itype
= M32RBF_INSN_SLL
; goto extract_fmt_add
;
275 case 22 : itype
= M32RBF_INSN_MUL
; goto extract_fmt_add
;
276 case 24 : itype
= M32RBF_INSN_MV
; goto extract_fmt_mv
;
277 case 25 : itype
= M32RBF_INSN_MVFC
; goto extract_fmt_mvfc
;
278 case 26 : itype
= M32RBF_INSN_MVTC
; goto extract_fmt_mvtc
;
281 unsigned int val
= (((insn
>> 8) & (15 << 0)));
284 case 14 : itype
= M32RBF_INSN_JL
; goto extract_fmt_jl
;
285 case 15 : itype
= M32RBF_INSN_JMP
; goto extract_fmt_jmp
;
286 default : itype
= M32RBF_INSN_X_INVALID
; goto extract_fmt_empty
;
289 case 29 : itype
= M32RBF_INSN_RTE
; goto extract_fmt_rte
;
290 case 31 : itype
= M32RBF_INSN_TRAP
; goto extract_fmt_trap
;
291 case 32 : itype
= M32RBF_INSN_STB
; goto extract_fmt_stb
;
292 case 34 : itype
= M32RBF_INSN_STH
; goto extract_fmt_sth
;
293 case 36 : itype
= M32RBF_INSN_ST
; goto extract_fmt_st
;
294 case 37 : itype
= M32RBF_INSN_UNLOCK
; goto extract_fmt_unlock
;
295 case 38 : itype
= M32RBF_INSN_ST_PLUS
; goto extract_fmt_st_plus
;
296 case 39 : itype
= M32RBF_INSN_ST_MINUS
; goto extract_fmt_st_plus
;
297 case 40 : itype
= M32RBF_INSN_LDB
; goto extract_fmt_ldb
;
298 case 41 : itype
= M32RBF_INSN_LDUB
; goto extract_fmt_ldb
;
299 case 42 : itype
= M32RBF_INSN_LDH
; goto extract_fmt_ldh
;
300 case 43 : itype
= M32RBF_INSN_LDUH
; goto extract_fmt_ldh
;
301 case 44 : itype
= M32RBF_INSN_LD
; goto extract_fmt_ld
;
302 case 45 : itype
= M32RBF_INSN_LOCK
; goto extract_fmt_lock
;
303 case 46 : itype
= M32RBF_INSN_LD_PLUS
; goto extract_fmt_ld_plus
;
304 case 48 : itype
= M32RBF_INSN_MULHI
; goto extract_fmt_mulhi
;
305 case 49 : itype
= M32RBF_INSN_MULLO
; goto extract_fmt_mulhi
;
306 case 50 : itype
= M32RBF_INSN_MULWHI
; goto extract_fmt_mulhi
;
307 case 51 : itype
= M32RBF_INSN_MULWLO
; goto extract_fmt_mulhi
;
308 case 52 : itype
= M32RBF_INSN_MACHI
; goto extract_fmt_machi
;
309 case 53 : itype
= M32RBF_INSN_MACLO
; goto extract_fmt_machi
;
310 case 54 : itype
= M32RBF_INSN_MACWHI
; goto extract_fmt_machi
;
311 case 55 : itype
= M32RBF_INSN_MACWLO
; goto extract_fmt_machi
;
312 case 64 : /* fall through */
313 case 65 : /* fall through */
314 case 66 : /* fall through */
315 case 67 : /* fall through */
316 case 68 : /* fall through */
317 case 69 : /* fall through */
318 case 70 : /* fall through */
319 case 71 : /* fall through */
320 case 72 : /* fall through */
321 case 73 : /* fall through */
322 case 74 : /* fall through */
323 case 75 : /* fall through */
324 case 76 : /* fall through */
325 case 77 : /* fall through */
326 case 78 : /* fall through */
327 case 79 : itype
= M32RBF_INSN_ADDI
; goto extract_fmt_addi
;
328 case 80 : /* fall through */
329 case 81 : itype
= M32RBF_INSN_SRLI
; goto extract_fmt_slli
;
330 case 82 : /* fall through */
331 case 83 : itype
= M32RBF_INSN_SRAI
; goto extract_fmt_slli
;
332 case 84 : /* fall through */
333 case 85 : itype
= M32RBF_INSN_SLLI
; goto extract_fmt_slli
;
336 unsigned int val
= (((insn
>> 0) & (15 << 0)));
339 case 0 : itype
= M32RBF_INSN_MVTACHI
; goto extract_fmt_mvtachi
;
340 case 1 : itype
= M32RBF_INSN_MVTACLO
; goto extract_fmt_mvtachi
;
341 default : itype
= M32RBF_INSN_X_INVALID
; goto extract_fmt_empty
;
344 case 88 : itype
= M32RBF_INSN_RACH
; goto extract_fmt_rac
;
345 case 89 : itype
= M32RBF_INSN_RAC
; goto extract_fmt_rac
;
348 unsigned int val
= (((insn
>> 0) & (15 << 0)));
351 case 0 : itype
= M32RBF_INSN_MVFACHI
; goto extract_fmt_mvfachi
;
352 case 1 : itype
= M32RBF_INSN_MVFACLO
; goto extract_fmt_mvfachi
;
353 case 2 : itype
= M32RBF_INSN_MVFACMI
; goto extract_fmt_mvfachi
;
354 default : itype
= M32RBF_INSN_X_INVALID
; goto extract_fmt_empty
;
357 case 96 : /* fall through */
358 case 97 : /* fall through */
359 case 98 : /* fall through */
360 case 99 : /* fall through */
361 case 100 : /* fall through */
362 case 101 : /* fall through */
363 case 102 : /* fall through */
364 case 103 : /* fall through */
365 case 104 : /* fall through */
366 case 105 : /* fall through */
367 case 106 : /* fall through */
368 case 107 : /* fall through */
369 case 108 : /* fall through */
370 case 109 : /* fall through */
371 case 110 : /* fall through */
372 case 111 : itype
= M32RBF_INSN_LDI8
; goto extract_fmt_ldi8
;
375 unsigned int val
= (((insn
>> 8) & (15 << 0)));
378 case 0 : itype
= M32RBF_INSN_NOP
; goto extract_fmt_nop
;
379 case 12 : itype
= M32RBF_INSN_BC8
; goto extract_fmt_bc8
;
380 case 13 : itype
= M32RBF_INSN_BNC8
; goto extract_fmt_bc8
;
381 case 14 : itype
= M32RBF_INSN_BL8
; goto extract_fmt_bl8
;
382 case 15 : itype
= M32RBF_INSN_BRA8
; goto extract_fmt_bra8
;
383 default : itype
= M32RBF_INSN_X_INVALID
; goto extract_fmt_empty
;
386 case 113 : /* fall through */
387 case 114 : /* fall through */
388 case 115 : /* fall through */
389 case 116 : /* fall through */
390 case 117 : /* fall through */
391 case 118 : /* fall through */
392 case 119 : /* fall through */
393 case 120 : /* fall through */
394 case 121 : /* fall through */
395 case 122 : /* fall through */
396 case 123 : /* fall through */
397 case 124 : /* fall through */
398 case 125 : /* fall through */
399 case 126 : /* fall through */
402 unsigned int val
= (((insn
>> 8) & (15 << 0)));
405 case 12 : itype
= M32RBF_INSN_BC8
; goto extract_fmt_bc8
;
406 case 13 : itype
= M32RBF_INSN_BNC8
; goto extract_fmt_bc8
;
407 case 14 : itype
= M32RBF_INSN_BL8
; goto extract_fmt_bl8
;
408 case 15 : itype
= M32RBF_INSN_BRA8
; goto extract_fmt_bra8
;
409 default : itype
= M32RBF_INSN_X_INVALID
; goto extract_fmt_empty
;
412 case 132 : itype
= M32RBF_INSN_CMPI
; goto extract_fmt_cmpi
;
413 case 133 : itype
= M32RBF_INSN_CMPUI
; goto extract_fmt_cmpi
;
414 case 136 : itype
= M32RBF_INSN_ADDV3
; goto extract_fmt_addv3
;
415 case 138 : itype
= M32RBF_INSN_ADD3
; goto extract_fmt_add3
;
416 case 140 : itype
= M32RBF_INSN_AND3
; goto extract_fmt_and3
;
417 case 141 : itype
= M32RBF_INSN_XOR3
; goto extract_fmt_and3
;
418 case 142 : itype
= M32RBF_INSN_OR3
; goto extract_fmt_or3
;
419 case 144 : itype
= M32RBF_INSN_DIV
; goto extract_fmt_div
;
420 case 145 : itype
= M32RBF_INSN_DIVU
; goto extract_fmt_div
;
421 case 146 : itype
= M32RBF_INSN_REM
; goto extract_fmt_div
;
422 case 147 : itype
= M32RBF_INSN_REMU
; goto extract_fmt_div
;
423 case 152 : itype
= M32RBF_INSN_SRL3
; goto extract_fmt_sll3
;
424 case 154 : itype
= M32RBF_INSN_SRA3
; goto extract_fmt_sll3
;
425 case 156 : itype
= M32RBF_INSN_SLL3
; goto extract_fmt_sll3
;
426 case 159 : itype
= M32RBF_INSN_LDI16
; goto extract_fmt_ldi16
;
427 case 160 : itype
= M32RBF_INSN_STB_D
; goto extract_fmt_stb_d
;
428 case 162 : itype
= M32RBF_INSN_STH_D
; goto extract_fmt_sth_d
;
429 case 164 : itype
= M32RBF_INSN_ST_D
; goto extract_fmt_st_d
;
430 case 168 : itype
= M32RBF_INSN_LDB_D
; goto extract_fmt_ldb_d
;
431 case 169 : itype
= M32RBF_INSN_LDUB_D
; goto extract_fmt_ldb_d
;
432 case 170 : itype
= M32RBF_INSN_LDH_D
; goto extract_fmt_ldh_d
;
433 case 171 : itype
= M32RBF_INSN_LDUH_D
; goto extract_fmt_ldh_d
;
434 case 172 : itype
= M32RBF_INSN_LD_D
; goto extract_fmt_ld_d
;
435 case 176 : itype
= M32RBF_INSN_BEQ
; goto extract_fmt_beq
;
436 case 177 : itype
= M32RBF_INSN_BNE
; goto extract_fmt_beq
;
437 case 184 : itype
= M32RBF_INSN_BEQZ
; goto extract_fmt_beqz
;
438 case 185 : itype
= M32RBF_INSN_BNEZ
; goto extract_fmt_beqz
;
439 case 186 : itype
= M32RBF_INSN_BLTZ
; goto extract_fmt_beqz
;
440 case 187 : itype
= M32RBF_INSN_BGEZ
; goto extract_fmt_beqz
;
441 case 188 : itype
= M32RBF_INSN_BLEZ
; goto extract_fmt_beqz
;
442 case 189 : itype
= M32RBF_INSN_BGTZ
; goto extract_fmt_beqz
;
443 case 220 : itype
= M32RBF_INSN_SETH
; goto extract_fmt_seth
;
444 case 224 : /* fall through */
445 case 225 : /* fall through */
446 case 226 : /* fall through */
447 case 227 : /* fall through */
448 case 228 : /* fall through */
449 case 229 : /* fall through */
450 case 230 : /* fall through */
451 case 231 : /* fall through */
452 case 232 : /* fall through */
453 case 233 : /* fall through */
454 case 234 : /* fall through */
455 case 235 : /* fall through */
456 case 236 : /* fall through */
457 case 237 : /* fall through */
458 case 238 : /* fall through */
459 case 239 : itype
= M32RBF_INSN_LD24
; goto extract_fmt_ld24
;
460 case 240 : /* fall through */
461 case 241 : /* fall through */
462 case 242 : /* fall through */
463 case 243 : /* fall through */
464 case 244 : /* fall through */
465 case 245 : /* fall through */
466 case 246 : /* fall through */
467 case 247 : /* fall through */
468 case 248 : /* fall through */
469 case 249 : /* fall through */
470 case 250 : /* fall through */
471 case 251 : /* fall through */
472 case 252 : /* fall through */
473 case 253 : /* fall through */
474 case 254 : /* fall through */
477 unsigned int val
= (((insn
>> 8) & (15 << 0)));
480 case 12 : itype
= M32RBF_INSN_BC24
; goto extract_fmt_bc24
;
481 case 13 : itype
= M32RBF_INSN_BNC24
; goto extract_fmt_bc24
;
482 case 14 : itype
= M32RBF_INSN_BL24
; goto extract_fmt_bl24
;
483 case 15 : itype
= M32RBF_INSN_BRA24
; goto extract_fmt_bra24
;
484 default : itype
= M32RBF_INSN_X_INVALID
; goto extract_fmt_empty
;
487 default : itype
= M32RBF_INSN_X_INVALID
; goto extract_fmt_empty
;
492 /* The instruction has been decoded, now extract the fields. */
496 const IDESC
*idesc
= &m32rbf_insn_data
[itype
];
497 CGEN_INSN_INT insn
= entire_insn
;
498 #define FLD(f) abuf->fields.fmt_empty.f
499 EXTRACT_IFMT_EMPTY_VARS
/* */
501 EXTRACT_IFMT_EMPTY_CODE
503 /* Record the fields for the semantic handler. */
504 TRACE_EXTRACT (current_cpu
, abuf
, (current_cpu
, pc
, "fmt_empty", (char *) 0));
512 const IDESC
*idesc
= &m32rbf_insn_data
[itype
];
513 CGEN_INSN_INT insn
= entire_insn
;
514 #define FLD(f) abuf->fields.fmt_add.f
515 EXTRACT_IFMT_ADD_VARS
/* f-op1 f-r1 f-op2 f-r2 */
517 EXTRACT_IFMT_ADD_CODE
519 /* Record the fields for the semantic handler. */
520 FLD (i_dr
) = & CPU (h_gr
)[f_r1
];
521 FLD (i_sr
) = & CPU (h_gr
)[f_r2
];
522 TRACE_EXTRACT (current_cpu
, abuf
, (current_cpu
, pc
, "fmt_add", "dr 0x%x", 'x', f_r1
, "sr 0x%x", 'x', f_r2
, (char *) 0));
524 #if WITH_PROFILE_MODEL_P
525 /* Record the fields for profiling. */
526 if (PROFILE_MODEL_P (current_cpu
))
539 const IDESC
*idesc
= &m32rbf_insn_data
[itype
];
540 CGEN_INSN_INT insn
= entire_insn
;
541 #define FLD(f) abuf->fields.fmt_add3.f
542 EXTRACT_IFMT_ADD3_VARS
/* f-op1 f-r1 f-op2 f-r2 f-simm16 */
544 EXTRACT_IFMT_ADD3_CODE
546 /* Record the fields for the semantic handler. */
547 FLD (f_simm16
) = f_simm16
;
548 FLD (i_sr
) = & CPU (h_gr
)[f_r2
];
549 FLD (i_dr
) = & CPU (h_gr
)[f_r1
];
550 TRACE_EXTRACT (current_cpu
, abuf
, (current_cpu
, pc
, "fmt_add3", "f_simm16 0x%x", 'x', f_simm16
, "sr 0x%x", 'x', f_r2
, "dr 0x%x", 'x', f_r1
, (char *) 0));
552 #if WITH_PROFILE_MODEL_P
553 /* Record the fields for profiling. */
554 if (PROFILE_MODEL_P (current_cpu
))
566 const IDESC
*idesc
= &m32rbf_insn_data
[itype
];
567 CGEN_INSN_INT insn
= entire_insn
;
568 #define FLD(f) abuf->fields.fmt_and3.f
569 EXTRACT_IFMT_AND3_VARS
/* f-op1 f-r1 f-op2 f-r2 f-uimm16 */
571 EXTRACT_IFMT_AND3_CODE
573 /* Record the fields for the semantic handler. */
574 FLD (f_uimm16
) = f_uimm16
;
575 FLD (i_sr
) = & CPU (h_gr
)[f_r2
];
576 FLD (i_dr
) = & CPU (h_gr
)[f_r1
];
577 TRACE_EXTRACT (current_cpu
, abuf
, (current_cpu
, pc
, "fmt_and3", "f_uimm16 0x%x", 'x', f_uimm16
, "sr 0x%x", 'x', f_r2
, "dr 0x%x", 'x', f_r1
, (char *) 0));
579 #if WITH_PROFILE_MODEL_P
580 /* Record the fields for profiling. */
581 if (PROFILE_MODEL_P (current_cpu
))
593 const IDESC
*idesc
= &m32rbf_insn_data
[itype
];
594 CGEN_INSN_INT insn
= entire_insn
;
595 #define FLD(f) abuf->fields.fmt_or3.f
596 EXTRACT_IFMT_OR3_VARS
/* f-op1 f-r1 f-op2 f-r2 f-uimm16 */
598 EXTRACT_IFMT_OR3_CODE
600 /* Record the fields for the semantic handler. */
601 FLD (f_uimm16
) = f_uimm16
;
602 FLD (i_sr
) = & CPU (h_gr
)[f_r2
];
603 FLD (i_dr
) = & CPU (h_gr
)[f_r1
];
604 TRACE_EXTRACT (current_cpu
, abuf
, (current_cpu
, pc
, "fmt_or3", "f_uimm16 0x%x", 'x', f_uimm16
, "sr 0x%x", 'x', f_r2
, "dr 0x%x", 'x', f_r1
, (char *) 0));
606 #if WITH_PROFILE_MODEL_P
607 /* Record the fields for profiling. */
608 if (PROFILE_MODEL_P (current_cpu
))
620 const IDESC
*idesc
= &m32rbf_insn_data
[itype
];
621 CGEN_INSN_INT insn
= entire_insn
;
622 #define FLD(f) abuf->fields.fmt_addi.f
623 EXTRACT_IFMT_ADDI_VARS
/* f-op1 f-r1 f-simm8 */
625 EXTRACT_IFMT_ADDI_CODE
627 /* Record the fields for the semantic handler. */
628 FLD (f_simm8
) = f_simm8
;
629 FLD (i_dr
) = & CPU (h_gr
)[f_r1
];
630 TRACE_EXTRACT (current_cpu
, abuf
, (current_cpu
, pc
, "fmt_addi", "f_simm8 0x%x", 'x', f_simm8
, "dr 0x%x", 'x', f_r1
, (char *) 0));
632 #if WITH_PROFILE_MODEL_P
633 /* Record the fields for profiling. */
634 if (PROFILE_MODEL_P (current_cpu
))
646 const IDESC
*idesc
= &m32rbf_insn_data
[itype
];
647 CGEN_INSN_INT insn
= entire_insn
;
648 #define FLD(f) abuf->fields.fmt_addv.f
649 EXTRACT_IFMT_ADD_VARS
/* f-op1 f-r1 f-op2 f-r2 */
651 EXTRACT_IFMT_ADD_CODE
653 /* Record the fields for the semantic handler. */
654 FLD (i_dr
) = & CPU (h_gr
)[f_r1
];
655 FLD (i_sr
) = & CPU (h_gr
)[f_r2
];
656 TRACE_EXTRACT (current_cpu
, abuf
, (current_cpu
, pc
, "fmt_addv", "dr 0x%x", 'x', f_r1
, "sr 0x%x", 'x', f_r2
, (char *) 0));
658 #if WITH_PROFILE_MODEL_P
659 /* Record the fields for profiling. */
660 if (PROFILE_MODEL_P (current_cpu
))
673 const IDESC
*idesc
= &m32rbf_insn_data
[itype
];
674 CGEN_INSN_INT insn
= entire_insn
;
675 #define FLD(f) abuf->fields.fmt_addv3.f
676 EXTRACT_IFMT_ADDV3_VARS
/* f-op1 f-r1 f-op2 f-r2 f-simm16 */
678 EXTRACT_IFMT_ADDV3_CODE
680 /* Record the fields for the semantic handler. */
681 FLD (f_simm16
) = f_simm16
;
682 FLD (i_sr
) = & CPU (h_gr
)[f_r2
];
683 FLD (i_dr
) = & CPU (h_gr
)[f_r1
];
684 TRACE_EXTRACT (current_cpu
, abuf
, (current_cpu
, pc
, "fmt_addv3", "f_simm16 0x%x", 'x', f_simm16
, "sr 0x%x", 'x', f_r2
, "dr 0x%x", 'x', f_r1
, (char *) 0));
686 #if WITH_PROFILE_MODEL_P
687 /* Record the fields for profiling. */
688 if (PROFILE_MODEL_P (current_cpu
))
700 const IDESC
*idesc
= &m32rbf_insn_data
[itype
];
701 CGEN_INSN_INT insn
= entire_insn
;
702 #define FLD(f) abuf->fields.fmt_addx.f
703 EXTRACT_IFMT_ADD_VARS
/* f-op1 f-r1 f-op2 f-r2 */
705 EXTRACT_IFMT_ADD_CODE
707 /* Record the fields for the semantic handler. */
708 FLD (i_dr
) = & CPU (h_gr
)[f_r1
];
709 FLD (i_sr
) = & CPU (h_gr
)[f_r2
];
710 TRACE_EXTRACT (current_cpu
, abuf
, (current_cpu
, pc
, "fmt_addx", "dr 0x%x", 'x', f_r1
, "sr 0x%x", 'x', f_r2
, (char *) 0));
712 #if WITH_PROFILE_MODEL_P
713 /* Record the fields for profiling. */
714 if (PROFILE_MODEL_P (current_cpu
))
727 const IDESC
*idesc
= &m32rbf_insn_data
[itype
];
728 CGEN_INSN_INT insn
= entire_insn
;
729 #define FLD(f) abuf->fields.cti.fields.fmt_bc8.f
730 EXTRACT_IFMT_BC8_VARS
/* f-op1 f-r1 f-disp8 */
732 EXTRACT_IFMT_BC8_CODE
734 /* Record the fields for the semantic handler. */
735 FLD (i_disp8
) = f_disp8
;
736 SEM_BRANCH_INIT_EXTRACT (abuf
);
737 TRACE_EXTRACT (current_cpu
, abuf
, (current_cpu
, pc
, "fmt_bc8", "disp8 0x%x", 'x', f_disp8
, (char *) 0));
739 #if WITH_PROFILE_MODEL_P
740 /* Record the fields for profiling. */
741 if (PROFILE_MODEL_P (current_cpu
))
751 const IDESC
*idesc
= &m32rbf_insn_data
[itype
];
752 CGEN_INSN_INT insn
= entire_insn
;
753 #define FLD(f) abuf->fields.cti.fields.fmt_bc24.f
754 EXTRACT_IFMT_BC24_VARS
/* f-op1 f-r1 f-disp24 */
756 EXTRACT_IFMT_BC24_CODE
758 /* Record the fields for the semantic handler. */
759 FLD (i_disp24
) = f_disp24
;
760 SEM_BRANCH_INIT_EXTRACT (abuf
);
761 TRACE_EXTRACT (current_cpu
, abuf
, (current_cpu
, pc
, "fmt_bc24", "disp24 0x%x", 'x', f_disp24
, (char *) 0));
763 #if WITH_PROFILE_MODEL_P
764 /* Record the fields for profiling. */
765 if (PROFILE_MODEL_P (current_cpu
))
775 const IDESC
*idesc
= &m32rbf_insn_data
[itype
];
776 CGEN_INSN_INT insn
= entire_insn
;
777 #define FLD(f) abuf->fields.cti.fields.fmt_beq.f
778 EXTRACT_IFMT_BEQ_VARS
/* f-op1 f-r1 f-op2 f-r2 f-disp16 */
780 EXTRACT_IFMT_BEQ_CODE
782 /* Record the fields for the semantic handler. */
783 FLD (i_disp16
) = f_disp16
;
784 FLD (i_src1
) = & CPU (h_gr
)[f_r1
];
785 FLD (i_src2
) = & CPU (h_gr
)[f_r2
];
786 SEM_BRANCH_INIT_EXTRACT (abuf
);
787 TRACE_EXTRACT (current_cpu
, abuf
, (current_cpu
, pc
, "fmt_beq", "disp16 0x%x", 'x', f_disp16
, "src1 0x%x", 'x', f_r1
, "src2 0x%x", 'x', f_r2
, (char *) 0));
789 #if WITH_PROFILE_MODEL_P
790 /* Record the fields for profiling. */
791 if (PROFILE_MODEL_P (current_cpu
))
793 FLD (in_src1
) = f_r1
;
794 FLD (in_src2
) = f_r2
;
803 const IDESC
*idesc
= &m32rbf_insn_data
[itype
];
804 CGEN_INSN_INT insn
= entire_insn
;
805 #define FLD(f) abuf->fields.cti.fields.fmt_beqz.f
806 EXTRACT_IFMT_BEQZ_VARS
/* f-op1 f-r1 f-op2 f-r2 f-disp16 */
808 EXTRACT_IFMT_BEQZ_CODE
810 /* Record the fields for the semantic handler. */
811 FLD (i_disp16
) = f_disp16
;
812 FLD (i_src2
) = & CPU (h_gr
)[f_r2
];
813 SEM_BRANCH_INIT_EXTRACT (abuf
);
814 TRACE_EXTRACT (current_cpu
, abuf
, (current_cpu
, pc
, "fmt_beqz", "disp16 0x%x", 'x', f_disp16
, "src2 0x%x", 'x', f_r2
, (char *) 0));
816 #if WITH_PROFILE_MODEL_P
817 /* Record the fields for profiling. */
818 if (PROFILE_MODEL_P (current_cpu
))
820 FLD (in_src2
) = f_r2
;
829 const IDESC
*idesc
= &m32rbf_insn_data
[itype
];
830 CGEN_INSN_INT insn
= entire_insn
;
831 #define FLD(f) abuf->fields.cti.fields.fmt_bl8.f
832 EXTRACT_IFMT_BC8_VARS
/* f-op1 f-r1 f-disp8 */
834 EXTRACT_IFMT_BC8_CODE
836 /* Record the fields for the semantic handler. */
837 FLD (i_disp8
) = f_disp8
;
838 SEM_BRANCH_INIT_EXTRACT (abuf
);
839 TRACE_EXTRACT (current_cpu
, abuf
, (current_cpu
, pc
, "fmt_bl8", "disp8 0x%x", 'x', f_disp8
, (char *) 0));
841 #if WITH_PROFILE_MODEL_P
842 /* Record the fields for profiling. */
843 if (PROFILE_MODEL_P (current_cpu
))
845 FLD (out_h_gr_14
) = 14;
854 const IDESC
*idesc
= &m32rbf_insn_data
[itype
];
855 CGEN_INSN_INT insn
= entire_insn
;
856 #define FLD(f) abuf->fields.cti.fields.fmt_bl24.f
857 EXTRACT_IFMT_BC24_VARS
/* f-op1 f-r1 f-disp24 */
859 EXTRACT_IFMT_BC24_CODE
861 /* Record the fields for the semantic handler. */
862 FLD (i_disp24
) = f_disp24
;
863 SEM_BRANCH_INIT_EXTRACT (abuf
);
864 TRACE_EXTRACT (current_cpu
, abuf
, (current_cpu
, pc
, "fmt_bl24", "disp24 0x%x", 'x', f_disp24
, (char *) 0));
866 #if WITH_PROFILE_MODEL_P
867 /* Record the fields for profiling. */
868 if (PROFILE_MODEL_P (current_cpu
))
870 FLD (out_h_gr_14
) = 14;
879 const IDESC
*idesc
= &m32rbf_insn_data
[itype
];
880 CGEN_INSN_INT insn
= entire_insn
;
881 #define FLD(f) abuf->fields.cti.fields.fmt_bra8.f
882 EXTRACT_IFMT_BC8_VARS
/* f-op1 f-r1 f-disp8 */
884 EXTRACT_IFMT_BC8_CODE
886 /* Record the fields for the semantic handler. */
887 FLD (i_disp8
) = f_disp8
;
888 SEM_BRANCH_INIT_EXTRACT (abuf
);
889 TRACE_EXTRACT (current_cpu
, abuf
, (current_cpu
, pc
, "fmt_bra8", "disp8 0x%x", 'x', f_disp8
, (char *) 0));
891 #if WITH_PROFILE_MODEL_P
892 /* Record the fields for profiling. */
893 if (PROFILE_MODEL_P (current_cpu
))
903 const IDESC
*idesc
= &m32rbf_insn_data
[itype
];
904 CGEN_INSN_INT insn
= entire_insn
;
905 #define FLD(f) abuf->fields.cti.fields.fmt_bra24.f
906 EXTRACT_IFMT_BC24_VARS
/* f-op1 f-r1 f-disp24 */
908 EXTRACT_IFMT_BC24_CODE
910 /* Record the fields for the semantic handler. */
911 FLD (i_disp24
) = f_disp24
;
912 SEM_BRANCH_INIT_EXTRACT (abuf
);
913 TRACE_EXTRACT (current_cpu
, abuf
, (current_cpu
, pc
, "fmt_bra24", "disp24 0x%x", 'x', f_disp24
, (char *) 0));
915 #if WITH_PROFILE_MODEL_P
916 /* Record the fields for profiling. */
917 if (PROFILE_MODEL_P (current_cpu
))
927 const IDESC
*idesc
= &m32rbf_insn_data
[itype
];
928 CGEN_INSN_INT insn
= entire_insn
;
929 #define FLD(f) abuf->fields.fmt_cmp.f
930 EXTRACT_IFMT_CMP_VARS
/* f-op1 f-r1 f-op2 f-r2 */
932 EXTRACT_IFMT_CMP_CODE
934 /* Record the fields for the semantic handler. */
935 FLD (i_src1
) = & CPU (h_gr
)[f_r1
];
936 FLD (i_src2
) = & CPU (h_gr
)[f_r2
];
937 TRACE_EXTRACT (current_cpu
, abuf
, (current_cpu
, pc
, "fmt_cmp", "src1 0x%x", 'x', f_r1
, "src2 0x%x", 'x', f_r2
, (char *) 0));
939 #if WITH_PROFILE_MODEL_P
940 /* Record the fields for profiling. */
941 if (PROFILE_MODEL_P (current_cpu
))
943 FLD (in_src1
) = f_r1
;
944 FLD (in_src2
) = f_r2
;
953 const IDESC
*idesc
= &m32rbf_insn_data
[itype
];
954 CGEN_INSN_INT insn
= entire_insn
;
955 #define FLD(f) abuf->fields.fmt_cmpi.f
956 EXTRACT_IFMT_CMPI_VARS
/* f-op1 f-r1 f-op2 f-r2 f-simm16 */
958 EXTRACT_IFMT_CMPI_CODE
960 /* Record the fields for the semantic handler. */
961 FLD (f_simm16
) = f_simm16
;
962 FLD (i_src2
) = & CPU (h_gr
)[f_r2
];
963 TRACE_EXTRACT (current_cpu
, abuf
, (current_cpu
, pc
, "fmt_cmpi", "f_simm16 0x%x", 'x', f_simm16
, "src2 0x%x", 'x', f_r2
, (char *) 0));
965 #if WITH_PROFILE_MODEL_P
966 /* Record the fields for profiling. */
967 if (PROFILE_MODEL_P (current_cpu
))
969 FLD (in_src2
) = f_r2
;
978 const IDESC
*idesc
= &m32rbf_insn_data
[itype
];
979 CGEN_INSN_INT insn
= entire_insn
;
980 #define FLD(f) abuf->fields.fmt_div.f
981 EXTRACT_IFMT_DIV_VARS
/* f-op1 f-r1 f-op2 f-r2 f-simm16 */
983 EXTRACT_IFMT_DIV_CODE
985 /* Record the fields for the semantic handler. */
986 FLD (i_dr
) = & CPU (h_gr
)[f_r1
];
987 FLD (i_sr
) = & CPU (h_gr
)[f_r2
];
988 TRACE_EXTRACT (current_cpu
, abuf
, (current_cpu
, pc
, "fmt_div", "dr 0x%x", 'x', f_r1
, "sr 0x%x", 'x', f_r2
, (char *) 0));
990 #if WITH_PROFILE_MODEL_P
991 /* Record the fields for profiling. */
992 if (PROFILE_MODEL_P (current_cpu
))
1005 const IDESC
*idesc
= &m32rbf_insn_data
[itype
];
1006 CGEN_INSN_INT insn
= entire_insn
;
1007 #define FLD(f) abuf->fields.cti.fields.fmt_jl.f
1008 EXTRACT_IFMT_JL_VARS
/* f-op1 f-r1 f-op2 f-r2 */
1010 EXTRACT_IFMT_JL_CODE
1012 /* Record the fields for the semantic handler. */
1013 FLD (i_sr
) = & CPU (h_gr
)[f_r2
];
1014 SEM_BRANCH_INIT_EXTRACT (abuf
);
1015 TRACE_EXTRACT (current_cpu
, abuf
, (current_cpu
, pc
, "fmt_jl", "sr 0x%x", 'x', f_r2
, (char *) 0));
1017 #if WITH_PROFILE_MODEL_P
1018 /* Record the fields for profiling. */
1019 if (PROFILE_MODEL_P (current_cpu
))
1022 FLD (out_h_gr_14
) = 14;
1031 const IDESC
*idesc
= &m32rbf_insn_data
[itype
];
1032 CGEN_INSN_INT insn
= entire_insn
;
1033 #define FLD(f) abuf->fields.cti.fields.fmt_jmp.f
1034 EXTRACT_IFMT_JL_VARS
/* f-op1 f-r1 f-op2 f-r2 */
1036 EXTRACT_IFMT_JL_CODE
1038 /* Record the fields for the semantic handler. */
1039 FLD (i_sr
) = & CPU (h_gr
)[f_r2
];
1040 SEM_BRANCH_INIT_EXTRACT (abuf
);
1041 TRACE_EXTRACT (current_cpu
, abuf
, (current_cpu
, pc
, "fmt_jmp", "sr 0x%x", 'x', f_r2
, (char *) 0));
1043 #if WITH_PROFILE_MODEL_P
1044 /* Record the fields for profiling. */
1045 if (PROFILE_MODEL_P (current_cpu
))
1056 const IDESC
*idesc
= &m32rbf_insn_data
[itype
];
1057 CGEN_INSN_INT insn
= entire_insn
;
1058 #define FLD(f) abuf->fields.fmt_ld.f
1059 EXTRACT_IFMT_ADD_VARS
/* f-op1 f-r1 f-op2 f-r2 */
1061 EXTRACT_IFMT_ADD_CODE
1063 /* Record the fields for the semantic handler. */
1064 FLD (i_sr
) = & CPU (h_gr
)[f_r2
];
1065 FLD (i_dr
) = & CPU (h_gr
)[f_r1
];
1066 TRACE_EXTRACT (current_cpu
, abuf
, (current_cpu
, pc
, "fmt_ld", "sr 0x%x", 'x', f_r2
, "dr 0x%x", 'x', f_r1
, (char *) 0));
1068 #if WITH_PROFILE_MODEL_P
1069 /* Record the fields for profiling. */
1070 if (PROFILE_MODEL_P (current_cpu
))
1073 FLD (out_dr
) = f_r1
;
1082 const IDESC
*idesc
= &m32rbf_insn_data
[itype
];
1083 CGEN_INSN_INT insn
= entire_insn
;
1084 #define FLD(f) abuf->fields.fmt_ld_d.f
1085 EXTRACT_IFMT_ADD3_VARS
/* f-op1 f-r1 f-op2 f-r2 f-simm16 */
1087 EXTRACT_IFMT_ADD3_CODE
1089 /* Record the fields for the semantic handler. */
1090 FLD (f_simm16
) = f_simm16
;
1091 FLD (i_sr
) = & CPU (h_gr
)[f_r2
];
1092 FLD (i_dr
) = & CPU (h_gr
)[f_r1
];
1093 TRACE_EXTRACT (current_cpu
, abuf
, (current_cpu
, pc
, "fmt_ld_d", "f_simm16 0x%x", 'x', f_simm16
, "sr 0x%x", 'x', f_r2
, "dr 0x%x", 'x', f_r1
, (char *) 0));
1095 #if WITH_PROFILE_MODEL_P
1096 /* Record the fields for profiling. */
1097 if (PROFILE_MODEL_P (current_cpu
))
1100 FLD (out_dr
) = f_r1
;
1109 const IDESC
*idesc
= &m32rbf_insn_data
[itype
];
1110 CGEN_INSN_INT insn
= entire_insn
;
1111 #define FLD(f) abuf->fields.fmt_ldb.f
1112 EXTRACT_IFMT_ADD_VARS
/* f-op1 f-r1 f-op2 f-r2 */
1114 EXTRACT_IFMT_ADD_CODE
1116 /* Record the fields for the semantic handler. */
1117 FLD (i_sr
) = & CPU (h_gr
)[f_r2
];
1118 FLD (i_dr
) = & CPU (h_gr
)[f_r1
];
1119 TRACE_EXTRACT (current_cpu
, abuf
, (current_cpu
, pc
, "fmt_ldb", "sr 0x%x", 'x', f_r2
, "dr 0x%x", 'x', f_r1
, (char *) 0));
1121 #if WITH_PROFILE_MODEL_P
1122 /* Record the fields for profiling. */
1123 if (PROFILE_MODEL_P (current_cpu
))
1126 FLD (out_dr
) = f_r1
;
1135 const IDESC
*idesc
= &m32rbf_insn_data
[itype
];
1136 CGEN_INSN_INT insn
= entire_insn
;
1137 #define FLD(f) abuf->fields.fmt_ldb_d.f
1138 EXTRACT_IFMT_ADD3_VARS
/* f-op1 f-r1 f-op2 f-r2 f-simm16 */
1140 EXTRACT_IFMT_ADD3_CODE
1142 /* Record the fields for the semantic handler. */
1143 FLD (f_simm16
) = f_simm16
;
1144 FLD (i_sr
) = & CPU (h_gr
)[f_r2
];
1145 FLD (i_dr
) = & CPU (h_gr
)[f_r1
];
1146 TRACE_EXTRACT (current_cpu
, abuf
, (current_cpu
, pc
, "fmt_ldb_d", "f_simm16 0x%x", 'x', f_simm16
, "sr 0x%x", 'x', f_r2
, "dr 0x%x", 'x', f_r1
, (char *) 0));
1148 #if WITH_PROFILE_MODEL_P
1149 /* Record the fields for profiling. */
1150 if (PROFILE_MODEL_P (current_cpu
))
1153 FLD (out_dr
) = f_r1
;
1162 const IDESC
*idesc
= &m32rbf_insn_data
[itype
];
1163 CGEN_INSN_INT insn
= entire_insn
;
1164 #define FLD(f) abuf->fields.fmt_ldh.f
1165 EXTRACT_IFMT_ADD_VARS
/* f-op1 f-r1 f-op2 f-r2 */
1167 EXTRACT_IFMT_ADD_CODE
1169 /* Record the fields for the semantic handler. */
1170 FLD (i_sr
) = & CPU (h_gr
)[f_r2
];
1171 FLD (i_dr
) = & CPU (h_gr
)[f_r1
];
1172 TRACE_EXTRACT (current_cpu
, abuf
, (current_cpu
, pc
, "fmt_ldh", "sr 0x%x", 'x', f_r2
, "dr 0x%x", 'x', f_r1
, (char *) 0));
1174 #if WITH_PROFILE_MODEL_P
1175 /* Record the fields for profiling. */
1176 if (PROFILE_MODEL_P (current_cpu
))
1179 FLD (out_dr
) = f_r1
;
1188 const IDESC
*idesc
= &m32rbf_insn_data
[itype
];
1189 CGEN_INSN_INT insn
= entire_insn
;
1190 #define FLD(f) abuf->fields.fmt_ldh_d.f
1191 EXTRACT_IFMT_ADD3_VARS
/* f-op1 f-r1 f-op2 f-r2 f-simm16 */
1193 EXTRACT_IFMT_ADD3_CODE
1195 /* Record the fields for the semantic handler. */
1196 FLD (f_simm16
) = f_simm16
;
1197 FLD (i_sr
) = & CPU (h_gr
)[f_r2
];
1198 FLD (i_dr
) = & CPU (h_gr
)[f_r1
];
1199 TRACE_EXTRACT (current_cpu
, abuf
, (current_cpu
, pc
, "fmt_ldh_d", "f_simm16 0x%x", 'x', f_simm16
, "sr 0x%x", 'x', f_r2
, "dr 0x%x", 'x', f_r1
, (char *) 0));
1201 #if WITH_PROFILE_MODEL_P
1202 /* Record the fields for profiling. */
1203 if (PROFILE_MODEL_P (current_cpu
))
1206 FLD (out_dr
) = f_r1
;
1213 extract_fmt_ld_plus
:
1215 const IDESC
*idesc
= &m32rbf_insn_data
[itype
];
1216 CGEN_INSN_INT insn
= entire_insn
;
1217 #define FLD(f) abuf->fields.fmt_ld_plus.f
1218 EXTRACT_IFMT_ADD_VARS
/* f-op1 f-r1 f-op2 f-r2 */
1220 EXTRACT_IFMT_ADD_CODE
1222 /* Record the fields for the semantic handler. */
1223 FLD (i_sr
) = & CPU (h_gr
)[f_r2
];
1224 FLD (i_dr
) = & CPU (h_gr
)[f_r1
];
1225 TRACE_EXTRACT (current_cpu
, abuf
, (current_cpu
, pc
, "fmt_ld_plus", "sr 0x%x", 'x', f_r2
, "dr 0x%x", 'x', f_r1
, (char *) 0));
1227 #if WITH_PROFILE_MODEL_P
1228 /* Record the fields for profiling. */
1229 if (PROFILE_MODEL_P (current_cpu
))
1232 FLD (out_dr
) = f_r1
;
1233 FLD (out_sr
) = f_r2
;
1242 const IDESC
*idesc
= &m32rbf_insn_data
[itype
];
1243 CGEN_INSN_INT insn
= entire_insn
;
1244 #define FLD(f) abuf->fields.fmt_ld24.f
1245 EXTRACT_IFMT_LD24_VARS
/* f-op1 f-r1 f-uimm24 */
1247 EXTRACT_IFMT_LD24_CODE
1249 /* Record the fields for the semantic handler. */
1250 FLD (i_uimm24
) = f_uimm24
;
1251 FLD (i_dr
) = & CPU (h_gr
)[f_r1
];
1252 TRACE_EXTRACT (current_cpu
, abuf
, (current_cpu
, pc
, "fmt_ld24", "uimm24 0x%x", 'x', f_uimm24
, "dr 0x%x", 'x', f_r1
, (char *) 0));
1254 #if WITH_PROFILE_MODEL_P
1255 /* Record the fields for profiling. */
1256 if (PROFILE_MODEL_P (current_cpu
))
1258 FLD (out_dr
) = f_r1
;
1267 const IDESC
*idesc
= &m32rbf_insn_data
[itype
];
1268 CGEN_INSN_INT insn
= entire_insn
;
1269 #define FLD(f) abuf->fields.fmt_ldi8.f
1270 EXTRACT_IFMT_ADDI_VARS
/* f-op1 f-r1 f-simm8 */
1272 EXTRACT_IFMT_ADDI_CODE
1274 /* Record the fields for the semantic handler. */
1275 FLD (f_simm8
) = f_simm8
;
1276 FLD (i_dr
) = & CPU (h_gr
)[f_r1
];
1277 TRACE_EXTRACT (current_cpu
, abuf
, (current_cpu
, pc
, "fmt_ldi8", "f_simm8 0x%x", 'x', f_simm8
, "dr 0x%x", 'x', f_r1
, (char *) 0));
1279 #if WITH_PROFILE_MODEL_P
1280 /* Record the fields for profiling. */
1281 if (PROFILE_MODEL_P (current_cpu
))
1283 FLD (out_dr
) = f_r1
;
1292 const IDESC
*idesc
= &m32rbf_insn_data
[itype
];
1293 CGEN_INSN_INT insn
= entire_insn
;
1294 #define FLD(f) abuf->fields.fmt_ldi16.f
1295 EXTRACT_IFMT_LDI16_VARS
/* f-op1 f-r1 f-op2 f-r2 f-simm16 */
1297 EXTRACT_IFMT_LDI16_CODE
1299 /* Record the fields for the semantic handler. */
1300 FLD (f_simm16
) = f_simm16
;
1301 FLD (i_dr
) = & CPU (h_gr
)[f_r1
];
1302 TRACE_EXTRACT (current_cpu
, abuf
, (current_cpu
, pc
, "fmt_ldi16", "f_simm16 0x%x", 'x', f_simm16
, "dr 0x%x", 'x', f_r1
, (char *) 0));
1304 #if WITH_PROFILE_MODEL_P
1305 /* Record the fields for profiling. */
1306 if (PROFILE_MODEL_P (current_cpu
))
1308 FLD (out_dr
) = f_r1
;
1317 const IDESC
*idesc
= &m32rbf_insn_data
[itype
];
1318 CGEN_INSN_INT insn
= entire_insn
;
1319 #define FLD(f) abuf->fields.fmt_lock.f
1320 EXTRACT_IFMT_ADD_VARS
/* f-op1 f-r1 f-op2 f-r2 */
1322 EXTRACT_IFMT_ADD_CODE
1324 /* Record the fields for the semantic handler. */
1325 FLD (i_sr
) = & CPU (h_gr
)[f_r2
];
1326 FLD (i_dr
) = & CPU (h_gr
)[f_r1
];
1327 TRACE_EXTRACT (current_cpu
, abuf
, (current_cpu
, pc
, "fmt_lock", "sr 0x%x", 'x', f_r2
, "dr 0x%x", 'x', f_r1
, (char *) 0));
1329 #if WITH_PROFILE_MODEL_P
1330 /* Record the fields for profiling. */
1331 if (PROFILE_MODEL_P (current_cpu
))
1334 FLD (out_dr
) = f_r1
;
1343 const IDESC
*idesc
= &m32rbf_insn_data
[itype
];
1344 CGEN_INSN_INT insn
= entire_insn
;
1345 #define FLD(f) abuf->fields.fmt_machi.f
1346 EXTRACT_IFMT_CMP_VARS
/* f-op1 f-r1 f-op2 f-r2 */
1348 EXTRACT_IFMT_CMP_CODE
1350 /* Record the fields for the semantic handler. */
1351 FLD (i_src1
) = & CPU (h_gr
)[f_r1
];
1352 FLD (i_src2
) = & CPU (h_gr
)[f_r2
];
1353 TRACE_EXTRACT (current_cpu
, abuf
, (current_cpu
, pc
, "fmt_machi", "src1 0x%x", 'x', f_r1
, "src2 0x%x", 'x', f_r2
, (char *) 0));
1355 #if WITH_PROFILE_MODEL_P
1356 /* Record the fields for profiling. */
1357 if (PROFILE_MODEL_P (current_cpu
))
1359 FLD (in_src1
) = f_r1
;
1360 FLD (in_src2
) = f_r2
;
1369 const IDESC
*idesc
= &m32rbf_insn_data
[itype
];
1370 CGEN_INSN_INT insn
= entire_insn
;
1371 #define FLD(f) abuf->fields.fmt_mulhi.f
1372 EXTRACT_IFMT_CMP_VARS
/* f-op1 f-r1 f-op2 f-r2 */
1374 EXTRACT_IFMT_CMP_CODE
1376 /* Record the fields for the semantic handler. */
1377 FLD (i_src1
) = & CPU (h_gr
)[f_r1
];
1378 FLD (i_src2
) = & CPU (h_gr
)[f_r2
];
1379 TRACE_EXTRACT (current_cpu
, abuf
, (current_cpu
, pc
, "fmt_mulhi", "src1 0x%x", 'x', f_r1
, "src2 0x%x", 'x', f_r2
, (char *) 0));
1381 #if WITH_PROFILE_MODEL_P
1382 /* Record the fields for profiling. */
1383 if (PROFILE_MODEL_P (current_cpu
))
1385 FLD (in_src1
) = f_r1
;
1386 FLD (in_src2
) = f_r2
;
1395 const IDESC
*idesc
= &m32rbf_insn_data
[itype
];
1396 CGEN_INSN_INT insn
= entire_insn
;
1397 #define FLD(f) abuf->fields.fmt_mv.f
1398 EXTRACT_IFMT_ADD_VARS
/* f-op1 f-r1 f-op2 f-r2 */
1400 EXTRACT_IFMT_ADD_CODE
1402 /* Record the fields for the semantic handler. */
1403 FLD (i_sr
) = & CPU (h_gr
)[f_r2
];
1404 FLD (i_dr
) = & CPU (h_gr
)[f_r1
];
1405 TRACE_EXTRACT (current_cpu
, abuf
, (current_cpu
, pc
, "fmt_mv", "sr 0x%x", 'x', f_r2
, "dr 0x%x", 'x', f_r1
, (char *) 0));
1407 #if WITH_PROFILE_MODEL_P
1408 /* Record the fields for profiling. */
1409 if (PROFILE_MODEL_P (current_cpu
))
1412 FLD (out_dr
) = f_r1
;
1419 extract_fmt_mvfachi
:
1421 const IDESC
*idesc
= &m32rbf_insn_data
[itype
];
1422 CGEN_INSN_INT insn
= entire_insn
;
1423 #define FLD(f) abuf->fields.fmt_mvfachi.f
1424 EXTRACT_IFMT_MVFACHI_VARS
/* f-op1 f-r1 f-op2 f-r2 */
1426 EXTRACT_IFMT_MVFACHI_CODE
1428 /* Record the fields for the semantic handler. */
1429 FLD (i_dr
) = & CPU (h_gr
)[f_r1
];
1430 TRACE_EXTRACT (current_cpu
, abuf
, (current_cpu
, pc
, "fmt_mvfachi", "dr 0x%x", 'x', f_r1
, (char *) 0));
1432 #if WITH_PROFILE_MODEL_P
1433 /* Record the fields for profiling. */
1434 if (PROFILE_MODEL_P (current_cpu
))
1436 FLD (out_dr
) = f_r1
;
1445 const IDESC
*idesc
= &m32rbf_insn_data
[itype
];
1446 CGEN_INSN_INT insn
= entire_insn
;
1447 #define FLD(f) abuf->fields.fmt_mvfc.f
1448 EXTRACT_IFMT_MVFC_VARS
/* f-op1 f-r1 f-op2 f-r2 */
1450 EXTRACT_IFMT_MVFC_CODE
1452 /* Record the fields for the semantic handler. */
1454 FLD (i_dr
) = & CPU (h_gr
)[f_r1
];
1455 TRACE_EXTRACT (current_cpu
, abuf
, (current_cpu
, pc
, "fmt_mvfc", "f_r2 0x%x", 'x', f_r2
, "dr 0x%x", 'x', f_r1
, (char *) 0));
1457 #if WITH_PROFILE_MODEL_P
1458 /* Record the fields for profiling. */
1459 if (PROFILE_MODEL_P (current_cpu
))
1461 FLD (out_dr
) = f_r1
;
1468 extract_fmt_mvtachi
:
1470 const IDESC
*idesc
= &m32rbf_insn_data
[itype
];
1471 CGEN_INSN_INT insn
= entire_insn
;
1472 #define FLD(f) abuf->fields.fmt_mvtachi.f
1473 EXTRACT_IFMT_MVTACHI_VARS
/* f-op1 f-r1 f-op2 f-r2 */
1475 EXTRACT_IFMT_MVTACHI_CODE
1477 /* Record the fields for the semantic handler. */
1478 FLD (i_src1
) = & CPU (h_gr
)[f_r1
];
1479 TRACE_EXTRACT (current_cpu
, abuf
, (current_cpu
, pc
, "fmt_mvtachi", "src1 0x%x", 'x', f_r1
, (char *) 0));
1481 #if WITH_PROFILE_MODEL_P
1482 /* Record the fields for profiling. */
1483 if (PROFILE_MODEL_P (current_cpu
))
1485 FLD (in_src1
) = f_r1
;
1494 const IDESC
*idesc
= &m32rbf_insn_data
[itype
];
1495 CGEN_INSN_INT insn
= entire_insn
;
1496 #define FLD(f) abuf->fields.fmt_mvtc.f
1497 EXTRACT_IFMT_MVTC_VARS
/* f-op1 f-r1 f-op2 f-r2 */
1499 EXTRACT_IFMT_MVTC_CODE
1501 /* Record the fields for the semantic handler. */
1503 FLD (i_sr
) = & CPU (h_gr
)[f_r2
];
1504 TRACE_EXTRACT (current_cpu
, abuf
, (current_cpu
, pc
, "fmt_mvtc", "f_r1 0x%x", 'x', f_r1
, "sr 0x%x", 'x', f_r2
, (char *) 0));
1506 #if WITH_PROFILE_MODEL_P
1507 /* Record the fields for profiling. */
1508 if (PROFILE_MODEL_P (current_cpu
))
1519 const IDESC
*idesc
= &m32rbf_insn_data
[itype
];
1520 CGEN_INSN_INT insn
= entire_insn
;
1521 #define FLD(f) abuf->fields.fmt_nop.f
1522 EXTRACT_IFMT_NOP_VARS
/* f-op1 f-r1 f-op2 f-r2 */
1524 EXTRACT_IFMT_NOP_CODE
1526 /* Record the fields for the semantic handler. */
1527 TRACE_EXTRACT (current_cpu
, abuf
, (current_cpu
, pc
, "fmt_nop", (char *) 0));
1535 const IDESC
*idesc
= &m32rbf_insn_data
[itype
];
1536 CGEN_INSN_INT insn
= entire_insn
;
1537 #define FLD(f) abuf->fields.fmt_rac.f
1538 EXTRACT_IFMT_NOP_VARS
/* f-op1 f-r1 f-op2 f-r2 */
1540 EXTRACT_IFMT_NOP_CODE
1542 /* Record the fields for the semantic handler. */
1543 TRACE_EXTRACT (current_cpu
, abuf
, (current_cpu
, pc
, "fmt_rac", (char *) 0));
1551 const IDESC
*idesc
= &m32rbf_insn_data
[itype
];
1552 CGEN_INSN_INT insn
= entire_insn
;
1553 #define FLD(f) abuf->fields.cti.fields.fmt_rte.f
1554 EXTRACT_IFMT_NOP_VARS
/* f-op1 f-r1 f-op2 f-r2 */
1556 EXTRACT_IFMT_NOP_CODE
1558 /* Record the fields for the semantic handler. */
1559 SEM_BRANCH_INIT_EXTRACT (abuf
);
1560 TRACE_EXTRACT (current_cpu
, abuf
, (current_cpu
, pc
, "fmt_rte", (char *) 0));
1562 #if WITH_PROFILE_MODEL_P
1563 /* Record the fields for profiling. */
1564 if (PROFILE_MODEL_P (current_cpu
))
1574 const IDESC
*idesc
= &m32rbf_insn_data
[itype
];
1575 CGEN_INSN_INT insn
= entire_insn
;
1576 #define FLD(f) abuf->fields.fmt_seth.f
1577 EXTRACT_IFMT_SETH_VARS
/* f-op1 f-r1 f-op2 f-r2 f-hi16 */
1579 EXTRACT_IFMT_SETH_CODE
1581 /* Record the fields for the semantic handler. */
1582 FLD (f_hi16
) = f_hi16
;
1583 FLD (i_dr
) = & CPU (h_gr
)[f_r1
];
1584 TRACE_EXTRACT (current_cpu
, abuf
, (current_cpu
, pc
, "fmt_seth", "f_hi16 0x%x", 'x', f_hi16
, "dr 0x%x", 'x', f_r1
, (char *) 0));
1586 #if WITH_PROFILE_MODEL_P
1587 /* Record the fields for profiling. */
1588 if (PROFILE_MODEL_P (current_cpu
))
1590 FLD (out_dr
) = f_r1
;
1599 const IDESC
*idesc
= &m32rbf_insn_data
[itype
];
1600 CGEN_INSN_INT insn
= entire_insn
;
1601 #define FLD(f) abuf->fields.fmt_sll3.f
1602 EXTRACT_IFMT_ADDV3_VARS
/* f-op1 f-r1 f-op2 f-r2 f-simm16 */
1604 EXTRACT_IFMT_ADDV3_CODE
1606 /* Record the fields for the semantic handler. */
1607 FLD (f_simm16
) = f_simm16
;
1608 FLD (i_sr
) = & CPU (h_gr
)[f_r2
];
1609 FLD (i_dr
) = & CPU (h_gr
)[f_r1
];
1610 TRACE_EXTRACT (current_cpu
, abuf
, (current_cpu
, pc
, "fmt_sll3", "f_simm16 0x%x", 'x', f_simm16
, "sr 0x%x", 'x', f_r2
, "dr 0x%x", 'x', f_r1
, (char *) 0));
1612 #if WITH_PROFILE_MODEL_P
1613 /* Record the fields for profiling. */
1614 if (PROFILE_MODEL_P (current_cpu
))
1617 FLD (out_dr
) = f_r1
;
1626 const IDESC
*idesc
= &m32rbf_insn_data
[itype
];
1627 CGEN_INSN_INT insn
= entire_insn
;
1628 #define FLD(f) abuf->fields.fmt_slli.f
1629 EXTRACT_IFMT_SLLI_VARS
/* f-op1 f-r1 f-shift-op2 f-uimm5 */
1631 EXTRACT_IFMT_SLLI_CODE
1633 /* Record the fields for the semantic handler. */
1634 FLD (f_uimm5
) = f_uimm5
;
1635 FLD (i_dr
) = & CPU (h_gr
)[f_r1
];
1636 TRACE_EXTRACT (current_cpu
, abuf
, (current_cpu
, pc
, "fmt_slli", "f_uimm5 0x%x", 'x', f_uimm5
, "dr 0x%x", 'x', f_r1
, (char *) 0));
1638 #if WITH_PROFILE_MODEL_P
1639 /* Record the fields for profiling. */
1640 if (PROFILE_MODEL_P (current_cpu
))
1643 FLD (out_dr
) = f_r1
;
1652 const IDESC
*idesc
= &m32rbf_insn_data
[itype
];
1653 CGEN_INSN_INT insn
= entire_insn
;
1654 #define FLD(f) abuf->fields.fmt_st.f
1655 EXTRACT_IFMT_CMP_VARS
/* f-op1 f-r1 f-op2 f-r2 */
1657 EXTRACT_IFMT_CMP_CODE
1659 /* Record the fields for the semantic handler. */
1660 FLD (i_src1
) = & CPU (h_gr
)[f_r1
];
1661 FLD (i_src2
) = & CPU (h_gr
)[f_r2
];
1662 TRACE_EXTRACT (current_cpu
, abuf
, (current_cpu
, pc
, "fmt_st", "src1 0x%x", 'x', f_r1
, "src2 0x%x", 'x', f_r2
, (char *) 0));
1664 #if WITH_PROFILE_MODEL_P
1665 /* Record the fields for profiling. */
1666 if (PROFILE_MODEL_P (current_cpu
))
1668 FLD (in_src1
) = f_r1
;
1669 FLD (in_src2
) = f_r2
;
1678 const IDESC
*idesc
= &m32rbf_insn_data
[itype
];
1679 CGEN_INSN_INT insn
= entire_insn
;
1680 #define FLD(f) abuf->fields.fmt_st_d.f
1681 EXTRACT_IFMT_ST_D_VARS
/* f-op1 f-r1 f-op2 f-r2 f-simm16 */
1683 EXTRACT_IFMT_ST_D_CODE
1685 /* Record the fields for the semantic handler. */
1686 FLD (f_simm16
) = f_simm16
;
1687 FLD (i_src1
) = & CPU (h_gr
)[f_r1
];
1688 FLD (i_src2
) = & CPU (h_gr
)[f_r2
];
1689 TRACE_EXTRACT (current_cpu
, abuf
, (current_cpu
, pc
, "fmt_st_d", "f_simm16 0x%x", 'x', f_simm16
, "src1 0x%x", 'x', f_r1
, "src2 0x%x", 'x', f_r2
, (char *) 0));
1691 #if WITH_PROFILE_MODEL_P
1692 /* Record the fields for profiling. */
1693 if (PROFILE_MODEL_P (current_cpu
))
1695 FLD (in_src1
) = f_r1
;
1696 FLD (in_src2
) = f_r2
;
1705 const IDESC
*idesc
= &m32rbf_insn_data
[itype
];
1706 CGEN_INSN_INT insn
= entire_insn
;
1707 #define FLD(f) abuf->fields.fmt_stb.f
1708 EXTRACT_IFMT_CMP_VARS
/* f-op1 f-r1 f-op2 f-r2 */
1710 EXTRACT_IFMT_CMP_CODE
1712 /* Record the fields for the semantic handler. */
1713 FLD (i_src1
) = & CPU (h_gr
)[f_r1
];
1714 FLD (i_src2
) = & CPU (h_gr
)[f_r2
];
1715 TRACE_EXTRACT (current_cpu
, abuf
, (current_cpu
, pc
, "fmt_stb", "src1 0x%x", 'x', f_r1
, "src2 0x%x", 'x', f_r2
, (char *) 0));
1717 #if WITH_PROFILE_MODEL_P
1718 /* Record the fields for profiling. */
1719 if (PROFILE_MODEL_P (current_cpu
))
1721 FLD (in_src1
) = f_r1
;
1722 FLD (in_src2
) = f_r2
;
1731 const IDESC
*idesc
= &m32rbf_insn_data
[itype
];
1732 CGEN_INSN_INT insn
= entire_insn
;
1733 #define FLD(f) abuf->fields.fmt_stb_d.f
1734 EXTRACT_IFMT_ST_D_VARS
/* f-op1 f-r1 f-op2 f-r2 f-simm16 */
1736 EXTRACT_IFMT_ST_D_CODE
1738 /* Record the fields for the semantic handler. */
1739 FLD (f_simm16
) = f_simm16
;
1740 FLD (i_src1
) = & CPU (h_gr
)[f_r1
];
1741 FLD (i_src2
) = & CPU (h_gr
)[f_r2
];
1742 TRACE_EXTRACT (current_cpu
, abuf
, (current_cpu
, pc
, "fmt_stb_d", "f_simm16 0x%x", 'x', f_simm16
, "src1 0x%x", 'x', f_r1
, "src2 0x%x", 'x', f_r2
, (char *) 0));
1744 #if WITH_PROFILE_MODEL_P
1745 /* Record the fields for profiling. */
1746 if (PROFILE_MODEL_P (current_cpu
))
1748 FLD (in_src1
) = f_r1
;
1749 FLD (in_src2
) = f_r2
;
1758 const IDESC
*idesc
= &m32rbf_insn_data
[itype
];
1759 CGEN_INSN_INT insn
= entire_insn
;
1760 #define FLD(f) abuf->fields.fmt_sth.f
1761 EXTRACT_IFMT_CMP_VARS
/* f-op1 f-r1 f-op2 f-r2 */
1763 EXTRACT_IFMT_CMP_CODE
1765 /* Record the fields for the semantic handler. */
1766 FLD (i_src1
) = & CPU (h_gr
)[f_r1
];
1767 FLD (i_src2
) = & CPU (h_gr
)[f_r2
];
1768 TRACE_EXTRACT (current_cpu
, abuf
, (current_cpu
, pc
, "fmt_sth", "src1 0x%x", 'x', f_r1
, "src2 0x%x", 'x', f_r2
, (char *) 0));
1770 #if WITH_PROFILE_MODEL_P
1771 /* Record the fields for profiling. */
1772 if (PROFILE_MODEL_P (current_cpu
))
1774 FLD (in_src1
) = f_r1
;
1775 FLD (in_src2
) = f_r2
;
1784 const IDESC
*idesc
= &m32rbf_insn_data
[itype
];
1785 CGEN_INSN_INT insn
= entire_insn
;
1786 #define FLD(f) abuf->fields.fmt_sth_d.f
1787 EXTRACT_IFMT_ST_D_VARS
/* f-op1 f-r1 f-op2 f-r2 f-simm16 */
1789 EXTRACT_IFMT_ST_D_CODE
1791 /* Record the fields for the semantic handler. */
1792 FLD (f_simm16
) = f_simm16
;
1793 FLD (i_src1
) = & CPU (h_gr
)[f_r1
];
1794 FLD (i_src2
) = & CPU (h_gr
)[f_r2
];
1795 TRACE_EXTRACT (current_cpu
, abuf
, (current_cpu
, pc
, "fmt_sth_d", "f_simm16 0x%x", 'x', f_simm16
, "src1 0x%x", 'x', f_r1
, "src2 0x%x", 'x', f_r2
, (char *) 0));
1797 #if WITH_PROFILE_MODEL_P
1798 /* Record the fields for profiling. */
1799 if (PROFILE_MODEL_P (current_cpu
))
1801 FLD (in_src1
) = f_r1
;
1802 FLD (in_src2
) = f_r2
;
1809 extract_fmt_st_plus
:
1811 const IDESC
*idesc
= &m32rbf_insn_data
[itype
];
1812 CGEN_INSN_INT insn
= entire_insn
;
1813 #define FLD(f) abuf->fields.fmt_st_plus.f
1814 EXTRACT_IFMT_CMP_VARS
/* f-op1 f-r1 f-op2 f-r2 */
1816 EXTRACT_IFMT_CMP_CODE
1818 /* Record the fields for the semantic handler. */
1819 FLD (i_src1
) = & CPU (h_gr
)[f_r1
];
1820 FLD (i_src2
) = & CPU (h_gr
)[f_r2
];
1821 TRACE_EXTRACT (current_cpu
, abuf
, (current_cpu
, pc
, "fmt_st_plus", "src1 0x%x", 'x', f_r1
, "src2 0x%x", 'x', f_r2
, (char *) 0));
1823 #if WITH_PROFILE_MODEL_P
1824 /* Record the fields for profiling. */
1825 if (PROFILE_MODEL_P (current_cpu
))
1827 FLD (in_src1
) = f_r1
;
1828 FLD (in_src2
) = f_r2
;
1829 FLD (out_src2
) = f_r2
;
1838 const IDESC
*idesc
= &m32rbf_insn_data
[itype
];
1839 CGEN_INSN_INT insn
= entire_insn
;
1840 #define FLD(f) abuf->fields.cti.fields.fmt_trap.f
1841 EXTRACT_IFMT_TRAP_VARS
/* f-op1 f-r1 f-op2 f-uimm4 */
1843 EXTRACT_IFMT_TRAP_CODE
1845 /* Record the fields for the semantic handler. */
1846 FLD (f_uimm4
) = f_uimm4
;
1847 SEM_BRANCH_INIT_EXTRACT (abuf
);
1848 TRACE_EXTRACT (current_cpu
, abuf
, (current_cpu
, pc
, "fmt_trap", "f_uimm4 0x%x", 'x', f_uimm4
, (char *) 0));
1850 #if WITH_PROFILE_MODEL_P
1851 /* Record the fields for profiling. */
1852 if (PROFILE_MODEL_P (current_cpu
))
1862 const IDESC
*idesc
= &m32rbf_insn_data
[itype
];
1863 CGEN_INSN_INT insn
= entire_insn
;
1864 #define FLD(f) abuf->fields.fmt_unlock.f
1865 EXTRACT_IFMT_CMP_VARS
/* f-op1 f-r1 f-op2 f-r2 */
1867 EXTRACT_IFMT_CMP_CODE
1869 /* Record the fields for the semantic handler. */
1870 FLD (i_src1
) = & CPU (h_gr
)[f_r1
];
1871 FLD (i_src2
) = & CPU (h_gr
)[f_r2
];
1872 TRACE_EXTRACT (current_cpu
, abuf
, (current_cpu
, pc
, "fmt_unlock", "src1 0x%x", 'x', f_r1
, "src2 0x%x", 'x', f_r2
, (char *) 0));
1874 #if WITH_PROFILE_MODEL_P
1875 /* Record the fields for profiling. */
1876 if (PROFILE_MODEL_P (current_cpu
))
1878 FLD (in_src1
) = f_r1
;
1879 FLD (in_src2
) = f_r2
;
projects / thirdparty / binutils-gdb.git / blob