sim/m32r/decodex.c

   1 /* Simulator instruction decoder for m32r.
   2
   3 This file is machine generated with CGEN.
   4
   5 Copyright (C) 1996, 1997, 1998 Free Software Foundation, Inc.
   6
   7 This file is part of the GNU Simulators.
   8
   9 This program is free software; you can redistribute it and/or modify
  10 it under the terms of the GNU General Public License as published by
  11 the Free Software Foundation; either version 2, or (at your option)
  12 any later version.
  13
  14 This program is distributed in the hope that it will be useful,
  15 but WITHOUT ANY WARRANTY; without even the implied warranty of
  16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  17 GNU General Public License for more details.
  18
  19 You should have received a copy of the GNU General Public License along
  20 with this program; if not, write to the Free Software Foundation, Inc.,
  21 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
  22
  23 */
  24
  25 #define WANT_CPU
  26 #define WANT_CPU_M32RX
  27
  28 #include "sim-main.h"
  29 #include "sim-xcat.h"
  30 #include "cpu-sim.h"
  31 #include "cpu-opc.h"
  32
  33 /* FIXME: wip, may eventually only want one form so this would then go
  34    away.  However, in the mean time, having both keeps a stable version
  35    around while the cache version is being developed.
  36    It may still be useful to allow two versions to exist though.  */
  37 #if WITH_SCACHE
  38 #define EX(fn) XCONCAT3 (m32rx,_ex_,fn)
  39 #else
  40 #define EX(fn) 0
  41 #endif
  42
  43 #ifdef HAVE_PARALLEL_EXEC
  44 #ifdef __GNUC__
  45 #define READ(n) 0
  46 #else
  47 #define READ(n) XCONCAT3 (READ,_,n)
  48 #endif
  49 #endif
  50
  51 #if WITH_SEM_SWITCH_FULL
  52 #define FULL(fn) 0
  53 #else
  54 #define FULL(fn) XCONCAT3 (m32rx,_sem_,fn)
  55 #endif
  56
  57 #if WITH_SEM_SWITCH_FAST
  58 #define FAST(fn) 0
  59 #else
  60 #if WITH_SCACHE
  61 #define FAST(fn) XCONCAT3 (m32rx,_semc_,fn)
  62 #else
  63 #define FAST(fn) 0
  64 #endif
  65 #endif
  66
  67 /*#define DECODE M32RX_DECODE*/
  68
  69 /* The decode_illegal case is currently non-static and the generator doesn't
  70    prepend m32rx_, so simplify things by handling it here.  */
  71 #define decode_illegal m32rx_decode_illegal
  72
  73 #define ITAB(n) m32r_cgen_insn_table_entries[n]
  74
  75 static DECODE decode_add = { M32R_INSN_ADD, & ITAB (M32R_INSN_ADD), EX (fmt_0_add), READ (FMT_0_ADD), FULL (add), FAST (add) };
  76 static DECODE decode_add3 = { M32R_INSN_ADD3, & ITAB (M32R_INSN_ADD3), EX (fmt_1_add3), READ (FMT_1_ADD3), FULL (add3), FAST (add3) };
  77 static DECODE decode_and = { M32R_INSN_AND, & ITAB (M32R_INSN_AND), EX (fmt_0_add), READ (FMT_0_ADD), FULL (and), FAST (and) };
  78 static DECODE decode_and3 = { M32R_INSN_AND3, & ITAB (M32R_INSN_AND3), EX (fmt_2_and3), READ (FMT_2_AND3), FULL (and3), FAST (and3) };
  79 static DECODE decode_or = { M32R_INSN_OR, & ITAB (M32R_INSN_OR), EX (fmt_0_add), READ (FMT_0_ADD), FULL (or), FAST (or) };
  80 static DECODE decode_or3 = { M32R_INSN_OR3, & ITAB (M32R_INSN_OR3), EX (fmt_3_or3), READ (FMT_3_OR3), FULL (or3), FAST (or3) };
  81 static DECODE decode_xor = { M32R_INSN_XOR, & ITAB (M32R_INSN_XOR), EX (fmt_0_add), READ (FMT_0_ADD), FULL (xor), FAST (xor) };
  82 static DECODE decode_xor3 = { M32R_INSN_XOR3, & ITAB (M32R_INSN_XOR3), EX (fmt_2_and3), READ (FMT_2_AND3), FULL (xor3), FAST (xor3) };
  83 static DECODE decode_addi = { M32R_INSN_ADDI, & ITAB (M32R_INSN_ADDI), EX (fmt_4_addi), READ (FMT_4_ADDI), FULL (addi), FAST (addi) };
  84 static DECODE decode_addv = { M32R_INSN_ADDV, & ITAB (M32R_INSN_ADDV), EX (fmt_0_add), READ (FMT_0_ADD), FULL (addv), FAST (addv) };
  85 static DECODE decode_addv3 = { M32R_INSN_ADDV3, & ITAB (M32R_INSN_ADDV3), EX (fmt_5_addv3), READ (FMT_5_ADDV3), FULL (addv3), FAST (addv3) };
  86 static DECODE decode_addx = { M32R_INSN_ADDX, & ITAB (M32R_INSN_ADDX), EX (fmt_6_addx), READ (FMT_6_ADDX), FULL (addx), FAST (addx) };
  87 static DECODE decode_bc8 = { M32R_INSN_BC8, & ITAB (M32R_INSN_BC8), EX (fmt_7_bc8), READ (FMT_7_BC8), FULL (bc8), FAST (bc8) };
  88 static DECODE decode_bc24 = { M32R_INSN_BC24, & ITAB (M32R_INSN_BC24), EX (fmt_8_bc24), READ (FMT_8_BC24), FULL (bc24), FAST (bc24) };
  89 static DECODE decode_beq = { M32R_INSN_BEQ, & ITAB (M32R_INSN_BEQ), EX (fmt_9_beq), READ (FMT_9_BEQ), FULL (beq), FAST (beq) };
  90 static DECODE decode_beqz = { M32R_INSN_BEQZ, & ITAB (M32R_INSN_BEQZ), EX (fmt_10_beqz), READ (FMT_10_BEQZ), FULL (beqz), FAST (beqz) };
  91 static DECODE decode_bgez = { M32R_INSN_BGEZ, & ITAB (M32R_INSN_BGEZ), EX (fmt_10_beqz), READ (FMT_10_BEQZ), FULL (bgez), FAST (bgez) };
  92 static DECODE decode_bgtz = { M32R_INSN_BGTZ, & ITAB (M32R_INSN_BGTZ), EX (fmt_10_beqz), READ (FMT_10_BEQZ), FULL (bgtz), FAST (bgtz) };
  93 static DECODE decode_blez = { M32R_INSN_BLEZ, & ITAB (M32R_INSN_BLEZ), EX (fmt_10_beqz), READ (FMT_10_BEQZ), FULL (blez), FAST (blez) };
  94 static DECODE decode_bltz = { M32R_INSN_BLTZ, & ITAB (M32R_INSN_BLTZ), EX (fmt_10_beqz), READ (FMT_10_BEQZ), FULL (bltz), FAST (bltz) };
  95 static DECODE decode_bnez = { M32R_INSN_BNEZ, & ITAB (M32R_INSN_BNEZ), EX (fmt_10_beqz), READ (FMT_10_BEQZ), FULL (bnez), FAST (bnez) };
  96 static DECODE decode_bl8 = { M32R_INSN_BL8, & ITAB (M32R_INSN_BL8), EX (fmt_11_bl8), READ (FMT_11_BL8), FULL (bl8), FAST (bl8) };
  97 static DECODE decode_bl24 = { M32R_INSN_BL24, & ITAB (M32R_INSN_BL24), EX (fmt_12_bl24), READ (FMT_12_BL24), FULL (bl24), FAST (bl24) };
  98 static DECODE decode_bcl8 = { M32R_INSN_BCL8, & ITAB (M32R_INSN_BCL8), EX (fmt_13_bcl8), READ (FMT_13_BCL8), FULL (bcl8), FAST (bcl8) };
  99 static DECODE decode_bcl24 = { M32R_INSN_BCL24, & ITAB (M32R_INSN_BCL24), EX (fmt_14_bcl24), READ (FMT_14_BCL24), FULL (bcl24), FAST (bcl24) };
 100 static DECODE decode_bnc8 = { M32R_INSN_BNC8, & ITAB (M32R_INSN_BNC8), EX (fmt_7_bc8), READ (FMT_7_BC8), FULL (bnc8), FAST (bnc8) };
 101 static DECODE decode_bnc24 = { M32R_INSN_BNC24, & ITAB (M32R_INSN_BNC24), EX (fmt_8_bc24), READ (FMT_8_BC24), FULL (bnc24), FAST (bnc24) };
 102 static DECODE decode_bne = { M32R_INSN_BNE, & ITAB (M32R_INSN_BNE), EX (fmt_9_beq), READ (FMT_9_BEQ), FULL (bne), FAST (bne) };
 103 static DECODE decode_bra8 = { M32R_INSN_BRA8, & ITAB (M32R_INSN_BRA8), EX (fmt_15_bra8), READ (FMT_15_BRA8), FULL (bra8), FAST (bra8) };
 104 static DECODE decode_bra24 = { M32R_INSN_BRA24, & ITAB (M32R_INSN_BRA24), EX (fmt_16_bra24), READ (FMT_16_BRA24), FULL (bra24), FAST (bra24) };
 105 static DECODE decode_bncl8 = { M32R_INSN_BNCL8, & ITAB (M32R_INSN_BNCL8), EX (fmt_13_bcl8), READ (FMT_13_BCL8), FULL (bncl8), FAST (bncl8) };
 106 static DECODE decode_bncl24 = { M32R_INSN_BNCL24, & ITAB (M32R_INSN_BNCL24), EX (fmt_14_bcl24), READ (FMT_14_BCL24), FULL (bncl24), FAST (bncl24) };
 107 static DECODE decode_cmp = { M32R_INSN_CMP, & ITAB (M32R_INSN_CMP), EX (fmt_17_cmp), READ (FMT_17_CMP), FULL (cmp), FAST (cmp) };
 108 static DECODE decode_cmpi = { M32R_INSN_CMPI, & ITAB (M32R_INSN_CMPI), EX (fmt_18_cmpi), READ (FMT_18_CMPI), FULL (cmpi), FAST (cmpi) };
 109 static DECODE decode_cmpu = { M32R_INSN_CMPU, & ITAB (M32R_INSN_CMPU), EX (fmt_17_cmp), READ (FMT_17_CMP), FULL (cmpu), FAST (cmpu) };
 110 static DECODE decode_cmpui = { M32R_INSN_CMPUI, & ITAB (M32R_INSN_CMPUI), EX (fmt_19_cmpui), READ (FMT_19_CMPUI), FULL (cmpui), FAST (cmpui) };
 111 static DECODE decode_cmpeq = { M32R_INSN_CMPEQ, & ITAB (M32R_INSN_CMPEQ), EX (fmt_17_cmp), READ (FMT_17_CMP), FULL (cmpeq), FAST (cmpeq) };
 112 static DECODE decode_cmpz = { M32R_INSN_CMPZ, & ITAB (M32R_INSN_CMPZ), EX (fmt_20_cmpz), READ (FMT_20_CMPZ), FULL (cmpz), FAST (cmpz) };
 113 static DECODE decode_div = { M32R_INSN_DIV, & ITAB (M32R_INSN_DIV), EX (fmt_21_div), READ (FMT_21_DIV), FULL (div), FAST (div) };
 114 static DECODE decode_divu = { M32R_INSN_DIVU, & ITAB (M32R_INSN_DIVU), EX (fmt_21_div), READ (FMT_21_DIV), FULL (divu), FAST (divu) };
 115 static DECODE decode_rem = { M32R_INSN_REM, & ITAB (M32R_INSN_REM), EX (fmt_21_div), READ (FMT_21_DIV), FULL (rem), FAST (rem) };
 116 static DECODE decode_remu = { M32R_INSN_REMU, & ITAB (M32R_INSN_REMU), EX (fmt_21_div), READ (FMT_21_DIV), FULL (remu), FAST (remu) };
 117 static DECODE decode_divh = { M32R_INSN_DIVH, & ITAB (M32R_INSN_DIVH), EX (fmt_21_div), READ (FMT_21_DIV), FULL (divh), FAST (divh) };
 118 static DECODE decode_jc = { M32R_INSN_JC, & ITAB (M32R_INSN_JC), EX (fmt_22_jc), READ (FMT_22_JC), FULL (jc), FAST (jc) };
 119 static DECODE decode_jnc = { M32R_INSN_JNC, & ITAB (M32R_INSN_JNC), EX (fmt_22_jc), READ (FMT_22_JC), FULL (jnc), FAST (jnc) };
 120 static DECODE decode_jl = { M32R_INSN_JL, & ITAB (M32R_INSN_JL), EX (fmt_23_jl), READ (FMT_23_JL), FULL (jl), FAST (jl) };
 121 static DECODE decode_jmp = { M32R_INSN_JMP, & ITAB (M32R_INSN_JMP), EX (fmt_24_jmp), READ (FMT_24_JMP), FULL (jmp), FAST (jmp) };
 122 static DECODE decode_ld = { M32R_INSN_LD, & ITAB (M32R_INSN_LD), EX (fmt_25_ld), READ (FMT_25_LD), FULL (ld), FAST (ld) };
 123 static DECODE decode_ld_d = { M32R_INSN_LD_D, & ITAB (M32R_INSN_LD_D), EX (fmt_26_ld_d), READ (FMT_26_LD_D), FULL (ld_d), FAST (ld_d) };
 124 static DECODE decode_ldb = { M32R_INSN_LDB, & ITAB (M32R_INSN_LDB), EX (fmt_27_ldb), READ (FMT_27_LDB), FULL (ldb), FAST (ldb) };
 125 static DECODE decode_ldb_d = { M32R_INSN_LDB_D, & ITAB (M32R_INSN_LDB_D), EX (fmt_28_ldb_d), READ (FMT_28_LDB_D), FULL (ldb_d), FAST (ldb_d) };
 126 static DECODE decode_ldh = { M32R_INSN_LDH, & ITAB (M32R_INSN_LDH), EX (fmt_29_ldh), READ (FMT_29_LDH), FULL (ldh), FAST (ldh) };
 127 static DECODE decode_ldh_d = { M32R_INSN_LDH_D, & ITAB (M32R_INSN_LDH_D), EX (fmt_30_ldh_d), READ (FMT_30_LDH_D), FULL (ldh_d), FAST (ldh_d) };
 128 static DECODE decode_ldub = { M32R_INSN_LDUB, & ITAB (M32R_INSN_LDUB), EX (fmt_27_ldb), READ (FMT_27_LDB), FULL (ldub), FAST (ldub) };
 129 static DECODE decode_ldub_d = { M32R_INSN_LDUB_D, & ITAB (M32R_INSN_LDUB_D), EX (fmt_28_ldb_d), READ (FMT_28_LDB_D), FULL (ldub_d), FAST (ldub_d) };
 130 static DECODE decode_lduh = { M32R_INSN_LDUH, & ITAB (M32R_INSN_LDUH), EX (fmt_29_ldh), READ (FMT_29_LDH), FULL (lduh), FAST (lduh) };
 131 static DECODE decode_lduh_d = { M32R_INSN_LDUH_D, & ITAB (M32R_INSN_LDUH_D), EX (fmt_30_ldh_d), READ (FMT_30_LDH_D), FULL (lduh_d), FAST (lduh_d) };
 132 static DECODE decode_ld_plus = { M32R_INSN_LD_PLUS, & ITAB (M32R_INSN_LD_PLUS), EX (fmt_25_ld), READ (FMT_25_LD), FULL (ld_plus), FAST (ld_plus) };
 133 static DECODE decode_ld24 = { M32R_INSN_LD24, & ITAB (M32R_INSN_LD24), EX (fmt_31_ld24), READ (FMT_31_LD24), FULL (ld24), FAST (ld24) };
 134 static DECODE decode_ldi8 = { M32R_INSN_LDI8, & ITAB (M32R_INSN_LDI8), EX (fmt_32_ldi8), READ (FMT_32_LDI8), FULL (ldi8), FAST (ldi8) };
 135 static DECODE decode_ldi16 = { M32R_INSN_LDI16, & ITAB (M32R_INSN_LDI16), EX (fmt_33_ldi16), READ (FMT_33_LDI16), FULL (ldi16), FAST (ldi16) };
 136 static DECODE decode_lock = { M32R_INSN_LOCK, & ITAB (M32R_INSN_LOCK), EX (fmt_0_add), READ (FMT_0_ADD), FULL (lock), FAST (lock) };
 137 static DECODE decode_machi_a = { M32R_INSN_MACHI_A, & ITAB (M32R_INSN_MACHI_A), EX (fmt_34_machi_a), READ (FMT_34_MACHI_A), FULL (machi_a), FAST (machi_a) };
 138 static DECODE decode_maclo_a = { M32R_INSN_MACLO_A, & ITAB (M32R_INSN_MACLO_A), EX (fmt_34_machi_a), READ (FMT_34_MACHI_A), FULL (maclo_a), FAST (maclo_a) };
 139 static DECODE decode_mul = { M32R_INSN_MUL, & ITAB (M32R_INSN_MUL), EX (fmt_0_add), READ (FMT_0_ADD), FULL (mul), FAST (mul) };
 140 static DECODE decode_mulhi_a = { M32R_INSN_MULHI_A, & ITAB (M32R_INSN_MULHI_A), EX (fmt_35_mulhi_a), READ (FMT_35_MULHI_A), FULL (mulhi_a), FAST (mulhi_a) };
 141 static DECODE decode_mullo_a = { M32R_INSN_MULLO_A, & ITAB (M32R_INSN_MULLO_A), EX (fmt_35_mulhi_a), READ (FMT_35_MULHI_A), FULL (mullo_a), FAST (mullo_a) };
 142 static DECODE decode_mv = { M32R_INSN_MV, & ITAB (M32R_INSN_MV), EX (fmt_36_mv), READ (FMT_36_MV), FULL (mv), FAST (mv) };
 143 static DECODE decode_mvfachi_a = { M32R_INSN_MVFACHI_A, & ITAB (M32R_INSN_MVFACHI_A), EX (fmt_37_mvfachi_a), READ (FMT_37_MVFACHI_A), FULL (mvfachi_a), FAST (mvfachi_a) };
 144 static DECODE decode_mvfaclo_a = { M32R_INSN_MVFACLO_A, & ITAB (M32R_INSN_MVFACLO_A), EX (fmt_37_mvfachi_a), READ (FMT_37_MVFACHI_A), FULL (mvfaclo_a), FAST (mvfaclo_a) };
 145 static DECODE decode_mvfacmi_a = { M32R_INSN_MVFACMI_A, & ITAB (M32R_INSN_MVFACMI_A), EX (fmt_37_mvfachi_a), READ (FMT_37_MVFACHI_A), FULL (mvfacmi_a), FAST (mvfacmi_a) };
 146 static DECODE decode_mvfc = { M32R_INSN_MVFC, & ITAB (M32R_INSN_MVFC), EX (fmt_38_mvfc), READ (FMT_38_MVFC), FULL (mvfc), FAST (mvfc) };
 147 static DECODE decode_mvtachi_a = { M32R_INSN_MVTACHI_A, & ITAB (M32R_INSN_MVTACHI_A), EX (fmt_39_mvtachi_a), READ (FMT_39_MVTACHI_A), FULL (mvtachi_a), FAST (mvtachi_a) };
 148 static DECODE decode_mvtaclo_a = { M32R_INSN_MVTACLO_A, & ITAB (M32R_INSN_MVTACLO_A), EX (fmt_39_mvtachi_a), READ (FMT_39_MVTACHI_A), FULL (mvtaclo_a), FAST (mvtaclo_a) };
 149 static DECODE decode_mvtc = { M32R_INSN_MVTC, & ITAB (M32R_INSN_MVTC), EX (fmt_40_mvtc), READ (FMT_40_MVTC), FULL (mvtc), FAST (mvtc) };
 150 static DECODE decode_neg = { M32R_INSN_NEG, & ITAB (M32R_INSN_NEG), EX (fmt_36_mv), READ (FMT_36_MV), FULL (neg), FAST (neg) };
 151 static DECODE decode_nop = { M32R_INSN_NOP, & ITAB (M32R_INSN_NOP), EX (fmt_41_nop), READ (FMT_41_NOP), FULL (nop), FAST (nop) };
 152 static DECODE decode_not = { M32R_INSN_NOT, & ITAB (M32R_INSN_NOT), EX (fmt_36_mv), READ (FMT_36_MV), FULL (not), FAST (not) };
 153 static DECODE decode_rac_d = { M32R_INSN_RAC_D, & ITAB (M32R_INSN_RAC_D), EX (fmt_42_rac_d), READ (FMT_42_RAC_D), FULL (rac_d), FAST (rac_d) };
 154 static DECODE decode_rac_ds = { M32R_INSN_RAC_DS, & ITAB (M32R_INSN_RAC_DS), EX (fmt_43_rac_ds), READ (FMT_43_RAC_DS), FULL (rac_ds), FAST (rac_ds) };
 155 static DECODE decode_rac_dsi = { M32R_INSN_RAC_DSI, & ITAB (M32R_INSN_RAC_DSI), EX (fmt_44_rac_dsi), READ (FMT_44_RAC_DSI), FULL (rac_dsi), FAST (rac_dsi) };
 156 static DECODE decode_rach_d = { M32R_INSN_RACH_D, & ITAB (M32R_INSN_RACH_D), EX (fmt_42_rac_d), READ (FMT_42_RAC_D), FULL (rach_d), FAST (rach_d) };
 157 static DECODE decode_rach_ds = { M32R_INSN_RACH_DS, & ITAB (M32R_INSN_RACH_DS), EX (fmt_43_rac_ds), READ (FMT_43_RAC_DS), FULL (rach_ds), FAST (rach_ds) };
 158 static DECODE decode_rach_dsi = { M32R_INSN_RACH_DSI, & ITAB (M32R_INSN_RACH_DSI), EX (fmt_44_rac_dsi), READ (FMT_44_RAC_DSI), FULL (rach_dsi), FAST (rach_dsi) };
 159 static DECODE decode_rte = { M32R_INSN_RTE, & ITAB (M32R_INSN_RTE), EX (fmt_45_rte), READ (FMT_45_RTE), FULL (rte), FAST (rte) };
 160 static DECODE decode_seth = { M32R_INSN_SETH, & ITAB (M32R_INSN_SETH), EX (fmt_46_seth), READ (FMT_46_SETH), FULL (seth), FAST (seth) };
 161 static DECODE decode_sll = { M32R_INSN_SLL, & ITAB (M32R_INSN_SLL), EX (fmt_0_add), READ (FMT_0_ADD), FULL (sll), FAST (sll) };
 162 static DECODE decode_sll3 = { M32R_INSN_SLL3, & ITAB (M32R_INSN_SLL3), EX (fmt_5_addv3), READ (FMT_5_ADDV3), FULL (sll3), FAST (sll3) };
 163 static DECODE decode_slli = { M32R_INSN_SLLI, & ITAB (M32R_INSN_SLLI), EX (fmt_47_slli), READ (FMT_47_SLLI), FULL (slli), FAST (slli) };
 164 static DECODE decode_sra = { M32R_INSN_SRA, & ITAB (M32R_INSN_SRA), EX (fmt_0_add), READ (FMT_0_ADD), FULL (sra), FAST (sra) };
 165 static DECODE decode_sra3 = { M32R_INSN_SRA3, & ITAB (M32R_INSN_SRA3), EX (fmt_5_addv3), READ (FMT_5_ADDV3), FULL (sra3), FAST (sra3) };
 166 static DECODE decode_srai = { M32R_INSN_SRAI, & ITAB (M32R_INSN_SRAI), EX (fmt_47_slli), READ (FMT_47_SLLI), FULL (srai), FAST (srai) };
 167 static DECODE decode_srl = { M32R_INSN_SRL, & ITAB (M32R_INSN_SRL), EX (fmt_0_add), READ (FMT_0_ADD), FULL (srl), FAST (srl) };
 168 static DECODE decode_srl3 = { M32R_INSN_SRL3, & ITAB (M32R_INSN_SRL3), EX (fmt_5_addv3), READ (FMT_5_ADDV3), FULL (srl3), FAST (srl3) };
 169 static DECODE decode_srli = { M32R_INSN_SRLI, & ITAB (M32R_INSN_SRLI), EX (fmt_47_slli), READ (FMT_47_SLLI), FULL (srli), FAST (srli) };
 170 static DECODE decode_st = { M32R_INSN_ST, & ITAB (M32R_INSN_ST), EX (fmt_17_cmp), READ (FMT_17_CMP), FULL (st), FAST (st) };
 171 static DECODE decode_st_d = { M32R_INSN_ST_D, & ITAB (M32R_INSN_ST_D), EX (fmt_48_st_d), READ (FMT_48_ST_D), FULL (st_d), FAST (st_d) };
 172 static DECODE decode_stb = { M32R_INSN_STB, & ITAB (M32R_INSN_STB), EX (fmt_17_cmp), READ (FMT_17_CMP), FULL (stb), FAST (stb) };
 173 static DECODE decode_stb_d = { M32R_INSN_STB_D, & ITAB (M32R_INSN_STB_D), EX (fmt_48_st_d), READ (FMT_48_ST_D), FULL (stb_d), FAST (stb_d) };
 174 static DECODE decode_sth = { M32R_INSN_STH, & ITAB (M32R_INSN_STH), EX (fmt_17_cmp), READ (FMT_17_CMP), FULL (sth), FAST (sth) };
 175 static DECODE decode_sth_d = { M32R_INSN_STH_D, & ITAB (M32R_INSN_STH_D), EX (fmt_48_st_d), READ (FMT_48_ST_D), FULL (sth_d), FAST (sth_d) };
 176 static DECODE decode_st_plus = { M32R_INSN_ST_PLUS, & ITAB (M32R_INSN_ST_PLUS), EX (fmt_17_cmp), READ (FMT_17_CMP), FULL (st_plus), FAST (st_plus) };
 177 static DECODE decode_st_minus = { M32R_INSN_ST_MINUS, & ITAB (M32R_INSN_ST_MINUS), EX (fmt_17_cmp), READ (FMT_17_CMP), FULL (st_minus), FAST (st_minus) };
 178 static DECODE decode_sub = { M32R_INSN_SUB, & ITAB (M32R_INSN_SUB), EX (fmt_0_add), READ (FMT_0_ADD), FULL (sub), FAST (sub) };
 179 static DECODE decode_subv = { M32R_INSN_SUBV, & ITAB (M32R_INSN_SUBV), EX (fmt_0_add), READ (FMT_0_ADD), FULL (subv), FAST (subv) };
 180 static DECODE decode_subx = { M32R_INSN_SUBX, & ITAB (M32R_INSN_SUBX), EX (fmt_6_addx), READ (FMT_6_ADDX), FULL (subx), FAST (subx) };
 181 static DECODE decode_trap = { M32R_INSN_TRAP, & ITAB (M32R_INSN_TRAP), EX (fmt_49_trap), READ (FMT_49_TRAP), FULL (trap), FAST (trap) };
 182 static DECODE decode_unlock = { M32R_INSN_UNLOCK, & ITAB (M32R_INSN_UNLOCK), EX (fmt_17_cmp), READ (FMT_17_CMP), FULL (unlock), FAST (unlock) };
 183 static DECODE decode_satb = { M32R_INSN_SATB, & ITAB (M32R_INSN_SATB), EX (fmt_50_satb), READ (FMT_50_SATB), FULL (satb), FAST (satb) };
 184 static DECODE decode_sath = { M32R_INSN_SATH, & ITAB (M32R_INSN_SATH), EX (fmt_50_satb), READ (FMT_50_SATB), FULL (sath), FAST (sath) };
 185 static DECODE decode_sat = { M32R_INSN_SAT, & ITAB (M32R_INSN_SAT), EX (fmt_51_sat), READ (FMT_51_SAT), FULL (sat), FAST (sat) };
 186 static DECODE decode_pcmpbz = { M32R_INSN_PCMPBZ, & ITAB (M32R_INSN_PCMPBZ), EX (fmt_20_cmpz), READ (FMT_20_CMPZ), FULL (pcmpbz), FAST (pcmpbz) };
 187 static DECODE decode_sadd = { M32R_INSN_SADD, & ITAB (M32R_INSN_SADD), EX (fmt_52_sadd), READ (FMT_52_SADD), FULL (sadd), FAST (sadd) };
 188 static DECODE decode_macwu1 = { M32R_INSN_MACWU1, & ITAB (M32R_INSN_MACWU1), EX (fmt_53_macwu1), READ (FMT_53_MACWU1), FULL (macwu1), FAST (macwu1) };
 189 static DECODE decode_msblo = { M32R_INSN_MSBLO, & ITAB (M32R_INSN_MSBLO), EX (fmt_54_msblo), READ (FMT_54_MSBLO), FULL (msblo), FAST (msblo) };
 190 static DECODE decode_mulwu1 = { M32R_INSN_MULWU1, & ITAB (M32R_INSN_MULWU1), EX (fmt_17_cmp), READ (FMT_17_CMP), FULL (mulwu1), FAST (mulwu1) };
 191 static DECODE decode_maclh1 = { M32R_INSN_MACLH1, & ITAB (M32R_INSN_MACLH1), EX (fmt_53_macwu1), READ (FMT_53_MACWU1), FULL (maclh1), FAST (maclh1) };
 192 static DECODE decode_sc = { M32R_INSN_SC, & ITAB (M32R_INSN_SC), EX (fmt_55_sc), READ (FMT_55_SC), FULL (sc), FAST (sc) };
 193 static DECODE decode_snc = { M32R_INSN_SNC, & ITAB (M32R_INSN_SNC), EX (fmt_55_sc), READ (FMT_55_SC), FULL (snc), FAST (snc) };
 194
 195 DECODE m32rx_decode_illegal = {
 196   M32R_INSN_ILLEGAL, & ITAB (M32R_INSN_ILLEGAL),
 197   EX (illegal), FULL (illegal), FAST (illegal)
 198 };
 199
 200 /* The order must match that of `labels' in sem-switch.c/read.c.  */
 201
 202 DECODE *m32rx_decode_vars[] = {
 203   & m32rx_decode_illegal,
 204   & decode_add,
 205   & decode_add3,
 206   & decode_and,
 207   & decode_and3,
 208   & decode_or,
 209   & decode_or3,
 210   & decode_xor,
 211   & decode_xor3,
 212   & decode_addi,
 213   & decode_addv,
 214   & decode_addv3,
 215   & decode_addx,
 216   & decode_bc8,
 217   & decode_bc24,
 218   & decode_beq,
 219   & decode_beqz,
 220   & decode_bgez,
 221   & decode_bgtz,
 222   & decode_blez,
 223   & decode_bltz,
 224   & decode_bnez,
 225   & decode_bl8,
 226   & decode_bl24,
 227   & decode_bcl8,
 228   & decode_bcl24,
 229   & decode_bnc8,
 230   & decode_bnc24,
 231   & decode_bne,
 232   & decode_bra8,
 233   & decode_bra24,
 234   & decode_bncl8,
 235   & decode_bncl24,
 236   & decode_cmp,
 237   & decode_cmpi,
 238   & decode_cmpu,
 239   & decode_cmpui,
 240   & decode_cmpeq,
 241   & decode_cmpz,
 242   & decode_div,
 243   & decode_divu,
 244   & decode_rem,
 245   & decode_remu,
 246   & decode_divh,
 247   & decode_jc,
 248   & decode_jnc,
 249   & decode_jl,
 250   & decode_jmp,
 251   & decode_ld,
 252   & decode_ld_d,
 253   & decode_ldb,
 254   & decode_ldb_d,
 255   & decode_ldh,
 256   & decode_ldh_d,
 257   & decode_ldub,
 258   & decode_ldub_d,
 259   & decode_lduh,
 260   & decode_lduh_d,
 261   & decode_ld_plus,
 262   & decode_ld24,
 263   & decode_ldi8,
 264   & decode_ldi16,
 265   & decode_lock,
 266   & decode_machi_a,
 267   & decode_maclo_a,
 268   & decode_mul,
 269   & decode_mulhi_a,
 270   & decode_mullo_a,
 271   & decode_mv,
 272   & decode_mvfachi_a,
 273   & decode_mvfaclo_a,
 274   & decode_mvfacmi_a,
 275   & decode_mvfc,
 276   & decode_mvtachi_a,
 277   & decode_mvtaclo_a,
 278   & decode_mvtc,
 279   & decode_neg,
 280   & decode_nop,
 281   & decode_not,
 282   & decode_rac_d,
 283   & decode_rac_ds,
 284   & decode_rac_dsi,
 285   & decode_rach_d,
 286   & decode_rach_ds,
 287   & decode_rach_dsi,
 288   & decode_rte,
 289   & decode_seth,
 290   & decode_sll,
 291   & decode_sll3,
 292   & decode_slli,
 293   & decode_sra,
 294   & decode_sra3,
 295   & decode_srai,
 296   & decode_srl,
 297   & decode_srl3,
 298   & decode_srli,
 299   & decode_st,
 300   & decode_st_d,
 301   & decode_stb,
 302   & decode_stb_d,
 303   & decode_sth,
 304   & decode_sth_d,
 305   & decode_st_plus,
 306   & decode_st_minus,
 307   & decode_sub,
 308   & decode_subv,
 309   & decode_subx,
 310   & decode_trap,
 311   & decode_unlock,
 312   & decode_satb,
 313   & decode_sath,
 314   & decode_sat,
 315   & decode_pcmpbz,
 316   & decode_sadd,
 317   & decode_macwu1,
 318   & decode_msblo,
 319   & decode_mulwu1,
 320   & decode_maclh1,
 321   & decode_sc,
 322   & decode_snc,
 323   0
 324 };
 325
 326 /* The decoder needs a slightly different computed goto switch control.  */
 327 #ifdef __GNUC__
 328 #define DECODE_SWITCH(N, X) goto *labels_##N[X];
 329 #else
 330 #define DECODE_SWITCH(N, X) switch (X)
 331 #endif
 332
 333 /* Given an instruction, return a pointer to its DECODE entry.  */
 334
 335 DECODE *
 336 m32rx_decode (current_cpu, pc, insn)
 337      SIM_CPU *current_cpu;
 338      PCADDR pc;
 339      insn_t insn;
 340 {
 341   {
 342 #ifdef __GNUC__
 343     static void *labels_0[256] = {
 344       && default_0, && default_0, && default_0, && default_0,
 345       && default_0, && default_0, && default_0, && case_0_7,
 346       && default_0, && default_0, && default_0, && default_0,
 347       && default_0, && default_0, && default_0, && default_0,
 348       && default_0, && default_0, && default_0, && default_0,
 349       && default_0, && default_0, && default_0, && default_0,
 350       && default_0, && default_0, && default_0, && default_0,
 351       && case_0_28, && default_0, && default_0, && default_0,
 352       && default_0, && default_0, && default_0, && default_0,
 353       && default_0, && default_0, && default_0, && default_0,
 354       && default_0, && default_0, && default_0, && default_0,
 355       && default_0, && default_0, && default_0, && default_0,
 356       && default_0, && default_0, && default_0, && default_0,
 357       && default_0, && default_0, && default_0, && default_0,
 358       && default_0, && default_0, && default_0, && default_0,
 359       && default_0, && default_0, && default_0, && default_0,
 360       && default_0, && default_0, && default_0, && default_0,
 361       && default_0, && default_0, && default_0, && default_0,
 362       && default_0, && default_0, && default_0, && default_0,
 363       && default_0, && default_0, && default_0, && default_0,
 364       && default_0, && default_0, && default_0, && default_0,
 365       && default_0, && default_0, && default_0, && case_0_87,
 366       && case_0_88, && case_0_89, && default_0, && default_0,
 367       && default_0, && default_0, && default_0, && case_0_95,
 368       && default_0, && default_0, && default_0, && default_0,
 369       && default_0, && default_0, && default_0, && default_0,
 370       && default_0, && default_0, && default_0, && default_0,
 371       && default_0, && default_0, && default_0, && default_0,
 372       && case_0_112, && case_0_113, && case_0_114, && case_0_115,
 373       && case_0_116, && case_0_117, && case_0_118, && case_0_119,
 374       && case_0_120, && case_0_121, && case_0_122, && case_0_123,
 375       && case_0_124, && case_0_125, && case_0_126, && case_0_127,
 376       && case_0_128, && default_0, && default_0, && default_0,
 377       && default_0, && default_0, && default_0, && default_0,
 378       && default_0, && default_0, && default_0, && default_0,
 379       && default_0, && default_0, && default_0, && default_0,
 380       && case_0_144, && default_0, && default_0, && default_0,
 381       && default_0, && default_0, && default_0, && default_0,
 382       && default_0, && default_0, && default_0, && default_0,
 383       && default_0, && default_0, && default_0, && default_0,
 384       && default_0, && default_0, && default_0, && default_0,
 385       && default_0, && default_0, && default_0, && default_0,
 386       && default_0, && default_0, && default_0, && default_0,
 387       && default_0, && default_0, && default_0, && default_0,
 388       && default_0, && default_0, && default_0, && default_0,
 389       && default_0, && default_0, && default_0, && default_0,
 390       && default_0, && default_0, && default_0, && default_0,
 391       && default_0, && default_0, && default_0, && default_0,
 392       && default_0, && default_0, && default_0, && default_0,
 393       && default_0, && default_0, && default_0, && default_0,
 394       && default_0, && default_0, && default_0, && default_0,
 395       && default_0, && default_0, && default_0, && default_0,
 396       && default_0, && default_0, && default_0, && default_0,
 397       && default_0, && default_0, && default_0, && default_0,
 398       && default_0, && default_0, && default_0, && default_0,
 399       && default_0, && default_0, && default_0, && default_0,
 400       && default_0, && default_0, && default_0, && default_0,
 401       && default_0, && default_0, && default_0, && default_0,
 402       && default_0, && default_0, && default_0, && default_0,
 403       && default_0, && default_0, && default_0, && default_0,
 404       && case_0_240, && case_0_241, && case_0_242, && case_0_243,
 405       && case_0_244, && case_0_245, && case_0_246, && case_0_247,
 406       && case_0_248, && case_0_249, && case_0_250, && case_0_251,
 407       && case_0_252, && case_0_253, && case_0_254, && case_0_255,
 408     };
 409 #endif
 410     static DECODE *insns[256] = {
 411       &decode_subv, &decode_subx, &decode_sub, &decode_neg,
 412       &decode_cmp, &decode_cmpu, &decode_cmpeq, 0,
 413       &decode_addv, &decode_addx, &decode_add, &decode_not,
 414       &decode_and, &decode_xor, &decode_or, &decode_illegal,
 415       &decode_srl, &decode_illegal, &decode_sra, &decode_illegal,
 416       &decode_sll, &decode_illegal, &decode_mul, &decode_illegal,
 417       &decode_mv, &decode_mvfc, &decode_mvtc, &decode_illegal,
 418       0, &decode_rte, &decode_illegal, &decode_trap,
 419       &decode_stb, &decode_illegal, &decode_sth, &decode_illegal,
 420       &decode_st, &decode_unlock, &decode_st_plus, &decode_st_minus,
 421       &decode_ldb, &decode_ldub, &decode_ldh, &decode_lduh,
 422       &decode_ld, &decode_lock, &decode_ld_plus, &decode_illegal,
 423       &decode_mulhi_a, &decode_mullo_a, &decode_illegal, &decode_illegal,
 424       &decode_machi_a, &decode_maclo_a, &decode_illegal, &decode_illegal,
 425       &decode_mulhi_a, &decode_mullo_a, &decode_illegal, &decode_illegal,
 426       &decode_machi_a, &decode_maclo_a, &decode_illegal, &decode_illegal,
 427       &decode_addi, &decode_addi, &decode_addi, &decode_addi,
 428       &decode_addi, &decode_addi, &decode_addi, &decode_addi,
 429       &decode_addi, &decode_addi, &decode_addi, &decode_addi,
 430       &decode_addi, &decode_addi, &decode_addi, &decode_addi,
 431       &decode_srli, &decode_srli, &decode_srai, &decode_srai,
 432       &decode_slli, &decode_slli, &decode_illegal, 0,
 433       0, 0, &decode_mulwu1, &decode_macwu1,
 434       &decode_maclh1, &decode_msblo, &decode_sadd, 0,
 435       &decode_ldi8, &decode_ldi8, &decode_ldi8, &decode_ldi8,
 436       &decode_ldi8, &decode_ldi8, &decode_ldi8, &decode_ldi8,
 437       &decode_ldi8, &decode_ldi8, &decode_ldi8, &decode_ldi8,
 438       &decode_ldi8, &decode_ldi8, &decode_ldi8, &decode_ldi8,
 439       0, 0, 0, 0,
 440       0, 0, 0, 0,
 441       0, 0, 0, 0,
 442       0, 0, 0, 0,
 443       0, &decode_illegal, &decode_illegal, &decode_illegal,
 444       &decode_cmpi, &decode_cmpui, &decode_illegal, &decode_illegal,
 445       &decode_addv3, &decode_illegal, &decode_add3, &decode_illegal,
 446       &decode_and3, &decode_xor3, &decode_or3, &decode_illegal,
 447       0, &decode_divu, &decode_rem, &decode_remu,
 448       &decode_illegal, &decode_illegal, &decode_illegal, &decode_illegal,
 449       &decode_srl3, &decode_illegal, &decode_sra3, &decode_illegal,
 450       &decode_sll3, &decode_illegal, &decode_illegal, &decode_ldi16,
 451       &decode_stb_d, &decode_illegal, &decode_sth_d, &decode_illegal,
 452       &decode_st_d, &decode_illegal, &decode_illegal, &decode_illegal,
 453       &decode_ldb_d, &decode_ldub_d, &decode_ldh_d, &decode_lduh_d,
 454       &decode_ld_d, &decode_illegal, &decode_illegal, &decode_illegal,
 455       &decode_beq, &decode_bne, &decode_illegal, &decode_illegal,
 456       &decode_illegal, &decode_illegal, &decode_illegal, &decode_illegal,
 457       &decode_beqz, &decode_bnez, &decode_bltz, &decode_bgez,
 458       &decode_blez, &decode_bgtz, &decode_illegal, &decode_illegal,
 459       &decode_illegal, &decode_illegal, &decode_illegal, &decode_illegal,
 460       &decode_illegal, &decode_illegal, &decode_illegal, &decode_illegal,
 461       &decode_illegal, &decode_illegal, &decode_illegal, &decode_illegal,
 462       &decode_illegal, &decode_illegal, &decode_illegal, &decode_illegal,
 463       &decode_illegal, &decode_illegal, &decode_illegal, &decode_illegal,
 464       &decode_illegal, &decode_illegal, &decode_illegal, &decode_illegal,
 465       &decode_illegal, &decode_illegal, &decode_illegal, &decode_illegal,
 466       &decode_seth, &decode_illegal, &decode_illegal, &decode_illegal,
 467       &decode_ld24, &decode_ld24, &decode_ld24, &decode_ld24,
 468       &decode_ld24, &decode_ld24, &decode_ld24, &decode_ld24,
 469       &decode_ld24, &decode_ld24, &decode_ld24, &decode_ld24,
 470       &decode_ld24, &decode_ld24, &decode_ld24, &decode_ld24,
 471       0, 0, 0, 0,
 472       0, 0, 0, 0,
 473       0, 0, 0, 0,
 474       0, 0, 0, 0,
 475     };
 476     unsigned int val;
 477     val = (((insn >> 8) & (15 << 4)) | ((insn >> 4) & (15 << 0)));
 478     DECODE_SWITCH (0, val)
 479       {
 480       CASE (0, 7) :
 481         {
 482           static DECODE *insns[16] = {
 483             &decode_cmpz, &decode_illegal, &decode_illegal, &decode_pcmpbz,
 484             &decode_illegal, &decode_illegal, &decode_illegal, &decode_illegal,
 485             &decode_illegal, &decode_illegal, &decode_illegal, &decode_illegal,
 486             &decode_illegal, &decode_illegal, &decode_illegal, &decode_illegal,
 487           };
 488           unsigned int val = (((insn >> 8) & (15 << 0)));
 489           return insns[val];
 490         }
 491       CASE (0, 28) :
 492         {
 493           static DECODE *insns[16] = {
 494             &decode_illegal, &decode_illegal, &decode_illegal, &decode_illegal,
 495             &decode_illegal, &decode_illegal, &decode_illegal, &decode_illegal,
 496             &decode_illegal, &decode_illegal, &decode_illegal, &decode_illegal,
 497             &decode_jc, &decode_jnc, &decode_jl, &decode_jmp,
 498           };
 499           unsigned int val = (((insn >> 8) & (15 << 0)));
 500           return insns[val];
 501         }
 502       CASE (0, 87) :
 503         {
 504           static DECODE *insns[4] = {
 505             &decode_mvtachi_a, &decode_mvtaclo_a, &decode_illegal, &decode_illegal,
 506           };
 507           unsigned int val = (((insn >> 0) & (3 << 0)));
 508           return insns[val];
 509         }
 510       CASE (0, 88) :
 511         {
 512 #ifdef __GNUC__
 513           static void *labels_0_88[16] = {
 514             && case_0_88_0, && case_0_88_1, && case_0_88_2, && case_0_88_3,
 515             && default_0_88, && default_0_88, && default_0_88, && default_0_88,
 516             && default_0_88, && default_0_88, && default_0_88, && default_0_88,
 517             && default_0_88, && default_0_88, && default_0_88, && default_0_88,
 518           };
 519 #endif
 520           static DECODE *insns[16] = {
 521             0, 0, 0, 0,
 522             &decode_illegal, &decode_illegal, &decode_illegal, &decode_illegal,
 523             &decode_illegal, &decode_illegal, &decode_illegal, &decode_illegal,
 524             &decode_illegal, &decode_illegal, &decode_illegal, &decode_illegal,
 525           };
 526           unsigned int val;
 527           val = (((insn >> 6) & (3 << 2)) | ((insn >> 2) & (3 << 0)));
 528           DECODE_SWITCH (0_88, val)
 529             {
 530             CASE (0_88, 0) :
 531               {
 532                 static DECODE *insns[4] = {
 533                   &decode_rach_d, &decode_rach_dsi, &decode_illegal, &decode_illegal,
 534                 };
 535                 unsigned int val = (((insn >> 0) & (3 << 0)));
 536                 return insns[val];
 537               }
 538             CASE (0_88, 1) : /* fall through */
 539             CASE (0_88, 2) : /* fall through */
 540             CASE (0_88, 3) :
 541               {
 542                 static DECODE *insns[4] = {
 543                   &decode_rach_ds, &decode_rach_dsi, &decode_illegal, &decode_illegal,
 544                 };
 545                 unsigned int val = (((insn >> 0) & (3 << 0)));
 546                 return insns[val];
 547               }
 548             DEFAULT (0_88) : return insns[val];
 549             }
 550           ENDSWITCH (0_88)
 551         }
 552       CASE (0, 89) :
 553         {
 554 #ifdef __GNUC__
 555           static void *labels_0_89[16] = {
 556             && case_0_89_0, && case_0_89_1, && case_0_89_2, && case_0_89_3,
 557             && default_0_89, && default_0_89, && default_0_89, && default_0_89,
 558             && default_0_89, && default_0_89, && default_0_89, && default_0_89,
 559             && default_0_89, && default_0_89, && default_0_89, && default_0_89,
 560           };
 561 #endif
 562           static DECODE *insns[16] = {
 563             0, 0, 0, 0,
 564             &decode_illegal, &decode_illegal, &decode_illegal, &decode_illegal,
 565             &decode_illegal, &decode_illegal, &decode_illegal, &decode_illegal,
 566             &decode_illegal, &decode_illegal, &decode_illegal, &decode_illegal,
 567           };
 568           unsigned int val;
 569           val = (((insn >> 6) & (3 << 2)) | ((insn >> 2) & (3 << 0)));
 570           DECODE_SWITCH (0_89, val)
 571             {
 572             CASE (0_89, 0) :
 573               {
 574                 static DECODE *insns[4] = {
 575                   &decode_rac_d, &decode_rac_dsi, &decode_illegal, &decode_illegal,
 576                 };
 577                 unsigned int val = (((insn >> 0) & (3 << 0)));
 578                 return insns[val];
 579               }
 580             CASE (0_89, 1) : /* fall through */
 581             CASE (0_89, 2) : /* fall through */
 582             CASE (0_89, 3) :
 583               {
 584                 static DECODE *insns[4] = {
 585                   &decode_rac_ds, &decode_rac_dsi, &decode_illegal, &decode_illegal,
 586                 };
 587                 unsigned int val = (((insn >> 0) & (3 << 0)));
 588                 return insns[val];
 589               }
 590             DEFAULT (0_89) : return insns[val];
 591             }
 592           ENDSWITCH (0_89)
 593         }
 594       CASE (0, 95) :
 595         {
 596           static DECODE *insns[4] = {
 597             &decode_mvfachi_a, &decode_mvfaclo_a, &decode_mvfacmi_a, &decode_illegal,
 598           };
 599           unsigned int val = (((insn >> 0) & (3 << 0)));
 600           return insns[val];
 601         }
 602       CASE (0, 112) :
 603         {
 604           static DECODE *insns[16] = {
 605             &decode_nop, &decode_illegal, &decode_illegal, &decode_illegal,
 606             &decode_sc, &decode_snc, &decode_illegal, &decode_illegal,
 607             &decode_bcl8, &decode_bncl8, &decode_illegal, &decode_illegal,
 608             &decode_bc8, &decode_bnc8, &decode_bl8, &decode_bra8,
 609           };
 610           unsigned int val = (((insn >> 8) & (15 << 0)));
 611           return insns[val];
 612         }
 613       CASE (0, 113) : /* fall through */
 614       CASE (0, 114) : /* fall through */
 615       CASE (0, 115) : /* fall through */
 616       CASE (0, 116) : /* fall through */
 617       CASE (0, 117) : /* fall through */
 618       CASE (0, 118) : /* fall through */
 619       CASE (0, 119) : /* fall through */
 620       CASE (0, 120) : /* fall through */
 621       CASE (0, 121) : /* fall through */
 622       CASE (0, 122) : /* fall through */
 623       CASE (0, 123) : /* fall through */
 624       CASE (0, 124) : /* fall through */
 625       CASE (0, 125) : /* fall through */
 626       CASE (0, 126) : /* fall through */
 627       CASE (0, 127) :
 628         {
 629           static DECODE *insns[16] = {
 630             &decode_illegal, &decode_illegal, &decode_illegal, &decode_illegal,
 631             &decode_illegal, &decode_illegal, &decode_illegal, &decode_illegal,
 632             &decode_bcl8, &decode_bncl8, &decode_illegal, &decode_illegal,
 633             &decode_bc8, &decode_bnc8, &decode_bl8, &decode_bra8,
 634           };
 635           unsigned int val = (((insn >> 8) & (15 << 0)));
 636           return insns[val];
 637         }
 638       CASE (0, 128) :
 639         {
 640 #ifdef __GNUC__
 641           static void *labels_0_128[16] = {
 642             && case_0_128_0, && default_0_128, && default_0_128, && default_0_128,
 643             && default_0_128, && default_0_128, && default_0_128, && default_0_128,
 644             && default_0_128, && default_0_128, && default_0_128, && default_0_128,
 645             && default_0_128, && default_0_128, && default_0_128, && default_0_128,
 646           };
 647 #endif
 648           static DECODE *insns[16] = {
 649             0, &decode_illegal, &decode_illegal, &decode_illegal,
 650             &decode_illegal, &decode_illegal, &decode_illegal, &decode_illegal,
 651             &decode_illegal, &decode_illegal, &decode_illegal, &decode_illegal,
 652             &decode_illegal, &decode_illegal, &decode_illegal, &decode_illegal,
 653           };
 654           unsigned int val;
 655           /* Must fetch more bits.  */
 656           insn = GETIMEMUHI (current_cpu, CPU (h_pc) + 2);
 657           val = (((insn >> 12) & (15 << 0)));
 658           DECODE_SWITCH (0_128, val)
 659             {
 660             CASE (0_128, 0) :
 661               {
 662                 static DECODE *insns[16] = {
 663                   &decode_sat, &decode_satb, &decode_sath, &decode_illegal,
 664                   &decode_illegal, &decode_illegal, &decode_illegal, &decode_illegal,
 665                   &decode_illegal, &decode_illegal, &decode_illegal, &decode_illegal,
 666                   &decode_illegal, &decode_illegal, &decode_illegal, &decode_illegal,
 667                 };
 668                 unsigned int val = (((insn >> 8) & (15 << 0)));
 669                 return insns[val];
 670               }
 671             DEFAULT (0_128) : return insns[val];
 672             }
 673           ENDSWITCH (0_128)
 674         }
 675       CASE (0, 144) :
 676         {
 677 #ifdef __GNUC__
 678           static void *labels_0_144[16] = {
 679             && case_0_144_0, && default_0_144, && default_0_144, && default_0_144,
 680             && default_0_144, && default_0_144, && default_0_144, && default_0_144,
 681             && default_0_144, && default_0_144, && default_0_144, && default_0_144,
 682             && default_0_144, && default_0_144, && default_0_144, && default_0_144,
 683           };
 684 #endif
 685           static DECODE *insns[16] = {
 686             0, &decode_illegal, &decode_illegal, &decode_illegal,
 687             &decode_illegal, &decode_illegal, &decode_illegal, &decode_illegal,
 688             &decode_illegal, &decode_illegal, &decode_illegal, &decode_illegal,
 689             &decode_illegal, &decode_illegal, &decode_illegal, &decode_illegal,
 690           };
 691           unsigned int val;
 692           /* Must fetch more bits.  */
 693           insn = GETIMEMUHI (current_cpu, CPU (h_pc) + 2);
 694           val = (((insn >> 12) & (15 << 0)));
 695           DECODE_SWITCH (0_144, val)
 696             {
 697             CASE (0_144, 0) :
 698               {
 699 #ifdef __GNUC__
 700                 static void *labels_0_144_0[16] = {
 701                   && case_0_144_0_0, && default_0_144_0, && default_0_144_0, && default_0_144_0,
 702                   && default_0_144_0, && default_0_144_0, && default_0_144_0, && default_0_144_0,
 703                   && default_0_144_0, && default_0_144_0, && default_0_144_0, && default_0_144_0,
 704                   && default_0_144_0, && default_0_144_0, && default_0_144_0, && default_0_144_0,
 705                 };
 706 #endif
 707                 static DECODE *insns[16] = {
 708                   0, &decode_illegal, &decode_illegal, &decode_illegal,
 709                   &decode_illegal, &decode_illegal, &decode_illegal, &decode_illegal,
 710                   &decode_illegal, &decode_illegal, &decode_illegal, &decode_illegal,
 711                   &decode_illegal, &decode_illegal, &decode_illegal, &decode_illegal,
 712                 };
 713                 unsigned int val;
 714                 val = (((insn >> 8) & (15 << 0)));
 715                 DECODE_SWITCH (0_144_0, val)
 716                   {
 717                   CASE (0_144_0, 0) :
 718                     {
 719                       static DECODE *insns[16] = {
 720                         &decode_div, &decode_divh, &decode_illegal, &decode_illegal,
 721                         &decode_illegal, &decode_illegal, &decode_illegal, &decode_illegal,
 722                         &decode_illegal, &decode_illegal, &decode_illegal, &decode_illegal,
 723                         &decode_illegal, &decode_illegal, &decode_illegal, &decode_illegal,
 724                       };
 725                       unsigned int val = (((insn >> 4) & (15 << 0)));
 726                       return insns[val];
 727                     }
 728                   DEFAULT (0_144_0) : return insns[val];
 729                   }
 730                 ENDSWITCH (0_144_0)
 731               }
 732             DEFAULT (0_144) : return insns[val];
 733             }
 734           ENDSWITCH (0_144)
 735         }
 736       CASE (0, 240) : /* fall through */
 737       CASE (0, 241) : /* fall through */
 738       CASE (0, 242) : /* fall through */
 739       CASE (0, 243) : /* fall through */
 740       CASE (0, 244) : /* fall through */
 741       CASE (0, 245) : /* fall through */
 742       CASE (0, 246) : /* fall through */
 743       CASE (0, 247) : /* fall through */
 744       CASE (0, 248) : /* fall through */
 745       CASE (0, 249) : /* fall through */
 746       CASE (0, 250) : /* fall through */
 747       CASE (0, 251) : /* fall through */
 748       CASE (0, 252) : /* fall through */
 749       CASE (0, 253) : /* fall through */
 750       CASE (0, 254) : /* fall through */
 751       CASE (0, 255) :
 752         {
 753           static DECODE *insns[16] = {
 754             &decode_illegal, &decode_illegal, &decode_illegal, &decode_illegal,
 755             &decode_illegal, &decode_illegal, &decode_illegal, &decode_illegal,
 756             &decode_bcl24, &decode_bncl24, &decode_illegal, &decode_illegal,
 757             &decode_bc24, &decode_bnc24, &decode_bl24, &decode_bra24,
 758           };
 759           unsigned int val = (((insn >> 8) & (15 << 0)));
 760           return insns[val];
 761         }
 762       DEFAULT (0) : return insns[val];
 763       }
 764     ENDSWITCH (0)
 765   }
 766 }